gcc/ChangeLog:
[official-gcc.git] / gcc / emit-rtl.c
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1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
32 use. */
34 #include "config.h"
35 #include "system.h"
36 #include "coretypes.h"
37 #include "memmodel.h"
38 #include "backend.h"
39 #include "target.h"
40 #include "rtl.h"
41 #include "tree.h"
42 #include "df.h"
43 #include "tm_p.h"
44 #include "stringpool.h"
45 #include "insn-config.h"
46 #include "regs.h"
47 #include "emit-rtl.h"
48 #include "recog.h"
49 #include "diagnostic-core.h"
50 #include "alias.h"
51 #include "fold-const.h"
52 #include "varasm.h"
53 #include "cfgrtl.h"
54 #include "tree-eh.h"
55 #include "explow.h"
56 #include "expr.h"
57 #include "params.h"
58 #include "builtins.h"
59 #include "rtl-iter.h"
60 #include "stor-layout.h"
61 #include "opts.h"
62 #include "predict.h"
64 struct target_rtl default_target_rtl;
65 #if SWITCHABLE_TARGET
66 struct target_rtl *this_target_rtl = &default_target_rtl;
67 #endif
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
87 rtx * regno_reg_rtx;
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
101 rtx const_true_rtx;
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
107 REAL_VALUE_TYPE dconsthalf;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
111 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
116 integers. */
118 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
120 /* Standard pieces of rtx, to be substituted directly into things. */
121 rtx pc_rtx;
122 rtx ret_rtx;
123 rtx simple_return_rtx;
124 rtx cc0_rtx;
126 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
127 this pointer should normally never be dereferenced), but is required to be
128 distinct from NULL_RTX. Currently used by peephole2 pass. */
129 rtx_insn *invalid_insn_rtx;
131 /* A hash table storing CONST_INTs whose absolute value is greater
132 than MAX_SAVED_CONST_INT. */
134 struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
136 typedef HOST_WIDE_INT compare_type;
138 static hashval_t hash (rtx i);
139 static bool equal (rtx i, HOST_WIDE_INT h);
142 static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
144 struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
146 static hashval_t hash (rtx x);
147 static bool equal (rtx x, rtx y);
150 static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
152 /* A hash table storing register attribute structures. */
153 struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
155 static hashval_t hash (reg_attrs *x);
156 static bool equal (reg_attrs *a, reg_attrs *b);
159 static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
161 /* A hash table storing all CONST_DOUBLEs. */
162 struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
164 static hashval_t hash (rtx x);
165 static bool equal (rtx x, rtx y);
168 static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
170 /* A hash table storing all CONST_FIXEDs. */
171 struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
173 static hashval_t hash (rtx x);
174 static bool equal (rtx x, rtx y);
177 static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
179 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
180 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
181 #define first_label_num (crtl->emit.x_first_label_num)
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 #if TARGET_SUPPORTS_WIDE_INT
186 static rtx lookup_const_wide_int (rtx);
187 #endif
188 static rtx lookup_const_double (rtx);
189 static rtx lookup_const_fixed (rtx);
190 static reg_attrs *get_reg_attrs (tree, int);
191 static rtx gen_const_vector (machine_mode, int);
192 static void copy_rtx_if_shared_1 (rtx *orig);
194 /* Probability of the conditional branch currently proceeded by try_split. */
195 profile_probability split_branch_probability;
197 /* Returns a hash code for X (which is a really a CONST_INT). */
199 hashval_t
200 const_int_hasher::hash (rtx x)
202 return (hashval_t) INTVAL (x);
205 /* Returns nonzero if the value represented by X (which is really a
206 CONST_INT) is the same as that given by Y (which is really a
207 HOST_WIDE_INT *). */
209 bool
210 const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
212 return (INTVAL (x) == y);
215 #if TARGET_SUPPORTS_WIDE_INT
216 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
218 hashval_t
219 const_wide_int_hasher::hash (rtx x)
221 int i;
222 unsigned HOST_WIDE_INT hash = 0;
223 const_rtx xr = x;
225 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
226 hash += CONST_WIDE_INT_ELT (xr, i);
228 return (hashval_t) hash;
231 /* Returns nonzero if the value represented by X (which is really a
232 CONST_WIDE_INT) is the same as that given by Y (which is really a
233 CONST_WIDE_INT). */
235 bool
236 const_wide_int_hasher::equal (rtx x, rtx y)
238 int i;
239 const_rtx xr = x;
240 const_rtx yr = y;
241 if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
242 return false;
244 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
245 if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
246 return false;
248 return true;
250 #endif
252 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
253 hashval_t
254 const_double_hasher::hash (rtx x)
256 const_rtx const value = x;
257 hashval_t h;
259 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
260 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
261 else
263 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
264 /* MODE is used in the comparison, so it should be in the hash. */
265 h ^= GET_MODE (value);
267 return h;
270 /* Returns nonzero if the value represented by X (really a ...)
271 is the same as that represented by Y (really a ...) */
272 bool
273 const_double_hasher::equal (rtx x, rtx y)
275 const_rtx const a = x, b = y;
277 if (GET_MODE (a) != GET_MODE (b))
278 return 0;
279 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
280 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
281 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
282 else
283 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
284 CONST_DOUBLE_REAL_VALUE (b));
287 /* Returns a hash code for X (which is really a CONST_FIXED). */
289 hashval_t
290 const_fixed_hasher::hash (rtx x)
292 const_rtx const value = x;
293 hashval_t h;
295 h = fixed_hash (CONST_FIXED_VALUE (value));
296 /* MODE is used in the comparison, so it should be in the hash. */
297 h ^= GET_MODE (value);
298 return h;
301 /* Returns nonzero if the value represented by X is the same as that
302 represented by Y. */
304 bool
305 const_fixed_hasher::equal (rtx x, rtx y)
307 const_rtx const a = x, b = y;
309 if (GET_MODE (a) != GET_MODE (b))
310 return 0;
311 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
314 /* Return true if the given memory attributes are equal. */
316 bool
317 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
319 if (p == q)
320 return true;
321 if (!p || !q)
322 return false;
323 return (p->alias == q->alias
324 && p->offset_known_p == q->offset_known_p
325 && (!p->offset_known_p || p->offset == q->offset)
326 && p->size_known_p == q->size_known_p
327 && (!p->size_known_p || p->size == q->size)
328 && p->align == q->align
329 && p->addrspace == q->addrspace
330 && (p->expr == q->expr
331 || (p->expr != NULL_TREE && q->expr != NULL_TREE
332 && operand_equal_p (p->expr, q->expr, 0))));
335 /* Set MEM's memory attributes so that they are the same as ATTRS. */
337 static void
338 set_mem_attrs (rtx mem, mem_attrs *attrs)
340 /* If everything is the default, we can just clear the attributes. */
341 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
343 MEM_ATTRS (mem) = 0;
344 return;
347 if (!MEM_ATTRS (mem)
348 || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
350 MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
351 memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 hashval_t
358 reg_attr_hasher::hash (reg_attrs *x)
360 const reg_attrs *const p = x;
362 return ((p->offset * 1000) ^ (intptr_t) p->decl);
365 /* Returns nonzero if the value represented by X is the same as that given by
366 Y. */
368 bool
369 reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
371 const reg_attrs *const p = x;
372 const reg_attrs *const q = y;
374 return (p->decl == q->decl && p->offset == q->offset);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
378 MEM of mode MODE. */
380 static reg_attrs *
381 get_reg_attrs (tree decl, int offset)
383 reg_attrs attrs;
385 /* If everything is the default, we can just return zero. */
386 if (decl == 0 && offset == 0)
387 return 0;
389 attrs.decl = decl;
390 attrs.offset = offset;
392 reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
393 if (*slot == 0)
395 *slot = ggc_alloc<reg_attrs> ();
396 memcpy (*slot, &attrs, sizeof (reg_attrs));
399 return *slot;
403 #if !HAVE_blockage
404 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
405 and to block register equivalences to be seen across this insn. */
408 gen_blockage (void)
410 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
411 MEM_VOLATILE_P (x) = true;
412 return x;
414 #endif
417 /* Set the mode and register number of X to MODE and REGNO. */
419 void
420 set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
422 unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
423 ? hard_regno_nregs[regno][mode]
424 : 1);
425 PUT_MODE_RAW (x, mode);
426 set_regno_raw (x, regno, nregs);
429 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
430 don't attempt to share with the various global pieces of rtl (such as
431 frame_pointer_rtx). */
434 gen_raw_REG (machine_mode mode, unsigned int regno)
436 rtx x = rtx_alloc (REG MEM_STAT_INFO);
437 set_mode_and_regno (x, mode, regno);
438 REG_ATTRS (x) = NULL;
439 ORIGINAL_REGNO (x) = regno;
440 return x;
443 /* There are some RTL codes that require special attention; the generation
444 functions do the raw handling. If you add to this list, modify
445 special_rtx in gengenrtl.c as well. */
447 rtx_expr_list *
448 gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
450 return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
451 expr_list));
454 rtx_insn_list *
455 gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
457 return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
458 insn_list));
461 rtx_insn *
462 gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
463 basic_block bb, rtx pattern, int location, int code,
464 rtx reg_notes)
466 return as_a <rtx_insn *> (gen_rtx_fmt_uuBeiie (INSN, mode,
467 prev_insn, next_insn,
468 bb, pattern, location, code,
469 reg_notes));
473 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
475 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
476 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
478 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
479 if (const_true_rtx && arg == STORE_FLAG_VALUE)
480 return const_true_rtx;
481 #endif
483 /* Look up the CONST_INT in the hash table. */
484 rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
485 INSERT);
486 if (*slot == 0)
487 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
489 return *slot;
493 gen_int_mode (HOST_WIDE_INT c, machine_mode mode)
495 return GEN_INT (trunc_int_for_mode (c, mode));
498 /* CONST_DOUBLEs might be created from pairs of integers, or from
499 REAL_VALUE_TYPEs. Also, their length is known only at run time,
500 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
502 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
503 hash table. If so, return its counterpart; otherwise add it
504 to the hash table and return it. */
505 static rtx
506 lookup_const_double (rtx real)
508 rtx *slot = const_double_htab->find_slot (real, INSERT);
509 if (*slot == 0)
510 *slot = real;
512 return *slot;
515 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
516 VALUE in mode MODE. */
518 const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
520 rtx real = rtx_alloc (CONST_DOUBLE);
521 PUT_MODE (real, mode);
523 real->u.rv = value;
525 return lookup_const_double (real);
528 /* Determine whether FIXED, a CONST_FIXED, already exists in the
529 hash table. If so, return its counterpart; otherwise add it
530 to the hash table and return it. */
532 static rtx
533 lookup_const_fixed (rtx fixed)
535 rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
536 if (*slot == 0)
537 *slot = fixed;
539 return *slot;
542 /* Return a CONST_FIXED rtx for a fixed-point value specified by
543 VALUE in mode MODE. */
546 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
548 rtx fixed = rtx_alloc (CONST_FIXED);
549 PUT_MODE (fixed, mode);
551 fixed->u.fv = value;
553 return lookup_const_fixed (fixed);
556 #if TARGET_SUPPORTS_WIDE_INT == 0
557 /* Constructs double_int from rtx CST. */
559 double_int
560 rtx_to_double_int (const_rtx cst)
562 double_int r;
564 if (CONST_INT_P (cst))
565 r = double_int::from_shwi (INTVAL (cst));
566 else if (CONST_DOUBLE_AS_INT_P (cst))
568 r.low = CONST_DOUBLE_LOW (cst);
569 r.high = CONST_DOUBLE_HIGH (cst);
571 else
572 gcc_unreachable ();
574 return r;
576 #endif
578 #if TARGET_SUPPORTS_WIDE_INT
579 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
580 If so, return its counterpart; otherwise add it to the hash table and
581 return it. */
583 static rtx
584 lookup_const_wide_int (rtx wint)
586 rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
587 if (*slot == 0)
588 *slot = wint;
590 return *slot;
592 #endif
594 /* Return an rtx constant for V, given that the constant has mode MODE.
595 The returned rtx will be a CONST_INT if V fits, otherwise it will be
596 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
597 (if TARGET_SUPPORTS_WIDE_INT). */
600 immed_wide_int_const (const wide_int_ref &v, machine_mode mode)
602 unsigned int len = v.get_len ();
603 unsigned int prec = GET_MODE_PRECISION (mode);
605 /* Allow truncation but not extension since we do not know if the
606 number is signed or unsigned. */
607 gcc_assert (prec <= v.get_precision ());
609 if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
610 return gen_int_mode (v.elt (0), mode);
612 #if TARGET_SUPPORTS_WIDE_INT
614 unsigned int i;
615 rtx value;
616 unsigned int blocks_needed
617 = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
619 if (len > blocks_needed)
620 len = blocks_needed;
622 value = const_wide_int_alloc (len);
624 /* It is so tempting to just put the mode in here. Must control
625 myself ... */
626 PUT_MODE (value, VOIDmode);
627 CWI_PUT_NUM_ELEM (value, len);
629 for (i = 0; i < len; i++)
630 CONST_WIDE_INT_ELT (value, i) = v.elt (i);
632 return lookup_const_wide_int (value);
634 #else
635 return immed_double_const (v.elt (0), v.elt (1), mode);
636 #endif
639 #if TARGET_SUPPORTS_WIDE_INT == 0
640 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
641 of ints: I0 is the low-order word and I1 is the high-order word.
642 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
643 implied upper bits are copies of the high bit of i1. The value
644 itself is neither signed nor unsigned. Do not use this routine for
645 non-integer modes; convert to REAL_VALUE_TYPE and use
646 const_double_from_real_value. */
649 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
651 rtx value;
652 unsigned int i;
654 /* There are the following cases (note that there are no modes with
655 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
657 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
658 gen_int_mode.
659 2) If the value of the integer fits into HOST_WIDE_INT anyway
660 (i.e., i1 consists only from copies of the sign bit, and sign
661 of i0 and i1 are the same), then we return a CONST_INT for i0.
662 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
663 if (mode != VOIDmode)
665 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
666 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
667 /* We can get a 0 for an error mark. */
668 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
669 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
670 || GET_MODE_CLASS (mode) == MODE_POINTER_BOUNDS);
672 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
673 return gen_int_mode (i0, mode);
676 /* If this integer fits in one word, return a CONST_INT. */
677 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
678 return GEN_INT (i0);
680 /* We use VOIDmode for integers. */
681 value = rtx_alloc (CONST_DOUBLE);
682 PUT_MODE (value, VOIDmode);
684 CONST_DOUBLE_LOW (value) = i0;
685 CONST_DOUBLE_HIGH (value) = i1;
687 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
688 XWINT (value, i) = 0;
690 return lookup_const_double (value);
692 #endif
695 gen_rtx_REG (machine_mode mode, unsigned int regno)
697 /* In case the MD file explicitly references the frame pointer, have
698 all such references point to the same frame pointer. This is
699 used during frame pointer elimination to distinguish the explicit
700 references to these registers from pseudos that happened to be
701 assigned to them.
703 If we have eliminated the frame pointer or arg pointer, we will
704 be using it as a normal register, for example as a spill
705 register. In such cases, we might be accessing it in a mode that
706 is not Pmode and therefore cannot use the pre-allocated rtx.
708 Also don't do this when we are making new REGs in reload, since
709 we don't want to get confused with the real pointers. */
711 if (mode == Pmode && !reload_in_progress && !lra_in_progress)
713 if (regno == FRAME_POINTER_REGNUM
714 && (!reload_completed || frame_pointer_needed))
715 return frame_pointer_rtx;
717 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
718 && regno == HARD_FRAME_POINTER_REGNUM
719 && (!reload_completed || frame_pointer_needed))
720 return hard_frame_pointer_rtx;
721 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
722 if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
723 && regno == ARG_POINTER_REGNUM)
724 return arg_pointer_rtx;
725 #endif
726 #ifdef RETURN_ADDRESS_POINTER_REGNUM
727 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
728 return return_address_pointer_rtx;
729 #endif
730 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
731 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
732 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
733 return pic_offset_table_rtx;
734 if (regno == STACK_POINTER_REGNUM)
735 return stack_pointer_rtx;
738 #if 0
739 /* If the per-function register table has been set up, try to re-use
740 an existing entry in that table to avoid useless generation of RTL.
742 This code is disabled for now until we can fix the various backends
743 which depend on having non-shared hard registers in some cases. Long
744 term we want to re-enable this code as it can significantly cut down
745 on the amount of useless RTL that gets generated.
747 We'll also need to fix some code that runs after reload that wants to
748 set ORIGINAL_REGNO. */
750 if (cfun
751 && cfun->emit
752 && regno_reg_rtx
753 && regno < FIRST_PSEUDO_REGISTER
754 && reg_raw_mode[regno] == mode)
755 return regno_reg_rtx[regno];
756 #endif
758 return gen_raw_REG (mode, regno);
762 gen_rtx_MEM (machine_mode mode, rtx addr)
764 rtx rt = gen_rtx_raw_MEM (mode, addr);
766 /* This field is not cleared by the mere allocation of the rtx, so
767 we clear it here. */
768 MEM_ATTRS (rt) = 0;
770 return rt;
773 /* Generate a memory referring to non-trapping constant memory. */
776 gen_const_mem (machine_mode mode, rtx addr)
778 rtx mem = gen_rtx_MEM (mode, addr);
779 MEM_READONLY_P (mem) = 1;
780 MEM_NOTRAP_P (mem) = 1;
781 return mem;
784 /* Generate a MEM referring to fixed portions of the frame, e.g., register
785 save areas. */
788 gen_frame_mem (machine_mode mode, rtx addr)
790 rtx mem = gen_rtx_MEM (mode, addr);
791 MEM_NOTRAP_P (mem) = 1;
792 set_mem_alias_set (mem, get_frame_alias_set ());
793 return mem;
796 /* Generate a MEM referring to a temporary use of the stack, not part
797 of the fixed stack frame. For example, something which is pushed
798 by a target splitter. */
800 gen_tmp_stack_mem (machine_mode mode, rtx addr)
802 rtx mem = gen_rtx_MEM (mode, addr);
803 MEM_NOTRAP_P (mem) = 1;
804 if (!cfun->calls_alloca)
805 set_mem_alias_set (mem, get_frame_alias_set ());
806 return mem;
809 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
810 this construct would be valid, and false otherwise. */
812 bool
813 validate_subreg (machine_mode omode, machine_mode imode,
814 const_rtx reg, unsigned int offset)
816 unsigned int isize = GET_MODE_SIZE (imode);
817 unsigned int osize = GET_MODE_SIZE (omode);
819 /* All subregs must be aligned. */
820 if (offset % osize != 0)
821 return false;
823 /* The subreg offset cannot be outside the inner object. */
824 if (offset >= isize)
825 return false;
827 /* ??? This should not be here. Temporarily continue to allow word_mode
828 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
829 Generally, backends are doing something sketchy but it'll take time to
830 fix them all. */
831 if (omode == word_mode)
833 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
834 is the culprit here, and not the backends. */
835 else if (osize >= UNITS_PER_WORD && isize >= osize)
837 /* Allow component subregs of complex and vector. Though given the below
838 extraction rules, it's not always clear what that means. */
839 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
840 && GET_MODE_INNER (imode) == omode)
842 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
843 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
844 represent this. It's questionable if this ought to be represented at
845 all -- why can't this all be hidden in post-reload splitters that make
846 arbitrarily mode changes to the registers themselves. */
847 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
849 /* Subregs involving floating point modes are not allowed to
850 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
851 (subreg:SI (reg:DF) 0) isn't. */
852 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
854 if (! (isize == osize
855 /* LRA can use subreg to store a floating point value in
856 an integer mode. Although the floating point and the
857 integer modes need the same number of hard registers,
858 the size of floating point mode can be less than the
859 integer mode. LRA also uses subregs for a register
860 should be used in different mode in on insn. */
861 || lra_in_progress))
862 return false;
865 /* Paradoxical subregs must have offset zero. */
866 if (osize > isize)
867 return offset == 0;
869 /* This is a normal subreg. Verify that the offset is representable. */
871 /* For hard registers, we already have most of these rules collected in
872 subreg_offset_representable_p. */
873 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
875 unsigned int regno = REGNO (reg);
877 #ifdef CANNOT_CHANGE_MODE_CLASS
878 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
879 && GET_MODE_INNER (imode) == omode)
881 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
882 return false;
883 #endif
885 return subreg_offset_representable_p (regno, imode, offset, omode);
888 /* For pseudo registers, we want most of the same checks. Namely:
889 If the register no larger than a word, the subreg must be lowpart.
890 If the register is larger than a word, the subreg must be the lowpart
891 of a subword. A subreg does *not* perform arbitrary bit extraction.
892 Given that we've already checked mode/offset alignment, we only have
893 to check subword subregs here. */
894 if (osize < UNITS_PER_WORD
895 && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
897 machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
898 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
899 if (offset % UNITS_PER_WORD != low_off)
900 return false;
902 return true;
906 gen_rtx_SUBREG (machine_mode mode, rtx reg, int offset)
908 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
909 return gen_rtx_raw_SUBREG (mode, reg, offset);
912 /* Generate a SUBREG representing the least-significant part of REG if MODE
913 is smaller than mode of REG, otherwise paradoxical SUBREG. */
916 gen_lowpart_SUBREG (machine_mode mode, rtx reg)
918 machine_mode inmode;
920 inmode = GET_MODE (reg);
921 if (inmode == VOIDmode)
922 inmode = mode;
923 return gen_rtx_SUBREG (mode, reg,
924 subreg_lowpart_offset (mode, inmode));
928 gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
929 enum var_init_status status)
931 rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
932 PAT_VAR_LOCATION_STATUS (x) = status;
933 return x;
937 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
939 rtvec
940 gen_rtvec (int n, ...)
942 int i;
943 rtvec rt_val;
944 va_list p;
946 va_start (p, n);
948 /* Don't allocate an empty rtvec... */
949 if (n == 0)
951 va_end (p);
952 return NULL_RTVEC;
955 rt_val = rtvec_alloc (n);
957 for (i = 0; i < n; i++)
958 rt_val->elem[i] = va_arg (p, rtx);
960 va_end (p);
961 return rt_val;
964 rtvec
965 gen_rtvec_v (int n, rtx *argp)
967 int i;
968 rtvec rt_val;
970 /* Don't allocate an empty rtvec... */
971 if (n == 0)
972 return NULL_RTVEC;
974 rt_val = rtvec_alloc (n);
976 for (i = 0; i < n; i++)
977 rt_val->elem[i] = *argp++;
979 return rt_val;
982 rtvec
983 gen_rtvec_v (int n, rtx_insn **argp)
985 int i;
986 rtvec rt_val;
988 /* Don't allocate an empty rtvec... */
989 if (n == 0)
990 return NULL_RTVEC;
992 rt_val = rtvec_alloc (n);
994 for (i = 0; i < n; i++)
995 rt_val->elem[i] = *argp++;
997 return rt_val;
1001 /* Return the number of bytes between the start of an OUTER_MODE
1002 in-memory value and the start of an INNER_MODE in-memory value,
1003 given that the former is a lowpart of the latter. It may be a
1004 paradoxical lowpart, in which case the offset will be negative
1005 on big-endian targets. */
1008 byte_lowpart_offset (machine_mode outer_mode,
1009 machine_mode inner_mode)
1011 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
1012 return subreg_lowpart_offset (outer_mode, inner_mode);
1013 else
1014 return -subreg_lowpart_offset (inner_mode, outer_mode);
1017 /* Generate a REG rtx for a new pseudo register of mode MODE.
1018 This pseudo is assigned the next sequential register number. */
1021 gen_reg_rtx (machine_mode mode)
1023 rtx val;
1024 unsigned int align = GET_MODE_ALIGNMENT (mode);
1026 gcc_assert (can_create_pseudo_p ());
1028 /* If a virtual register with bigger mode alignment is generated,
1029 increase stack alignment estimation because it might be spilled
1030 to stack later. */
1031 if (SUPPORTS_STACK_ALIGNMENT
1032 && crtl->stack_alignment_estimated < align
1033 && !crtl->stack_realign_processed)
1035 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1036 if (crtl->stack_alignment_estimated < min_align)
1037 crtl->stack_alignment_estimated = min_align;
1040 if (generating_concat_p
1041 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1042 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1044 /* For complex modes, don't make a single pseudo.
1045 Instead, make a CONCAT of two pseudos.
1046 This allows noncontiguous allocation of the real and imaginary parts,
1047 which makes much better code. Besides, allocating DCmode
1048 pseudos overstrains reload on some machines like the 386. */
1049 rtx realpart, imagpart;
1050 machine_mode partmode = GET_MODE_INNER (mode);
1052 realpart = gen_reg_rtx (partmode);
1053 imagpart = gen_reg_rtx (partmode);
1054 return gen_rtx_CONCAT (mode, realpart, imagpart);
1057 /* Do not call gen_reg_rtx with uninitialized crtl. */
1058 gcc_assert (crtl->emit.regno_pointer_align_length);
1060 crtl->emit.ensure_regno_capacity ();
1061 gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1063 val = gen_raw_REG (mode, reg_rtx_no);
1064 regno_reg_rtx[reg_rtx_no++] = val;
1065 return val;
1068 /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1069 enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1071 void
1072 emit_status::ensure_regno_capacity ()
1074 int old_size = regno_pointer_align_length;
1076 if (reg_rtx_no < old_size)
1077 return;
1079 int new_size = old_size * 2;
1080 while (reg_rtx_no >= new_size)
1081 new_size *= 2;
1083 char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1084 memset (tmp + old_size, 0, new_size - old_size);
1085 regno_pointer_align = (unsigned char *) tmp;
1087 rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1088 memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1089 regno_reg_rtx = new1;
1091 crtl->emit.regno_pointer_align_length = new_size;
1094 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1096 bool
1097 reg_is_parm_p (rtx reg)
1099 tree decl;
1101 gcc_assert (REG_P (reg));
1102 decl = REG_EXPR (reg);
1103 return (decl && TREE_CODE (decl) == PARM_DECL);
1106 /* Update NEW with the same attributes as REG, but with OFFSET added
1107 to the REG_OFFSET. */
1109 static void
1110 update_reg_offset (rtx new_rtx, rtx reg, int offset)
1112 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1113 REG_OFFSET (reg) + offset);
1116 /* Generate a register with same attributes as REG, but with OFFSET
1117 added to the REG_OFFSET. */
1120 gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1121 int offset)
1123 rtx new_rtx = gen_rtx_REG (mode, regno);
1125 update_reg_offset (new_rtx, reg, offset);
1126 return new_rtx;
1129 /* Generate a new pseudo-register with the same attributes as REG, but
1130 with OFFSET added to the REG_OFFSET. */
1133 gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1135 rtx new_rtx = gen_reg_rtx (mode);
1137 update_reg_offset (new_rtx, reg, offset);
1138 return new_rtx;
1141 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1142 new register is a (possibly paradoxical) lowpart of the old one. */
1144 void
1145 adjust_reg_mode (rtx reg, machine_mode mode)
1147 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1148 PUT_MODE (reg, mode);
1151 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1152 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1154 void
1155 set_reg_attrs_from_value (rtx reg, rtx x)
1157 int offset;
1158 bool can_be_reg_pointer = true;
1160 /* Don't call mark_reg_pointer for incompatible pointer sign
1161 extension. */
1162 while (GET_CODE (x) == SIGN_EXTEND
1163 || GET_CODE (x) == ZERO_EXTEND
1164 || GET_CODE (x) == TRUNCATE
1165 || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1167 #if defined(POINTERS_EXTEND_UNSIGNED)
1168 if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1169 || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1170 || (paradoxical_subreg_p (x)
1171 && ! (SUBREG_PROMOTED_VAR_P (x)
1172 && SUBREG_CHECK_PROMOTED_SIGN (x,
1173 POINTERS_EXTEND_UNSIGNED))))
1174 && !targetm.have_ptr_extend ())
1175 can_be_reg_pointer = false;
1176 #endif
1177 x = XEXP (x, 0);
1180 /* Hard registers can be reused for multiple purposes within the same
1181 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1182 on them is wrong. */
1183 if (HARD_REGISTER_P (reg))
1184 return;
1186 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1187 if (MEM_P (x))
1189 if (MEM_OFFSET_KNOWN_P (x))
1190 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1191 MEM_OFFSET (x) + offset);
1192 if (can_be_reg_pointer && MEM_POINTER (x))
1193 mark_reg_pointer (reg, 0);
1195 else if (REG_P (x))
1197 if (REG_ATTRS (x))
1198 update_reg_offset (reg, x, offset);
1199 if (can_be_reg_pointer && REG_POINTER (x))
1200 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1204 /* Generate a REG rtx for a new pseudo register, copying the mode
1205 and attributes from X. */
1208 gen_reg_rtx_and_attrs (rtx x)
1210 rtx reg = gen_reg_rtx (GET_MODE (x));
1211 set_reg_attrs_from_value (reg, x);
1212 return reg;
1215 /* Set the register attributes for registers contained in PARM_RTX.
1216 Use needed values from memory attributes of MEM. */
1218 void
1219 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1221 if (REG_P (parm_rtx))
1222 set_reg_attrs_from_value (parm_rtx, mem);
1223 else if (GET_CODE (parm_rtx) == PARALLEL)
1225 /* Check for a NULL entry in the first slot, used to indicate that the
1226 parameter goes both on the stack and in registers. */
1227 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1228 for (; i < XVECLEN (parm_rtx, 0); i++)
1230 rtx x = XVECEXP (parm_rtx, 0, i);
1231 if (REG_P (XEXP (x, 0)))
1232 REG_ATTRS (XEXP (x, 0))
1233 = get_reg_attrs (MEM_EXPR (mem),
1234 INTVAL (XEXP (x, 1)));
1239 /* Set the REG_ATTRS for registers in value X, given that X represents
1240 decl T. */
1242 void
1243 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1245 if (!t)
1246 return;
1247 tree tdecl = t;
1248 if (GET_CODE (x) == SUBREG)
1250 gcc_assert (subreg_lowpart_p (x));
1251 x = SUBREG_REG (x);
1253 if (REG_P (x))
1254 REG_ATTRS (x)
1255 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1256 DECL_P (tdecl)
1257 ? DECL_MODE (tdecl)
1258 : TYPE_MODE (TREE_TYPE (tdecl))));
1259 if (GET_CODE (x) == CONCAT)
1261 if (REG_P (XEXP (x, 0)))
1262 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1263 if (REG_P (XEXP (x, 1)))
1264 REG_ATTRS (XEXP (x, 1))
1265 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1267 if (GET_CODE (x) == PARALLEL)
1269 int i, start;
1271 /* Check for a NULL entry, used to indicate that the parameter goes
1272 both on the stack and in registers. */
1273 if (XEXP (XVECEXP (x, 0, 0), 0))
1274 start = 0;
1275 else
1276 start = 1;
1278 for (i = start; i < XVECLEN (x, 0); i++)
1280 rtx y = XVECEXP (x, 0, i);
1281 if (REG_P (XEXP (y, 0)))
1282 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1287 /* Assign the RTX X to declaration T. */
1289 void
1290 set_decl_rtl (tree t, rtx x)
1292 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1293 if (x)
1294 set_reg_attrs_for_decl_rtl (t, x);
1297 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1298 if the ABI requires the parameter to be passed by reference. */
1300 void
1301 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1303 DECL_INCOMING_RTL (t) = x;
1304 if (x && !by_reference_p)
1305 set_reg_attrs_for_decl_rtl (t, x);
1308 /* Identify REG (which may be a CONCAT) as a user register. */
1310 void
1311 mark_user_reg (rtx reg)
1313 if (GET_CODE (reg) == CONCAT)
1315 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1316 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1318 else
1320 gcc_assert (REG_P (reg));
1321 REG_USERVAR_P (reg) = 1;
1325 /* Identify REG as a probable pointer register and show its alignment
1326 as ALIGN, if nonzero. */
1328 void
1329 mark_reg_pointer (rtx reg, int align)
1331 if (! REG_POINTER (reg))
1333 REG_POINTER (reg) = 1;
1335 if (align)
1336 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1338 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1339 /* We can no-longer be sure just how aligned this pointer is. */
1340 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1343 /* Return 1 plus largest pseudo reg number used in the current function. */
1346 max_reg_num (void)
1348 return reg_rtx_no;
1351 /* Return 1 + the largest label number used so far in the current function. */
1354 max_label_num (void)
1356 return label_num;
1359 /* Return first label number used in this function (if any were used). */
1362 get_first_label_num (void)
1364 return first_label_num;
1367 /* If the rtx for label was created during the expansion of a nested
1368 function, then first_label_num won't include this label number.
1369 Fix this now so that array indices work later. */
1371 void
1372 maybe_set_first_label_num (rtx_code_label *x)
1374 if (CODE_LABEL_NUMBER (x) < first_label_num)
1375 first_label_num = CODE_LABEL_NUMBER (x);
1378 /* For use by the RTL function loader, when mingling with normal
1379 functions.
1380 Ensure that label_num is greater than the label num of X, to avoid
1381 duplicate labels in the generated assembler. */
1383 void
1384 maybe_set_max_label_num (rtx_code_label *x)
1386 if (CODE_LABEL_NUMBER (x) >= label_num)
1387 label_num = CODE_LABEL_NUMBER (x) + 1;
1391 /* Return a value representing some low-order bits of X, where the number
1392 of low-order bits is given by MODE. Note that no conversion is done
1393 between floating-point and fixed-point values, rather, the bit
1394 representation is returned.
1396 This function handles the cases in common between gen_lowpart, below,
1397 and two variants in cse.c and combine.c. These are the cases that can
1398 be safely handled at all points in the compilation.
1400 If this is not a case we can handle, return 0. */
1403 gen_lowpart_common (machine_mode mode, rtx x)
1405 int msize = GET_MODE_SIZE (mode);
1406 int xsize;
1407 machine_mode innermode;
1409 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1410 so we have to make one up. Yuk. */
1411 innermode = GET_MODE (x);
1412 if (CONST_INT_P (x)
1413 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1414 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1415 else if (innermode == VOIDmode)
1416 innermode = mode_for_size (HOST_BITS_PER_DOUBLE_INT, MODE_INT, 0);
1418 xsize = GET_MODE_SIZE (innermode);
1420 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1422 if (innermode == mode)
1423 return x;
1425 /* MODE must occupy no more words than the mode of X. */
1426 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1427 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1428 return 0;
1430 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1431 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1432 return 0;
1434 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1435 && (GET_MODE_CLASS (mode) == MODE_INT
1436 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1438 /* If we are getting the low-order part of something that has been
1439 sign- or zero-extended, we can either just use the object being
1440 extended or make a narrower extension. If we want an even smaller
1441 piece than the size of the object being extended, call ourselves
1442 recursively.
1444 This case is used mostly by combine and cse. */
1446 if (GET_MODE (XEXP (x, 0)) == mode)
1447 return XEXP (x, 0);
1448 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1449 return gen_lowpart_common (mode, XEXP (x, 0));
1450 else if (msize < xsize)
1451 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1453 else if (GET_CODE (x) == SUBREG || REG_P (x)
1454 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1455 || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x))
1456 return lowpart_subreg (mode, x, innermode);
1458 /* Otherwise, we can't do this. */
1459 return 0;
1463 gen_highpart (machine_mode mode, rtx x)
1465 unsigned int msize = GET_MODE_SIZE (mode);
1466 rtx result;
1468 /* This case loses if X is a subreg. To catch bugs early,
1469 complain if an invalid MODE is used even in other cases. */
1470 gcc_assert (msize <= UNITS_PER_WORD
1471 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1473 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1474 subreg_highpart_offset (mode, GET_MODE (x)));
1475 gcc_assert (result);
1477 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1478 the target if we have a MEM. gen_highpart must return a valid operand,
1479 emitting code if necessary to do so. */
1480 if (MEM_P (result))
1482 result = validize_mem (result);
1483 gcc_assert (result);
1486 return result;
1489 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1490 be VOIDmode constant. */
1492 gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1494 if (GET_MODE (exp) != VOIDmode)
1496 gcc_assert (GET_MODE (exp) == innermode);
1497 return gen_highpart (outermode, exp);
1499 return simplify_gen_subreg (outermode, exp, innermode,
1500 subreg_highpart_offset (outermode, innermode));
1503 /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1504 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1506 unsigned int
1507 subreg_size_lowpart_offset (unsigned int outer_bytes, unsigned int inner_bytes)
1509 if (outer_bytes > inner_bytes)
1510 /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1511 return 0;
1513 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1514 return inner_bytes - outer_bytes;
1515 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1516 return 0;
1517 else
1518 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1521 /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1522 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1524 unsigned int
1525 subreg_size_highpart_offset (unsigned int outer_bytes,
1526 unsigned int inner_bytes)
1528 gcc_assert (inner_bytes >= outer_bytes);
1530 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1531 return 0;
1532 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1533 return inner_bytes - outer_bytes;
1534 else
1535 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1536 (inner_bytes - outer_bytes)
1537 * BITS_PER_UNIT);
1540 /* Return 1 iff X, assumed to be a SUBREG,
1541 refers to the least significant part of its containing reg.
1542 If X is not a SUBREG, always return 1 (it is its own low part!). */
1545 subreg_lowpart_p (const_rtx x)
1547 if (GET_CODE (x) != SUBREG)
1548 return 1;
1549 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1550 return 0;
1552 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1553 == SUBREG_BYTE (x));
1556 /* Return true if X is a paradoxical subreg, false otherwise. */
1557 bool
1558 paradoxical_subreg_p (const_rtx x)
1560 if (GET_CODE (x) != SUBREG)
1561 return false;
1562 return (GET_MODE_PRECISION (GET_MODE (x))
1563 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1566 /* Return subword OFFSET of operand OP.
1567 The word number, OFFSET, is interpreted as the word number starting
1568 at the low-order address. OFFSET 0 is the low-order word if not
1569 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1571 If we cannot extract the required word, we return zero. Otherwise,
1572 an rtx corresponding to the requested word will be returned.
1574 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1575 reload has completed, a valid address will always be returned. After
1576 reload, if a valid address cannot be returned, we return zero.
1578 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1579 it is the responsibility of the caller.
1581 MODE is the mode of OP in case it is a CONST_INT.
1583 ??? This is still rather broken for some cases. The problem for the
1584 moment is that all callers of this thing provide no 'goal mode' to
1585 tell us to work with. This exists because all callers were written
1586 in a word based SUBREG world.
1587 Now use of this function can be deprecated by simplify_subreg in most
1588 cases.
1592 operand_subword (rtx op, unsigned int offset, int validate_address, machine_mode mode)
1594 if (mode == VOIDmode)
1595 mode = GET_MODE (op);
1597 gcc_assert (mode != VOIDmode);
1599 /* If OP is narrower than a word, fail. */
1600 if (mode != BLKmode
1601 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1602 return 0;
1604 /* If we want a word outside OP, return zero. */
1605 if (mode != BLKmode
1606 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1607 return const0_rtx;
1609 /* Form a new MEM at the requested address. */
1610 if (MEM_P (op))
1612 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1614 if (! validate_address)
1615 return new_rtx;
1617 else if (reload_completed)
1619 if (! strict_memory_address_addr_space_p (word_mode,
1620 XEXP (new_rtx, 0),
1621 MEM_ADDR_SPACE (op)))
1622 return 0;
1624 else
1625 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1628 /* Rest can be handled by simplify_subreg. */
1629 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1632 /* Similar to `operand_subword', but never return 0. If we can't
1633 extract the required subword, put OP into a register and try again.
1634 The second attempt must succeed. We always validate the address in
1635 this case.
1637 MODE is the mode of OP, in case it is CONST_INT. */
1640 operand_subword_force (rtx op, unsigned int offset, machine_mode mode)
1642 rtx result = operand_subword (op, offset, 1, mode);
1644 if (result)
1645 return result;
1647 if (mode != BLKmode && mode != VOIDmode)
1649 /* If this is a register which can not be accessed by words, copy it
1650 to a pseudo register. */
1651 if (REG_P (op))
1652 op = copy_to_reg (op);
1653 else
1654 op = force_reg (mode, op);
1657 result = operand_subword (op, offset, 1, mode);
1658 gcc_assert (result);
1660 return result;
1663 /* Returns 1 if both MEM_EXPR can be considered equal
1664 and 0 otherwise. */
1667 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1669 if (expr1 == expr2)
1670 return 1;
1672 if (! expr1 || ! expr2)
1673 return 0;
1675 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1676 return 0;
1678 return operand_equal_p (expr1, expr2, 0);
1681 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1682 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1683 -1 if not known. */
1686 get_mem_align_offset (rtx mem, unsigned int align)
1688 tree expr;
1689 unsigned HOST_WIDE_INT offset;
1691 /* This function can't use
1692 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1693 || (MAX (MEM_ALIGN (mem),
1694 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1695 < align))
1696 return -1;
1697 else
1698 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1699 for two reasons:
1700 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1701 for <variable>. get_inner_reference doesn't handle it and
1702 even if it did, the alignment in that case needs to be determined
1703 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1704 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1705 isn't sufficiently aligned, the object it is in might be. */
1706 gcc_assert (MEM_P (mem));
1707 expr = MEM_EXPR (mem);
1708 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1709 return -1;
1711 offset = MEM_OFFSET (mem);
1712 if (DECL_P (expr))
1714 if (DECL_ALIGN (expr) < align)
1715 return -1;
1717 else if (INDIRECT_REF_P (expr))
1719 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1720 return -1;
1722 else if (TREE_CODE (expr) == COMPONENT_REF)
1724 while (1)
1726 tree inner = TREE_OPERAND (expr, 0);
1727 tree field = TREE_OPERAND (expr, 1);
1728 tree byte_offset = component_ref_field_offset (expr);
1729 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1731 if (!byte_offset
1732 || !tree_fits_uhwi_p (byte_offset)
1733 || !tree_fits_uhwi_p (bit_offset))
1734 return -1;
1736 offset += tree_to_uhwi (byte_offset);
1737 offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1739 if (inner == NULL_TREE)
1741 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1742 < (unsigned int) align)
1743 return -1;
1744 break;
1746 else if (DECL_P (inner))
1748 if (DECL_ALIGN (inner) < align)
1749 return -1;
1750 break;
1752 else if (TREE_CODE (inner) != COMPONENT_REF)
1753 return -1;
1754 expr = inner;
1757 else
1758 return -1;
1760 return offset & ((align / BITS_PER_UNIT) - 1);
1763 /* Given REF (a MEM) and T, either the type of X or the expression
1764 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1765 if we are making a new object of this type. BITPOS is nonzero if
1766 there is an offset outstanding on T that will be applied later. */
1768 void
1769 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1770 HOST_WIDE_INT bitpos)
1772 HOST_WIDE_INT apply_bitpos = 0;
1773 tree type;
1774 struct mem_attrs attrs, *defattrs, *refattrs;
1775 addr_space_t as;
1777 /* It can happen that type_for_mode was given a mode for which there
1778 is no language-level type. In which case it returns NULL, which
1779 we can see here. */
1780 if (t == NULL_TREE)
1781 return;
1783 type = TYPE_P (t) ? t : TREE_TYPE (t);
1784 if (type == error_mark_node)
1785 return;
1787 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1788 wrong answer, as it assumes that DECL_RTL already has the right alias
1789 info. Callers should not set DECL_RTL until after the call to
1790 set_mem_attributes. */
1791 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1793 memset (&attrs, 0, sizeof (attrs));
1795 /* Get the alias set from the expression or type (perhaps using a
1796 front-end routine) and use it. */
1797 attrs.alias = get_alias_set (t);
1799 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1800 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1802 /* Default values from pre-existing memory attributes if present. */
1803 refattrs = MEM_ATTRS (ref);
1804 if (refattrs)
1806 /* ??? Can this ever happen? Calling this routine on a MEM that
1807 already carries memory attributes should probably be invalid. */
1808 attrs.expr = refattrs->expr;
1809 attrs.offset_known_p = refattrs->offset_known_p;
1810 attrs.offset = refattrs->offset;
1811 attrs.size_known_p = refattrs->size_known_p;
1812 attrs.size = refattrs->size;
1813 attrs.align = refattrs->align;
1816 /* Otherwise, default values from the mode of the MEM reference. */
1817 else
1819 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1820 gcc_assert (!defattrs->expr);
1821 gcc_assert (!defattrs->offset_known_p);
1823 /* Respect mode size. */
1824 attrs.size_known_p = defattrs->size_known_p;
1825 attrs.size = defattrs->size;
1826 /* ??? Is this really necessary? We probably should always get
1827 the size from the type below. */
1829 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1830 if T is an object, always compute the object alignment below. */
1831 if (TYPE_P (t))
1832 attrs.align = defattrs->align;
1833 else
1834 attrs.align = BITS_PER_UNIT;
1835 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1836 e.g. if the type carries an alignment attribute. Should we be
1837 able to simply always use TYPE_ALIGN? */
1840 /* We can set the alignment from the type if we are making an object or if
1841 this is an INDIRECT_REF. */
1842 if (objectp || TREE_CODE (t) == INDIRECT_REF)
1843 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1845 /* If the size is known, we can set that. */
1846 tree new_size = TYPE_SIZE_UNIT (type);
1848 /* The address-space is that of the type. */
1849 as = TYPE_ADDR_SPACE (type);
1851 /* If T is not a type, we may be able to deduce some more information about
1852 the expression. */
1853 if (! TYPE_P (t))
1855 tree base;
1857 if (TREE_THIS_VOLATILE (t))
1858 MEM_VOLATILE_P (ref) = 1;
1860 /* Now remove any conversions: they don't change what the underlying
1861 object is. Likewise for SAVE_EXPR. */
1862 while (CONVERT_EXPR_P (t)
1863 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1864 || TREE_CODE (t) == SAVE_EXPR)
1865 t = TREE_OPERAND (t, 0);
1867 /* Note whether this expression can trap. */
1868 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1870 base = get_base_address (t);
1871 if (base)
1873 if (DECL_P (base)
1874 && TREE_READONLY (base)
1875 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1876 && !TREE_THIS_VOLATILE (base))
1877 MEM_READONLY_P (ref) = 1;
1879 /* Mark static const strings readonly as well. */
1880 if (TREE_CODE (base) == STRING_CST
1881 && TREE_READONLY (base)
1882 && TREE_STATIC (base))
1883 MEM_READONLY_P (ref) = 1;
1885 /* Address-space information is on the base object. */
1886 if (TREE_CODE (base) == MEM_REF
1887 || TREE_CODE (base) == TARGET_MEM_REF)
1888 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1889 0))));
1890 else
1891 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1894 /* If this expression uses it's parent's alias set, mark it such
1895 that we won't change it. */
1896 if (component_uses_parent_alias_set_from (t) != NULL_TREE)
1897 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1899 /* If this is a decl, set the attributes of the MEM from it. */
1900 if (DECL_P (t))
1902 attrs.expr = t;
1903 attrs.offset_known_p = true;
1904 attrs.offset = 0;
1905 apply_bitpos = bitpos;
1906 new_size = DECL_SIZE_UNIT (t);
1909 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1910 else if (CONSTANT_CLASS_P (t))
1913 /* If this is a field reference, record it. */
1914 else if (TREE_CODE (t) == COMPONENT_REF)
1916 attrs.expr = t;
1917 attrs.offset_known_p = true;
1918 attrs.offset = 0;
1919 apply_bitpos = bitpos;
1920 if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1921 new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
1924 /* If this is an array reference, look for an outer field reference. */
1925 else if (TREE_CODE (t) == ARRAY_REF)
1927 tree off_tree = size_zero_node;
1928 /* We can't modify t, because we use it at the end of the
1929 function. */
1930 tree t2 = t;
1934 tree index = TREE_OPERAND (t2, 1);
1935 tree low_bound = array_ref_low_bound (t2);
1936 tree unit_size = array_ref_element_size (t2);
1938 /* We assume all arrays have sizes that are a multiple of a byte.
1939 First subtract the lower bound, if any, in the type of the
1940 index, then convert to sizetype and multiply by the size of
1941 the array element. */
1942 if (! integer_zerop (low_bound))
1943 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1944 index, low_bound);
1946 off_tree = size_binop (PLUS_EXPR,
1947 size_binop (MULT_EXPR,
1948 fold_convert (sizetype,
1949 index),
1950 unit_size),
1951 off_tree);
1952 t2 = TREE_OPERAND (t2, 0);
1954 while (TREE_CODE (t2) == ARRAY_REF);
1956 if (DECL_P (t2)
1957 || (TREE_CODE (t2) == COMPONENT_REF
1958 /* For trailing arrays t2 doesn't have a size that
1959 covers all valid accesses. */
1960 && ! array_at_struct_end_p (t)))
1962 attrs.expr = t2;
1963 attrs.offset_known_p = false;
1964 if (tree_fits_uhwi_p (off_tree))
1966 attrs.offset_known_p = true;
1967 attrs.offset = tree_to_uhwi (off_tree);
1968 apply_bitpos = bitpos;
1971 /* Else do not record a MEM_EXPR. */
1974 /* If this is an indirect reference, record it. */
1975 else if (TREE_CODE (t) == MEM_REF
1976 || TREE_CODE (t) == TARGET_MEM_REF)
1978 attrs.expr = t;
1979 attrs.offset_known_p = true;
1980 attrs.offset = 0;
1981 apply_bitpos = bitpos;
1984 /* Compute the alignment. */
1985 unsigned int obj_align;
1986 unsigned HOST_WIDE_INT obj_bitpos;
1987 get_object_alignment_1 (t, &obj_align, &obj_bitpos);
1988 obj_bitpos = (obj_bitpos - bitpos) & (obj_align - 1);
1989 if (obj_bitpos != 0)
1990 obj_align = least_bit_hwi (obj_bitpos);
1991 attrs.align = MAX (attrs.align, obj_align);
1994 if (tree_fits_uhwi_p (new_size))
1996 attrs.size_known_p = true;
1997 attrs.size = tree_to_uhwi (new_size);
2000 /* If we modified OFFSET based on T, then subtract the outstanding
2001 bit position offset. Similarly, increase the size of the accessed
2002 object to contain the negative offset. */
2003 if (apply_bitpos)
2005 gcc_assert (attrs.offset_known_p);
2006 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
2007 if (attrs.size_known_p)
2008 attrs.size += apply_bitpos / BITS_PER_UNIT;
2011 /* Now set the attributes we computed above. */
2012 attrs.addrspace = as;
2013 set_mem_attrs (ref, &attrs);
2016 void
2017 set_mem_attributes (rtx ref, tree t, int objectp)
2019 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2022 /* Set the alias set of MEM to SET. */
2024 void
2025 set_mem_alias_set (rtx mem, alias_set_type set)
2027 struct mem_attrs attrs;
2029 /* If the new and old alias sets don't conflict, something is wrong. */
2030 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2031 attrs = *get_mem_attrs (mem);
2032 attrs.alias = set;
2033 set_mem_attrs (mem, &attrs);
2036 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2038 void
2039 set_mem_addr_space (rtx mem, addr_space_t addrspace)
2041 struct mem_attrs attrs;
2043 attrs = *get_mem_attrs (mem);
2044 attrs.addrspace = addrspace;
2045 set_mem_attrs (mem, &attrs);
2048 /* Set the alignment of MEM to ALIGN bits. */
2050 void
2051 set_mem_align (rtx mem, unsigned int align)
2053 struct mem_attrs attrs;
2055 attrs = *get_mem_attrs (mem);
2056 attrs.align = align;
2057 set_mem_attrs (mem, &attrs);
2060 /* Set the expr for MEM to EXPR. */
2062 void
2063 set_mem_expr (rtx mem, tree expr)
2065 struct mem_attrs attrs;
2067 attrs = *get_mem_attrs (mem);
2068 attrs.expr = expr;
2069 set_mem_attrs (mem, &attrs);
2072 /* Set the offset of MEM to OFFSET. */
2074 void
2075 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
2077 struct mem_attrs attrs;
2079 attrs = *get_mem_attrs (mem);
2080 attrs.offset_known_p = true;
2081 attrs.offset = offset;
2082 set_mem_attrs (mem, &attrs);
2085 /* Clear the offset of MEM. */
2087 void
2088 clear_mem_offset (rtx mem)
2090 struct mem_attrs attrs;
2092 attrs = *get_mem_attrs (mem);
2093 attrs.offset_known_p = false;
2094 set_mem_attrs (mem, &attrs);
2097 /* Set the size of MEM to SIZE. */
2099 void
2100 set_mem_size (rtx mem, HOST_WIDE_INT size)
2102 struct mem_attrs attrs;
2104 attrs = *get_mem_attrs (mem);
2105 attrs.size_known_p = true;
2106 attrs.size = size;
2107 set_mem_attrs (mem, &attrs);
2110 /* Clear the size of MEM. */
2112 void
2113 clear_mem_size (rtx mem)
2115 struct mem_attrs attrs;
2117 attrs = *get_mem_attrs (mem);
2118 attrs.size_known_p = false;
2119 set_mem_attrs (mem, &attrs);
2122 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2123 and its address changed to ADDR. (VOIDmode means don't change the mode.
2124 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2125 returned memory location is required to be valid. INPLACE is true if any
2126 changes can be made directly to MEMREF or false if MEMREF must be treated
2127 as immutable.
2129 The memory attributes are not changed. */
2131 static rtx
2132 change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2133 bool inplace)
2135 addr_space_t as;
2136 rtx new_rtx;
2138 gcc_assert (MEM_P (memref));
2139 as = MEM_ADDR_SPACE (memref);
2140 if (mode == VOIDmode)
2141 mode = GET_MODE (memref);
2142 if (addr == 0)
2143 addr = XEXP (memref, 0);
2144 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2145 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2146 return memref;
2148 /* Don't validate address for LRA. LRA can make the address valid
2149 by itself in most efficient way. */
2150 if (validate && !lra_in_progress)
2152 if (reload_in_progress || reload_completed)
2153 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2154 else
2155 addr = memory_address_addr_space (mode, addr, as);
2158 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2159 return memref;
2161 if (inplace)
2163 XEXP (memref, 0) = addr;
2164 return memref;
2167 new_rtx = gen_rtx_MEM (mode, addr);
2168 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2169 return new_rtx;
2172 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2173 way we are changing MEMREF, so we only preserve the alias set. */
2176 change_address (rtx memref, machine_mode mode, rtx addr)
2178 rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2179 machine_mode mmode = GET_MODE (new_rtx);
2180 struct mem_attrs attrs, *defattrs;
2182 attrs = *get_mem_attrs (memref);
2183 defattrs = mode_mem_attrs[(int) mmode];
2184 attrs.expr = NULL_TREE;
2185 attrs.offset_known_p = false;
2186 attrs.size_known_p = defattrs->size_known_p;
2187 attrs.size = defattrs->size;
2188 attrs.align = defattrs->align;
2190 /* If there are no changes, just return the original memory reference. */
2191 if (new_rtx == memref)
2193 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2194 return new_rtx;
2196 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2197 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2200 set_mem_attrs (new_rtx, &attrs);
2201 return new_rtx;
2204 /* Return a memory reference like MEMREF, but with its mode changed
2205 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2206 nonzero, the memory address is forced to be valid.
2207 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2208 and the caller is responsible for adjusting MEMREF base register.
2209 If ADJUST_OBJECT is zero, the underlying object associated with the
2210 memory reference is left unchanged and the caller is responsible for
2211 dealing with it. Otherwise, if the new memory reference is outside
2212 the underlying object, even partially, then the object is dropped.
2213 SIZE, if nonzero, is the size of an access in cases where MODE
2214 has no inherent size. */
2217 adjust_address_1 (rtx memref, machine_mode mode, HOST_WIDE_INT offset,
2218 int validate, int adjust_address, int adjust_object,
2219 HOST_WIDE_INT size)
2221 rtx addr = XEXP (memref, 0);
2222 rtx new_rtx;
2223 machine_mode address_mode;
2224 int pbits;
2225 struct mem_attrs attrs = *get_mem_attrs (memref), *defattrs;
2226 unsigned HOST_WIDE_INT max_align;
2227 #ifdef POINTERS_EXTEND_UNSIGNED
2228 machine_mode pointer_mode
2229 = targetm.addr_space.pointer_mode (attrs.addrspace);
2230 #endif
2232 /* VOIDmode means no mode change for change_address_1. */
2233 if (mode == VOIDmode)
2234 mode = GET_MODE (memref);
2236 /* Take the size of non-BLKmode accesses from the mode. */
2237 defattrs = mode_mem_attrs[(int) mode];
2238 if (defattrs->size_known_p)
2239 size = defattrs->size;
2241 /* If there are no changes, just return the original memory reference. */
2242 if (mode == GET_MODE (memref) && !offset
2243 && (size == 0 || (attrs.size_known_p && attrs.size == size))
2244 && (!validate || memory_address_addr_space_p (mode, addr,
2245 attrs.addrspace)))
2246 return memref;
2248 /* ??? Prefer to create garbage instead of creating shared rtl.
2249 This may happen even if offset is nonzero -- consider
2250 (plus (plus reg reg) const_int) -- so do this always. */
2251 addr = copy_rtx (addr);
2253 /* Convert a possibly large offset to a signed value within the
2254 range of the target address space. */
2255 address_mode = get_address_mode (memref);
2256 pbits = GET_MODE_BITSIZE (address_mode);
2257 if (HOST_BITS_PER_WIDE_INT > pbits)
2259 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2260 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2261 >> shift);
2264 if (adjust_address)
2266 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2267 object, we can merge it into the LO_SUM. */
2268 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2269 && offset >= 0
2270 && (unsigned HOST_WIDE_INT) offset
2271 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2272 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2273 plus_constant (address_mode,
2274 XEXP (addr, 1), offset));
2275 #ifdef POINTERS_EXTEND_UNSIGNED
2276 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2277 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2278 the fact that pointers are not allowed to overflow. */
2279 else if (POINTERS_EXTEND_UNSIGNED > 0
2280 && GET_CODE (addr) == ZERO_EXTEND
2281 && GET_MODE (XEXP (addr, 0)) == pointer_mode
2282 && trunc_int_for_mode (offset, pointer_mode) == offset)
2283 addr = gen_rtx_ZERO_EXTEND (address_mode,
2284 plus_constant (pointer_mode,
2285 XEXP (addr, 0), offset));
2286 #endif
2287 else
2288 addr = plus_constant (address_mode, addr, offset);
2291 new_rtx = change_address_1 (memref, mode, addr, validate, false);
2293 /* If the address is a REG, change_address_1 rightfully returns memref,
2294 but this would destroy memref's MEM_ATTRS. */
2295 if (new_rtx == memref && offset != 0)
2296 new_rtx = copy_rtx (new_rtx);
2298 /* Conservatively drop the object if we don't know where we start from. */
2299 if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2301 attrs.expr = NULL_TREE;
2302 attrs.alias = 0;
2305 /* Compute the new values of the memory attributes due to this adjustment.
2306 We add the offsets and update the alignment. */
2307 if (attrs.offset_known_p)
2309 attrs.offset += offset;
2311 /* Drop the object if the new left end is not within its bounds. */
2312 if (adjust_object && attrs.offset < 0)
2314 attrs.expr = NULL_TREE;
2315 attrs.alias = 0;
2319 /* Compute the new alignment by taking the MIN of the alignment and the
2320 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2321 if zero. */
2322 if (offset != 0)
2324 max_align = least_bit_hwi (offset) * BITS_PER_UNIT;
2325 attrs.align = MIN (attrs.align, max_align);
2328 if (size)
2330 /* Drop the object if the new right end is not within its bounds. */
2331 if (adjust_object && (offset + size) > attrs.size)
2333 attrs.expr = NULL_TREE;
2334 attrs.alias = 0;
2336 attrs.size_known_p = true;
2337 attrs.size = size;
2339 else if (attrs.size_known_p)
2341 gcc_assert (!adjust_object);
2342 attrs.size -= offset;
2343 /* ??? The store_by_pieces machinery generates negative sizes,
2344 so don't assert for that here. */
2347 set_mem_attrs (new_rtx, &attrs);
2349 return new_rtx;
2352 /* Return a memory reference like MEMREF, but with its mode changed
2353 to MODE and its address changed to ADDR, which is assumed to be
2354 MEMREF offset by OFFSET bytes. If VALIDATE is
2355 nonzero, the memory address is forced to be valid. */
2358 adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2359 HOST_WIDE_INT offset, int validate)
2361 memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2362 return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2365 /* Return a memory reference like MEMREF, but whose address is changed by
2366 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2367 known to be in OFFSET (possibly 1). */
2370 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2372 rtx new_rtx, addr = XEXP (memref, 0);
2373 machine_mode address_mode;
2374 struct mem_attrs attrs, *defattrs;
2376 attrs = *get_mem_attrs (memref);
2377 address_mode = get_address_mode (memref);
2378 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2380 /* At this point we don't know _why_ the address is invalid. It
2381 could have secondary memory references, multiplies or anything.
2383 However, if we did go and rearrange things, we can wind up not
2384 being able to recognize the magic around pic_offset_table_rtx.
2385 This stuff is fragile, and is yet another example of why it is
2386 bad to expose PIC machinery too early. */
2387 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2388 attrs.addrspace)
2389 && GET_CODE (addr) == PLUS
2390 && XEXP (addr, 0) == pic_offset_table_rtx)
2392 addr = force_reg (GET_MODE (addr), addr);
2393 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2396 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2397 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2399 /* If there are no changes, just return the original memory reference. */
2400 if (new_rtx == memref)
2401 return new_rtx;
2403 /* Update the alignment to reflect the offset. Reset the offset, which
2404 we don't know. */
2405 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2406 attrs.offset_known_p = false;
2407 attrs.size_known_p = defattrs->size_known_p;
2408 attrs.size = defattrs->size;
2409 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2410 set_mem_attrs (new_rtx, &attrs);
2411 return new_rtx;
2414 /* Return a memory reference like MEMREF, but with its address changed to
2415 ADDR. The caller is asserting that the actual piece of memory pointed
2416 to is the same, just the form of the address is being changed, such as
2417 by putting something into a register. INPLACE is true if any changes
2418 can be made directly to MEMREF or false if MEMREF must be treated as
2419 immutable. */
2422 replace_equiv_address (rtx memref, rtx addr, bool inplace)
2424 /* change_address_1 copies the memory attribute structure without change
2425 and that's exactly what we want here. */
2426 update_temp_slot_address (XEXP (memref, 0), addr);
2427 return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2430 /* Likewise, but the reference is not required to be valid. */
2433 replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2435 return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2438 /* Return a memory reference like MEMREF, but with its mode widened to
2439 MODE and offset by OFFSET. This would be used by targets that e.g.
2440 cannot issue QImode memory operations and have to use SImode memory
2441 operations plus masking logic. */
2444 widen_memory_access (rtx memref, machine_mode mode, HOST_WIDE_INT offset)
2446 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2447 struct mem_attrs attrs;
2448 unsigned int size = GET_MODE_SIZE (mode);
2450 /* If there are no changes, just return the original memory reference. */
2451 if (new_rtx == memref)
2452 return new_rtx;
2454 attrs = *get_mem_attrs (new_rtx);
2456 /* If we don't know what offset we were at within the expression, then
2457 we can't know if we've overstepped the bounds. */
2458 if (! attrs.offset_known_p)
2459 attrs.expr = NULL_TREE;
2461 while (attrs.expr)
2463 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2465 tree field = TREE_OPERAND (attrs.expr, 1);
2466 tree offset = component_ref_field_offset (attrs.expr);
2468 if (! DECL_SIZE_UNIT (field))
2470 attrs.expr = NULL_TREE;
2471 break;
2474 /* Is the field at least as large as the access? If so, ok,
2475 otherwise strip back to the containing structure. */
2476 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2477 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2478 && attrs.offset >= 0)
2479 break;
2481 if (! tree_fits_uhwi_p (offset))
2483 attrs.expr = NULL_TREE;
2484 break;
2487 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2488 attrs.offset += tree_to_uhwi (offset);
2489 attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2490 / BITS_PER_UNIT);
2492 /* Similarly for the decl. */
2493 else if (DECL_P (attrs.expr)
2494 && DECL_SIZE_UNIT (attrs.expr)
2495 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2496 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2497 && (! attrs.offset_known_p || attrs.offset >= 0))
2498 break;
2499 else
2501 /* The widened memory access overflows the expression, which means
2502 that it could alias another expression. Zap it. */
2503 attrs.expr = NULL_TREE;
2504 break;
2508 if (! attrs.expr)
2509 attrs.offset_known_p = false;
2511 /* The widened memory may alias other stuff, so zap the alias set. */
2512 /* ??? Maybe use get_alias_set on any remaining expression. */
2513 attrs.alias = 0;
2514 attrs.size_known_p = true;
2515 attrs.size = size;
2516 set_mem_attrs (new_rtx, &attrs);
2517 return new_rtx;
2520 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2521 static GTY(()) tree spill_slot_decl;
2523 tree
2524 get_spill_slot_decl (bool force_build_p)
2526 tree d = spill_slot_decl;
2527 rtx rd;
2528 struct mem_attrs attrs;
2530 if (d || !force_build_p)
2531 return d;
2533 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2534 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2535 DECL_ARTIFICIAL (d) = 1;
2536 DECL_IGNORED_P (d) = 1;
2537 TREE_USED (d) = 1;
2538 spill_slot_decl = d;
2540 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2541 MEM_NOTRAP_P (rd) = 1;
2542 attrs = *mode_mem_attrs[(int) BLKmode];
2543 attrs.alias = new_alias_set ();
2544 attrs.expr = d;
2545 set_mem_attrs (rd, &attrs);
2546 SET_DECL_RTL (d, rd);
2548 return d;
2551 /* Given MEM, a result from assign_stack_local, fill in the memory
2552 attributes as appropriate for a register allocator spill slot.
2553 These slots are not aliasable by other memory. We arrange for
2554 them all to use a single MEM_EXPR, so that the aliasing code can
2555 work properly in the case of shared spill slots. */
2557 void
2558 set_mem_attrs_for_spill (rtx mem)
2560 struct mem_attrs attrs;
2561 rtx addr;
2563 attrs = *get_mem_attrs (mem);
2564 attrs.expr = get_spill_slot_decl (true);
2565 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2566 attrs.addrspace = ADDR_SPACE_GENERIC;
2568 /* We expect the incoming memory to be of the form:
2569 (mem:MODE (plus (reg sfp) (const_int offset)))
2570 with perhaps the plus missing for offset = 0. */
2571 addr = XEXP (mem, 0);
2572 attrs.offset_known_p = true;
2573 attrs.offset = 0;
2574 if (GET_CODE (addr) == PLUS
2575 && CONST_INT_P (XEXP (addr, 1)))
2576 attrs.offset = INTVAL (XEXP (addr, 1));
2578 set_mem_attrs (mem, &attrs);
2579 MEM_NOTRAP_P (mem) = 1;
2582 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2584 rtx_code_label *
2585 gen_label_rtx (void)
2587 return as_a <rtx_code_label *> (
2588 gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2589 NULL, label_num++, NULL));
2592 /* For procedure integration. */
2594 /* Install new pointers to the first and last insns in the chain.
2595 Also, set cur_insn_uid to one higher than the last in use.
2596 Used for an inline-procedure after copying the insn chain. */
2598 void
2599 set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2601 rtx_insn *insn;
2603 set_first_insn (first);
2604 set_last_insn (last);
2605 cur_insn_uid = 0;
2607 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2609 int debug_count = 0;
2611 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2612 cur_debug_insn_uid = 0;
2614 for (insn = first; insn; insn = NEXT_INSN (insn))
2615 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2616 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2617 else
2619 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2620 if (DEBUG_INSN_P (insn))
2621 debug_count++;
2624 if (debug_count)
2625 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2626 else
2627 cur_debug_insn_uid++;
2629 else
2630 for (insn = first; insn; insn = NEXT_INSN (insn))
2631 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2633 cur_insn_uid++;
2636 /* Go through all the RTL insn bodies and copy any invalid shared
2637 structure. This routine should only be called once. */
2639 static void
2640 unshare_all_rtl_1 (rtx_insn *insn)
2642 /* Unshare just about everything else. */
2643 unshare_all_rtl_in_chain (insn);
2645 /* Make sure the addresses of stack slots found outside the insn chain
2646 (such as, in DECL_RTL of a variable) are not shared
2647 with the insn chain.
2649 This special care is necessary when the stack slot MEM does not
2650 actually appear in the insn chain. If it does appear, its address
2651 is unshared from all else at that point. */
2652 unsigned int i;
2653 rtx temp;
2654 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2655 (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2658 /* Go through all the RTL insn bodies and copy any invalid shared
2659 structure, again. This is a fairly expensive thing to do so it
2660 should be done sparingly. */
2662 void
2663 unshare_all_rtl_again (rtx_insn *insn)
2665 rtx_insn *p;
2666 tree decl;
2668 for (p = insn; p; p = NEXT_INSN (p))
2669 if (INSN_P (p))
2671 reset_used_flags (PATTERN (p));
2672 reset_used_flags (REG_NOTES (p));
2673 if (CALL_P (p))
2674 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2677 /* Make sure that virtual stack slots are not shared. */
2678 set_used_decls (DECL_INITIAL (cfun->decl));
2680 /* Make sure that virtual parameters are not shared. */
2681 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2682 set_used_flags (DECL_RTL (decl));
2684 rtx temp;
2685 unsigned int i;
2686 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2687 reset_used_flags (temp);
2689 unshare_all_rtl_1 (insn);
2692 unsigned int
2693 unshare_all_rtl (void)
2695 unshare_all_rtl_1 (get_insns ());
2697 for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2699 if (DECL_RTL_SET_P (decl))
2700 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2701 DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2704 return 0;
2708 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2709 Recursively does the same for subexpressions. */
2711 static void
2712 verify_rtx_sharing (rtx orig, rtx insn)
2714 rtx x = orig;
2715 int i;
2716 enum rtx_code code;
2717 const char *format_ptr;
2719 if (x == 0)
2720 return;
2722 code = GET_CODE (x);
2724 /* These types may be freely shared. */
2726 switch (code)
2728 case REG:
2729 case DEBUG_EXPR:
2730 case VALUE:
2731 CASE_CONST_ANY:
2732 case SYMBOL_REF:
2733 case LABEL_REF:
2734 case CODE_LABEL:
2735 case PC:
2736 case CC0:
2737 case RETURN:
2738 case SIMPLE_RETURN:
2739 case SCRATCH:
2740 /* SCRATCH must be shared because they represent distinct values. */
2741 return;
2742 case CLOBBER:
2743 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2744 clobbers or clobbers of hard registers that originated as pseudos.
2745 This is needed to allow safe register renaming. */
2746 if (REG_P (XEXP (x, 0))
2747 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
2748 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
2749 return;
2750 break;
2752 case CONST:
2753 if (shared_const_p (orig))
2754 return;
2755 break;
2757 case MEM:
2758 /* A MEM is allowed to be shared if its address is constant. */
2759 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2760 || reload_completed || reload_in_progress)
2761 return;
2763 break;
2765 default:
2766 break;
2769 /* This rtx may not be shared. If it has already been seen,
2770 replace it with a copy of itself. */
2771 if (flag_checking && RTX_FLAG (x, used))
2773 error ("invalid rtl sharing found in the insn");
2774 debug_rtx (insn);
2775 error ("shared rtx");
2776 debug_rtx (x);
2777 internal_error ("internal consistency failure");
2779 gcc_assert (!RTX_FLAG (x, used));
2781 RTX_FLAG (x, used) = 1;
2783 /* Now scan the subexpressions recursively. */
2785 format_ptr = GET_RTX_FORMAT (code);
2787 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2789 switch (*format_ptr++)
2791 case 'e':
2792 verify_rtx_sharing (XEXP (x, i), insn);
2793 break;
2795 case 'E':
2796 if (XVEC (x, i) != NULL)
2798 int j;
2799 int len = XVECLEN (x, i);
2801 for (j = 0; j < len; j++)
2803 /* We allow sharing of ASM_OPERANDS inside single
2804 instruction. */
2805 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2806 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2807 == ASM_OPERANDS))
2808 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2809 else
2810 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2813 break;
2816 return;
2819 /* Reset used-flags for INSN. */
2821 static void
2822 reset_insn_used_flags (rtx insn)
2824 gcc_assert (INSN_P (insn));
2825 reset_used_flags (PATTERN (insn));
2826 reset_used_flags (REG_NOTES (insn));
2827 if (CALL_P (insn))
2828 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
2831 /* Go through all the RTL insn bodies and clear all the USED bits. */
2833 static void
2834 reset_all_used_flags (void)
2836 rtx_insn *p;
2838 for (p = get_insns (); p; p = NEXT_INSN (p))
2839 if (INSN_P (p))
2841 rtx pat = PATTERN (p);
2842 if (GET_CODE (pat) != SEQUENCE)
2843 reset_insn_used_flags (p);
2844 else
2846 gcc_assert (REG_NOTES (p) == NULL);
2847 for (int i = 0; i < XVECLEN (pat, 0); i++)
2849 rtx insn = XVECEXP (pat, 0, i);
2850 if (INSN_P (insn))
2851 reset_insn_used_flags (insn);
2857 /* Verify sharing in INSN. */
2859 static void
2860 verify_insn_sharing (rtx insn)
2862 gcc_assert (INSN_P (insn));
2863 verify_rtx_sharing (PATTERN (insn), insn);
2864 verify_rtx_sharing (REG_NOTES (insn), insn);
2865 if (CALL_P (insn))
2866 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
2869 /* Go through all the RTL insn bodies and check that there is no unexpected
2870 sharing in between the subexpressions. */
2872 DEBUG_FUNCTION void
2873 verify_rtl_sharing (void)
2875 rtx_insn *p;
2877 timevar_push (TV_VERIFY_RTL_SHARING);
2879 reset_all_used_flags ();
2881 for (p = get_insns (); p; p = NEXT_INSN (p))
2882 if (INSN_P (p))
2884 rtx pat = PATTERN (p);
2885 if (GET_CODE (pat) != SEQUENCE)
2886 verify_insn_sharing (p);
2887 else
2888 for (int i = 0; i < XVECLEN (pat, 0); i++)
2890 rtx insn = XVECEXP (pat, 0, i);
2891 if (INSN_P (insn))
2892 verify_insn_sharing (insn);
2896 reset_all_used_flags ();
2898 timevar_pop (TV_VERIFY_RTL_SHARING);
2901 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2902 Assumes the mark bits are cleared at entry. */
2904 void
2905 unshare_all_rtl_in_chain (rtx_insn *insn)
2907 for (; insn; insn = NEXT_INSN (insn))
2908 if (INSN_P (insn))
2910 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2911 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2912 if (CALL_P (insn))
2913 CALL_INSN_FUNCTION_USAGE (insn)
2914 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2918 /* Go through all virtual stack slots of a function and mark them as
2919 shared. We never replace the DECL_RTLs themselves with a copy,
2920 but expressions mentioned into a DECL_RTL cannot be shared with
2921 expressions in the instruction stream.
2923 Note that reload may convert pseudo registers into memories in-place.
2924 Pseudo registers are always shared, but MEMs never are. Thus if we
2925 reset the used flags on MEMs in the instruction stream, we must set
2926 them again on MEMs that appear in DECL_RTLs. */
2928 static void
2929 set_used_decls (tree blk)
2931 tree t;
2933 /* Mark decls. */
2934 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2935 if (DECL_RTL_SET_P (t))
2936 set_used_flags (DECL_RTL (t));
2938 /* Now process sub-blocks. */
2939 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2940 set_used_decls (t);
2943 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2944 Recursively does the same for subexpressions. Uses
2945 copy_rtx_if_shared_1 to reduce stack space. */
2948 copy_rtx_if_shared (rtx orig)
2950 copy_rtx_if_shared_1 (&orig);
2951 return orig;
2954 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2955 use. Recursively does the same for subexpressions. */
2957 static void
2958 copy_rtx_if_shared_1 (rtx *orig1)
2960 rtx x;
2961 int i;
2962 enum rtx_code code;
2963 rtx *last_ptr;
2964 const char *format_ptr;
2965 int copied = 0;
2966 int length;
2968 /* Repeat is used to turn tail-recursion into iteration. */
2969 repeat:
2970 x = *orig1;
2972 if (x == 0)
2973 return;
2975 code = GET_CODE (x);
2977 /* These types may be freely shared. */
2979 switch (code)
2981 case REG:
2982 case DEBUG_EXPR:
2983 case VALUE:
2984 CASE_CONST_ANY:
2985 case SYMBOL_REF:
2986 case LABEL_REF:
2987 case CODE_LABEL:
2988 case PC:
2989 case CC0:
2990 case RETURN:
2991 case SIMPLE_RETURN:
2992 case SCRATCH:
2993 /* SCRATCH must be shared because they represent distinct values. */
2994 return;
2995 case CLOBBER:
2996 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2997 clobbers or clobbers of hard registers that originated as pseudos.
2998 This is needed to allow safe register renaming. */
2999 if (REG_P (XEXP (x, 0))
3000 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3001 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3002 return;
3003 break;
3005 case CONST:
3006 if (shared_const_p (x))
3007 return;
3008 break;
3010 case DEBUG_INSN:
3011 case INSN:
3012 case JUMP_INSN:
3013 case CALL_INSN:
3014 case NOTE:
3015 case BARRIER:
3016 /* The chain of insns is not being copied. */
3017 return;
3019 default:
3020 break;
3023 /* This rtx may not be shared. If it has already been seen,
3024 replace it with a copy of itself. */
3026 if (RTX_FLAG (x, used))
3028 x = shallow_copy_rtx (x);
3029 copied = 1;
3031 RTX_FLAG (x, used) = 1;
3033 /* Now scan the subexpressions recursively.
3034 We can store any replaced subexpressions directly into X
3035 since we know X is not shared! Any vectors in X
3036 must be copied if X was copied. */
3038 format_ptr = GET_RTX_FORMAT (code);
3039 length = GET_RTX_LENGTH (code);
3040 last_ptr = NULL;
3042 for (i = 0; i < length; i++)
3044 switch (*format_ptr++)
3046 case 'e':
3047 if (last_ptr)
3048 copy_rtx_if_shared_1 (last_ptr);
3049 last_ptr = &XEXP (x, i);
3050 break;
3052 case 'E':
3053 if (XVEC (x, i) != NULL)
3055 int j;
3056 int len = XVECLEN (x, i);
3058 /* Copy the vector iff I copied the rtx and the length
3059 is nonzero. */
3060 if (copied && len > 0)
3061 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3063 /* Call recursively on all inside the vector. */
3064 for (j = 0; j < len; j++)
3066 if (last_ptr)
3067 copy_rtx_if_shared_1 (last_ptr);
3068 last_ptr = &XVECEXP (x, i, j);
3071 break;
3074 *orig1 = x;
3075 if (last_ptr)
3077 orig1 = last_ptr;
3078 goto repeat;
3080 return;
3083 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3085 static void
3086 mark_used_flags (rtx x, int flag)
3088 int i, j;
3089 enum rtx_code code;
3090 const char *format_ptr;
3091 int length;
3093 /* Repeat is used to turn tail-recursion into iteration. */
3094 repeat:
3095 if (x == 0)
3096 return;
3098 code = GET_CODE (x);
3100 /* These types may be freely shared so we needn't do any resetting
3101 for them. */
3103 switch (code)
3105 case REG:
3106 case DEBUG_EXPR:
3107 case VALUE:
3108 CASE_CONST_ANY:
3109 case SYMBOL_REF:
3110 case CODE_LABEL:
3111 case PC:
3112 case CC0:
3113 case RETURN:
3114 case SIMPLE_RETURN:
3115 return;
3117 case DEBUG_INSN:
3118 case INSN:
3119 case JUMP_INSN:
3120 case CALL_INSN:
3121 case NOTE:
3122 case LABEL_REF:
3123 case BARRIER:
3124 /* The chain of insns is not being copied. */
3125 return;
3127 default:
3128 break;
3131 RTX_FLAG (x, used) = flag;
3133 format_ptr = GET_RTX_FORMAT (code);
3134 length = GET_RTX_LENGTH (code);
3136 for (i = 0; i < length; i++)
3138 switch (*format_ptr++)
3140 case 'e':
3141 if (i == length-1)
3143 x = XEXP (x, i);
3144 goto repeat;
3146 mark_used_flags (XEXP (x, i), flag);
3147 break;
3149 case 'E':
3150 for (j = 0; j < XVECLEN (x, i); j++)
3151 mark_used_flags (XVECEXP (x, i, j), flag);
3152 break;
3157 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3158 to look for shared sub-parts. */
3160 void
3161 reset_used_flags (rtx x)
3163 mark_used_flags (x, 0);
3166 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3167 to look for shared sub-parts. */
3169 void
3170 set_used_flags (rtx x)
3172 mark_used_flags (x, 1);
3175 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3176 Return X or the rtx for the pseudo reg the value of X was copied into.
3177 OTHER must be valid as a SET_DEST. */
3180 make_safe_from (rtx x, rtx other)
3182 while (1)
3183 switch (GET_CODE (other))
3185 case SUBREG:
3186 other = SUBREG_REG (other);
3187 break;
3188 case STRICT_LOW_PART:
3189 case SIGN_EXTEND:
3190 case ZERO_EXTEND:
3191 other = XEXP (other, 0);
3192 break;
3193 default:
3194 goto done;
3196 done:
3197 if ((MEM_P (other)
3198 && ! CONSTANT_P (x)
3199 && !REG_P (x)
3200 && GET_CODE (x) != SUBREG)
3201 || (REG_P (other)
3202 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3203 || reg_mentioned_p (other, x))))
3205 rtx temp = gen_reg_rtx (GET_MODE (x));
3206 emit_move_insn (temp, x);
3207 return temp;
3209 return x;
3212 /* Emission of insns (adding them to the doubly-linked list). */
3214 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3216 rtx_insn *
3217 get_last_insn_anywhere (void)
3219 struct sequence_stack *seq;
3220 for (seq = get_current_sequence (); seq; seq = seq->next)
3221 if (seq->last != 0)
3222 return seq->last;
3223 return 0;
3226 /* Return the first nonnote insn emitted in current sequence or current
3227 function. This routine looks inside SEQUENCEs. */
3229 rtx_insn *
3230 get_first_nonnote_insn (void)
3232 rtx_insn *insn = get_insns ();
3234 if (insn)
3236 if (NOTE_P (insn))
3237 for (insn = next_insn (insn);
3238 insn && NOTE_P (insn);
3239 insn = next_insn (insn))
3240 continue;
3241 else
3243 if (NONJUMP_INSN_P (insn)
3244 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3245 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3249 return insn;
3252 /* Return the last nonnote insn emitted in current sequence or current
3253 function. This routine looks inside SEQUENCEs. */
3255 rtx_insn *
3256 get_last_nonnote_insn (void)
3258 rtx_insn *insn = get_last_insn ();
3260 if (insn)
3262 if (NOTE_P (insn))
3263 for (insn = previous_insn (insn);
3264 insn && NOTE_P (insn);
3265 insn = previous_insn (insn))
3266 continue;
3267 else
3269 if (NONJUMP_INSN_P (insn))
3270 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3271 insn = seq->insn (seq->len () - 1);
3275 return insn;
3278 /* Return the number of actual (non-debug) insns emitted in this
3279 function. */
3282 get_max_insn_count (void)
3284 int n = cur_insn_uid;
3286 /* The table size must be stable across -g, to avoid codegen
3287 differences due to debug insns, and not be affected by
3288 -fmin-insn-uid, to avoid excessive table size and to simplify
3289 debugging of -fcompare-debug failures. */
3290 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3291 n -= cur_debug_insn_uid;
3292 else
3293 n -= MIN_NONDEBUG_INSN_UID;
3295 return n;
3299 /* Return the next insn. If it is a SEQUENCE, return the first insn
3300 of the sequence. */
3302 rtx_insn *
3303 next_insn (rtx_insn *insn)
3305 if (insn)
3307 insn = NEXT_INSN (insn);
3308 if (insn && NONJUMP_INSN_P (insn)
3309 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3310 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3313 return insn;
3316 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3317 of the sequence. */
3319 rtx_insn *
3320 previous_insn (rtx_insn *insn)
3322 if (insn)
3324 insn = PREV_INSN (insn);
3325 if (insn && NONJUMP_INSN_P (insn))
3326 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3327 insn = seq->insn (seq->len () - 1);
3330 return insn;
3333 /* Return the next insn after INSN that is not a NOTE. This routine does not
3334 look inside SEQUENCEs. */
3336 rtx_insn *
3337 next_nonnote_insn (rtx_insn *insn)
3339 while (insn)
3341 insn = NEXT_INSN (insn);
3342 if (insn == 0 || !NOTE_P (insn))
3343 break;
3346 return insn;
3349 /* Return the next insn after INSN that is not a NOTE, but stop the
3350 search before we enter another basic block. This routine does not
3351 look inside SEQUENCEs. */
3353 rtx_insn *
3354 next_nonnote_insn_bb (rtx_insn *insn)
3356 while (insn)
3358 insn = NEXT_INSN (insn);
3359 if (insn == 0 || !NOTE_P (insn))
3360 break;
3361 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3362 return NULL;
3365 return insn;
3368 /* Return the previous insn before INSN that is not a NOTE. This routine does
3369 not look inside SEQUENCEs. */
3371 rtx_insn *
3372 prev_nonnote_insn (rtx_insn *insn)
3374 while (insn)
3376 insn = PREV_INSN (insn);
3377 if (insn == 0 || !NOTE_P (insn))
3378 break;
3381 return insn;
3384 /* Return the previous insn before INSN that is not a NOTE, but stop
3385 the search before we enter another basic block. This routine does
3386 not look inside SEQUENCEs. */
3388 rtx_insn *
3389 prev_nonnote_insn_bb (rtx_insn *insn)
3392 while (insn)
3394 insn = PREV_INSN (insn);
3395 if (insn == 0 || !NOTE_P (insn))
3396 break;
3397 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3398 return NULL;
3401 return insn;
3404 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3405 routine does not look inside SEQUENCEs. */
3407 rtx_insn *
3408 next_nondebug_insn (rtx_insn *insn)
3410 while (insn)
3412 insn = NEXT_INSN (insn);
3413 if (insn == 0 || !DEBUG_INSN_P (insn))
3414 break;
3417 return insn;
3420 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3421 This routine does not look inside SEQUENCEs. */
3423 rtx_insn *
3424 prev_nondebug_insn (rtx_insn *insn)
3426 while (insn)
3428 insn = PREV_INSN (insn);
3429 if (insn == 0 || !DEBUG_INSN_P (insn))
3430 break;
3433 return insn;
3436 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3437 This routine does not look inside SEQUENCEs. */
3439 rtx_insn *
3440 next_nonnote_nondebug_insn (rtx_insn *insn)
3442 while (insn)
3444 insn = NEXT_INSN (insn);
3445 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3446 break;
3449 return insn;
3452 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3453 This routine does not look inside SEQUENCEs. */
3455 rtx_insn *
3456 prev_nonnote_nondebug_insn (rtx_insn *insn)
3458 while (insn)
3460 insn = PREV_INSN (insn);
3461 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3462 break;
3465 return insn;
3468 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3469 or 0, if there is none. This routine does not look inside
3470 SEQUENCEs. */
3472 rtx_insn *
3473 next_real_insn (rtx uncast_insn)
3475 rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3477 while (insn)
3479 insn = NEXT_INSN (insn);
3480 if (insn == 0 || INSN_P (insn))
3481 break;
3484 return insn;
3487 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3488 or 0, if there is none. This routine does not look inside
3489 SEQUENCEs. */
3491 rtx_insn *
3492 prev_real_insn (rtx_insn *insn)
3494 while (insn)
3496 insn = PREV_INSN (insn);
3497 if (insn == 0 || INSN_P (insn))
3498 break;
3501 return insn;
3504 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3505 This routine does not look inside SEQUENCEs. */
3507 rtx_call_insn *
3508 last_call_insn (void)
3510 rtx_insn *insn;
3512 for (insn = get_last_insn ();
3513 insn && !CALL_P (insn);
3514 insn = PREV_INSN (insn))
3517 return safe_as_a <rtx_call_insn *> (insn);
3520 /* Find the next insn after INSN that really does something. This routine
3521 does not look inside SEQUENCEs. After reload this also skips over
3522 standalone USE and CLOBBER insn. */
3525 active_insn_p (const rtx_insn *insn)
3527 return (CALL_P (insn) || JUMP_P (insn)
3528 || JUMP_TABLE_DATA_P (insn) /* FIXME */
3529 || (NONJUMP_INSN_P (insn)
3530 && (! reload_completed
3531 || (GET_CODE (PATTERN (insn)) != USE
3532 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3535 rtx_insn *
3536 next_active_insn (rtx_insn *insn)
3538 while (insn)
3540 insn = NEXT_INSN (insn);
3541 if (insn == 0 || active_insn_p (insn))
3542 break;
3545 return insn;
3548 /* Find the last insn before INSN that really does something. This routine
3549 does not look inside SEQUENCEs. After reload this also skips over
3550 standalone USE and CLOBBER insn. */
3552 rtx_insn *
3553 prev_active_insn (rtx_insn *insn)
3555 while (insn)
3557 insn = PREV_INSN (insn);
3558 if (insn == 0 || active_insn_p (insn))
3559 break;
3562 return insn;
3565 /* Return the next insn that uses CC0 after INSN, which is assumed to
3566 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3567 applied to the result of this function should yield INSN).
3569 Normally, this is simply the next insn. However, if a REG_CC_USER note
3570 is present, it contains the insn that uses CC0.
3572 Return 0 if we can't find the insn. */
3574 rtx_insn *
3575 next_cc0_user (rtx_insn *insn)
3577 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3579 if (note)
3580 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3582 insn = next_nonnote_insn (insn);
3583 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3584 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3586 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3587 return insn;
3589 return 0;
3592 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3593 note, it is the previous insn. */
3595 rtx_insn *
3596 prev_cc0_setter (rtx_insn *insn)
3598 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3600 if (note)
3601 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3603 insn = prev_nonnote_insn (insn);
3604 gcc_assert (sets_cc0_p (PATTERN (insn)));
3606 return insn;
3609 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3611 static int
3612 find_auto_inc (const_rtx x, const_rtx reg)
3614 subrtx_iterator::array_type array;
3615 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3617 const_rtx x = *iter;
3618 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3619 && rtx_equal_p (reg, XEXP (x, 0)))
3620 return true;
3622 return false;
3625 /* Increment the label uses for all labels present in rtx. */
3627 static void
3628 mark_label_nuses (rtx x)
3630 enum rtx_code code;
3631 int i, j;
3632 const char *fmt;
3634 code = GET_CODE (x);
3635 if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3636 LABEL_NUSES (label_ref_label (x))++;
3638 fmt = GET_RTX_FORMAT (code);
3639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3641 if (fmt[i] == 'e')
3642 mark_label_nuses (XEXP (x, i));
3643 else if (fmt[i] == 'E')
3644 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3645 mark_label_nuses (XVECEXP (x, i, j));
3650 /* Try splitting insns that can be split for better scheduling.
3651 PAT is the pattern which might split.
3652 TRIAL is the insn providing PAT.
3653 LAST is nonzero if we should return the last insn of the sequence produced.
3655 If this routine succeeds in splitting, it returns the first or last
3656 replacement insn depending on the value of LAST. Otherwise, it
3657 returns TRIAL. If the insn to be returned can be split, it will be. */
3659 rtx_insn *
3660 try_split (rtx pat, rtx_insn *trial, int last)
3662 rtx_insn *before, *after;
3663 rtx note;
3664 rtx_insn *seq, *tem;
3665 profile_probability probability;
3666 rtx_insn *insn_last, *insn;
3667 int njumps = 0;
3668 rtx_insn *call_insn = NULL;
3670 /* We're not good at redistributing frame information. */
3671 if (RTX_FRAME_RELATED_P (trial))
3672 return trial;
3674 if (any_condjump_p (trial)
3675 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3676 split_branch_probability
3677 = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3678 else
3679 split_branch_probability = profile_probability::uninitialized ();
3681 probability = split_branch_probability;
3683 seq = split_insns (pat, trial);
3685 split_branch_probability = profile_probability::uninitialized ();
3687 if (!seq)
3688 return trial;
3690 /* Avoid infinite loop if any insn of the result matches
3691 the original pattern. */
3692 insn_last = seq;
3693 while (1)
3695 if (INSN_P (insn_last)
3696 && rtx_equal_p (PATTERN (insn_last), pat))
3697 return trial;
3698 if (!NEXT_INSN (insn_last))
3699 break;
3700 insn_last = NEXT_INSN (insn_last);
3703 /* We will be adding the new sequence to the function. The splitters
3704 may have introduced invalid RTL sharing, so unshare the sequence now. */
3705 unshare_all_rtl_in_chain (seq);
3707 /* Mark labels and copy flags. */
3708 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3710 if (JUMP_P (insn))
3712 if (JUMP_P (trial))
3713 CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
3714 mark_jump_label (PATTERN (insn), insn, 0);
3715 njumps++;
3716 if (probability.initialized_p ()
3717 && any_condjump_p (insn)
3718 && !find_reg_note (insn, REG_BR_PROB, 0))
3720 /* We can preserve the REG_BR_PROB notes only if exactly
3721 one jump is created, otherwise the machine description
3722 is responsible for this step using
3723 split_branch_probability variable. */
3724 gcc_assert (njumps == 1);
3725 add_reg_br_prob_note (insn, probability);
3730 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3731 in SEQ and copy any additional information across. */
3732 if (CALL_P (trial))
3734 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3735 if (CALL_P (insn))
3737 rtx_insn *next;
3738 rtx *p;
3740 gcc_assert (call_insn == NULL_RTX);
3741 call_insn = insn;
3743 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3744 target may have explicitly specified. */
3745 p = &CALL_INSN_FUNCTION_USAGE (insn);
3746 while (*p)
3747 p = &XEXP (*p, 1);
3748 *p = CALL_INSN_FUNCTION_USAGE (trial);
3750 /* If the old call was a sibling call, the new one must
3751 be too. */
3752 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3754 /* If the new call is the last instruction in the sequence,
3755 it will effectively replace the old call in-situ. Otherwise
3756 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3757 so that it comes immediately after the new call. */
3758 if (NEXT_INSN (insn))
3759 for (next = NEXT_INSN (trial);
3760 next && NOTE_P (next);
3761 next = NEXT_INSN (next))
3762 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3764 remove_insn (next);
3765 add_insn_after (next, insn, NULL);
3766 break;
3771 /* Copy notes, particularly those related to the CFG. */
3772 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3774 switch (REG_NOTE_KIND (note))
3776 case REG_EH_REGION:
3777 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3778 break;
3780 case REG_NORETURN:
3781 case REG_SETJMP:
3782 case REG_TM:
3783 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3785 if (CALL_P (insn))
3786 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3788 break;
3790 case REG_NON_LOCAL_GOTO:
3791 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3793 if (JUMP_P (insn))
3794 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3796 break;
3798 case REG_INC:
3799 if (!AUTO_INC_DEC)
3800 break;
3802 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3804 rtx reg = XEXP (note, 0);
3805 if (!FIND_REG_INC_NOTE (insn, reg)
3806 && find_auto_inc (PATTERN (insn), reg))
3807 add_reg_note (insn, REG_INC, reg);
3809 break;
3811 case REG_ARGS_SIZE:
3812 fixup_args_size_notes (NULL, insn_last, INTVAL (XEXP (note, 0)));
3813 break;
3815 case REG_CALL_DECL:
3816 gcc_assert (call_insn != NULL_RTX);
3817 add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
3818 break;
3820 default:
3821 break;
3825 /* If there are LABELS inside the split insns increment the
3826 usage count so we don't delete the label. */
3827 if (INSN_P (trial))
3829 insn = insn_last;
3830 while (insn != NULL_RTX)
3832 /* JUMP_P insns have already been "marked" above. */
3833 if (NONJUMP_INSN_P (insn))
3834 mark_label_nuses (PATTERN (insn));
3836 insn = PREV_INSN (insn);
3840 before = PREV_INSN (trial);
3841 after = NEXT_INSN (trial);
3843 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
3845 delete_insn (trial);
3847 /* Recursively call try_split for each new insn created; by the
3848 time control returns here that insn will be fully split, so
3849 set LAST and continue from the insn after the one returned.
3850 We can't use next_active_insn here since AFTER may be a note.
3851 Ignore deleted insns, which can be occur if not optimizing. */
3852 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3853 if (! tem->deleted () && INSN_P (tem))
3854 tem = try_split (PATTERN (tem), tem, 1);
3856 /* Return either the first or the last insn, depending on which was
3857 requested. */
3858 return last
3859 ? (after ? PREV_INSN (after) : get_last_insn ())
3860 : NEXT_INSN (before);
3863 /* Make and return an INSN rtx, initializing all its slots.
3864 Store PATTERN in the pattern slots. */
3866 rtx_insn *
3867 make_insn_raw (rtx pattern)
3869 rtx_insn *insn;
3871 insn = as_a <rtx_insn *> (rtx_alloc (INSN));
3873 INSN_UID (insn) = cur_insn_uid++;
3874 PATTERN (insn) = pattern;
3875 INSN_CODE (insn) = -1;
3876 REG_NOTES (insn) = NULL;
3877 INSN_LOCATION (insn) = curr_insn_location ();
3878 BLOCK_FOR_INSN (insn) = NULL;
3880 #ifdef ENABLE_RTL_CHECKING
3881 if (insn
3882 && INSN_P (insn)
3883 && (returnjump_p (insn)
3884 || (GET_CODE (insn) == SET
3885 && SET_DEST (insn) == pc_rtx)))
3887 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3888 debug_rtx (insn);
3890 #endif
3892 return insn;
3895 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3897 static rtx_insn *
3898 make_debug_insn_raw (rtx pattern)
3900 rtx_debug_insn *insn;
3902 insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
3903 INSN_UID (insn) = cur_debug_insn_uid++;
3904 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3905 INSN_UID (insn) = cur_insn_uid++;
3907 PATTERN (insn) = pattern;
3908 INSN_CODE (insn) = -1;
3909 REG_NOTES (insn) = NULL;
3910 INSN_LOCATION (insn) = curr_insn_location ();
3911 BLOCK_FOR_INSN (insn) = NULL;
3913 return insn;
3916 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3918 static rtx_insn *
3919 make_jump_insn_raw (rtx pattern)
3921 rtx_jump_insn *insn;
3923 insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
3924 INSN_UID (insn) = cur_insn_uid++;
3926 PATTERN (insn) = pattern;
3927 INSN_CODE (insn) = -1;
3928 REG_NOTES (insn) = NULL;
3929 JUMP_LABEL (insn) = NULL;
3930 INSN_LOCATION (insn) = curr_insn_location ();
3931 BLOCK_FOR_INSN (insn) = NULL;
3933 return insn;
3936 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3938 static rtx_insn *
3939 make_call_insn_raw (rtx pattern)
3941 rtx_call_insn *insn;
3943 insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
3944 INSN_UID (insn) = cur_insn_uid++;
3946 PATTERN (insn) = pattern;
3947 INSN_CODE (insn) = -1;
3948 REG_NOTES (insn) = NULL;
3949 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3950 INSN_LOCATION (insn) = curr_insn_location ();
3951 BLOCK_FOR_INSN (insn) = NULL;
3953 return insn;
3956 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3958 static rtx_note *
3959 make_note_raw (enum insn_note subtype)
3961 /* Some notes are never created this way at all. These notes are
3962 only created by patching out insns. */
3963 gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
3964 && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
3966 rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
3967 INSN_UID (note) = cur_insn_uid++;
3968 NOTE_KIND (note) = subtype;
3969 BLOCK_FOR_INSN (note) = NULL;
3970 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3971 return note;
3974 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3975 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3976 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3978 static inline void
3979 link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
3981 SET_PREV_INSN (insn) = prev;
3982 SET_NEXT_INSN (insn) = next;
3983 if (prev != NULL)
3985 SET_NEXT_INSN (prev) = insn;
3986 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3988 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
3989 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
3992 if (next != NULL)
3994 SET_PREV_INSN (next) = insn;
3995 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3997 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
3998 SET_PREV_INSN (sequence->insn (0)) = insn;
4002 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4004 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4005 SET_PREV_INSN (sequence->insn (0)) = prev;
4006 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4010 /* Add INSN to the end of the doubly-linked list.
4011 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4013 void
4014 add_insn (rtx_insn *insn)
4016 rtx_insn *prev = get_last_insn ();
4017 link_insn_into_chain (insn, prev, NULL);
4018 if (NULL == get_insns ())
4019 set_first_insn (insn);
4020 set_last_insn (insn);
4023 /* Add INSN into the doubly-linked list after insn AFTER. */
4025 static void
4026 add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4028 rtx_insn *next = NEXT_INSN (after);
4030 gcc_assert (!optimize || !after->deleted ());
4032 link_insn_into_chain (insn, after, next);
4034 if (next == NULL)
4036 struct sequence_stack *seq;
4038 for (seq = get_current_sequence (); seq; seq = seq->next)
4039 if (after == seq->last)
4041 seq->last = insn;
4042 break;
4047 /* Add INSN into the doubly-linked list before insn BEFORE. */
4049 static void
4050 add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4052 rtx_insn *prev = PREV_INSN (before);
4054 gcc_assert (!optimize || !before->deleted ());
4056 link_insn_into_chain (insn, prev, before);
4058 if (prev == NULL)
4060 struct sequence_stack *seq;
4062 for (seq = get_current_sequence (); seq; seq = seq->next)
4063 if (before == seq->first)
4065 seq->first = insn;
4066 break;
4069 gcc_assert (seq);
4073 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4074 If BB is NULL, an attempt is made to infer the bb from before.
4076 This and the next function should be the only functions called
4077 to insert an insn once delay slots have been filled since only
4078 they know how to update a SEQUENCE. */
4080 void
4081 add_insn_after (rtx uncast_insn, rtx uncast_after, basic_block bb)
4083 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4084 rtx_insn *after = as_a <rtx_insn *> (uncast_after);
4085 add_insn_after_nobb (insn, after);
4086 if (!BARRIER_P (after)
4087 && !BARRIER_P (insn)
4088 && (bb = BLOCK_FOR_INSN (after)))
4090 set_block_for_insn (insn, bb);
4091 if (INSN_P (insn))
4092 df_insn_rescan (insn);
4093 /* Should not happen as first in the BB is always
4094 either NOTE or LABEL. */
4095 if (BB_END (bb) == after
4096 /* Avoid clobbering of structure when creating new BB. */
4097 && !BARRIER_P (insn)
4098 && !NOTE_INSN_BASIC_BLOCK_P (insn))
4099 BB_END (bb) = insn;
4103 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4104 If BB is NULL, an attempt is made to infer the bb from before.
4106 This and the previous function should be the only functions called
4107 to insert an insn once delay slots have been filled since only
4108 they know how to update a SEQUENCE. */
4110 void
4111 add_insn_before (rtx uncast_insn, rtx uncast_before, basic_block bb)
4113 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4114 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4115 add_insn_before_nobb (insn, before);
4117 if (!bb
4118 && !BARRIER_P (before)
4119 && !BARRIER_P (insn))
4120 bb = BLOCK_FOR_INSN (before);
4122 if (bb)
4124 set_block_for_insn (insn, bb);
4125 if (INSN_P (insn))
4126 df_insn_rescan (insn);
4127 /* Should not happen as first in the BB is always either NOTE or
4128 LABEL. */
4129 gcc_assert (BB_HEAD (bb) != insn
4130 /* Avoid clobbering of structure when creating new BB. */
4131 || BARRIER_P (insn)
4132 || NOTE_INSN_BASIC_BLOCK_P (insn));
4136 /* Replace insn with an deleted instruction note. */
4138 void
4139 set_insn_deleted (rtx insn)
4141 if (INSN_P (insn))
4142 df_insn_delete (as_a <rtx_insn *> (insn));
4143 PUT_CODE (insn, NOTE);
4144 NOTE_KIND (insn) = NOTE_INSN_DELETED;
4148 /* Unlink INSN from the insn chain.
4150 This function knows how to handle sequences.
4152 This function does not invalidate data flow information associated with
4153 INSN (i.e. does not call df_insn_delete). That makes this function
4154 usable for only disconnecting an insn from the chain, and re-emit it
4155 elsewhere later.
4157 To later insert INSN elsewhere in the insn chain via add_insn and
4158 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4159 the caller. Nullifying them here breaks many insn chain walks.
4161 To really delete an insn and related DF information, use delete_insn. */
4163 void
4164 remove_insn (rtx uncast_insn)
4166 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4167 rtx_insn *next = NEXT_INSN (insn);
4168 rtx_insn *prev = PREV_INSN (insn);
4169 basic_block bb;
4171 if (prev)
4173 SET_NEXT_INSN (prev) = next;
4174 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4176 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4177 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4180 else
4182 struct sequence_stack *seq;
4184 for (seq = get_current_sequence (); seq; seq = seq->next)
4185 if (insn == seq->first)
4187 seq->first = next;
4188 break;
4191 gcc_assert (seq);
4194 if (next)
4196 SET_PREV_INSN (next) = prev;
4197 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4199 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4200 SET_PREV_INSN (sequence->insn (0)) = prev;
4203 else
4205 struct sequence_stack *seq;
4207 for (seq = get_current_sequence (); seq; seq = seq->next)
4208 if (insn == seq->last)
4210 seq->last = prev;
4211 break;
4214 gcc_assert (seq);
4217 /* Fix up basic block boundaries, if necessary. */
4218 if (!BARRIER_P (insn)
4219 && (bb = BLOCK_FOR_INSN (insn)))
4221 if (BB_HEAD (bb) == insn)
4223 /* Never ever delete the basic block note without deleting whole
4224 basic block. */
4225 gcc_assert (!NOTE_P (insn));
4226 BB_HEAD (bb) = next;
4228 if (BB_END (bb) == insn)
4229 BB_END (bb) = prev;
4233 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4235 void
4236 add_function_usage_to (rtx call_insn, rtx call_fusage)
4238 gcc_assert (call_insn && CALL_P (call_insn));
4240 /* Put the register usage information on the CALL. If there is already
4241 some usage information, put ours at the end. */
4242 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4244 rtx link;
4246 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4247 link = XEXP (link, 1))
4250 XEXP (link, 1) = call_fusage;
4252 else
4253 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4256 /* Delete all insns made since FROM.
4257 FROM becomes the new last instruction. */
4259 void
4260 delete_insns_since (rtx_insn *from)
4262 if (from == 0)
4263 set_first_insn (0);
4264 else
4265 SET_NEXT_INSN (from) = 0;
4266 set_last_insn (from);
4269 /* This function is deprecated, please use sequences instead.
4271 Move a consecutive bunch of insns to a different place in the chain.
4272 The insns to be moved are those between FROM and TO.
4273 They are moved to a new position after the insn AFTER.
4274 AFTER must not be FROM or TO or any insn in between.
4276 This function does not know about SEQUENCEs and hence should not be
4277 called after delay-slot filling has been done. */
4279 void
4280 reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4282 if (flag_checking)
4284 for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4285 gcc_assert (after != x);
4286 gcc_assert (after != to);
4289 /* Splice this bunch out of where it is now. */
4290 if (PREV_INSN (from))
4291 SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4292 if (NEXT_INSN (to))
4293 SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4294 if (get_last_insn () == to)
4295 set_last_insn (PREV_INSN (from));
4296 if (get_insns () == from)
4297 set_first_insn (NEXT_INSN (to));
4299 /* Make the new neighbors point to it and it to them. */
4300 if (NEXT_INSN (after))
4301 SET_PREV_INSN (NEXT_INSN (after)) = to;
4303 SET_NEXT_INSN (to) = NEXT_INSN (after);
4304 SET_PREV_INSN (from) = after;
4305 SET_NEXT_INSN (after) = from;
4306 if (after == get_last_insn ())
4307 set_last_insn (to);
4310 /* Same as function above, but take care to update BB boundaries. */
4311 void
4312 reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4314 rtx_insn *prev = PREV_INSN (from);
4315 basic_block bb, bb2;
4317 reorder_insns_nobb (from, to, after);
4319 if (!BARRIER_P (after)
4320 && (bb = BLOCK_FOR_INSN (after)))
4322 rtx_insn *x;
4323 df_set_bb_dirty (bb);
4325 if (!BARRIER_P (from)
4326 && (bb2 = BLOCK_FOR_INSN (from)))
4328 if (BB_END (bb2) == to)
4329 BB_END (bb2) = prev;
4330 df_set_bb_dirty (bb2);
4333 if (BB_END (bb) == after)
4334 BB_END (bb) = to;
4336 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4337 if (!BARRIER_P (x))
4338 df_insn_change_bb (x, bb);
4343 /* Emit insn(s) of given code and pattern
4344 at a specified place within the doubly-linked list.
4346 All of the emit_foo global entry points accept an object
4347 X which is either an insn list or a PATTERN of a single
4348 instruction.
4350 There are thus a few canonical ways to generate code and
4351 emit it at a specific place in the instruction stream. For
4352 example, consider the instruction named SPOT and the fact that
4353 we would like to emit some instructions before SPOT. We might
4354 do it like this:
4356 start_sequence ();
4357 ... emit the new instructions ...
4358 insns_head = get_insns ();
4359 end_sequence ();
4361 emit_insn_before (insns_head, SPOT);
4363 It used to be common to generate SEQUENCE rtl instead, but that
4364 is a relic of the past which no longer occurs. The reason is that
4365 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4366 generated would almost certainly die right after it was created. */
4368 static rtx_insn *
4369 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4370 rtx_insn *(*make_raw) (rtx))
4372 rtx_insn *insn;
4374 gcc_assert (before);
4376 if (x == NULL_RTX)
4377 return safe_as_a <rtx_insn *> (last);
4379 switch (GET_CODE (x))
4381 case DEBUG_INSN:
4382 case INSN:
4383 case JUMP_INSN:
4384 case CALL_INSN:
4385 case CODE_LABEL:
4386 case BARRIER:
4387 case NOTE:
4388 insn = as_a <rtx_insn *> (x);
4389 while (insn)
4391 rtx_insn *next = NEXT_INSN (insn);
4392 add_insn_before (insn, before, bb);
4393 last = insn;
4394 insn = next;
4396 break;
4398 #ifdef ENABLE_RTL_CHECKING
4399 case SEQUENCE:
4400 gcc_unreachable ();
4401 break;
4402 #endif
4404 default:
4405 last = (*make_raw) (x);
4406 add_insn_before (last, before, bb);
4407 break;
4410 return safe_as_a <rtx_insn *> (last);
4413 /* Make X be output before the instruction BEFORE. */
4415 rtx_insn *
4416 emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4418 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4421 /* Make an instruction with body X and code JUMP_INSN
4422 and output it before the instruction BEFORE. */
4424 rtx_jump_insn *
4425 emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4427 return as_a <rtx_jump_insn *> (
4428 emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4429 make_jump_insn_raw));
4432 /* Make an instruction with body X and code CALL_INSN
4433 and output it before the instruction BEFORE. */
4435 rtx_insn *
4436 emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4438 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4439 make_call_insn_raw);
4442 /* Make an instruction with body X and code DEBUG_INSN
4443 and output it before the instruction BEFORE. */
4445 rtx_insn *
4446 emit_debug_insn_before_noloc (rtx x, rtx before)
4448 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4449 make_debug_insn_raw);
4452 /* Make an insn of code BARRIER
4453 and output it before the insn BEFORE. */
4455 rtx_barrier *
4456 emit_barrier_before (rtx before)
4458 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4460 INSN_UID (insn) = cur_insn_uid++;
4462 add_insn_before (insn, before, NULL);
4463 return insn;
4466 /* Emit the label LABEL before the insn BEFORE. */
4468 rtx_code_label *
4469 emit_label_before (rtx label, rtx_insn *before)
4471 gcc_checking_assert (INSN_UID (label) == 0);
4472 INSN_UID (label) = cur_insn_uid++;
4473 add_insn_before (label, before, NULL);
4474 return as_a <rtx_code_label *> (label);
4477 /* Helper for emit_insn_after, handles lists of instructions
4478 efficiently. */
4480 static rtx_insn *
4481 emit_insn_after_1 (rtx_insn *first, rtx uncast_after, basic_block bb)
4483 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4484 rtx_insn *last;
4485 rtx_insn *after_after;
4486 if (!bb && !BARRIER_P (after))
4487 bb = BLOCK_FOR_INSN (after);
4489 if (bb)
4491 df_set_bb_dirty (bb);
4492 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4493 if (!BARRIER_P (last))
4495 set_block_for_insn (last, bb);
4496 df_insn_rescan (last);
4498 if (!BARRIER_P (last))
4500 set_block_for_insn (last, bb);
4501 df_insn_rescan (last);
4503 if (BB_END (bb) == after)
4504 BB_END (bb) = last;
4506 else
4507 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4508 continue;
4510 after_after = NEXT_INSN (after);
4512 SET_NEXT_INSN (after) = first;
4513 SET_PREV_INSN (first) = after;
4514 SET_NEXT_INSN (last) = after_after;
4515 if (after_after)
4516 SET_PREV_INSN (after_after) = last;
4518 if (after == get_last_insn ())
4519 set_last_insn (last);
4521 return last;
4524 static rtx_insn *
4525 emit_pattern_after_noloc (rtx x, rtx uncast_after, basic_block bb,
4526 rtx_insn *(*make_raw)(rtx))
4528 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4529 rtx_insn *last = after;
4531 gcc_assert (after);
4533 if (x == NULL_RTX)
4534 return last;
4536 switch (GET_CODE (x))
4538 case DEBUG_INSN:
4539 case INSN:
4540 case JUMP_INSN:
4541 case CALL_INSN:
4542 case CODE_LABEL:
4543 case BARRIER:
4544 case NOTE:
4545 last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4546 break;
4548 #ifdef ENABLE_RTL_CHECKING
4549 case SEQUENCE:
4550 gcc_unreachable ();
4551 break;
4552 #endif
4554 default:
4555 last = (*make_raw) (x);
4556 add_insn_after (last, after, bb);
4557 break;
4560 return last;
4563 /* Make X be output after the insn AFTER and set the BB of insn. If
4564 BB is NULL, an attempt is made to infer the BB from AFTER. */
4566 rtx_insn *
4567 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4569 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4573 /* Make an insn of code JUMP_INSN with body X
4574 and output it after the insn AFTER. */
4576 rtx_jump_insn *
4577 emit_jump_insn_after_noloc (rtx x, rtx after)
4579 return as_a <rtx_jump_insn *> (
4580 emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4583 /* Make an instruction with body X and code CALL_INSN
4584 and output it after the instruction AFTER. */
4586 rtx_insn *
4587 emit_call_insn_after_noloc (rtx x, rtx after)
4589 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4592 /* Make an instruction with body X and code CALL_INSN
4593 and output it after the instruction AFTER. */
4595 rtx_insn *
4596 emit_debug_insn_after_noloc (rtx x, rtx after)
4598 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4601 /* Make an insn of code BARRIER
4602 and output it after the insn AFTER. */
4604 rtx_barrier *
4605 emit_barrier_after (rtx after)
4607 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4609 INSN_UID (insn) = cur_insn_uid++;
4611 add_insn_after (insn, after, NULL);
4612 return insn;
4615 /* Emit the label LABEL after the insn AFTER. */
4617 rtx_insn *
4618 emit_label_after (rtx label, rtx_insn *after)
4620 gcc_checking_assert (INSN_UID (label) == 0);
4621 INSN_UID (label) = cur_insn_uid++;
4622 add_insn_after (label, after, NULL);
4623 return as_a <rtx_insn *> (label);
4626 /* Notes require a bit of special handling: Some notes need to have their
4627 BLOCK_FOR_INSN set, others should never have it set, and some should
4628 have it set or clear depending on the context. */
4630 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4631 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4632 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4634 static bool
4635 note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4637 switch (subtype)
4639 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4640 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4641 return true;
4643 /* Notes for var tracking and EH region markers can appear between or
4644 inside basic blocks. If the caller is emitting on the basic block
4645 boundary, do not set BLOCK_FOR_INSN on the new note. */
4646 case NOTE_INSN_VAR_LOCATION:
4647 case NOTE_INSN_CALL_ARG_LOCATION:
4648 case NOTE_INSN_EH_REGION_BEG:
4649 case NOTE_INSN_EH_REGION_END:
4650 return on_bb_boundary_p;
4652 /* Otherwise, BLOCK_FOR_INSN must be set. */
4653 default:
4654 return false;
4658 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4660 rtx_note *
4661 emit_note_after (enum insn_note subtype, rtx_insn *after)
4663 rtx_note *note = make_note_raw (subtype);
4664 basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4665 bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4667 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4668 add_insn_after_nobb (note, after);
4669 else
4670 add_insn_after (note, after, bb);
4671 return note;
4674 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4676 rtx_note *
4677 emit_note_before (enum insn_note subtype, rtx_insn *before)
4679 rtx_note *note = make_note_raw (subtype);
4680 basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4681 bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4683 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4684 add_insn_before_nobb (note, before);
4685 else
4686 add_insn_before (note, before, bb);
4687 return note;
4690 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4691 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4693 static rtx_insn *
4694 emit_pattern_after_setloc (rtx pattern, rtx uncast_after, int loc,
4695 rtx_insn *(*make_raw) (rtx))
4697 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4698 rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4700 if (pattern == NULL_RTX || !loc)
4701 return last;
4703 after = NEXT_INSN (after);
4704 while (1)
4706 if (active_insn_p (after)
4707 && !JUMP_TABLE_DATA_P (after) /* FIXME */
4708 && !INSN_LOCATION (after))
4709 INSN_LOCATION (after) = loc;
4710 if (after == last)
4711 break;
4712 after = NEXT_INSN (after);
4714 return last;
4717 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4718 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4719 any DEBUG_INSNs. */
4721 static rtx_insn *
4722 emit_pattern_after (rtx pattern, rtx uncast_after, bool skip_debug_insns,
4723 rtx_insn *(*make_raw) (rtx))
4725 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4726 rtx_insn *prev = after;
4728 if (skip_debug_insns)
4729 while (DEBUG_INSN_P (prev))
4730 prev = PREV_INSN (prev);
4732 if (INSN_P (prev))
4733 return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
4734 make_raw);
4735 else
4736 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4739 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4740 rtx_insn *
4741 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4743 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4746 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4747 rtx_insn *
4748 emit_insn_after (rtx pattern, rtx after)
4750 return emit_pattern_after (pattern, after, true, make_insn_raw);
4753 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4754 rtx_jump_insn *
4755 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4757 return as_a <rtx_jump_insn *> (
4758 emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
4761 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4762 rtx_jump_insn *
4763 emit_jump_insn_after (rtx pattern, rtx after)
4765 return as_a <rtx_jump_insn *> (
4766 emit_pattern_after (pattern, after, true, make_jump_insn_raw));
4769 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4770 rtx_insn *
4771 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4773 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4776 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4777 rtx_insn *
4778 emit_call_insn_after (rtx pattern, rtx after)
4780 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4783 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4784 rtx_insn *
4785 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4787 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4790 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4791 rtx_insn *
4792 emit_debug_insn_after (rtx pattern, rtx after)
4794 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4797 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4798 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4799 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4800 CALL_INSN, etc. */
4802 static rtx_insn *
4803 emit_pattern_before_setloc (rtx pattern, rtx uncast_before, int loc, bool insnp,
4804 rtx_insn *(*make_raw) (rtx))
4806 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4807 rtx_insn *first = PREV_INSN (before);
4808 rtx_insn *last = emit_pattern_before_noloc (pattern, before,
4809 insnp ? before : NULL_RTX,
4810 NULL, make_raw);
4812 if (pattern == NULL_RTX || !loc)
4813 return last;
4815 if (!first)
4816 first = get_insns ();
4817 else
4818 first = NEXT_INSN (first);
4819 while (1)
4821 if (active_insn_p (first)
4822 && !JUMP_TABLE_DATA_P (first) /* FIXME */
4823 && !INSN_LOCATION (first))
4824 INSN_LOCATION (first) = loc;
4825 if (first == last)
4826 break;
4827 first = NEXT_INSN (first);
4829 return last;
4832 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4833 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4834 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4835 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4837 static rtx_insn *
4838 emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
4839 bool insnp, rtx_insn *(*make_raw) (rtx))
4841 rtx_insn *before = safe_as_a <rtx_insn *> (uncast_before);
4842 rtx_insn *next = before;
4844 if (skip_debug_insns)
4845 while (DEBUG_INSN_P (next))
4846 next = PREV_INSN (next);
4848 if (INSN_P (next))
4849 return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
4850 insnp, make_raw);
4851 else
4852 return emit_pattern_before_noloc (pattern, before,
4853 insnp ? before : NULL_RTX,
4854 NULL, make_raw);
4857 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4858 rtx_insn *
4859 emit_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4861 return emit_pattern_before_setloc (pattern, before, loc, true,
4862 make_insn_raw);
4865 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4866 rtx_insn *
4867 emit_insn_before (rtx pattern, rtx before)
4869 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4872 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4873 rtx_jump_insn *
4874 emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4876 return as_a <rtx_jump_insn *> (
4877 emit_pattern_before_setloc (pattern, before, loc, false,
4878 make_jump_insn_raw));
4881 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4882 rtx_jump_insn *
4883 emit_jump_insn_before (rtx pattern, rtx before)
4885 return as_a <rtx_jump_insn *> (
4886 emit_pattern_before (pattern, before, true, false,
4887 make_jump_insn_raw));
4890 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4891 rtx_insn *
4892 emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4894 return emit_pattern_before_setloc (pattern, before, loc, false,
4895 make_call_insn_raw);
4898 /* Like emit_call_insn_before_noloc,
4899 but set insn_location according to BEFORE. */
4900 rtx_insn *
4901 emit_call_insn_before (rtx pattern, rtx_insn *before)
4903 return emit_pattern_before (pattern, before, true, false,
4904 make_call_insn_raw);
4907 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4908 rtx_insn *
4909 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4911 return emit_pattern_before_setloc (pattern, before, loc, false,
4912 make_debug_insn_raw);
4915 /* Like emit_debug_insn_before_noloc,
4916 but set insn_location according to BEFORE. */
4917 rtx_insn *
4918 emit_debug_insn_before (rtx pattern, rtx_insn *before)
4920 return emit_pattern_before (pattern, before, false, false,
4921 make_debug_insn_raw);
4924 /* Take X and emit it at the end of the doubly-linked
4925 INSN list.
4927 Returns the last insn emitted. */
4929 rtx_insn *
4930 emit_insn (rtx x)
4932 rtx_insn *last = get_last_insn ();
4933 rtx_insn *insn;
4935 if (x == NULL_RTX)
4936 return last;
4938 switch (GET_CODE (x))
4940 case DEBUG_INSN:
4941 case INSN:
4942 case JUMP_INSN:
4943 case CALL_INSN:
4944 case CODE_LABEL:
4945 case BARRIER:
4946 case NOTE:
4947 insn = as_a <rtx_insn *> (x);
4948 while (insn)
4950 rtx_insn *next = NEXT_INSN (insn);
4951 add_insn (insn);
4952 last = insn;
4953 insn = next;
4955 break;
4957 #ifdef ENABLE_RTL_CHECKING
4958 case JUMP_TABLE_DATA:
4959 case SEQUENCE:
4960 gcc_unreachable ();
4961 break;
4962 #endif
4964 default:
4965 last = make_insn_raw (x);
4966 add_insn (last);
4967 break;
4970 return last;
4973 /* Make an insn of code DEBUG_INSN with pattern X
4974 and add it to the end of the doubly-linked list. */
4976 rtx_insn *
4977 emit_debug_insn (rtx x)
4979 rtx_insn *last = get_last_insn ();
4980 rtx_insn *insn;
4982 if (x == NULL_RTX)
4983 return last;
4985 switch (GET_CODE (x))
4987 case DEBUG_INSN:
4988 case INSN:
4989 case JUMP_INSN:
4990 case CALL_INSN:
4991 case CODE_LABEL:
4992 case BARRIER:
4993 case NOTE:
4994 insn = as_a <rtx_insn *> (x);
4995 while (insn)
4997 rtx_insn *next = NEXT_INSN (insn);
4998 add_insn (insn);
4999 last = insn;
5000 insn = next;
5002 break;
5004 #ifdef ENABLE_RTL_CHECKING
5005 case JUMP_TABLE_DATA:
5006 case SEQUENCE:
5007 gcc_unreachable ();
5008 break;
5009 #endif
5011 default:
5012 last = make_debug_insn_raw (x);
5013 add_insn (last);
5014 break;
5017 return last;
5020 /* Make an insn of code JUMP_INSN with pattern X
5021 and add it to the end of the doubly-linked list. */
5023 rtx_insn *
5024 emit_jump_insn (rtx x)
5026 rtx_insn *last = NULL;
5027 rtx_insn *insn;
5029 switch (GET_CODE (x))
5031 case DEBUG_INSN:
5032 case INSN:
5033 case JUMP_INSN:
5034 case CALL_INSN:
5035 case CODE_LABEL:
5036 case BARRIER:
5037 case NOTE:
5038 insn = as_a <rtx_insn *> (x);
5039 while (insn)
5041 rtx_insn *next = NEXT_INSN (insn);
5042 add_insn (insn);
5043 last = insn;
5044 insn = next;
5046 break;
5048 #ifdef ENABLE_RTL_CHECKING
5049 case JUMP_TABLE_DATA:
5050 case SEQUENCE:
5051 gcc_unreachable ();
5052 break;
5053 #endif
5055 default:
5056 last = make_jump_insn_raw (x);
5057 add_insn (last);
5058 break;
5061 return last;
5064 /* Make an insn of code CALL_INSN with pattern X
5065 and add it to the end of the doubly-linked list. */
5067 rtx_insn *
5068 emit_call_insn (rtx x)
5070 rtx_insn *insn;
5072 switch (GET_CODE (x))
5074 case DEBUG_INSN:
5075 case INSN:
5076 case JUMP_INSN:
5077 case CALL_INSN:
5078 case CODE_LABEL:
5079 case BARRIER:
5080 case NOTE:
5081 insn = emit_insn (x);
5082 break;
5084 #ifdef ENABLE_RTL_CHECKING
5085 case SEQUENCE:
5086 case JUMP_TABLE_DATA:
5087 gcc_unreachable ();
5088 break;
5089 #endif
5091 default:
5092 insn = make_call_insn_raw (x);
5093 add_insn (insn);
5094 break;
5097 return insn;
5100 /* Add the label LABEL to the end of the doubly-linked list. */
5102 rtx_code_label *
5103 emit_label (rtx uncast_label)
5105 rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5107 gcc_checking_assert (INSN_UID (label) == 0);
5108 INSN_UID (label) = cur_insn_uid++;
5109 add_insn (label);
5110 return label;
5113 /* Make an insn of code JUMP_TABLE_DATA
5114 and add it to the end of the doubly-linked list. */
5116 rtx_jump_table_data *
5117 emit_jump_table_data (rtx table)
5119 rtx_jump_table_data *jump_table_data =
5120 as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5121 INSN_UID (jump_table_data) = cur_insn_uid++;
5122 PATTERN (jump_table_data) = table;
5123 BLOCK_FOR_INSN (jump_table_data) = NULL;
5124 add_insn (jump_table_data);
5125 return jump_table_data;
5128 /* Make an insn of code BARRIER
5129 and add it to the end of the doubly-linked list. */
5131 rtx_barrier *
5132 emit_barrier (void)
5134 rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5135 INSN_UID (barrier) = cur_insn_uid++;
5136 add_insn (barrier);
5137 return barrier;
5140 /* Emit a copy of note ORIG. */
5142 rtx_note *
5143 emit_note_copy (rtx_note *orig)
5145 enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5146 rtx_note *note = make_note_raw (kind);
5147 NOTE_DATA (note) = NOTE_DATA (orig);
5148 add_insn (note);
5149 return note;
5152 /* Make an insn of code NOTE or type NOTE_NO
5153 and add it to the end of the doubly-linked list. */
5155 rtx_note *
5156 emit_note (enum insn_note kind)
5158 rtx_note *note = make_note_raw (kind);
5159 add_insn (note);
5160 return note;
5163 /* Emit a clobber of lvalue X. */
5165 rtx_insn *
5166 emit_clobber (rtx x)
5168 /* CONCATs should not appear in the insn stream. */
5169 if (GET_CODE (x) == CONCAT)
5171 emit_clobber (XEXP (x, 0));
5172 return emit_clobber (XEXP (x, 1));
5174 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5177 /* Return a sequence of insns to clobber lvalue X. */
5179 rtx_insn *
5180 gen_clobber (rtx x)
5182 rtx_insn *seq;
5184 start_sequence ();
5185 emit_clobber (x);
5186 seq = get_insns ();
5187 end_sequence ();
5188 return seq;
5191 /* Emit a use of rvalue X. */
5193 rtx_insn *
5194 emit_use (rtx x)
5196 /* CONCATs should not appear in the insn stream. */
5197 if (GET_CODE (x) == CONCAT)
5199 emit_use (XEXP (x, 0));
5200 return emit_use (XEXP (x, 1));
5202 return emit_insn (gen_rtx_USE (VOIDmode, x));
5205 /* Return a sequence of insns to use rvalue X. */
5207 rtx_insn *
5208 gen_use (rtx x)
5210 rtx_insn *seq;
5212 start_sequence ();
5213 emit_use (x);
5214 seq = get_insns ();
5215 end_sequence ();
5216 return seq;
5219 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5220 Return the set in INSN that such notes describe, or NULL if the notes
5221 have no meaning for INSN. */
5224 set_for_reg_notes (rtx insn)
5226 rtx pat, reg;
5228 if (!INSN_P (insn))
5229 return NULL_RTX;
5231 pat = PATTERN (insn);
5232 if (GET_CODE (pat) == PARALLEL)
5234 /* We do not use single_set because that ignores SETs of unused
5235 registers. REG_EQUAL and REG_EQUIV notes really do require the
5236 PARALLEL to have a single SET. */
5237 if (multiple_sets (insn))
5238 return NULL_RTX;
5239 pat = XVECEXP (pat, 0, 0);
5242 if (GET_CODE (pat) != SET)
5243 return NULL_RTX;
5245 reg = SET_DEST (pat);
5247 /* Notes apply to the contents of a STRICT_LOW_PART. */
5248 if (GET_CODE (reg) == STRICT_LOW_PART
5249 || GET_CODE (reg) == ZERO_EXTRACT)
5250 reg = XEXP (reg, 0);
5252 /* Check that we have a register. */
5253 if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5254 return NULL_RTX;
5256 return pat;
5259 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5260 note of this type already exists, remove it first. */
5263 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5265 rtx note = find_reg_note (insn, kind, NULL_RTX);
5267 switch (kind)
5269 case REG_EQUAL:
5270 case REG_EQUIV:
5271 /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5272 if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5273 return NULL_RTX;
5275 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5276 It serves no useful purpose and breaks eliminate_regs. */
5277 if (GET_CODE (datum) == ASM_OPERANDS)
5278 return NULL_RTX;
5280 /* Notes with side effects are dangerous. Even if the side-effect
5281 initially mirrors one in PATTERN (INSN), later optimizations
5282 might alter the way that the final register value is calculated
5283 and so move or alter the side-effect in some way. The note would
5284 then no longer be a valid substitution for SET_SRC. */
5285 if (side_effects_p (datum))
5286 return NULL_RTX;
5287 break;
5289 default:
5290 break;
5293 if (note)
5294 XEXP (note, 0) = datum;
5295 else
5297 add_reg_note (insn, kind, datum);
5298 note = REG_NOTES (insn);
5301 switch (kind)
5303 case REG_EQUAL:
5304 case REG_EQUIV:
5305 df_notes_rescan (as_a <rtx_insn *> (insn));
5306 break;
5307 default:
5308 break;
5311 return note;
5314 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5316 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5318 rtx set = set_for_reg_notes (insn);
5320 if (set && SET_DEST (set) == dst)
5321 return set_unique_reg_note (insn, kind, datum);
5322 return NULL_RTX;
5325 /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5326 following barrier if the instruction needs one and if ALLOW_BARRIER_P
5327 is true.
5329 If X is a label, it is simply added into the insn chain. */
5331 rtx_insn *
5332 emit (rtx x, bool allow_barrier_p)
5334 enum rtx_code code = classify_insn (x);
5336 switch (code)
5338 case CODE_LABEL:
5339 return emit_label (x);
5340 case INSN:
5341 return emit_insn (x);
5342 case JUMP_INSN:
5344 rtx_insn *insn = emit_jump_insn (x);
5345 if (allow_barrier_p
5346 && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5347 return emit_barrier ();
5348 return insn;
5350 case CALL_INSN:
5351 return emit_call_insn (x);
5352 case DEBUG_INSN:
5353 return emit_debug_insn (x);
5354 default:
5355 gcc_unreachable ();
5359 /* Space for free sequence stack entries. */
5360 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5362 /* Begin emitting insns to a sequence. If this sequence will contain
5363 something that might cause the compiler to pop arguments to function
5364 calls (because those pops have previously been deferred; see
5365 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5366 before calling this function. That will ensure that the deferred
5367 pops are not accidentally emitted in the middle of this sequence. */
5369 void
5370 start_sequence (void)
5372 struct sequence_stack *tem;
5374 if (free_sequence_stack != NULL)
5376 tem = free_sequence_stack;
5377 free_sequence_stack = tem->next;
5379 else
5380 tem = ggc_alloc<sequence_stack> ();
5382 tem->next = get_current_sequence ()->next;
5383 tem->first = get_insns ();
5384 tem->last = get_last_insn ();
5385 get_current_sequence ()->next = tem;
5387 set_first_insn (0);
5388 set_last_insn (0);
5391 /* Set up the insn chain starting with FIRST as the current sequence,
5392 saving the previously current one. See the documentation for
5393 start_sequence for more information about how to use this function. */
5395 void
5396 push_to_sequence (rtx_insn *first)
5398 rtx_insn *last;
5400 start_sequence ();
5402 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5405 set_first_insn (first);
5406 set_last_insn (last);
5409 /* Like push_to_sequence, but take the last insn as an argument to avoid
5410 looping through the list. */
5412 void
5413 push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5415 start_sequence ();
5417 set_first_insn (first);
5418 set_last_insn (last);
5421 /* Set up the outer-level insn chain
5422 as the current sequence, saving the previously current one. */
5424 void
5425 push_topmost_sequence (void)
5427 struct sequence_stack *top;
5429 start_sequence ();
5431 top = get_topmost_sequence ();
5432 set_first_insn (top->first);
5433 set_last_insn (top->last);
5436 /* After emitting to the outer-level insn chain, update the outer-level
5437 insn chain, and restore the previous saved state. */
5439 void
5440 pop_topmost_sequence (void)
5442 struct sequence_stack *top;
5444 top = get_topmost_sequence ();
5445 top->first = get_insns ();
5446 top->last = get_last_insn ();
5448 end_sequence ();
5451 /* After emitting to a sequence, restore previous saved state.
5453 To get the contents of the sequence just made, you must call
5454 `get_insns' *before* calling here.
5456 If the compiler might have deferred popping arguments while
5457 generating this sequence, and this sequence will not be immediately
5458 inserted into the instruction stream, use do_pending_stack_adjust
5459 before calling get_insns. That will ensure that the deferred
5460 pops are inserted into this sequence, and not into some random
5461 location in the instruction stream. See INHIBIT_DEFER_POP for more
5462 information about deferred popping of arguments. */
5464 void
5465 end_sequence (void)
5467 struct sequence_stack *tem = get_current_sequence ()->next;
5469 set_first_insn (tem->first);
5470 set_last_insn (tem->last);
5471 get_current_sequence ()->next = tem->next;
5473 memset (tem, 0, sizeof (*tem));
5474 tem->next = free_sequence_stack;
5475 free_sequence_stack = tem;
5478 /* Return 1 if currently emitting into a sequence. */
5481 in_sequence_p (void)
5483 return get_current_sequence ()->next != 0;
5486 /* Put the various virtual registers into REGNO_REG_RTX. */
5488 static void
5489 init_virtual_regs (void)
5491 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5492 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5493 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5494 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5495 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5496 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5497 = virtual_preferred_stack_boundary_rtx;
5501 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5502 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5503 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5504 static int copy_insn_n_scratches;
5506 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5507 copied an ASM_OPERANDS.
5508 In that case, it is the original input-operand vector. */
5509 static rtvec orig_asm_operands_vector;
5511 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5512 copied an ASM_OPERANDS.
5513 In that case, it is the copied input-operand vector. */
5514 static rtvec copy_asm_operands_vector;
5516 /* Likewise for the constraints vector. */
5517 static rtvec orig_asm_constraints_vector;
5518 static rtvec copy_asm_constraints_vector;
5520 /* Recursively create a new copy of an rtx for copy_insn.
5521 This function differs from copy_rtx in that it handles SCRATCHes and
5522 ASM_OPERANDs properly.
5523 Normally, this function is not used directly; use copy_insn as front end.
5524 However, you could first copy an insn pattern with copy_insn and then use
5525 this function afterwards to properly copy any REG_NOTEs containing
5526 SCRATCHes. */
5529 copy_insn_1 (rtx orig)
5531 rtx copy;
5532 int i, j;
5533 RTX_CODE code;
5534 const char *format_ptr;
5536 if (orig == NULL)
5537 return NULL;
5539 code = GET_CODE (orig);
5541 switch (code)
5543 case REG:
5544 case DEBUG_EXPR:
5545 CASE_CONST_ANY:
5546 case SYMBOL_REF:
5547 case CODE_LABEL:
5548 case PC:
5549 case CC0:
5550 case RETURN:
5551 case SIMPLE_RETURN:
5552 return orig;
5553 case CLOBBER:
5554 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5555 clobbers or clobbers of hard registers that originated as pseudos.
5556 This is needed to allow safe register renaming. */
5557 if (REG_P (XEXP (orig, 0))
5558 && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5559 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5560 return orig;
5561 break;
5563 case SCRATCH:
5564 for (i = 0; i < copy_insn_n_scratches; i++)
5565 if (copy_insn_scratch_in[i] == orig)
5566 return copy_insn_scratch_out[i];
5567 break;
5569 case CONST:
5570 if (shared_const_p (orig))
5571 return orig;
5572 break;
5574 /* A MEM with a constant address is not sharable. The problem is that
5575 the constant address may need to be reloaded. If the mem is shared,
5576 then reloading one copy of this mem will cause all copies to appear
5577 to have been reloaded. */
5579 default:
5580 break;
5583 /* Copy the various flags, fields, and other information. We assume
5584 that all fields need copying, and then clear the fields that should
5585 not be copied. That is the sensible default behavior, and forces
5586 us to explicitly document why we are *not* copying a flag. */
5587 copy = shallow_copy_rtx (orig);
5589 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5590 if (INSN_P (orig))
5592 RTX_FLAG (copy, jump) = 0;
5593 RTX_FLAG (copy, call) = 0;
5594 RTX_FLAG (copy, frame_related) = 0;
5597 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5599 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5600 switch (*format_ptr++)
5602 case 'e':
5603 if (XEXP (orig, i) != NULL)
5604 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5605 break;
5607 case 'E':
5608 case 'V':
5609 if (XVEC (orig, i) == orig_asm_constraints_vector)
5610 XVEC (copy, i) = copy_asm_constraints_vector;
5611 else if (XVEC (orig, i) == orig_asm_operands_vector)
5612 XVEC (copy, i) = copy_asm_operands_vector;
5613 else if (XVEC (orig, i) != NULL)
5615 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5616 for (j = 0; j < XVECLEN (copy, i); j++)
5617 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5619 break;
5621 case 't':
5622 case 'w':
5623 case 'i':
5624 case 's':
5625 case 'S':
5626 case 'u':
5627 case '0':
5628 /* These are left unchanged. */
5629 break;
5631 default:
5632 gcc_unreachable ();
5635 if (code == SCRATCH)
5637 i = copy_insn_n_scratches++;
5638 gcc_assert (i < MAX_RECOG_OPERANDS);
5639 copy_insn_scratch_in[i] = orig;
5640 copy_insn_scratch_out[i] = copy;
5642 else if (code == ASM_OPERANDS)
5644 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5645 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5646 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5647 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5650 return copy;
5653 /* Create a new copy of an rtx.
5654 This function differs from copy_rtx in that it handles SCRATCHes and
5655 ASM_OPERANDs properly.
5656 INSN doesn't really have to be a full INSN; it could be just the
5657 pattern. */
5659 copy_insn (rtx insn)
5661 copy_insn_n_scratches = 0;
5662 orig_asm_operands_vector = 0;
5663 orig_asm_constraints_vector = 0;
5664 copy_asm_operands_vector = 0;
5665 copy_asm_constraints_vector = 0;
5666 return copy_insn_1 (insn);
5669 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5670 on that assumption that INSN itself remains in its original place. */
5672 rtx_insn *
5673 copy_delay_slot_insn (rtx_insn *insn)
5675 /* Copy INSN with its rtx_code, all its notes, location etc. */
5676 insn = as_a <rtx_insn *> (copy_rtx (insn));
5677 INSN_UID (insn) = cur_insn_uid++;
5678 return insn;
5681 /* Initialize data structures and variables in this file
5682 before generating rtl for each function. */
5684 void
5685 init_emit (void)
5687 set_first_insn (NULL);
5688 set_last_insn (NULL);
5689 if (MIN_NONDEBUG_INSN_UID)
5690 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5691 else
5692 cur_insn_uid = 1;
5693 cur_debug_insn_uid = 1;
5694 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5695 first_label_num = label_num;
5696 get_current_sequence ()->next = NULL;
5698 /* Init the tables that describe all the pseudo regs. */
5700 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5702 crtl->emit.regno_pointer_align
5703 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5705 regno_reg_rtx
5706 = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
5708 /* Put copies of all the hard registers into regno_reg_rtx. */
5709 memcpy (regno_reg_rtx,
5710 initial_regno_reg_rtx,
5711 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5713 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5714 init_virtual_regs ();
5716 /* Indicate that the virtual registers and stack locations are
5717 all pointers. */
5718 REG_POINTER (stack_pointer_rtx) = 1;
5719 REG_POINTER (frame_pointer_rtx) = 1;
5720 REG_POINTER (hard_frame_pointer_rtx) = 1;
5721 REG_POINTER (arg_pointer_rtx) = 1;
5723 REG_POINTER (virtual_incoming_args_rtx) = 1;
5724 REG_POINTER (virtual_stack_vars_rtx) = 1;
5725 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5726 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5727 REG_POINTER (virtual_cfa_rtx) = 1;
5729 #ifdef STACK_BOUNDARY
5730 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5731 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5732 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5733 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5735 /* ??? These are problematic (for example, 3 out of 4 are wrong on
5736 32-bit SPARC and cannot be all fixed because of the ABI). */
5737 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5738 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5739 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5740 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5742 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5743 #endif
5745 #ifdef INIT_EXPANDERS
5746 INIT_EXPANDERS;
5747 #endif
5750 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5752 static rtx
5753 gen_const_vector (machine_mode mode, int constant)
5755 rtx tem;
5756 rtvec v;
5757 int units, i;
5758 machine_mode inner;
5760 units = GET_MODE_NUNITS (mode);
5761 inner = GET_MODE_INNER (mode);
5763 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5765 v = rtvec_alloc (units);
5767 /* We need to call this function after we set the scalar const_tiny_rtx
5768 entries. */
5769 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5771 for (i = 0; i < units; ++i)
5772 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5774 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5775 return tem;
5778 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5779 all elements are zero, and the one vector when all elements are one. */
5781 gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
5783 machine_mode inner = GET_MODE_INNER (mode);
5784 int nunits = GET_MODE_NUNITS (mode);
5785 rtx x;
5786 int i;
5788 /* Check to see if all of the elements have the same value. */
5789 x = RTVEC_ELT (v, nunits - 1);
5790 for (i = nunits - 2; i >= 0; i--)
5791 if (RTVEC_ELT (v, i) != x)
5792 break;
5794 /* If the values are all the same, check to see if we can use one of the
5795 standard constant vectors. */
5796 if (i == -1)
5798 if (x == CONST0_RTX (inner))
5799 return CONST0_RTX (mode);
5800 else if (x == CONST1_RTX (inner))
5801 return CONST1_RTX (mode);
5802 else if (x == CONSTM1_RTX (inner))
5803 return CONSTM1_RTX (mode);
5806 return gen_rtx_raw_CONST_VECTOR (mode, v);
5809 /* Initialise global register information required by all functions. */
5811 void
5812 init_emit_regs (void)
5814 int i;
5815 machine_mode mode;
5816 mem_attrs *attrs;
5818 /* Reset register attributes */
5819 reg_attrs_htab->empty ();
5821 /* We need reg_raw_mode, so initialize the modes now. */
5822 init_reg_modes_target ();
5824 /* Assign register numbers to the globally defined register rtx. */
5825 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5826 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5827 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5828 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5829 virtual_incoming_args_rtx =
5830 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5831 virtual_stack_vars_rtx =
5832 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5833 virtual_stack_dynamic_rtx =
5834 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5835 virtual_outgoing_args_rtx =
5836 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5837 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5838 virtual_preferred_stack_boundary_rtx =
5839 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5841 /* Initialize RTL for commonly used hard registers. These are
5842 copied into regno_reg_rtx as we begin to compile each function. */
5843 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5844 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5846 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5847 return_address_pointer_rtx
5848 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5849 #endif
5851 pic_offset_table_rtx = NULL_RTX;
5852 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5853 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5855 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5857 mode = (machine_mode) i;
5858 attrs = ggc_cleared_alloc<mem_attrs> ();
5859 attrs->align = BITS_PER_UNIT;
5860 attrs->addrspace = ADDR_SPACE_GENERIC;
5861 if (mode != BLKmode)
5863 attrs->size_known_p = true;
5864 attrs->size = GET_MODE_SIZE (mode);
5865 if (STRICT_ALIGNMENT)
5866 attrs->align = GET_MODE_ALIGNMENT (mode);
5868 mode_mem_attrs[i] = attrs;
5872 /* Initialize global machine_mode variables. */
5874 void
5875 init_derived_machine_modes (void)
5877 byte_mode = VOIDmode;
5878 word_mode = VOIDmode;
5880 for (machine_mode mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5881 mode != VOIDmode;
5882 mode = GET_MODE_WIDER_MODE (mode))
5884 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5885 && byte_mode == VOIDmode)
5886 byte_mode = mode;
5888 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5889 && word_mode == VOIDmode)
5890 word_mode = mode;
5893 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5896 /* Create some permanent unique rtl objects shared between all functions. */
5898 void
5899 init_emit_once (void)
5901 int i;
5902 machine_mode mode;
5903 machine_mode double_mode;
5905 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5906 CONST_FIXED, and memory attribute hash tables. */
5907 const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
5909 #if TARGET_SUPPORTS_WIDE_INT
5910 const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
5911 #endif
5912 const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
5914 const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
5916 reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
5918 #ifdef INIT_EXPANDERS
5919 /* This is to initialize {init|mark|free}_machine_status before the first
5920 call to push_function_context_to. This is needed by the Chill front
5921 end which calls push_function_context_to before the first call to
5922 init_function_start. */
5923 INIT_EXPANDERS;
5924 #endif
5926 /* Create the unique rtx's for certain rtx codes and operand values. */
5928 /* Process stack-limiting command-line options. */
5929 if (opt_fstack_limit_symbol_arg != NULL)
5930 stack_limit_rtx
5931 = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
5932 if (opt_fstack_limit_register_no >= 0)
5933 stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
5935 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5936 tries to use these variables. */
5937 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5938 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5939 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5941 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5942 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5943 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5944 else
5945 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5947 double_mode = mode_for_size (DOUBLE_TYPE_SIZE, MODE_FLOAT, 0);
5949 real_from_integer (&dconst0, double_mode, 0, SIGNED);
5950 real_from_integer (&dconst1, double_mode, 1, SIGNED);
5951 real_from_integer (&dconst2, double_mode, 2, SIGNED);
5953 dconstm1 = dconst1;
5954 dconstm1.sign = 1;
5956 dconsthalf = dconst1;
5957 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5959 for (i = 0; i < 3; i++)
5961 const REAL_VALUE_TYPE *const r =
5962 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5964 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5965 mode != VOIDmode;
5966 mode = GET_MODE_WIDER_MODE (mode))
5967 const_tiny_rtx[i][(int) mode] =
5968 const_double_from_real_value (*r, mode);
5970 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5971 mode != VOIDmode;
5972 mode = GET_MODE_WIDER_MODE (mode))
5973 const_tiny_rtx[i][(int) mode] =
5974 const_double_from_real_value (*r, mode);
5976 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5978 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5979 mode != VOIDmode;
5980 mode = GET_MODE_WIDER_MODE (mode))
5981 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5983 for (mode = MIN_MODE_PARTIAL_INT;
5984 mode <= MAX_MODE_PARTIAL_INT;
5985 mode = (machine_mode)((int)(mode) + 1))
5986 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5989 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5991 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5992 mode != VOIDmode;
5993 mode = GET_MODE_WIDER_MODE (mode))
5994 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5996 for (mode = MIN_MODE_PARTIAL_INT;
5997 mode <= MAX_MODE_PARTIAL_INT;
5998 mode = (machine_mode)((int)(mode) + 1))
5999 const_tiny_rtx[3][(int) mode] = constm1_rtx;
6001 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
6002 mode != VOIDmode;
6003 mode = GET_MODE_WIDER_MODE (mode))
6005 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6006 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6009 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
6010 mode != VOIDmode;
6011 mode = GET_MODE_WIDER_MODE (mode))
6013 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6014 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6017 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
6018 mode != VOIDmode;
6019 mode = GET_MODE_WIDER_MODE (mode))
6021 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6022 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6023 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6026 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
6027 mode != VOIDmode;
6028 mode = GET_MODE_WIDER_MODE (mode))
6030 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6031 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6034 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
6035 mode != VOIDmode;
6036 mode = GET_MODE_WIDER_MODE (mode))
6038 FCONST0 (mode).data.high = 0;
6039 FCONST0 (mode).data.low = 0;
6040 FCONST0 (mode).mode = mode;
6041 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6042 FCONST0 (mode), mode);
6045 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
6046 mode != VOIDmode;
6047 mode = GET_MODE_WIDER_MODE (mode))
6049 FCONST0 (mode).data.high = 0;
6050 FCONST0 (mode).data.low = 0;
6051 FCONST0 (mode).mode = mode;
6052 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6053 FCONST0 (mode), mode);
6056 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
6057 mode != VOIDmode;
6058 mode = GET_MODE_WIDER_MODE (mode))
6060 FCONST0 (mode).data.high = 0;
6061 FCONST0 (mode).data.low = 0;
6062 FCONST0 (mode).mode = mode;
6063 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6064 FCONST0 (mode), mode);
6066 /* We store the value 1. */
6067 FCONST1 (mode).data.high = 0;
6068 FCONST1 (mode).data.low = 0;
6069 FCONST1 (mode).mode = mode;
6070 FCONST1 (mode).data
6071 = double_int_one.lshift (GET_MODE_FBIT (mode),
6072 HOST_BITS_PER_DOUBLE_INT,
6073 SIGNED_FIXED_POINT_MODE_P (mode));
6074 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6075 FCONST1 (mode), mode);
6078 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
6079 mode != VOIDmode;
6080 mode = GET_MODE_WIDER_MODE (mode))
6082 FCONST0 (mode).data.high = 0;
6083 FCONST0 (mode).data.low = 0;
6084 FCONST0 (mode).mode = mode;
6085 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6086 FCONST0 (mode), mode);
6088 /* We store the value 1. */
6089 FCONST1 (mode).data.high = 0;
6090 FCONST1 (mode).data.low = 0;
6091 FCONST1 (mode).mode = mode;
6092 FCONST1 (mode).data
6093 = double_int_one.lshift (GET_MODE_FBIT (mode),
6094 HOST_BITS_PER_DOUBLE_INT,
6095 SIGNED_FIXED_POINT_MODE_P (mode));
6096 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6097 FCONST1 (mode), mode);
6100 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
6101 mode != VOIDmode;
6102 mode = GET_MODE_WIDER_MODE (mode))
6104 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6107 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
6108 mode != VOIDmode;
6109 mode = GET_MODE_WIDER_MODE (mode))
6111 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6114 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
6115 mode != VOIDmode;
6116 mode = GET_MODE_WIDER_MODE (mode))
6118 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6119 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6122 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
6123 mode != VOIDmode;
6124 mode = GET_MODE_WIDER_MODE (mode))
6126 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6127 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6130 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6131 if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6132 const_tiny_rtx[0][i] = const0_rtx;
6134 const_tiny_rtx[0][(int) BImode] = const0_rtx;
6135 if (STORE_FLAG_VALUE == 1)
6136 const_tiny_rtx[1][(int) BImode] = const1_rtx;
6138 for (mode = GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS);
6139 mode != VOIDmode;
6140 mode = GET_MODE_WIDER_MODE (mode))
6142 wide_int wi_zero = wi::zero (GET_MODE_PRECISION (mode));
6143 const_tiny_rtx[0][mode] = immed_wide_int_const (wi_zero, mode);
6146 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6147 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6148 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6149 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
6150 invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6151 /*prev_insn=*/NULL,
6152 /*next_insn=*/NULL,
6153 /*bb=*/NULL,
6154 /*pattern=*/NULL_RTX,
6155 /*location=*/-1,
6156 CODE_FOR_nothing,
6157 /*reg_notes=*/NULL_RTX);
6160 /* Produce exact duplicate of insn INSN after AFTER.
6161 Care updating of libcall regions if present. */
6163 rtx_insn *
6164 emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6166 rtx_insn *new_rtx;
6167 rtx link;
6169 switch (GET_CODE (insn))
6171 case INSN:
6172 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6173 break;
6175 case JUMP_INSN:
6176 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6177 CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6178 break;
6180 case DEBUG_INSN:
6181 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6182 break;
6184 case CALL_INSN:
6185 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6186 if (CALL_INSN_FUNCTION_USAGE (insn))
6187 CALL_INSN_FUNCTION_USAGE (new_rtx)
6188 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6189 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6190 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6191 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6192 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6193 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6194 break;
6196 default:
6197 gcc_unreachable ();
6200 /* Update LABEL_NUSES. */
6201 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6203 INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6205 /* If the old insn is frame related, then so is the new one. This is
6206 primarily needed for IA-64 unwind info which marks epilogue insns,
6207 which may be duplicated by the basic block reordering code. */
6208 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6210 /* Locate the end of existing REG_NOTES in NEW_RTX. */
6211 rtx *ptail = &REG_NOTES (new_rtx);
6212 while (*ptail != NULL_RTX)
6213 ptail = &XEXP (*ptail, 1);
6215 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6216 will make them. REG_LABEL_TARGETs are created there too, but are
6217 supposed to be sticky, so we copy them. */
6218 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6219 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6221 *ptail = duplicate_reg_note (link);
6222 ptail = &XEXP (*ptail, 1);
6225 INSN_CODE (new_rtx) = INSN_CODE (insn);
6226 return new_rtx;
6229 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6231 gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6233 if (hard_reg_clobbers[mode][regno])
6234 return hard_reg_clobbers[mode][regno];
6235 else
6236 return (hard_reg_clobbers[mode][regno] =
6237 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6240 location_t prologue_location;
6241 location_t epilogue_location;
6243 /* Hold current location information and last location information, so the
6244 datastructures are built lazily only when some instructions in given
6245 place are needed. */
6246 static location_t curr_location;
6248 /* Allocate insn location datastructure. */
6249 void
6250 insn_locations_init (void)
6252 prologue_location = epilogue_location = 0;
6253 curr_location = UNKNOWN_LOCATION;
6256 /* At the end of emit stage, clear current location. */
6257 void
6258 insn_locations_finalize (void)
6260 epilogue_location = curr_location;
6261 curr_location = UNKNOWN_LOCATION;
6264 /* Set current location. */
6265 void
6266 set_curr_insn_location (location_t location)
6268 curr_location = location;
6271 /* Get current location. */
6272 location_t
6273 curr_insn_location (void)
6275 return curr_location;
6278 /* Return lexical scope block insn belongs to. */
6279 tree
6280 insn_scope (const rtx_insn *insn)
6282 return LOCATION_BLOCK (INSN_LOCATION (insn));
6285 /* Return line number of the statement that produced this insn. */
6287 insn_line (const rtx_insn *insn)
6289 return LOCATION_LINE (INSN_LOCATION (insn));
6292 /* Return source file of the statement that produced this insn. */
6293 const char *
6294 insn_file (const rtx_insn *insn)
6296 return LOCATION_FILE (INSN_LOCATION (insn));
6299 /* Return expanded location of the statement that produced this insn. */
6300 expanded_location
6301 insn_location (const rtx_insn *insn)
6303 return expand_location (INSN_LOCATION (insn));
6306 /* Return true if memory model MODEL requires a pre-operation (release-style)
6307 barrier or a post-operation (acquire-style) barrier. While not universal,
6308 this function matches behavior of several targets. */
6310 bool
6311 need_atomic_barrier_p (enum memmodel model, bool pre)
6313 switch (model & MEMMODEL_BASE_MASK)
6315 case MEMMODEL_RELAXED:
6316 case MEMMODEL_CONSUME:
6317 return false;
6318 case MEMMODEL_RELEASE:
6319 return pre;
6320 case MEMMODEL_ACQUIRE:
6321 return !pre;
6322 case MEMMODEL_ACQ_REL:
6323 case MEMMODEL_SEQ_CST:
6324 return true;
6325 default:
6326 gcc_unreachable ();
6330 /* Initialize fields of rtl_data related to stack alignment. */
6332 void
6333 rtl_data::init_stack_alignment ()
6335 stack_alignment_needed = STACK_BOUNDARY;
6336 max_used_stack_slot_alignment = STACK_BOUNDARY;
6337 stack_alignment_estimated = 0;
6338 preferred_stack_boundary = STACK_BOUNDARY;
6342 #include "gt-emit-rtl.h"