1 ;; Predicate definitions for Visium.
2 ;; Copyright (C) 2005-2017 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Return true if OP is the constant 0.
21 (define_predicate "const0_operand"
22 (and (match_code "const_int,const_double")
23 (match_test "op == CONST0_RTX (mode)")))
25 ;; Return true if OP is a constant in the range 1 .. 31.
26 (define_predicate "const_shift_operand"
27 (and (match_code "const_int")
28 (match_test "1 <= INTVAL (op) && INTVAL (op) <= 31")))
30 ;; Return true if OP is either a register or the constant 0.
31 (define_predicate "reg_or_0_operand"
32 (ior (match_operand 0 "register_operand")
33 (match_operand 0 "const0_operand")))
35 ;; Return true if OP is either a register or a constant in the range 1 .. 31.
36 (define_predicate "reg_or_shift_operand"
37 (ior (match_operand 0 "register_operand")
38 (match_operand 0 "const_shift_operand")))
40 ;; Return true if OP is either a register or the constant 32.
41 (define_predicate "reg_or_32_operand"
42 (ior (match_operand 0 "register_operand")
43 (and (match_code "const_int")
44 (match_test "INTVAL (op) == 32"))))
46 ;; Return true if OP is a general register.
47 (define_predicate "gpc_reg_operand"
48 (match_operand 0 "register_operand")
50 if (GET_CODE (op) == SUBREG)
53 if (GET_CODE (op) != REG)
57 unsigned int regno = REGNO (op);
58 return (regno >= FIRST_PSEUDO_REGISTER
59 || TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], regno));
62 ;; Return true if OP is the MDB register.
63 (define_predicate "mdb_reg_operand"
64 (match_operand 0 "register_operand")
66 unsigned int regno = reg_or_subreg_regno (op);
67 return (regno == MDB_REGNUM);
70 ;; Return true if OP is the MDC register.
71 (define_predicate "mdc_reg_operand"
72 (match_operand 0 "register_operand")
74 unsigned int regno = reg_or_subreg_regno (op);
75 return (regno == MDC_REGNUM);
78 ;; Return true if OP is an rvalue which is not an EAM register.
79 (define_predicate "non_eam_src_operand"
80 (match_operand 0 "general_operand")
82 unsigned int regno = reg_or_subreg_regno (op);
83 return (regno != MDB_REGNUM && regno != MDC_REGNUM);
86 ;; Return true if OP is an lvalue which is not an EAM register.
87 (define_predicate "non_eam_dst_operand"
88 (match_operand 0 "nonimmediate_operand")
90 unsigned int regno = reg_or_subreg_regno (op);
91 return (regno != MDB_REGNUM && regno != MDC_REGNUM);
94 ;; Return true if OP is a floating-point register.
95 (define_predicate "fp_reg_operand"
98 unsigned int regno = REGNO (op);
99 return (regno >= FIRST_PSEUDO_REGISTER || FP_REGISTER_P (regno));
102 ;; Return true if OP is a floating-point register or the constant 0.
103 (define_predicate "fp_reg_or_0_operand"
104 (ior (match_operand 0 "fp_reg_operand")
105 (match_operand 0 "const0_operand")))
107 ;; Return true if OP can be used as the second operand in a 32-bit or 64-bit
108 ;; add or subtract instruction. Note that adding a negative constant may be
109 ;; transformed into subtracting a positive constant, and vice versa.
110 (define_predicate "add_operand"
111 (ior (match_operand 0 "gpc_reg_operand")
112 (and (match_code "const_int")
113 (match_test ("INTVAL (op) >= -65535 && INTVAL (op) <= 65535")))))
115 ;; Return true if OP can be used as the second operand in a 32-bit or 64-bit
116 ;; add or subtract instruction directly, i.e. without the reverse trick.
117 (define_predicate "real_add_operand"
118 (ior (match_operand 0 "gpc_reg_operand")
119 (and (match_code "const_int")
120 (match_test ("INTVAL (op) >= 0 && INTVAL (op) <= 65535")))))
122 ;; Return true if OP is (or could be) outside the range 0 .. 65535, which is
123 ;; the range of the immediate operands, but accept -1 for NOT.
124 (define_predicate "large_immediate_operand"
125 (ior (match_code "const,label_ref,symbol_ref")
126 (and (match_code "const_int")
127 (match_test ("INTVAL (op) < -1 || INTVAL (op) > 65535")))))
129 ;; Return true if OP is an equality comparison operator.
130 (define_predicate "visium_equality_comparison_operator"
131 (match_code "eq,ne"))
133 ;; Return true if OP is a valid comparison operator for CCNZmode.
134 (define_predicate "visium_nz_comparison_operator"
135 (match_code "eq,ne,lt,ge"))
137 ;; Return true if OP is a valid comparison operator for CCCmode.
138 (define_predicate "visium_c_comparison_operator"
139 (match_code "eq,ne,ltu,geu"))
141 ;; Return true if OP is a valid comparison operator for CCVmode.
142 (define_predicate "visium_v_comparison_operator"
143 (match_code "eq,ne"))
145 ;; Return true if OP is a valid FP comparison operator.
146 (define_predicate "visium_fp_comparison_operator"
147 (match_code "eq,ne,ordered,unordered,unlt,unle,ungt,unge,lt,le,gt,ge"))
149 ;; Return true if OP is a valid comparison operator for a branch. This allows
150 ;; the use of MATCH_OPERATOR to recognize all the branch insns.
151 (define_predicate "visium_branch_operator"
152 (match_operand 0 "comparison_operator")
154 switch (GET_MODE (XEXP (op, 0)))
157 return ordered_comparison_operator (op, mode);
159 return visium_nz_comparison_operator (op, mode);
161 return visium_c_comparison_operator (op, mode);
163 return visium_v_comparison_operator (op, mode);
166 return visium_fp_comparison_operator (op, mode);
172 ;; Return true if OP is a valid comparison operator for an integer cstore.
173 (define_predicate "visium_int_cstore_operator"
174 (match_code "eq,ne,ltu,gtu,leu,geu"))
176 ;; Return true if OP is a valid comparison operator for an FP cstore.
177 (define_predicate "visium_fp_cstore_operator"
178 (match_code "lt,gt,unge,unle"))