libgfortran/config/fpu-387.h

   1 /* FPU-related code for x86 and x86_64 processors.
   2    Copyright (C) 2005-2013 Free Software Foundation, Inc.
   3    Contributed by Francois-Xavier Coudert <coudert@clipper.ens.fr>
   4
   5 This file is part of the GNU Fortran 95 runtime library (libgfortran).
   6
   7 Libgfortran is free software; you can redistribute it and/or
   8 modify it under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either
  10 version 3 of the License, or (at your option) any later version.
  11
  12 Libgfortran is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 Under Section 7 of GPL version 3, you are granted additional
  18 permissions described in the GCC Runtime Library Exception, version
  19 3.1, as published by the Free Software Foundation.
  20
  21 You should have received a copy of the GNU General Public License and
  22 a copy of the GCC Runtime Library Exception along with this program;
  23 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  24 <http://www.gnu.org/licenses/>.  */
  25
  26 #ifndef __SSE_MATH__
  27 #include "cpuid.h"
  28 #endif
  29
  30 #if defined(__sun__) && defined(__svr4__)
  31 #include <signal.h>
  32 #include <ucontext.h>
  33
  34 static volatile sig_atomic_t sigill_caught;
  35
  36 static void
  37 sigill_hdlr (int sig __attribute((unused)),
  38              siginfo_t *sip __attribute__((unused)),
  39              ucontext_t *ucp)
  40 {
  41   sigill_caught = 1;
  42   /* Set PC to the instruction after the faulting one to skip over it,
  43      otherwise we enter an infinite loop.  3 is the size of the movaps
  44      instruction.  */
  45   ucp->uc_mcontext.gregs[EIP] += 3;
  46   setcontext (ucp);
  47 }
  48 #endif
  49
  50 static int
  51 has_sse (void)
  52 {
  53 #ifndef __SSE_MATH__
  54   unsigned int eax, ebx, ecx, edx;
  55
  56   if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
  57     return 0;
  58
  59 #if defined(__sun__) && defined(__svr4__)
  60   /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions even
  61      if the CPU supports them.  Programs receive SIGILL instead, so check
  62      for that at runtime.  */
  63
  64   if (edx & bit_SSE)
  65     {
  66       struct sigaction act, oact;
  67
  68       act.sa_handler = sigill_hdlr;
  69       sigemptyset (&act.sa_mask);
  70       /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler.  */
  71       act.sa_flags = SA_SIGINFO;
  72       sigaction (SIGILL, &act, &oact);
  73
  74       /* We need a single SSE instruction here so the handler can safely skip
  75          over it.  */
  76       __asm__ __volatile__ ("movaps\t%xmm0,%xmm0");
  77
  78       sigaction (SIGILL, &oact, NULL);
  79
  80       if (sigill_caught)
  81         return 0;
  82     }
  83 #endif /* __sun__ && __svr4__ */
  84
  85   return edx & bit_SSE;
  86 #else
  87   return 1;
  88 #endif
  89 }
  90
  91 /* i387 exceptions -- see linux <fpu_control.h> header file for details.  */
  92 #define _FPU_MASK_IM  0x01
  93 #define _FPU_MASK_DM  0x02
  94 #define _FPU_MASK_ZM  0x04
  95 #define _FPU_MASK_OM  0x08
  96 #define _FPU_MASK_UM  0x10
  97 #define _FPU_MASK_PM  0x20
  98 #define _FPU_MASK_ALL 0x3f
  99
 100 #define _FPU_EX_ALL   0x3f
 101
 102 /* i387 rounding modes.  */
 103
 104 #define _FPU_RC_NEAREST 0x0
 105 #define _FPU_RC_DOWN    0x1
 106 #define _FPU_RC_UP      0x2
 107 #define _FPU_RC_ZERO    0x3
 108
 109 #define _FPU_RC_MASK    0x3
 110
 111
 112 void
 113 set_fpu (void)
 114 {
 115   int excepts = 0;
 116   unsigned short cw;
 117
 118   __asm__ __volatile__ ("fstcw\t%0" : "=m" (cw));
 119
 120   if (options.fpe & GFC_FPE_INVALID) excepts |= _FPU_MASK_IM;
 121   if (options.fpe & GFC_FPE_DENORMAL) excepts |= _FPU_MASK_DM;
 122   if (options.fpe & GFC_FPE_ZERO) excepts |= _FPU_MASK_ZM;
 123   if (options.fpe & GFC_FPE_OVERFLOW) excepts |= _FPU_MASK_OM;
 124   if (options.fpe & GFC_FPE_UNDERFLOW) excepts |= _FPU_MASK_UM;
 125   if (options.fpe & GFC_FPE_INEXACT) excepts |= _FPU_MASK_PM;
 126
 127   cw |= _FPU_MASK_ALL;
 128   cw &= ~excepts;
 129
 130   __asm__ __volatile__ ("fnclex\n\tfldcw\t%0" : : "m" (cw));
 131
 132   if (has_sse())
 133     {
 134       unsigned int cw_sse;
 135
 136       __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
 137
 138       /* The SSE exception masks are shifted by 7 bits.  */
 139       cw_sse |= _FPU_MASK_ALL << 7;
 140       cw_sse &= ~(excepts << 7);
 141
 142       /* Clear stalled exception flags.  */
 143       cw_sse &= ~_FPU_EX_ALL;
 144
 145       __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse));
 146     }
 147 }
 148
 149 int
 150 get_fpu_except_flags (void)
 151 {
 152   unsigned short cw;
 153   int excepts;
 154   int result = 0;
 155
 156   __asm__ __volatile__ ("fnstsw\t%0" : "=a" (cw));
 157   excepts = cw;
 158
 159   if (has_sse())
 160     {
 161       unsigned int cw_sse;
 162
 163       __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
 164       excepts |= cw_sse;
 165     }
 166
 167   excepts &= _FPU_EX_ALL;
 168
 169   if (excepts & _FPU_MASK_IM) result |= GFC_FPE_INVALID;
 170   if (excepts & _FPU_MASK_DM) result |= GFC_FPE_DENORMAL;
 171   if (excepts & _FPU_MASK_ZM) result |= GFC_FPE_ZERO;
 172   if (excepts & _FPU_MASK_OM) result |= GFC_FPE_OVERFLOW;
 173   if (excepts & _FPU_MASK_UM) result |= GFC_FPE_UNDERFLOW;
 174   if (excepts & _FPU_MASK_PM) result |= GFC_FPE_INEXACT;
 175
 176   return result;
 177 }
 178
 179 void
 180 set_fpu_rounding_mode (int round)
 181 {
 182   int round_mode;
 183   unsigned short cw;
 184
 185   switch (round)
 186     {
 187     case GFC_FPE_TONEAREST:
 188       round_mode = _FPU_RC_NEAREST;
 189       break;
 190     case GFC_FPE_UPWARD:
 191       round_mode = _FPU_RC_UP;
 192       break;
 193     case GFC_FPE_DOWNWARD:
 194       round_mode = _FPU_RC_DOWN;
 195       break;
 196     case GFC_FPE_TOWARDZERO:
 197       round_mode = _FPU_RC_ZERO;
 198       break;
 199     default:
 200       return; /* Should be unreachable.  */
 201     }
 202
 203   __asm__ __volatile__ ("fnstcw\t%0" : "=m" (cw));
 204
 205   /* The x87 round control bits are shifted by 10 bits.  */
 206   cw &= ~(_FPU_RC_MASK << 10);
 207   cw |= round_mode << 10;
 208
 209   __asm__ __volatile__ ("fldcw\t%0" : : "m" (cw));
 210
 211   if (has_sse())
 212     {
 213       unsigned int cw_sse;
 214
 215       __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
 216
 217       /* The SSE round control bits are shifted by 13 bits.  */
 218       cw_sse &= ~(_FPU_RC_MASK << 13);
 219       cw_sse |= round_mode << 13;
 220
 221       __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse));
 222     }
 223 }
 224
 225 int
 226 get_fpu_rounding_mode (void)
 227 {
 228   int round_mode;
 229
 230 #ifdef __SSE_MATH__
 231   unsigned int cw;
 232
 233   __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw));
 234
 235   /* The SSE round control bits are shifted by 13 bits.  */
 236   round_mode = cw >> 13;
 237 #else
 238   unsigned short cw;
 239
 240   __asm__ __volatile__ ("fnstcw\t%0" : "=m" (cw));
 241
 242   /* The x87 round control bits are shifted by 10 bits.  */
 243   round_mode = cw >> 10;
 244 #endif
 245
 246   round_mode &= _FPU_RC_MASK;
 247
 248   switch (round_mode)
 249     {
 250     case _FPU_RC_NEAREST:
 251       return GFC_FPE_TONEAREST;
 252     case _FPU_RC_UP:
 253       return GFC_FPE_UPWARD;
 254     case _FPU_RC_DOWN:
 255       return GFC_FPE_DOWNWARD;
 256     case _FPU_RC_ZERO:
 257       return GFC_FPE_TOWARDZERO;
 258     default:
 259       return GFC_FPE_INVALID; /* Should be unreachable.  */
 260     }
 261 }