* predict.c (estimate_bb_frequencies): Correctly set
[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
46 /* The basic idea of common subexpression elimination is to go
47 through the code, keeping a record of expressions that would
48 have the same value at the current scan point, and replacing
49 expressions encountered with the cheapest equivalent expression.
51 It is too complicated to keep track of the different possibilities
52 when control paths merge in this code; so, at each label, we forget all
53 that is known and start fresh. This can be described as processing each
54 extended basic block separately. We have a separate pass to perform
55 global CSE.
57 Note CSE can turn a conditional or computed jump into a nop or
58 an unconditional jump. When this occurs we arrange to run the jump
59 optimizer after CSE to delete the unreachable code.
61 We use two data structures to record the equivalent expressions:
62 a hash table for most expressions, and a vector of "quantity
63 numbers" to record equivalent (pseudo) registers.
65 The use of the special data structure for registers is desirable
66 because it is faster. It is possible because registers references
67 contain a fairly small number, the register number, taken from
68 a contiguously allocated series, and two register references are
69 identical if they have the same number. General expressions
70 do not have any such thing, so the only way to retrieve the
71 information recorded on an expression other than a register
72 is to keep it in a hash table.
74 Registers and "quantity numbers":
76 At the start of each basic block, all of the (hardware and pseudo)
77 registers used in the function are given distinct quantity
78 numbers to indicate their contents. During scan, when the code
79 copies one register into another, we copy the quantity number.
80 When a register is loaded in any other way, we allocate a new
81 quantity number to describe the value generated by this operation.
82 `reg_qty' records what quantity a register is currently thought
83 of as containing.
85 All real quantity numbers are greater than or equal to `max_reg'.
86 If register N has not been assigned a quantity, reg_qty[N] will equal N.
88 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
89 entries should be referenced with an index below `max_reg'.
91 We also maintain a bidirectional chain of registers for each
92 quantity number. The `qty_table` members `first_reg' and `last_reg',
93 and `reg_eqv_table' members `next' and `prev' hold these chains.
95 The first register in a chain is the one whose lifespan is least local.
96 Among equals, it is the one that was seen first.
97 We replace any equivalent register with that one.
99 If two registers have the same quantity number, it must be true that
100 REG expressions with qty_table `mode' must be in the hash table for both
101 registers and must be in the same class.
103 The converse is not true. Since hard registers may be referenced in
104 any mode, two REG expressions might be equivalent in the hash table
105 but not have the same quantity number if the quantity number of one
106 of the registers is not the same mode as those expressions.
108 Constants and quantity numbers
110 When a quantity has a known constant value, that value is stored
111 in the appropriate qty_table `const_rtx'. This is in addition to
112 putting the constant in the hash table as is usual for non-regs.
114 Whether a reg or a constant is preferred is determined by the configuration
115 macro CONST_COSTS and will often depend on the constant value. In any
116 event, expressions containing constants can be simplified, by fold_rtx.
118 When a quantity has a known nearly constant value (such as an address
119 of a stack slot), that value is stored in the appropriate qty_table
120 `const_rtx'.
122 Integer constants don't have a machine mode. However, cse
123 determines the intended machine mode from the destination
124 of the instruction that moves the constant. The machine mode
125 is recorded in the hash table along with the actual RTL
126 constant expression so that different modes are kept separate.
128 Other expressions:
130 To record known equivalences among expressions in general
131 we use a hash table called `table'. It has a fixed number of buckets
132 that contain chains of `struct table_elt' elements for expressions.
133 These chains connect the elements whose expressions have the same
134 hash codes.
136 Other chains through the same elements connect the elements which
137 currently have equivalent values.
139 Register references in an expression are canonicalized before hashing
140 the expression. This is done using `reg_qty' and qty_table `first_reg'.
141 The hash code of a register reference is computed using the quantity
142 number, not the register number.
144 When the value of an expression changes, it is necessary to remove from the
145 hash table not just that expression but all expressions whose values
146 could be different as a result.
148 1. If the value changing is in memory, except in special cases
149 ANYTHING referring to memory could be changed. That is because
150 nobody knows where a pointer does not point.
151 The function `invalidate_memory' removes what is necessary.
153 The special cases are when the address is constant or is
154 a constant plus a fixed register such as the frame pointer
155 or a static chain pointer. When such addresses are stored in,
156 we can tell exactly which other such addresses must be invalidated
157 due to overlap. `invalidate' does this.
158 All expressions that refer to non-constant
159 memory addresses are also invalidated. `invalidate_memory' does this.
161 2. If the value changing is a register, all expressions
162 containing references to that register, and only those,
163 must be removed.
165 Because searching the entire hash table for expressions that contain
166 a register is very slow, we try to figure out when it isn't necessary.
167 Precisely, this is necessary only when expressions have been
168 entered in the hash table using this register, and then the value has
169 changed, and then another expression wants to be added to refer to
170 the register's new value. This sequence of circumstances is rare
171 within any one basic block.
173 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
174 reg_tick[i] is incremented whenever a value is stored in register i.
175 reg_in_table[i] holds -1 if no references to register i have been
176 entered in the table; otherwise, it contains the value reg_tick[i] had
177 when the references were entered. If we want to enter a reference
178 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
179 Until we want to enter a new entry, the mere fact that the two vectors
180 don't match makes the entries be ignored if anyone tries to match them.
182 Registers themselves are entered in the hash table as well as in
183 the equivalent-register chains. However, the vectors `reg_tick'
184 and `reg_in_table' do not apply to expressions which are simple
185 register references. These expressions are removed from the table
186 immediately when they become invalid, and this can be done even if
187 we do not immediately search for all the expressions that refer to
188 the register.
190 A CLOBBER rtx in an instruction invalidates its operand for further
191 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
192 invalidates everything that resides in memory.
194 Related expressions:
196 Constant expressions that differ only by an additive integer
197 are called related. When a constant expression is put in
198 the table, the related expression with no constant term
199 is also entered. These are made to point at each other
200 so that it is possible to find out if there exists any
201 register equivalent to an expression related to a given expression. */
203 /* One plus largest register number used in this function. */
205 static int max_reg;
207 /* One plus largest instruction UID used in this function at time of
208 cse_main call. */
210 static int max_insn_uid;
212 /* Length of qty_table vector. We know in advance we will not need
213 a quantity number this big. */
215 static int max_qty;
217 /* Next quantity number to be allocated.
218 This is 1 + the largest number needed so far. */
220 static int next_qty;
222 /* Per-qty information tracking.
224 `first_reg' and `last_reg' track the head and tail of the
225 chain of registers which currently contain this quantity.
227 `mode' contains the machine mode of this quantity.
229 `const_rtx' holds the rtx of the constant value of this
230 quantity, if known. A summations of the frame/arg pointer
231 and a constant can also be entered here. When this holds
232 a known value, `const_insn' is the insn which stored the
233 constant value.
235 `comparison_{code,const,qty}' are used to track when a
236 comparison between a quantity and some constant or register has
237 been passed. In such a case, we know the results of the comparison
238 in case we see it again. These members record a comparison that
239 is known to be true. `comparison_code' holds the rtx code of such
240 a comparison, else it is set to UNKNOWN and the other two
241 comparison members are undefined. `comparison_const' holds
242 the constant being compared against, or zero if the comparison
243 is not against a constant. `comparison_qty' holds the quantity
244 being compared against when the result is known. If the comparison
245 is not with a register, `comparison_qty' is -1. */
247 struct qty_table_elem
249 rtx const_rtx;
250 rtx const_insn;
251 rtx comparison_const;
252 int comparison_qty;
253 unsigned int first_reg, last_reg;
254 enum machine_mode mode;
255 enum rtx_code comparison_code;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem *qty_table;
261 #ifdef HAVE_cc0
262 /* For machines that have a CC0, we do not record its value in the hash
263 table since its use is guaranteed to be the insn immediately following
264 its definition and any other insn is presumed to invalidate it.
266 Instead, we store below the value last assigned to CC0. If it should
267 happen to be a constant, it is stored in preference to the actual
268 assigned value. In case it is a constant, we store the mode in which
269 the constant should be interpreted. */
271 static rtx prev_insn_cc0;
272 static enum machine_mode prev_insn_cc0_mode;
274 /* Previous actual insn. 0 if at first insn of basic block. */
276 static rtx prev_insn;
277 #endif
279 /* Insn being scanned. */
281 static rtx this_insn;
283 /* Index by register number, gives the number of the next (or
284 previous) register in the chain of registers sharing the same
285 value.
287 Or -1 if this register is at the end of the chain.
289 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
291 /* Per-register equivalence chain. */
292 struct reg_eqv_elem
294 int next, prev;
297 /* The table of all register equivalence chains. */
298 static struct reg_eqv_elem *reg_eqv_table;
300 struct cse_reg_info
302 /* Next in hash chain. */
303 struct cse_reg_info *hash_next;
305 /* The next cse_reg_info structure in the free or used list. */
306 struct cse_reg_info *next;
308 /* Search key */
309 unsigned int regno;
311 /* The quantity number of the register's current contents. */
312 int reg_qty;
314 /* The number of times the register has been altered in the current
315 basic block. */
316 int reg_tick;
318 /* The REG_TICK value at which rtx's containing this register are
319 valid in the hash table. If this does not equal the current
320 reg_tick value, such expressions existing in the hash table are
321 invalid. */
322 int reg_in_table;
324 /* The SUBREG that was set when REG_TICK was last incremented. Set
325 to -1 if the last store was to the whole register, not a subreg. */
326 unsigned int subreg_ticked;
329 /* A free list of cse_reg_info entries. */
330 static struct cse_reg_info *cse_reg_info_free_list;
332 /* A used list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_used_list;
334 static struct cse_reg_info *cse_reg_info_used_list_end;
336 /* A mapping from registers to cse_reg_info data structures. */
337 #define REGHASH_SHIFT 7
338 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
339 #define REGHASH_MASK (REGHASH_SIZE - 1)
340 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
342 #define REGHASH_FN(REGNO) \
343 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
345 /* The last lookup we did into the cse_reg_info_tree. This allows us
346 to cache repeated lookups. */
347 static unsigned int cached_regno;
348 static struct cse_reg_info *cached_cse_reg_info;
350 /* A HARD_REG_SET containing all the hard registers for which there is
351 currently a REG expression in the hash table. Note the difference
352 from the above variables, which indicate if the REG is mentioned in some
353 expression in the table. */
355 static HARD_REG_SET hard_regs_in_table;
357 /* CUID of insn that starts the basic block currently being cse-processed. */
359 static int cse_basic_block_start;
361 /* CUID of insn that ends the basic block currently being cse-processed. */
363 static int cse_basic_block_end;
365 /* Vector mapping INSN_UIDs to cuids.
366 The cuids are like uids but increase monotonically always.
367 We use them to see whether a reg is used outside a given basic block. */
369 static int *uid_cuid;
371 /* Highest UID in UID_CUID. */
372 static int max_uid;
374 /* Get the cuid of an insn. */
376 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
378 /* Nonzero if this pass has made changes, and therefore it's
379 worthwhile to run the garbage collector. */
381 static int cse_altered;
383 /* Nonzero if cse has altered conditional jump insns
384 in such a way that jump optimization should be redone. */
386 static int cse_jumps_altered;
388 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
389 REG_LABEL, we have to rerun jump after CSE to put in the note. */
390 static int recorded_label_ref;
392 /* canon_hash stores 1 in do_not_record
393 if it notices a reference to CC0, PC, or some other volatile
394 subexpression. */
396 static int do_not_record;
398 #ifdef LOAD_EXTEND_OP
400 /* Scratch rtl used when looking for load-extended copy of a MEM. */
401 static rtx memory_extend_rtx;
402 #endif
404 /* canon_hash stores 1 in hash_arg_in_memory
405 if it notices a reference to memory within the expression being hashed. */
407 static int hash_arg_in_memory;
409 /* The hash table contains buckets which are chains of `struct table_elt's,
410 each recording one expression's information.
411 That expression is in the `exp' field.
413 The canon_exp field contains a canonical (from the point of view of
414 alias analysis) version of the `exp' field.
416 Those elements with the same hash code are chained in both directions
417 through the `next_same_hash' and `prev_same_hash' fields.
419 Each set of expressions with equivalent values
420 are on a two-way chain through the `next_same_value'
421 and `prev_same_value' fields, and all point with
422 the `first_same_value' field at the first element in
423 that chain. The chain is in order of increasing cost.
424 Each element's cost value is in its `cost' field.
426 The `in_memory' field is nonzero for elements that
427 involve any reference to memory. These elements are removed
428 whenever a write is done to an unidentified location in memory.
429 To be safe, we assume that a memory address is unidentified unless
430 the address is either a symbol constant or a constant plus
431 the frame pointer or argument pointer.
433 The `related_value' field is used to connect related expressions
434 (that differ by adding an integer).
435 The related expressions are chained in a circular fashion.
436 `related_value' is zero for expressions for which this
437 chain is not useful.
439 The `cost' field stores the cost of this element's expression.
440 The `regcost' field stores the value returned by approx_reg_cost for
441 this element's expression.
443 The `is_const' flag is set if the element is a constant (including
444 a fixed address).
446 The `flag' field is used as a temporary during some search routines.
448 The `mode' field is usually the same as GET_MODE (`exp'), but
449 if `exp' is a CONST_INT and has no machine mode then the `mode'
450 field is the mode it was being used as. Each constant is
451 recorded separately for each mode it is used with. */
453 struct table_elt
455 rtx exp;
456 rtx canon_exp;
457 struct table_elt *next_same_hash;
458 struct table_elt *prev_same_hash;
459 struct table_elt *next_same_value;
460 struct table_elt *prev_same_value;
461 struct table_elt *first_same_value;
462 struct table_elt *related_value;
463 int cost;
464 int regcost;
465 enum machine_mode mode;
466 char in_memory;
467 char is_const;
468 char flag;
471 /* We don't want a lot of buckets, because we rarely have very many
472 things stored in the hash table, and a lot of buckets slows
473 down a lot of loops that happen frequently. */
474 #define HASH_SHIFT 5
475 #define HASH_SIZE (1 << HASH_SHIFT)
476 #define HASH_MASK (HASH_SIZE - 1)
478 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
479 register (hard registers may require `do_not_record' to be set). */
481 #define HASH(X, M) \
482 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
483 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
484 : canon_hash (X, M)) & HASH_MASK)
486 /* Determine whether register number N is considered a fixed register for the
487 purpose of approximating register costs.
488 It is desirable to replace other regs with fixed regs, to reduce need for
489 non-fixed hard regs.
490 A reg wins if it is either the frame pointer or designated as fixed. */
491 #define FIXED_REGNO_P(N) \
492 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
493 || fixed_regs[N] || global_regs[N])
495 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
496 hard registers and pointers into the frame are the cheapest with a cost
497 of 0. Next come pseudos with a cost of one and other hard registers with
498 a cost of 2. Aside from these special cases, call `rtx_cost'. */
500 #define CHEAP_REGNO(N) \
501 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
502 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
503 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
504 || ((N) < FIRST_PSEUDO_REGISTER \
505 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
507 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
508 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
510 /* Get the info associated with register N. */
512 #define GET_CSE_REG_INFO(N) \
513 (((N) == cached_regno && cached_cse_reg_info) \
514 ? cached_cse_reg_info : get_cse_reg_info ((N)))
516 /* Get the number of times this register has been updated in this
517 basic block. */
519 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
521 /* Get the point at which REG was recorded in the table. */
523 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
525 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
526 SUBREG). */
528 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
530 /* Get the quantity number for REG. */
532 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
534 /* Determine if the quantity number for register X represents a valid index
535 into the qty_table. */
537 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
539 static struct table_elt *table[HASH_SIZE];
541 /* Chain of `struct table_elt's made so far for this function
542 but currently removed from the table. */
544 static struct table_elt *free_element_chain;
546 /* Number of `struct table_elt' structures made so far for this function. */
548 static int n_elements_made;
550 /* Maximum value `n_elements_made' has had so far in this compilation
551 for functions previously processed. */
553 static int max_elements_made;
555 /* Surviving equivalence class when two equivalence classes are merged
556 by recording the effects of a jump in the last insn. Zero if the
557 last insn was not a conditional jump. */
559 static struct table_elt *last_jump_equiv_class;
561 /* Set to the cost of a constant pool reference if one was found for a
562 symbolic constant. If this was found, it means we should try to
563 convert constants into constant pool entries if they don't fit in
564 the insn. */
566 static int constant_pool_entries_cost;
568 /* Define maximum length of a branch path. */
570 #define PATHLENGTH 10
572 /* This data describes a block that will be processed by cse_basic_block. */
574 struct cse_basic_block_data
576 /* Lowest CUID value of insns in block. */
577 int low_cuid;
578 /* Highest CUID value of insns in block. */
579 int high_cuid;
580 /* Total number of SETs in block. */
581 int nsets;
582 /* Last insn in the block. */
583 rtx last;
584 /* Size of current branch path, if any. */
585 int path_size;
586 /* Current branch path, indicating which branches will be taken. */
587 struct branch_path
589 /* The branch insn. */
590 rtx branch;
591 /* Whether it should be taken or not. AROUND is the same as taken
592 except that it is used when the destination label is not preceded
593 by a BARRIER. */
594 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
595 } path[PATHLENGTH];
598 static bool fixed_base_plus_p PARAMS ((rtx x));
599 static int notreg_cost PARAMS ((rtx, enum rtx_code));
600 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
601 static int approx_reg_cost PARAMS ((rtx));
602 static int preferrable PARAMS ((int, int, int, int));
603 static void new_basic_block PARAMS ((void));
604 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
605 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
606 static void delete_reg_equiv PARAMS ((unsigned int));
607 static int mention_regs PARAMS ((rtx));
608 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
609 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
610 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
611 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
612 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
613 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
614 enum machine_mode));
615 static void merge_equiv_classes PARAMS ((struct table_elt *,
616 struct table_elt *));
617 static void invalidate PARAMS ((rtx, enum machine_mode));
618 static int cse_rtx_varies_p PARAMS ((rtx, int));
619 static void remove_invalid_refs PARAMS ((unsigned int));
620 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
621 enum machine_mode));
622 static void rehash_using_reg PARAMS ((rtx));
623 static void invalidate_memory PARAMS ((void));
624 static void invalidate_for_call PARAMS ((void));
625 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
626 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
627 static unsigned canon_hash_string PARAMS ((const char *));
628 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
629 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
630 static rtx canon_reg PARAMS ((rtx, rtx));
631 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
632 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
633 enum machine_mode *,
634 enum machine_mode *));
635 static rtx fold_rtx PARAMS ((rtx, rtx));
636 static rtx equiv_constant PARAMS ((rtx));
637 static void record_jump_equiv PARAMS ((rtx, int));
638 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
639 rtx, rtx, int));
640 static void cse_insn PARAMS ((rtx, rtx));
641 static int addr_affects_sp_p PARAMS ((rtx));
642 static void invalidate_from_clobbers PARAMS ((rtx));
643 static rtx cse_process_notes PARAMS ((rtx, rtx));
644 static void cse_around_loop PARAMS ((rtx));
645 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
646 static void invalidate_skipped_block PARAMS ((rtx));
647 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
648 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
649 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
650 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
651 static int check_for_label_ref PARAMS ((rtx *, void *));
652 extern void dump_class PARAMS ((struct table_elt*));
653 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
654 static int check_dependence PARAMS ((rtx *, void *));
656 static void flush_hash_table PARAMS ((void));
657 static bool insn_live_p PARAMS ((rtx, int *));
658 static bool set_live_p PARAMS ((rtx, rtx, int *));
659 static bool dead_libcall_p PARAMS ((rtx, int *));
661 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
662 virtual regs here because the simplify_*_operation routines are called
663 by integrate.c, which is called before virtual register instantiation. */
665 static bool
666 fixed_base_plus_p (x)
667 rtx x;
669 switch (GET_CODE (x))
671 case REG:
672 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
673 return true;
674 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
675 return true;
676 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
677 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
678 return true;
679 return false;
681 case PLUS:
682 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
683 return false;
684 return fixed_base_plus_p (XEXP (x, 0));
686 case ADDRESSOF:
687 return true;
689 default:
690 return false;
694 /* Dump the expressions in the equivalence class indicated by CLASSP.
695 This function is used only for debugging. */
696 void
697 dump_class (classp)
698 struct table_elt *classp;
700 struct table_elt *elt;
702 fprintf (stderr, "Equivalence chain for ");
703 print_rtl (stderr, classp->exp);
704 fprintf (stderr, ": \n");
706 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
708 print_rtl (stderr, elt->exp);
709 fprintf (stderr, "\n");
713 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
715 static int
716 approx_reg_cost_1 (xp, data)
717 rtx *xp;
718 void *data;
720 rtx x = *xp;
721 int *cost_p = data;
723 if (x && GET_CODE (x) == REG)
725 unsigned int regno = REGNO (x);
727 if (! CHEAP_REGNO (regno))
729 if (regno < FIRST_PSEUDO_REGISTER)
731 if (SMALL_REGISTER_CLASSES)
732 return 1;
733 *cost_p += 2;
735 else
736 *cost_p += 1;
740 return 0;
743 /* Return an estimate of the cost of the registers used in an rtx.
744 This is mostly the number of different REG expressions in the rtx;
745 however for some exceptions like fixed registers we use a cost of
746 0. If any other hard register reference occurs, return MAX_COST. */
748 static int
749 approx_reg_cost (x)
750 rtx x;
752 int cost = 0;
754 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
755 return MAX_COST;
757 return cost;
760 /* Return a negative value if an rtx A, whose costs are given by COST_A
761 and REGCOST_A, is more desirable than an rtx B.
762 Return a positive value if A is less desirable, or 0 if the two are
763 equally good. */
764 static int
765 preferrable (cost_a, regcost_a, cost_b, regcost_b)
766 int cost_a, regcost_a, cost_b, regcost_b;
768 /* First, get rid of cases involving expressions that are entirely
769 unwanted. */
770 if (cost_a != cost_b)
772 if (cost_a == MAX_COST)
773 return 1;
774 if (cost_b == MAX_COST)
775 return -1;
778 /* Avoid extending lifetimes of hardregs. */
779 if (regcost_a != regcost_b)
781 if (regcost_a == MAX_COST)
782 return 1;
783 if (regcost_b == MAX_COST)
784 return -1;
787 /* Normal operation costs take precedence. */
788 if (cost_a != cost_b)
789 return cost_a - cost_b;
790 /* Only if these are identical consider effects on register pressure. */
791 if (regcost_a != regcost_b)
792 return regcost_a - regcost_b;
793 return 0;
796 /* Internal function, to compute cost when X is not a register; called
797 from COST macro to keep it simple. */
799 static int
800 notreg_cost (x, outer)
801 rtx x;
802 enum rtx_code outer;
804 return ((GET_CODE (x) == SUBREG
805 && GET_CODE (SUBREG_REG (x)) == REG
806 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
807 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
808 && (GET_MODE_SIZE (GET_MODE (x))
809 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
810 && subreg_lowpart_p (x)
811 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
812 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
814 : rtx_cost (x, outer) * 2);
817 /* Return an estimate of the cost of computing rtx X.
818 One use is in cse, to decide which expression to keep in the hash table.
819 Another is in rtl generation, to pick the cheapest way to multiply.
820 Other uses like the latter are expected in the future. */
823 rtx_cost (x, outer_code)
824 rtx x;
825 enum rtx_code outer_code ATTRIBUTE_UNUSED;
827 int i, j;
828 enum rtx_code code;
829 const char *fmt;
830 int total;
832 if (x == 0)
833 return 0;
835 /* Compute the default costs of certain things.
836 Note that targetm.rtx_costs can override the defaults. */
838 code = GET_CODE (x);
839 switch (code)
841 case MULT:
842 total = COSTS_N_INSNS (5);
843 break;
844 case DIV:
845 case UDIV:
846 case MOD:
847 case UMOD:
848 total = COSTS_N_INSNS (7);
849 break;
850 case USE:
851 /* Used in loop.c and combine.c as a marker. */
852 total = 0;
853 break;
854 default:
855 total = COSTS_N_INSNS (1);
858 switch (code)
860 case REG:
861 return 0;
863 case SUBREG:
864 /* If we can't tie these modes, make this expensive. The larger
865 the mode, the more expensive it is. */
866 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
867 return COSTS_N_INSNS (2
868 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
869 break;
871 default:
872 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
873 return total;
874 break;
877 /* Sum the costs of the sub-rtx's, plus cost of this operation,
878 which is already in total. */
880 fmt = GET_RTX_FORMAT (code);
881 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
882 if (fmt[i] == 'e')
883 total += rtx_cost (XEXP (x, i), code);
884 else if (fmt[i] == 'E')
885 for (j = 0; j < XVECLEN (x, i); j++)
886 total += rtx_cost (XVECEXP (x, i, j), code);
888 return total;
891 /* Return cost of address expression X.
892 Expect that X is properly formed address reference. */
895 address_cost (x, mode)
896 rtx x;
897 enum machine_mode mode;
899 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
900 during CSE, such nodes are present. Using an ADDRESSOF node which
901 refers to the address of a REG is a good thing because we can then
902 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
904 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
905 return -1;
907 /* We may be asked for cost of various unusual addresses, such as operands
908 of push instruction. It is not worthwhile to complicate writing
909 of the target hook by such cases. */
911 if (!memory_address_p (mode, x))
912 return 1000;
914 return (*targetm.address_cost) (x);
917 /* If the target doesn't override, compute the cost as with arithmetic. */
920 default_address_cost (x)
921 rtx x;
923 return rtx_cost (x, MEM);
926 static struct cse_reg_info *
927 get_cse_reg_info (regno)
928 unsigned int regno;
930 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
931 struct cse_reg_info *p;
933 for (p = *hash_head; p != NULL; p = p->hash_next)
934 if (p->regno == regno)
935 break;
937 if (p == NULL)
939 /* Get a new cse_reg_info structure. */
940 if (cse_reg_info_free_list)
942 p = cse_reg_info_free_list;
943 cse_reg_info_free_list = p->next;
945 else
946 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
948 /* Insert into hash table. */
949 p->hash_next = *hash_head;
950 *hash_head = p;
952 /* Initialize it. */
953 p->reg_tick = 1;
954 p->reg_in_table = -1;
955 p->subreg_ticked = -1;
956 p->reg_qty = regno;
957 p->regno = regno;
958 p->next = cse_reg_info_used_list;
959 cse_reg_info_used_list = p;
960 if (!cse_reg_info_used_list_end)
961 cse_reg_info_used_list_end = p;
964 /* Cache this lookup; we tend to be looking up information about the
965 same register several times in a row. */
966 cached_regno = regno;
967 cached_cse_reg_info = p;
969 return p;
972 /* Clear the hash table and initialize each register with its own quantity,
973 for a new basic block. */
975 static void
976 new_basic_block ()
978 int i;
980 next_qty = max_reg;
982 /* Clear out hash table state for this pass. */
984 memset ((char *) reg_hash, 0, sizeof reg_hash);
986 if (cse_reg_info_used_list)
988 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
989 cse_reg_info_free_list = cse_reg_info_used_list;
990 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
992 cached_cse_reg_info = 0;
994 CLEAR_HARD_REG_SET (hard_regs_in_table);
996 /* The per-quantity values used to be initialized here, but it is
997 much faster to initialize each as it is made in `make_new_qty'. */
999 for (i = 0; i < HASH_SIZE; i++)
1001 struct table_elt *first;
1003 first = table[i];
1004 if (first != NULL)
1006 struct table_elt *last = first;
1008 table[i] = NULL;
1010 while (last->next_same_hash != NULL)
1011 last = last->next_same_hash;
1013 /* Now relink this hash entire chain into
1014 the free element list. */
1016 last->next_same_hash = free_element_chain;
1017 free_element_chain = first;
1021 #ifdef HAVE_cc0
1022 prev_insn = 0;
1023 prev_insn_cc0 = 0;
1024 #endif
1027 /* Say that register REG contains a quantity in mode MODE not in any
1028 register before and initialize that quantity. */
1030 static void
1031 make_new_qty (reg, mode)
1032 unsigned int reg;
1033 enum machine_mode mode;
1035 int q;
1036 struct qty_table_elem *ent;
1037 struct reg_eqv_elem *eqv;
1039 if (next_qty >= max_qty)
1040 abort ();
1042 q = REG_QTY (reg) = next_qty++;
1043 ent = &qty_table[q];
1044 ent->first_reg = reg;
1045 ent->last_reg = reg;
1046 ent->mode = mode;
1047 ent->const_rtx = ent->const_insn = NULL_RTX;
1048 ent->comparison_code = UNKNOWN;
1050 eqv = &reg_eqv_table[reg];
1051 eqv->next = eqv->prev = -1;
1054 /* Make reg NEW equivalent to reg OLD.
1055 OLD is not changing; NEW is. */
1057 static void
1058 make_regs_eqv (new, old)
1059 unsigned int new, old;
1061 unsigned int lastr, firstr;
1062 int q = REG_QTY (old);
1063 struct qty_table_elem *ent;
1065 ent = &qty_table[q];
1067 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1068 if (! REGNO_QTY_VALID_P (old))
1069 abort ();
1071 REG_QTY (new) = q;
1072 firstr = ent->first_reg;
1073 lastr = ent->last_reg;
1075 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1076 hard regs. Among pseudos, if NEW will live longer than any other reg
1077 of the same qty, and that is beyond the current basic block,
1078 make it the new canonical replacement for this qty. */
1079 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1080 /* Certain fixed registers might be of the class NO_REGS. This means
1081 that not only can they not be allocated by the compiler, but
1082 they cannot be used in substitutions or canonicalizations
1083 either. */
1084 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1085 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1086 || (new >= FIRST_PSEUDO_REGISTER
1087 && (firstr < FIRST_PSEUDO_REGISTER
1088 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1089 || (uid_cuid[REGNO_FIRST_UID (new)]
1090 < cse_basic_block_start))
1091 && (uid_cuid[REGNO_LAST_UID (new)]
1092 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1094 reg_eqv_table[firstr].prev = new;
1095 reg_eqv_table[new].next = firstr;
1096 reg_eqv_table[new].prev = -1;
1097 ent->first_reg = new;
1099 else
1101 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1102 Otherwise, insert before any non-fixed hard regs that are at the
1103 end. Registers of class NO_REGS cannot be used as an
1104 equivalent for anything. */
1105 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1106 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1107 && new >= FIRST_PSEUDO_REGISTER)
1108 lastr = reg_eqv_table[lastr].prev;
1109 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1110 if (reg_eqv_table[lastr].next >= 0)
1111 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1112 else
1113 qty_table[q].last_reg = new;
1114 reg_eqv_table[lastr].next = new;
1115 reg_eqv_table[new].prev = lastr;
1119 /* Remove REG from its equivalence class. */
1121 static void
1122 delete_reg_equiv (reg)
1123 unsigned int reg;
1125 struct qty_table_elem *ent;
1126 int q = REG_QTY (reg);
1127 int p, n;
1129 /* If invalid, do nothing. */
1130 if (q == (int) reg)
1131 return;
1133 ent = &qty_table[q];
1135 p = reg_eqv_table[reg].prev;
1136 n = reg_eqv_table[reg].next;
1138 if (n != -1)
1139 reg_eqv_table[n].prev = p;
1140 else
1141 ent->last_reg = p;
1142 if (p != -1)
1143 reg_eqv_table[p].next = n;
1144 else
1145 ent->first_reg = n;
1147 REG_QTY (reg) = reg;
1150 /* Remove any invalid expressions from the hash table
1151 that refer to any of the registers contained in expression X.
1153 Make sure that newly inserted references to those registers
1154 as subexpressions will be considered valid.
1156 mention_regs is not called when a register itself
1157 is being stored in the table.
1159 Return 1 if we have done something that may have changed the hash code
1160 of X. */
1162 static int
1163 mention_regs (x)
1164 rtx x;
1166 enum rtx_code code;
1167 int i, j;
1168 const char *fmt;
1169 int changed = 0;
1171 if (x == 0)
1172 return 0;
1174 code = GET_CODE (x);
1175 if (code == REG)
1177 unsigned int regno = REGNO (x);
1178 unsigned int endregno
1179 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1180 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1181 unsigned int i;
1183 for (i = regno; i < endregno; i++)
1185 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1186 remove_invalid_refs (i);
1188 REG_IN_TABLE (i) = REG_TICK (i);
1189 SUBREG_TICKED (i) = -1;
1192 return 0;
1195 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1196 pseudo if they don't use overlapping words. We handle only pseudos
1197 here for simplicity. */
1198 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1199 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1201 unsigned int i = REGNO (SUBREG_REG (x));
1203 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1205 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1206 the last store to this register really stored into this
1207 subreg, then remove the memory of this subreg.
1208 Otherwise, remove any memory of the entire register and
1209 all its subregs from the table. */
1210 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1211 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1212 remove_invalid_refs (i);
1213 else
1214 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1217 REG_IN_TABLE (i) = REG_TICK (i);
1218 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1219 return 0;
1222 /* If X is a comparison or a COMPARE and either operand is a register
1223 that does not have a quantity, give it one. This is so that a later
1224 call to record_jump_equiv won't cause X to be assigned a different
1225 hash code and not found in the table after that call.
1227 It is not necessary to do this here, since rehash_using_reg can
1228 fix up the table later, but doing this here eliminates the need to
1229 call that expensive function in the most common case where the only
1230 use of the register is in the comparison. */
1232 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1234 if (GET_CODE (XEXP (x, 0)) == REG
1235 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1236 if (insert_regs (XEXP (x, 0), NULL, 0))
1238 rehash_using_reg (XEXP (x, 0));
1239 changed = 1;
1242 if (GET_CODE (XEXP (x, 1)) == REG
1243 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1244 if (insert_regs (XEXP (x, 1), NULL, 0))
1246 rehash_using_reg (XEXP (x, 1));
1247 changed = 1;
1251 fmt = GET_RTX_FORMAT (code);
1252 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1253 if (fmt[i] == 'e')
1254 changed |= mention_regs (XEXP (x, i));
1255 else if (fmt[i] == 'E')
1256 for (j = 0; j < XVECLEN (x, i); j++)
1257 changed |= mention_regs (XVECEXP (x, i, j));
1259 return changed;
1262 /* Update the register quantities for inserting X into the hash table
1263 with a value equivalent to CLASSP.
1264 (If the class does not contain a REG, it is irrelevant.)
1265 If MODIFIED is nonzero, X is a destination; it is being modified.
1266 Note that delete_reg_equiv should be called on a register
1267 before insert_regs is done on that register with MODIFIED != 0.
1269 Nonzero value means that elements of reg_qty have changed
1270 so X's hash code may be different. */
1272 static int
1273 insert_regs (x, classp, modified)
1274 rtx x;
1275 struct table_elt *classp;
1276 int modified;
1278 if (GET_CODE (x) == REG)
1280 unsigned int regno = REGNO (x);
1281 int qty_valid;
1283 /* If REGNO is in the equivalence table already but is of the
1284 wrong mode for that equivalence, don't do anything here. */
1286 qty_valid = REGNO_QTY_VALID_P (regno);
1287 if (qty_valid)
1289 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1291 if (ent->mode != GET_MODE (x))
1292 return 0;
1295 if (modified || ! qty_valid)
1297 if (classp)
1298 for (classp = classp->first_same_value;
1299 classp != 0;
1300 classp = classp->next_same_value)
1301 if (GET_CODE (classp->exp) == REG
1302 && GET_MODE (classp->exp) == GET_MODE (x))
1304 make_regs_eqv (regno, REGNO (classp->exp));
1305 return 1;
1308 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1309 than REG_IN_TABLE to find out if there was only a single preceding
1310 invalidation - for the SUBREG - or another one, which would be
1311 for the full register. However, if we find here that REG_TICK
1312 indicates that the register is invalid, it means that it has
1313 been invalidated in a separate operation. The SUBREG might be used
1314 now (then this is a recursive call), or we might use the full REG
1315 now and a SUBREG of it later. So bump up REG_TICK so that
1316 mention_regs will do the right thing. */
1317 if (! modified
1318 && REG_IN_TABLE (regno) >= 0
1319 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1320 REG_TICK (regno)++;
1321 make_new_qty (regno, GET_MODE (x));
1322 return 1;
1325 return 0;
1328 /* If X is a SUBREG, we will likely be inserting the inner register in the
1329 table. If that register doesn't have an assigned quantity number at
1330 this point but does later, the insertion that we will be doing now will
1331 not be accessible because its hash code will have changed. So assign
1332 a quantity number now. */
1334 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1335 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1337 insert_regs (SUBREG_REG (x), NULL, 0);
1338 mention_regs (x);
1339 return 1;
1341 else
1342 return mention_regs (x);
1345 /* Look in or update the hash table. */
1347 /* Remove table element ELT from use in the table.
1348 HASH is its hash code, made using the HASH macro.
1349 It's an argument because often that is known in advance
1350 and we save much time not recomputing it. */
1352 static void
1353 remove_from_table (elt, hash)
1354 struct table_elt *elt;
1355 unsigned hash;
1357 if (elt == 0)
1358 return;
1360 /* Mark this element as removed. See cse_insn. */
1361 elt->first_same_value = 0;
1363 /* Remove the table element from its equivalence class. */
1366 struct table_elt *prev = elt->prev_same_value;
1367 struct table_elt *next = elt->next_same_value;
1369 if (next)
1370 next->prev_same_value = prev;
1372 if (prev)
1373 prev->next_same_value = next;
1374 else
1376 struct table_elt *newfirst = next;
1377 while (next)
1379 next->first_same_value = newfirst;
1380 next = next->next_same_value;
1385 /* Remove the table element from its hash bucket. */
1388 struct table_elt *prev = elt->prev_same_hash;
1389 struct table_elt *next = elt->next_same_hash;
1391 if (next)
1392 next->prev_same_hash = prev;
1394 if (prev)
1395 prev->next_same_hash = next;
1396 else if (table[hash] == elt)
1397 table[hash] = next;
1398 else
1400 /* This entry is not in the proper hash bucket. This can happen
1401 when two classes were merged by `merge_equiv_classes'. Search
1402 for the hash bucket that it heads. This happens only very
1403 rarely, so the cost is acceptable. */
1404 for (hash = 0; hash < HASH_SIZE; hash++)
1405 if (table[hash] == elt)
1406 table[hash] = next;
1410 /* Remove the table element from its related-value circular chain. */
1412 if (elt->related_value != 0 && elt->related_value != elt)
1414 struct table_elt *p = elt->related_value;
1416 while (p->related_value != elt)
1417 p = p->related_value;
1418 p->related_value = elt->related_value;
1419 if (p->related_value == p)
1420 p->related_value = 0;
1423 /* Now add it to the free element chain. */
1424 elt->next_same_hash = free_element_chain;
1425 free_element_chain = elt;
1428 /* Look up X in the hash table and return its table element,
1429 or 0 if X is not in the table.
1431 MODE is the machine-mode of X, or if X is an integer constant
1432 with VOIDmode then MODE is the mode with which X will be used.
1434 Here we are satisfied to find an expression whose tree structure
1435 looks like X. */
1437 static struct table_elt *
1438 lookup (x, hash, mode)
1439 rtx x;
1440 unsigned hash;
1441 enum machine_mode mode;
1443 struct table_elt *p;
1445 for (p = table[hash]; p; p = p->next_same_hash)
1446 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1447 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1448 return p;
1450 return 0;
1453 /* Like `lookup' but don't care whether the table element uses invalid regs.
1454 Also ignore discrepancies in the machine mode of a register. */
1456 static struct table_elt *
1457 lookup_for_remove (x, hash, mode)
1458 rtx x;
1459 unsigned hash;
1460 enum machine_mode mode;
1462 struct table_elt *p;
1464 if (GET_CODE (x) == REG)
1466 unsigned int regno = REGNO (x);
1468 /* Don't check the machine mode when comparing registers;
1469 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1470 for (p = table[hash]; p; p = p->next_same_hash)
1471 if (GET_CODE (p->exp) == REG
1472 && REGNO (p->exp) == regno)
1473 return p;
1475 else
1477 for (p = table[hash]; p; p = p->next_same_hash)
1478 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1479 return p;
1482 return 0;
1485 /* Look for an expression equivalent to X and with code CODE.
1486 If one is found, return that expression. */
1488 static rtx
1489 lookup_as_function (x, code)
1490 rtx x;
1491 enum rtx_code code;
1493 struct table_elt *p
1494 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1496 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1497 long as we are narrowing. So if we looked in vain for a mode narrower
1498 than word_mode before, look for word_mode now. */
1499 if (p == 0 && code == CONST_INT
1500 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1502 x = copy_rtx (x);
1503 PUT_MODE (x, word_mode);
1504 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1507 if (p == 0)
1508 return 0;
1510 for (p = p->first_same_value; p; p = p->next_same_value)
1511 if (GET_CODE (p->exp) == code
1512 /* Make sure this is a valid entry in the table. */
1513 && exp_equiv_p (p->exp, p->exp, 1, 0))
1514 return p->exp;
1516 return 0;
1519 /* Insert X in the hash table, assuming HASH is its hash code
1520 and CLASSP is an element of the class it should go in
1521 (or 0 if a new class should be made).
1522 It is inserted at the proper position to keep the class in
1523 the order cheapest first.
1525 MODE is the machine-mode of X, or if X is an integer constant
1526 with VOIDmode then MODE is the mode with which X will be used.
1528 For elements of equal cheapness, the most recent one
1529 goes in front, except that the first element in the list
1530 remains first unless a cheaper element is added. The order of
1531 pseudo-registers does not matter, as canon_reg will be called to
1532 find the cheapest when a register is retrieved from the table.
1534 The in_memory field in the hash table element is set to 0.
1535 The caller must set it nonzero if appropriate.
1537 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1538 and if insert_regs returns a nonzero value
1539 you must then recompute its hash code before calling here.
1541 If necessary, update table showing constant values of quantities. */
1543 #define CHEAPER(X, Y) \
1544 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1546 static struct table_elt *
1547 insert (x, classp, hash, mode)
1548 rtx x;
1549 struct table_elt *classp;
1550 unsigned hash;
1551 enum machine_mode mode;
1553 struct table_elt *elt;
1555 /* If X is a register and we haven't made a quantity for it,
1556 something is wrong. */
1557 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1558 abort ();
1560 /* If X is a hard register, show it is being put in the table. */
1561 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1563 unsigned int regno = REGNO (x);
1564 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1565 unsigned int i;
1567 for (i = regno; i < endregno; i++)
1568 SET_HARD_REG_BIT (hard_regs_in_table, i);
1571 /* Put an element for X into the right hash bucket. */
1573 elt = free_element_chain;
1574 if (elt)
1575 free_element_chain = elt->next_same_hash;
1576 else
1578 n_elements_made++;
1579 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1582 elt->exp = x;
1583 elt->canon_exp = NULL_RTX;
1584 elt->cost = COST (x);
1585 elt->regcost = approx_reg_cost (x);
1586 elt->next_same_value = 0;
1587 elt->prev_same_value = 0;
1588 elt->next_same_hash = table[hash];
1589 elt->prev_same_hash = 0;
1590 elt->related_value = 0;
1591 elt->in_memory = 0;
1592 elt->mode = mode;
1593 elt->is_const = (CONSTANT_P (x)
1594 /* GNU C++ takes advantage of this for `this'
1595 (and other const values). */
1596 || (GET_CODE (x) == REG
1597 && RTX_UNCHANGING_P (x)
1598 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1599 || fixed_base_plus_p (x));
1601 if (table[hash])
1602 table[hash]->prev_same_hash = elt;
1603 table[hash] = elt;
1605 /* Put it into the proper value-class. */
1606 if (classp)
1608 classp = classp->first_same_value;
1609 if (CHEAPER (elt, classp))
1610 /* Insert at the head of the class */
1612 struct table_elt *p;
1613 elt->next_same_value = classp;
1614 classp->prev_same_value = elt;
1615 elt->first_same_value = elt;
1617 for (p = classp; p; p = p->next_same_value)
1618 p->first_same_value = elt;
1620 else
1622 /* Insert not at head of the class. */
1623 /* Put it after the last element cheaper than X. */
1624 struct table_elt *p, *next;
1626 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1627 p = next);
1629 /* Put it after P and before NEXT. */
1630 elt->next_same_value = next;
1631 if (next)
1632 next->prev_same_value = elt;
1634 elt->prev_same_value = p;
1635 p->next_same_value = elt;
1636 elt->first_same_value = classp;
1639 else
1640 elt->first_same_value = elt;
1642 /* If this is a constant being set equivalent to a register or a register
1643 being set equivalent to a constant, note the constant equivalence.
1645 If this is a constant, it cannot be equivalent to a different constant,
1646 and a constant is the only thing that can be cheaper than a register. So
1647 we know the register is the head of the class (before the constant was
1648 inserted).
1650 If this is a register that is not already known equivalent to a
1651 constant, we must check the entire class.
1653 If this is a register that is already known equivalent to an insn,
1654 update the qtys `const_insn' to show that `this_insn' is the latest
1655 insn making that quantity equivalent to the constant. */
1657 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1658 && GET_CODE (x) != REG)
1660 int exp_q = REG_QTY (REGNO (classp->exp));
1661 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1663 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1664 exp_ent->const_insn = this_insn;
1667 else if (GET_CODE (x) == REG
1668 && classp
1669 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1670 && ! elt->is_const)
1672 struct table_elt *p;
1674 for (p = classp; p != 0; p = p->next_same_value)
1676 if (p->is_const && GET_CODE (p->exp) != REG)
1678 int x_q = REG_QTY (REGNO (x));
1679 struct qty_table_elem *x_ent = &qty_table[x_q];
1681 x_ent->const_rtx
1682 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1683 x_ent->const_insn = this_insn;
1684 break;
1689 else if (GET_CODE (x) == REG
1690 && qty_table[REG_QTY (REGNO (x))].const_rtx
1691 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1692 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1694 /* If this is a constant with symbolic value,
1695 and it has a term with an explicit integer value,
1696 link it up with related expressions. */
1697 if (GET_CODE (x) == CONST)
1699 rtx subexp = get_related_value (x);
1700 unsigned subhash;
1701 struct table_elt *subelt, *subelt_prev;
1703 if (subexp != 0)
1705 /* Get the integer-free subexpression in the hash table. */
1706 subhash = safe_hash (subexp, mode) & HASH_MASK;
1707 subelt = lookup (subexp, subhash, mode);
1708 if (subelt == 0)
1709 subelt = insert (subexp, NULL, subhash, mode);
1710 /* Initialize SUBELT's circular chain if it has none. */
1711 if (subelt->related_value == 0)
1712 subelt->related_value = subelt;
1713 /* Find the element in the circular chain that precedes SUBELT. */
1714 subelt_prev = subelt;
1715 while (subelt_prev->related_value != subelt)
1716 subelt_prev = subelt_prev->related_value;
1717 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1718 This way the element that follows SUBELT is the oldest one. */
1719 elt->related_value = subelt_prev->related_value;
1720 subelt_prev->related_value = elt;
1724 return elt;
1727 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1728 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1729 the two classes equivalent.
1731 CLASS1 will be the surviving class; CLASS2 should not be used after this
1732 call.
1734 Any invalid entries in CLASS2 will not be copied. */
1736 static void
1737 merge_equiv_classes (class1, class2)
1738 struct table_elt *class1, *class2;
1740 struct table_elt *elt, *next, *new;
1742 /* Ensure we start with the head of the classes. */
1743 class1 = class1->first_same_value;
1744 class2 = class2->first_same_value;
1746 /* If they were already equal, forget it. */
1747 if (class1 == class2)
1748 return;
1750 for (elt = class2; elt; elt = next)
1752 unsigned int hash;
1753 rtx exp = elt->exp;
1754 enum machine_mode mode = elt->mode;
1756 next = elt->next_same_value;
1758 /* Remove old entry, make a new one in CLASS1's class.
1759 Don't do this for invalid entries as we cannot find their
1760 hash code (it also isn't necessary). */
1761 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1763 hash_arg_in_memory = 0;
1764 hash = HASH (exp, mode);
1766 if (GET_CODE (exp) == REG)
1767 delete_reg_equiv (REGNO (exp));
1769 remove_from_table (elt, hash);
1771 if (insert_regs (exp, class1, 0))
1773 rehash_using_reg (exp);
1774 hash = HASH (exp, mode);
1776 new = insert (exp, class1, hash, mode);
1777 new->in_memory = hash_arg_in_memory;
1782 /* Flush the entire hash table. */
1784 static void
1785 flush_hash_table ()
1787 int i;
1788 struct table_elt *p;
1790 for (i = 0; i < HASH_SIZE; i++)
1791 for (p = table[i]; p; p = table[i])
1793 /* Note that invalidate can remove elements
1794 after P in the current hash chain. */
1795 if (GET_CODE (p->exp) == REG)
1796 invalidate (p->exp, p->mode);
1797 else
1798 remove_from_table (p, i);
1802 /* Function called for each rtx to check whether true dependence exist. */
1803 struct check_dependence_data
1805 enum machine_mode mode;
1806 rtx exp;
1809 static int
1810 check_dependence (x, data)
1811 rtx *x;
1812 void *data;
1814 struct check_dependence_data *d = (struct check_dependence_data *) data;
1815 if (*x && GET_CODE (*x) == MEM)
1816 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1817 else
1818 return 0;
1821 /* Remove from the hash table, or mark as invalid, all expressions whose
1822 values could be altered by storing in X. X is a register, a subreg, or
1823 a memory reference with nonvarying address (because, when a memory
1824 reference with a varying address is stored in, all memory references are
1825 removed by invalidate_memory so specific invalidation is superfluous).
1826 FULL_MODE, if not VOIDmode, indicates that this much should be
1827 invalidated instead of just the amount indicated by the mode of X. This
1828 is only used for bitfield stores into memory.
1830 A nonvarying address may be just a register or just a symbol reference,
1831 or it may be either of those plus a numeric offset. */
1833 static void
1834 invalidate (x, full_mode)
1835 rtx x;
1836 enum machine_mode full_mode;
1838 int i;
1839 struct table_elt *p;
1841 switch (GET_CODE (x))
1843 case REG:
1845 /* If X is a register, dependencies on its contents are recorded
1846 through the qty number mechanism. Just change the qty number of
1847 the register, mark it as invalid for expressions that refer to it,
1848 and remove it itself. */
1849 unsigned int regno = REGNO (x);
1850 unsigned int hash = HASH (x, GET_MODE (x));
1852 /* Remove REGNO from any quantity list it might be on and indicate
1853 that its value might have changed. If it is a pseudo, remove its
1854 entry from the hash table.
1856 For a hard register, we do the first two actions above for any
1857 additional hard registers corresponding to X. Then, if any of these
1858 registers are in the table, we must remove any REG entries that
1859 overlap these registers. */
1861 delete_reg_equiv (regno);
1862 REG_TICK (regno)++;
1863 SUBREG_TICKED (regno) = -1;
1865 if (regno >= FIRST_PSEUDO_REGISTER)
1867 /* Because a register can be referenced in more than one mode,
1868 we might have to remove more than one table entry. */
1869 struct table_elt *elt;
1871 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1872 remove_from_table (elt, hash);
1874 else
1876 HOST_WIDE_INT in_table
1877 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1878 unsigned int endregno
1879 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1880 unsigned int tregno, tendregno, rn;
1881 struct table_elt *p, *next;
1883 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1885 for (rn = regno + 1; rn < endregno; rn++)
1887 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1888 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1889 delete_reg_equiv (rn);
1890 REG_TICK (rn)++;
1891 SUBREG_TICKED (rn) = -1;
1894 if (in_table)
1895 for (hash = 0; hash < HASH_SIZE; hash++)
1896 for (p = table[hash]; p; p = next)
1898 next = p->next_same_hash;
1900 if (GET_CODE (p->exp) != REG
1901 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1902 continue;
1904 tregno = REGNO (p->exp);
1905 tendregno
1906 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1907 if (tendregno > regno && tregno < endregno)
1908 remove_from_table (p, hash);
1912 return;
1914 case SUBREG:
1915 invalidate (SUBREG_REG (x), VOIDmode);
1916 return;
1918 case PARALLEL:
1919 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1920 invalidate (XVECEXP (x, 0, i), VOIDmode);
1921 return;
1923 case EXPR_LIST:
1924 /* This is part of a disjoint return value; extract the location in
1925 question ignoring the offset. */
1926 invalidate (XEXP (x, 0), VOIDmode);
1927 return;
1929 case MEM:
1930 /* Calculate the canonical version of X here so that
1931 true_dependence doesn't generate new RTL for X on each call. */
1932 x = canon_rtx (x);
1934 /* Remove all hash table elements that refer to overlapping pieces of
1935 memory. */
1936 if (full_mode == VOIDmode)
1937 full_mode = GET_MODE (x);
1939 for (i = 0; i < HASH_SIZE; i++)
1941 struct table_elt *next;
1943 for (p = table[i]; p; p = next)
1945 next = p->next_same_hash;
1946 if (p->in_memory)
1948 struct check_dependence_data d;
1950 /* Just canonicalize the expression once;
1951 otherwise each time we call invalidate
1952 true_dependence will canonicalize the
1953 expression again. */
1954 if (!p->canon_exp)
1955 p->canon_exp = canon_rtx (p->exp);
1956 d.exp = x;
1957 d.mode = full_mode;
1958 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1959 remove_from_table (p, i);
1963 return;
1965 default:
1966 abort ();
1970 /* Remove all expressions that refer to register REGNO,
1971 since they are already invalid, and we are about to
1972 mark that register valid again and don't want the old
1973 expressions to reappear as valid. */
1975 static void
1976 remove_invalid_refs (regno)
1977 unsigned int regno;
1979 unsigned int i;
1980 struct table_elt *p, *next;
1982 for (i = 0; i < HASH_SIZE; i++)
1983 for (p = table[i]; p; p = next)
1985 next = p->next_same_hash;
1986 if (GET_CODE (p->exp) != REG
1987 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1988 remove_from_table (p, i);
1992 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1993 and mode MODE. */
1994 static void
1995 remove_invalid_subreg_refs (regno, offset, mode)
1996 unsigned int regno;
1997 unsigned int offset;
1998 enum machine_mode mode;
2000 unsigned int i;
2001 struct table_elt *p, *next;
2002 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2004 for (i = 0; i < HASH_SIZE; i++)
2005 for (p = table[i]; p; p = next)
2007 rtx exp = p->exp;
2008 next = p->next_same_hash;
2010 if (GET_CODE (exp) != REG
2011 && (GET_CODE (exp) != SUBREG
2012 || GET_CODE (SUBREG_REG (exp)) != REG
2013 || REGNO (SUBREG_REG (exp)) != regno
2014 || (((SUBREG_BYTE (exp)
2015 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2016 && SUBREG_BYTE (exp) <= end))
2017 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2018 remove_from_table (p, i);
2022 /* Recompute the hash codes of any valid entries in the hash table that
2023 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2025 This is called when we make a jump equivalence. */
2027 static void
2028 rehash_using_reg (x)
2029 rtx x;
2031 unsigned int i;
2032 struct table_elt *p, *next;
2033 unsigned hash;
2035 if (GET_CODE (x) == SUBREG)
2036 x = SUBREG_REG (x);
2038 /* If X is not a register or if the register is known not to be in any
2039 valid entries in the table, we have no work to do. */
2041 if (GET_CODE (x) != REG
2042 || REG_IN_TABLE (REGNO (x)) < 0
2043 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2044 return;
2046 /* Scan all hash chains looking for valid entries that mention X.
2047 If we find one and it is in the wrong hash chain, move it. We can skip
2048 objects that are registers, since they are handled specially. */
2050 for (i = 0; i < HASH_SIZE; i++)
2051 for (p = table[i]; p; p = next)
2053 next = p->next_same_hash;
2054 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2055 && exp_equiv_p (p->exp, p->exp, 1, 0)
2056 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2058 if (p->next_same_hash)
2059 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2061 if (p->prev_same_hash)
2062 p->prev_same_hash->next_same_hash = p->next_same_hash;
2063 else
2064 table[i] = p->next_same_hash;
2066 p->next_same_hash = table[hash];
2067 p->prev_same_hash = 0;
2068 if (table[hash])
2069 table[hash]->prev_same_hash = p;
2070 table[hash] = p;
2075 /* Remove from the hash table any expression that is a call-clobbered
2076 register. Also update their TICK values. */
2078 static void
2079 invalidate_for_call ()
2081 unsigned int regno, endregno;
2082 unsigned int i;
2083 unsigned hash;
2084 struct table_elt *p, *next;
2085 int in_table = 0;
2087 /* Go through all the hard registers. For each that is clobbered in
2088 a CALL_INSN, remove the register from quantity chains and update
2089 reg_tick if defined. Also see if any of these registers is currently
2090 in the table. */
2092 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2093 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2095 delete_reg_equiv (regno);
2096 if (REG_TICK (regno) >= 0)
2098 REG_TICK (regno)++;
2099 SUBREG_TICKED (regno) = -1;
2102 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2105 /* In the case where we have no call-clobbered hard registers in the
2106 table, we are done. Otherwise, scan the table and remove any
2107 entry that overlaps a call-clobbered register. */
2109 if (in_table)
2110 for (hash = 0; hash < HASH_SIZE; hash++)
2111 for (p = table[hash]; p; p = next)
2113 next = p->next_same_hash;
2115 if (GET_CODE (p->exp) != REG
2116 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2117 continue;
2119 regno = REGNO (p->exp);
2120 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2122 for (i = regno; i < endregno; i++)
2123 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2125 remove_from_table (p, hash);
2126 break;
2131 /* Given an expression X of type CONST,
2132 and ELT which is its table entry (or 0 if it
2133 is not in the hash table),
2134 return an alternate expression for X as a register plus integer.
2135 If none can be found, return 0. */
2137 static rtx
2138 use_related_value (x, elt)
2139 rtx x;
2140 struct table_elt *elt;
2142 struct table_elt *relt = 0;
2143 struct table_elt *p, *q;
2144 HOST_WIDE_INT offset;
2146 /* First, is there anything related known?
2147 If we have a table element, we can tell from that.
2148 Otherwise, must look it up. */
2150 if (elt != 0 && elt->related_value != 0)
2151 relt = elt;
2152 else if (elt == 0 && GET_CODE (x) == CONST)
2154 rtx subexp = get_related_value (x);
2155 if (subexp != 0)
2156 relt = lookup (subexp,
2157 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2158 GET_MODE (subexp));
2161 if (relt == 0)
2162 return 0;
2164 /* Search all related table entries for one that has an
2165 equivalent register. */
2167 p = relt;
2168 while (1)
2170 /* This loop is strange in that it is executed in two different cases.
2171 The first is when X is already in the table. Then it is searching
2172 the RELATED_VALUE list of X's class (RELT). The second case is when
2173 X is not in the table. Then RELT points to a class for the related
2174 value.
2176 Ensure that, whatever case we are in, that we ignore classes that have
2177 the same value as X. */
2179 if (rtx_equal_p (x, p->exp))
2180 q = 0;
2181 else
2182 for (q = p->first_same_value; q; q = q->next_same_value)
2183 if (GET_CODE (q->exp) == REG)
2184 break;
2186 if (q)
2187 break;
2189 p = p->related_value;
2191 /* We went all the way around, so there is nothing to be found.
2192 Alternatively, perhaps RELT was in the table for some other reason
2193 and it has no related values recorded. */
2194 if (p == relt || p == 0)
2195 break;
2198 if (q == 0)
2199 return 0;
2201 offset = (get_integer_term (x) - get_integer_term (p->exp));
2202 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2203 return plus_constant (q->exp, offset);
2206 /* Hash a string. Just add its bytes up. */
2207 static inline unsigned
2208 canon_hash_string (ps)
2209 const char *ps;
2211 unsigned hash = 0;
2212 const unsigned char *p = (const unsigned char *) ps;
2214 if (p)
2215 while (*p)
2216 hash += *p++;
2218 return hash;
2221 /* Hash an rtx. We are careful to make sure the value is never negative.
2222 Equivalent registers hash identically.
2223 MODE is used in hashing for CONST_INTs only;
2224 otherwise the mode of X is used.
2226 Store 1 in do_not_record if any subexpression is volatile.
2228 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2229 which does not have the RTX_UNCHANGING_P bit set.
2231 Note that cse_insn knows that the hash code of a MEM expression
2232 is just (int) MEM plus the hash code of the address. */
2234 static unsigned
2235 canon_hash (x, mode)
2236 rtx x;
2237 enum machine_mode mode;
2239 int i, j;
2240 unsigned hash = 0;
2241 enum rtx_code code;
2242 const char *fmt;
2244 /* repeat is used to turn tail-recursion into iteration. */
2245 repeat:
2246 if (x == 0)
2247 return hash;
2249 code = GET_CODE (x);
2250 switch (code)
2252 case REG:
2254 unsigned int regno = REGNO (x);
2255 bool record;
2257 /* On some machines, we can't record any non-fixed hard register,
2258 because extending its life will cause reload problems. We
2259 consider ap, fp, sp, gp to be fixed for this purpose.
2261 We also consider CCmode registers to be fixed for this purpose;
2262 failure to do so leads to failure to simplify 0<100 type of
2263 conditionals.
2265 On all machines, we can't record any global registers.
2266 Nor should we record any register that is in a small
2267 class, as defined by CLASS_LIKELY_SPILLED_P. */
2269 if (regno >= FIRST_PSEUDO_REGISTER)
2270 record = true;
2271 else if (x == frame_pointer_rtx
2272 || x == hard_frame_pointer_rtx
2273 || x == arg_pointer_rtx
2274 || x == stack_pointer_rtx
2275 || x == pic_offset_table_rtx)
2276 record = true;
2277 else if (global_regs[regno])
2278 record = false;
2279 else if (fixed_regs[regno])
2280 record = true;
2281 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2282 record = true;
2283 else if (SMALL_REGISTER_CLASSES)
2284 record = false;
2285 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2286 record = false;
2287 else
2288 record = true;
2290 if (!record)
2292 do_not_record = 1;
2293 return 0;
2296 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2297 return hash;
2300 /* We handle SUBREG of a REG specially because the underlying
2301 reg changes its hash value with every value change; we don't
2302 want to have to forget unrelated subregs when one subreg changes. */
2303 case SUBREG:
2305 if (GET_CODE (SUBREG_REG (x)) == REG)
2307 hash += (((unsigned) SUBREG << 7)
2308 + REGNO (SUBREG_REG (x))
2309 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2310 return hash;
2312 break;
2315 case CONST_INT:
2317 unsigned HOST_WIDE_INT tem = INTVAL (x);
2318 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2319 return hash;
2322 case CONST_DOUBLE:
2323 /* This is like the general case, except that it only counts
2324 the integers representing the constant. */
2325 hash += (unsigned) code + (unsigned) GET_MODE (x);
2326 if (GET_MODE (x) != VOIDmode)
2327 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2328 else
2329 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2330 + (unsigned) CONST_DOUBLE_HIGH (x));
2331 return hash;
2333 case CONST_VECTOR:
2335 int units;
2336 rtx elt;
2338 units = CONST_VECTOR_NUNITS (x);
2340 for (i = 0; i < units; ++i)
2342 elt = CONST_VECTOR_ELT (x, i);
2343 hash += canon_hash (elt, GET_MODE (elt));
2346 return hash;
2349 /* Assume there is only one rtx object for any given label. */
2350 case LABEL_REF:
2351 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2352 return hash;
2354 case SYMBOL_REF:
2355 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2356 return hash;
2358 case MEM:
2359 /* We don't record if marked volatile or if BLKmode since we don't
2360 know the size of the move. */
2361 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2363 do_not_record = 1;
2364 return 0;
2366 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2367 hash_arg_in_memory = 1;
2369 /* Now that we have already found this special case,
2370 might as well speed it up as much as possible. */
2371 hash += (unsigned) MEM;
2372 x = XEXP (x, 0);
2373 goto repeat;
2375 case USE:
2376 /* A USE that mentions non-volatile memory needs special
2377 handling since the MEM may be BLKmode which normally
2378 prevents an entry from being made. Pure calls are
2379 marked by a USE which mentions BLKmode memory. */
2380 if (GET_CODE (XEXP (x, 0)) == MEM
2381 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2383 hash += (unsigned) USE;
2384 x = XEXP (x, 0);
2386 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2387 hash_arg_in_memory = 1;
2389 /* Now that we have already found this special case,
2390 might as well speed it up as much as possible. */
2391 hash += (unsigned) MEM;
2392 x = XEXP (x, 0);
2393 goto repeat;
2395 break;
2397 case PRE_DEC:
2398 case PRE_INC:
2399 case POST_DEC:
2400 case POST_INC:
2401 case PRE_MODIFY:
2402 case POST_MODIFY:
2403 case PC:
2404 case CC0:
2405 case CALL:
2406 case UNSPEC_VOLATILE:
2407 do_not_record = 1;
2408 return 0;
2410 case ASM_OPERANDS:
2411 if (MEM_VOLATILE_P (x))
2413 do_not_record = 1;
2414 return 0;
2416 else
2418 /* We don't want to take the filename and line into account. */
2419 hash += (unsigned) code + (unsigned) GET_MODE (x)
2420 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2421 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2422 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2424 if (ASM_OPERANDS_INPUT_LENGTH (x))
2426 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2428 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2429 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2430 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2431 (x, i)));
2434 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2435 x = ASM_OPERANDS_INPUT (x, 0);
2436 mode = GET_MODE (x);
2437 goto repeat;
2440 return hash;
2442 break;
2444 default:
2445 break;
2448 i = GET_RTX_LENGTH (code) - 1;
2449 hash += (unsigned) code + (unsigned) GET_MODE (x);
2450 fmt = GET_RTX_FORMAT (code);
2451 for (; i >= 0; i--)
2453 if (fmt[i] == 'e')
2455 rtx tem = XEXP (x, i);
2457 /* If we are about to do the last recursive call
2458 needed at this level, change it into iteration.
2459 This function is called enough to be worth it. */
2460 if (i == 0)
2462 x = tem;
2463 goto repeat;
2465 hash += canon_hash (tem, 0);
2467 else if (fmt[i] == 'E')
2468 for (j = 0; j < XVECLEN (x, i); j++)
2469 hash += canon_hash (XVECEXP (x, i, j), 0);
2470 else if (fmt[i] == 's')
2471 hash += canon_hash_string (XSTR (x, i));
2472 else if (fmt[i] == 'i')
2474 unsigned tem = XINT (x, i);
2475 hash += tem;
2477 else if (fmt[i] == '0' || fmt[i] == 't')
2478 /* Unused. */
2480 else
2481 abort ();
2483 return hash;
2486 /* Like canon_hash but with no side effects. */
2488 static unsigned
2489 safe_hash (x, mode)
2490 rtx x;
2491 enum machine_mode mode;
2493 int save_do_not_record = do_not_record;
2494 int save_hash_arg_in_memory = hash_arg_in_memory;
2495 unsigned hash = canon_hash (x, mode);
2496 hash_arg_in_memory = save_hash_arg_in_memory;
2497 do_not_record = save_do_not_record;
2498 return hash;
2501 /* Return 1 iff X and Y would canonicalize into the same thing,
2502 without actually constructing the canonicalization of either one.
2503 If VALIDATE is nonzero,
2504 we assume X is an expression being processed from the rtl
2505 and Y was found in the hash table. We check register refs
2506 in Y for being marked as valid.
2508 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2509 that is known to be in the register. Ordinarily, we don't allow them
2510 to match, because letting them match would cause unpredictable results
2511 in all the places that search a hash table chain for an equivalent
2512 for a given value. A possible equivalent that has different structure
2513 has its hash code computed from different data. Whether the hash code
2514 is the same as that of the given value is pure luck. */
2516 static int
2517 exp_equiv_p (x, y, validate, equal_values)
2518 rtx x, y;
2519 int validate;
2520 int equal_values;
2522 int i, j;
2523 enum rtx_code code;
2524 const char *fmt;
2526 /* Note: it is incorrect to assume an expression is equivalent to itself
2527 if VALIDATE is nonzero. */
2528 if (x == y && !validate)
2529 return 1;
2530 if (x == 0 || y == 0)
2531 return x == y;
2533 code = GET_CODE (x);
2534 if (code != GET_CODE (y))
2536 if (!equal_values)
2537 return 0;
2539 /* If X is a constant and Y is a register or vice versa, they may be
2540 equivalent. We only have to validate if Y is a register. */
2541 if (CONSTANT_P (x) && GET_CODE (y) == REG
2542 && REGNO_QTY_VALID_P (REGNO (y)))
2544 int y_q = REG_QTY (REGNO (y));
2545 struct qty_table_elem *y_ent = &qty_table[y_q];
2547 if (GET_MODE (y) == y_ent->mode
2548 && rtx_equal_p (x, y_ent->const_rtx)
2549 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2550 return 1;
2553 if (CONSTANT_P (y) && code == REG
2554 && REGNO_QTY_VALID_P (REGNO (x)))
2556 int x_q = REG_QTY (REGNO (x));
2557 struct qty_table_elem *x_ent = &qty_table[x_q];
2559 if (GET_MODE (x) == x_ent->mode
2560 && rtx_equal_p (y, x_ent->const_rtx))
2561 return 1;
2564 return 0;
2567 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2568 if (GET_MODE (x) != GET_MODE (y))
2569 return 0;
2571 switch (code)
2573 case PC:
2574 case CC0:
2575 case CONST_INT:
2576 return x == y;
2578 case LABEL_REF:
2579 return XEXP (x, 0) == XEXP (y, 0);
2581 case SYMBOL_REF:
2582 return XSTR (x, 0) == XSTR (y, 0);
2584 case REG:
2586 unsigned int regno = REGNO (y);
2587 unsigned int endregno
2588 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2589 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2590 unsigned int i;
2592 /* If the quantities are not the same, the expressions are not
2593 equivalent. If there are and we are not to validate, they
2594 are equivalent. Otherwise, ensure all regs are up-to-date. */
2596 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2597 return 0;
2599 if (! validate)
2600 return 1;
2602 for (i = regno; i < endregno; i++)
2603 if (REG_IN_TABLE (i) != REG_TICK (i))
2604 return 0;
2606 return 1;
2609 /* For commutative operations, check both orders. */
2610 case PLUS:
2611 case MULT:
2612 case AND:
2613 case IOR:
2614 case XOR:
2615 case NE:
2616 case EQ:
2617 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2618 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2619 validate, equal_values))
2620 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2621 validate, equal_values)
2622 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2623 validate, equal_values)));
2625 case ASM_OPERANDS:
2626 /* We don't use the generic code below because we want to
2627 disregard filename and line numbers. */
2629 /* A volatile asm isn't equivalent to any other. */
2630 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2631 return 0;
2633 if (GET_MODE (x) != GET_MODE (y)
2634 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2635 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2636 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2637 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2638 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2639 return 0;
2641 if (ASM_OPERANDS_INPUT_LENGTH (x))
2643 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2644 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2645 ASM_OPERANDS_INPUT (y, i),
2646 validate, equal_values)
2647 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2648 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2649 return 0;
2652 return 1;
2654 default:
2655 break;
2658 /* Compare the elements. If any pair of corresponding elements
2659 fail to match, return 0 for the whole things. */
2661 fmt = GET_RTX_FORMAT (code);
2662 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2664 switch (fmt[i])
2666 case 'e':
2667 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2668 return 0;
2669 break;
2671 case 'E':
2672 if (XVECLEN (x, i) != XVECLEN (y, i))
2673 return 0;
2674 for (j = 0; j < XVECLEN (x, i); j++)
2675 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2676 validate, equal_values))
2677 return 0;
2678 break;
2680 case 's':
2681 if (strcmp (XSTR (x, i), XSTR (y, i)))
2682 return 0;
2683 break;
2685 case 'i':
2686 if (XINT (x, i) != XINT (y, i))
2687 return 0;
2688 break;
2690 case 'w':
2691 if (XWINT (x, i) != XWINT (y, i))
2692 return 0;
2693 break;
2695 case '0':
2696 case 't':
2697 break;
2699 default:
2700 abort ();
2704 return 1;
2707 /* Return 1 if X has a value that can vary even between two
2708 executions of the program. 0 means X can be compared reliably
2709 against certain constants or near-constants. */
2711 static int
2712 cse_rtx_varies_p (x, from_alias)
2713 rtx x;
2714 int from_alias;
2716 /* We need not check for X and the equivalence class being of the same
2717 mode because if X is equivalent to a constant in some mode, it
2718 doesn't vary in any mode. */
2720 if (GET_CODE (x) == REG
2721 && REGNO_QTY_VALID_P (REGNO (x)))
2723 int x_q = REG_QTY (REGNO (x));
2724 struct qty_table_elem *x_ent = &qty_table[x_q];
2726 if (GET_MODE (x) == x_ent->mode
2727 && x_ent->const_rtx != NULL_RTX)
2728 return 0;
2731 if (GET_CODE (x) == PLUS
2732 && GET_CODE (XEXP (x, 1)) == CONST_INT
2733 && GET_CODE (XEXP (x, 0)) == REG
2734 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2736 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2737 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2739 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2740 && x0_ent->const_rtx != NULL_RTX)
2741 return 0;
2744 /* This can happen as the result of virtual register instantiation, if
2745 the initial constant is too large to be a valid address. This gives
2746 us a three instruction sequence, load large offset into a register,
2747 load fp minus a constant into a register, then a MEM which is the
2748 sum of the two `constant' registers. */
2749 if (GET_CODE (x) == PLUS
2750 && GET_CODE (XEXP (x, 0)) == REG
2751 && GET_CODE (XEXP (x, 1)) == REG
2752 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2753 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2755 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2756 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2757 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2758 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2760 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2761 && x0_ent->const_rtx != NULL_RTX
2762 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2763 && x1_ent->const_rtx != NULL_RTX)
2764 return 0;
2767 return rtx_varies_p (x, from_alias);
2770 /* Canonicalize an expression:
2771 replace each register reference inside it
2772 with the "oldest" equivalent register.
2774 If INSN is nonzero and we are replacing a pseudo with a hard register
2775 or vice versa, validate_change is used to ensure that INSN remains valid
2776 after we make our substitution. The calls are made with IN_GROUP nonzero
2777 so apply_change_group must be called upon the outermost return from this
2778 function (unless INSN is zero). The result of apply_change_group can
2779 generally be discarded since the changes we are making are optional. */
2781 static rtx
2782 canon_reg (x, insn)
2783 rtx x;
2784 rtx insn;
2786 int i;
2787 enum rtx_code code;
2788 const char *fmt;
2790 if (x == 0)
2791 return x;
2793 code = GET_CODE (x);
2794 switch (code)
2796 case PC:
2797 case CC0:
2798 case CONST:
2799 case CONST_INT:
2800 case CONST_DOUBLE:
2801 case CONST_VECTOR:
2802 case SYMBOL_REF:
2803 case LABEL_REF:
2804 case ADDR_VEC:
2805 case ADDR_DIFF_VEC:
2806 return x;
2808 case REG:
2810 int first;
2811 int q;
2812 struct qty_table_elem *ent;
2814 /* Never replace a hard reg, because hard regs can appear
2815 in more than one machine mode, and we must preserve the mode
2816 of each occurrence. Also, some hard regs appear in
2817 MEMs that are shared and mustn't be altered. Don't try to
2818 replace any reg that maps to a reg of class NO_REGS. */
2819 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2820 || ! REGNO_QTY_VALID_P (REGNO (x)))
2821 return x;
2823 q = REG_QTY (REGNO (x));
2824 ent = &qty_table[q];
2825 first = ent->first_reg;
2826 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2827 : REGNO_REG_CLASS (first) == NO_REGS ? x
2828 : gen_rtx_REG (ent->mode, first));
2831 default:
2832 break;
2835 fmt = GET_RTX_FORMAT (code);
2836 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2838 int j;
2840 if (fmt[i] == 'e')
2842 rtx new = canon_reg (XEXP (x, i), insn);
2843 int insn_code;
2845 /* If replacing pseudo with hard reg or vice versa, ensure the
2846 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2847 if (insn != 0 && new != 0
2848 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2849 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2850 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2851 || (insn_code = recog_memoized (insn)) < 0
2852 || insn_data[insn_code].n_dups > 0))
2853 validate_change (insn, &XEXP (x, i), new, 1);
2854 else
2855 XEXP (x, i) = new;
2857 else if (fmt[i] == 'E')
2858 for (j = 0; j < XVECLEN (x, i); j++)
2859 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2862 return x;
2865 /* LOC is a location within INSN that is an operand address (the contents of
2866 a MEM). Find the best equivalent address to use that is valid for this
2867 insn.
2869 On most CISC machines, complicated address modes are costly, and rtx_cost
2870 is a good approximation for that cost. However, most RISC machines have
2871 only a few (usually only one) memory reference formats. If an address is
2872 valid at all, it is often just as cheap as any other address. Hence, for
2873 RISC machines, we use `address_cost' to compare the costs of various
2874 addresses. For two addresses of equal cost, choose the one with the
2875 highest `rtx_cost' value as that has the potential of eliminating the
2876 most insns. For equal costs, we choose the first in the equivalence
2877 class. Note that we ignore the fact that pseudo registers are cheaper than
2878 hard registers here because we would also prefer the pseudo registers. */
2880 static void
2881 find_best_addr (insn, loc, mode)
2882 rtx insn;
2883 rtx *loc;
2884 enum machine_mode mode;
2886 struct table_elt *elt;
2887 rtx addr = *loc;
2888 struct table_elt *p;
2889 int found_better = 1;
2890 int save_do_not_record = do_not_record;
2891 int save_hash_arg_in_memory = hash_arg_in_memory;
2892 int addr_volatile;
2893 int regno;
2894 unsigned hash;
2896 /* Do not try to replace constant addresses or addresses of local and
2897 argument slots. These MEM expressions are made only once and inserted
2898 in many instructions, as well as being used to control symbol table
2899 output. It is not safe to clobber them.
2901 There are some uncommon cases where the address is already in a register
2902 for some reason, but we cannot take advantage of that because we have
2903 no easy way to unshare the MEM. In addition, looking up all stack
2904 addresses is costly. */
2905 if ((GET_CODE (addr) == PLUS
2906 && GET_CODE (XEXP (addr, 0)) == REG
2907 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2908 && (regno = REGNO (XEXP (addr, 0)),
2909 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2910 || regno == ARG_POINTER_REGNUM))
2911 || (GET_CODE (addr) == REG
2912 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2913 || regno == HARD_FRAME_POINTER_REGNUM
2914 || regno == ARG_POINTER_REGNUM))
2915 || GET_CODE (addr) == ADDRESSOF
2916 || CONSTANT_ADDRESS_P (addr))
2917 return;
2919 /* If this address is not simply a register, try to fold it. This will
2920 sometimes simplify the expression. Many simplifications
2921 will not be valid, but some, usually applying the associative rule, will
2922 be valid and produce better code. */
2923 if (GET_CODE (addr) != REG)
2925 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2926 int addr_folded_cost = address_cost (folded, mode);
2927 int addr_cost = address_cost (addr, mode);
2929 if ((addr_folded_cost < addr_cost
2930 || (addr_folded_cost == addr_cost
2931 /* ??? The rtx_cost comparison is left over from an older
2932 version of this code. It is probably no longer helpful. */
2933 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2934 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2935 && validate_change (insn, loc, folded, 0))
2936 addr = folded;
2939 /* If this address is not in the hash table, we can't look for equivalences
2940 of the whole address. Also, ignore if volatile. */
2942 do_not_record = 0;
2943 hash = HASH (addr, Pmode);
2944 addr_volatile = do_not_record;
2945 do_not_record = save_do_not_record;
2946 hash_arg_in_memory = save_hash_arg_in_memory;
2948 if (addr_volatile)
2949 return;
2951 elt = lookup (addr, hash, Pmode);
2953 if (elt)
2955 /* We need to find the best (under the criteria documented above) entry
2956 in the class that is valid. We use the `flag' field to indicate
2957 choices that were invalid and iterate until we can't find a better
2958 one that hasn't already been tried. */
2960 for (p = elt->first_same_value; p; p = p->next_same_value)
2961 p->flag = 0;
2963 while (found_better)
2965 int best_addr_cost = address_cost (*loc, mode);
2966 int best_rtx_cost = (elt->cost + 1) >> 1;
2967 int exp_cost;
2968 struct table_elt *best_elt = elt;
2970 found_better = 0;
2971 for (p = elt->first_same_value; p; p = p->next_same_value)
2972 if (! p->flag)
2974 if ((GET_CODE (p->exp) == REG
2975 || exp_equiv_p (p->exp, p->exp, 1, 0))
2976 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2977 || (exp_cost == best_addr_cost
2978 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2980 found_better = 1;
2981 best_addr_cost = exp_cost;
2982 best_rtx_cost = (p->cost + 1) >> 1;
2983 best_elt = p;
2987 if (found_better)
2989 if (validate_change (insn, loc,
2990 canon_reg (copy_rtx (best_elt->exp),
2991 NULL_RTX), 0))
2992 return;
2993 else
2994 best_elt->flag = 1;
2999 /* If the address is a binary operation with the first operand a register
3000 and the second a constant, do the same as above, but looking for
3001 equivalences of the register. Then try to simplify before checking for
3002 the best address to use. This catches a few cases: First is when we
3003 have REG+const and the register is another REG+const. We can often merge
3004 the constants and eliminate one insn and one register. It may also be
3005 that a machine has a cheap REG+REG+const. Finally, this improves the
3006 code on the Alpha for unaligned byte stores. */
3008 if (flag_expensive_optimizations
3009 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3010 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3011 && GET_CODE (XEXP (*loc, 0)) == REG
3012 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3014 rtx c = XEXP (*loc, 1);
3016 do_not_record = 0;
3017 hash = HASH (XEXP (*loc, 0), Pmode);
3018 do_not_record = save_do_not_record;
3019 hash_arg_in_memory = save_hash_arg_in_memory;
3021 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3022 if (elt == 0)
3023 return;
3025 /* We need to find the best (under the criteria documented above) entry
3026 in the class that is valid. We use the `flag' field to indicate
3027 choices that were invalid and iterate until we can't find a better
3028 one that hasn't already been tried. */
3030 for (p = elt->first_same_value; p; p = p->next_same_value)
3031 p->flag = 0;
3033 while (found_better)
3035 int best_addr_cost = address_cost (*loc, mode);
3036 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3037 struct table_elt *best_elt = elt;
3038 rtx best_rtx = *loc;
3039 int count;
3041 /* This is at worst case an O(n^2) algorithm, so limit our search
3042 to the first 32 elements on the list. This avoids trouble
3043 compiling code with very long basic blocks that can easily
3044 call simplify_gen_binary so many times that we run out of
3045 memory. */
3047 found_better = 0;
3048 for (p = elt->first_same_value, count = 0;
3049 p && count < 32;
3050 p = p->next_same_value, count++)
3051 if (! p->flag
3052 && (GET_CODE (p->exp) == REG
3053 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3055 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3056 p->exp, c);
3057 int new_cost;
3058 new_cost = address_cost (new, mode);
3060 if (new_cost < best_addr_cost
3061 || (new_cost == best_addr_cost
3062 && (COST (new) + 1) >> 1 > best_rtx_cost))
3064 found_better = 1;
3065 best_addr_cost = new_cost;
3066 best_rtx_cost = (COST (new) + 1) >> 1;
3067 best_elt = p;
3068 best_rtx = new;
3072 if (found_better)
3074 if (validate_change (insn, loc,
3075 canon_reg (copy_rtx (best_rtx),
3076 NULL_RTX), 0))
3077 return;
3078 else
3079 best_elt->flag = 1;
3085 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3086 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3087 what values are being compared.
3089 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3090 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3091 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3092 compared to produce cc0.
3094 The return value is the comparison operator and is either the code of
3095 A or the code corresponding to the inverse of the comparison. */
3097 static enum rtx_code
3098 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3099 enum rtx_code code;
3100 rtx *parg1, *parg2;
3101 enum machine_mode *pmode1, *pmode2;
3103 rtx arg1, arg2;
3105 arg1 = *parg1, arg2 = *parg2;
3107 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3109 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3111 /* Set nonzero when we find something of interest. */
3112 rtx x = 0;
3113 int reverse_code = 0;
3114 struct table_elt *p = 0;
3116 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3117 On machines with CC0, this is the only case that can occur, since
3118 fold_rtx will return the COMPARE or item being compared with zero
3119 when given CC0. */
3121 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3122 x = arg1;
3124 /* If ARG1 is a comparison operator and CODE is testing for
3125 STORE_FLAG_VALUE, get the inner arguments. */
3127 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3129 #ifdef FLOAT_STORE_FLAG_VALUE
3130 REAL_VALUE_TYPE fsfv;
3131 #endif
3133 if (code == NE
3134 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3135 && code == LT && STORE_FLAG_VALUE == -1)
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3137 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3138 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3139 REAL_VALUE_NEGATIVE (fsfv)))
3140 #endif
3142 x = arg1;
3143 else if (code == EQ
3144 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3145 && code == GE && STORE_FLAG_VALUE == -1)
3146 #ifdef FLOAT_STORE_FLAG_VALUE
3147 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3148 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3149 REAL_VALUE_NEGATIVE (fsfv)))
3150 #endif
3152 x = arg1, reverse_code = 1;
3155 /* ??? We could also check for
3157 (ne (and (eq (...) (const_int 1))) (const_int 0))
3159 and related forms, but let's wait until we see them occurring. */
3161 if (x == 0)
3162 /* Look up ARG1 in the hash table and see if it has an equivalence
3163 that lets us see what is being compared. */
3164 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3165 GET_MODE (arg1));
3166 if (p)
3168 p = p->first_same_value;
3170 /* If what we compare is already known to be constant, that is as
3171 good as it gets.
3172 We need to break the loop in this case, because otherwise we
3173 can have an infinite loop when looking at a reg that is known
3174 to be a constant which is the same as a comparison of a reg
3175 against zero which appears later in the insn stream, which in
3176 turn is constant and the same as the comparison of the first reg
3177 against zero... */
3178 if (p->is_const)
3179 break;
3182 for (; p; p = p->next_same_value)
3184 enum machine_mode inner_mode = GET_MODE (p->exp);
3185 #ifdef FLOAT_STORE_FLAG_VALUE
3186 REAL_VALUE_TYPE fsfv;
3187 #endif
3189 /* If the entry isn't valid, skip it. */
3190 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3191 continue;
3193 if (GET_CODE (p->exp) == COMPARE
3194 /* Another possibility is that this machine has a compare insn
3195 that includes the comparison code. In that case, ARG1 would
3196 be equivalent to a comparison operation that would set ARG1 to
3197 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3198 ORIG_CODE is the actual comparison being done; if it is an EQ,
3199 we must reverse ORIG_CODE. On machine with a negative value
3200 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3201 || ((code == NE
3202 || (code == LT
3203 && GET_MODE_CLASS (inner_mode) == MODE_INT
3204 && (GET_MODE_BITSIZE (inner_mode)
3205 <= HOST_BITS_PER_WIDE_INT)
3206 && (STORE_FLAG_VALUE
3207 & ((HOST_WIDE_INT) 1
3208 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3209 #ifdef FLOAT_STORE_FLAG_VALUE
3210 || (code == LT
3211 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3212 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3213 REAL_VALUE_NEGATIVE (fsfv)))
3214 #endif
3216 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3218 x = p->exp;
3219 break;
3221 else if ((code == EQ
3222 || (code == GE
3223 && GET_MODE_CLASS (inner_mode) == MODE_INT
3224 && (GET_MODE_BITSIZE (inner_mode)
3225 <= HOST_BITS_PER_WIDE_INT)
3226 && (STORE_FLAG_VALUE
3227 & ((HOST_WIDE_INT) 1
3228 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3229 #ifdef FLOAT_STORE_FLAG_VALUE
3230 || (code == GE
3231 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3232 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3233 REAL_VALUE_NEGATIVE (fsfv)))
3234 #endif
3236 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3238 reverse_code = 1;
3239 x = p->exp;
3240 break;
3243 /* If this non-trapping address, e.g. fp + constant, the
3244 equivalent is a better operand since it may let us predict
3245 the value of the comparison. */
3246 else if (!rtx_addr_can_trap_p (p->exp))
3248 arg1 = p->exp;
3249 continue;
3253 /* If we didn't find a useful equivalence for ARG1, we are done.
3254 Otherwise, set up for the next iteration. */
3255 if (x == 0)
3256 break;
3258 /* If we need to reverse the comparison, make sure that that is
3259 possible -- we can't necessarily infer the value of GE from LT
3260 with floating-point operands. */
3261 if (reverse_code)
3263 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3264 if (reversed == UNKNOWN)
3265 break;
3266 else
3267 code = reversed;
3269 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3270 code = GET_CODE (x);
3271 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3274 /* Return our results. Return the modes from before fold_rtx
3275 because fold_rtx might produce const_int, and then it's too late. */
3276 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3277 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3279 return code;
3282 /* If X is a nontrivial arithmetic operation on an argument
3283 for which a constant value can be determined, return
3284 the result of operating on that value, as a constant.
3285 Otherwise, return X, possibly with one or more operands
3286 modified by recursive calls to this function.
3288 If X is a register whose contents are known, we do NOT
3289 return those contents here. equiv_constant is called to
3290 perform that task.
3292 INSN is the insn that we may be modifying. If it is 0, make a copy
3293 of X before modifying it. */
3295 static rtx
3296 fold_rtx (x, insn)
3297 rtx x;
3298 rtx insn;
3300 enum rtx_code code;
3301 enum machine_mode mode;
3302 const char *fmt;
3303 int i;
3304 rtx new = 0;
3305 int copied = 0;
3306 int must_swap = 0;
3308 /* Folded equivalents of first two operands of X. */
3309 rtx folded_arg0;
3310 rtx folded_arg1;
3312 /* Constant equivalents of first three operands of X;
3313 0 when no such equivalent is known. */
3314 rtx const_arg0;
3315 rtx const_arg1;
3316 rtx const_arg2;
3318 /* The mode of the first operand of X. We need this for sign and zero
3319 extends. */
3320 enum machine_mode mode_arg0;
3322 if (x == 0)
3323 return x;
3325 mode = GET_MODE (x);
3326 code = GET_CODE (x);
3327 switch (code)
3329 case CONST:
3330 case CONST_INT:
3331 case CONST_DOUBLE:
3332 case CONST_VECTOR:
3333 case SYMBOL_REF:
3334 case LABEL_REF:
3335 case REG:
3336 /* No use simplifying an EXPR_LIST
3337 since they are used only for lists of args
3338 in a function call's REG_EQUAL note. */
3339 case EXPR_LIST:
3340 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3341 want to (e.g.,) make (addressof (const_int 0)) just because
3342 the location is known to be zero. */
3343 case ADDRESSOF:
3344 return x;
3346 #ifdef HAVE_cc0
3347 case CC0:
3348 return prev_insn_cc0;
3349 #endif
3351 case PC:
3352 /* If the next insn is a CODE_LABEL followed by a jump table,
3353 PC's value is a LABEL_REF pointing to that label. That
3354 lets us fold switch statements on the VAX. */
3355 if (insn && GET_CODE (insn) == JUMP_INSN)
3357 rtx next = next_nonnote_insn (insn);
3359 if (next && GET_CODE (next) == CODE_LABEL
3360 && NEXT_INSN (next) != 0
3361 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3362 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3363 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3364 return gen_rtx_LABEL_REF (Pmode, next);
3366 break;
3368 case SUBREG:
3369 /* See if we previously assigned a constant value to this SUBREG. */
3370 if ((new = lookup_as_function (x, CONST_INT)) != 0
3371 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3372 return new;
3374 /* If this is a paradoxical SUBREG, we have no idea what value the
3375 extra bits would have. However, if the operand is equivalent
3376 to a SUBREG whose operand is the same as our mode, and all the
3377 modes are within a word, we can just use the inner operand
3378 because these SUBREGs just say how to treat the register.
3380 Similarly if we find an integer constant. */
3382 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3384 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3385 struct table_elt *elt;
3387 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3388 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3389 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3390 imode)) != 0)
3391 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3393 if (CONSTANT_P (elt->exp)
3394 && GET_MODE (elt->exp) == VOIDmode)
3395 return elt->exp;
3397 if (GET_CODE (elt->exp) == SUBREG
3398 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3399 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3400 return copy_rtx (SUBREG_REG (elt->exp));
3403 return x;
3406 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3407 We might be able to if the SUBREG is extracting a single word in an
3408 integral mode or extracting the low part. */
3410 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3411 const_arg0 = equiv_constant (folded_arg0);
3412 if (const_arg0)
3413 folded_arg0 = const_arg0;
3415 if (folded_arg0 != SUBREG_REG (x))
3417 new = simplify_subreg (mode, folded_arg0,
3418 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3419 if (new)
3420 return new;
3423 /* If this is a narrowing SUBREG and our operand is a REG, see if
3424 we can find an equivalence for REG that is an arithmetic operation
3425 in a wider mode where both operands are paradoxical SUBREGs
3426 from objects of our result mode. In that case, we couldn't report
3427 an equivalent value for that operation, since we don't know what the
3428 extra bits will be. But we can find an equivalence for this SUBREG
3429 by folding that operation is the narrow mode. This allows us to
3430 fold arithmetic in narrow modes when the machine only supports
3431 word-sized arithmetic.
3433 Also look for a case where we have a SUBREG whose operand is the
3434 same as our result. If both modes are smaller than a word, we
3435 are simply interpreting a register in different modes and we
3436 can use the inner value. */
3438 if (GET_CODE (folded_arg0) == REG
3439 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3440 && subreg_lowpart_p (x))
3442 struct table_elt *elt;
3444 /* We can use HASH here since we know that canon_hash won't be
3445 called. */
3446 elt = lookup (folded_arg0,
3447 HASH (folded_arg0, GET_MODE (folded_arg0)),
3448 GET_MODE (folded_arg0));
3450 if (elt)
3451 elt = elt->first_same_value;
3453 for (; elt; elt = elt->next_same_value)
3455 enum rtx_code eltcode = GET_CODE (elt->exp);
3457 /* Just check for unary and binary operations. */
3458 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3459 && GET_CODE (elt->exp) != SIGN_EXTEND
3460 && GET_CODE (elt->exp) != ZERO_EXTEND
3461 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3462 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3463 && (GET_MODE_CLASS (mode)
3464 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3466 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3468 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3469 op0 = fold_rtx (op0, NULL_RTX);
3471 op0 = equiv_constant (op0);
3472 if (op0)
3473 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3474 op0, mode);
3476 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3477 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3478 && eltcode != DIV && eltcode != MOD
3479 && eltcode != UDIV && eltcode != UMOD
3480 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3481 && eltcode != ROTATE && eltcode != ROTATERT
3482 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3483 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3484 == mode))
3485 || CONSTANT_P (XEXP (elt->exp, 0)))
3486 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3487 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3488 == mode))
3489 || CONSTANT_P (XEXP (elt->exp, 1))))
3491 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3492 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3494 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3495 op0 = fold_rtx (op0, NULL_RTX);
3497 if (op0)
3498 op0 = equiv_constant (op0);
3500 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3501 op1 = fold_rtx (op1, NULL_RTX);
3503 if (op1)
3504 op1 = equiv_constant (op1);
3506 /* If we are looking for the low SImode part of
3507 (ashift:DI c (const_int 32)), it doesn't work
3508 to compute that in SImode, because a 32-bit shift
3509 in SImode is unpredictable. We know the value is 0. */
3510 if (op0 && op1
3511 && GET_CODE (elt->exp) == ASHIFT
3512 && GET_CODE (op1) == CONST_INT
3513 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3515 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3517 /* If the count fits in the inner mode's width,
3518 but exceeds the outer mode's width,
3519 the value will get truncated to 0
3520 by the subreg. */
3521 new = const0_rtx;
3522 else
3523 /* If the count exceeds even the inner mode's width,
3524 don't fold this expression. */
3525 new = 0;
3527 else if (op0 && op1)
3528 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3529 op0, op1);
3532 else if (GET_CODE (elt->exp) == SUBREG
3533 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3534 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3535 <= UNITS_PER_WORD)
3536 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3537 new = copy_rtx (SUBREG_REG (elt->exp));
3539 if (new)
3540 return new;
3544 return x;
3546 case NOT:
3547 case NEG:
3548 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3549 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3550 new = lookup_as_function (XEXP (x, 0), code);
3551 if (new)
3552 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3553 break;
3555 case MEM:
3556 /* If we are not actually processing an insn, don't try to find the
3557 best address. Not only don't we care, but we could modify the
3558 MEM in an invalid way since we have no insn to validate against. */
3559 if (insn != 0)
3560 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3563 /* Even if we don't fold in the insn itself,
3564 we can safely do so here, in hopes of getting a constant. */
3565 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3566 rtx base = 0;
3567 HOST_WIDE_INT offset = 0;
3569 if (GET_CODE (addr) == REG
3570 && REGNO_QTY_VALID_P (REGNO (addr)))
3572 int addr_q = REG_QTY (REGNO (addr));
3573 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3575 if (GET_MODE (addr) == addr_ent->mode
3576 && addr_ent->const_rtx != NULL_RTX)
3577 addr = addr_ent->const_rtx;
3580 /* If address is constant, split it into a base and integer offset. */
3581 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3582 base = addr;
3583 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3584 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3586 base = XEXP (XEXP (addr, 0), 0);
3587 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3589 else if (GET_CODE (addr) == LO_SUM
3590 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3591 base = XEXP (addr, 1);
3592 else if (GET_CODE (addr) == ADDRESSOF)
3593 return change_address (x, VOIDmode, addr);
3595 /* If this is a constant pool reference, we can fold it into its
3596 constant to allow better value tracking. */
3597 if (base && GET_CODE (base) == SYMBOL_REF
3598 && CONSTANT_POOL_ADDRESS_P (base))
3600 rtx constant = get_pool_constant (base);
3601 enum machine_mode const_mode = get_pool_mode (base);
3602 rtx new;
3604 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3605 constant_pool_entries_cost = COST (constant);
3607 /* If we are loading the full constant, we have an equivalence. */
3608 if (offset == 0 && mode == const_mode)
3609 return constant;
3611 /* If this actually isn't a constant (weird!), we can't do
3612 anything. Otherwise, handle the two most common cases:
3613 extracting a word from a multi-word constant, and extracting
3614 the low-order bits. Other cases don't seem common enough to
3615 worry about. */
3616 if (! CONSTANT_P (constant))
3617 return x;
3619 if (GET_MODE_CLASS (mode) == MODE_INT
3620 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3621 && offset % UNITS_PER_WORD == 0
3622 && (new = operand_subword (constant,
3623 offset / UNITS_PER_WORD,
3624 0, const_mode)) != 0)
3625 return new;
3627 if (((BYTES_BIG_ENDIAN
3628 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3629 || (! BYTES_BIG_ENDIAN && offset == 0))
3630 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3631 return new;
3634 /* If this is a reference to a label at a known position in a jump
3635 table, we also know its value. */
3636 if (base && GET_CODE (base) == LABEL_REF)
3638 rtx label = XEXP (base, 0);
3639 rtx table_insn = NEXT_INSN (label);
3641 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3642 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3644 rtx table = PATTERN (table_insn);
3646 if (offset >= 0
3647 && (offset / GET_MODE_SIZE (GET_MODE (table))
3648 < XVECLEN (table, 0)))
3649 return XVECEXP (table, 0,
3650 offset / GET_MODE_SIZE (GET_MODE (table)));
3652 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3653 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3655 rtx table = PATTERN (table_insn);
3657 if (offset >= 0
3658 && (offset / GET_MODE_SIZE (GET_MODE (table))
3659 < XVECLEN (table, 1)))
3661 offset /= GET_MODE_SIZE (GET_MODE (table));
3662 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3663 XEXP (table, 0));
3665 if (GET_MODE (table) != Pmode)
3666 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3668 /* Indicate this is a constant. This isn't a
3669 valid form of CONST, but it will only be used
3670 to fold the next insns and then discarded, so
3671 it should be safe.
3673 Note this expression must be explicitly discarded,
3674 by cse_insn, else it may end up in a REG_EQUAL note
3675 and "escape" to cause problems elsewhere. */
3676 return gen_rtx_CONST (GET_MODE (new), new);
3681 return x;
3684 #ifdef NO_FUNCTION_CSE
3685 case CALL:
3686 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3687 return x;
3688 break;
3689 #endif
3691 case ASM_OPERANDS:
3692 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3693 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3694 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3695 break;
3697 default:
3698 break;
3701 const_arg0 = 0;
3702 const_arg1 = 0;
3703 const_arg2 = 0;
3704 mode_arg0 = VOIDmode;
3706 /* Try folding our operands.
3707 Then see which ones have constant values known. */
3709 fmt = GET_RTX_FORMAT (code);
3710 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3711 if (fmt[i] == 'e')
3713 rtx arg = XEXP (x, i);
3714 rtx folded_arg = arg, const_arg = 0;
3715 enum machine_mode mode_arg = GET_MODE (arg);
3716 rtx cheap_arg, expensive_arg;
3717 rtx replacements[2];
3718 int j;
3719 int old_cost = COST_IN (XEXP (x, i), code);
3721 /* Most arguments are cheap, so handle them specially. */
3722 switch (GET_CODE (arg))
3724 case REG:
3725 /* This is the same as calling equiv_constant; it is duplicated
3726 here for speed. */
3727 if (REGNO_QTY_VALID_P (REGNO (arg)))
3729 int arg_q = REG_QTY (REGNO (arg));
3730 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3732 if (arg_ent->const_rtx != NULL_RTX
3733 && GET_CODE (arg_ent->const_rtx) != REG
3734 && GET_CODE (arg_ent->const_rtx) != PLUS)
3735 const_arg
3736 = gen_lowpart_if_possible (GET_MODE (arg),
3737 arg_ent->const_rtx);
3739 break;
3741 case CONST:
3742 case CONST_INT:
3743 case SYMBOL_REF:
3744 case LABEL_REF:
3745 case CONST_DOUBLE:
3746 case CONST_VECTOR:
3747 const_arg = arg;
3748 break;
3750 #ifdef HAVE_cc0
3751 case CC0:
3752 folded_arg = prev_insn_cc0;
3753 mode_arg = prev_insn_cc0_mode;
3754 const_arg = equiv_constant (folded_arg);
3755 break;
3756 #endif
3758 default:
3759 folded_arg = fold_rtx (arg, insn);
3760 const_arg = equiv_constant (folded_arg);
3763 /* For the first three operands, see if the operand
3764 is constant or equivalent to a constant. */
3765 switch (i)
3767 case 0:
3768 folded_arg0 = folded_arg;
3769 const_arg0 = const_arg;
3770 mode_arg0 = mode_arg;
3771 break;
3772 case 1:
3773 folded_arg1 = folded_arg;
3774 const_arg1 = const_arg;
3775 break;
3776 case 2:
3777 const_arg2 = const_arg;
3778 break;
3781 /* Pick the least expensive of the folded argument and an
3782 equivalent constant argument. */
3783 if (const_arg == 0 || const_arg == folded_arg
3784 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3785 cheap_arg = folded_arg, expensive_arg = const_arg;
3786 else
3787 cheap_arg = const_arg, expensive_arg = folded_arg;
3789 /* Try to replace the operand with the cheapest of the two
3790 possibilities. If it doesn't work and this is either of the first
3791 two operands of a commutative operation, try swapping them.
3792 If THAT fails, try the more expensive, provided it is cheaper
3793 than what is already there. */
3795 if (cheap_arg == XEXP (x, i))
3796 continue;
3798 if (insn == 0 && ! copied)
3800 x = copy_rtx (x);
3801 copied = 1;
3804 /* Order the replacements from cheapest to most expensive. */
3805 replacements[0] = cheap_arg;
3806 replacements[1] = expensive_arg;
3808 for (j = 0; j < 2 && replacements[j]; j++)
3810 int new_cost = COST_IN (replacements[j], code);
3812 /* Stop if what existed before was cheaper. Prefer constants
3813 in the case of a tie. */
3814 if (new_cost > old_cost
3815 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3816 break;
3818 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3819 break;
3821 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3822 || code == LTGT || code == UNEQ || code == ORDERED
3823 || code == UNORDERED)
3825 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3826 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3828 if (apply_change_group ())
3830 /* Swap them back to be invalid so that this loop can
3831 continue and flag them to be swapped back later. */
3832 rtx tem;
3834 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3835 XEXP (x, 1) = tem;
3836 must_swap = 1;
3837 break;
3843 else
3845 if (fmt[i] == 'E')
3846 /* Don't try to fold inside of a vector of expressions.
3847 Doing nothing is harmless. */
3851 /* If a commutative operation, place a constant integer as the second
3852 operand unless the first operand is also a constant integer. Otherwise,
3853 place any constant second unless the first operand is also a constant. */
3855 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3856 || code == LTGT || code == UNEQ || code == ORDERED
3857 || code == UNORDERED)
3859 if (must_swap || (const_arg0
3860 && (const_arg1 == 0
3861 || (GET_CODE (const_arg0) == CONST_INT
3862 && GET_CODE (const_arg1) != CONST_INT))))
3864 rtx tem = XEXP (x, 0);
3866 if (insn == 0 && ! copied)
3868 x = copy_rtx (x);
3869 copied = 1;
3872 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3873 validate_change (insn, &XEXP (x, 1), tem, 1);
3874 if (apply_change_group ())
3876 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3877 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3882 /* If X is an arithmetic operation, see if we can simplify it. */
3884 switch (GET_RTX_CLASS (code))
3886 case '1':
3888 int is_const = 0;
3890 /* We can't simplify extension ops unless we know the
3891 original mode. */
3892 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3893 && mode_arg0 == VOIDmode)
3894 break;
3896 /* If we had a CONST, strip it off and put it back later if we
3897 fold. */
3898 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3899 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3901 new = simplify_unary_operation (code, mode,
3902 const_arg0 ? const_arg0 : folded_arg0,
3903 mode_arg0);
3904 if (new != 0 && is_const)
3905 new = gen_rtx_CONST (mode, new);
3907 break;
3909 case '<':
3910 /* See what items are actually being compared and set FOLDED_ARG[01]
3911 to those values and CODE to the actual comparison code. If any are
3912 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3913 do anything if both operands are already known to be constant. */
3915 if (const_arg0 == 0 || const_arg1 == 0)
3917 struct table_elt *p0, *p1;
3918 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3919 enum machine_mode mode_arg1;
3921 #ifdef FLOAT_STORE_FLAG_VALUE
3922 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3924 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3925 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3926 false_rtx = CONST0_RTX (mode);
3928 #endif
3930 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3931 &mode_arg0, &mode_arg1);
3932 const_arg0 = equiv_constant (folded_arg0);
3933 const_arg1 = equiv_constant (folded_arg1);
3935 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3936 what kinds of things are being compared, so we can't do
3937 anything with this comparison. */
3939 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3940 break;
3942 /* If we do not now have two constants being compared, see
3943 if we can nevertheless deduce some things about the
3944 comparison. */
3945 if (const_arg0 == 0 || const_arg1 == 0)
3947 /* Some addresses are known to be nonzero. We don't know
3948 their sign, but equality comparisons are known. */
3949 if (const_arg1 == const0_rtx
3950 && nonzero_address_p (folded_arg0))
3952 if (code == EQ)
3953 return false_rtx;
3954 else if (code == NE)
3955 return true_rtx;
3958 /* See if the two operands are the same. */
3960 if (folded_arg0 == folded_arg1
3961 || (GET_CODE (folded_arg0) == REG
3962 && GET_CODE (folded_arg1) == REG
3963 && (REG_QTY (REGNO (folded_arg0))
3964 == REG_QTY (REGNO (folded_arg1))))
3965 || ((p0 = lookup (folded_arg0,
3966 (safe_hash (folded_arg0, mode_arg0)
3967 & HASH_MASK), mode_arg0))
3968 && (p1 = lookup (folded_arg1,
3969 (safe_hash (folded_arg1, mode_arg0)
3970 & HASH_MASK), mode_arg0))
3971 && p0->first_same_value == p1->first_same_value))
3973 /* Sadly two equal NaNs are not equivalent. */
3974 if (!HONOR_NANS (mode_arg0))
3975 return ((code == EQ || code == LE || code == GE
3976 || code == LEU || code == GEU || code == UNEQ
3977 || code == UNLE || code == UNGE
3978 || code == ORDERED)
3979 ? true_rtx : false_rtx);
3980 /* Take care for the FP compares we can resolve. */
3981 if (code == UNEQ || code == UNLE || code == UNGE)
3982 return true_rtx;
3983 if (code == LTGT || code == LT || code == GT)
3984 return false_rtx;
3987 /* If FOLDED_ARG0 is a register, see if the comparison we are
3988 doing now is either the same as we did before or the reverse
3989 (we only check the reverse if not floating-point). */
3990 else if (GET_CODE (folded_arg0) == REG)
3992 int qty = REG_QTY (REGNO (folded_arg0));
3994 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3996 struct qty_table_elem *ent = &qty_table[qty];
3998 if ((comparison_dominates_p (ent->comparison_code, code)
3999 || (! FLOAT_MODE_P (mode_arg0)
4000 && comparison_dominates_p (ent->comparison_code,
4001 reverse_condition (code))))
4002 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4003 || (const_arg1
4004 && rtx_equal_p (ent->comparison_const,
4005 const_arg1))
4006 || (GET_CODE (folded_arg1) == REG
4007 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4008 return (comparison_dominates_p (ent->comparison_code, code)
4009 ? true_rtx : false_rtx);
4015 /* If we are comparing against zero, see if the first operand is
4016 equivalent to an IOR with a constant. If so, we may be able to
4017 determine the result of this comparison. */
4019 if (const_arg1 == const0_rtx)
4021 rtx y = lookup_as_function (folded_arg0, IOR);
4022 rtx inner_const;
4024 if (y != 0
4025 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4026 && GET_CODE (inner_const) == CONST_INT
4027 && INTVAL (inner_const) != 0)
4029 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4030 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4031 && (INTVAL (inner_const)
4032 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4033 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4035 #ifdef FLOAT_STORE_FLAG_VALUE
4036 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4038 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4039 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4040 false_rtx = CONST0_RTX (mode);
4042 #endif
4044 switch (code)
4046 case EQ:
4047 return false_rtx;
4048 case NE:
4049 return true_rtx;
4050 case LT: case LE:
4051 if (has_sign)
4052 return true_rtx;
4053 break;
4054 case GT: case GE:
4055 if (has_sign)
4056 return false_rtx;
4057 break;
4058 default:
4059 break;
4064 new = simplify_relational_operation (code,
4065 (mode_arg0 != VOIDmode
4066 ? mode_arg0
4067 : (GET_MODE (const_arg0
4068 ? const_arg0
4069 : folded_arg0)
4070 != VOIDmode)
4071 ? GET_MODE (const_arg0
4072 ? const_arg0
4073 : folded_arg0)
4074 : GET_MODE (const_arg1
4075 ? const_arg1
4076 : folded_arg1)),
4077 const_arg0 ? const_arg0 : folded_arg0,
4078 const_arg1 ? const_arg1 : folded_arg1);
4079 #ifdef FLOAT_STORE_FLAG_VALUE
4080 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4082 if (new == const0_rtx)
4083 new = CONST0_RTX (mode);
4084 else
4085 new = (CONST_DOUBLE_FROM_REAL_VALUE
4086 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4088 #endif
4089 break;
4091 case '2':
4092 case 'c':
4093 switch (code)
4095 case PLUS:
4096 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4097 with that LABEL_REF as its second operand. If so, the result is
4098 the first operand of that MINUS. This handles switches with an
4099 ADDR_DIFF_VEC table. */
4100 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4102 rtx y
4103 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4104 : lookup_as_function (folded_arg0, MINUS);
4106 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4107 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4108 return XEXP (y, 0);
4110 /* Now try for a CONST of a MINUS like the above. */
4111 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4112 : lookup_as_function (folded_arg0, CONST))) != 0
4113 && GET_CODE (XEXP (y, 0)) == MINUS
4114 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4115 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4116 return XEXP (XEXP (y, 0), 0);
4119 /* Likewise if the operands are in the other order. */
4120 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4122 rtx y
4123 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4124 : lookup_as_function (folded_arg1, MINUS);
4126 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4127 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4128 return XEXP (y, 0);
4130 /* Now try for a CONST of a MINUS like the above. */
4131 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4132 : lookup_as_function (folded_arg1, CONST))) != 0
4133 && GET_CODE (XEXP (y, 0)) == MINUS
4134 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4135 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4136 return XEXP (XEXP (y, 0), 0);
4139 /* If second operand is a register equivalent to a negative
4140 CONST_INT, see if we can find a register equivalent to the
4141 positive constant. Make a MINUS if so. Don't do this for
4142 a non-negative constant since we might then alternate between
4143 choosing positive and negative constants. Having the positive
4144 constant previously-used is the more common case. Be sure
4145 the resulting constant is non-negative; if const_arg1 were
4146 the smallest negative number this would overflow: depending
4147 on the mode, this would either just be the same value (and
4148 hence not save anything) or be incorrect. */
4149 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4150 && INTVAL (const_arg1) < 0
4151 /* This used to test
4153 -INTVAL (const_arg1) >= 0
4155 But The Sun V5.0 compilers mis-compiled that test. So
4156 instead we test for the problematic value in a more direct
4157 manner and hope the Sun compilers get it correct. */
4158 && INTVAL (const_arg1) !=
4159 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4160 && GET_CODE (folded_arg1) == REG)
4162 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4163 struct table_elt *p
4164 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4165 mode);
4167 if (p)
4168 for (p = p->first_same_value; p; p = p->next_same_value)
4169 if (GET_CODE (p->exp) == REG)
4170 return simplify_gen_binary (MINUS, mode, folded_arg0,
4171 canon_reg (p->exp, NULL_RTX));
4173 goto from_plus;
4175 case MINUS:
4176 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4177 If so, produce (PLUS Z C2-C). */
4178 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4180 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4181 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4182 return fold_rtx (plus_constant (copy_rtx (y),
4183 -INTVAL (const_arg1)),
4184 NULL_RTX);
4187 /* Fall through. */
4189 from_plus:
4190 case SMIN: case SMAX: case UMIN: case UMAX:
4191 case IOR: case AND: case XOR:
4192 case MULT:
4193 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4194 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4195 is known to be of similar form, we may be able to replace the
4196 operation with a combined operation. This may eliminate the
4197 intermediate operation if every use is simplified in this way.
4198 Note that the similar optimization done by combine.c only works
4199 if the intermediate operation's result has only one reference. */
4201 if (GET_CODE (folded_arg0) == REG
4202 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4204 int is_shift
4205 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4206 rtx y = lookup_as_function (folded_arg0, code);
4207 rtx inner_const;
4208 enum rtx_code associate_code;
4209 rtx new_const;
4211 if (y == 0
4212 || 0 == (inner_const
4213 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4214 || GET_CODE (inner_const) != CONST_INT
4215 /* If we have compiled a statement like
4216 "if (x == (x & mask1))", and now are looking at
4217 "x & mask2", we will have a case where the first operand
4218 of Y is the same as our first operand. Unless we detect
4219 this case, an infinite loop will result. */
4220 || XEXP (y, 0) == folded_arg0)
4221 break;
4223 /* Don't associate these operations if they are a PLUS with the
4224 same constant and it is a power of two. These might be doable
4225 with a pre- or post-increment. Similarly for two subtracts of
4226 identical powers of two with post decrement. */
4228 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4229 && ((HAVE_PRE_INCREMENT
4230 && exact_log2 (INTVAL (const_arg1)) >= 0)
4231 || (HAVE_POST_INCREMENT
4232 && exact_log2 (INTVAL (const_arg1)) >= 0)
4233 || (HAVE_PRE_DECREMENT
4234 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4235 || (HAVE_POST_DECREMENT
4236 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4237 break;
4239 /* Compute the code used to compose the constants. For example,
4240 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4242 associate_code = (is_shift || code == MINUS ? PLUS : code);
4244 new_const = simplify_binary_operation (associate_code, mode,
4245 const_arg1, inner_const);
4247 if (new_const == 0)
4248 break;
4250 /* If we are associating shift operations, don't let this
4251 produce a shift of the size of the object or larger.
4252 This could occur when we follow a sign-extend by a right
4253 shift on a machine that does a sign-extend as a pair
4254 of shifts. */
4256 if (is_shift && GET_CODE (new_const) == CONST_INT
4257 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4259 /* As an exception, we can turn an ASHIFTRT of this
4260 form into a shift of the number of bits - 1. */
4261 if (code == ASHIFTRT)
4262 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4263 else
4264 break;
4267 y = copy_rtx (XEXP (y, 0));
4269 /* If Y contains our first operand (the most common way this
4270 can happen is if Y is a MEM), we would do into an infinite
4271 loop if we tried to fold it. So don't in that case. */
4273 if (! reg_mentioned_p (folded_arg0, y))
4274 y = fold_rtx (y, insn);
4276 return simplify_gen_binary (code, mode, y, new_const);
4278 break;
4280 case DIV: case UDIV:
4281 /* ??? The associative optimization performed immediately above is
4282 also possible for DIV and UDIV using associate_code of MULT.
4283 However, we would need extra code to verify that the
4284 multiplication does not overflow, that is, there is no overflow
4285 in the calculation of new_const. */
4286 break;
4288 default:
4289 break;
4292 new = simplify_binary_operation (code, mode,
4293 const_arg0 ? const_arg0 : folded_arg0,
4294 const_arg1 ? const_arg1 : folded_arg1);
4295 break;
4297 case 'o':
4298 /* (lo_sum (high X) X) is simply X. */
4299 if (code == LO_SUM && const_arg0 != 0
4300 && GET_CODE (const_arg0) == HIGH
4301 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4302 return const_arg1;
4303 break;
4305 case '3':
4306 case 'b':
4307 new = simplify_ternary_operation (code, mode, mode_arg0,
4308 const_arg0 ? const_arg0 : folded_arg0,
4309 const_arg1 ? const_arg1 : folded_arg1,
4310 const_arg2 ? const_arg2 : XEXP (x, 2));
4311 break;
4313 case 'x':
4314 /* Eliminate CONSTANT_P_RTX if its constant. */
4315 if (code == CONSTANT_P_RTX)
4317 if (const_arg0)
4318 return const1_rtx;
4319 if (optimize == 0 || !flag_gcse)
4320 return const0_rtx;
4322 break;
4325 return new ? new : x;
4328 /* Return a constant value currently equivalent to X.
4329 Return 0 if we don't know one. */
4331 static rtx
4332 equiv_constant (x)
4333 rtx x;
4335 if (GET_CODE (x) == REG
4336 && REGNO_QTY_VALID_P (REGNO (x)))
4338 int x_q = REG_QTY (REGNO (x));
4339 struct qty_table_elem *x_ent = &qty_table[x_q];
4341 if (x_ent->const_rtx)
4342 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4345 if (x == 0 || CONSTANT_P (x))
4346 return x;
4348 /* If X is a MEM, try to fold it outside the context of any insn to see if
4349 it might be equivalent to a constant. That handles the case where it
4350 is a constant-pool reference. Then try to look it up in the hash table
4351 in case it is something whose value we have seen before. */
4353 if (GET_CODE (x) == MEM)
4355 struct table_elt *elt;
4357 x = fold_rtx (x, NULL_RTX);
4358 if (CONSTANT_P (x))
4359 return x;
4361 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4362 if (elt == 0)
4363 return 0;
4365 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4366 if (elt->is_const && CONSTANT_P (elt->exp))
4367 return elt->exp;
4370 return 0;
4373 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4374 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4375 least-significant part of X.
4376 MODE specifies how big a part of X to return.
4378 If the requested operation cannot be done, 0 is returned.
4380 This is similar to gen_lowpart in emit-rtl.c. */
4383 gen_lowpart_if_possible (mode, x)
4384 enum machine_mode mode;
4385 rtx x;
4387 rtx result = gen_lowpart_common (mode, x);
4389 if (result)
4390 return result;
4391 else if (GET_CODE (x) == MEM)
4393 /* This is the only other case we handle. */
4394 int offset = 0;
4395 rtx new;
4397 if (WORDS_BIG_ENDIAN)
4398 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4399 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4400 if (BYTES_BIG_ENDIAN)
4401 /* Adjust the address so that the address-after-the-data is
4402 unchanged. */
4403 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4404 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4406 new = adjust_address_nv (x, mode, offset);
4407 if (! memory_address_p (mode, XEXP (new, 0)))
4408 return 0;
4410 return new;
4412 else
4413 return 0;
4416 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4417 branch. It will be zero if not.
4419 In certain cases, this can cause us to add an equivalence. For example,
4420 if we are following the taken case of
4421 if (i == 2)
4422 we can add the fact that `i' and '2' are now equivalent.
4424 In any case, we can record that this comparison was passed. If the same
4425 comparison is seen later, we will know its value. */
4427 static void
4428 record_jump_equiv (insn, taken)
4429 rtx insn;
4430 int taken;
4432 int cond_known_true;
4433 rtx op0, op1;
4434 rtx set;
4435 enum machine_mode mode, mode0, mode1;
4436 int reversed_nonequality = 0;
4437 enum rtx_code code;
4439 /* Ensure this is the right kind of insn. */
4440 if (! any_condjump_p (insn))
4441 return;
4442 set = pc_set (insn);
4444 /* See if this jump condition is known true or false. */
4445 if (taken)
4446 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4447 else
4448 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4450 /* Get the type of comparison being done and the operands being compared.
4451 If we had to reverse a non-equality condition, record that fact so we
4452 know that it isn't valid for floating-point. */
4453 code = GET_CODE (XEXP (SET_SRC (set), 0));
4454 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4455 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4457 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4458 if (! cond_known_true)
4460 code = reversed_comparison_code_parts (code, op0, op1, insn);
4462 /* Don't remember if we can't find the inverse. */
4463 if (code == UNKNOWN)
4464 return;
4467 /* The mode is the mode of the non-constant. */
4468 mode = mode0;
4469 if (mode1 != VOIDmode)
4470 mode = mode1;
4472 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4475 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4476 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4477 Make any useful entries we can with that information. Called from
4478 above function and called recursively. */
4480 static void
4481 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4482 enum rtx_code code;
4483 enum machine_mode mode;
4484 rtx op0, op1;
4485 int reversed_nonequality;
4487 unsigned op0_hash, op1_hash;
4488 int op0_in_memory, op1_in_memory;
4489 struct table_elt *op0_elt, *op1_elt;
4491 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4492 we know that they are also equal in the smaller mode (this is also
4493 true for all smaller modes whether or not there is a SUBREG, but
4494 is not worth testing for with no SUBREG). */
4496 /* Note that GET_MODE (op0) may not equal MODE. */
4497 if (code == EQ && GET_CODE (op0) == SUBREG
4498 && (GET_MODE_SIZE (GET_MODE (op0))
4499 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4501 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4502 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4504 record_jump_cond (code, mode, SUBREG_REG (op0),
4505 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4506 reversed_nonequality);
4509 if (code == EQ && GET_CODE (op1) == SUBREG
4510 && (GET_MODE_SIZE (GET_MODE (op1))
4511 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4513 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4514 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4516 record_jump_cond (code, mode, SUBREG_REG (op1),
4517 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4518 reversed_nonequality);
4521 /* Similarly, if this is an NE comparison, and either is a SUBREG
4522 making a smaller mode, we know the whole thing is also NE. */
4524 /* Note that GET_MODE (op0) may not equal MODE;
4525 if we test MODE instead, we can get an infinite recursion
4526 alternating between two modes each wider than MODE. */
4528 if (code == NE && GET_CODE (op0) == SUBREG
4529 && subreg_lowpart_p (op0)
4530 && (GET_MODE_SIZE (GET_MODE (op0))
4531 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4533 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4534 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4536 record_jump_cond (code, mode, SUBREG_REG (op0),
4537 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4538 reversed_nonequality);
4541 if (code == NE && GET_CODE (op1) == SUBREG
4542 && subreg_lowpart_p (op1)
4543 && (GET_MODE_SIZE (GET_MODE (op1))
4544 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4546 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4547 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4549 record_jump_cond (code, mode, SUBREG_REG (op1),
4550 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4551 reversed_nonequality);
4554 /* Hash both operands. */
4556 do_not_record = 0;
4557 hash_arg_in_memory = 0;
4558 op0_hash = HASH (op0, mode);
4559 op0_in_memory = hash_arg_in_memory;
4561 if (do_not_record)
4562 return;
4564 do_not_record = 0;
4565 hash_arg_in_memory = 0;
4566 op1_hash = HASH (op1, mode);
4567 op1_in_memory = hash_arg_in_memory;
4569 if (do_not_record)
4570 return;
4572 /* Look up both operands. */
4573 op0_elt = lookup (op0, op0_hash, mode);
4574 op1_elt = lookup (op1, op1_hash, mode);
4576 /* If both operands are already equivalent or if they are not in the
4577 table but are identical, do nothing. */
4578 if ((op0_elt != 0 && op1_elt != 0
4579 && op0_elt->first_same_value == op1_elt->first_same_value)
4580 || op0 == op1 || rtx_equal_p (op0, op1))
4581 return;
4583 /* If we aren't setting two things equal all we can do is save this
4584 comparison. Similarly if this is floating-point. In the latter
4585 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4586 If we record the equality, we might inadvertently delete code
4587 whose intent was to change -0 to +0. */
4589 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4591 struct qty_table_elem *ent;
4592 int qty;
4594 /* If we reversed a floating-point comparison, if OP0 is not a
4595 register, or if OP1 is neither a register or constant, we can't
4596 do anything. */
4598 if (GET_CODE (op1) != REG)
4599 op1 = equiv_constant (op1);
4601 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4602 || GET_CODE (op0) != REG || op1 == 0)
4603 return;
4605 /* Put OP0 in the hash table if it isn't already. This gives it a
4606 new quantity number. */
4607 if (op0_elt == 0)
4609 if (insert_regs (op0, NULL, 0))
4611 rehash_using_reg (op0);
4612 op0_hash = HASH (op0, mode);
4614 /* If OP0 is contained in OP1, this changes its hash code
4615 as well. Faster to rehash than to check, except
4616 for the simple case of a constant. */
4617 if (! CONSTANT_P (op1))
4618 op1_hash = HASH (op1,mode);
4621 op0_elt = insert (op0, NULL, op0_hash, mode);
4622 op0_elt->in_memory = op0_in_memory;
4625 qty = REG_QTY (REGNO (op0));
4626 ent = &qty_table[qty];
4628 ent->comparison_code = code;
4629 if (GET_CODE (op1) == REG)
4631 /* Look it up again--in case op0 and op1 are the same. */
4632 op1_elt = lookup (op1, op1_hash, mode);
4634 /* Put OP1 in the hash table so it gets a new quantity number. */
4635 if (op1_elt == 0)
4637 if (insert_regs (op1, NULL, 0))
4639 rehash_using_reg (op1);
4640 op1_hash = HASH (op1, mode);
4643 op1_elt = insert (op1, NULL, op1_hash, mode);
4644 op1_elt->in_memory = op1_in_memory;
4647 ent->comparison_const = NULL_RTX;
4648 ent->comparison_qty = REG_QTY (REGNO (op1));
4650 else
4652 ent->comparison_const = op1;
4653 ent->comparison_qty = -1;
4656 return;
4659 /* If either side is still missing an equivalence, make it now,
4660 then merge the equivalences. */
4662 if (op0_elt == 0)
4664 if (insert_regs (op0, NULL, 0))
4666 rehash_using_reg (op0);
4667 op0_hash = HASH (op0, mode);
4670 op0_elt = insert (op0, NULL, op0_hash, mode);
4671 op0_elt->in_memory = op0_in_memory;
4674 if (op1_elt == 0)
4676 if (insert_regs (op1, NULL, 0))
4678 rehash_using_reg (op1);
4679 op1_hash = HASH (op1, mode);
4682 op1_elt = insert (op1, NULL, op1_hash, mode);
4683 op1_elt->in_memory = op1_in_memory;
4686 merge_equiv_classes (op0_elt, op1_elt);
4687 last_jump_equiv_class = op0_elt;
4690 /* CSE processing for one instruction.
4691 First simplify sources and addresses of all assignments
4692 in the instruction, using previously-computed equivalents values.
4693 Then install the new sources and destinations in the table
4694 of available values.
4696 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4697 the insn. It means that INSN is inside libcall block. In this
4698 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4700 /* Data on one SET contained in the instruction. */
4702 struct set
4704 /* The SET rtx itself. */
4705 rtx rtl;
4706 /* The SET_SRC of the rtx (the original value, if it is changing). */
4707 rtx src;
4708 /* The hash-table element for the SET_SRC of the SET. */
4709 struct table_elt *src_elt;
4710 /* Hash value for the SET_SRC. */
4711 unsigned src_hash;
4712 /* Hash value for the SET_DEST. */
4713 unsigned dest_hash;
4714 /* The SET_DEST, with SUBREG, etc., stripped. */
4715 rtx inner_dest;
4716 /* Nonzero if the SET_SRC is in memory. */
4717 char src_in_memory;
4718 /* Nonzero if the SET_SRC contains something
4719 whose value cannot be predicted and understood. */
4720 char src_volatile;
4721 /* Original machine mode, in case it becomes a CONST_INT. */
4722 enum machine_mode mode;
4723 /* A constant equivalent for SET_SRC, if any. */
4724 rtx src_const;
4725 /* Original SET_SRC value used for libcall notes. */
4726 rtx orig_src;
4727 /* Hash value of constant equivalent for SET_SRC. */
4728 unsigned src_const_hash;
4729 /* Table entry for constant equivalent for SET_SRC, if any. */
4730 struct table_elt *src_const_elt;
4733 static void
4734 cse_insn (insn, libcall_insn)
4735 rtx insn;
4736 rtx libcall_insn;
4738 rtx x = PATTERN (insn);
4739 int i;
4740 rtx tem;
4741 int n_sets = 0;
4743 #ifdef HAVE_cc0
4744 /* Records what this insn does to set CC0. */
4745 rtx this_insn_cc0 = 0;
4746 enum machine_mode this_insn_cc0_mode = VOIDmode;
4747 #endif
4749 rtx src_eqv = 0;
4750 struct table_elt *src_eqv_elt = 0;
4751 int src_eqv_volatile = 0;
4752 int src_eqv_in_memory = 0;
4753 unsigned src_eqv_hash = 0;
4755 struct set *sets = (struct set *) 0;
4757 this_insn = insn;
4759 /* Find all the SETs and CLOBBERs in this instruction.
4760 Record all the SETs in the array `set' and count them.
4761 Also determine whether there is a CLOBBER that invalidates
4762 all memory references, or all references at varying addresses. */
4764 if (GET_CODE (insn) == CALL_INSN)
4766 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4768 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4769 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4770 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4774 if (GET_CODE (x) == SET)
4776 sets = (struct set *) alloca (sizeof (struct set));
4777 sets[0].rtl = x;
4779 /* Ignore SETs that are unconditional jumps.
4780 They never need cse processing, so this does not hurt.
4781 The reason is not efficiency but rather
4782 so that we can test at the end for instructions
4783 that have been simplified to unconditional jumps
4784 and not be misled by unchanged instructions
4785 that were unconditional jumps to begin with. */
4786 if (SET_DEST (x) == pc_rtx
4787 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4790 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4791 The hard function value register is used only once, to copy to
4792 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4793 Ensure we invalidate the destination register. On the 80386 no
4794 other code would invalidate it since it is a fixed_reg.
4795 We need not check the return of apply_change_group; see canon_reg. */
4797 else if (GET_CODE (SET_SRC (x)) == CALL)
4799 canon_reg (SET_SRC (x), insn);
4800 apply_change_group ();
4801 fold_rtx (SET_SRC (x), insn);
4802 invalidate (SET_DEST (x), VOIDmode);
4804 else
4805 n_sets = 1;
4807 else if (GET_CODE (x) == PARALLEL)
4809 int lim = XVECLEN (x, 0);
4811 sets = (struct set *) alloca (lim * sizeof (struct set));
4813 /* Find all regs explicitly clobbered in this insn,
4814 and ensure they are not replaced with any other regs
4815 elsewhere in this insn.
4816 When a reg that is clobbered is also used for input,
4817 we should presume that that is for a reason,
4818 and we should not substitute some other register
4819 which is not supposed to be clobbered.
4820 Therefore, this loop cannot be merged into the one below
4821 because a CALL may precede a CLOBBER and refer to the
4822 value clobbered. We must not let a canonicalization do
4823 anything in that case. */
4824 for (i = 0; i < lim; i++)
4826 rtx y = XVECEXP (x, 0, i);
4827 if (GET_CODE (y) == CLOBBER)
4829 rtx clobbered = XEXP (y, 0);
4831 if (GET_CODE (clobbered) == REG
4832 || GET_CODE (clobbered) == SUBREG)
4833 invalidate (clobbered, VOIDmode);
4834 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4835 || GET_CODE (clobbered) == ZERO_EXTRACT)
4836 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4840 for (i = 0; i < lim; i++)
4842 rtx y = XVECEXP (x, 0, i);
4843 if (GET_CODE (y) == SET)
4845 /* As above, we ignore unconditional jumps and call-insns and
4846 ignore the result of apply_change_group. */
4847 if (GET_CODE (SET_SRC (y)) == CALL)
4849 canon_reg (SET_SRC (y), insn);
4850 apply_change_group ();
4851 fold_rtx (SET_SRC (y), insn);
4852 invalidate (SET_DEST (y), VOIDmode);
4854 else if (SET_DEST (y) == pc_rtx
4855 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4857 else
4858 sets[n_sets++].rtl = y;
4860 else if (GET_CODE (y) == CLOBBER)
4862 /* If we clobber memory, canon the address.
4863 This does nothing when a register is clobbered
4864 because we have already invalidated the reg. */
4865 if (GET_CODE (XEXP (y, 0)) == MEM)
4866 canon_reg (XEXP (y, 0), NULL_RTX);
4868 else if (GET_CODE (y) == USE
4869 && ! (GET_CODE (XEXP (y, 0)) == REG
4870 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4871 canon_reg (y, NULL_RTX);
4872 else if (GET_CODE (y) == CALL)
4874 /* The result of apply_change_group can be ignored; see
4875 canon_reg. */
4876 canon_reg (y, insn);
4877 apply_change_group ();
4878 fold_rtx (y, insn);
4882 else if (GET_CODE (x) == CLOBBER)
4884 if (GET_CODE (XEXP (x, 0)) == MEM)
4885 canon_reg (XEXP (x, 0), NULL_RTX);
4888 /* Canonicalize a USE of a pseudo register or memory location. */
4889 else if (GET_CODE (x) == USE
4890 && ! (GET_CODE (XEXP (x, 0)) == REG
4891 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4892 canon_reg (XEXP (x, 0), NULL_RTX);
4893 else if (GET_CODE (x) == CALL)
4895 /* The result of apply_change_group can be ignored; see canon_reg. */
4896 canon_reg (x, insn);
4897 apply_change_group ();
4898 fold_rtx (x, insn);
4901 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4902 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4903 is handled specially for this case, and if it isn't set, then there will
4904 be no equivalence for the destination. */
4905 if (n_sets == 1 && REG_NOTES (insn) != 0
4906 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4907 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4908 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4910 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4911 XEXP (tem, 0) = src_eqv;
4914 /* Canonicalize sources and addresses of destinations.
4915 We do this in a separate pass to avoid problems when a MATCH_DUP is
4916 present in the insn pattern. In that case, we want to ensure that
4917 we don't break the duplicate nature of the pattern. So we will replace
4918 both operands at the same time. Otherwise, we would fail to find an
4919 equivalent substitution in the loop calling validate_change below.
4921 We used to suppress canonicalization of DEST if it appears in SRC,
4922 but we don't do this any more. */
4924 for (i = 0; i < n_sets; i++)
4926 rtx dest = SET_DEST (sets[i].rtl);
4927 rtx src = SET_SRC (sets[i].rtl);
4928 rtx new = canon_reg (src, insn);
4929 int insn_code;
4931 sets[i].orig_src = src;
4932 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4933 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4934 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4935 || (insn_code = recog_memoized (insn)) < 0
4936 || insn_data[insn_code].n_dups > 0)
4937 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4938 else
4939 SET_SRC (sets[i].rtl) = new;
4941 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4943 validate_change (insn, &XEXP (dest, 1),
4944 canon_reg (XEXP (dest, 1), insn), 1);
4945 validate_change (insn, &XEXP (dest, 2),
4946 canon_reg (XEXP (dest, 2), insn), 1);
4949 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4950 || GET_CODE (dest) == ZERO_EXTRACT
4951 || GET_CODE (dest) == SIGN_EXTRACT)
4952 dest = XEXP (dest, 0);
4954 if (GET_CODE (dest) == MEM)
4955 canon_reg (dest, insn);
4958 /* Now that we have done all the replacements, we can apply the change
4959 group and see if they all work. Note that this will cause some
4960 canonicalizations that would have worked individually not to be applied
4961 because some other canonicalization didn't work, but this should not
4962 occur often.
4964 The result of apply_change_group can be ignored; see canon_reg. */
4966 apply_change_group ();
4968 /* Set sets[i].src_elt to the class each source belongs to.
4969 Detect assignments from or to volatile things
4970 and set set[i] to zero so they will be ignored
4971 in the rest of this function.
4973 Nothing in this loop changes the hash table or the register chains. */
4975 for (i = 0; i < n_sets; i++)
4977 rtx src, dest;
4978 rtx src_folded;
4979 struct table_elt *elt = 0, *p;
4980 enum machine_mode mode;
4981 rtx src_eqv_here;
4982 rtx src_const = 0;
4983 rtx src_related = 0;
4984 struct table_elt *src_const_elt = 0;
4985 int src_cost = MAX_COST;
4986 int src_eqv_cost = MAX_COST;
4987 int src_folded_cost = MAX_COST;
4988 int src_related_cost = MAX_COST;
4989 int src_elt_cost = MAX_COST;
4990 int src_regcost = MAX_COST;
4991 int src_eqv_regcost = MAX_COST;
4992 int src_folded_regcost = MAX_COST;
4993 int src_related_regcost = MAX_COST;
4994 int src_elt_regcost = MAX_COST;
4995 /* Set nonzero if we need to call force_const_mem on with the
4996 contents of src_folded before using it. */
4997 int src_folded_force_flag = 0;
4999 dest = SET_DEST (sets[i].rtl);
5000 src = SET_SRC (sets[i].rtl);
5002 /* If SRC is a constant that has no machine mode,
5003 hash it with the destination's machine mode.
5004 This way we can keep different modes separate. */
5006 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5007 sets[i].mode = mode;
5009 if (src_eqv)
5011 enum machine_mode eqvmode = mode;
5012 if (GET_CODE (dest) == STRICT_LOW_PART)
5013 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5014 do_not_record = 0;
5015 hash_arg_in_memory = 0;
5016 src_eqv_hash = HASH (src_eqv, eqvmode);
5018 /* Find the equivalence class for the equivalent expression. */
5020 if (!do_not_record)
5021 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5023 src_eqv_volatile = do_not_record;
5024 src_eqv_in_memory = hash_arg_in_memory;
5027 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5028 value of the INNER register, not the destination. So it is not
5029 a valid substitution for the source. But save it for later. */
5030 if (GET_CODE (dest) == STRICT_LOW_PART)
5031 src_eqv_here = 0;
5032 else
5033 src_eqv_here = src_eqv;
5035 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5036 simplified result, which may not necessarily be valid. */
5037 src_folded = fold_rtx (src, insn);
5039 #if 0
5040 /* ??? This caused bad code to be generated for the m68k port with -O2.
5041 Suppose src is (CONST_INT -1), and that after truncation src_folded
5042 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5043 At the end we will add src and src_const to the same equivalence
5044 class. We now have 3 and -1 on the same equivalence class. This
5045 causes later instructions to be mis-optimized. */
5046 /* If storing a constant in a bitfield, pre-truncate the constant
5047 so we will be able to record it later. */
5048 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5049 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5051 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5053 if (GET_CODE (src) == CONST_INT
5054 && GET_CODE (width) == CONST_INT
5055 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5056 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5057 src_folded
5058 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5059 << INTVAL (width)) - 1));
5061 #endif
5063 /* Compute SRC's hash code, and also notice if it
5064 should not be recorded at all. In that case,
5065 prevent any further processing of this assignment. */
5066 do_not_record = 0;
5067 hash_arg_in_memory = 0;
5069 sets[i].src = src;
5070 sets[i].src_hash = HASH (src, mode);
5071 sets[i].src_volatile = do_not_record;
5072 sets[i].src_in_memory = hash_arg_in_memory;
5074 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5075 a pseudo, do not record SRC. Using SRC as a replacement for
5076 anything else will be incorrect in that situation. Note that
5077 this usually occurs only for stack slots, in which case all the
5078 RTL would be referring to SRC, so we don't lose any optimization
5079 opportunities by not having SRC in the hash table. */
5081 if (GET_CODE (src) == MEM
5082 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5083 && GET_CODE (dest) == REG
5084 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5085 sets[i].src_volatile = 1;
5087 #if 0
5088 /* It is no longer clear why we used to do this, but it doesn't
5089 appear to still be needed. So let's try without it since this
5090 code hurts cse'ing widened ops. */
5091 /* If source is a perverse subreg (such as QI treated as an SI),
5092 treat it as volatile. It may do the work of an SI in one context
5093 where the extra bits are not being used, but cannot replace an SI
5094 in general. */
5095 if (GET_CODE (src) == SUBREG
5096 && (GET_MODE_SIZE (GET_MODE (src))
5097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5098 sets[i].src_volatile = 1;
5099 #endif
5101 /* Locate all possible equivalent forms for SRC. Try to replace
5102 SRC in the insn with each cheaper equivalent.
5104 We have the following types of equivalents: SRC itself, a folded
5105 version, a value given in a REG_EQUAL note, or a value related
5106 to a constant.
5108 Each of these equivalents may be part of an additional class
5109 of equivalents (if more than one is in the table, they must be in
5110 the same class; we check for this).
5112 If the source is volatile, we don't do any table lookups.
5114 We note any constant equivalent for possible later use in a
5115 REG_NOTE. */
5117 if (!sets[i].src_volatile)
5118 elt = lookup (src, sets[i].src_hash, mode);
5120 sets[i].src_elt = elt;
5122 if (elt && src_eqv_here && src_eqv_elt)
5124 if (elt->first_same_value != src_eqv_elt->first_same_value)
5126 /* The REG_EQUAL is indicating that two formerly distinct
5127 classes are now equivalent. So merge them. */
5128 merge_equiv_classes (elt, src_eqv_elt);
5129 src_eqv_hash = HASH (src_eqv, elt->mode);
5130 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5133 src_eqv_here = 0;
5136 else if (src_eqv_elt)
5137 elt = src_eqv_elt;
5139 /* Try to find a constant somewhere and record it in `src_const'.
5140 Record its table element, if any, in `src_const_elt'. Look in
5141 any known equivalences first. (If the constant is not in the
5142 table, also set `sets[i].src_const_hash'). */
5143 if (elt)
5144 for (p = elt->first_same_value; p; p = p->next_same_value)
5145 if (p->is_const)
5147 src_const = p->exp;
5148 src_const_elt = elt;
5149 break;
5152 if (src_const == 0
5153 && (CONSTANT_P (src_folded)
5154 /* Consider (minus (label_ref L1) (label_ref L2)) as
5155 "constant" here so we will record it. This allows us
5156 to fold switch statements when an ADDR_DIFF_VEC is used. */
5157 || (GET_CODE (src_folded) == MINUS
5158 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5159 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5160 src_const = src_folded, src_const_elt = elt;
5161 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5162 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5164 /* If we don't know if the constant is in the table, get its
5165 hash code and look it up. */
5166 if (src_const && src_const_elt == 0)
5168 sets[i].src_const_hash = HASH (src_const, mode);
5169 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5172 sets[i].src_const = src_const;
5173 sets[i].src_const_elt = src_const_elt;
5175 /* If the constant and our source are both in the table, mark them as
5176 equivalent. Otherwise, if a constant is in the table but the source
5177 isn't, set ELT to it. */
5178 if (src_const_elt && elt
5179 && src_const_elt->first_same_value != elt->first_same_value)
5180 merge_equiv_classes (elt, src_const_elt);
5181 else if (src_const_elt && elt == 0)
5182 elt = src_const_elt;
5184 /* See if there is a register linearly related to a constant
5185 equivalent of SRC. */
5186 if (src_const
5187 && (GET_CODE (src_const) == CONST
5188 || (src_const_elt && src_const_elt->related_value != 0)))
5190 src_related = use_related_value (src_const, src_const_elt);
5191 if (src_related)
5193 struct table_elt *src_related_elt
5194 = lookup (src_related, HASH (src_related, mode), mode);
5195 if (src_related_elt && elt)
5197 if (elt->first_same_value
5198 != src_related_elt->first_same_value)
5199 /* This can occur when we previously saw a CONST
5200 involving a SYMBOL_REF and then see the SYMBOL_REF
5201 twice. Merge the involved classes. */
5202 merge_equiv_classes (elt, src_related_elt);
5204 src_related = 0;
5205 src_related_elt = 0;
5207 else if (src_related_elt && elt == 0)
5208 elt = src_related_elt;
5212 /* See if we have a CONST_INT that is already in a register in a
5213 wider mode. */
5215 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5216 && GET_MODE_CLASS (mode) == MODE_INT
5217 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5219 enum machine_mode wider_mode;
5221 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5222 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5223 && src_related == 0;
5224 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5226 struct table_elt *const_elt
5227 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5229 if (const_elt == 0)
5230 continue;
5232 for (const_elt = const_elt->first_same_value;
5233 const_elt; const_elt = const_elt->next_same_value)
5234 if (GET_CODE (const_elt->exp) == REG)
5236 src_related = gen_lowpart_if_possible (mode,
5237 const_elt->exp);
5238 break;
5243 /* Another possibility is that we have an AND with a constant in
5244 a mode narrower than a word. If so, it might have been generated
5245 as part of an "if" which would narrow the AND. If we already
5246 have done the AND in a wider mode, we can use a SUBREG of that
5247 value. */
5249 if (flag_expensive_optimizations && ! src_related
5250 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5251 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5253 enum machine_mode tmode;
5254 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5256 for (tmode = GET_MODE_WIDER_MODE (mode);
5257 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5258 tmode = GET_MODE_WIDER_MODE (tmode))
5260 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5261 struct table_elt *larger_elt;
5263 if (inner)
5265 PUT_MODE (new_and, tmode);
5266 XEXP (new_and, 0) = inner;
5267 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5268 if (larger_elt == 0)
5269 continue;
5271 for (larger_elt = larger_elt->first_same_value;
5272 larger_elt; larger_elt = larger_elt->next_same_value)
5273 if (GET_CODE (larger_elt->exp) == REG)
5275 src_related
5276 = gen_lowpart_if_possible (mode, larger_elt->exp);
5277 break;
5280 if (src_related)
5281 break;
5286 #ifdef LOAD_EXTEND_OP
5287 /* See if a MEM has already been loaded with a widening operation;
5288 if it has, we can use a subreg of that. Many CISC machines
5289 also have such operations, but this is only likely to be
5290 beneficial these machines. */
5292 if (flag_expensive_optimizations && src_related == 0
5293 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5294 && GET_MODE_CLASS (mode) == MODE_INT
5295 && GET_CODE (src) == MEM && ! do_not_record
5296 && LOAD_EXTEND_OP (mode) != NIL)
5298 enum machine_mode tmode;
5300 /* Set what we are trying to extend and the operation it might
5301 have been extended with. */
5302 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5303 XEXP (memory_extend_rtx, 0) = src;
5305 for (tmode = GET_MODE_WIDER_MODE (mode);
5306 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5307 tmode = GET_MODE_WIDER_MODE (tmode))
5309 struct table_elt *larger_elt;
5311 PUT_MODE (memory_extend_rtx, tmode);
5312 larger_elt = lookup (memory_extend_rtx,
5313 HASH (memory_extend_rtx, tmode), tmode);
5314 if (larger_elt == 0)
5315 continue;
5317 for (larger_elt = larger_elt->first_same_value;
5318 larger_elt; larger_elt = larger_elt->next_same_value)
5319 if (GET_CODE (larger_elt->exp) == REG)
5321 src_related = gen_lowpart_if_possible (mode,
5322 larger_elt->exp);
5323 break;
5326 if (src_related)
5327 break;
5330 #endif /* LOAD_EXTEND_OP */
5332 if (src == src_folded)
5333 src_folded = 0;
5335 /* At this point, ELT, if nonzero, points to a class of expressions
5336 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5337 and SRC_RELATED, if nonzero, each contain additional equivalent
5338 expressions. Prune these latter expressions by deleting expressions
5339 already in the equivalence class.
5341 Check for an equivalent identical to the destination. If found,
5342 this is the preferred equivalent since it will likely lead to
5343 elimination of the insn. Indicate this by placing it in
5344 `src_related'. */
5346 if (elt)
5347 elt = elt->first_same_value;
5348 for (p = elt; p; p = p->next_same_value)
5350 enum rtx_code code = GET_CODE (p->exp);
5352 /* If the expression is not valid, ignore it. Then we do not
5353 have to check for validity below. In most cases, we can use
5354 `rtx_equal_p', since canonicalization has already been done. */
5355 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5356 continue;
5358 /* Also skip paradoxical subregs, unless that's what we're
5359 looking for. */
5360 if (code == SUBREG
5361 && (GET_MODE_SIZE (GET_MODE (p->exp))
5362 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5363 && ! (src != 0
5364 && GET_CODE (src) == SUBREG
5365 && GET_MODE (src) == GET_MODE (p->exp)
5366 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5367 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5368 continue;
5370 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5371 src = 0;
5372 else if (src_folded && GET_CODE (src_folded) == code
5373 && rtx_equal_p (src_folded, p->exp))
5374 src_folded = 0;
5375 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5376 && rtx_equal_p (src_eqv_here, p->exp))
5377 src_eqv_here = 0;
5378 else if (src_related && GET_CODE (src_related) == code
5379 && rtx_equal_p (src_related, p->exp))
5380 src_related = 0;
5382 /* This is the same as the destination of the insns, we want
5383 to prefer it. Copy it to src_related. The code below will
5384 then give it a negative cost. */
5385 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5386 src_related = dest;
5389 /* Find the cheapest valid equivalent, trying all the available
5390 possibilities. Prefer items not in the hash table to ones
5391 that are when they are equal cost. Note that we can never
5392 worsen an insn as the current contents will also succeed.
5393 If we find an equivalent identical to the destination, use it as best,
5394 since this insn will probably be eliminated in that case. */
5395 if (src)
5397 if (rtx_equal_p (src, dest))
5398 src_cost = src_regcost = -1;
5399 else
5401 src_cost = COST (src);
5402 src_regcost = approx_reg_cost (src);
5406 if (src_eqv_here)
5408 if (rtx_equal_p (src_eqv_here, dest))
5409 src_eqv_cost = src_eqv_regcost = -1;
5410 else
5412 src_eqv_cost = COST (src_eqv_here);
5413 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5417 if (src_folded)
5419 if (rtx_equal_p (src_folded, dest))
5420 src_folded_cost = src_folded_regcost = -1;
5421 else
5423 src_folded_cost = COST (src_folded);
5424 src_folded_regcost = approx_reg_cost (src_folded);
5428 if (src_related)
5430 if (rtx_equal_p (src_related, dest))
5431 src_related_cost = src_related_regcost = -1;
5432 else
5434 src_related_cost = COST (src_related);
5435 src_related_regcost = approx_reg_cost (src_related);
5439 /* If this was an indirect jump insn, a known label will really be
5440 cheaper even though it looks more expensive. */
5441 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5442 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5444 /* Terminate loop when replacement made. This must terminate since
5445 the current contents will be tested and will always be valid. */
5446 while (1)
5448 rtx trial;
5450 /* Skip invalid entries. */
5451 while (elt && GET_CODE (elt->exp) != REG
5452 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5453 elt = elt->next_same_value;
5455 /* A paradoxical subreg would be bad here: it'll be the right
5456 size, but later may be adjusted so that the upper bits aren't
5457 what we want. So reject it. */
5458 if (elt != 0
5459 && GET_CODE (elt->exp) == SUBREG
5460 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5461 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5462 /* It is okay, though, if the rtx we're trying to match
5463 will ignore any of the bits we can't predict. */
5464 && ! (src != 0
5465 && GET_CODE (src) == SUBREG
5466 && GET_MODE (src) == GET_MODE (elt->exp)
5467 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5468 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5470 elt = elt->next_same_value;
5471 continue;
5474 if (elt)
5476 src_elt_cost = elt->cost;
5477 src_elt_regcost = elt->regcost;
5480 /* Find cheapest and skip it for the next time. For items
5481 of equal cost, use this order:
5482 src_folded, src, src_eqv, src_related and hash table entry. */
5483 if (src_folded
5484 && preferrable (src_folded_cost, src_folded_regcost,
5485 src_cost, src_regcost) <= 0
5486 && preferrable (src_folded_cost, src_folded_regcost,
5487 src_eqv_cost, src_eqv_regcost) <= 0
5488 && preferrable (src_folded_cost, src_folded_regcost,
5489 src_related_cost, src_related_regcost) <= 0
5490 && preferrable (src_folded_cost, src_folded_regcost,
5491 src_elt_cost, src_elt_regcost) <= 0)
5493 trial = src_folded, src_folded_cost = MAX_COST;
5494 if (src_folded_force_flag)
5495 trial = force_const_mem (mode, trial);
5497 else if (src
5498 && preferrable (src_cost, src_regcost,
5499 src_eqv_cost, src_eqv_regcost) <= 0
5500 && preferrable (src_cost, src_regcost,
5501 src_related_cost, src_related_regcost) <= 0
5502 && preferrable (src_cost, src_regcost,
5503 src_elt_cost, src_elt_regcost) <= 0)
5504 trial = src, src_cost = MAX_COST;
5505 else if (src_eqv_here
5506 && preferrable (src_eqv_cost, src_eqv_regcost,
5507 src_related_cost, src_related_regcost) <= 0
5508 && preferrable (src_eqv_cost, src_eqv_regcost,
5509 src_elt_cost, src_elt_regcost) <= 0)
5510 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5511 else if (src_related
5512 && preferrable (src_related_cost, src_related_regcost,
5513 src_elt_cost, src_elt_regcost) <= 0)
5514 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5515 else
5517 trial = copy_rtx (elt->exp);
5518 elt = elt->next_same_value;
5519 src_elt_cost = MAX_COST;
5522 /* We don't normally have an insn matching (set (pc) (pc)), so
5523 check for this separately here. We will delete such an
5524 insn below.
5526 For other cases such as a table jump or conditional jump
5527 where we know the ultimate target, go ahead and replace the
5528 operand. While that may not make a valid insn, we will
5529 reemit the jump below (and also insert any necessary
5530 barriers). */
5531 if (n_sets == 1 && dest == pc_rtx
5532 && (trial == pc_rtx
5533 || (GET_CODE (trial) == LABEL_REF
5534 && ! condjump_p (insn))))
5536 SET_SRC (sets[i].rtl) = trial;
5537 cse_jumps_altered = 1;
5538 break;
5541 /* Look for a substitution that makes a valid insn. */
5542 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5544 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5546 /* If we just made a substitution inside a libcall, then we
5547 need to make the same substitution in any notes attached
5548 to the RETVAL insn. */
5549 if (libcall_insn
5550 && (GET_CODE (sets[i].orig_src) == REG
5551 || GET_CODE (sets[i].orig_src) == SUBREG
5552 || GET_CODE (sets[i].orig_src) == MEM))
5553 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5554 copy_rtx (new));
5556 /* The result of apply_change_group can be ignored; see
5557 canon_reg. */
5559 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5560 apply_change_group ();
5561 break;
5564 /* If we previously found constant pool entries for
5565 constants and this is a constant, try making a
5566 pool entry. Put it in src_folded unless we already have done
5567 this since that is where it likely came from. */
5569 else if (constant_pool_entries_cost
5570 && CONSTANT_P (trial)
5571 /* Reject cases that will abort in decode_rtx_const.
5572 On the alpha when simplifying a switch, we get
5573 (const (truncate (minus (label_ref) (label_ref)))). */
5574 && ! (GET_CODE (trial) == CONST
5575 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5576 /* Likewise on IA-64, except without the truncate. */
5577 && ! (GET_CODE (trial) == CONST
5578 && GET_CODE (XEXP (trial, 0)) == MINUS
5579 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5580 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5581 && (src_folded == 0
5582 || (GET_CODE (src_folded) != MEM
5583 && ! src_folded_force_flag))
5584 && GET_MODE_CLASS (mode) != MODE_CC
5585 && mode != VOIDmode)
5587 src_folded_force_flag = 1;
5588 src_folded = trial;
5589 src_folded_cost = constant_pool_entries_cost;
5593 src = SET_SRC (sets[i].rtl);
5595 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5596 However, there is an important exception: If both are registers
5597 that are not the head of their equivalence class, replace SET_SRC
5598 with the head of the class. If we do not do this, we will have
5599 both registers live over a portion of the basic block. This way,
5600 their lifetimes will likely abut instead of overlapping. */
5601 if (GET_CODE (dest) == REG
5602 && REGNO_QTY_VALID_P (REGNO (dest)))
5604 int dest_q = REG_QTY (REGNO (dest));
5605 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5607 if (dest_ent->mode == GET_MODE (dest)
5608 && dest_ent->first_reg != REGNO (dest)
5609 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5610 /* Don't do this if the original insn had a hard reg as
5611 SET_SRC or SET_DEST. */
5612 && (GET_CODE (sets[i].src) != REG
5613 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5614 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5615 /* We can't call canon_reg here because it won't do anything if
5616 SRC is a hard register. */
5618 int src_q = REG_QTY (REGNO (src));
5619 struct qty_table_elem *src_ent = &qty_table[src_q];
5620 int first = src_ent->first_reg;
5621 rtx new_src
5622 = (first >= FIRST_PSEUDO_REGISTER
5623 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5625 /* We must use validate-change even for this, because this
5626 might be a special no-op instruction, suitable only to
5627 tag notes onto. */
5628 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5630 src = new_src;
5631 /* If we had a constant that is cheaper than what we are now
5632 setting SRC to, use that constant. We ignored it when we
5633 thought we could make this into a no-op. */
5634 if (src_const && COST (src_const) < COST (src)
5635 && validate_change (insn, &SET_SRC (sets[i].rtl),
5636 src_const, 0))
5637 src = src_const;
5642 /* If we made a change, recompute SRC values. */
5643 if (src != sets[i].src)
5645 cse_altered = 1;
5646 do_not_record = 0;
5647 hash_arg_in_memory = 0;
5648 sets[i].src = src;
5649 sets[i].src_hash = HASH (src, mode);
5650 sets[i].src_volatile = do_not_record;
5651 sets[i].src_in_memory = hash_arg_in_memory;
5652 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5655 /* If this is a single SET, we are setting a register, and we have an
5656 equivalent constant, we want to add a REG_NOTE. We don't want
5657 to write a REG_EQUAL note for a constant pseudo since verifying that
5658 that pseudo hasn't been eliminated is a pain. Such a note also
5659 won't help anything.
5661 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5662 which can be created for a reference to a compile time computable
5663 entry in a jump table. */
5665 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5666 && GET_CODE (src_const) != REG
5667 && ! (GET_CODE (src_const) == CONST
5668 && GET_CODE (XEXP (src_const, 0)) == MINUS
5669 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5670 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5672 /* We only want a REG_EQUAL note if src_const != src. */
5673 if (! rtx_equal_p (src, src_const))
5675 /* Make sure that the rtx is not shared. */
5676 src_const = copy_rtx (src_const);
5678 /* Record the actual constant value in a REG_EQUAL note,
5679 making a new one if one does not already exist. */
5680 set_unique_reg_note (insn, REG_EQUAL, src_const);
5683 /* If storing a constant value in a register that
5684 previously held the constant value 0,
5685 record this fact with a REG_WAS_0 note on this insn.
5687 Note that the *register* is required to have previously held 0,
5688 not just any register in the quantity and we must point to the
5689 insn that set that register to zero.
5691 Rather than track each register individually, we just see if
5692 the last set for this quantity was for this register. */
5694 if (REGNO_QTY_VALID_P (REGNO (dest)))
5696 int dest_q = REG_QTY (REGNO (dest));
5697 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5699 if (dest_ent->const_rtx == const0_rtx)
5701 /* See if we previously had a REG_WAS_0 note. */
5702 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5703 rtx const_insn = dest_ent->const_insn;
5705 if ((tem = single_set (const_insn)) != 0
5706 && rtx_equal_p (SET_DEST (tem), dest))
5708 if (note)
5709 XEXP (note, 0) = const_insn;
5710 else
5711 REG_NOTES (insn)
5712 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5713 REG_NOTES (insn));
5719 /* Now deal with the destination. */
5720 do_not_record = 0;
5722 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5723 to the MEM or REG within it. */
5724 while (GET_CODE (dest) == SIGN_EXTRACT
5725 || GET_CODE (dest) == ZERO_EXTRACT
5726 || GET_CODE (dest) == SUBREG
5727 || GET_CODE (dest) == STRICT_LOW_PART)
5728 dest = XEXP (dest, 0);
5730 sets[i].inner_dest = dest;
5732 if (GET_CODE (dest) == MEM)
5734 #ifdef PUSH_ROUNDING
5735 /* Stack pushes invalidate the stack pointer. */
5736 rtx addr = XEXP (dest, 0);
5737 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5738 && XEXP (addr, 0) == stack_pointer_rtx)
5739 invalidate (stack_pointer_rtx, Pmode);
5740 #endif
5741 dest = fold_rtx (dest, insn);
5744 /* Compute the hash code of the destination now,
5745 before the effects of this instruction are recorded,
5746 since the register values used in the address computation
5747 are those before this instruction. */
5748 sets[i].dest_hash = HASH (dest, mode);
5750 /* Don't enter a bit-field in the hash table
5751 because the value in it after the store
5752 may not equal what was stored, due to truncation. */
5754 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5755 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5757 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5759 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5760 && GET_CODE (width) == CONST_INT
5761 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5762 && ! (INTVAL (src_const)
5763 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5764 /* Exception: if the value is constant,
5765 and it won't be truncated, record it. */
5767 else
5769 /* This is chosen so that the destination will be invalidated
5770 but no new value will be recorded.
5771 We must invalidate because sometimes constant
5772 values can be recorded for bitfields. */
5773 sets[i].src_elt = 0;
5774 sets[i].src_volatile = 1;
5775 src_eqv = 0;
5776 src_eqv_elt = 0;
5780 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5781 the insn. */
5782 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5784 /* One less use of the label this insn used to jump to. */
5785 delete_insn (insn);
5786 cse_jumps_altered = 1;
5787 /* No more processing for this set. */
5788 sets[i].rtl = 0;
5791 /* If this SET is now setting PC to a label, we know it used to
5792 be a conditional or computed branch. */
5793 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5795 /* Now emit a BARRIER after the unconditional jump. */
5796 if (NEXT_INSN (insn) == 0
5797 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5798 emit_barrier_after (insn);
5800 /* We reemit the jump in as many cases as possible just in
5801 case the form of an unconditional jump is significantly
5802 different than a computed jump or conditional jump.
5804 If this insn has multiple sets, then reemitting the
5805 jump is nontrivial. So instead we just force rerecognition
5806 and hope for the best. */
5807 if (n_sets == 1)
5809 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5811 JUMP_LABEL (new) = XEXP (src, 0);
5812 LABEL_NUSES (XEXP (src, 0))++;
5813 delete_insn (insn);
5814 insn = new;
5816 /* Now emit a BARRIER after the unconditional jump. */
5817 if (NEXT_INSN (insn) == 0
5818 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5819 emit_barrier_after (insn);
5821 else
5822 INSN_CODE (insn) = -1;
5824 never_reached_warning (insn, NULL);
5826 /* Do not bother deleting any unreachable code,
5827 let jump/flow do that. */
5829 cse_jumps_altered = 1;
5830 sets[i].rtl = 0;
5833 /* If destination is volatile, invalidate it and then do no further
5834 processing for this assignment. */
5836 else if (do_not_record)
5838 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5839 invalidate (dest, VOIDmode);
5840 else if (GET_CODE (dest) == MEM)
5842 /* Outgoing arguments for a libcall don't
5843 affect any recorded expressions. */
5844 if (! libcall_insn || insn == libcall_insn)
5845 invalidate (dest, VOIDmode);
5847 else if (GET_CODE (dest) == STRICT_LOW_PART
5848 || GET_CODE (dest) == ZERO_EXTRACT)
5849 invalidate (XEXP (dest, 0), GET_MODE (dest));
5850 sets[i].rtl = 0;
5853 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5854 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5856 #ifdef HAVE_cc0
5857 /* If setting CC0, record what it was set to, or a constant, if it
5858 is equivalent to a constant. If it is being set to a floating-point
5859 value, make a COMPARE with the appropriate constant of 0. If we
5860 don't do this, later code can interpret this as a test against
5861 const0_rtx, which can cause problems if we try to put it into an
5862 insn as a floating-point operand. */
5863 if (dest == cc0_rtx)
5865 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5866 this_insn_cc0_mode = mode;
5867 if (FLOAT_MODE_P (mode))
5868 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5869 CONST0_RTX (mode));
5871 #endif
5874 /* Now enter all non-volatile source expressions in the hash table
5875 if they are not already present.
5876 Record their equivalence classes in src_elt.
5877 This way we can insert the corresponding destinations into
5878 the same classes even if the actual sources are no longer in them
5879 (having been invalidated). */
5881 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5882 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5884 struct table_elt *elt;
5885 struct table_elt *classp = sets[0].src_elt;
5886 rtx dest = SET_DEST (sets[0].rtl);
5887 enum machine_mode eqvmode = GET_MODE (dest);
5889 if (GET_CODE (dest) == STRICT_LOW_PART)
5891 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5892 classp = 0;
5894 if (insert_regs (src_eqv, classp, 0))
5896 rehash_using_reg (src_eqv);
5897 src_eqv_hash = HASH (src_eqv, eqvmode);
5899 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5900 elt->in_memory = src_eqv_in_memory;
5901 src_eqv_elt = elt;
5903 /* Check to see if src_eqv_elt is the same as a set source which
5904 does not yet have an elt, and if so set the elt of the set source
5905 to src_eqv_elt. */
5906 for (i = 0; i < n_sets; i++)
5907 if (sets[i].rtl && sets[i].src_elt == 0
5908 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5909 sets[i].src_elt = src_eqv_elt;
5912 for (i = 0; i < n_sets; i++)
5913 if (sets[i].rtl && ! sets[i].src_volatile
5914 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5916 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5918 /* REG_EQUAL in setting a STRICT_LOW_PART
5919 gives an equivalent for the entire destination register,
5920 not just for the subreg being stored in now.
5921 This is a more interesting equivalence, so we arrange later
5922 to treat the entire reg as the destination. */
5923 sets[i].src_elt = src_eqv_elt;
5924 sets[i].src_hash = src_eqv_hash;
5926 else
5928 /* Insert source and constant equivalent into hash table, if not
5929 already present. */
5930 struct table_elt *classp = src_eqv_elt;
5931 rtx src = sets[i].src;
5932 rtx dest = SET_DEST (sets[i].rtl);
5933 enum machine_mode mode
5934 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5936 if (sets[i].src_elt == 0)
5938 /* Don't put a hard register source into the table if this is
5939 the last insn of a libcall. In this case, we only need
5940 to put src_eqv_elt in src_elt. */
5941 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5943 struct table_elt *elt;
5945 /* Note that these insert_regs calls cannot remove
5946 any of the src_elt's, because they would have failed to
5947 match if not still valid. */
5948 if (insert_regs (src, classp, 0))
5950 rehash_using_reg (src);
5951 sets[i].src_hash = HASH (src, mode);
5953 elt = insert (src, classp, sets[i].src_hash, mode);
5954 elt->in_memory = sets[i].src_in_memory;
5955 sets[i].src_elt = classp = elt;
5957 else
5958 sets[i].src_elt = classp;
5960 if (sets[i].src_const && sets[i].src_const_elt == 0
5961 && src != sets[i].src_const
5962 && ! rtx_equal_p (sets[i].src_const, src))
5963 sets[i].src_elt = insert (sets[i].src_const, classp,
5964 sets[i].src_const_hash, mode);
5967 else if (sets[i].src_elt == 0)
5968 /* If we did not insert the source into the hash table (e.g., it was
5969 volatile), note the equivalence class for the REG_EQUAL value, if any,
5970 so that the destination goes into that class. */
5971 sets[i].src_elt = src_eqv_elt;
5973 invalidate_from_clobbers (x);
5975 /* Some registers are invalidated by subroutine calls. Memory is
5976 invalidated by non-constant calls. */
5978 if (GET_CODE (insn) == CALL_INSN)
5980 if (! CONST_OR_PURE_CALL_P (insn))
5981 invalidate_memory ();
5982 invalidate_for_call ();
5985 /* Now invalidate everything set by this instruction.
5986 If a SUBREG or other funny destination is being set,
5987 sets[i].rtl is still nonzero, so here we invalidate the reg
5988 a part of which is being set. */
5990 for (i = 0; i < n_sets; i++)
5991 if (sets[i].rtl)
5993 /* We can't use the inner dest, because the mode associated with
5994 a ZERO_EXTRACT is significant. */
5995 rtx dest = SET_DEST (sets[i].rtl);
5997 /* Needed for registers to remove the register from its
5998 previous quantity's chain.
5999 Needed for memory if this is a nonvarying address, unless
6000 we have just done an invalidate_memory that covers even those. */
6001 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6002 invalidate (dest, VOIDmode);
6003 else if (GET_CODE (dest) == MEM)
6005 /* Outgoing arguments for a libcall don't
6006 affect any recorded expressions. */
6007 if (! libcall_insn || insn == libcall_insn)
6008 invalidate (dest, VOIDmode);
6010 else if (GET_CODE (dest) == STRICT_LOW_PART
6011 || GET_CODE (dest) == ZERO_EXTRACT)
6012 invalidate (XEXP (dest, 0), GET_MODE (dest));
6015 /* A volatile ASM invalidates everything. */
6016 if (GET_CODE (insn) == INSN
6017 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6018 && MEM_VOLATILE_P (PATTERN (insn)))
6019 flush_hash_table ();
6021 /* Make sure registers mentioned in destinations
6022 are safe for use in an expression to be inserted.
6023 This removes from the hash table
6024 any invalid entry that refers to one of these registers.
6026 We don't care about the return value from mention_regs because
6027 we are going to hash the SET_DEST values unconditionally. */
6029 for (i = 0; i < n_sets; i++)
6031 if (sets[i].rtl)
6033 rtx x = SET_DEST (sets[i].rtl);
6035 if (GET_CODE (x) != REG)
6036 mention_regs (x);
6037 else
6039 /* We used to rely on all references to a register becoming
6040 inaccessible when a register changes to a new quantity,
6041 since that changes the hash code. However, that is not
6042 safe, since after HASH_SIZE new quantities we get a
6043 hash 'collision' of a register with its own invalid
6044 entries. And since SUBREGs have been changed not to
6045 change their hash code with the hash code of the register,
6046 it wouldn't work any longer at all. So we have to check
6047 for any invalid references lying around now.
6048 This code is similar to the REG case in mention_regs,
6049 but it knows that reg_tick has been incremented, and
6050 it leaves reg_in_table as -1 . */
6051 unsigned int regno = REGNO (x);
6052 unsigned int endregno
6053 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6054 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6055 unsigned int i;
6057 for (i = regno; i < endregno; i++)
6059 if (REG_IN_TABLE (i) >= 0)
6061 remove_invalid_refs (i);
6062 REG_IN_TABLE (i) = -1;
6069 /* We may have just removed some of the src_elt's from the hash table.
6070 So replace each one with the current head of the same class. */
6072 for (i = 0; i < n_sets; i++)
6073 if (sets[i].rtl)
6075 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6076 /* If elt was removed, find current head of same class,
6077 or 0 if nothing remains of that class. */
6079 struct table_elt *elt = sets[i].src_elt;
6081 while (elt && elt->prev_same_value)
6082 elt = elt->prev_same_value;
6084 while (elt && elt->first_same_value == 0)
6085 elt = elt->next_same_value;
6086 sets[i].src_elt = elt ? elt->first_same_value : 0;
6090 /* Now insert the destinations into their equivalence classes. */
6092 for (i = 0; i < n_sets; i++)
6093 if (sets[i].rtl)
6095 rtx dest = SET_DEST (sets[i].rtl);
6096 rtx inner_dest = sets[i].inner_dest;
6097 struct table_elt *elt;
6099 /* Don't record value if we are not supposed to risk allocating
6100 floating-point values in registers that might be wider than
6101 memory. */
6102 if ((flag_float_store
6103 && GET_CODE (dest) == MEM
6104 && FLOAT_MODE_P (GET_MODE (dest)))
6105 /* Don't record BLKmode values, because we don't know the
6106 size of it, and can't be sure that other BLKmode values
6107 have the same or smaller size. */
6108 || GET_MODE (dest) == BLKmode
6109 /* Don't record values of destinations set inside a libcall block
6110 since we might delete the libcall. Things should have been set
6111 up so we won't want to reuse such a value, but we play it safe
6112 here. */
6113 || libcall_insn
6114 /* If we didn't put a REG_EQUAL value or a source into the hash
6115 table, there is no point is recording DEST. */
6116 || sets[i].src_elt == 0
6117 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6118 or SIGN_EXTEND, don't record DEST since it can cause
6119 some tracking to be wrong.
6121 ??? Think about this more later. */
6122 || (GET_CODE (dest) == SUBREG
6123 && (GET_MODE_SIZE (GET_MODE (dest))
6124 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6125 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6126 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6127 continue;
6129 /* STRICT_LOW_PART isn't part of the value BEING set,
6130 and neither is the SUBREG inside it.
6131 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6132 if (GET_CODE (dest) == STRICT_LOW_PART)
6133 dest = SUBREG_REG (XEXP (dest, 0));
6135 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6136 /* Registers must also be inserted into chains for quantities. */
6137 if (insert_regs (dest, sets[i].src_elt, 1))
6139 /* If `insert_regs' changes something, the hash code must be
6140 recalculated. */
6141 rehash_using_reg (dest);
6142 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6145 if (GET_CODE (inner_dest) == MEM
6146 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6147 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6148 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6149 Consider the case in which the address of the MEM is
6150 passed to a function, which alters the MEM. Then, if we
6151 later use Y instead of the MEM we'll miss the update. */
6152 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6153 else
6154 elt = insert (dest, sets[i].src_elt,
6155 sets[i].dest_hash, GET_MODE (dest));
6157 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6158 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6159 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6160 0))));
6162 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6163 narrower than M2, and both M1 and M2 are the same number of words,
6164 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6165 make that equivalence as well.
6167 However, BAR may have equivalences for which gen_lowpart_if_possible
6168 will produce a simpler value than gen_lowpart_if_possible applied to
6169 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6170 BAR's equivalences. If we don't get a simplified form, make
6171 the SUBREG. It will not be used in an equivalence, but will
6172 cause two similar assignments to be detected.
6174 Note the loop below will find SUBREG_REG (DEST) since we have
6175 already entered SRC and DEST of the SET in the table. */
6177 if (GET_CODE (dest) == SUBREG
6178 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6179 / UNITS_PER_WORD)
6180 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6181 && (GET_MODE_SIZE (GET_MODE (dest))
6182 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6183 && sets[i].src_elt != 0)
6185 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6186 struct table_elt *elt, *classp = 0;
6188 for (elt = sets[i].src_elt->first_same_value; elt;
6189 elt = elt->next_same_value)
6191 rtx new_src = 0;
6192 unsigned src_hash;
6193 struct table_elt *src_elt;
6194 int byte = 0;
6196 /* Ignore invalid entries. */
6197 if (GET_CODE (elt->exp) != REG
6198 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6199 continue;
6201 /* We may have already been playing subreg games. If the
6202 mode is already correct for the destination, use it. */
6203 if (GET_MODE (elt->exp) == new_mode)
6204 new_src = elt->exp;
6205 else
6207 /* Calculate big endian correction for the SUBREG_BYTE.
6208 We have already checked that M1 (GET_MODE (dest))
6209 is not narrower than M2 (new_mode). */
6210 if (BYTES_BIG_ENDIAN)
6211 byte = (GET_MODE_SIZE (GET_MODE (dest))
6212 - GET_MODE_SIZE (new_mode));
6214 new_src = simplify_gen_subreg (new_mode, elt->exp,
6215 GET_MODE (dest), byte);
6218 /* The call to simplify_gen_subreg fails if the value
6219 is VOIDmode, yet we can't do any simplification, e.g.
6220 for EXPR_LISTs denoting function call results.
6221 It is invalid to construct a SUBREG with a VOIDmode
6222 SUBREG_REG, hence a zero new_src means we can't do
6223 this substitution. */
6224 if (! new_src)
6225 continue;
6227 src_hash = HASH (new_src, new_mode);
6228 src_elt = lookup (new_src, src_hash, new_mode);
6230 /* Put the new source in the hash table is if isn't
6231 already. */
6232 if (src_elt == 0)
6234 if (insert_regs (new_src, classp, 0))
6236 rehash_using_reg (new_src);
6237 src_hash = HASH (new_src, new_mode);
6239 src_elt = insert (new_src, classp, src_hash, new_mode);
6240 src_elt->in_memory = elt->in_memory;
6242 else if (classp && classp != src_elt->first_same_value)
6243 /* Show that two things that we've seen before are
6244 actually the same. */
6245 merge_equiv_classes (src_elt, classp);
6247 classp = src_elt->first_same_value;
6248 /* Ignore invalid entries. */
6249 while (classp
6250 && GET_CODE (classp->exp) != REG
6251 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6252 classp = classp->next_same_value;
6257 /* Special handling for (set REG0 REG1) where REG0 is the
6258 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6259 be used in the sequel, so (if easily done) change this insn to
6260 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6261 that computed their value. Then REG1 will become a dead store
6262 and won't cloud the situation for later optimizations.
6264 Do not make this change if REG1 is a hard register, because it will
6265 then be used in the sequel and we may be changing a two-operand insn
6266 into a three-operand insn.
6268 Also do not do this if we are operating on a copy of INSN.
6270 Also don't do this if INSN ends a libcall; this would cause an unrelated
6271 register to be set in the middle of a libcall, and we then get bad code
6272 if the libcall is deleted. */
6274 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6275 && NEXT_INSN (PREV_INSN (insn)) == insn
6276 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6277 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6278 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6280 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6281 struct qty_table_elem *src_ent = &qty_table[src_q];
6283 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6284 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6286 rtx prev = insn;
6287 /* Scan for the previous nonnote insn, but stop at a basic
6288 block boundary. */
6291 prev = PREV_INSN (prev);
6293 while (prev && GET_CODE (prev) == NOTE
6294 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6296 /* Do not swap the registers around if the previous instruction
6297 attaches a REG_EQUIV note to REG1.
6299 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6300 from the pseudo that originally shadowed an incoming argument
6301 to another register. Some uses of REG_EQUIV might rely on it
6302 being attached to REG1 rather than REG2.
6304 This section previously turned the REG_EQUIV into a REG_EQUAL
6305 note. We cannot do that because REG_EQUIV may provide an
6306 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6308 if (prev != 0 && GET_CODE (prev) == INSN
6309 && GET_CODE (PATTERN (prev)) == SET
6310 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6311 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6313 rtx dest = SET_DEST (sets[0].rtl);
6314 rtx src = SET_SRC (sets[0].rtl);
6315 rtx note;
6317 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6318 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6319 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6320 apply_change_group ();
6322 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6323 any REG_WAS_0 note on INSN to PREV. */
6324 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6325 if (note)
6326 remove_note (prev, note);
6328 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6329 if (note)
6331 remove_note (insn, note);
6332 XEXP (note, 1) = REG_NOTES (prev);
6333 REG_NOTES (prev) = note;
6336 /* If INSN has a REG_EQUAL note, and this note mentions
6337 REG0, then we must delete it, because the value in
6338 REG0 has changed. If the note's value is REG1, we must
6339 also delete it because that is now this insn's dest. */
6340 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6341 if (note != 0
6342 && (reg_mentioned_p (dest, XEXP (note, 0))
6343 || rtx_equal_p (src, XEXP (note, 0))))
6344 remove_note (insn, note);
6349 /* If this is a conditional jump insn, record any known equivalences due to
6350 the condition being tested. */
6352 last_jump_equiv_class = 0;
6353 if (GET_CODE (insn) == JUMP_INSN
6354 && n_sets == 1 && GET_CODE (x) == SET
6355 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6356 record_jump_equiv (insn, 0);
6358 #ifdef HAVE_cc0
6359 /* If the previous insn set CC0 and this insn no longer references CC0,
6360 delete the previous insn. Here we use the fact that nothing expects CC0
6361 to be valid over an insn, which is true until the final pass. */
6362 if (prev_insn && GET_CODE (prev_insn) == INSN
6363 && (tem = single_set (prev_insn)) != 0
6364 && SET_DEST (tem) == cc0_rtx
6365 && ! reg_mentioned_p (cc0_rtx, x))
6366 delete_insn (prev_insn);
6368 prev_insn_cc0 = this_insn_cc0;
6369 prev_insn_cc0_mode = this_insn_cc0_mode;
6370 prev_insn = insn;
6371 #endif
6374 /* Remove from the hash table all expressions that reference memory. */
6376 static void
6377 invalidate_memory ()
6379 int i;
6380 struct table_elt *p, *next;
6382 for (i = 0; i < HASH_SIZE; i++)
6383 for (p = table[i]; p; p = next)
6385 next = p->next_same_hash;
6386 if (p->in_memory)
6387 remove_from_table (p, i);
6391 /* If ADDR is an address that implicitly affects the stack pointer, return
6392 1 and update the register tables to show the effect. Else, return 0. */
6394 static int
6395 addr_affects_sp_p (addr)
6396 rtx addr;
6398 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6399 && GET_CODE (XEXP (addr, 0)) == REG
6400 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6402 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6404 REG_TICK (STACK_POINTER_REGNUM)++;
6405 /* Is it possible to use a subreg of SP? */
6406 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6409 /* This should be *very* rare. */
6410 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6411 invalidate (stack_pointer_rtx, VOIDmode);
6413 return 1;
6416 return 0;
6419 /* Perform invalidation on the basis of everything about an insn
6420 except for invalidating the actual places that are SET in it.
6421 This includes the places CLOBBERed, and anything that might
6422 alias with something that is SET or CLOBBERed.
6424 X is the pattern of the insn. */
6426 static void
6427 invalidate_from_clobbers (x)
6428 rtx x;
6430 if (GET_CODE (x) == CLOBBER)
6432 rtx ref = XEXP (x, 0);
6433 if (ref)
6435 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6436 || GET_CODE (ref) == MEM)
6437 invalidate (ref, VOIDmode);
6438 else if (GET_CODE (ref) == STRICT_LOW_PART
6439 || GET_CODE (ref) == ZERO_EXTRACT)
6440 invalidate (XEXP (ref, 0), GET_MODE (ref));
6443 else if (GET_CODE (x) == PARALLEL)
6445 int i;
6446 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6448 rtx y = XVECEXP (x, 0, i);
6449 if (GET_CODE (y) == CLOBBER)
6451 rtx ref = XEXP (y, 0);
6452 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6453 || GET_CODE (ref) == MEM)
6454 invalidate (ref, VOIDmode);
6455 else if (GET_CODE (ref) == STRICT_LOW_PART
6456 || GET_CODE (ref) == ZERO_EXTRACT)
6457 invalidate (XEXP (ref, 0), GET_MODE (ref));
6463 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6464 and replace any registers in them with either an equivalent constant
6465 or the canonical form of the register. If we are inside an address,
6466 only do this if the address remains valid.
6468 OBJECT is 0 except when within a MEM in which case it is the MEM.
6470 Return the replacement for X. */
6472 static rtx
6473 cse_process_notes (x, object)
6474 rtx x;
6475 rtx object;
6477 enum rtx_code code = GET_CODE (x);
6478 const char *fmt = GET_RTX_FORMAT (code);
6479 int i;
6481 switch (code)
6483 case CONST_INT:
6484 case CONST:
6485 case SYMBOL_REF:
6486 case LABEL_REF:
6487 case CONST_DOUBLE:
6488 case CONST_VECTOR:
6489 case PC:
6490 case CC0:
6491 case LO_SUM:
6492 return x;
6494 case MEM:
6495 validate_change (x, &XEXP (x, 0),
6496 cse_process_notes (XEXP (x, 0), x), 0);
6497 return x;
6499 case EXPR_LIST:
6500 case INSN_LIST:
6501 if (REG_NOTE_KIND (x) == REG_EQUAL)
6502 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6503 if (XEXP (x, 1))
6504 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6505 return x;
6507 case SIGN_EXTEND:
6508 case ZERO_EXTEND:
6509 case SUBREG:
6511 rtx new = cse_process_notes (XEXP (x, 0), object);
6512 /* We don't substitute VOIDmode constants into these rtx,
6513 since they would impede folding. */
6514 if (GET_MODE (new) != VOIDmode)
6515 validate_change (object, &XEXP (x, 0), new, 0);
6516 return x;
6519 case REG:
6520 i = REG_QTY (REGNO (x));
6522 /* Return a constant or a constant register. */
6523 if (REGNO_QTY_VALID_P (REGNO (x)))
6525 struct qty_table_elem *ent = &qty_table[i];
6527 if (ent->const_rtx != NULL_RTX
6528 && (CONSTANT_P (ent->const_rtx)
6529 || GET_CODE (ent->const_rtx) == REG))
6531 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6532 if (new)
6533 return new;
6537 /* Otherwise, canonicalize this register. */
6538 return canon_reg (x, NULL_RTX);
6540 default:
6541 break;
6544 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6545 if (fmt[i] == 'e')
6546 validate_change (object, &XEXP (x, i),
6547 cse_process_notes (XEXP (x, i), object), 0);
6549 return x;
6552 /* Find common subexpressions between the end test of a loop and the beginning
6553 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6555 Often we have a loop where an expression in the exit test is used
6556 in the body of the loop. For example "while (*p) *q++ = *p++;".
6557 Because of the way we duplicate the loop exit test in front of the loop,
6558 however, we don't detect that common subexpression. This will be caught
6559 when global cse is implemented, but this is a quite common case.
6561 This function handles the most common cases of these common expressions.
6562 It is called after we have processed the basic block ending with the
6563 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6564 jumps to a label used only once. */
6566 static void
6567 cse_around_loop (loop_start)
6568 rtx loop_start;
6570 rtx insn;
6571 int i;
6572 struct table_elt *p;
6574 /* If the jump at the end of the loop doesn't go to the start, we don't
6575 do anything. */
6576 for (insn = PREV_INSN (loop_start);
6577 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6578 insn = PREV_INSN (insn))
6581 if (insn == 0
6582 || GET_CODE (insn) != NOTE
6583 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6584 return;
6586 /* If the last insn of the loop (the end test) was an NE comparison,
6587 we will interpret it as an EQ comparison, since we fell through
6588 the loop. Any equivalences resulting from that comparison are
6589 therefore not valid and must be invalidated. */
6590 if (last_jump_equiv_class)
6591 for (p = last_jump_equiv_class->first_same_value; p;
6592 p = p->next_same_value)
6594 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6595 || (GET_CODE (p->exp) == SUBREG
6596 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6597 invalidate (p->exp, VOIDmode);
6598 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6599 || GET_CODE (p->exp) == ZERO_EXTRACT)
6600 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6603 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6604 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6606 The only thing we do with SET_DEST is invalidate entries, so we
6607 can safely process each SET in order. It is slightly less efficient
6608 to do so, but we only want to handle the most common cases.
6610 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6611 These pseudos won't have valid entries in any of the tables indexed
6612 by register number, such as reg_qty. We avoid out-of-range array
6613 accesses by not processing any instructions created after cse started. */
6615 for (insn = NEXT_INSN (loop_start);
6616 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6617 && INSN_UID (insn) < max_insn_uid
6618 && ! (GET_CODE (insn) == NOTE
6619 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6620 insn = NEXT_INSN (insn))
6622 if (INSN_P (insn)
6623 && (GET_CODE (PATTERN (insn)) == SET
6624 || GET_CODE (PATTERN (insn)) == CLOBBER))
6625 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6626 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6627 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6628 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6629 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6630 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6631 loop_start);
6635 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6636 since they are done elsewhere. This function is called via note_stores. */
6638 static void
6639 invalidate_skipped_set (dest, set, data)
6640 rtx set;
6641 rtx dest;
6642 void *data ATTRIBUTE_UNUSED;
6644 enum rtx_code code = GET_CODE (dest);
6646 if (code == MEM
6647 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6648 /* There are times when an address can appear varying and be a PLUS
6649 during this scan when it would be a fixed address were we to know
6650 the proper equivalences. So invalidate all memory if there is
6651 a BLKmode or nonscalar memory reference or a reference to a
6652 variable address. */
6653 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6654 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6656 invalidate_memory ();
6657 return;
6660 if (GET_CODE (set) == CLOBBER
6661 || CC0_P (dest)
6662 || dest == pc_rtx)
6663 return;
6665 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6666 invalidate (XEXP (dest, 0), GET_MODE (dest));
6667 else if (code == REG || code == SUBREG || code == MEM)
6668 invalidate (dest, VOIDmode);
6671 /* Invalidate all insns from START up to the end of the function or the
6672 next label. This called when we wish to CSE around a block that is
6673 conditionally executed. */
6675 static void
6676 invalidate_skipped_block (start)
6677 rtx start;
6679 rtx insn;
6681 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6682 insn = NEXT_INSN (insn))
6684 if (! INSN_P (insn))
6685 continue;
6687 if (GET_CODE (insn) == CALL_INSN)
6689 if (! CONST_OR_PURE_CALL_P (insn))
6690 invalidate_memory ();
6691 invalidate_for_call ();
6694 invalidate_from_clobbers (PATTERN (insn));
6695 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6699 /* If modifying X will modify the value in *DATA (which is really an
6700 `rtx *'), indicate that fact by setting the pointed to value to
6701 NULL_RTX. */
6703 static void
6704 cse_check_loop_start (x, set, data)
6705 rtx x;
6706 rtx set ATTRIBUTE_UNUSED;
6707 void *data;
6709 rtx *cse_check_loop_start_value = (rtx *) data;
6711 if (*cse_check_loop_start_value == NULL_RTX
6712 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6713 return;
6715 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6716 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6717 *cse_check_loop_start_value = NULL_RTX;
6720 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6721 a loop that starts with the label at LOOP_START.
6723 If X is a SET, we see if its SET_SRC is currently in our hash table.
6724 If so, we see if it has a value equal to some register used only in the
6725 loop exit code (as marked by jump.c).
6727 If those two conditions are true, we search backwards from the start of
6728 the loop to see if that same value was loaded into a register that still
6729 retains its value at the start of the loop.
6731 If so, we insert an insn after the load to copy the destination of that
6732 load into the equivalent register and (try to) replace our SET_SRC with that
6733 register.
6735 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6737 static void
6738 cse_set_around_loop (x, insn, loop_start)
6739 rtx x;
6740 rtx insn;
6741 rtx loop_start;
6743 struct table_elt *src_elt;
6745 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6746 are setting PC or CC0 or whose SET_SRC is already a register. */
6747 if (GET_CODE (x) == SET
6748 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6749 && GET_CODE (SET_SRC (x)) != REG)
6751 src_elt = lookup (SET_SRC (x),
6752 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6753 GET_MODE (SET_DEST (x)));
6755 if (src_elt)
6756 for (src_elt = src_elt->first_same_value; src_elt;
6757 src_elt = src_elt->next_same_value)
6758 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6759 && COST (src_elt->exp) < COST (SET_SRC (x)))
6761 rtx p, set;
6763 /* Look for an insn in front of LOOP_START that sets
6764 something in the desired mode to SET_SRC (x) before we hit
6765 a label or CALL_INSN. */
6767 for (p = prev_nonnote_insn (loop_start);
6768 p && GET_CODE (p) != CALL_INSN
6769 && GET_CODE (p) != CODE_LABEL;
6770 p = prev_nonnote_insn (p))
6771 if ((set = single_set (p)) != 0
6772 && GET_CODE (SET_DEST (set)) == REG
6773 && GET_MODE (SET_DEST (set)) == src_elt->mode
6774 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6776 /* We now have to ensure that nothing between P
6777 and LOOP_START modified anything referenced in
6778 SET_SRC (x). We know that nothing within the loop
6779 can modify it, or we would have invalidated it in
6780 the hash table. */
6781 rtx q;
6782 rtx cse_check_loop_start_value = SET_SRC (x);
6783 for (q = p; q != loop_start; q = NEXT_INSN (q))
6784 if (INSN_P (q))
6785 note_stores (PATTERN (q),
6786 cse_check_loop_start,
6787 &cse_check_loop_start_value);
6789 /* If nothing was changed and we can replace our
6790 SET_SRC, add an insn after P to copy its destination
6791 to what we will be replacing SET_SRC with. */
6792 if (cse_check_loop_start_value
6793 && single_set (p)
6794 && !can_throw_internal (insn)
6795 && validate_change (insn, &SET_SRC (x),
6796 src_elt->exp, 0))
6798 /* If this creates new pseudos, this is unsafe,
6799 because the regno of new pseudo is unsuitable
6800 to index into reg_qty when cse_insn processes
6801 the new insn. Therefore, if a new pseudo was
6802 created, discard this optimization. */
6803 int nregs = max_reg_num ();
6804 rtx move
6805 = gen_move_insn (src_elt->exp, SET_DEST (set));
6806 if (nregs != max_reg_num ())
6808 if (! validate_change (insn, &SET_SRC (x),
6809 SET_SRC (set), 0))
6810 abort ();
6812 else
6813 emit_insn_after (move, p);
6815 break;
6820 /* Deal with the destination of X affecting the stack pointer. */
6821 addr_affects_sp_p (SET_DEST (x));
6823 /* See comment on similar code in cse_insn for explanation of these
6824 tests. */
6825 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6826 || GET_CODE (SET_DEST (x)) == MEM)
6827 invalidate (SET_DEST (x), VOIDmode);
6828 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6829 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6830 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6833 /* Find the end of INSN's basic block and return its range,
6834 the total number of SETs in all the insns of the block, the last insn of the
6835 block, and the branch path.
6837 The branch path indicates which branches should be followed. If a nonzero
6838 path size is specified, the block should be rescanned and a different set
6839 of branches will be taken. The branch path is only used if
6840 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6842 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6843 used to describe the block. It is filled in with the information about
6844 the current block. The incoming structure's branch path, if any, is used
6845 to construct the output branch path. */
6847 void
6848 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6849 rtx insn;
6850 struct cse_basic_block_data *data;
6851 int follow_jumps;
6852 int after_loop;
6853 int skip_blocks;
6855 rtx p = insn, q;
6856 int nsets = 0;
6857 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6858 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6859 int path_size = data->path_size;
6860 int path_entry = 0;
6861 int i;
6863 /* Update the previous branch path, if any. If the last branch was
6864 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6865 shorten the path by one and look at the previous branch. We know that
6866 at least one branch must have been taken if PATH_SIZE is nonzero. */
6867 while (path_size > 0)
6869 if (data->path[path_size - 1].status != NOT_TAKEN)
6871 data->path[path_size - 1].status = NOT_TAKEN;
6872 break;
6874 else
6875 path_size--;
6878 /* If the first instruction is marked with QImode, that means we've
6879 already processed this block. Our caller will look at DATA->LAST
6880 to figure out where to go next. We want to return the next block
6881 in the instruction stream, not some branched-to block somewhere
6882 else. We accomplish this by pretending our called forbid us to
6883 follow jumps, or skip blocks. */
6884 if (GET_MODE (insn) == QImode)
6885 follow_jumps = skip_blocks = 0;
6887 /* Scan to end of this basic block. */
6888 while (p && GET_CODE (p) != CODE_LABEL)
6890 /* Don't cse out the end of a loop. This makes a difference
6891 only for the unusual loops that always execute at least once;
6892 all other loops have labels there so we will stop in any case.
6893 Cse'ing out the end of the loop is dangerous because it
6894 might cause an invariant expression inside the loop
6895 to be reused after the end of the loop. This would make it
6896 hard to move the expression out of the loop in loop.c,
6897 especially if it is one of several equivalent expressions
6898 and loop.c would like to eliminate it.
6900 If we are running after loop.c has finished, we can ignore
6901 the NOTE_INSN_LOOP_END. */
6903 if (! after_loop && GET_CODE (p) == NOTE
6904 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6905 break;
6907 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6908 the regs restored by the longjmp come from
6909 a later time than the setjmp. */
6910 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6911 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6912 break;
6914 /* A PARALLEL can have lots of SETs in it,
6915 especially if it is really an ASM_OPERANDS. */
6916 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6917 nsets += XVECLEN (PATTERN (p), 0);
6918 else if (GET_CODE (p) != NOTE)
6919 nsets += 1;
6921 /* Ignore insns made by CSE; they cannot affect the boundaries of
6922 the basic block. */
6924 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6925 high_cuid = INSN_CUID (p);
6926 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6927 low_cuid = INSN_CUID (p);
6929 /* See if this insn is in our branch path. If it is and we are to
6930 take it, do so. */
6931 if (path_entry < path_size && data->path[path_entry].branch == p)
6933 if (data->path[path_entry].status != NOT_TAKEN)
6934 p = JUMP_LABEL (p);
6936 /* Point to next entry in path, if any. */
6937 path_entry++;
6940 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6941 was specified, we haven't reached our maximum path length, there are
6942 insns following the target of the jump, this is the only use of the
6943 jump label, and the target label is preceded by a BARRIER.
6945 Alternatively, we can follow the jump if it branches around a
6946 block of code and there are no other branches into the block.
6947 In this case invalidate_skipped_block will be called to invalidate any
6948 registers set in the block when following the jump. */
6950 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6951 && GET_CODE (p) == JUMP_INSN
6952 && GET_CODE (PATTERN (p)) == SET
6953 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6954 && JUMP_LABEL (p) != 0
6955 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6956 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6958 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6959 if ((GET_CODE (q) != NOTE
6960 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6961 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6962 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6963 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6964 break;
6966 /* If we ran into a BARRIER, this code is an extension of the
6967 basic block when the branch is taken. */
6968 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6970 /* Don't allow ourself to keep walking around an
6971 always-executed loop. */
6972 if (next_real_insn (q) == next)
6974 p = NEXT_INSN (p);
6975 continue;
6978 /* Similarly, don't put a branch in our path more than once. */
6979 for (i = 0; i < path_entry; i++)
6980 if (data->path[i].branch == p)
6981 break;
6983 if (i != path_entry)
6984 break;
6986 data->path[path_entry].branch = p;
6987 data->path[path_entry++].status = TAKEN;
6989 /* This branch now ends our path. It was possible that we
6990 didn't see this branch the last time around (when the
6991 insn in front of the target was a JUMP_INSN that was
6992 turned into a no-op). */
6993 path_size = path_entry;
6995 p = JUMP_LABEL (p);
6996 /* Mark block so we won't scan it again later. */
6997 PUT_MODE (NEXT_INSN (p), QImode);
6999 /* Detect a branch around a block of code. */
7000 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
7002 rtx tmp;
7004 if (next_real_insn (q) == next)
7006 p = NEXT_INSN (p);
7007 continue;
7010 for (i = 0; i < path_entry; i++)
7011 if (data->path[i].branch == p)
7012 break;
7014 if (i != path_entry)
7015 break;
7017 /* This is no_labels_between_p (p, q) with an added check for
7018 reaching the end of a function (in case Q precedes P). */
7019 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7020 if (GET_CODE (tmp) == CODE_LABEL)
7021 break;
7023 if (tmp == q)
7025 data->path[path_entry].branch = p;
7026 data->path[path_entry++].status = AROUND;
7028 path_size = path_entry;
7030 p = JUMP_LABEL (p);
7031 /* Mark block so we won't scan it again later. */
7032 PUT_MODE (NEXT_INSN (p), QImode);
7036 p = NEXT_INSN (p);
7039 data->low_cuid = low_cuid;
7040 data->high_cuid = high_cuid;
7041 data->nsets = nsets;
7042 data->last = p;
7044 /* If all jumps in the path are not taken, set our path length to zero
7045 so a rescan won't be done. */
7046 for (i = path_size - 1; i >= 0; i--)
7047 if (data->path[i].status != NOT_TAKEN)
7048 break;
7050 if (i == -1)
7051 data->path_size = 0;
7052 else
7053 data->path_size = path_size;
7055 /* End the current branch path. */
7056 data->path[path_size].branch = 0;
7059 /* Perform cse on the instructions of a function.
7060 F is the first instruction.
7061 NREGS is one plus the highest pseudo-reg number used in the instruction.
7063 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7064 (only if -frerun-cse-after-loop).
7066 Returns 1 if jump_optimize should be redone due to simplifications
7067 in conditional jump instructions. */
7070 cse_main (f, nregs, after_loop, file)
7071 rtx f;
7072 int nregs;
7073 int after_loop;
7074 FILE *file;
7076 struct cse_basic_block_data val;
7077 rtx insn = f;
7078 int i;
7080 cse_jumps_altered = 0;
7081 recorded_label_ref = 0;
7082 constant_pool_entries_cost = 0;
7083 val.path_size = 0;
7085 init_recog ();
7086 init_alias_analysis ();
7088 max_reg = nregs;
7090 max_insn_uid = get_max_uid ();
7092 reg_eqv_table = (struct reg_eqv_elem *)
7093 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7095 #ifdef LOAD_EXTEND_OP
7097 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7098 and change the code and mode as appropriate. */
7099 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7100 #endif
7102 /* Reset the counter indicating how many elements have been made
7103 thus far. */
7104 n_elements_made = 0;
7106 /* Find the largest uid. */
7108 max_uid = get_max_uid ();
7109 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7111 /* Compute the mapping from uids to cuids.
7112 CUIDs are numbers assigned to insns, like uids,
7113 except that cuids increase monotonically through the code.
7114 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7115 between two insns is not affected by -g. */
7117 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7119 if (GET_CODE (insn) != NOTE
7120 || NOTE_LINE_NUMBER (insn) < 0)
7121 INSN_CUID (insn) = ++i;
7122 else
7123 /* Give a line number note the same cuid as preceding insn. */
7124 INSN_CUID (insn) = i;
7127 ggc_push_context ();
7129 /* Loop over basic blocks.
7130 Compute the maximum number of qty's needed for each basic block
7131 (which is 2 for each SET). */
7132 insn = f;
7133 while (insn)
7135 cse_altered = 0;
7136 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7137 flag_cse_skip_blocks);
7139 /* If this basic block was already processed or has no sets, skip it. */
7140 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7142 PUT_MODE (insn, VOIDmode);
7143 insn = (val.last ? NEXT_INSN (val.last) : 0);
7144 val.path_size = 0;
7145 continue;
7148 cse_basic_block_start = val.low_cuid;
7149 cse_basic_block_end = val.high_cuid;
7150 max_qty = val.nsets * 2;
7152 if (file)
7153 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7154 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7155 val.nsets);
7157 /* Make MAX_QTY bigger to give us room to optimize
7158 past the end of this basic block, if that should prove useful. */
7159 if (max_qty < 500)
7160 max_qty = 500;
7162 max_qty += max_reg;
7164 /* If this basic block is being extended by following certain jumps,
7165 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7166 Otherwise, we start after this basic block. */
7167 if (val.path_size > 0)
7168 cse_basic_block (insn, val.last, val.path, 0);
7169 else
7171 int old_cse_jumps_altered = cse_jumps_altered;
7172 rtx temp;
7174 /* When cse changes a conditional jump to an unconditional
7175 jump, we want to reprocess the block, since it will give
7176 us a new branch path to investigate. */
7177 cse_jumps_altered = 0;
7178 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7179 if (cse_jumps_altered == 0
7180 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7181 insn = temp;
7183 cse_jumps_altered |= old_cse_jumps_altered;
7186 if (cse_altered)
7187 ggc_collect ();
7189 #ifdef USE_C_ALLOCA
7190 alloca (0);
7191 #endif
7194 ggc_pop_context ();
7196 if (max_elements_made < n_elements_made)
7197 max_elements_made = n_elements_made;
7199 /* Clean up. */
7200 end_alias_analysis ();
7201 free (uid_cuid);
7202 free (reg_eqv_table);
7204 return cse_jumps_altered || recorded_label_ref;
7207 /* Process a single basic block. FROM and TO and the limits of the basic
7208 block. NEXT_BRANCH points to the branch path when following jumps or
7209 a null path when not following jumps.
7211 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7212 loop. This is true when we are being called for the last time on a
7213 block and this CSE pass is before loop.c. */
7215 static rtx
7216 cse_basic_block (from, to, next_branch, around_loop)
7217 rtx from, to;
7218 struct branch_path *next_branch;
7219 int around_loop;
7221 rtx insn;
7222 int to_usage = 0;
7223 rtx libcall_insn = NULL_RTX;
7224 int num_insns = 0;
7226 /* This array is undefined before max_reg, so only allocate
7227 the space actually needed and adjust the start. */
7229 qty_table
7230 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7231 * sizeof (struct qty_table_elem));
7232 qty_table -= max_reg;
7234 new_basic_block ();
7236 /* TO might be a label. If so, protect it from being deleted. */
7237 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7238 ++LABEL_NUSES (to);
7240 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7242 enum rtx_code code = GET_CODE (insn);
7244 /* If we have processed 1,000 insns, flush the hash table to
7245 avoid extreme quadratic behavior. We must not include NOTEs
7246 in the count since there may be more of them when generating
7247 debugging information. If we clear the table at different
7248 times, code generated with -g -O might be different than code
7249 generated with -O but not -g.
7251 ??? This is a real kludge and needs to be done some other way.
7252 Perhaps for 2.9. */
7253 if (code != NOTE && num_insns++ > 1000)
7255 flush_hash_table ();
7256 num_insns = 0;
7259 /* See if this is a branch that is part of the path. If so, and it is
7260 to be taken, do so. */
7261 if (next_branch->branch == insn)
7263 enum taken status = next_branch++->status;
7264 if (status != NOT_TAKEN)
7266 if (status == TAKEN)
7267 record_jump_equiv (insn, 1);
7268 else
7269 invalidate_skipped_block (NEXT_INSN (insn));
7271 /* Set the last insn as the jump insn; it doesn't affect cc0.
7272 Then follow this branch. */
7273 #ifdef HAVE_cc0
7274 prev_insn_cc0 = 0;
7275 prev_insn = insn;
7276 #endif
7277 insn = JUMP_LABEL (insn);
7278 continue;
7282 if (GET_MODE (insn) == QImode)
7283 PUT_MODE (insn, VOIDmode);
7285 if (GET_RTX_CLASS (code) == 'i')
7287 rtx p;
7289 /* Process notes first so we have all notes in canonical forms when
7290 looking for duplicate operations. */
7292 if (REG_NOTES (insn))
7293 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7295 /* Track when we are inside in LIBCALL block. Inside such a block,
7296 we do not want to record destinations. The last insn of a
7297 LIBCALL block is not considered to be part of the block, since
7298 its destination is the result of the block and hence should be
7299 recorded. */
7301 if (REG_NOTES (insn) != 0)
7303 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7304 libcall_insn = XEXP (p, 0);
7305 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7306 libcall_insn = 0;
7309 cse_insn (insn, libcall_insn);
7311 /* If we haven't already found an insn where we added a LABEL_REF,
7312 check this one. */
7313 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7314 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7315 (void *) insn))
7316 recorded_label_ref = 1;
7319 /* If INSN is now an unconditional jump, skip to the end of our
7320 basic block by pretending that we just did the last insn in the
7321 basic block. If we are jumping to the end of our block, show
7322 that we can have one usage of TO. */
7324 if (any_uncondjump_p (insn))
7326 if (to == 0)
7328 free (qty_table + max_reg);
7329 return 0;
7332 if (JUMP_LABEL (insn) == to)
7333 to_usage = 1;
7335 /* Maybe TO was deleted because the jump is unconditional.
7336 If so, there is nothing left in this basic block. */
7337 /* ??? Perhaps it would be smarter to set TO
7338 to whatever follows this insn,
7339 and pretend the basic block had always ended here. */
7340 if (INSN_DELETED_P (to))
7341 break;
7343 insn = PREV_INSN (to);
7346 /* See if it is ok to keep on going past the label
7347 which used to end our basic block. Remember that we incremented
7348 the count of that label, so we decrement it here. If we made
7349 a jump unconditional, TO_USAGE will be one; in that case, we don't
7350 want to count the use in that jump. */
7352 if (to != 0 && NEXT_INSN (insn) == to
7353 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7355 struct cse_basic_block_data val;
7356 rtx prev;
7358 insn = NEXT_INSN (to);
7360 /* If TO was the last insn in the function, we are done. */
7361 if (insn == 0)
7363 free (qty_table + max_reg);
7364 return 0;
7367 /* If TO was preceded by a BARRIER we are done with this block
7368 because it has no continuation. */
7369 prev = prev_nonnote_insn (to);
7370 if (prev && GET_CODE (prev) == BARRIER)
7372 free (qty_table + max_reg);
7373 return insn;
7376 /* Find the end of the following block. Note that we won't be
7377 following branches in this case. */
7378 to_usage = 0;
7379 val.path_size = 0;
7380 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7382 /* If the tables we allocated have enough space left
7383 to handle all the SETs in the next basic block,
7384 continue through it. Otherwise, return,
7385 and that block will be scanned individually. */
7386 if (val.nsets * 2 + next_qty > max_qty)
7387 break;
7389 cse_basic_block_start = val.low_cuid;
7390 cse_basic_block_end = val.high_cuid;
7391 to = val.last;
7393 /* Prevent TO from being deleted if it is a label. */
7394 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7395 ++LABEL_NUSES (to);
7397 /* Back up so we process the first insn in the extension. */
7398 insn = PREV_INSN (insn);
7402 if (next_qty > max_qty)
7403 abort ();
7405 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7406 the previous insn is the only insn that branches to the head of a loop,
7407 we can cse into the loop. Don't do this if we changed the jump
7408 structure of a loop unless we aren't going to be following jumps. */
7410 insn = prev_nonnote_insn (to);
7411 if ((cse_jumps_altered == 0
7412 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7413 && around_loop && to != 0
7414 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7415 && GET_CODE (insn) == JUMP_INSN
7416 && JUMP_LABEL (insn) != 0
7417 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7418 cse_around_loop (JUMP_LABEL (insn));
7420 free (qty_table + max_reg);
7422 return to ? NEXT_INSN (to) : 0;
7425 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7426 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7428 static int
7429 check_for_label_ref (rtl, data)
7430 rtx *rtl;
7431 void *data;
7433 rtx insn = (rtx) data;
7435 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7436 we must rerun jump since it needs to place the note. If this is a
7437 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7438 since no REG_LABEL will be added. */
7439 return (GET_CODE (*rtl) == LABEL_REF
7440 && ! LABEL_REF_NONLOCAL_P (*rtl)
7441 && LABEL_P (XEXP (*rtl, 0))
7442 && INSN_UID (XEXP (*rtl, 0)) != 0
7443 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7446 /* Count the number of times registers are used (not set) in X.
7447 COUNTS is an array in which we accumulate the count, INCR is how much
7448 we count each register usage.
7450 Don't count a usage of DEST, which is the SET_DEST of a SET which
7451 contains X in its SET_SRC. This is because such a SET does not
7452 modify the liveness of DEST. */
7454 static void
7455 count_reg_usage (x, counts, dest, incr)
7456 rtx x;
7457 int *counts;
7458 rtx dest;
7459 int incr;
7461 enum rtx_code code;
7462 rtx note;
7463 const char *fmt;
7464 int i, j;
7466 if (x == 0)
7467 return;
7469 switch (code = GET_CODE (x))
7471 case REG:
7472 if (x != dest)
7473 counts[REGNO (x)] += incr;
7474 return;
7476 case PC:
7477 case CC0:
7478 case CONST:
7479 case CONST_INT:
7480 case CONST_DOUBLE:
7481 case CONST_VECTOR:
7482 case SYMBOL_REF:
7483 case LABEL_REF:
7484 return;
7486 case CLOBBER:
7487 /* If we are clobbering a MEM, mark any registers inside the address
7488 as being used. */
7489 if (GET_CODE (XEXP (x, 0)) == MEM)
7490 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7491 return;
7493 case SET:
7494 /* Unless we are setting a REG, count everything in SET_DEST. */
7495 if (GET_CODE (SET_DEST (x)) != REG)
7496 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7498 /* If SRC has side-effects, then we can't delete this insn, so the
7499 usage of SET_DEST inside SRC counts.
7501 ??? Strictly-speaking, we might be preserving this insn
7502 because some other SET has side-effects, but that's hard
7503 to do and can't happen now. */
7504 count_reg_usage (SET_SRC (x), counts,
7505 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7506 incr);
7507 return;
7509 case CALL_INSN:
7510 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7511 /* Fall through. */
7513 case INSN:
7514 case JUMP_INSN:
7515 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7517 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7518 use them. */
7520 note = find_reg_equal_equiv_note (x);
7521 if (note)
7522 count_reg_usage (XEXP (note, 0), counts, NULL_RTX, incr);
7523 return;
7525 case INSN_LIST:
7526 abort ();
7528 default:
7529 break;
7532 fmt = GET_RTX_FORMAT (code);
7533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7535 if (fmt[i] == 'e')
7536 count_reg_usage (XEXP (x, i), counts, dest, incr);
7537 else if (fmt[i] == 'E')
7538 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7539 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7543 /* Return true if set is live. */
7544 static bool
7545 set_live_p (set, insn, counts)
7546 rtx set;
7547 rtx insn ATTRIBUTE_UNUSED; /* Only used with HAVE_cc0. */
7548 int *counts;
7550 #ifdef HAVE_cc0
7551 rtx tem;
7552 #endif
7554 if (set_noop_p (set))
7557 #ifdef HAVE_cc0
7558 else if (GET_CODE (SET_DEST (set)) == CC0
7559 && !side_effects_p (SET_SRC (set))
7560 && ((tem = next_nonnote_insn (insn)) == 0
7561 || !INSN_P (tem)
7562 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7563 return false;
7564 #endif
7565 else if (GET_CODE (SET_DEST (set)) != REG
7566 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7567 || counts[REGNO (SET_DEST (set))] != 0
7568 || side_effects_p (SET_SRC (set))
7569 /* An ADDRESSOF expression can turn into a use of the
7570 internal arg pointer, so always consider the
7571 internal arg pointer live. If it is truly dead,
7572 flow will delete the initializing insn. */
7573 || (SET_DEST (set) == current_function_internal_arg_pointer))
7574 return true;
7575 return false;
7578 /* Return true if insn is live. */
7580 static bool
7581 insn_live_p (insn, counts)
7582 rtx insn;
7583 int *counts;
7585 int i;
7586 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7587 return true;
7588 else if (GET_CODE (PATTERN (insn)) == SET)
7589 return set_live_p (PATTERN (insn), insn, counts);
7590 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7592 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7594 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7596 if (GET_CODE (elt) == SET)
7598 if (set_live_p (elt, insn, counts))
7599 return true;
7601 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7602 return true;
7604 return false;
7606 else
7607 return true;
7610 /* Return true if libcall is dead as a whole. */
7612 static bool
7613 dead_libcall_p (insn, counts)
7614 rtx insn;
7615 int *counts;
7617 rtx note;
7618 /* See if there's a REG_EQUAL note on this insn and try to
7619 replace the source with the REG_EQUAL expression.
7621 We assume that insns with REG_RETVALs can only be reg->reg
7622 copies at this point. */
7623 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7624 if (note)
7626 rtx set = single_set (insn);
7627 rtx new = simplify_rtx (XEXP (note, 0));
7629 if (!new)
7630 new = XEXP (note, 0);
7632 /* While changing insn, we must update the counts accordingly. */
7633 count_reg_usage (insn, counts, NULL_RTX, -1);
7635 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7637 count_reg_usage (insn, counts, NULL_RTX, 1);
7638 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7639 remove_note (insn, note);
7640 return true;
7642 count_reg_usage (insn, counts, NULL_RTX, 1);
7644 return false;
7647 /* Scan all the insns and delete any that are dead; i.e., they store a register
7648 that is never used or they copy a register to itself.
7650 This is used to remove insns made obviously dead by cse, loop or other
7651 optimizations. It improves the heuristics in loop since it won't try to
7652 move dead invariants out of loops or make givs for dead quantities. The
7653 remaining passes of the compilation are also sped up. */
7656 delete_trivially_dead_insns (insns, nreg)
7657 rtx insns;
7658 int nreg;
7660 int *counts;
7661 rtx insn, prev;
7662 int in_libcall = 0, dead_libcall = 0;
7663 int ndead = 0, nlastdead, niterations = 0;
7665 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7666 /* First count the number of times each register is used. */
7667 counts = (int *) xcalloc (nreg, sizeof (int));
7668 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7669 count_reg_usage (insn, counts, NULL_RTX, 1);
7673 nlastdead = ndead;
7674 niterations++;
7675 /* Go from the last insn to the first and delete insns that only set unused
7676 registers or copy a register to itself. As we delete an insn, remove
7677 usage counts for registers it uses.
7679 The first jump optimization pass may leave a real insn as the last
7680 insn in the function. We must not skip that insn or we may end
7681 up deleting code that is not really dead. */
7682 insn = get_last_insn ();
7683 if (! INSN_P (insn))
7684 insn = prev_real_insn (insn);
7686 for (; insn; insn = prev)
7688 int live_insn = 0;
7690 prev = prev_real_insn (insn);
7692 /* Don't delete any insns that are part of a libcall block unless
7693 we can delete the whole libcall block.
7695 Flow or loop might get confused if we did that. Remember
7696 that we are scanning backwards. */
7697 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7699 in_libcall = 1;
7700 live_insn = 1;
7701 dead_libcall = dead_libcall_p (insn, counts);
7703 else if (in_libcall)
7704 live_insn = ! dead_libcall;
7705 else
7706 live_insn = insn_live_p (insn, counts);
7708 /* If this is a dead insn, delete it and show registers in it aren't
7709 being used. */
7711 if (! live_insn)
7713 count_reg_usage (insn, counts, NULL_RTX, -1);
7714 delete_insn_and_edges (insn);
7715 ndead++;
7718 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7720 in_libcall = 0;
7721 dead_libcall = 0;
7725 while (ndead != nlastdead);
7727 if (rtl_dump_file && ndead)
7728 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7729 ndead, niterations);
7730 /* Clean up. */
7731 free (counts);
7732 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7733 return ndead;