1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table
[OTI_MAX
];
59 rtx libfunc_table
[LTI_MAX
];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table
[CTI_MAX
];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab
[NUM_RTX_CODE
+ 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
87 /* The insn generating function can not take an rtx_code argument.
88 TRAP_RTX is used as an rtx argument. Its code is replaced with
89 the code to be used in the trap insn and all other fields are ignored. */
90 static GTY(()) rtx trap_rtx
;
92 static int add_equal_note (rtx
, rtx
, enum rtx_code
, rtx
, rtx
);
93 static rtx
widen_operand (rtx
, enum machine_mode
, enum machine_mode
, int,
95 static void prepare_cmp_insn (rtx
*, rtx
*, enum rtx_code
*, rtx
,
96 enum machine_mode
*, int *,
97 enum can_compare_purpose
);
98 static enum insn_code
can_fix_p (enum machine_mode
, enum machine_mode
, int,
100 static enum insn_code
can_float_p (enum machine_mode
, enum machine_mode
, int);
101 static optab
new_optab (void);
102 static convert_optab
new_convert_optab (void);
103 static inline optab
init_optab (enum rtx_code
);
104 static inline optab
init_optabv (enum rtx_code
);
105 static inline convert_optab
init_convert_optab (enum rtx_code
);
106 static void init_libfuncs (optab
, int, int, const char *, int);
107 static void init_integral_libfuncs (optab
, const char *, int);
108 static void init_floating_libfuncs (optab
, const char *, int);
109 static void init_interclass_conv_libfuncs (convert_optab
, const char *,
110 enum mode_class
, enum mode_class
);
111 static void init_intraclass_conv_libfuncs (convert_optab
, const char *,
112 enum mode_class
, bool);
113 static void emit_cmp_and_jump_insn_1 (rtx
, rtx
, enum machine_mode
,
114 enum rtx_code
, int, rtx
);
115 static void prepare_float_lib_cmp (rtx
*, rtx
*, enum rtx_code
*,
116 enum machine_mode
*, int *);
117 static rtx
widen_clz (enum machine_mode
, rtx
, rtx
);
118 static rtx
expand_parity (enum machine_mode
, rtx
, rtx
);
120 #ifndef HAVE_conditional_trap
121 #define HAVE_conditional_trap 0
122 #define gen_conditional_trap(a,b) (abort (), NULL_RTX)
125 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
126 the result of operation CODE applied to OP0 (and OP1 if it is a binary
129 If the last insn does not set TARGET, don't do anything, but return 1.
131 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
132 don't add the REG_EQUAL note but return 0. Our caller can then try
133 again, ensuring that TARGET is not one of the operands. */
136 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
138 rtx last_insn
, insn
, set
;
143 || NEXT_INSN (insns
) == NULL_RTX
)
146 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
147 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
148 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
149 && GET_RTX_CLASS (code
) != RTX_COMPARE
150 && GET_RTX_CLASS (code
) != RTX_UNARY
)
153 if (GET_CODE (target
) == ZERO_EXTRACT
)
156 for (last_insn
= insns
;
157 NEXT_INSN (last_insn
) != NULL_RTX
;
158 last_insn
= NEXT_INSN (last_insn
))
161 set
= single_set (last_insn
);
165 if (! rtx_equal_p (SET_DEST (set
), target
)
166 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
167 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
168 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
171 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
172 besides the last insn. */
173 if (reg_overlap_mentioned_p (target
, op0
)
174 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
176 insn
= PREV_INSN (last_insn
);
177 while (insn
!= NULL_RTX
)
179 if (reg_set_p (target
, insn
))
182 insn
= PREV_INSN (insn
);
186 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
187 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
189 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
191 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
196 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
197 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
198 not actually do a sign-extend or zero-extend, but can leave the
199 higher-order bits of the result rtx undefined, for example, in the case
200 of logical operations, but not right shifts. */
203 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
204 int unsignedp
, int no_extend
)
208 /* If we don't have to extend and this is a constant, return it. */
209 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
212 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
213 extend since it will be more efficient to do so unless the signedness of
214 a promoted object differs from our extension. */
216 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
217 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
218 return convert_modes (mode
, oldmode
, op
, unsignedp
);
220 /* If MODE is no wider than a single word, we return a paradoxical
222 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
223 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
225 /* Otherwise, get an object of MODE, clobber it, and set the low-order
228 result
= gen_reg_rtx (mode
);
229 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
230 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
234 /* Return the optab used for computing the operation given by
235 the tree code, CODE. This function is not always usable (for
236 example, it cannot give complete results for multiplication
237 or division) but probably ought to be relied on more widely
238 throughout the expander. */
240 optab_for_tree_code (enum tree_code code
, tree type
)
252 return one_cmpl_optab
;
261 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
269 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
275 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
284 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
287 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
293 trapv
= flag_trapv
&& INTEGRAL_TYPE_P (type
) && !TYPE_UNSIGNED (type
);
297 return trapv
? addv_optab
: add_optab
;
300 return trapv
? subv_optab
: sub_optab
;
303 return trapv
? smulv_optab
: smul_optab
;
306 return trapv
? negv_optab
: neg_optab
;
309 return trapv
? absv_optab
: abs_optab
;
316 /* Like expand_binop, but return a constant rtx if the result can be
317 calculated at compile time. The arguments and return value are
318 otherwise the same as for expand_binop. */
321 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
322 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
323 enum optab_methods methods
)
325 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
326 return simplify_gen_binary (binoptab
->code
, mode
, op0
, op1
);
328 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
331 /* Like simplify_expand_binop, but always put the result in TARGET.
332 Return true if the expansion succeeded. */
335 force_expand_binop (enum machine_mode mode
, optab binoptab
,
336 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
337 enum optab_methods methods
)
339 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
340 target
, unsignedp
, methods
);
344 emit_move_insn (target
, x
);
348 /* This subroutine of expand_doubleword_shift handles the cases in which
349 the effective shift value is >= BITS_PER_WORD. The arguments and return
350 value are the same as for the parent routine, except that SUPERWORD_OP1
351 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
352 INTO_TARGET may be null if the caller has decided to calculate it. */
355 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
356 rtx outof_target
, rtx into_target
,
357 int unsignedp
, enum optab_methods methods
)
359 if (into_target
!= 0)
360 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
361 into_target
, unsignedp
, methods
))
364 if (outof_target
!= 0)
366 /* For a signed right shift, we must fill OUTOF_TARGET with copies
367 of the sign bit, otherwise we must fill it with zeros. */
368 if (binoptab
!= ashr_optab
)
369 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
371 if (!force_expand_binop (word_mode
, binoptab
,
372 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
373 outof_target
, unsignedp
, methods
))
379 /* This subroutine of expand_doubleword_shift handles the cases in which
380 the effective shift value is < BITS_PER_WORD. The arguments and return
381 value are the same as for the parent routine. */
384 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
385 rtx outof_input
, rtx into_input
, rtx op1
,
386 rtx outof_target
, rtx into_target
,
387 int unsignedp
, enum optab_methods methods
,
388 unsigned HOST_WIDE_INT shift_mask
)
390 optab reverse_unsigned_shift
, unsigned_shift
;
393 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
394 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
396 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
397 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
398 the opposite direction to BINOPTAB. */
399 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
401 carries
= outof_input
;
402 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
403 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
408 /* We must avoid shifting by BITS_PER_WORD bits since that is either
409 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
410 has unknown behaviour. Do a single shift first, then shift by the
411 remainder. It's OK to use ~OP1 as the remainder if shift counts
412 are truncated to the mode size. */
413 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
414 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
415 if (shift_mask
== BITS_PER_WORD
- 1)
417 tmp
= immed_double_const (-1, -1, op1_mode
);
418 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
423 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
424 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
428 if (tmp
== 0 || carries
== 0)
430 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
431 carries
, tmp
, 0, unsignedp
, methods
);
435 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
436 so the result can go directly into INTO_TARGET if convenient. */
437 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
438 into_target
, unsignedp
, methods
);
442 /* Now OR in the bits carried over from OUTOF_INPUT. */
443 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
444 into_target
, unsignedp
, methods
))
447 /* Use a standard word_mode shift for the out-of half. */
448 if (outof_target
!= 0)
449 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
450 outof_target
, unsignedp
, methods
))
457 #ifdef HAVE_conditional_move
458 /* Try implementing expand_doubleword_shift using conditional moves.
459 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
460 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
461 are the shift counts to use in the former and latter case. All other
462 arguments are the same as the parent routine. */
465 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
466 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
467 rtx outof_input
, rtx into_input
,
468 rtx subword_op1
, rtx superword_op1
,
469 rtx outof_target
, rtx into_target
,
470 int unsignedp
, enum optab_methods methods
,
471 unsigned HOST_WIDE_INT shift_mask
)
473 rtx outof_superword
, into_superword
;
475 /* Put the superword version of the output into OUTOF_SUPERWORD and
477 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
478 if (outof_target
!= 0 && subword_op1
== superword_op1
)
480 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
481 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
482 into_superword
= outof_target
;
483 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
484 outof_superword
, 0, unsignedp
, methods
))
489 into_superword
= gen_reg_rtx (word_mode
);
490 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
491 outof_superword
, into_superword
,
496 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
497 if (!expand_subword_shift (op1_mode
, binoptab
,
498 outof_input
, into_input
, subword_op1
,
499 outof_target
, into_target
,
500 unsignedp
, methods
, shift_mask
))
503 /* Select between them. Do the INTO half first because INTO_SUPERWORD
504 might be the current value of OUTOF_TARGET. */
505 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
506 into_target
, into_superword
, word_mode
, false))
509 if (outof_target
!= 0)
510 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
511 outof_target
, outof_superword
,
519 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
520 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
521 input operand; the shift moves bits in the direction OUTOF_INPUT->
522 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
523 of the target. OP1 is the shift count and OP1_MODE is its mode.
524 If OP1 is constant, it will have been truncated as appropriate
525 and is known to be nonzero.
527 If SHIFT_MASK is zero, the result of word shifts is undefined when the
528 shift count is outside the range [0, BITS_PER_WORD). This routine must
529 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
531 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
532 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
533 fill with zeros or sign bits as appropriate.
535 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesise
536 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
537 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
538 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
541 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
542 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
543 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
544 function wants to calculate it itself.
546 Return true if the shift could be successfully synthesized. */
549 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
550 rtx outof_input
, rtx into_input
, rtx op1
,
551 rtx outof_target
, rtx into_target
,
552 int unsignedp
, enum optab_methods methods
,
553 unsigned HOST_WIDE_INT shift_mask
)
555 rtx superword_op1
, tmp
, cmp1
, cmp2
;
556 rtx subword_label
, done_label
;
557 enum rtx_code cmp_code
;
559 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
560 fill the result with sign or zero bits as appropriate. If so, the value
561 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
562 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
563 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
565 This isn't worthwhile for constant shifts since the optimizers will
566 cope better with in-range shift counts. */
567 if (shift_mask
>= BITS_PER_WORD
569 && !CONSTANT_P (op1
))
571 if (!expand_doubleword_shift (op1_mode
, binoptab
,
572 outof_input
, into_input
, op1
,
574 unsignedp
, methods
, shift_mask
))
576 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
577 outof_target
, unsignedp
, methods
))
582 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
583 is true when the effective shift value is less than BITS_PER_WORD.
584 Set SUPERWORD_OP1 to the shift count that should be used to shift
585 OUTOF_INPUT into INTO_TARGET when the condition is false. */
586 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
587 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
589 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
590 is a subword shift count. */
591 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
593 cmp2
= CONST0_RTX (op1_mode
);
599 /* Set CMP1 to OP1 - BITS_PER_WORD. */
600 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
602 cmp2
= CONST0_RTX (op1_mode
);
604 superword_op1
= cmp1
;
609 /* If we can compute the condition at compile time, pick the
610 appropriate subroutine. */
611 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
612 if (tmp
!= 0 && GET_CODE (tmp
) == CONST_INT
)
614 if (tmp
== const0_rtx
)
615 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
616 outof_target
, into_target
,
619 return expand_subword_shift (op1_mode
, binoptab
,
620 outof_input
, into_input
, op1
,
621 outof_target
, into_target
,
622 unsignedp
, methods
, shift_mask
);
625 #ifdef HAVE_conditional_move
626 /* Try using conditional moves to generate straight-line code. */
628 rtx start
= get_last_insn ();
629 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
630 cmp_code
, cmp1
, cmp2
,
631 outof_input
, into_input
,
633 outof_target
, into_target
,
634 unsignedp
, methods
, shift_mask
))
636 delete_insns_since (start
);
640 /* As a last resort, use branches to select the correct alternative. */
641 subword_label
= gen_label_rtx ();
642 done_label
= gen_label_rtx ();
644 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
645 0, 0, subword_label
);
647 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
648 outof_target
, into_target
,
652 emit_jump_insn (gen_jump (done_label
));
654 emit_label (subword_label
);
656 if (!expand_subword_shift (op1_mode
, binoptab
,
657 outof_input
, into_input
, op1
,
658 outof_target
, into_target
,
659 unsignedp
, methods
, shift_mask
))
662 emit_label (done_label
);
666 /* Wrapper around expand_binop which takes an rtx code to specify
667 the operation to perform, not an optab pointer. All other
668 arguments are the same. */
670 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
671 rtx op1
, rtx target
, int unsignedp
,
672 enum optab_methods methods
)
674 optab binop
= code_to_optab
[(int) code
];
678 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
681 /* Generate code to perform an operation specified by BINOPTAB
682 on operands OP0 and OP1, with result having machine-mode MODE.
684 UNSIGNEDP is for the case where we have to widen the operands
685 to perform the operation. It says to use zero-extension.
687 If TARGET is nonzero, the value
688 is generated there, if it is convenient to do so.
689 In all cases an rtx is returned for the locus of the value;
690 this may or may not be TARGET. */
693 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
694 rtx target
, int unsignedp
, enum optab_methods methods
)
696 enum optab_methods next_methods
697 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
698 ? OPTAB_WIDEN
: methods
);
699 enum mode_class
class;
700 enum machine_mode wider_mode
;
702 int commutative_op
= 0;
703 int shift_op
= (binoptab
->code
== ASHIFT
704 || binoptab
->code
== ASHIFTRT
705 || binoptab
->code
== LSHIFTRT
706 || binoptab
->code
== ROTATE
707 || binoptab
->code
== ROTATERT
);
708 rtx entry_last
= get_last_insn ();
711 class = GET_MODE_CLASS (mode
);
715 /* Load duplicate non-volatile operands once. */
716 if (rtx_equal_p (op0
, op1
) && ! volatile_refs_p (op0
))
718 op0
= force_not_mem (op0
);
723 op0
= force_not_mem (op0
);
724 op1
= force_not_mem (op1
);
728 /* If subtracting an integer constant, convert this into an addition of
729 the negated constant. */
731 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
733 op1
= negate_rtx (mode
, op1
);
734 binoptab
= add_optab
;
737 /* If we are inside an appropriately-short loop and we are optimizing,
738 force expensive constants into a register. */
739 if (CONSTANT_P (op0
) && optimize
740 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
741 op0
= force_reg (mode
, op0
);
743 if (CONSTANT_P (op1
) && optimize
744 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
745 op1
= force_reg (mode
, op1
);
747 /* Record where to delete back to if we backtrack. */
748 last
= get_last_insn ();
750 /* If operation is commutative,
751 try to make the first operand a register.
752 Even better, try to make it the same as the target.
753 Also try to make the last operand a constant. */
754 if (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
755 || binoptab
== smul_widen_optab
756 || binoptab
== umul_widen_optab
757 || binoptab
== smul_highpart_optab
758 || binoptab
== umul_highpart_optab
)
762 if (((target
== 0 || REG_P (target
))
766 : rtx_equal_p (op1
, target
))
767 || GET_CODE (op0
) == CONST_INT
)
775 /* If we can do it with a three-operand insn, do so. */
777 if (methods
!= OPTAB_MUST_WIDEN
778 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
780 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
781 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
782 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
784 rtx xop0
= op0
, xop1
= op1
;
789 temp
= gen_reg_rtx (mode
);
791 /* If it is a commutative operator and the modes would match
792 if we would swap the operands, we can save the conversions. */
795 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
796 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
800 tmp
= op0
; op0
= op1
; op1
= tmp
;
801 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
805 /* In case the insn wants input operands in modes different from
806 those of the actual operands, convert the operands. It would
807 seem that we don't need to convert CONST_INTs, but we do, so
808 that they're properly zero-extended, sign-extended or truncated
811 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
812 xop0
= convert_modes (mode0
,
813 GET_MODE (op0
) != VOIDmode
818 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
819 xop1
= convert_modes (mode1
,
820 GET_MODE (op1
) != VOIDmode
825 /* Now, if insn's predicates don't allow our operands, put them into
828 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
829 && mode0
!= VOIDmode
)
830 xop0
= copy_to_mode_reg (mode0
, xop0
);
832 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
833 && mode1
!= VOIDmode
)
834 xop1
= copy_to_mode_reg (mode1
, xop1
);
836 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
837 temp
= gen_reg_rtx (mode
);
839 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
842 /* If PAT is composed of more than one insn, try to add an appropriate
843 REG_EQUAL note to it. If we can't because TEMP conflicts with an
844 operand, call ourselves again, this time without a target. */
845 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
846 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
848 delete_insns_since (last
);
849 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
857 delete_insns_since (last
);
860 /* If this is a multiply, see if we can do a widening operation that
861 takes operands of this mode and makes a wider mode. */
863 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
864 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
865 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
866 != CODE_FOR_nothing
))
868 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
869 unsignedp
? umul_widen_optab
: smul_widen_optab
,
870 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
874 if (GET_MODE_CLASS (mode
) == MODE_INT
)
875 return gen_lowpart (mode
, temp
);
877 return convert_to_mode (mode
, temp
, unsignedp
);
881 /* Look for a wider mode of the same class for which we think we
882 can open-code the operation. Check for a widening multiply at the
883 wider mode as well. */
885 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
886 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
887 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
888 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
890 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
891 || (binoptab
== smul_optab
892 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
893 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
894 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
895 != CODE_FOR_nothing
)))
897 rtx xop0
= op0
, xop1
= op1
;
900 /* For certain integer operations, we need not actually extend
901 the narrow operands, as long as we will truncate
902 the results to the same narrowness. */
904 if ((binoptab
== ior_optab
|| binoptab
== and_optab
905 || binoptab
== xor_optab
906 || binoptab
== add_optab
|| binoptab
== sub_optab
907 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
908 && class == MODE_INT
)
911 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
913 /* The second operand of a shift must always be extended. */
914 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
915 no_extend
&& binoptab
!= ashl_optab
);
917 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
918 unsignedp
, OPTAB_DIRECT
);
921 if (class != MODE_INT
)
924 target
= gen_reg_rtx (mode
);
925 convert_move (target
, temp
, 0);
929 return gen_lowpart (mode
, temp
);
932 delete_insns_since (last
);
936 /* These can be done a word at a time. */
937 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
939 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
940 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
946 /* If TARGET is the same as one of the operands, the REG_EQUAL note
947 won't be accurate, so use a new target. */
948 if (target
== 0 || target
== op0
|| target
== op1
)
949 target
= gen_reg_rtx (mode
);
953 /* Do the actual arithmetic. */
954 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
956 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
957 rtx x
= expand_binop (word_mode
, binoptab
,
958 operand_subword_force (op0
, i
, mode
),
959 operand_subword_force (op1
, i
, mode
),
960 target_piece
, unsignedp
, next_methods
);
965 if (target_piece
!= x
)
966 emit_move_insn (target_piece
, x
);
969 insns
= get_insns ();
972 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
974 if (binoptab
->code
!= UNKNOWN
)
976 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
977 copy_rtx (op0
), copy_rtx (op1
));
981 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
986 /* Synthesize double word shifts from single word shifts. */
987 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
988 || binoptab
== ashr_optab
)
990 && (GET_CODE (op1
) == CONST_INT
|| !optimize_size
)
991 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
992 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
993 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
994 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
996 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
997 enum machine_mode op1_mode
;
999 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1000 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1001 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1003 /* Apply the truncation to constant shifts. */
1004 if (double_shift_mask
> 0 && GET_CODE (op1
) == CONST_INT
)
1005 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1007 if (op1
== CONST0_RTX (op1_mode
))
1010 /* Make sure that this is a combination that expand_doubleword_shift
1011 can handle. See the comments there for details. */
1012 if (double_shift_mask
== 0
1013 || (shift_mask
== BITS_PER_WORD
- 1
1014 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1016 rtx insns
, equiv_value
;
1017 rtx into_target
, outof_target
;
1018 rtx into_input
, outof_input
;
1019 int left_shift
, outof_word
;
1021 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1022 won't be accurate, so use a new target. */
1023 if (target
== 0 || target
== op0
|| target
== op1
)
1024 target
= gen_reg_rtx (mode
);
1028 /* OUTOF_* is the word we are shifting bits away from, and
1029 INTO_* is the word that we are shifting bits towards, thus
1030 they differ depending on the direction of the shift and
1031 WORDS_BIG_ENDIAN. */
1033 left_shift
= binoptab
== ashl_optab
;
1034 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1036 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1037 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1039 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1040 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1042 if (expand_doubleword_shift (op1_mode
, binoptab
,
1043 outof_input
, into_input
, op1
,
1044 outof_target
, into_target
,
1045 unsignedp
, methods
, shift_mask
))
1047 insns
= get_insns ();
1050 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1051 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1058 /* Synthesize double word rotates from single word shifts. */
1059 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1060 && class == MODE_INT
1061 && GET_CODE (op1
) == CONST_INT
1062 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1063 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1064 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1066 rtx insns
, equiv_value
;
1067 rtx into_target
, outof_target
;
1068 rtx into_input
, outof_input
;
1070 int shift_count
, left_shift
, outof_word
;
1072 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1073 won't be accurate, so use a new target. Do this also if target is not
1074 a REG, first because having a register instead may open optimization
1075 opportunities, and second because if target and op0 happen to be MEMs
1076 designating the same location, we would risk clobbering it too early
1077 in the code sequence we generate below. */
1078 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1079 target
= gen_reg_rtx (mode
);
1083 shift_count
= INTVAL (op1
);
1085 /* OUTOF_* is the word we are shifting bits away from, and
1086 INTO_* is the word that we are shifting bits towards, thus
1087 they differ depending on the direction of the shift and
1088 WORDS_BIG_ENDIAN. */
1090 left_shift
= (binoptab
== rotl_optab
);
1091 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1093 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1094 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1096 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1097 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1099 if (shift_count
== BITS_PER_WORD
)
1101 /* This is just a word swap. */
1102 emit_move_insn (outof_target
, into_input
);
1103 emit_move_insn (into_target
, outof_input
);
1108 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1109 rtx first_shift_count
, second_shift_count
;
1110 optab reverse_unsigned_shift
, unsigned_shift
;
1112 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1113 ? lshr_optab
: ashl_optab
);
1115 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1116 ? ashl_optab
: lshr_optab
);
1118 if (shift_count
> BITS_PER_WORD
)
1120 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1121 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1125 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1126 second_shift_count
= GEN_INT (shift_count
);
1129 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1130 outof_input
, first_shift_count
,
1131 NULL_RTX
, unsignedp
, next_methods
);
1132 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1133 into_input
, second_shift_count
,
1134 NULL_RTX
, unsignedp
, next_methods
);
1136 if (into_temp1
!= 0 && into_temp2
!= 0)
1137 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1138 into_target
, unsignedp
, next_methods
);
1142 if (inter
!= 0 && inter
!= into_target
)
1143 emit_move_insn (into_target
, inter
);
1145 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1146 into_input
, first_shift_count
,
1147 NULL_RTX
, unsignedp
, next_methods
);
1148 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1149 outof_input
, second_shift_count
,
1150 NULL_RTX
, unsignedp
, next_methods
);
1152 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1153 inter
= expand_binop (word_mode
, ior_optab
,
1154 outof_temp1
, outof_temp2
,
1155 outof_target
, unsignedp
, next_methods
);
1157 if (inter
!= 0 && inter
!= outof_target
)
1158 emit_move_insn (outof_target
, inter
);
1161 insns
= get_insns ();
1166 if (binoptab
->code
!= UNKNOWN
)
1167 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1171 /* We can't make this a no conflict block if this is a word swap,
1172 because the word swap case fails if the input and output values
1173 are in the same register. */
1174 if (shift_count
!= BITS_PER_WORD
)
1175 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1184 /* These can be done a word at a time by propagating carries. */
1185 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1186 && class == MODE_INT
1187 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1188 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1191 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1192 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1193 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1194 rtx xop0
, xop1
, xtarget
;
1196 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1197 value is one of those, use it. Otherwise, use 1 since it is the
1198 one easiest to get. */
1199 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1200 int normalizep
= STORE_FLAG_VALUE
;
1205 /* Prepare the operands. */
1206 xop0
= force_reg (mode
, op0
);
1207 xop1
= force_reg (mode
, op1
);
1209 xtarget
= gen_reg_rtx (mode
);
1211 if (target
== 0 || !REG_P (target
))
1214 /* Indicate for flow that the entire target reg is being set. */
1216 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1218 /* Do the actual arithmetic. */
1219 for (i
= 0; i
< nwords
; i
++)
1221 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1222 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1223 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1224 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1227 /* Main add/subtract of the input operands. */
1228 x
= expand_binop (word_mode
, binoptab
,
1229 op0_piece
, op1_piece
,
1230 target_piece
, unsignedp
, next_methods
);
1236 /* Store carry from main add/subtract. */
1237 carry_out
= gen_reg_rtx (word_mode
);
1238 carry_out
= emit_store_flag_force (carry_out
,
1239 (binoptab
== add_optab
1242 word_mode
, 1, normalizep
);
1249 /* Add/subtract previous carry to main result. */
1250 newx
= expand_binop (word_mode
,
1251 normalizep
== 1 ? binoptab
: otheroptab
,
1253 NULL_RTX
, 1, next_methods
);
1257 /* Get out carry from adding/subtracting carry in. */
1258 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1259 carry_tmp
= emit_store_flag_force (carry_tmp
,
1260 (binoptab
== add_optab
1263 word_mode
, 1, normalizep
);
1265 /* Logical-ior the two poss. carry together. */
1266 carry_out
= expand_binop (word_mode
, ior_optab
,
1267 carry_out
, carry_tmp
,
1268 carry_out
, 0, next_methods
);
1272 emit_move_insn (target_piece
, newx
);
1275 carry_in
= carry_out
;
1278 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1280 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
1281 || ! rtx_equal_p (target
, xtarget
))
1283 rtx temp
= emit_move_insn (target
, xtarget
);
1285 set_unique_reg_note (temp
,
1287 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1298 delete_insns_since (last
);
1301 /* If we want to multiply two two-word values and have normal and widening
1302 multiplies of single-word values, we can do this with three smaller
1303 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1304 because we are not operating on one word at a time.
1306 The multiplication proceeds as follows:
1307 _______________________
1308 [__op0_high_|__op0_low__]
1309 _______________________
1310 * [__op1_high_|__op1_low__]
1311 _______________________________________________
1312 _______________________
1313 (1) [__op0_low__*__op1_low__]
1314 _______________________
1315 (2a) [__op0_low__*__op1_high_]
1316 _______________________
1317 (2b) [__op0_high_*__op1_low__]
1318 _______________________
1319 (3) [__op0_high_*__op1_high_]
1322 This gives a 4-word result. Since we are only interested in the
1323 lower 2 words, partial result (3) and the upper words of (2a) and
1324 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1325 calculated using non-widening multiplication.
1327 (1), however, needs to be calculated with an unsigned widening
1328 multiplication. If this operation is not directly supported we
1329 try using a signed widening multiplication and adjust the result.
1330 This adjustment works as follows:
1332 If both operands are positive then no adjustment is needed.
1334 If the operands have different signs, for example op0_low < 0 and
1335 op1_low >= 0, the instruction treats the most significant bit of
1336 op0_low as a sign bit instead of a bit with significance
1337 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1338 with 2**BITS_PER_WORD - op0_low, and two's complements the
1339 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1342 Similarly, if both operands are negative, we need to add
1343 (op0_low + op1_low) * 2**BITS_PER_WORD.
1345 We use a trick to adjust quickly. We logically shift op0_low right
1346 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1347 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1348 logical shift exists, we do an arithmetic right shift and subtract
1351 if (binoptab
== smul_optab
1352 && class == MODE_INT
1353 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1354 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1355 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1356 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1357 != CODE_FOR_nothing
)
1358 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1359 != CODE_FOR_nothing
)))
1361 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1362 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1363 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1364 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1365 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1366 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1368 rtx op0_xhigh
= NULL_RTX
;
1369 rtx op1_xhigh
= NULL_RTX
;
1371 /* If the target is the same as one of the inputs, don't use it. This
1372 prevents problems with the REG_EQUAL note. */
1373 if (target
== op0
|| target
== op1
1374 || (target
!= 0 && !REG_P (target
)))
1377 /* Multiply the two lower words to get a double-word product.
1378 If unsigned widening multiplication is available, use that;
1379 otherwise use the signed form and compensate. */
1381 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1383 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1384 target
, 1, OPTAB_DIRECT
);
1386 /* If we didn't succeed, delete everything we did so far. */
1388 delete_insns_since (last
);
1390 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1394 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1395 != CODE_FOR_nothing
)
1397 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1398 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1399 target
, 1, OPTAB_DIRECT
);
1400 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1401 NULL_RTX
, 1, next_methods
);
1403 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1404 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1407 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1408 NULL_RTX
, 0, next_methods
);
1410 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1411 op0_xhigh
, op0_xhigh
, 0,
1415 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1416 NULL_RTX
, 1, next_methods
);
1418 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1419 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1422 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1423 NULL_RTX
, 0, next_methods
);
1425 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1426 op1_xhigh
, op1_xhigh
, 0,
1431 /* If we have been able to directly compute the product of the
1432 low-order words of the operands and perform any required adjustments
1433 of the operands, we proceed by trying two more multiplications
1434 and then computing the appropriate sum.
1436 We have checked above that the required addition is provided.
1437 Full-word addition will normally always succeed, especially if
1438 it is provided at all, so we don't worry about its failure. The
1439 multiplication may well fail, however, so we do handle that. */
1441 if (product
&& op0_xhigh
&& op1_xhigh
)
1443 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1444 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1445 NULL_RTX
, 0, OPTAB_DIRECT
);
1447 if (!REG_P (product_high
))
1448 product_high
= force_reg (word_mode
, product_high
);
1451 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1452 product_high
, 0, next_methods
);
1454 if (temp
!= 0 && temp
!= product_high
)
1455 emit_move_insn (product_high
, temp
);
1458 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1459 NULL_RTX
, 0, OPTAB_DIRECT
);
1462 temp
= expand_binop (word_mode
, add_optab
, temp
,
1463 product_high
, product_high
,
1466 if (temp
!= 0 && temp
!= product_high
)
1467 emit_move_insn (product_high
, temp
);
1469 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1473 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1475 temp
= emit_move_insn (product
, product
);
1476 set_unique_reg_note (temp
,
1478 gen_rtx_fmt_ee (MULT
, mode
,
1487 /* If we get here, we couldn't do it for some reason even though we
1488 originally thought we could. Delete anything we've emitted in
1491 delete_insns_since (last
);
1494 /* It can't be open-coded in this mode.
1495 Use a library call if one is available and caller says that's ok. */
1497 if (binoptab
->handlers
[(int) mode
].libfunc
1498 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1502 enum machine_mode op1_mode
= mode
;
1509 op1_mode
= word_mode
;
1510 /* Specify unsigned here,
1511 since negative shift counts are meaningless. */
1512 op1x
= convert_to_mode (word_mode
, op1
, 1);
1515 if (GET_MODE (op0
) != VOIDmode
1516 && GET_MODE (op0
) != mode
)
1517 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1519 /* Pass 1 for NO_QUEUE so we don't lose any increments
1520 if the libcall is cse'd or moved. */
1521 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1522 NULL_RTX
, LCT_CONST
, mode
, 2,
1523 op0
, mode
, op1x
, op1_mode
);
1525 insns
= get_insns ();
1528 target
= gen_reg_rtx (mode
);
1529 emit_libcall_block (insns
, target
, value
,
1530 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1535 delete_insns_since (last
);
1537 /* It can't be done in this mode. Can we do it in a wider mode? */
1539 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1540 || methods
== OPTAB_MUST_WIDEN
))
1542 /* Caller says, don't even try. */
1543 delete_insns_since (entry_last
);
1547 /* Compute the value of METHODS to pass to recursive calls.
1548 Don't allow widening to be tried recursively. */
1550 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1552 /* Look for a wider mode of the same class for which it appears we can do
1555 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1557 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1558 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1560 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1561 != CODE_FOR_nothing
)
1562 || (methods
== OPTAB_LIB
1563 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1565 rtx xop0
= op0
, xop1
= op1
;
1568 /* For certain integer operations, we need not actually extend
1569 the narrow operands, as long as we will truncate
1570 the results to the same narrowness. */
1572 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1573 || binoptab
== xor_optab
1574 || binoptab
== add_optab
|| binoptab
== sub_optab
1575 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1576 && class == MODE_INT
)
1579 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1580 unsignedp
, no_extend
);
1582 /* The second operand of a shift must always be extended. */
1583 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1584 no_extend
&& binoptab
!= ashl_optab
);
1586 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1587 unsignedp
, methods
);
1590 if (class != MODE_INT
)
1593 target
= gen_reg_rtx (mode
);
1594 convert_move (target
, temp
, 0);
1598 return gen_lowpart (mode
, temp
);
1601 delete_insns_since (last
);
1606 delete_insns_since (entry_last
);
1610 /* Expand a binary operator which has both signed and unsigned forms.
1611 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1614 If we widen unsigned operands, we may use a signed wider operation instead
1615 of an unsigned wider operation, since the result would be the same. */
1618 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
1619 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
1620 enum optab_methods methods
)
1623 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1624 struct optab wide_soptab
;
1626 /* Do it without widening, if possible. */
1627 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1628 unsignedp
, OPTAB_DIRECT
);
1629 if (temp
|| methods
== OPTAB_DIRECT
)
1632 /* Try widening to a signed int. Make a fake signed optab that
1633 hides any signed insn for direct use. */
1634 wide_soptab
= *soptab
;
1635 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1636 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1638 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1639 unsignedp
, OPTAB_WIDEN
);
1641 /* For unsigned operands, try widening to an unsigned int. */
1642 if (temp
== 0 && unsignedp
)
1643 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1644 unsignedp
, OPTAB_WIDEN
);
1645 if (temp
|| methods
== OPTAB_WIDEN
)
1648 /* Use the right width lib call if that exists. */
1649 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1650 if (temp
|| methods
== OPTAB_LIB
)
1653 /* Must widen and use a lib call, use either signed or unsigned. */
1654 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1655 unsignedp
, methods
);
1659 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1660 unsignedp
, methods
);
1664 /* Generate code to perform an operation specified by UNOPPTAB
1665 on operand OP0, with two results to TARG0 and TARG1.
1666 We assume that the order of the operands for the instruction
1667 is TARG0, TARG1, OP0.
1669 Either TARG0 or TARG1 may be zero, but what that means is that
1670 the result is not actually wanted. We will generate it into
1671 a dummy pseudo-reg and discard it. They may not both be zero.
1673 Returns 1 if this operation can be performed; 0 if not. */
1676 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
1679 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1680 enum mode_class
class;
1681 enum machine_mode wider_mode
;
1682 rtx entry_last
= get_last_insn ();
1685 class = GET_MODE_CLASS (mode
);
1688 op0
= force_not_mem (op0
);
1691 targ0
= gen_reg_rtx (mode
);
1693 targ1
= gen_reg_rtx (mode
);
1695 /* Record where to go back to if we fail. */
1696 last
= get_last_insn ();
1698 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1700 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
1701 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
1705 if (GET_MODE (xop0
) != VOIDmode
1706 && GET_MODE (xop0
) != mode0
)
1707 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1709 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1710 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop0
, mode0
))
1711 xop0
= copy_to_mode_reg (mode0
, xop0
);
1713 /* We could handle this, but we should always be called with a pseudo
1714 for our targets and all insns should take them as outputs. */
1715 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
1716 || ! (*insn_data
[icode
].operand
[1].predicate
) (targ1
, mode
))
1719 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
1726 delete_insns_since (last
);
1729 /* It can't be done in this mode. Can we do it in a wider mode? */
1731 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1733 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1734 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1736 if (unoptab
->handlers
[(int) wider_mode
].insn_code
1737 != CODE_FOR_nothing
)
1739 rtx t0
= gen_reg_rtx (wider_mode
);
1740 rtx t1
= gen_reg_rtx (wider_mode
);
1741 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
1743 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
1745 convert_move (targ0
, t0
, unsignedp
);
1746 convert_move (targ1
, t1
, unsignedp
);
1750 delete_insns_since (last
);
1755 delete_insns_since (entry_last
);
1759 /* Generate code to perform an operation specified by BINOPTAB
1760 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1761 We assume that the order of the operands for the instruction
1762 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1763 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1765 Either TARG0 or TARG1 may be zero, but what that means is that
1766 the result is not actually wanted. We will generate it into
1767 a dummy pseudo-reg and discard it. They may not both be zero.
1769 Returns 1 if this operation can be performed; 0 if not. */
1772 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
1775 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1776 enum mode_class
class;
1777 enum machine_mode wider_mode
;
1778 rtx entry_last
= get_last_insn ();
1781 class = GET_MODE_CLASS (mode
);
1785 op0
= force_not_mem (op0
);
1786 op1
= force_not_mem (op1
);
1789 /* If we are inside an appropriately-short loop and we are optimizing,
1790 force expensive constants into a register. */
1791 if (CONSTANT_P (op0
) && optimize
1792 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
1793 op0
= force_reg (mode
, op0
);
1795 if (CONSTANT_P (op1
) && optimize
1796 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
1797 op1
= force_reg (mode
, op1
);
1800 targ0
= gen_reg_rtx (mode
);
1802 targ1
= gen_reg_rtx (mode
);
1804 /* Record where to go back to if we fail. */
1805 last
= get_last_insn ();
1807 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1809 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1810 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1811 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1813 rtx xop0
= op0
, xop1
= op1
;
1815 /* In case the insn wants input operands in modes different from
1816 those of the actual operands, convert the operands. It would
1817 seem that we don't need to convert CONST_INTs, but we do, so
1818 that they're properly zero-extended, sign-extended or truncated
1821 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
1822 xop0
= convert_modes (mode0
,
1823 GET_MODE (op0
) != VOIDmode
1828 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
1829 xop1
= convert_modes (mode1
,
1830 GET_MODE (op1
) != VOIDmode
1835 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1836 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
1837 xop0
= copy_to_mode_reg (mode0
, xop0
);
1839 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
1840 xop1
= copy_to_mode_reg (mode1
, xop1
);
1842 /* We could handle this, but we should always be called with a pseudo
1843 for our targets and all insns should take them as outputs. */
1844 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
1845 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
1848 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1855 delete_insns_since (last
);
1858 /* It can't be done in this mode. Can we do it in a wider mode? */
1860 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1862 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1863 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1865 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1866 != CODE_FOR_nothing
)
1868 rtx t0
= gen_reg_rtx (wider_mode
);
1869 rtx t1
= gen_reg_rtx (wider_mode
);
1870 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
1871 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
1873 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
1876 convert_move (targ0
, t0
, unsignedp
);
1877 convert_move (targ1
, t1
, unsignedp
);
1881 delete_insns_since (last
);
1886 delete_insns_since (entry_last
);
1890 /* Expand the two-valued library call indicated by BINOPTAB, but
1891 preserve only one of the values. If TARG0 is non-NULL, the first
1892 value is placed into TARG0; otherwise the second value is placed
1893 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
1894 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
1895 This routine assumes that the value returned by the library call is
1896 as if the return value was of an integral mode twice as wide as the
1897 mode of OP0. Returns 1 if the call was successful. */
1900 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
1901 rtx targ0
, rtx targ1
, enum rtx_code code
)
1903 enum machine_mode mode
;
1904 enum machine_mode libval_mode
;
1908 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
1909 if (!((targ0
!= NULL_RTX
) ^ (targ1
!= NULL_RTX
)))
1912 mode
= GET_MODE (op0
);
1913 if (!binoptab
->handlers
[(int) mode
].libfunc
)
1916 /* The value returned by the library function will have twice as
1917 many bits as the nominal MODE. */
1918 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
1921 libval
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1922 NULL_RTX
, LCT_CONST
,
1926 /* Get the part of VAL containing the value that we want. */
1927 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
1928 targ0
? 0 : GET_MODE_SIZE (mode
));
1929 insns
= get_insns ();
1931 /* Move the into the desired location. */
1932 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
1933 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
1939 /* Wrapper around expand_unop which takes an rtx code to specify
1940 the operation to perform, not an optab pointer. All other
1941 arguments are the same. */
1943 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1944 rtx target
, int unsignedp
)
1946 optab unop
= code_to_optab
[(int) code
];
1950 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
1956 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
1958 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
1960 enum mode_class
class = GET_MODE_CLASS (mode
);
1961 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1963 enum machine_mode wider_mode
;
1964 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1965 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1967 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
1968 != CODE_FOR_nothing
)
1970 rtx xop0
, temp
, last
;
1972 last
= get_last_insn ();
1975 target
= gen_reg_rtx (mode
);
1976 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
1977 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
1979 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
1980 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
1981 - GET_MODE_BITSIZE (mode
)),
1982 target
, true, OPTAB_DIRECT
);
1984 delete_insns_since (last
);
1993 /* Try calculating (parity x) as (and (popcount x) 1), where
1994 popcount can also be done in a wider mode. */
1996 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
1998 enum mode_class
class = GET_MODE_CLASS (mode
);
1999 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2001 enum machine_mode wider_mode
;
2002 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2003 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2005 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2006 != CODE_FOR_nothing
)
2008 rtx xop0
, temp
, last
;
2010 last
= get_last_insn ();
2013 target
= gen_reg_rtx (mode
);
2014 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2015 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2018 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2019 target
, true, OPTAB_DIRECT
);
2021 delete_insns_since (last
);
2030 /* Generate code to perform an operation specified by UNOPTAB
2031 on operand OP0, with result having machine-mode MODE.
2033 UNSIGNEDP is for the case where we have to widen the operands
2034 to perform the operation. It says to use zero-extension.
2036 If TARGET is nonzero, the value
2037 is generated there, if it is convenient to do so.
2038 In all cases an rtx is returned for the locus of the value;
2039 this may or may not be TARGET. */
2042 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2045 enum mode_class
class;
2046 enum machine_mode wider_mode
;
2048 rtx last
= get_last_insn ();
2051 class = GET_MODE_CLASS (mode
);
2054 op0
= force_not_mem (op0
);
2056 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2058 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2059 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2065 temp
= gen_reg_rtx (mode
);
2067 if (GET_MODE (xop0
) != VOIDmode
2068 && GET_MODE (xop0
) != mode0
)
2069 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2071 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2073 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2074 xop0
= copy_to_mode_reg (mode0
, xop0
);
2076 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2077 temp
= gen_reg_rtx (mode
);
2079 pat
= GEN_FCN (icode
) (temp
, xop0
);
2082 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2083 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2085 delete_insns_since (last
);
2086 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2094 delete_insns_since (last
);
2097 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2099 /* Widening clz needs special treatment. */
2100 if (unoptab
== clz_optab
)
2102 temp
= widen_clz (mode
, op0
, target
);
2109 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2110 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2111 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2113 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2117 /* For certain operations, we need not actually extend
2118 the narrow operand, as long as we will truncate the
2119 results to the same narrowness. */
2121 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2122 (unoptab
== neg_optab
2123 || unoptab
== one_cmpl_optab
)
2124 && class == MODE_INT
);
2126 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2131 if (class != MODE_INT
)
2134 target
= gen_reg_rtx (mode
);
2135 convert_move (target
, temp
, 0);
2139 return gen_lowpart (mode
, temp
);
2142 delete_insns_since (last
);
2146 /* These can be done a word at a time. */
2147 if (unoptab
== one_cmpl_optab
2148 && class == MODE_INT
2149 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2150 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2155 if (target
== 0 || target
== op0
)
2156 target
= gen_reg_rtx (mode
);
2160 /* Do the actual arithmetic. */
2161 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2163 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2164 rtx x
= expand_unop (word_mode
, unoptab
,
2165 operand_subword_force (op0
, i
, mode
),
2166 target_piece
, unsignedp
);
2168 if (target_piece
!= x
)
2169 emit_move_insn (target_piece
, x
);
2172 insns
= get_insns ();
2175 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2176 gen_rtx_fmt_e (unoptab
->code
, mode
,
2181 /* Try negating floating point values by flipping the sign bit. */
2182 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2183 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2185 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2186 enum machine_mode imode
= int_mode_for_mode (mode
);
2187 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2189 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2191 HOST_WIDE_INT hi
, lo
;
2192 rtx last
= get_last_insn ();
2194 /* Handle targets with different FP word orders. */
2195 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2197 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2198 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2199 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2202 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2205 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2209 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2212 temp
= expand_binop (imode
, xor_optab
,
2213 gen_lowpart (imode
, op0
),
2214 immed_double_const (lo
, hi
, imode
),
2215 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2220 target
= gen_reg_rtx (mode
);
2221 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2222 set_unique_reg_note (insn
, REG_EQUAL
,
2223 gen_rtx_fmt_e (NEG
, mode
,
2227 delete_insns_since (last
);
2231 /* Try calculating parity (x) as popcount (x) % 2. */
2232 if (unoptab
== parity_optab
)
2234 temp
= expand_parity (mode
, op0
, target
);
2239 /* If there is no negation pattern, try subtracting from zero. */
2240 if (unoptab
== neg_optab
&& class == MODE_INT
)
2242 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2243 target
, unsignedp
, OPTAB_DIRECT
);
2249 /* Now try a library call in this mode. */
2250 if (unoptab
->handlers
[(int) mode
].libfunc
)
2254 enum machine_mode outmode
= mode
;
2256 /* All of these functions return small values. Thus we choose to
2257 have them return something that isn't a double-word. */
2258 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2259 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2261 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
)));
2265 /* Pass 1 for NO_QUEUE so we don't lose any increments
2266 if the libcall is cse'd or moved. */
2267 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2268 NULL_RTX
, LCT_CONST
, outmode
,
2270 insns
= get_insns ();
2273 target
= gen_reg_rtx (outmode
);
2274 emit_libcall_block (insns
, target
, value
,
2275 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2280 /* It can't be done in this mode. Can we do it in a wider mode? */
2282 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2284 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2285 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2287 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2288 != CODE_FOR_nothing
)
2289 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2293 /* For certain operations, we need not actually extend
2294 the narrow operand, as long as we will truncate the
2295 results to the same narrowness. */
2297 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2298 (unoptab
== neg_optab
2299 || unoptab
== one_cmpl_optab
)
2300 && class == MODE_INT
);
2302 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2305 /* If we are generating clz using wider mode, adjust the
2307 if (unoptab
== clz_optab
&& temp
!= 0)
2308 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2309 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2310 - GET_MODE_BITSIZE (mode
)),
2311 target
, true, OPTAB_DIRECT
);
2315 if (class != MODE_INT
)
2318 target
= gen_reg_rtx (mode
);
2319 convert_move (target
, temp
, 0);
2323 return gen_lowpart (mode
, temp
);
2326 delete_insns_since (last
);
2331 /* If there is no negate operation, try doing a subtract from zero.
2332 The US Software GOFAST library needs this. FIXME: This is *wrong*
2333 for floating-point operations due to negative zeros! */
2334 if (unoptab
->code
== NEG
)
2337 temp
= expand_binop (mode
,
2338 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2339 CONST0_RTX (mode
), op0
,
2340 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2348 /* Emit code to compute the absolute value of OP0, with result to
2349 TARGET if convenient. (TARGET may be 0.) The return value says
2350 where the result actually is to be found.
2352 MODE is the mode of the operand; the mode of the result is
2353 different but can be deduced from MODE.
2358 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
2359 int result_unsignedp
)
2364 result_unsignedp
= 1;
2366 /* First try to do it with a special abs instruction. */
2367 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2372 /* For floating point modes, try clearing the sign bit. */
2373 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2374 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2376 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2377 enum machine_mode imode
= int_mode_for_mode (mode
);
2378 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2380 if (imode
!= BLKmode
&& bitpos
>= 0)
2382 HOST_WIDE_INT hi
, lo
;
2383 rtx last
= get_last_insn ();
2385 /* Handle targets with different FP word orders. */
2386 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2388 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2389 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2390 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2393 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2396 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2400 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2403 temp
= expand_binop (imode
, and_optab
,
2404 gen_lowpart (imode
, op0
),
2405 immed_double_const (~lo
, ~hi
, imode
),
2406 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2411 target
= gen_reg_rtx (mode
);
2412 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2413 set_unique_reg_note (insn
, REG_EQUAL
,
2414 gen_rtx_fmt_e (ABS
, mode
,
2418 delete_insns_since (last
);
2422 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2423 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2425 rtx last
= get_last_insn ();
2427 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2429 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2435 delete_insns_since (last
);
2438 /* If this machine has expensive jumps, we can do integer absolute
2439 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2440 where W is the width of MODE. */
2442 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2444 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2445 size_int (GET_MODE_BITSIZE (mode
) - 1),
2448 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2451 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2452 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2462 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
2463 int result_unsignedp
, int safe
)
2468 result_unsignedp
= 1;
2470 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
2474 /* If that does not win, use conditional jump and negate. */
2476 /* It is safe to use the target if it is the same
2477 as the source if this is also a pseudo register */
2478 if (op0
== target
&& REG_P (op0
)
2479 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2482 op1
= gen_label_rtx ();
2483 if (target
== 0 || ! safe
2484 || GET_MODE (target
) != mode
2485 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
2487 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2488 target
= gen_reg_rtx (mode
);
2490 emit_move_insn (target
, op0
);
2493 /* If this mode is an integer too wide to compare properly,
2494 compare word by word. Rely on CSE to optimize constant cases. */
2495 if (GET_MODE_CLASS (mode
) == MODE_INT
2496 && ! can_compare_p (GE
, mode
, ccp_jump
))
2497 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2500 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2501 NULL_RTX
, NULL_RTX
, op1
);
2503 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2506 emit_move_insn (target
, op0
);
2512 /* Generate an instruction whose insn-code is INSN_CODE,
2513 with two operands: an output TARGET and an input OP0.
2514 TARGET *must* be nonzero, and the output is always stored there.
2515 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2516 the value that is stored into TARGET. */
2519 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
2522 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2527 /* Sign and zero extension from memory is often done specially on
2528 RISC machines, so forcing into a register here can pessimize
2530 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2531 op0
= force_not_mem (op0
);
2533 /* Now, if insn does not accept our operands, put them into pseudos. */
2535 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
2536 op0
= copy_to_mode_reg (mode0
, op0
);
2538 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
2539 || (flag_force_mem
&& MEM_P (temp
)))
2540 temp
= gen_reg_rtx (GET_MODE (temp
));
2542 pat
= GEN_FCN (icode
) (temp
, op0
);
2544 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
2545 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2550 emit_move_insn (target
, temp
);
2553 /* Emit code to perform a series of operations on a multi-word quantity, one
2556 Such a block is preceded by a CLOBBER of the output, consists of multiple
2557 insns, each setting one word of the output, and followed by a SET copying
2558 the output to itself.
2560 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2561 note indicating that it doesn't conflict with the (also multi-word)
2562 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2565 INSNS is a block of code generated to perform the operation, not including
2566 the CLOBBER and final copy. All insns that compute intermediate values
2567 are first emitted, followed by the block as described above.
2569 TARGET, OP0, and OP1 are the output and inputs of the operations,
2570 respectively. OP1 may be zero for a unary operation.
2572 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
2575 If TARGET is not a register, INSNS is simply emitted with no special
2576 processing. Likewise if anything in INSNS is not an INSN or if
2577 there is a libcall block inside INSNS.
2579 The final insn emitted is returned. */
2582 emit_no_conflict_block (rtx insns
, rtx target
, rtx op0
, rtx op1
, rtx equiv
)
2584 rtx prev
, next
, first
, last
, insn
;
2586 if (!REG_P (target
) || reload_in_progress
)
2587 return emit_insn (insns
);
2589 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2590 if (!NONJUMP_INSN_P (insn
)
2591 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2592 return emit_insn (insns
);
2594 /* First emit all insns that do not store into words of the output and remove
2595 these from the list. */
2596 for (insn
= insns
; insn
; insn
= next
)
2601 next
= NEXT_INSN (insn
);
2603 /* Some ports (cris) create a libcall regions at their own. We must
2604 avoid any potential nesting of LIBCALLs. */
2605 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
2606 remove_note (insn
, note
);
2607 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
2608 remove_note (insn
, note
);
2610 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
2611 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2612 set
= PATTERN (insn
);
2613 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2615 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2616 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2618 set
= XVECEXP (PATTERN (insn
), 0, i
);
2626 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2628 if (PREV_INSN (insn
))
2629 NEXT_INSN (PREV_INSN (insn
)) = next
;
2634 PREV_INSN (next
) = PREV_INSN (insn
);
2640 prev
= get_last_insn ();
2642 /* Now write the CLOBBER of the output, followed by the setting of each
2643 of the words, followed by the final copy. */
2644 if (target
!= op0
&& target
!= op1
)
2645 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
2647 for (insn
= insns
; insn
; insn
= next
)
2649 next
= NEXT_INSN (insn
);
2652 if (op1
&& REG_P (op1
))
2653 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
2656 if (op0
&& REG_P (op0
))
2657 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
2661 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2662 != CODE_FOR_nothing
)
2664 last
= emit_move_insn (target
, target
);
2666 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
2670 last
= get_last_insn ();
2672 /* Remove any existing REG_EQUAL note from "last", or else it will
2673 be mistaken for a note referring to the full contents of the
2674 alleged libcall value when found together with the REG_RETVAL
2675 note added below. An existing note can come from an insn
2676 expansion at "last". */
2677 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2681 first
= get_insns ();
2683 first
= NEXT_INSN (prev
);
2685 /* Encapsulate the block so it gets manipulated as a unit. */
2686 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2688 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2693 /* Emit code to make a call to a constant function or a library call.
2695 INSNS is a list containing all insns emitted in the call.
2696 These insns leave the result in RESULT. Our block is to copy RESULT
2697 to TARGET, which is logically equivalent to EQUIV.
2699 We first emit any insns that set a pseudo on the assumption that these are
2700 loading constants into registers; doing so allows them to be safely cse'ed
2701 between blocks. Then we emit all the other insns in the block, followed by
2702 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2703 note with an operand of EQUIV.
2705 Moving assignments to pseudos outside of the block is done to improve
2706 the generated code, but is not required to generate correct code,
2707 hence being unable to move an assignment is not grounds for not making
2708 a libcall block. There are two reasons why it is safe to leave these
2709 insns inside the block: First, we know that these pseudos cannot be
2710 used in generated RTL outside the block since they are created for
2711 temporary purposes within the block. Second, CSE will not record the
2712 values of anything set inside a libcall block, so we know they must
2713 be dead at the end of the block.
2715 Except for the first group of insns (the ones setting pseudos), the
2716 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2719 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
2721 rtx final_dest
= target
;
2722 rtx prev
, next
, first
, last
, insn
;
2724 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
2725 into a MEM later. Protect the libcall block from this change. */
2726 if (! REG_P (target
) || REG_USERVAR_P (target
))
2727 target
= gen_reg_rtx (GET_MODE (target
));
2729 /* If we're using non-call exceptions, a libcall corresponding to an
2730 operation that may trap may also trap. */
2731 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
2733 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2736 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2738 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
2739 remove_note (insn
, note
);
2743 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2744 reg note to indicate that this call cannot throw or execute a nonlocal
2745 goto (unless there is already a REG_EH_REGION note, in which case
2747 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2750 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2753 XEXP (note
, 0) = constm1_rtx
;
2755 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, constm1_rtx
,
2759 /* First emit all insns that set pseudos. Remove them from the list as
2760 we go. Avoid insns that set pseudos which were referenced in previous
2761 insns. These can be generated by move_by_pieces, for example,
2762 to update an address. Similarly, avoid insns that reference things
2763 set in previous insns. */
2765 for (insn
= insns
; insn
; insn
= next
)
2767 rtx set
= single_set (insn
);
2770 /* Some ports (cris) create a libcall regions at their own. We must
2771 avoid any potential nesting of LIBCALLs. */
2772 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
2773 remove_note (insn
, note
);
2774 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
2775 remove_note (insn
, note
);
2777 next
= NEXT_INSN (insn
);
2779 if (set
!= 0 && REG_P (SET_DEST (set
))
2780 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2782 || ((! INSN_P(insns
)
2783 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
2784 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2785 && ! modified_in_p (SET_SRC (set
), insns
)
2786 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2788 if (PREV_INSN (insn
))
2789 NEXT_INSN (PREV_INSN (insn
)) = next
;
2794 PREV_INSN (next
) = PREV_INSN (insn
);
2799 /* Some ports use a loop to copy large arguments onto the stack.
2800 Don't move anything outside such a loop. */
2805 prev
= get_last_insn ();
2807 /* Write the remaining insns followed by the final copy. */
2809 for (insn
= insns
; insn
; insn
= next
)
2811 next
= NEXT_INSN (insn
);
2816 last
= emit_move_insn (target
, result
);
2817 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2818 != CODE_FOR_nothing
)
2819 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
2822 /* Remove any existing REG_EQUAL note from "last", or else it will
2823 be mistaken for a note referring to the full contents of the
2824 libcall value when found together with the REG_RETVAL note added
2825 below. An existing note can come from an insn expansion at
2827 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2830 if (final_dest
!= target
)
2831 emit_move_insn (final_dest
, target
);
2834 first
= get_insns ();
2836 first
= NEXT_INSN (prev
);
2838 /* Encapsulate the block so it gets manipulated as a unit. */
2839 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
2841 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
2842 when the encapsulated region would not be in one basic block,
2843 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
2845 bool attach_libcall_retval_notes
= true;
2846 next
= NEXT_INSN (last
);
2847 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
2848 if (control_flow_insn_p (insn
))
2850 attach_libcall_retval_notes
= false;
2854 if (attach_libcall_retval_notes
)
2856 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2858 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
2864 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
2865 PURPOSE describes how this comparison will be used. CODE is the rtx
2866 comparison code we will be using.
2868 ??? Actually, CODE is slightly weaker than that. A target is still
2869 required to implement all of the normal bcc operations, but not
2870 required to implement all (or any) of the unordered bcc operations. */
2873 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
2874 enum can_compare_purpose purpose
)
2878 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2880 if (purpose
== ccp_jump
)
2881 return bcc_gen_fctn
[(int) code
] != NULL
;
2882 else if (purpose
== ccp_store_flag
)
2883 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
2885 /* There's only one cmov entry point, and it's allowed to fail. */
2888 if (purpose
== ccp_jump
2889 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2891 if (purpose
== ccp_cmov
2892 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2894 if (purpose
== ccp_store_flag
2895 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2898 mode
= GET_MODE_WIDER_MODE (mode
);
2900 while (mode
!= VOIDmode
);
2905 /* This function is called when we are going to emit a compare instruction that
2906 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2908 *PMODE is the mode of the inputs (in case they are const_int).
2909 *PUNSIGNEDP nonzero says that the operands are unsigned;
2910 this matters if they need to be widened.
2912 If they have mode BLKmode, then SIZE specifies the size of both operands.
2914 This function performs all the setup necessary so that the caller only has
2915 to emit a single comparison insn. This setup can involve doing a BLKmode
2916 comparison or emitting a library call to perform the comparison if no insn
2917 is available to handle it.
2918 The values which are passed in through pointers can be modified; the caller
2919 should perform the comparison on the modified values. */
2922 prepare_cmp_insn (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
, rtx size
,
2923 enum machine_mode
*pmode
, int *punsignedp
,
2924 enum can_compare_purpose purpose
)
2926 enum machine_mode mode
= *pmode
;
2927 rtx x
= *px
, y
= *py
;
2928 int unsignedp
= *punsignedp
;
2929 enum mode_class
class;
2931 class = GET_MODE_CLASS (mode
);
2933 /* They could both be VOIDmode if both args are immediate constants,
2934 but we should fold that at an earlier stage.
2935 With no special code here, this will call abort,
2936 reminding the programmer to implement such folding. */
2938 if (mode
!= BLKmode
&& flag_force_mem
)
2940 /* Load duplicate non-volatile operands once. */
2941 if (rtx_equal_p (x
, y
) && ! volatile_refs_p (x
))
2943 x
= force_not_mem (x
);
2948 x
= force_not_mem (x
);
2949 y
= force_not_mem (y
);
2953 /* If we are inside an appropriately-short loop and we are optimizing,
2954 force expensive constants into a register. */
2955 if (CONSTANT_P (x
) && optimize
2956 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
2957 x
= force_reg (mode
, x
);
2959 if (CONSTANT_P (y
) && optimize
2960 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
2961 y
= force_reg (mode
, y
);
2964 /* Abort if we have a non-canonical comparison. The RTL documentation
2965 states that canonical comparisons are required only for targets which
2967 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
2971 /* Don't let both operands fail to indicate the mode. */
2972 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2973 x
= force_reg (mode
, x
);
2975 /* Handle all BLKmode compares. */
2977 if (mode
== BLKmode
)
2979 enum machine_mode cmp_mode
, result_mode
;
2980 enum insn_code cmp_code
;
2985 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
2990 /* Try to use a memory block compare insn - either cmpstr
2991 or cmpmem will do. */
2992 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
2993 cmp_mode
!= VOIDmode
;
2994 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
2996 cmp_code
= cmpmem_optab
[cmp_mode
];
2997 if (cmp_code
== CODE_FOR_nothing
)
2998 cmp_code
= cmpstr_optab
[cmp_mode
];
2999 if (cmp_code
== CODE_FOR_nothing
)
3002 /* Must make sure the size fits the insn's mode. */
3003 if ((GET_CODE (size
) == CONST_INT
3004 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
3005 || (GET_MODE_BITSIZE (GET_MODE (size
))
3006 > GET_MODE_BITSIZE (cmp_mode
)))
3009 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
3010 result
= gen_reg_rtx (result_mode
);
3011 size
= convert_to_mode (cmp_mode
, size
, 1);
3012 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
3016 *pmode
= result_mode
;
3020 /* Otherwise call a library function, memcmp. */
3021 libfunc
= memcmp_libfunc
;
3022 length_type
= sizetype
;
3023 result_mode
= TYPE_MODE (integer_type_node
);
3024 cmp_mode
= TYPE_MODE (length_type
);
3025 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
3026 TYPE_UNSIGNED (length_type
));
3028 result
= emit_library_call_value (libfunc
, 0, LCT_PURE_MAKE_BLOCK
,
3035 *pmode
= result_mode
;
3039 /* Don't allow operands to the compare to trap, as that can put the
3040 compare and branch in different basic blocks. */
3041 if (flag_non_call_exceptions
)
3044 x
= force_reg (mode
, x
);
3046 y
= force_reg (mode
, y
);
3051 if (can_compare_p (*pcomparison
, mode
, purpose
))
3054 /* Handle a lib call just for the mode we are using. */
3056 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3058 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3061 /* If we want unsigned, and this mode has a distinct unsigned
3062 comparison routine, use that. */
3063 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3064 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3066 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3067 word_mode
, 2, x
, mode
, y
, mode
);
3071 if (TARGET_LIB_INT_CMP_BIASED
)
3072 /* Integer comparison returns a result that must be compared
3073 against 1, so that even if we do an unsigned compare
3074 afterward, there is still a value that can represent the
3075 result "less than". */
3085 if (class == MODE_FLOAT
)
3086 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3092 /* Before emitting an insn with code ICODE, make sure that X, which is going
3093 to be used for operand OPNUM of the insn, is converted from mode MODE to
3094 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3095 that it is accepted by the operand predicate. Return the new value. */
3098 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
3099 enum machine_mode wider_mode
, int unsignedp
)
3101 if (mode
!= wider_mode
)
3102 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3104 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3105 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3109 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3115 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3116 we can do the comparison.
3117 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3118 be NULL_RTX which indicates that only a comparison is to be generated. */
3121 emit_cmp_and_jump_insn_1 (rtx x
, rtx y
, enum machine_mode mode
,
3122 enum rtx_code comparison
, int unsignedp
, rtx label
)
3124 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3125 enum mode_class
class = GET_MODE_CLASS (mode
);
3126 enum machine_mode wider_mode
= mode
;
3128 /* Try combined insns first. */
3131 enum insn_code icode
;
3132 PUT_MODE (test
, wider_mode
);
3136 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3138 if (icode
!= CODE_FOR_nothing
3139 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3141 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3142 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3143 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3148 /* Handle some compares against zero. */
3149 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3150 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3152 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3153 emit_insn (GEN_FCN (icode
) (x
));
3155 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3159 /* Handle compares for which there is a directly suitable insn. */
3161 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3162 if (icode
!= CODE_FOR_nothing
)
3164 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3165 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3166 emit_insn (GEN_FCN (icode
) (x
, y
));
3168 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3172 if (class != MODE_INT
&& class != MODE_FLOAT
3173 && class != MODE_COMPLEX_FLOAT
)
3176 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3178 while (wider_mode
!= VOIDmode
);
3183 /* Generate code to compare X with Y so that the condition codes are
3184 set and to jump to LABEL if the condition is true. If X is a
3185 constant and Y is not a constant, then the comparison is swapped to
3186 ensure that the comparison RTL has the canonical form.
3188 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3189 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3190 the proper branch condition code.
3192 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3194 MODE is the mode of the inputs (in case they are const_int).
3196 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3197 be passed unchanged to emit_cmp_insn, then potentially converted into an
3198 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3201 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3202 enum machine_mode mode
, int unsignedp
, rtx label
)
3204 rtx op0
= x
, op1
= y
;
3206 /* Swap operands and condition to ensure canonical RTL. */
3207 if (swap_commutative_operands_p (x
, y
))
3209 /* If we're not emitting a branch, this means some caller
3215 comparison
= swap_condition (comparison
);
3219 /* If OP0 is still a constant, then both X and Y must be constants. Force
3220 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3222 if (CONSTANT_P (op0
))
3223 op0
= force_reg (mode
, op0
);
3227 comparison
= unsigned_condition (comparison
);
3229 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3231 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3234 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3237 emit_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3238 enum machine_mode mode
, int unsignedp
)
3240 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3243 /* Emit a library call comparison between floating point X and Y.
3244 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3247 prepare_float_lib_cmp (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
,
3248 enum machine_mode
*pmode
, int *punsignedp
)
3250 enum rtx_code comparison
= *pcomparison
;
3251 enum rtx_code swapped
= swap_condition (comparison
);
3252 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
3255 enum machine_mode orig_mode
= GET_MODE (x
);
3256 enum machine_mode mode
;
3257 rtx value
, target
, insns
, equiv
;
3259 bool reversed_p
= false;
3261 for (mode
= orig_mode
; mode
!= VOIDmode
; mode
= GET_MODE_WIDER_MODE (mode
))
3263 if ((libfunc
= code_to_optab
[comparison
]->handlers
[mode
].libfunc
))
3266 if ((libfunc
= code_to_optab
[swapped
]->handlers
[mode
].libfunc
))
3269 tmp
= x
; x
= y
; y
= tmp
;
3270 comparison
= swapped
;
3274 if ((libfunc
= code_to_optab
[reversed
]->handlers
[mode
].libfunc
)
3275 && FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, reversed
))
3277 comparison
= reversed
;
3283 if (mode
== VOIDmode
)
3286 if (mode
!= orig_mode
)
3288 x
= convert_to_mode (mode
, x
, 0);
3289 y
= convert_to_mode (mode
, y
, 0);
3292 /* Attach a REG_EQUAL note describing the semantics of the libcall to
3293 the RTL. The allows the RTL optimizers to delete the libcall if the
3294 condition can be determined at compile-time. */
3295 if (comparison
== UNORDERED
)
3297 rtx temp
= simplify_gen_relational (NE
, word_mode
, mode
, x
, x
);
3298 equiv
= simplify_gen_relational (NE
, word_mode
, mode
, y
, y
);
3299 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
3300 temp
, const_true_rtx
, equiv
);
3304 equiv
= simplify_gen_relational (comparison
, word_mode
, mode
, x
, y
);
3305 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3307 rtx true_rtx
, false_rtx
;
3312 true_rtx
= const0_rtx
;
3313 false_rtx
= const_true_rtx
;
3317 true_rtx
= const_true_rtx
;
3318 false_rtx
= const0_rtx
;
3322 true_rtx
= const1_rtx
;
3323 false_rtx
= const0_rtx
;
3327 true_rtx
= const0_rtx
;
3328 false_rtx
= constm1_rtx
;
3332 true_rtx
= constm1_rtx
;
3333 false_rtx
= const0_rtx
;
3337 true_rtx
= const0_rtx
;
3338 false_rtx
= const1_rtx
;
3344 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
3345 equiv
, true_rtx
, false_rtx
);
3350 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
3351 word_mode
, 2, x
, mode
, y
, mode
);
3352 insns
= get_insns ();
3355 target
= gen_reg_rtx (word_mode
);
3356 emit_libcall_block (insns
, target
, value
, equiv
);
3358 if (comparison
== UNORDERED
3359 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3360 comparison
= reversed_p
? EQ
: NE
;
3365 *pcomparison
= comparison
;
3369 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3372 emit_indirect_jump (rtx loc
)
3374 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
3376 loc
= copy_to_mode_reg (Pmode
, loc
);
3378 emit_jump_insn (gen_indirect_jump (loc
));
3382 #ifdef HAVE_conditional_move
3384 /* Emit a conditional move instruction if the machine supports one for that
3385 condition and machine mode.
3387 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3388 the mode to use should they be constants. If it is VOIDmode, they cannot
3391 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3392 should be stored there. MODE is the mode to use should they be constants.
3393 If it is VOIDmode, they cannot both be constants.
3395 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3396 is not supported. */
3399 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
3400 enum machine_mode cmode
, rtx op2
, rtx op3
,
3401 enum machine_mode mode
, int unsignedp
)
3403 rtx tem
, subtarget
, comparison
, insn
;
3404 enum insn_code icode
;
3405 enum rtx_code reversed
;
3407 /* If one operand is constant, make it the second one. Only do this
3408 if the other operand is not constant as well. */
3410 if (swap_commutative_operands_p (op0
, op1
))
3415 code
= swap_condition (code
);
3418 /* get_condition will prefer to generate LT and GT even if the old
3419 comparison was against zero, so undo that canonicalization here since
3420 comparisons against zero are cheaper. */
3421 if (code
== LT
&& op1
== const1_rtx
)
3422 code
= LE
, op1
= const0_rtx
;
3423 else if (code
== GT
&& op1
== constm1_rtx
)
3424 code
= GE
, op1
= const0_rtx
;
3426 if (cmode
== VOIDmode
)
3427 cmode
= GET_MODE (op0
);
3429 if (swap_commutative_operands_p (op2
, op3
)
3430 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
3439 if (mode
== VOIDmode
)
3440 mode
= GET_MODE (op2
);
3442 icode
= movcc_gen_code
[mode
];
3444 if (icode
== CODE_FOR_nothing
)
3449 op2
= force_not_mem (op2
);
3450 op3
= force_not_mem (op3
);
3454 target
= gen_reg_rtx (mode
);
3458 /* If the insn doesn't accept these operands, put them in pseudos. */
3460 if (! (*insn_data
[icode
].operand
[0].predicate
)
3461 (subtarget
, insn_data
[icode
].operand
[0].mode
))
3462 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
3464 if (! (*insn_data
[icode
].operand
[2].predicate
)
3465 (op2
, insn_data
[icode
].operand
[2].mode
))
3466 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
3468 if (! (*insn_data
[icode
].operand
[3].predicate
)
3469 (op3
, insn_data
[icode
].operand
[3].mode
))
3470 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
3472 /* Everything should now be in the suitable form, so emit the compare insn
3473 and then the conditional move. */
3476 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
3478 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3479 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3480 return NULL and let the caller figure out how best to deal with this
3482 if (GET_CODE (comparison
) != code
)
3485 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3487 /* If that failed, then give up. */
3493 if (subtarget
!= target
)
3494 convert_move (target
, subtarget
, 0);
3499 /* Return nonzero if a conditional move of mode MODE is supported.
3501 This function is for combine so it can tell whether an insn that looks
3502 like a conditional move is actually supported by the hardware. If we
3503 guess wrong we lose a bit on optimization, but that's it. */
3504 /* ??? sparc64 supports conditionally moving integers values based on fp
3505 comparisons, and vice versa. How do we handle them? */
3508 can_conditionally_move_p (enum machine_mode mode
)
3510 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3516 #endif /* HAVE_conditional_move */
3518 /* Emit a conditional addition instruction if the machine supports one for that
3519 condition and machine mode.
3521 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3522 the mode to use should they be constants. If it is VOIDmode, they cannot
3525 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
3526 should be stored there. MODE is the mode to use should they be constants.
3527 If it is VOIDmode, they cannot both be constants.
3529 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3530 is not supported. */
3533 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
3534 enum machine_mode cmode
, rtx op2
, rtx op3
,
3535 enum machine_mode mode
, int unsignedp
)
3537 rtx tem
, subtarget
, comparison
, insn
;
3538 enum insn_code icode
;
3539 enum rtx_code reversed
;
3541 /* If one operand is constant, make it the second one. Only do this
3542 if the other operand is not constant as well. */
3544 if (swap_commutative_operands_p (op0
, op1
))
3549 code
= swap_condition (code
);
3552 /* get_condition will prefer to generate LT and GT even if the old
3553 comparison was against zero, so undo that canonicalization here since
3554 comparisons against zero are cheaper. */
3555 if (code
== LT
&& op1
== const1_rtx
)
3556 code
= LE
, op1
= const0_rtx
;
3557 else if (code
== GT
&& op1
== constm1_rtx
)
3558 code
= GE
, op1
= const0_rtx
;
3560 if (cmode
== VOIDmode
)
3561 cmode
= GET_MODE (op0
);
3563 if (swap_commutative_operands_p (op2
, op3
)
3564 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
3573 if (mode
== VOIDmode
)
3574 mode
= GET_MODE (op2
);
3576 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
3578 if (icode
== CODE_FOR_nothing
)
3583 op2
= force_not_mem (op2
);
3584 op3
= force_not_mem (op3
);
3588 target
= gen_reg_rtx (mode
);
3590 /* If the insn doesn't accept these operands, put them in pseudos. */
3592 if (! (*insn_data
[icode
].operand
[0].predicate
)
3593 (target
, insn_data
[icode
].operand
[0].mode
))
3594 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
3598 if (! (*insn_data
[icode
].operand
[2].predicate
)
3599 (op2
, insn_data
[icode
].operand
[2].mode
))
3600 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
3602 if (! (*insn_data
[icode
].operand
[3].predicate
)
3603 (op3
, insn_data
[icode
].operand
[3].mode
))
3604 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
3606 /* Everything should now be in the suitable form, so emit the compare insn
3607 and then the conditional move. */
3610 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
3612 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3613 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3614 return NULL and let the caller figure out how best to deal with this
3616 if (GET_CODE (comparison
) != code
)
3619 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3621 /* If that failed, then give up. */
3627 if (subtarget
!= target
)
3628 convert_move (target
, subtarget
, 0);
3633 /* These functions attempt to generate an insn body, rather than
3634 emitting the insn, but if the gen function already emits them, we
3635 make no attempt to turn them back into naked patterns. */
3637 /* Generate and return an insn body to add Y to X. */
3640 gen_add2_insn (rtx x
, rtx y
)
3642 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3644 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3645 (x
, insn_data
[icode
].operand
[0].mode
))
3646 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3647 (x
, insn_data
[icode
].operand
[1].mode
))
3648 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3649 (y
, insn_data
[icode
].operand
[2].mode
)))
3652 return (GEN_FCN (icode
) (x
, x
, y
));
3655 /* Generate and return an insn body to add r1 and c,
3656 storing the result in r0. */
3658 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
3660 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
3662 if (icode
== CODE_FOR_nothing
3663 || ! ((*insn_data
[icode
].operand
[0].predicate
)
3664 (r0
, insn_data
[icode
].operand
[0].mode
))
3665 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3666 (r1
, insn_data
[icode
].operand
[1].mode
))
3667 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3668 (c
, insn_data
[icode
].operand
[2].mode
)))
3671 return (GEN_FCN (icode
) (r0
, r1
, c
));
3675 have_add2_insn (rtx x
, rtx y
)
3679 if (GET_MODE (x
) == VOIDmode
)
3682 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3684 if (icode
== CODE_FOR_nothing
)
3687 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3688 (x
, insn_data
[icode
].operand
[0].mode
))
3689 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3690 (x
, insn_data
[icode
].operand
[1].mode
))
3691 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3692 (y
, insn_data
[icode
].operand
[2].mode
)))
3698 /* Generate and return an insn body to subtract Y from X. */
3701 gen_sub2_insn (rtx x
, rtx y
)
3703 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3705 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3706 (x
, insn_data
[icode
].operand
[0].mode
))
3707 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3708 (x
, insn_data
[icode
].operand
[1].mode
))
3709 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3710 (y
, insn_data
[icode
].operand
[2].mode
)))
3713 return (GEN_FCN (icode
) (x
, x
, y
));
3716 /* Generate and return an insn body to subtract r1 and c,
3717 storing the result in r0. */
3719 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
3721 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
3723 if (icode
== CODE_FOR_nothing
3724 || ! ((*insn_data
[icode
].operand
[0].predicate
)
3725 (r0
, insn_data
[icode
].operand
[0].mode
))
3726 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3727 (r1
, insn_data
[icode
].operand
[1].mode
))
3728 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3729 (c
, insn_data
[icode
].operand
[2].mode
)))
3732 return (GEN_FCN (icode
) (r0
, r1
, c
));
3736 have_sub2_insn (rtx x
, rtx y
)
3740 if (GET_MODE (x
) == VOIDmode
)
3743 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3745 if (icode
== CODE_FOR_nothing
)
3748 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3749 (x
, insn_data
[icode
].operand
[0].mode
))
3750 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3751 (x
, insn_data
[icode
].operand
[1].mode
))
3752 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3753 (y
, insn_data
[icode
].operand
[2].mode
)))
3759 /* Generate the body of an instruction to copy Y into X.
3760 It may be a list of insns, if one insn isn't enough. */
3763 gen_move_insn (rtx x
, rtx y
)
3768 emit_move_insn_1 (x
, y
);
3774 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3775 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3776 no such operation exists, CODE_FOR_nothing will be returned. */
3779 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
3783 #ifdef HAVE_ptr_extend
3785 return CODE_FOR_ptr_extend
;
3788 tab
= unsignedp
? zext_optab
: sext_optab
;
3789 return tab
->handlers
[to_mode
][from_mode
].insn_code
;
3792 /* Generate the body of an insn to extend Y (with mode MFROM)
3793 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3796 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
3797 enum machine_mode mfrom
, int unsignedp
)
3799 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
3800 return GEN_FCN (icode
) (x
, y
);
3803 /* can_fix_p and can_float_p say whether the target machine
3804 can directly convert a given fixed point type to
3805 a given floating point type, or vice versa.
3806 The returned value is the CODE_FOR_... value to use,
3807 or CODE_FOR_nothing if these modes cannot be directly converted.
3809 *TRUNCP_PTR is set to 1 if it is necessary to output
3810 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3812 static enum insn_code
3813 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
3814 int unsignedp
, int *truncp_ptr
)
3817 enum insn_code icode
;
3819 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
3820 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
3821 if (icode
!= CODE_FOR_nothing
)
3827 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
3828 for this to work. We need to rework the fix* and ftrunc* patterns
3829 and documentation. */
3830 tab
= unsignedp
? ufix_optab
: sfix_optab
;
3831 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
3832 if (icode
!= CODE_FOR_nothing
3833 && ftrunc_optab
->handlers
[fltmode
].insn_code
!= CODE_FOR_nothing
)
3840 return CODE_FOR_nothing
;
3843 static enum insn_code
3844 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
3849 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
3850 return tab
->handlers
[fltmode
][fixmode
].insn_code
;
3853 /* Generate code to convert FROM to floating point
3854 and store in TO. FROM must be fixed point and not VOIDmode.
3855 UNSIGNEDP nonzero means regard FROM as unsigned.
3856 Normally this is done by correcting the final value
3857 if it is negative. */
3860 expand_float (rtx to
, rtx from
, int unsignedp
)
3862 enum insn_code icode
;
3864 enum machine_mode fmode
, imode
;
3866 /* Crash now, because we won't be able to decide which mode to use. */
3867 if (GET_MODE (from
) == VOIDmode
)
3870 /* Look for an insn to do the conversion. Do it in the specified
3871 modes if possible; otherwise convert either input, output or both to
3872 wider mode. If the integer mode is wider than the mode of FROM,
3873 we can do the conversion signed even if the input is unsigned. */
3875 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3876 fmode
= GET_MODE_WIDER_MODE (fmode
))
3877 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3878 imode
= GET_MODE_WIDER_MODE (imode
))
3880 int doing_unsigned
= unsignedp
;
3882 if (fmode
!= GET_MODE (to
)
3883 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
3886 icode
= can_float_p (fmode
, imode
, unsignedp
);
3887 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3888 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3890 if (icode
!= CODE_FOR_nothing
)
3892 if (imode
!= GET_MODE (from
))
3893 from
= convert_to_mode (imode
, from
, unsignedp
);
3895 if (fmode
!= GET_MODE (to
))
3896 target
= gen_reg_rtx (fmode
);
3898 emit_unop_insn (icode
, target
, from
,
3899 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3902 convert_move (to
, target
, 0);
3907 /* Unsigned integer, and no way to convert directly.
3908 Convert as signed, then conditionally adjust the result. */
3911 rtx label
= gen_label_rtx ();
3913 REAL_VALUE_TYPE offset
;
3916 from
= force_not_mem (from
);
3918 /* Look for a usable floating mode FMODE wider than the source and at
3919 least as wide as the target. Using FMODE will avoid rounding woes
3920 with unsigned values greater than the signed maximum value. */
3922 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3923 fmode
= GET_MODE_WIDER_MODE (fmode
))
3924 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3925 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3928 if (fmode
== VOIDmode
)
3930 /* There is no such mode. Pretend the target is wide enough. */
3931 fmode
= GET_MODE (to
);
3933 /* Avoid double-rounding when TO is narrower than FROM. */
3934 if ((significand_size (fmode
) + 1)
3935 < GET_MODE_BITSIZE (GET_MODE (from
)))
3938 rtx neglabel
= gen_label_rtx ();
3940 /* Don't use TARGET if it isn't a register, is a hard register,
3941 or is the wrong mode. */
3943 || REGNO (target
) < FIRST_PSEUDO_REGISTER
3944 || GET_MODE (target
) != fmode
)
3945 target
= gen_reg_rtx (fmode
);
3947 imode
= GET_MODE (from
);
3948 do_pending_stack_adjust ();
3950 /* Test whether the sign bit is set. */
3951 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
3954 /* The sign bit is not set. Convert as signed. */
3955 expand_float (target
, from
, 0);
3956 emit_jump_insn (gen_jump (label
));
3959 /* The sign bit is set.
3960 Convert to a usable (positive signed) value by shifting right
3961 one bit, while remembering if a nonzero bit was shifted
3962 out; i.e., compute (from & 1) | (from >> 1). */
3964 emit_label (neglabel
);
3965 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
3966 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3967 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
3969 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
3971 expand_float (target
, temp
, 0);
3973 /* Multiply by 2 to undo the shift above. */
3974 temp
= expand_binop (fmode
, add_optab
, target
, target
,
3975 target
, 0, OPTAB_LIB_WIDEN
);
3977 emit_move_insn (target
, temp
);
3979 do_pending_stack_adjust ();
3985 /* If we are about to do some arithmetic to correct for an
3986 unsigned operand, do it in a pseudo-register. */
3988 if (GET_MODE (to
) != fmode
3989 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
3990 target
= gen_reg_rtx (fmode
);
3992 /* Convert as signed integer to floating. */
3993 expand_float (target
, from
, 0);
3995 /* If FROM is negative (and therefore TO is negative),
3996 correct its value by 2**bitwidth. */
3998 do_pending_stack_adjust ();
3999 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4003 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4004 temp
= expand_binop (fmode
, add_optab
, target
,
4005 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4006 target
, 0, OPTAB_LIB_WIDEN
);
4008 emit_move_insn (target
, temp
);
4010 do_pending_stack_adjust ();
4015 /* No hardware instruction available; call a library routine. */
4020 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4022 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4023 from
= convert_to_mode (SImode
, from
, unsignedp
);
4026 from
= force_not_mem (from
);
4028 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4034 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4035 GET_MODE (to
), 1, from
,
4037 insns
= get_insns ();
4040 emit_libcall_block (insns
, target
, value
,
4041 gen_rtx_FLOAT (GET_MODE (to
), from
));
4046 /* Copy result to requested destination
4047 if we have been computing in a temp location. */
4051 if (GET_MODE (target
) == GET_MODE (to
))
4052 emit_move_insn (to
, target
);
4054 convert_move (to
, target
, 0);
4058 /* Generate code to convert FROM to fixed point and store in TO. FROM
4059 must be floating point. */
4062 expand_fix (rtx to
, rtx from
, int unsignedp
)
4064 enum insn_code icode
;
4066 enum machine_mode fmode
, imode
;
4069 /* We first try to find a pair of modes, one real and one integer, at
4070 least as wide as FROM and TO, respectively, in which we can open-code
4071 this conversion. If the integer mode is wider than the mode of TO,
4072 we can do the conversion either signed or unsigned. */
4074 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4075 fmode
= GET_MODE_WIDER_MODE (fmode
))
4076 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4077 imode
= GET_MODE_WIDER_MODE (imode
))
4079 int doing_unsigned
= unsignedp
;
4081 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4082 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4083 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4085 if (icode
!= CODE_FOR_nothing
)
4087 if (fmode
!= GET_MODE (from
))
4088 from
= convert_to_mode (fmode
, from
, 0);
4092 rtx temp
= gen_reg_rtx (GET_MODE (from
));
4093 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
4097 if (imode
!= GET_MODE (to
))
4098 target
= gen_reg_rtx (imode
);
4100 emit_unop_insn (icode
, target
, from
,
4101 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4103 convert_move (to
, target
, unsignedp
);
4108 /* For an unsigned conversion, there is one more way to do it.
4109 If we have a signed conversion, we generate code that compares
4110 the real value to the largest representable positive number. If if
4111 is smaller, the conversion is done normally. Otherwise, subtract
4112 one plus the highest signed number, convert, and add it back.
4114 We only need to check all real modes, since we know we didn't find
4115 anything with a wider integer mode.
4117 This code used to extend FP value into mode wider than the destination.
4118 This is not needed. Consider, for instance conversion from SFmode
4121 The hot path trought the code is dealing with inputs smaller than 2^63
4122 and doing just the conversion, so there is no bits to lose.
4124 In the other path we know the value is positive in the range 2^63..2^64-1
4125 inclusive. (as for other imput overflow happens and result is undefined)
4126 So we know that the most important bit set in mantissa corresponds to
4127 2^63. The subtraction of 2^63 should not generate any rounding as it
4128 simply clears out that bit. The rest is trivial. */
4130 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4131 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4132 fmode
= GET_MODE_WIDER_MODE (fmode
))
4133 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4137 REAL_VALUE_TYPE offset
;
4138 rtx limit
, lab1
, lab2
, insn
;
4140 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4141 real_2expN (&offset
, bitsize
- 1);
4142 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4143 lab1
= gen_label_rtx ();
4144 lab2
= gen_label_rtx ();
4147 from
= force_not_mem (from
);
4149 if (fmode
!= GET_MODE (from
))
4150 from
= convert_to_mode (fmode
, from
, 0);
4152 /* See if we need to do the subtraction. */
4153 do_pending_stack_adjust ();
4154 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4157 /* If not, do the signed "fix" and branch around fixup code. */
4158 expand_fix (to
, from
, 0);
4159 emit_jump_insn (gen_jump (lab2
));
4162 /* Otherwise, subtract 2**(N-1), convert to signed number,
4163 then add 2**(N-1). Do the addition using XOR since this
4164 will often generate better code. */
4166 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4167 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4168 expand_fix (to
, target
, 0);
4169 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4171 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
4173 to
, 1, OPTAB_LIB_WIDEN
);
4176 emit_move_insn (to
, target
);
4180 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4181 != CODE_FOR_nothing
)
4183 /* Make a place for a REG_NOTE and add it. */
4184 insn
= emit_move_insn (to
, to
);
4185 set_unique_reg_note (insn
,
4187 gen_rtx_fmt_e (UNSIGNED_FIX
,
4195 /* We can't do it with an insn, so use a library call. But first ensure
4196 that the mode of TO is at least as wide as SImode, since those are the
4197 only library calls we know about. */
4199 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4201 target
= gen_reg_rtx (SImode
);
4203 expand_fix (target
, from
, unsignedp
);
4211 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
4212 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4217 from
= force_not_mem (from
);
4221 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4222 GET_MODE (to
), 1, from
,
4224 insns
= get_insns ();
4227 emit_libcall_block (insns
, target
, value
,
4228 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4229 GET_MODE (to
), from
));
4234 if (GET_MODE (to
) == GET_MODE (target
))
4235 emit_move_insn (to
, target
);
4237 convert_move (to
, target
, 0);
4241 /* Report whether we have an instruction to perform the operation
4242 specified by CODE on operands of mode MODE. */
4244 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
4246 return (code_to_optab
[(int) code
] != 0
4247 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
4248 != CODE_FOR_nothing
));
4251 /* Create a blank optab. */
4256 optab op
= ggc_alloc (sizeof (struct optab
));
4257 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4259 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4260 op
->handlers
[i
].libfunc
= 0;
4266 static convert_optab
4267 new_convert_optab (void)
4270 convert_optab op
= ggc_alloc (sizeof (struct convert_optab
));
4271 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4272 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4274 op
->handlers
[i
][j
].insn_code
= CODE_FOR_nothing
;
4275 op
->handlers
[i
][j
].libfunc
= 0;
4280 /* Same, but fill in its code as CODE, and write it into the
4281 code_to_optab table. */
4283 init_optab (enum rtx_code code
)
4285 optab op
= new_optab ();
4287 code_to_optab
[(int) code
] = op
;
4291 /* Same, but fill in its code as CODE, and do _not_ write it into
4292 the code_to_optab table. */
4294 init_optabv (enum rtx_code code
)
4296 optab op
= new_optab ();
4301 /* Conversion optabs never go in the code_to_optab table. */
4302 static inline convert_optab
4303 init_convert_optab (enum rtx_code code
)
4305 convert_optab op
= new_convert_optab ();
4310 /* Initialize the libfunc fields of an entire group of entries in some
4311 optab. Each entry is set equal to a string consisting of a leading
4312 pair of underscores followed by a generic operation name followed by
4313 a mode name (downshifted to lowercase) followed by a single character
4314 representing the number of operands for the given operation (which is
4315 usually one of the characters '2', '3', or '4').
4317 OPTABLE is the table in which libfunc fields are to be initialized.
4318 FIRST_MODE is the first machine mode index in the given optab to
4320 LAST_MODE is the last machine mode index in the given optab to
4322 OPNAME is the generic (string) name of the operation.
4323 SUFFIX is the character which specifies the number of operands for
4324 the given generic operation.
4328 init_libfuncs (optab optable
, int first_mode
, int last_mode
,
4329 const char *opname
, int suffix
)
4332 unsigned opname_len
= strlen (opname
);
4334 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4335 mode
= (enum machine_mode
) ((int) mode
+ 1))
4337 const char *mname
= GET_MODE_NAME (mode
);
4338 unsigned mname_len
= strlen (mname
);
4339 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
4346 for (q
= opname
; *q
; )
4348 for (q
= mname
; *q
; q
++)
4349 *p
++ = TOLOWER (*q
);
4353 optable
->handlers
[(int) mode
].libfunc
4354 = init_one_libfunc (ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
4358 /* Initialize the libfunc fields of an entire group of entries in some
4359 optab which correspond to all integer mode operations. The parameters
4360 have the same meaning as similarly named ones for the `init_libfuncs'
4361 routine. (See above). */
4364 init_integral_libfuncs (optab optable
, const char *opname
, int suffix
)
4366 int maxsize
= 2*BITS_PER_WORD
;
4367 if (maxsize
< LONG_LONG_TYPE_SIZE
)
4368 maxsize
= LONG_LONG_TYPE_SIZE
;
4369 init_libfuncs (optable
, word_mode
,
4370 mode_for_size (maxsize
, MODE_INT
, 0),
4374 /* Initialize the libfunc fields of an entire group of entries in some
4375 optab which correspond to all real mode operations. The parameters
4376 have the same meaning as similarly named ones for the `init_libfuncs'
4377 routine. (See above). */
4380 init_floating_libfuncs (optab optable
, const char *opname
, int suffix
)
4382 init_libfuncs (optable
, MIN_MODE_FLOAT
, MAX_MODE_FLOAT
, opname
, suffix
);
4385 /* Initialize the libfunc fields of an entire group of entries of an
4386 inter-mode-class conversion optab. The string formation rules are
4387 similar to the ones for init_libfuncs, above, but instead of having
4388 a mode name and an operand count these functions have two mode names
4389 and no operand count. */
4391 init_interclass_conv_libfuncs (convert_optab tab
, const char *opname
,
4392 enum mode_class from_class
,
4393 enum mode_class to_class
)
4395 enum machine_mode first_from_mode
= GET_CLASS_NARROWEST_MODE (from_class
);
4396 enum machine_mode first_to_mode
= GET_CLASS_NARROWEST_MODE (to_class
);
4397 size_t opname_len
= strlen (opname
);
4398 size_t max_mname_len
= 0;
4400 enum machine_mode fmode
, tmode
;
4401 const char *fname
, *tname
;
4403 char *libfunc_name
, *suffix
;
4406 for (fmode
= first_from_mode
;
4408 fmode
= GET_MODE_WIDER_MODE (fmode
))
4409 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (fmode
)));
4411 for (tmode
= first_to_mode
;
4413 tmode
= GET_MODE_WIDER_MODE (tmode
))
4414 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (tmode
)));
4416 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
4417 libfunc_name
[0] = '_';
4418 libfunc_name
[1] = '_';
4419 memcpy (&libfunc_name
[2], opname
, opname_len
);
4420 suffix
= libfunc_name
+ opname_len
+ 2;
4422 for (fmode
= first_from_mode
; fmode
!= VOIDmode
;
4423 fmode
= GET_MODE_WIDER_MODE (fmode
))
4424 for (tmode
= first_to_mode
; tmode
!= VOIDmode
;
4425 tmode
= GET_MODE_WIDER_MODE (tmode
))
4427 fname
= GET_MODE_NAME (fmode
);
4428 tname
= GET_MODE_NAME (tmode
);
4431 for (q
= fname
; *q
; p
++, q
++)
4433 for (q
= tname
; *q
; p
++, q
++)
4438 tab
->handlers
[tmode
][fmode
].libfunc
4439 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
4444 /* Initialize the libfunc fields of an entire group of entries of an
4445 intra-mode-class conversion optab. The string formation rules are
4446 similar to the ones for init_libfunc, above. WIDENING says whether
4447 the optab goes from narrow to wide modes or vice versa. These functions
4448 have two mode names _and_ an operand count. */
4450 init_intraclass_conv_libfuncs (convert_optab tab
, const char *opname
,
4451 enum mode_class
class, bool widening
)
4453 enum machine_mode first_mode
= GET_CLASS_NARROWEST_MODE (class);
4454 size_t opname_len
= strlen (opname
);
4455 size_t max_mname_len
= 0;
4457 enum machine_mode nmode
, wmode
;
4458 const char *nname
, *wname
;
4460 char *libfunc_name
, *suffix
;
4463 for (nmode
= first_mode
; nmode
!= VOIDmode
;
4464 nmode
= GET_MODE_WIDER_MODE (nmode
))
4465 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (nmode
)));
4467 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
4468 libfunc_name
[0] = '_';
4469 libfunc_name
[1] = '_';
4470 memcpy (&libfunc_name
[2], opname
, opname_len
);
4471 suffix
= libfunc_name
+ opname_len
+ 2;
4473 for (nmode
= first_mode
; nmode
!= VOIDmode
;
4474 nmode
= GET_MODE_WIDER_MODE (nmode
))
4475 for (wmode
= GET_MODE_WIDER_MODE (nmode
); wmode
!= VOIDmode
;
4476 wmode
= GET_MODE_WIDER_MODE (wmode
))
4478 nname
= GET_MODE_NAME (nmode
);
4479 wname
= GET_MODE_NAME (wmode
);
4482 for (q
= widening
? nname
: wname
; *q
; p
++, q
++)
4484 for (q
= widening
? wname
: nname
; *q
; p
++, q
++)
4490 tab
->handlers
[widening
? wmode
: nmode
]
4491 [widening
? nmode
: wmode
].libfunc
4492 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
4499 init_one_libfunc (const char *name
)
4503 /* Create a FUNCTION_DECL that can be passed to
4504 targetm.encode_section_info. */
4505 /* ??? We don't have any type information except for this is
4506 a function. Pretend this is "int foo()". */
4507 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
4508 build_function_type (integer_type_node
, NULL_TREE
));
4509 DECL_ARTIFICIAL (decl
) = 1;
4510 DECL_EXTERNAL (decl
) = 1;
4511 TREE_PUBLIC (decl
) = 1;
4513 symbol
= XEXP (DECL_RTL (decl
), 0);
4515 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
4516 are the flags assigned by targetm.encode_section_info. */
4517 SYMBOL_REF_DECL (symbol
) = 0;
4522 /* Call this to reset the function entry for one optab (OPTABLE) in mode
4523 MODE to NAME, which should be either 0 or a string constant. */
4525 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
4528 optable
->handlers
[mode
].libfunc
= init_one_libfunc (name
);
4530 optable
->handlers
[mode
].libfunc
= 0;
4533 /* Call this to reset the function entry for one conversion optab
4534 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
4535 either 0 or a string constant. */
4537 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
4538 enum machine_mode fmode
, const char *name
)
4541 optable
->handlers
[tmode
][fmode
].libfunc
= init_one_libfunc (name
);
4543 optable
->handlers
[tmode
][fmode
].libfunc
= 0;
4546 /* Call this once to initialize the contents of the optabs
4547 appropriately for the current target machine. */
4554 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4556 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4557 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4559 #ifdef HAVE_conditional_move
4560 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4561 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4564 add_optab
= init_optab (PLUS
);
4565 addv_optab
= init_optabv (PLUS
);
4566 sub_optab
= init_optab (MINUS
);
4567 subv_optab
= init_optabv (MINUS
);
4568 smul_optab
= init_optab (MULT
);
4569 smulv_optab
= init_optabv (MULT
);
4570 smul_highpart_optab
= init_optab (UNKNOWN
);
4571 umul_highpart_optab
= init_optab (UNKNOWN
);
4572 smul_widen_optab
= init_optab (UNKNOWN
);
4573 umul_widen_optab
= init_optab (UNKNOWN
);
4574 sdiv_optab
= init_optab (DIV
);
4575 sdivv_optab
= init_optabv (DIV
);
4576 sdivmod_optab
= init_optab (UNKNOWN
);
4577 udiv_optab
= init_optab (UDIV
);
4578 udivmod_optab
= init_optab (UNKNOWN
);
4579 smod_optab
= init_optab (MOD
);
4580 umod_optab
= init_optab (UMOD
);
4581 fmod_optab
= init_optab (UNKNOWN
);
4582 drem_optab
= init_optab (UNKNOWN
);
4583 ftrunc_optab
= init_optab (UNKNOWN
);
4584 and_optab
= init_optab (AND
);
4585 ior_optab
= init_optab (IOR
);
4586 xor_optab
= init_optab (XOR
);
4587 ashl_optab
= init_optab (ASHIFT
);
4588 ashr_optab
= init_optab (ASHIFTRT
);
4589 lshr_optab
= init_optab (LSHIFTRT
);
4590 rotl_optab
= init_optab (ROTATE
);
4591 rotr_optab
= init_optab (ROTATERT
);
4592 smin_optab
= init_optab (SMIN
);
4593 smax_optab
= init_optab (SMAX
);
4594 umin_optab
= init_optab (UMIN
);
4595 umax_optab
= init_optab (UMAX
);
4596 pow_optab
= init_optab (UNKNOWN
);
4597 atan2_optab
= init_optab (UNKNOWN
);
4599 /* These three have codes assigned exclusively for the sake of
4601 mov_optab
= init_optab (SET
);
4602 movstrict_optab
= init_optab (STRICT_LOW_PART
);
4603 cmp_optab
= init_optab (COMPARE
);
4605 ucmp_optab
= init_optab (UNKNOWN
);
4606 tst_optab
= init_optab (UNKNOWN
);
4608 eq_optab
= init_optab (EQ
);
4609 ne_optab
= init_optab (NE
);
4610 gt_optab
= init_optab (GT
);
4611 ge_optab
= init_optab (GE
);
4612 lt_optab
= init_optab (LT
);
4613 le_optab
= init_optab (LE
);
4614 unord_optab
= init_optab (UNORDERED
);
4616 neg_optab
= init_optab (NEG
);
4617 negv_optab
= init_optabv (NEG
);
4618 abs_optab
= init_optab (ABS
);
4619 absv_optab
= init_optabv (ABS
);
4620 addcc_optab
= init_optab (UNKNOWN
);
4621 one_cmpl_optab
= init_optab (NOT
);
4622 ffs_optab
= init_optab (FFS
);
4623 clz_optab
= init_optab (CLZ
);
4624 ctz_optab
= init_optab (CTZ
);
4625 popcount_optab
= init_optab (POPCOUNT
);
4626 parity_optab
= init_optab (PARITY
);
4627 sqrt_optab
= init_optab (SQRT
);
4628 floor_optab
= init_optab (UNKNOWN
);
4629 ceil_optab
= init_optab (UNKNOWN
);
4630 round_optab
= init_optab (UNKNOWN
);
4631 btrunc_optab
= init_optab (UNKNOWN
);
4632 nearbyint_optab
= init_optab (UNKNOWN
);
4633 rint_optab
= init_optab (UNKNOWN
);
4634 sincos_optab
= init_optab (UNKNOWN
);
4635 sin_optab
= init_optab (UNKNOWN
);
4636 asin_optab
= init_optab (UNKNOWN
);
4637 cos_optab
= init_optab (UNKNOWN
);
4638 acos_optab
= init_optab (UNKNOWN
);
4639 exp_optab
= init_optab (UNKNOWN
);
4640 exp10_optab
= init_optab (UNKNOWN
);
4641 exp2_optab
= init_optab (UNKNOWN
);
4642 expm1_optab
= init_optab (UNKNOWN
);
4643 logb_optab
= init_optab (UNKNOWN
);
4644 ilogb_optab
= init_optab (UNKNOWN
);
4645 log_optab
= init_optab (UNKNOWN
);
4646 log10_optab
= init_optab (UNKNOWN
);
4647 log2_optab
= init_optab (UNKNOWN
);
4648 log1p_optab
= init_optab (UNKNOWN
);
4649 tan_optab
= init_optab (UNKNOWN
);
4650 atan_optab
= init_optab (UNKNOWN
);
4651 strlen_optab
= init_optab (UNKNOWN
);
4652 cbranch_optab
= init_optab (UNKNOWN
);
4653 cmov_optab
= init_optab (UNKNOWN
);
4654 cstore_optab
= init_optab (UNKNOWN
);
4655 push_optab
= init_optab (UNKNOWN
);
4657 vec_extract_optab
= init_optab (UNKNOWN
);
4658 vec_set_optab
= init_optab (UNKNOWN
);
4659 vec_init_optab
= init_optab (UNKNOWN
);
4661 sext_optab
= init_convert_optab (SIGN_EXTEND
);
4662 zext_optab
= init_convert_optab (ZERO_EXTEND
);
4663 trunc_optab
= init_convert_optab (TRUNCATE
);
4664 sfix_optab
= init_convert_optab (FIX
);
4665 ufix_optab
= init_convert_optab (UNSIGNED_FIX
);
4666 sfixtrunc_optab
= init_convert_optab (UNKNOWN
);
4667 ufixtrunc_optab
= init_convert_optab (UNKNOWN
);
4668 sfloat_optab
= init_convert_optab (FLOAT
);
4669 ufloat_optab
= init_convert_optab (UNSIGNED_FLOAT
);
4671 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4673 movmem_optab
[i
] = CODE_FOR_nothing
;
4674 clrmem_optab
[i
] = CODE_FOR_nothing
;
4675 cmpstr_optab
[i
] = CODE_FOR_nothing
;
4676 cmpmem_optab
[i
] = CODE_FOR_nothing
;
4678 #ifdef HAVE_SECONDARY_RELOADS
4679 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4683 /* Fill in the optabs with the insns we support. */
4686 /* Initialize the optabs with the names of the library functions. */
4687 init_integral_libfuncs (add_optab
, "add", '3');
4688 init_floating_libfuncs (add_optab
, "add", '3');
4689 init_integral_libfuncs (addv_optab
, "addv", '3');
4690 init_floating_libfuncs (addv_optab
, "add", '3');
4691 init_integral_libfuncs (sub_optab
, "sub", '3');
4692 init_floating_libfuncs (sub_optab
, "sub", '3');
4693 init_integral_libfuncs (subv_optab
, "subv", '3');
4694 init_floating_libfuncs (subv_optab
, "sub", '3');
4695 init_integral_libfuncs (smul_optab
, "mul", '3');
4696 init_floating_libfuncs (smul_optab
, "mul", '3');
4697 init_integral_libfuncs (smulv_optab
, "mulv", '3');
4698 init_floating_libfuncs (smulv_optab
, "mul", '3');
4699 init_integral_libfuncs (sdiv_optab
, "div", '3');
4700 init_floating_libfuncs (sdiv_optab
, "div", '3');
4701 init_integral_libfuncs (sdivv_optab
, "divv", '3');
4702 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4703 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4704 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4705 init_integral_libfuncs (smod_optab
, "mod", '3');
4706 init_integral_libfuncs (umod_optab
, "umod", '3');
4707 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4708 init_integral_libfuncs (and_optab
, "and", '3');
4709 init_integral_libfuncs (ior_optab
, "ior", '3');
4710 init_integral_libfuncs (xor_optab
, "xor", '3');
4711 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4712 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4713 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4714 init_integral_libfuncs (smin_optab
, "min", '3');
4715 init_floating_libfuncs (smin_optab
, "min", '3');
4716 init_integral_libfuncs (smax_optab
, "max", '3');
4717 init_floating_libfuncs (smax_optab
, "max", '3');
4718 init_integral_libfuncs (umin_optab
, "umin", '3');
4719 init_integral_libfuncs (umax_optab
, "umax", '3');
4720 init_integral_libfuncs (neg_optab
, "neg", '2');
4721 init_floating_libfuncs (neg_optab
, "neg", '2');
4722 init_integral_libfuncs (negv_optab
, "negv", '2');
4723 init_floating_libfuncs (negv_optab
, "neg", '2');
4724 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4725 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4726 init_integral_libfuncs (clz_optab
, "clz", '2');
4727 init_integral_libfuncs (ctz_optab
, "ctz", '2');
4728 init_integral_libfuncs (popcount_optab
, "popcount", '2');
4729 init_integral_libfuncs (parity_optab
, "parity", '2');
4731 /* Comparison libcalls for integers MUST come in pairs,
4733 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4734 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4735 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4737 /* EQ etc are floating point only. */
4738 init_floating_libfuncs (eq_optab
, "eq", '2');
4739 init_floating_libfuncs (ne_optab
, "ne", '2');
4740 init_floating_libfuncs (gt_optab
, "gt", '2');
4741 init_floating_libfuncs (ge_optab
, "ge", '2');
4742 init_floating_libfuncs (lt_optab
, "lt", '2');
4743 init_floating_libfuncs (le_optab
, "le", '2');
4744 init_floating_libfuncs (unord_optab
, "unord", '2');
4747 init_interclass_conv_libfuncs (sfloat_optab
, "float",
4748 MODE_INT
, MODE_FLOAT
);
4749 init_interclass_conv_libfuncs (sfix_optab
, "fix",
4750 MODE_FLOAT
, MODE_INT
);
4751 init_interclass_conv_libfuncs (ufix_optab
, "fixuns",
4752 MODE_FLOAT
, MODE_INT
);
4754 /* sext_optab is also used for FLOAT_EXTEND. */
4755 init_intraclass_conv_libfuncs (sext_optab
, "extend", MODE_FLOAT
, true);
4756 init_intraclass_conv_libfuncs (trunc_optab
, "trunc", MODE_FLOAT
, false);
4758 /* Use cabs for double complex abs, since systems generally have cabs.
4759 Don't define any libcall for float complex, so that cabs will be used. */
4760 if (complex_double_type_node
)
4761 abs_optab
->handlers
[TYPE_MODE (complex_double_type_node
)].libfunc
4762 = init_one_libfunc ("cabs");
4764 /* The ffs function operates on `int'. */
4765 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
4766 = init_one_libfunc ("ffs");
4768 abort_libfunc
= init_one_libfunc ("abort");
4769 memcpy_libfunc
= init_one_libfunc ("memcpy");
4770 memmove_libfunc
= init_one_libfunc ("memmove");
4771 memcmp_libfunc
= init_one_libfunc ("memcmp");
4772 memset_libfunc
= init_one_libfunc ("memset");
4773 setbits_libfunc
= init_one_libfunc ("__setbits");
4775 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
4776 ? "_Unwind_SjLj_Resume"
4777 : "_Unwind_Resume");
4778 #ifndef DONT_USE_BUILTIN_SETJMP
4779 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
4780 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
4782 setjmp_libfunc
= init_one_libfunc ("setjmp");
4783 longjmp_libfunc
= init_one_libfunc ("longjmp");
4785 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
4786 unwind_sjlj_unregister_libfunc
4787 = init_one_libfunc ("_Unwind_SjLj_Unregister");
4789 /* For function entry/exit instrumentation. */
4790 profile_function_entry_libfunc
4791 = init_one_libfunc ("__cyg_profile_func_enter");
4792 profile_function_exit_libfunc
4793 = init_one_libfunc ("__cyg_profile_func_exit");
4795 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
4797 if (HAVE_conditional_trap
)
4798 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
4800 /* Allow the target to add more libcalls or rename some, etc. */
4801 targetm
.init_libfuncs ();
4806 /* Print information about the current contents of the optabs on
4810 debug_optab_libfuncs (void)
4816 /* Dump the arithmetic optabs. */
4817 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
4818 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
4821 struct optab_handlers
*h
;
4824 h
= &o
->handlers
[j
];
4827 if (GET_CODE (h
->libfunc
) != SYMBOL_REF
)
4829 fprintf (stderr
, "%s\t%s:\t%s\n",
4830 GET_RTX_NAME (o
->code
),
4832 XSTR (h
->libfunc
, 0));
4836 /* Dump the conversion optabs. */
4837 for (i
= 0; i
< (int) CTI_MAX
; ++i
)
4838 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
4839 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
4842 struct optab_handlers
*h
;
4844 o
= &convert_optab_table
[i
];
4845 h
= &o
->handlers
[j
][k
];
4848 if (GET_CODE (h
->libfunc
) != SYMBOL_REF
)
4850 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
4851 GET_RTX_NAME (o
->code
),
4854 XSTR (h
->libfunc
, 0));
4862 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4863 CODE. Return 0 on failure. */
4866 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED
, rtx op1
,
4867 rtx op2 ATTRIBUTE_UNUSED
, rtx tcode ATTRIBUTE_UNUSED
)
4869 enum machine_mode mode
= GET_MODE (op1
);
4870 enum insn_code icode
;
4873 if (!HAVE_conditional_trap
)
4876 if (mode
== VOIDmode
)
4879 icode
= cmp_optab
->handlers
[(int) mode
].insn_code
;
4880 if (icode
== CODE_FOR_nothing
)
4884 op1
= prepare_operand (icode
, op1
, 0, mode
, mode
, 0);
4885 op2
= prepare_operand (icode
, op2
, 1, mode
, mode
, 0);
4891 emit_insn (GEN_FCN (icode
) (op1
, op2
));
4893 PUT_CODE (trap_rtx
, code
);
4894 insn
= gen_conditional_trap (trap_rtx
, tcode
);
4898 insn
= get_insns ();
4905 #include "gt-optabs.h"