1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Bitflags used by final_scan_insn. */
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn
;
121 rtx current_output_insn
;
123 /* Line number of last NOTE. */
124 static int last_linenum
;
126 /* Highest line number in current block. */
127 static int high_block_linenum
;
129 /* Likewise for function. */
130 static int high_function_linenum
;
132 /* Filename of last NOTE. */
133 static const char *last_filename
;
135 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands
;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands
;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare
= 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter
= 0;
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status
;
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed
;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth
;
194 /* Nonzero if have enabled APP processing of our assembler output. */
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
203 /* True if we are outputting insns in a delay slot. This is used
204 to prettify the assembly. */
205 static bool output_in_slot
;
207 #ifdef ASSEMBLER_DIALECT
209 /* Number of the assembler dialect to use, starting at 0. */
210 static int dialect_number
;
213 #ifdef HAVE_conditional_execution
214 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
215 rtx current_insn_predicate
;
218 #ifdef HAVE_ATTR_length
219 static int asm_insn_count (rtx
);
221 static void profile_function (FILE *);
222 static void profile_after_prologue (FILE *);
223 static bool notice_source_line (rtx
);
224 static rtx
walk_alter_subreg (rtx
*);
225 static void output_asm_name (void);
226 static void output_alternate_entry_point (FILE *, rtx
);
227 static tree
get_mem_expr_from_op (rtx
, int *);
228 static void output_asm_operand_names (rtx
*, int *, int);
229 static void output_operand (rtx
, int);
230 #ifdef LEAF_REGISTERS
231 static void leaf_renumber_regs (rtx
);
234 static int alter_cond (rtx
);
236 #ifndef ADDR_VEC_ALIGN
237 static int final_addr_vec_align (rtx
);
239 #ifdef HAVE_ATTR_length
240 static int align_fuzz (rtx
, rtx
, int, unsigned);
243 /* Initialize data in final at the beginning of a compilation. */
246 init_final (const char *filename ATTRIBUTE_UNUSED
)
251 #ifdef ASSEMBLER_DIALECT
252 dialect_number
= ASSEMBLER_DIALECT
;
256 /* Default target function prologue and epilogue assembler output.
258 If not overridden for epilogue code, then the function body itself
259 contains return instructions wherever needed. */
261 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
262 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
266 /* Default target hook that outputs nothing to a stream. */
268 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
272 /* Enable APP processing of subsequent output.
273 Used before the output from an `asm' statement. */
280 fputs (ASM_APP_ON
, asm_out_file
);
285 /* Disable APP processing of subsequent output.
286 Called from varasm.c before most kinds of output. */
293 fputs (ASM_APP_OFF
, asm_out_file
);
298 /* Return the number of slots filled in the current
299 delayed branch sequence (we don't count the insn needing the
300 delay slot). Zero if not in a delayed branch sequence. */
304 dbr_sequence_length (void)
306 if (final_sequence
!= 0)
307 return XVECLEN (final_sequence
, 0) - 1;
313 /* The next two pages contain routines used to compute the length of an insn
314 and to shorten branches. */
316 /* Arrays for insn lengths, and addresses. The latter is referenced by
317 `insn_current_length'. */
319 static int *insn_lengths
;
321 varray_type insn_addresses_
;
323 /* Max uid for which the above arrays are valid. */
324 static int insn_lengths_max_uid
;
326 /* Address of insn being processed. Used by `insn_current_length'. */
327 int insn_current_address
;
329 /* Address of insn being processed in previous iteration. */
330 int insn_last_address
;
332 /* known invariant alignment of insn being processed. */
333 int insn_current_align
;
335 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
336 gives the next following alignment insn that increases the known
337 alignment, or NULL_RTX if there is no such insn.
338 For any alignment obtained this way, we can again index uid_align with
339 its uid to obtain the next following align that in turn increases the
340 alignment, till we reach NULL_RTX; the sequence obtained this way
341 for each insn we'll call the alignment chain of this insn in the following
344 struct label_alignment
350 static rtx
*uid_align
;
351 static int *uid_shuid
;
352 static struct label_alignment
*label_align
;
354 /* Indicate that branch shortening hasn't yet been done. */
357 init_insn_lengths (void)
368 insn_lengths_max_uid
= 0;
370 #ifdef HAVE_ATTR_length
371 INSN_ADDRESSES_FREE ();
380 /* Obtain the current length of an insn. If branch shortening has been done,
381 get its actual length. Otherwise, get its maximum length. */
384 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
386 #ifdef HAVE_ATTR_length
391 if (insn_lengths_max_uid
> INSN_UID (insn
))
392 return insn_lengths
[INSN_UID (insn
)];
394 switch (GET_CODE (insn
))
402 length
= insn_default_length (insn
);
406 body
= PATTERN (insn
);
407 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
409 /* Alignment is machine-dependent and should be handled by
413 length
= insn_default_length (insn
);
417 body
= PATTERN (insn
);
418 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
421 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
422 length
= asm_insn_count (body
) * insn_default_length (insn
);
423 else if (GET_CODE (body
) == SEQUENCE
)
424 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
425 length
+= get_attr_length (XVECEXP (body
, 0, i
));
427 length
= insn_default_length (insn
);
434 #ifdef ADJUST_INSN_LENGTH
435 ADJUST_INSN_LENGTH (insn
, length
);
438 #else /* not HAVE_ATTR_length */
440 #endif /* not HAVE_ATTR_length */
443 /* Code to handle alignment inside shorten_branches. */
445 /* Here is an explanation how the algorithm in align_fuzz can give
448 Call a sequence of instructions beginning with alignment point X
449 and continuing until the next alignment point `block X'. When `X'
450 is used in an expression, it means the alignment value of the
453 Call the distance between the start of the first insn of block X, and
454 the end of the last insn of block X `IX', for the `inner size of X'.
455 This is clearly the sum of the instruction lengths.
457 Likewise with the next alignment-delimited block following X, which we
460 Call the distance between the start of the first insn of block X, and
461 the start of the first insn of block Y `OX', for the `outer size of X'.
463 The estimated padding is then OX - IX.
465 OX can be safely estimated as
470 OX = round_up(IX, X) + Y - X
472 Clearly est(IX) >= real(IX), because that only depends on the
473 instruction lengths, and those being overestimated is a given.
475 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
476 we needn't worry about that when thinking about OX.
478 When X >= Y, the alignment provided by Y adds no uncertainty factor
479 for branch ranges starting before X, so we can just round what we have.
480 But when X < Y, we don't know anything about the, so to speak,
481 `middle bits', so we have to assume the worst when aligning up from an
482 address mod X to one mod Y, which is Y - X. */
485 #define LABEL_ALIGN(LABEL) align_labels_log
488 #ifndef LABEL_ALIGN_MAX_SKIP
489 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
493 #define LOOP_ALIGN(LABEL) align_loops_log
496 #ifndef LOOP_ALIGN_MAX_SKIP
497 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
500 #ifndef LABEL_ALIGN_AFTER_BARRIER
501 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
504 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
505 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
509 #define JUMP_ALIGN(LABEL) align_jumps_log
512 #ifndef JUMP_ALIGN_MAX_SKIP
513 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
516 #ifndef ADDR_VEC_ALIGN
518 final_addr_vec_align (rtx addr_vec
)
520 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
522 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
523 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
524 return exact_log2 (align
);
528 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
531 #ifndef INSN_LENGTH_ALIGNMENT
532 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
535 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
537 static int min_labelno
, max_labelno
;
539 #define LABEL_TO_ALIGNMENT(LABEL) \
540 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
542 #define LABEL_TO_MAX_SKIP(LABEL) \
543 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
545 /* For the benefit of port specific code do this also as a function. */
548 label_to_alignment (rtx label
)
550 return LABEL_TO_ALIGNMENT (label
);
553 #ifdef HAVE_ATTR_length
554 /* The differences in addresses
555 between a branch and its target might grow or shrink depending on
556 the alignment the start insn of the range (the branch for a forward
557 branch or the label for a backward branch) starts out on; if these
558 differences are used naively, they can even oscillate infinitely.
559 We therefore want to compute a 'worst case' address difference that
560 is independent of the alignment the start insn of the range end
561 up on, and that is at least as large as the actual difference.
562 The function align_fuzz calculates the amount we have to add to the
563 naively computed difference, by traversing the part of the alignment
564 chain of the start insn of the range that is in front of the end insn
565 of the range, and considering for each alignment the maximum amount
566 that it might contribute to a size increase.
568 For casesi tables, we also want to know worst case minimum amounts of
569 address difference, in case a machine description wants to introduce
570 some common offset that is added to all offsets in a table.
571 For this purpose, align_fuzz with a growth argument of 0 computes the
572 appropriate adjustment. */
574 /* Compute the maximum delta by which the difference of the addresses of
575 START and END might grow / shrink due to a different address for start
576 which changes the size of alignment insns between START and END.
577 KNOWN_ALIGN_LOG is the alignment known for START.
578 GROWTH should be ~0 if the objective is to compute potential code size
579 increase, and 0 if the objective is to compute potential shrink.
580 The return value is undefined for any other value of GROWTH. */
583 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
585 int uid
= INSN_UID (start
);
587 int known_align
= 1 << known_align_log
;
588 int end_shuid
= INSN_SHUID (end
);
591 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
593 int align_addr
, new_align
;
595 uid
= INSN_UID (align_label
);
596 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
597 if (uid_shuid
[uid
] > end_shuid
)
599 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
600 new_align
= 1 << known_align_log
;
601 if (new_align
< known_align
)
603 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
604 known_align
= new_align
;
609 /* Compute a worst-case reference address of a branch so that it
610 can be safely used in the presence of aligned labels. Since the
611 size of the branch itself is unknown, the size of the branch is
612 not included in the range. I.e. for a forward branch, the reference
613 address is the end address of the branch as known from the previous
614 branch shortening pass, minus a value to account for possible size
615 increase due to alignment. For a backward branch, it is the start
616 address of the branch as known from the current pass, plus a value
617 to account for possible size increase due to alignment.
618 NB.: Therefore, the maximum offset allowed for backward branches needs
619 to exclude the branch size. */
622 insn_current_reference_address (rtx branch
)
627 if (! INSN_ADDRESSES_SET_P ())
630 seq
= NEXT_INSN (PREV_INSN (branch
));
631 seq_uid
= INSN_UID (seq
);
632 if (!JUMP_P (branch
))
633 /* This can happen for example on the PA; the objective is to know the
634 offset to address something in front of the start of the function.
635 Thus, we can treat it like a backward branch.
636 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
637 any alignment we'd encounter, so we skip the call to align_fuzz. */
638 return insn_current_address
;
639 dest
= JUMP_LABEL (branch
);
641 /* BRANCH has no proper alignment chain set, so use SEQ.
642 BRANCH also has no INSN_SHUID. */
643 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
645 /* Forward branch. */
646 return (insn_last_address
+ insn_lengths
[seq_uid
]
647 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
651 /* Backward branch. */
652 return (insn_current_address
653 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
656 #endif /* HAVE_ATTR_length */
659 compute_alignments (void)
661 int log
, max_skip
, max_log
;
670 max_labelno
= max_label_num ();
671 min_labelno
= get_first_label_num ();
672 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
673 sizeof (struct label_alignment
));
675 /* If not optimizing or optimizing for size, don't assign any alignments. */
676 if (! optimize
|| optimize_size
)
681 rtx label
= BB_HEAD (bb
);
682 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
686 || probably_never_executed_bb_p (bb
))
688 max_log
= LABEL_ALIGN (label
);
689 max_skip
= LABEL_ALIGN_MAX_SKIP
;
691 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
693 if (e
->flags
& EDGE_FALLTHRU
)
694 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
696 branch_frequency
+= EDGE_FREQUENCY (e
);
699 /* There are two purposes to align block with no fallthru incoming edge:
700 1) to avoid fetch stalls when branch destination is near cache boundary
701 2) to improve cache efficiency in case the previous block is not executed
702 (so it does not need to be in the cache).
704 We to catch first case, we align frequently executed blocks.
705 To catch the second, we align blocks that are executed more frequently
706 than the predecessor and the predecessor is likely to not be executed
707 when function is called. */
710 && (branch_frequency
> BB_FREQ_MAX
/ 10
711 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
712 && (bb
->prev_bb
->frequency
713 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
715 log
= JUMP_ALIGN (label
);
719 max_skip
= JUMP_ALIGN_MAX_SKIP
;
722 /* In case block is frequent and reached mostly by non-fallthru edge,
723 align it. It is most likely a first block of loop. */
725 && maybe_hot_bb_p (bb
)
726 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
727 && branch_frequency
> fallthru_frequency
* 2)
729 log
= LOOP_ALIGN (label
);
733 max_skip
= LOOP_ALIGN_MAX_SKIP
;
736 LABEL_TO_ALIGNMENT (label
) = max_log
;
737 LABEL_TO_MAX_SKIP (label
) = max_skip
;
741 /* Make a pass over all insns and compute their actual lengths by shortening
742 any branches of variable length if possible. */
744 /* shorten_branches might be called multiple times: for example, the SH
745 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
746 In order to do this, it needs proper length information, which it obtains
747 by calling shorten_branches. This cannot be collapsed with
748 shorten_branches itself into a single pass unless we also want to integrate
749 reorg.c, since the branch splitting exposes new instructions with delay
753 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
760 #ifdef HAVE_ATTR_length
761 #define MAX_CODE_ALIGN 16
763 int something_changed
= 1;
764 char *varying_length
;
767 rtx align_tab
[MAX_CODE_ALIGN
];
771 /* Compute maximum UID and allocate label_align / uid_shuid. */
772 max_uid
= get_max_uid ();
774 /* Free uid_shuid before reallocating it. */
777 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
779 if (max_labelno
!= max_label_num ())
781 int old
= max_labelno
;
785 max_labelno
= max_label_num ();
787 n_labels
= max_labelno
- min_labelno
+ 1;
788 n_old_labels
= old
- min_labelno
+ 1;
790 label_align
= xrealloc (label_align
,
791 n_labels
* sizeof (struct label_alignment
));
793 /* Range of labels grows monotonically in the function. Abort here
794 means that the initialization of array got lost. */
795 if (n_old_labels
> n_labels
)
798 memset (label_align
+ n_old_labels
, 0,
799 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
802 /* Initialize label_align and set up uid_shuid to be strictly
803 monotonically rising with insn order. */
804 /* We use max_log here to keep track of the maximum alignment we want to
805 impose on the next CODE_LABEL (or the current one if we are processing
806 the CODE_LABEL itself). */
811 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
815 INSN_SHUID (insn
) = i
++;
818 /* reorg might make the first insn of a loop being run once only,
819 and delete the label in front of it. Then we want to apply
820 the loop alignment to the new label created by reorg, which
821 is separated by the former loop start insn from the
822 NOTE_INSN_LOOP_BEG. */
824 else if (LABEL_P (insn
))
828 /* Merge in alignments computed by compute_alignments. */
829 log
= LABEL_TO_ALIGNMENT (insn
);
833 max_skip
= LABEL_TO_MAX_SKIP (insn
);
836 log
= LABEL_ALIGN (insn
);
840 max_skip
= LABEL_ALIGN_MAX_SKIP
;
842 next
= NEXT_INSN (insn
);
843 /* ADDR_VECs only take room if read-only data goes into the text
845 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
846 if (next
&& JUMP_P (next
))
848 rtx nextbody
= PATTERN (next
);
849 if (GET_CODE (nextbody
) == ADDR_VEC
850 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
852 log
= ADDR_VEC_ALIGN (next
);
856 max_skip
= LABEL_ALIGN_MAX_SKIP
;
860 LABEL_TO_ALIGNMENT (insn
) = max_log
;
861 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
865 else if (BARRIER_P (insn
))
869 for (label
= insn
; label
&& ! INSN_P (label
);
870 label
= NEXT_INSN (label
))
873 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
877 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
883 #ifdef HAVE_ATTR_length
885 /* Allocate the rest of the arrays. */
886 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
887 insn_lengths_max_uid
= max_uid
;
888 /* Syntax errors can lead to labels being outside of the main insn stream.
889 Initialize insn_addresses, so that we get reproducible results. */
890 INSN_ADDRESSES_ALLOC (max_uid
);
892 varying_length
= xcalloc (max_uid
, sizeof (char));
894 /* Initialize uid_align. We scan instructions
895 from end to start, and keep in align_tab[n] the last seen insn
896 that does an alignment of at least n+1, i.e. the successor
897 in the alignment chain for an insn that does / has a known
899 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
901 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
902 align_tab
[i
] = NULL_RTX
;
903 seq
= get_last_insn ();
904 for (; seq
; seq
= PREV_INSN (seq
))
906 int uid
= INSN_UID (seq
);
908 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
909 uid_align
[uid
] = align_tab
[0];
912 /* Found an alignment label. */
913 uid_align
[uid
] = align_tab
[log
];
914 for (i
= log
- 1; i
>= 0; i
--)
918 #ifdef CASE_VECTOR_SHORTEN_MODE
921 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
924 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
925 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
928 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
930 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
931 int len
, i
, min
, max
, insn_shuid
;
933 addr_diff_vec_flags flags
;
936 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
938 pat
= PATTERN (insn
);
939 len
= XVECLEN (pat
, 1);
942 min_align
= MAX_CODE_ALIGN
;
943 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
945 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
946 int shuid
= INSN_SHUID (lab
);
957 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
958 min_align
= LABEL_TO_ALIGNMENT (lab
);
960 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
961 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
962 insn_shuid
= INSN_SHUID (insn
);
963 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
964 flags
.min_align
= min_align
;
965 flags
.base_after_vec
= rel
> insn_shuid
;
966 flags
.min_after_vec
= min
> insn_shuid
;
967 flags
.max_after_vec
= max
> insn_shuid
;
968 flags
.min_after_base
= min
> rel
;
969 flags
.max_after_base
= max
> rel
;
970 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
973 #endif /* CASE_VECTOR_SHORTEN_MODE */
975 /* Compute initial lengths, addresses, and varying flags for each insn. */
976 for (insn_current_address
= 0, insn
= first
;
978 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
980 uid
= INSN_UID (insn
);
982 insn_lengths
[uid
] = 0;
986 int log
= LABEL_TO_ALIGNMENT (insn
);
989 int align
= 1 << log
;
990 int new_address
= (insn_current_address
+ align
- 1) & -align
;
991 insn_lengths
[uid
] = new_address
- insn_current_address
;
995 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
997 if (NOTE_P (insn
) || BARRIER_P (insn
)
1000 if (INSN_DELETED_P (insn
))
1003 body
= PATTERN (insn
);
1004 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1006 /* This only takes room if read-only data goes into the text
1008 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1009 insn_lengths
[uid
] = (XVECLEN (body
,
1010 GET_CODE (body
) == ADDR_DIFF_VEC
)
1011 * GET_MODE_SIZE (GET_MODE (body
)));
1012 /* Alignment is handled by ADDR_VEC_ALIGN. */
1014 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1015 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1016 else if (GET_CODE (body
) == SEQUENCE
)
1019 int const_delay_slots
;
1021 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1023 const_delay_slots
= 0;
1025 /* Inside a delay slot sequence, we do not do any branch shortening
1026 if the shortening could change the number of delay slots
1028 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1030 rtx inner_insn
= XVECEXP (body
, 0, i
);
1031 int inner_uid
= INSN_UID (inner_insn
);
1034 if (GET_CODE (body
) == ASM_INPUT
1035 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1036 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1037 * insn_default_length (inner_insn
));
1039 inner_length
= insn_default_length (inner_insn
);
1041 insn_lengths
[inner_uid
] = inner_length
;
1042 if (const_delay_slots
)
1044 if ((varying_length
[inner_uid
]
1045 = insn_variable_length_p (inner_insn
)) != 0)
1046 varying_length
[uid
] = 1;
1047 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1048 + insn_lengths
[uid
]);
1051 varying_length
[inner_uid
] = 0;
1052 insn_lengths
[uid
] += inner_length
;
1055 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1057 insn_lengths
[uid
] = insn_default_length (insn
);
1058 varying_length
[uid
] = insn_variable_length_p (insn
);
1061 /* If needed, do any adjustment. */
1062 #ifdef ADJUST_INSN_LENGTH
1063 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1064 if (insn_lengths
[uid
] < 0)
1065 fatal_insn ("negative insn length", insn
);
1069 /* Now loop over all the insns finding varying length insns. For each,
1070 get the current insn length. If it has changed, reflect the change.
1071 When nothing changes for a full pass, we are done. */
1073 while (something_changed
)
1075 something_changed
= 0;
1076 insn_current_align
= MAX_CODE_ALIGN
- 1;
1077 for (insn_current_address
= 0, insn
= first
;
1079 insn
= NEXT_INSN (insn
))
1082 #ifdef ADJUST_INSN_LENGTH
1087 uid
= INSN_UID (insn
);
1091 int log
= LABEL_TO_ALIGNMENT (insn
);
1092 if (log
> insn_current_align
)
1094 int align
= 1 << log
;
1095 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1096 insn_lengths
[uid
] = new_address
- insn_current_address
;
1097 insn_current_align
= log
;
1098 insn_current_address
= new_address
;
1101 insn_lengths
[uid
] = 0;
1102 INSN_ADDRESSES (uid
) = insn_current_address
;
1106 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1107 if (length_align
< insn_current_align
)
1108 insn_current_align
= length_align
;
1110 insn_last_address
= INSN_ADDRESSES (uid
);
1111 INSN_ADDRESSES (uid
) = insn_current_address
;
1113 #ifdef CASE_VECTOR_SHORTEN_MODE
1114 if (optimize
&& JUMP_P (insn
)
1115 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1117 rtx body
= PATTERN (insn
);
1118 int old_length
= insn_lengths
[uid
];
1119 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1120 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1121 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1122 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1123 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1124 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1127 addr_diff_vec_flags flags
;
1129 /* Avoid automatic aggregate initialization. */
1130 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1132 /* Try to find a known alignment for rel_lab. */
1133 for (prev
= rel_lab
;
1135 && ! insn_lengths
[INSN_UID (prev
)]
1136 && ! (varying_length
[INSN_UID (prev
)] & 1);
1137 prev
= PREV_INSN (prev
))
1138 if (varying_length
[INSN_UID (prev
)] & 2)
1140 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1144 /* See the comment on addr_diff_vec_flags in rtl.h for the
1145 meaning of the flags values. base: REL_LAB vec: INSN */
1146 /* Anything after INSN has still addresses from the last
1147 pass; adjust these so that they reflect our current
1148 estimate for this pass. */
1149 if (flags
.base_after_vec
)
1150 rel_addr
+= insn_current_address
- insn_last_address
;
1151 if (flags
.min_after_vec
)
1152 min_addr
+= insn_current_address
- insn_last_address
;
1153 if (flags
.max_after_vec
)
1154 max_addr
+= insn_current_address
- insn_last_address
;
1155 /* We want to know the worst case, i.e. lowest possible value
1156 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1157 its offset is positive, and we have to be wary of code shrink;
1158 otherwise, it is negative, and we have to be vary of code
1160 if (flags
.min_after_base
)
1162 /* If INSN is between REL_LAB and MIN_LAB, the size
1163 changes we are about to make can change the alignment
1164 within the observed offset, therefore we have to break
1165 it up into two parts that are independent. */
1166 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1168 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1169 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1172 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1176 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1178 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1179 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1182 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1184 /* Likewise, determine the highest lowest possible value
1185 for the offset of MAX_LAB. */
1186 if (flags
.max_after_base
)
1188 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1190 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1191 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1194 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1198 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1200 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1201 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1204 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1206 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1207 max_addr
- rel_addr
,
1209 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1212 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1213 insn_current_address
+= insn_lengths
[uid
];
1214 if (insn_lengths
[uid
] != old_length
)
1215 something_changed
= 1;
1220 #endif /* CASE_VECTOR_SHORTEN_MODE */
1222 if (! (varying_length
[uid
]))
1224 if (NONJUMP_INSN_P (insn
)
1225 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1229 body
= PATTERN (insn
);
1230 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1232 rtx inner_insn
= XVECEXP (body
, 0, i
);
1233 int inner_uid
= INSN_UID (inner_insn
);
1235 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1237 insn_current_address
+= insn_lengths
[inner_uid
];
1241 insn_current_address
+= insn_lengths
[uid
];
1246 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1250 body
= PATTERN (insn
);
1252 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1254 rtx inner_insn
= XVECEXP (body
, 0, i
);
1255 int inner_uid
= INSN_UID (inner_insn
);
1258 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1260 /* insn_current_length returns 0 for insns with a
1261 non-varying length. */
1262 if (! varying_length
[inner_uid
])
1263 inner_length
= insn_lengths
[inner_uid
];
1265 inner_length
= insn_current_length (inner_insn
);
1267 if (inner_length
!= insn_lengths
[inner_uid
])
1269 insn_lengths
[inner_uid
] = inner_length
;
1270 something_changed
= 1;
1272 insn_current_address
+= insn_lengths
[inner_uid
];
1273 new_length
+= inner_length
;
1278 new_length
= insn_current_length (insn
);
1279 insn_current_address
+= new_length
;
1282 #ifdef ADJUST_INSN_LENGTH
1283 /* If needed, do any adjustment. */
1284 tmp_length
= new_length
;
1285 ADJUST_INSN_LENGTH (insn
, new_length
);
1286 insn_current_address
+= (new_length
- tmp_length
);
1289 if (new_length
!= insn_lengths
[uid
])
1291 insn_lengths
[uid
] = new_length
;
1292 something_changed
= 1;
1295 /* For a non-optimizing compile, do only a single pass. */
1300 free (varying_length
);
1302 #endif /* HAVE_ATTR_length */
1305 #ifdef HAVE_ATTR_length
1306 /* Given the body of an INSN known to be generated by an ASM statement, return
1307 the number of machine instructions likely to be generated for this insn.
1308 This is used to compute its length. */
1311 asm_insn_count (rtx body
)
1313 const char *template;
1316 if (GET_CODE (body
) == ASM_INPUT
)
1317 template = XSTR (body
, 0);
1319 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1321 for (; *template; template++)
1322 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1329 /* Output assembler code for the start of a function,
1330 and initialize some of the variables in this file
1331 for the new function. The label for the function and associated
1332 assembler pseudo-ops have already been output in `assemble_start_function'.
1334 FIRST is the first insn of the rtl for the function being compiled.
1335 FILE is the file to write assembler code to.
1336 OPTIMIZE is nonzero if we should eliminate redundant
1337 test and compare insns. */
1340 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1341 int optimize ATTRIBUTE_UNUSED
)
1345 this_is_asm_operands
= 0;
1347 last_filename
= locator_file (prologue_locator
);
1348 last_linenum
= locator_line (prologue_locator
);
1350 high_block_linenum
= high_function_linenum
= last_linenum
;
1352 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1354 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1355 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1356 dwarf2out_begin_prologue (0, NULL
);
1359 #ifdef LEAF_REG_REMAP
1360 if (current_function_uses_only_leaf_regs
)
1361 leaf_renumber_regs (first
);
1364 /* The Sun386i and perhaps other machines don't work right
1365 if the profiling code comes after the prologue. */
1366 #ifdef PROFILE_BEFORE_PROLOGUE
1367 if (current_function_profile
)
1368 profile_function (file
);
1369 #endif /* PROFILE_BEFORE_PROLOGUE */
1371 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1372 if (dwarf2out_do_frame ())
1373 dwarf2out_frame_debug (NULL_RTX
);
1376 /* If debugging, assign block numbers to all of the blocks in this
1380 remove_unnecessary_notes ();
1381 reemit_insn_block_notes ();
1382 number_blocks (current_function_decl
);
1383 /* We never actually put out begin/end notes for the top-level
1384 block in the function. But, conceptually, that block is
1386 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1389 /* First output the function prologue: code to set up the stack frame. */
1390 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1392 /* If the machine represents the prologue as RTL, the profiling code must
1393 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1394 #ifdef HAVE_prologue
1395 if (! HAVE_prologue
)
1397 profile_after_prologue (file
);
1401 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1403 #ifndef PROFILE_BEFORE_PROLOGUE
1404 if (current_function_profile
)
1405 profile_function (file
);
1406 #endif /* not PROFILE_BEFORE_PROLOGUE */
1410 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1412 #ifndef NO_PROFILE_COUNTERS
1413 # define NO_PROFILE_COUNTERS 0
1415 #if defined(ASM_OUTPUT_REG_PUSH)
1416 int sval
= current_function_returns_struct
;
1417 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1418 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1419 int cxt
= cfun
->static_chain_decl
!= NULL
;
1421 #endif /* ASM_OUTPUT_REG_PUSH */
1423 if (! NO_PROFILE_COUNTERS
)
1425 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1427 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1428 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1429 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1432 function_section (current_function_decl
);
1434 #if defined(ASM_OUTPUT_REG_PUSH)
1435 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1436 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1439 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1441 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1443 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1446 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1451 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1453 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1455 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1457 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1460 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1465 #if defined(ASM_OUTPUT_REG_PUSH)
1466 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1467 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1471 /* Output assembler code for the end of a function.
1472 For clarity, args are same as those of `final_start_function'
1473 even though not all of them are needed. */
1476 final_end_function (void)
1480 (*debug_hooks
->end_function
) (high_function_linenum
);
1482 /* Finally, output the function epilogue:
1483 code to restore the stack frame and return to the caller. */
1484 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1486 /* And debug output. */
1487 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1489 #if defined (DWARF2_UNWIND_INFO)
1490 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1491 && dwarf2out_do_frame ())
1492 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1496 /* Output assembler code for some insns: all or part of a function.
1497 For description of args, see `final_start_function', above.
1499 PRESCAN is 1 if we are not really outputting,
1500 just scanning as if we were outputting.
1501 Prescanning deletes and rearranges insns just like ordinary output.
1502 PRESCAN is -2 if we are outputting after having prescanned.
1503 In this case, don't try to delete or rearrange insns
1504 because that has already been done.
1505 Prescanning is done only on certain machines. */
1508 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1514 last_ignored_compare
= 0;
1516 #ifdef SDB_DEBUGGING_INFO
1517 /* When producing SDB debugging info, delete troublesome line number
1518 notes from inlined functions in other files as well as duplicate
1519 line number notes. */
1520 if (write_symbols
== SDB_DEBUG
)
1523 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1524 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1527 #ifdef USE_MAPPED_LOCATION
1528 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1530 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1531 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1535 delete_insn (insn
); /* Use delete_note. */
1543 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1545 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1546 max_uid
= INSN_UID (insn
);
1548 /* If CC tracking across branches is enabled, record the insn which
1549 jumps to each branch only reached from one place. */
1550 if (optimize
&& JUMP_P (insn
))
1552 rtx lab
= JUMP_LABEL (insn
);
1553 if (lab
&& LABEL_NUSES (lab
) == 1)
1555 LABEL_REFS (lab
) = insn
;
1565 /* Output the insns. */
1566 for (insn
= NEXT_INSN (first
); insn
;)
1568 #ifdef HAVE_ATTR_length
1569 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1571 /* This can be triggered by bugs elsewhere in the compiler if
1572 new insns are created after init_insn_lengths is called. */
1574 insn_current_address
= -1;
1579 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1580 #endif /* HAVE_ATTR_length */
1582 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0, &seen
);
1587 get_insn_template (int code
, rtx insn
)
1589 switch (insn_data
[code
].output_format
)
1591 case INSN_OUTPUT_FORMAT_SINGLE
:
1592 return insn_data
[code
].output
.single
;
1593 case INSN_OUTPUT_FORMAT_MULTI
:
1594 return insn_data
[code
].output
.multi
[which_alternative
];
1595 case INSN_OUTPUT_FORMAT_FUNCTION
:
1598 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1605 /* Emit the appropriate declaration for an alternate-entry-point
1606 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1607 LABEL_KIND != LABEL_NORMAL.
1609 The case fall-through in this function is intentional. */
1611 output_alternate_entry_point (FILE *file
, rtx insn
)
1613 const char *name
= LABEL_NAME (insn
);
1615 switch (LABEL_KIND (insn
))
1617 case LABEL_WEAK_ENTRY
:
1618 #ifdef ASM_WEAKEN_LABEL
1619 ASM_WEAKEN_LABEL (file
, name
);
1621 case LABEL_GLOBAL_ENTRY
:
1622 targetm
.asm_out
.globalize_label (file
, name
);
1623 case LABEL_STATIC_ENTRY
:
1624 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1625 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1627 ASM_OUTPUT_LABEL (file
, name
);
1636 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1637 note in the instruction chain (going forward) between the current
1638 instruction, and the next 'executable' instruction. */
1641 scan_ahead_for_unlikely_executed_note (rtx insn
)
1644 int bb_note_count
= 0;
1646 for (temp
= insn
; temp
; temp
= NEXT_INSN (temp
))
1649 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_UNLIKELY_EXECUTED_CODE
)
1652 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_BASIC_BLOCK
)
1655 if (bb_note_count
> 1)
1665 /* The final scan for one insn, INSN.
1666 Args are same as in `final', except that INSN
1667 is the insn being scanned.
1668 Value returned is the next insn to be scanned.
1670 NOPEEPHOLES is used to disallow peephole processing:
1671 - 0: peepholes are allowed,
1672 - 1: peepholes are not allowed,
1673 - 2: peepholes are not allowed and we are in the
1674 slot of a delayed branch.
1676 SEEN is used to track the end of the prologue, for emitting
1677 debug information. We force the emission of a line note after
1678 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1679 at the beginning of the second basic block, whichever comes
1683 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1684 int prescan
, int nopeepholes
, int *seen
)
1692 /* Ignore deleted insns. These can occur when we split insns (due to a
1693 template of "#") while not optimizing. */
1694 if (INSN_DELETED_P (insn
))
1695 return NEXT_INSN (insn
);
1697 switch (GET_CODE (insn
))
1703 switch (NOTE_LINE_NUMBER (insn
))
1705 case NOTE_INSN_DELETED
:
1706 case NOTE_INSN_LOOP_BEG
:
1707 case NOTE_INSN_LOOP_END
:
1708 case NOTE_INSN_FUNCTION_END
:
1709 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1710 case NOTE_INSN_EXPECTED_VALUE
:
1713 case NOTE_INSN_UNLIKELY_EXECUTED_CODE
:
1715 /* The presence of this note indicates that this basic block
1716 belongs in the "cold" section of the .o file. If we are
1717 not already writing to the cold section we need to change
1720 unlikely_text_section ();
1723 case NOTE_INSN_BASIC_BLOCK
:
1725 /* If we are performing the optimization that partitions
1726 basic blocks into hot & cold sections of the .o file,
1727 then at the start of each new basic block, before
1728 beginning to write code for the basic block, we need to
1729 check to see whether the basic block belongs in the hot
1730 or cold section of the .o file, and change the section we
1731 are writing to appropriately. */
1733 if (flag_reorder_blocks_and_partition
1734 && !scan_ahead_for_unlikely_executed_note (insn
))
1735 function_section (current_function_decl
);
1737 #ifdef TARGET_UNWIND_INFO
1738 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1742 fprintf (asm_out_file
, "\t%s basic block %d\n",
1743 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1745 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1747 *seen
|= SEEN_EMITTED
;
1748 last_filename
= NULL
;
1755 case NOTE_INSN_EH_REGION_BEG
:
1756 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1757 NOTE_EH_HANDLER (insn
));
1760 case NOTE_INSN_EH_REGION_END
:
1761 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1762 NOTE_EH_HANDLER (insn
));
1765 case NOTE_INSN_PROLOGUE_END
:
1766 targetm
.asm_out
.function_end_prologue (file
);
1767 profile_after_prologue (file
);
1769 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1771 *seen
|= SEEN_EMITTED
;
1772 last_filename
= NULL
;
1779 case NOTE_INSN_EPILOGUE_BEG
:
1780 targetm
.asm_out
.function_begin_epilogue (file
);
1783 case NOTE_INSN_FUNCTION_BEG
:
1785 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1787 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1789 *seen
|= SEEN_EMITTED
;
1790 last_filename
= NULL
;
1797 case NOTE_INSN_BLOCK_BEG
:
1798 if (debug_info_level
== DINFO_LEVEL_NORMAL
1799 || debug_info_level
== DINFO_LEVEL_VERBOSE
1800 || write_symbols
== DWARF2_DEBUG
1801 || write_symbols
== VMS_AND_DWARF2_DEBUG
1802 || write_symbols
== VMS_DEBUG
)
1804 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1808 high_block_linenum
= last_linenum
;
1810 /* Output debugging info about the symbol-block beginning. */
1811 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1813 /* Mark this block as output. */
1814 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1818 case NOTE_INSN_BLOCK_END
:
1819 if (debug_info_level
== DINFO_LEVEL_NORMAL
1820 || debug_info_level
== DINFO_LEVEL_VERBOSE
1821 || write_symbols
== DWARF2_DEBUG
1822 || write_symbols
== VMS_AND_DWARF2_DEBUG
1823 || write_symbols
== VMS_DEBUG
)
1825 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1829 /* End of a symbol-block. */
1831 if (block_depth
< 0)
1834 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1838 case NOTE_INSN_DELETED_LABEL
:
1839 /* Emit the label. We may have deleted the CODE_LABEL because
1840 the label could be proved to be unreachable, though still
1841 referenced (in the form of having its address taken. */
1842 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1845 case NOTE_INSN_VAR_LOCATION
:
1846 (*debug_hooks
->var_location
) (insn
);
1853 if (NOTE_LINE_NUMBER (insn
) <= 0)
1860 #if defined (DWARF2_UNWIND_INFO)
1861 if (dwarf2out_do_frame ())
1862 dwarf2out_frame_debug (insn
);
1867 /* The target port might emit labels in the output function for
1868 some insn, e.g. sh.c output_branchy_insn. */
1869 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1871 int align
= LABEL_TO_ALIGNMENT (insn
);
1872 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1873 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1876 if (align
&& NEXT_INSN (insn
))
1878 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1879 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1881 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1882 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1884 ASM_OUTPUT_ALIGN (file
, align
);
1891 /* If this label is reached from only one place, set the condition
1892 codes from the instruction just before the branch. */
1894 /* Disabled because some insns set cc_status in the C output code
1895 and NOTICE_UPDATE_CC alone can set incorrect status. */
1896 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1898 rtx jump
= LABEL_REFS (insn
);
1899 rtx barrier
= prev_nonnote_insn (insn
);
1901 /* If the LABEL_REFS field of this label has been set to point
1902 at a branch, the predecessor of the branch is a regular
1903 insn, and that branch is the only way to reach this label,
1904 set the condition codes based on the branch and its
1906 if (barrier
&& BARRIER_P (barrier
)
1907 && jump
&& JUMP_P (jump
)
1908 && (prev
= prev_nonnote_insn (jump
))
1909 && NONJUMP_INSN_P (prev
))
1911 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1912 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1919 if (LABEL_NAME (insn
))
1920 (*debug_hooks
->label
) (insn
);
1922 /* If we are doing the optimization that partitions hot & cold
1923 basic blocks into separate sections of the .o file, we need
1924 to ensure the jump table ends up in the correct section... */
1926 if (flag_reorder_blocks_and_partition
1927 && targetm
.have_named_sections
)
1929 rtx tmp_table
, tmp_label
;
1931 && tablejump_p (NEXT_INSN (insn
), &tmp_label
, &tmp_table
))
1933 /* Do nothing; Do NOT change the current section. */
1935 else if (scan_ahead_for_unlikely_executed_note (insn
))
1936 unlikely_text_section ();
1937 else if (in_unlikely_text_section ())
1938 function_section (current_function_decl
);
1943 fputs (ASM_APP_OFF
, file
);
1946 if (NEXT_INSN (insn
) != 0
1947 && JUMP_P (NEXT_INSN (insn
)))
1949 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1951 /* If this label is followed by a jump-table,
1952 make sure we put the label in the read-only section. Also
1953 possibly write the label and jump table together. */
1955 if (GET_CODE (nextbody
) == ADDR_VEC
1956 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1958 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1959 /* In this case, the case vector is being moved by the
1960 target, so don't output the label at all. Leave that
1961 to the back end macros. */
1963 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1967 targetm
.asm_out
.function_rodata_section (current_function_decl
);
1969 #ifdef ADDR_VEC_ALIGN
1970 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1972 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1974 ASM_OUTPUT_ALIGN (file
, log_align
);
1977 function_section (current_function_decl
);
1979 #ifdef ASM_OUTPUT_CASE_LABEL
1980 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1983 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1989 if (LABEL_ALT_ENTRY_P (insn
))
1990 output_alternate_entry_point (file
, insn
);
1992 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1997 rtx body
= PATTERN (insn
);
1998 int insn_code_number
;
1999 const char *template;
2001 /* An INSN, JUMP_INSN or CALL_INSN.
2002 First check for special kinds that recog doesn't recognize. */
2004 if (GET_CODE (body
) == USE
/* These are just declarations. */
2005 || GET_CODE (body
) == CLOBBER
)
2010 /* If there is a REG_CC_SETTER note on this insn, it means that
2011 the setting of the condition code was done in the delay slot
2012 of the insn that branched here. So recover the cc status
2013 from the insn that set it. */
2015 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2018 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2019 cc_prev_status
= cc_status
;
2024 /* Detect insns that are really jump-tables
2025 and output them as such. */
2027 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2029 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2038 fputs (ASM_APP_OFF
, file
);
2042 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2043 if (GET_CODE (body
) == ADDR_VEC
)
2045 #ifdef ASM_OUTPUT_ADDR_VEC
2046 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2053 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2054 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2060 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2061 for (idx
= 0; idx
< vlen
; idx
++)
2063 if (GET_CODE (body
) == ADDR_VEC
)
2065 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2066 ASM_OUTPUT_ADDR_VEC_ELT
2067 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2074 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2075 ASM_OUTPUT_ADDR_DIFF_ELT
2078 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2079 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2085 #ifdef ASM_OUTPUT_CASE_END
2086 ASM_OUTPUT_CASE_END (file
,
2087 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2092 function_section (current_function_decl
);
2096 /* Output this line note if it is the first or the last line
2098 if (notice_source_line (insn
))
2100 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2103 if (GET_CODE (body
) == ASM_INPUT
)
2105 const char *string
= XSTR (body
, 0);
2107 /* There's no telling what that did to the condition codes. */
2116 fputs (ASM_APP_ON
, file
);
2119 fprintf (asm_out_file
, "\t%s\n", string
);
2124 /* Detect `asm' construct with operands. */
2125 if (asm_noperands (body
) >= 0)
2127 unsigned int noperands
= asm_noperands (body
);
2128 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2131 /* There's no telling what that did to the condition codes. */
2136 /* Get out the operand values. */
2137 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2138 /* Inhibit aborts on what would otherwise be compiler bugs. */
2139 insn_noperands
= noperands
;
2140 this_is_asm_operands
= insn
;
2142 #ifdef FINAL_PRESCAN_INSN
2143 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2146 /* Output the insn using them. */
2151 fputs (ASM_APP_ON
, file
);
2154 output_asm_insn (string
, ops
);
2157 this_is_asm_operands
= 0;
2161 if (prescan
<= 0 && app_on
)
2163 fputs (ASM_APP_OFF
, file
);
2167 if (GET_CODE (body
) == SEQUENCE
)
2169 /* A delayed-branch sequence */
2175 final_sequence
= body
;
2177 /* Record the delay slots' frame information before the branch.
2178 This is needed for delayed calls: see execute_cfa_program(). */
2179 #if defined (DWARF2_UNWIND_INFO)
2180 if (dwarf2out_do_frame ())
2181 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2182 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2185 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2186 force the restoration of a comparison that was previously
2187 thought unnecessary. If that happens, cancel this sequence
2188 and cause that insn to be restored. */
2190 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1, seen
);
2191 if (next
!= XVECEXP (body
, 0, 1))
2197 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2199 rtx insn
= XVECEXP (body
, 0, i
);
2200 rtx next
= NEXT_INSN (insn
);
2201 /* We loop in case any instruction in a delay slot gets
2204 insn
= final_scan_insn (insn
, file
, 0, prescan
, 2, seen
);
2205 while (insn
!= next
);
2207 #ifdef DBR_OUTPUT_SEQEND
2208 DBR_OUTPUT_SEQEND (file
);
2212 /* If the insn requiring the delay slot was a CALL_INSN, the
2213 insns in the delay slot are actually executed before the
2214 called function. Hence we don't preserve any CC-setting
2215 actions in these insns and the CC must be marked as being
2216 clobbered by the function. */
2217 if (CALL_P (XVECEXP (body
, 0, 0)))
2224 /* We have a real machine instruction as rtl. */
2226 body
= PATTERN (insn
);
2229 set
= single_set (insn
);
2231 /* Check for redundant test and compare instructions
2232 (when the condition codes are already set up as desired).
2233 This is done only when optimizing; if not optimizing,
2234 it should be possible for the user to alter a variable
2235 with the debugger in between statements
2236 and the next statement should reexamine the variable
2237 to compute the condition codes. */
2242 && GET_CODE (SET_DEST (set
)) == CC0
2243 && insn
!= last_ignored_compare
)
2245 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2246 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2247 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2249 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2250 XEXP (SET_SRC (set
), 0)
2251 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2252 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2253 XEXP (SET_SRC (set
), 1)
2254 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2256 if ((cc_status
.value1
!= 0
2257 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2258 || (cc_status
.value2
!= 0
2259 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2261 /* Don't delete insn if it has an addressing side-effect. */
2262 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2263 /* or if anything in it is volatile. */
2264 && ! volatile_refs_p (PATTERN (insn
)))
2266 /* We don't really delete the insn; just ignore it. */
2267 last_ignored_compare
= insn
;
2276 /* Don't bother outputting obvious no-ops, even without -O.
2277 This optimization is fast and doesn't interfere with debugging.
2278 Don't do this if the insn is in a delay slot, since this
2279 will cause an improper number of delay insns to be written. */
2280 if (final_sequence
== 0
2282 && NONJUMP_INSN_P (insn
) && GET_CODE (body
) == SET
2283 && REG_P (SET_SRC (body
))
2284 && REG_P (SET_DEST (body
))
2285 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2290 /* If this is a conditional branch, maybe modify it
2291 if the cc's are in a nonstandard state
2292 so that it accomplishes the same thing that it would
2293 do straightforwardly if the cc's were set up normally. */
2295 if (cc_status
.flags
!= 0
2297 && GET_CODE (body
) == SET
2298 && SET_DEST (body
) == pc_rtx
2299 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2300 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2301 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2302 /* This is done during prescan; it is not done again
2303 in final scan when prescan has been done. */
2306 /* This function may alter the contents of its argument
2307 and clear some of the cc_status.flags bits.
2308 It may also return 1 meaning condition now always true
2309 or -1 meaning condition now always false
2310 or 2 meaning condition nontrivial but altered. */
2311 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2312 /* If condition now has fixed value, replace the IF_THEN_ELSE
2313 with its then-operand or its else-operand. */
2315 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2317 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2319 /* The jump is now either unconditional or a no-op.
2320 If it has become a no-op, don't try to output it.
2321 (It would not be recognized.) */
2322 if (SET_SRC (body
) == pc_rtx
)
2327 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2328 /* Replace (set (pc) (return)) with (return). */
2329 PATTERN (insn
) = body
= SET_SRC (body
);
2331 /* Rerecognize the instruction if it has changed. */
2333 INSN_CODE (insn
) = -1;
2336 /* Make same adjustments to instructions that examine the
2337 condition codes without jumping and instructions that
2338 handle conditional moves (if this machine has either one). */
2340 if (cc_status
.flags
!= 0
2343 rtx cond_rtx
, then_rtx
, else_rtx
;
2346 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2348 cond_rtx
= XEXP (SET_SRC (set
), 0);
2349 then_rtx
= XEXP (SET_SRC (set
), 1);
2350 else_rtx
= XEXP (SET_SRC (set
), 2);
2354 cond_rtx
= SET_SRC (set
);
2355 then_rtx
= const_true_rtx
;
2356 else_rtx
= const0_rtx
;
2359 switch (GET_CODE (cond_rtx
))
2373 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2375 result
= alter_cond (cond_rtx
);
2377 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2378 else if (result
== -1)
2379 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2380 else if (result
== 2)
2381 INSN_CODE (insn
) = -1;
2382 if (SET_DEST (set
) == SET_SRC (set
))
2394 #ifdef HAVE_peephole
2395 /* Do machine-specific peephole optimizations if desired. */
2397 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2399 rtx next
= peephole (insn
);
2400 /* When peepholing, if there were notes within the peephole,
2401 emit them before the peephole. */
2402 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2404 rtx note
, prev
= PREV_INSN (insn
);
2406 for (note
= NEXT_INSN (insn
); note
!= next
;
2407 note
= NEXT_INSN (note
))
2408 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
, seen
);
2410 /* In case this is prescan, put the notes
2411 in proper position for later rescan. */
2412 note
= NEXT_INSN (insn
);
2413 PREV_INSN (note
) = prev
;
2414 NEXT_INSN (prev
) = note
;
2415 NEXT_INSN (PREV_INSN (next
)) = insn
;
2416 PREV_INSN (insn
) = PREV_INSN (next
);
2417 NEXT_INSN (insn
) = next
;
2418 PREV_INSN (next
) = insn
;
2421 /* PEEPHOLE might have changed this. */
2422 body
= PATTERN (insn
);
2426 /* Try to recognize the instruction.
2427 If successful, verify that the operands satisfy the
2428 constraints for the instruction. Crash if they don't,
2429 since `reload' should have changed them so that they do. */
2431 insn_code_number
= recog_memoized (insn
);
2432 cleanup_subreg_operands (insn
);
2434 /* Dump the insn in the assembly for debugging. */
2435 if (flag_dump_rtl_in_asm
)
2437 print_rtx_head
= ASM_COMMENT_START
;
2438 print_rtl_single (asm_out_file
, insn
);
2439 print_rtx_head
= "";
2442 if (! constrain_operands_cached (1))
2443 fatal_insn_not_found (insn
);
2445 /* Some target machines need to prescan each insn before
2448 #ifdef FINAL_PRESCAN_INSN
2449 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2452 #ifdef HAVE_conditional_execution
2453 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2454 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2456 current_insn_predicate
= NULL_RTX
;
2460 cc_prev_status
= cc_status
;
2462 /* Update `cc_status' for this instruction.
2463 The instruction's output routine may change it further.
2464 If the output routine for a jump insn needs to depend
2465 on the cc status, it should look at cc_prev_status. */
2467 NOTICE_UPDATE_CC (body
, insn
);
2470 current_output_insn
= debug_insn
= insn
;
2472 #if defined (DWARF2_UNWIND_INFO)
2473 if (CALL_P (insn
) && dwarf2out_do_frame ())
2474 dwarf2out_frame_debug (insn
);
2477 /* Find the proper template for this insn. */
2478 template = get_insn_template (insn_code_number
, insn
);
2480 /* If the C code returns 0, it means that it is a jump insn
2481 which follows a deleted test insn, and that test insn
2482 needs to be reinserted. */
2487 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2490 /* We have already processed the notes between the setter and
2491 the user. Make sure we don't process them again, this is
2492 particularly important if one of the notes is a block
2493 scope note or an EH note. */
2495 prev
!= last_ignored_compare
;
2496 prev
= PREV_INSN (prev
))
2499 delete_insn (prev
); /* Use delete_note. */
2505 /* If the template is the string "#", it means that this insn must
2507 if (template[0] == '#' && template[1] == '\0')
2509 rtx
new = try_split (body
, insn
, 0);
2511 /* If we didn't split the insn, go away. */
2512 if (new == insn
&& PATTERN (new) == body
)
2513 fatal_insn ("could not split insn", insn
);
2515 #ifdef HAVE_ATTR_length
2516 /* This instruction should have been split in shorten_branches,
2517 to ensure that we would have valid length info for the
2528 #ifdef TARGET_UNWIND_INFO
2529 /* ??? This will put the directives in the wrong place if
2530 get_insn_template outputs assembly directly. However calling it
2531 before get_insn_template breaks if the insns is split. */
2532 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2535 /* Output assembler code from the template. */
2536 output_in_slot
= (nopeepholes
> 1);
2537 output_asm_insn (template, recog_data
.operand
);
2538 output_in_slot
= false;
2540 /* If necessary, report the effect that the instruction has on
2541 the unwind info. We've already done this for delay slots
2542 and call instructions. */
2543 #if defined (DWARF2_UNWIND_INFO)
2544 if (NONJUMP_INSN_P (insn
)
2545 #if !defined (HAVE_prologue)
2546 && !ACCUMULATE_OUTGOING_ARGS
2548 && final_sequence
== 0
2549 && dwarf2out_do_frame ())
2550 dwarf2out_frame_debug (insn
);
2553 current_output_insn
= debug_insn
= 0;
2556 return NEXT_INSN (insn
);
2559 /* Output debugging info to the assembler file FILE
2560 based on the NOTE-insn INSN, assumed to be a line number. */
2563 notice_source_line (rtx insn
)
2565 const char *filename
= insn_file (insn
);
2566 int linenum
= insn_line (insn
);
2568 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2570 last_filename
= filename
;
2571 last_linenum
= linenum
;
2572 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2573 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2579 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2580 directly to the desired hard register. */
2583 cleanup_subreg_operands (rtx insn
)
2586 extract_insn_cached (insn
);
2587 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2589 /* The following test cannot use recog_data.operand when testing
2590 for a SUBREG: the underlying object might have been changed
2591 already if we are inside a match_operator expression that
2592 matches the else clause. Instead we test the underlying
2593 expression directly. */
2594 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2595 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2596 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2597 || GET_CODE (recog_data
.operand
[i
]) == MULT
2598 || MEM_P (recog_data
.operand
[i
]))
2599 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2602 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2604 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2605 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2606 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2607 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2608 || MEM_P (*recog_data
.dup_loc
[i
]))
2609 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2613 /* If X is a SUBREG, replace it with a REG or a MEM,
2614 based on the thing it is a subreg of. */
2617 alter_subreg (rtx
*xp
)
2620 rtx y
= SUBREG_REG (x
);
2622 /* simplify_subreg does not remove subreg from volatile references.
2623 We are required to. */
2625 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2628 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2633 /* Simplify_subreg can't handle some REG cases, but we have to. */
2636 unsigned int regno
= subreg_hard_regno (x
, 1);
2637 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2646 /* Do alter_subreg on all the SUBREGs contained in X. */
2649 walk_alter_subreg (rtx
*xp
)
2652 switch (GET_CODE (x
))
2657 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2658 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2663 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2667 return alter_subreg (xp
);
2678 /* Given BODY, the body of a jump instruction, alter the jump condition
2679 as required by the bits that are set in cc_status.flags.
2680 Not all of the bits there can be handled at this level in all cases.
2682 The value is normally 0.
2683 1 means that the condition has become always true.
2684 -1 means that the condition has become always false.
2685 2 means that COND has been altered. */
2688 alter_cond (rtx cond
)
2692 if (cc_status
.flags
& CC_REVERSED
)
2695 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2698 if (cc_status
.flags
& CC_INVERTED
)
2701 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2704 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2705 switch (GET_CODE (cond
))
2710 /* Jump becomes unconditional. */
2716 /* Jump becomes no-op. */
2720 PUT_CODE (cond
, EQ
);
2725 PUT_CODE (cond
, NE
);
2733 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2734 switch (GET_CODE (cond
))
2738 /* Jump becomes unconditional. */
2743 /* Jump becomes no-op. */
2748 PUT_CODE (cond
, EQ
);
2754 PUT_CODE (cond
, NE
);
2762 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2763 switch (GET_CODE (cond
))
2766 /* Jump becomes unconditional. */
2770 PUT_CODE (cond
, EQ
);
2775 PUT_CODE (cond
, NE
);
2780 /* Jump becomes no-op. */
2787 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2788 switch (GET_CODE (cond
))
2794 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2799 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2804 if (cc_status
.flags
& CC_NOT_SIGNED
)
2805 /* The flags are valid if signed condition operators are converted
2807 switch (GET_CODE (cond
))
2810 PUT_CODE (cond
, LEU
);
2815 PUT_CODE (cond
, LTU
);
2820 PUT_CODE (cond
, GTU
);
2825 PUT_CODE (cond
, GEU
);
2837 /* Report inconsistency between the assembler template and the operands.
2838 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2841 output_operand_lossage (const char *msgid
, ...)
2845 const char *pfx_str
;
2848 va_start (ap
, msgid
);
2850 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2851 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2852 vasprintf (&new_message
, fmt_string
, ap
);
2854 if (this_is_asm_operands
)
2855 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2857 internal_error ("%s", new_message
);
2864 /* Output of assembler code from a template, and its subroutines. */
2866 /* Annotate the assembly with a comment describing the pattern and
2867 alternative used. */
2870 output_asm_name (void)
2874 int num
= INSN_CODE (debug_insn
);
2875 fprintf (asm_out_file
, "\t%s %d\t%s",
2876 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2877 insn_data
[num
].name
);
2878 if (insn_data
[num
].n_alternatives
> 1)
2879 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2880 #ifdef HAVE_ATTR_length
2881 fprintf (asm_out_file
, "\t[length = %d]",
2882 get_attr_length (debug_insn
));
2884 /* Clear this so only the first assembler insn
2885 of any rtl insn will get the special comment for -dp. */
2890 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2891 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2892 corresponds to the address of the object and 0 if to the object. */
2895 get_mem_expr_from_op (rtx op
, int *paddressp
)
2903 return REG_EXPR (op
);
2904 else if (!MEM_P (op
))
2907 if (MEM_EXPR (op
) != 0)
2908 return MEM_EXPR (op
);
2910 /* Otherwise we have an address, so indicate it and look at the address. */
2914 /* First check if we have a decl for the address, then look at the right side
2915 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2916 But don't allow the address to itself be indirect. */
2917 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2919 else if (GET_CODE (op
) == PLUS
2920 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2923 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2924 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2927 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2928 return inner_addressp
? 0 : expr
;
2931 /* Output operand names for assembler instructions. OPERANDS is the
2932 operand vector, OPORDER is the order to write the operands, and NOPS
2933 is the number of operands to write. */
2936 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2941 for (i
= 0; i
< nops
; i
++)
2944 rtx op
= operands
[oporder
[i
]];
2945 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2947 fprintf (asm_out_file
, "%c%s",
2948 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2952 fprintf (asm_out_file
, "%s",
2953 addressp
? "*" : "");
2954 print_mem_expr (asm_out_file
, expr
);
2957 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2958 && ORIGINAL_REGNO (op
) != REGNO (op
))
2959 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2963 /* Output text from TEMPLATE to the assembler output file,
2964 obeying %-directions to substitute operands taken from
2965 the vector OPERANDS.
2967 %N (for N a digit) means print operand N in usual manner.
2968 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2969 and print the label name with no punctuation.
2970 %cN means require operand N to be a constant
2971 and print the constant expression with no punctuation.
2972 %aN means expect operand N to be a memory address
2973 (not a memory reference!) and print a reference
2975 %nN means expect operand N to be a constant
2976 and print a constant expression for minus the value
2977 of the operand, with no other punctuation. */
2980 output_asm_insn (const char *template, rtx
*operands
)
2984 #ifdef ASSEMBLER_DIALECT
2987 int oporder
[MAX_RECOG_OPERANDS
];
2988 char opoutput
[MAX_RECOG_OPERANDS
];
2991 /* An insn may return a null string template
2992 in a case where no assembler code is needed. */
2996 memset (opoutput
, 0, sizeof opoutput
);
2998 putc ('\t', asm_out_file
);
3000 putc (' ', asm_out_file
);
3002 #ifdef ASM_OUTPUT_OPCODE
3003 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3010 if (flag_verbose_asm
)
3011 output_asm_operand_names (operands
, oporder
, ops
);
3012 if (flag_print_asm_name
)
3016 memset (opoutput
, 0, sizeof opoutput
);
3018 putc (c
, asm_out_file
);
3019 #ifdef ASM_OUTPUT_OPCODE
3020 while ((c
= *p
) == '\t')
3022 putc (c
, asm_out_file
);
3025 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3029 #ifdef ASSEMBLER_DIALECT
3035 output_operand_lossage ("nested assembly dialect alternatives");
3039 /* If we want the first dialect, do nothing. Otherwise, skip
3040 DIALECT_NUMBER of strings ending with '|'. */
3041 for (i
= 0; i
< dialect_number
; i
++)
3043 while (*p
&& *p
!= '}' && *p
++ != '|')
3052 output_operand_lossage ("unterminated assembly dialect alternative");
3059 /* Skip to close brace. */
3064 output_operand_lossage ("unterminated assembly dialect alternative");
3068 while (*p
++ != '}');
3072 putc (c
, asm_out_file
);
3077 putc (c
, asm_out_file
);
3083 /* %% outputs a single %. */
3087 putc (c
, asm_out_file
);
3089 /* %= outputs a number which is unique to each insn in the entire
3090 compilation. This is useful for making local labels that are
3091 referred to more than once in a given insn. */
3095 fprintf (asm_out_file
, "%d", insn_counter
);
3097 /* % followed by a letter and some digits
3098 outputs an operand in a special way depending on the letter.
3099 Letters `acln' are implemented directly.
3100 Other letters are passed to `output_operand' so that
3101 the PRINT_OPERAND macro can define them. */
3102 else if (ISALPHA (*p
))
3108 output_operand_lossage ("operand number missing after %%-letter");
3109 else if (this_is_asm_operands
3110 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3111 output_operand_lossage ("operand number out of range");
3112 else if (letter
== 'l')
3113 output_asm_label (operands
[c
]);
3114 else if (letter
== 'a')
3115 output_address (operands
[c
]);
3116 else if (letter
== 'c')
3118 if (CONSTANT_ADDRESS_P (operands
[c
]))
3119 output_addr_const (asm_out_file
, operands
[c
]);
3121 output_operand (operands
[c
], 'c');
3123 else if (letter
== 'n')
3125 if (GET_CODE (operands
[c
]) == CONST_INT
)
3126 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3127 - INTVAL (operands
[c
]));
3130 putc ('-', asm_out_file
);
3131 output_addr_const (asm_out_file
, operands
[c
]);
3135 output_operand (operands
[c
], letter
);
3141 while (ISDIGIT (c
= *p
))
3144 /* % followed by a digit outputs an operand the default way. */
3145 else if (ISDIGIT (*p
))
3148 if (this_is_asm_operands
3149 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3150 output_operand_lossage ("operand number out of range");
3152 output_operand (operands
[c
], 0);
3158 while (ISDIGIT (c
= *p
))
3161 /* % followed by punctuation: output something for that
3162 punctuation character alone, with no operand.
3163 The PRINT_OPERAND macro decides what is actually done. */
3164 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3165 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3166 output_operand (NULL_RTX
, *p
++);
3169 output_operand_lossage ("invalid %%-code");
3173 putc (c
, asm_out_file
);
3176 /* Write out the variable names for operands, if we know them. */
3177 if (flag_verbose_asm
)
3178 output_asm_operand_names (operands
, oporder
, ops
);
3179 if (flag_print_asm_name
)
3182 putc ('\n', asm_out_file
);
3185 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3188 output_asm_label (rtx x
)
3192 if (GET_CODE (x
) == LABEL_REF
)
3196 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3197 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3199 output_operand_lossage ("`%%l' operand isn't a label");
3201 assemble_name (asm_out_file
, buf
);
3204 /* Print operand X using machine-dependent assembler syntax.
3205 The macro PRINT_OPERAND is defined just to control this function.
3206 CODE is a non-digit that preceded the operand-number in the % spec,
3207 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3208 between the % and the digits.
3209 When CODE is a non-letter, X is 0.
3211 The meanings of the letters are machine-dependent and controlled
3212 by PRINT_OPERAND. */
3215 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3217 if (x
&& GET_CODE (x
) == SUBREG
)
3218 x
= alter_subreg (&x
);
3220 /* If X is a pseudo-register, abort now rather than writing trash to the
3223 if (x
&& REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3226 PRINT_OPERAND (asm_out_file
, x
, code
);
3229 /* Print a memory reference operand for address X
3230 using machine-dependent assembler syntax.
3231 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3234 output_address (rtx x
)
3236 walk_alter_subreg (&x
);
3237 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3240 /* Print an integer constant expression in assembler syntax.
3241 Addition and subtraction are the only arithmetic
3242 that may appear in these expressions. */
3245 output_addr_const (FILE *file
, rtx x
)
3250 switch (GET_CODE (x
))
3257 if (SYMBOL_REF_DECL (x
))
3258 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3259 #ifdef ASM_OUTPUT_SYMBOL_REF
3260 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3262 assemble_name (file
, XSTR (x
, 0));
3270 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3271 #ifdef ASM_OUTPUT_LABEL_REF
3272 ASM_OUTPUT_LABEL_REF (file
, buf
);
3274 assemble_name (file
, buf
);
3279 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3283 /* This used to output parentheses around the expression,
3284 but that does not work on the 386 (either ATT or BSD assembler). */
3285 output_addr_const (file
, XEXP (x
, 0));
3289 if (GET_MODE (x
) == VOIDmode
)
3291 /* We can use %d if the number is one word and positive. */
3292 if (CONST_DOUBLE_HIGH (x
))
3293 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3294 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3295 else if (CONST_DOUBLE_LOW (x
) < 0)
3296 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3298 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3301 /* We can't handle floating point constants;
3302 PRINT_OPERAND must handle them. */
3303 output_operand_lossage ("floating constant misused");
3307 /* Some assemblers need integer constants to appear last (eg masm). */
3308 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3310 output_addr_const (file
, XEXP (x
, 1));
3311 if (INTVAL (XEXP (x
, 0)) >= 0)
3312 fprintf (file
, "+");
3313 output_addr_const (file
, XEXP (x
, 0));
3317 output_addr_const (file
, XEXP (x
, 0));
3318 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3319 || INTVAL (XEXP (x
, 1)) >= 0)
3320 fprintf (file
, "+");
3321 output_addr_const (file
, XEXP (x
, 1));
3326 /* Avoid outputting things like x-x or x+5-x,
3327 since some assemblers can't handle that. */
3328 x
= simplify_subtraction (x
);
3329 if (GET_CODE (x
) != MINUS
)
3332 output_addr_const (file
, XEXP (x
, 0));
3333 fprintf (file
, "-");
3334 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3335 || GET_CODE (XEXP (x
, 1)) == PC
3336 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3337 output_addr_const (file
, XEXP (x
, 1));
3340 fputs (targetm
.asm_out
.open_paren
, file
);
3341 output_addr_const (file
, XEXP (x
, 1));
3342 fputs (targetm
.asm_out
.close_paren
, file
);
3349 output_addr_const (file
, XEXP (x
, 0));
3353 #ifdef OUTPUT_ADDR_CONST_EXTRA
3354 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3359 output_operand_lossage ("invalid expression as operand");
3363 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3364 %R prints the value of REGISTER_PREFIX.
3365 %L prints the value of LOCAL_LABEL_PREFIX.
3366 %U prints the value of USER_LABEL_PREFIX.
3367 %I prints the value of IMMEDIATE_PREFIX.
3368 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3369 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3371 We handle alternate assembler dialects here, just like output_asm_insn. */
3374 asm_fprintf (FILE *file
, const char *p
, ...)
3380 va_start (argptr
, p
);
3387 #ifdef ASSEMBLER_DIALECT
3392 /* If we want the first dialect, do nothing. Otherwise, skip
3393 DIALECT_NUMBER of strings ending with '|'. */
3394 for (i
= 0; i
< dialect_number
; i
++)
3396 while (*p
&& *p
++ != '|')
3406 /* Skip to close brace. */
3407 while (*p
&& *p
++ != '}')
3418 while (strchr ("-+ #0", c
))
3423 while (ISDIGIT (c
) || c
== '.')
3434 case 'd': case 'i': case 'u':
3435 case 'x': case 'X': case 'o':
3439 fprintf (file
, buf
, va_arg (argptr
, int));
3443 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3444 'o' cases, but we do not check for those cases. It
3445 means that the value is a HOST_WIDE_INT, which may be
3446 either `long' or `long long'. */
3447 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3448 q
+= strlen (HOST_WIDE_INT_PRINT
);
3451 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3456 #ifdef HAVE_LONG_LONG
3462 fprintf (file
, buf
, va_arg (argptr
, long long));
3469 fprintf (file
, buf
, va_arg (argptr
, long));
3477 fprintf (file
, buf
, va_arg (argptr
, char *));
3481 #ifdef ASM_OUTPUT_OPCODE
3482 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3487 #ifdef REGISTER_PREFIX
3488 fprintf (file
, "%s", REGISTER_PREFIX
);
3493 #ifdef IMMEDIATE_PREFIX
3494 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3499 #ifdef LOCAL_LABEL_PREFIX
3500 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3505 fputs (user_label_prefix
, file
);
3508 #ifdef ASM_FPRINTF_EXTENSIONS
3509 /* Uppercase letters are reserved for general use by asm_fprintf
3510 and so are not available to target specific code. In order to
3511 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3512 they are defined here. As they get turned into real extensions
3513 to asm_fprintf they should be removed from this list. */
3514 case 'A': case 'B': case 'C': case 'D': case 'E':
3515 case 'F': case 'G': case 'H': case 'J': case 'K':
3516 case 'M': case 'N': case 'P': case 'Q': case 'S':
3517 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3520 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3533 /* Split up a CONST_DOUBLE or integer constant rtx
3534 into two rtx's for single words,
3535 storing in *FIRST the word that comes first in memory in the target
3536 and in *SECOND the other. */
3539 split_double (rtx value
, rtx
*first
, rtx
*second
)
3541 if (GET_CODE (value
) == CONST_INT
)
3543 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3545 /* In this case the CONST_INT holds both target words.
3546 Extract the bits from it into two word-sized pieces.
3547 Sign extend each half to HOST_WIDE_INT. */
3548 unsigned HOST_WIDE_INT low
, high
;
3549 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3551 /* Set sign_bit to the most significant bit of a word. */
3553 sign_bit
<<= BITS_PER_WORD
- 1;
3555 /* Set mask so that all bits of the word are set. We could
3556 have used 1 << BITS_PER_WORD instead of basing the
3557 calculation on sign_bit. However, on machines where
3558 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3559 compiler warning, even though the code would never be
3561 mask
= sign_bit
<< 1;
3564 /* Set sign_extend as any remaining bits. */
3565 sign_extend
= ~mask
;
3567 /* Pick the lower word and sign-extend it. */
3568 low
= INTVAL (value
);
3573 /* Pick the higher word, shifted to the least significant
3574 bits, and sign-extend it. */
3575 high
= INTVAL (value
);
3576 high
>>= BITS_PER_WORD
- 1;
3579 if (high
& sign_bit
)
3580 high
|= sign_extend
;
3582 /* Store the words in the target machine order. */
3583 if (WORDS_BIG_ENDIAN
)
3585 *first
= GEN_INT (high
);
3586 *second
= GEN_INT (low
);
3590 *first
= GEN_INT (low
);
3591 *second
= GEN_INT (high
);
3596 /* The rule for using CONST_INT for a wider mode
3597 is that we regard the value as signed.
3598 So sign-extend it. */
3599 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3600 if (WORDS_BIG_ENDIAN
)
3612 else if (GET_CODE (value
) != CONST_DOUBLE
)
3614 if (WORDS_BIG_ENDIAN
)
3616 *first
= const0_rtx
;
3622 *second
= const0_rtx
;
3625 else if (GET_MODE (value
) == VOIDmode
3626 /* This is the old way we did CONST_DOUBLE integers. */
3627 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3629 /* In an integer, the words are defined as most and least significant.
3630 So order them by the target's convention. */
3631 if (WORDS_BIG_ENDIAN
)
3633 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3634 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3638 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3639 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3646 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3648 /* Note, this converts the REAL_VALUE_TYPE to the target's
3649 format, splits up the floating point double and outputs
3650 exactly 32 bits of it into each of l[0] and l[1] --
3651 not necessarily BITS_PER_WORD bits. */
3652 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3654 /* If 32 bits is an entire word for the target, but not for the host,
3655 then sign-extend on the host so that the number will look the same
3656 way on the host that it would on the target. See for instance
3657 simplify_unary_operation. The #if is needed to avoid compiler
3660 #if HOST_BITS_PER_LONG > 32
3661 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3663 if (l
[0] & ((long) 1 << 31))
3664 l
[0] |= ((long) (-1) << 32);
3665 if (l
[1] & ((long) 1 << 31))
3666 l
[1] |= ((long) (-1) << 32);
3670 *first
= GEN_INT (l
[0]);
3671 *second
= GEN_INT (l
[1]);
3675 /* Return nonzero if this function has no function calls. */
3678 leaf_function_p (void)
3683 if (current_function_profile
|| profile_arc_flag
)
3686 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3689 && ! SIBLING_CALL_P (insn
))
3691 if (NONJUMP_INSN_P (insn
)
3692 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3693 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3694 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3697 for (link
= current_function_epilogue_delay_list
;
3699 link
= XEXP (link
, 1))
3701 insn
= XEXP (link
, 0);
3704 && ! SIBLING_CALL_P (insn
))
3706 if (NONJUMP_INSN_P (insn
)
3707 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3708 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3709 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3716 /* Return 1 if branch is a forward branch.
3717 Uses insn_shuid array, so it works only in the final pass. May be used by
3718 output templates to customary add branch prediction hints.
3721 final_forward_branch_p (rtx insn
)
3723 int insn_id
, label_id
;
3726 insn_id
= INSN_SHUID (insn
);
3727 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3728 /* We've hit some insns that does not have id information available. */
3729 if (!insn_id
|| !label_id
)
3731 return insn_id
< label_id
;
3734 /* On some machines, a function with no call insns
3735 can run faster if it doesn't create its own register window.
3736 When output, the leaf function should use only the "output"
3737 registers. Ordinarily, the function would be compiled to use
3738 the "input" registers to find its arguments; it is a candidate
3739 for leaf treatment if it uses only the "input" registers.
3740 Leaf function treatment means renumbering so the function
3741 uses the "output" registers instead. */
3743 #ifdef LEAF_REGISTERS
3745 /* Return 1 if this function uses only the registers that can be
3746 safely renumbered. */
3749 only_leaf_regs_used (void)
3752 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3754 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3755 if ((regs_ever_live
[i
] || global_regs
[i
])
3756 && ! permitted_reg_in_leaf_functions
[i
])
3759 if (current_function_uses_pic_offset_table
3760 && pic_offset_table_rtx
!= 0
3761 && REG_P (pic_offset_table_rtx
)
3762 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3768 /* Scan all instructions and renumber all registers into those
3769 available in leaf functions. */
3772 leaf_renumber_regs (rtx first
)
3776 /* Renumber only the actual patterns.
3777 The reg-notes can contain frame pointer refs,
3778 and renumbering them could crash, and should not be needed. */
3779 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3781 leaf_renumber_regs_insn (PATTERN (insn
));
3782 for (insn
= current_function_epilogue_delay_list
;
3784 insn
= XEXP (insn
, 1))
3785 if (INSN_P (XEXP (insn
, 0)))
3786 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3789 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3790 available in leaf functions. */
3793 leaf_renumber_regs_insn (rtx in_rtx
)
3796 const char *format_ptr
;
3801 /* Renumber all input-registers into output-registers.
3802 renumbered_regs would be 1 for an output-register;
3809 /* Don't renumber the same reg twice. */
3813 newreg
= REGNO (in_rtx
);
3814 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3815 to reach here as part of a REG_NOTE. */
3816 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3821 newreg
= LEAF_REG_REMAP (newreg
);
3824 regs_ever_live
[REGNO (in_rtx
)] = 0;
3825 regs_ever_live
[newreg
] = 1;
3826 REGNO (in_rtx
) = newreg
;
3830 if (INSN_P (in_rtx
))
3832 /* Inside a SEQUENCE, we find insns.
3833 Renumber just the patterns of these insns,
3834 just as we do for the top-level insns. */
3835 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3839 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3841 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3842 switch (*format_ptr
++)
3845 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3849 if (NULL
!= XVEC (in_rtx
, i
))
3851 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3852 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3872 /* When -gused is used, emit debug info for only used symbols. But in
3873 addition to the standard intercepted debug_hooks there are some direct
3874 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3875 Those routines may also be called from a higher level intercepted routine. So
3876 to prevent recording data for an inner call to one of these for an intercept,
3877 we maintain an intercept nesting counter (debug_nesting). We only save the
3878 intercepted arguments if the nesting is 1. */
3879 int debug_nesting
= 0;
3881 static tree
*symbol_queue
;
3882 int symbol_queue_index
= 0;
3883 static int symbol_queue_size
= 0;
3885 /* Generate the symbols for any queued up type symbols we encountered
3886 while generating the type info for some originally used symbol.
3887 This might generate additional entries in the queue. Only when
3888 the nesting depth goes to 0 is this routine called. */
3891 debug_flush_symbol_queue (void)
3895 /* Make sure that additionally queued items are not flushed
3900 for (i
= 0; i
< symbol_queue_index
; ++i
)
3902 /* If we pushed queued symbols then such symbols are must be
3903 output no matter what anyone else says. Specifically,
3904 we need to make sure dbxout_symbol() thinks the symbol was
3905 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3906 which may be set for outside reasons. */
3907 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3908 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3909 TREE_USED (symbol_queue
[i
]) = 1;
3910 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3912 #ifdef DBX_DEBUGGING_INFO
3913 dbxout_symbol (symbol_queue
[i
], 0);
3916 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3917 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3920 symbol_queue_index
= 0;
3924 /* Queue a type symbol needed as part of the definition of a decl
3925 symbol. These symbols are generated when debug_flush_symbol_queue()
3929 debug_queue_symbol (tree decl
)
3931 if (symbol_queue_index
>= symbol_queue_size
)
3933 symbol_queue_size
+= 10;
3934 symbol_queue
= xrealloc (symbol_queue
,
3935 symbol_queue_size
* sizeof (tree
));
3938 symbol_queue
[symbol_queue_index
++] = decl
;
3941 /* Free symbol queue. */
3943 debug_free_queue (void)
3947 free (symbol_queue
);
3948 symbol_queue
= NULL
;
3949 symbol_queue_size
= 0;