1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
87 All real quantity numbers are greater than or equal to `max_reg'.
88 If register N has not been assigned a quantity, reg_qty[N] will equal N.
90 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
91 entries should be referenced with an index below `max_reg'.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
205 /* One plus largest register number used in this function. */
209 /* One plus largest instruction UID used in this function at time of
212 static int max_insn_uid
;
214 /* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
219 /* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
224 /* Per-qty information tracking.
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
229 `mode' contains the machine mode of this quantity.
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
249 struct qty_table_elem
253 rtx comparison_const
;
255 unsigned int first_reg
, last_reg
;
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
259 ENUM_BITFIELD(machine_mode
) mode
: 8;
262 /* The table of all qtys, indexed by qty number. */
263 static struct qty_table_elem
*qty_table
;
266 /* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
275 static rtx prev_insn_cc0
;
276 static enum machine_mode prev_insn_cc0_mode
;
278 /* Previous actual insn. 0 if at first insn of basic block. */
280 static rtx prev_insn
;
283 /* Insn being scanned. */
285 static rtx this_insn
;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem
*reg_eqv_table
;
306 /* Next in hash chain. */
307 struct cse_reg_info
*hash_next
;
309 /* The next cse_reg_info structure in the free or used list. */
310 struct cse_reg_info
*next
;
315 /* The quantity number of the register's current contents. */
318 /* The number of times the register has been altered in the current
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
330 unsigned int subreg_ticked
;
333 /* A free list of cse_reg_info entries. */
334 static struct cse_reg_info
*cse_reg_info_free_list
;
336 /* A used list of cse_reg_info entries. */
337 static struct cse_reg_info
*cse_reg_info_used_list
;
338 static struct cse_reg_info
*cse_reg_info_used_list_end
;
340 /* A mapping from registers to cse_reg_info data structures. */
341 #define REGHASH_SHIFT 7
342 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
343 #define REGHASH_MASK (REGHASH_SIZE - 1)
344 static struct cse_reg_info
*reg_hash
[REGHASH_SIZE
];
346 #define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
349 /* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
351 static unsigned int cached_regno
;
352 static struct cse_reg_info
*cached_cse_reg_info
;
354 /* A HARD_REG_SET containing all the hard registers for which there is
355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
359 static HARD_REG_SET hard_regs_in_table
;
361 /* CUID of insn that starts the basic block currently being cse-processed. */
363 static int cse_basic_block_start
;
365 /* CUID of insn that ends the basic block currently being cse-processed. */
367 static int cse_basic_block_end
;
369 /* Vector mapping INSN_UIDs to cuids.
370 The cuids are like uids but increase monotonically always.
371 We use them to see whether a reg is used outside a given basic block. */
373 static int *uid_cuid
;
375 /* Highest UID in UID_CUID. */
378 /* Get the cuid of an insn. */
380 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
382 /* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
385 static int cse_altered
;
387 /* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
390 static int cse_jumps_altered
;
392 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
394 static int recorded_label_ref
;
396 /* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
400 static int do_not_record
;
402 #ifdef LOAD_EXTEND_OP
404 /* Scratch rtl used when looking for load-extended copy of a MEM. */
405 static rtx memory_extend_rtx
;
408 /* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
411 static int hash_arg_in_memory
;
413 /* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
443 The `cost' field stores the cost of this element's expression.
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
447 The `is_const' flag is set if the element is a constant (including
450 The `flag' field is used as a temporary during some search routines.
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
461 struct table_elt
*next_same_hash
;
462 struct table_elt
*prev_same_hash
;
463 struct table_elt
*next_same_value
;
464 struct table_elt
*prev_same_value
;
465 struct table_elt
*first_same_value
;
466 struct table_elt
*related_value
;
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode
) mode
: 8;
477 /* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
481 #define HASH_SIZE (1 << HASH_SHIFT)
482 #define HASH_MASK (HASH_SIZE - 1)
484 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
488 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
492 /* Like HASH, but without side-effects. */
493 #define SAFE_HASH(X, M) \
494 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
495 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
496 : safe_hash (X, M)) & HASH_MASK)
498 /* Determine whether register number N is considered a fixed register for the
499 purpose of approximating register costs.
500 It is desirable to replace other regs with fixed regs, to reduce need for
502 A reg wins if it is either the frame pointer or designated as fixed. */
503 #define FIXED_REGNO_P(N) \
504 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
505 || fixed_regs[N] || global_regs[N])
507 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
508 hard registers and pointers into the frame are the cheapest with a cost
509 of 0. Next come pseudos with a cost of one and other hard registers with
510 a cost of 2. Aside from these special cases, call `rtx_cost'. */
512 #define CHEAP_REGNO(N) \
513 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
514 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
515 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
516 || ((N) < FIRST_PSEUDO_REGISTER \
517 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
519 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
520 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
522 /* Get the info associated with register N. */
524 #define GET_CSE_REG_INFO(N) \
525 (((N) == cached_regno && cached_cse_reg_info) \
526 ? cached_cse_reg_info : get_cse_reg_info ((N)))
528 /* Get the number of times this register has been updated in this
531 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
533 /* Get the point at which REG was recorded in the table. */
535 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
537 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
540 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
542 /* Get the quantity number for REG. */
544 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
546 /* Determine if the quantity number for register X represents a valid index
547 into the qty_table. */
549 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
551 static struct table_elt
*table
[HASH_SIZE
];
553 /* Chain of `struct table_elt's made so far for this function
554 but currently removed from the table. */
556 static struct table_elt
*free_element_chain
;
558 /* Number of `struct table_elt' structures made so far for this function. */
560 static int n_elements_made
;
562 /* Maximum value `n_elements_made' has had so far in this compilation
563 for functions previously processed. */
565 static int max_elements_made
;
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
572 static int constant_pool_entries_cost
;
573 static int constant_pool_entries_regcost
;
575 /* This data describes a block that will be processed by cse_basic_block. */
577 struct cse_basic_block_data
579 /* Lowest CUID value of insns in block. */
581 /* Highest CUID value of insns in block. */
583 /* Total number of SETs in block. */
585 /* Last insn in the block. */
587 /* Size of current branch path, if any. */
589 /* Current branch path, indicating which branches will be taken. */
592 /* The branch insn. */
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
597 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
601 static bool fixed_base_plus_p (rtx x
);
602 static int notreg_cost (rtx
, enum rtx_code
);
603 static int approx_reg_cost_1 (rtx
*, void *);
604 static int approx_reg_cost (rtx
);
605 static int preferable (int, int, int, int);
606 static void new_basic_block (void);
607 static void make_new_qty (unsigned int, enum machine_mode
);
608 static void make_regs_eqv (unsigned int, unsigned int);
609 static void delete_reg_equiv (unsigned int);
610 static int mention_regs (rtx
);
611 static int insert_regs (rtx
, struct table_elt
*, int);
612 static void remove_from_table (struct table_elt
*, unsigned);
613 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
614 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
615 static rtx
lookup_as_function (rtx
, enum rtx_code
);
616 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
618 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
619 static void invalidate (rtx
, enum machine_mode
);
620 static int cse_rtx_varies_p (rtx
, int);
621 static void remove_invalid_refs (unsigned int);
622 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
624 static void rehash_using_reg (rtx
);
625 static void invalidate_memory (void);
626 static void invalidate_for_call (void);
627 static rtx
use_related_value (rtx
, struct table_elt
*);
629 static inline unsigned canon_hash (rtx
, enum machine_mode
);
630 static inline unsigned safe_hash (rtx
, enum machine_mode
);
631 static unsigned hash_rtx_string (const char *);
633 static rtx
canon_reg (rtx
, rtx
);
634 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
635 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
637 enum machine_mode
*);
638 static rtx
fold_rtx (rtx
, rtx
);
639 static rtx
equiv_constant (rtx
);
640 static void record_jump_equiv (rtx
, int);
641 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
643 static void cse_insn (rtx
, rtx
);
644 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
646 static int addr_affects_sp_p (rtx
);
647 static void invalidate_from_clobbers (rtx
);
648 static rtx
cse_process_notes (rtx
, rtx
);
649 static void invalidate_skipped_set (rtx
, rtx
, void *);
650 static void invalidate_skipped_block (rtx
);
651 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
652 static void count_reg_usage (rtx
, int *, int);
653 static int check_for_label_ref (rtx
*, void *);
654 extern void dump_class (struct table_elt
*);
655 static struct cse_reg_info
* get_cse_reg_info (unsigned int);
656 static int check_dependence (rtx
*, void *);
658 static void flush_hash_table (void);
659 static bool insn_live_p (rtx
, int *);
660 static bool set_live_p (rtx
, rtx
, int *);
661 static bool dead_libcall_p (rtx
, int *);
662 static int cse_change_cc_mode (rtx
*, void *);
663 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
664 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
667 #undef RTL_HOOKS_GEN_LOWPART
668 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
670 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
672 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
673 virtual regs here because the simplify_*_operation routines are called
674 by integrate.c, which is called before virtual register instantiation. */
677 fixed_base_plus_p (rtx x
)
679 switch (GET_CODE (x
))
682 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
684 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
686 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
687 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
692 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
694 return fixed_base_plus_p (XEXP (x
, 0));
701 /* Dump the expressions in the equivalence class indicated by CLASSP.
702 This function is used only for debugging. */
704 dump_class (struct table_elt
*classp
)
706 struct table_elt
*elt
;
708 fprintf (stderr
, "Equivalence chain for ");
709 print_rtl (stderr
, classp
->exp
);
710 fprintf (stderr
, ": \n");
712 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
714 print_rtl (stderr
, elt
->exp
);
715 fprintf (stderr
, "\n");
719 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
722 approx_reg_cost_1 (rtx
*xp
, void *data
)
729 unsigned int regno
= REGNO (x
);
731 if (! CHEAP_REGNO (regno
))
733 if (regno
< FIRST_PSEUDO_REGISTER
)
735 if (SMALL_REGISTER_CLASSES
)
747 /* Return an estimate of the cost of the registers used in an rtx.
748 This is mostly the number of different REG expressions in the rtx;
749 however for some exceptions like fixed registers we use a cost of
750 0. If any other hard register reference occurs, return MAX_COST. */
753 approx_reg_cost (rtx x
)
757 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
763 /* Return a negative value if an rtx A, whose costs are given by COST_A
764 and REGCOST_A, is more desirable than an rtx B.
765 Return a positive value if A is less desirable, or 0 if the two are
768 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
770 /* First, get rid of cases involving expressions that are entirely
772 if (cost_a
!= cost_b
)
774 if (cost_a
== MAX_COST
)
776 if (cost_b
== MAX_COST
)
780 /* Avoid extending lifetimes of hardregs. */
781 if (regcost_a
!= regcost_b
)
783 if (regcost_a
== MAX_COST
)
785 if (regcost_b
== MAX_COST
)
789 /* Normal operation costs take precedence. */
790 if (cost_a
!= cost_b
)
791 return cost_a
- cost_b
;
792 /* Only if these are identical consider effects on register pressure. */
793 if (regcost_a
!= regcost_b
)
794 return regcost_a
- regcost_b
;
798 /* Internal function, to compute cost when X is not a register; called
799 from COST macro to keep it simple. */
802 notreg_cost (rtx x
, enum rtx_code outer
)
804 return ((GET_CODE (x
) == SUBREG
805 && REG_P (SUBREG_REG (x
))
806 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
807 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
808 && (GET_MODE_SIZE (GET_MODE (x
))
809 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
810 && subreg_lowpart_p (x
)
811 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
812 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
814 : rtx_cost (x
, outer
) * 2);
818 static struct cse_reg_info
*
819 get_cse_reg_info (unsigned int regno
)
821 struct cse_reg_info
**hash_head
= ®_hash
[REGHASH_FN (regno
)];
822 struct cse_reg_info
*p
;
824 for (p
= *hash_head
; p
!= NULL
; p
= p
->hash_next
)
825 if (p
->regno
== regno
)
830 /* Get a new cse_reg_info structure. */
831 if (cse_reg_info_free_list
)
833 p
= cse_reg_info_free_list
;
834 cse_reg_info_free_list
= p
->next
;
837 p
= xmalloc (sizeof (struct cse_reg_info
));
839 /* Insert into hash table. */
840 p
->hash_next
= *hash_head
;
845 p
->reg_in_table
= -1;
846 p
->subreg_ticked
= -1;
849 p
->next
= cse_reg_info_used_list
;
850 cse_reg_info_used_list
= p
;
851 if (!cse_reg_info_used_list_end
)
852 cse_reg_info_used_list_end
= p
;
855 /* Cache this lookup; we tend to be looking up information about the
856 same register several times in a row. */
857 cached_regno
= regno
;
858 cached_cse_reg_info
= p
;
863 /* Clear the hash table and initialize each register with its own quantity,
864 for a new basic block. */
867 new_basic_block (void)
873 /* Clear out hash table state for this pass. */
875 memset (reg_hash
, 0, sizeof reg_hash
);
877 if (cse_reg_info_used_list
)
879 cse_reg_info_used_list_end
->next
= cse_reg_info_free_list
;
880 cse_reg_info_free_list
= cse_reg_info_used_list
;
881 cse_reg_info_used_list
= cse_reg_info_used_list_end
= 0;
883 cached_cse_reg_info
= 0;
885 CLEAR_HARD_REG_SET (hard_regs_in_table
);
887 /* The per-quantity values used to be initialized here, but it is
888 much faster to initialize each as it is made in `make_new_qty'. */
890 for (i
= 0; i
< HASH_SIZE
; i
++)
892 struct table_elt
*first
;
897 struct table_elt
*last
= first
;
901 while (last
->next_same_hash
!= NULL
)
902 last
= last
->next_same_hash
;
904 /* Now relink this hash entire chain into
905 the free element list. */
907 last
->next_same_hash
= free_element_chain
;
908 free_element_chain
= first
;
918 /* Say that register REG contains a quantity in mode MODE not in any
919 register before and initialize that quantity. */
922 make_new_qty (unsigned int reg
, enum machine_mode mode
)
925 struct qty_table_elem
*ent
;
926 struct reg_eqv_elem
*eqv
;
928 if (next_qty
>= max_qty
)
931 q
= REG_QTY (reg
) = next_qty
++;
933 ent
->first_reg
= reg
;
936 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
937 ent
->comparison_code
= UNKNOWN
;
939 eqv
= ®_eqv_table
[reg
];
940 eqv
->next
= eqv
->prev
= -1;
943 /* Make reg NEW equivalent to reg OLD.
944 OLD is not changing; NEW is. */
947 make_regs_eqv (unsigned int new, unsigned int old
)
949 unsigned int lastr
, firstr
;
950 int q
= REG_QTY (old
);
951 struct qty_table_elem
*ent
;
955 /* Nothing should become eqv until it has a "non-invalid" qty number. */
956 if (! REGNO_QTY_VALID_P (old
))
960 firstr
= ent
->first_reg
;
961 lastr
= ent
->last_reg
;
963 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
964 hard regs. Among pseudos, if NEW will live longer than any other reg
965 of the same qty, and that is beyond the current basic block,
966 make it the new canonical replacement for this qty. */
967 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
968 /* Certain fixed registers might be of the class NO_REGS. This means
969 that not only can they not be allocated by the compiler, but
970 they cannot be used in substitutions or canonicalizations
972 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
973 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
974 || (new >= FIRST_PSEUDO_REGISTER
975 && (firstr
< FIRST_PSEUDO_REGISTER
976 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
977 || (uid_cuid
[REGNO_FIRST_UID (new)]
978 < cse_basic_block_start
))
979 && (uid_cuid
[REGNO_LAST_UID (new)]
980 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
982 reg_eqv_table
[firstr
].prev
= new;
983 reg_eqv_table
[new].next
= firstr
;
984 reg_eqv_table
[new].prev
= -1;
985 ent
->first_reg
= new;
989 /* If NEW is a hard reg (known to be non-fixed), insert at end.
990 Otherwise, insert before any non-fixed hard regs that are at the
991 end. Registers of class NO_REGS cannot be used as an
992 equivalent for anything. */
993 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
994 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
995 && new >= FIRST_PSEUDO_REGISTER
)
996 lastr
= reg_eqv_table
[lastr
].prev
;
997 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
998 if (reg_eqv_table
[lastr
].next
>= 0)
999 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1001 qty_table
[q
].last_reg
= new;
1002 reg_eqv_table
[lastr
].next
= new;
1003 reg_eqv_table
[new].prev
= lastr
;
1007 /* Remove REG from its equivalence class. */
1010 delete_reg_equiv (unsigned int reg
)
1012 struct qty_table_elem
*ent
;
1013 int q
= REG_QTY (reg
);
1016 /* If invalid, do nothing. */
1020 ent
= &qty_table
[q
];
1022 p
= reg_eqv_table
[reg
].prev
;
1023 n
= reg_eqv_table
[reg
].next
;
1026 reg_eqv_table
[n
].prev
= p
;
1030 reg_eqv_table
[p
].next
= n
;
1034 REG_QTY (reg
) = reg
;
1037 /* Remove any invalid expressions from the hash table
1038 that refer to any of the registers contained in expression X.
1040 Make sure that newly inserted references to those registers
1041 as subexpressions will be considered valid.
1043 mention_regs is not called when a register itself
1044 is being stored in the table.
1046 Return 1 if we have done something that may have changed the hash code
1050 mention_regs (rtx x
)
1060 code
= GET_CODE (x
);
1063 unsigned int regno
= REGNO (x
);
1064 unsigned int endregno
1065 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1066 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1069 for (i
= regno
; i
< endregno
; i
++)
1071 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1072 remove_invalid_refs (i
);
1074 REG_IN_TABLE (i
) = REG_TICK (i
);
1075 SUBREG_TICKED (i
) = -1;
1081 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1082 pseudo if they don't use overlapping words. We handle only pseudos
1083 here for simplicity. */
1084 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1085 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1087 unsigned int i
= REGNO (SUBREG_REG (x
));
1089 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1091 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1092 the last store to this register really stored into this
1093 subreg, then remove the memory of this subreg.
1094 Otherwise, remove any memory of the entire register and
1095 all its subregs from the table. */
1096 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1097 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1098 remove_invalid_refs (i
);
1100 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1103 REG_IN_TABLE (i
) = REG_TICK (i
);
1104 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1108 /* If X is a comparison or a COMPARE and either operand is a register
1109 that does not have a quantity, give it one. This is so that a later
1110 call to record_jump_equiv won't cause X to be assigned a different
1111 hash code and not found in the table after that call.
1113 It is not necessary to do this here, since rehash_using_reg can
1114 fix up the table later, but doing this here eliminates the need to
1115 call that expensive function in the most common case where the only
1116 use of the register is in the comparison. */
1118 if (code
== COMPARE
|| COMPARISON_P (x
))
1120 if (REG_P (XEXP (x
, 0))
1121 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1122 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1124 rehash_using_reg (XEXP (x
, 0));
1128 if (REG_P (XEXP (x
, 1))
1129 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1130 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1132 rehash_using_reg (XEXP (x
, 1));
1137 fmt
= GET_RTX_FORMAT (code
);
1138 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1140 changed
|= mention_regs (XEXP (x
, i
));
1141 else if (fmt
[i
] == 'E')
1142 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1143 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1148 /* Update the register quantities for inserting X into the hash table
1149 with a value equivalent to CLASSP.
1150 (If the class does not contain a REG, it is irrelevant.)
1151 If MODIFIED is nonzero, X is a destination; it is being modified.
1152 Note that delete_reg_equiv should be called on a register
1153 before insert_regs is done on that register with MODIFIED != 0.
1155 Nonzero value means that elements of reg_qty have changed
1156 so X's hash code may be different. */
1159 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1163 unsigned int regno
= REGNO (x
);
1166 /* If REGNO is in the equivalence table already but is of the
1167 wrong mode for that equivalence, don't do anything here. */
1169 qty_valid
= REGNO_QTY_VALID_P (regno
);
1172 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1174 if (ent
->mode
!= GET_MODE (x
))
1178 if (modified
|| ! qty_valid
)
1181 for (classp
= classp
->first_same_value
;
1183 classp
= classp
->next_same_value
)
1184 if (REG_P (classp
->exp
)
1185 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1187 make_regs_eqv (regno
, REGNO (classp
->exp
));
1191 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1192 than REG_IN_TABLE to find out if there was only a single preceding
1193 invalidation - for the SUBREG - or another one, which would be
1194 for the full register. However, if we find here that REG_TICK
1195 indicates that the register is invalid, it means that it has
1196 been invalidated in a separate operation. The SUBREG might be used
1197 now (then this is a recursive call), or we might use the full REG
1198 now and a SUBREG of it later. So bump up REG_TICK so that
1199 mention_regs will do the right thing. */
1201 && REG_IN_TABLE (regno
) >= 0
1202 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1204 make_new_qty (regno
, GET_MODE (x
));
1211 /* If X is a SUBREG, we will likely be inserting the inner register in the
1212 table. If that register doesn't have an assigned quantity number at
1213 this point but does later, the insertion that we will be doing now will
1214 not be accessible because its hash code will have changed. So assign
1215 a quantity number now. */
1217 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1218 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1220 insert_regs (SUBREG_REG (x
), NULL
, 0);
1225 return mention_regs (x
);
1228 /* Look in or update the hash table. */
1230 /* Remove table element ELT from use in the table.
1231 HASH is its hash code, made using the HASH macro.
1232 It's an argument because often that is known in advance
1233 and we save much time not recomputing it. */
1236 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1241 /* Mark this element as removed. See cse_insn. */
1242 elt
->first_same_value
= 0;
1244 /* Remove the table element from its equivalence class. */
1247 struct table_elt
*prev
= elt
->prev_same_value
;
1248 struct table_elt
*next
= elt
->next_same_value
;
1251 next
->prev_same_value
= prev
;
1254 prev
->next_same_value
= next
;
1257 struct table_elt
*newfirst
= next
;
1260 next
->first_same_value
= newfirst
;
1261 next
= next
->next_same_value
;
1266 /* Remove the table element from its hash bucket. */
1269 struct table_elt
*prev
= elt
->prev_same_hash
;
1270 struct table_elt
*next
= elt
->next_same_hash
;
1273 next
->prev_same_hash
= prev
;
1276 prev
->next_same_hash
= next
;
1277 else if (table
[hash
] == elt
)
1281 /* This entry is not in the proper hash bucket. This can happen
1282 when two classes were merged by `merge_equiv_classes'. Search
1283 for the hash bucket that it heads. This happens only very
1284 rarely, so the cost is acceptable. */
1285 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1286 if (table
[hash
] == elt
)
1291 /* Remove the table element from its related-value circular chain. */
1293 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1295 struct table_elt
*p
= elt
->related_value
;
1297 while (p
->related_value
!= elt
)
1298 p
= p
->related_value
;
1299 p
->related_value
= elt
->related_value
;
1300 if (p
->related_value
== p
)
1301 p
->related_value
= 0;
1304 /* Now add it to the free element chain. */
1305 elt
->next_same_hash
= free_element_chain
;
1306 free_element_chain
= elt
;
1309 /* Look up X in the hash table and return its table element,
1310 or 0 if X is not in the table.
1312 MODE is the machine-mode of X, or if X is an integer constant
1313 with VOIDmode then MODE is the mode with which X will be used.
1315 Here we are satisfied to find an expression whose tree structure
1318 static struct table_elt
*
1319 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1321 struct table_elt
*p
;
1323 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1324 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1325 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1331 /* Like `lookup' but don't care whether the table element uses invalid regs.
1332 Also ignore discrepancies in the machine mode of a register. */
1334 static struct table_elt
*
1335 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1337 struct table_elt
*p
;
1341 unsigned int regno
= REGNO (x
);
1343 /* Don't check the machine mode when comparing registers;
1344 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1345 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1347 && REGNO (p
->exp
) == regno
)
1352 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1354 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1361 /* Look for an expression equivalent to X and with code CODE.
1362 If one is found, return that expression. */
1365 lookup_as_function (rtx x
, enum rtx_code code
)
1368 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1370 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1371 long as we are narrowing. So if we looked in vain for a mode narrower
1372 than word_mode before, look for word_mode now. */
1373 if (p
== 0 && code
== CONST_INT
1374 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1377 PUT_MODE (x
, word_mode
);
1378 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1384 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1385 if (GET_CODE (p
->exp
) == code
1386 /* Make sure this is a valid entry in the table. */
1387 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1393 /* Insert X in the hash table, assuming HASH is its hash code
1394 and CLASSP is an element of the class it should go in
1395 (or 0 if a new class should be made).
1396 It is inserted at the proper position to keep the class in
1397 the order cheapest first.
1399 MODE is the machine-mode of X, or if X is an integer constant
1400 with VOIDmode then MODE is the mode with which X will be used.
1402 For elements of equal cheapness, the most recent one
1403 goes in front, except that the first element in the list
1404 remains first unless a cheaper element is added. The order of
1405 pseudo-registers does not matter, as canon_reg will be called to
1406 find the cheapest when a register is retrieved from the table.
1408 The in_memory field in the hash table element is set to 0.
1409 The caller must set it nonzero if appropriate.
1411 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1412 and if insert_regs returns a nonzero value
1413 you must then recompute its hash code before calling here.
1415 If necessary, update table showing constant values of quantities. */
1417 #define CHEAPER(X, Y) \
1418 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1420 static struct table_elt
*
1421 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1423 struct table_elt
*elt
;
1425 /* If X is a register and we haven't made a quantity for it,
1426 something is wrong. */
1427 if (REG_P (x
) && ! REGNO_QTY_VALID_P (REGNO (x
)))
1430 /* If X is a hard register, show it is being put in the table. */
1431 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1433 unsigned int regno
= REGNO (x
);
1434 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1437 for (i
= regno
; i
< endregno
; i
++)
1438 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1441 /* Put an element for X into the right hash bucket. */
1443 elt
= free_element_chain
;
1445 free_element_chain
= elt
->next_same_hash
;
1449 elt
= xmalloc (sizeof (struct table_elt
));
1453 elt
->canon_exp
= NULL_RTX
;
1454 elt
->cost
= COST (x
);
1455 elt
->regcost
= approx_reg_cost (x
);
1456 elt
->next_same_value
= 0;
1457 elt
->prev_same_value
= 0;
1458 elt
->next_same_hash
= table
[hash
];
1459 elt
->prev_same_hash
= 0;
1460 elt
->related_value
= 0;
1463 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1466 table
[hash
]->prev_same_hash
= elt
;
1469 /* Put it into the proper value-class. */
1472 classp
= classp
->first_same_value
;
1473 if (CHEAPER (elt
, classp
))
1474 /* Insert at the head of the class. */
1476 struct table_elt
*p
;
1477 elt
->next_same_value
= classp
;
1478 classp
->prev_same_value
= elt
;
1479 elt
->first_same_value
= elt
;
1481 for (p
= classp
; p
; p
= p
->next_same_value
)
1482 p
->first_same_value
= elt
;
1486 /* Insert not at head of the class. */
1487 /* Put it after the last element cheaper than X. */
1488 struct table_elt
*p
, *next
;
1490 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1493 /* Put it after P and before NEXT. */
1494 elt
->next_same_value
= next
;
1496 next
->prev_same_value
= elt
;
1498 elt
->prev_same_value
= p
;
1499 p
->next_same_value
= elt
;
1500 elt
->first_same_value
= classp
;
1504 elt
->first_same_value
= elt
;
1506 /* If this is a constant being set equivalent to a register or a register
1507 being set equivalent to a constant, note the constant equivalence.
1509 If this is a constant, it cannot be equivalent to a different constant,
1510 and a constant is the only thing that can be cheaper than a register. So
1511 we know the register is the head of the class (before the constant was
1514 If this is a register that is not already known equivalent to a
1515 constant, we must check the entire class.
1517 If this is a register that is already known equivalent to an insn,
1518 update the qtys `const_insn' to show that `this_insn' is the latest
1519 insn making that quantity equivalent to the constant. */
1521 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1524 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1525 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1527 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1528 exp_ent
->const_insn
= this_insn
;
1533 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1536 struct table_elt
*p
;
1538 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1540 if (p
->is_const
&& !REG_P (p
->exp
))
1542 int x_q
= REG_QTY (REGNO (x
));
1543 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1546 = gen_lowpart (GET_MODE (x
), p
->exp
);
1547 x_ent
->const_insn
= this_insn
;
1554 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1555 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1556 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1558 /* If this is a constant with symbolic value,
1559 and it has a term with an explicit integer value,
1560 link it up with related expressions. */
1561 if (GET_CODE (x
) == CONST
)
1563 rtx subexp
= get_related_value (x
);
1565 struct table_elt
*subelt
, *subelt_prev
;
1569 /* Get the integer-free subexpression in the hash table. */
1570 subhash
= SAFE_HASH (subexp
, mode
);
1571 subelt
= lookup (subexp
, subhash
, mode
);
1573 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1574 /* Initialize SUBELT's circular chain if it has none. */
1575 if (subelt
->related_value
== 0)
1576 subelt
->related_value
= subelt
;
1577 /* Find the element in the circular chain that precedes SUBELT. */
1578 subelt_prev
= subelt
;
1579 while (subelt_prev
->related_value
!= subelt
)
1580 subelt_prev
= subelt_prev
->related_value
;
1581 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1582 This way the element that follows SUBELT is the oldest one. */
1583 elt
->related_value
= subelt_prev
->related_value
;
1584 subelt_prev
->related_value
= elt
;
1591 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1592 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1593 the two classes equivalent.
1595 CLASS1 will be the surviving class; CLASS2 should not be used after this
1598 Any invalid entries in CLASS2 will not be copied. */
1601 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1603 struct table_elt
*elt
, *next
, *new;
1605 /* Ensure we start with the head of the classes. */
1606 class1
= class1
->first_same_value
;
1607 class2
= class2
->first_same_value
;
1609 /* If they were already equal, forget it. */
1610 if (class1
== class2
)
1613 for (elt
= class2
; elt
; elt
= next
)
1617 enum machine_mode mode
= elt
->mode
;
1619 next
= elt
->next_same_value
;
1621 /* Remove old entry, make a new one in CLASS1's class.
1622 Don't do this for invalid entries as we cannot find their
1623 hash code (it also isn't necessary). */
1624 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1626 bool need_rehash
= false;
1628 hash_arg_in_memory
= 0;
1629 hash
= HASH (exp
, mode
);
1633 need_rehash
= (unsigned) REG_QTY (REGNO (exp
)) != REGNO (exp
);
1634 delete_reg_equiv (REGNO (exp
));
1637 remove_from_table (elt
, hash
);
1639 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1641 rehash_using_reg (exp
);
1642 hash
= HASH (exp
, mode
);
1644 new = insert (exp
, class1
, hash
, mode
);
1645 new->in_memory
= hash_arg_in_memory
;
1650 /* Flush the entire hash table. */
1653 flush_hash_table (void)
1656 struct table_elt
*p
;
1658 for (i
= 0; i
< HASH_SIZE
; i
++)
1659 for (p
= table
[i
]; p
; p
= table
[i
])
1661 /* Note that invalidate can remove elements
1662 after P in the current hash chain. */
1664 invalidate (p
->exp
, p
->mode
);
1666 remove_from_table (p
, i
);
1670 /* Function called for each rtx to check whether true dependence exist. */
1671 struct check_dependence_data
1673 enum machine_mode mode
;
1679 check_dependence (rtx
*x
, void *data
)
1681 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1682 if (*x
&& MEM_P (*x
))
1683 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1689 /* Remove from the hash table, or mark as invalid, all expressions whose
1690 values could be altered by storing in X. X is a register, a subreg, or
1691 a memory reference with nonvarying address (because, when a memory
1692 reference with a varying address is stored in, all memory references are
1693 removed by invalidate_memory so specific invalidation is superfluous).
1694 FULL_MODE, if not VOIDmode, indicates that this much should be
1695 invalidated instead of just the amount indicated by the mode of X. This
1696 is only used for bitfield stores into memory.
1698 A nonvarying address may be just a register or just a symbol reference,
1699 or it may be either of those plus a numeric offset. */
1702 invalidate (rtx x
, enum machine_mode full_mode
)
1705 struct table_elt
*p
;
1708 switch (GET_CODE (x
))
1712 /* If X is a register, dependencies on its contents are recorded
1713 through the qty number mechanism. Just change the qty number of
1714 the register, mark it as invalid for expressions that refer to it,
1715 and remove it itself. */
1716 unsigned int regno
= REGNO (x
);
1717 unsigned int hash
= HASH (x
, GET_MODE (x
));
1719 /* Remove REGNO from any quantity list it might be on and indicate
1720 that its value might have changed. If it is a pseudo, remove its
1721 entry from the hash table.
1723 For a hard register, we do the first two actions above for any
1724 additional hard registers corresponding to X. Then, if any of these
1725 registers are in the table, we must remove any REG entries that
1726 overlap these registers. */
1728 delete_reg_equiv (regno
);
1730 SUBREG_TICKED (regno
) = -1;
1732 if (regno
>= FIRST_PSEUDO_REGISTER
)
1734 /* Because a register can be referenced in more than one mode,
1735 we might have to remove more than one table entry. */
1736 struct table_elt
*elt
;
1738 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1739 remove_from_table (elt
, hash
);
1743 HOST_WIDE_INT in_table
1744 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1745 unsigned int endregno
1746 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1747 unsigned int tregno
, tendregno
, rn
;
1748 struct table_elt
*p
, *next
;
1750 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1752 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1754 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1755 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1756 delete_reg_equiv (rn
);
1758 SUBREG_TICKED (rn
) = -1;
1762 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1763 for (p
= table
[hash
]; p
; p
= next
)
1765 next
= p
->next_same_hash
;
1768 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1771 tregno
= REGNO (p
->exp
);
1773 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1774 if (tendregno
> regno
&& tregno
< endregno
)
1775 remove_from_table (p
, hash
);
1782 invalidate (SUBREG_REG (x
), VOIDmode
);
1786 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1787 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1791 /* This is part of a disjoint return value; extract the location in
1792 question ignoring the offset. */
1793 invalidate (XEXP (x
, 0), VOIDmode
);
1797 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1798 /* Calculate the canonical version of X here so that
1799 true_dependence doesn't generate new RTL for X on each call. */
1802 /* Remove all hash table elements that refer to overlapping pieces of
1804 if (full_mode
== VOIDmode
)
1805 full_mode
= GET_MODE (x
);
1807 for (i
= 0; i
< HASH_SIZE
; i
++)
1809 struct table_elt
*next
;
1811 for (p
= table
[i
]; p
; p
= next
)
1813 next
= p
->next_same_hash
;
1816 struct check_dependence_data d
;
1818 /* Just canonicalize the expression once;
1819 otherwise each time we call invalidate
1820 true_dependence will canonicalize the
1821 expression again. */
1823 p
->canon_exp
= canon_rtx (p
->exp
);
1827 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1828 remove_from_table (p
, i
);
1839 /* Remove all expressions that refer to register REGNO,
1840 since they are already invalid, and we are about to
1841 mark that register valid again and don't want the old
1842 expressions to reappear as valid. */
1845 remove_invalid_refs (unsigned int regno
)
1848 struct table_elt
*p
, *next
;
1850 for (i
= 0; i
< HASH_SIZE
; i
++)
1851 for (p
= table
[i
]; p
; p
= next
)
1853 next
= p
->next_same_hash
;
1855 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1856 remove_from_table (p
, i
);
1860 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1863 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1864 enum machine_mode mode
)
1867 struct table_elt
*p
, *next
;
1868 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1870 for (i
= 0; i
< HASH_SIZE
; i
++)
1871 for (p
= table
[i
]; p
; p
= next
)
1874 next
= p
->next_same_hash
;
1877 && (GET_CODE (exp
) != SUBREG
1878 || !REG_P (SUBREG_REG (exp
))
1879 || REGNO (SUBREG_REG (exp
)) != regno
1880 || (((SUBREG_BYTE (exp
)
1881 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1882 && SUBREG_BYTE (exp
) <= end
))
1883 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1884 remove_from_table (p
, i
);
1888 /* Recompute the hash codes of any valid entries in the hash table that
1889 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1891 This is called when we make a jump equivalence. */
1894 rehash_using_reg (rtx x
)
1897 struct table_elt
*p
, *next
;
1900 if (GET_CODE (x
) == SUBREG
)
1903 /* If X is not a register or if the register is known not to be in any
1904 valid entries in the table, we have no work to do. */
1907 || REG_IN_TABLE (REGNO (x
)) < 0
1908 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1911 /* Scan all hash chains looking for valid entries that mention X.
1912 If we find one and it is in the wrong hash chain, move it. */
1914 for (i
= 0; i
< HASH_SIZE
; i
++)
1915 for (p
= table
[i
]; p
; p
= next
)
1917 next
= p
->next_same_hash
;
1918 if (reg_mentioned_p (x
, p
->exp
)
1919 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1920 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1922 if (p
->next_same_hash
)
1923 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1925 if (p
->prev_same_hash
)
1926 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1928 table
[i
] = p
->next_same_hash
;
1930 p
->next_same_hash
= table
[hash
];
1931 p
->prev_same_hash
= 0;
1933 table
[hash
]->prev_same_hash
= p
;
1939 /* Remove from the hash table any expression that is a call-clobbered
1940 register. Also update their TICK values. */
1943 invalidate_for_call (void)
1945 unsigned int regno
, endregno
;
1948 struct table_elt
*p
, *next
;
1951 /* Go through all the hard registers. For each that is clobbered in
1952 a CALL_INSN, remove the register from quantity chains and update
1953 reg_tick if defined. Also see if any of these registers is currently
1956 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1957 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1959 delete_reg_equiv (regno
);
1960 if (REG_TICK (regno
) >= 0)
1963 SUBREG_TICKED (regno
) = -1;
1966 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1969 /* In the case where we have no call-clobbered hard registers in the
1970 table, we are done. Otherwise, scan the table and remove any
1971 entry that overlaps a call-clobbered register. */
1974 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1975 for (p
= table
[hash
]; p
; p
= next
)
1977 next
= p
->next_same_hash
;
1980 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1983 regno
= REGNO (p
->exp
);
1984 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
1986 for (i
= regno
; i
< endregno
; i
++)
1987 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1989 remove_from_table (p
, hash
);
1995 /* Given an expression X of type CONST,
1996 and ELT which is its table entry (or 0 if it
1997 is not in the hash table),
1998 return an alternate expression for X as a register plus integer.
1999 If none can be found, return 0. */
2002 use_related_value (rtx x
, struct table_elt
*elt
)
2004 struct table_elt
*relt
= 0;
2005 struct table_elt
*p
, *q
;
2006 HOST_WIDE_INT offset
;
2008 /* First, is there anything related known?
2009 If we have a table element, we can tell from that.
2010 Otherwise, must look it up. */
2012 if (elt
!= 0 && elt
->related_value
!= 0)
2014 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2016 rtx subexp
= get_related_value (x
);
2018 relt
= lookup (subexp
,
2019 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2026 /* Search all related table entries for one that has an
2027 equivalent register. */
2032 /* This loop is strange in that it is executed in two different cases.
2033 The first is when X is already in the table. Then it is searching
2034 the RELATED_VALUE list of X's class (RELT). The second case is when
2035 X is not in the table. Then RELT points to a class for the related
2038 Ensure that, whatever case we are in, that we ignore classes that have
2039 the same value as X. */
2041 if (rtx_equal_p (x
, p
->exp
))
2044 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2051 p
= p
->related_value
;
2053 /* We went all the way around, so there is nothing to be found.
2054 Alternatively, perhaps RELT was in the table for some other reason
2055 and it has no related values recorded. */
2056 if (p
== relt
|| p
== 0)
2063 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2064 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2065 return plus_constant (q
->exp
, offset
);
2068 /* Hash a string. Just add its bytes up. */
2069 static inline unsigned
2070 hash_rtx_string (const char *ps
)
2073 const unsigned char *p
= (const unsigned char *) ps
;
2082 /* Hash an rtx. We are careful to make sure the value is never negative.
2083 Equivalent registers hash identically.
2084 MODE is used in hashing for CONST_INTs only;
2085 otherwise the mode of X is used.
2087 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2089 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2090 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2092 Note that cse_insn knows that the hash code of a MEM expression
2093 is just (int) MEM plus the hash code of the address. */
2096 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2097 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2104 /* Used to turn recursion into iteration. We can't rely on GCC's
2105 tail-recursion elimination since we need to keep accumulating values
2111 code
= GET_CODE (x
);
2116 unsigned int regno
= REGNO (x
);
2118 if (!reload_completed
)
2120 /* On some machines, we can't record any non-fixed hard register,
2121 because extending its life will cause reload problems. We
2122 consider ap, fp, sp, gp to be fixed for this purpose.
2124 We also consider CCmode registers to be fixed for this purpose;
2125 failure to do so leads to failure to simplify 0<100 type of
2128 On all machines, we can't record any global registers.
2129 Nor should we record any register that is in a small
2130 class, as defined by CLASS_LIKELY_SPILLED_P. */
2133 if (regno
>= FIRST_PSEUDO_REGISTER
)
2135 else if (x
== frame_pointer_rtx
2136 || x
== hard_frame_pointer_rtx
2137 || x
== arg_pointer_rtx
2138 || x
== stack_pointer_rtx
2139 || x
== pic_offset_table_rtx
)
2141 else if (global_regs
[regno
])
2143 else if (fixed_regs
[regno
])
2145 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2147 else if (SMALL_REGISTER_CLASSES
)
2149 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2156 *do_not_record_p
= 1;
2161 hash
+= ((unsigned int) REG
<< 7);
2162 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2166 /* We handle SUBREG of a REG specially because the underlying
2167 reg changes its hash value with every value change; we don't
2168 want to have to forget unrelated subregs when one subreg changes. */
2171 if (REG_P (SUBREG_REG (x
)))
2173 hash
+= (((unsigned int) SUBREG
<< 7)
2174 + REGNO (SUBREG_REG (x
))
2175 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2182 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2183 + (unsigned int) INTVAL (x
));
2187 /* This is like the general case, except that it only counts
2188 the integers representing the constant. */
2189 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2190 if (GET_MODE (x
) != VOIDmode
)
2191 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2193 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2194 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2202 units
= CONST_VECTOR_NUNITS (x
);
2204 for (i
= 0; i
< units
; ++i
)
2206 elt
= CONST_VECTOR_ELT (x
, i
);
2207 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2208 hash_arg_in_memory_p
, have_reg_qty
);
2214 /* Assume there is only one rtx object for any given label. */
2216 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2217 differences and differences between each stage's debugging dumps. */
2218 hash
+= (((unsigned int) LABEL_REF
<< 7)
2219 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2224 /* Don't hash on the symbol's address to avoid bootstrap differences.
2225 Different hash values may cause expressions to be recorded in
2226 different orders and thus different registers to be used in the
2227 final assembler. This also avoids differences in the dump files
2228 between various stages. */
2230 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2233 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2235 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2240 /* We don't record if marked volatile or if BLKmode since we don't
2241 know the size of the move. */
2242 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2244 *do_not_record_p
= 1;
2247 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2248 *hash_arg_in_memory_p
= 1;
2250 /* Now that we have already found this special case,
2251 might as well speed it up as much as possible. */
2252 hash
+= (unsigned) MEM
;
2257 /* A USE that mentions non-volatile memory needs special
2258 handling since the MEM may be BLKmode which normally
2259 prevents an entry from being made. Pure calls are
2260 marked by a USE which mentions BLKmode memory.
2261 See calls.c:emit_call_1. */
2262 if (MEM_P (XEXP (x
, 0))
2263 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2265 hash
+= (unsigned) USE
;
2268 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2269 *hash_arg_in_memory_p
= 1;
2271 /* Now that we have already found this special case,
2272 might as well speed it up as much as possible. */
2273 hash
+= (unsigned) MEM
;
2288 case UNSPEC_VOLATILE
:
2289 *do_not_record_p
= 1;
2293 if (MEM_VOLATILE_P (x
))
2295 *do_not_record_p
= 1;
2300 /* We don't want to take the filename and line into account. */
2301 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2302 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2303 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2304 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2306 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2308 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2310 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2311 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2312 do_not_record_p
, hash_arg_in_memory_p
,
2315 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2318 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2319 x
= ASM_OPERANDS_INPUT (x
, 0);
2320 mode
= GET_MODE (x
);
2332 i
= GET_RTX_LENGTH (code
) - 1;
2333 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2334 fmt
= GET_RTX_FORMAT (code
);
2339 /* If we are about to do the last recursive call
2340 needed at this level, change it into iteration.
2341 This function is called enough to be worth it. */
2348 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2349 hash_arg_in_memory_p
, have_reg_qty
);
2352 else if (fmt
[i
] == 'E')
2353 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2355 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2356 hash_arg_in_memory_p
, have_reg_qty
);
2359 else if (fmt
[i
] == 's')
2360 hash
+= hash_rtx_string (XSTR (x
, i
));
2361 else if (fmt
[i
] == 'i')
2362 hash
+= (unsigned int) XINT (x
, i
);
2363 else if (fmt
[i
] == '0' || fmt
[i
] == 't')
2373 /* Hash an rtx X for cse via hash_rtx.
2374 Stores 1 in do_not_record if any subexpression is volatile.
2375 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2376 does not have the RTX_UNCHANGING_P bit set. */
2378 static inline unsigned
2379 canon_hash (rtx x
, enum machine_mode mode
)
2381 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2384 /* Like canon_hash but with no side effects, i.e. do_not_record
2385 and hash_arg_in_memory are not changed. */
2387 static inline unsigned
2388 safe_hash (rtx x
, enum machine_mode mode
)
2390 int dummy_do_not_record
;
2391 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2394 /* Return 1 iff X and Y would canonicalize into the same thing,
2395 without actually constructing the canonicalization of either one.
2396 If VALIDATE is nonzero,
2397 we assume X is an expression being processed from the rtl
2398 and Y was found in the hash table. We check register refs
2399 in Y for being marked as valid.
2401 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2404 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2410 /* Note: it is incorrect to assume an expression is equivalent to itself
2411 if VALIDATE is nonzero. */
2412 if (x
== y
&& !validate
)
2415 if (x
== 0 || y
== 0)
2418 code
= GET_CODE (x
);
2419 if (code
!= GET_CODE (y
))
2422 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2423 if (GET_MODE (x
) != GET_MODE (y
))
2434 return XEXP (x
, 0) == XEXP (y
, 0);
2437 return XSTR (x
, 0) == XSTR (y
, 0);
2441 return REGNO (x
) == REGNO (y
);
2444 unsigned int regno
= REGNO (y
);
2446 unsigned int endregno
2447 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2448 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2450 /* If the quantities are not the same, the expressions are not
2451 equivalent. If there are and we are not to validate, they
2452 are equivalent. Otherwise, ensure all regs are up-to-date. */
2454 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2460 for (i
= regno
; i
< endregno
; i
++)
2461 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2470 /* Can't merge two expressions in different alias sets, since we
2471 can decide that the expression is transparent in a block when
2472 it isn't, due to it being set with the different alias set. */
2473 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2476 /* A volatile mem should not be considered equivalent to any
2478 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2483 /* For commutative operations, check both orders. */
2491 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2493 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2494 validate
, for_gcse
))
2495 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2497 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2498 validate
, for_gcse
)));
2501 /* We don't use the generic code below because we want to
2502 disregard filename and line numbers. */
2504 /* A volatile asm isn't equivalent to any other. */
2505 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2508 if (GET_MODE (x
) != GET_MODE (y
)
2509 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2510 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2511 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2512 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2513 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2516 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2518 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2519 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2520 ASM_OPERANDS_INPUT (y
, i
),
2522 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2523 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2533 /* Compare the elements. If any pair of corresponding elements
2534 fail to match, return 0 for the whole thing. */
2536 fmt
= GET_RTX_FORMAT (code
);
2537 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2542 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2543 validate
, for_gcse
))
2548 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2550 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2551 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2552 validate
, for_gcse
))
2557 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2562 if (XINT (x
, i
) != XINT (y
, i
))
2567 if (XWINT (x
, i
) != XWINT (y
, i
))
2583 /* Return 1 if X has a value that can vary even between two
2584 executions of the program. 0 means X can be compared reliably
2585 against certain constants or near-constants. */
2588 cse_rtx_varies_p (rtx x
, int from_alias
)
2590 /* We need not check for X and the equivalence class being of the same
2591 mode because if X is equivalent to a constant in some mode, it
2592 doesn't vary in any mode. */
2595 && REGNO_QTY_VALID_P (REGNO (x
)))
2597 int x_q
= REG_QTY (REGNO (x
));
2598 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2600 if (GET_MODE (x
) == x_ent
->mode
2601 && x_ent
->const_rtx
!= NULL_RTX
)
2605 if (GET_CODE (x
) == PLUS
2606 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2607 && REG_P (XEXP (x
, 0))
2608 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2610 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2611 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2613 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2614 && x0_ent
->const_rtx
!= NULL_RTX
)
2618 /* This can happen as the result of virtual register instantiation, if
2619 the initial constant is too large to be a valid address. This gives
2620 us a three instruction sequence, load large offset into a register,
2621 load fp minus a constant into a register, then a MEM which is the
2622 sum of the two `constant' registers. */
2623 if (GET_CODE (x
) == PLUS
2624 && REG_P (XEXP (x
, 0))
2625 && REG_P (XEXP (x
, 1))
2626 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2627 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2629 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2630 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2631 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2632 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2634 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2635 && x0_ent
->const_rtx
!= NULL_RTX
2636 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2637 && x1_ent
->const_rtx
!= NULL_RTX
)
2641 return rtx_varies_p (x
, from_alias
);
2644 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2645 the result if necessary. INSN is as for canon_reg. */
2648 validate_canon_reg (rtx
*xloc
, rtx insn
)
2650 rtx
new = canon_reg (*xloc
, insn
);
2653 /* If replacing pseudo with hard reg or vice versa, ensure the
2654 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2655 if (insn
!= 0 && new != 0
2656 && REG_P (new) && REG_P (*xloc
)
2657 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2658 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2659 || GET_MODE (new) != GET_MODE (*xloc
)
2660 || (insn_code
= recog_memoized (insn
)) < 0
2661 || insn_data
[insn_code
].n_dups
> 0))
2662 validate_change (insn
, xloc
, new, 1);
2667 /* Canonicalize an expression:
2668 replace each register reference inside it
2669 with the "oldest" equivalent register.
2671 If INSN is nonzero and we are replacing a pseudo with a hard register
2672 or vice versa, validate_change is used to ensure that INSN remains valid
2673 after we make our substitution. The calls are made with IN_GROUP nonzero
2674 so apply_change_group must be called upon the outermost return from this
2675 function (unless INSN is zero). The result of apply_change_group can
2676 generally be discarded since the changes we are making are optional. */
2679 canon_reg (rtx x
, rtx insn
)
2688 code
= GET_CODE (x
);
2707 struct qty_table_elem
*ent
;
2709 /* Never replace a hard reg, because hard regs can appear
2710 in more than one machine mode, and we must preserve the mode
2711 of each occurrence. Also, some hard regs appear in
2712 MEMs that are shared and mustn't be altered. Don't try to
2713 replace any reg that maps to a reg of class NO_REGS. */
2714 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2715 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2718 q
= REG_QTY (REGNO (x
));
2719 ent
= &qty_table
[q
];
2720 first
= ent
->first_reg
;
2721 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2722 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2723 : gen_rtx_REG (ent
->mode
, first
));
2730 fmt
= GET_RTX_FORMAT (code
);
2731 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2736 validate_canon_reg (&XEXP (x
, i
), insn
);
2737 else if (fmt
[i
] == 'E')
2738 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2739 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2745 /* LOC is a location within INSN that is an operand address (the contents of
2746 a MEM). Find the best equivalent address to use that is valid for this
2749 On most CISC machines, complicated address modes are costly, and rtx_cost
2750 is a good approximation for that cost. However, most RISC machines have
2751 only a few (usually only one) memory reference formats. If an address is
2752 valid at all, it is often just as cheap as any other address. Hence, for
2753 RISC machines, we use `address_cost' to compare the costs of various
2754 addresses. For two addresses of equal cost, choose the one with the
2755 highest `rtx_cost' value as that has the potential of eliminating the
2756 most insns. For equal costs, we choose the first in the equivalence
2757 class. Note that we ignore the fact that pseudo registers are cheaper than
2758 hard registers here because we would also prefer the pseudo registers. */
2761 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2763 struct table_elt
*elt
;
2765 struct table_elt
*p
;
2766 int found_better
= 1;
2767 int save_do_not_record
= do_not_record
;
2768 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2773 /* Do not try to replace constant addresses or addresses of local and
2774 argument slots. These MEM expressions are made only once and inserted
2775 in many instructions, as well as being used to control symbol table
2776 output. It is not safe to clobber them.
2778 There are some uncommon cases where the address is already in a register
2779 for some reason, but we cannot take advantage of that because we have
2780 no easy way to unshare the MEM. In addition, looking up all stack
2781 addresses is costly. */
2782 if ((GET_CODE (addr
) == PLUS
2783 && REG_P (XEXP (addr
, 0))
2784 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2785 && (regno
= REGNO (XEXP (addr
, 0)),
2786 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2787 || regno
== ARG_POINTER_REGNUM
))
2789 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2790 || regno
== HARD_FRAME_POINTER_REGNUM
2791 || regno
== ARG_POINTER_REGNUM
))
2792 || CONSTANT_ADDRESS_P (addr
))
2795 /* If this address is not simply a register, try to fold it. This will
2796 sometimes simplify the expression. Many simplifications
2797 will not be valid, but some, usually applying the associative rule, will
2798 be valid and produce better code. */
2801 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2802 int addr_folded_cost
= address_cost (folded
, mode
);
2803 int addr_cost
= address_cost (addr
, mode
);
2805 if ((addr_folded_cost
< addr_cost
2806 || (addr_folded_cost
== addr_cost
2807 /* ??? The rtx_cost comparison is left over from an older
2808 version of this code. It is probably no longer helpful. */
2809 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2810 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2811 && validate_change (insn
, loc
, folded
, 0))
2815 /* If this address is not in the hash table, we can't look for equivalences
2816 of the whole address. Also, ignore if volatile. */
2819 hash
= HASH (addr
, Pmode
);
2820 addr_volatile
= do_not_record
;
2821 do_not_record
= save_do_not_record
;
2822 hash_arg_in_memory
= save_hash_arg_in_memory
;
2827 elt
= lookup (addr
, hash
, Pmode
);
2831 /* We need to find the best (under the criteria documented above) entry
2832 in the class that is valid. We use the `flag' field to indicate
2833 choices that were invalid and iterate until we can't find a better
2834 one that hasn't already been tried. */
2836 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2839 while (found_better
)
2841 int best_addr_cost
= address_cost (*loc
, mode
);
2842 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2844 struct table_elt
*best_elt
= elt
;
2847 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2851 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2852 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2853 || (exp_cost
== best_addr_cost
2854 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2857 best_addr_cost
= exp_cost
;
2858 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2865 if (validate_change (insn
, loc
,
2866 canon_reg (copy_rtx (best_elt
->exp
),
2875 /* If the address is a binary operation with the first operand a register
2876 and the second a constant, do the same as above, but looking for
2877 equivalences of the register. Then try to simplify before checking for
2878 the best address to use. This catches a few cases: First is when we
2879 have REG+const and the register is another REG+const. We can often merge
2880 the constants and eliminate one insn and one register. It may also be
2881 that a machine has a cheap REG+REG+const. Finally, this improves the
2882 code on the Alpha for unaligned byte stores. */
2884 if (flag_expensive_optimizations
2885 && ARITHMETIC_P (*loc
)
2886 && REG_P (XEXP (*loc
, 0)))
2888 rtx op1
= XEXP (*loc
, 1);
2891 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2892 do_not_record
= save_do_not_record
;
2893 hash_arg_in_memory
= save_hash_arg_in_memory
;
2895 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2899 /* We need to find the best (under the criteria documented above) entry
2900 in the class that is valid. We use the `flag' field to indicate
2901 choices that were invalid and iterate until we can't find a better
2902 one that hasn't already been tried. */
2904 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2907 while (found_better
)
2909 int best_addr_cost
= address_cost (*loc
, mode
);
2910 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2911 struct table_elt
*best_elt
= elt
;
2912 rtx best_rtx
= *loc
;
2915 /* This is at worst case an O(n^2) algorithm, so limit our search
2916 to the first 32 elements on the list. This avoids trouble
2917 compiling code with very long basic blocks that can easily
2918 call simplify_gen_binary so many times that we run out of
2922 for (p
= elt
->first_same_value
, count
= 0;
2924 p
= p
->next_same_value
, count
++)
2927 || exp_equiv_p (p
->exp
, p
->exp
, 1, false)))
2929 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
2932 new_cost
= address_cost (new, mode
);
2934 if (new_cost
< best_addr_cost
2935 || (new_cost
== best_addr_cost
2936 && (COST (new) + 1) >> 1 > best_rtx_cost
))
2939 best_addr_cost
= new_cost
;
2940 best_rtx_cost
= (COST (new) + 1) >> 1;
2948 if (validate_change (insn
, loc
,
2949 canon_reg (copy_rtx (best_rtx
),
2959 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2960 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2961 what values are being compared.
2963 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2964 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2965 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2966 compared to produce cc0.
2968 The return value is the comparison operator and is either the code of
2969 A or the code corresponding to the inverse of the comparison. */
2971 static enum rtx_code
2972 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2973 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2977 arg1
= *parg1
, arg2
= *parg2
;
2979 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2981 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2983 /* Set nonzero when we find something of interest. */
2985 int reverse_code
= 0;
2986 struct table_elt
*p
= 0;
2988 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2989 On machines with CC0, this is the only case that can occur, since
2990 fold_rtx will return the COMPARE or item being compared with zero
2993 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2996 /* If ARG1 is a comparison operator and CODE is testing for
2997 STORE_FLAG_VALUE, get the inner arguments. */
2999 else if (COMPARISON_P (arg1
))
3001 #ifdef FLOAT_STORE_FLAG_VALUE
3002 REAL_VALUE_TYPE fsfv
;
3006 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3007 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3008 #ifdef FLOAT_STORE_FLAG_VALUE
3009 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3010 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3011 REAL_VALUE_NEGATIVE (fsfv
)))
3016 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3017 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3018 #ifdef FLOAT_STORE_FLAG_VALUE
3019 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3020 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3021 REAL_VALUE_NEGATIVE (fsfv
)))
3024 x
= arg1
, reverse_code
= 1;
3027 /* ??? We could also check for
3029 (ne (and (eq (...) (const_int 1))) (const_int 0))
3031 and related forms, but let's wait until we see them occurring. */
3034 /* Look up ARG1 in the hash table and see if it has an equivalence
3035 that lets us see what is being compared. */
3036 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3039 p
= p
->first_same_value
;
3041 /* If what we compare is already known to be constant, that is as
3043 We need to break the loop in this case, because otherwise we
3044 can have an infinite loop when looking at a reg that is known
3045 to be a constant which is the same as a comparison of a reg
3046 against zero which appears later in the insn stream, which in
3047 turn is constant and the same as the comparison of the first reg
3053 for (; p
; p
= p
->next_same_value
)
3055 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3056 #ifdef FLOAT_STORE_FLAG_VALUE
3057 REAL_VALUE_TYPE fsfv
;
3060 /* If the entry isn't valid, skip it. */
3061 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3064 if (GET_CODE (p
->exp
) == COMPARE
3065 /* Another possibility is that this machine has a compare insn
3066 that includes the comparison code. In that case, ARG1 would
3067 be equivalent to a comparison operation that would set ARG1 to
3068 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3069 ORIG_CODE is the actual comparison being done; if it is an EQ,
3070 we must reverse ORIG_CODE. On machine with a negative value
3071 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3074 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3075 && (GET_MODE_BITSIZE (inner_mode
)
3076 <= HOST_BITS_PER_WIDE_INT
)
3077 && (STORE_FLAG_VALUE
3078 & ((HOST_WIDE_INT
) 1
3079 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3080 #ifdef FLOAT_STORE_FLAG_VALUE
3082 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3083 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3084 REAL_VALUE_NEGATIVE (fsfv
)))
3087 && COMPARISON_P (p
->exp
)))
3092 else if ((code
== EQ
3094 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3095 && (GET_MODE_BITSIZE (inner_mode
)
3096 <= HOST_BITS_PER_WIDE_INT
)
3097 && (STORE_FLAG_VALUE
3098 & ((HOST_WIDE_INT
) 1
3099 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3100 #ifdef FLOAT_STORE_FLAG_VALUE
3102 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3103 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3104 REAL_VALUE_NEGATIVE (fsfv
)))
3107 && COMPARISON_P (p
->exp
))
3114 /* If this non-trapping address, e.g. fp + constant, the
3115 equivalent is a better operand since it may let us predict
3116 the value of the comparison. */
3117 else if (!rtx_addr_can_trap_p (p
->exp
))
3124 /* If we didn't find a useful equivalence for ARG1, we are done.
3125 Otherwise, set up for the next iteration. */
3129 /* If we need to reverse the comparison, make sure that that is
3130 possible -- we can't necessarily infer the value of GE from LT
3131 with floating-point operands. */
3134 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3135 if (reversed
== UNKNOWN
)
3140 else if (COMPARISON_P (x
))
3141 code
= GET_CODE (x
);
3142 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3145 /* Return our results. Return the modes from before fold_rtx
3146 because fold_rtx might produce const_int, and then it's too late. */
3147 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3148 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3153 /* If X is a nontrivial arithmetic operation on an argument
3154 for which a constant value can be determined, return
3155 the result of operating on that value, as a constant.
3156 Otherwise, return X, possibly with one or more operands
3157 modified by recursive calls to this function.
3159 If X is a register whose contents are known, we do NOT
3160 return those contents here. equiv_constant is called to
3163 INSN is the insn that we may be modifying. If it is 0, make a copy
3164 of X before modifying it. */
3167 fold_rtx (rtx x
, rtx insn
)
3170 enum machine_mode mode
;
3177 /* Folded equivalents of first two operands of X. */
3181 /* Constant equivalents of first three operands of X;
3182 0 when no such equivalent is known. */
3187 /* The mode of the first operand of X. We need this for sign and zero
3189 enum machine_mode mode_arg0
;
3194 mode
= GET_MODE (x
);
3195 code
= GET_CODE (x
);
3205 /* No use simplifying an EXPR_LIST
3206 since they are used only for lists of args
3207 in a function call's REG_EQUAL note. */
3213 return prev_insn_cc0
;
3217 /* If the next insn is a CODE_LABEL followed by a jump table,
3218 PC's value is a LABEL_REF pointing to that label. That
3219 lets us fold switch statements on the VAX. */
3222 if (insn
&& tablejump_p (insn
, &next
, NULL
))
3223 return gen_rtx_LABEL_REF (Pmode
, next
);
3228 /* See if we previously assigned a constant value to this SUBREG. */
3229 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3230 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3233 /* If this is a paradoxical SUBREG, we have no idea what value the
3234 extra bits would have. However, if the operand is equivalent
3235 to a SUBREG whose operand is the same as our mode, and all the
3236 modes are within a word, we can just use the inner operand
3237 because these SUBREGs just say how to treat the register.
3239 Similarly if we find an integer constant. */
3241 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3243 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3244 struct table_elt
*elt
;
3246 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3247 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3248 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3250 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3252 if (CONSTANT_P (elt
->exp
)
3253 && GET_MODE (elt
->exp
) == VOIDmode
)
3256 if (GET_CODE (elt
->exp
) == SUBREG
3257 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3258 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3259 return copy_rtx (SUBREG_REG (elt
->exp
));
3265 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3266 We might be able to if the SUBREG is extracting a single word in an
3267 integral mode or extracting the low part. */
3269 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3270 const_arg0
= equiv_constant (folded_arg0
);
3272 folded_arg0
= const_arg0
;
3274 if (folded_arg0
!= SUBREG_REG (x
))
3276 new = simplify_subreg (mode
, folded_arg0
,
3277 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3282 if (REG_P (folded_arg0
)
3283 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3285 struct table_elt
*elt
;
3287 elt
= lookup (folded_arg0
,
3288 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3289 GET_MODE (folded_arg0
));
3292 elt
= elt
->first_same_value
;
3294 if (subreg_lowpart_p (x
))
3295 /* If this is a narrowing SUBREG and our operand is a REG, see
3296 if we can find an equivalence for REG that is an arithmetic
3297 operation in a wider mode where both operands are paradoxical
3298 SUBREGs from objects of our result mode. In that case, we
3299 couldn-t report an equivalent value for that operation, since we
3300 don't know what the extra bits will be. But we can find an
3301 equivalence for this SUBREG by folding that operation in the
3302 narrow mode. This allows us to fold arithmetic in narrow modes
3303 when the machine only supports word-sized arithmetic.
3305 Also look for a case where we have a SUBREG whose operand
3306 is the same as our result. If both modes are smaller
3307 than a word, we are simply interpreting a register in
3308 different modes and we can use the inner value. */
3310 for (; elt
; elt
= elt
->next_same_value
)
3312 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3314 /* Just check for unary and binary operations. */
3315 if (UNARY_P (elt
->exp
)
3316 && eltcode
!= SIGN_EXTEND
3317 && eltcode
!= ZERO_EXTEND
3318 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3319 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3320 && (GET_MODE_CLASS (mode
)
3321 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3323 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3325 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3326 op0
= fold_rtx (op0
, NULL_RTX
);
3328 op0
= equiv_constant (op0
);
3330 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3333 else if (ARITHMETIC_P (elt
->exp
)
3334 && eltcode
!= DIV
&& eltcode
!= MOD
3335 && eltcode
!= UDIV
&& eltcode
!= UMOD
3336 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3337 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3338 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3339 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3341 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3342 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3343 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3345 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3347 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3348 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3350 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3351 op0
= fold_rtx (op0
, NULL_RTX
);
3354 op0
= equiv_constant (op0
);
3356 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3357 op1
= fold_rtx (op1
, NULL_RTX
);
3360 op1
= equiv_constant (op1
);
3362 /* If we are looking for the low SImode part of
3363 (ashift:DI c (const_int 32)), it doesn't work
3364 to compute that in SImode, because a 32-bit shift
3365 in SImode is unpredictable. We know the value is 0. */
3367 && GET_CODE (elt
->exp
) == ASHIFT
3368 && GET_CODE (op1
) == CONST_INT
3369 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3372 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3373 /* If the count fits in the inner mode's width,
3374 but exceeds the outer mode's width,
3375 the value will get truncated to 0
3377 new = CONST0_RTX (mode
);
3379 /* If the count exceeds even the inner mode's width,
3380 don't fold this expression. */
3383 else if (op0
&& op1
)
3384 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
, op0
, op1
);
3387 else if (GET_CODE (elt
->exp
) == SUBREG
3388 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3389 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3391 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3392 new = copy_rtx (SUBREG_REG (elt
->exp
));
3398 /* A SUBREG resulting from a zero extension may fold to zero if
3399 it extracts higher bits than the ZERO_EXTEND's source bits.
3400 FIXME: if combine tried to, er, combine these instructions,
3401 this transformation may be moved to simplify_subreg. */
3402 for (; elt
; elt
= elt
->next_same_value
)
3404 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3406 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3407 return CONST0_RTX (mode
);
3415 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3416 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3417 new = lookup_as_function (XEXP (x
, 0), code
);
3419 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3423 /* If we are not actually processing an insn, don't try to find the
3424 best address. Not only don't we care, but we could modify the
3425 MEM in an invalid way since we have no insn to validate against. */
3427 find_best_addr (insn
, &XEXP (x
, 0), GET_MODE (x
));
3430 /* Even if we don't fold in the insn itself,
3431 we can safely do so here, in hopes of getting a constant. */
3432 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3434 HOST_WIDE_INT offset
= 0;
3437 && REGNO_QTY_VALID_P (REGNO (addr
)))
3439 int addr_q
= REG_QTY (REGNO (addr
));
3440 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3442 if (GET_MODE (addr
) == addr_ent
->mode
3443 && addr_ent
->const_rtx
!= NULL_RTX
)
3444 addr
= addr_ent
->const_rtx
;
3447 /* If address is constant, split it into a base and integer offset. */
3448 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3450 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3451 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3453 base
= XEXP (XEXP (addr
, 0), 0);
3454 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3456 else if (GET_CODE (addr
) == LO_SUM
3457 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3458 base
= XEXP (addr
, 1);
3460 /* If this is a constant pool reference, we can fold it into its
3461 constant to allow better value tracking. */
3462 if (base
&& GET_CODE (base
) == SYMBOL_REF
3463 && CONSTANT_POOL_ADDRESS_P (base
))
3465 rtx constant
= get_pool_constant (base
);
3466 enum machine_mode const_mode
= get_pool_mode (base
);
3469 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3471 constant_pool_entries_cost
= COST (constant
);
3472 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3475 /* If we are loading the full constant, we have an equivalence. */
3476 if (offset
== 0 && mode
== const_mode
)
3479 /* If this actually isn't a constant (weird!), we can't do
3480 anything. Otherwise, handle the two most common cases:
3481 extracting a word from a multi-word constant, and extracting
3482 the low-order bits. Other cases don't seem common enough to
3484 if (! CONSTANT_P (constant
))
3487 if (GET_MODE_CLASS (mode
) == MODE_INT
3488 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3489 && offset
% UNITS_PER_WORD
== 0
3490 && (new = operand_subword (constant
,
3491 offset
/ UNITS_PER_WORD
,
3492 0, const_mode
)) != 0)
3495 if (((BYTES_BIG_ENDIAN
3496 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3497 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3498 && (new = gen_lowpart (mode
, constant
)) != 0)
3502 /* If this is a reference to a label at a known position in a jump
3503 table, we also know its value. */
3504 if (base
&& GET_CODE (base
) == LABEL_REF
)
3506 rtx label
= XEXP (base
, 0);
3507 rtx table_insn
= NEXT_INSN (label
);
3509 if (table_insn
&& JUMP_P (table_insn
)
3510 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3512 rtx table
= PATTERN (table_insn
);
3515 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3516 < XVECLEN (table
, 0)))
3517 return XVECEXP (table
, 0,
3518 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3520 if (table_insn
&& JUMP_P (table_insn
)
3521 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3523 rtx table
= PATTERN (table_insn
);
3526 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3527 < XVECLEN (table
, 1)))
3529 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3530 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3533 if (GET_MODE (table
) != Pmode
)
3534 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3536 /* Indicate this is a constant. This isn't a
3537 valid form of CONST, but it will only be used
3538 to fold the next insns and then discarded, so
3541 Note this expression must be explicitly discarded,
3542 by cse_insn, else it may end up in a REG_EQUAL note
3543 and "escape" to cause problems elsewhere. */
3544 return gen_rtx_CONST (GET_MODE (new), new);
3552 #ifdef NO_FUNCTION_CSE
3554 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3560 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3561 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3562 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3572 mode_arg0
= VOIDmode
;
3574 /* Try folding our operands.
3575 Then see which ones have constant values known. */
3577 fmt
= GET_RTX_FORMAT (code
);
3578 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3581 rtx arg
= XEXP (x
, i
);
3582 rtx folded_arg
= arg
, const_arg
= 0;
3583 enum machine_mode mode_arg
= GET_MODE (arg
);
3584 rtx cheap_arg
, expensive_arg
;
3585 rtx replacements
[2];
3587 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3589 /* Most arguments are cheap, so handle them specially. */
3590 switch (GET_CODE (arg
))
3593 /* This is the same as calling equiv_constant; it is duplicated
3595 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3597 int arg_q
= REG_QTY (REGNO (arg
));
3598 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3600 if (arg_ent
->const_rtx
!= NULL_RTX
3601 && !REG_P (arg_ent
->const_rtx
)
3602 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3604 = gen_lowpart (GET_MODE (arg
),
3605 arg_ent
->const_rtx
);
3620 folded_arg
= prev_insn_cc0
;
3621 mode_arg
= prev_insn_cc0_mode
;
3622 const_arg
= equiv_constant (folded_arg
);
3627 folded_arg
= fold_rtx (arg
, insn
);
3628 const_arg
= equiv_constant (folded_arg
);
3631 /* For the first three operands, see if the operand
3632 is constant or equivalent to a constant. */
3636 folded_arg0
= folded_arg
;
3637 const_arg0
= const_arg
;
3638 mode_arg0
= mode_arg
;
3641 folded_arg1
= folded_arg
;
3642 const_arg1
= const_arg
;
3645 const_arg2
= const_arg
;
3649 /* Pick the least expensive of the folded argument and an
3650 equivalent constant argument. */
3651 if (const_arg
== 0 || const_arg
== folded_arg
3652 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3653 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3655 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3657 /* Try to replace the operand with the cheapest of the two
3658 possibilities. If it doesn't work and this is either of the first
3659 two operands of a commutative operation, try swapping them.
3660 If THAT fails, try the more expensive, provided it is cheaper
3661 than what is already there. */
3663 if (cheap_arg
== XEXP (x
, i
))
3666 if (insn
== 0 && ! copied
)
3672 /* Order the replacements from cheapest to most expensive. */
3673 replacements
[0] = cheap_arg
;
3674 replacements
[1] = expensive_arg
;
3676 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3678 int new_cost
= COST_IN (replacements
[j
], code
);
3680 /* Stop if what existed before was cheaper. Prefer constants
3681 in the case of a tie. */
3682 if (new_cost
> old_cost
3683 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3686 /* It's not safe to substitute the operand of a conversion
3687 operator with a constant, as the conversion's identity
3688 depends upon the mode of it's operand. This optimization
3689 is handled by the call to simplify_unary_operation. */
3690 if (GET_RTX_CLASS (code
) == RTX_UNARY
3691 && GET_MODE (replacements
[j
]) != mode_arg0
3692 && (code
== ZERO_EXTEND
3693 || code
== SIGN_EXTEND
3695 || code
== FLOAT_TRUNCATE
3696 || code
== FLOAT_EXTEND
3699 || code
== UNSIGNED_FLOAT
3700 || code
== UNSIGNED_FIX
))
3703 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3706 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3707 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3709 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3710 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3712 if (apply_change_group ())
3714 /* Swap them back to be invalid so that this loop can
3715 continue and flag them to be swapped back later. */
3718 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3730 /* Don't try to fold inside of a vector of expressions.
3731 Doing nothing is harmless. */
3735 /* If a commutative operation, place a constant integer as the second
3736 operand unless the first operand is also a constant integer. Otherwise,
3737 place any constant second unless the first operand is also a constant. */
3739 if (COMMUTATIVE_P (x
))
3742 || swap_commutative_operands_p (const_arg0
? const_arg0
3744 const_arg1
? const_arg1
3747 rtx tem
= XEXP (x
, 0);
3749 if (insn
== 0 && ! copied
)
3755 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3756 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3757 if (apply_change_group ())
3759 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3760 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3765 /* If X is an arithmetic operation, see if we can simplify it. */
3767 switch (GET_RTX_CLASS (code
))
3773 /* We can't simplify extension ops unless we know the
3775 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3776 && mode_arg0
== VOIDmode
)
3779 /* If we had a CONST, strip it off and put it back later if we
3781 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3782 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3784 new = simplify_unary_operation (code
, mode
,
3785 const_arg0
? const_arg0
: folded_arg0
,
3787 if (new != 0 && is_const
)
3788 new = gen_rtx_CONST (mode
, new);
3793 case RTX_COMM_COMPARE
:
3794 /* See what items are actually being compared and set FOLDED_ARG[01]
3795 to those values and CODE to the actual comparison code. If any are
3796 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3797 do anything if both operands are already known to be constant. */
3799 if (const_arg0
== 0 || const_arg1
== 0)
3801 struct table_elt
*p0
, *p1
;
3802 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3803 enum machine_mode mode_arg1
;
3805 #ifdef FLOAT_STORE_FLAG_VALUE
3806 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3808 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3809 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3810 false_rtx
= CONST0_RTX (mode
);
3814 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3815 &mode_arg0
, &mode_arg1
);
3816 const_arg0
= equiv_constant (folded_arg0
);
3817 const_arg1
= equiv_constant (folded_arg1
);
3819 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3820 what kinds of things are being compared, so we can't do
3821 anything with this comparison. */
3823 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3826 /* If we do not now have two constants being compared, see
3827 if we can nevertheless deduce some things about the
3829 if (const_arg0
== 0 || const_arg1
== 0)
3831 /* Some addresses are known to be nonzero. We don't know
3832 their sign, but equality comparisons are known. */
3833 if (const_arg1
== const0_rtx
3834 && nonzero_address_p (folded_arg0
))
3838 else if (code
== NE
)
3842 /* See if the two operands are the same. */
3844 if (folded_arg0
== folded_arg1
3845 || (REG_P (folded_arg0
)
3846 && REG_P (folded_arg1
)
3847 && (REG_QTY (REGNO (folded_arg0
))
3848 == REG_QTY (REGNO (folded_arg1
))))
3849 || ((p0
= lookup (folded_arg0
,
3850 SAFE_HASH (folded_arg0
, mode_arg0
),
3852 && (p1
= lookup (folded_arg1
,
3853 SAFE_HASH (folded_arg1
, mode_arg0
),
3855 && p0
->first_same_value
== p1
->first_same_value
))
3857 /* Sadly two equal NaNs are not equivalent. */
3858 if (!HONOR_NANS (mode_arg0
))
3859 return ((code
== EQ
|| code
== LE
|| code
== GE
3860 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3861 || code
== UNLE
|| code
== UNGE
3863 ? true_rtx
: false_rtx
);
3864 /* Take care for the FP compares we can resolve. */
3865 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3867 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3871 /* If FOLDED_ARG0 is a register, see if the comparison we are
3872 doing now is either the same as we did before or the reverse
3873 (we only check the reverse if not floating-point). */
3874 else if (REG_P (folded_arg0
))
3876 int qty
= REG_QTY (REGNO (folded_arg0
));
3878 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3880 struct qty_table_elem
*ent
= &qty_table
[qty
];
3882 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3883 || (! FLOAT_MODE_P (mode_arg0
)
3884 && comparison_dominates_p (ent
->comparison_code
,
3885 reverse_condition (code
))))
3886 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3888 && rtx_equal_p (ent
->comparison_const
,
3890 || (REG_P (folded_arg1
)
3891 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3892 return (comparison_dominates_p (ent
->comparison_code
, code
)
3893 ? true_rtx
: false_rtx
);
3899 /* If we are comparing against zero, see if the first operand is
3900 equivalent to an IOR with a constant. If so, we may be able to
3901 determine the result of this comparison. */
3903 if (const_arg1
== const0_rtx
)
3905 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3909 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3910 && GET_CODE (inner_const
) == CONST_INT
3911 && INTVAL (inner_const
) != 0)
3913 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
3914 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
3915 && (INTVAL (inner_const
)
3916 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
3917 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3919 #ifdef FLOAT_STORE_FLAG_VALUE
3920 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3922 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3923 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3924 false_rtx
= CONST0_RTX (mode
);
3949 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3950 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3951 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3956 case RTX_COMM_ARITH
:
3960 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3961 with that LABEL_REF as its second operand. If so, the result is
3962 the first operand of that MINUS. This handles switches with an
3963 ADDR_DIFF_VEC table. */
3964 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3967 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3968 : lookup_as_function (folded_arg0
, MINUS
);
3970 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3971 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3974 /* Now try for a CONST of a MINUS like the above. */
3975 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3976 : lookup_as_function (folded_arg0
, CONST
))) != 0
3977 && GET_CODE (XEXP (y
, 0)) == MINUS
3978 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3979 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3980 return XEXP (XEXP (y
, 0), 0);
3983 /* Likewise if the operands are in the other order. */
3984 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3987 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3988 : lookup_as_function (folded_arg1
, MINUS
);
3990 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3991 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3994 /* Now try for a CONST of a MINUS like the above. */
3995 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3996 : lookup_as_function (folded_arg1
, CONST
))) != 0
3997 && GET_CODE (XEXP (y
, 0)) == MINUS
3998 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3999 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4000 return XEXP (XEXP (y
, 0), 0);
4003 /* If second operand is a register equivalent to a negative
4004 CONST_INT, see if we can find a register equivalent to the
4005 positive constant. Make a MINUS if so. Don't do this for
4006 a non-negative constant since we might then alternate between
4007 choosing positive and negative constants. Having the positive
4008 constant previously-used is the more common case. Be sure
4009 the resulting constant is non-negative; if const_arg1 were
4010 the smallest negative number this would overflow: depending
4011 on the mode, this would either just be the same value (and
4012 hence not save anything) or be incorrect. */
4013 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4014 && INTVAL (const_arg1
) < 0
4015 /* This used to test
4017 -INTVAL (const_arg1) >= 0
4019 But The Sun V5.0 compilers mis-compiled that test. So
4020 instead we test for the problematic value in a more direct
4021 manner and hope the Sun compilers get it correct. */
4022 && INTVAL (const_arg1
) !=
4023 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4024 && REG_P (folded_arg1
))
4026 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4028 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4031 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4033 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4034 canon_reg (p
->exp
, NULL_RTX
));
4039 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4040 If so, produce (PLUS Z C2-C). */
4041 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4043 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4044 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4045 return fold_rtx (plus_constant (copy_rtx (y
),
4046 -INTVAL (const_arg1
)),
4053 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4054 case IOR
: case AND
: case XOR
:
4056 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4057 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4058 is known to be of similar form, we may be able to replace the
4059 operation with a combined operation. This may eliminate the
4060 intermediate operation if every use is simplified in this way.
4061 Note that the similar optimization done by combine.c only works
4062 if the intermediate operation's result has only one reference. */
4064 if (REG_P (folded_arg0
)
4065 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4068 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4069 rtx y
= lookup_as_function (folded_arg0
, code
);
4071 enum rtx_code associate_code
;
4075 || 0 == (inner_const
4076 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4077 || GET_CODE (inner_const
) != CONST_INT
4078 /* If we have compiled a statement like
4079 "if (x == (x & mask1))", and now are looking at
4080 "x & mask2", we will have a case where the first operand
4081 of Y is the same as our first operand. Unless we detect
4082 this case, an infinite loop will result. */
4083 || XEXP (y
, 0) == folded_arg0
)
4086 /* Don't associate these operations if they are a PLUS with the
4087 same constant and it is a power of two. These might be doable
4088 with a pre- or post-increment. Similarly for two subtracts of
4089 identical powers of two with post decrement. */
4091 if (code
== PLUS
&& const_arg1
== inner_const
4092 && ((HAVE_PRE_INCREMENT
4093 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4094 || (HAVE_POST_INCREMENT
4095 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4096 || (HAVE_PRE_DECREMENT
4097 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4098 || (HAVE_POST_DECREMENT
4099 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4102 /* Compute the code used to compose the constants. For example,
4103 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4105 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4107 new_const
= simplify_binary_operation (associate_code
, mode
,
4108 const_arg1
, inner_const
);
4113 /* If we are associating shift operations, don't let this
4114 produce a shift of the size of the object or larger.
4115 This could occur when we follow a sign-extend by a right
4116 shift on a machine that does a sign-extend as a pair
4119 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4120 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4122 /* As an exception, we can turn an ASHIFTRT of this
4123 form into a shift of the number of bits - 1. */
4124 if (code
== ASHIFTRT
)
4125 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4130 y
= copy_rtx (XEXP (y
, 0));
4132 /* If Y contains our first operand (the most common way this
4133 can happen is if Y is a MEM), we would do into an infinite
4134 loop if we tried to fold it. So don't in that case. */
4136 if (! reg_mentioned_p (folded_arg0
, y
))
4137 y
= fold_rtx (y
, insn
);
4139 return simplify_gen_binary (code
, mode
, y
, new_const
);
4143 case DIV
: case UDIV
:
4144 /* ??? The associative optimization performed immediately above is
4145 also possible for DIV and UDIV using associate_code of MULT.
4146 However, we would need extra code to verify that the
4147 multiplication does not overflow, that is, there is no overflow
4148 in the calculation of new_const. */
4155 new = simplify_binary_operation (code
, mode
,
4156 const_arg0
? const_arg0
: folded_arg0
,
4157 const_arg1
? const_arg1
: folded_arg1
);
4161 /* (lo_sum (high X) X) is simply X. */
4162 if (code
== LO_SUM
&& const_arg0
!= 0
4163 && GET_CODE (const_arg0
) == HIGH
4164 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4169 case RTX_BITFIELD_OPS
:
4170 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4171 const_arg0
? const_arg0
: folded_arg0
,
4172 const_arg1
? const_arg1
: folded_arg1
,
4173 const_arg2
? const_arg2
: XEXP (x
, 2));
4180 return new ? new : x
;
4183 /* Return a constant value currently equivalent to X.
4184 Return 0 if we don't know one. */
4187 equiv_constant (rtx x
)
4190 && REGNO_QTY_VALID_P (REGNO (x
)))
4192 int x_q
= REG_QTY (REGNO (x
));
4193 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4195 if (x_ent
->const_rtx
)
4196 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4199 if (x
== 0 || CONSTANT_P (x
))
4202 /* If X is a MEM, try to fold it outside the context of any insn to see if
4203 it might be equivalent to a constant. That handles the case where it
4204 is a constant-pool reference. Then try to look it up in the hash table
4205 in case it is something whose value we have seen before. */
4209 struct table_elt
*elt
;
4211 x
= fold_rtx (x
, NULL_RTX
);
4215 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4219 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4220 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4227 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4228 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4229 least-significant part of X.
4230 MODE specifies how big a part of X to return.
4232 If the requested operation cannot be done, 0 is returned.
4234 This is similar to gen_lowpart_general in emit-rtl.c. */
4237 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4239 rtx result
= gen_lowpart_common (mode
, x
);
4245 /* This is the only other case we handle. */
4249 if (WORDS_BIG_ENDIAN
)
4250 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4251 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4252 if (BYTES_BIG_ENDIAN
)
4253 /* Adjust the address so that the address-after-the-data is
4255 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4256 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4258 new = adjust_address_nv (x
, mode
, offset
);
4259 if (! memory_address_p (mode
, XEXP (new, 0)))
4268 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4269 branch. It will be zero if not.
4271 In certain cases, this can cause us to add an equivalence. For example,
4272 if we are following the taken case of
4274 we can add the fact that `i' and '2' are now equivalent.
4276 In any case, we can record that this comparison was passed. If the same
4277 comparison is seen later, we will know its value. */
4280 record_jump_equiv (rtx insn
, int taken
)
4282 int cond_known_true
;
4285 enum machine_mode mode
, mode0
, mode1
;
4286 int reversed_nonequality
= 0;
4289 /* Ensure this is the right kind of insn. */
4290 if (! any_condjump_p (insn
))
4292 set
= pc_set (insn
);
4294 /* See if this jump condition is known true or false. */
4296 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4298 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4300 /* Get the type of comparison being done and the operands being compared.
4301 If we had to reverse a non-equality condition, record that fact so we
4302 know that it isn't valid for floating-point. */
4303 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4304 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4305 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4307 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4308 if (! cond_known_true
)
4310 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4312 /* Don't remember if we can't find the inverse. */
4313 if (code
== UNKNOWN
)
4317 /* The mode is the mode of the non-constant. */
4319 if (mode1
!= VOIDmode
)
4322 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4325 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4326 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4327 Make any useful entries we can with that information. Called from
4328 above function and called recursively. */
4331 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4332 rtx op1
, int reversed_nonequality
)
4334 unsigned op0_hash
, op1_hash
;
4335 int op0_in_memory
, op1_in_memory
;
4336 struct table_elt
*op0_elt
, *op1_elt
;
4338 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4339 we know that they are also equal in the smaller mode (this is also
4340 true for all smaller modes whether or not there is a SUBREG, but
4341 is not worth testing for with no SUBREG). */
4343 /* Note that GET_MODE (op0) may not equal MODE. */
4344 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4345 && (GET_MODE_SIZE (GET_MODE (op0
))
4346 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4348 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4349 rtx tem
= gen_lowpart (inner_mode
, op1
);
4351 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4352 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4353 reversed_nonequality
);
4356 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4357 && (GET_MODE_SIZE (GET_MODE (op1
))
4358 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4360 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4361 rtx tem
= gen_lowpart (inner_mode
, op0
);
4363 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4364 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4365 reversed_nonequality
);
4368 /* Similarly, if this is an NE comparison, and either is a SUBREG
4369 making a smaller mode, we know the whole thing is also NE. */
4371 /* Note that GET_MODE (op0) may not equal MODE;
4372 if we test MODE instead, we can get an infinite recursion
4373 alternating between two modes each wider than MODE. */
4375 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4376 && subreg_lowpart_p (op0
)
4377 && (GET_MODE_SIZE (GET_MODE (op0
))
4378 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4380 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4381 rtx tem
= gen_lowpart (inner_mode
, op1
);
4383 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4384 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4385 reversed_nonequality
);
4388 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4389 && subreg_lowpart_p (op1
)
4390 && (GET_MODE_SIZE (GET_MODE (op1
))
4391 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4393 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4394 rtx tem
= gen_lowpart (inner_mode
, op0
);
4396 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4397 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4398 reversed_nonequality
);
4401 /* Hash both operands. */
4404 hash_arg_in_memory
= 0;
4405 op0_hash
= HASH (op0
, mode
);
4406 op0_in_memory
= hash_arg_in_memory
;
4412 hash_arg_in_memory
= 0;
4413 op1_hash
= HASH (op1
, mode
);
4414 op1_in_memory
= hash_arg_in_memory
;
4419 /* Look up both operands. */
4420 op0_elt
= lookup (op0
, op0_hash
, mode
);
4421 op1_elt
= lookup (op1
, op1_hash
, mode
);
4423 /* If both operands are already equivalent or if they are not in the
4424 table but are identical, do nothing. */
4425 if ((op0_elt
!= 0 && op1_elt
!= 0
4426 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4427 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4430 /* If we aren't setting two things equal all we can do is save this
4431 comparison. Similarly if this is floating-point. In the latter
4432 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4433 If we record the equality, we might inadvertently delete code
4434 whose intent was to change -0 to +0. */
4436 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4438 struct qty_table_elem
*ent
;
4441 /* If we reversed a floating-point comparison, if OP0 is not a
4442 register, or if OP1 is neither a register or constant, we can't
4446 op1
= equiv_constant (op1
);
4448 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4449 || !REG_P (op0
) || op1
== 0)
4452 /* Put OP0 in the hash table if it isn't already. This gives it a
4453 new quantity number. */
4456 if (insert_regs (op0
, NULL
, 0))
4458 rehash_using_reg (op0
);
4459 op0_hash
= HASH (op0
, mode
);
4461 /* If OP0 is contained in OP1, this changes its hash code
4462 as well. Faster to rehash than to check, except
4463 for the simple case of a constant. */
4464 if (! CONSTANT_P (op1
))
4465 op1_hash
= HASH (op1
,mode
);
4468 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4469 op0_elt
->in_memory
= op0_in_memory
;
4472 qty
= REG_QTY (REGNO (op0
));
4473 ent
= &qty_table
[qty
];
4475 ent
->comparison_code
= code
;
4478 /* Look it up again--in case op0 and op1 are the same. */
4479 op1_elt
= lookup (op1
, op1_hash
, mode
);
4481 /* Put OP1 in the hash table so it gets a new quantity number. */
4484 if (insert_regs (op1
, NULL
, 0))
4486 rehash_using_reg (op1
);
4487 op1_hash
= HASH (op1
, mode
);
4490 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4491 op1_elt
->in_memory
= op1_in_memory
;
4494 ent
->comparison_const
= NULL_RTX
;
4495 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4499 ent
->comparison_const
= op1
;
4500 ent
->comparison_qty
= -1;
4506 /* If either side is still missing an equivalence, make it now,
4507 then merge the equivalences. */
4511 if (insert_regs (op0
, NULL
, 0))
4513 rehash_using_reg (op0
);
4514 op0_hash
= HASH (op0
, mode
);
4517 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4518 op0_elt
->in_memory
= op0_in_memory
;
4523 if (insert_regs (op1
, NULL
, 0))
4525 rehash_using_reg (op1
);
4526 op1_hash
= HASH (op1
, mode
);
4529 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4530 op1_elt
->in_memory
= op1_in_memory
;
4533 merge_equiv_classes (op0_elt
, op1_elt
);
4536 /* CSE processing for one instruction.
4537 First simplify sources and addresses of all assignments
4538 in the instruction, using previously-computed equivalents values.
4539 Then install the new sources and destinations in the table
4540 of available values.
4542 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4543 the insn. It means that INSN is inside libcall block. In this
4544 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4546 /* Data on one SET contained in the instruction. */
4550 /* The SET rtx itself. */
4552 /* The SET_SRC of the rtx (the original value, if it is changing). */
4554 /* The hash-table element for the SET_SRC of the SET. */
4555 struct table_elt
*src_elt
;
4556 /* Hash value for the SET_SRC. */
4558 /* Hash value for the SET_DEST. */
4560 /* The SET_DEST, with SUBREG, etc., stripped. */
4562 /* Nonzero if the SET_SRC is in memory. */
4564 /* Nonzero if the SET_SRC contains something
4565 whose value cannot be predicted and understood. */
4567 /* Original machine mode, in case it becomes a CONST_INT.
4568 The size of this field should match the size of the mode
4569 field of struct rtx_def (see rtl.h). */
4570 ENUM_BITFIELD(machine_mode
) mode
: 8;
4571 /* A constant equivalent for SET_SRC, if any. */
4573 /* Original SET_SRC value used for libcall notes. */
4575 /* Hash value of constant equivalent for SET_SRC. */
4576 unsigned src_const_hash
;
4577 /* Table entry for constant equivalent for SET_SRC, if any. */
4578 struct table_elt
*src_const_elt
;
4582 cse_insn (rtx insn
, rtx libcall_insn
)
4584 rtx x
= PATTERN (insn
);
4590 /* Records what this insn does to set CC0. */
4591 rtx this_insn_cc0
= 0;
4592 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4596 struct table_elt
*src_eqv_elt
= 0;
4597 int src_eqv_volatile
= 0;
4598 int src_eqv_in_memory
= 0;
4599 unsigned src_eqv_hash
= 0;
4601 struct set
*sets
= (struct set
*) 0;
4605 /* Find all the SETs and CLOBBERs in this instruction.
4606 Record all the SETs in the array `set' and count them.
4607 Also determine whether there is a CLOBBER that invalidates
4608 all memory references, or all references at varying addresses. */
4612 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4614 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4615 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4616 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4620 if (GET_CODE (x
) == SET
)
4622 sets
= alloca (sizeof (struct set
));
4625 /* Ignore SETs that are unconditional jumps.
4626 They never need cse processing, so this does not hurt.
4627 The reason is not efficiency but rather
4628 so that we can test at the end for instructions
4629 that have been simplified to unconditional jumps
4630 and not be misled by unchanged instructions
4631 that were unconditional jumps to begin with. */
4632 if (SET_DEST (x
) == pc_rtx
4633 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4636 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4637 The hard function value register is used only once, to copy to
4638 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4639 Ensure we invalidate the destination register. On the 80386 no
4640 other code would invalidate it since it is a fixed_reg.
4641 We need not check the return of apply_change_group; see canon_reg. */
4643 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4645 canon_reg (SET_SRC (x
), insn
);
4646 apply_change_group ();
4647 fold_rtx (SET_SRC (x
), insn
);
4648 invalidate (SET_DEST (x
), VOIDmode
);
4653 else if (GET_CODE (x
) == PARALLEL
)
4655 int lim
= XVECLEN (x
, 0);
4657 sets
= alloca (lim
* sizeof (struct set
));
4659 /* Find all regs explicitly clobbered in this insn,
4660 and ensure they are not replaced with any other regs
4661 elsewhere in this insn.
4662 When a reg that is clobbered is also used for input,
4663 we should presume that that is for a reason,
4664 and we should not substitute some other register
4665 which is not supposed to be clobbered.
4666 Therefore, this loop cannot be merged into the one below
4667 because a CALL may precede a CLOBBER and refer to the
4668 value clobbered. We must not let a canonicalization do
4669 anything in that case. */
4670 for (i
= 0; i
< lim
; i
++)
4672 rtx y
= XVECEXP (x
, 0, i
);
4673 if (GET_CODE (y
) == CLOBBER
)
4675 rtx clobbered
= XEXP (y
, 0);
4677 if (REG_P (clobbered
)
4678 || GET_CODE (clobbered
) == SUBREG
)
4679 invalidate (clobbered
, VOIDmode
);
4680 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4681 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4682 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4686 for (i
= 0; i
< lim
; i
++)
4688 rtx y
= XVECEXP (x
, 0, i
);
4689 if (GET_CODE (y
) == SET
)
4691 /* As above, we ignore unconditional jumps and call-insns and
4692 ignore the result of apply_change_group. */
4693 if (GET_CODE (SET_SRC (y
)) == CALL
)
4695 canon_reg (SET_SRC (y
), insn
);
4696 apply_change_group ();
4697 fold_rtx (SET_SRC (y
), insn
);
4698 invalidate (SET_DEST (y
), VOIDmode
);
4700 else if (SET_DEST (y
) == pc_rtx
4701 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4704 sets
[n_sets
++].rtl
= y
;
4706 else if (GET_CODE (y
) == CLOBBER
)
4708 /* If we clobber memory, canon the address.
4709 This does nothing when a register is clobbered
4710 because we have already invalidated the reg. */
4711 if (MEM_P (XEXP (y
, 0)))
4712 canon_reg (XEXP (y
, 0), NULL_RTX
);
4714 else if (GET_CODE (y
) == USE
4715 && ! (REG_P (XEXP (y
, 0))
4716 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4717 canon_reg (y
, NULL_RTX
);
4718 else if (GET_CODE (y
) == CALL
)
4720 /* The result of apply_change_group can be ignored; see
4722 canon_reg (y
, insn
);
4723 apply_change_group ();
4728 else if (GET_CODE (x
) == CLOBBER
)
4730 if (MEM_P (XEXP (x
, 0)))
4731 canon_reg (XEXP (x
, 0), NULL_RTX
);
4734 /* Canonicalize a USE of a pseudo register or memory location. */
4735 else if (GET_CODE (x
) == USE
4736 && ! (REG_P (XEXP (x
, 0))
4737 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4738 canon_reg (XEXP (x
, 0), NULL_RTX
);
4739 else if (GET_CODE (x
) == CALL
)
4741 /* The result of apply_change_group can be ignored; see canon_reg. */
4742 canon_reg (x
, insn
);
4743 apply_change_group ();
4747 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4748 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4749 is handled specially for this case, and if it isn't set, then there will
4750 be no equivalence for the destination. */
4751 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4752 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4753 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4754 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4756 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4757 XEXP (tem
, 0) = src_eqv
;
4760 /* Canonicalize sources and addresses of destinations.
4761 We do this in a separate pass to avoid problems when a MATCH_DUP is
4762 present in the insn pattern. In that case, we want to ensure that
4763 we don't break the duplicate nature of the pattern. So we will replace
4764 both operands at the same time. Otherwise, we would fail to find an
4765 equivalent substitution in the loop calling validate_change below.
4767 We used to suppress canonicalization of DEST if it appears in SRC,
4768 but we don't do this any more. */
4770 for (i
= 0; i
< n_sets
; i
++)
4772 rtx dest
= SET_DEST (sets
[i
].rtl
);
4773 rtx src
= SET_SRC (sets
[i
].rtl
);
4774 rtx
new = canon_reg (src
, insn
);
4777 sets
[i
].orig_src
= src
;
4778 if ((REG_P (new) && REG_P (src
)
4779 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4780 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4781 || (insn_code
= recog_memoized (insn
)) < 0
4782 || insn_data
[insn_code
].n_dups
> 0)
4783 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4785 SET_SRC (sets
[i
].rtl
) = new;
4787 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
4789 validate_change (insn
, &XEXP (dest
, 1),
4790 canon_reg (XEXP (dest
, 1), insn
), 1);
4791 validate_change (insn
, &XEXP (dest
, 2),
4792 canon_reg (XEXP (dest
, 2), insn
), 1);
4795 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
4796 || GET_CODE (dest
) == ZERO_EXTRACT
4797 || GET_CODE (dest
) == SIGN_EXTRACT
)
4798 dest
= XEXP (dest
, 0);
4801 canon_reg (dest
, insn
);
4804 /* Now that we have done all the replacements, we can apply the change
4805 group and see if they all work. Note that this will cause some
4806 canonicalizations that would have worked individually not to be applied
4807 because some other canonicalization didn't work, but this should not
4810 The result of apply_change_group can be ignored; see canon_reg. */
4812 apply_change_group ();
4814 /* Set sets[i].src_elt to the class each source belongs to.
4815 Detect assignments from or to volatile things
4816 and set set[i] to zero so they will be ignored
4817 in the rest of this function.
4819 Nothing in this loop changes the hash table or the register chains. */
4821 for (i
= 0; i
< n_sets
; i
++)
4825 struct table_elt
*elt
= 0, *p
;
4826 enum machine_mode mode
;
4829 rtx src_related
= 0;
4830 struct table_elt
*src_const_elt
= 0;
4831 int src_cost
= MAX_COST
;
4832 int src_eqv_cost
= MAX_COST
;
4833 int src_folded_cost
= MAX_COST
;
4834 int src_related_cost
= MAX_COST
;
4835 int src_elt_cost
= MAX_COST
;
4836 int src_regcost
= MAX_COST
;
4837 int src_eqv_regcost
= MAX_COST
;
4838 int src_folded_regcost
= MAX_COST
;
4839 int src_related_regcost
= MAX_COST
;
4840 int src_elt_regcost
= MAX_COST
;
4841 /* Set nonzero if we need to call force_const_mem on with the
4842 contents of src_folded before using it. */
4843 int src_folded_force_flag
= 0;
4845 dest
= SET_DEST (sets
[i
].rtl
);
4846 src
= SET_SRC (sets
[i
].rtl
);
4848 /* If SRC is a constant that has no machine mode,
4849 hash it with the destination's machine mode.
4850 This way we can keep different modes separate. */
4852 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4853 sets
[i
].mode
= mode
;
4857 enum machine_mode eqvmode
= mode
;
4858 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4859 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4861 hash_arg_in_memory
= 0;
4862 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4864 /* Find the equivalence class for the equivalent expression. */
4867 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4869 src_eqv_volatile
= do_not_record
;
4870 src_eqv_in_memory
= hash_arg_in_memory
;
4873 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4874 value of the INNER register, not the destination. So it is not
4875 a valid substitution for the source. But save it for later. */
4876 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4879 src_eqv_here
= src_eqv
;
4881 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4882 simplified result, which may not necessarily be valid. */
4883 src_folded
= fold_rtx (src
, insn
);
4886 /* ??? This caused bad code to be generated for the m68k port with -O2.
4887 Suppose src is (CONST_INT -1), and that after truncation src_folded
4888 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4889 At the end we will add src and src_const to the same equivalence
4890 class. We now have 3 and -1 on the same equivalence class. This
4891 causes later instructions to be mis-optimized. */
4892 /* If storing a constant in a bitfield, pre-truncate the constant
4893 so we will be able to record it later. */
4894 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
4895 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
4897 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4899 if (GET_CODE (src
) == CONST_INT
4900 && GET_CODE (width
) == CONST_INT
4901 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4902 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4904 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4905 << INTVAL (width
)) - 1));
4909 /* Compute SRC's hash code, and also notice if it
4910 should not be recorded at all. In that case,
4911 prevent any further processing of this assignment. */
4913 hash_arg_in_memory
= 0;
4916 sets
[i
].src_hash
= HASH (src
, mode
);
4917 sets
[i
].src_volatile
= do_not_record
;
4918 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4920 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4921 a pseudo, do not record SRC. Using SRC as a replacement for
4922 anything else will be incorrect in that situation. Note that
4923 this usually occurs only for stack slots, in which case all the
4924 RTL would be referring to SRC, so we don't lose any optimization
4925 opportunities by not having SRC in the hash table. */
4928 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4930 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4931 sets
[i
].src_volatile
= 1;
4934 /* It is no longer clear why we used to do this, but it doesn't
4935 appear to still be needed. So let's try without it since this
4936 code hurts cse'ing widened ops. */
4937 /* If source is a paradoxical subreg (such as QI treated as an SI),
4938 treat it as volatile. It may do the work of an SI in one context
4939 where the extra bits are not being used, but cannot replace an SI
4941 if (GET_CODE (src
) == SUBREG
4942 && (GET_MODE_SIZE (GET_MODE (src
))
4943 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
4944 sets
[i
].src_volatile
= 1;
4947 /* Locate all possible equivalent forms for SRC. Try to replace
4948 SRC in the insn with each cheaper equivalent.
4950 We have the following types of equivalents: SRC itself, a folded
4951 version, a value given in a REG_EQUAL note, or a value related
4954 Each of these equivalents may be part of an additional class
4955 of equivalents (if more than one is in the table, they must be in
4956 the same class; we check for this).
4958 If the source is volatile, we don't do any table lookups.
4960 We note any constant equivalent for possible later use in a
4963 if (!sets
[i
].src_volatile
)
4964 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4966 sets
[i
].src_elt
= elt
;
4968 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4970 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4972 /* The REG_EQUAL is indicating that two formerly distinct
4973 classes are now equivalent. So merge them. */
4974 merge_equiv_classes (elt
, src_eqv_elt
);
4975 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4976 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4982 else if (src_eqv_elt
)
4985 /* Try to find a constant somewhere and record it in `src_const'.
4986 Record its table element, if any, in `src_const_elt'. Look in
4987 any known equivalences first. (If the constant is not in the
4988 table, also set `sets[i].src_const_hash'). */
4990 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4994 src_const_elt
= elt
;
4999 && (CONSTANT_P (src_folded
)
5000 /* Consider (minus (label_ref L1) (label_ref L2)) as
5001 "constant" here so we will record it. This allows us
5002 to fold switch statements when an ADDR_DIFF_VEC is used. */
5003 || (GET_CODE (src_folded
) == MINUS
5004 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5005 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5006 src_const
= src_folded
, src_const_elt
= elt
;
5007 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5008 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5010 /* If we don't know if the constant is in the table, get its
5011 hash code and look it up. */
5012 if (src_const
&& src_const_elt
== 0)
5014 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5015 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5018 sets
[i
].src_const
= src_const
;
5019 sets
[i
].src_const_elt
= src_const_elt
;
5021 /* If the constant and our source are both in the table, mark them as
5022 equivalent. Otherwise, if a constant is in the table but the source
5023 isn't, set ELT to it. */
5024 if (src_const_elt
&& elt
5025 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5026 merge_equiv_classes (elt
, src_const_elt
);
5027 else if (src_const_elt
&& elt
== 0)
5028 elt
= src_const_elt
;
5030 /* See if there is a register linearly related to a constant
5031 equivalent of SRC. */
5033 && (GET_CODE (src_const
) == CONST
5034 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5036 src_related
= use_related_value (src_const
, src_const_elt
);
5039 struct table_elt
*src_related_elt
5040 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5041 if (src_related_elt
&& elt
)
5043 if (elt
->first_same_value
5044 != src_related_elt
->first_same_value
)
5045 /* This can occur when we previously saw a CONST
5046 involving a SYMBOL_REF and then see the SYMBOL_REF
5047 twice. Merge the involved classes. */
5048 merge_equiv_classes (elt
, src_related_elt
);
5051 src_related_elt
= 0;
5053 else if (src_related_elt
&& elt
== 0)
5054 elt
= src_related_elt
;
5058 /* See if we have a CONST_INT that is already in a register in a
5061 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5062 && GET_MODE_CLASS (mode
) == MODE_INT
5063 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5065 enum machine_mode wider_mode
;
5067 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5068 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5069 && src_related
== 0;
5070 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5072 struct table_elt
*const_elt
5073 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5078 for (const_elt
= const_elt
->first_same_value
;
5079 const_elt
; const_elt
= const_elt
->next_same_value
)
5080 if (REG_P (const_elt
->exp
))
5082 src_related
= gen_lowpart (mode
,
5089 /* Another possibility is that we have an AND with a constant in
5090 a mode narrower than a word. If so, it might have been generated
5091 as part of an "if" which would narrow the AND. If we already
5092 have done the AND in a wider mode, we can use a SUBREG of that
5095 if (flag_expensive_optimizations
&& ! src_related
5096 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5097 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5099 enum machine_mode tmode
;
5100 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5102 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5103 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5104 tmode
= GET_MODE_WIDER_MODE (tmode
))
5106 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5107 struct table_elt
*larger_elt
;
5111 PUT_MODE (new_and
, tmode
);
5112 XEXP (new_and
, 0) = inner
;
5113 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5114 if (larger_elt
== 0)
5117 for (larger_elt
= larger_elt
->first_same_value
;
5118 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5119 if (REG_P (larger_elt
->exp
))
5122 = gen_lowpart (mode
, larger_elt
->exp
);
5132 #ifdef LOAD_EXTEND_OP
5133 /* See if a MEM has already been loaded with a widening operation;
5134 if it has, we can use a subreg of that. Many CISC machines
5135 also have such operations, but this is only likely to be
5136 beneficial on these machines. */
5138 if (flag_expensive_optimizations
&& src_related
== 0
5139 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5140 && GET_MODE_CLASS (mode
) == MODE_INT
5141 && MEM_P (src
) && ! do_not_record
5142 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5144 enum machine_mode tmode
;
5146 /* Set what we are trying to extend and the operation it might
5147 have been extended with. */
5148 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5149 XEXP (memory_extend_rtx
, 0) = src
;
5151 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5152 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5153 tmode
= GET_MODE_WIDER_MODE (tmode
))
5155 struct table_elt
*larger_elt
;
5157 PUT_MODE (memory_extend_rtx
, tmode
);
5158 larger_elt
= lookup (memory_extend_rtx
,
5159 HASH (memory_extend_rtx
, tmode
), tmode
);
5160 if (larger_elt
== 0)
5163 for (larger_elt
= larger_elt
->first_same_value
;
5164 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5165 if (REG_P (larger_elt
->exp
))
5167 src_related
= gen_lowpart (mode
,
5176 #endif /* LOAD_EXTEND_OP */
5178 if (src
== src_folded
)
5181 /* At this point, ELT, if nonzero, points to a class of expressions
5182 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5183 and SRC_RELATED, if nonzero, each contain additional equivalent
5184 expressions. Prune these latter expressions by deleting expressions
5185 already in the equivalence class.
5187 Check for an equivalent identical to the destination. If found,
5188 this is the preferred equivalent since it will likely lead to
5189 elimination of the insn. Indicate this by placing it in
5193 elt
= elt
->first_same_value
;
5194 for (p
= elt
; p
; p
= p
->next_same_value
)
5196 enum rtx_code code
= GET_CODE (p
->exp
);
5198 /* If the expression is not valid, ignore it. Then we do not
5199 have to check for validity below. In most cases, we can use
5200 `rtx_equal_p', since canonicalization has already been done. */
5201 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5204 /* Also skip paradoxical subregs, unless that's what we're
5207 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5208 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5210 && GET_CODE (src
) == SUBREG
5211 && GET_MODE (src
) == GET_MODE (p
->exp
)
5212 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5213 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5216 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5218 else if (src_folded
&& GET_CODE (src_folded
) == code
5219 && rtx_equal_p (src_folded
, p
->exp
))
5221 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5222 && rtx_equal_p (src_eqv_here
, p
->exp
))
5224 else if (src_related
&& GET_CODE (src_related
) == code
5225 && rtx_equal_p (src_related
, p
->exp
))
5228 /* This is the same as the destination of the insns, we want
5229 to prefer it. Copy it to src_related. The code below will
5230 then give it a negative cost. */
5231 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5235 /* Find the cheapest valid equivalent, trying all the available
5236 possibilities. Prefer items not in the hash table to ones
5237 that are when they are equal cost. Note that we can never
5238 worsen an insn as the current contents will also succeed.
5239 If we find an equivalent identical to the destination, use it as best,
5240 since this insn will probably be eliminated in that case. */
5243 if (rtx_equal_p (src
, dest
))
5244 src_cost
= src_regcost
= -1;
5247 src_cost
= COST (src
);
5248 src_regcost
= approx_reg_cost (src
);
5254 if (rtx_equal_p (src_eqv_here
, dest
))
5255 src_eqv_cost
= src_eqv_regcost
= -1;
5258 src_eqv_cost
= COST (src_eqv_here
);
5259 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5265 if (rtx_equal_p (src_folded
, dest
))
5266 src_folded_cost
= src_folded_regcost
= -1;
5269 src_folded_cost
= COST (src_folded
);
5270 src_folded_regcost
= approx_reg_cost (src_folded
);
5276 if (rtx_equal_p (src_related
, dest
))
5277 src_related_cost
= src_related_regcost
= -1;
5280 src_related_cost
= COST (src_related
);
5281 src_related_regcost
= approx_reg_cost (src_related
);
5285 /* If this was an indirect jump insn, a known label will really be
5286 cheaper even though it looks more expensive. */
5287 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5288 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5290 /* Terminate loop when replacement made. This must terminate since
5291 the current contents will be tested and will always be valid. */
5296 /* Skip invalid entries. */
5297 while (elt
&& !REG_P (elt
->exp
)
5298 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5299 elt
= elt
->next_same_value
;
5301 /* A paradoxical subreg would be bad here: it'll be the right
5302 size, but later may be adjusted so that the upper bits aren't
5303 what we want. So reject it. */
5305 && GET_CODE (elt
->exp
) == SUBREG
5306 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5307 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5308 /* It is okay, though, if the rtx we're trying to match
5309 will ignore any of the bits we can't predict. */
5311 && GET_CODE (src
) == SUBREG
5312 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5313 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5314 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5316 elt
= elt
->next_same_value
;
5322 src_elt_cost
= elt
->cost
;
5323 src_elt_regcost
= elt
->regcost
;
5326 /* Find cheapest and skip it for the next time. For items
5327 of equal cost, use this order:
5328 src_folded, src, src_eqv, src_related and hash table entry. */
5330 && preferable (src_folded_cost
, src_folded_regcost
,
5331 src_cost
, src_regcost
) <= 0
5332 && preferable (src_folded_cost
, src_folded_regcost
,
5333 src_eqv_cost
, src_eqv_regcost
) <= 0
5334 && preferable (src_folded_cost
, src_folded_regcost
,
5335 src_related_cost
, src_related_regcost
) <= 0
5336 && preferable (src_folded_cost
, src_folded_regcost
,
5337 src_elt_cost
, src_elt_regcost
) <= 0)
5339 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5340 if (src_folded_force_flag
)
5342 rtx forced
= force_const_mem (mode
, trial
);
5348 && preferable (src_cost
, src_regcost
,
5349 src_eqv_cost
, src_eqv_regcost
) <= 0
5350 && preferable (src_cost
, src_regcost
,
5351 src_related_cost
, src_related_regcost
) <= 0
5352 && preferable (src_cost
, src_regcost
,
5353 src_elt_cost
, src_elt_regcost
) <= 0)
5354 trial
= src
, src_cost
= MAX_COST
;
5355 else if (src_eqv_here
5356 && preferable (src_eqv_cost
, src_eqv_regcost
,
5357 src_related_cost
, src_related_regcost
) <= 0
5358 && preferable (src_eqv_cost
, src_eqv_regcost
,
5359 src_elt_cost
, src_elt_regcost
) <= 0)
5360 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5361 else if (src_related
5362 && preferable (src_related_cost
, src_related_regcost
,
5363 src_elt_cost
, src_elt_regcost
) <= 0)
5364 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5367 trial
= copy_rtx (elt
->exp
);
5368 elt
= elt
->next_same_value
;
5369 src_elt_cost
= MAX_COST
;
5372 /* We don't normally have an insn matching (set (pc) (pc)), so
5373 check for this separately here. We will delete such an
5376 For other cases such as a table jump or conditional jump
5377 where we know the ultimate target, go ahead and replace the
5378 operand. While that may not make a valid insn, we will
5379 reemit the jump below (and also insert any necessary
5381 if (n_sets
== 1 && dest
== pc_rtx
5383 || (GET_CODE (trial
) == LABEL_REF
5384 && ! condjump_p (insn
))))
5386 SET_SRC (sets
[i
].rtl
) = trial
;
5387 cse_jumps_altered
= 1;
5391 /* Look for a substitution that makes a valid insn. */
5392 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5394 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5396 /* If we just made a substitution inside a libcall, then we
5397 need to make the same substitution in any notes attached
5398 to the RETVAL insn. */
5400 && (REG_P (sets
[i
].orig_src
)
5401 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5402 || MEM_P (sets
[i
].orig_src
)))
5404 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5406 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5411 /* The result of apply_change_group can be ignored; see
5414 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5415 apply_change_group ();
5419 /* If we previously found constant pool entries for
5420 constants and this is a constant, try making a
5421 pool entry. Put it in src_folded unless we already have done
5422 this since that is where it likely came from. */
5424 else if (constant_pool_entries_cost
5425 && CONSTANT_P (trial
)
5426 /* Reject cases that will abort in decode_rtx_const.
5427 On the alpha when simplifying a switch, we get
5428 (const (truncate (minus (label_ref) (label_ref)))). */
5429 && ! (GET_CODE (trial
) == CONST
5430 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5431 /* Likewise on IA-64, except without the truncate. */
5432 && ! (GET_CODE (trial
) == CONST
5433 && GET_CODE (XEXP (trial
, 0)) == MINUS
5434 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5435 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5437 || (!MEM_P (src_folded
)
5438 && ! src_folded_force_flag
))
5439 && GET_MODE_CLASS (mode
) != MODE_CC
5440 && mode
!= VOIDmode
)
5442 src_folded_force_flag
= 1;
5444 src_folded_cost
= constant_pool_entries_cost
;
5445 src_folded_regcost
= constant_pool_entries_regcost
;
5449 src
= SET_SRC (sets
[i
].rtl
);
5451 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5452 However, there is an important exception: If both are registers
5453 that are not the head of their equivalence class, replace SET_SRC
5454 with the head of the class. If we do not do this, we will have
5455 both registers live over a portion of the basic block. This way,
5456 their lifetimes will likely abut instead of overlapping. */
5458 && REGNO_QTY_VALID_P (REGNO (dest
)))
5460 int dest_q
= REG_QTY (REGNO (dest
));
5461 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5463 if (dest_ent
->mode
== GET_MODE (dest
)
5464 && dest_ent
->first_reg
!= REGNO (dest
)
5465 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5466 /* Don't do this if the original insn had a hard reg as
5467 SET_SRC or SET_DEST. */
5468 && (!REG_P (sets
[i
].src
)
5469 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5470 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5471 /* We can't call canon_reg here because it won't do anything if
5472 SRC is a hard register. */
5474 int src_q
= REG_QTY (REGNO (src
));
5475 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5476 int first
= src_ent
->first_reg
;
5478 = (first
>= FIRST_PSEUDO_REGISTER
5479 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5481 /* We must use validate-change even for this, because this
5482 might be a special no-op instruction, suitable only to
5484 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5487 /* If we had a constant that is cheaper than what we are now
5488 setting SRC to, use that constant. We ignored it when we
5489 thought we could make this into a no-op. */
5490 if (src_const
&& COST (src_const
) < COST (src
)
5491 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5498 /* If we made a change, recompute SRC values. */
5499 if (src
!= sets
[i
].src
)
5503 hash_arg_in_memory
= 0;
5505 sets
[i
].src_hash
= HASH (src
, mode
);
5506 sets
[i
].src_volatile
= do_not_record
;
5507 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5508 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5511 /* If this is a single SET, we are setting a register, and we have an
5512 equivalent constant, we want to add a REG_NOTE. We don't want
5513 to write a REG_EQUAL note for a constant pseudo since verifying that
5514 that pseudo hasn't been eliminated is a pain. Such a note also
5515 won't help anything.
5517 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5518 which can be created for a reference to a compile time computable
5519 entry in a jump table. */
5521 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5522 && !REG_P (src_const
)
5523 && ! (GET_CODE (src_const
) == CONST
5524 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5525 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5526 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5528 /* We only want a REG_EQUAL note if src_const != src. */
5529 if (! rtx_equal_p (src
, src_const
))
5531 /* Make sure that the rtx is not shared. */
5532 src_const
= copy_rtx (src_const
);
5534 /* Record the actual constant value in a REG_EQUAL note,
5535 making a new one if one does not already exist. */
5536 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5540 /* Now deal with the destination. */
5543 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5544 to the MEM or REG within it. */
5545 while (GET_CODE (dest
) == SIGN_EXTRACT
5546 || GET_CODE (dest
) == ZERO_EXTRACT
5547 || GET_CODE (dest
) == SUBREG
5548 || GET_CODE (dest
) == STRICT_LOW_PART
)
5549 dest
= XEXP (dest
, 0);
5551 sets
[i
].inner_dest
= dest
;
5555 #ifdef PUSH_ROUNDING
5556 /* Stack pushes invalidate the stack pointer. */
5557 rtx addr
= XEXP (dest
, 0);
5558 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5559 && XEXP (addr
, 0) == stack_pointer_rtx
)
5560 invalidate (stack_pointer_rtx
, Pmode
);
5562 dest
= fold_rtx (dest
, insn
);
5565 /* Compute the hash code of the destination now,
5566 before the effects of this instruction are recorded,
5567 since the register values used in the address computation
5568 are those before this instruction. */
5569 sets
[i
].dest_hash
= HASH (dest
, mode
);
5571 /* Don't enter a bit-field in the hash table
5572 because the value in it after the store
5573 may not equal what was stored, due to truncation. */
5575 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5576 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5578 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5580 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5581 && GET_CODE (width
) == CONST_INT
5582 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5583 && ! (INTVAL (src_const
)
5584 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5585 /* Exception: if the value is constant,
5586 and it won't be truncated, record it. */
5590 /* This is chosen so that the destination will be invalidated
5591 but no new value will be recorded.
5592 We must invalidate because sometimes constant
5593 values can be recorded for bitfields. */
5594 sets
[i
].src_elt
= 0;
5595 sets
[i
].src_volatile
= 1;
5601 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5603 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5605 /* One less use of the label this insn used to jump to. */
5607 cse_jumps_altered
= 1;
5608 /* No more processing for this set. */
5612 /* If this SET is now setting PC to a label, we know it used to
5613 be a conditional or computed branch. */
5614 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
5616 /* Now emit a BARRIER after the unconditional jump. */
5617 if (NEXT_INSN (insn
) == 0
5618 || !BARRIER_P (NEXT_INSN (insn
)))
5619 emit_barrier_after (insn
);
5621 /* We reemit the jump in as many cases as possible just in
5622 case the form of an unconditional jump is significantly
5623 different than a computed jump or conditional jump.
5625 If this insn has multiple sets, then reemitting the
5626 jump is nontrivial. So instead we just force rerecognition
5627 and hope for the best. */
5632 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5633 JUMP_LABEL (new) = XEXP (src
, 0);
5634 LABEL_NUSES (XEXP (src
, 0))++;
5636 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5637 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5640 XEXP (note
, 1) = NULL_RTX
;
5641 REG_NOTES (new) = note
;
5647 /* Now emit a BARRIER after the unconditional jump. */
5648 if (NEXT_INSN (insn
) == 0
5649 || !BARRIER_P (NEXT_INSN (insn
)))
5650 emit_barrier_after (insn
);
5653 INSN_CODE (insn
) = -1;
5655 /* Do not bother deleting any unreachable code,
5656 let jump/flow do that. */
5658 cse_jumps_altered
= 1;
5662 /* If destination is volatile, invalidate it and then do no further
5663 processing for this assignment. */
5665 else if (do_not_record
)
5667 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5668 invalidate (dest
, VOIDmode
);
5669 else if (MEM_P (dest
))
5671 /* Outgoing arguments for a libcall don't
5672 affect any recorded expressions. */
5673 if (! libcall_insn
|| insn
== libcall_insn
)
5674 invalidate (dest
, VOIDmode
);
5676 else if (GET_CODE (dest
) == STRICT_LOW_PART
5677 || GET_CODE (dest
) == ZERO_EXTRACT
)
5678 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5682 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5683 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5686 /* If setting CC0, record what it was set to, or a constant, if it
5687 is equivalent to a constant. If it is being set to a floating-point
5688 value, make a COMPARE with the appropriate constant of 0. If we
5689 don't do this, later code can interpret this as a test against
5690 const0_rtx, which can cause problems if we try to put it into an
5691 insn as a floating-point operand. */
5692 if (dest
== cc0_rtx
)
5694 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5695 this_insn_cc0_mode
= mode
;
5696 if (FLOAT_MODE_P (mode
))
5697 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5703 /* Now enter all non-volatile source expressions in the hash table
5704 if they are not already present.
5705 Record their equivalence classes in src_elt.
5706 This way we can insert the corresponding destinations into
5707 the same classes even if the actual sources are no longer in them
5708 (having been invalidated). */
5710 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5711 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5713 struct table_elt
*elt
;
5714 struct table_elt
*classp
= sets
[0].src_elt
;
5715 rtx dest
= SET_DEST (sets
[0].rtl
);
5716 enum machine_mode eqvmode
= GET_MODE (dest
);
5718 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5720 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5723 if (insert_regs (src_eqv
, classp
, 0))
5725 rehash_using_reg (src_eqv
);
5726 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5728 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5729 elt
->in_memory
= src_eqv_in_memory
;
5732 /* Check to see if src_eqv_elt is the same as a set source which
5733 does not yet have an elt, and if so set the elt of the set source
5735 for (i
= 0; i
< n_sets
; i
++)
5736 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5737 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5738 sets
[i
].src_elt
= src_eqv_elt
;
5741 for (i
= 0; i
< n_sets
; i
++)
5742 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5743 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5745 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5747 /* REG_EQUAL in setting a STRICT_LOW_PART
5748 gives an equivalent for the entire destination register,
5749 not just for the subreg being stored in now.
5750 This is a more interesting equivalence, so we arrange later
5751 to treat the entire reg as the destination. */
5752 sets
[i
].src_elt
= src_eqv_elt
;
5753 sets
[i
].src_hash
= src_eqv_hash
;
5757 /* Insert source and constant equivalent into hash table, if not
5759 struct table_elt
*classp
= src_eqv_elt
;
5760 rtx src
= sets
[i
].src
;
5761 rtx dest
= SET_DEST (sets
[i
].rtl
);
5762 enum machine_mode mode
5763 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5765 /* It's possible that we have a source value known to be
5766 constant but don't have a REG_EQUAL note on the insn.
5767 Lack of a note will mean src_eqv_elt will be NULL. This
5768 can happen where we've generated a SUBREG to access a
5769 CONST_INT that is already in a register in a wider mode.
5770 Ensure that the source expression is put in the proper
5773 classp
= sets
[i
].src_const_elt
;
5775 if (sets
[i
].src_elt
== 0)
5777 /* Don't put a hard register source into the table if this is
5778 the last insn of a libcall. In this case, we only need
5779 to put src_eqv_elt in src_elt. */
5780 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5782 struct table_elt
*elt
;
5784 /* Note that these insert_regs calls cannot remove
5785 any of the src_elt's, because they would have failed to
5786 match if not still valid. */
5787 if (insert_regs (src
, classp
, 0))
5789 rehash_using_reg (src
);
5790 sets
[i
].src_hash
= HASH (src
, mode
);
5792 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5793 elt
->in_memory
= sets
[i
].src_in_memory
;
5794 sets
[i
].src_elt
= classp
= elt
;
5797 sets
[i
].src_elt
= classp
;
5799 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5800 && src
!= sets
[i
].src_const
5801 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5802 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5803 sets
[i
].src_const_hash
, mode
);
5806 else if (sets
[i
].src_elt
== 0)
5807 /* If we did not insert the source into the hash table (e.g., it was
5808 volatile), note the equivalence class for the REG_EQUAL value, if any,
5809 so that the destination goes into that class. */
5810 sets
[i
].src_elt
= src_eqv_elt
;
5812 invalidate_from_clobbers (x
);
5814 /* Some registers are invalidated by subroutine calls. Memory is
5815 invalidated by non-constant calls. */
5819 if (! CONST_OR_PURE_CALL_P (insn
))
5820 invalidate_memory ();
5821 invalidate_for_call ();
5824 /* Now invalidate everything set by this instruction.
5825 If a SUBREG or other funny destination is being set,
5826 sets[i].rtl is still nonzero, so here we invalidate the reg
5827 a part of which is being set. */
5829 for (i
= 0; i
< n_sets
; i
++)
5832 /* We can't use the inner dest, because the mode associated with
5833 a ZERO_EXTRACT is significant. */
5834 rtx dest
= SET_DEST (sets
[i
].rtl
);
5836 /* Needed for registers to remove the register from its
5837 previous quantity's chain.
5838 Needed for memory if this is a nonvarying address, unless
5839 we have just done an invalidate_memory that covers even those. */
5840 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5841 invalidate (dest
, VOIDmode
);
5842 else if (MEM_P (dest
))
5844 /* Outgoing arguments for a libcall don't
5845 affect any recorded expressions. */
5846 if (! libcall_insn
|| insn
== libcall_insn
)
5847 invalidate (dest
, VOIDmode
);
5849 else if (GET_CODE (dest
) == STRICT_LOW_PART
5850 || GET_CODE (dest
) == ZERO_EXTRACT
)
5851 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5854 /* A volatile ASM invalidates everything. */
5855 if (NONJUMP_INSN_P (insn
)
5856 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5857 && MEM_VOLATILE_P (PATTERN (insn
)))
5858 flush_hash_table ();
5860 /* Make sure registers mentioned in destinations
5861 are safe for use in an expression to be inserted.
5862 This removes from the hash table
5863 any invalid entry that refers to one of these registers.
5865 We don't care about the return value from mention_regs because
5866 we are going to hash the SET_DEST values unconditionally. */
5868 for (i
= 0; i
< n_sets
; i
++)
5872 rtx x
= SET_DEST (sets
[i
].rtl
);
5878 /* We used to rely on all references to a register becoming
5879 inaccessible when a register changes to a new quantity,
5880 since that changes the hash code. However, that is not
5881 safe, since after HASH_SIZE new quantities we get a
5882 hash 'collision' of a register with its own invalid
5883 entries. And since SUBREGs have been changed not to
5884 change their hash code with the hash code of the register,
5885 it wouldn't work any longer at all. So we have to check
5886 for any invalid references lying around now.
5887 This code is similar to the REG case in mention_regs,
5888 but it knows that reg_tick has been incremented, and
5889 it leaves reg_in_table as -1 . */
5890 unsigned int regno
= REGNO (x
);
5891 unsigned int endregno
5892 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
5893 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
5896 for (i
= regno
; i
< endregno
; i
++)
5898 if (REG_IN_TABLE (i
) >= 0)
5900 remove_invalid_refs (i
);
5901 REG_IN_TABLE (i
) = -1;
5908 /* We may have just removed some of the src_elt's from the hash table.
5909 So replace each one with the current head of the same class. */
5911 for (i
= 0; i
< n_sets
; i
++)
5914 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5915 /* If elt was removed, find current head of same class,
5916 or 0 if nothing remains of that class. */
5918 struct table_elt
*elt
= sets
[i
].src_elt
;
5920 while (elt
&& elt
->prev_same_value
)
5921 elt
= elt
->prev_same_value
;
5923 while (elt
&& elt
->first_same_value
== 0)
5924 elt
= elt
->next_same_value
;
5925 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5929 /* Now insert the destinations into their equivalence classes. */
5931 for (i
= 0; i
< n_sets
; i
++)
5934 rtx dest
= SET_DEST (sets
[i
].rtl
);
5935 struct table_elt
*elt
;
5937 /* Don't record value if we are not supposed to risk allocating
5938 floating-point values in registers that might be wider than
5940 if ((flag_float_store
5942 && FLOAT_MODE_P (GET_MODE (dest
)))
5943 /* Don't record BLKmode values, because we don't know the
5944 size of it, and can't be sure that other BLKmode values
5945 have the same or smaller size. */
5946 || GET_MODE (dest
) == BLKmode
5947 /* Don't record values of destinations set inside a libcall block
5948 since we might delete the libcall. Things should have been set
5949 up so we won't want to reuse such a value, but we play it safe
5952 /* If we didn't put a REG_EQUAL value or a source into the hash
5953 table, there is no point is recording DEST. */
5954 || sets
[i
].src_elt
== 0
5955 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5956 or SIGN_EXTEND, don't record DEST since it can cause
5957 some tracking to be wrong.
5959 ??? Think about this more later. */
5960 || (GET_CODE (dest
) == SUBREG
5961 && (GET_MODE_SIZE (GET_MODE (dest
))
5962 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5963 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5964 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5967 /* STRICT_LOW_PART isn't part of the value BEING set,
5968 and neither is the SUBREG inside it.
5969 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5970 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5971 dest
= SUBREG_REG (XEXP (dest
, 0));
5973 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5974 /* Registers must also be inserted into chains for quantities. */
5975 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5977 /* If `insert_regs' changes something, the hash code must be
5979 rehash_using_reg (dest
);
5980 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5983 elt
= insert (dest
, sets
[i
].src_elt
,
5984 sets
[i
].dest_hash
, GET_MODE (dest
));
5986 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5987 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5989 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5990 narrower than M2, and both M1 and M2 are the same number of words,
5991 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5992 make that equivalence as well.
5994 However, BAR may have equivalences for which gen_lowpart
5995 will produce a simpler value than gen_lowpart applied to
5996 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5997 BAR's equivalences. If we don't get a simplified form, make
5998 the SUBREG. It will not be used in an equivalence, but will
5999 cause two similar assignments to be detected.
6001 Note the loop below will find SUBREG_REG (DEST) since we have
6002 already entered SRC and DEST of the SET in the table. */
6004 if (GET_CODE (dest
) == SUBREG
6005 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6007 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6008 && (GET_MODE_SIZE (GET_MODE (dest
))
6009 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6010 && sets
[i
].src_elt
!= 0)
6012 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6013 struct table_elt
*elt
, *classp
= 0;
6015 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6016 elt
= elt
->next_same_value
)
6020 struct table_elt
*src_elt
;
6023 /* Ignore invalid entries. */
6024 if (!REG_P (elt
->exp
)
6025 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6028 /* We may have already been playing subreg games. If the
6029 mode is already correct for the destination, use it. */
6030 if (GET_MODE (elt
->exp
) == new_mode
)
6034 /* Calculate big endian correction for the SUBREG_BYTE.
6035 We have already checked that M1 (GET_MODE (dest))
6036 is not narrower than M2 (new_mode). */
6037 if (BYTES_BIG_ENDIAN
)
6038 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6039 - GET_MODE_SIZE (new_mode
));
6041 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6042 GET_MODE (dest
), byte
);
6045 /* The call to simplify_gen_subreg fails if the value
6046 is VOIDmode, yet we can't do any simplification, e.g.
6047 for EXPR_LISTs denoting function call results.
6048 It is invalid to construct a SUBREG with a VOIDmode
6049 SUBREG_REG, hence a zero new_src means we can't do
6050 this substitution. */
6054 src_hash
= HASH (new_src
, new_mode
);
6055 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6057 /* Put the new source in the hash table is if isn't
6061 if (insert_regs (new_src
, classp
, 0))
6063 rehash_using_reg (new_src
);
6064 src_hash
= HASH (new_src
, new_mode
);
6066 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6067 src_elt
->in_memory
= elt
->in_memory
;
6069 else if (classp
&& classp
!= src_elt
->first_same_value
)
6070 /* Show that two things that we've seen before are
6071 actually the same. */
6072 merge_equiv_classes (src_elt
, classp
);
6074 classp
= src_elt
->first_same_value
;
6075 /* Ignore invalid entries. */
6077 && !REG_P (classp
->exp
)
6078 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6079 classp
= classp
->next_same_value
;
6084 /* Special handling for (set REG0 REG1) where REG0 is the
6085 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6086 be used in the sequel, so (if easily done) change this insn to
6087 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6088 that computed their value. Then REG1 will become a dead store
6089 and won't cloud the situation for later optimizations.
6091 Do not make this change if REG1 is a hard register, because it will
6092 then be used in the sequel and we may be changing a two-operand insn
6093 into a three-operand insn.
6095 Also do not do this if we are operating on a copy of INSN.
6097 Also don't do this if INSN ends a libcall; this would cause an unrelated
6098 register to be set in the middle of a libcall, and we then get bad code
6099 if the libcall is deleted. */
6101 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6102 && NEXT_INSN (PREV_INSN (insn
)) == insn
6103 && REG_P (SET_SRC (sets
[0].rtl
))
6104 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6105 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6107 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6108 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6110 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6111 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6114 /* Scan for the previous nonnote insn, but stop at a basic
6118 prev
= PREV_INSN (prev
);
6120 while (prev
&& NOTE_P (prev
)
6121 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6123 /* Do not swap the registers around if the previous instruction
6124 attaches a REG_EQUIV note to REG1.
6126 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6127 from the pseudo that originally shadowed an incoming argument
6128 to another register. Some uses of REG_EQUIV might rely on it
6129 being attached to REG1 rather than REG2.
6131 This section previously turned the REG_EQUIV into a REG_EQUAL
6132 note. We cannot do that because REG_EQUIV may provide an
6133 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6135 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6136 && GET_CODE (PATTERN (prev
)) == SET
6137 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6138 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6140 rtx dest
= SET_DEST (sets
[0].rtl
);
6141 rtx src
= SET_SRC (sets
[0].rtl
);
6144 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6145 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6146 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6147 apply_change_group ();
6149 /* If INSN has a REG_EQUAL note, and this note mentions
6150 REG0, then we must delete it, because the value in
6151 REG0 has changed. If the note's value is REG1, we must
6152 also delete it because that is now this insn's dest. */
6153 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6155 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6156 || rtx_equal_p (src
, XEXP (note
, 0))))
6157 remove_note (insn
, note
);
6162 /* If this is a conditional jump insn, record any known equivalences due to
6163 the condition being tested. */
6166 && n_sets
== 1 && GET_CODE (x
) == SET
6167 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6168 record_jump_equiv (insn
, 0);
6171 /* If the previous insn set CC0 and this insn no longer references CC0,
6172 delete the previous insn. Here we use the fact that nothing expects CC0
6173 to be valid over an insn, which is true until the final pass. */
6174 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6175 && (tem
= single_set (prev_insn
)) != 0
6176 && SET_DEST (tem
) == cc0_rtx
6177 && ! reg_mentioned_p (cc0_rtx
, x
))
6178 delete_insn (prev_insn
);
6180 prev_insn_cc0
= this_insn_cc0
;
6181 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6186 /* Remove from the hash table all expressions that reference memory. */
6189 invalidate_memory (void)
6192 struct table_elt
*p
, *next
;
6194 for (i
= 0; i
< HASH_SIZE
; i
++)
6195 for (p
= table
[i
]; p
; p
= next
)
6197 next
= p
->next_same_hash
;
6199 remove_from_table (p
, i
);
6203 /* If ADDR is an address that implicitly affects the stack pointer, return
6204 1 and update the register tables to show the effect. Else, return 0. */
6207 addr_affects_sp_p (rtx addr
)
6209 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6210 && REG_P (XEXP (addr
, 0))
6211 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6213 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6215 REG_TICK (STACK_POINTER_REGNUM
)++;
6216 /* Is it possible to use a subreg of SP? */
6217 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6220 /* This should be *very* rare. */
6221 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6222 invalidate (stack_pointer_rtx
, VOIDmode
);
6230 /* Perform invalidation on the basis of everything about an insn
6231 except for invalidating the actual places that are SET in it.
6232 This includes the places CLOBBERed, and anything that might
6233 alias with something that is SET or CLOBBERed.
6235 X is the pattern of the insn. */
6238 invalidate_from_clobbers (rtx x
)
6240 if (GET_CODE (x
) == CLOBBER
)
6242 rtx ref
= XEXP (x
, 0);
6245 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6247 invalidate (ref
, VOIDmode
);
6248 else if (GET_CODE (ref
) == STRICT_LOW_PART
6249 || GET_CODE (ref
) == ZERO_EXTRACT
)
6250 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6253 else if (GET_CODE (x
) == PARALLEL
)
6256 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6258 rtx y
= XVECEXP (x
, 0, i
);
6259 if (GET_CODE (y
) == CLOBBER
)
6261 rtx ref
= XEXP (y
, 0);
6262 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6264 invalidate (ref
, VOIDmode
);
6265 else if (GET_CODE (ref
) == STRICT_LOW_PART
6266 || GET_CODE (ref
) == ZERO_EXTRACT
)
6267 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6273 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6274 and replace any registers in them with either an equivalent constant
6275 or the canonical form of the register. If we are inside an address,
6276 only do this if the address remains valid.
6278 OBJECT is 0 except when within a MEM in which case it is the MEM.
6280 Return the replacement for X. */
6283 cse_process_notes (rtx x
, rtx object
)
6285 enum rtx_code code
= GET_CODE (x
);
6286 const char *fmt
= GET_RTX_FORMAT (code
);
6303 validate_change (x
, &XEXP (x
, 0),
6304 cse_process_notes (XEXP (x
, 0), x
), 0);
6309 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6310 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6312 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6319 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6320 /* We don't substitute VOIDmode constants into these rtx,
6321 since they would impede folding. */
6322 if (GET_MODE (new) != VOIDmode
)
6323 validate_change (object
, &XEXP (x
, 0), new, 0);
6328 i
= REG_QTY (REGNO (x
));
6330 /* Return a constant or a constant register. */
6331 if (REGNO_QTY_VALID_P (REGNO (x
)))
6333 struct qty_table_elem
*ent
= &qty_table
[i
];
6335 if (ent
->const_rtx
!= NULL_RTX
6336 && (CONSTANT_P (ent
->const_rtx
)
6337 || REG_P (ent
->const_rtx
)))
6339 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6345 /* Otherwise, canonicalize this register. */
6346 return canon_reg (x
, NULL_RTX
);
6352 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6354 validate_change (object
, &XEXP (x
, i
),
6355 cse_process_notes (XEXP (x
, i
), object
), 0);
6360 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6361 since they are done elsewhere. This function is called via note_stores. */
6364 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6366 enum rtx_code code
= GET_CODE (dest
);
6369 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6370 /* There are times when an address can appear varying and be a PLUS
6371 during this scan when it would be a fixed address were we to know
6372 the proper equivalences. So invalidate all memory if there is
6373 a BLKmode or nonscalar memory reference or a reference to a
6374 variable address. */
6375 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6376 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6378 invalidate_memory ();
6382 if (GET_CODE (set
) == CLOBBER
6387 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6388 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6389 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6390 invalidate (dest
, VOIDmode
);
6393 /* Invalidate all insns from START up to the end of the function or the
6394 next label. This called when we wish to CSE around a block that is
6395 conditionally executed. */
6398 invalidate_skipped_block (rtx start
)
6402 for (insn
= start
; insn
&& !LABEL_P (insn
);
6403 insn
= NEXT_INSN (insn
))
6405 if (! INSN_P (insn
))
6410 if (! CONST_OR_PURE_CALL_P (insn
))
6411 invalidate_memory ();
6412 invalidate_for_call ();
6415 invalidate_from_clobbers (PATTERN (insn
));
6416 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6420 /* Find the end of INSN's basic block and return its range,
6421 the total number of SETs in all the insns of the block, the last insn of the
6422 block, and the branch path.
6424 The branch path indicates which branches should be followed. If a nonzero
6425 path size is specified, the block should be rescanned and a different set
6426 of branches will be taken. The branch path is only used if
6427 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6429 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6430 used to describe the block. It is filled in with the information about
6431 the current block. The incoming structure's branch path, if any, is used
6432 to construct the output branch path. */
6435 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6436 int follow_jumps
, int skip_blocks
)
6440 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6441 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6442 int path_size
= data
->path_size
;
6446 /* Update the previous branch path, if any. If the last branch was
6447 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6448 If it was previously PATH_NOT_TAKEN,
6449 shorten the path by one and look at the previous branch. We know that
6450 at least one branch must have been taken if PATH_SIZE is nonzero. */
6451 while (path_size
> 0)
6453 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6455 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6462 /* If the first instruction is marked with QImode, that means we've
6463 already processed this block. Our caller will look at DATA->LAST
6464 to figure out where to go next. We want to return the next block
6465 in the instruction stream, not some branched-to block somewhere
6466 else. We accomplish this by pretending our called forbid us to
6467 follow jumps, or skip blocks. */
6468 if (GET_MODE (insn
) == QImode
)
6469 follow_jumps
= skip_blocks
= 0;
6471 /* Scan to end of this basic block. */
6472 while (p
&& !LABEL_P (p
))
6474 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6475 the regs restored by the longjmp come from
6476 a later time than the setjmp. */
6477 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6478 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6481 /* A PARALLEL can have lots of SETs in it,
6482 especially if it is really an ASM_OPERANDS. */
6483 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6484 nsets
+= XVECLEN (PATTERN (p
), 0);
6485 else if (!NOTE_P (p
))
6488 /* Ignore insns made by CSE; they cannot affect the boundaries of
6491 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6492 high_cuid
= INSN_CUID (p
);
6493 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6494 low_cuid
= INSN_CUID (p
);
6496 /* See if this insn is in our branch path. If it is and we are to
6498 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6500 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6503 /* Point to next entry in path, if any. */
6507 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6508 was specified, we haven't reached our maximum path length, there are
6509 insns following the target of the jump, this is the only use of the
6510 jump label, and the target label is preceded by a BARRIER.
6512 Alternatively, we can follow the jump if it branches around a
6513 block of code and there are no other branches into the block.
6514 In this case invalidate_skipped_block will be called to invalidate any
6515 registers set in the block when following the jump. */
6517 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6519 && GET_CODE (PATTERN (p
)) == SET
6520 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6521 && JUMP_LABEL (p
) != 0
6522 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6523 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6525 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6527 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6528 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6529 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6530 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6533 /* If we ran into a BARRIER, this code is an extension of the
6534 basic block when the branch is taken. */
6535 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6537 /* Don't allow ourself to keep walking around an
6538 always-executed loop. */
6539 if (next_real_insn (q
) == next
)
6545 /* Similarly, don't put a branch in our path more than once. */
6546 for (i
= 0; i
< path_entry
; i
++)
6547 if (data
->path
[i
].branch
== p
)
6550 if (i
!= path_entry
)
6553 data
->path
[path_entry
].branch
= p
;
6554 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6556 /* This branch now ends our path. It was possible that we
6557 didn't see this branch the last time around (when the
6558 insn in front of the target was a JUMP_INSN that was
6559 turned into a no-op). */
6560 path_size
= path_entry
;
6563 /* Mark block so we won't scan it again later. */
6564 PUT_MODE (NEXT_INSN (p
), QImode
);
6566 /* Detect a branch around a block of code. */
6567 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6571 if (next_real_insn (q
) == next
)
6577 for (i
= 0; i
< path_entry
; i
++)
6578 if (data
->path
[i
].branch
== p
)
6581 if (i
!= path_entry
)
6584 /* This is no_labels_between_p (p, q) with an added check for
6585 reaching the end of a function (in case Q precedes P). */
6586 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6592 data
->path
[path_entry
].branch
= p
;
6593 data
->path
[path_entry
++].status
= PATH_AROUND
;
6595 path_size
= path_entry
;
6598 /* Mark block so we won't scan it again later. */
6599 PUT_MODE (NEXT_INSN (p
), QImode
);
6606 data
->low_cuid
= low_cuid
;
6607 data
->high_cuid
= high_cuid
;
6608 data
->nsets
= nsets
;
6611 /* If all jumps in the path are not taken, set our path length to zero
6612 so a rescan won't be done. */
6613 for (i
= path_size
- 1; i
>= 0; i
--)
6614 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6618 data
->path_size
= 0;
6620 data
->path_size
= path_size
;
6622 /* End the current branch path. */
6623 data
->path
[path_size
].branch
= 0;
6626 /* Perform cse on the instructions of a function.
6627 F is the first instruction.
6628 NREGS is one plus the highest pseudo-reg number used in the instruction.
6630 Returns 1 if jump_optimize should be redone due to simplifications
6631 in conditional jump instructions. */
6634 cse_main (rtx f
, int nregs
, FILE *file
)
6636 struct cse_basic_block_data val
;
6640 val
.path
= xmalloc (sizeof (struct branch_path
)
6641 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6643 cse_jumps_altered
= 0;
6644 recorded_label_ref
= 0;
6645 constant_pool_entries_cost
= 0;
6646 constant_pool_entries_regcost
= 0;
6648 rtl_hooks
= cse_rtl_hooks
;
6651 init_alias_analysis ();
6655 max_insn_uid
= get_max_uid ();
6657 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6659 #ifdef LOAD_EXTEND_OP
6661 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6662 and change the code and mode as appropriate. */
6663 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
6666 /* Reset the counter indicating how many elements have been made
6668 n_elements_made
= 0;
6670 /* Find the largest uid. */
6672 max_uid
= get_max_uid ();
6673 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6675 /* Compute the mapping from uids to cuids.
6676 CUIDs are numbers assigned to insns, like uids,
6677 except that cuids increase monotonically through the code.
6678 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6679 between two insns is not affected by -g. */
6681 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6684 || NOTE_LINE_NUMBER (insn
) < 0)
6685 INSN_CUID (insn
) = ++i
;
6687 /* Give a line number note the same cuid as preceding insn. */
6688 INSN_CUID (insn
) = i
;
6691 ggc_push_context ();
6693 /* Loop over basic blocks.
6694 Compute the maximum number of qty's needed for each basic block
6695 (which is 2 for each SET). */
6700 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6701 flag_cse_skip_blocks
);
6703 /* If this basic block was already processed or has no sets, skip it. */
6704 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6706 PUT_MODE (insn
, VOIDmode
);
6707 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6712 cse_basic_block_start
= val
.low_cuid
;
6713 cse_basic_block_end
= val
.high_cuid
;
6714 max_qty
= val
.nsets
* 2;
6717 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6718 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6721 /* Make MAX_QTY bigger to give us room to optimize
6722 past the end of this basic block, if that should prove useful. */
6728 /* If this basic block is being extended by following certain jumps,
6729 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6730 Otherwise, we start after this basic block. */
6731 if (val
.path_size
> 0)
6732 cse_basic_block (insn
, val
.last
, val
.path
);
6735 int old_cse_jumps_altered
= cse_jumps_altered
;
6738 /* When cse changes a conditional jump to an unconditional
6739 jump, we want to reprocess the block, since it will give
6740 us a new branch path to investigate. */
6741 cse_jumps_altered
= 0;
6742 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
6743 if (cse_jumps_altered
== 0
6744 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6747 cse_jumps_altered
|= old_cse_jumps_altered
;
6760 if (max_elements_made
< n_elements_made
)
6761 max_elements_made
= n_elements_made
;
6764 end_alias_analysis ();
6766 free (reg_eqv_table
);
6768 rtl_hooks
= general_rtl_hooks
;
6770 return cse_jumps_altered
|| recorded_label_ref
;
6773 /* Process a single basic block. FROM and TO and the limits of the basic
6774 block. NEXT_BRANCH points to the branch path when following jumps or
6775 a null path when not following jumps.
6777 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
6778 loop. This is true when we are being called for the last time on a
6779 block and this CSE pass is before loop.c. */
6782 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
6786 rtx libcall_insn
= NULL_RTX
;
6788 int no_conflict
= 0;
6790 /* This array is undefined before max_reg, so only allocate
6791 the space actually needed and adjust the start. */
6793 qty_table
= xmalloc ((max_qty
- max_reg
) * sizeof (struct qty_table_elem
));
6794 qty_table
-= max_reg
;
6798 /* TO might be a label. If so, protect it from being deleted. */
6799 if (to
!= 0 && LABEL_P (to
))
6802 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
6804 enum rtx_code code
= GET_CODE (insn
);
6806 /* If we have processed 1,000 insns, flush the hash table to
6807 avoid extreme quadratic behavior. We must not include NOTEs
6808 in the count since there may be more of them when generating
6809 debugging information. If we clear the table at different
6810 times, code generated with -g -O might be different than code
6811 generated with -O but not -g.
6813 ??? This is a real kludge and needs to be done some other way.
6815 if (code
!= NOTE
&& num_insns
++ > 1000)
6817 flush_hash_table ();
6821 /* See if this is a branch that is part of the path. If so, and it is
6822 to be taken, do so. */
6823 if (next_branch
->branch
== insn
)
6825 enum taken status
= next_branch
++->status
;
6826 if (status
!= PATH_NOT_TAKEN
)
6828 if (status
== PATH_TAKEN
)
6829 record_jump_equiv (insn
, 1);
6831 invalidate_skipped_block (NEXT_INSN (insn
));
6833 /* Set the last insn as the jump insn; it doesn't affect cc0.
6834 Then follow this branch. */
6839 insn
= JUMP_LABEL (insn
);
6844 if (GET_MODE (insn
) == QImode
)
6845 PUT_MODE (insn
, VOIDmode
);
6847 if (GET_RTX_CLASS (code
) == RTX_INSN
)
6851 /* Process notes first so we have all notes in canonical forms when
6852 looking for duplicate operations. */
6854 if (REG_NOTES (insn
))
6855 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
6857 /* Track when we are inside in LIBCALL block. Inside such a block,
6858 we do not want to record destinations. The last insn of a
6859 LIBCALL block is not considered to be part of the block, since
6860 its destination is the result of the block and hence should be
6863 if (REG_NOTES (insn
) != 0)
6865 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6866 libcall_insn
= XEXP (p
, 0);
6867 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6869 /* Keep libcall_insn for the last SET insn of a no-conflict
6870 block to prevent changing the destination. */
6876 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6880 cse_insn (insn
, libcall_insn
);
6882 if (no_conflict
== -1)
6888 /* If we haven't already found an insn where we added a LABEL_REF,
6890 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
6891 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6893 recorded_label_ref
= 1;
6896 /* If INSN is now an unconditional jump, skip to the end of our
6897 basic block by pretending that we just did the last insn in the
6898 basic block. If we are jumping to the end of our block, show
6899 that we can have one usage of TO. */
6901 if (any_uncondjump_p (insn
))
6905 free (qty_table
+ max_reg
);
6909 if (JUMP_LABEL (insn
) == to
)
6912 /* Maybe TO was deleted because the jump is unconditional.
6913 If so, there is nothing left in this basic block. */
6914 /* ??? Perhaps it would be smarter to set TO
6915 to whatever follows this insn,
6916 and pretend the basic block had always ended here. */
6917 if (INSN_DELETED_P (to
))
6920 insn
= PREV_INSN (to
);
6923 /* See if it is ok to keep on going past the label
6924 which used to end our basic block. Remember that we incremented
6925 the count of that label, so we decrement it here. If we made
6926 a jump unconditional, TO_USAGE will be one; in that case, we don't
6927 want to count the use in that jump. */
6929 if (to
!= 0 && NEXT_INSN (insn
) == to
6930 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
6932 struct cse_basic_block_data val
;
6935 insn
= NEXT_INSN (to
);
6937 /* If TO was the last insn in the function, we are done. */
6940 free (qty_table
+ max_reg
);
6944 /* If TO was preceded by a BARRIER we are done with this block
6945 because it has no continuation. */
6946 prev
= prev_nonnote_insn (to
);
6947 if (prev
&& BARRIER_P (prev
))
6949 free (qty_table
+ max_reg
);
6953 /* Find the end of the following block. Note that we won't be
6954 following branches in this case. */
6957 val
.path
= xmalloc (sizeof (struct branch_path
)
6958 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6959 cse_end_of_basic_block (insn
, &val
, 0, 0);
6962 /* If the tables we allocated have enough space left
6963 to handle all the SETs in the next basic block,
6964 continue through it. Otherwise, return,
6965 and that block will be scanned individually. */
6966 if (val
.nsets
* 2 + next_qty
> max_qty
)
6969 cse_basic_block_start
= val
.low_cuid
;
6970 cse_basic_block_end
= val
.high_cuid
;
6973 /* Prevent TO from being deleted if it is a label. */
6974 if (to
!= 0 && LABEL_P (to
))
6977 /* Back up so we process the first insn in the extension. */
6978 insn
= PREV_INSN (insn
);
6982 if (next_qty
> max_qty
)
6985 free (qty_table
+ max_reg
);
6987 return to
? NEXT_INSN (to
) : 0;
6990 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
6991 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
6994 check_for_label_ref (rtx
*rtl
, void *data
)
6996 rtx insn
= (rtx
) data
;
6998 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
6999 we must rerun jump since it needs to place the note. If this is a
7000 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7001 since no REG_LABEL will be added. */
7002 return (GET_CODE (*rtl
) == LABEL_REF
7003 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7004 && LABEL_P (XEXP (*rtl
, 0))
7005 && INSN_UID (XEXP (*rtl
, 0)) != 0
7006 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7009 /* Count the number of times registers are used (not set) in X.
7010 COUNTS is an array in which we accumulate the count, INCR is how much
7011 we count each register usage. */
7014 count_reg_usage (rtx x
, int *counts
, int incr
)
7024 switch (code
= GET_CODE (x
))
7027 counts
[REGNO (x
)] += incr
;
7041 /* If we are clobbering a MEM, mark any registers inside the address
7043 if (MEM_P (XEXP (x
, 0)))
7044 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7048 /* Unless we are setting a REG, count everything in SET_DEST. */
7049 if (!REG_P (SET_DEST (x
)))
7050 count_reg_usage (SET_DEST (x
), counts
, incr
);
7051 count_reg_usage (SET_SRC (x
), counts
, incr
);
7055 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7060 count_reg_usage (PATTERN (x
), counts
, incr
);
7062 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7065 note
= find_reg_equal_equiv_note (x
);
7068 rtx eqv
= XEXP (note
, 0);
7070 if (GET_CODE (eqv
) == EXPR_LIST
)
7071 /* This REG_EQUAL note describes the result of a function call.
7072 Process all the arguments. */
7075 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7076 eqv
= XEXP (eqv
, 1);
7078 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7080 count_reg_usage (eqv
, counts
, incr
);
7085 if (REG_NOTE_KIND (x
) == REG_EQUAL
7086 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7087 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7088 involving registers in the address. */
7089 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7090 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7092 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7096 /* Iterate over just the inputs, not the constraints as well. */
7097 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7098 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7108 fmt
= GET_RTX_FORMAT (code
);
7109 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7112 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7113 else if (fmt
[i
] == 'E')
7114 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7115 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7119 /* Return true if set is live. */
7121 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7128 if (set_noop_p (set
))
7132 else if (GET_CODE (SET_DEST (set
)) == CC0
7133 && !side_effects_p (SET_SRC (set
))
7134 && ((tem
= next_nonnote_insn (insn
)) == 0
7136 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7139 else if (!REG_P (SET_DEST (set
))
7140 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7141 || counts
[REGNO (SET_DEST (set
))] != 0
7142 || side_effects_p (SET_SRC (set
)))
7147 /* Return true if insn is live. */
7150 insn_live_p (rtx insn
, int *counts
)
7153 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7155 else if (GET_CODE (PATTERN (insn
)) == SET
)
7156 return set_live_p (PATTERN (insn
), insn
, counts
);
7157 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7159 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7161 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7163 if (GET_CODE (elt
) == SET
)
7165 if (set_live_p (elt
, insn
, counts
))
7168 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7177 /* Return true if libcall is dead as a whole. */
7180 dead_libcall_p (rtx insn
, int *counts
)
7184 /* See if there's a REG_EQUAL note on this insn and try to
7185 replace the source with the REG_EQUAL expression.
7187 We assume that insns with REG_RETVALs can only be reg->reg
7188 copies at this point. */
7189 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7193 set
= single_set (insn
);
7197 new = simplify_rtx (XEXP (note
, 0));
7199 new = XEXP (note
, 0);
7201 /* While changing insn, we must update the counts accordingly. */
7202 count_reg_usage (insn
, counts
, -1);
7204 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7206 count_reg_usage (insn
, counts
, 1);
7207 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7208 remove_note (insn
, note
);
7212 if (CONSTANT_P (new))
7214 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7215 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7217 count_reg_usage (insn
, counts
, 1);
7218 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7219 remove_note (insn
, note
);
7224 count_reg_usage (insn
, counts
, 1);
7228 /* Scan all the insns and delete any that are dead; i.e., they store a register
7229 that is never used or they copy a register to itself.
7231 This is used to remove insns made obviously dead by cse, loop or other
7232 optimizations. It improves the heuristics in loop since it won't try to
7233 move dead invariants out of loops or make givs for dead quantities. The
7234 remaining passes of the compilation are also sped up. */
7237 delete_trivially_dead_insns (rtx insns
, int nreg
)
7241 int in_libcall
= 0, dead_libcall
= 0;
7242 int ndead
= 0, nlastdead
, niterations
= 0;
7244 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7245 /* First count the number of times each register is used. */
7246 counts
= xcalloc (nreg
, sizeof (int));
7247 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7248 count_reg_usage (insn
, counts
, 1);
7254 /* Go from the last insn to the first and delete insns that only set unused
7255 registers or copy a register to itself. As we delete an insn, remove
7256 usage counts for registers it uses.
7258 The first jump optimization pass may leave a real insn as the last
7259 insn in the function. We must not skip that insn or we may end
7260 up deleting code that is not really dead. */
7261 insn
= get_last_insn ();
7262 if (! INSN_P (insn
))
7263 insn
= prev_real_insn (insn
);
7265 for (; insn
; insn
= prev
)
7269 prev
= prev_real_insn (insn
);
7271 /* Don't delete any insns that are part of a libcall block unless
7272 we can delete the whole libcall block.
7274 Flow or loop might get confused if we did that. Remember
7275 that we are scanning backwards. */
7276 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7280 dead_libcall
= dead_libcall_p (insn
, counts
);
7282 else if (in_libcall
)
7283 live_insn
= ! dead_libcall
;
7285 live_insn
= insn_live_p (insn
, counts
);
7287 /* If this is a dead insn, delete it and show registers in it aren't
7292 count_reg_usage (insn
, counts
, -1);
7293 delete_insn_and_edges (insn
);
7297 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7304 while (ndead
!= nlastdead
);
7306 if (dump_file
&& ndead
)
7307 fprintf (dump_file
, "Deleted %i trivially dead insns; %i iterations\n",
7308 ndead
, niterations
);
7311 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7315 /* This function is called via for_each_rtx. The argument, NEWREG, is
7316 a condition code register with the desired mode. If we are looking
7317 at the same register in a different mode, replace it with
7321 cse_change_cc_mode (rtx
*loc
, void *data
)
7323 rtx newreg
= (rtx
) data
;
7327 && REGNO (*loc
) == REGNO (newreg
)
7328 && GET_MODE (*loc
) != GET_MODE (newreg
))
7336 /* Change the mode of any reference to the register REGNO (NEWREG) to
7337 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7338 any instruction which modifies NEWREG. */
7341 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7345 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7347 if (! INSN_P (insn
))
7350 if (reg_set_p (newreg
, insn
))
7353 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, newreg
);
7354 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, newreg
);
7358 /* BB is a basic block which finishes with CC_REG as a condition code
7359 register which is set to CC_SRC. Look through the successors of BB
7360 to find blocks which have a single predecessor (i.e., this one),
7361 and look through those blocks for an assignment to CC_REG which is
7362 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7363 permitted to change the mode of CC_SRC to a compatible mode. This
7364 returns VOIDmode if no equivalent assignments were found.
7365 Otherwise it returns the mode which CC_SRC should wind up with.
7367 The main complexity in this function is handling the mode issues.
7368 We may have more than one duplicate which we can eliminate, and we
7369 try to find a mode which will work for multiple duplicates. */
7371 static enum machine_mode
7372 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7375 enum machine_mode mode
;
7376 unsigned int insn_count
;
7379 enum machine_mode modes
[2];
7384 /* We expect to have two successors. Look at both before picking
7385 the final mode for the comparison. If we have more successors
7386 (i.e., some sort of table jump, although that seems unlikely),
7387 then we require all beyond the first two to use the same
7390 found_equiv
= false;
7391 mode
= GET_MODE (cc_src
);
7393 for (e
= bb
->succ
; e
; e
= e
->succ_next
)
7398 if (e
->flags
& EDGE_COMPLEX
)
7402 || e
->dest
->pred
->pred_next
7403 || e
->dest
== EXIT_BLOCK_PTR
)
7406 end
= NEXT_INSN (BB_END (e
->dest
));
7407 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7411 if (! INSN_P (insn
))
7414 /* If CC_SRC is modified, we have to stop looking for
7415 something which uses it. */
7416 if (modified_in_p (cc_src
, insn
))
7419 /* Check whether INSN sets CC_REG to CC_SRC. */
7420 set
= single_set (insn
);
7422 && REG_P (SET_DEST (set
))
7423 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7426 enum machine_mode set_mode
;
7427 enum machine_mode comp_mode
;
7430 set_mode
= GET_MODE (SET_SRC (set
));
7431 comp_mode
= set_mode
;
7432 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7434 else if (GET_CODE (cc_src
) == COMPARE
7435 && GET_CODE (SET_SRC (set
)) == COMPARE
7437 && rtx_equal_p (XEXP (cc_src
, 0),
7438 XEXP (SET_SRC (set
), 0))
7439 && rtx_equal_p (XEXP (cc_src
, 1),
7440 XEXP (SET_SRC (set
), 1)))
7443 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7444 if (comp_mode
!= VOIDmode
7445 && (can_change_mode
|| comp_mode
== mode
))
7452 if (insn_count
< ARRAY_SIZE (insns
))
7454 insns
[insn_count
] = insn
;
7455 modes
[insn_count
] = set_mode
;
7456 last_insns
[insn_count
] = end
;
7459 if (mode
!= comp_mode
)
7461 if (! can_change_mode
)
7464 PUT_MODE (cc_src
, mode
);
7469 if (set_mode
!= mode
)
7471 /* We found a matching expression in the
7472 wrong mode, but we don't have room to
7473 store it in the array. Punt. This case
7477 /* INSN sets CC_REG to a value equal to CC_SRC
7478 with the right mode. We can simply delete
7483 /* We found an instruction to delete. Keep looking,
7484 in the hopes of finding a three-way jump. */
7488 /* We found an instruction which sets the condition
7489 code, so don't look any farther. */
7493 /* If INSN sets CC_REG in some other way, don't look any
7495 if (reg_set_p (cc_reg
, insn
))
7499 /* If we fell off the bottom of the block, we can keep looking
7500 through successors. We pass CAN_CHANGE_MODE as false because
7501 we aren't prepared to handle compatibility between the
7502 further blocks and this block. */
7505 enum machine_mode submode
;
7507 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7508 if (submode
!= VOIDmode
)
7510 if (submode
!= mode
)
7513 can_change_mode
= false;
7521 /* Now INSN_COUNT is the number of instructions we found which set
7522 CC_REG to a value equivalent to CC_SRC. The instructions are in
7523 INSNS. The modes used by those instructions are in MODES. */
7526 for (i
= 0; i
< insn_count
; ++i
)
7528 if (modes
[i
] != mode
)
7530 /* We need to change the mode of CC_REG in INSNS[i] and
7531 subsequent instructions. */
7534 if (GET_MODE (cc_reg
) == mode
)
7537 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7539 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7543 delete_insn (insns
[i
]);
7549 /* If we have a fixed condition code register (or two), walk through
7550 the instructions and try to eliminate duplicate assignments. */
7553 cse_condition_code_reg (void)
7555 unsigned int cc_regno_1
;
7556 unsigned int cc_regno_2
;
7561 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7564 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7565 if (cc_regno_2
!= INVALID_REGNUM
)
7566 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7568 cc_reg_2
= NULL_RTX
;
7577 enum machine_mode mode
;
7578 enum machine_mode orig_mode
;
7580 /* Look for blocks which end with a conditional jump based on a
7581 condition code register. Then look for the instruction which
7582 sets the condition code register. Then look through the
7583 successor blocks for instructions which set the condition
7584 code register to the same value. There are other possible
7585 uses of the condition code register, but these are by far the
7586 most common and the ones which we are most likely to be able
7589 last_insn
= BB_END (bb
);
7590 if (!JUMP_P (last_insn
))
7593 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7595 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7600 cc_src_insn
= NULL_RTX
;
7602 for (insn
= PREV_INSN (last_insn
);
7603 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7604 insn
= PREV_INSN (insn
))
7608 if (! INSN_P (insn
))
7610 set
= single_set (insn
);
7612 && REG_P (SET_DEST (set
))
7613 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7616 cc_src
= SET_SRC (set
);
7619 else if (reg_set_p (cc_reg
, insn
))
7626 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7629 /* Now CC_REG is a condition code register used for a
7630 conditional jump at the end of the block, and CC_SRC, in
7631 CC_SRC_INSN, is the value to which that condition code
7632 register is set, and CC_SRC is still meaningful at the end of
7635 orig_mode
= GET_MODE (cc_src
);
7636 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7637 if (mode
!= VOIDmode
)
7639 if (mode
!= GET_MODE (cc_src
))
7641 if (mode
!= orig_mode
)
7643 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7645 /* Change the mode of CC_REG in CC_SRC_INSN to
7646 GET_MODE (NEWREG). */
7647 for_each_rtx (&PATTERN (cc_src_insn
), cse_change_cc_mode
,
7649 for_each_rtx (®_NOTES (cc_src_insn
), cse_change_cc_mode
,
7652 /* Do the same in the following insns that use the
7653 current value of CC_REG within BB. */
7654 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7655 NEXT_INSN (last_insn
),