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[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 unsigned int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
386 REG_LABEL, we have to rerun jump after CSE to put in the note. */
387 static int recorded_label_ref;
389 /* canon_hash stores 1 in do_not_record
390 if it notices a reference to CC0, PC, or some other volatile
391 subexpression. */
393 static int do_not_record;
395 #ifdef LOAD_EXTEND_OP
397 /* Scratch rtl used when looking for load-extended copy of a MEM. */
398 static rtx memory_extend_rtx;
399 #endif
401 /* canon_hash stores 1 in hash_arg_in_memory
402 if it notices a reference to memory within the expression being hashed. */
404 static int hash_arg_in_memory;
406 /* The hash table contains buckets which are chains of `struct table_elt's,
407 each recording one expression's information.
408 That expression is in the `exp' field.
410 The canon_exp field contains a canonical (from the point of view of
411 alias analysis) version of the `exp' field.
413 Those elements with the same hash code are chained in both directions
414 through the `next_same_hash' and `prev_same_hash' fields.
416 Each set of expressions with equivalent values
417 are on a two-way chain through the `next_same_value'
418 and `prev_same_value' fields, and all point with
419 the `first_same_value' field at the first element in
420 that chain. The chain is in order of increasing cost.
421 Each element's cost value is in its `cost' field.
423 The `in_memory' field is nonzero for elements that
424 involve any reference to memory. These elements are removed
425 whenever a write is done to an unidentified location in memory.
426 To be safe, we assume that a memory address is unidentified unless
427 the address is either a symbol constant or a constant plus
428 the frame pointer or argument pointer.
430 The `related_value' field is used to connect related expressions
431 (that differ by adding an integer).
432 The related expressions are chained in a circular fashion.
433 `related_value' is zero for expressions for which this
434 chain is not useful.
436 The `cost' field stores the cost of this element's expression.
437 The `regcost' field stores the value returned by approx_reg_cost for
438 this element's expression.
440 The `is_const' flag is set if the element is a constant (including
441 a fixed address).
443 The `flag' field is used as a temporary during some search routines.
445 The `mode' field is usually the same as GET_MODE (`exp'), but
446 if `exp' is a CONST_INT and has no machine mode then the `mode'
447 field is the mode it was being used as. Each constant is
448 recorded separately for each mode it is used with. */
450 struct table_elt
452 rtx exp;
453 rtx canon_exp;
454 struct table_elt *next_same_hash;
455 struct table_elt *prev_same_hash;
456 struct table_elt *next_same_value;
457 struct table_elt *prev_same_value;
458 struct table_elt *first_same_value;
459 struct table_elt *related_value;
460 int cost;
461 int regcost;
462 enum machine_mode mode;
463 char in_memory;
464 char is_const;
465 char flag;
468 /* We don't want a lot of buckets, because we rarely have very many
469 things stored in the hash table, and a lot of buckets slows
470 down a lot of loops that happen frequently. */
471 #define HASH_SHIFT 5
472 #define HASH_SIZE (1 << HASH_SHIFT)
473 #define HASH_MASK (HASH_SIZE - 1)
475 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
476 register (hard registers may require `do_not_record' to be set). */
478 #define HASH(X, M) \
479 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
480 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
481 : canon_hash (X, M)) & HASH_MASK)
483 /* Determine whether register number N is considered a fixed register for the
484 purpose of approximating register costs.
485 It is desirable to replace other regs with fixed regs, to reduce need for
486 non-fixed hard regs.
487 A reg wins if it is either the frame pointer or designated as fixed. */
488 #define FIXED_REGNO_P(N) \
489 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
490 || fixed_regs[N] || global_regs[N])
492 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
493 hard registers and pointers into the frame are the cheapest with a cost
494 of 0. Next come pseudos with a cost of one and other hard registers with
495 a cost of 2. Aside from these special cases, call `rtx_cost'. */
497 #define CHEAP_REGNO(N) \
498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
499 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
500 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
501 || ((N) < FIRST_PSEUDO_REGISTER \
502 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
504 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
505 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
507 /* Get the info associated with register N. */
509 #define GET_CSE_REG_INFO(N) \
510 (((N) == cached_regno && cached_cse_reg_info) \
511 ? cached_cse_reg_info : get_cse_reg_info ((N)))
513 /* Get the number of times this register has been updated in this
514 basic block. */
516 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
518 /* Get the point at which REG was recorded in the table. */
520 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
522 /* Get the quantity number for REG. */
524 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
526 /* Determine if the quantity number for register X represents a valid index
527 into the qty_table. */
529 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
531 static struct table_elt *table[HASH_SIZE];
533 /* Chain of `struct table_elt's made so far for this function
534 but currently removed from the table. */
536 static struct table_elt *free_element_chain;
538 /* Number of `struct table_elt' structures made so far for this function. */
540 static int n_elements_made;
542 /* Maximum value `n_elements_made' has had so far in this compilation
543 for functions previously processed. */
545 static int max_elements_made;
547 /* Surviving equivalence class when two equivalence classes are merged
548 by recording the effects of a jump in the last insn. Zero if the
549 last insn was not a conditional jump. */
551 static struct table_elt *last_jump_equiv_class;
553 /* Set to the cost of a constant pool reference if one was found for a
554 symbolic constant. If this was found, it means we should try to
555 convert constants into constant pool entries if they don't fit in
556 the insn. */
558 static int constant_pool_entries_cost;
560 /* Define maximum length of a branch path. */
562 #define PATHLENGTH 10
564 /* This data describes a block that will be processed by cse_basic_block. */
566 struct cse_basic_block_data
568 /* Lowest CUID value of insns in block. */
569 int low_cuid;
570 /* Highest CUID value of insns in block. */
571 int high_cuid;
572 /* Total number of SETs in block. */
573 int nsets;
574 /* Last insn in the block. */
575 rtx last;
576 /* Size of current branch path, if any. */
577 int path_size;
578 /* Current branch path, indicating which branches will be taken. */
579 struct branch_path
581 /* The branch insn. */
582 rtx branch;
583 /* Whether it should be taken or not. AROUND is the same as taken
584 except that it is used when the destination label is not preceded
585 by a BARRIER. */
586 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
587 } path[PATHLENGTH];
590 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
591 virtual regs here because the simplify_*_operation routines are called
592 by integrate.c, which is called before virtual register instantiation.
594 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
595 a header file so that their definitions can be shared with the
596 simplification routines in simplify-rtx.c. Until then, do not
597 change these macros without also changing the copy in simplify-rtx.c. */
599 #define FIXED_BASE_PLUS_P(X) \
600 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
601 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
602 || (X) == virtual_stack_vars_rtx \
603 || (X) == virtual_incoming_args_rtx \
604 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
605 && (XEXP (X, 0) == frame_pointer_rtx \
606 || XEXP (X, 0) == hard_frame_pointer_rtx \
607 || ((X) == arg_pointer_rtx \
608 && fixed_regs[ARG_POINTER_REGNUM]) \
609 || XEXP (X, 0) == virtual_stack_vars_rtx \
610 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
611 || GET_CODE (X) == ADDRESSOF)
613 /* Similar, but also allows reference to the stack pointer.
615 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
616 arg_pointer_rtx by itself is nonzero, because on at least one machine,
617 the i960, the arg pointer is zero when it is unused. */
619 #define NONZERO_BASE_PLUS_P(X) \
620 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
621 || (X) == virtual_stack_vars_rtx \
622 || (X) == virtual_incoming_args_rtx \
623 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
624 && (XEXP (X, 0) == frame_pointer_rtx \
625 || XEXP (X, 0) == hard_frame_pointer_rtx \
626 || ((X) == arg_pointer_rtx \
627 && fixed_regs[ARG_POINTER_REGNUM]) \
628 || XEXP (X, 0) == virtual_stack_vars_rtx \
629 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
630 || (X) == stack_pointer_rtx \
631 || (X) == virtual_stack_dynamic_rtx \
632 || (X) == virtual_outgoing_args_rtx \
633 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
634 && (XEXP (X, 0) == stack_pointer_rtx \
635 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
636 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
637 || GET_CODE (X) == ADDRESSOF)
639 static int notreg_cost PARAMS ((rtx, enum rtx_code));
640 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
641 static int approx_reg_cost PARAMS ((rtx));
642 static int preferrable PARAMS ((int, int, int, int));
643 static void new_basic_block PARAMS ((void));
644 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
645 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
646 static void delete_reg_equiv PARAMS ((unsigned int));
647 static int mention_regs PARAMS ((rtx));
648 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
649 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
650 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
651 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
652 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
653 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
654 enum machine_mode));
655 static void merge_equiv_classes PARAMS ((struct table_elt *,
656 struct table_elt *));
657 static void invalidate PARAMS ((rtx, enum machine_mode));
658 static int cse_rtx_varies_p PARAMS ((rtx, int));
659 static void remove_invalid_refs PARAMS ((unsigned int));
660 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
661 enum machine_mode));
662 static void rehash_using_reg PARAMS ((rtx));
663 static void invalidate_memory PARAMS ((void));
664 static void invalidate_for_call PARAMS ((void));
665 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
666 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
667 static unsigned canon_hash_string PARAMS ((const char *));
668 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
669 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
670 static rtx canon_reg PARAMS ((rtx, rtx));
671 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
672 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
673 enum machine_mode *,
674 enum machine_mode *));
675 static rtx fold_rtx PARAMS ((rtx, rtx));
676 static rtx equiv_constant PARAMS ((rtx));
677 static void record_jump_equiv PARAMS ((rtx, int));
678 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
679 rtx, rtx, int));
680 static void cse_insn PARAMS ((rtx, rtx));
681 static int addr_affects_sp_p PARAMS ((rtx));
682 static void invalidate_from_clobbers PARAMS ((rtx));
683 static rtx cse_process_notes PARAMS ((rtx, rtx));
684 static void cse_around_loop PARAMS ((rtx));
685 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
686 static void invalidate_skipped_block PARAMS ((rtx));
687 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
688 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
689 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
690 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
691 static int check_for_label_ref PARAMS ((rtx *, void *));
692 extern void dump_class PARAMS ((struct table_elt*));
693 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
694 static int check_dependence PARAMS ((rtx *, void *));
696 static void flush_hash_table PARAMS ((void));
698 /* Dump the expressions in the equivalence class indicated by CLASSP.
699 This function is used only for debugging. */
700 void
701 dump_class (classp)
702 struct table_elt *classp;
704 struct table_elt *elt;
706 fprintf (stderr, "Equivalence chain for ");
707 print_rtl (stderr, classp->exp);
708 fprintf (stderr, ": \n");
710 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
712 print_rtl (stderr, elt->exp);
713 fprintf (stderr, "\n");
717 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
719 static int
720 approx_reg_cost_1 (xp, data)
721 rtx *xp;
722 void *data;
724 rtx x = *xp;
725 regset set = (regset) data;
727 if (x && GET_CODE (x) == REG)
728 SET_REGNO_REG_SET (set, REGNO (x));
729 return 0;
732 /* Return an estimate of the cost of the registers used in an rtx.
733 This is mostly the number of different REG expressions in the rtx;
734 however for some excecptions like fixed registers we use a cost of
735 0. If any other hard register reference occurs, return MAX_COST. */
737 static int
738 approx_reg_cost (x)
739 rtx x;
741 regset_head set;
742 int i;
743 int cost = 0;
744 int hardregs = 0;
746 INIT_REG_SET (&set);
747 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
749 EXECUTE_IF_SET_IN_REG_SET
750 (&set, 0, i,
752 if (! CHEAP_REGNO (i))
754 if (i < FIRST_PSEUDO_REGISTER)
755 hardregs++;
757 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
761 CLEAR_REG_SET (&set);
762 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
765 /* Return a negative value if an rtx A, whose costs are given by COST_A
766 and REGCOST_A, is more desirable than an rtx B.
767 Return a positive value if A is less desirable, or 0 if the two are
768 equally good. */
769 static int
770 preferrable (cost_a, regcost_a, cost_b, regcost_b)
771 int cost_a, regcost_a, cost_b, regcost_b;
773 /* First, get rid of a cases involving expressions that are entirely
774 unwanted. */
775 if (cost_a != cost_b)
777 if (cost_a == MAX_COST)
778 return 1;
779 if (cost_b == MAX_COST)
780 return -1;
783 /* Avoid extending lifetimes of hardregs. */
784 if (regcost_a != regcost_b)
786 if (regcost_a == MAX_COST)
787 return 1;
788 if (regcost_b == MAX_COST)
789 return -1;
792 /* Normal operation costs take precedence. */
793 if (cost_a != cost_b)
794 return cost_a - cost_b;
795 /* Only if these are identical consider effects on register pressure. */
796 if (regcost_a != regcost_b)
797 return regcost_a - regcost_b;
798 return 0;
801 /* Internal function, to compute cost when X is not a register; called
802 from COST macro to keep it simple. */
804 static int
805 notreg_cost (x, outer)
806 rtx x;
807 enum rtx_code outer;
809 return ((GET_CODE (x) == SUBREG
810 && GET_CODE (SUBREG_REG (x)) == REG
811 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
812 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
813 && (GET_MODE_SIZE (GET_MODE (x))
814 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
815 && subreg_lowpart_p (x)
816 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
817 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
819 : rtx_cost (x, outer) * 2);
822 /* Return an estimate of the cost of computing rtx X.
823 One use is in cse, to decide which expression to keep in the hash table.
824 Another is in rtl generation, to pick the cheapest way to multiply.
825 Other uses like the latter are expected in the future. */
828 rtx_cost (x, outer_code)
829 rtx x;
830 enum rtx_code outer_code ATTRIBUTE_UNUSED;
832 register int i, j;
833 register enum rtx_code code;
834 register const char *fmt;
835 register int total;
837 if (x == 0)
838 return 0;
840 /* Compute the default costs of certain things.
841 Note that RTX_COSTS can override the defaults. */
843 code = GET_CODE (x);
844 switch (code)
846 case MULT:
847 /* Count multiplication by 2**n as a shift,
848 because if we are considering it, we would output it as a shift. */
849 if (GET_CODE (XEXP (x, 1)) == CONST_INT
850 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
851 total = 2;
852 else
853 total = COSTS_N_INSNS (5);
854 break;
855 case DIV:
856 case UDIV:
857 case MOD:
858 case UMOD:
859 total = COSTS_N_INSNS (7);
860 break;
861 case USE:
862 /* Used in loop.c and combine.c as a marker. */
863 total = 0;
864 break;
865 default:
866 total = COSTS_N_INSNS (1);
869 switch (code)
871 case REG:
872 return 0;
874 case SUBREG:
875 /* If we can't tie these modes, make this expensive. The larger
876 the mode, the more expensive it is. */
877 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
878 return COSTS_N_INSNS (2
879 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
880 break;
882 #ifdef RTX_COSTS
883 RTX_COSTS (x, code, outer_code);
884 #endif
885 #ifdef CONST_COSTS
886 CONST_COSTS (x, code, outer_code);
887 #endif
889 default:
890 #ifdef DEFAULT_RTX_COSTS
891 DEFAULT_RTX_COSTS (x, code, outer_code);
892 #endif
893 break;
896 /* Sum the costs of the sub-rtx's, plus cost of this operation,
897 which is already in total. */
899 fmt = GET_RTX_FORMAT (code);
900 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
901 if (fmt[i] == 'e')
902 total += rtx_cost (XEXP (x, i), code);
903 else if (fmt[i] == 'E')
904 for (j = 0; j < XVECLEN (x, i); j++)
905 total += rtx_cost (XVECEXP (x, i, j), code);
907 return total;
910 /* Return cost of address expression X.
911 Expect that X is propertly formed address reference. */
914 address_cost (x, mode)
915 rtx x;
916 enum machine_mode mode;
918 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
919 during CSE, such nodes are present. Using an ADDRESSOF node which
920 refers to the address of a REG is a good thing because we can then
921 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
923 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
924 return -1;
926 /* We may be asked for cost of various unusual addresses, such as operands
927 of push instruction. It is not worthwhile to complicate writing
928 of ADDRESS_COST macro by such cases. */
930 if (!memory_address_p (mode, x))
931 return 1000;
932 #ifdef ADDRESS_COST
933 return ADDRESS_COST (x);
934 #else
935 return rtx_cost (x, MEM);
936 #endif
940 static struct cse_reg_info *
941 get_cse_reg_info (regno)
942 unsigned int regno;
944 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
945 struct cse_reg_info *p;
947 for (p = *hash_head; p != NULL; p = p->hash_next)
948 if (p->regno == regno)
949 break;
951 if (p == NULL)
953 /* Get a new cse_reg_info structure. */
954 if (cse_reg_info_free_list)
956 p = cse_reg_info_free_list;
957 cse_reg_info_free_list = p->next;
959 else
960 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
962 /* Insert into hash table. */
963 p->hash_next = *hash_head;
964 *hash_head = p;
966 /* Initialize it. */
967 p->reg_tick = 1;
968 p->reg_in_table = -1;
969 p->reg_qty = regno;
970 p->regno = regno;
971 p->next = cse_reg_info_used_list;
972 cse_reg_info_used_list = p;
973 if (!cse_reg_info_used_list_end)
974 cse_reg_info_used_list_end = p;
977 /* Cache this lookup; we tend to be looking up information about the
978 same register several times in a row. */
979 cached_regno = regno;
980 cached_cse_reg_info = p;
982 return p;
985 /* Clear the hash table and initialize each register with its own quantity,
986 for a new basic block. */
988 static void
989 new_basic_block ()
991 register int i;
993 next_qty = max_reg;
995 /* Clear out hash table state for this pass. */
997 memset ((char *) reg_hash, 0, sizeof reg_hash);
999 if (cse_reg_info_used_list)
1001 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
1002 cse_reg_info_free_list = cse_reg_info_used_list;
1003 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1005 cached_cse_reg_info = 0;
1007 CLEAR_HARD_REG_SET (hard_regs_in_table);
1009 /* The per-quantity values used to be initialized here, but it is
1010 much faster to initialize each as it is made in `make_new_qty'. */
1012 for (i = 0; i < HASH_SIZE; i++)
1014 struct table_elt *first;
1016 first = table[i];
1017 if (first != NULL)
1019 struct table_elt *last = first;
1021 table[i] = NULL;
1023 while (last->next_same_hash != NULL)
1024 last = last->next_same_hash;
1026 /* Now relink this hash entire chain into
1027 the free element list. */
1029 last->next_same_hash = free_element_chain;
1030 free_element_chain = first;
1034 prev_insn = 0;
1036 #ifdef HAVE_cc0
1037 prev_insn_cc0 = 0;
1038 #endif
1041 /* Say that register REG contains a quantity in mode MODE not in any
1042 register before and initialize that quantity. */
1044 static void
1045 make_new_qty (reg, mode)
1046 unsigned int reg;
1047 enum machine_mode mode;
1049 register int q;
1050 register struct qty_table_elem *ent;
1051 register struct reg_eqv_elem *eqv;
1053 if (next_qty >= max_qty)
1054 abort ();
1056 q = REG_QTY (reg) = next_qty++;
1057 ent = &qty_table[q];
1058 ent->first_reg = reg;
1059 ent->last_reg = reg;
1060 ent->mode = mode;
1061 ent->const_rtx = ent->const_insn = NULL_RTX;
1062 ent->comparison_code = UNKNOWN;
1064 eqv = &reg_eqv_table[reg];
1065 eqv->next = eqv->prev = -1;
1068 /* Make reg NEW equivalent to reg OLD.
1069 OLD is not changing; NEW is. */
1071 static void
1072 make_regs_eqv (new, old)
1073 unsigned int new, old;
1075 unsigned int lastr, firstr;
1076 int q = REG_QTY (old);
1077 struct qty_table_elem *ent;
1079 ent = &qty_table[q];
1081 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1082 if (! REGNO_QTY_VALID_P (old))
1083 abort ();
1085 REG_QTY (new) = q;
1086 firstr = ent->first_reg;
1087 lastr = ent->last_reg;
1089 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1090 hard regs. Among pseudos, if NEW will live longer than any other reg
1091 of the same qty, and that is beyond the current basic block,
1092 make it the new canonical replacement for this qty. */
1093 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1094 /* Certain fixed registers might be of the class NO_REGS. This means
1095 that not only can they not be allocated by the compiler, but
1096 they cannot be used in substitutions or canonicalizations
1097 either. */
1098 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1099 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1100 || (new >= FIRST_PSEUDO_REGISTER
1101 && (firstr < FIRST_PSEUDO_REGISTER
1102 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1103 || (uid_cuid[REGNO_FIRST_UID (new)]
1104 < cse_basic_block_start))
1105 && (uid_cuid[REGNO_LAST_UID (new)]
1106 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1108 reg_eqv_table[firstr].prev = new;
1109 reg_eqv_table[new].next = firstr;
1110 reg_eqv_table[new].prev = -1;
1111 ent->first_reg = new;
1113 else
1115 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1116 Otherwise, insert before any non-fixed hard regs that are at the
1117 end. Registers of class NO_REGS cannot be used as an
1118 equivalent for anything. */
1119 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1120 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1121 && new >= FIRST_PSEUDO_REGISTER)
1122 lastr = reg_eqv_table[lastr].prev;
1123 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1124 if (reg_eqv_table[lastr].next >= 0)
1125 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1126 else
1127 qty_table[q].last_reg = new;
1128 reg_eqv_table[lastr].next = new;
1129 reg_eqv_table[new].prev = lastr;
1133 /* Remove REG from its equivalence class. */
1135 static void
1136 delete_reg_equiv (reg)
1137 unsigned int reg;
1139 register struct qty_table_elem *ent;
1140 register int q = REG_QTY (reg);
1141 register int p, n;
1143 /* If invalid, do nothing. */
1144 if (q == (int) reg)
1145 return;
1147 ent = &qty_table[q];
1149 p = reg_eqv_table[reg].prev;
1150 n = reg_eqv_table[reg].next;
1152 if (n != -1)
1153 reg_eqv_table[n].prev = p;
1154 else
1155 ent->last_reg = p;
1156 if (p != -1)
1157 reg_eqv_table[p].next = n;
1158 else
1159 ent->first_reg = n;
1161 REG_QTY (reg) = reg;
1164 /* Remove any invalid expressions from the hash table
1165 that refer to any of the registers contained in expression X.
1167 Make sure that newly inserted references to those registers
1168 as subexpressions will be considered valid.
1170 mention_regs is not called when a register itself
1171 is being stored in the table.
1173 Return 1 if we have done something that may have changed the hash code
1174 of X. */
1176 static int
1177 mention_regs (x)
1178 rtx x;
1180 register enum rtx_code code;
1181 register int i, j;
1182 register const char *fmt;
1183 register int changed = 0;
1185 if (x == 0)
1186 return 0;
1188 code = GET_CODE (x);
1189 if (code == REG)
1191 unsigned int regno = REGNO (x);
1192 unsigned int endregno
1193 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1194 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1195 unsigned int i;
1197 for (i = regno; i < endregno; i++)
1199 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1200 remove_invalid_refs (i);
1202 REG_IN_TABLE (i) = REG_TICK (i);
1205 return 0;
1208 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1209 pseudo if they don't use overlapping words. We handle only pseudos
1210 here for simplicity. */
1211 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1212 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1214 unsigned int i = REGNO (SUBREG_REG (x));
1216 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1218 /* If reg_tick has been incremented more than once since
1219 reg_in_table was last set, that means that the entire
1220 register has been set before, so discard anything memorized
1221 for the entire register, including all SUBREG expressions. */
1222 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1223 remove_invalid_refs (i);
1224 else
1225 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1228 REG_IN_TABLE (i) = REG_TICK (i);
1229 return 0;
1232 /* If X is a comparison or a COMPARE and either operand is a register
1233 that does not have a quantity, give it one. This is so that a later
1234 call to record_jump_equiv won't cause X to be assigned a different
1235 hash code and not found in the table after that call.
1237 It is not necessary to do this here, since rehash_using_reg can
1238 fix up the table later, but doing this here eliminates the need to
1239 call that expensive function in the most common case where the only
1240 use of the register is in the comparison. */
1242 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1244 if (GET_CODE (XEXP (x, 0)) == REG
1245 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1246 if (insert_regs (XEXP (x, 0), NULL, 0))
1248 rehash_using_reg (XEXP (x, 0));
1249 changed = 1;
1252 if (GET_CODE (XEXP (x, 1)) == REG
1253 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1254 if (insert_regs (XEXP (x, 1), NULL, 0))
1256 rehash_using_reg (XEXP (x, 1));
1257 changed = 1;
1261 fmt = GET_RTX_FORMAT (code);
1262 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1263 if (fmt[i] == 'e')
1264 changed |= mention_regs (XEXP (x, i));
1265 else if (fmt[i] == 'E')
1266 for (j = 0; j < XVECLEN (x, i); j++)
1267 changed |= mention_regs (XVECEXP (x, i, j));
1269 return changed;
1272 /* Update the register quantities for inserting X into the hash table
1273 with a value equivalent to CLASSP.
1274 (If the class does not contain a REG, it is irrelevant.)
1275 If MODIFIED is nonzero, X is a destination; it is being modified.
1276 Note that delete_reg_equiv should be called on a register
1277 before insert_regs is done on that register with MODIFIED != 0.
1279 Nonzero value means that elements of reg_qty have changed
1280 so X's hash code may be different. */
1282 static int
1283 insert_regs (x, classp, modified)
1284 rtx x;
1285 struct table_elt *classp;
1286 int modified;
1288 if (GET_CODE (x) == REG)
1290 unsigned int regno = REGNO (x);
1291 int qty_valid;
1293 /* If REGNO is in the equivalence table already but is of the
1294 wrong mode for that equivalence, don't do anything here. */
1296 qty_valid = REGNO_QTY_VALID_P (regno);
1297 if (qty_valid)
1299 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1301 if (ent->mode != GET_MODE (x))
1302 return 0;
1305 if (modified || ! qty_valid)
1307 if (classp)
1308 for (classp = classp->first_same_value;
1309 classp != 0;
1310 classp = classp->next_same_value)
1311 if (GET_CODE (classp->exp) == REG
1312 && GET_MODE (classp->exp) == GET_MODE (x))
1314 make_regs_eqv (regno, REGNO (classp->exp));
1315 return 1;
1318 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1319 than REG_IN_TABLE to find out if there was only a single preceding
1320 invalidation - for the SUBREG - or another one, which would be
1321 for the full register. However, if we find here that REG_TICK
1322 indicates that the register is invalid, it means that it has
1323 been invalidated in a separate operation. The SUBREG might be used
1324 now (then this is a recursive call), or we might use the full REG
1325 now and a SUBREG of it later. So bump up REG_TICK so that
1326 mention_regs will do the right thing. */
1327 if (! modified
1328 && REG_IN_TABLE (regno) >= 0
1329 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1330 REG_TICK (regno)++;
1331 make_new_qty (regno, GET_MODE (x));
1332 return 1;
1335 return 0;
1338 /* If X is a SUBREG, we will likely be inserting the inner register in the
1339 table. If that register doesn't have an assigned quantity number at
1340 this point but does later, the insertion that we will be doing now will
1341 not be accessible because its hash code will have changed. So assign
1342 a quantity number now. */
1344 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1345 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1347 insert_regs (SUBREG_REG (x), NULL, 0);
1348 mention_regs (x);
1349 return 1;
1351 else
1352 return mention_regs (x);
1355 /* Look in or update the hash table. */
1357 /* Remove table element ELT from use in the table.
1358 HASH is its hash code, made using the HASH macro.
1359 It's an argument because often that is known in advance
1360 and we save much time not recomputing it. */
1362 static void
1363 remove_from_table (elt, hash)
1364 register struct table_elt *elt;
1365 unsigned hash;
1367 if (elt == 0)
1368 return;
1370 /* Mark this element as removed. See cse_insn. */
1371 elt->first_same_value = 0;
1373 /* Remove the table element from its equivalence class. */
1376 register struct table_elt *prev = elt->prev_same_value;
1377 register struct table_elt *next = elt->next_same_value;
1379 if (next)
1380 next->prev_same_value = prev;
1382 if (prev)
1383 prev->next_same_value = next;
1384 else
1386 register struct table_elt *newfirst = next;
1387 while (next)
1389 next->first_same_value = newfirst;
1390 next = next->next_same_value;
1395 /* Remove the table element from its hash bucket. */
1398 register struct table_elt *prev = elt->prev_same_hash;
1399 register struct table_elt *next = elt->next_same_hash;
1401 if (next)
1402 next->prev_same_hash = prev;
1404 if (prev)
1405 prev->next_same_hash = next;
1406 else if (table[hash] == elt)
1407 table[hash] = next;
1408 else
1410 /* This entry is not in the proper hash bucket. This can happen
1411 when two classes were merged by `merge_equiv_classes'. Search
1412 for the hash bucket that it heads. This happens only very
1413 rarely, so the cost is acceptable. */
1414 for (hash = 0; hash < HASH_SIZE; hash++)
1415 if (table[hash] == elt)
1416 table[hash] = next;
1420 /* Remove the table element from its related-value circular chain. */
1422 if (elt->related_value != 0 && elt->related_value != elt)
1424 register struct table_elt *p = elt->related_value;
1426 while (p->related_value != elt)
1427 p = p->related_value;
1428 p->related_value = elt->related_value;
1429 if (p->related_value == p)
1430 p->related_value = 0;
1433 /* Now add it to the free element chain. */
1434 elt->next_same_hash = free_element_chain;
1435 free_element_chain = elt;
1438 /* Look up X in the hash table and return its table element,
1439 or 0 if X is not in the table.
1441 MODE is the machine-mode of X, or if X is an integer constant
1442 with VOIDmode then MODE is the mode with which X will be used.
1444 Here we are satisfied to find an expression whose tree structure
1445 looks like X. */
1447 static struct table_elt *
1448 lookup (x, hash, mode)
1449 rtx x;
1450 unsigned hash;
1451 enum machine_mode mode;
1453 register struct table_elt *p;
1455 for (p = table[hash]; p; p = p->next_same_hash)
1456 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1457 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1458 return p;
1460 return 0;
1463 /* Like `lookup' but don't care whether the table element uses invalid regs.
1464 Also ignore discrepancies in the machine mode of a register. */
1466 static struct table_elt *
1467 lookup_for_remove (x, hash, mode)
1468 rtx x;
1469 unsigned hash;
1470 enum machine_mode mode;
1472 register struct table_elt *p;
1474 if (GET_CODE (x) == REG)
1476 unsigned int regno = REGNO (x);
1478 /* Don't check the machine mode when comparing registers;
1479 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1480 for (p = table[hash]; p; p = p->next_same_hash)
1481 if (GET_CODE (p->exp) == REG
1482 && REGNO (p->exp) == regno)
1483 return p;
1485 else
1487 for (p = table[hash]; p; p = p->next_same_hash)
1488 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1489 return p;
1492 return 0;
1495 /* Look for an expression equivalent to X and with code CODE.
1496 If one is found, return that expression. */
1498 static rtx
1499 lookup_as_function (x, code)
1500 rtx x;
1501 enum rtx_code code;
1503 register struct table_elt *p
1504 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1506 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1507 long as we are narrowing. So if we looked in vain for a mode narrower
1508 than word_mode before, look for word_mode now. */
1509 if (p == 0 && code == CONST_INT
1510 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1512 x = copy_rtx (x);
1513 PUT_MODE (x, word_mode);
1514 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1517 if (p == 0)
1518 return 0;
1520 for (p = p->first_same_value; p; p = p->next_same_value)
1521 if (GET_CODE (p->exp) == code
1522 /* Make sure this is a valid entry in the table. */
1523 && exp_equiv_p (p->exp, p->exp, 1, 0))
1524 return p->exp;
1526 return 0;
1529 /* Insert X in the hash table, assuming HASH is its hash code
1530 and CLASSP is an element of the class it should go in
1531 (or 0 if a new class should be made).
1532 It is inserted at the proper position to keep the class in
1533 the order cheapest first.
1535 MODE is the machine-mode of X, or if X is an integer constant
1536 with VOIDmode then MODE is the mode with which X will be used.
1538 For elements of equal cheapness, the most recent one
1539 goes in front, except that the first element in the list
1540 remains first unless a cheaper element is added. The order of
1541 pseudo-registers does not matter, as canon_reg will be called to
1542 find the cheapest when a register is retrieved from the table.
1544 The in_memory field in the hash table element is set to 0.
1545 The caller must set it nonzero if appropriate.
1547 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1548 and if insert_regs returns a nonzero value
1549 you must then recompute its hash code before calling here.
1551 If necessary, update table showing constant values of quantities. */
1553 #define CHEAPER(X, Y) \
1554 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1556 static struct table_elt *
1557 insert (x, classp, hash, mode)
1558 register rtx x;
1559 register struct table_elt *classp;
1560 unsigned hash;
1561 enum machine_mode mode;
1563 register struct table_elt *elt;
1565 /* If X is a register and we haven't made a quantity for it,
1566 something is wrong. */
1567 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1568 abort ();
1570 /* If X is a hard register, show it is being put in the table. */
1571 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1573 unsigned int regno = REGNO (x);
1574 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1575 unsigned int i;
1577 for (i = regno; i < endregno; i++)
1578 SET_HARD_REG_BIT (hard_regs_in_table, i);
1581 /* Put an element for X into the right hash bucket. */
1583 elt = free_element_chain;
1584 if (elt)
1585 free_element_chain = elt->next_same_hash;
1586 else
1588 n_elements_made++;
1589 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1592 elt->exp = x;
1593 elt->canon_exp = NULL_RTX;
1594 elt->cost = COST (x);
1595 elt->regcost = approx_reg_cost (x);
1596 elt->next_same_value = 0;
1597 elt->prev_same_value = 0;
1598 elt->next_same_hash = table[hash];
1599 elt->prev_same_hash = 0;
1600 elt->related_value = 0;
1601 elt->in_memory = 0;
1602 elt->mode = mode;
1603 elt->is_const = (CONSTANT_P (x)
1604 /* GNU C++ takes advantage of this for `this'
1605 (and other const values). */
1606 || (RTX_UNCHANGING_P (x)
1607 && GET_CODE (x) == REG
1608 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1609 || FIXED_BASE_PLUS_P (x));
1611 if (table[hash])
1612 table[hash]->prev_same_hash = elt;
1613 table[hash] = elt;
1615 /* Put it into the proper value-class. */
1616 if (classp)
1618 classp = classp->first_same_value;
1619 if (CHEAPER (elt, classp))
1620 /* Insert at the head of the class */
1622 register struct table_elt *p;
1623 elt->next_same_value = classp;
1624 classp->prev_same_value = elt;
1625 elt->first_same_value = elt;
1627 for (p = classp; p; p = p->next_same_value)
1628 p->first_same_value = elt;
1630 else
1632 /* Insert not at head of the class. */
1633 /* Put it after the last element cheaper than X. */
1634 register struct table_elt *p, *next;
1636 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1637 p = next);
1639 /* Put it after P and before NEXT. */
1640 elt->next_same_value = next;
1641 if (next)
1642 next->prev_same_value = elt;
1644 elt->prev_same_value = p;
1645 p->next_same_value = elt;
1646 elt->first_same_value = classp;
1649 else
1650 elt->first_same_value = elt;
1652 /* If this is a constant being set equivalent to a register or a register
1653 being set equivalent to a constant, note the constant equivalence.
1655 If this is a constant, it cannot be equivalent to a different constant,
1656 and a constant is the only thing that can be cheaper than a register. So
1657 we know the register is the head of the class (before the constant was
1658 inserted).
1660 If this is a register that is not already known equivalent to a
1661 constant, we must check the entire class.
1663 If this is a register that is already known equivalent to an insn,
1664 update the qtys `const_insn' to show that `this_insn' is the latest
1665 insn making that quantity equivalent to the constant. */
1667 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1668 && GET_CODE (x) != REG)
1670 int exp_q = REG_QTY (REGNO (classp->exp));
1671 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1673 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1674 exp_ent->const_insn = this_insn;
1677 else if (GET_CODE (x) == REG
1678 && classp
1679 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1680 && ! elt->is_const)
1682 register struct table_elt *p;
1684 for (p = classp; p != 0; p = p->next_same_value)
1686 if (p->is_const && GET_CODE (p->exp) != REG)
1688 int x_q = REG_QTY (REGNO (x));
1689 struct qty_table_elem *x_ent = &qty_table[x_q];
1691 x_ent->const_rtx
1692 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1693 x_ent->const_insn = this_insn;
1694 break;
1699 else if (GET_CODE (x) == REG
1700 && qty_table[REG_QTY (REGNO (x))].const_rtx
1701 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1702 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1704 /* If this is a constant with symbolic value,
1705 and it has a term with an explicit integer value,
1706 link it up with related expressions. */
1707 if (GET_CODE (x) == CONST)
1709 rtx subexp = get_related_value (x);
1710 unsigned subhash;
1711 struct table_elt *subelt, *subelt_prev;
1713 if (subexp != 0)
1715 /* Get the integer-free subexpression in the hash table. */
1716 subhash = safe_hash (subexp, mode) & HASH_MASK;
1717 subelt = lookup (subexp, subhash, mode);
1718 if (subelt == 0)
1719 subelt = insert (subexp, NULL, subhash, mode);
1720 /* Initialize SUBELT's circular chain if it has none. */
1721 if (subelt->related_value == 0)
1722 subelt->related_value = subelt;
1723 /* Find the element in the circular chain that precedes SUBELT. */
1724 subelt_prev = subelt;
1725 while (subelt_prev->related_value != subelt)
1726 subelt_prev = subelt_prev->related_value;
1727 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1728 This way the element that follows SUBELT is the oldest one. */
1729 elt->related_value = subelt_prev->related_value;
1730 subelt_prev->related_value = elt;
1734 return elt;
1737 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1738 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1739 the two classes equivalent.
1741 CLASS1 will be the surviving class; CLASS2 should not be used after this
1742 call.
1744 Any invalid entries in CLASS2 will not be copied. */
1746 static void
1747 merge_equiv_classes (class1, class2)
1748 struct table_elt *class1, *class2;
1750 struct table_elt *elt, *next, *new;
1752 /* Ensure we start with the head of the classes. */
1753 class1 = class1->first_same_value;
1754 class2 = class2->first_same_value;
1756 /* If they were already equal, forget it. */
1757 if (class1 == class2)
1758 return;
1760 for (elt = class2; elt; elt = next)
1762 unsigned int hash;
1763 rtx exp = elt->exp;
1764 enum machine_mode mode = elt->mode;
1766 next = elt->next_same_value;
1768 /* Remove old entry, make a new one in CLASS1's class.
1769 Don't do this for invalid entries as we cannot find their
1770 hash code (it also isn't necessary). */
1771 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1773 hash_arg_in_memory = 0;
1774 hash = HASH (exp, mode);
1776 if (GET_CODE (exp) == REG)
1777 delete_reg_equiv (REGNO (exp));
1779 remove_from_table (elt, hash);
1781 if (insert_regs (exp, class1, 0))
1783 rehash_using_reg (exp);
1784 hash = HASH (exp, mode);
1786 new = insert (exp, class1, hash, mode);
1787 new->in_memory = hash_arg_in_memory;
1792 /* Flush the entire hash table. */
1794 static void
1795 flush_hash_table ()
1797 int i;
1798 struct table_elt *p;
1800 for (i = 0; i < HASH_SIZE; i++)
1801 for (p = table[i]; p; p = table[i])
1803 /* Note that invalidate can remove elements
1804 after P in the current hash chain. */
1805 if (GET_CODE (p->exp) == REG)
1806 invalidate (p->exp, p->mode);
1807 else
1808 remove_from_table (p, i);
1812 /* Function called for each rtx to check whether true dependence exist. */
1813 struct check_dependence_data
1815 enum machine_mode mode;
1816 rtx exp;
1819 static int
1820 check_dependence (x, data)
1821 rtx *x;
1822 void *data;
1824 struct check_dependence_data *d = (struct check_dependence_data *) data;
1825 if (*x && GET_CODE (*x) == MEM)
1826 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1827 else
1828 return 0;
1831 /* Remove from the hash table, or mark as invalid, all expressions whose
1832 values could be altered by storing in X. X is a register, a subreg, or
1833 a memory reference with nonvarying address (because, when a memory
1834 reference with a varying address is stored in, all memory references are
1835 removed by invalidate_memory so specific invalidation is superfluous).
1836 FULL_MODE, if not VOIDmode, indicates that this much should be
1837 invalidated instead of just the amount indicated by the mode of X. This
1838 is only used for bitfield stores into memory.
1840 A nonvarying address may be just a register or just a symbol reference,
1841 or it may be either of those plus a numeric offset. */
1843 static void
1844 invalidate (x, full_mode)
1845 rtx x;
1846 enum machine_mode full_mode;
1848 register int i;
1849 register struct table_elt *p;
1851 switch (GET_CODE (x))
1853 case REG:
1855 /* If X is a register, dependencies on its contents are recorded
1856 through the qty number mechanism. Just change the qty number of
1857 the register, mark it as invalid for expressions that refer to it,
1858 and remove it itself. */
1859 unsigned int regno = REGNO (x);
1860 unsigned int hash = HASH (x, GET_MODE (x));
1862 /* Remove REGNO from any quantity list it might be on and indicate
1863 that its value might have changed. If it is a pseudo, remove its
1864 entry from the hash table.
1866 For a hard register, we do the first two actions above for any
1867 additional hard registers corresponding to X. Then, if any of these
1868 registers are in the table, we must remove any REG entries that
1869 overlap these registers. */
1871 delete_reg_equiv (regno);
1872 REG_TICK (regno)++;
1874 if (regno >= FIRST_PSEUDO_REGISTER)
1876 /* Because a register can be referenced in more than one mode,
1877 we might have to remove more than one table entry. */
1878 struct table_elt *elt;
1880 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1881 remove_from_table (elt, hash);
1883 else
1885 HOST_WIDE_INT in_table
1886 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1887 unsigned int endregno
1888 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1889 unsigned int tregno, tendregno, rn;
1890 register struct table_elt *p, *next;
1892 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1894 for (rn = regno + 1; rn < endregno; rn++)
1896 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1897 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1898 delete_reg_equiv (rn);
1899 REG_TICK (rn)++;
1902 if (in_table)
1903 for (hash = 0; hash < HASH_SIZE; hash++)
1904 for (p = table[hash]; p; p = next)
1906 next = p->next_same_hash;
1908 if (GET_CODE (p->exp) != REG
1909 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1910 continue;
1912 tregno = REGNO (p->exp);
1913 tendregno
1914 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1915 if (tendregno > regno && tregno < endregno)
1916 remove_from_table (p, hash);
1920 return;
1922 case SUBREG:
1923 invalidate (SUBREG_REG (x), VOIDmode);
1924 return;
1926 case PARALLEL:
1927 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1928 invalidate (XVECEXP (x, 0, i), VOIDmode);
1929 return;
1931 case EXPR_LIST:
1932 /* This is part of a disjoint return value; extract the location in
1933 question ignoring the offset. */
1934 invalidate (XEXP (x, 0), VOIDmode);
1935 return;
1937 case MEM:
1938 /* Calculate the canonical version of X here so that
1939 true_dependence doesn't generate new RTL for X on each call. */
1940 x = canon_rtx (x);
1942 /* Remove all hash table elements that refer to overlapping pieces of
1943 memory. */
1944 if (full_mode == VOIDmode)
1945 full_mode = GET_MODE (x);
1947 for (i = 0; i < HASH_SIZE; i++)
1949 register struct table_elt *next;
1951 for (p = table[i]; p; p = next)
1953 next = p->next_same_hash;
1954 if (p->in_memory)
1956 struct check_dependence_data d;
1958 /* Just canonicalize the expression once;
1959 otherwise each time we call invalidate
1960 true_dependence will canonicalize the
1961 expression again. */
1962 if (!p->canon_exp)
1963 p->canon_exp = canon_rtx (p->exp);
1964 d.exp = x;
1965 d.mode = full_mode;
1966 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1967 remove_from_table (p, i);
1971 return;
1973 default:
1974 abort ();
1978 /* Remove all expressions that refer to register REGNO,
1979 since they are already invalid, and we are about to
1980 mark that register valid again and don't want the old
1981 expressions to reappear as valid. */
1983 static void
1984 remove_invalid_refs (regno)
1985 unsigned int regno;
1987 unsigned int i;
1988 struct table_elt *p, *next;
1990 for (i = 0; i < HASH_SIZE; i++)
1991 for (p = table[i]; p; p = next)
1993 next = p->next_same_hash;
1994 if (GET_CODE (p->exp) != REG
1995 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*)0))
1996 remove_from_table (p, i);
2000 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2001 and mode MODE. */
2002 static void
2003 remove_invalid_subreg_refs (regno, offset, mode)
2004 unsigned int regno;
2005 unsigned int offset;
2006 enum machine_mode mode;
2008 unsigned int i;
2009 struct table_elt *p, *next;
2010 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2012 for (i = 0; i < HASH_SIZE; i++)
2013 for (p = table[i]; p; p = next)
2015 rtx exp = p->exp;
2016 next = p->next_same_hash;
2018 if (GET_CODE (exp) != REG
2019 && (GET_CODE (exp) != SUBREG
2020 || GET_CODE (SUBREG_REG (exp)) != REG
2021 || REGNO (SUBREG_REG (exp)) != regno
2022 || (((SUBREG_BYTE (exp)
2023 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2024 && SUBREG_BYTE (exp) <= end))
2025 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*)0))
2026 remove_from_table (p, i);
2030 /* Recompute the hash codes of any valid entries in the hash table that
2031 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2033 This is called when we make a jump equivalence. */
2035 static void
2036 rehash_using_reg (x)
2037 rtx x;
2039 unsigned int i;
2040 struct table_elt *p, *next;
2041 unsigned hash;
2043 if (GET_CODE (x) == SUBREG)
2044 x = SUBREG_REG (x);
2046 /* If X is not a register or if the register is known not to be in any
2047 valid entries in the table, we have no work to do. */
2049 if (GET_CODE (x) != REG
2050 || REG_IN_TABLE (REGNO (x)) < 0
2051 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2052 return;
2054 /* Scan all hash chains looking for valid entries that mention X.
2055 If we find one and it is in the wrong hash chain, move it. We can skip
2056 objects that are registers, since they are handled specially. */
2058 for (i = 0; i < HASH_SIZE; i++)
2059 for (p = table[i]; p; p = next)
2061 next = p->next_same_hash;
2062 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2063 && exp_equiv_p (p->exp, p->exp, 1, 0)
2064 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2066 if (p->next_same_hash)
2067 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2069 if (p->prev_same_hash)
2070 p->prev_same_hash->next_same_hash = p->next_same_hash;
2071 else
2072 table[i] = p->next_same_hash;
2074 p->next_same_hash = table[hash];
2075 p->prev_same_hash = 0;
2076 if (table[hash])
2077 table[hash]->prev_same_hash = p;
2078 table[hash] = p;
2083 /* Remove from the hash table any expression that is a call-clobbered
2084 register. Also update their TICK values. */
2086 static void
2087 invalidate_for_call ()
2089 unsigned int regno, endregno;
2090 unsigned int i;
2091 unsigned hash;
2092 struct table_elt *p, *next;
2093 int in_table = 0;
2095 /* Go through all the hard registers. For each that is clobbered in
2096 a CALL_INSN, remove the register from quantity chains and update
2097 reg_tick if defined. Also see if any of these registers is currently
2098 in the table. */
2100 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2101 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2103 delete_reg_equiv (regno);
2104 if (REG_TICK (regno) >= 0)
2105 REG_TICK (regno)++;
2107 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2110 /* In the case where we have no call-clobbered hard registers in the
2111 table, we are done. Otherwise, scan the table and remove any
2112 entry that overlaps a call-clobbered register. */
2114 if (in_table)
2115 for (hash = 0; hash < HASH_SIZE; hash++)
2116 for (p = table[hash]; p; p = next)
2118 next = p->next_same_hash;
2120 if (GET_CODE (p->exp) != REG
2121 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2122 continue;
2124 regno = REGNO (p->exp);
2125 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2127 for (i = regno; i < endregno; i++)
2128 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2130 remove_from_table (p, hash);
2131 break;
2136 /* Given an expression X of type CONST,
2137 and ELT which is its table entry (or 0 if it
2138 is not in the hash table),
2139 return an alternate expression for X as a register plus integer.
2140 If none can be found, return 0. */
2142 static rtx
2143 use_related_value (x, elt)
2144 rtx x;
2145 struct table_elt *elt;
2147 register struct table_elt *relt = 0;
2148 register struct table_elt *p, *q;
2149 HOST_WIDE_INT offset;
2151 /* First, is there anything related known?
2152 If we have a table element, we can tell from that.
2153 Otherwise, must look it up. */
2155 if (elt != 0 && elt->related_value != 0)
2156 relt = elt;
2157 else if (elt == 0 && GET_CODE (x) == CONST)
2159 rtx subexp = get_related_value (x);
2160 if (subexp != 0)
2161 relt = lookup (subexp,
2162 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2163 GET_MODE (subexp));
2166 if (relt == 0)
2167 return 0;
2169 /* Search all related table entries for one that has an
2170 equivalent register. */
2172 p = relt;
2173 while (1)
2175 /* This loop is strange in that it is executed in two different cases.
2176 The first is when X is already in the table. Then it is searching
2177 the RELATED_VALUE list of X's class (RELT). The second case is when
2178 X is not in the table. Then RELT points to a class for the related
2179 value.
2181 Ensure that, whatever case we are in, that we ignore classes that have
2182 the same value as X. */
2184 if (rtx_equal_p (x, p->exp))
2185 q = 0;
2186 else
2187 for (q = p->first_same_value; q; q = q->next_same_value)
2188 if (GET_CODE (q->exp) == REG)
2189 break;
2191 if (q)
2192 break;
2194 p = p->related_value;
2196 /* We went all the way around, so there is nothing to be found.
2197 Alternatively, perhaps RELT was in the table for some other reason
2198 and it has no related values recorded. */
2199 if (p == relt || p == 0)
2200 break;
2203 if (q == 0)
2204 return 0;
2206 offset = (get_integer_term (x) - get_integer_term (p->exp));
2207 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2208 return plus_constant (q->exp, offset);
2211 /* Hash a string. Just add its bytes up. */
2212 static inline unsigned
2213 canon_hash_string (ps)
2214 const char *ps;
2216 unsigned hash = 0;
2217 const unsigned char *p = (const unsigned char *)ps;
2219 if (p)
2220 while (*p)
2221 hash += *p++;
2223 return hash;
2226 /* Hash an rtx. We are careful to make sure the value is never negative.
2227 Equivalent registers hash identically.
2228 MODE is used in hashing for CONST_INTs only;
2229 otherwise the mode of X is used.
2231 Store 1 in do_not_record if any subexpression is volatile.
2233 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2234 which does not have the RTX_UNCHANGING_P bit set.
2236 Note that cse_insn knows that the hash code of a MEM expression
2237 is just (int) MEM plus the hash code of the address. */
2239 static unsigned
2240 canon_hash (x, mode)
2241 rtx x;
2242 enum machine_mode mode;
2244 register int i, j;
2245 register unsigned hash = 0;
2246 register enum rtx_code code;
2247 register const char *fmt;
2249 /* repeat is used to turn tail-recursion into iteration. */
2250 repeat:
2251 if (x == 0)
2252 return hash;
2254 code = GET_CODE (x);
2255 switch (code)
2257 case REG:
2259 unsigned int regno = REGNO (x);
2261 /* On some machines, we can't record any non-fixed hard register,
2262 because extending its life will cause reload problems. We
2263 consider ap, fp, and sp to be fixed for this purpose.
2265 We also consider CCmode registers to be fixed for this purpose;
2266 failure to do so leads to failure to simplify 0<100 type of
2267 conditionals.
2269 On all machines, we can't record any global registers.
2270 Nor should we record any register that is in a small
2271 class, as defined by CLASS_LIKELY_SPILLED_P. */
2273 if (regno < FIRST_PSEUDO_REGISTER
2274 && (global_regs[regno]
2275 || CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno))
2276 || (SMALL_REGISTER_CLASSES
2277 && ! fixed_regs[regno]
2278 && regno != FRAME_POINTER_REGNUM
2279 && regno != HARD_FRAME_POINTER_REGNUM
2280 && regno != ARG_POINTER_REGNUM
2281 && regno != STACK_POINTER_REGNUM
2282 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2284 do_not_record = 1;
2285 return 0;
2288 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2289 return hash;
2292 /* We handle SUBREG of a REG specially because the underlying
2293 reg changes its hash value with every value change; we don't
2294 want to have to forget unrelated subregs when one subreg changes. */
2295 case SUBREG:
2297 if (GET_CODE (SUBREG_REG (x)) == REG)
2299 hash += (((unsigned) SUBREG << 7)
2300 + REGNO (SUBREG_REG (x))
2301 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2302 return hash;
2304 break;
2307 case CONST_INT:
2309 unsigned HOST_WIDE_INT tem = INTVAL (x);
2310 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2311 return hash;
2314 case CONST_DOUBLE:
2315 /* This is like the general case, except that it only counts
2316 the integers representing the constant. */
2317 hash += (unsigned) code + (unsigned) GET_MODE (x);
2318 if (GET_MODE (x) != VOIDmode)
2319 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2321 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2322 hash += tem;
2324 else
2325 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2326 + (unsigned) CONST_DOUBLE_HIGH (x));
2327 return hash;
2329 /* Assume there is only one rtx object for any given label. */
2330 case LABEL_REF:
2331 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2332 return hash;
2334 case SYMBOL_REF:
2335 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2336 return hash;
2338 case MEM:
2339 /* We don't record if marked volatile or if BLKmode since we don't
2340 know the size of the move. */
2341 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2343 do_not_record = 1;
2344 return 0;
2346 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2348 hash_arg_in_memory = 1;
2350 /* Now that we have already found this special case,
2351 might as well speed it up as much as possible. */
2352 hash += (unsigned) MEM;
2353 x = XEXP (x, 0);
2354 goto repeat;
2356 case USE:
2357 /* A USE that mentions non-volatile memory needs special
2358 handling since the MEM may be BLKmode which normally
2359 prevents an entry from being made. Pure calls are
2360 marked by a USE which mentions BLKmode memory. */
2361 if (GET_CODE (XEXP (x, 0)) == MEM
2362 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2364 hash += (unsigned)USE;
2365 x = XEXP (x, 0);
2367 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2368 hash_arg_in_memory = 1;
2370 /* Now that we have already found this special case,
2371 might as well speed it up as much as possible. */
2372 hash += (unsigned) MEM;
2373 x = XEXP (x, 0);
2374 goto repeat;
2376 break;
2378 case PRE_DEC:
2379 case PRE_INC:
2380 case POST_DEC:
2381 case POST_INC:
2382 case PRE_MODIFY:
2383 case POST_MODIFY:
2384 case PC:
2385 case CC0:
2386 case CALL:
2387 case UNSPEC_VOLATILE:
2388 do_not_record = 1;
2389 return 0;
2391 case ASM_OPERANDS:
2392 if (MEM_VOLATILE_P (x))
2394 do_not_record = 1;
2395 return 0;
2397 else
2399 /* We don't want to take the filename and line into account. */
2400 hash += (unsigned) code + (unsigned) GET_MODE (x)
2401 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2402 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2403 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2405 if (ASM_OPERANDS_INPUT_LENGTH (x))
2407 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2409 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2410 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2411 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2412 (x, i)));
2415 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2416 x = ASM_OPERANDS_INPUT (x, 0);
2417 mode = GET_MODE (x);
2418 goto repeat;
2421 return hash;
2423 break;
2425 default:
2426 break;
2429 i = GET_RTX_LENGTH (code) - 1;
2430 hash += (unsigned) code + (unsigned) GET_MODE (x);
2431 fmt = GET_RTX_FORMAT (code);
2432 for (; i >= 0; i--)
2434 if (fmt[i] == 'e')
2436 rtx tem = XEXP (x, i);
2438 /* If we are about to do the last recursive call
2439 needed at this level, change it into iteration.
2440 This function is called enough to be worth it. */
2441 if (i == 0)
2443 x = tem;
2444 goto repeat;
2446 hash += canon_hash (tem, 0);
2448 else if (fmt[i] == 'E')
2449 for (j = 0; j < XVECLEN (x, i); j++)
2450 hash += canon_hash (XVECEXP (x, i, j), 0);
2451 else if (fmt[i] == 's')
2452 hash += canon_hash_string (XSTR (x, i));
2453 else if (fmt[i] == 'i')
2455 register unsigned tem = XINT (x, i);
2456 hash += tem;
2458 else if (fmt[i] == '0' || fmt[i] == 't')
2459 /* Unused. */
2461 else
2462 abort ();
2464 return hash;
2467 /* Like canon_hash but with no side effects. */
2469 static unsigned
2470 safe_hash (x, mode)
2471 rtx x;
2472 enum machine_mode mode;
2474 int save_do_not_record = do_not_record;
2475 int save_hash_arg_in_memory = hash_arg_in_memory;
2476 unsigned hash = canon_hash (x, mode);
2477 hash_arg_in_memory = save_hash_arg_in_memory;
2478 do_not_record = save_do_not_record;
2479 return hash;
2482 /* Return 1 iff X and Y would canonicalize into the same thing,
2483 without actually constructing the canonicalization of either one.
2484 If VALIDATE is nonzero,
2485 we assume X is an expression being processed from the rtl
2486 and Y was found in the hash table. We check register refs
2487 in Y for being marked as valid.
2489 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2490 that is known to be in the register. Ordinarily, we don't allow them
2491 to match, because letting them match would cause unpredictable results
2492 in all the places that search a hash table chain for an equivalent
2493 for a given value. A possible equivalent that has different structure
2494 has its hash code computed from different data. Whether the hash code
2495 is the same as that of the given value is pure luck. */
2497 static int
2498 exp_equiv_p (x, y, validate, equal_values)
2499 rtx x, y;
2500 int validate;
2501 int equal_values;
2503 register int i, j;
2504 register enum rtx_code code;
2505 register const char *fmt;
2507 /* Note: it is incorrect to assume an expression is equivalent to itself
2508 if VALIDATE is nonzero. */
2509 if (x == y && !validate)
2510 return 1;
2511 if (x == 0 || y == 0)
2512 return x == y;
2514 code = GET_CODE (x);
2515 if (code != GET_CODE (y))
2517 if (!equal_values)
2518 return 0;
2520 /* If X is a constant and Y is a register or vice versa, they may be
2521 equivalent. We only have to validate if Y is a register. */
2522 if (CONSTANT_P (x) && GET_CODE (y) == REG
2523 && REGNO_QTY_VALID_P (REGNO (y)))
2525 int y_q = REG_QTY (REGNO (y));
2526 struct qty_table_elem *y_ent = &qty_table[y_q];
2528 if (GET_MODE (y) == y_ent->mode
2529 && rtx_equal_p (x, y_ent->const_rtx)
2530 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2531 return 1;
2534 if (CONSTANT_P (y) && code == REG
2535 && REGNO_QTY_VALID_P (REGNO (x)))
2537 int x_q = REG_QTY (REGNO (x));
2538 struct qty_table_elem *x_ent = &qty_table[x_q];
2540 if (GET_MODE (x) == x_ent->mode
2541 && rtx_equal_p (y, x_ent->const_rtx))
2542 return 1;
2545 return 0;
2548 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2549 if (GET_MODE (x) != GET_MODE (y))
2550 return 0;
2552 switch (code)
2554 case PC:
2555 case CC0:
2556 case CONST_INT:
2557 return x == y;
2559 case LABEL_REF:
2560 return XEXP (x, 0) == XEXP (y, 0);
2562 case SYMBOL_REF:
2563 return XSTR (x, 0) == XSTR (y, 0);
2565 case REG:
2567 unsigned int regno = REGNO (y);
2568 unsigned int endregno
2569 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2570 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2571 unsigned int i;
2573 /* If the quantities are not the same, the expressions are not
2574 equivalent. If there are and we are not to validate, they
2575 are equivalent. Otherwise, ensure all regs are up-to-date. */
2577 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2578 return 0;
2580 if (! validate)
2581 return 1;
2583 for (i = regno; i < endregno; i++)
2584 if (REG_IN_TABLE (i) != REG_TICK (i))
2585 return 0;
2587 return 1;
2590 /* For commutative operations, check both orders. */
2591 case PLUS:
2592 case MULT:
2593 case AND:
2594 case IOR:
2595 case XOR:
2596 case NE:
2597 case EQ:
2598 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2599 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2600 validate, equal_values))
2601 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2602 validate, equal_values)
2603 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2604 validate, equal_values)));
2606 case ASM_OPERANDS:
2607 /* We don't use the generic code below because we want to
2608 disregard filename and line numbers. */
2610 /* A volatile asm isn't equivalent to any other. */
2611 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2612 return 0;
2614 if (GET_MODE (x) != GET_MODE (y)
2615 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2616 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2617 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2618 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2619 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2620 return 0;
2622 if (ASM_OPERANDS_INPUT_LENGTH (x))
2624 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2625 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2626 ASM_OPERANDS_INPUT (y, i),
2627 validate, equal_values)
2628 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2629 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2630 return 0;
2633 return 1;
2635 default:
2636 break;
2639 /* Compare the elements. If any pair of corresponding elements
2640 fail to match, return 0 for the whole things. */
2642 fmt = GET_RTX_FORMAT (code);
2643 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2645 switch (fmt[i])
2647 case 'e':
2648 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2649 return 0;
2650 break;
2652 case 'E':
2653 if (XVECLEN (x, i) != XVECLEN (y, i))
2654 return 0;
2655 for (j = 0; j < XVECLEN (x, i); j++)
2656 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2657 validate, equal_values))
2658 return 0;
2659 break;
2661 case 's':
2662 if (strcmp (XSTR (x, i), XSTR (y, i)))
2663 return 0;
2664 break;
2666 case 'i':
2667 if (XINT (x, i) != XINT (y, i))
2668 return 0;
2669 break;
2671 case 'w':
2672 if (XWINT (x, i) != XWINT (y, i))
2673 return 0;
2674 break;
2676 case '0':
2677 case 't':
2678 break;
2680 default:
2681 abort ();
2685 return 1;
2688 /* Return 1 if X has a value that can vary even between two
2689 executions of the program. 0 means X can be compared reliably
2690 against certain constants or near-constants. */
2692 static int
2693 cse_rtx_varies_p (x, from_alias)
2694 register rtx x;
2695 int from_alias;
2697 /* We need not check for X and the equivalence class being of the same
2698 mode because if X is equivalent to a constant in some mode, it
2699 doesn't vary in any mode. */
2701 if (GET_CODE (x) == REG
2702 && REGNO_QTY_VALID_P (REGNO (x)))
2704 int x_q = REG_QTY (REGNO (x));
2705 struct qty_table_elem *x_ent = &qty_table[x_q];
2707 if (GET_MODE (x) == x_ent->mode
2708 && x_ent->const_rtx != NULL_RTX)
2709 return 0;
2712 if (GET_CODE (x) == PLUS
2713 && GET_CODE (XEXP (x, 1)) == CONST_INT
2714 && GET_CODE (XEXP (x, 0)) == REG
2715 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2717 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2718 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2720 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2721 && x0_ent->const_rtx != NULL_RTX)
2722 return 0;
2725 /* This can happen as the result of virtual register instantiation, if
2726 the initial constant is too large to be a valid address. This gives
2727 us a three instruction sequence, load large offset into a register,
2728 load fp minus a constant into a register, then a MEM which is the
2729 sum of the two `constant' registers. */
2730 if (GET_CODE (x) == PLUS
2731 && GET_CODE (XEXP (x, 0)) == REG
2732 && GET_CODE (XEXP (x, 1)) == REG
2733 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2734 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2736 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2737 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2738 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2739 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2741 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2742 && x0_ent->const_rtx != NULL_RTX
2743 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2744 && x1_ent->const_rtx != NULL_RTX)
2745 return 0;
2748 return rtx_varies_p (x, from_alias);
2751 /* Canonicalize an expression:
2752 replace each register reference inside it
2753 with the "oldest" equivalent register.
2755 If INSN is non-zero and we are replacing a pseudo with a hard register
2756 or vice versa, validate_change is used to ensure that INSN remains valid
2757 after we make our substitution. The calls are made with IN_GROUP non-zero
2758 so apply_change_group must be called upon the outermost return from this
2759 function (unless INSN is zero). The result of apply_change_group can
2760 generally be discarded since the changes we are making are optional. */
2762 static rtx
2763 canon_reg (x, insn)
2764 rtx x;
2765 rtx insn;
2767 register int i;
2768 register enum rtx_code code;
2769 register const char *fmt;
2771 if (x == 0)
2772 return x;
2774 code = GET_CODE (x);
2775 switch (code)
2777 case PC:
2778 case CC0:
2779 case CONST:
2780 case CONST_INT:
2781 case CONST_DOUBLE:
2782 case SYMBOL_REF:
2783 case LABEL_REF:
2784 case ADDR_VEC:
2785 case ADDR_DIFF_VEC:
2786 return x;
2788 case REG:
2790 register int first;
2791 register int q;
2792 register struct qty_table_elem *ent;
2794 /* Never replace a hard reg, because hard regs can appear
2795 in more than one machine mode, and we must preserve the mode
2796 of each occurrence. Also, some hard regs appear in
2797 MEMs that are shared and mustn't be altered. Don't try to
2798 replace any reg that maps to a reg of class NO_REGS. */
2799 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2800 || ! REGNO_QTY_VALID_P (REGNO (x)))
2801 return x;
2803 q = REG_QTY (REGNO (x));
2804 ent = &qty_table[q];
2805 first = ent->first_reg;
2806 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2807 : REGNO_REG_CLASS (first) == NO_REGS ? x
2808 : gen_rtx_REG (ent->mode, first));
2811 default:
2812 break;
2815 fmt = GET_RTX_FORMAT (code);
2816 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2818 register int j;
2820 if (fmt[i] == 'e')
2822 rtx new = canon_reg (XEXP (x, i), insn);
2823 int insn_code;
2825 /* If replacing pseudo with hard reg or vice versa, ensure the
2826 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2827 if (insn != 0 && new != 0
2828 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2829 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2830 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2831 || (insn_code = recog_memoized (insn)) < 0
2832 || insn_data[insn_code].n_dups > 0))
2833 validate_change (insn, &XEXP (x, i), new, 1);
2834 else
2835 XEXP (x, i) = new;
2837 else if (fmt[i] == 'E')
2838 for (j = 0; j < XVECLEN (x, i); j++)
2839 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2842 return x;
2845 /* LOC is a location within INSN that is an operand address (the contents of
2846 a MEM). Find the best equivalent address to use that is valid for this
2847 insn.
2849 On most CISC machines, complicated address modes are costly, and rtx_cost
2850 is a good approximation for that cost. However, most RISC machines have
2851 only a few (usually only one) memory reference formats. If an address is
2852 valid at all, it is often just as cheap as any other address. Hence, for
2853 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2854 costs of various addresses. For two addresses of equal cost, choose the one
2855 with the highest `rtx_cost' value as that has the potential of eliminating
2856 the most insns. For equal costs, we choose the first in the equivalence
2857 class. Note that we ignore the fact that pseudo registers are cheaper
2858 than hard registers here because we would also prefer the pseudo registers.
2861 static void
2862 find_best_addr (insn, loc, mode)
2863 rtx insn;
2864 rtx *loc;
2865 enum machine_mode mode;
2867 struct table_elt *elt;
2868 rtx addr = *loc;
2869 #ifdef ADDRESS_COST
2870 struct table_elt *p;
2871 int found_better = 1;
2872 #endif
2873 int save_do_not_record = do_not_record;
2874 int save_hash_arg_in_memory = hash_arg_in_memory;
2875 int addr_volatile;
2876 int regno;
2877 unsigned hash;
2879 /* Do not try to replace constant addresses or addresses of local and
2880 argument slots. These MEM expressions are made only once and inserted
2881 in many instructions, as well as being used to control symbol table
2882 output. It is not safe to clobber them.
2884 There are some uncommon cases where the address is already in a register
2885 for some reason, but we cannot take advantage of that because we have
2886 no easy way to unshare the MEM. In addition, looking up all stack
2887 addresses is costly. */
2888 if ((GET_CODE (addr) == PLUS
2889 && GET_CODE (XEXP (addr, 0)) == REG
2890 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2891 && (regno = REGNO (XEXP (addr, 0)),
2892 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2893 || regno == ARG_POINTER_REGNUM))
2894 || (GET_CODE (addr) == REG
2895 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2896 || regno == HARD_FRAME_POINTER_REGNUM
2897 || regno == ARG_POINTER_REGNUM))
2898 || GET_CODE (addr) == ADDRESSOF
2899 || CONSTANT_ADDRESS_P (addr))
2900 return;
2902 /* If this address is not simply a register, try to fold it. This will
2903 sometimes simplify the expression. Many simplifications
2904 will not be valid, but some, usually applying the associative rule, will
2905 be valid and produce better code. */
2906 if (GET_CODE (addr) != REG)
2908 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2909 int addr_folded_cost = address_cost (folded, mode);
2910 int addr_cost = address_cost (addr, mode);
2912 if ((addr_folded_cost < addr_cost
2913 || (addr_folded_cost == addr_cost
2914 /* ??? The rtx_cost comparison is left over from an older
2915 version of this code. It is probably no longer helpful. */
2916 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2917 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2918 && validate_change (insn, loc, folded, 0))
2919 addr = folded;
2922 /* If this address is not in the hash table, we can't look for equivalences
2923 of the whole address. Also, ignore if volatile. */
2925 do_not_record = 0;
2926 hash = HASH (addr, Pmode);
2927 addr_volatile = do_not_record;
2928 do_not_record = save_do_not_record;
2929 hash_arg_in_memory = save_hash_arg_in_memory;
2931 if (addr_volatile)
2932 return;
2934 elt = lookup (addr, hash, Pmode);
2936 #ifndef ADDRESS_COST
2937 if (elt)
2939 int our_cost = elt->cost;
2941 /* Find the lowest cost below ours that works. */
2942 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2943 if (elt->cost < our_cost
2944 && (GET_CODE (elt->exp) == REG
2945 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2946 && validate_change (insn, loc,
2947 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2948 return;
2950 #else
2952 if (elt)
2954 /* We need to find the best (under the criteria documented above) entry
2955 in the class that is valid. We use the `flag' field to indicate
2956 choices that were invalid and iterate until we can't find a better
2957 one that hasn't already been tried. */
2959 for (p = elt->first_same_value; p; p = p->next_same_value)
2960 p->flag = 0;
2962 while (found_better)
2964 int best_addr_cost = address_cost (*loc, mode);
2965 int best_rtx_cost = (elt->cost + 1) >> 1;
2966 int exp_cost;
2967 struct table_elt *best_elt = elt;
2969 found_better = 0;
2970 for (p = elt->first_same_value; p; p = p->next_same_value)
2971 if (! p->flag)
2973 if ((GET_CODE (p->exp) == REG
2974 || exp_equiv_p (p->exp, p->exp, 1, 0))
2975 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2976 || (exp_cost == best_addr_cost
2977 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2979 found_better = 1;
2980 best_addr_cost = exp_cost;
2981 best_rtx_cost = (p->cost + 1) >> 1;
2982 best_elt = p;
2986 if (found_better)
2988 if (validate_change (insn, loc,
2989 canon_reg (copy_rtx (best_elt->exp),
2990 NULL_RTX), 0))
2991 return;
2992 else
2993 best_elt->flag = 1;
2998 /* If the address is a binary operation with the first operand a register
2999 and the second a constant, do the same as above, but looking for
3000 equivalences of the register. Then try to simplify before checking for
3001 the best address to use. This catches a few cases: First is when we
3002 have REG+const and the register is another REG+const. We can often merge
3003 the constants and eliminate one insn and one register. It may also be
3004 that a machine has a cheap REG+REG+const. Finally, this improves the
3005 code on the Alpha for unaligned byte stores. */
3007 if (flag_expensive_optimizations
3008 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3009 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3010 && GET_CODE (XEXP (*loc, 0)) == REG
3011 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3013 rtx c = XEXP (*loc, 1);
3015 do_not_record = 0;
3016 hash = HASH (XEXP (*loc, 0), Pmode);
3017 do_not_record = save_do_not_record;
3018 hash_arg_in_memory = save_hash_arg_in_memory;
3020 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3021 if (elt == 0)
3022 return;
3024 /* We need to find the best (under the criteria documented above) entry
3025 in the class that is valid. We use the `flag' field to indicate
3026 choices that were invalid and iterate until we can't find a better
3027 one that hasn't already been tried. */
3029 for (p = elt->first_same_value; p; p = p->next_same_value)
3030 p->flag = 0;
3032 while (found_better)
3034 int best_addr_cost = address_cost (*loc, mode);
3035 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3036 struct table_elt *best_elt = elt;
3037 rtx best_rtx = *loc;
3038 int count;
3040 /* This is at worst case an O(n^2) algorithm, so limit our search
3041 to the first 32 elements on the list. This avoids trouble
3042 compiling code with very long basic blocks that can easily
3043 call simplify_gen_binary so many times that we run out of
3044 memory. */
3046 found_better = 0;
3047 for (p = elt->first_same_value, count = 0;
3048 p && count < 32;
3049 p = p->next_same_value, count++)
3050 if (! p->flag
3051 && (GET_CODE (p->exp) == REG
3052 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3054 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3055 p->exp, c);
3056 int new_cost;
3057 new_cost = address_cost (new, mode);
3059 if (new_cost < best_addr_cost
3060 || (new_cost == best_addr_cost
3061 && (COST (new) + 1) >> 1 > best_rtx_cost))
3063 found_better = 1;
3064 best_addr_cost = new_cost;
3065 best_rtx_cost = (COST (new) + 1) >> 1;
3066 best_elt = p;
3067 best_rtx = new;
3071 if (found_better)
3073 if (validate_change (insn, loc,
3074 canon_reg (copy_rtx (best_rtx),
3075 NULL_RTX), 0))
3076 return;
3077 else
3078 best_elt->flag = 1;
3082 #endif
3085 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3086 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3087 what values are being compared.
3089 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3090 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3091 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3092 compared to produce cc0.
3094 The return value is the comparison operator and is either the code of
3095 A or the code corresponding to the inverse of the comparison. */
3097 static enum rtx_code
3098 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3099 enum rtx_code code;
3100 rtx *parg1, *parg2;
3101 enum machine_mode *pmode1, *pmode2;
3103 rtx arg1, arg2;
3105 arg1 = *parg1, arg2 = *parg2;
3107 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3109 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3111 /* Set non-zero when we find something of interest. */
3112 rtx x = 0;
3113 int reverse_code = 0;
3114 struct table_elt *p = 0;
3116 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3117 On machines with CC0, this is the only case that can occur, since
3118 fold_rtx will return the COMPARE or item being compared with zero
3119 when given CC0. */
3121 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3122 x = arg1;
3124 /* If ARG1 is a comparison operator and CODE is testing for
3125 STORE_FLAG_VALUE, get the inner arguments. */
3127 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3129 if (code == NE
3130 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3131 && code == LT && STORE_FLAG_VALUE == -1)
3132 #ifdef FLOAT_STORE_FLAG_VALUE
3133 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3134 && (REAL_VALUE_NEGATIVE
3135 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3136 #endif
3138 x = arg1;
3139 else if (code == EQ
3140 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3141 && code == GE && STORE_FLAG_VALUE == -1)
3142 #ifdef FLOAT_STORE_FLAG_VALUE
3143 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3144 && (REAL_VALUE_NEGATIVE
3145 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3146 #endif
3148 x = arg1, reverse_code = 1;
3151 /* ??? We could also check for
3153 (ne (and (eq (...) (const_int 1))) (const_int 0))
3155 and related forms, but let's wait until we see them occurring. */
3157 if (x == 0)
3158 /* Look up ARG1 in the hash table and see if it has an equivalence
3159 that lets us see what is being compared. */
3160 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3161 GET_MODE (arg1));
3162 if (p)
3164 p = p->first_same_value;
3166 /* If what we compare is already known to be constant, that is as
3167 good as it gets.
3168 We need to break the loop in this case, because otherwise we
3169 can have an infinite loop when looking at a reg that is known
3170 to be a constant which is the same as a comparison of a reg
3171 against zero which appears later in the insn stream, which in
3172 turn is constant and the same as the comparison of the first reg
3173 against zero... */
3174 if (p->is_const)
3175 break;
3178 for (; p; p = p->next_same_value)
3180 enum machine_mode inner_mode = GET_MODE (p->exp);
3182 /* If the entry isn't valid, skip it. */
3183 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3184 continue;
3186 if (GET_CODE (p->exp) == COMPARE
3187 /* Another possibility is that this machine has a compare insn
3188 that includes the comparison code. In that case, ARG1 would
3189 be equivalent to a comparison operation that would set ARG1 to
3190 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3191 ORIG_CODE is the actual comparison being done; if it is an EQ,
3192 we must reverse ORIG_CODE. On machine with a negative value
3193 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3194 || ((code == NE
3195 || (code == LT
3196 && GET_MODE_CLASS (inner_mode) == MODE_INT
3197 && (GET_MODE_BITSIZE (inner_mode)
3198 <= HOST_BITS_PER_WIDE_INT)
3199 && (STORE_FLAG_VALUE
3200 & ((HOST_WIDE_INT) 1
3201 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3202 #ifdef FLOAT_STORE_FLAG_VALUE
3203 || (code == LT
3204 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3205 && (REAL_VALUE_NEGATIVE
3206 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3207 #endif
3209 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3211 x = p->exp;
3212 break;
3214 else if ((code == EQ
3215 || (code == GE
3216 && GET_MODE_CLASS (inner_mode) == MODE_INT
3217 && (GET_MODE_BITSIZE (inner_mode)
3218 <= HOST_BITS_PER_WIDE_INT)
3219 && (STORE_FLAG_VALUE
3220 & ((HOST_WIDE_INT) 1
3221 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3222 #ifdef FLOAT_STORE_FLAG_VALUE
3223 || (code == GE
3224 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3225 && (REAL_VALUE_NEGATIVE
3226 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3227 #endif
3229 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3231 reverse_code = 1;
3232 x = p->exp;
3233 break;
3236 /* If this is fp + constant, the equivalent is a better operand since
3237 it may let us predict the value of the comparison. */
3238 else if (NONZERO_BASE_PLUS_P (p->exp))
3240 arg1 = p->exp;
3241 continue;
3245 /* If we didn't find a useful equivalence for ARG1, we are done.
3246 Otherwise, set up for the next iteration. */
3247 if (x == 0)
3248 break;
3250 /* If we need to reverse the comparison, make sure that that is
3251 possible -- we can't necessarily infer the value of GE from LT
3252 with floating-point operands. */
3253 if (reverse_code)
3255 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3256 if (reversed == UNKNOWN)
3257 break;
3258 else code = reversed;
3260 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3261 code = GET_CODE (x);
3262 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3265 /* Return our results. Return the modes from before fold_rtx
3266 because fold_rtx might produce const_int, and then it's too late. */
3267 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3268 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3270 return code;
3273 /* If X is a nontrivial arithmetic operation on an argument
3274 for which a constant value can be determined, return
3275 the result of operating on that value, as a constant.
3276 Otherwise, return X, possibly with one or more operands
3277 modified by recursive calls to this function.
3279 If X is a register whose contents are known, we do NOT
3280 return those contents here. equiv_constant is called to
3281 perform that task.
3283 INSN is the insn that we may be modifying. If it is 0, make a copy
3284 of X before modifying it. */
3286 static rtx
3287 fold_rtx (x, insn)
3288 rtx x;
3289 rtx insn;
3291 register enum rtx_code code;
3292 register enum machine_mode mode;
3293 register const char *fmt;
3294 register int i;
3295 rtx new = 0;
3296 int copied = 0;
3297 int must_swap = 0;
3299 /* Folded equivalents of first two operands of X. */
3300 rtx folded_arg0;
3301 rtx folded_arg1;
3303 /* Constant equivalents of first three operands of X;
3304 0 when no such equivalent is known. */
3305 rtx const_arg0;
3306 rtx const_arg1;
3307 rtx const_arg2;
3309 /* The mode of the first operand of X. We need this for sign and zero
3310 extends. */
3311 enum machine_mode mode_arg0;
3313 if (x == 0)
3314 return x;
3316 mode = GET_MODE (x);
3317 code = GET_CODE (x);
3318 switch (code)
3320 case CONST:
3321 case CONST_INT:
3322 case CONST_DOUBLE:
3323 case SYMBOL_REF:
3324 case LABEL_REF:
3325 case REG:
3326 /* No use simplifying an EXPR_LIST
3327 since they are used only for lists of args
3328 in a function call's REG_EQUAL note. */
3329 case EXPR_LIST:
3330 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3331 want to (e.g.,) make (addressof (const_int 0)) just because
3332 the location is known to be zero. */
3333 case ADDRESSOF:
3334 return x;
3336 #ifdef HAVE_cc0
3337 case CC0:
3338 return prev_insn_cc0;
3339 #endif
3341 case PC:
3342 /* If the next insn is a CODE_LABEL followed by a jump table,
3343 PC's value is a LABEL_REF pointing to that label. That
3344 lets us fold switch statements on the Vax. */
3345 if (insn && GET_CODE (insn) == JUMP_INSN)
3347 rtx next = next_nonnote_insn (insn);
3349 if (next && GET_CODE (next) == CODE_LABEL
3350 && NEXT_INSN (next) != 0
3351 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3352 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3353 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3354 return gen_rtx_LABEL_REF (Pmode, next);
3356 break;
3358 case SUBREG:
3359 /* See if we previously assigned a constant value to this SUBREG. */
3360 if ((new = lookup_as_function (x, CONST_INT)) != 0
3361 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3362 return new;
3364 /* If this is a paradoxical SUBREG, we have no idea what value the
3365 extra bits would have. However, if the operand is equivalent
3366 to a SUBREG whose operand is the same as our mode, and all the
3367 modes are within a word, we can just use the inner operand
3368 because these SUBREGs just say how to treat the register.
3370 Similarly if we find an integer constant. */
3372 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3374 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3375 struct table_elt *elt;
3377 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3378 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3379 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3380 imode)) != 0)
3381 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3383 if (CONSTANT_P (elt->exp)
3384 && GET_MODE (elt->exp) == VOIDmode)
3385 return elt->exp;
3387 if (GET_CODE (elt->exp) == SUBREG
3388 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3389 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3390 return copy_rtx (SUBREG_REG (elt->exp));
3393 return x;
3396 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3397 We might be able to if the SUBREG is extracting a single word in an
3398 integral mode or extracting the low part. */
3400 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3401 const_arg0 = equiv_constant (folded_arg0);
3402 if (const_arg0)
3403 folded_arg0 = const_arg0;
3405 if (folded_arg0 != SUBREG_REG (x))
3407 new = simplify_subreg (mode, folded_arg0,
3408 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3409 if (new)
3410 return new;
3413 /* If this is a narrowing SUBREG and our operand is a REG, see if
3414 we can find an equivalence for REG that is an arithmetic operation
3415 in a wider mode where both operands are paradoxical SUBREGs
3416 from objects of our result mode. In that case, we couldn't report
3417 an equivalent value for that operation, since we don't know what the
3418 extra bits will be. But we can find an equivalence for this SUBREG
3419 by folding that operation is the narrow mode. This allows us to
3420 fold arithmetic in narrow modes when the machine only supports
3421 word-sized arithmetic.
3423 Also look for a case where we have a SUBREG whose operand is the
3424 same as our result. If both modes are smaller than a word, we
3425 are simply interpreting a register in different modes and we
3426 can use the inner value. */
3428 if (GET_CODE (folded_arg0) == REG
3429 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3430 && subreg_lowpart_p (x))
3432 struct table_elt *elt;
3434 /* We can use HASH here since we know that canon_hash won't be
3435 called. */
3436 elt = lookup (folded_arg0,
3437 HASH (folded_arg0, GET_MODE (folded_arg0)),
3438 GET_MODE (folded_arg0));
3440 if (elt)
3441 elt = elt->first_same_value;
3443 for (; elt; elt = elt->next_same_value)
3445 enum rtx_code eltcode = GET_CODE (elt->exp);
3447 /* Just check for unary and binary operations. */
3448 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3449 && GET_CODE (elt->exp) != SIGN_EXTEND
3450 && GET_CODE (elt->exp) != ZERO_EXTEND
3451 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3452 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3454 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3456 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3457 op0 = fold_rtx (op0, NULL_RTX);
3459 op0 = equiv_constant (op0);
3460 if (op0)
3461 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3462 op0, mode);
3464 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3465 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3466 && eltcode != DIV && eltcode != MOD
3467 && eltcode != UDIV && eltcode != UMOD
3468 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3469 && eltcode != ROTATE && eltcode != ROTATERT
3470 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3471 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3472 == mode))
3473 || CONSTANT_P (XEXP (elt->exp, 0)))
3474 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3475 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3476 == mode))
3477 || CONSTANT_P (XEXP (elt->exp, 1))))
3479 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3480 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3482 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3483 op0 = fold_rtx (op0, NULL_RTX);
3485 if (op0)
3486 op0 = equiv_constant (op0);
3488 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3489 op1 = fold_rtx (op1, NULL_RTX);
3491 if (op1)
3492 op1 = equiv_constant (op1);
3494 /* If we are looking for the low SImode part of
3495 (ashift:DI c (const_int 32)), it doesn't work
3496 to compute that in SImode, because a 32-bit shift
3497 in SImode is unpredictable. We know the value is 0. */
3498 if (op0 && op1
3499 && GET_CODE (elt->exp) == ASHIFT
3500 && GET_CODE (op1) == CONST_INT
3501 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3503 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3505 /* If the count fits in the inner mode's width,
3506 but exceeds the outer mode's width,
3507 the value will get truncated to 0
3508 by the subreg. */
3509 new = const0_rtx;
3510 else
3511 /* If the count exceeds even the inner mode's width,
3512 don't fold this expression. */
3513 new = 0;
3515 else if (op0 && op1)
3516 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3517 op0, op1);
3520 else if (GET_CODE (elt->exp) == SUBREG
3521 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3522 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3523 <= UNITS_PER_WORD)
3524 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3525 new = copy_rtx (SUBREG_REG (elt->exp));
3527 if (new)
3528 return new;
3532 return x;
3534 case NOT:
3535 case NEG:
3536 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3537 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3538 new = lookup_as_function (XEXP (x, 0), code);
3539 if (new)
3540 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3541 break;
3543 case MEM:
3544 /* If we are not actually processing an insn, don't try to find the
3545 best address. Not only don't we care, but we could modify the
3546 MEM in an invalid way since we have no insn to validate against. */
3547 if (insn != 0)
3548 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3551 /* Even if we don't fold in the insn itself,
3552 we can safely do so here, in hopes of getting a constant. */
3553 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3554 rtx base = 0;
3555 HOST_WIDE_INT offset = 0;
3557 if (GET_CODE (addr) == REG
3558 && REGNO_QTY_VALID_P (REGNO (addr)))
3560 int addr_q = REG_QTY (REGNO (addr));
3561 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3563 if (GET_MODE (addr) == addr_ent->mode
3564 && addr_ent->const_rtx != NULL_RTX)
3565 addr = addr_ent->const_rtx;
3568 /* If address is constant, split it into a base and integer offset. */
3569 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3570 base = addr;
3571 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3572 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3574 base = XEXP (XEXP (addr, 0), 0);
3575 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3577 else if (GET_CODE (addr) == LO_SUM
3578 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3579 base = XEXP (addr, 1);
3580 else if (GET_CODE (addr) == ADDRESSOF)
3581 return change_address (x, VOIDmode, addr);
3583 /* If this is a constant pool reference, we can fold it into its
3584 constant to allow better value tracking. */
3585 if (base && GET_CODE (base) == SYMBOL_REF
3586 && CONSTANT_POOL_ADDRESS_P (base))
3588 rtx constant = get_pool_constant (base);
3589 enum machine_mode const_mode = get_pool_mode (base);
3590 rtx new;
3592 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3593 constant_pool_entries_cost = COST (constant);
3595 /* If we are loading the full constant, we have an equivalence. */
3596 if (offset == 0 && mode == const_mode)
3597 return constant;
3599 /* If this actually isn't a constant (weird!), we can't do
3600 anything. Otherwise, handle the two most common cases:
3601 extracting a word from a multi-word constant, and extracting
3602 the low-order bits. Other cases don't seem common enough to
3603 worry about. */
3604 if (! CONSTANT_P (constant))
3605 return x;
3607 if (GET_MODE_CLASS (mode) == MODE_INT
3608 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3609 && offset % UNITS_PER_WORD == 0
3610 && (new = operand_subword (constant,
3611 offset / UNITS_PER_WORD,
3612 0, const_mode)) != 0)
3613 return new;
3615 if (((BYTES_BIG_ENDIAN
3616 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3617 || (! BYTES_BIG_ENDIAN && offset == 0))
3618 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3619 return new;
3622 /* If this is a reference to a label at a known position in a jump
3623 table, we also know its value. */
3624 if (base && GET_CODE (base) == LABEL_REF)
3626 rtx label = XEXP (base, 0);
3627 rtx table_insn = NEXT_INSN (label);
3629 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3630 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3632 rtx table = PATTERN (table_insn);
3634 if (offset >= 0
3635 && (offset / GET_MODE_SIZE (GET_MODE (table))
3636 < XVECLEN (table, 0)))
3637 return XVECEXP (table, 0,
3638 offset / GET_MODE_SIZE (GET_MODE (table)));
3640 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3641 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3643 rtx table = PATTERN (table_insn);
3645 if (offset >= 0
3646 && (offset / GET_MODE_SIZE (GET_MODE (table))
3647 < XVECLEN (table, 1)))
3649 offset /= GET_MODE_SIZE (GET_MODE (table));
3650 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3651 XEXP (table, 0));
3653 if (GET_MODE (table) != Pmode)
3654 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3656 /* Indicate this is a constant. This isn't a
3657 valid form of CONST, but it will only be used
3658 to fold the next insns and then discarded, so
3659 it should be safe.
3661 Note this expression must be explicitly discarded,
3662 by cse_insn, else it may end up in a REG_EQUAL note
3663 and "escape" to cause problems elsewhere. */
3664 return gen_rtx_CONST (GET_MODE (new), new);
3669 return x;
3672 #ifdef NO_FUNCTION_CSE
3673 case CALL:
3674 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3675 return x;
3676 break;
3677 #endif
3679 case ASM_OPERANDS:
3680 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3681 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3682 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3683 break;
3685 default:
3686 break;
3689 const_arg0 = 0;
3690 const_arg1 = 0;
3691 const_arg2 = 0;
3692 mode_arg0 = VOIDmode;
3694 /* Try folding our operands.
3695 Then see which ones have constant values known. */
3697 fmt = GET_RTX_FORMAT (code);
3698 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3699 if (fmt[i] == 'e')
3701 rtx arg = XEXP (x, i);
3702 rtx folded_arg = arg, const_arg = 0;
3703 enum machine_mode mode_arg = GET_MODE (arg);
3704 rtx cheap_arg, expensive_arg;
3705 rtx replacements[2];
3706 int j;
3708 /* Most arguments are cheap, so handle them specially. */
3709 switch (GET_CODE (arg))
3711 case REG:
3712 /* This is the same as calling equiv_constant; it is duplicated
3713 here for speed. */
3714 if (REGNO_QTY_VALID_P (REGNO (arg)))
3716 int arg_q = REG_QTY (REGNO (arg));
3717 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3719 if (arg_ent->const_rtx != NULL_RTX
3720 && GET_CODE (arg_ent->const_rtx) != REG
3721 && GET_CODE (arg_ent->const_rtx) != PLUS)
3722 const_arg
3723 = gen_lowpart_if_possible (GET_MODE (arg),
3724 arg_ent->const_rtx);
3726 break;
3728 case CONST:
3729 case CONST_INT:
3730 case SYMBOL_REF:
3731 case LABEL_REF:
3732 case CONST_DOUBLE:
3733 const_arg = arg;
3734 break;
3736 #ifdef HAVE_cc0
3737 case CC0:
3738 folded_arg = prev_insn_cc0;
3739 mode_arg = prev_insn_cc0_mode;
3740 const_arg = equiv_constant (folded_arg);
3741 break;
3742 #endif
3744 default:
3745 folded_arg = fold_rtx (arg, insn);
3746 const_arg = equiv_constant (folded_arg);
3749 /* For the first three operands, see if the operand
3750 is constant or equivalent to a constant. */
3751 switch (i)
3753 case 0:
3754 folded_arg0 = folded_arg;
3755 const_arg0 = const_arg;
3756 mode_arg0 = mode_arg;
3757 break;
3758 case 1:
3759 folded_arg1 = folded_arg;
3760 const_arg1 = const_arg;
3761 break;
3762 case 2:
3763 const_arg2 = const_arg;
3764 break;
3767 /* Pick the least expensive of the folded argument and an
3768 equivalent constant argument. */
3769 if (const_arg == 0 || const_arg == folded_arg
3770 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3771 cheap_arg = folded_arg, expensive_arg = const_arg;
3772 else
3773 cheap_arg = const_arg, expensive_arg = folded_arg;
3775 /* Try to replace the operand with the cheapest of the two
3776 possibilities. If it doesn't work and this is either of the first
3777 two operands of a commutative operation, try swapping them.
3778 If THAT fails, try the more expensive, provided it is cheaper
3779 than what is already there. */
3781 if (cheap_arg == XEXP (x, i))
3782 continue;
3784 if (insn == 0 && ! copied)
3786 x = copy_rtx (x);
3787 copied = 1;
3790 /* Order the replacements from cheapest to most expensive. */
3791 replacements[0] = cheap_arg;
3792 replacements[1] = expensive_arg;
3794 for (j = 0; j < 2 && replacements[j]; j++)
3796 int old_cost = COST_IN (XEXP (x, i), code);
3797 int new_cost = COST_IN (replacements[j], code);
3799 /* Stop if what existed before was cheaper. Prefer constants
3800 in the case of a tie. */
3801 if (new_cost > old_cost
3802 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3803 break;
3805 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3806 break;
3808 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3809 || code == LTGT || code == UNEQ || code == ORDERED
3810 || code == UNORDERED)
3812 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3813 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3815 if (apply_change_group ())
3817 /* Swap them back to be invalid so that this loop can
3818 continue and flag them to be swapped back later. */
3819 rtx tem;
3821 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3822 XEXP (x, 1) = tem;
3823 must_swap = 1;
3824 break;
3830 else
3832 if (fmt[i] == 'E')
3833 /* Don't try to fold inside of a vector of expressions.
3834 Doing nothing is harmless. */
3838 /* If a commutative operation, place a constant integer as the second
3839 operand unless the first operand is also a constant integer. Otherwise,
3840 place any constant second unless the first operand is also a constant. */
3842 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3843 || code == LTGT || code == UNEQ || code == ORDERED
3844 || code == UNORDERED)
3846 if (must_swap || (const_arg0
3847 && (const_arg1 == 0
3848 || (GET_CODE (const_arg0) == CONST_INT
3849 && GET_CODE (const_arg1) != CONST_INT))))
3851 register rtx tem = XEXP (x, 0);
3853 if (insn == 0 && ! copied)
3855 x = copy_rtx (x);
3856 copied = 1;
3859 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3860 validate_change (insn, &XEXP (x, 1), tem, 1);
3861 if (apply_change_group ())
3863 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3864 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3869 /* If X is an arithmetic operation, see if we can simplify it. */
3871 switch (GET_RTX_CLASS (code))
3873 case '1':
3875 int is_const = 0;
3877 /* We can't simplify extension ops unless we know the
3878 original mode. */
3879 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3880 && mode_arg0 == VOIDmode)
3881 break;
3883 /* If we had a CONST, strip it off and put it back later if we
3884 fold. */
3885 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3886 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3888 new = simplify_unary_operation (code, mode,
3889 const_arg0 ? const_arg0 : folded_arg0,
3890 mode_arg0);
3891 if (new != 0 && is_const)
3892 new = gen_rtx_CONST (mode, new);
3894 break;
3896 case '<':
3897 /* See what items are actually being compared and set FOLDED_ARG[01]
3898 to those values and CODE to the actual comparison code. If any are
3899 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3900 do anything if both operands are already known to be constant. */
3902 if (const_arg0 == 0 || const_arg1 == 0)
3904 struct table_elt *p0, *p1;
3905 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3906 enum machine_mode mode_arg1;
3908 #ifdef FLOAT_STORE_FLAG_VALUE
3909 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3911 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3912 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3913 false_rtx = CONST0_RTX (mode);
3915 #endif
3917 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3918 &mode_arg0, &mode_arg1);
3919 const_arg0 = equiv_constant (folded_arg0);
3920 const_arg1 = equiv_constant (folded_arg1);
3922 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3923 what kinds of things are being compared, so we can't do
3924 anything with this comparison. */
3926 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3927 break;
3929 /* If we do not now have two constants being compared, see
3930 if we can nevertheless deduce some things about the
3931 comparison. */
3932 if (const_arg0 == 0 || const_arg1 == 0)
3934 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3935 non-explicit constant? These aren't zero, but we
3936 don't know their sign. */
3937 if (const_arg1 == const0_rtx
3938 && (NONZERO_BASE_PLUS_P (folded_arg0)
3939 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3940 come out as 0. */
3941 || GET_CODE (folded_arg0) == SYMBOL_REF
3942 #endif
3943 || GET_CODE (folded_arg0) == LABEL_REF
3944 || GET_CODE (folded_arg0) == CONST))
3946 if (code == EQ)
3947 return false_rtx;
3948 else if (code == NE)
3949 return true_rtx;
3952 /* See if the two operands are the same. */
3954 if (folded_arg0 == folded_arg1
3955 || (GET_CODE (folded_arg0) == REG
3956 && GET_CODE (folded_arg1) == REG
3957 && (REG_QTY (REGNO (folded_arg0))
3958 == REG_QTY (REGNO (folded_arg1))))
3959 || ((p0 = lookup (folded_arg0,
3960 (safe_hash (folded_arg0, mode_arg0)
3961 & HASH_MASK), mode_arg0))
3962 && (p1 = lookup (folded_arg1,
3963 (safe_hash (folded_arg1, mode_arg0)
3964 & HASH_MASK), mode_arg0))
3965 && p0->first_same_value == p1->first_same_value))
3967 /* Sadly two equal NaNs are not equivalent. */
3968 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3969 || ! FLOAT_MODE_P (mode_arg0)
3970 || flag_unsafe_math_optimizations)
3971 return ((code == EQ || code == LE || code == GE
3972 || code == LEU || code == GEU || code == UNEQ
3973 || code == UNLE || code == UNGE || code == ORDERED)
3974 ? true_rtx : false_rtx);
3975 /* Take care for the FP compares we can resolve. */
3976 if (code == UNEQ || code == UNLE || code == UNGE)
3977 return true_rtx;
3978 if (code == LTGT || code == LT || code == GT)
3979 return false_rtx;
3982 /* If FOLDED_ARG0 is a register, see if the comparison we are
3983 doing now is either the same as we did before or the reverse
3984 (we only check the reverse if not floating-point). */
3985 else if (GET_CODE (folded_arg0) == REG)
3987 int qty = REG_QTY (REGNO (folded_arg0));
3989 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3991 struct qty_table_elem *ent = &qty_table[qty];
3993 if ((comparison_dominates_p (ent->comparison_code, code)
3994 || (! FLOAT_MODE_P (mode_arg0)
3995 && comparison_dominates_p (ent->comparison_code,
3996 reverse_condition (code))))
3997 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3998 || (const_arg1
3999 && rtx_equal_p (ent->comparison_const,
4000 const_arg1))
4001 || (GET_CODE (folded_arg1) == REG
4002 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4003 return (comparison_dominates_p (ent->comparison_code, code)
4004 ? true_rtx : false_rtx);
4010 /* If we are comparing against zero, see if the first operand is
4011 equivalent to an IOR with a constant. If so, we may be able to
4012 determine the result of this comparison. */
4014 if (const_arg1 == const0_rtx)
4016 rtx y = lookup_as_function (folded_arg0, IOR);
4017 rtx inner_const;
4019 if (y != 0
4020 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4021 && GET_CODE (inner_const) == CONST_INT
4022 && INTVAL (inner_const) != 0)
4024 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4025 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4026 && (INTVAL (inner_const)
4027 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4028 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4030 #ifdef FLOAT_STORE_FLAG_VALUE
4031 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4033 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4034 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4035 false_rtx = CONST0_RTX (mode);
4037 #endif
4039 switch (code)
4041 case EQ:
4042 return false_rtx;
4043 case NE:
4044 return true_rtx;
4045 case LT: case LE:
4046 if (has_sign)
4047 return true_rtx;
4048 break;
4049 case GT: case GE:
4050 if (has_sign)
4051 return false_rtx;
4052 break;
4053 default:
4054 break;
4059 new = simplify_relational_operation (code,
4060 (mode_arg0 != VOIDmode
4061 ? mode_arg0
4062 : (GET_MODE (const_arg0
4063 ? const_arg0
4064 : folded_arg0)
4065 != VOIDmode)
4066 ? GET_MODE (const_arg0
4067 ? const_arg0
4068 : folded_arg0)
4069 : GET_MODE (const_arg1
4070 ? const_arg1
4071 : folded_arg1)),
4072 const_arg0 ? const_arg0 : folded_arg0,
4073 const_arg1 ? const_arg1 : folded_arg1);
4074 #ifdef FLOAT_STORE_FLAG_VALUE
4075 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4077 if (new == const0_rtx)
4078 new = CONST0_RTX (mode);
4079 else
4080 new = (CONST_DOUBLE_FROM_REAL_VALUE
4081 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4083 #endif
4084 break;
4086 case '2':
4087 case 'c':
4088 switch (code)
4090 case PLUS:
4091 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4092 with that LABEL_REF as its second operand. If so, the result is
4093 the first operand of that MINUS. This handles switches with an
4094 ADDR_DIFF_VEC table. */
4095 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4097 rtx y
4098 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4099 : lookup_as_function (folded_arg0, MINUS);
4101 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4102 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4103 return XEXP (y, 0);
4105 /* Now try for a CONST of a MINUS like the above. */
4106 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4107 : lookup_as_function (folded_arg0, CONST))) != 0
4108 && GET_CODE (XEXP (y, 0)) == MINUS
4109 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4110 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4111 return XEXP (XEXP (y, 0), 0);
4114 /* Likewise if the operands are in the other order. */
4115 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4117 rtx y
4118 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4119 : lookup_as_function (folded_arg1, MINUS);
4121 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4122 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4123 return XEXP (y, 0);
4125 /* Now try for a CONST of a MINUS like the above. */
4126 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4127 : lookup_as_function (folded_arg1, CONST))) != 0
4128 && GET_CODE (XEXP (y, 0)) == MINUS
4129 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4130 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4131 return XEXP (XEXP (y, 0), 0);
4134 /* If second operand is a register equivalent to a negative
4135 CONST_INT, see if we can find a register equivalent to the
4136 positive constant. Make a MINUS if so. Don't do this for
4137 a non-negative constant since we might then alternate between
4138 chosing positive and negative constants. Having the positive
4139 constant previously-used is the more common case. Be sure
4140 the resulting constant is non-negative; if const_arg1 were
4141 the smallest negative number this would overflow: depending
4142 on the mode, this would either just be the same value (and
4143 hence not save anything) or be incorrect. */
4144 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4145 && INTVAL (const_arg1) < 0
4146 /* This used to test
4148 -INTVAL (const_arg1) >= 0
4150 But The Sun V5.0 compilers mis-compiled that test. So
4151 instead we test for the problematic value in a more direct
4152 manner and hope the Sun compilers get it correct. */
4153 && INTVAL (const_arg1) !=
4154 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4155 && GET_CODE (folded_arg1) == REG)
4157 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4158 struct table_elt *p
4159 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4160 mode);
4162 if (p)
4163 for (p = p->first_same_value; p; p = p->next_same_value)
4164 if (GET_CODE (p->exp) == REG)
4165 return simplify_gen_binary (MINUS, mode, folded_arg0,
4166 canon_reg (p->exp, NULL_RTX));
4168 goto from_plus;
4170 case MINUS:
4171 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4172 If so, produce (PLUS Z C2-C). */
4173 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4175 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4176 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4177 return fold_rtx (plus_constant (copy_rtx (y),
4178 -INTVAL (const_arg1)),
4179 NULL_RTX);
4182 /* Fall through. */
4184 from_plus:
4185 case SMIN: case SMAX: case UMIN: case UMAX:
4186 case IOR: case AND: case XOR:
4187 case MULT: case DIV: case UDIV:
4188 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4189 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4190 is known to be of similar form, we may be able to replace the
4191 operation with a combined operation. This may eliminate the
4192 intermediate operation if every use is simplified in this way.
4193 Note that the similar optimization done by combine.c only works
4194 if the intermediate operation's result has only one reference. */
4196 if (GET_CODE (folded_arg0) == REG
4197 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4199 int is_shift
4200 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4201 rtx y = lookup_as_function (folded_arg0, code);
4202 rtx inner_const;
4203 enum rtx_code associate_code;
4204 rtx new_const;
4206 if (y == 0
4207 || 0 == (inner_const
4208 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4209 || GET_CODE (inner_const) != CONST_INT
4210 /* If we have compiled a statement like
4211 "if (x == (x & mask1))", and now are looking at
4212 "x & mask2", we will have a case where the first operand
4213 of Y is the same as our first operand. Unless we detect
4214 this case, an infinite loop will result. */
4215 || XEXP (y, 0) == folded_arg0)
4216 break;
4218 /* Don't associate these operations if they are a PLUS with the
4219 same constant and it is a power of two. These might be doable
4220 with a pre- or post-increment. Similarly for two subtracts of
4221 identical powers of two with post decrement. */
4223 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4224 && ((HAVE_PRE_INCREMENT
4225 && exact_log2 (INTVAL (const_arg1)) >= 0)
4226 || (HAVE_POST_INCREMENT
4227 && exact_log2 (INTVAL (const_arg1)) >= 0)
4228 || (HAVE_PRE_DECREMENT
4229 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4230 || (HAVE_POST_DECREMENT
4231 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4232 break;
4234 /* Compute the code used to compose the constants. For example,
4235 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4237 associate_code
4238 = (code == MULT || code == DIV || code == UDIV ? MULT
4239 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4241 new_const = simplify_binary_operation (associate_code, mode,
4242 const_arg1, inner_const);
4244 if (new_const == 0)
4245 break;
4247 /* If we are associating shift operations, don't let this
4248 produce a shift of the size of the object or larger.
4249 This could occur when we follow a sign-extend by a right
4250 shift on a machine that does a sign-extend as a pair
4251 of shifts. */
4253 if (is_shift && GET_CODE (new_const) == CONST_INT
4254 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4256 /* As an exception, we can turn an ASHIFTRT of this
4257 form into a shift of the number of bits - 1. */
4258 if (code == ASHIFTRT)
4259 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4260 else
4261 break;
4264 y = copy_rtx (XEXP (y, 0));
4266 /* If Y contains our first operand (the most common way this
4267 can happen is if Y is a MEM), we would do into an infinite
4268 loop if we tried to fold it. So don't in that case. */
4270 if (! reg_mentioned_p (folded_arg0, y))
4271 y = fold_rtx (y, insn);
4273 return simplify_gen_binary (code, mode, y, new_const);
4275 break;
4277 default:
4278 break;
4281 new = simplify_binary_operation (code, mode,
4282 const_arg0 ? const_arg0 : folded_arg0,
4283 const_arg1 ? const_arg1 : folded_arg1);
4284 break;
4286 case 'o':
4287 /* (lo_sum (high X) X) is simply X. */
4288 if (code == LO_SUM && const_arg0 != 0
4289 && GET_CODE (const_arg0) == HIGH
4290 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4291 return const_arg1;
4292 break;
4294 case '3':
4295 case 'b':
4296 new = simplify_ternary_operation (code, mode, mode_arg0,
4297 const_arg0 ? const_arg0 : folded_arg0,
4298 const_arg1 ? const_arg1 : folded_arg1,
4299 const_arg2 ? const_arg2 : XEXP (x, 2));
4300 break;
4302 case 'x':
4303 /* Always eliminate CONSTANT_P_RTX at this stage. */
4304 if (code == CONSTANT_P_RTX)
4305 return (const_arg0 ? const1_rtx : const0_rtx);
4306 break;
4309 return new ? new : x;
4312 /* Return a constant value currently equivalent to X.
4313 Return 0 if we don't know one. */
4315 static rtx
4316 equiv_constant (x)
4317 rtx x;
4319 if (GET_CODE (x) == REG
4320 && REGNO_QTY_VALID_P (REGNO (x)))
4322 int x_q = REG_QTY (REGNO (x));
4323 struct qty_table_elem *x_ent = &qty_table[x_q];
4325 if (x_ent->const_rtx)
4326 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4329 if (x == 0 || CONSTANT_P (x))
4330 return x;
4332 /* If X is a MEM, try to fold it outside the context of any insn to see if
4333 it might be equivalent to a constant. That handles the case where it
4334 is a constant-pool reference. Then try to look it up in the hash table
4335 in case it is something whose value we have seen before. */
4337 if (GET_CODE (x) == MEM)
4339 struct table_elt *elt;
4341 x = fold_rtx (x, NULL_RTX);
4342 if (CONSTANT_P (x))
4343 return x;
4345 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4346 if (elt == 0)
4347 return 0;
4349 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4350 if (elt->is_const && CONSTANT_P (elt->exp))
4351 return elt->exp;
4354 return 0;
4357 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4358 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4359 least-significant part of X.
4360 MODE specifies how big a part of X to return.
4362 If the requested operation cannot be done, 0 is returned.
4364 This is similar to gen_lowpart in emit-rtl.c. */
4367 gen_lowpart_if_possible (mode, x)
4368 enum machine_mode mode;
4369 register rtx x;
4371 rtx result = gen_lowpart_common (mode, x);
4373 if (result)
4374 return result;
4375 else if (GET_CODE (x) == MEM)
4377 /* This is the only other case we handle. */
4378 register int offset = 0;
4379 rtx new;
4381 if (WORDS_BIG_ENDIAN)
4382 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4383 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4384 if (BYTES_BIG_ENDIAN)
4385 /* Adjust the address so that the address-after-the-data is
4386 unchanged. */
4387 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4388 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4390 new = adjust_address_nv (x, mode, offset);
4391 if (! memory_address_p (mode, XEXP (new, 0)))
4392 return 0;
4394 return new;
4396 else
4397 return 0;
4400 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4401 branch. It will be zero if not.
4403 In certain cases, this can cause us to add an equivalence. For example,
4404 if we are following the taken case of
4405 if (i == 2)
4406 we can add the fact that `i' and '2' are now equivalent.
4408 In any case, we can record that this comparison was passed. If the same
4409 comparison is seen later, we will know its value. */
4411 static void
4412 record_jump_equiv (insn, taken)
4413 rtx insn;
4414 int taken;
4416 int cond_known_true;
4417 rtx op0, op1;
4418 rtx set;
4419 enum machine_mode mode, mode0, mode1;
4420 int reversed_nonequality = 0;
4421 enum rtx_code code;
4423 /* Ensure this is the right kind of insn. */
4424 if (! any_condjump_p (insn))
4425 return;
4426 set = pc_set (insn);
4428 /* See if this jump condition is known true or false. */
4429 if (taken)
4430 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4431 else
4432 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4434 /* Get the type of comparison being done and the operands being compared.
4435 If we had to reverse a non-equality condition, record that fact so we
4436 know that it isn't valid for floating-point. */
4437 code = GET_CODE (XEXP (SET_SRC (set), 0));
4438 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4439 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4441 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4442 if (! cond_known_true)
4444 code = reversed_comparison_code_parts (code, op0, op1, insn);
4446 /* Don't remember if we can't find the inverse. */
4447 if (code == UNKNOWN)
4448 return;
4451 /* The mode is the mode of the non-constant. */
4452 mode = mode0;
4453 if (mode1 != VOIDmode)
4454 mode = mode1;
4456 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4459 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4460 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4461 Make any useful entries we can with that information. Called from
4462 above function and called recursively. */
4464 static void
4465 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4466 enum rtx_code code;
4467 enum machine_mode mode;
4468 rtx op0, op1;
4469 int reversed_nonequality;
4471 unsigned op0_hash, op1_hash;
4472 int op0_in_memory, op1_in_memory;
4473 struct table_elt *op0_elt, *op1_elt;
4475 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4476 we know that they are also equal in the smaller mode (this is also
4477 true for all smaller modes whether or not there is a SUBREG, but
4478 is not worth testing for with no SUBREG). */
4480 /* Note that GET_MODE (op0) may not equal MODE. */
4481 if (code == EQ && GET_CODE (op0) == SUBREG
4482 && (GET_MODE_SIZE (GET_MODE (op0))
4483 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4485 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4486 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4488 record_jump_cond (code, mode, SUBREG_REG (op0),
4489 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4490 reversed_nonequality);
4493 if (code == EQ && GET_CODE (op1) == SUBREG
4494 && (GET_MODE_SIZE (GET_MODE (op1))
4495 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4497 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4498 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4500 record_jump_cond (code, mode, SUBREG_REG (op1),
4501 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4502 reversed_nonequality);
4505 /* Similarly, if this is an NE comparison, and either is a SUBREG
4506 making a smaller mode, we know the whole thing is also NE. */
4508 /* Note that GET_MODE (op0) may not equal MODE;
4509 if we test MODE instead, we can get an infinite recursion
4510 alternating between two modes each wider than MODE. */
4512 if (code == NE && GET_CODE (op0) == SUBREG
4513 && subreg_lowpart_p (op0)
4514 && (GET_MODE_SIZE (GET_MODE (op0))
4515 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4517 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4518 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4520 record_jump_cond (code, mode, SUBREG_REG (op0),
4521 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4522 reversed_nonequality);
4525 if (code == NE && GET_CODE (op1) == SUBREG
4526 && subreg_lowpart_p (op1)
4527 && (GET_MODE_SIZE (GET_MODE (op1))
4528 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4530 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4531 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4533 record_jump_cond (code, mode, SUBREG_REG (op1),
4534 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4535 reversed_nonequality);
4538 /* Hash both operands. */
4540 do_not_record = 0;
4541 hash_arg_in_memory = 0;
4542 op0_hash = HASH (op0, mode);
4543 op0_in_memory = hash_arg_in_memory;
4545 if (do_not_record)
4546 return;
4548 do_not_record = 0;
4549 hash_arg_in_memory = 0;
4550 op1_hash = HASH (op1, mode);
4551 op1_in_memory = hash_arg_in_memory;
4553 if (do_not_record)
4554 return;
4556 /* Look up both operands. */
4557 op0_elt = lookup (op0, op0_hash, mode);
4558 op1_elt = lookup (op1, op1_hash, mode);
4560 /* If both operands are already equivalent or if they are not in the
4561 table but are identical, do nothing. */
4562 if ((op0_elt != 0 && op1_elt != 0
4563 && op0_elt->first_same_value == op1_elt->first_same_value)
4564 || op0 == op1 || rtx_equal_p (op0, op1))
4565 return;
4567 /* If we aren't setting two things equal all we can do is save this
4568 comparison. Similarly if this is floating-point. In the latter
4569 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4570 If we record the equality, we might inadvertently delete code
4571 whose intent was to change -0 to +0. */
4573 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4575 struct qty_table_elem *ent;
4576 int qty;
4578 /* If we reversed a floating-point comparison, if OP0 is not a
4579 register, or if OP1 is neither a register or constant, we can't
4580 do anything. */
4582 if (GET_CODE (op1) != REG)
4583 op1 = equiv_constant (op1);
4585 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4586 || GET_CODE (op0) != REG || op1 == 0)
4587 return;
4589 /* Put OP0 in the hash table if it isn't already. This gives it a
4590 new quantity number. */
4591 if (op0_elt == 0)
4593 if (insert_regs (op0, NULL, 0))
4595 rehash_using_reg (op0);
4596 op0_hash = HASH (op0, mode);
4598 /* If OP0 is contained in OP1, this changes its hash code
4599 as well. Faster to rehash than to check, except
4600 for the simple case of a constant. */
4601 if (! CONSTANT_P (op1))
4602 op1_hash = HASH (op1,mode);
4605 op0_elt = insert (op0, NULL, op0_hash, mode);
4606 op0_elt->in_memory = op0_in_memory;
4609 qty = REG_QTY (REGNO (op0));
4610 ent = &qty_table[qty];
4612 ent->comparison_code = code;
4613 if (GET_CODE (op1) == REG)
4615 /* Look it up again--in case op0 and op1 are the same. */
4616 op1_elt = lookup (op1, op1_hash, mode);
4618 /* Put OP1 in the hash table so it gets a new quantity number. */
4619 if (op1_elt == 0)
4621 if (insert_regs (op1, NULL, 0))
4623 rehash_using_reg (op1);
4624 op1_hash = HASH (op1, mode);
4627 op1_elt = insert (op1, NULL, op1_hash, mode);
4628 op1_elt->in_memory = op1_in_memory;
4631 ent->comparison_const = NULL_RTX;
4632 ent->comparison_qty = REG_QTY (REGNO (op1));
4634 else
4636 ent->comparison_const = op1;
4637 ent->comparison_qty = -1;
4640 return;
4643 /* If either side is still missing an equivalence, make it now,
4644 then merge the equivalences. */
4646 if (op0_elt == 0)
4648 if (insert_regs (op0, NULL, 0))
4650 rehash_using_reg (op0);
4651 op0_hash = HASH (op0, mode);
4654 op0_elt = insert (op0, NULL, op0_hash, mode);
4655 op0_elt->in_memory = op0_in_memory;
4658 if (op1_elt == 0)
4660 if (insert_regs (op1, NULL, 0))
4662 rehash_using_reg (op1);
4663 op1_hash = HASH (op1, mode);
4666 op1_elt = insert (op1, NULL, op1_hash, mode);
4667 op1_elt->in_memory = op1_in_memory;
4670 merge_equiv_classes (op0_elt, op1_elt);
4671 last_jump_equiv_class = op0_elt;
4674 /* CSE processing for one instruction.
4675 First simplify sources and addresses of all assignments
4676 in the instruction, using previously-computed equivalents values.
4677 Then install the new sources and destinations in the table
4678 of available values.
4680 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4681 the insn. It means that INSN is inside libcall block. In this
4682 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4684 /* Data on one SET contained in the instruction. */
4686 struct set
4688 /* The SET rtx itself. */
4689 rtx rtl;
4690 /* The SET_SRC of the rtx (the original value, if it is changing). */
4691 rtx src;
4692 /* The hash-table element for the SET_SRC of the SET. */
4693 struct table_elt *src_elt;
4694 /* Hash value for the SET_SRC. */
4695 unsigned src_hash;
4696 /* Hash value for the SET_DEST. */
4697 unsigned dest_hash;
4698 /* The SET_DEST, with SUBREG, etc., stripped. */
4699 rtx inner_dest;
4700 /* Nonzero if the SET_SRC is in memory. */
4701 char src_in_memory;
4702 /* Nonzero if the SET_SRC contains something
4703 whose value cannot be predicted and understood. */
4704 char src_volatile;
4705 /* Original machine mode, in case it becomes a CONST_INT. */
4706 enum machine_mode mode;
4707 /* A constant equivalent for SET_SRC, if any. */
4708 rtx src_const;
4709 /* Original SET_SRC value used for libcall notes. */
4710 rtx orig_src;
4711 /* Hash value of constant equivalent for SET_SRC. */
4712 unsigned src_const_hash;
4713 /* Table entry for constant equivalent for SET_SRC, if any. */
4714 struct table_elt *src_const_elt;
4717 static void
4718 cse_insn (insn, libcall_insn)
4719 rtx insn;
4720 rtx libcall_insn;
4722 register rtx x = PATTERN (insn);
4723 register int i;
4724 rtx tem;
4725 register int n_sets = 0;
4727 #ifdef HAVE_cc0
4728 /* Records what this insn does to set CC0. */
4729 rtx this_insn_cc0 = 0;
4730 enum machine_mode this_insn_cc0_mode = VOIDmode;
4731 #endif
4733 rtx src_eqv = 0;
4734 struct table_elt *src_eqv_elt = 0;
4735 int src_eqv_volatile = 0;
4736 int src_eqv_in_memory = 0;
4737 unsigned src_eqv_hash = 0;
4739 struct set *sets = (struct set *) 0;
4741 this_insn = insn;
4743 /* Find all the SETs and CLOBBERs in this instruction.
4744 Record all the SETs in the array `set' and count them.
4745 Also determine whether there is a CLOBBER that invalidates
4746 all memory references, or all references at varying addresses. */
4748 if (GET_CODE (insn) == CALL_INSN)
4750 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4752 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4753 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4754 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4758 if (GET_CODE (x) == SET)
4760 sets = (struct set *) alloca (sizeof (struct set));
4761 sets[0].rtl = x;
4763 /* Ignore SETs that are unconditional jumps.
4764 They never need cse processing, so this does not hurt.
4765 The reason is not efficiency but rather
4766 so that we can test at the end for instructions
4767 that have been simplified to unconditional jumps
4768 and not be misled by unchanged instructions
4769 that were unconditional jumps to begin with. */
4770 if (SET_DEST (x) == pc_rtx
4771 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4774 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4775 The hard function value register is used only once, to copy to
4776 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4777 Ensure we invalidate the destination register. On the 80386 no
4778 other code would invalidate it since it is a fixed_reg.
4779 We need not check the return of apply_change_group; see canon_reg. */
4781 else if (GET_CODE (SET_SRC (x)) == CALL)
4783 canon_reg (SET_SRC (x), insn);
4784 apply_change_group ();
4785 fold_rtx (SET_SRC (x), insn);
4786 invalidate (SET_DEST (x), VOIDmode);
4788 else
4789 n_sets = 1;
4791 else if (GET_CODE (x) == PARALLEL)
4793 register int lim = XVECLEN (x, 0);
4795 sets = (struct set *) alloca (lim * sizeof (struct set));
4797 /* Find all regs explicitly clobbered in this insn,
4798 and ensure they are not replaced with any other regs
4799 elsewhere in this insn.
4800 When a reg that is clobbered is also used for input,
4801 we should presume that that is for a reason,
4802 and we should not substitute some other register
4803 which is not supposed to be clobbered.
4804 Therefore, this loop cannot be merged into the one below
4805 because a CALL may precede a CLOBBER and refer to the
4806 value clobbered. We must not let a canonicalization do
4807 anything in that case. */
4808 for (i = 0; i < lim; i++)
4810 register rtx y = XVECEXP (x, 0, i);
4811 if (GET_CODE (y) == CLOBBER)
4813 rtx clobbered = XEXP (y, 0);
4815 if (GET_CODE (clobbered) == REG
4816 || GET_CODE (clobbered) == SUBREG)
4817 invalidate (clobbered, VOIDmode);
4818 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4819 || GET_CODE (clobbered) == ZERO_EXTRACT)
4820 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4824 for (i = 0; i < lim; i++)
4826 register rtx y = XVECEXP (x, 0, i);
4827 if (GET_CODE (y) == SET)
4829 /* As above, we ignore unconditional jumps and call-insns and
4830 ignore the result of apply_change_group. */
4831 if (GET_CODE (SET_SRC (y)) == CALL)
4833 canon_reg (SET_SRC (y), insn);
4834 apply_change_group ();
4835 fold_rtx (SET_SRC (y), insn);
4836 invalidate (SET_DEST (y), VOIDmode);
4838 else if (SET_DEST (y) == pc_rtx
4839 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4841 else
4842 sets[n_sets++].rtl = y;
4844 else if (GET_CODE (y) == CLOBBER)
4846 /* If we clobber memory, canon the address.
4847 This does nothing when a register is clobbered
4848 because we have already invalidated the reg. */
4849 if (GET_CODE (XEXP (y, 0)) == MEM)
4850 canon_reg (XEXP (y, 0), NULL_RTX);
4852 else if (GET_CODE (y) == USE
4853 && ! (GET_CODE (XEXP (y, 0)) == REG
4854 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4855 canon_reg (y, NULL_RTX);
4856 else if (GET_CODE (y) == CALL)
4858 /* The result of apply_change_group can be ignored; see
4859 canon_reg. */
4860 canon_reg (y, insn);
4861 apply_change_group ();
4862 fold_rtx (y, insn);
4866 else if (GET_CODE (x) == CLOBBER)
4868 if (GET_CODE (XEXP (x, 0)) == MEM)
4869 canon_reg (XEXP (x, 0), NULL_RTX);
4872 /* Canonicalize a USE of a pseudo register or memory location. */
4873 else if (GET_CODE (x) == USE
4874 && ! (GET_CODE (XEXP (x, 0)) == REG
4875 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4876 canon_reg (XEXP (x, 0), NULL_RTX);
4877 else if (GET_CODE (x) == CALL)
4879 /* The result of apply_change_group can be ignored; see canon_reg. */
4880 canon_reg (x, insn);
4881 apply_change_group ();
4882 fold_rtx (x, insn);
4885 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4886 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4887 is handled specially for this case, and if it isn't set, then there will
4888 be no equivalence for the destination. */
4889 if (n_sets == 1 && REG_NOTES (insn) != 0
4890 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4891 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4892 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4893 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4895 /* Canonicalize sources and addresses of destinations.
4896 We do this in a separate pass to avoid problems when a MATCH_DUP is
4897 present in the insn pattern. In that case, we want to ensure that
4898 we don't break the duplicate nature of the pattern. So we will replace
4899 both operands at the same time. Otherwise, we would fail to find an
4900 equivalent substitution in the loop calling validate_change below.
4902 We used to suppress canonicalization of DEST if it appears in SRC,
4903 but we don't do this any more. */
4905 for (i = 0; i < n_sets; i++)
4907 rtx dest = SET_DEST (sets[i].rtl);
4908 rtx src = SET_SRC (sets[i].rtl);
4909 rtx new = canon_reg (src, insn);
4910 int insn_code;
4912 sets[i].orig_src = src;
4913 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4914 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4915 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4916 || (insn_code = recog_memoized (insn)) < 0
4917 || insn_data[insn_code].n_dups > 0)
4918 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4919 else
4920 SET_SRC (sets[i].rtl) = new;
4922 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4924 validate_change (insn, &XEXP (dest, 1),
4925 canon_reg (XEXP (dest, 1), insn), 1);
4926 validate_change (insn, &XEXP (dest, 2),
4927 canon_reg (XEXP (dest, 2), insn), 1);
4930 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4931 || GET_CODE (dest) == ZERO_EXTRACT
4932 || GET_CODE (dest) == SIGN_EXTRACT)
4933 dest = XEXP (dest, 0);
4935 if (GET_CODE (dest) == MEM)
4936 canon_reg (dest, insn);
4939 /* Now that we have done all the replacements, we can apply the change
4940 group and see if they all work. Note that this will cause some
4941 canonicalizations that would have worked individually not to be applied
4942 because some other canonicalization didn't work, but this should not
4943 occur often.
4945 The result of apply_change_group can be ignored; see canon_reg. */
4947 apply_change_group ();
4949 /* Set sets[i].src_elt to the class each source belongs to.
4950 Detect assignments from or to volatile things
4951 and set set[i] to zero so they will be ignored
4952 in the rest of this function.
4954 Nothing in this loop changes the hash table or the register chains. */
4956 for (i = 0; i < n_sets; i++)
4958 register rtx src, dest;
4959 register rtx src_folded;
4960 register struct table_elt *elt = 0, *p;
4961 enum machine_mode mode;
4962 rtx src_eqv_here;
4963 rtx src_const = 0;
4964 rtx src_related = 0;
4965 struct table_elt *src_const_elt = 0;
4966 int src_cost = MAX_COST;
4967 int src_eqv_cost = MAX_COST;
4968 int src_folded_cost = MAX_COST;
4969 int src_related_cost = MAX_COST;
4970 int src_elt_cost = MAX_COST;
4971 int src_regcost = MAX_COST;
4972 int src_eqv_regcost = MAX_COST;
4973 int src_folded_regcost = MAX_COST;
4974 int src_related_regcost = MAX_COST;
4975 int src_elt_regcost = MAX_COST;
4976 /* Set non-zero if we need to call force_const_mem on with the
4977 contents of src_folded before using it. */
4978 int src_folded_force_flag = 0;
4980 dest = SET_DEST (sets[i].rtl);
4981 src = SET_SRC (sets[i].rtl);
4983 /* If SRC is a constant that has no machine mode,
4984 hash it with the destination's machine mode.
4985 This way we can keep different modes separate. */
4987 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4988 sets[i].mode = mode;
4990 if (src_eqv)
4992 enum machine_mode eqvmode = mode;
4993 if (GET_CODE (dest) == STRICT_LOW_PART)
4994 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4995 do_not_record = 0;
4996 hash_arg_in_memory = 0;
4997 src_eqv = fold_rtx (src_eqv, insn);
4998 src_eqv_hash = HASH (src_eqv, eqvmode);
5000 /* Find the equivalence class for the equivalent expression. */
5002 if (!do_not_record)
5003 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5005 src_eqv_volatile = do_not_record;
5006 src_eqv_in_memory = hash_arg_in_memory;
5009 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5010 value of the INNER register, not the destination. So it is not
5011 a valid substitution for the source. But save it for later. */
5012 if (GET_CODE (dest) == STRICT_LOW_PART)
5013 src_eqv_here = 0;
5014 else
5015 src_eqv_here = src_eqv;
5017 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5018 simplified result, which may not necessarily be valid. */
5019 src_folded = fold_rtx (src, insn);
5021 #if 0
5022 /* ??? This caused bad code to be generated for the m68k port with -O2.
5023 Suppose src is (CONST_INT -1), and that after truncation src_folded
5024 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5025 At the end we will add src and src_const to the same equivalence
5026 class. We now have 3 and -1 on the same equivalence class. This
5027 causes later instructions to be mis-optimized. */
5028 /* If storing a constant in a bitfield, pre-truncate the constant
5029 so we will be able to record it later. */
5030 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5031 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5033 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5035 if (GET_CODE (src) == CONST_INT
5036 && GET_CODE (width) == CONST_INT
5037 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5038 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5039 src_folded
5040 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5041 << INTVAL (width)) - 1));
5043 #endif
5045 /* Compute SRC's hash code, and also notice if it
5046 should not be recorded at all. In that case,
5047 prevent any further processing of this assignment. */
5048 do_not_record = 0;
5049 hash_arg_in_memory = 0;
5051 sets[i].src = src;
5052 sets[i].src_hash = HASH (src, mode);
5053 sets[i].src_volatile = do_not_record;
5054 sets[i].src_in_memory = hash_arg_in_memory;
5056 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5057 a pseudo, do not record SRC. Using SRC as a replacement for
5058 anything else will be incorrect in that situation. Note that
5059 this usually occurs only for stack slots, in which case all the
5060 RTL would be referring to SRC, so we don't lose any optimization
5061 opportunities by not having SRC in the hash table. */
5063 if (GET_CODE (src) == MEM
5064 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5065 && GET_CODE (dest) == REG
5066 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5067 sets[i].src_volatile = 1;
5069 #if 0
5070 /* It is no longer clear why we used to do this, but it doesn't
5071 appear to still be needed. So let's try without it since this
5072 code hurts cse'ing widened ops. */
5073 /* If source is a perverse subreg (such as QI treated as an SI),
5074 treat it as volatile. It may do the work of an SI in one context
5075 where the extra bits are not being used, but cannot replace an SI
5076 in general. */
5077 if (GET_CODE (src) == SUBREG
5078 && (GET_MODE_SIZE (GET_MODE (src))
5079 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5080 sets[i].src_volatile = 1;
5081 #endif
5083 /* Locate all possible equivalent forms for SRC. Try to replace
5084 SRC in the insn with each cheaper equivalent.
5086 We have the following types of equivalents: SRC itself, a folded
5087 version, a value given in a REG_EQUAL note, or a value related
5088 to a constant.
5090 Each of these equivalents may be part of an additional class
5091 of equivalents (if more than one is in the table, they must be in
5092 the same class; we check for this).
5094 If the source is volatile, we don't do any table lookups.
5096 We note any constant equivalent for possible later use in a
5097 REG_NOTE. */
5099 if (!sets[i].src_volatile)
5100 elt = lookup (src, sets[i].src_hash, mode);
5102 sets[i].src_elt = elt;
5104 if (elt && src_eqv_here && src_eqv_elt)
5106 if (elt->first_same_value != src_eqv_elt->first_same_value)
5108 /* The REG_EQUAL is indicating that two formerly distinct
5109 classes are now equivalent. So merge them. */
5110 merge_equiv_classes (elt, src_eqv_elt);
5111 src_eqv_hash = HASH (src_eqv, elt->mode);
5112 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5115 src_eqv_here = 0;
5118 else if (src_eqv_elt)
5119 elt = src_eqv_elt;
5121 /* Try to find a constant somewhere and record it in `src_const'.
5122 Record its table element, if any, in `src_const_elt'. Look in
5123 any known equivalences first. (If the constant is not in the
5124 table, also set `sets[i].src_const_hash'). */
5125 if (elt)
5126 for (p = elt->first_same_value; p; p = p->next_same_value)
5127 if (p->is_const)
5129 src_const = p->exp;
5130 src_const_elt = elt;
5131 break;
5134 if (src_const == 0
5135 && (CONSTANT_P (src_folded)
5136 /* Consider (minus (label_ref L1) (label_ref L2)) as
5137 "constant" here so we will record it. This allows us
5138 to fold switch statements when an ADDR_DIFF_VEC is used. */
5139 || (GET_CODE (src_folded) == MINUS
5140 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5141 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5142 src_const = src_folded, src_const_elt = elt;
5143 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5144 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5146 /* If we don't know if the constant is in the table, get its
5147 hash code and look it up. */
5148 if (src_const && src_const_elt == 0)
5150 sets[i].src_const_hash = HASH (src_const, mode);
5151 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5154 sets[i].src_const = src_const;
5155 sets[i].src_const_elt = src_const_elt;
5157 /* If the constant and our source are both in the table, mark them as
5158 equivalent. Otherwise, if a constant is in the table but the source
5159 isn't, set ELT to it. */
5160 if (src_const_elt && elt
5161 && src_const_elt->first_same_value != elt->first_same_value)
5162 merge_equiv_classes (elt, src_const_elt);
5163 else if (src_const_elt && elt == 0)
5164 elt = src_const_elt;
5166 /* See if there is a register linearly related to a constant
5167 equivalent of SRC. */
5168 if (src_const
5169 && (GET_CODE (src_const) == CONST
5170 || (src_const_elt && src_const_elt->related_value != 0)))
5172 src_related = use_related_value (src_const, src_const_elt);
5173 if (src_related)
5175 struct table_elt *src_related_elt
5176 = lookup (src_related, HASH (src_related, mode), mode);
5177 if (src_related_elt && elt)
5179 if (elt->first_same_value
5180 != src_related_elt->first_same_value)
5181 /* This can occur when we previously saw a CONST
5182 involving a SYMBOL_REF and then see the SYMBOL_REF
5183 twice. Merge the involved classes. */
5184 merge_equiv_classes (elt, src_related_elt);
5186 src_related = 0;
5187 src_related_elt = 0;
5189 else if (src_related_elt && elt == 0)
5190 elt = src_related_elt;
5194 /* See if we have a CONST_INT that is already in a register in a
5195 wider mode. */
5197 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5198 && GET_MODE_CLASS (mode) == MODE_INT
5199 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5201 enum machine_mode wider_mode;
5203 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5204 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5205 && src_related == 0;
5206 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5208 struct table_elt *const_elt
5209 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5211 if (const_elt == 0)
5212 continue;
5214 for (const_elt = const_elt->first_same_value;
5215 const_elt; const_elt = const_elt->next_same_value)
5216 if (GET_CODE (const_elt->exp) == REG)
5218 src_related = gen_lowpart_if_possible (mode,
5219 const_elt->exp);
5220 break;
5225 /* Another possibility is that we have an AND with a constant in
5226 a mode narrower than a word. If so, it might have been generated
5227 as part of an "if" which would narrow the AND. If we already
5228 have done the AND in a wider mode, we can use a SUBREG of that
5229 value. */
5231 if (flag_expensive_optimizations && ! src_related
5232 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5233 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5235 enum machine_mode tmode;
5236 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5238 for (tmode = GET_MODE_WIDER_MODE (mode);
5239 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5240 tmode = GET_MODE_WIDER_MODE (tmode))
5242 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5243 struct table_elt *larger_elt;
5245 if (inner)
5247 PUT_MODE (new_and, tmode);
5248 XEXP (new_and, 0) = inner;
5249 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5250 if (larger_elt == 0)
5251 continue;
5253 for (larger_elt = larger_elt->first_same_value;
5254 larger_elt; larger_elt = larger_elt->next_same_value)
5255 if (GET_CODE (larger_elt->exp) == REG)
5257 src_related
5258 = gen_lowpart_if_possible (mode, larger_elt->exp);
5259 break;
5262 if (src_related)
5263 break;
5268 #ifdef LOAD_EXTEND_OP
5269 /* See if a MEM has already been loaded with a widening operation;
5270 if it has, we can use a subreg of that. Many CISC machines
5271 also have such operations, but this is only likely to be
5272 beneficial these machines. */
5274 if (flag_expensive_optimizations && src_related == 0
5275 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5276 && GET_MODE_CLASS (mode) == MODE_INT
5277 && GET_CODE (src) == MEM && ! do_not_record
5278 && LOAD_EXTEND_OP (mode) != NIL)
5280 enum machine_mode tmode;
5282 /* Set what we are trying to extend and the operation it might
5283 have been extended with. */
5284 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5285 XEXP (memory_extend_rtx, 0) = src;
5287 for (tmode = GET_MODE_WIDER_MODE (mode);
5288 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5289 tmode = GET_MODE_WIDER_MODE (tmode))
5291 struct table_elt *larger_elt;
5293 PUT_MODE (memory_extend_rtx, tmode);
5294 larger_elt = lookup (memory_extend_rtx,
5295 HASH (memory_extend_rtx, tmode), tmode);
5296 if (larger_elt == 0)
5297 continue;
5299 for (larger_elt = larger_elt->first_same_value;
5300 larger_elt; larger_elt = larger_elt->next_same_value)
5301 if (GET_CODE (larger_elt->exp) == REG)
5303 src_related = gen_lowpart_if_possible (mode,
5304 larger_elt->exp);
5305 break;
5308 if (src_related)
5309 break;
5312 #endif /* LOAD_EXTEND_OP */
5314 if (src == src_folded)
5315 src_folded = 0;
5317 /* At this point, ELT, if non-zero, points to a class of expressions
5318 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5319 and SRC_RELATED, if non-zero, each contain additional equivalent
5320 expressions. Prune these latter expressions by deleting expressions
5321 already in the equivalence class.
5323 Check for an equivalent identical to the destination. If found,
5324 this is the preferred equivalent since it will likely lead to
5325 elimination of the insn. Indicate this by placing it in
5326 `src_related'. */
5328 if (elt)
5329 elt = elt->first_same_value;
5330 for (p = elt; p; p = p->next_same_value)
5332 enum rtx_code code = GET_CODE (p->exp);
5334 /* If the expression is not valid, ignore it. Then we do not
5335 have to check for validity below. In most cases, we can use
5336 `rtx_equal_p', since canonicalization has already been done. */
5337 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5338 continue;
5340 /* Also skip paradoxical subregs, unless that's what we're
5341 looking for. */
5342 if (code == SUBREG
5343 && (GET_MODE_SIZE (GET_MODE (p->exp))
5344 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5345 && ! (src != 0
5346 && GET_CODE (src) == SUBREG
5347 && GET_MODE (src) == GET_MODE (p->exp)
5348 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5349 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5350 continue;
5352 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5353 src = 0;
5354 else if (src_folded && GET_CODE (src_folded) == code
5355 && rtx_equal_p (src_folded, p->exp))
5356 src_folded = 0;
5357 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5358 && rtx_equal_p (src_eqv_here, p->exp))
5359 src_eqv_here = 0;
5360 else if (src_related && GET_CODE (src_related) == code
5361 && rtx_equal_p (src_related, p->exp))
5362 src_related = 0;
5364 /* This is the same as the destination of the insns, we want
5365 to prefer it. Copy it to src_related. The code below will
5366 then give it a negative cost. */
5367 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5368 src_related = dest;
5371 /* Find the cheapest valid equivalent, trying all the available
5372 possibilities. Prefer items not in the hash table to ones
5373 that are when they are equal cost. Note that we can never
5374 worsen an insn as the current contents will also succeed.
5375 If we find an equivalent identical to the destination, use it as best,
5376 since this insn will probably be eliminated in that case. */
5377 if (src)
5379 if (rtx_equal_p (src, dest))
5380 src_cost = src_regcost = -1;
5381 else
5383 src_cost = COST (src);
5384 src_regcost = approx_reg_cost (src);
5388 if (src_eqv_here)
5390 if (rtx_equal_p (src_eqv_here, dest))
5391 src_eqv_cost = src_eqv_regcost = -1;
5392 else
5394 src_eqv_cost = COST (src_eqv_here);
5395 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5399 if (src_folded)
5401 if (rtx_equal_p (src_folded, dest))
5402 src_folded_cost = src_folded_regcost = -1;
5403 else
5405 src_folded_cost = COST (src_folded);
5406 src_folded_regcost = approx_reg_cost (src_folded);
5410 if (src_related)
5412 if (rtx_equal_p (src_related, dest))
5413 src_related_cost = src_related_regcost = -1;
5414 else
5416 src_related_cost = COST (src_related);
5417 src_related_regcost = approx_reg_cost (src_related);
5421 /* If this was an indirect jump insn, a known label will really be
5422 cheaper even though it looks more expensive. */
5423 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5424 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5426 /* Terminate loop when replacement made. This must terminate since
5427 the current contents will be tested and will always be valid. */
5428 while (1)
5430 rtx trial;
5432 /* Skip invalid entries. */
5433 while (elt && GET_CODE (elt->exp) != REG
5434 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5435 elt = elt->next_same_value;
5437 /* A paradoxical subreg would be bad here: it'll be the right
5438 size, but later may be adjusted so that the upper bits aren't
5439 what we want. So reject it. */
5440 if (elt != 0
5441 && GET_CODE (elt->exp) == SUBREG
5442 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5443 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5444 /* It is okay, though, if the rtx we're trying to match
5445 will ignore any of the bits we can't predict. */
5446 && ! (src != 0
5447 && GET_CODE (src) == SUBREG
5448 && GET_MODE (src) == GET_MODE (elt->exp)
5449 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5450 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5452 elt = elt->next_same_value;
5453 continue;
5456 if (elt)
5458 src_elt_cost = elt->cost;
5459 src_elt_regcost = elt->regcost;
5462 /* Find cheapest and skip it for the next time. For items
5463 of equal cost, use this order:
5464 src_folded, src, src_eqv, src_related and hash table entry. */
5465 if (src_folded
5466 && preferrable (src_folded_cost, src_folded_regcost,
5467 src_cost, src_regcost) <= 0
5468 && preferrable (src_folded_cost, src_folded_regcost,
5469 src_eqv_cost, src_eqv_regcost) <= 0
5470 && preferrable (src_folded_cost, src_folded_regcost,
5471 src_related_cost, src_related_regcost) <= 0
5472 && preferrable (src_folded_cost, src_folded_regcost,
5473 src_elt_cost, src_elt_regcost) <= 0)
5475 trial = src_folded, src_folded_cost = MAX_COST;
5476 if (src_folded_force_flag)
5477 trial = force_const_mem (mode, trial);
5479 else if (src
5480 && preferrable (src_cost, src_regcost,
5481 src_eqv_cost, src_eqv_regcost) <= 0
5482 && preferrable (src_cost, src_regcost,
5483 src_related_cost, src_related_regcost) <= 0
5484 && preferrable (src_cost, src_regcost,
5485 src_elt_cost, src_elt_regcost) <= 0)
5486 trial = src, src_cost = MAX_COST;
5487 else if (src_eqv_here
5488 && preferrable (src_eqv_cost, src_eqv_regcost,
5489 src_related_cost, src_related_regcost) <= 0
5490 && preferrable (src_eqv_cost, src_eqv_regcost,
5491 src_elt_cost, src_elt_regcost) <= 0)
5492 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5493 else if (src_related
5494 && preferrable (src_related_cost, src_related_regcost,
5495 src_elt_cost, src_elt_regcost) <= 0)
5496 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5497 else
5499 trial = copy_rtx (elt->exp);
5500 elt = elt->next_same_value;
5501 src_elt_cost = MAX_COST;
5504 /* We don't normally have an insn matching (set (pc) (pc)), so
5505 check for this separately here. We will delete such an
5506 insn below.
5508 For other cases such as a table jump or conditional jump
5509 where we know the ultimate target, go ahead and replace the
5510 operand. While that may not make a valid insn, we will
5511 reemit the jump below (and also insert any necessary
5512 barriers). */
5513 if (n_sets == 1 && dest == pc_rtx
5514 && (trial == pc_rtx
5515 || (GET_CODE (trial) == LABEL_REF
5516 && ! condjump_p (insn))))
5518 SET_SRC (sets[i].rtl) = trial;
5519 cse_jumps_altered = 1;
5520 break;
5523 /* Look for a substitution that makes a valid insn. */
5524 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5526 /* If we just made a substitution inside a libcall, then we
5527 need to make the same substitution in any notes attached
5528 to the RETVAL insn. */
5529 if (libcall_insn
5530 && (GET_CODE (sets[i].orig_src) == REG
5531 || GET_CODE (sets[i].orig_src) == SUBREG
5532 || GET_CODE (sets[i].orig_src) == MEM))
5533 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5534 canon_reg (SET_SRC (sets[i].rtl), insn));
5536 /* The result of apply_change_group can be ignored; see
5537 canon_reg. */
5539 validate_change (insn, &SET_SRC (sets[i].rtl),
5540 canon_reg (SET_SRC (sets[i].rtl), insn),
5542 apply_change_group ();
5543 break;
5546 /* If we previously found constant pool entries for
5547 constants and this is a constant, try making a
5548 pool entry. Put it in src_folded unless we already have done
5549 this since that is where it likely came from. */
5551 else if (constant_pool_entries_cost
5552 && CONSTANT_P (trial)
5553 /* Reject cases that will abort in decode_rtx_const.
5554 On the alpha when simplifying a switch, we get
5555 (const (truncate (minus (label_ref) (label_ref)))). */
5556 && ! (GET_CODE (trial) == CONST
5557 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5558 /* Likewise on IA-64, except without the truncate. */
5559 && ! (GET_CODE (trial) == CONST
5560 && GET_CODE (XEXP (trial, 0)) == MINUS
5561 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5562 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5563 && (src_folded == 0
5564 || (GET_CODE (src_folded) != MEM
5565 && ! src_folded_force_flag))
5566 && GET_MODE_CLASS (mode) != MODE_CC
5567 && mode != VOIDmode)
5569 src_folded_force_flag = 1;
5570 src_folded = trial;
5571 src_folded_cost = constant_pool_entries_cost;
5575 src = SET_SRC (sets[i].rtl);
5577 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5578 However, there is an important exception: If both are registers
5579 that are not the head of their equivalence class, replace SET_SRC
5580 with the head of the class. If we do not do this, we will have
5581 both registers live over a portion of the basic block. This way,
5582 their lifetimes will likely abut instead of overlapping. */
5583 if (GET_CODE (dest) == REG
5584 && REGNO_QTY_VALID_P (REGNO (dest)))
5586 int dest_q = REG_QTY (REGNO (dest));
5587 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5589 if (dest_ent->mode == GET_MODE (dest)
5590 && dest_ent->first_reg != REGNO (dest)
5591 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5592 /* Don't do this if the original insn had a hard reg as
5593 SET_SRC or SET_DEST. */
5594 && (GET_CODE (sets[i].src) != REG
5595 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5596 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5597 /* We can't call canon_reg here because it won't do anything if
5598 SRC is a hard register. */
5600 int src_q = REG_QTY (REGNO (src));
5601 struct qty_table_elem *src_ent = &qty_table[src_q];
5602 int first = src_ent->first_reg;
5603 rtx new_src
5604 = (first >= FIRST_PSEUDO_REGISTER
5605 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5607 /* We must use validate-change even for this, because this
5608 might be a special no-op instruction, suitable only to
5609 tag notes onto. */
5610 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5612 src = new_src;
5613 /* If we had a constant that is cheaper than what we are now
5614 setting SRC to, use that constant. We ignored it when we
5615 thought we could make this into a no-op. */
5616 if (src_const && COST (src_const) < COST (src)
5617 && validate_change (insn, &SET_SRC (sets[i].rtl),
5618 src_const, 0))
5619 src = src_const;
5624 /* If we made a change, recompute SRC values. */
5625 if (src != sets[i].src)
5627 cse_altered = 1;
5628 do_not_record = 0;
5629 hash_arg_in_memory = 0;
5630 sets[i].src = src;
5631 sets[i].src_hash = HASH (src, mode);
5632 sets[i].src_volatile = do_not_record;
5633 sets[i].src_in_memory = hash_arg_in_memory;
5634 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5637 /* If this is a single SET, we are setting a register, and we have an
5638 equivalent constant, we want to add a REG_NOTE. We don't want
5639 to write a REG_EQUAL note for a constant pseudo since verifying that
5640 that pseudo hasn't been eliminated is a pain. Such a note also
5641 won't help anything.
5643 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5644 which can be created for a reference to a compile time computable
5645 entry in a jump table. */
5647 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5648 && GET_CODE (src_const) != REG
5649 && ! (GET_CODE (src_const) == CONST
5650 && GET_CODE (XEXP (src_const, 0)) == MINUS
5651 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5652 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5654 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5656 /* Make sure that the rtx is not shared with any other insn. */
5657 src_const = copy_rtx (src_const);
5659 /* Record the actual constant value in a REG_EQUAL note, making
5660 a new one if one does not already exist. */
5661 if (tem)
5662 XEXP (tem, 0) = src_const;
5663 else
5664 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5665 src_const, REG_NOTES (insn));
5667 /* If storing a constant value in a register that
5668 previously held the constant value 0,
5669 record this fact with a REG_WAS_0 note on this insn.
5671 Note that the *register* is required to have previously held 0,
5672 not just any register in the quantity and we must point to the
5673 insn that set that register to zero.
5675 Rather than track each register individually, we just see if
5676 the last set for this quantity was for this register. */
5678 if (REGNO_QTY_VALID_P (REGNO (dest)))
5680 int dest_q = REG_QTY (REGNO (dest));
5681 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5683 if (dest_ent->const_rtx == const0_rtx)
5685 /* See if we previously had a REG_WAS_0 note. */
5686 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5687 rtx const_insn = dest_ent->const_insn;
5689 if ((tem = single_set (const_insn)) != 0
5690 && rtx_equal_p (SET_DEST (tem), dest))
5692 if (note)
5693 XEXP (note, 0) = const_insn;
5694 else
5695 REG_NOTES (insn)
5696 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5697 REG_NOTES (insn));
5703 /* Now deal with the destination. */
5704 do_not_record = 0;
5706 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5707 to the MEM or REG within it. */
5708 while (GET_CODE (dest) == SIGN_EXTRACT
5709 || GET_CODE (dest) == ZERO_EXTRACT
5710 || GET_CODE (dest) == SUBREG
5711 || GET_CODE (dest) == STRICT_LOW_PART)
5712 dest = XEXP (dest, 0);
5714 sets[i].inner_dest = dest;
5716 if (GET_CODE (dest) == MEM)
5718 #ifdef PUSH_ROUNDING
5719 /* Stack pushes invalidate the stack pointer. */
5720 rtx addr = XEXP (dest, 0);
5721 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5722 && XEXP (addr, 0) == stack_pointer_rtx)
5723 invalidate (stack_pointer_rtx, Pmode);
5724 #endif
5725 dest = fold_rtx (dest, insn);
5728 /* Compute the hash code of the destination now,
5729 before the effects of this instruction are recorded,
5730 since the register values used in the address computation
5731 are those before this instruction. */
5732 sets[i].dest_hash = HASH (dest, mode);
5734 /* Don't enter a bit-field in the hash table
5735 because the value in it after the store
5736 may not equal what was stored, due to truncation. */
5738 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5739 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5741 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5743 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5744 && GET_CODE (width) == CONST_INT
5745 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5746 && ! (INTVAL (src_const)
5747 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5748 /* Exception: if the value is constant,
5749 and it won't be truncated, record it. */
5751 else
5753 /* This is chosen so that the destination will be invalidated
5754 but no new value will be recorded.
5755 We must invalidate because sometimes constant
5756 values can be recorded for bitfields. */
5757 sets[i].src_elt = 0;
5758 sets[i].src_volatile = 1;
5759 src_eqv = 0;
5760 src_eqv_elt = 0;
5764 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5765 the insn. */
5766 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5768 /* One less use of the label this insn used to jump to. */
5769 if (JUMP_LABEL (insn) != 0)
5770 --LABEL_NUSES (JUMP_LABEL (insn));
5771 PUT_CODE (insn, NOTE);
5772 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5773 NOTE_SOURCE_FILE (insn) = 0;
5774 cse_jumps_altered = 1;
5775 /* No more processing for this set. */
5776 sets[i].rtl = 0;
5779 /* If this SET is now setting PC to a label, we know it used to
5780 be a conditional or computed branch. */
5781 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5783 /* We reemit the jump in as many cases as possible just in
5784 case the form of an unconditional jump is significantly
5785 different than a computed jump or conditional jump.
5787 If this insn has multiple sets, then reemitting the
5788 jump is nontrivial. So instead we just force rerecognition
5789 and hope for the best. */
5790 if (n_sets == 1)
5792 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5793 JUMP_LABEL (new) = XEXP (src, 0);
5794 LABEL_NUSES (XEXP (src, 0))++;
5795 insn = new;
5797 else
5798 INSN_CODE (insn) = -1;
5800 never_reached_warning (insn);
5802 /* Now emit a BARRIER after the unconditional jump. Do not bother
5803 deleting any unreachable code, let jump/flow do that. */
5804 if (NEXT_INSN (insn) != 0
5805 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5806 emit_barrier_after (insn);
5808 cse_jumps_altered = 1;
5809 sets[i].rtl = 0;
5812 /* If destination is volatile, invalidate it and then do no further
5813 processing for this assignment. */
5815 else if (do_not_record)
5817 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5818 invalidate (dest, VOIDmode);
5819 else if (GET_CODE (dest) == MEM)
5821 /* Outgoing arguments for a libcall don't
5822 affect any recorded expressions. */
5823 if (! libcall_insn || insn == libcall_insn)
5824 invalidate (dest, VOIDmode);
5826 else if (GET_CODE (dest) == STRICT_LOW_PART
5827 || GET_CODE (dest) == ZERO_EXTRACT)
5828 invalidate (XEXP (dest, 0), GET_MODE (dest));
5829 sets[i].rtl = 0;
5832 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5833 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5835 #ifdef HAVE_cc0
5836 /* If setting CC0, record what it was set to, or a constant, if it
5837 is equivalent to a constant. If it is being set to a floating-point
5838 value, make a COMPARE with the appropriate constant of 0. If we
5839 don't do this, later code can interpret this as a test against
5840 const0_rtx, which can cause problems if we try to put it into an
5841 insn as a floating-point operand. */
5842 if (dest == cc0_rtx)
5844 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5845 this_insn_cc0_mode = mode;
5846 if (FLOAT_MODE_P (mode))
5847 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5848 CONST0_RTX (mode));
5850 #endif
5853 /* Now enter all non-volatile source expressions in the hash table
5854 if they are not already present.
5855 Record their equivalence classes in src_elt.
5856 This way we can insert the corresponding destinations into
5857 the same classes even if the actual sources are no longer in them
5858 (having been invalidated). */
5860 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5861 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5863 register struct table_elt *elt;
5864 register struct table_elt *classp = sets[0].src_elt;
5865 rtx dest = SET_DEST (sets[0].rtl);
5866 enum machine_mode eqvmode = GET_MODE (dest);
5868 if (GET_CODE (dest) == STRICT_LOW_PART)
5870 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5871 classp = 0;
5873 if (insert_regs (src_eqv, classp, 0))
5875 rehash_using_reg (src_eqv);
5876 src_eqv_hash = HASH (src_eqv, eqvmode);
5878 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5879 elt->in_memory = src_eqv_in_memory;
5880 src_eqv_elt = elt;
5882 /* Check to see if src_eqv_elt is the same as a set source which
5883 does not yet have an elt, and if so set the elt of the set source
5884 to src_eqv_elt. */
5885 for (i = 0; i < n_sets; i++)
5886 if (sets[i].rtl && sets[i].src_elt == 0
5887 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5888 sets[i].src_elt = src_eqv_elt;
5891 for (i = 0; i < n_sets; i++)
5892 if (sets[i].rtl && ! sets[i].src_volatile
5893 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5895 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5897 /* REG_EQUAL in setting a STRICT_LOW_PART
5898 gives an equivalent for the entire destination register,
5899 not just for the subreg being stored in now.
5900 This is a more interesting equivalence, so we arrange later
5901 to treat the entire reg as the destination. */
5902 sets[i].src_elt = src_eqv_elt;
5903 sets[i].src_hash = src_eqv_hash;
5905 else
5907 /* Insert source and constant equivalent into hash table, if not
5908 already present. */
5909 register struct table_elt *classp = src_eqv_elt;
5910 register rtx src = sets[i].src;
5911 register rtx dest = SET_DEST (sets[i].rtl);
5912 enum machine_mode mode
5913 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5915 if (sets[i].src_elt == 0)
5917 /* Don't put a hard register source into the table if this is
5918 the last insn of a libcall. In this case, we only need
5919 to put src_eqv_elt in src_elt. */
5920 if (GET_CODE (src) != REG
5921 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5922 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5924 register struct table_elt *elt;
5926 /* Note that these insert_regs calls cannot remove
5927 any of the src_elt's, because they would have failed to
5928 match if not still valid. */
5929 if (insert_regs (src, classp, 0))
5931 rehash_using_reg (src);
5932 sets[i].src_hash = HASH (src, mode);
5934 elt = insert (src, classp, sets[i].src_hash, mode);
5935 elt->in_memory = sets[i].src_in_memory;
5936 sets[i].src_elt = classp = elt;
5938 else
5939 sets[i].src_elt = classp;
5941 if (sets[i].src_const && sets[i].src_const_elt == 0
5942 && src != sets[i].src_const
5943 && ! rtx_equal_p (sets[i].src_const, src))
5944 sets[i].src_elt = insert (sets[i].src_const, classp,
5945 sets[i].src_const_hash, mode);
5948 else if (sets[i].src_elt == 0)
5949 /* If we did not insert the source into the hash table (e.g., it was
5950 volatile), note the equivalence class for the REG_EQUAL value, if any,
5951 so that the destination goes into that class. */
5952 sets[i].src_elt = src_eqv_elt;
5954 invalidate_from_clobbers (x);
5956 /* Some registers are invalidated by subroutine calls. Memory is
5957 invalidated by non-constant calls. */
5959 if (GET_CODE (insn) == CALL_INSN)
5961 if (! CONST_CALL_P (insn))
5962 invalidate_memory ();
5963 invalidate_for_call ();
5966 /* Now invalidate everything set by this instruction.
5967 If a SUBREG or other funny destination is being set,
5968 sets[i].rtl is still nonzero, so here we invalidate the reg
5969 a part of which is being set. */
5971 for (i = 0; i < n_sets; i++)
5972 if (sets[i].rtl)
5974 /* We can't use the inner dest, because the mode associated with
5975 a ZERO_EXTRACT is significant. */
5976 register rtx dest = SET_DEST (sets[i].rtl);
5978 /* Needed for registers to remove the register from its
5979 previous quantity's chain.
5980 Needed for memory if this is a nonvarying address, unless
5981 we have just done an invalidate_memory that covers even those. */
5982 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5983 invalidate (dest, VOIDmode);
5984 else if (GET_CODE (dest) == MEM)
5986 /* Outgoing arguments for a libcall don't
5987 affect any recorded expressions. */
5988 if (! libcall_insn || insn == libcall_insn)
5989 invalidate (dest, VOIDmode);
5991 else if (GET_CODE (dest) == STRICT_LOW_PART
5992 || GET_CODE (dest) == ZERO_EXTRACT)
5993 invalidate (XEXP (dest, 0), GET_MODE (dest));
5996 /* A volatile ASM invalidates everything. */
5997 if (GET_CODE (insn) == INSN
5998 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5999 && MEM_VOLATILE_P (PATTERN (insn)))
6000 flush_hash_table ();
6002 /* Make sure registers mentioned in destinations
6003 are safe for use in an expression to be inserted.
6004 This removes from the hash table
6005 any invalid entry that refers to one of these registers.
6007 We don't care about the return value from mention_regs because
6008 we are going to hash the SET_DEST values unconditionally. */
6010 for (i = 0; i < n_sets; i++)
6012 if (sets[i].rtl)
6014 rtx x = SET_DEST (sets[i].rtl);
6016 if (GET_CODE (x) != REG)
6017 mention_regs (x);
6018 else
6020 /* We used to rely on all references to a register becoming
6021 inaccessible when a register changes to a new quantity,
6022 since that changes the hash code. However, that is not
6023 safe, since after HASH_SIZE new quantities we get a
6024 hash 'collision' of a register with its own invalid
6025 entries. And since SUBREGs have been changed not to
6026 change their hash code with the hash code of the register,
6027 it wouldn't work any longer at all. So we have to check
6028 for any invalid references lying around now.
6029 This code is similar to the REG case in mention_regs,
6030 but it knows that reg_tick has been incremented, and
6031 it leaves reg_in_table as -1 . */
6032 unsigned int regno = REGNO (x);
6033 unsigned int endregno
6034 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6035 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6036 unsigned int i;
6038 for (i = regno; i < endregno; i++)
6040 if (REG_IN_TABLE (i) >= 0)
6042 remove_invalid_refs (i);
6043 REG_IN_TABLE (i) = -1;
6050 /* We may have just removed some of the src_elt's from the hash table.
6051 So replace each one with the current head of the same class. */
6053 for (i = 0; i < n_sets; i++)
6054 if (sets[i].rtl)
6056 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6057 /* If elt was removed, find current head of same class,
6058 or 0 if nothing remains of that class. */
6060 register struct table_elt *elt = sets[i].src_elt;
6062 while (elt && elt->prev_same_value)
6063 elt = elt->prev_same_value;
6065 while (elt && elt->first_same_value == 0)
6066 elt = elt->next_same_value;
6067 sets[i].src_elt = elt ? elt->first_same_value : 0;
6071 /* Now insert the destinations into their equivalence classes. */
6073 for (i = 0; i < n_sets; i++)
6074 if (sets[i].rtl)
6076 register rtx dest = SET_DEST (sets[i].rtl);
6077 rtx inner_dest = sets[i].inner_dest;
6078 register struct table_elt *elt;
6080 /* Don't record value if we are not supposed to risk allocating
6081 floating-point values in registers that might be wider than
6082 memory. */
6083 if ((flag_float_store
6084 && GET_CODE (dest) == MEM
6085 && FLOAT_MODE_P (GET_MODE (dest)))
6086 /* Don't record BLKmode values, because we don't know the
6087 size of it, and can't be sure that other BLKmode values
6088 have the same or smaller size. */
6089 || GET_MODE (dest) == BLKmode
6090 /* Don't record values of destinations set inside a libcall block
6091 since we might delete the libcall. Things should have been set
6092 up so we won't want to reuse such a value, but we play it safe
6093 here. */
6094 || libcall_insn
6095 /* If we didn't put a REG_EQUAL value or a source into the hash
6096 table, there is no point is recording DEST. */
6097 || sets[i].src_elt == 0
6098 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6099 or SIGN_EXTEND, don't record DEST since it can cause
6100 some tracking to be wrong.
6102 ??? Think about this more later. */
6103 || (GET_CODE (dest) == SUBREG
6104 && (GET_MODE_SIZE (GET_MODE (dest))
6105 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6106 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6107 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6108 continue;
6110 /* STRICT_LOW_PART isn't part of the value BEING set,
6111 and neither is the SUBREG inside it.
6112 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6113 if (GET_CODE (dest) == STRICT_LOW_PART)
6114 dest = SUBREG_REG (XEXP (dest, 0));
6116 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6117 /* Registers must also be inserted into chains for quantities. */
6118 if (insert_regs (dest, sets[i].src_elt, 1))
6120 /* If `insert_regs' changes something, the hash code must be
6121 recalculated. */
6122 rehash_using_reg (dest);
6123 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6126 if (GET_CODE (inner_dest) == MEM
6127 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6128 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6129 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6130 Consider the case in which the address of the MEM is
6131 passed to a function, which alters the MEM. Then, if we
6132 later use Y instead of the MEM we'll miss the update. */
6133 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6134 else
6135 elt = insert (dest, sets[i].src_elt,
6136 sets[i].dest_hash, GET_MODE (dest));
6138 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6139 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6140 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6141 0))));
6143 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6144 narrower than M2, and both M1 and M2 are the same number of words,
6145 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6146 make that equivalence as well.
6148 However, BAR may have equivalences for which gen_lowpart_if_possible
6149 will produce a simpler value than gen_lowpart_if_possible applied to
6150 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6151 BAR's equivalences. If we don't get a simplified form, make
6152 the SUBREG. It will not be used in an equivalence, but will
6153 cause two similar assignments to be detected.
6155 Note the loop below will find SUBREG_REG (DEST) since we have
6156 already entered SRC and DEST of the SET in the table. */
6158 if (GET_CODE (dest) == SUBREG
6159 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6160 / UNITS_PER_WORD)
6161 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6162 && (GET_MODE_SIZE (GET_MODE (dest))
6163 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6164 && sets[i].src_elt != 0)
6166 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6167 struct table_elt *elt, *classp = 0;
6169 for (elt = sets[i].src_elt->first_same_value; elt;
6170 elt = elt->next_same_value)
6172 rtx new_src = 0;
6173 unsigned src_hash;
6174 struct table_elt *src_elt;
6176 /* Ignore invalid entries. */
6177 if (GET_CODE (elt->exp) != REG
6178 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6179 continue;
6181 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6182 if (new_src == 0)
6183 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6185 src_hash = HASH (new_src, new_mode);
6186 src_elt = lookup (new_src, src_hash, new_mode);
6188 /* Put the new source in the hash table is if isn't
6189 already. */
6190 if (src_elt == 0)
6192 if (insert_regs (new_src, classp, 0))
6194 rehash_using_reg (new_src);
6195 src_hash = HASH (new_src, new_mode);
6197 src_elt = insert (new_src, classp, src_hash, new_mode);
6198 src_elt->in_memory = elt->in_memory;
6200 else if (classp && classp != src_elt->first_same_value)
6201 /* Show that two things that we've seen before are
6202 actually the same. */
6203 merge_equiv_classes (src_elt, classp);
6205 classp = src_elt->first_same_value;
6206 /* Ignore invalid entries. */
6207 while (classp
6208 && GET_CODE (classp->exp) != REG
6209 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6210 classp = classp->next_same_value;
6215 /* Special handling for (set REG0 REG1) where REG0 is the
6216 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6217 be used in the sequel, so (if easily done) change this insn to
6218 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6219 that computed their value. Then REG1 will become a dead store
6220 and won't cloud the situation for later optimizations.
6222 Do not make this change if REG1 is a hard register, because it will
6223 then be used in the sequel and we may be changing a two-operand insn
6224 into a three-operand insn.
6226 Also do not do this if we are operating on a copy of INSN.
6228 Also don't do this if INSN ends a libcall; this would cause an unrelated
6229 register to be set in the middle of a libcall, and we then get bad code
6230 if the libcall is deleted. */
6232 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6233 && NEXT_INSN (PREV_INSN (insn)) == insn
6234 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6235 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6236 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6238 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6239 struct qty_table_elem *src_ent = &qty_table[src_q];
6241 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6242 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6244 rtx prev = prev_nonnote_insn (insn);
6246 /* Do not swap the registers around if the previous instruction
6247 attaches a REG_EQUIV note to REG1.
6249 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6250 from the pseudo that originally shadowed an incoming argument
6251 to another register. Some uses of REG_EQUIV might rely on it
6252 being attached to REG1 rather than REG2.
6254 This section previously turned the REG_EQUIV into a REG_EQUAL
6255 note. We cannot do that because REG_EQUIV may provide an
6256 uninitialised stack slot when REG_PARM_STACK_SPACE is used. */
6258 if (prev != 0 && GET_CODE (prev) == INSN
6259 && GET_CODE (PATTERN (prev)) == SET
6260 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6261 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6263 rtx dest = SET_DEST (sets[0].rtl);
6264 rtx src = SET_SRC (sets[0].rtl);
6265 rtx note;
6267 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6268 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6269 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6270 apply_change_group ();
6272 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6273 any REG_WAS_0 note on INSN to PREV. */
6274 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6275 if (note)
6276 remove_note (prev, note);
6278 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6279 if (note)
6281 remove_note (insn, note);
6282 XEXP (note, 1) = REG_NOTES (prev);
6283 REG_NOTES (prev) = note;
6286 /* If INSN has a REG_EQUAL note, and this note mentions
6287 REG0, then we must delete it, because the value in
6288 REG0 has changed. If the note's value is REG1, we must
6289 also delete it because that is now this insn's dest. */
6290 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6291 if (note != 0
6292 && (reg_mentioned_p (dest, XEXP (note, 0))
6293 || rtx_equal_p (src, XEXP (note, 0))))
6294 remove_note (insn, note);
6299 /* If this is a conditional jump insn, record any known equivalences due to
6300 the condition being tested. */
6302 last_jump_equiv_class = 0;
6303 if (GET_CODE (insn) == JUMP_INSN
6304 && n_sets == 1 && GET_CODE (x) == SET
6305 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6306 record_jump_equiv (insn, 0);
6308 #ifdef HAVE_cc0
6309 /* If the previous insn set CC0 and this insn no longer references CC0,
6310 delete the previous insn. Here we use the fact that nothing expects CC0
6311 to be valid over an insn, which is true until the final pass. */
6312 if (prev_insn && GET_CODE (prev_insn) == INSN
6313 && (tem = single_set (prev_insn)) != 0
6314 && SET_DEST (tem) == cc0_rtx
6315 && ! reg_mentioned_p (cc0_rtx, x))
6317 PUT_CODE (prev_insn, NOTE);
6318 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6319 NOTE_SOURCE_FILE (prev_insn) = 0;
6322 prev_insn_cc0 = this_insn_cc0;
6323 prev_insn_cc0_mode = this_insn_cc0_mode;
6324 #endif
6326 prev_insn = insn;
6329 /* Remove from the hash table all expressions that reference memory. */
6331 static void
6332 invalidate_memory ()
6334 register int i;
6335 register struct table_elt *p, *next;
6337 for (i = 0; i < HASH_SIZE; i++)
6338 for (p = table[i]; p; p = next)
6340 next = p->next_same_hash;
6341 if (p->in_memory)
6342 remove_from_table (p, i);
6346 /* If ADDR is an address that implicitly affects the stack pointer, return
6347 1 and update the register tables to show the effect. Else, return 0. */
6349 static int
6350 addr_affects_sp_p (addr)
6351 register rtx addr;
6353 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6354 && GET_CODE (XEXP (addr, 0)) == REG
6355 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6357 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6358 REG_TICK (STACK_POINTER_REGNUM)++;
6360 /* This should be *very* rare. */
6361 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6362 invalidate (stack_pointer_rtx, VOIDmode);
6364 return 1;
6367 return 0;
6370 /* Perform invalidation on the basis of everything about an insn
6371 except for invalidating the actual places that are SET in it.
6372 This includes the places CLOBBERed, and anything that might
6373 alias with something that is SET or CLOBBERed.
6375 X is the pattern of the insn. */
6377 static void
6378 invalidate_from_clobbers (x)
6379 rtx x;
6381 if (GET_CODE (x) == CLOBBER)
6383 rtx ref = XEXP (x, 0);
6384 if (ref)
6386 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6387 || GET_CODE (ref) == MEM)
6388 invalidate (ref, VOIDmode);
6389 else if (GET_CODE (ref) == STRICT_LOW_PART
6390 || GET_CODE (ref) == ZERO_EXTRACT)
6391 invalidate (XEXP (ref, 0), GET_MODE (ref));
6394 else if (GET_CODE (x) == PARALLEL)
6396 register int i;
6397 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6399 register rtx y = XVECEXP (x, 0, i);
6400 if (GET_CODE (y) == CLOBBER)
6402 rtx ref = XEXP (y, 0);
6403 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6404 || GET_CODE (ref) == MEM)
6405 invalidate (ref, VOIDmode);
6406 else if (GET_CODE (ref) == STRICT_LOW_PART
6407 || GET_CODE (ref) == ZERO_EXTRACT)
6408 invalidate (XEXP (ref, 0), GET_MODE (ref));
6414 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6415 and replace any registers in them with either an equivalent constant
6416 or the canonical form of the register. If we are inside an address,
6417 only do this if the address remains valid.
6419 OBJECT is 0 except when within a MEM in which case it is the MEM.
6421 Return the replacement for X. */
6423 static rtx
6424 cse_process_notes (x, object)
6425 rtx x;
6426 rtx object;
6428 enum rtx_code code = GET_CODE (x);
6429 const char *fmt = GET_RTX_FORMAT (code);
6430 int i;
6432 switch (code)
6434 case CONST_INT:
6435 case CONST:
6436 case SYMBOL_REF:
6437 case LABEL_REF:
6438 case CONST_DOUBLE:
6439 case PC:
6440 case CC0:
6441 case LO_SUM:
6442 return x;
6444 case MEM:
6445 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6446 return x;
6448 case EXPR_LIST:
6449 case INSN_LIST:
6450 if (REG_NOTE_KIND (x) == REG_EQUAL)
6451 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6452 if (XEXP (x, 1))
6453 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6454 return x;
6456 case SIGN_EXTEND:
6457 case ZERO_EXTEND:
6458 case SUBREG:
6460 rtx new = cse_process_notes (XEXP (x, 0), object);
6461 /* We don't substitute VOIDmode constants into these rtx,
6462 since they would impede folding. */
6463 if (GET_MODE (new) != VOIDmode)
6464 validate_change (object, &XEXP (x, 0), new, 0);
6465 return x;
6468 case REG:
6469 i = REG_QTY (REGNO (x));
6471 /* Return a constant or a constant register. */
6472 if (REGNO_QTY_VALID_P (REGNO (x)))
6474 struct qty_table_elem *ent = &qty_table[i];
6476 if (ent->const_rtx != NULL_RTX
6477 && (CONSTANT_P (ent->const_rtx)
6478 || GET_CODE (ent->const_rtx) == REG))
6480 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6481 if (new)
6482 return new;
6486 /* Otherwise, canonicalize this register. */
6487 return canon_reg (x, NULL_RTX);
6489 default:
6490 break;
6493 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6494 if (fmt[i] == 'e')
6495 validate_change (object, &XEXP (x, i),
6496 cse_process_notes (XEXP (x, i), object), 0);
6498 return x;
6501 /* Find common subexpressions between the end test of a loop and the beginning
6502 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6504 Often we have a loop where an expression in the exit test is used
6505 in the body of the loop. For example "while (*p) *q++ = *p++;".
6506 Because of the way we duplicate the loop exit test in front of the loop,
6507 however, we don't detect that common subexpression. This will be caught
6508 when global cse is implemented, but this is a quite common case.
6510 This function handles the most common cases of these common expressions.
6511 It is called after we have processed the basic block ending with the
6512 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6513 jumps to a label used only once. */
6515 static void
6516 cse_around_loop (loop_start)
6517 rtx loop_start;
6519 rtx insn;
6520 int i;
6521 struct table_elt *p;
6523 /* If the jump at the end of the loop doesn't go to the start, we don't
6524 do anything. */
6525 for (insn = PREV_INSN (loop_start);
6526 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6527 insn = PREV_INSN (insn))
6530 if (insn == 0
6531 || GET_CODE (insn) != NOTE
6532 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6533 return;
6535 /* If the last insn of the loop (the end test) was an NE comparison,
6536 we will interpret it as an EQ comparison, since we fell through
6537 the loop. Any equivalences resulting from that comparison are
6538 therefore not valid and must be invalidated. */
6539 if (last_jump_equiv_class)
6540 for (p = last_jump_equiv_class->first_same_value; p;
6541 p = p->next_same_value)
6543 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6544 || (GET_CODE (p->exp) == SUBREG
6545 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6546 invalidate (p->exp, VOIDmode);
6547 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6548 || GET_CODE (p->exp) == ZERO_EXTRACT)
6549 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6552 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6553 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6555 The only thing we do with SET_DEST is invalidate entries, so we
6556 can safely process each SET in order. It is slightly less efficient
6557 to do so, but we only want to handle the most common cases.
6559 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6560 These pseudos won't have valid entries in any of the tables indexed
6561 by register number, such as reg_qty. We avoid out-of-range array
6562 accesses by not processing any instructions created after cse started. */
6564 for (insn = NEXT_INSN (loop_start);
6565 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6566 && INSN_UID (insn) < max_insn_uid
6567 && ! (GET_CODE (insn) == NOTE
6568 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6569 insn = NEXT_INSN (insn))
6571 if (INSN_P (insn)
6572 && (GET_CODE (PATTERN (insn)) == SET
6573 || GET_CODE (PATTERN (insn)) == CLOBBER))
6574 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6575 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6576 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6577 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6578 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6579 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6580 loop_start);
6584 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6585 since they are done elsewhere. This function is called via note_stores. */
6587 static void
6588 invalidate_skipped_set (dest, set, data)
6589 rtx set;
6590 rtx dest;
6591 void *data ATTRIBUTE_UNUSED;
6593 enum rtx_code code = GET_CODE (dest);
6595 if (code == MEM
6596 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6597 /* There are times when an address can appear varying and be a PLUS
6598 during this scan when it would be a fixed address were we to know
6599 the proper equivalences. So invalidate all memory if there is
6600 a BLKmode or nonscalar memory reference or a reference to a
6601 variable address. */
6602 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6603 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6605 invalidate_memory ();
6606 return;
6609 if (GET_CODE (set) == CLOBBER
6610 #ifdef HAVE_cc0
6611 || dest == cc0_rtx
6612 #endif
6613 || dest == pc_rtx)
6614 return;
6616 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6617 invalidate (XEXP (dest, 0), GET_MODE (dest));
6618 else if (code == REG || code == SUBREG || code == MEM)
6619 invalidate (dest, VOIDmode);
6622 /* Invalidate all insns from START up to the end of the function or the
6623 next label. This called when we wish to CSE around a block that is
6624 conditionally executed. */
6626 static void
6627 invalidate_skipped_block (start)
6628 rtx start;
6630 rtx insn;
6632 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6633 insn = NEXT_INSN (insn))
6635 if (! INSN_P (insn))
6636 continue;
6638 if (GET_CODE (insn) == CALL_INSN)
6640 if (! CONST_CALL_P (insn))
6641 invalidate_memory ();
6642 invalidate_for_call ();
6645 invalidate_from_clobbers (PATTERN (insn));
6646 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6650 /* If modifying X will modify the value in *DATA (which is really an
6651 `rtx *'), indicate that fact by setting the pointed to value to
6652 NULL_RTX. */
6654 static void
6655 cse_check_loop_start (x, set, data)
6656 rtx x;
6657 rtx set ATTRIBUTE_UNUSED;
6658 void *data;
6660 rtx *cse_check_loop_start_value = (rtx *) data;
6662 if (*cse_check_loop_start_value == NULL_RTX
6663 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6664 return;
6666 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6667 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6668 *cse_check_loop_start_value = NULL_RTX;
6671 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6672 a loop that starts with the label at LOOP_START.
6674 If X is a SET, we see if its SET_SRC is currently in our hash table.
6675 If so, we see if it has a value equal to some register used only in the
6676 loop exit code (as marked by jump.c).
6678 If those two conditions are true, we search backwards from the start of
6679 the loop to see if that same value was loaded into a register that still
6680 retains its value at the start of the loop.
6682 If so, we insert an insn after the load to copy the destination of that
6683 load into the equivalent register and (try to) replace our SET_SRC with that
6684 register.
6686 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6688 static void
6689 cse_set_around_loop (x, insn, loop_start)
6690 rtx x;
6691 rtx insn;
6692 rtx loop_start;
6694 struct table_elt *src_elt;
6696 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6697 are setting PC or CC0 or whose SET_SRC is already a register. */
6698 if (GET_CODE (x) == SET
6699 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6700 && GET_CODE (SET_SRC (x)) != REG)
6702 src_elt = lookup (SET_SRC (x),
6703 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6704 GET_MODE (SET_DEST (x)));
6706 if (src_elt)
6707 for (src_elt = src_elt->first_same_value; src_elt;
6708 src_elt = src_elt->next_same_value)
6709 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6710 && COST (src_elt->exp) < COST (SET_SRC (x)))
6712 rtx p, set;
6714 /* Look for an insn in front of LOOP_START that sets
6715 something in the desired mode to SET_SRC (x) before we hit
6716 a label or CALL_INSN. */
6718 for (p = prev_nonnote_insn (loop_start);
6719 p && GET_CODE (p) != CALL_INSN
6720 && GET_CODE (p) != CODE_LABEL;
6721 p = prev_nonnote_insn (p))
6722 if ((set = single_set (p)) != 0
6723 && GET_CODE (SET_DEST (set)) == REG
6724 && GET_MODE (SET_DEST (set)) == src_elt->mode
6725 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6727 /* We now have to ensure that nothing between P
6728 and LOOP_START modified anything referenced in
6729 SET_SRC (x). We know that nothing within the loop
6730 can modify it, or we would have invalidated it in
6731 the hash table. */
6732 rtx q;
6733 rtx cse_check_loop_start_value = SET_SRC (x);
6734 for (q = p; q != loop_start; q = NEXT_INSN (q))
6735 if (INSN_P (q))
6736 note_stores (PATTERN (q),
6737 cse_check_loop_start,
6738 &cse_check_loop_start_value);
6740 /* If nothing was changed and we can replace our
6741 SET_SRC, add an insn after P to copy its destination
6742 to what we will be replacing SET_SRC with. */
6743 if (cse_check_loop_start_value
6744 && validate_change (insn, &SET_SRC (x),
6745 src_elt->exp, 0))
6747 /* If this creates new pseudos, this is unsafe,
6748 because the regno of new pseudo is unsuitable
6749 to index into reg_qty when cse_insn processes
6750 the new insn. Therefore, if a new pseudo was
6751 created, discard this optimization. */
6752 int nregs = max_reg_num ();
6753 rtx move
6754 = gen_move_insn (src_elt->exp, SET_DEST (set));
6755 if (nregs != max_reg_num ())
6757 if (! validate_change (insn, &SET_SRC (x),
6758 SET_SRC (set), 0))
6759 abort ();
6761 else
6762 emit_insn_after (move, p);
6764 break;
6769 /* Deal with the destination of X affecting the stack pointer. */
6770 addr_affects_sp_p (SET_DEST (x));
6772 /* See comment on similar code in cse_insn for explanation of these
6773 tests. */
6774 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6775 || GET_CODE (SET_DEST (x)) == MEM)
6776 invalidate (SET_DEST (x), VOIDmode);
6777 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6778 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6779 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6782 /* Find the end of INSN's basic block and return its range,
6783 the total number of SETs in all the insns of the block, the last insn of the
6784 block, and the branch path.
6786 The branch path indicates which branches should be followed. If a non-zero
6787 path size is specified, the block should be rescanned and a different set
6788 of branches will be taken. The branch path is only used if
6789 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6791 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6792 used to describe the block. It is filled in with the information about
6793 the current block. The incoming structure's branch path, if any, is used
6794 to construct the output branch path. */
6796 void
6797 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6798 rtx insn;
6799 struct cse_basic_block_data *data;
6800 int follow_jumps;
6801 int after_loop;
6802 int skip_blocks;
6804 rtx p = insn, q;
6805 int nsets = 0;
6806 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6807 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6808 int path_size = data->path_size;
6809 int path_entry = 0;
6810 int i;
6812 /* Update the previous branch path, if any. If the last branch was
6813 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6814 shorten the path by one and look at the previous branch. We know that
6815 at least one branch must have been taken if PATH_SIZE is non-zero. */
6816 while (path_size > 0)
6818 if (data->path[path_size - 1].status != NOT_TAKEN)
6820 data->path[path_size - 1].status = NOT_TAKEN;
6821 break;
6823 else
6824 path_size--;
6827 /* If the first instruction is marked with QImode, that means we've
6828 already processed this block. Our caller will look at DATA->LAST
6829 to figure out where to go next. We want to return the next block
6830 in the instruction stream, not some branched-to block somewhere
6831 else. We accomplish this by pretending our called forbid us to
6832 follow jumps, or skip blocks. */
6833 if (GET_MODE (insn) == QImode)
6834 follow_jumps = skip_blocks = 0;
6836 /* Scan to end of this basic block. */
6837 while (p && GET_CODE (p) != CODE_LABEL)
6839 /* Don't cse out the end of a loop. This makes a difference
6840 only for the unusual loops that always execute at least once;
6841 all other loops have labels there so we will stop in any case.
6842 Cse'ing out the end of the loop is dangerous because it
6843 might cause an invariant expression inside the loop
6844 to be reused after the end of the loop. This would make it
6845 hard to move the expression out of the loop in loop.c,
6846 especially if it is one of several equivalent expressions
6847 and loop.c would like to eliminate it.
6849 If we are running after loop.c has finished, we can ignore
6850 the NOTE_INSN_LOOP_END. */
6852 if (! after_loop && GET_CODE (p) == NOTE
6853 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6854 break;
6856 /* Don't cse over a call to setjmp; on some machines (eg vax)
6857 the regs restored by the longjmp come from
6858 a later time than the setjmp. */
6859 if (GET_CODE (p) == NOTE
6860 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6861 break;
6863 /* A PARALLEL can have lots of SETs in it,
6864 especially if it is really an ASM_OPERANDS. */
6865 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6866 nsets += XVECLEN (PATTERN (p), 0);
6867 else if (GET_CODE (p) != NOTE)
6868 nsets += 1;
6870 /* Ignore insns made by CSE; they cannot affect the boundaries of
6871 the basic block. */
6873 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6874 high_cuid = INSN_CUID (p);
6875 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6876 low_cuid = INSN_CUID (p);
6878 /* See if this insn is in our branch path. If it is and we are to
6879 take it, do so. */
6880 if (path_entry < path_size && data->path[path_entry].branch == p)
6882 if (data->path[path_entry].status != NOT_TAKEN)
6883 p = JUMP_LABEL (p);
6885 /* Point to next entry in path, if any. */
6886 path_entry++;
6889 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6890 was specified, we haven't reached our maximum path length, there are
6891 insns following the target of the jump, this is the only use of the
6892 jump label, and the target label is preceded by a BARRIER.
6894 Alternatively, we can follow the jump if it branches around a
6895 block of code and there are no other branches into the block.
6896 In this case invalidate_skipped_block will be called to invalidate any
6897 registers set in the block when following the jump. */
6899 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6900 && GET_CODE (p) == JUMP_INSN
6901 && GET_CODE (PATTERN (p)) == SET
6902 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6903 && JUMP_LABEL (p) != 0
6904 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6905 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6907 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6908 if ((GET_CODE (q) != NOTE
6909 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6910 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6911 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6912 break;
6914 /* If we ran into a BARRIER, this code is an extension of the
6915 basic block when the branch is taken. */
6916 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6918 /* Don't allow ourself to keep walking around an
6919 always-executed loop. */
6920 if (next_real_insn (q) == next)
6922 p = NEXT_INSN (p);
6923 continue;
6926 /* Similarly, don't put a branch in our path more than once. */
6927 for (i = 0; i < path_entry; i++)
6928 if (data->path[i].branch == p)
6929 break;
6931 if (i != path_entry)
6932 break;
6934 data->path[path_entry].branch = p;
6935 data->path[path_entry++].status = TAKEN;
6937 /* This branch now ends our path. It was possible that we
6938 didn't see this branch the last time around (when the
6939 insn in front of the target was a JUMP_INSN that was
6940 turned into a no-op). */
6941 path_size = path_entry;
6943 p = JUMP_LABEL (p);
6944 /* Mark block so we won't scan it again later. */
6945 PUT_MODE (NEXT_INSN (p), QImode);
6947 /* Detect a branch around a block of code. */
6948 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6950 register rtx tmp;
6952 if (next_real_insn (q) == next)
6954 p = NEXT_INSN (p);
6955 continue;
6958 for (i = 0; i < path_entry; i++)
6959 if (data->path[i].branch == p)
6960 break;
6962 if (i != path_entry)
6963 break;
6965 /* This is no_labels_between_p (p, q) with an added check for
6966 reaching the end of a function (in case Q precedes P). */
6967 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6968 if (GET_CODE (tmp) == CODE_LABEL)
6969 break;
6971 if (tmp == q)
6973 data->path[path_entry].branch = p;
6974 data->path[path_entry++].status = AROUND;
6976 path_size = path_entry;
6978 p = JUMP_LABEL (p);
6979 /* Mark block so we won't scan it again later. */
6980 PUT_MODE (NEXT_INSN (p), QImode);
6984 p = NEXT_INSN (p);
6987 data->low_cuid = low_cuid;
6988 data->high_cuid = high_cuid;
6989 data->nsets = nsets;
6990 data->last = p;
6992 /* If all jumps in the path are not taken, set our path length to zero
6993 so a rescan won't be done. */
6994 for (i = path_size - 1; i >= 0; i--)
6995 if (data->path[i].status != NOT_TAKEN)
6996 break;
6998 if (i == -1)
6999 data->path_size = 0;
7000 else
7001 data->path_size = path_size;
7003 /* End the current branch path. */
7004 data->path[path_size].branch = 0;
7007 /* Perform cse on the instructions of a function.
7008 F is the first instruction.
7009 NREGS is one plus the highest pseudo-reg number used in the instruction.
7011 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7012 (only if -frerun-cse-after-loop).
7014 Returns 1 if jump_optimize should be redone due to simplifications
7015 in conditional jump instructions. */
7018 cse_main (f, nregs, after_loop, file)
7019 rtx f;
7020 int nregs;
7021 int after_loop;
7022 FILE *file;
7024 struct cse_basic_block_data val;
7025 register rtx insn = f;
7026 register int i;
7028 cse_jumps_altered = 0;
7029 recorded_label_ref = 0;
7030 constant_pool_entries_cost = 0;
7031 val.path_size = 0;
7033 init_recog ();
7034 init_alias_analysis ();
7036 max_reg = nregs;
7038 max_insn_uid = get_max_uid ();
7040 reg_eqv_table = (struct reg_eqv_elem *)
7041 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7043 #ifdef LOAD_EXTEND_OP
7045 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7046 and change the code and mode as appropriate. */
7047 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7048 #endif
7050 /* Reset the counter indicating how many elements have been made
7051 thus far. */
7052 n_elements_made = 0;
7054 /* Find the largest uid. */
7056 max_uid = get_max_uid ();
7057 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7059 /* Compute the mapping from uids to cuids.
7060 CUIDs are numbers assigned to insns, like uids,
7061 except that cuids increase monotonically through the code.
7062 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7063 between two insns is not affected by -g. */
7065 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7067 if (GET_CODE (insn) != NOTE
7068 || NOTE_LINE_NUMBER (insn) < 0)
7069 INSN_CUID (insn) = ++i;
7070 else
7071 /* Give a line number note the same cuid as preceding insn. */
7072 INSN_CUID (insn) = i;
7075 /* Initialize which registers are clobbered by calls. */
7077 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7079 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7080 if ((call_used_regs[i]
7081 /* Used to check !fixed_regs[i] here, but that isn't safe;
7082 fixed regs are still call-clobbered, and sched can get
7083 confused if they can "live across calls".
7085 The frame pointer is always preserved across calls. The arg
7086 pointer is if it is fixed. The stack pointer usually is, unless
7087 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7088 will be present. If we are generating PIC code, the PIC offset
7089 table register is preserved across calls. */
7091 && i != STACK_POINTER_REGNUM
7092 && i != FRAME_POINTER_REGNUM
7093 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7094 && i != HARD_FRAME_POINTER_REGNUM
7095 #endif
7096 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7097 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7098 #endif
7099 #if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
7100 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7101 #endif
7103 || global_regs[i])
7104 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7106 ggc_push_context ();
7108 /* Loop over basic blocks.
7109 Compute the maximum number of qty's needed for each basic block
7110 (which is 2 for each SET). */
7111 insn = f;
7112 while (insn)
7114 cse_altered = 0;
7115 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7116 flag_cse_skip_blocks);
7118 /* If this basic block was already processed or has no sets, skip it. */
7119 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7121 PUT_MODE (insn, VOIDmode);
7122 insn = (val.last ? NEXT_INSN (val.last) : 0);
7123 val.path_size = 0;
7124 continue;
7127 cse_basic_block_start = val.low_cuid;
7128 cse_basic_block_end = val.high_cuid;
7129 max_qty = val.nsets * 2;
7131 if (file)
7132 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7133 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7134 val.nsets);
7136 /* Make MAX_QTY bigger to give us room to optimize
7137 past the end of this basic block, if that should prove useful. */
7138 if (max_qty < 500)
7139 max_qty = 500;
7141 max_qty += max_reg;
7143 /* If this basic block is being extended by following certain jumps,
7144 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7145 Otherwise, we start after this basic block. */
7146 if (val.path_size > 0)
7147 cse_basic_block (insn, val.last, val.path, 0);
7148 else
7150 int old_cse_jumps_altered = cse_jumps_altered;
7151 rtx temp;
7153 /* When cse changes a conditional jump to an unconditional
7154 jump, we want to reprocess the block, since it will give
7155 us a new branch path to investigate. */
7156 cse_jumps_altered = 0;
7157 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7158 if (cse_jumps_altered == 0
7159 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7160 insn = temp;
7162 cse_jumps_altered |= old_cse_jumps_altered;
7165 if (cse_altered)
7166 ggc_collect ();
7168 #ifdef USE_C_ALLOCA
7169 alloca (0);
7170 #endif
7173 ggc_pop_context ();
7175 if (max_elements_made < n_elements_made)
7176 max_elements_made = n_elements_made;
7178 /* Clean up. */
7179 end_alias_analysis ();
7180 free (uid_cuid);
7181 free (reg_eqv_table);
7183 return cse_jumps_altered || recorded_label_ref;
7186 /* Process a single basic block. FROM and TO and the limits of the basic
7187 block. NEXT_BRANCH points to the branch path when following jumps or
7188 a null path when not following jumps.
7190 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7191 loop. This is true when we are being called for the last time on a
7192 block and this CSE pass is before loop.c. */
7194 static rtx
7195 cse_basic_block (from, to, next_branch, around_loop)
7196 register rtx from, to;
7197 struct branch_path *next_branch;
7198 int around_loop;
7200 register rtx insn;
7201 int to_usage = 0;
7202 rtx libcall_insn = NULL_RTX;
7203 int num_insns = 0;
7205 /* This array is undefined before max_reg, so only allocate
7206 the space actually needed and adjust the start. */
7208 qty_table
7209 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7210 * sizeof (struct qty_table_elem));
7211 qty_table -= max_reg;
7213 new_basic_block ();
7215 /* TO might be a label. If so, protect it from being deleted. */
7216 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7217 ++LABEL_NUSES (to);
7219 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7221 register enum rtx_code code = GET_CODE (insn);
7223 /* If we have processed 1,000 insns, flush the hash table to
7224 avoid extreme quadratic behavior. We must not include NOTEs
7225 in the count since there may be more of them when generating
7226 debugging information. If we clear the table at different
7227 times, code generated with -g -O might be different than code
7228 generated with -O but not -g.
7230 ??? This is a real kludge and needs to be done some other way.
7231 Perhaps for 2.9. */
7232 if (code != NOTE && num_insns++ > 1000)
7234 flush_hash_table ();
7235 num_insns = 0;
7238 /* See if this is a branch that is part of the path. If so, and it is
7239 to be taken, do so. */
7240 if (next_branch->branch == insn)
7242 enum taken status = next_branch++->status;
7243 if (status != NOT_TAKEN)
7245 if (status == TAKEN)
7246 record_jump_equiv (insn, 1);
7247 else
7248 invalidate_skipped_block (NEXT_INSN (insn));
7250 /* Set the last insn as the jump insn; it doesn't affect cc0.
7251 Then follow this branch. */
7252 #ifdef HAVE_cc0
7253 prev_insn_cc0 = 0;
7254 #endif
7255 prev_insn = insn;
7256 insn = JUMP_LABEL (insn);
7257 continue;
7261 if (GET_MODE (insn) == QImode)
7262 PUT_MODE (insn, VOIDmode);
7264 if (GET_RTX_CLASS (code) == 'i')
7266 rtx p;
7268 /* Process notes first so we have all notes in canonical forms when
7269 looking for duplicate operations. */
7271 if (REG_NOTES (insn))
7272 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7274 /* Track when we are inside in LIBCALL block. Inside such a block,
7275 we do not want to record destinations. The last insn of a
7276 LIBCALL block is not considered to be part of the block, since
7277 its destination is the result of the block and hence should be
7278 recorded. */
7280 if (REG_NOTES (insn) != 0)
7282 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7283 libcall_insn = XEXP (p, 0);
7284 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7285 libcall_insn = 0;
7288 cse_insn (insn, libcall_insn);
7290 /* If we haven't already found an insn where we added a LABEL_REF,
7291 check this one. */
7292 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7293 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7294 (void *) insn))
7295 recorded_label_ref = 1;
7298 /* If INSN is now an unconditional jump, skip to the end of our
7299 basic block by pretending that we just did the last insn in the
7300 basic block. If we are jumping to the end of our block, show
7301 that we can have one usage of TO. */
7303 if (any_uncondjump_p (insn))
7305 if (to == 0)
7307 free (qty_table + max_reg);
7308 return 0;
7311 if (JUMP_LABEL (insn) == to)
7312 to_usage = 1;
7314 /* Maybe TO was deleted because the jump is unconditional.
7315 If so, there is nothing left in this basic block. */
7316 /* ??? Perhaps it would be smarter to set TO
7317 to whatever follows this insn,
7318 and pretend the basic block had always ended here. */
7319 if (INSN_DELETED_P (to))
7320 break;
7322 insn = PREV_INSN (to);
7325 /* See if it is ok to keep on going past the label
7326 which used to end our basic block. Remember that we incremented
7327 the count of that label, so we decrement it here. If we made
7328 a jump unconditional, TO_USAGE will be one; in that case, we don't
7329 want to count the use in that jump. */
7331 if (to != 0 && NEXT_INSN (insn) == to
7332 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7334 struct cse_basic_block_data val;
7335 rtx prev;
7337 insn = NEXT_INSN (to);
7339 /* If TO was the last insn in the function, we are done. */
7340 if (insn == 0)
7342 free (qty_table + max_reg);
7343 return 0;
7346 /* If TO was preceded by a BARRIER we are done with this block
7347 because it has no continuation. */
7348 prev = prev_nonnote_insn (to);
7349 if (prev && GET_CODE (prev) == BARRIER)
7351 free (qty_table + max_reg);
7352 return insn;
7355 /* Find the end of the following block. Note that we won't be
7356 following branches in this case. */
7357 to_usage = 0;
7358 val.path_size = 0;
7359 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7361 /* If the tables we allocated have enough space left
7362 to handle all the SETs in the next basic block,
7363 continue through it. Otherwise, return,
7364 and that block will be scanned individually. */
7365 if (val.nsets * 2 + next_qty > max_qty)
7366 break;
7368 cse_basic_block_start = val.low_cuid;
7369 cse_basic_block_end = val.high_cuid;
7370 to = val.last;
7372 /* Prevent TO from being deleted if it is a label. */
7373 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7374 ++LABEL_NUSES (to);
7376 /* Back up so we process the first insn in the extension. */
7377 insn = PREV_INSN (insn);
7381 if (next_qty > max_qty)
7382 abort ();
7384 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7385 the previous insn is the only insn that branches to the head of a loop,
7386 we can cse into the loop. Don't do this if we changed the jump
7387 structure of a loop unless we aren't going to be following jumps. */
7389 if ((cse_jumps_altered == 0
7390 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7391 && around_loop && to != 0
7392 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7393 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7394 && JUMP_LABEL (PREV_INSN (to)) != 0
7395 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7396 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7398 free (qty_table + max_reg);
7400 return to ? NEXT_INSN (to) : 0;
7403 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7404 there isn't a REG_DEAD note. Return one if so. DATA is the insn. */
7406 static int
7407 check_for_label_ref (rtl, data)
7408 rtx *rtl;
7409 void *data;
7411 rtx insn = (rtx) data;
7413 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7414 we must rerun jump since it needs to place the note. If this is a
7415 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7416 since no REG_LABEL will be added. */
7417 return (GET_CODE (*rtl) == LABEL_REF
7418 && INSN_UID (XEXP (*rtl, 0)) != 0
7419 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7422 /* Count the number of times registers are used (not set) in X.
7423 COUNTS is an array in which we accumulate the count, INCR is how much
7424 we count each register usage.
7426 Don't count a usage of DEST, which is the SET_DEST of a SET which
7427 contains X in its SET_SRC. This is because such a SET does not
7428 modify the liveness of DEST. */
7430 static void
7431 count_reg_usage (x, counts, dest, incr)
7432 rtx x;
7433 int *counts;
7434 rtx dest;
7435 int incr;
7437 enum rtx_code code;
7438 const char *fmt;
7439 int i, j;
7441 if (x == 0)
7442 return;
7444 switch (code = GET_CODE (x))
7446 case REG:
7447 if (x != dest)
7448 counts[REGNO (x)] += incr;
7449 return;
7451 case PC:
7452 case CC0:
7453 case CONST:
7454 case CONST_INT:
7455 case CONST_DOUBLE:
7456 case SYMBOL_REF:
7457 case LABEL_REF:
7458 return;
7460 case CLOBBER:
7461 /* If we are clobbering a MEM, mark any registers inside the address
7462 as being used. */
7463 if (GET_CODE (XEXP (x, 0)) == MEM)
7464 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7465 return;
7467 case SET:
7468 /* Unless we are setting a REG, count everything in SET_DEST. */
7469 if (GET_CODE (SET_DEST (x)) != REG)
7470 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7472 /* If SRC has side-effects, then we can't delete this insn, so the
7473 usage of SET_DEST inside SRC counts.
7475 ??? Strictly-speaking, we might be preserving this insn
7476 because some other SET has side-effects, but that's hard
7477 to do and can't happen now. */
7478 count_reg_usage (SET_SRC (x), counts,
7479 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7480 incr);
7481 return;
7483 case CALL_INSN:
7484 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7485 /* Fall through. */
7487 case INSN:
7488 case JUMP_INSN:
7489 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7491 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7492 use them. */
7494 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7495 return;
7497 case EXPR_LIST:
7498 case INSN_LIST:
7499 if (REG_NOTE_KIND (x) == REG_EQUAL
7500 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7501 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7502 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7503 return;
7505 default:
7506 break;
7509 fmt = GET_RTX_FORMAT (code);
7510 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7512 if (fmt[i] == 'e')
7513 count_reg_usage (XEXP (x, i), counts, dest, incr);
7514 else if (fmt[i] == 'E')
7515 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7516 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7520 /* Scan all the insns and delete any that are dead; i.e., they store a register
7521 that is never used or they copy a register to itself.
7523 This is used to remove insns made obviously dead by cse, loop or other
7524 optimizations. It improves the heuristics in loop since it won't try to
7525 move dead invariants out of loops or make givs for dead quantities. The
7526 remaining passes of the compilation are also sped up. */
7528 void
7529 delete_trivially_dead_insns (insns, nreg)
7530 rtx insns;
7531 int nreg;
7533 int *counts;
7534 rtx insn, prev;
7535 #ifdef HAVE_cc0
7536 rtx tem;
7537 #endif
7538 int i;
7539 int in_libcall = 0, dead_libcall = 0;
7541 /* First count the number of times each register is used. */
7542 counts = (int *) xcalloc (nreg, sizeof (int));
7543 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7544 count_reg_usage (insn, counts, NULL_RTX, 1);
7546 /* Go from the last insn to the first and delete insns that only set unused
7547 registers or copy a register to itself. As we delete an insn, remove
7548 usage counts for registers it uses.
7550 The first jump optimization pass may leave a real insn as the last
7551 insn in the function. We must not skip that insn or we may end
7552 up deleting code that is not really dead. */
7553 insn = get_last_insn ();
7554 if (! INSN_P (insn))
7555 insn = prev_real_insn (insn);
7557 for (; insn; insn = prev)
7559 int live_insn = 0;
7560 rtx note;
7562 prev = prev_real_insn (insn);
7564 /* Don't delete any insns that are part of a libcall block unless
7565 we can delete the whole libcall block.
7567 Flow or loop might get confused if we did that. Remember
7568 that we are scanning backwards. */
7569 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7571 in_libcall = 1;
7572 live_insn = 1;
7573 dead_libcall = 0;
7575 /* See if there's a REG_EQUAL note on this insn and try to
7576 replace the source with the REG_EQUAL expression.
7578 We assume that insns with REG_RETVALs can only be reg->reg
7579 copies at this point. */
7580 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7581 if (note)
7583 rtx set = single_set (insn);
7584 rtx new = simplify_rtx (XEXP (note, 0));
7586 if (!new)
7587 new = XEXP (note, 0);
7589 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7591 remove_note (insn,
7592 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7593 dead_libcall = 1;
7597 else if (in_libcall)
7598 live_insn = ! dead_libcall;
7599 else if (GET_CODE (PATTERN (insn)) == SET)
7601 if (set_noop_p (PATTERN (insn)))
7604 #ifdef HAVE_cc0
7605 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7606 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7607 && ((tem = next_nonnote_insn (insn)) == 0
7608 || ! INSN_P (tem)
7609 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7611 #endif
7612 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7613 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7614 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7615 || side_effects_p (SET_SRC (PATTERN (insn)))
7616 /* An ADDRESSOF expression can turn into a use of the
7617 internal arg pointer, so always consider the
7618 internal arg pointer live. If it is truly dead,
7619 flow will delete the initializing insn. */
7620 || (SET_DEST (PATTERN (insn))
7621 == current_function_internal_arg_pointer))
7622 live_insn = 1;
7624 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7625 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7627 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7629 if (GET_CODE (elt) == SET)
7631 if (set_noop_p (elt))
7634 #ifdef HAVE_cc0
7635 else if (GET_CODE (SET_DEST (elt)) == CC0
7636 && ! side_effects_p (SET_SRC (elt))
7637 && ((tem = next_nonnote_insn (insn)) == 0
7638 || ! INSN_P (tem)
7639 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7641 #endif
7642 else if (GET_CODE (SET_DEST (elt)) != REG
7643 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7644 || counts[REGNO (SET_DEST (elt))] != 0
7645 || side_effects_p (SET_SRC (elt))
7646 /* An ADDRESSOF expression can turn into a use of the
7647 internal arg pointer, so always consider the
7648 internal arg pointer live. If it is truly dead,
7649 flow will delete the initializing insn. */
7650 || (SET_DEST (elt)
7651 == current_function_internal_arg_pointer))
7652 live_insn = 1;
7654 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7655 live_insn = 1;
7657 else
7658 live_insn = 1;
7660 /* If this is a dead insn, delete it and show registers in it aren't
7661 being used. */
7663 if (! live_insn)
7665 count_reg_usage (insn, counts, NULL_RTX, -1);
7666 delete_insn (insn);
7669 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7671 in_libcall = 0;
7672 dead_libcall = 0;
7676 /* Clean up. */
7677 free (counts);