* pa.h (CPP_SPEC): Add whitespace after -D__STDC_EXT__.
[official-gcc.git] / gcc / cse.c
blob15210d85e0a8377f86836f67207f4932c114904e
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "config.h"
24 /* stdio.h must precede rtl.h for FFS. */
25 #include "system.h"
26 #include <setjmp.h>
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 unsigned int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
386 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
387 to put in the note. */
388 static int recorded_label_ref;
390 /* canon_hash stores 1 in do_not_record
391 if it notices a reference to CC0, PC, or some other volatile
392 subexpression. */
394 static int do_not_record;
396 #ifdef LOAD_EXTEND_OP
398 /* Scratch rtl used when looking for load-extended copy of a MEM. */
399 static rtx memory_extend_rtx;
400 #endif
402 /* canon_hash stores 1 in hash_arg_in_memory
403 if it notices a reference to memory within the expression being hashed. */
405 static int hash_arg_in_memory;
407 /* The hash table contains buckets which are chains of `struct table_elt's,
408 each recording one expression's information.
409 That expression is in the `exp' field.
411 The canon_exp field contains a canonical (from the point of view of
412 alias analysis) version of the `exp' field.
414 Those elements with the same hash code are chained in both directions
415 through the `next_same_hash' and `prev_same_hash' fields.
417 Each set of expressions with equivalent values
418 are on a two-way chain through the `next_same_value'
419 and `prev_same_value' fields, and all point with
420 the `first_same_value' field at the first element in
421 that chain. The chain is in order of increasing cost.
422 Each element's cost value is in its `cost' field.
424 The `in_memory' field is nonzero for elements that
425 involve any reference to memory. These elements are removed
426 whenever a write is done to an unidentified location in memory.
427 To be safe, we assume that a memory address is unidentified unless
428 the address is either a symbol constant or a constant plus
429 the frame pointer or argument pointer.
431 The `related_value' field is used to connect related expressions
432 (that differ by adding an integer).
433 The related expressions are chained in a circular fashion.
434 `related_value' is zero for expressions for which this
435 chain is not useful.
437 The `cost' field stores the cost of this element's expression.
439 The `is_const' flag is set if the element is a constant (including
440 a fixed address).
442 The `flag' field is used as a temporary during some search routines.
444 The `mode' field is usually the same as GET_MODE (`exp'), but
445 if `exp' is a CONST_INT and has no machine mode then the `mode'
446 field is the mode it was being used as. Each constant is
447 recorded separately for each mode it is used with. */
450 struct table_elt
452 rtx exp;
453 rtx canon_exp;
454 struct table_elt *next_same_hash;
455 struct table_elt *prev_same_hash;
456 struct table_elt *next_same_value;
457 struct table_elt *prev_same_value;
458 struct table_elt *first_same_value;
459 struct table_elt *related_value;
460 int cost;
461 enum machine_mode mode;
462 char in_memory;
463 char is_const;
464 char flag;
467 /* We don't want a lot of buckets, because we rarely have very many
468 things stored in the hash table, and a lot of buckets slows
469 down a lot of loops that happen frequently. */
470 #define HASH_SHIFT 5
471 #define HASH_SIZE (1 << HASH_SHIFT)
472 #define HASH_MASK (HASH_SIZE - 1)
474 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
475 register (hard registers may require `do_not_record' to be set). */
477 #define HASH(X, M) \
478 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
479 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
480 : canon_hash (X, M)) & HASH_MASK)
482 /* Determine whether register number N is considered a fixed register for CSE.
483 It is desirable to replace other regs with fixed regs, to reduce need for
484 non-fixed hard regs.
485 A reg wins if it is either the frame pointer or designated as fixed. */
486 #define FIXED_REGNO_P(N) \
487 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
488 || fixed_regs[N] || global_regs[N])
490 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
491 hard registers and pointers into the frame are the cheapest with a cost
492 of 0. Next come pseudos with a cost of one and other hard registers with
493 a cost of 2. Aside from these special cases, call `rtx_cost'. */
495 #define CHEAP_REGNO(N) \
496 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
497 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
498 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
499 || ((N) < FIRST_PSEUDO_REGISTER \
500 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
502 /* A register is cheap if it is a user variable assigned to the register
503 or if its register number always corresponds to a cheap register. */
505 #define CHEAP_REG(N) \
506 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
507 || CHEAP_REGNO (REGNO (N)))
509 #define COST(X) \
510 (GET_CODE (X) == REG \
511 ? (CHEAP_REG (X) ? 0 \
512 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
513 : 2) \
514 : notreg_cost(X))
516 /* Get the info associated with register N. */
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
522 /* Get the number of times this register has been updated in this
523 basic block. */
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
527 /* Get the point at which REG was recorded in the table. */
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
531 /* Get the quantity number for REG. */
533 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
535 /* Determine if the quantity number for register X represents a valid index
536 into the qty_table. */
538 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
540 static struct table_elt *table[HASH_SIZE];
542 /* Chain of `struct table_elt's made so far for this function
543 but currently removed from the table. */
545 static struct table_elt *free_element_chain;
547 /* Number of `struct table_elt' structures made so far for this function. */
549 static int n_elements_made;
551 /* Maximum value `n_elements_made' has had so far in this compilation
552 for functions previously processed. */
554 static int max_elements_made;
556 /* Surviving equivalence class when two equivalence classes are merged
557 by recording the effects of a jump in the last insn. Zero if the
558 last insn was not a conditional jump. */
560 static struct table_elt *last_jump_equiv_class;
562 /* Set to the cost of a constant pool reference if one was found for a
563 symbolic constant. If this was found, it means we should try to
564 convert constants into constant pool entries if they don't fit in
565 the insn. */
567 static int constant_pool_entries_cost;
569 /* Define maximum length of a branch path. */
571 #define PATHLENGTH 10
573 /* This data describes a block that will be processed by cse_basic_block. */
575 struct cse_basic_block_data
577 /* Lowest CUID value of insns in block. */
578 int low_cuid;
579 /* Highest CUID value of insns in block. */
580 int high_cuid;
581 /* Total number of SETs in block. */
582 int nsets;
583 /* Last insn in the block. */
584 rtx last;
585 /* Size of current branch path, if any. */
586 int path_size;
587 /* Current branch path, indicating which branches will be taken. */
588 struct branch_path
590 /* The branch insn. */
591 rtx branch;
592 /* Whether it should be taken or not. AROUND is the same as taken
593 except that it is used when the destination label is not preceded
594 by a BARRIER. */
595 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
596 } path[PATHLENGTH];
599 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
600 virtual regs here because the simplify_*_operation routines are called
601 by integrate.c, which is called before virtual register instantiation.
603 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
604 a header file so that their definitions can be shared with the
605 simplification routines in simplify-rtx.c. Until then, do not
606 change these macros without also changing the copy in simplify-rtx.c. */
608 #define FIXED_BASE_PLUS_P(X) \
609 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
610 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
611 || (X) == virtual_stack_vars_rtx \
612 || (X) == virtual_incoming_args_rtx \
613 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
614 && (XEXP (X, 0) == frame_pointer_rtx \
615 || XEXP (X, 0) == hard_frame_pointer_rtx \
616 || ((X) == arg_pointer_rtx \
617 && fixed_regs[ARG_POINTER_REGNUM]) \
618 || XEXP (X, 0) == virtual_stack_vars_rtx \
619 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
620 || GET_CODE (X) == ADDRESSOF)
622 /* Similar, but also allows reference to the stack pointer.
624 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
625 arg_pointer_rtx by itself is nonzero, because on at least one machine,
626 the i960, the arg pointer is zero when it is unused. */
628 #define NONZERO_BASE_PLUS_P(X) \
629 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
630 || (X) == virtual_stack_vars_rtx \
631 || (X) == virtual_incoming_args_rtx \
632 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
633 && (XEXP (X, 0) == frame_pointer_rtx \
634 || XEXP (X, 0) == hard_frame_pointer_rtx \
635 || ((X) == arg_pointer_rtx \
636 && fixed_regs[ARG_POINTER_REGNUM]) \
637 || XEXP (X, 0) == virtual_stack_vars_rtx \
638 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
639 || (X) == stack_pointer_rtx \
640 || (X) == virtual_stack_dynamic_rtx \
641 || (X) == virtual_outgoing_args_rtx \
642 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
643 && (XEXP (X, 0) == stack_pointer_rtx \
644 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
645 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
646 || GET_CODE (X) == ADDRESSOF)
648 static int notreg_cost PARAMS ((rtx));
649 static void new_basic_block PARAMS ((void));
650 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
651 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
652 static void delete_reg_equiv PARAMS ((unsigned int));
653 static int mention_regs PARAMS ((rtx));
654 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
655 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
656 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
657 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
658 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
659 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
660 enum machine_mode));
661 static void merge_equiv_classes PARAMS ((struct table_elt *,
662 struct table_elt *));
663 static void invalidate PARAMS ((rtx, enum machine_mode));
664 static int cse_rtx_varies_p PARAMS ((rtx));
665 static void remove_invalid_refs PARAMS ((unsigned int));
666 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
667 enum machine_mode));
668 static void rehash_using_reg PARAMS ((rtx));
669 static void invalidate_memory PARAMS ((void));
670 static void invalidate_for_call PARAMS ((void));
671 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
672 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
673 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
674 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
675 static rtx canon_reg PARAMS ((rtx, rtx));
676 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
677 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
678 enum machine_mode *,
679 enum machine_mode *));
680 static rtx fold_rtx PARAMS ((rtx, rtx));
681 static rtx equiv_constant PARAMS ((rtx));
682 static void record_jump_equiv PARAMS ((rtx, int));
683 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
684 rtx, rtx, int));
685 static void cse_insn PARAMS ((rtx, rtx));
686 static int addr_affects_sp_p PARAMS ((rtx));
687 static void invalidate_from_clobbers PARAMS ((rtx));
688 static rtx cse_process_notes PARAMS ((rtx, rtx));
689 static void cse_around_loop PARAMS ((rtx));
690 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
691 static void invalidate_skipped_block PARAMS ((rtx));
692 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
693 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
694 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
695 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
696 extern void dump_class PARAMS ((struct table_elt*));
697 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
698 static int check_dependence PARAMS ((rtx *, void *));
700 static void flush_hash_table PARAMS ((void));
702 /* Dump the expressions in the equivalence class indicated by CLASSP.
703 This function is used only for debugging. */
704 void
705 dump_class (classp)
706 struct table_elt *classp;
708 struct table_elt *elt;
710 fprintf (stderr, "Equivalence chain for ");
711 print_rtl (stderr, classp->exp);
712 fprintf (stderr, ": \n");
714 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
716 print_rtl (stderr, elt->exp);
717 fprintf (stderr, "\n");
721 /* Internal function, to compute cost when X is not a register; called
722 from COST macro to keep it simple. */
724 static int
725 notreg_cost (x)
726 rtx x;
728 return ((GET_CODE (x) == SUBREG
729 && GET_CODE (SUBREG_REG (x)) == REG
730 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
731 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
732 && (GET_MODE_SIZE (GET_MODE (x))
733 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
734 && subreg_lowpart_p (x)
735 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
736 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
737 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
738 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
739 : 2))
740 : rtx_cost (x, SET) * 2);
743 /* Return the right cost to give to an operation
744 to make the cost of the corresponding register-to-register instruction
745 N times that of a fast register-to-register instruction. */
747 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
749 /* Return an estimate of the cost of computing rtx X.
750 One use is in cse, to decide which expression to keep in the hash table.
751 Another is in rtl generation, to pick the cheapest way to multiply.
752 Other uses like the latter are expected in the future. */
755 rtx_cost (x, outer_code)
756 rtx x;
757 enum rtx_code outer_code ATTRIBUTE_UNUSED;
759 register int i, j;
760 register enum rtx_code code;
761 register const char *fmt;
762 register int total;
764 if (x == 0)
765 return 0;
767 /* Compute the default costs of certain things.
768 Note that RTX_COSTS can override the defaults. */
770 code = GET_CODE (x);
771 switch (code)
773 case MULT:
774 /* Count multiplication by 2**n as a shift,
775 because if we are considering it, we would output it as a shift. */
776 if (GET_CODE (XEXP (x, 1)) == CONST_INT
777 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
778 total = 2;
779 else
780 total = COSTS_N_INSNS (5);
781 break;
782 case DIV:
783 case UDIV:
784 case MOD:
785 case UMOD:
786 total = COSTS_N_INSNS (7);
787 break;
788 case USE:
789 /* Used in loop.c and combine.c as a marker. */
790 total = 0;
791 break;
792 case ASM_OPERANDS:
793 /* We don't want these to be used in substitutions because
794 we have no way of validating the resulting insn. So assign
795 anything containing an ASM_OPERANDS a very high cost. */
796 total = 1000;
797 break;
798 default:
799 total = 2;
802 switch (code)
804 case REG:
805 return ! CHEAP_REG (x);
807 case SUBREG:
808 /* If we can't tie these modes, make this expensive. The larger
809 the mode, the more expensive it is. */
810 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
811 return COSTS_N_INSNS (2
812 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
813 return 2;
814 #ifdef RTX_COSTS
815 RTX_COSTS (x, code, outer_code);
816 #endif
817 #ifdef CONST_COSTS
818 CONST_COSTS (x, code, outer_code);
819 #endif
821 default:
822 #ifdef DEFAULT_RTX_COSTS
823 DEFAULT_RTX_COSTS(x, code, outer_code);
824 #endif
825 break;
828 /* Sum the costs of the sub-rtx's, plus cost of this operation,
829 which is already in total. */
831 fmt = GET_RTX_FORMAT (code);
832 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
833 if (fmt[i] == 'e')
834 total += rtx_cost (XEXP (x, i), code);
835 else if (fmt[i] == 'E')
836 for (j = 0; j < XVECLEN (x, i); j++)
837 total += rtx_cost (XVECEXP (x, i, j), code);
839 return total;
842 /* Return cost of address expression X. Expect that X is propertly formed address
843 reference. */
845 address_cost (x, mode)
846 rtx x;
847 enum machine_mode mode;
849 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
850 during CSE, such nodes are present. Using an ADDRESSOF node which
851 refers to the address of a REG is a good thing because we can then
852 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
854 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
855 return -1;
857 /* We may be asked for cost of various unusual addresses, such as operands
858 of push instruction. It is not worthwhile to complicate writting
859 of ADDRESS_COST macro by such cases. */
861 if (!memory_address_p (mode, x))
862 return 1000;
863 #ifdef ADDRESS_COST
864 return ADDRESS_COST (x);
865 #else
866 return rtx_cost (x, MEM);
867 #endif
870 static struct cse_reg_info *
871 get_cse_reg_info (regno)
872 unsigned int regno;
874 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
875 struct cse_reg_info *p;
877 for (p = *hash_head ; p != NULL; p = p->hash_next)
878 if (p->regno == regno)
879 break;
881 if (p == NULL)
883 /* Get a new cse_reg_info structure. */
884 if (cse_reg_info_free_list)
886 p = cse_reg_info_free_list;
887 cse_reg_info_free_list = p->next;
889 else
890 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
892 /* Insert into hash table. */
893 p->hash_next = *hash_head;
894 *hash_head = p;
896 /* Initialize it. */
897 p->reg_tick = 1;
898 p->reg_in_table = -1;
899 p->reg_qty = regno;
900 p->regno = regno;
901 p->next = cse_reg_info_used_list;
902 cse_reg_info_used_list = p;
903 if (!cse_reg_info_used_list_end)
904 cse_reg_info_used_list_end = p;
907 /* Cache this lookup; we tend to be looking up information about the
908 same register several times in a row. */
909 cached_regno = regno;
910 cached_cse_reg_info = p;
912 return p;
915 /* Clear the hash table and initialize each register with its own quantity,
916 for a new basic block. */
918 static void
919 new_basic_block ()
921 register int i;
923 next_qty = max_reg;
925 /* Clear out hash table state for this pass. */
927 bzero ((char *) reg_hash, sizeof reg_hash);
929 if (cse_reg_info_used_list)
931 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
932 cse_reg_info_free_list = cse_reg_info_used_list;
933 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
935 cached_cse_reg_info = 0;
937 CLEAR_HARD_REG_SET (hard_regs_in_table);
939 /* The per-quantity values used to be initialized here, but it is
940 much faster to initialize each as it is made in `make_new_qty'. */
942 for (i = 0; i < HASH_SIZE; i++)
944 struct table_elt *first;
946 first = table[i];
947 if (first != NULL)
949 struct table_elt *last = first;
951 table[i] = NULL;
953 while (last->next_same_hash != NULL)
954 last = last->next_same_hash;
956 /* Now relink this hash entire chain into
957 the free element list. */
959 last->next_same_hash = free_element_chain;
960 free_element_chain = first;
964 prev_insn = 0;
966 #ifdef HAVE_cc0
967 prev_insn_cc0 = 0;
968 #endif
971 /* Say that register REG contains a quantity in mode MODE not in any
972 register before and initialize that quantity. */
974 static void
975 make_new_qty (reg, mode)
976 unsigned int reg;
977 enum machine_mode mode;
979 register int q;
980 register struct qty_table_elem *ent;
981 register struct reg_eqv_elem *eqv;
983 if (next_qty >= max_qty)
984 abort ();
986 q = REG_QTY (reg) = next_qty++;
987 ent = &qty_table[q];
988 ent->first_reg = reg;
989 ent->last_reg = reg;
990 ent->mode = mode;
991 ent->const_rtx = ent->const_insn = NULL_RTX;
992 ent->comparison_code = UNKNOWN;
994 eqv = &reg_eqv_table[reg];
995 eqv->next = eqv->prev = -1;
998 /* Make reg NEW equivalent to reg OLD.
999 OLD is not changing; NEW is. */
1001 static void
1002 make_regs_eqv (new, old)
1003 unsigned int new, old;
1005 unsigned int lastr, firstr;
1006 int q = REG_QTY (old);
1007 struct qty_table_elem *ent;
1009 ent = &qty_table[q];
1011 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1012 if (! REGNO_QTY_VALID_P (old))
1013 abort ();
1015 REG_QTY (new) = q;
1016 firstr = ent->first_reg;
1017 lastr = ent->last_reg;
1019 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1020 hard regs. Among pseudos, if NEW will live longer than any other reg
1021 of the same qty, and that is beyond the current basic block,
1022 make it the new canonical replacement for this qty. */
1023 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1024 /* Certain fixed registers might be of the class NO_REGS. This means
1025 that not only can they not be allocated by the compiler, but
1026 they cannot be used in substitutions or canonicalizations
1027 either. */
1028 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1029 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1030 || (new >= FIRST_PSEUDO_REGISTER
1031 && (firstr < FIRST_PSEUDO_REGISTER
1032 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1033 || (uid_cuid[REGNO_FIRST_UID (new)]
1034 < cse_basic_block_start))
1035 && (uid_cuid[REGNO_LAST_UID (new)]
1036 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1038 reg_eqv_table[firstr].prev = new;
1039 reg_eqv_table[new].next = firstr;
1040 reg_eqv_table[new].prev = -1;
1041 ent->first_reg = new;
1043 else
1045 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1046 Otherwise, insert before any non-fixed hard regs that are at the
1047 end. Registers of class NO_REGS cannot be used as an
1048 equivalent for anything. */
1049 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1050 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1051 && new >= FIRST_PSEUDO_REGISTER)
1052 lastr = reg_eqv_table[lastr].prev;
1053 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1054 if (reg_eqv_table[lastr].next >= 0)
1055 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1056 else
1057 qty_table[q].last_reg = new;
1058 reg_eqv_table[lastr].next = new;
1059 reg_eqv_table[new].prev = lastr;
1063 /* Remove REG from its equivalence class. */
1065 static void
1066 delete_reg_equiv (reg)
1067 unsigned int reg;
1069 register struct qty_table_elem *ent;
1070 register int q = REG_QTY (reg);
1071 register int p, n;
1073 /* If invalid, do nothing. */
1074 if (q == (int) reg)
1075 return;
1077 ent = &qty_table[q];
1079 p = reg_eqv_table[reg].prev;
1080 n = reg_eqv_table[reg].next;
1082 if (n != -1)
1083 reg_eqv_table[n].prev = p;
1084 else
1085 ent->last_reg = p;
1086 if (p != -1)
1087 reg_eqv_table[p].next = n;
1088 else
1089 ent->first_reg = n;
1091 REG_QTY (reg) = reg;
1094 /* Remove any invalid expressions from the hash table
1095 that refer to any of the registers contained in expression X.
1097 Make sure that newly inserted references to those registers
1098 as subexpressions will be considered valid.
1100 mention_regs is not called when a register itself
1101 is being stored in the table.
1103 Return 1 if we have done something that may have changed the hash code
1104 of X. */
1106 static int
1107 mention_regs (x)
1108 rtx x;
1110 register enum rtx_code code;
1111 register int i, j;
1112 register const char *fmt;
1113 register int changed = 0;
1115 if (x == 0)
1116 return 0;
1118 code = GET_CODE (x);
1119 if (code == REG)
1121 unsigned int regno = REGNO (x);
1122 unsigned int endregno
1123 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1124 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1125 unsigned int i;
1127 for (i = regno; i < endregno; i++)
1129 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1130 remove_invalid_refs (i);
1132 REG_IN_TABLE (i) = REG_TICK (i);
1135 return 0;
1138 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1139 pseudo if they don't use overlapping words. We handle only pseudos
1140 here for simplicity. */
1141 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1142 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1144 unsigned int i = REGNO (SUBREG_REG (x));
1146 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1148 /* If reg_tick has been incremented more than once since
1149 reg_in_table was last set, that means that the entire
1150 register has been set before, so discard anything memorized
1151 for the entrire register, including all SUBREG expressions. */
1152 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1153 remove_invalid_refs (i);
1154 else
1155 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1158 REG_IN_TABLE (i) = REG_TICK (i);
1159 return 0;
1162 /* If X is a comparison or a COMPARE and either operand is a register
1163 that does not have a quantity, give it one. This is so that a later
1164 call to record_jump_equiv won't cause X to be assigned a different
1165 hash code and not found in the table after that call.
1167 It is not necessary to do this here, since rehash_using_reg can
1168 fix up the table later, but doing this here eliminates the need to
1169 call that expensive function in the most common case where the only
1170 use of the register is in the comparison. */
1172 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1174 if (GET_CODE (XEXP (x, 0)) == REG
1175 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1176 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1178 rehash_using_reg (XEXP (x, 0));
1179 changed = 1;
1182 if (GET_CODE (XEXP (x, 1)) == REG
1183 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1184 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1186 rehash_using_reg (XEXP (x, 1));
1187 changed = 1;
1191 fmt = GET_RTX_FORMAT (code);
1192 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1193 if (fmt[i] == 'e')
1194 changed |= mention_regs (XEXP (x, i));
1195 else if (fmt[i] == 'E')
1196 for (j = 0; j < XVECLEN (x, i); j++)
1197 changed |= mention_regs (XVECEXP (x, i, j));
1199 return changed;
1202 /* Update the register quantities for inserting X into the hash table
1203 with a value equivalent to CLASSP.
1204 (If the class does not contain a REG, it is irrelevant.)
1205 If MODIFIED is nonzero, X is a destination; it is being modified.
1206 Note that delete_reg_equiv should be called on a register
1207 before insert_regs is done on that register with MODIFIED != 0.
1209 Nonzero value means that elements of reg_qty have changed
1210 so X's hash code may be different. */
1212 static int
1213 insert_regs (x, classp, modified)
1214 rtx x;
1215 struct table_elt *classp;
1216 int modified;
1218 if (GET_CODE (x) == REG)
1220 unsigned int regno = REGNO (x);
1221 int qty_valid;
1223 /* If REGNO is in the equivalence table already but is of the
1224 wrong mode for that equivalence, don't do anything here. */
1226 qty_valid = REGNO_QTY_VALID_P (regno);
1227 if (qty_valid)
1229 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1231 if (ent->mode != GET_MODE (x))
1232 return 0;
1235 if (modified || ! qty_valid)
1237 if (classp)
1238 for (classp = classp->first_same_value;
1239 classp != 0;
1240 classp = classp->next_same_value)
1241 if (GET_CODE (classp->exp) == REG
1242 && GET_MODE (classp->exp) == GET_MODE (x))
1244 make_regs_eqv (regno, REGNO (classp->exp));
1245 return 1;
1248 make_new_qty (regno, GET_MODE (x));
1249 return 1;
1252 return 0;
1255 /* If X is a SUBREG, we will likely be inserting the inner register in the
1256 table. If that register doesn't have an assigned quantity number at
1257 this point but does later, the insertion that we will be doing now will
1258 not be accessible because its hash code will have changed. So assign
1259 a quantity number now. */
1261 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1262 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1264 unsigned int regno = REGNO (SUBREG_REG (x));
1266 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1267 /* Mention_regs checks if REG_TICK is exactly one larger than
1268 REG_IN_TABLE to find out if there was only a single preceding
1269 invalidation - for the SUBREG - or another one, which would be
1270 for the full register. Since we don't invalidate the SUBREG
1271 here first, we might have to bump up REG_TICK so that mention_regs
1272 will do the right thing. */
1273 if (REG_IN_TABLE (regno) >= 0
1274 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1275 REG_TICK (regno)++;
1276 mention_regs (x);
1277 return 1;
1279 else
1280 return mention_regs (x);
1283 /* Look in or update the hash table. */
1285 /* Remove table element ELT from use in the table.
1286 HASH is its hash code, made using the HASH macro.
1287 It's an argument because often that is known in advance
1288 and we save much time not recomputing it. */
1290 static void
1291 remove_from_table (elt, hash)
1292 register struct table_elt *elt;
1293 unsigned hash;
1295 if (elt == 0)
1296 return;
1298 /* Mark this element as removed. See cse_insn. */
1299 elt->first_same_value = 0;
1301 /* Remove the table element from its equivalence class. */
1304 register struct table_elt *prev = elt->prev_same_value;
1305 register struct table_elt *next = elt->next_same_value;
1307 if (next) next->prev_same_value = prev;
1309 if (prev)
1310 prev->next_same_value = next;
1311 else
1313 register struct table_elt *newfirst = next;
1314 while (next)
1316 next->first_same_value = newfirst;
1317 next = next->next_same_value;
1322 /* Remove the table element from its hash bucket. */
1325 register struct table_elt *prev = elt->prev_same_hash;
1326 register struct table_elt *next = elt->next_same_hash;
1328 if (next) next->prev_same_hash = prev;
1330 if (prev)
1331 prev->next_same_hash = next;
1332 else if (table[hash] == elt)
1333 table[hash] = next;
1334 else
1336 /* This entry is not in the proper hash bucket. This can happen
1337 when two classes were merged by `merge_equiv_classes'. Search
1338 for the hash bucket that it heads. This happens only very
1339 rarely, so the cost is acceptable. */
1340 for (hash = 0; hash < HASH_SIZE; hash++)
1341 if (table[hash] == elt)
1342 table[hash] = next;
1346 /* Remove the table element from its related-value circular chain. */
1348 if (elt->related_value != 0 && elt->related_value != elt)
1350 register struct table_elt *p = elt->related_value;
1352 while (p->related_value != elt)
1353 p = p->related_value;
1354 p->related_value = elt->related_value;
1355 if (p->related_value == p)
1356 p->related_value = 0;
1359 /* Now add it to the free element chain. */
1360 elt->next_same_hash = free_element_chain;
1361 free_element_chain = elt;
1364 /* Look up X in the hash table and return its table element,
1365 or 0 if X is not in the table.
1367 MODE is the machine-mode of X, or if X is an integer constant
1368 with VOIDmode then MODE is the mode with which X will be used.
1370 Here we are satisfied to find an expression whose tree structure
1371 looks like X. */
1373 static struct table_elt *
1374 lookup (x, hash, mode)
1375 rtx x;
1376 unsigned hash;
1377 enum machine_mode mode;
1379 register struct table_elt *p;
1381 for (p = table[hash]; p; p = p->next_same_hash)
1382 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1383 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1384 return p;
1386 return 0;
1389 /* Like `lookup' but don't care whether the table element uses invalid regs.
1390 Also ignore discrepancies in the machine mode of a register. */
1392 static struct table_elt *
1393 lookup_for_remove (x, hash, mode)
1394 rtx x;
1395 unsigned hash;
1396 enum machine_mode mode;
1398 register struct table_elt *p;
1400 if (GET_CODE (x) == REG)
1402 unsigned int regno = REGNO (x);
1404 /* Don't check the machine mode when comparing registers;
1405 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1406 for (p = table[hash]; p; p = p->next_same_hash)
1407 if (GET_CODE (p->exp) == REG
1408 && REGNO (p->exp) == regno)
1409 return p;
1411 else
1413 for (p = table[hash]; p; p = p->next_same_hash)
1414 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1415 return p;
1418 return 0;
1421 /* Look for an expression equivalent to X and with code CODE.
1422 If one is found, return that expression. */
1424 static rtx
1425 lookup_as_function (x, code)
1426 rtx x;
1427 enum rtx_code code;
1429 register struct table_elt *p
1430 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1432 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1433 long as we are narrowing. So if we looked in vain for a mode narrower
1434 than word_mode before, look for word_mode now. */
1435 if (p == 0 && code == CONST_INT
1436 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1438 x = copy_rtx (x);
1439 PUT_MODE (x, word_mode);
1440 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1443 if (p == 0)
1444 return 0;
1446 for (p = p->first_same_value; p; p = p->next_same_value)
1447 if (GET_CODE (p->exp) == code
1448 /* Make sure this is a valid entry in the table. */
1449 && exp_equiv_p (p->exp, p->exp, 1, 0))
1450 return p->exp;
1452 return 0;
1455 /* Insert X in the hash table, assuming HASH is its hash code
1456 and CLASSP is an element of the class it should go in
1457 (or 0 if a new class should be made).
1458 It is inserted at the proper position to keep the class in
1459 the order cheapest first.
1461 MODE is the machine-mode of X, or if X is an integer constant
1462 with VOIDmode then MODE is the mode with which X will be used.
1464 For elements of equal cheapness, the most recent one
1465 goes in front, except that the first element in the list
1466 remains first unless a cheaper element is added. The order of
1467 pseudo-registers does not matter, as canon_reg will be called to
1468 find the cheapest when a register is retrieved from the table.
1470 The in_memory field in the hash table element is set to 0.
1471 The caller must set it nonzero if appropriate.
1473 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1474 and if insert_regs returns a nonzero value
1475 you must then recompute its hash code before calling here.
1477 If necessary, update table showing constant values of quantities. */
1479 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1481 static struct table_elt *
1482 insert (x, classp, hash, mode)
1483 register rtx x;
1484 register struct table_elt *classp;
1485 unsigned hash;
1486 enum machine_mode mode;
1488 register struct table_elt *elt;
1490 /* If X is a register and we haven't made a quantity for it,
1491 something is wrong. */
1492 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1493 abort ();
1495 /* If X is a hard register, show it is being put in the table. */
1496 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1498 unsigned int regno = REGNO (x);
1499 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1500 unsigned int i;
1502 for (i = regno; i < endregno; i++)
1503 SET_HARD_REG_BIT (hard_regs_in_table, i);
1506 /* If X is a label, show we recorded it. */
1507 if (GET_CODE (x) == LABEL_REF
1508 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1509 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1510 recorded_label_ref = 1;
1512 /* Put an element for X into the right hash bucket. */
1514 elt = free_element_chain;
1515 if (elt)
1516 free_element_chain = elt->next_same_hash;
1517 else
1519 n_elements_made++;
1520 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1523 elt->exp = x;
1524 elt->canon_exp = NULL_RTX;
1525 elt->cost = COST (x);
1526 elt->next_same_value = 0;
1527 elt->prev_same_value = 0;
1528 elt->next_same_hash = table[hash];
1529 elt->prev_same_hash = 0;
1530 elt->related_value = 0;
1531 elt->in_memory = 0;
1532 elt->mode = mode;
1533 elt->is_const = (CONSTANT_P (x)
1534 /* GNU C++ takes advantage of this for `this'
1535 (and other const values). */
1536 || (RTX_UNCHANGING_P (x)
1537 && GET_CODE (x) == REG
1538 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1539 || FIXED_BASE_PLUS_P (x));
1541 if (table[hash])
1542 table[hash]->prev_same_hash = elt;
1543 table[hash] = elt;
1545 /* Put it into the proper value-class. */
1546 if (classp)
1548 classp = classp->first_same_value;
1549 if (CHEAPER (elt, classp))
1550 /* Insert at the head of the class */
1552 register struct table_elt *p;
1553 elt->next_same_value = classp;
1554 classp->prev_same_value = elt;
1555 elt->first_same_value = elt;
1557 for (p = classp; p; p = p->next_same_value)
1558 p->first_same_value = elt;
1560 else
1562 /* Insert not at head of the class. */
1563 /* Put it after the last element cheaper than X. */
1564 register struct table_elt *p, *next;
1566 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1567 p = next);
1569 /* Put it after P and before NEXT. */
1570 elt->next_same_value = next;
1571 if (next)
1572 next->prev_same_value = elt;
1574 elt->prev_same_value = p;
1575 p->next_same_value = elt;
1576 elt->first_same_value = classp;
1579 else
1580 elt->first_same_value = elt;
1582 /* If this is a constant being set equivalent to a register or a register
1583 being set equivalent to a constant, note the constant equivalence.
1585 If this is a constant, it cannot be equivalent to a different constant,
1586 and a constant is the only thing that can be cheaper than a register. So
1587 we know the register is the head of the class (before the constant was
1588 inserted).
1590 If this is a register that is not already known equivalent to a
1591 constant, we must check the entire class.
1593 If this is a register that is already known equivalent to an insn,
1594 update the qtys `const_insn' to show that `this_insn' is the latest
1595 insn making that quantity equivalent to the constant. */
1597 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1598 && GET_CODE (x) != REG)
1600 int exp_q = REG_QTY (REGNO (classp->exp));
1601 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1603 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1604 exp_ent->const_insn = this_insn;
1607 else if (GET_CODE (x) == REG
1608 && classp
1609 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1610 && ! elt->is_const)
1612 register struct table_elt *p;
1614 for (p = classp; p != 0; p = p->next_same_value)
1616 if (p->is_const && GET_CODE (p->exp) != REG)
1618 int x_q = REG_QTY (REGNO (x));
1619 struct qty_table_elem *x_ent = &qty_table[x_q];
1621 x_ent->const_rtx
1622 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1623 x_ent->const_insn = this_insn;
1624 break;
1629 else if (GET_CODE (x) == REG
1630 && qty_table[REG_QTY (REGNO (x))].const_rtx
1631 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1632 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1634 /* If this is a constant with symbolic value,
1635 and it has a term with an explicit integer value,
1636 link it up with related expressions. */
1637 if (GET_CODE (x) == CONST)
1639 rtx subexp = get_related_value (x);
1640 unsigned subhash;
1641 struct table_elt *subelt, *subelt_prev;
1643 if (subexp != 0)
1645 /* Get the integer-free subexpression in the hash table. */
1646 subhash = safe_hash (subexp, mode) & HASH_MASK;
1647 subelt = lookup (subexp, subhash, mode);
1648 if (subelt == 0)
1649 subelt = insert (subexp, NULL_PTR, subhash, mode);
1650 /* Initialize SUBELT's circular chain if it has none. */
1651 if (subelt->related_value == 0)
1652 subelt->related_value = subelt;
1653 /* Find the element in the circular chain that precedes SUBELT. */
1654 subelt_prev = subelt;
1655 while (subelt_prev->related_value != subelt)
1656 subelt_prev = subelt_prev->related_value;
1657 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1658 This way the element that follows SUBELT is the oldest one. */
1659 elt->related_value = subelt_prev->related_value;
1660 subelt_prev->related_value = elt;
1664 return elt;
1667 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1668 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1669 the two classes equivalent.
1671 CLASS1 will be the surviving class; CLASS2 should not be used after this
1672 call.
1674 Any invalid entries in CLASS2 will not be copied. */
1676 static void
1677 merge_equiv_classes (class1, class2)
1678 struct table_elt *class1, *class2;
1680 struct table_elt *elt, *next, *new;
1682 /* Ensure we start with the head of the classes. */
1683 class1 = class1->first_same_value;
1684 class2 = class2->first_same_value;
1686 /* If they were already equal, forget it. */
1687 if (class1 == class2)
1688 return;
1690 for (elt = class2; elt; elt = next)
1692 unsigned int hash;
1693 rtx exp = elt->exp;
1694 enum machine_mode mode = elt->mode;
1696 next = elt->next_same_value;
1698 /* Remove old entry, make a new one in CLASS1's class.
1699 Don't do this for invalid entries as we cannot find their
1700 hash code (it also isn't necessary). */
1701 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1703 hash_arg_in_memory = 0;
1704 hash = HASH (exp, mode);
1706 if (GET_CODE (exp) == REG)
1707 delete_reg_equiv (REGNO (exp));
1709 remove_from_table (elt, hash);
1711 if (insert_regs (exp, class1, 0))
1713 rehash_using_reg (exp);
1714 hash = HASH (exp, mode);
1716 new = insert (exp, class1, hash, mode);
1717 new->in_memory = hash_arg_in_memory;
1723 /* Flush the entire hash table. */
1725 static void
1726 flush_hash_table ()
1728 int i;
1729 struct table_elt *p;
1731 for (i = 0; i < HASH_SIZE; i++)
1732 for (p = table[i]; p; p = table[i])
1734 /* Note that invalidate can remove elements
1735 after P in the current hash chain. */
1736 if (GET_CODE (p->exp) == REG)
1737 invalidate (p->exp, p->mode);
1738 else
1739 remove_from_table (p, i);
1743 /* Function called for each rtx to check whether true dependence exist. */
1744 struct check_dependence_data
1746 enum machine_mode mode;
1747 rtx exp;
1749 static int
1750 check_dependence (x, data)
1751 rtx *x;
1752 void *data;
1754 struct check_dependence_data *d = (struct check_dependence_data *) data;
1755 if (*x && GET_CODE (*x) == MEM)
1756 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1757 else
1758 return 0;
1761 /* Remove from the hash table, or mark as invalid, all expressions whose
1762 values could be altered by storing in X. X is a register, a subreg, or
1763 a memory reference with nonvarying address (because, when a memory
1764 reference with a varying address is stored in, all memory references are
1765 removed by invalidate_memory so specific invalidation is superfluous).
1766 FULL_MODE, if not VOIDmode, indicates that this much should be
1767 invalidated instead of just the amount indicated by the mode of X. This
1768 is only used for bitfield stores into memory.
1770 A nonvarying address may be just a register or just a symbol reference,
1771 or it may be either of those plus a numeric offset. */
1773 static void
1774 invalidate (x, full_mode)
1775 rtx x;
1776 enum machine_mode full_mode;
1778 register int i;
1779 register struct table_elt *p;
1781 switch (GET_CODE (x))
1783 case REG:
1785 /* If X is a register, dependencies on its contents are recorded
1786 through the qty number mechanism. Just change the qty number of
1787 the register, mark it as invalid for expressions that refer to it,
1788 and remove it itself. */
1789 unsigned int regno = REGNO (x);
1790 unsigned int hash = HASH (x, GET_MODE (x));
1792 /* Remove REGNO from any quantity list it might be on and indicate
1793 that its value might have changed. If it is a pseudo, remove its
1794 entry from the hash table.
1796 For a hard register, we do the first two actions above for any
1797 additional hard registers corresponding to X. Then, if any of these
1798 registers are in the table, we must remove any REG entries that
1799 overlap these registers. */
1801 delete_reg_equiv (regno);
1802 REG_TICK (regno)++;
1804 if (regno >= FIRST_PSEUDO_REGISTER)
1806 /* Because a register can be referenced in more than one mode,
1807 we might have to remove more than one table entry. */
1808 struct table_elt *elt;
1810 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1811 remove_from_table (elt, hash);
1813 else
1815 HOST_WIDE_INT in_table
1816 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1817 unsigned int endregno
1818 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1819 unsigned int tregno, tendregno, rn;
1820 register struct table_elt *p, *next;
1822 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1824 for (rn = regno + 1; rn < endregno; rn++)
1826 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1827 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1828 delete_reg_equiv (rn);
1829 REG_TICK (rn)++;
1832 if (in_table)
1833 for (hash = 0; hash < HASH_SIZE; hash++)
1834 for (p = table[hash]; p; p = next)
1836 next = p->next_same_hash;
1838 if (GET_CODE (p->exp) != REG
1839 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1840 continue;
1842 tregno = REGNO (p->exp);
1843 tendregno
1844 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1845 if (tendregno > regno && tregno < endregno)
1846 remove_from_table (p, hash);
1850 return;
1852 case SUBREG:
1853 invalidate (SUBREG_REG (x), VOIDmode);
1854 return;
1856 case PARALLEL:
1857 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1858 invalidate (XVECEXP (x, 0, i), VOIDmode);
1859 return;
1861 case EXPR_LIST:
1862 /* This is part of a disjoint return value; extract the location in
1863 question ignoring the offset. */
1864 invalidate (XEXP (x, 0), VOIDmode);
1865 return;
1867 case MEM:
1868 /* Calculate the canonical version of X here so that
1869 true_dependence doesn't generate new RTL for X on each call. */
1870 x = canon_rtx (x);
1872 /* Remove all hash table elements that refer to overlapping pieces of
1873 memory. */
1874 if (full_mode == VOIDmode)
1875 full_mode = GET_MODE (x);
1877 for (i = 0; i < HASH_SIZE; i++)
1879 register struct table_elt *next;
1881 for (p = table[i]; p; p = next)
1883 next = p->next_same_hash;
1884 if (p->in_memory)
1886 struct check_dependence_data d;
1888 /* Just canonicalize the expression once;
1889 otherwise each time we call invalidate
1890 true_dependence will canonicalize the
1891 expression again. */
1892 if (!p->canon_exp)
1893 p->canon_exp = canon_rtx (p->exp);
1894 d.exp = x;
1895 d.mode = full_mode;
1896 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1897 remove_from_table (p, i);
1901 return;
1903 default:
1904 abort ();
1908 /* Remove all expressions that refer to register REGNO,
1909 since they are already invalid, and we are about to
1910 mark that register valid again and don't want the old
1911 expressions to reappear as valid. */
1913 static void
1914 remove_invalid_refs (regno)
1915 unsigned int regno;
1917 unsigned int i;
1918 struct table_elt *p, *next;
1920 for (i = 0; i < HASH_SIZE; i++)
1921 for (p = table[i]; p; p = next)
1923 next = p->next_same_hash;
1924 if (GET_CODE (p->exp) != REG
1925 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1926 remove_from_table (p, i);
1930 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1931 static void
1932 remove_invalid_subreg_refs (regno, word, mode)
1933 unsigned int regno;
1934 unsigned int word;
1935 enum machine_mode mode;
1937 unsigned int i;
1938 struct table_elt *p, *next;
1939 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1941 for (i = 0; i < HASH_SIZE; i++)
1942 for (p = table[i]; p; p = next)
1944 rtx exp;
1945 next = p->next_same_hash;
1947 exp = p->exp;
1948 if (GET_CODE (p->exp) != REG
1949 && (GET_CODE (exp) != SUBREG
1950 || GET_CODE (SUBREG_REG (exp)) != REG
1951 || REGNO (SUBREG_REG (exp)) != regno
1952 || (((SUBREG_WORD (exp)
1953 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1954 >= word)
1955 && SUBREG_WORD (exp) <= end))
1956 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1957 remove_from_table (p, i);
1961 /* Recompute the hash codes of any valid entries in the hash table that
1962 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1964 This is called when we make a jump equivalence. */
1966 static void
1967 rehash_using_reg (x)
1968 rtx x;
1970 unsigned int i;
1971 struct table_elt *p, *next;
1972 unsigned hash;
1974 if (GET_CODE (x) == SUBREG)
1975 x = SUBREG_REG (x);
1977 /* If X is not a register or if the register is known not to be in any
1978 valid entries in the table, we have no work to do. */
1980 if (GET_CODE (x) != REG
1981 || REG_IN_TABLE (REGNO (x)) < 0
1982 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1983 return;
1985 /* Scan all hash chains looking for valid entries that mention X.
1986 If we find one and it is in the wrong hash chain, move it. We can skip
1987 objects that are registers, since they are handled specially. */
1989 for (i = 0; i < HASH_SIZE; i++)
1990 for (p = table[i]; p; p = next)
1992 next = p->next_same_hash;
1993 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1994 && exp_equiv_p (p->exp, p->exp, 1, 0)
1995 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1997 if (p->next_same_hash)
1998 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2000 if (p->prev_same_hash)
2001 p->prev_same_hash->next_same_hash = p->next_same_hash;
2002 else
2003 table[i] = p->next_same_hash;
2005 p->next_same_hash = table[hash];
2006 p->prev_same_hash = 0;
2007 if (table[hash])
2008 table[hash]->prev_same_hash = p;
2009 table[hash] = p;
2014 /* Remove from the hash table any expression that is a call-clobbered
2015 register. Also update their TICK values. */
2017 static void
2018 invalidate_for_call ()
2020 unsigned int regno, endregno;
2021 unsigned int i;
2022 unsigned hash;
2023 struct table_elt *p, *next;
2024 int in_table = 0;
2026 /* Go through all the hard registers. For each that is clobbered in
2027 a CALL_INSN, remove the register from quantity chains and update
2028 reg_tick if defined. Also see if any of these registers is currently
2029 in the table. */
2031 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2032 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2034 delete_reg_equiv (regno);
2035 if (REG_TICK (regno) >= 0)
2036 REG_TICK (regno)++;
2038 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2041 /* In the case where we have no call-clobbered hard registers in the
2042 table, we are done. Otherwise, scan the table and remove any
2043 entry that overlaps a call-clobbered register. */
2045 if (in_table)
2046 for (hash = 0; hash < HASH_SIZE; hash++)
2047 for (p = table[hash]; p; p = next)
2049 next = p->next_same_hash;
2051 if (GET_CODE (p->exp) != REG
2052 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2053 continue;
2055 regno = REGNO (p->exp);
2056 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2058 for (i = regno; i < endregno; i++)
2059 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2061 remove_from_table (p, hash);
2062 break;
2067 /* Given an expression X of type CONST,
2068 and ELT which is its table entry (or 0 if it
2069 is not in the hash table),
2070 return an alternate expression for X as a register plus integer.
2071 If none can be found, return 0. */
2073 static rtx
2074 use_related_value (x, elt)
2075 rtx x;
2076 struct table_elt *elt;
2078 register struct table_elt *relt = 0;
2079 register struct table_elt *p, *q;
2080 HOST_WIDE_INT offset;
2082 /* First, is there anything related known?
2083 If we have a table element, we can tell from that.
2084 Otherwise, must look it up. */
2086 if (elt != 0 && elt->related_value != 0)
2087 relt = elt;
2088 else if (elt == 0 && GET_CODE (x) == CONST)
2090 rtx subexp = get_related_value (x);
2091 if (subexp != 0)
2092 relt = lookup (subexp,
2093 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2094 GET_MODE (subexp));
2097 if (relt == 0)
2098 return 0;
2100 /* Search all related table entries for one that has an
2101 equivalent register. */
2103 p = relt;
2104 while (1)
2106 /* This loop is strange in that it is executed in two different cases.
2107 The first is when X is already in the table. Then it is searching
2108 the RELATED_VALUE list of X's class (RELT). The second case is when
2109 X is not in the table. Then RELT points to a class for the related
2110 value.
2112 Ensure that, whatever case we are in, that we ignore classes that have
2113 the same value as X. */
2115 if (rtx_equal_p (x, p->exp))
2116 q = 0;
2117 else
2118 for (q = p->first_same_value; q; q = q->next_same_value)
2119 if (GET_CODE (q->exp) == REG)
2120 break;
2122 if (q)
2123 break;
2125 p = p->related_value;
2127 /* We went all the way around, so there is nothing to be found.
2128 Alternatively, perhaps RELT was in the table for some other reason
2129 and it has no related values recorded. */
2130 if (p == relt || p == 0)
2131 break;
2134 if (q == 0)
2135 return 0;
2137 offset = (get_integer_term (x) - get_integer_term (p->exp));
2138 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2139 return plus_constant (q->exp, offset);
2142 /* Hash an rtx. We are careful to make sure the value is never negative.
2143 Equivalent registers hash identically.
2144 MODE is used in hashing for CONST_INTs only;
2145 otherwise the mode of X is used.
2147 Store 1 in do_not_record if any subexpression is volatile.
2149 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2150 which does not have the RTX_UNCHANGING_P bit set.
2152 Note that cse_insn knows that the hash code of a MEM expression
2153 is just (int) MEM plus the hash code of the address. */
2155 static unsigned
2156 canon_hash (x, mode)
2157 rtx x;
2158 enum machine_mode mode;
2160 register int i, j;
2161 register unsigned hash = 0;
2162 register enum rtx_code code;
2163 register const char *fmt;
2165 /* repeat is used to turn tail-recursion into iteration. */
2166 repeat:
2167 if (x == 0)
2168 return hash;
2170 code = GET_CODE (x);
2171 switch (code)
2173 case REG:
2175 unsigned int regno = REGNO (x);
2177 /* On some machines, we can't record any non-fixed hard register,
2178 because extending its life will cause reload problems. We
2179 consider ap, fp, and sp to be fixed for this purpose.
2181 We also consider CCmode registers to be fixed for this purpose;
2182 failure to do so leads to failure to simplify 0<100 type of
2183 conditionals.
2185 On all machines, we can't record any global registers. */
2187 if (regno < FIRST_PSEUDO_REGISTER
2188 && (global_regs[regno]
2189 || (SMALL_REGISTER_CLASSES
2190 && ! fixed_regs[regno]
2191 && regno != FRAME_POINTER_REGNUM
2192 && regno != HARD_FRAME_POINTER_REGNUM
2193 && regno != ARG_POINTER_REGNUM
2194 && regno != STACK_POINTER_REGNUM
2195 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2197 do_not_record = 1;
2198 return 0;
2201 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2202 return hash;
2205 /* We handle SUBREG of a REG specially because the underlying
2206 reg changes its hash value with every value change; we don't
2207 want to have to forget unrelated subregs when one subreg changes. */
2208 case SUBREG:
2210 if (GET_CODE (SUBREG_REG (x)) == REG)
2212 hash += (((unsigned) SUBREG << 7)
2213 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2214 return hash;
2216 break;
2219 case CONST_INT:
2221 unsigned HOST_WIDE_INT tem = INTVAL (x);
2222 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2223 return hash;
2226 case CONST_DOUBLE:
2227 /* This is like the general case, except that it only counts
2228 the integers representing the constant. */
2229 hash += (unsigned) code + (unsigned) GET_MODE (x);
2230 if (GET_MODE (x) != VOIDmode)
2231 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2233 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2234 hash += tem;
2236 else
2237 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2238 + (unsigned) CONST_DOUBLE_HIGH (x));
2239 return hash;
2241 /* Assume there is only one rtx object for any given label. */
2242 case LABEL_REF:
2243 hash
2244 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2245 return hash;
2247 case SYMBOL_REF:
2248 hash
2249 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2250 return hash;
2252 case MEM:
2253 /* We don't record if marked volatile or if BLKmode since we don't
2254 know the size of the move. */
2255 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2257 do_not_record = 1;
2258 return 0;
2260 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2262 hash_arg_in_memory = 1;
2264 /* Now that we have already found this special case,
2265 might as well speed it up as much as possible. */
2266 hash += (unsigned) MEM;
2267 x = XEXP (x, 0);
2268 goto repeat;
2270 case PRE_DEC:
2271 case PRE_INC:
2272 case POST_DEC:
2273 case POST_INC:
2274 case PC:
2275 case CC0:
2276 case CALL:
2277 case UNSPEC_VOLATILE:
2278 do_not_record = 1;
2279 return 0;
2281 case ASM_OPERANDS:
2282 if (MEM_VOLATILE_P (x))
2284 do_not_record = 1;
2285 return 0;
2287 break;
2289 default:
2290 break;
2293 i = GET_RTX_LENGTH (code) - 1;
2294 hash += (unsigned) code + (unsigned) GET_MODE (x);
2295 fmt = GET_RTX_FORMAT (code);
2296 for (; i >= 0; i--)
2298 if (fmt[i] == 'e')
2300 rtx tem = XEXP (x, i);
2302 /* If we are about to do the last recursive call
2303 needed at this level, change it into iteration.
2304 This function is called enough to be worth it. */
2305 if (i == 0)
2307 x = tem;
2308 goto repeat;
2310 hash += canon_hash (tem, 0);
2312 else if (fmt[i] == 'E')
2313 for (j = 0; j < XVECLEN (x, i); j++)
2314 hash += canon_hash (XVECEXP (x, i, j), 0);
2315 else if (fmt[i] == 's')
2317 register const unsigned char *p =
2318 (const unsigned char *) XSTR (x, i);
2320 if (p)
2321 while (*p)
2322 hash += *p++;
2324 else if (fmt[i] == 'i')
2326 register unsigned tem = XINT (x, i);
2327 hash += tem;
2329 else if (fmt[i] == '0' || fmt[i] == 't')
2330 /* unused */;
2331 else
2332 abort ();
2334 return hash;
2337 /* Like canon_hash but with no side effects. */
2339 static unsigned
2340 safe_hash (x, mode)
2341 rtx x;
2342 enum machine_mode mode;
2344 int save_do_not_record = do_not_record;
2345 int save_hash_arg_in_memory = hash_arg_in_memory;
2346 unsigned hash = canon_hash (x, mode);
2347 hash_arg_in_memory = save_hash_arg_in_memory;
2348 do_not_record = save_do_not_record;
2349 return hash;
2352 /* Return 1 iff X and Y would canonicalize into the same thing,
2353 without actually constructing the canonicalization of either one.
2354 If VALIDATE is nonzero,
2355 we assume X is an expression being processed from the rtl
2356 and Y was found in the hash table. We check register refs
2357 in Y for being marked as valid.
2359 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2360 that is known to be in the register. Ordinarily, we don't allow them
2361 to match, because letting them match would cause unpredictable results
2362 in all the places that search a hash table chain for an equivalent
2363 for a given value. A possible equivalent that has different structure
2364 has its hash code computed from different data. Whether the hash code
2365 is the same as that of the given value is pure luck. */
2367 static int
2368 exp_equiv_p (x, y, validate, equal_values)
2369 rtx x, y;
2370 int validate;
2371 int equal_values;
2373 register int i, j;
2374 register enum rtx_code code;
2375 register const char *fmt;
2377 /* Note: it is incorrect to assume an expression is equivalent to itself
2378 if VALIDATE is nonzero. */
2379 if (x == y && !validate)
2380 return 1;
2381 if (x == 0 || y == 0)
2382 return x == y;
2384 code = GET_CODE (x);
2385 if (code != GET_CODE (y))
2387 if (!equal_values)
2388 return 0;
2390 /* If X is a constant and Y is a register or vice versa, they may be
2391 equivalent. We only have to validate if Y is a register. */
2392 if (CONSTANT_P (x) && GET_CODE (y) == REG
2393 && REGNO_QTY_VALID_P (REGNO (y)))
2395 int y_q = REG_QTY (REGNO (y));
2396 struct qty_table_elem *y_ent = &qty_table[y_q];
2398 if (GET_MODE (y) == y_ent->mode
2399 && rtx_equal_p (x, y_ent->const_rtx)
2400 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2401 return 1;
2404 if (CONSTANT_P (y) && code == REG
2405 && REGNO_QTY_VALID_P (REGNO (x)))
2407 int x_q = REG_QTY (REGNO (x));
2408 struct qty_table_elem *x_ent = &qty_table[x_q];
2410 if (GET_MODE (x) == x_ent->mode
2411 && rtx_equal_p (y, x_ent->const_rtx))
2412 return 1;
2415 return 0;
2418 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2419 if (GET_MODE (x) != GET_MODE (y))
2420 return 0;
2422 switch (code)
2424 case PC:
2425 case CC0:
2426 case CONST_INT:
2427 return x == y;
2429 case LABEL_REF:
2430 return XEXP (x, 0) == XEXP (y, 0);
2432 case SYMBOL_REF:
2433 return XSTR (x, 0) == XSTR (y, 0);
2435 case REG:
2437 unsigned int regno = REGNO (y);
2438 unsigned int endregno
2439 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2440 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2441 unsigned int i;
2443 /* If the quantities are not the same, the expressions are not
2444 equivalent. If there are and we are not to validate, they
2445 are equivalent. Otherwise, ensure all regs are up-to-date. */
2447 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2448 return 0;
2450 if (! validate)
2451 return 1;
2453 for (i = regno; i < endregno; i++)
2454 if (REG_IN_TABLE (i) != REG_TICK (i))
2455 return 0;
2457 return 1;
2460 /* For commutative operations, check both orders. */
2461 case PLUS:
2462 case MULT:
2463 case AND:
2464 case IOR:
2465 case XOR:
2466 case NE:
2467 case EQ:
2468 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2469 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2470 validate, equal_values))
2471 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2472 validate, equal_values)
2473 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2474 validate, equal_values)));
2476 default:
2477 break;
2480 /* Compare the elements. If any pair of corresponding elements
2481 fail to match, return 0 for the whole things. */
2483 fmt = GET_RTX_FORMAT (code);
2484 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2486 switch (fmt[i])
2488 case 'e':
2489 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2490 return 0;
2491 break;
2493 case 'E':
2494 if (XVECLEN (x, i) != XVECLEN (y, i))
2495 return 0;
2496 for (j = 0; j < XVECLEN (x, i); j++)
2497 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2498 validate, equal_values))
2499 return 0;
2500 break;
2502 case 's':
2503 if (strcmp (XSTR (x, i), XSTR (y, i)))
2504 return 0;
2505 break;
2507 case 'i':
2508 if (XINT (x, i) != XINT (y, i))
2509 return 0;
2510 break;
2512 case 'w':
2513 if (XWINT (x, i) != XWINT (y, i))
2514 return 0;
2515 break;
2517 case '0':
2518 case 't':
2519 break;
2521 default:
2522 abort ();
2526 return 1;
2529 /* Return 1 if X has a value that can vary even between two
2530 executions of the program. 0 means X can be compared reliably
2531 against certain constants or near-constants. */
2533 static int
2534 cse_rtx_varies_p (x)
2535 register rtx x;
2537 /* We need not check for X and the equivalence class being of the same
2538 mode because if X is equivalent to a constant in some mode, it
2539 doesn't vary in any mode. */
2541 if (GET_CODE (x) == REG
2542 && REGNO_QTY_VALID_P (REGNO (x)))
2544 int x_q = REG_QTY (REGNO (x));
2545 struct qty_table_elem *x_ent = &qty_table[x_q];
2547 if (GET_MODE (x) == x_ent->mode
2548 && x_ent->const_rtx != NULL_RTX)
2549 return 0;
2552 if (GET_CODE (x) == PLUS
2553 && GET_CODE (XEXP (x, 1)) == CONST_INT
2554 && GET_CODE (XEXP (x, 0)) == REG
2555 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2557 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2558 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2560 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2561 && x0_ent->const_rtx != NULL_RTX)
2562 return 0;
2565 /* This can happen as the result of virtual register instantiation, if
2566 the initial constant is too large to be a valid address. This gives
2567 us a three instruction sequence, load large offset into a register,
2568 load fp minus a constant into a register, then a MEM which is the
2569 sum of the two `constant' registers. */
2570 if (GET_CODE (x) == PLUS
2571 && GET_CODE (XEXP (x, 0)) == REG
2572 && GET_CODE (XEXP (x, 1)) == REG
2573 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2574 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2576 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2577 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2578 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2579 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2581 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2582 && x0_ent->const_rtx != NULL_RTX
2583 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2584 && x1_ent->const_rtx != NULL_RTX)
2585 return 0;
2588 return rtx_varies_p (x);
2591 /* Canonicalize an expression:
2592 replace each register reference inside it
2593 with the "oldest" equivalent register.
2595 If INSN is non-zero and we are replacing a pseudo with a hard register
2596 or vice versa, validate_change is used to ensure that INSN remains valid
2597 after we make our substitution. The calls are made with IN_GROUP non-zero
2598 so apply_change_group must be called upon the outermost return from this
2599 function (unless INSN is zero). The result of apply_change_group can
2600 generally be discarded since the changes we are making are optional. */
2602 static rtx
2603 canon_reg (x, insn)
2604 rtx x;
2605 rtx insn;
2607 register int i;
2608 register enum rtx_code code;
2609 register const char *fmt;
2611 if (x == 0)
2612 return x;
2614 code = GET_CODE (x);
2615 switch (code)
2617 case PC:
2618 case CC0:
2619 case CONST:
2620 case CONST_INT:
2621 case CONST_DOUBLE:
2622 case SYMBOL_REF:
2623 case LABEL_REF:
2624 case ADDR_VEC:
2625 case ADDR_DIFF_VEC:
2626 return x;
2628 case REG:
2630 register int first;
2631 register int q;
2632 register struct qty_table_elem *ent;
2634 /* Never replace a hard reg, because hard regs can appear
2635 in more than one machine mode, and we must preserve the mode
2636 of each occurrence. Also, some hard regs appear in
2637 MEMs that are shared and mustn't be altered. Don't try to
2638 replace any reg that maps to a reg of class NO_REGS. */
2639 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2640 || ! REGNO_QTY_VALID_P (REGNO (x)))
2641 return x;
2643 q = REG_QTY (REGNO(x));
2644 ent = &qty_table[q];
2645 first = ent->first_reg;
2646 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2647 : REGNO_REG_CLASS (first) == NO_REGS ? x
2648 : gen_rtx_REG (ent->mode, first));
2651 default:
2652 break;
2655 fmt = GET_RTX_FORMAT (code);
2656 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2658 register int j;
2660 if (fmt[i] == 'e')
2662 rtx new = canon_reg (XEXP (x, i), insn);
2663 int insn_code;
2665 /* If replacing pseudo with hard reg or vice versa, ensure the
2666 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2667 if (insn != 0 && new != 0
2668 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2669 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2670 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2671 || (insn_code = recog_memoized (insn)) < 0
2672 || insn_data[insn_code].n_dups > 0))
2673 validate_change (insn, &XEXP (x, i), new, 1);
2674 else
2675 XEXP (x, i) = new;
2677 else if (fmt[i] == 'E')
2678 for (j = 0; j < XVECLEN (x, i); j++)
2679 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2682 return x;
2685 /* LOC is a location within INSN that is an operand address (the contents of
2686 a MEM). Find the best equivalent address to use that is valid for this
2687 insn.
2689 On most CISC machines, complicated address modes are costly, and rtx_cost
2690 is a good approximation for that cost. However, most RISC machines have
2691 only a few (usually only one) memory reference formats. If an address is
2692 valid at all, it is often just as cheap as any other address. Hence, for
2693 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2694 costs of various addresses. For two addresses of equal cost, choose the one
2695 with the highest `rtx_cost' value as that has the potential of eliminating
2696 the most insns. For equal costs, we choose the first in the equivalence
2697 class. Note that we ignore the fact that pseudo registers are cheaper
2698 than hard registers here because we would also prefer the pseudo registers.
2701 static void
2702 find_best_addr (insn, loc, mode)
2703 rtx insn;
2704 rtx *loc;
2705 enum machine_mode mode;
2707 struct table_elt *elt;
2708 rtx addr = *loc;
2709 #ifdef ADDRESS_COST
2710 struct table_elt *p;
2711 int found_better = 1;
2712 #endif
2713 int save_do_not_record = do_not_record;
2714 int save_hash_arg_in_memory = hash_arg_in_memory;
2715 int addr_volatile;
2716 int regno;
2717 int folded_cost, addr_cost;
2718 unsigned hash;
2720 /* Do not try to replace constant addresses or addresses of local and
2721 argument slots. These MEM expressions are made only once and inserted
2722 in many instructions, as well as being used to control symbol table
2723 output. It is not safe to clobber them.
2725 There are some uncommon cases where the address is already in a register
2726 for some reason, but we cannot take advantage of that because we have
2727 no easy way to unshare the MEM. In addition, looking up all stack
2728 addresses is costly. */
2729 if ((GET_CODE (addr) == PLUS
2730 && GET_CODE (XEXP (addr, 0)) == REG
2731 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2732 && (regno = REGNO (XEXP (addr, 0)),
2733 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2734 || regno == ARG_POINTER_REGNUM))
2735 || (GET_CODE (addr) == REG
2736 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2737 || regno == HARD_FRAME_POINTER_REGNUM
2738 || regno == ARG_POINTER_REGNUM))
2739 || GET_CODE (addr) == ADDRESSOF
2740 || CONSTANT_ADDRESS_P (addr))
2741 return;
2743 /* If this address is not simply a register, try to fold it. This will
2744 sometimes simplify the expression. Many simplifications
2745 will not be valid, but some, usually applying the associative rule, will
2746 be valid and produce better code. */
2747 if (GET_CODE (addr) != REG)
2749 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2751 folded_cost = address_cost (folded, mode);
2752 addr_cost = address_cost (addr, mode);
2754 if ((folded_cost < addr_cost
2755 || (folded_cost == addr_cost
2756 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2757 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2758 && validate_change (insn, loc, folded, 0))
2759 addr = folded;
2762 /* If this address is not in the hash table, we can't look for equivalences
2763 of the whole address. Also, ignore if volatile. */
2765 do_not_record = 0;
2766 hash = HASH (addr, Pmode);
2767 addr_volatile = do_not_record;
2768 do_not_record = save_do_not_record;
2769 hash_arg_in_memory = save_hash_arg_in_memory;
2771 if (addr_volatile)
2772 return;
2774 elt = lookup (addr, hash, Pmode);
2776 #ifndef ADDRESS_COST
2777 if (elt)
2779 int our_cost = elt->cost;
2781 /* Find the lowest cost below ours that works. */
2782 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2783 if (elt->cost < our_cost
2784 && (GET_CODE (elt->exp) == REG
2785 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2786 && validate_change (insn, loc,
2787 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2788 return;
2790 #else
2792 if (elt)
2794 /* We need to find the best (under the criteria documented above) entry
2795 in the class that is valid. We use the `flag' field to indicate
2796 choices that were invalid and iterate until we can't find a better
2797 one that hasn't already been tried. */
2799 for (p = elt->first_same_value; p; p = p->next_same_value)
2800 p->flag = 0;
2802 while (found_better)
2804 int best_addr_cost = address_cost (*loc, mode);
2805 int best_rtx_cost = (elt->cost + 1) >> 1;
2806 int exp_cost;
2807 struct table_elt *best_elt = elt;
2809 found_better = 0;
2810 for (p = elt->first_same_value; p; p = p->next_same_value)
2811 if (! p->flag)
2813 if ((GET_CODE (p->exp) == REG
2814 || exp_equiv_p (p->exp, p->exp, 1, 0))
2815 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2816 || (exp_cost == best_addr_cost
2817 && (p->cost + 1) >> 1 < best_rtx_cost)))
2819 found_better = 1;
2820 best_addr_cost = exp_cost;
2821 best_rtx_cost = (p->cost + 1) >> 1;
2822 best_elt = p;
2826 if (found_better)
2828 if (validate_change (insn, loc,
2829 canon_reg (copy_rtx (best_elt->exp),
2830 NULL_RTX), 0))
2831 return;
2832 else
2833 best_elt->flag = 1;
2838 /* If the address is a binary operation with the first operand a register
2839 and the second a constant, do the same as above, but looking for
2840 equivalences of the register. Then try to simplify before checking for
2841 the best address to use. This catches a few cases: First is when we
2842 have REG+const and the register is another REG+const. We can often merge
2843 the constants and eliminate one insn and one register. It may also be
2844 that a machine has a cheap REG+REG+const. Finally, this improves the
2845 code on the Alpha for unaligned byte stores. */
2847 if (flag_expensive_optimizations
2848 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2849 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2850 && GET_CODE (XEXP (*loc, 0)) == REG
2851 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2853 rtx c = XEXP (*loc, 1);
2855 do_not_record = 0;
2856 hash = HASH (XEXP (*loc, 0), Pmode);
2857 do_not_record = save_do_not_record;
2858 hash_arg_in_memory = save_hash_arg_in_memory;
2860 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2861 if (elt == 0)
2862 return;
2864 /* We need to find the best (under the criteria documented above) entry
2865 in the class that is valid. We use the `flag' field to indicate
2866 choices that were invalid and iterate until we can't find a better
2867 one that hasn't already been tried. */
2869 for (p = elt->first_same_value; p; p = p->next_same_value)
2870 p->flag = 0;
2872 while (found_better)
2874 int best_addr_cost = address_cost (*loc, mode);
2875 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2876 struct table_elt *best_elt = elt;
2877 rtx best_rtx = *loc;
2878 int count;
2880 /* This is at worst case an O(n^2) algorithm, so limit our search
2881 to the first 32 elements on the list. This avoids trouble
2882 compiling code with very long basic blocks that can easily
2883 call simplify_gen_binary so many times that we run out of
2884 memory. */
2886 found_better = 0;
2887 for (p = elt->first_same_value, count = 0;
2888 p && count < 32;
2889 p = p->next_same_value, count++)
2890 if (! p->flag
2891 && (GET_CODE (p->exp) == REG
2892 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2894 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2895 p->exp, c);
2896 int new_cost;
2897 new_cost = address_cost (new, mode);
2899 if (new_cost < best_addr_cost
2900 || (new_cost == best_addr_cost
2901 && (COST (new) + 1) >> 1 > best_rtx_cost))
2903 found_better = 1;
2904 best_addr_cost = new_cost;
2905 best_rtx_cost = (COST (new) + 1) >> 1;
2906 best_elt = p;
2907 best_rtx = new;
2911 if (found_better)
2913 if (validate_change (insn, loc,
2914 canon_reg (copy_rtx (best_rtx),
2915 NULL_RTX), 0))
2916 return;
2917 else
2918 best_elt->flag = 1;
2922 #endif
2925 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2926 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2927 what values are being compared.
2929 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2930 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2931 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2932 compared to produce cc0.
2934 The return value is the comparison operator and is either the code of
2935 A or the code corresponding to the inverse of the comparison. */
2937 static enum rtx_code
2938 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2939 enum rtx_code code;
2940 rtx *parg1, *parg2;
2941 enum machine_mode *pmode1, *pmode2;
2943 rtx arg1, arg2;
2945 arg1 = *parg1, arg2 = *parg2;
2947 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2949 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2951 /* Set non-zero when we find something of interest. */
2952 rtx x = 0;
2953 int reverse_code = 0;
2954 struct table_elt *p = 0;
2956 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2957 On machines with CC0, this is the only case that can occur, since
2958 fold_rtx will return the COMPARE or item being compared with zero
2959 when given CC0. */
2961 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2962 x = arg1;
2964 /* If ARG1 is a comparison operator and CODE is testing for
2965 STORE_FLAG_VALUE, get the inner arguments. */
2967 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2969 if (code == NE
2970 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2971 && code == LT && STORE_FLAG_VALUE == -1)
2972 #ifdef FLOAT_STORE_FLAG_VALUE
2973 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2974 && (REAL_VALUE_NEGATIVE
2975 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2976 #endif
2978 x = arg1;
2979 else if (code == EQ
2980 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2981 && code == GE && STORE_FLAG_VALUE == -1)
2982 #ifdef FLOAT_STORE_FLAG_VALUE
2983 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2984 && (REAL_VALUE_NEGATIVE
2985 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2986 #endif
2988 x = arg1, reverse_code = 1;
2991 /* ??? We could also check for
2993 (ne (and (eq (...) (const_int 1))) (const_int 0))
2995 and related forms, but let's wait until we see them occurring. */
2997 if (x == 0)
2998 /* Look up ARG1 in the hash table and see if it has an equivalence
2999 that lets us see what is being compared. */
3000 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3001 GET_MODE (arg1));
3002 if (p) p = p->first_same_value;
3004 for (; p; p = p->next_same_value)
3006 enum machine_mode inner_mode = GET_MODE (p->exp);
3008 /* If the entry isn't valid, skip it. */
3009 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3010 continue;
3012 if (GET_CODE (p->exp) == COMPARE
3013 /* Another possibility is that this machine has a compare insn
3014 that includes the comparison code. In that case, ARG1 would
3015 be equivalent to a comparison operation that would set ARG1 to
3016 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3017 ORIG_CODE is the actual comparison being done; if it is an EQ,
3018 we must reverse ORIG_CODE. On machine with a negative value
3019 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3020 || ((code == NE
3021 || (code == LT
3022 && GET_MODE_CLASS (inner_mode) == MODE_INT
3023 && (GET_MODE_BITSIZE (inner_mode)
3024 <= HOST_BITS_PER_WIDE_INT)
3025 && (STORE_FLAG_VALUE
3026 & ((HOST_WIDE_INT) 1
3027 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3028 #ifdef FLOAT_STORE_FLAG_VALUE
3029 || (code == LT
3030 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3031 && (REAL_VALUE_NEGATIVE
3032 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3033 #endif
3035 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3037 x = p->exp;
3038 break;
3040 else if ((code == EQ
3041 || (code == GE
3042 && GET_MODE_CLASS (inner_mode) == MODE_INT
3043 && (GET_MODE_BITSIZE (inner_mode)
3044 <= HOST_BITS_PER_WIDE_INT)
3045 && (STORE_FLAG_VALUE
3046 & ((HOST_WIDE_INT) 1
3047 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3048 #ifdef FLOAT_STORE_FLAG_VALUE
3049 || (code == GE
3050 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3051 && (REAL_VALUE_NEGATIVE
3052 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3053 #endif
3055 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3057 reverse_code = 1;
3058 x = p->exp;
3059 break;
3062 /* If this is fp + constant, the equivalent is a better operand since
3063 it may let us predict the value of the comparison. */
3064 else if (NONZERO_BASE_PLUS_P (p->exp))
3066 arg1 = p->exp;
3067 continue;
3071 /* If we didn't find a useful equivalence for ARG1, we are done.
3072 Otherwise, set up for the next iteration. */
3073 if (x == 0)
3074 break;
3076 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3077 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3078 code = GET_CODE (x);
3080 if (reverse_code)
3081 code = reverse_condition (code);
3084 /* Return our results. Return the modes from before fold_rtx
3085 because fold_rtx might produce const_int, and then it's too late. */
3086 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3087 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3089 return code;
3092 /* If X is a nontrivial arithmetic operation on an argument
3093 for which a constant value can be determined, return
3094 the result of operating on that value, as a constant.
3095 Otherwise, return X, possibly with one or more operands
3096 modified by recursive calls to this function.
3098 If X is a register whose contents are known, we do NOT
3099 return those contents here. equiv_constant is called to
3100 perform that task.
3102 INSN is the insn that we may be modifying. If it is 0, make a copy
3103 of X before modifying it. */
3105 static rtx
3106 fold_rtx (x, insn)
3107 rtx x;
3108 rtx insn;
3110 register enum rtx_code code;
3111 register enum machine_mode mode;
3112 register const char *fmt;
3113 register int i;
3114 rtx new = 0;
3115 int copied = 0;
3116 int must_swap = 0;
3118 /* Folded equivalents of first two operands of X. */
3119 rtx folded_arg0;
3120 rtx folded_arg1;
3122 /* Constant equivalents of first three operands of X;
3123 0 when no such equivalent is known. */
3124 rtx const_arg0;
3125 rtx const_arg1;
3126 rtx const_arg2;
3128 /* The mode of the first operand of X. We need this for sign and zero
3129 extends. */
3130 enum machine_mode mode_arg0;
3132 if (x == 0)
3133 return x;
3135 mode = GET_MODE (x);
3136 code = GET_CODE (x);
3137 switch (code)
3139 case CONST:
3140 case CONST_INT:
3141 case CONST_DOUBLE:
3142 case SYMBOL_REF:
3143 case LABEL_REF:
3144 case REG:
3145 /* No use simplifying an EXPR_LIST
3146 since they are used only for lists of args
3147 in a function call's REG_EQUAL note. */
3148 case EXPR_LIST:
3149 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3150 want to (e.g.,) make (addressof (const_int 0)) just because
3151 the location is known to be zero. */
3152 case ADDRESSOF:
3153 return x;
3155 #ifdef HAVE_cc0
3156 case CC0:
3157 return prev_insn_cc0;
3158 #endif
3160 case PC:
3161 /* If the next insn is a CODE_LABEL followed by a jump table,
3162 PC's value is a LABEL_REF pointing to that label. That
3163 lets us fold switch statements on the Vax. */
3164 if (insn && GET_CODE (insn) == JUMP_INSN)
3166 rtx next = next_nonnote_insn (insn);
3168 if (next && GET_CODE (next) == CODE_LABEL
3169 && NEXT_INSN (next) != 0
3170 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3171 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3172 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3173 return gen_rtx_LABEL_REF (Pmode, next);
3175 break;
3177 case SUBREG:
3178 /* See if we previously assigned a constant value to this SUBREG. */
3179 if ((new = lookup_as_function (x, CONST_INT)) != 0
3180 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3181 return new;
3183 /* If this is a paradoxical SUBREG, we have no idea what value the
3184 extra bits would have. However, if the operand is equivalent
3185 to a SUBREG whose operand is the same as our mode, and all the
3186 modes are within a word, we can just use the inner operand
3187 because these SUBREGs just say how to treat the register.
3189 Similarly if we find an integer constant. */
3191 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3193 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3194 struct table_elt *elt;
3196 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3197 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3198 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3199 imode)) != 0)
3200 for (elt = elt->first_same_value;
3201 elt; elt = elt->next_same_value)
3203 if (CONSTANT_P (elt->exp)
3204 && GET_MODE (elt->exp) == VOIDmode)
3205 return elt->exp;
3207 if (GET_CODE (elt->exp) == SUBREG
3208 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3209 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3210 return copy_rtx (SUBREG_REG (elt->exp));
3213 return x;
3216 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3217 We might be able to if the SUBREG is extracting a single word in an
3218 integral mode or extracting the low part. */
3220 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3221 const_arg0 = equiv_constant (folded_arg0);
3222 if (const_arg0)
3223 folded_arg0 = const_arg0;
3225 if (folded_arg0 != SUBREG_REG (x))
3227 new = 0;
3229 if (GET_MODE_CLASS (mode) == MODE_INT
3230 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3231 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3232 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3233 GET_MODE (SUBREG_REG (x)));
3234 if (new == 0 && subreg_lowpart_p (x))
3235 new = gen_lowpart_if_possible (mode, folded_arg0);
3236 if (new)
3237 return new;
3240 /* If this is a narrowing SUBREG and our operand is a REG, see if
3241 we can find an equivalence for REG that is an arithmetic operation
3242 in a wider mode where both operands are paradoxical SUBREGs
3243 from objects of our result mode. In that case, we couldn't report
3244 an equivalent value for that operation, since we don't know what the
3245 extra bits will be. But we can find an equivalence for this SUBREG
3246 by folding that operation is the narrow mode. This allows us to
3247 fold arithmetic in narrow modes when the machine only supports
3248 word-sized arithmetic.
3250 Also look for a case where we have a SUBREG whose operand is the
3251 same as our result. If both modes are smaller than a word, we
3252 are simply interpreting a register in different modes and we
3253 can use the inner value. */
3255 if (GET_CODE (folded_arg0) == REG
3256 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3257 && subreg_lowpart_p (x))
3259 struct table_elt *elt;
3261 /* We can use HASH here since we know that canon_hash won't be
3262 called. */
3263 elt = lookup (folded_arg0,
3264 HASH (folded_arg0, GET_MODE (folded_arg0)),
3265 GET_MODE (folded_arg0));
3267 if (elt)
3268 elt = elt->first_same_value;
3270 for (; elt; elt = elt->next_same_value)
3272 enum rtx_code eltcode = GET_CODE (elt->exp);
3274 /* Just check for unary and binary operations. */
3275 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3276 && GET_CODE (elt->exp) != SIGN_EXTEND
3277 && GET_CODE (elt->exp) != ZERO_EXTEND
3278 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3279 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3281 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3283 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3284 op0 = fold_rtx (op0, NULL_RTX);
3286 op0 = equiv_constant (op0);
3287 if (op0)
3288 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3289 op0, mode);
3291 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3292 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3293 && eltcode != DIV && eltcode != MOD
3294 && eltcode != UDIV && eltcode != UMOD
3295 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3296 && eltcode != ROTATE && eltcode != ROTATERT
3297 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3298 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3299 == mode))
3300 || CONSTANT_P (XEXP (elt->exp, 0)))
3301 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3302 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3303 == mode))
3304 || CONSTANT_P (XEXP (elt->exp, 1))))
3306 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3307 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3309 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3310 op0 = fold_rtx (op0, NULL_RTX);
3312 if (op0)
3313 op0 = equiv_constant (op0);
3315 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3316 op1 = fold_rtx (op1, NULL_RTX);
3318 if (op1)
3319 op1 = equiv_constant (op1);
3321 /* If we are looking for the low SImode part of
3322 (ashift:DI c (const_int 32)), it doesn't work
3323 to compute that in SImode, because a 32-bit shift
3324 in SImode is unpredictable. We know the value is 0. */
3325 if (op0 && op1
3326 && GET_CODE (elt->exp) == ASHIFT
3327 && GET_CODE (op1) == CONST_INT
3328 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3330 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3332 /* If the count fits in the inner mode's width,
3333 but exceeds the outer mode's width,
3334 the value will get truncated to 0
3335 by the subreg. */
3336 new = const0_rtx;
3337 else
3338 /* If the count exceeds even the inner mode's width,
3339 don't fold this expression. */
3340 new = 0;
3342 else if (op0 && op1)
3343 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3344 op0, op1);
3347 else if (GET_CODE (elt->exp) == SUBREG
3348 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3349 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3350 <= UNITS_PER_WORD)
3351 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3352 new = copy_rtx (SUBREG_REG (elt->exp));
3354 if (new)
3355 return new;
3359 return x;
3361 case NOT:
3362 case NEG:
3363 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3364 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3365 new = lookup_as_function (XEXP (x, 0), code);
3366 if (new)
3367 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3368 break;
3370 case MEM:
3371 /* If we are not actually processing an insn, don't try to find the
3372 best address. Not only don't we care, but we could modify the
3373 MEM in an invalid way since we have no insn to validate against. */
3374 if (insn != 0)
3375 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3378 /* Even if we don't fold in the insn itself,
3379 we can safely do so here, in hopes of getting a constant. */
3380 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3381 rtx base = 0;
3382 HOST_WIDE_INT offset = 0;
3384 if (GET_CODE (addr) == REG
3385 && REGNO_QTY_VALID_P (REGNO (addr)))
3387 int addr_q = REG_QTY (REGNO (addr));
3388 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3390 if (GET_MODE (addr) == addr_ent->mode
3391 && addr_ent->const_rtx != NULL_RTX)
3392 addr = addr_ent->const_rtx;
3395 /* If address is constant, split it into a base and integer offset. */
3396 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3397 base = addr;
3398 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3399 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3401 base = XEXP (XEXP (addr, 0), 0);
3402 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3404 else if (GET_CODE (addr) == LO_SUM
3405 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3406 base = XEXP (addr, 1);
3407 else if (GET_CODE (addr) == ADDRESSOF)
3408 return change_address (x, VOIDmode, addr);
3410 /* If this is a constant pool reference, we can fold it into its
3411 constant to allow better value tracking. */
3412 if (base && GET_CODE (base) == SYMBOL_REF
3413 && CONSTANT_POOL_ADDRESS_P (base))
3415 rtx constant = get_pool_constant (base);
3416 enum machine_mode const_mode = get_pool_mode (base);
3417 rtx new;
3419 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3420 constant_pool_entries_cost = COST (constant);
3422 /* If we are loading the full constant, we have an equivalence. */
3423 if (offset == 0 && mode == const_mode)
3424 return constant;
3426 /* If this actually isn't a constant (weird!), we can't do
3427 anything. Otherwise, handle the two most common cases:
3428 extracting a word from a multi-word constant, and extracting
3429 the low-order bits. Other cases don't seem common enough to
3430 worry about. */
3431 if (! CONSTANT_P (constant))
3432 return x;
3434 if (GET_MODE_CLASS (mode) == MODE_INT
3435 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3436 && offset % UNITS_PER_WORD == 0
3437 && (new = operand_subword (constant,
3438 offset / UNITS_PER_WORD,
3439 0, const_mode)) != 0)
3440 return new;
3442 if (((BYTES_BIG_ENDIAN
3443 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3444 || (! BYTES_BIG_ENDIAN && offset == 0))
3445 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3446 return new;
3449 /* If this is a reference to a label at a known position in a jump
3450 table, we also know its value. */
3451 if (base && GET_CODE (base) == LABEL_REF)
3453 rtx label = XEXP (base, 0);
3454 rtx table_insn = NEXT_INSN (label);
3456 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3457 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3459 rtx table = PATTERN (table_insn);
3461 if (offset >= 0
3462 && (offset / GET_MODE_SIZE (GET_MODE (table))
3463 < XVECLEN (table, 0)))
3464 return XVECEXP (table, 0,
3465 offset / GET_MODE_SIZE (GET_MODE (table)));
3467 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3468 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3470 rtx table = PATTERN (table_insn);
3472 if (offset >= 0
3473 && (offset / GET_MODE_SIZE (GET_MODE (table))
3474 < XVECLEN (table, 1)))
3476 offset /= GET_MODE_SIZE (GET_MODE (table));
3477 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3478 XEXP (table, 0));
3480 if (GET_MODE (table) != Pmode)
3481 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3483 /* Indicate this is a constant. This isn't a
3484 valid form of CONST, but it will only be used
3485 to fold the next insns and then discarded, so
3486 it should be safe.
3488 Note this expression must be explicitly discarded,
3489 by cse_insn, else it may end up in a REG_EQUAL note
3490 and "escape" to cause problems elsewhere. */
3491 return gen_rtx_CONST (GET_MODE (new), new);
3496 return x;
3499 case ASM_OPERANDS:
3500 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3501 validate_change (insn, &XVECEXP (x, 3, i),
3502 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3503 break;
3505 default:
3506 break;
3509 const_arg0 = 0;
3510 const_arg1 = 0;
3511 const_arg2 = 0;
3512 mode_arg0 = VOIDmode;
3514 /* Try folding our operands.
3515 Then see which ones have constant values known. */
3517 fmt = GET_RTX_FORMAT (code);
3518 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3519 if (fmt[i] == 'e')
3521 rtx arg = XEXP (x, i);
3522 rtx folded_arg = arg, const_arg = 0;
3523 enum machine_mode mode_arg = GET_MODE (arg);
3524 rtx cheap_arg, expensive_arg;
3525 rtx replacements[2];
3526 int j;
3528 /* Most arguments are cheap, so handle them specially. */
3529 switch (GET_CODE (arg))
3531 case REG:
3532 /* This is the same as calling equiv_constant; it is duplicated
3533 here for speed. */
3534 if (REGNO_QTY_VALID_P (REGNO (arg)))
3536 int arg_q = REG_QTY (REGNO (arg));
3537 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3539 if (arg_ent->const_rtx != NULL_RTX
3540 && GET_CODE (arg_ent->const_rtx) != REG
3541 && GET_CODE (arg_ent->const_rtx) != PLUS)
3542 const_arg
3543 = gen_lowpart_if_possible (GET_MODE (arg),
3544 arg_ent->const_rtx);
3546 break;
3548 case CONST:
3549 case CONST_INT:
3550 case SYMBOL_REF:
3551 case LABEL_REF:
3552 case CONST_DOUBLE:
3553 const_arg = arg;
3554 break;
3556 #ifdef HAVE_cc0
3557 case CC0:
3558 folded_arg = prev_insn_cc0;
3559 mode_arg = prev_insn_cc0_mode;
3560 const_arg = equiv_constant (folded_arg);
3561 break;
3562 #endif
3564 default:
3565 folded_arg = fold_rtx (arg, insn);
3566 const_arg = equiv_constant (folded_arg);
3569 /* For the first three operands, see if the operand
3570 is constant or equivalent to a constant. */
3571 switch (i)
3573 case 0:
3574 folded_arg0 = folded_arg;
3575 const_arg0 = const_arg;
3576 mode_arg0 = mode_arg;
3577 break;
3578 case 1:
3579 folded_arg1 = folded_arg;
3580 const_arg1 = const_arg;
3581 break;
3582 case 2:
3583 const_arg2 = const_arg;
3584 break;
3587 /* Pick the least expensive of the folded argument and an
3588 equivalent constant argument. */
3589 if (const_arg == 0 || const_arg == folded_arg
3590 || COST (const_arg) > COST (folded_arg))
3591 cheap_arg = folded_arg, expensive_arg = const_arg;
3592 else
3593 cheap_arg = const_arg, expensive_arg = folded_arg;
3595 /* Try to replace the operand with the cheapest of the two
3596 possibilities. If it doesn't work and this is either of the first
3597 two operands of a commutative operation, try swapping them.
3598 If THAT fails, try the more expensive, provided it is cheaper
3599 than what is already there. */
3601 if (cheap_arg == XEXP (x, i))
3602 continue;
3604 if (insn == 0 && ! copied)
3606 x = copy_rtx (x);
3607 copied = 1;
3610 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3611 for (j = 0;
3612 j < 2 && replacements[j]
3613 && COST (replacements[j]) < COST (XEXP (x, i));
3614 j++)
3616 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3617 break;
3619 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3621 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3622 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3624 if (apply_change_group ())
3626 /* Swap them back to be invalid so that this loop can
3627 continue and flag them to be swapped back later. */
3628 rtx tem;
3630 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3631 XEXP (x, 1) = tem;
3632 must_swap = 1;
3633 break;
3639 else
3641 if (fmt[i] == 'E')
3642 /* Don't try to fold inside of a vector of expressions.
3643 Doing nothing is harmless. */
3644 {;}
3647 /* If a commutative operation, place a constant integer as the second
3648 operand unless the first operand is also a constant integer. Otherwise,
3649 place any constant second unless the first operand is also a constant. */
3651 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3653 if (must_swap || (const_arg0
3654 && (const_arg1 == 0
3655 || (GET_CODE (const_arg0) == CONST_INT
3656 && GET_CODE (const_arg1) != CONST_INT))))
3658 register rtx tem = XEXP (x, 0);
3660 if (insn == 0 && ! copied)
3662 x = copy_rtx (x);
3663 copied = 1;
3666 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3667 validate_change (insn, &XEXP (x, 1), tem, 1);
3668 if (apply_change_group ())
3670 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3671 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3676 /* If X is an arithmetic operation, see if we can simplify it. */
3678 switch (GET_RTX_CLASS (code))
3680 case '1':
3682 int is_const = 0;
3684 /* We can't simplify extension ops unless we know the
3685 original mode. */
3686 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3687 && mode_arg0 == VOIDmode)
3688 break;
3690 /* If we had a CONST, strip it off and put it back later if we
3691 fold. */
3692 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3693 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3695 new = simplify_unary_operation (code, mode,
3696 const_arg0 ? const_arg0 : folded_arg0,
3697 mode_arg0);
3698 if (new != 0 && is_const)
3699 new = gen_rtx_CONST (mode, new);
3701 break;
3703 case '<':
3704 /* See what items are actually being compared and set FOLDED_ARG[01]
3705 to those values and CODE to the actual comparison code. If any are
3706 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3707 do anything if both operands are already known to be constant. */
3709 if (const_arg0 == 0 || const_arg1 == 0)
3711 struct table_elt *p0, *p1;
3712 rtx true = const_true_rtx, false = const0_rtx;
3713 enum machine_mode mode_arg1;
3715 #ifdef FLOAT_STORE_FLAG_VALUE
3716 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3718 true = (CONST_DOUBLE_FROM_REAL_VALUE
3719 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3720 false = CONST0_RTX (mode);
3722 #endif
3724 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3725 &mode_arg0, &mode_arg1);
3726 const_arg0 = equiv_constant (folded_arg0);
3727 const_arg1 = equiv_constant (folded_arg1);
3729 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3730 what kinds of things are being compared, so we can't do
3731 anything with this comparison. */
3733 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3734 break;
3736 /* If we do not now have two constants being compared, see
3737 if we can nevertheless deduce some things about the
3738 comparison. */
3739 if (const_arg0 == 0 || const_arg1 == 0)
3741 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3742 non-explicit constant? These aren't zero, but we
3743 don't know their sign. */
3744 if (const_arg1 == const0_rtx
3745 && (NONZERO_BASE_PLUS_P (folded_arg0)
3746 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3747 come out as 0. */
3748 || GET_CODE (folded_arg0) == SYMBOL_REF
3749 #endif
3750 || GET_CODE (folded_arg0) == LABEL_REF
3751 || GET_CODE (folded_arg0) == CONST))
3753 if (code == EQ)
3754 return false;
3755 else if (code == NE)
3756 return true;
3759 /* See if the two operands are the same. We don't do this
3760 for IEEE floating-point since we can't assume x == x
3761 since x might be a NaN. */
3763 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3764 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3765 && (folded_arg0 == folded_arg1
3766 || (GET_CODE (folded_arg0) == REG
3767 && GET_CODE (folded_arg1) == REG
3768 && (REG_QTY (REGNO (folded_arg0))
3769 == REG_QTY (REGNO (folded_arg1))))
3770 || ((p0 = lookup (folded_arg0,
3771 (safe_hash (folded_arg0, mode_arg0)
3772 & HASH_MASK), mode_arg0))
3773 && (p1 = lookup (folded_arg1,
3774 (safe_hash (folded_arg1, mode_arg0)
3775 & HASH_MASK), mode_arg0))
3776 && p0->first_same_value == p1->first_same_value)))
3777 return ((code == EQ || code == LE || code == GE
3778 || code == LEU || code == GEU)
3779 ? true : false);
3781 /* If FOLDED_ARG0 is a register, see if the comparison we are
3782 doing now is either the same as we did before or the reverse
3783 (we only check the reverse if not floating-point). */
3784 else if (GET_CODE (folded_arg0) == REG)
3786 int qty = REG_QTY (REGNO (folded_arg0));
3788 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3790 struct qty_table_elem *ent = &qty_table[qty];
3792 if ((comparison_dominates_p (ent->comparison_code, code)
3793 || (! FLOAT_MODE_P (mode_arg0)
3794 && comparison_dominates_p (ent->comparison_code,
3795 reverse_condition (code))))
3796 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3797 || (const_arg1
3798 && rtx_equal_p (ent->comparison_const,
3799 const_arg1))
3800 || (GET_CODE (folded_arg1) == REG
3801 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3802 return (comparison_dominates_p (ent->comparison_code, code)
3803 ? true : false);
3809 /* If we are comparing against zero, see if the first operand is
3810 equivalent to an IOR with a constant. If so, we may be able to
3811 determine the result of this comparison. */
3813 if (const_arg1 == const0_rtx)
3815 rtx y = lookup_as_function (folded_arg0, IOR);
3816 rtx inner_const;
3818 if (y != 0
3819 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3820 && GET_CODE (inner_const) == CONST_INT
3821 && INTVAL (inner_const) != 0)
3823 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3824 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3825 && (INTVAL (inner_const)
3826 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3827 rtx true = const_true_rtx, false = const0_rtx;
3829 #ifdef FLOAT_STORE_FLAG_VALUE
3830 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3832 true = (CONST_DOUBLE_FROM_REAL_VALUE
3833 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3834 false = CONST0_RTX (mode);
3836 #endif
3838 switch (code)
3840 case EQ:
3841 return false;
3842 case NE:
3843 return true;
3844 case LT: case LE:
3845 if (has_sign)
3846 return true;
3847 break;
3848 case GT: case GE:
3849 if (has_sign)
3850 return false;
3851 break;
3852 default:
3853 break;
3858 new = simplify_relational_operation (code, mode_arg0,
3859 const_arg0 ? const_arg0 : folded_arg0,
3860 const_arg1 ? const_arg1 : folded_arg1);
3861 #ifdef FLOAT_STORE_FLAG_VALUE
3862 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3864 if (new == const0_rtx)
3865 new = CONST0_RTX (mode);
3866 else
3867 new = (CONST_DOUBLE_FROM_REAL_VALUE
3868 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3870 #endif
3871 break;
3873 case '2':
3874 case 'c':
3875 switch (code)
3877 case PLUS:
3878 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3879 with that LABEL_REF as its second operand. If so, the result is
3880 the first operand of that MINUS. This handles switches with an
3881 ADDR_DIFF_VEC table. */
3882 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3884 rtx y
3885 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3886 : lookup_as_function (folded_arg0, MINUS);
3888 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3889 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3890 return XEXP (y, 0);
3892 /* Now try for a CONST of a MINUS like the above. */
3893 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3894 : lookup_as_function (folded_arg0, CONST))) != 0
3895 && GET_CODE (XEXP (y, 0)) == MINUS
3896 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3897 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3898 return XEXP (XEXP (y, 0), 0);
3901 /* Likewise if the operands are in the other order. */
3902 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3904 rtx y
3905 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3906 : lookup_as_function (folded_arg1, MINUS);
3908 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3909 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3910 return XEXP (y, 0);
3912 /* Now try for a CONST of a MINUS like the above. */
3913 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3914 : lookup_as_function (folded_arg1, CONST))) != 0
3915 && GET_CODE (XEXP (y, 0)) == MINUS
3916 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3917 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
3918 return XEXP (XEXP (y, 0), 0);
3921 /* If second operand is a register equivalent to a negative
3922 CONST_INT, see if we can find a register equivalent to the
3923 positive constant. Make a MINUS if so. Don't do this for
3924 a non-negative constant since we might then alternate between
3925 chosing positive and negative constants. Having the positive
3926 constant previously-used is the more common case. Be sure
3927 the resulting constant is non-negative; if const_arg1 were
3928 the smallest negative number this would overflow: depending
3929 on the mode, this would either just be the same value (and
3930 hence not save anything) or be incorrect. */
3931 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3932 && INTVAL (const_arg1) < 0
3933 /* This used to test
3935 - INTVAL (const_arg1) >= 0
3937 But The Sun V5.0 compilers mis-compiled that test. So
3938 instead we test for the problematic value in a more direct
3939 manner and hope the Sun compilers get it correct. */
3940 && INTVAL (const_arg1) !=
3941 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3942 && GET_CODE (folded_arg1) == REG)
3944 rtx new_const = GEN_INT (- INTVAL (const_arg1));
3945 struct table_elt *p
3946 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
3947 mode);
3949 if (p)
3950 for (p = p->first_same_value; p; p = p->next_same_value)
3951 if (GET_CODE (p->exp) == REG)
3952 return simplify_gen_binary (MINUS, mode, folded_arg0,
3953 canon_reg (p->exp, NULL_RTX));
3955 goto from_plus;
3957 case MINUS:
3958 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3959 If so, produce (PLUS Z C2-C). */
3960 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3962 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3963 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3964 return fold_rtx (plus_constant (copy_rtx (y),
3965 -INTVAL (const_arg1)),
3966 NULL_RTX);
3969 /* ... fall through ... */
3971 from_plus:
3972 case SMIN: case SMAX: case UMIN: case UMAX:
3973 case IOR: case AND: case XOR:
3974 case MULT: case DIV: case UDIV:
3975 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3976 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3977 is known to be of similar form, we may be able to replace the
3978 operation with a combined operation. This may eliminate the
3979 intermediate operation if every use is simplified in this way.
3980 Note that the similar optimization done by combine.c only works
3981 if the intermediate operation's result has only one reference. */
3983 if (GET_CODE (folded_arg0) == REG
3984 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3986 int is_shift
3987 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3988 rtx y = lookup_as_function (folded_arg0, code);
3989 rtx inner_const;
3990 enum rtx_code associate_code;
3991 rtx new_const;
3993 if (y == 0
3994 || 0 == (inner_const
3995 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
3996 || GET_CODE (inner_const) != CONST_INT
3997 /* If we have compiled a statement like
3998 "if (x == (x & mask1))", and now are looking at
3999 "x & mask2", we will have a case where the first operand
4000 of Y is the same as our first operand. Unless we detect
4001 this case, an infinite loop will result. */
4002 || XEXP (y, 0) == folded_arg0)
4003 break;
4005 /* Don't associate these operations if they are a PLUS with the
4006 same constant and it is a power of two. These might be doable
4007 with a pre- or post-increment. Similarly for two subtracts of
4008 identical powers of two with post decrement. */
4010 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4011 && ((HAVE_PRE_INCREMENT
4012 && exact_log2 (INTVAL (const_arg1)) >= 0)
4013 || (HAVE_POST_INCREMENT
4014 && exact_log2 (INTVAL (const_arg1)) >= 0)
4015 || (HAVE_PRE_DECREMENT
4016 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4017 || (HAVE_POST_DECREMENT
4018 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4019 break;
4021 /* Compute the code used to compose the constants. For example,
4022 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4024 associate_code
4025 = (code == MULT || code == DIV || code == UDIV ? MULT
4026 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4028 new_const = simplify_binary_operation (associate_code, mode,
4029 const_arg1, inner_const);
4031 if (new_const == 0)
4032 break;
4034 /* If we are associating shift operations, don't let this
4035 produce a shift of the size of the object or larger.
4036 This could occur when we follow a sign-extend by a right
4037 shift on a machine that does a sign-extend as a pair
4038 of shifts. */
4040 if (is_shift && GET_CODE (new_const) == CONST_INT
4041 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4043 /* As an exception, we can turn an ASHIFTRT of this
4044 form into a shift of the number of bits - 1. */
4045 if (code == ASHIFTRT)
4046 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4047 else
4048 break;
4051 y = copy_rtx (XEXP (y, 0));
4053 /* If Y contains our first operand (the most common way this
4054 can happen is if Y is a MEM), we would do into an infinite
4055 loop if we tried to fold it. So don't in that case. */
4057 if (! reg_mentioned_p (folded_arg0, y))
4058 y = fold_rtx (y, insn);
4060 return simplify_gen_binary (code, mode, y, new_const);
4062 break;
4064 default:
4065 break;
4068 new = simplify_binary_operation (code, mode,
4069 const_arg0 ? const_arg0 : folded_arg0,
4070 const_arg1 ? const_arg1 : folded_arg1);
4071 break;
4073 case 'o':
4074 /* (lo_sum (high X) X) is simply X. */
4075 if (code == LO_SUM && const_arg0 != 0
4076 && GET_CODE (const_arg0) == HIGH
4077 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4078 return const_arg1;
4079 break;
4081 case '3':
4082 case 'b':
4083 new = simplify_ternary_operation (code, mode, mode_arg0,
4084 const_arg0 ? const_arg0 : folded_arg0,
4085 const_arg1 ? const_arg1 : folded_arg1,
4086 const_arg2 ? const_arg2 : XEXP (x, 2));
4087 break;
4089 case 'x':
4090 /* Always eliminate CONSTANT_P_RTX at this stage. */
4091 if (code == CONSTANT_P_RTX)
4092 return (const_arg0 ? const1_rtx : const0_rtx);
4093 break;
4096 return new ? new : x;
4099 /* Return a constant value currently equivalent to X.
4100 Return 0 if we don't know one. */
4102 static rtx
4103 equiv_constant (x)
4104 rtx x;
4106 if (GET_CODE (x) == REG
4107 && REGNO_QTY_VALID_P (REGNO (x)))
4109 int x_q = REG_QTY (REGNO (x));
4110 struct qty_table_elem *x_ent = &qty_table[x_q];
4112 if (x_ent->const_rtx)
4113 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4116 if (x == 0 || CONSTANT_P (x))
4117 return x;
4119 /* If X is a MEM, try to fold it outside the context of any insn to see if
4120 it might be equivalent to a constant. That handles the case where it
4121 is a constant-pool reference. Then try to look it up in the hash table
4122 in case it is something whose value we have seen before. */
4124 if (GET_CODE (x) == MEM)
4126 struct table_elt *elt;
4128 x = fold_rtx (x, NULL_RTX);
4129 if (CONSTANT_P (x))
4130 return x;
4132 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4133 if (elt == 0)
4134 return 0;
4136 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4137 if (elt->is_const && CONSTANT_P (elt->exp))
4138 return elt->exp;
4141 return 0;
4144 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4145 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4146 least-significant part of X.
4147 MODE specifies how big a part of X to return.
4149 If the requested operation cannot be done, 0 is returned.
4151 This is similar to gen_lowpart in emit-rtl.c. */
4154 gen_lowpart_if_possible (mode, x)
4155 enum machine_mode mode;
4156 register rtx x;
4158 rtx result = gen_lowpart_common (mode, x);
4160 if (result)
4161 return result;
4162 else if (GET_CODE (x) == MEM)
4164 /* This is the only other case we handle. */
4165 register int offset = 0;
4166 rtx new;
4168 if (WORDS_BIG_ENDIAN)
4169 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4170 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4171 if (BYTES_BIG_ENDIAN)
4172 /* Adjust the address so that the address-after-the-data is
4173 unchanged. */
4174 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4175 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4176 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4177 if (! memory_address_p (mode, XEXP (new, 0)))
4178 return 0;
4179 MEM_COPY_ATTRIBUTES (new, x);
4180 return new;
4182 else
4183 return 0;
4186 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4187 branch. It will be zero if not.
4189 In certain cases, this can cause us to add an equivalence. For example,
4190 if we are following the taken case of
4191 if (i == 2)
4192 we can add the fact that `i' and '2' are now equivalent.
4194 In any case, we can record that this comparison was passed. If the same
4195 comparison is seen later, we will know its value. */
4197 static void
4198 record_jump_equiv (insn, taken)
4199 rtx insn;
4200 int taken;
4202 int cond_known_true;
4203 rtx op0, op1;
4204 rtx set;
4205 enum machine_mode mode, mode0, mode1;
4206 int reversed_nonequality = 0;
4207 enum rtx_code code;
4209 /* Ensure this is the right kind of insn. */
4210 if (! any_condjump_p (insn))
4211 return;
4212 set = pc_set (insn);
4214 /* See if this jump condition is known true or false. */
4215 if (taken)
4216 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4217 else
4218 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4220 /* Get the type of comparison being done and the operands being compared.
4221 If we had to reverse a non-equality condition, record that fact so we
4222 know that it isn't valid for floating-point. */
4223 code = GET_CODE (XEXP (SET_SRC (set), 0));
4224 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4225 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4227 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4228 if (! cond_known_true)
4230 reversed_nonequality = (code != EQ && code != NE);
4231 code = reverse_condition (code);
4233 /* Don't remember if we can't find the inverse. */
4234 if (code == UNKNOWN)
4235 return;
4238 /* The mode is the mode of the non-constant. */
4239 mode = mode0;
4240 if (mode1 != VOIDmode)
4241 mode = mode1;
4243 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4246 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4247 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4248 Make any useful entries we can with that information. Called from
4249 above function and called recursively. */
4251 static void
4252 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4253 enum rtx_code code;
4254 enum machine_mode mode;
4255 rtx op0, op1;
4256 int reversed_nonequality;
4258 unsigned op0_hash, op1_hash;
4259 int op0_in_memory, op1_in_memory;
4260 struct table_elt *op0_elt, *op1_elt;
4262 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4263 we know that they are also equal in the smaller mode (this is also
4264 true for all smaller modes whether or not there is a SUBREG, but
4265 is not worth testing for with no SUBREG). */
4267 /* Note that GET_MODE (op0) may not equal MODE. */
4268 if (code == EQ && GET_CODE (op0) == SUBREG
4269 && (GET_MODE_SIZE (GET_MODE (op0))
4270 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4272 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4273 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4275 record_jump_cond (code, mode, SUBREG_REG (op0),
4276 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4277 reversed_nonequality);
4280 if (code == EQ && GET_CODE (op1) == SUBREG
4281 && (GET_MODE_SIZE (GET_MODE (op1))
4282 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4284 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4285 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4287 record_jump_cond (code, mode, SUBREG_REG (op1),
4288 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4289 reversed_nonequality);
4292 /* Similarly, if this is an NE comparison, and either is a SUBREG
4293 making a smaller mode, we know the whole thing is also NE. */
4295 /* Note that GET_MODE (op0) may not equal MODE;
4296 if we test MODE instead, we can get an infinite recursion
4297 alternating between two modes each wider than MODE. */
4299 if (code == NE && GET_CODE (op0) == SUBREG
4300 && subreg_lowpart_p (op0)
4301 && (GET_MODE_SIZE (GET_MODE (op0))
4302 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4304 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4305 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4307 record_jump_cond (code, mode, SUBREG_REG (op0),
4308 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4309 reversed_nonequality);
4312 if (code == NE && GET_CODE (op1) == SUBREG
4313 && subreg_lowpart_p (op1)
4314 && (GET_MODE_SIZE (GET_MODE (op1))
4315 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4317 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4318 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4320 record_jump_cond (code, mode, SUBREG_REG (op1),
4321 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4322 reversed_nonequality);
4325 /* Hash both operands. */
4327 do_not_record = 0;
4328 hash_arg_in_memory = 0;
4329 op0_hash = HASH (op0, mode);
4330 op0_in_memory = hash_arg_in_memory;
4332 if (do_not_record)
4333 return;
4335 do_not_record = 0;
4336 hash_arg_in_memory = 0;
4337 op1_hash = HASH (op1, mode);
4338 op1_in_memory = hash_arg_in_memory;
4340 if (do_not_record)
4341 return;
4343 /* Look up both operands. */
4344 op0_elt = lookup (op0, op0_hash, mode);
4345 op1_elt = lookup (op1, op1_hash, mode);
4347 /* If both operands are already equivalent or if they are not in the
4348 table but are identical, do nothing. */
4349 if ((op0_elt != 0 && op1_elt != 0
4350 && op0_elt->first_same_value == op1_elt->first_same_value)
4351 || op0 == op1 || rtx_equal_p (op0, op1))
4352 return;
4354 /* If we aren't setting two things equal all we can do is save this
4355 comparison. Similarly if this is floating-point. In the latter
4356 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4357 If we record the equality, we might inadvertently delete code
4358 whose intent was to change -0 to +0. */
4360 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4362 struct qty_table_elem *ent;
4363 int qty;
4365 /* If we reversed a floating-point comparison, if OP0 is not a
4366 register, or if OP1 is neither a register or constant, we can't
4367 do anything. */
4369 if (GET_CODE (op1) != REG)
4370 op1 = equiv_constant (op1);
4372 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4373 || GET_CODE (op0) != REG || op1 == 0)
4374 return;
4376 /* Put OP0 in the hash table if it isn't already. This gives it a
4377 new quantity number. */
4378 if (op0_elt == 0)
4380 if (insert_regs (op0, NULL_PTR, 0))
4382 rehash_using_reg (op0);
4383 op0_hash = HASH (op0, mode);
4385 /* If OP0 is contained in OP1, this changes its hash code
4386 as well. Faster to rehash than to check, except
4387 for the simple case of a constant. */
4388 if (! CONSTANT_P (op1))
4389 op1_hash = HASH (op1,mode);
4392 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4393 op0_elt->in_memory = op0_in_memory;
4396 qty = REG_QTY (REGNO (op0));
4397 ent = &qty_table[qty];
4399 ent->comparison_code = code;
4400 if (GET_CODE (op1) == REG)
4402 /* Look it up again--in case op0 and op1 are the same. */
4403 op1_elt = lookup (op1, op1_hash, mode);
4405 /* Put OP1 in the hash table so it gets a new quantity number. */
4406 if (op1_elt == 0)
4408 if (insert_regs (op1, NULL_PTR, 0))
4410 rehash_using_reg (op1);
4411 op1_hash = HASH (op1, mode);
4414 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4415 op1_elt->in_memory = op1_in_memory;
4418 ent->comparison_const = NULL_RTX;
4419 ent->comparison_qty = REG_QTY (REGNO (op1));
4421 else
4423 ent->comparison_const = op1;
4424 ent->comparison_qty = -1;
4427 return;
4430 /* If either side is still missing an equivalence, make it now,
4431 then merge the equivalences. */
4433 if (op0_elt == 0)
4435 if (insert_regs (op0, NULL_PTR, 0))
4437 rehash_using_reg (op0);
4438 op0_hash = HASH (op0, mode);
4441 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4442 op0_elt->in_memory = op0_in_memory;
4445 if (op1_elt == 0)
4447 if (insert_regs (op1, NULL_PTR, 0))
4449 rehash_using_reg (op1);
4450 op1_hash = HASH (op1, mode);
4453 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4454 op1_elt->in_memory = op1_in_memory;
4457 merge_equiv_classes (op0_elt, op1_elt);
4458 last_jump_equiv_class = op0_elt;
4461 /* CSE processing for one instruction.
4462 First simplify sources and addresses of all assignments
4463 in the instruction, using previously-computed equivalents values.
4464 Then install the new sources and destinations in the table
4465 of available values.
4467 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4468 the insn. It means that INSN is inside libcall block. In this
4469 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4471 /* Data on one SET contained in the instruction. */
4473 struct set
4475 /* The SET rtx itself. */
4476 rtx rtl;
4477 /* The SET_SRC of the rtx (the original value, if it is changing). */
4478 rtx src;
4479 /* The hash-table element for the SET_SRC of the SET. */
4480 struct table_elt *src_elt;
4481 /* Hash value for the SET_SRC. */
4482 unsigned src_hash;
4483 /* Hash value for the SET_DEST. */
4484 unsigned dest_hash;
4485 /* The SET_DEST, with SUBREG, etc., stripped. */
4486 rtx inner_dest;
4487 /* Nonzero if the SET_SRC is in memory. */
4488 char src_in_memory;
4489 /* Nonzero if the SET_SRC contains something
4490 whose value cannot be predicted and understood. */
4491 char src_volatile;
4492 /* Original machine mode, in case it becomes a CONST_INT. */
4493 enum machine_mode mode;
4494 /* A constant equivalent for SET_SRC, if any. */
4495 rtx src_const;
4496 /* Original SET_SRC value used for libcall notes. */
4497 rtx orig_src;
4498 /* Hash value of constant equivalent for SET_SRC. */
4499 unsigned src_const_hash;
4500 /* Table entry for constant equivalent for SET_SRC, if any. */
4501 struct table_elt *src_const_elt;
4504 static void
4505 cse_insn (insn, libcall_insn)
4506 rtx insn;
4507 rtx libcall_insn;
4509 register rtx x = PATTERN (insn);
4510 register int i;
4511 rtx tem;
4512 register int n_sets = 0;
4514 #ifdef HAVE_cc0
4515 /* Records what this insn does to set CC0. */
4516 rtx this_insn_cc0 = 0;
4517 enum machine_mode this_insn_cc0_mode = VOIDmode;
4518 #endif
4520 rtx src_eqv = 0;
4521 struct table_elt *src_eqv_elt = 0;
4522 int src_eqv_volatile = 0;
4523 int src_eqv_in_memory = 0;
4524 unsigned src_eqv_hash = 0;
4526 struct set *sets = (struct set *) NULL_PTR;
4528 this_insn = insn;
4530 /* Find all the SETs and CLOBBERs in this instruction.
4531 Record all the SETs in the array `set' and count them.
4532 Also determine whether there is a CLOBBER that invalidates
4533 all memory references, or all references at varying addresses. */
4535 if (GET_CODE (insn) == CALL_INSN)
4537 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4538 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4539 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4542 if (GET_CODE (x) == SET)
4544 sets = (struct set *) alloca (sizeof (struct set));
4545 sets[0].rtl = x;
4547 /* Ignore SETs that are unconditional jumps.
4548 They never need cse processing, so this does not hurt.
4549 The reason is not efficiency but rather
4550 so that we can test at the end for instructions
4551 that have been simplified to unconditional jumps
4552 and not be misled by unchanged instructions
4553 that were unconditional jumps to begin with. */
4554 if (SET_DEST (x) == pc_rtx
4555 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4558 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4559 The hard function value register is used only once, to copy to
4560 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4561 Ensure we invalidate the destination register. On the 80386 no
4562 other code would invalidate it since it is a fixed_reg.
4563 We need not check the return of apply_change_group; see canon_reg. */
4565 else if (GET_CODE (SET_SRC (x)) == CALL)
4567 canon_reg (SET_SRC (x), insn);
4568 apply_change_group ();
4569 fold_rtx (SET_SRC (x), insn);
4570 invalidate (SET_DEST (x), VOIDmode);
4572 else
4573 n_sets = 1;
4575 else if (GET_CODE (x) == PARALLEL)
4577 register int lim = XVECLEN (x, 0);
4579 sets = (struct set *) alloca (lim * sizeof (struct set));
4581 /* Find all regs explicitly clobbered in this insn,
4582 and ensure they are not replaced with any other regs
4583 elsewhere in this insn.
4584 When a reg that is clobbered is also used for input,
4585 we should presume that that is for a reason,
4586 and we should not substitute some other register
4587 which is not supposed to be clobbered.
4588 Therefore, this loop cannot be merged into the one below
4589 because a CALL may precede a CLOBBER and refer to the
4590 value clobbered. We must not let a canonicalization do
4591 anything in that case. */
4592 for (i = 0; i < lim; i++)
4594 register rtx y = XVECEXP (x, 0, i);
4595 if (GET_CODE (y) == CLOBBER)
4597 rtx clobbered = XEXP (y, 0);
4599 if (GET_CODE (clobbered) == REG
4600 || GET_CODE (clobbered) == SUBREG)
4601 invalidate (clobbered, VOIDmode);
4602 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4603 || GET_CODE (clobbered) == ZERO_EXTRACT)
4604 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4608 for (i = 0; i < lim; i++)
4610 register rtx y = XVECEXP (x, 0, i);
4611 if (GET_CODE (y) == SET)
4613 /* As above, we ignore unconditional jumps and call-insns and
4614 ignore the result of apply_change_group. */
4615 if (GET_CODE (SET_SRC (y)) == CALL)
4617 canon_reg (SET_SRC (y), insn);
4618 apply_change_group ();
4619 fold_rtx (SET_SRC (y), insn);
4620 invalidate (SET_DEST (y), VOIDmode);
4622 else if (SET_DEST (y) == pc_rtx
4623 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4625 else
4626 sets[n_sets++].rtl = y;
4628 else if (GET_CODE (y) == CLOBBER)
4630 /* If we clobber memory, canon the address.
4631 This does nothing when a register is clobbered
4632 because we have already invalidated the reg. */
4633 if (GET_CODE (XEXP (y, 0)) == MEM)
4634 canon_reg (XEXP (y, 0), NULL_RTX);
4636 else if (GET_CODE (y) == USE
4637 && ! (GET_CODE (XEXP (y, 0)) == REG
4638 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4639 canon_reg (y, NULL_RTX);
4640 else if (GET_CODE (y) == CALL)
4642 /* The result of apply_change_group can be ignored; see
4643 canon_reg. */
4644 canon_reg (y, insn);
4645 apply_change_group ();
4646 fold_rtx (y, insn);
4650 else if (GET_CODE (x) == CLOBBER)
4652 if (GET_CODE (XEXP (x, 0)) == MEM)
4653 canon_reg (XEXP (x, 0), NULL_RTX);
4656 /* Canonicalize a USE of a pseudo register or memory location. */
4657 else if (GET_CODE (x) == USE
4658 && ! (GET_CODE (XEXP (x, 0)) == REG
4659 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4660 canon_reg (XEXP (x, 0), NULL_RTX);
4661 else if (GET_CODE (x) == CALL)
4663 /* The result of apply_change_group can be ignored; see canon_reg. */
4664 canon_reg (x, insn);
4665 apply_change_group ();
4666 fold_rtx (x, insn);
4669 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4670 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4671 is handled specially for this case, and if it isn't set, then there will
4672 be no equivalence for the destination. */
4673 if (n_sets == 1 && REG_NOTES (insn) != 0
4674 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4675 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4676 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4677 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4679 /* Canonicalize sources and addresses of destinations.
4680 We do this in a separate pass to avoid problems when a MATCH_DUP is
4681 present in the insn pattern. In that case, we want to ensure that
4682 we don't break the duplicate nature of the pattern. So we will replace
4683 both operands at the same time. Otherwise, we would fail to find an
4684 equivalent substitution in the loop calling validate_change below.
4686 We used to suppress canonicalization of DEST if it appears in SRC,
4687 but we don't do this any more. */
4689 for (i = 0; i < n_sets; i++)
4691 rtx dest = SET_DEST (sets[i].rtl);
4692 rtx src = SET_SRC (sets[i].rtl);
4693 rtx new = canon_reg (src, insn);
4694 int insn_code;
4696 sets[i].orig_src = src;
4697 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4698 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4699 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4700 || (insn_code = recog_memoized (insn)) < 0
4701 || insn_data[insn_code].n_dups > 0)
4702 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4703 else
4704 SET_SRC (sets[i].rtl) = new;
4706 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4708 validate_change (insn, &XEXP (dest, 1),
4709 canon_reg (XEXP (dest, 1), insn), 1);
4710 validate_change (insn, &XEXP (dest, 2),
4711 canon_reg (XEXP (dest, 2), insn), 1);
4714 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4715 || GET_CODE (dest) == ZERO_EXTRACT
4716 || GET_CODE (dest) == SIGN_EXTRACT)
4717 dest = XEXP (dest, 0);
4719 if (GET_CODE (dest) == MEM)
4720 canon_reg (dest, insn);
4723 /* Now that we have done all the replacements, we can apply the change
4724 group and see if they all work. Note that this will cause some
4725 canonicalizations that would have worked individually not to be applied
4726 because some other canonicalization didn't work, but this should not
4727 occur often.
4729 The result of apply_change_group can be ignored; see canon_reg. */
4731 apply_change_group ();
4733 /* Set sets[i].src_elt to the class each source belongs to.
4734 Detect assignments from or to volatile things
4735 and set set[i] to zero so they will be ignored
4736 in the rest of this function.
4738 Nothing in this loop changes the hash table or the register chains. */
4740 for (i = 0; i < n_sets; i++)
4742 register rtx src, dest;
4743 register rtx src_folded;
4744 register struct table_elt *elt = 0, *p;
4745 enum machine_mode mode;
4746 rtx src_eqv_here;
4747 rtx src_const = 0;
4748 rtx src_related = 0;
4749 struct table_elt *src_const_elt = 0;
4750 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4751 int src_related_cost = 10000, src_elt_cost = 10000;
4752 /* Set non-zero if we need to call force_const_mem on with the
4753 contents of src_folded before using it. */
4754 int src_folded_force_flag = 0;
4756 dest = SET_DEST (sets[i].rtl);
4757 src = SET_SRC (sets[i].rtl);
4759 /* If SRC is a constant that has no machine mode,
4760 hash it with the destination's machine mode.
4761 This way we can keep different modes separate. */
4763 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4764 sets[i].mode = mode;
4766 if (src_eqv)
4768 enum machine_mode eqvmode = mode;
4769 if (GET_CODE (dest) == STRICT_LOW_PART)
4770 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4771 do_not_record = 0;
4772 hash_arg_in_memory = 0;
4773 src_eqv = fold_rtx (src_eqv, insn);
4774 src_eqv_hash = HASH (src_eqv, eqvmode);
4776 /* Find the equivalence class for the equivalent expression. */
4778 if (!do_not_record)
4779 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4781 src_eqv_volatile = do_not_record;
4782 src_eqv_in_memory = hash_arg_in_memory;
4785 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4786 value of the INNER register, not the destination. So it is not
4787 a valid substitution for the source. But save it for later. */
4788 if (GET_CODE (dest) == STRICT_LOW_PART)
4789 src_eqv_here = 0;
4790 else
4791 src_eqv_here = src_eqv;
4793 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4794 simplified result, which may not necessarily be valid. */
4795 src_folded = fold_rtx (src, insn);
4797 #if 0
4798 /* ??? This caused bad code to be generated for the m68k port with -O2.
4799 Suppose src is (CONST_INT -1), and that after truncation src_folded
4800 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4801 At the end we will add src and src_const to the same equivalence
4802 class. We now have 3 and -1 on the same equivalence class. This
4803 causes later instructions to be mis-optimized. */
4804 /* If storing a constant in a bitfield, pre-truncate the constant
4805 so we will be able to record it later. */
4806 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4807 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4809 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4811 if (GET_CODE (src) == CONST_INT
4812 && GET_CODE (width) == CONST_INT
4813 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4814 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4815 src_folded
4816 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4817 << INTVAL (width)) - 1));
4819 #endif
4821 /* Compute SRC's hash code, and also notice if it
4822 should not be recorded at all. In that case,
4823 prevent any further processing of this assignment. */
4824 do_not_record = 0;
4825 hash_arg_in_memory = 0;
4827 sets[i].src = src;
4828 sets[i].src_hash = HASH (src, mode);
4829 sets[i].src_volatile = do_not_record;
4830 sets[i].src_in_memory = hash_arg_in_memory;
4832 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4833 a pseudo that is set more than once, do not record SRC. Using
4834 SRC as a replacement for anything else will be incorrect in that
4835 situation. Note that this usually occurs only for stack slots,
4836 in which case all the RTL would be referring to SRC, so we don't
4837 lose any optimization opportunities by not having SRC in the
4838 hash table. */
4840 if (GET_CODE (src) == MEM
4841 && find_reg_note (insn, REG_EQUIV, src) != 0
4842 && GET_CODE (dest) == REG
4843 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4844 && REG_N_SETS (REGNO (dest)) != 1)
4845 sets[i].src_volatile = 1;
4847 #if 0
4848 /* It is no longer clear why we used to do this, but it doesn't
4849 appear to still be needed. So let's try without it since this
4850 code hurts cse'ing widened ops. */
4851 /* If source is a perverse subreg (such as QI treated as an SI),
4852 treat it as volatile. It may do the work of an SI in one context
4853 where the extra bits are not being used, but cannot replace an SI
4854 in general. */
4855 if (GET_CODE (src) == SUBREG
4856 && (GET_MODE_SIZE (GET_MODE (src))
4857 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4858 sets[i].src_volatile = 1;
4859 #endif
4861 /* Locate all possible equivalent forms for SRC. Try to replace
4862 SRC in the insn with each cheaper equivalent.
4864 We have the following types of equivalents: SRC itself, a folded
4865 version, a value given in a REG_EQUAL note, or a value related
4866 to a constant.
4868 Each of these equivalents may be part of an additional class
4869 of equivalents (if more than one is in the table, they must be in
4870 the same class; we check for this).
4872 If the source is volatile, we don't do any table lookups.
4874 We note any constant equivalent for possible later use in a
4875 REG_NOTE. */
4877 if (!sets[i].src_volatile)
4878 elt = lookup (src, sets[i].src_hash, mode);
4880 sets[i].src_elt = elt;
4882 if (elt && src_eqv_here && src_eqv_elt)
4884 if (elt->first_same_value != src_eqv_elt->first_same_value)
4886 /* The REG_EQUAL is indicating that two formerly distinct
4887 classes are now equivalent. So merge them. */
4888 merge_equiv_classes (elt, src_eqv_elt);
4889 src_eqv_hash = HASH (src_eqv, elt->mode);
4890 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4893 src_eqv_here = 0;
4896 else if (src_eqv_elt)
4897 elt = src_eqv_elt;
4899 /* Try to find a constant somewhere and record it in `src_const'.
4900 Record its table element, if any, in `src_const_elt'. Look in
4901 any known equivalences first. (If the constant is not in the
4902 table, also set `sets[i].src_const_hash'). */
4903 if (elt)
4904 for (p = elt->first_same_value; p; p = p->next_same_value)
4905 if (p->is_const)
4907 src_const = p->exp;
4908 src_const_elt = elt;
4909 break;
4912 if (src_const == 0
4913 && (CONSTANT_P (src_folded)
4914 /* Consider (minus (label_ref L1) (label_ref L2)) as
4915 "constant" here so we will record it. This allows us
4916 to fold switch statements when an ADDR_DIFF_VEC is used. */
4917 || (GET_CODE (src_folded) == MINUS
4918 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4919 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4920 src_const = src_folded, src_const_elt = elt;
4921 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4922 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4924 /* If we don't know if the constant is in the table, get its
4925 hash code and look it up. */
4926 if (src_const && src_const_elt == 0)
4928 sets[i].src_const_hash = HASH (src_const, mode);
4929 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4932 sets[i].src_const = src_const;
4933 sets[i].src_const_elt = src_const_elt;
4935 /* If the constant and our source are both in the table, mark them as
4936 equivalent. Otherwise, if a constant is in the table but the source
4937 isn't, set ELT to it. */
4938 if (src_const_elt && elt
4939 && src_const_elt->first_same_value != elt->first_same_value)
4940 merge_equiv_classes (elt, src_const_elt);
4941 else if (src_const_elt && elt == 0)
4942 elt = src_const_elt;
4944 /* See if there is a register linearly related to a constant
4945 equivalent of SRC. */
4946 if (src_const
4947 && (GET_CODE (src_const) == CONST
4948 || (src_const_elt && src_const_elt->related_value != 0)))
4950 src_related = use_related_value (src_const, src_const_elt);
4951 if (src_related)
4953 struct table_elt *src_related_elt
4954 = lookup (src_related, HASH (src_related, mode), mode);
4955 if (src_related_elt && elt)
4957 if (elt->first_same_value
4958 != src_related_elt->first_same_value)
4959 /* This can occur when we previously saw a CONST
4960 involving a SYMBOL_REF and then see the SYMBOL_REF
4961 twice. Merge the involved classes. */
4962 merge_equiv_classes (elt, src_related_elt);
4964 src_related = 0;
4965 src_related_elt = 0;
4967 else if (src_related_elt && elt == 0)
4968 elt = src_related_elt;
4972 /* See if we have a CONST_INT that is already in a register in a
4973 wider mode. */
4975 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4976 && GET_MODE_CLASS (mode) == MODE_INT
4977 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4979 enum machine_mode wider_mode;
4981 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4982 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4983 && src_related == 0;
4984 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4986 struct table_elt *const_elt
4987 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4989 if (const_elt == 0)
4990 continue;
4992 for (const_elt = const_elt->first_same_value;
4993 const_elt; const_elt = const_elt->next_same_value)
4994 if (GET_CODE (const_elt->exp) == REG)
4996 src_related = gen_lowpart_if_possible (mode,
4997 const_elt->exp);
4998 break;
5003 /* Another possibility is that we have an AND with a constant in
5004 a mode narrower than a word. If so, it might have been generated
5005 as part of an "if" which would narrow the AND. If we already
5006 have done the AND in a wider mode, we can use a SUBREG of that
5007 value. */
5009 if (flag_expensive_optimizations && ! src_related
5010 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5011 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5013 enum machine_mode tmode;
5014 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5016 for (tmode = GET_MODE_WIDER_MODE (mode);
5017 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5018 tmode = GET_MODE_WIDER_MODE (tmode))
5020 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5021 struct table_elt *larger_elt;
5023 if (inner)
5025 PUT_MODE (new_and, tmode);
5026 XEXP (new_and, 0) = inner;
5027 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5028 if (larger_elt == 0)
5029 continue;
5031 for (larger_elt = larger_elt->first_same_value;
5032 larger_elt; larger_elt = larger_elt->next_same_value)
5033 if (GET_CODE (larger_elt->exp) == REG)
5035 src_related
5036 = gen_lowpart_if_possible (mode, larger_elt->exp);
5037 break;
5040 if (src_related)
5041 break;
5046 #ifdef LOAD_EXTEND_OP
5047 /* See if a MEM has already been loaded with a widening operation;
5048 if it has, we can use a subreg of that. Many CISC machines
5049 also have such operations, but this is only likely to be
5050 beneficial these machines. */
5052 if (flag_expensive_optimizations && src_related == 0
5053 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5054 && GET_MODE_CLASS (mode) == MODE_INT
5055 && GET_CODE (src) == MEM && ! do_not_record
5056 && LOAD_EXTEND_OP (mode) != NIL)
5058 enum machine_mode tmode;
5060 /* Set what we are trying to extend and the operation it might
5061 have been extended with. */
5062 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5063 XEXP (memory_extend_rtx, 0) = src;
5065 for (tmode = GET_MODE_WIDER_MODE (mode);
5066 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5067 tmode = GET_MODE_WIDER_MODE (tmode))
5069 struct table_elt *larger_elt;
5071 PUT_MODE (memory_extend_rtx, tmode);
5072 larger_elt = lookup (memory_extend_rtx,
5073 HASH (memory_extend_rtx, tmode), tmode);
5074 if (larger_elt == 0)
5075 continue;
5077 for (larger_elt = larger_elt->first_same_value;
5078 larger_elt; larger_elt = larger_elt->next_same_value)
5079 if (GET_CODE (larger_elt->exp) == REG)
5081 src_related = gen_lowpart_if_possible (mode,
5082 larger_elt->exp);
5083 break;
5086 if (src_related)
5087 break;
5090 #endif /* LOAD_EXTEND_OP */
5092 if (src == src_folded)
5093 src_folded = 0;
5095 /* At this point, ELT, if non-zero, points to a class of expressions
5096 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5097 and SRC_RELATED, if non-zero, each contain additional equivalent
5098 expressions. Prune these latter expressions by deleting expressions
5099 already in the equivalence class.
5101 Check for an equivalent identical to the destination. If found,
5102 this is the preferred equivalent since it will likely lead to
5103 elimination of the insn. Indicate this by placing it in
5104 `src_related'. */
5106 if (elt) elt = elt->first_same_value;
5107 for (p = elt; p; p = p->next_same_value)
5109 enum rtx_code code = GET_CODE (p->exp);
5111 /* If the expression is not valid, ignore it. Then we do not
5112 have to check for validity below. In most cases, we can use
5113 `rtx_equal_p', since canonicalization has already been done. */
5114 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5115 continue;
5117 /* Also skip paradoxical subregs, unless that's what we're
5118 looking for. */
5119 if (code == SUBREG
5120 && (GET_MODE_SIZE (GET_MODE (p->exp))
5121 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5122 && ! (src != 0
5123 && GET_CODE (src) == SUBREG
5124 && GET_MODE (src) == GET_MODE (p->exp)
5125 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5126 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5127 continue;
5129 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5130 src = 0;
5131 else if (src_folded && GET_CODE (src_folded) == code
5132 && rtx_equal_p (src_folded, p->exp))
5133 src_folded = 0;
5134 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5135 && rtx_equal_p (src_eqv_here, p->exp))
5136 src_eqv_here = 0;
5137 else if (src_related && GET_CODE (src_related) == code
5138 && rtx_equal_p (src_related, p->exp))
5139 src_related = 0;
5141 /* This is the same as the destination of the insns, we want
5142 to prefer it. Copy it to src_related. The code below will
5143 then give it a negative cost. */
5144 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5145 src_related = dest;
5149 /* Find the cheapest valid equivalent, trying all the available
5150 possibilities. Prefer items not in the hash table to ones
5151 that are when they are equal cost. Note that we can never
5152 worsen an insn as the current contents will also succeed.
5153 If we find an equivalent identical to the destination, use it as best,
5154 since this insn will probably be eliminated in that case. */
5155 if (src)
5157 if (rtx_equal_p (src, dest))
5158 src_cost = -1;
5159 else
5160 src_cost = COST (src);
5163 if (src_eqv_here)
5165 if (rtx_equal_p (src_eqv_here, dest))
5166 src_eqv_cost = -1;
5167 else
5168 src_eqv_cost = COST (src_eqv_here);
5171 if (src_folded)
5173 if (rtx_equal_p (src_folded, dest))
5174 src_folded_cost = -1;
5175 else
5176 src_folded_cost = COST (src_folded);
5179 if (src_related)
5181 if (rtx_equal_p (src_related, dest))
5182 src_related_cost = -1;
5183 else
5184 src_related_cost = COST (src_related);
5187 /* If this was an indirect jump insn, a known label will really be
5188 cheaper even though it looks more expensive. */
5189 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5190 src_folded = src_const, src_folded_cost = -1;
5192 /* Terminate loop when replacement made. This must terminate since
5193 the current contents will be tested and will always be valid. */
5194 while (1)
5196 rtx trial;
5198 /* Skip invalid entries. */
5199 while (elt && GET_CODE (elt->exp) != REG
5200 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5201 elt = elt->next_same_value;
5203 /* A paradoxical subreg would be bad here: it'll be the right
5204 size, but later may be adjusted so that the upper bits aren't
5205 what we want. So reject it. */
5206 if (elt != 0
5207 && GET_CODE (elt->exp) == SUBREG
5208 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5209 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5210 /* It is okay, though, if the rtx we're trying to match
5211 will ignore any of the bits we can't predict. */
5212 && ! (src != 0
5213 && GET_CODE (src) == SUBREG
5214 && GET_MODE (src) == GET_MODE (elt->exp)
5215 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5216 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5218 elt = elt->next_same_value;
5219 continue;
5222 if (elt) src_elt_cost = elt->cost;
5224 /* Find cheapest and skip it for the next time. For items
5225 of equal cost, use this order:
5226 src_folded, src, src_eqv, src_related and hash table entry. */
5227 if (src_folded_cost <= src_cost
5228 && src_folded_cost <= src_eqv_cost
5229 && src_folded_cost <= src_related_cost
5230 && src_folded_cost <= src_elt_cost)
5232 trial = src_folded, src_folded_cost = 10000;
5233 if (src_folded_force_flag)
5234 trial = force_const_mem (mode, trial);
5236 else if (src_cost <= src_eqv_cost
5237 && src_cost <= src_related_cost
5238 && src_cost <= src_elt_cost)
5239 trial = src, src_cost = 10000;
5240 else if (src_eqv_cost <= src_related_cost
5241 && src_eqv_cost <= src_elt_cost)
5242 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5243 else if (src_related_cost <= src_elt_cost)
5244 trial = copy_rtx (src_related), src_related_cost = 10000;
5245 else
5247 trial = copy_rtx (elt->exp);
5248 elt = elt->next_same_value;
5249 src_elt_cost = 10000;
5252 /* We don't normally have an insn matching (set (pc) (pc)), so
5253 check for this separately here. We will delete such an
5254 insn below.
5256 Tablejump insns contain a USE of the table, so simply replacing
5257 the operand with the constant won't match. This is simply an
5258 unconditional branch, however, and is therefore valid. Just
5259 insert the substitution here and we will delete and re-emit
5260 the insn later. */
5262 if (n_sets == 1 && dest == pc_rtx
5263 && (trial == pc_rtx
5264 || (GET_CODE (trial) == LABEL_REF
5265 && ! condjump_p (insn))))
5267 if (trial == pc_rtx)
5269 SET_SRC (sets[i].rtl) = trial;
5270 cse_jumps_altered = 1;
5271 break;
5274 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5275 INSN_CODE (insn) = -1;
5277 if (NEXT_INSN (insn) != 0
5278 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5279 emit_barrier_after (insn);
5281 cse_jumps_altered = 1;
5282 break;
5285 /* Look for a substitution that makes a valid insn. */
5286 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5288 /* If we just made a substitution inside a libcall, then we
5289 need to make the same substitution in any notes attached
5290 to the RETVAL insn. */
5291 if (libcall_insn
5292 && (GET_CODE (sets[i].orig_src) == REG
5293 || GET_CODE (sets[i].orig_src) == SUBREG
5294 || GET_CODE (sets[i].orig_src) == MEM))
5295 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5296 canon_reg (SET_SRC (sets[i].rtl), insn));
5298 /* The result of apply_change_group can be ignored; see
5299 canon_reg. */
5301 validate_change (insn, &SET_SRC (sets[i].rtl),
5302 canon_reg (SET_SRC (sets[i].rtl), insn),
5304 apply_change_group ();
5305 break;
5308 /* If we previously found constant pool entries for
5309 constants and this is a constant, try making a
5310 pool entry. Put it in src_folded unless we already have done
5311 this since that is where it likely came from. */
5313 else if (constant_pool_entries_cost
5314 && CONSTANT_P (trial)
5315 && ! (GET_CODE (trial) == CONST
5316 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5317 && (src_folded == 0
5318 || (GET_CODE (src_folded) != MEM
5319 && ! src_folded_force_flag))
5320 && GET_MODE_CLASS (mode) != MODE_CC
5321 && mode != VOIDmode)
5323 src_folded_force_flag = 1;
5324 src_folded = trial;
5325 src_folded_cost = constant_pool_entries_cost;
5329 src = SET_SRC (sets[i].rtl);
5331 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5332 However, there is an important exception: If both are registers
5333 that are not the head of their equivalence class, replace SET_SRC
5334 with the head of the class. If we do not do this, we will have
5335 both registers live over a portion of the basic block. This way,
5336 their lifetimes will likely abut instead of overlapping. */
5337 if (GET_CODE (dest) == REG
5338 && REGNO_QTY_VALID_P (REGNO (dest)))
5340 int dest_q = REG_QTY (REGNO (dest));
5341 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5343 if (dest_ent->mode == GET_MODE (dest)
5344 && dest_ent->first_reg != REGNO (dest)
5345 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5346 /* Don't do this if the original insn had a hard reg as
5347 SET_SRC or SET_DEST. */
5348 && (GET_CODE (sets[i].src) != REG
5349 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5350 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5351 /* We can't call canon_reg here because it won't do anything if
5352 SRC is a hard register. */
5354 int src_q = REG_QTY (REGNO (src));
5355 struct qty_table_elem *src_ent = &qty_table[src_q];
5356 int first = src_ent->first_reg;
5357 rtx new_src
5358 = (first >= FIRST_PSEUDO_REGISTER
5359 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5361 /* We must use validate-change even for this, because this
5362 might be a special no-op instruction, suitable only to
5363 tag notes onto. */
5364 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5366 src = new_src;
5367 /* If we had a constant that is cheaper than what we are now
5368 setting SRC to, use that constant. We ignored it when we
5369 thought we could make this into a no-op. */
5370 if (src_const && COST (src_const) < COST (src)
5371 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5373 src = src_const;
5378 /* If we made a change, recompute SRC values. */
5379 if (src != sets[i].src)
5381 cse_altered = 1;
5382 do_not_record = 0;
5383 hash_arg_in_memory = 0;
5384 sets[i].src = src;
5385 sets[i].src_hash = HASH (src, mode);
5386 sets[i].src_volatile = do_not_record;
5387 sets[i].src_in_memory = hash_arg_in_memory;
5388 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5391 /* If this is a single SET, we are setting a register, and we have an
5392 equivalent constant, we want to add a REG_NOTE. We don't want
5393 to write a REG_EQUAL note for a constant pseudo since verifying that
5394 that pseudo hasn't been eliminated is a pain. Such a note also
5395 won't help anything.
5397 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5398 which can be created for a reference to a compile time computable
5399 entry in a jump table. */
5401 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5402 && GET_CODE (src_const) != REG
5403 && ! (GET_CODE (src_const) == CONST
5404 && GET_CODE (XEXP (src_const, 0)) == MINUS
5405 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5406 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5408 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5410 /* Make sure that the rtx is not shared with any other insn. */
5411 src_const = copy_rtx (src_const);
5413 /* Record the actual constant value in a REG_EQUAL note, making
5414 a new one if one does not already exist. */
5415 if (tem)
5416 XEXP (tem, 0) = src_const;
5417 else
5418 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5419 src_const, REG_NOTES (insn));
5421 /* If storing a constant value in a register that
5422 previously held the constant value 0,
5423 record this fact with a REG_WAS_0 note on this insn.
5425 Note that the *register* is required to have previously held 0,
5426 not just any register in the quantity and we must point to the
5427 insn that set that register to zero.
5429 Rather than track each register individually, we just see if
5430 the last set for this quantity was for this register. */
5432 if (REGNO_QTY_VALID_P (REGNO (dest)))
5434 int dest_q = REG_QTY (REGNO (dest));
5435 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5437 if (dest_ent->const_rtx == const0_rtx)
5439 /* See if we previously had a REG_WAS_0 note. */
5440 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5441 rtx const_insn = dest_ent->const_insn;
5443 if ((tem = single_set (const_insn)) != 0
5444 && rtx_equal_p (SET_DEST (tem), dest))
5446 if (note)
5447 XEXP (note, 0) = const_insn;
5448 else
5449 REG_NOTES (insn)
5450 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5451 REG_NOTES (insn));
5457 /* Now deal with the destination. */
5458 do_not_record = 0;
5460 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5461 to the MEM or REG within it. */
5462 while (GET_CODE (dest) == SIGN_EXTRACT
5463 || GET_CODE (dest) == ZERO_EXTRACT
5464 || GET_CODE (dest) == SUBREG
5465 || GET_CODE (dest) == STRICT_LOW_PART)
5466 dest = XEXP (dest, 0);
5468 sets[i].inner_dest = dest;
5470 if (GET_CODE (dest) == MEM)
5472 #ifdef PUSH_ROUNDING
5473 /* Stack pushes invalidate the stack pointer. */
5474 rtx addr = XEXP (dest, 0);
5475 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5476 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5477 && XEXP (addr, 0) == stack_pointer_rtx)
5478 invalidate (stack_pointer_rtx, Pmode);
5479 #endif
5480 dest = fold_rtx (dest, insn);
5483 /* Compute the hash code of the destination now,
5484 before the effects of this instruction are recorded,
5485 since the register values used in the address computation
5486 are those before this instruction. */
5487 sets[i].dest_hash = HASH (dest, mode);
5489 /* Don't enter a bit-field in the hash table
5490 because the value in it after the store
5491 may not equal what was stored, due to truncation. */
5493 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5494 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5496 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5498 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5499 && GET_CODE (width) == CONST_INT
5500 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5501 && ! (INTVAL (src_const)
5502 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5503 /* Exception: if the value is constant,
5504 and it won't be truncated, record it. */
5506 else
5508 /* This is chosen so that the destination will be invalidated
5509 but no new value will be recorded.
5510 We must invalidate because sometimes constant
5511 values can be recorded for bitfields. */
5512 sets[i].src_elt = 0;
5513 sets[i].src_volatile = 1;
5514 src_eqv = 0;
5515 src_eqv_elt = 0;
5519 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5520 the insn. */
5521 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5523 /* One less use of the label this insn used to jump to. */
5524 if (JUMP_LABEL (insn) != 0)
5525 --LABEL_NUSES (JUMP_LABEL (insn));
5526 PUT_CODE (insn, NOTE);
5527 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5528 NOTE_SOURCE_FILE (insn) = 0;
5529 cse_jumps_altered = 1;
5530 /* No more processing for this set. */
5531 sets[i].rtl = 0;
5534 /* If this SET is now setting PC to a label, we know it used to
5535 be a conditional or computed branch. So we see if we can follow
5536 it. If it was a computed branch, delete it and re-emit. */
5537 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5539 /* If this is not in the format for a simple branch and
5540 we are the only SET in it, re-emit it. */
5541 if (! simplejump_p (insn) && n_sets == 1)
5543 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5544 JUMP_LABEL (new) = XEXP (src, 0);
5545 LABEL_NUSES (XEXP (src, 0))++;
5546 insn = new;
5548 else
5549 /* Otherwise, force rerecognition, since it probably had
5550 a different pattern before.
5551 This shouldn't really be necessary, since whatever
5552 changed the source value above should have done this.
5553 Until the right place is found, might as well do this here. */
5554 INSN_CODE (insn) = -1;
5556 never_reached_warning (insn);
5558 /* Now emit a BARRIER after the unconditional jump. Do not bother
5559 deleting any unreachable code, let jump/flow do that. */
5560 if (NEXT_INSN (insn) != 0
5561 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5562 emit_barrier_after (insn);
5564 cse_jumps_altered = 1;
5565 sets[i].rtl = 0;
5568 /* If destination is volatile, invalidate it and then do no further
5569 processing for this assignment. */
5571 else if (do_not_record)
5573 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5574 || GET_CODE (dest) == MEM)
5575 invalidate (dest, VOIDmode);
5576 else if (GET_CODE (dest) == STRICT_LOW_PART
5577 || GET_CODE (dest) == ZERO_EXTRACT)
5578 invalidate (XEXP (dest, 0), GET_MODE (dest));
5579 sets[i].rtl = 0;
5582 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5583 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5585 #ifdef HAVE_cc0
5586 /* If setting CC0, record what it was set to, or a constant, if it
5587 is equivalent to a constant. If it is being set to a floating-point
5588 value, make a COMPARE with the appropriate constant of 0. If we
5589 don't do this, later code can interpret this as a test against
5590 const0_rtx, which can cause problems if we try to put it into an
5591 insn as a floating-point operand. */
5592 if (dest == cc0_rtx)
5594 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5595 this_insn_cc0_mode = mode;
5596 if (FLOAT_MODE_P (mode))
5597 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5598 CONST0_RTX (mode));
5600 #endif
5603 /* Now enter all non-volatile source expressions in the hash table
5604 if they are not already present.
5605 Record their equivalence classes in src_elt.
5606 This way we can insert the corresponding destinations into
5607 the same classes even if the actual sources are no longer in them
5608 (having been invalidated). */
5610 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5611 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5613 register struct table_elt *elt;
5614 register struct table_elt *classp = sets[0].src_elt;
5615 rtx dest = SET_DEST (sets[0].rtl);
5616 enum machine_mode eqvmode = GET_MODE (dest);
5618 if (GET_CODE (dest) == STRICT_LOW_PART)
5620 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5621 classp = 0;
5623 if (insert_regs (src_eqv, classp, 0))
5625 rehash_using_reg (src_eqv);
5626 src_eqv_hash = HASH (src_eqv, eqvmode);
5628 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5629 elt->in_memory = src_eqv_in_memory;
5630 src_eqv_elt = elt;
5632 /* Check to see if src_eqv_elt is the same as a set source which
5633 does not yet have an elt, and if so set the elt of the set source
5634 to src_eqv_elt. */
5635 for (i = 0; i < n_sets; i++)
5636 if (sets[i].rtl && sets[i].src_elt == 0
5637 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5638 sets[i].src_elt = src_eqv_elt;
5641 for (i = 0; i < n_sets; i++)
5642 if (sets[i].rtl && ! sets[i].src_volatile
5643 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5645 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5647 /* REG_EQUAL in setting a STRICT_LOW_PART
5648 gives an equivalent for the entire destination register,
5649 not just for the subreg being stored in now.
5650 This is a more interesting equivalence, so we arrange later
5651 to treat the entire reg as the destination. */
5652 sets[i].src_elt = src_eqv_elt;
5653 sets[i].src_hash = src_eqv_hash;
5655 else
5657 /* Insert source and constant equivalent into hash table, if not
5658 already present. */
5659 register struct table_elt *classp = src_eqv_elt;
5660 register rtx src = sets[i].src;
5661 register rtx dest = SET_DEST (sets[i].rtl);
5662 enum machine_mode mode
5663 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5665 if (sets[i].src_elt == 0)
5667 /* Don't put a hard register source into the table if this is
5668 the last insn of a libcall. In this case, we only need
5669 to put src_eqv_elt in src_elt. */
5670 if (GET_CODE (src) != REG
5671 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5672 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5674 register struct table_elt *elt;
5676 /* Note that these insert_regs calls cannot remove
5677 any of the src_elt's, because they would have failed to
5678 match if not still valid. */
5679 if (insert_regs (src, classp, 0))
5681 rehash_using_reg (src);
5682 sets[i].src_hash = HASH (src, mode);
5684 elt = insert (src, classp, sets[i].src_hash, mode);
5685 elt->in_memory = sets[i].src_in_memory;
5686 sets[i].src_elt = classp = elt;
5688 else
5689 sets[i].src_elt = classp;
5691 if (sets[i].src_const && sets[i].src_const_elt == 0
5692 && src != sets[i].src_const
5693 && ! rtx_equal_p (sets[i].src_const, src))
5694 sets[i].src_elt = insert (sets[i].src_const, classp,
5695 sets[i].src_const_hash, mode);
5698 else if (sets[i].src_elt == 0)
5699 /* If we did not insert the source into the hash table (e.g., it was
5700 volatile), note the equivalence class for the REG_EQUAL value, if any,
5701 so that the destination goes into that class. */
5702 sets[i].src_elt = src_eqv_elt;
5704 invalidate_from_clobbers (x);
5706 /* Some registers are invalidated by subroutine calls. Memory is
5707 invalidated by non-constant calls. */
5709 if (GET_CODE (insn) == CALL_INSN)
5711 if (! CONST_CALL_P (insn))
5712 invalidate_memory ();
5713 invalidate_for_call ();
5716 /* Now invalidate everything set by this instruction.
5717 If a SUBREG or other funny destination is being set,
5718 sets[i].rtl is still nonzero, so here we invalidate the reg
5719 a part of which is being set. */
5721 for (i = 0; i < n_sets; i++)
5722 if (sets[i].rtl)
5724 /* We can't use the inner dest, because the mode associated with
5725 a ZERO_EXTRACT is significant. */
5726 register rtx dest = SET_DEST (sets[i].rtl);
5728 /* Needed for registers to remove the register from its
5729 previous quantity's chain.
5730 Needed for memory if this is a nonvarying address, unless
5731 we have just done an invalidate_memory that covers even those. */
5732 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5733 || GET_CODE (dest) == MEM)
5734 invalidate (dest, VOIDmode);
5735 else if (GET_CODE (dest) == STRICT_LOW_PART
5736 || GET_CODE (dest) == ZERO_EXTRACT)
5737 invalidate (XEXP (dest, 0), GET_MODE (dest));
5740 /* A volatile ASM invalidates everything. */
5741 if (GET_CODE (insn) == INSN
5742 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5743 && MEM_VOLATILE_P (PATTERN (insn)))
5744 flush_hash_table ();
5746 /* Make sure registers mentioned in destinations
5747 are safe for use in an expression to be inserted.
5748 This removes from the hash table
5749 any invalid entry that refers to one of these registers.
5751 We don't care about the return value from mention_regs because
5752 we are going to hash the SET_DEST values unconditionally. */
5754 for (i = 0; i < n_sets; i++)
5756 if (sets[i].rtl)
5758 rtx x = SET_DEST (sets[i].rtl);
5760 if (GET_CODE (x) != REG)
5761 mention_regs (x);
5762 else
5764 /* We used to rely on all references to a register becoming
5765 inaccessible when a register changes to a new quantity,
5766 since that changes the hash code. However, that is not
5767 safe, since after HASH_SIZE new quantities we get a
5768 hash 'collision' of a register with its own invalid
5769 entries. And since SUBREGs have been changed not to
5770 change their hash code with the hash code of the register,
5771 it wouldn't work any longer at all. So we have to check
5772 for any invalid references lying around now.
5773 This code is similar to the REG case in mention_regs,
5774 but it knows that reg_tick has been incremented, and
5775 it leaves reg_in_table as -1 . */
5776 unsigned int regno = REGNO (x);
5777 unsigned int endregno
5778 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5779 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5780 unsigned int i;
5782 for (i = regno; i < endregno; i++)
5784 if (REG_IN_TABLE (i) >= 0)
5786 remove_invalid_refs (i);
5787 REG_IN_TABLE (i) = -1;
5794 /* We may have just removed some of the src_elt's from the hash table.
5795 So replace each one with the current head of the same class. */
5797 for (i = 0; i < n_sets; i++)
5798 if (sets[i].rtl)
5800 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5801 /* If elt was removed, find current head of same class,
5802 or 0 if nothing remains of that class. */
5804 register struct table_elt *elt = sets[i].src_elt;
5806 while (elt && elt->prev_same_value)
5807 elt = elt->prev_same_value;
5809 while (elt && elt->first_same_value == 0)
5810 elt = elt->next_same_value;
5811 sets[i].src_elt = elt ? elt->first_same_value : 0;
5815 /* Now insert the destinations into their equivalence classes. */
5817 for (i = 0; i < n_sets; i++)
5818 if (sets[i].rtl)
5820 register rtx dest = SET_DEST (sets[i].rtl);
5821 rtx inner_dest = sets[i].inner_dest;
5822 register struct table_elt *elt;
5824 /* Don't record value if we are not supposed to risk allocating
5825 floating-point values in registers that might be wider than
5826 memory. */
5827 if ((flag_float_store
5828 && GET_CODE (dest) == MEM
5829 && FLOAT_MODE_P (GET_MODE (dest)))
5830 /* Don't record BLKmode values, because we don't know the
5831 size of it, and can't be sure that other BLKmode values
5832 have the same or smaller size. */
5833 || GET_MODE (dest) == BLKmode
5834 /* Don't record values of destinations set inside a libcall block
5835 since we might delete the libcall. Things should have been set
5836 up so we won't want to reuse such a value, but we play it safe
5837 here. */
5838 || libcall_insn
5839 /* If we didn't put a REG_EQUAL value or a source into the hash
5840 table, there is no point is recording DEST. */
5841 || sets[i].src_elt == 0
5842 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5843 or SIGN_EXTEND, don't record DEST since it can cause
5844 some tracking to be wrong.
5846 ??? Think about this more later. */
5847 || (GET_CODE (dest) == SUBREG
5848 && (GET_MODE_SIZE (GET_MODE (dest))
5849 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5850 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5851 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5852 continue;
5854 /* STRICT_LOW_PART isn't part of the value BEING set,
5855 and neither is the SUBREG inside it.
5856 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5857 if (GET_CODE (dest) == STRICT_LOW_PART)
5858 dest = SUBREG_REG (XEXP (dest, 0));
5860 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5861 /* Registers must also be inserted into chains for quantities. */
5862 if (insert_regs (dest, sets[i].src_elt, 1))
5864 /* If `insert_regs' changes something, the hash code must be
5865 recalculated. */
5866 rehash_using_reg (dest);
5867 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5870 if (GET_CODE (inner_dest) == MEM
5871 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5872 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5873 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5874 Consider the case in which the address of the MEM is
5875 passed to a function, which alters the MEM. Then, if we
5876 later use Y instead of the MEM we'll miss the update. */
5877 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5878 else
5879 elt = insert (dest, sets[i].src_elt,
5880 sets[i].dest_hash, GET_MODE (dest));
5882 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5883 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5884 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5885 0))));
5887 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5888 narrower than M2, and both M1 and M2 are the same number of words,
5889 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5890 make that equivalence as well.
5892 However, BAR may have equivalences for which gen_lowpart_if_possible
5893 will produce a simpler value than gen_lowpart_if_possible applied to
5894 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5895 BAR's equivalences. If we don't get a simplified form, make
5896 the SUBREG. It will not be used in an equivalence, but will
5897 cause two similar assignments to be detected.
5899 Note the loop below will find SUBREG_REG (DEST) since we have
5900 already entered SRC and DEST of the SET in the table. */
5902 if (GET_CODE (dest) == SUBREG
5903 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5904 / UNITS_PER_WORD)
5905 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5906 && (GET_MODE_SIZE (GET_MODE (dest))
5907 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5908 && sets[i].src_elt != 0)
5910 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5911 struct table_elt *elt, *classp = 0;
5913 for (elt = sets[i].src_elt->first_same_value; elt;
5914 elt = elt->next_same_value)
5916 rtx new_src = 0;
5917 unsigned src_hash;
5918 struct table_elt *src_elt;
5920 /* Ignore invalid entries. */
5921 if (GET_CODE (elt->exp) != REG
5922 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5923 continue;
5925 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5926 if (new_src == 0)
5927 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5929 src_hash = HASH (new_src, new_mode);
5930 src_elt = lookup (new_src, src_hash, new_mode);
5932 /* Put the new source in the hash table is if isn't
5933 already. */
5934 if (src_elt == 0)
5936 if (insert_regs (new_src, classp, 0))
5938 rehash_using_reg (new_src);
5939 src_hash = HASH (new_src, new_mode);
5941 src_elt = insert (new_src, classp, src_hash, new_mode);
5942 src_elt->in_memory = elt->in_memory;
5944 else if (classp && classp != src_elt->first_same_value)
5945 /* Show that two things that we've seen before are
5946 actually the same. */
5947 merge_equiv_classes (src_elt, classp);
5949 classp = src_elt->first_same_value;
5950 /* Ignore invalid entries. */
5951 while (classp
5952 && GET_CODE (classp->exp) != REG
5953 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
5954 classp = classp->next_same_value;
5959 /* Special handling for (set REG0 REG1) where REG0 is the
5960 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5961 be used in the sequel, so (if easily done) change this insn to
5962 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5963 that computed their value. Then REG1 will become a dead store
5964 and won't cloud the situation for later optimizations.
5966 Do not make this change if REG1 is a hard register, because it will
5967 then be used in the sequel and we may be changing a two-operand insn
5968 into a three-operand insn.
5970 Also do not do this if we are operating on a copy of INSN.
5972 Also don't do this if INSN ends a libcall; this would cause an unrelated
5973 register to be set in the middle of a libcall, and we then get bad code
5974 if the libcall is deleted. */
5976 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
5977 && NEXT_INSN (PREV_INSN (insn)) == insn
5978 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
5979 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5980 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5982 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5983 struct qty_table_elem *src_ent = &qty_table[src_q];
5985 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5986 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5988 rtx prev = prev_nonnote_insn (insn);
5990 if (prev != 0 && GET_CODE (prev) == INSN
5991 && GET_CODE (PATTERN (prev)) == SET
5992 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
5994 rtx dest = SET_DEST (sets[0].rtl);
5995 rtx src = SET_SRC (sets[0].rtl);
5996 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
5998 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
5999 validate_change (insn, & SET_DEST (sets[0].rtl), src, 1);
6000 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
6001 apply_change_group ();
6003 /* If REG1 was equivalent to a constant, REG0 is not. */
6004 if (note)
6005 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6007 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6008 any REG_WAS_0 note on INSN to PREV. */
6009 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6010 if (note)
6011 remove_note (prev, note);
6013 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6014 if (note)
6016 remove_note (insn, note);
6017 XEXP (note, 1) = REG_NOTES (prev);
6018 REG_NOTES (prev) = note;
6021 /* If INSN has a REG_EQUAL note, and this note mentions
6022 REG0, then we must delete it, because the value in
6023 REG0 has changed. If the note's value is REG1, we must
6024 also delete it because that is now this insn's dest. */
6025 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6026 if (note != 0
6027 && (reg_mentioned_p (dest, XEXP (note, 0))
6028 || rtx_equal_p (src, XEXP (note, 0))))
6029 remove_note (insn, note);
6034 /* If this is a conditional jump insn, record any known equivalences due to
6035 the condition being tested. */
6037 last_jump_equiv_class = 0;
6038 if (GET_CODE (insn) == JUMP_INSN
6039 && n_sets == 1 && GET_CODE (x) == SET
6040 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6041 record_jump_equiv (insn, 0);
6043 #ifdef HAVE_cc0
6044 /* If the previous insn set CC0 and this insn no longer references CC0,
6045 delete the previous insn. Here we use the fact that nothing expects CC0
6046 to be valid over an insn, which is true until the final pass. */
6047 if (prev_insn && GET_CODE (prev_insn) == INSN
6048 && (tem = single_set (prev_insn)) != 0
6049 && SET_DEST (tem) == cc0_rtx
6050 && ! reg_mentioned_p (cc0_rtx, x))
6052 PUT_CODE (prev_insn, NOTE);
6053 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6054 NOTE_SOURCE_FILE (prev_insn) = 0;
6057 prev_insn_cc0 = this_insn_cc0;
6058 prev_insn_cc0_mode = this_insn_cc0_mode;
6059 #endif
6061 prev_insn = insn;
6064 /* Remove from the hash table all expressions that reference memory. */
6066 static void
6067 invalidate_memory ()
6069 register int i;
6070 register struct table_elt *p, *next;
6072 for (i = 0; i < HASH_SIZE; i++)
6073 for (p = table[i]; p; p = next)
6075 next = p->next_same_hash;
6076 if (p->in_memory)
6077 remove_from_table (p, i);
6081 /* If ADDR is an address that implicitly affects the stack pointer, return
6082 1 and update the register tables to show the effect. Else, return 0. */
6084 static int
6085 addr_affects_sp_p (addr)
6086 register rtx addr;
6088 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6089 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6090 && GET_CODE (XEXP (addr, 0)) == REG
6091 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6093 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6094 REG_TICK (STACK_POINTER_REGNUM)++;
6096 /* This should be *very* rare. */
6097 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6098 invalidate (stack_pointer_rtx, VOIDmode);
6100 return 1;
6103 return 0;
6106 /* Perform invalidation on the basis of everything about an insn
6107 except for invalidating the actual places that are SET in it.
6108 This includes the places CLOBBERed, and anything that might
6109 alias with something that is SET or CLOBBERed.
6111 X is the pattern of the insn. */
6113 static void
6114 invalidate_from_clobbers (x)
6115 rtx x;
6117 if (GET_CODE (x) == CLOBBER)
6119 rtx ref = XEXP (x, 0);
6120 if (ref)
6122 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6123 || GET_CODE (ref) == MEM)
6124 invalidate (ref, VOIDmode);
6125 else if (GET_CODE (ref) == STRICT_LOW_PART
6126 || GET_CODE (ref) == ZERO_EXTRACT)
6127 invalidate (XEXP (ref, 0), GET_MODE (ref));
6130 else if (GET_CODE (x) == PARALLEL)
6132 register int i;
6133 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6135 register rtx y = XVECEXP (x, 0, i);
6136 if (GET_CODE (y) == CLOBBER)
6138 rtx ref = XEXP (y, 0);
6139 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6140 || GET_CODE (ref) == MEM)
6141 invalidate (ref, VOIDmode);
6142 else if (GET_CODE (ref) == STRICT_LOW_PART
6143 || GET_CODE (ref) == ZERO_EXTRACT)
6144 invalidate (XEXP (ref, 0), GET_MODE (ref));
6150 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6151 and replace any registers in them with either an equivalent constant
6152 or the canonical form of the register. If we are inside an address,
6153 only do this if the address remains valid.
6155 OBJECT is 0 except when within a MEM in which case it is the MEM.
6157 Return the replacement for X. */
6159 static rtx
6160 cse_process_notes (x, object)
6161 rtx x;
6162 rtx object;
6164 enum rtx_code code = GET_CODE (x);
6165 const char *fmt = GET_RTX_FORMAT (code);
6166 int i;
6168 switch (code)
6170 case CONST_INT:
6171 case CONST:
6172 case SYMBOL_REF:
6173 case LABEL_REF:
6174 case CONST_DOUBLE:
6175 case PC:
6176 case CC0:
6177 case LO_SUM:
6178 return x;
6180 case MEM:
6181 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6182 return x;
6184 case EXPR_LIST:
6185 case INSN_LIST:
6186 if (REG_NOTE_KIND (x) == REG_EQUAL)
6187 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6188 if (XEXP (x, 1))
6189 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6190 return x;
6192 case SIGN_EXTEND:
6193 case ZERO_EXTEND:
6194 case SUBREG:
6196 rtx new = cse_process_notes (XEXP (x, 0), object);
6197 /* We don't substitute VOIDmode constants into these rtx,
6198 since they would impede folding. */
6199 if (GET_MODE (new) != VOIDmode)
6200 validate_change (object, &XEXP (x, 0), new, 0);
6201 return x;
6204 case REG:
6205 i = REG_QTY (REGNO (x));
6207 /* Return a constant or a constant register. */
6208 if (REGNO_QTY_VALID_P (REGNO (x)))
6210 struct qty_table_elem *ent = &qty_table[i];
6212 if (ent->const_rtx != NULL_RTX
6213 && (CONSTANT_P (ent->const_rtx)
6214 || GET_CODE (ent->const_rtx) == REG))
6216 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6217 if (new)
6218 return new;
6222 /* Otherwise, canonicalize this register. */
6223 return canon_reg (x, NULL_RTX);
6225 default:
6226 break;
6229 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6230 if (fmt[i] == 'e')
6231 validate_change (object, &XEXP (x, i),
6232 cse_process_notes (XEXP (x, i), object), 0);
6234 return x;
6237 /* Find common subexpressions between the end test of a loop and the beginning
6238 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6240 Often we have a loop where an expression in the exit test is used
6241 in the body of the loop. For example "while (*p) *q++ = *p++;".
6242 Because of the way we duplicate the loop exit test in front of the loop,
6243 however, we don't detect that common subexpression. This will be caught
6244 when global cse is implemented, but this is a quite common case.
6246 This function handles the most common cases of these common expressions.
6247 It is called after we have processed the basic block ending with the
6248 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6249 jumps to a label used only once. */
6251 static void
6252 cse_around_loop (loop_start)
6253 rtx loop_start;
6255 rtx insn;
6256 int i;
6257 struct table_elt *p;
6259 /* If the jump at the end of the loop doesn't go to the start, we don't
6260 do anything. */
6261 for (insn = PREV_INSN (loop_start);
6262 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6263 insn = PREV_INSN (insn))
6266 if (insn == 0
6267 || GET_CODE (insn) != NOTE
6268 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6269 return;
6271 /* If the last insn of the loop (the end test) was an NE comparison,
6272 we will interpret it as an EQ comparison, since we fell through
6273 the loop. Any equivalences resulting from that comparison are
6274 therefore not valid and must be invalidated. */
6275 if (last_jump_equiv_class)
6276 for (p = last_jump_equiv_class->first_same_value; p;
6277 p = p->next_same_value)
6279 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6280 || (GET_CODE (p->exp) == SUBREG
6281 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6282 invalidate (p->exp, VOIDmode);
6283 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6284 || GET_CODE (p->exp) == ZERO_EXTRACT)
6285 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6288 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6289 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6291 The only thing we do with SET_DEST is invalidate entries, so we
6292 can safely process each SET in order. It is slightly less efficient
6293 to do so, but we only want to handle the most common cases.
6295 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6296 These pseudos won't have valid entries in any of the tables indexed
6297 by register number, such as reg_qty. We avoid out-of-range array
6298 accesses by not processing any instructions created after cse started. */
6300 for (insn = NEXT_INSN (loop_start);
6301 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6302 && INSN_UID (insn) < max_insn_uid
6303 && ! (GET_CODE (insn) == NOTE
6304 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6305 insn = NEXT_INSN (insn))
6307 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6308 && (GET_CODE (PATTERN (insn)) == SET
6309 || GET_CODE (PATTERN (insn)) == CLOBBER))
6310 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6311 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6312 && GET_CODE (PATTERN (insn)) == PARALLEL)
6313 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6314 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6315 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6316 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6317 loop_start);
6321 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6322 since they are done elsewhere. This function is called via note_stores. */
6324 static void
6325 invalidate_skipped_set (dest, set, data)
6326 rtx set;
6327 rtx dest;
6328 void *data ATTRIBUTE_UNUSED;
6330 enum rtx_code code = GET_CODE (dest);
6332 if (code == MEM
6333 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6334 /* There are times when an address can appear varying and be a PLUS
6335 during this scan when it would be a fixed address were we to know
6336 the proper equivalences. So invalidate all memory if there is
6337 a BLKmode or nonscalar memory reference or a reference to a
6338 variable address. */
6339 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6340 || cse_rtx_varies_p (XEXP (dest, 0))))
6342 invalidate_memory ();
6343 return;
6346 if (GET_CODE (set) == CLOBBER
6347 #ifdef HAVE_cc0
6348 || dest == cc0_rtx
6349 #endif
6350 || dest == pc_rtx)
6351 return;
6353 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6354 invalidate (XEXP (dest, 0), GET_MODE (dest));
6355 else if (code == REG || code == SUBREG || code == MEM)
6356 invalidate (dest, VOIDmode);
6359 /* Invalidate all insns from START up to the end of the function or the
6360 next label. This called when we wish to CSE around a block that is
6361 conditionally executed. */
6363 static void
6364 invalidate_skipped_block (start)
6365 rtx start;
6367 rtx insn;
6369 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6370 insn = NEXT_INSN (insn))
6372 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6373 continue;
6375 if (GET_CODE (insn) == CALL_INSN)
6377 if (! CONST_CALL_P (insn))
6378 invalidate_memory ();
6379 invalidate_for_call ();
6382 invalidate_from_clobbers (PATTERN (insn));
6383 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6387 /* If modifying X will modify the value in *DATA (which is really an
6388 `rtx *'), indicate that fact by setting the pointed to value to
6389 NULL_RTX. */
6391 static void
6392 cse_check_loop_start (x, set, data)
6393 rtx x;
6394 rtx set ATTRIBUTE_UNUSED;
6395 void *data;
6397 rtx *cse_check_loop_start_value = (rtx *) data;
6399 if (*cse_check_loop_start_value == NULL_RTX
6400 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6401 return;
6403 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6404 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6405 *cse_check_loop_start_value = NULL_RTX;
6408 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6409 a loop that starts with the label at LOOP_START.
6411 If X is a SET, we see if its SET_SRC is currently in our hash table.
6412 If so, we see if it has a value equal to some register used only in the
6413 loop exit code (as marked by jump.c).
6415 If those two conditions are true, we search backwards from the start of
6416 the loop to see if that same value was loaded into a register that still
6417 retains its value at the start of the loop.
6419 If so, we insert an insn after the load to copy the destination of that
6420 load into the equivalent register and (try to) replace our SET_SRC with that
6421 register.
6423 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6425 static void
6426 cse_set_around_loop (x, insn, loop_start)
6427 rtx x;
6428 rtx insn;
6429 rtx loop_start;
6431 struct table_elt *src_elt;
6433 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6434 are setting PC or CC0 or whose SET_SRC is already a register. */
6435 if (GET_CODE (x) == SET
6436 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6437 && GET_CODE (SET_SRC (x)) != REG)
6439 src_elt = lookup (SET_SRC (x),
6440 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6441 GET_MODE (SET_DEST (x)));
6443 if (src_elt)
6444 for (src_elt = src_elt->first_same_value; src_elt;
6445 src_elt = src_elt->next_same_value)
6446 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6447 && COST (src_elt->exp) < COST (SET_SRC (x)))
6449 rtx p, set;
6451 /* Look for an insn in front of LOOP_START that sets
6452 something in the desired mode to SET_SRC (x) before we hit
6453 a label or CALL_INSN. */
6455 for (p = prev_nonnote_insn (loop_start);
6456 p && GET_CODE (p) != CALL_INSN
6457 && GET_CODE (p) != CODE_LABEL;
6458 p = prev_nonnote_insn (p))
6459 if ((set = single_set (p)) != 0
6460 && GET_CODE (SET_DEST (set)) == REG
6461 && GET_MODE (SET_DEST (set)) == src_elt->mode
6462 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6464 /* We now have to ensure that nothing between P
6465 and LOOP_START modified anything referenced in
6466 SET_SRC (x). We know that nothing within the loop
6467 can modify it, or we would have invalidated it in
6468 the hash table. */
6469 rtx q;
6470 rtx cse_check_loop_start_value = SET_SRC (x);
6471 for (q = p; q != loop_start; q = NEXT_INSN (q))
6472 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6473 note_stores (PATTERN (q),
6474 cse_check_loop_start,
6475 &cse_check_loop_start_value);
6477 /* If nothing was changed and we can replace our
6478 SET_SRC, add an insn after P to copy its destination
6479 to what we will be replacing SET_SRC with. */
6480 if (cse_check_loop_start_value
6481 && validate_change (insn, &SET_SRC (x),
6482 src_elt->exp, 0))
6484 /* If this creates new pseudos, this is unsafe,
6485 because the regno of new pseudo is unsuitable
6486 to index into reg_qty when cse_insn processes
6487 the new insn. Therefore, if a new pseudo was
6488 created, discard this optimization. */
6489 int nregs = max_reg_num ();
6490 rtx move
6491 = gen_move_insn (src_elt->exp, SET_DEST (set));
6492 if (nregs != max_reg_num ())
6494 if (! validate_change (insn, &SET_SRC (x),
6495 SET_SRC (set), 0))
6496 abort ();
6498 else
6499 emit_insn_after (move, p);
6501 break;
6506 /* Deal with the destination of X affecting the stack pointer. */
6507 addr_affects_sp_p (SET_DEST (x));
6509 /* See comment on similar code in cse_insn for explanation of these
6510 tests. */
6511 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6512 || GET_CODE (SET_DEST (x)) == MEM)
6513 invalidate (SET_DEST (x), VOIDmode);
6514 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6515 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6516 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6519 /* Find the end of INSN's basic block and return its range,
6520 the total number of SETs in all the insns of the block, the last insn of the
6521 block, and the branch path.
6523 The branch path indicates which branches should be followed. If a non-zero
6524 path size is specified, the block should be rescanned and a different set
6525 of branches will be taken. The branch path is only used if
6526 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6528 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6529 used to describe the block. It is filled in with the information about
6530 the current block. The incoming structure's branch path, if any, is used
6531 to construct the output branch path. */
6533 void
6534 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6535 rtx insn;
6536 struct cse_basic_block_data *data;
6537 int follow_jumps;
6538 int after_loop;
6539 int skip_blocks;
6541 rtx p = insn, q;
6542 int nsets = 0;
6543 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6544 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6545 int path_size = data->path_size;
6546 int path_entry = 0;
6547 int i;
6549 /* Update the previous branch path, if any. If the last branch was
6550 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6551 shorten the path by one and look at the previous branch. We know that
6552 at least one branch must have been taken if PATH_SIZE is non-zero. */
6553 while (path_size > 0)
6555 if (data->path[path_size - 1].status != NOT_TAKEN)
6557 data->path[path_size - 1].status = NOT_TAKEN;
6558 break;
6560 else
6561 path_size--;
6564 /* If the first instruction is marked with QImode, that means we've
6565 already processed this block. Our caller will look at DATA->LAST
6566 to figure out where to go next. We want to return the next block
6567 in the instruction stream, not some branched-to block somewhere
6568 else. We accomplish this by pretending our called forbid us to
6569 follow jumps, or skip blocks. */
6570 if (GET_MODE (insn) == QImode)
6571 follow_jumps = skip_blocks = 0;
6573 /* Scan to end of this basic block. */
6574 while (p && GET_CODE (p) != CODE_LABEL)
6576 /* Don't cse out the end of a loop. This makes a difference
6577 only for the unusual loops that always execute at least once;
6578 all other loops have labels there so we will stop in any case.
6579 Cse'ing out the end of the loop is dangerous because it
6580 might cause an invariant expression inside the loop
6581 to be reused after the end of the loop. This would make it
6582 hard to move the expression out of the loop in loop.c,
6583 especially if it is one of several equivalent expressions
6584 and loop.c would like to eliminate it.
6586 If we are running after loop.c has finished, we can ignore
6587 the NOTE_INSN_LOOP_END. */
6589 if (! after_loop && GET_CODE (p) == NOTE
6590 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6591 break;
6593 /* Don't cse over a call to setjmp; on some machines (eg vax)
6594 the regs restored by the longjmp come from
6595 a later time than the setjmp. */
6596 if (GET_CODE (p) == NOTE
6597 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6598 break;
6600 /* A PARALLEL can have lots of SETs in it,
6601 especially if it is really an ASM_OPERANDS. */
6602 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6603 && GET_CODE (PATTERN (p)) == PARALLEL)
6604 nsets += XVECLEN (PATTERN (p), 0);
6605 else if (GET_CODE (p) != NOTE)
6606 nsets += 1;
6608 /* Ignore insns made by CSE; they cannot affect the boundaries of
6609 the basic block. */
6611 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6612 high_cuid = INSN_CUID (p);
6613 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6614 low_cuid = INSN_CUID (p);
6616 /* See if this insn is in our branch path. If it is and we are to
6617 take it, do so. */
6618 if (path_entry < path_size && data->path[path_entry].branch == p)
6620 if (data->path[path_entry].status != NOT_TAKEN)
6621 p = JUMP_LABEL (p);
6623 /* Point to next entry in path, if any. */
6624 path_entry++;
6627 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6628 was specified, we haven't reached our maximum path length, there are
6629 insns following the target of the jump, this is the only use of the
6630 jump label, and the target label is preceded by a BARRIER.
6632 Alternatively, we can follow the jump if it branches around a
6633 block of code and there are no other branches into the block.
6634 In this case invalidate_skipped_block will be called to invalidate any
6635 registers set in the block when following the jump. */
6637 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6638 && GET_CODE (p) == JUMP_INSN
6639 && GET_CODE (PATTERN (p)) == SET
6640 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6641 && JUMP_LABEL (p) != 0
6642 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6643 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6645 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6646 if ((GET_CODE (q) != NOTE
6647 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6648 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6649 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6650 break;
6652 /* If we ran into a BARRIER, this code is an extension of the
6653 basic block when the branch is taken. */
6654 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6656 /* Don't allow ourself to keep walking around an
6657 always-executed loop. */
6658 if (next_real_insn (q) == next)
6660 p = NEXT_INSN (p);
6661 continue;
6664 /* Similarly, don't put a branch in our path more than once. */
6665 for (i = 0; i < path_entry; i++)
6666 if (data->path[i].branch == p)
6667 break;
6669 if (i != path_entry)
6670 break;
6672 data->path[path_entry].branch = p;
6673 data->path[path_entry++].status = TAKEN;
6675 /* This branch now ends our path. It was possible that we
6676 didn't see this branch the last time around (when the
6677 insn in front of the target was a JUMP_INSN that was
6678 turned into a no-op). */
6679 path_size = path_entry;
6681 p = JUMP_LABEL (p);
6682 /* Mark block so we won't scan it again later. */
6683 PUT_MODE (NEXT_INSN (p), QImode);
6685 /* Detect a branch around a block of code. */
6686 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6688 register rtx tmp;
6690 if (next_real_insn (q) == next)
6692 p = NEXT_INSN (p);
6693 continue;
6696 for (i = 0; i < path_entry; i++)
6697 if (data->path[i].branch == p)
6698 break;
6700 if (i != path_entry)
6701 break;
6703 /* This is no_labels_between_p (p, q) with an added check for
6704 reaching the end of a function (in case Q precedes P). */
6705 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6706 if (GET_CODE (tmp) == CODE_LABEL)
6707 break;
6709 if (tmp == q)
6711 data->path[path_entry].branch = p;
6712 data->path[path_entry++].status = AROUND;
6714 path_size = path_entry;
6716 p = JUMP_LABEL (p);
6717 /* Mark block so we won't scan it again later. */
6718 PUT_MODE (NEXT_INSN (p), QImode);
6722 p = NEXT_INSN (p);
6725 data->low_cuid = low_cuid;
6726 data->high_cuid = high_cuid;
6727 data->nsets = nsets;
6728 data->last = p;
6730 /* If all jumps in the path are not taken, set our path length to zero
6731 so a rescan won't be done. */
6732 for (i = path_size - 1; i >= 0; i--)
6733 if (data->path[i].status != NOT_TAKEN)
6734 break;
6736 if (i == -1)
6737 data->path_size = 0;
6738 else
6739 data->path_size = path_size;
6741 /* End the current branch path. */
6742 data->path[path_size].branch = 0;
6745 /* Perform cse on the instructions of a function.
6746 F is the first instruction.
6747 NREGS is one plus the highest pseudo-reg number used in the instruction.
6749 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6750 (only if -frerun-cse-after-loop).
6752 Returns 1 if jump_optimize should be redone due to simplifications
6753 in conditional jump instructions. */
6756 cse_main (f, nregs, after_loop, file)
6757 rtx f;
6758 int nregs;
6759 int after_loop;
6760 FILE *file;
6762 struct cse_basic_block_data val;
6763 register rtx insn = f;
6764 register int i;
6766 cse_jumps_altered = 0;
6767 recorded_label_ref = 0;
6768 constant_pool_entries_cost = 0;
6769 val.path_size = 0;
6771 init_recog ();
6772 init_alias_analysis ();
6774 max_reg = nregs;
6776 max_insn_uid = get_max_uid ();
6778 reg_eqv_table = (struct reg_eqv_elem *)
6779 xmalloc (nregs * sizeof (struct reg_eqv_elem));
6781 #ifdef LOAD_EXTEND_OP
6783 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6784 and change the code and mode as appropriate. */
6785 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6786 #endif
6788 /* Discard all the free elements of the previous function
6789 since they are allocated in the temporarily obstack. */
6790 bzero ((char *) table, sizeof table);
6791 free_element_chain = 0;
6792 n_elements_made = 0;
6794 /* Find the largest uid. */
6796 max_uid = get_max_uid ();
6797 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6799 /* Compute the mapping from uids to cuids.
6800 CUIDs are numbers assigned to insns, like uids,
6801 except that cuids increase monotonically through the code.
6802 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6803 between two insns is not affected by -g. */
6805 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6807 if (GET_CODE (insn) != NOTE
6808 || NOTE_LINE_NUMBER (insn) < 0)
6809 INSN_CUID (insn) = ++i;
6810 else
6811 /* Give a line number note the same cuid as preceding insn. */
6812 INSN_CUID (insn) = i;
6815 /* Initialize which registers are clobbered by calls. */
6817 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6819 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6820 if ((call_used_regs[i]
6821 /* Used to check !fixed_regs[i] here, but that isn't safe;
6822 fixed regs are still call-clobbered, and sched can get
6823 confused if they can "live across calls".
6825 The frame pointer is always preserved across calls. The arg
6826 pointer is if it is fixed. The stack pointer usually is, unless
6827 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6828 will be present. If we are generating PIC code, the PIC offset
6829 table register is preserved across calls. */
6831 && i != STACK_POINTER_REGNUM
6832 && i != FRAME_POINTER_REGNUM
6833 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6834 && i != HARD_FRAME_POINTER_REGNUM
6835 #endif
6836 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6837 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6838 #endif
6839 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6840 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6841 #endif
6843 || global_regs[i])
6844 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6846 if (ggc_p)
6847 ggc_push_context ();
6849 /* Loop over basic blocks.
6850 Compute the maximum number of qty's needed for each basic block
6851 (which is 2 for each SET). */
6852 insn = f;
6853 while (insn)
6855 cse_altered = 0;
6856 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6857 flag_cse_skip_blocks);
6859 /* If this basic block was already processed or has no sets, skip it. */
6860 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6862 PUT_MODE (insn, VOIDmode);
6863 insn = (val.last ? NEXT_INSN (val.last) : 0);
6864 val.path_size = 0;
6865 continue;
6868 cse_basic_block_start = val.low_cuid;
6869 cse_basic_block_end = val.high_cuid;
6870 max_qty = val.nsets * 2;
6872 if (file)
6873 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6874 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6875 val.nsets);
6877 /* Make MAX_QTY bigger to give us room to optimize
6878 past the end of this basic block, if that should prove useful. */
6879 if (max_qty < 500)
6880 max_qty = 500;
6882 max_qty += max_reg;
6884 /* If this basic block is being extended by following certain jumps,
6885 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6886 Otherwise, we start after this basic block. */
6887 if (val.path_size > 0)
6888 cse_basic_block (insn, val.last, val.path, 0);
6889 else
6891 int old_cse_jumps_altered = cse_jumps_altered;
6892 rtx temp;
6894 /* When cse changes a conditional jump to an unconditional
6895 jump, we want to reprocess the block, since it will give
6896 us a new branch path to investigate. */
6897 cse_jumps_altered = 0;
6898 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6899 if (cse_jumps_altered == 0
6900 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6901 insn = temp;
6903 cse_jumps_altered |= old_cse_jumps_altered;
6906 if (ggc_p && cse_altered)
6907 ggc_collect ();
6909 #ifdef USE_C_ALLOCA
6910 alloca (0);
6911 #endif
6914 if (ggc_p)
6915 ggc_pop_context ();
6917 if (max_elements_made < n_elements_made)
6918 max_elements_made = n_elements_made;
6920 /* Clean up. */
6921 end_alias_analysis ();
6922 free (uid_cuid);
6923 free (reg_eqv_table);
6925 return cse_jumps_altered || recorded_label_ref;
6928 /* Process a single basic block. FROM and TO and the limits of the basic
6929 block. NEXT_BRANCH points to the branch path when following jumps or
6930 a null path when not following jumps.
6932 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6933 loop. This is true when we are being called for the last time on a
6934 block and this CSE pass is before loop.c. */
6936 static rtx
6937 cse_basic_block (from, to, next_branch, around_loop)
6938 register rtx from, to;
6939 struct branch_path *next_branch;
6940 int around_loop;
6942 register rtx insn;
6943 int to_usage = 0;
6944 rtx libcall_insn = NULL_RTX;
6945 int num_insns = 0;
6947 /* This array is undefined before max_reg, so only allocate
6948 the space actually needed and adjust the start. */
6950 qty_table
6951 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
6952 * sizeof (struct qty_table_elem));
6953 qty_table -= max_reg;
6955 new_basic_block ();
6957 /* TO might be a label. If so, protect it from being deleted. */
6958 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6959 ++LABEL_NUSES (to);
6961 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6963 register enum rtx_code code = GET_CODE (insn);
6965 /* If we have processed 1,000 insns, flush the hash table to
6966 avoid extreme quadratic behavior. We must not include NOTEs
6967 in the count since there may be more of them when generating
6968 debugging information. If we clear the table at different
6969 times, code generated with -g -O might be different than code
6970 generated with -O but not -g.
6972 ??? This is a real kludge and needs to be done some other way.
6973 Perhaps for 2.9. */
6974 if (code != NOTE && num_insns++ > 1000)
6976 flush_hash_table ();
6977 num_insns = 0;
6980 /* See if this is a branch that is part of the path. If so, and it is
6981 to be taken, do so. */
6982 if (next_branch->branch == insn)
6984 enum taken status = next_branch++->status;
6985 if (status != NOT_TAKEN)
6987 if (status == TAKEN)
6988 record_jump_equiv (insn, 1);
6989 else
6990 invalidate_skipped_block (NEXT_INSN (insn));
6992 /* Set the last insn as the jump insn; it doesn't affect cc0.
6993 Then follow this branch. */
6994 #ifdef HAVE_cc0
6995 prev_insn_cc0 = 0;
6996 #endif
6997 prev_insn = insn;
6998 insn = JUMP_LABEL (insn);
6999 continue;
7003 if (GET_MODE (insn) == QImode)
7004 PUT_MODE (insn, VOIDmode);
7006 if (GET_RTX_CLASS (code) == 'i')
7008 rtx p;
7010 /* Process notes first so we have all notes in canonical forms when
7011 looking for duplicate operations. */
7013 if (REG_NOTES (insn))
7014 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7016 /* Track when we are inside in LIBCALL block. Inside such a block,
7017 we do not want to record destinations. The last insn of a
7018 LIBCALL block is not considered to be part of the block, since
7019 its destination is the result of the block and hence should be
7020 recorded. */
7022 if (REG_NOTES (insn) != 0)
7024 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7025 libcall_insn = XEXP (p, 0);
7026 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7027 libcall_insn = 0;
7030 cse_insn (insn, libcall_insn);
7033 /* If INSN is now an unconditional jump, skip to the end of our
7034 basic block by pretending that we just did the last insn in the
7035 basic block. If we are jumping to the end of our block, show
7036 that we can have one usage of TO. */
7038 if (any_uncondjump_p (insn))
7040 if (to == 0)
7042 free (qty_table + max_reg);
7043 return 0;
7046 if (JUMP_LABEL (insn) == to)
7047 to_usage = 1;
7049 /* Maybe TO was deleted because the jump is unconditional.
7050 If so, there is nothing left in this basic block. */
7051 /* ??? Perhaps it would be smarter to set TO
7052 to whatever follows this insn,
7053 and pretend the basic block had always ended here. */
7054 if (INSN_DELETED_P (to))
7055 break;
7057 insn = PREV_INSN (to);
7060 /* See if it is ok to keep on going past the label
7061 which used to end our basic block. Remember that we incremented
7062 the count of that label, so we decrement it here. If we made
7063 a jump unconditional, TO_USAGE will be one; in that case, we don't
7064 want to count the use in that jump. */
7066 if (to != 0 && NEXT_INSN (insn) == to
7067 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7069 struct cse_basic_block_data val;
7070 rtx prev;
7072 insn = NEXT_INSN (to);
7074 /* If TO was the last insn in the function, we are done. */
7075 if (insn == 0)
7077 free (qty_table + max_reg);
7078 return 0;
7081 /* If TO was preceded by a BARRIER we are done with this block
7082 because it has no continuation. */
7083 prev = prev_nonnote_insn (to);
7084 if (prev && GET_CODE (prev) == BARRIER)
7086 free (qty_table + max_reg);
7087 return insn;
7090 /* Find the end of the following block. Note that we won't be
7091 following branches in this case. */
7092 to_usage = 0;
7093 val.path_size = 0;
7094 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7096 /* If the tables we allocated have enough space left
7097 to handle all the SETs in the next basic block,
7098 continue through it. Otherwise, return,
7099 and that block will be scanned individually. */
7100 if (val.nsets * 2 + next_qty > max_qty)
7101 break;
7103 cse_basic_block_start = val.low_cuid;
7104 cse_basic_block_end = val.high_cuid;
7105 to = val.last;
7107 /* Prevent TO from being deleted if it is a label. */
7108 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7109 ++LABEL_NUSES (to);
7111 /* Back up so we process the first insn in the extension. */
7112 insn = PREV_INSN (insn);
7116 if (next_qty > max_qty)
7117 abort ();
7119 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7120 the previous insn is the only insn that branches to the head of a loop,
7121 we can cse into the loop. Don't do this if we changed the jump
7122 structure of a loop unless we aren't going to be following jumps. */
7124 if ((cse_jumps_altered == 0
7125 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7126 && around_loop && to != 0
7127 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7128 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7129 && JUMP_LABEL (PREV_INSN (to)) != 0
7130 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7131 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7133 free (qty_table + max_reg);
7135 return to ? NEXT_INSN (to) : 0;
7138 /* Count the number of times registers are used (not set) in X.
7139 COUNTS is an array in which we accumulate the count, INCR is how much
7140 we count each register usage.
7142 Don't count a usage of DEST, which is the SET_DEST of a SET which
7143 contains X in its SET_SRC. This is because such a SET does not
7144 modify the liveness of DEST. */
7146 static void
7147 count_reg_usage (x, counts, dest, incr)
7148 rtx x;
7149 int *counts;
7150 rtx dest;
7151 int incr;
7153 enum rtx_code code;
7154 const char *fmt;
7155 int i, j;
7157 if (x == 0)
7158 return;
7160 switch (code = GET_CODE (x))
7162 case REG:
7163 if (x != dest)
7164 counts[REGNO (x)] += incr;
7165 return;
7167 case PC:
7168 case CC0:
7169 case CONST:
7170 case CONST_INT:
7171 case CONST_DOUBLE:
7172 case SYMBOL_REF:
7173 case LABEL_REF:
7174 return;
7176 case CLOBBER:
7177 /* If we are clobbering a MEM, mark any registers inside the address
7178 as being used. */
7179 if (GET_CODE (XEXP (x, 0)) == MEM)
7180 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7181 return;
7183 case SET:
7184 /* Unless we are setting a REG, count everything in SET_DEST. */
7185 if (GET_CODE (SET_DEST (x)) != REG)
7186 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7188 /* If SRC has side-effects, then we can't delete this insn, so the
7189 usage of SET_DEST inside SRC counts.
7191 ??? Strictly-speaking, we might be preserving this insn
7192 because some other SET has side-effects, but that's hard
7193 to do and can't happen now. */
7194 count_reg_usage (SET_SRC (x), counts,
7195 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7196 incr);
7197 return;
7199 case CALL_INSN:
7200 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7202 /* ... falls through ... */
7203 case INSN:
7204 case JUMP_INSN:
7205 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7207 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7208 use them. */
7210 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7211 return;
7213 case EXPR_LIST:
7214 case INSN_LIST:
7215 if (REG_NOTE_KIND (x) == REG_EQUAL
7216 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7217 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7218 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7219 return;
7221 default:
7222 break;
7225 fmt = GET_RTX_FORMAT (code);
7226 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7228 if (fmt[i] == 'e')
7229 count_reg_usage (XEXP (x, i), counts, dest, incr);
7230 else if (fmt[i] == 'E')
7231 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7232 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7236 /* Scan all the insns and delete any that are dead; i.e., they store a register
7237 that is never used or they copy a register to itself.
7239 This is used to remove insns made obviously dead by cse, loop or other
7240 optimizations. It improves the heuristics in loop since it won't try to
7241 move dead invariants out of loops or make givs for dead quantities. The
7242 remaining passes of the compilation are also sped up. */
7244 void
7245 delete_trivially_dead_insns (insns, nreg)
7246 rtx insns;
7247 int nreg;
7249 int *counts;
7250 rtx insn, prev;
7251 #ifdef HAVE_cc0
7252 rtx tem;
7253 #endif
7254 int i;
7255 int in_libcall = 0, dead_libcall = 0;
7257 /* First count the number of times each register is used. */
7258 counts = (int *) xcalloc (nreg, sizeof (int));
7259 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7260 count_reg_usage (insn, counts, NULL_RTX, 1);
7262 /* Go from the last insn to the first and delete insns that only set unused
7263 registers or copy a register to itself. As we delete an insn, remove
7264 usage counts for registers it uses.
7266 The first jump optimization pass may leave a real insn as the last
7267 insn in the function. We must not skip that insn or we may end
7268 up deleting code that is not really dead. */
7269 insn = get_last_insn ();
7270 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7271 insn = prev_real_insn (insn);
7273 for ( ; insn; insn = prev)
7275 int live_insn = 0;
7276 rtx note;
7278 prev = prev_real_insn (insn);
7280 /* Don't delete any insns that are part of a libcall block unless
7281 we can delete the whole libcall block.
7283 Flow or loop might get confused if we did that. Remember
7284 that we are scanning backwards. */
7285 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7287 in_libcall = 1;
7288 live_insn = 1;
7289 dead_libcall = 0;
7291 /* See if there's a REG_EQUAL note on this insn and try to
7292 replace the source with the REG_EQUAL expression.
7294 We assume that insns with REG_RETVALs can only be reg->reg
7295 copies at this point. */
7296 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7297 if (note)
7299 rtx set = single_set (insn);
7300 rtx new = simplify_rtx (XEXP (note, 0));
7302 if (!new)
7303 new = XEXP (note, 0);
7305 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7307 remove_note (insn,
7308 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7309 dead_libcall = 1;
7313 else if (in_libcall)
7314 live_insn = ! dead_libcall;
7315 else if (GET_CODE (PATTERN (insn)) == SET)
7317 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7318 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7319 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7320 SET_SRC (PATTERN (insn))))
7322 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7323 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7324 SET_SRC (PATTERN (insn))))
7327 #ifdef HAVE_cc0
7328 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7329 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7330 && ((tem = next_nonnote_insn (insn)) == 0
7331 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7332 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7334 #endif
7335 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7336 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7337 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7338 || side_effects_p (SET_SRC (PATTERN (insn)))
7339 /* An ADDRESSOF expression can turn into a use of the
7340 internal arg pointer, so always consider the
7341 internal arg pointer live. If it is truly dead,
7342 flow will delete the initializing insn. */
7343 || (SET_DEST (PATTERN (insn))
7344 == current_function_internal_arg_pointer))
7345 live_insn = 1;
7347 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7348 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7350 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7352 if (GET_CODE (elt) == SET)
7354 if ((GET_CODE (SET_DEST (elt)) == REG
7355 || GET_CODE (SET_DEST (elt)) == SUBREG)
7356 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7359 #ifdef HAVE_cc0
7360 else if (GET_CODE (SET_DEST (elt)) == CC0
7361 && ! side_effects_p (SET_SRC (elt))
7362 && ((tem = next_nonnote_insn (insn)) == 0
7363 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7364 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7366 #endif
7367 else if (GET_CODE (SET_DEST (elt)) != REG
7368 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7369 || counts[REGNO (SET_DEST (elt))] != 0
7370 || side_effects_p (SET_SRC (elt))
7371 /* An ADDRESSOF expression can turn into a use of the
7372 internal arg pointer, so always consider the
7373 internal arg pointer live. If it is truly dead,
7374 flow will delete the initializing insn. */
7375 || (SET_DEST (elt)
7376 == current_function_internal_arg_pointer))
7377 live_insn = 1;
7379 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7380 live_insn = 1;
7382 else
7383 live_insn = 1;
7385 /* If this is a dead insn, delete it and show registers in it aren't
7386 being used. */
7388 if (! live_insn)
7390 count_reg_usage (insn, counts, NULL_RTX, -1);
7391 delete_insn (insn);
7394 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7396 in_libcall = 0;
7397 dead_libcall = 0;
7401 /* Clean up. */
7402 free (counts);