gcc/ChangeLog
[official-gcc.git] / gcc / resource.c
bloba0fd2ec4e69b5cb17e8d9b88cfaaa2cd9be095ef
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "rtl.h"
26 #include "tm_p.h"
27 #include "hard-reg-set.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
35 #include "params.h"
36 #include "df.h"
38 /* This structure is used to record liveness information at the targets or
39 fallthrough insns of branches. We will most likely need the information
40 at targets again, so save them in a hash table rather than recomputing them
41 each time. */
43 struct target_info
45 int uid; /* INSN_UID of target. */
46 struct target_info *next; /* Next info for same hash bucket. */
47 HARD_REG_SET live_regs; /* Registers live at target. */
48 int block; /* Basic block number containing target. */
49 int bb_tick; /* Generation count of basic block info. */
52 #define TARGET_HASH_PRIME 257
54 /* Indicates what resources are required at the beginning of the epilogue. */
55 static struct resources start_of_epilogue_needs;
57 /* Indicates what resources are required at function end. */
58 static struct resources end_of_function_needs;
60 /* Define the hash table itself. */
61 static struct target_info **target_hash_table = NULL;
63 /* For each basic block, we maintain a generation number of its basic
64 block info, which is updated each time we move an insn from the
65 target of a jump. This is the generation number indexed by block
66 number. */
68 static int *bb_ticks;
70 /* Marks registers possibly live at the current place being scanned by
71 mark_target_live_regs. Also used by update_live_status. */
73 static HARD_REG_SET current_live_regs;
75 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
76 Also only used by the next two functions. */
78 static HARD_REG_SET pending_dead_regs;
80 static void update_live_status (rtx, const_rtx, void *);
81 static int find_basic_block (rtx, int);
82 static rtx next_insn_no_annul (rtx);
83 static rtx find_dead_or_set_registers (rtx, struct resources*,
84 rtx*, int, struct resources,
85 struct resources);
87 /* Utility function called from mark_target_live_regs via note_stores.
88 It deadens any CLOBBERed registers and livens any SET registers. */
90 static void
91 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
93 int first_regno, last_regno;
94 int i;
96 if (!REG_P (dest)
97 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
98 return;
100 if (GET_CODE (dest) == SUBREG)
102 first_regno = subreg_regno (dest);
103 last_regno = first_regno + subreg_nregs (dest);
106 else
108 first_regno = REGNO (dest);
109 last_regno = END_HARD_REGNO (dest);
112 if (GET_CODE (x) == CLOBBER)
113 for (i = first_regno; i < last_regno; i++)
114 CLEAR_HARD_REG_BIT (current_live_regs, i);
115 else
116 for (i = first_regno; i < last_regno; i++)
118 SET_HARD_REG_BIT (current_live_regs, i);
119 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
123 /* Find the number of the basic block with correct live register
124 information that starts closest to INSN. Return -1 if we couldn't
125 find such a basic block or the beginning is more than
126 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
127 an unlimited search.
129 The delay slot filling code destroys the control-flow graph so,
130 instead of finding the basic block containing INSN, we search
131 backwards toward a BARRIER where the live register information is
132 correct. */
134 static int
135 find_basic_block (rtx insn, int search_limit)
137 /* Scan backwards to the previous BARRIER. Then see if we can find a
138 label that starts a basic block. Return the basic block number. */
139 for (insn = prev_nonnote_insn (insn);
140 insn && !BARRIER_P (insn) && search_limit != 0;
141 insn = prev_nonnote_insn (insn), --search_limit)
144 /* The closest BARRIER is too far away. */
145 if (search_limit == 0)
146 return -1;
148 /* The start of the function. */
149 else if (insn == 0)
150 return ENTRY_BLOCK_PTR->next_bb->index;
152 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
153 anything other than a CODE_LABEL or note, we can't find this code. */
154 for (insn = next_nonnote_insn (insn);
155 insn && LABEL_P (insn);
156 insn = next_nonnote_insn (insn))
157 if (BLOCK_FOR_INSN (insn))
158 return BLOCK_FOR_INSN (insn)->index;
160 return -1;
163 /* Similar to next_insn, but ignores insns in the delay slots of
164 an annulled branch. */
166 static rtx
167 next_insn_no_annul (rtx insn)
169 if (insn)
171 /* If INSN is an annulled branch, skip any insns from the target
172 of the branch. */
173 if (JUMP_P (insn)
174 && INSN_ANNULLED_BRANCH_P (insn)
175 && NEXT_INSN (PREV_INSN (insn)) != insn)
177 rtx next = NEXT_INSN (insn);
179 while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next))
180 && INSN_FROM_TARGET_P (next))
182 insn = next;
183 next = NEXT_INSN (insn);
187 insn = NEXT_INSN (insn);
188 if (insn && NONJUMP_INSN_P (insn)
189 && GET_CODE (PATTERN (insn)) == SEQUENCE)
190 insn = XVECEXP (PATTERN (insn), 0, 0);
193 return insn;
196 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
197 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
198 is TRUE, resources used by the called routine will be included for
199 CALL_INSNs. */
201 void
202 mark_referenced_resources (rtx x, struct resources *res,
203 bool include_delayed_effects)
205 enum rtx_code code = GET_CODE (x);
206 int i, j;
207 unsigned int r;
208 const char *format_ptr;
210 /* Handle leaf items for which we set resource flags. Also, special-case
211 CALL, SET and CLOBBER operators. */
212 switch (code)
214 case CONST:
215 CASE_CONST_ANY:
216 case PC:
217 case SYMBOL_REF:
218 case LABEL_REF:
219 return;
221 case SUBREG:
222 if (!REG_P (SUBREG_REG (x)))
223 mark_referenced_resources (SUBREG_REG (x), res, false);
224 else
226 unsigned int regno = subreg_regno (x);
227 unsigned int last_regno = regno + subreg_nregs (x);
229 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
230 for (r = regno; r < last_regno; r++)
231 SET_HARD_REG_BIT (res->regs, r);
233 return;
235 case REG:
236 gcc_assert (HARD_REGISTER_P (x));
237 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
238 return;
240 case MEM:
241 /* If this memory shouldn't change, it really isn't referencing
242 memory. */
243 if (! MEM_READONLY_P (x))
244 res->memory = 1;
245 res->volatil |= MEM_VOLATILE_P (x);
247 /* Mark registers used to access memory. */
248 mark_referenced_resources (XEXP (x, 0), res, false);
249 return;
251 case CC0:
252 res->cc = 1;
253 return;
255 case UNSPEC_VOLATILE:
256 case TRAP_IF:
257 case ASM_INPUT:
258 /* Traditional asm's are always volatile. */
259 res->volatil = 1;
260 break;
262 case ASM_OPERANDS:
263 res->volatil |= MEM_VOLATILE_P (x);
265 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
266 We can not just fall through here since then we would be confused
267 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
268 traditional asms unlike their normal usage. */
270 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
271 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false);
272 return;
274 case CALL:
275 /* The first operand will be a (MEM (xxx)) but doesn't really reference
276 memory. The second operand may be referenced, though. */
277 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false);
278 mark_referenced_resources (XEXP (x, 1), res, false);
279 return;
281 case SET:
282 /* Usually, the first operand of SET is set, not referenced. But
283 registers used to access memory are referenced. SET_DEST is
284 also referenced if it is a ZERO_EXTRACT. */
286 mark_referenced_resources (SET_SRC (x), res, false);
288 x = SET_DEST (x);
289 if (GET_CODE (x) == ZERO_EXTRACT
290 || GET_CODE (x) == STRICT_LOW_PART)
291 mark_referenced_resources (x, res, false);
292 else if (GET_CODE (x) == SUBREG)
293 x = SUBREG_REG (x);
294 if (MEM_P (x))
295 mark_referenced_resources (XEXP (x, 0), res, false);
296 return;
298 case CLOBBER:
299 return;
301 case CALL_INSN:
302 if (include_delayed_effects)
304 /* A CALL references memory, the frame pointer if it exists, the
305 stack pointer, any global registers and any registers given in
306 USE insns immediately in front of the CALL.
308 However, we may have moved some of the parameter loading insns
309 into the delay slot of this CALL. If so, the USE's for them
310 don't count and should be skipped. */
311 rtx insn = PREV_INSN (x);
312 rtx sequence = 0;
313 int seq_size = 0;
314 int i;
316 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
317 if (NEXT_INSN (insn) != x)
319 sequence = PATTERN (NEXT_INSN (insn));
320 seq_size = XVECLEN (sequence, 0);
321 gcc_assert (GET_CODE (sequence) == SEQUENCE);
324 res->memory = 1;
325 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
326 if (frame_pointer_needed)
328 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
329 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
330 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
331 #endif
334 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
335 if (global_regs[i])
336 SET_HARD_REG_BIT (res->regs, i);
338 /* Check for a REG_SETJMP. If it exists, then we must
339 assume that this call can need any register.
341 This is done to be more conservative about how we handle setjmp.
342 We assume that they both use and set all registers. Using all
343 registers ensures that a register will not be considered dead
344 just because it crosses a setjmp call. A register should be
345 considered dead only if the setjmp call returns nonzero. */
346 if (find_reg_note (x, REG_SETJMP, NULL))
347 SET_HARD_REG_SET (res->regs);
350 rtx link;
352 for (link = CALL_INSN_FUNCTION_USAGE (x);
353 link;
354 link = XEXP (link, 1))
355 if (GET_CODE (XEXP (link, 0)) == USE)
357 for (i = 1; i < seq_size; i++)
359 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
360 if (GET_CODE (slot_pat) == SET
361 && rtx_equal_p (SET_DEST (slot_pat),
362 XEXP (XEXP (link, 0), 0)))
363 break;
365 if (i >= seq_size)
366 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
367 res, false);
372 /* ... fall through to other INSN processing ... */
374 case INSN:
375 case JUMP_INSN:
377 #ifdef INSN_REFERENCES_ARE_DELAYED
378 if (! include_delayed_effects
379 && INSN_REFERENCES_ARE_DELAYED (x))
380 return;
381 #endif
383 /* No special processing, just speed up. */
384 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
385 return;
387 default:
388 break;
391 /* Process each sub-expression and flag what it needs. */
392 format_ptr = GET_RTX_FORMAT (code);
393 for (i = 0; i < GET_RTX_LENGTH (code); i++)
394 switch (*format_ptr++)
396 case 'e':
397 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
398 break;
400 case 'E':
401 for (j = 0; j < XVECLEN (x, i); j++)
402 mark_referenced_resources (XVECEXP (x, i, j), res,
403 include_delayed_effects);
404 break;
408 /* A subroutine of mark_target_live_regs. Search forward from TARGET
409 looking for registers that are set before they are used. These are dead.
410 Stop after passing a few conditional jumps, and/or a small
411 number of unconditional branches. */
413 static rtx
414 find_dead_or_set_registers (rtx target, struct resources *res,
415 rtx *jump_target, int jump_count,
416 struct resources set, struct resources needed)
418 HARD_REG_SET scratch;
419 rtx insn, next;
420 rtx jump_insn = 0;
421 int i;
423 for (insn = target; insn; insn = next)
425 rtx this_jump_insn = insn;
427 next = NEXT_INSN (insn);
429 /* If this instruction can throw an exception, then we don't
430 know where we might end up next. That means that we have to
431 assume that whatever we have already marked as live really is
432 live. */
433 if (can_throw_internal (insn))
434 break;
436 switch (GET_CODE (insn))
438 case CODE_LABEL:
439 /* After a label, any pending dead registers that weren't yet
440 used can be made dead. */
441 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
442 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
443 CLEAR_HARD_REG_SET (pending_dead_regs);
445 continue;
447 case BARRIER:
448 case NOTE:
449 continue;
451 case INSN:
452 if (GET_CODE (PATTERN (insn)) == USE)
454 /* If INSN is a USE made by update_block, we care about the
455 underlying insn. Any registers set by the underlying insn
456 are live since the insn is being done somewhere else. */
457 if (INSN_P (XEXP (PATTERN (insn), 0)))
458 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
459 MARK_SRC_DEST_CALL);
461 /* All other USE insns are to be ignored. */
462 continue;
464 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
465 continue;
466 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
468 /* An unconditional jump can be used to fill the delay slot
469 of a call, so search for a JUMP_INSN in any position. */
470 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
472 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
473 if (JUMP_P (this_jump_insn))
474 break;
478 default:
479 break;
482 if (JUMP_P (this_jump_insn))
484 if (jump_count++ < 10)
486 if (any_uncondjump_p (this_jump_insn)
487 || ANY_RETURN_P (PATTERN (this_jump_insn)))
489 next = JUMP_LABEL (this_jump_insn);
490 if (ANY_RETURN_P (next))
491 next = NULL_RTX;
492 if (jump_insn == 0)
494 jump_insn = insn;
495 if (jump_target)
496 *jump_target = JUMP_LABEL (this_jump_insn);
499 else if (any_condjump_p (this_jump_insn))
501 struct resources target_set, target_res;
502 struct resources fallthrough_res;
504 /* We can handle conditional branches here by following
505 both paths, and then IOR the results of the two paths
506 together, which will give us registers that are dead
507 on both paths. Since this is expensive, we give it
508 a much higher cost than unconditional branches. The
509 cost was chosen so that we will follow at most 1
510 conditional branch. */
512 jump_count += 4;
513 if (jump_count >= 10)
514 break;
516 mark_referenced_resources (insn, &needed, true);
518 /* For an annulled branch, mark_set_resources ignores slots
519 filled by instructions from the target. This is correct
520 if the branch is not taken. Since we are following both
521 paths from the branch, we must also compute correct info
522 if the branch is taken. We do this by inverting all of
523 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
524 and then inverting the INSN_FROM_TARGET_P bits again. */
526 if (GET_CODE (PATTERN (insn)) == SEQUENCE
527 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
529 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
530 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
531 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
533 target_set = set;
534 mark_set_resources (insn, &target_set, 0,
535 MARK_SRC_DEST_CALL);
537 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
538 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
539 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
541 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
543 else
545 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
546 target_set = set;
549 target_res = *res;
550 COPY_HARD_REG_SET (scratch, target_set.regs);
551 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
552 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
554 fallthrough_res = *res;
555 COPY_HARD_REG_SET (scratch, set.regs);
556 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
557 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
559 if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
560 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
561 &target_res, 0, jump_count,
562 target_set, needed);
563 find_dead_or_set_registers (next,
564 &fallthrough_res, 0, jump_count,
565 set, needed);
566 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
567 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
568 break;
570 else
571 break;
573 else
575 /* Don't try this optimization if we expired our jump count
576 above, since that would mean there may be an infinite loop
577 in the function being compiled. */
578 jump_insn = 0;
579 break;
583 mark_referenced_resources (insn, &needed, true);
584 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
586 COPY_HARD_REG_SET (scratch, set.regs);
587 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
588 AND_COMPL_HARD_REG_SET (res->regs, scratch);
591 return jump_insn;
594 /* Given X, a part of an insn, and a pointer to a `struct resource',
595 RES, indicate which resources are modified by the insn. If
596 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
597 set by the called routine.
599 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
600 objects are being referenced instead of set.
602 We never mark the insn as modifying the condition code unless it explicitly
603 SETs CC0 even though this is not totally correct. The reason for this is
604 that we require a SET of CC0 to immediately precede the reference to CC0.
605 So if some other insn sets CC0 as a side-effect, we know it cannot affect
606 our computation and thus may be placed in a delay slot. */
608 void
609 mark_set_resources (rtx x, struct resources *res, int in_dest,
610 enum mark_resource_type mark_type)
612 enum rtx_code code;
613 int i, j;
614 unsigned int r;
615 const char *format_ptr;
617 restart:
619 code = GET_CODE (x);
621 switch (code)
623 case NOTE:
624 case BARRIER:
625 case CODE_LABEL:
626 case USE:
627 CASE_CONST_ANY:
628 case LABEL_REF:
629 case SYMBOL_REF:
630 case CONST:
631 case PC:
632 /* These don't set any resources. */
633 return;
635 case CC0:
636 if (in_dest)
637 res->cc = 1;
638 return;
640 case CALL_INSN:
641 /* Called routine modifies the condition code, memory, any registers
642 that aren't saved across calls, global registers and anything
643 explicitly CLOBBERed immediately after the CALL_INSN. */
645 if (mark_type == MARK_SRC_DEST_CALL)
647 rtx link;
649 res->cc = res->memory = 1;
651 IOR_HARD_REG_SET (res->regs, regs_invalidated_by_call);
653 for (link = CALL_INSN_FUNCTION_USAGE (x);
654 link; link = XEXP (link, 1))
655 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
656 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
657 MARK_SRC_DEST);
659 /* Check for a REG_SETJMP. If it exists, then we must
660 assume that this call can clobber any register. */
661 if (find_reg_note (x, REG_SETJMP, NULL))
662 SET_HARD_REG_SET (res->regs);
665 /* ... and also what its RTL says it modifies, if anything. */
667 case JUMP_INSN:
668 case INSN:
670 /* An insn consisting of just a CLOBBER (or USE) is just for flow
671 and doesn't actually do anything, so we ignore it. */
673 #ifdef INSN_SETS_ARE_DELAYED
674 if (mark_type != MARK_SRC_DEST_CALL
675 && INSN_SETS_ARE_DELAYED (x))
676 return;
677 #endif
679 x = PATTERN (x);
680 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
681 goto restart;
682 return;
684 case SET:
685 /* If the source of a SET is a CALL, this is actually done by
686 the called routine. So only include it if we are to include the
687 effects of the calling routine. */
689 mark_set_resources (SET_DEST (x), res,
690 (mark_type == MARK_SRC_DEST_CALL
691 || GET_CODE (SET_SRC (x)) != CALL),
692 mark_type);
694 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
695 return;
697 case CLOBBER:
698 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
699 return;
701 case SEQUENCE:
703 rtx control = XVECEXP (x, 0, 0);
704 bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control);
706 mark_set_resources (control, res, 0, mark_type);
707 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
709 rtx elt = XVECEXP (x, 0, i);
710 if (!annul_p && INSN_FROM_TARGET_P (elt))
711 mark_set_resources (elt, res, 0, mark_type);
714 return;
716 case POST_INC:
717 case PRE_INC:
718 case POST_DEC:
719 case PRE_DEC:
720 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
721 return;
723 case PRE_MODIFY:
724 case POST_MODIFY:
725 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
726 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
727 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
728 return;
730 case SIGN_EXTRACT:
731 case ZERO_EXTRACT:
732 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
733 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
734 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
735 return;
737 case MEM:
738 if (in_dest)
740 res->memory = 1;
741 res->volatil |= MEM_VOLATILE_P (x);
744 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
745 return;
747 case SUBREG:
748 if (in_dest)
750 if (!REG_P (SUBREG_REG (x)))
751 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
752 else
754 unsigned int regno = subreg_regno (x);
755 unsigned int last_regno = regno + subreg_nregs (x);
757 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
758 for (r = regno; r < last_regno; r++)
759 SET_HARD_REG_BIT (res->regs, r);
762 return;
764 case REG:
765 if (in_dest)
767 gcc_assert (HARD_REGISTER_P (x));
768 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
770 return;
772 case UNSPEC_VOLATILE:
773 case ASM_INPUT:
774 /* Traditional asm's are always volatile. */
775 res->volatil = 1;
776 return;
778 case TRAP_IF:
779 res->volatil = 1;
780 break;
782 case ASM_OPERANDS:
783 res->volatil |= MEM_VOLATILE_P (x);
785 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
786 We can not just fall through here since then we would be confused
787 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
788 traditional asms unlike their normal usage. */
790 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
791 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
792 MARK_SRC_DEST);
793 return;
795 default:
796 break;
799 /* Process each sub-expression and flag what it needs. */
800 format_ptr = GET_RTX_FORMAT (code);
801 for (i = 0; i < GET_RTX_LENGTH (code); i++)
802 switch (*format_ptr++)
804 case 'e':
805 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
806 break;
808 case 'E':
809 for (j = 0; j < XVECLEN (x, i); j++)
810 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
811 break;
815 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
817 static bool
818 return_insn_p (const_rtx insn)
820 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
821 return true;
823 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
824 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
826 return false;
829 /* Set the resources that are live at TARGET.
831 If TARGET is zero, we refer to the end of the current function and can
832 return our precomputed value.
834 Otherwise, we try to find out what is live by consulting the basic block
835 information. This is tricky, because we must consider the actions of
836 reload and jump optimization, which occur after the basic block information
837 has been computed.
839 Accordingly, we proceed as follows::
841 We find the previous BARRIER and look at all immediately following labels
842 (with no intervening active insns) to see if any of them start a basic
843 block. If we hit the start of the function first, we use block 0.
845 Once we have found a basic block and a corresponding first insn, we can
846 accurately compute the live status (by starting at a label following a
847 BARRIER, we are immune to actions taken by reload and jump.) Then we
848 scan all insns between that point and our target. For each CLOBBER (or
849 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate
850 registers are dead. For a SET, mark them as live.
852 We have to be careful when using REG_DEAD notes because they are not
853 updated by such things as find_equiv_reg. So keep track of registers
854 marked as dead that haven't been assigned to, and mark them dead at the
855 next CODE_LABEL since reload and jump won't propagate values across labels.
857 If we cannot find the start of a basic block (should be a very rare
858 case, if it can happen at all), mark everything as potentially live.
860 Next, scan forward from TARGET looking for things set or clobbered
861 before they are used. These are not live.
863 Because we can be called many times on the same target, save our results
864 in a hash table indexed by INSN_UID. This is only done if the function
865 init_resource_info () was invoked before we are called. */
867 void
868 mark_target_live_regs (rtx insns, rtx target, struct resources *res)
870 int b = -1;
871 unsigned int i;
872 struct target_info *tinfo = NULL;
873 rtx insn;
874 rtx jump_insn = 0;
875 rtx jump_target;
876 HARD_REG_SET scratch;
877 struct resources set, needed;
879 /* Handle end of function. */
880 if (target == 0 || ANY_RETURN_P (target))
882 *res = end_of_function_needs;
883 return;
886 /* Handle return insn. */
887 else if (return_insn_p (target))
889 *res = end_of_function_needs;
890 mark_referenced_resources (target, res, false);
891 return;
894 /* We have to assume memory is needed, but the CC isn't. */
895 res->memory = 1;
896 res->volatil = 0;
897 res->cc = 0;
899 /* See if we have computed this value already. */
900 if (target_hash_table != NULL)
902 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
903 tinfo; tinfo = tinfo->next)
904 if (tinfo->uid == INSN_UID (target))
905 break;
907 /* Start by getting the basic block number. If we have saved
908 information, we can get it from there unless the insn at the
909 start of the basic block has been deleted. */
910 if (tinfo && tinfo->block != -1
911 && ! INSN_DELETED_P (BB_HEAD (BASIC_BLOCK (tinfo->block))))
912 b = tinfo->block;
915 if (b == -1)
916 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
918 if (target_hash_table != NULL)
920 if (tinfo)
922 /* If the information is up-to-date, use it. Otherwise, we will
923 update it below. */
924 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
926 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
927 return;
930 else
932 /* Allocate a place to put our results and chain it into the
933 hash table. */
934 tinfo = XNEW (struct target_info);
935 tinfo->uid = INSN_UID (target);
936 tinfo->block = b;
937 tinfo->next
938 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
939 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
943 CLEAR_HARD_REG_SET (pending_dead_regs);
945 /* If we found a basic block, get the live registers from it and update
946 them with anything set or killed between its start and the insn before
947 TARGET; this custom life analysis is really about registers so we need
948 to use the LR problem. Otherwise, we must assume everything is live. */
949 if (b != -1)
951 regset regs_live = DF_LR_IN (BASIC_BLOCK (b));
952 rtx start_insn, stop_insn;
954 /* Compute hard regs live at start of block. */
955 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
957 /* Get starting and ending insn, handling the case where each might
958 be a SEQUENCE. */
959 start_insn = (b == ENTRY_BLOCK_PTR->next_bb->index ?
960 insns : BB_HEAD (BASIC_BLOCK (b)));
961 stop_insn = target;
963 if (NONJUMP_INSN_P (start_insn)
964 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
965 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
967 if (NONJUMP_INSN_P (stop_insn)
968 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
969 stop_insn = next_insn (PREV_INSN (stop_insn));
971 for (insn = start_insn; insn != stop_insn;
972 insn = next_insn_no_annul (insn))
974 rtx link;
975 rtx real_insn = insn;
976 enum rtx_code code = GET_CODE (insn);
978 if (DEBUG_INSN_P (insn))
979 continue;
981 /* If this insn is from the target of a branch, it isn't going to
982 be used in the sequel. If it is used in both cases, this
983 test will not be true. */
984 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
985 && INSN_FROM_TARGET_P (insn))
986 continue;
988 /* If this insn is a USE made by update_block, we care about the
989 underlying insn. */
990 if (code == INSN
991 && GET_CODE (PATTERN (insn)) == USE
992 && INSN_P (XEXP (PATTERN (insn), 0)))
993 real_insn = XEXP (PATTERN (insn), 0);
995 if (CALL_P (real_insn))
997 /* CALL clobbers all call-used regs that aren't fixed except
998 sp, ap, and fp. Do this before setting the result of the
999 call live. */
1000 AND_COMPL_HARD_REG_SET (current_live_regs,
1001 regs_invalidated_by_call);
1003 /* A CALL_INSN sets any global register live, since it may
1004 have been modified by the call. */
1005 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1006 if (global_regs[i])
1007 SET_HARD_REG_BIT (current_live_regs, i);
1010 /* Mark anything killed in an insn to be deadened at the next
1011 label. Ignore USE insns; the only REG_DEAD notes will be for
1012 parameters. But they might be early. A CALL_INSN will usually
1013 clobber registers used for parameters. It isn't worth bothering
1014 with the unlikely case when it won't. */
1015 if ((NONJUMP_INSN_P (real_insn)
1016 && GET_CODE (PATTERN (real_insn)) != USE
1017 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1018 || JUMP_P (real_insn)
1019 || CALL_P (real_insn))
1021 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1022 if (REG_NOTE_KIND (link) == REG_DEAD
1023 && REG_P (XEXP (link, 0))
1024 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1025 add_to_hard_reg_set (&pending_dead_regs,
1026 GET_MODE (XEXP (link, 0)),
1027 REGNO (XEXP (link, 0)));
1029 note_stores (PATTERN (real_insn), update_live_status, NULL);
1031 /* If any registers were unused after this insn, kill them.
1032 These notes will always be accurate. */
1033 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1034 if (REG_NOTE_KIND (link) == REG_UNUSED
1035 && REG_P (XEXP (link, 0))
1036 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1037 remove_from_hard_reg_set (&current_live_regs,
1038 GET_MODE (XEXP (link, 0)),
1039 REGNO (XEXP (link, 0)));
1042 else if (LABEL_P (real_insn))
1044 basic_block bb;
1046 /* A label clobbers the pending dead registers since neither
1047 reload nor jump will propagate a value across a label. */
1048 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1049 CLEAR_HARD_REG_SET (pending_dead_regs);
1051 /* We must conservatively assume that all registers that used
1052 to be live here still are. The fallthrough edge may have
1053 left a live register uninitialized. */
1054 bb = BLOCK_FOR_INSN (real_insn);
1055 if (bb)
1057 HARD_REG_SET extra_live;
1059 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
1060 IOR_HARD_REG_SET (current_live_regs, extra_live);
1064 /* The beginning of the epilogue corresponds to the end of the
1065 RTL chain when there are no epilogue insns. Certain resources
1066 are implicitly required at that point. */
1067 else if (NOTE_P (real_insn)
1068 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1069 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1072 COPY_HARD_REG_SET (res->regs, current_live_regs);
1073 if (tinfo != NULL)
1075 tinfo->block = b;
1076 tinfo->bb_tick = bb_ticks[b];
1079 else
1080 /* We didn't find the start of a basic block. Assume everything
1081 in use. This should happen only extremely rarely. */
1082 SET_HARD_REG_SET (res->regs);
1084 CLEAR_RESOURCE (&set);
1085 CLEAR_RESOURCE (&needed);
1087 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1088 set, needed);
1090 /* If we hit an unconditional branch, we have another way of finding out
1091 what is live: we can see what is live at the branch target and include
1092 anything used but not set before the branch. We add the live
1093 resources found using the test below to those found until now. */
1095 if (jump_insn)
1097 struct resources new_resources;
1098 rtx stop_insn = next_active_insn (jump_insn);
1100 if (!ANY_RETURN_P (jump_target))
1101 jump_target = next_active_insn (jump_target);
1102 mark_target_live_regs (insns, jump_target, &new_resources);
1103 CLEAR_RESOURCE (&set);
1104 CLEAR_RESOURCE (&needed);
1106 /* Include JUMP_INSN in the needed registers. */
1107 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1109 mark_referenced_resources (insn, &needed, true);
1111 COPY_HARD_REG_SET (scratch, needed.regs);
1112 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1113 IOR_HARD_REG_SET (new_resources.regs, scratch);
1115 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1118 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1121 if (tinfo != NULL)
1123 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1127 /* Initialize the resources required by mark_target_live_regs ().
1128 This should be invoked before the first call to mark_target_live_regs. */
1130 void
1131 init_resource_info (rtx epilogue_insn)
1133 int i;
1134 basic_block bb;
1136 /* Indicate what resources are required to be valid at the end of the current
1137 function. The condition code never is and memory always is.
1138 The stack pointer is needed unless EXIT_IGNORE_STACK is true
1139 and there is an epilogue that restores the original stack pointer
1140 from the frame pointer. Registers used to return the function value
1141 are needed. Registers holding global variables are needed. */
1143 end_of_function_needs.cc = 0;
1144 end_of_function_needs.memory = 1;
1145 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1147 if (frame_pointer_needed)
1149 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1150 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
1151 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1152 #endif
1154 if (!(frame_pointer_needed
1155 && EXIT_IGNORE_STACK
1156 && epilogue_insn
1157 && !crtl->sp_is_unchanging))
1158 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1160 if (crtl->return_rtx != 0)
1161 mark_referenced_resources (crtl->return_rtx,
1162 &end_of_function_needs, true);
1164 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1165 if (global_regs[i]
1166 #ifdef EPILOGUE_USES
1167 || EPILOGUE_USES (i)
1168 #endif
1170 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1172 /* The registers required to be live at the end of the function are
1173 represented in the flow information as being dead just prior to
1174 reaching the end of the function. For example, the return of a value
1175 might be represented by a USE of the return register immediately
1176 followed by an unconditional jump to the return label where the
1177 return label is the end of the RTL chain. The end of the RTL chain
1178 is then taken to mean that the return register is live.
1180 This sequence is no longer maintained when epilogue instructions are
1181 added to the RTL chain. To reconstruct the original meaning, the
1182 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1183 point where these registers become live (start_of_epilogue_needs).
1184 If epilogue instructions are present, the registers set by those
1185 instructions won't have been processed by flow. Thus, those
1186 registers are additionally required at the end of the RTL chain
1187 (end_of_function_needs). */
1189 start_of_epilogue_needs = end_of_function_needs;
1191 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1193 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1194 MARK_SRC_DEST_CALL);
1195 if (return_insn_p (epilogue_insn))
1196 break;
1199 /* Allocate and initialize the tables used by mark_target_live_regs. */
1200 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
1201 bb_ticks = XCNEWVEC (int, last_basic_block);
1203 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */
1204 FOR_EACH_BB (bb)
1205 if (LABEL_P (BB_HEAD (bb)))
1206 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
1209 /* Free up the resources allocated to mark_target_live_regs (). This
1210 should be invoked after the last call to mark_target_live_regs (). */
1212 void
1213 free_resource_info (void)
1215 basic_block bb;
1217 if (target_hash_table != NULL)
1219 int i;
1221 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1223 struct target_info *ti = target_hash_table[i];
1225 while (ti)
1227 struct target_info *next = ti->next;
1228 free (ti);
1229 ti = next;
1233 free (target_hash_table);
1234 target_hash_table = NULL;
1237 if (bb_ticks != NULL)
1239 free (bb_ticks);
1240 bb_ticks = NULL;
1243 FOR_EACH_BB (bb)
1244 if (LABEL_P (BB_HEAD (bb)))
1245 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
1248 /* Clear any hashed information that we have stored for INSN. */
1250 void
1251 clear_hashed_info_for_insn (rtx insn)
1253 struct target_info *tinfo;
1255 if (target_hash_table != NULL)
1257 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1258 tinfo; tinfo = tinfo->next)
1259 if (tinfo->uid == INSN_UID (insn))
1260 break;
1262 if (tinfo)
1263 tinfo->block = -1;
1267 /* Increment the tick count for the basic block that contains INSN. */
1269 void
1270 incr_ticks_for_insn (rtx insn)
1272 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1274 if (b != -1)
1275 bb_ticks[b]++;
1278 /* Add TRIAL to the set of resources used at the end of the current
1279 function. */
1280 void
1281 mark_end_of_function_resources (rtx trial, bool include_delayed_effects)
1283 mark_referenced_resources (trial, &end_of_function_needs,
1284 include_delayed_effects);