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[official-gcc.git] / gcc / reorg.c
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1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2013 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
116 #include "regs.h"
117 #include "recog.h"
118 #include "flags.h"
119 #include "obstack.h"
120 #include "insn-attr.h"
121 #include "resource.h"
122 #include "except.h"
123 #include "params.h"
124 #include "target.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
128 #ifdef DELAY_SLOTS
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
132 #endif
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
135 #endif
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
145 static rtx
146 skip_consecutive_labels (rtx label)
148 rtx insn;
150 if (label && ANY_RETURN_P (label))
151 return label;
153 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
154 if (LABEL_P (insn))
155 label = insn;
157 return label;
160 #ifdef HAVE_cc0
161 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
162 and REG_CC_USER notes so we can find it. */
164 static void
165 link_cc0_insns (rtx insn)
167 rtx user = next_nonnote_insn (insn);
169 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
170 user = XVECEXP (PATTERN (user), 0, 0);
172 add_reg_note (user, REG_CC_SETTER, insn);
173 add_reg_note (insn, REG_CC_USER, user);
175 #endif
177 /* Insns which have delay slots that have not yet been filled. */
179 static struct obstack unfilled_slots_obstack;
180 static rtx *unfilled_firstobj;
182 /* Define macros to refer to the first and last slot containing unfilled
183 insns. These are used because the list may move and its address
184 should be recomputed at each use. */
186 #define unfilled_slots_base \
187 ((rtx *) obstack_base (&unfilled_slots_obstack))
189 #define unfilled_slots_next \
190 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
192 /* Points to the label before the end of the function, or before a
193 return insn. */
194 static rtx function_return_label;
195 /* Likewise for a simple_return. */
196 static rtx function_simple_return_label;
198 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
199 not always monotonically increase. */
200 static int *uid_to_ruid;
202 /* Highest valid index in `uid_to_ruid'. */
203 static int max_uid;
205 static int stop_search_p (rtx, int);
206 static int resource_conflicts_p (struct resources *, struct resources *);
207 static int insn_references_resource_p (rtx, struct resources *, bool);
208 static int insn_sets_resource_p (rtx, struct resources *, bool);
209 static rtx find_end_label (rtx);
210 static rtx emit_delay_sequence (rtx, rtx, int);
211 static rtx add_to_delay_list (rtx, rtx);
212 static rtx delete_from_delay_slot (rtx);
213 static void delete_scheduled_jump (rtx);
214 static void note_delay_statistics (int, int);
215 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
216 static rtx optimize_skip (rtx);
217 #endif
218 static int get_jump_flags (rtx, rtx);
219 static int mostly_true_jump (rtx);
220 static rtx get_branch_condition (rtx, rtx);
221 static int condition_dominates_p (rtx, rtx);
222 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
223 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
224 static int check_annul_list_true_false (int, rtx);
225 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
226 struct resources *,
227 struct resources *,
228 struct resources *,
229 int, int *, int *, rtx *);
230 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
231 struct resources *,
232 struct resources *,
233 struct resources *,
234 int, int *, int *);
235 static void try_merge_delay_insns (rtx, rtx);
236 static rtx redundant_insn (rtx, rtx, rtx);
237 static int own_thread_p (rtx, rtx, int);
238 static void update_block (rtx, rtx);
239 static int reorg_redirect_jump (rtx, rtx);
240 static void update_reg_dead_notes (rtx, rtx);
241 static void fix_reg_dead_note (rtx, rtx);
242 static void update_reg_unused_notes (rtx, rtx);
243 static void fill_simple_delay_slots (int);
244 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
245 int, int, int, int,
246 int *, rtx);
247 static void fill_eager_delay_slots (void);
248 static void relax_delay_slots (rtx);
249 static void make_return_insns (rtx);
251 /* A wrapper around next_active_insn which takes care to return ret_rtx
252 unchanged. */
254 static rtx
255 first_active_target_insn (rtx insn)
257 if (ANY_RETURN_P (insn))
258 return insn;
259 return next_active_insn (insn);
262 /* Return true iff INSN is a simplejump, or any kind of return insn. */
264 static bool
265 simplejump_or_return_p (rtx insn)
267 return (JUMP_P (insn)
268 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
271 /* Return TRUE if this insn should stop the search for insn to fill delay
272 slots. LABELS_P indicates that labels should terminate the search.
273 In all cases, jumps terminate the search. */
275 static int
276 stop_search_p (rtx insn, int labels_p)
278 if (insn == 0)
279 return 1;
281 /* If the insn can throw an exception that is caught within the function,
282 it may effectively perform a jump from the viewpoint of the function.
283 Therefore act like for a jump. */
284 if (can_throw_internal (insn))
285 return 1;
287 switch (GET_CODE (insn))
289 case NOTE:
290 case CALL_INSN:
291 return 0;
293 case CODE_LABEL:
294 return labels_p;
296 case JUMP_INSN:
297 case BARRIER:
298 return 1;
300 case INSN:
301 /* OK unless it contains a delay slot or is an `asm' insn of some type.
302 We don't know anything about these. */
303 return (GET_CODE (PATTERN (insn)) == SEQUENCE
304 || GET_CODE (PATTERN (insn)) == ASM_INPUT
305 || asm_noperands (PATTERN (insn)) >= 0);
307 default:
308 gcc_unreachable ();
312 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
313 resource set contains a volatile memory reference. Otherwise, return FALSE. */
315 static int
316 resource_conflicts_p (struct resources *res1, struct resources *res2)
318 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
319 || res1->volatil || res2->volatil)
320 return 1;
322 return hard_reg_set_intersect_p (res1->regs, res2->regs);
325 /* Return TRUE if any resource marked in RES, a `struct resources', is
326 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
327 routine is using those resources.
329 We compute this by computing all the resources referenced by INSN and
330 seeing if this conflicts with RES. It might be faster to directly check
331 ourselves, and this is the way it used to work, but it means duplicating
332 a large block of complex code. */
334 static int
335 insn_references_resource_p (rtx insn, struct resources *res,
336 bool include_delayed_effects)
338 struct resources insn_res;
340 CLEAR_RESOURCE (&insn_res);
341 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
342 return resource_conflicts_p (&insn_res, res);
345 /* Return TRUE if INSN modifies resources that are marked in RES.
346 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
347 included. CC0 is only modified if it is explicitly set; see comments
348 in front of mark_set_resources for details. */
350 static int
351 insn_sets_resource_p (rtx insn, struct resources *res,
352 bool include_delayed_effects)
354 struct resources insn_sets;
356 CLEAR_RESOURCE (&insn_sets);
357 mark_set_resources (insn, &insn_sets, 0,
358 (include_delayed_effects
359 ? MARK_SRC_DEST_CALL
360 : MARK_SRC_DEST));
361 return resource_conflicts_p (&insn_sets, res);
364 /* Find a label at the end of the function or before a RETURN. If there
365 is none, try to make one. If that fails, returns 0.
367 The property of such a label is that it is placed just before the
368 epilogue or a bare RETURN insn, so that another bare RETURN can be
369 turned into a jump to the label unconditionally. In particular, the
370 label cannot be placed before a RETURN insn with a filled delay slot.
372 ??? There may be a problem with the current implementation. Suppose
373 we start with a bare RETURN insn and call find_end_label. It may set
374 function_return_label just before the RETURN. Suppose the machinery
375 is able to fill the delay slot of the RETURN insn afterwards. Then
376 function_return_label is no longer valid according to the property
377 described above and find_end_label will still return it unmodified.
378 Note that this is probably mitigated by the following observation:
379 once function_return_label is made, it is very likely the target of
380 a jump, so filling the delay slot of the RETURN will be much more
381 difficult.
382 KIND is either simple_return_rtx or ret_rtx, indicating which type of
383 return we're looking for. */
385 static rtx
386 find_end_label (rtx kind)
388 rtx insn;
389 rtx *plabel;
391 if (kind == ret_rtx)
392 plabel = &function_return_label;
393 else
395 gcc_assert (kind == simple_return_rtx);
396 plabel = &function_simple_return_label;
399 /* If we found one previously, return it. */
400 if (*plabel)
401 return *plabel;
403 /* Otherwise, see if there is a label at the end of the function. If there
404 is, it must be that RETURN insns aren't needed, so that is our return
405 label and we don't have to do anything else. */
407 insn = get_last_insn ();
408 while (NOTE_P (insn)
409 || (NONJUMP_INSN_P (insn)
410 && (GET_CODE (PATTERN (insn)) == USE
411 || GET_CODE (PATTERN (insn)) == CLOBBER)))
412 insn = PREV_INSN (insn);
414 /* When a target threads its epilogue we might already have a
415 suitable return insn. If so put a label before it for the
416 function_return_label. */
417 if (BARRIER_P (insn)
418 && JUMP_P (PREV_INSN (insn))
419 && PATTERN (PREV_INSN (insn)) == kind)
421 rtx temp = PREV_INSN (PREV_INSN (insn));
422 rtx label = gen_label_rtx ();
423 LABEL_NUSES (label) = 0;
425 /* Put the label before any USE insns that may precede the RETURN
426 insn. */
427 while (GET_CODE (temp) == USE)
428 temp = PREV_INSN (temp);
430 emit_label_after (label, temp);
431 *plabel = label;
434 else if (LABEL_P (insn))
435 *plabel = insn;
436 else
438 rtx label = gen_label_rtx ();
439 LABEL_NUSES (label) = 0;
440 /* If the basic block reorder pass moves the return insn to
441 some other place try to locate it again and put our
442 function_return_label there. */
443 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
444 insn = PREV_INSN (insn);
445 if (insn)
447 insn = PREV_INSN (insn);
449 /* Put the label before any USE insns that may precede the
450 RETURN insn. */
451 while (GET_CODE (insn) == USE)
452 insn = PREV_INSN (insn);
454 emit_label_after (label, insn);
456 else
458 #ifdef HAVE_epilogue
459 if (HAVE_epilogue
460 #ifdef HAVE_return
461 && ! HAVE_return
462 #endif
464 /* The RETURN insn has its delay slot filled so we cannot
465 emit the label just before it. Since we already have
466 an epilogue and cannot emit a new RETURN, we cannot
467 emit the label at all. */
468 return NULL_RTX;
469 #endif /* HAVE_epilogue */
471 /* Otherwise, make a new label and emit a RETURN and BARRIER,
472 if needed. */
473 emit_label (label);
474 #ifdef HAVE_return
475 if (HAVE_return)
477 /* The return we make may have delay slots too. */
478 rtx insn = gen_return ();
479 insn = emit_jump_insn (insn);
480 set_return_jump_label (insn);
481 emit_barrier ();
482 if (num_delay_slots (insn) > 0)
483 obstack_ptr_grow (&unfilled_slots_obstack, insn);
485 #endif
487 *plabel = label;
490 /* Show one additional use for this label so it won't go away until
491 we are done. */
492 ++LABEL_NUSES (*plabel);
494 return *plabel;
497 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
498 the pattern of INSN with the SEQUENCE.
500 Returns the SEQUENCE that replaces INSN. */
502 static rtx
503 emit_delay_sequence (rtx insn, rtx list, int length)
505 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
506 rtvec seqv = rtvec_alloc (length + 1);
507 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
508 rtx seq_insn = make_insn_raw (seq);
510 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
511 not have a location, but one of the delayed insns does, we pick up a
512 location from there later. */
513 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
515 /* Unlink INSN from the insn chain, so that we can put it into
516 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
517 rtx after = PREV_INSN (insn);
518 remove_insn (insn);
519 NEXT_INSN (insn) = PREV_INSN (insn) = NULL;
521 /* Build our SEQUENCE and rebuild the insn chain. */
522 int i = 1;
523 start_sequence ();
524 XVECEXP (seq, 0, 0) = emit_insn (insn);
525 for (rtx li = list; li; li = XEXP (li, 1), i++)
527 rtx tem = XEXP (li, 0);
528 rtx note, next;
530 /* Show that this copy of the insn isn't deleted. */
531 INSN_DELETED_P (tem) = 0;
533 /* Unlink insn from its original place, and re-emit it into
534 the sequence. */
535 NEXT_INSN (tem) = PREV_INSN (tem) = NULL;
536 XVECEXP (seq, 0, i) = emit_insn (tem);
538 /* SPARC assembler, for instance, emit warning when debug info is output
539 into the delay slot. */
540 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
541 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
542 INSN_LOCATION (tem) = 0;
544 for (note = REG_NOTES (tem); note; note = next)
546 next = XEXP (note, 1);
547 switch (REG_NOTE_KIND (note))
549 case REG_DEAD:
550 /* Remove any REG_DEAD notes because we can't rely on them now
551 that the insn has been moved. */
552 remove_note (tem, note);
553 break;
555 case REG_LABEL_OPERAND:
556 case REG_LABEL_TARGET:
557 /* Keep the label reference count up to date. */
558 if (LABEL_P (XEXP (note, 0)))
559 LABEL_NUSES (XEXP (note, 0)) ++;
560 break;
562 default:
563 break;
567 end_sequence ();
568 gcc_assert (i == length + 1);
570 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
571 add_insn_after (seq_insn, after, NULL);
573 return seq_insn;
576 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
577 be in the order in which the insns are to be executed. */
579 static rtx
580 add_to_delay_list (rtx insn, rtx delay_list)
582 /* If we have an empty list, just make a new list element. If
583 INSN has its block number recorded, clear it since we may
584 be moving the insn to a new block. */
586 if (delay_list == 0)
588 clear_hashed_info_for_insn (insn);
589 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
592 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
593 list. */
594 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
596 return delay_list;
599 /* Delete INSN from the delay slot of the insn that it is in, which may
600 produce an insn with no delay slots. Return the new insn. */
602 static rtx
603 delete_from_delay_slot (rtx insn)
605 rtx trial, seq_insn, seq, prev;
606 rtx delay_list = 0;
607 int i;
608 int had_barrier = 0;
610 /* We first must find the insn containing the SEQUENCE with INSN in its
611 delay slot. Do this by finding an insn, TRIAL, where
612 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
614 for (trial = insn;
615 PREV_INSN (NEXT_INSN (trial)) == trial;
616 trial = NEXT_INSN (trial))
619 seq_insn = PREV_INSN (NEXT_INSN (trial));
620 seq = PATTERN (seq_insn);
622 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
623 had_barrier = 1;
625 /* Create a delay list consisting of all the insns other than the one
626 we are deleting (unless we were the only one). */
627 if (XVECLEN (seq, 0) > 2)
628 for (i = 1; i < XVECLEN (seq, 0); i++)
629 if (XVECEXP (seq, 0, i) != insn)
630 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
632 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
633 list, and rebuild the delay list if non-empty. */
634 prev = PREV_INSN (seq_insn);
635 trial = XVECEXP (seq, 0, 0);
636 delete_related_insns (seq_insn);
637 add_insn_after (trial, prev, NULL);
639 /* If there was a barrier after the old SEQUENCE, remit it. */
640 if (had_barrier)
641 emit_barrier_after (trial);
643 /* If there are any delay insns, remit them. Otherwise clear the
644 annul flag. */
645 if (delay_list)
646 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
647 else if (JUMP_P (trial))
648 INSN_ANNULLED_BRANCH_P (trial) = 0;
650 INSN_FROM_TARGET_P (insn) = 0;
652 /* Show we need to fill this insn again. */
653 obstack_ptr_grow (&unfilled_slots_obstack, trial);
655 return trial;
658 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
659 the insn that sets CC0 for it and delete it too. */
661 static void
662 delete_scheduled_jump (rtx insn)
664 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
665 delete the insn that sets the condition code, but it is hard to find it.
666 Since this case is rare anyway, don't bother trying; there would likely
667 be other insns that became dead anyway, which we wouldn't know to
668 delete. */
670 #ifdef HAVE_cc0
671 if (reg_mentioned_p (cc0_rtx, insn))
673 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
675 /* If a reg-note was found, it points to an insn to set CC0. This
676 insn is in the delay list of some other insn. So delete it from
677 the delay list it was in. */
678 if (note)
680 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
681 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
682 delete_from_delay_slot (XEXP (note, 0));
684 else
686 /* The insn setting CC0 is our previous insn, but it may be in
687 a delay slot. It will be the last insn in the delay slot, if
688 it is. */
689 rtx trial = previous_insn (insn);
690 if (NOTE_P (trial))
691 trial = prev_nonnote_insn (trial);
692 if (sets_cc0_p (PATTERN (trial)) != 1
693 || FIND_REG_INC_NOTE (trial, NULL_RTX))
694 return;
695 if (PREV_INSN (NEXT_INSN (trial)) == trial)
696 delete_related_insns (trial);
697 else
698 delete_from_delay_slot (trial);
701 #endif
703 delete_related_insns (insn);
706 /* Counters for delay-slot filling. */
708 #define NUM_REORG_FUNCTIONS 2
709 #define MAX_DELAY_HISTOGRAM 3
710 #define MAX_REORG_PASSES 2
712 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
714 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
716 static int reorg_pass_number;
718 static void
719 note_delay_statistics (int slots_filled, int index)
721 num_insns_needing_delays[index][reorg_pass_number]++;
722 if (slots_filled > MAX_DELAY_HISTOGRAM)
723 slots_filled = MAX_DELAY_HISTOGRAM;
724 num_filled_delays[index][slots_filled][reorg_pass_number]++;
727 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
729 /* Optimize the following cases:
731 1. When a conditional branch skips over only one instruction,
732 use an annulling branch and put that insn in the delay slot.
733 Use either a branch that annuls when the condition if true or
734 invert the test with a branch that annuls when the condition is
735 false. This saves insns, since otherwise we must copy an insn
736 from the L1 target.
738 (orig) (skip) (otherwise)
739 Bcc.n L1 Bcc',a L1 Bcc,a L1'
740 insn insn insn2
741 L1: L1: L1:
742 insn2 insn2 insn2
743 insn3 insn3 L1':
744 insn3
746 2. When a conditional branch skips over only one instruction,
747 and after that, it unconditionally branches somewhere else,
748 perform the similar optimization. This saves executing the
749 second branch in the case where the inverted condition is true.
751 Bcc.n L1 Bcc',a L2
752 insn insn
753 L1: L1:
754 Bra L2 Bra L2
756 INSN is a JUMP_INSN.
758 This should be expanded to skip over N insns, where N is the number
759 of delay slots required. */
761 static rtx
762 optimize_skip (rtx insn)
764 rtx trial = next_nonnote_insn (insn);
765 rtx next_trial = next_active_insn (trial);
766 rtx delay_list = 0;
767 int flags;
769 flags = get_jump_flags (insn, JUMP_LABEL (insn));
771 if (trial == 0
772 || !NONJUMP_INSN_P (trial)
773 || GET_CODE (PATTERN (trial)) == SEQUENCE
774 || recog_memoized (trial) < 0
775 || (! eligible_for_annul_false (insn, 0, trial, flags)
776 && ! eligible_for_annul_true (insn, 0, trial, flags))
777 || can_throw_internal (trial))
778 return 0;
780 /* There are two cases where we are just executing one insn (we assume
781 here that a branch requires only one insn; this should be generalized
782 at some point): Where the branch goes around a single insn or where
783 we have one insn followed by a branch to the same label we branch to.
784 In both of these cases, inverting the jump and annulling the delay
785 slot give the same effect in fewer insns. */
786 if (next_trial == next_active_insn (JUMP_LABEL (insn))
787 || (next_trial != 0
788 && simplejump_or_return_p (next_trial)
789 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
791 if (eligible_for_annul_false (insn, 0, trial, flags))
793 if (invert_jump (insn, JUMP_LABEL (insn), 1))
794 INSN_FROM_TARGET_P (trial) = 1;
795 else if (! eligible_for_annul_true (insn, 0, trial, flags))
796 return 0;
799 delay_list = add_to_delay_list (trial, NULL_RTX);
800 next_trial = next_active_insn (trial);
801 update_block (trial, trial);
802 delete_related_insns (trial);
804 /* Also, if we are targeting an unconditional
805 branch, thread our jump to the target of that branch. Don't
806 change this into a RETURN here, because it may not accept what
807 we have in the delay slot. We'll fix this up later. */
808 if (next_trial && simplejump_or_return_p (next_trial))
810 rtx target_label = JUMP_LABEL (next_trial);
811 if (ANY_RETURN_P (target_label))
812 target_label = find_end_label (target_label);
814 if (target_label)
816 /* Recompute the flags based on TARGET_LABEL since threading
817 the jump to TARGET_LABEL may change the direction of the
818 jump (which may change the circumstances in which the
819 delay slot is nullified). */
820 flags = get_jump_flags (insn, target_label);
821 if (eligible_for_annul_true (insn, 0, trial, flags))
822 reorg_redirect_jump (insn, target_label);
826 INSN_ANNULLED_BRANCH_P (insn) = 1;
829 return delay_list;
831 #endif
833 /* Encode and return branch direction and prediction information for
834 INSN assuming it will jump to LABEL.
836 Non conditional branches return no direction information and
837 are predicted as very likely taken. */
839 static int
840 get_jump_flags (rtx insn, rtx label)
842 int flags;
844 /* get_jump_flags can be passed any insn with delay slots, these may
845 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
846 direction information, and only if they are conditional jumps.
848 If LABEL is a return, then there is no way to determine the branch
849 direction. */
850 if (JUMP_P (insn)
851 && (condjump_p (insn) || condjump_in_parallel_p (insn))
852 && !ANY_RETURN_P (label)
853 && INSN_UID (insn) <= max_uid
854 && INSN_UID (label) <= max_uid)
855 flags
856 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
857 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
858 /* No valid direction information. */
859 else
860 flags = 0;
862 return flags;
865 /* Return truth value of the statement that this branch
866 is mostly taken. If we think that the branch is extremely likely
867 to be taken, we return 2. If the branch is slightly more likely to be
868 taken, return 1. If the branch is slightly less likely to be taken,
869 return 0 and if the branch is highly unlikely to be taken, return -1. */
871 static int
872 mostly_true_jump (rtx jump_insn)
874 /* If branch probabilities are available, then use that number since it
875 always gives a correct answer. */
876 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
877 if (note)
879 int prob = INTVAL (XEXP (note, 0));
881 if (prob >= REG_BR_PROB_BASE * 9 / 10)
882 return 2;
883 else if (prob >= REG_BR_PROB_BASE / 2)
884 return 1;
885 else if (prob >= REG_BR_PROB_BASE / 10)
886 return 0;
887 else
888 return -1;
891 /* If there is no note, assume branches are not taken.
892 This should be rare. */
893 return 0;
896 /* Return the condition under which INSN will branch to TARGET. If TARGET
897 is zero, return the condition under which INSN will return. If INSN is
898 an unconditional branch, return const_true_rtx. If INSN isn't a simple
899 type of jump, or it doesn't go to TARGET, return 0. */
901 static rtx
902 get_branch_condition (rtx insn, rtx target)
904 rtx pat = PATTERN (insn);
905 rtx src;
907 if (condjump_in_parallel_p (insn))
908 pat = XVECEXP (pat, 0, 0);
910 if (ANY_RETURN_P (pat) && pat == target)
911 return const_true_rtx;
913 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
914 return 0;
916 src = SET_SRC (pat);
917 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
918 return const_true_rtx;
920 else if (GET_CODE (src) == IF_THEN_ELSE
921 && XEXP (src, 2) == pc_rtx
922 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
923 && XEXP (XEXP (src, 1), 0) == target)
924 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
925 return XEXP (src, 0);
927 else if (GET_CODE (src) == IF_THEN_ELSE
928 && XEXP (src, 1) == pc_rtx
929 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
930 && XEXP (XEXP (src, 2), 0) == target)
931 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
933 enum rtx_code rev;
934 rev = reversed_comparison_code (XEXP (src, 0), insn);
935 if (rev != UNKNOWN)
936 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
937 XEXP (XEXP (src, 0), 0),
938 XEXP (XEXP (src, 0), 1));
941 return 0;
944 /* Return nonzero if CONDITION is more strict than the condition of
945 INSN, i.e., if INSN will always branch if CONDITION is true. */
947 static int
948 condition_dominates_p (rtx condition, rtx insn)
950 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
951 enum rtx_code code = GET_CODE (condition);
952 enum rtx_code other_code;
954 if (rtx_equal_p (condition, other_condition)
955 || other_condition == const_true_rtx)
956 return 1;
958 else if (condition == const_true_rtx || other_condition == 0)
959 return 0;
961 other_code = GET_CODE (other_condition);
962 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
963 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
964 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
965 return 0;
967 return comparison_dominates_p (code, other_code);
970 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
971 any insns already in the delay slot of JUMP. */
973 static int
974 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
976 int flags, i;
977 rtx pat = PATTERN (seq);
979 /* Make sure all the delay slots of this jump would still
980 be valid after threading the jump. If they are still
981 valid, then return nonzero. */
983 flags = get_jump_flags (jump, newlabel);
984 for (i = 1; i < XVECLEN (pat, 0); i++)
985 if (! (
986 #ifdef ANNUL_IFFALSE_SLOTS
987 (INSN_ANNULLED_BRANCH_P (jump)
988 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
989 ? eligible_for_annul_false (jump, i - 1,
990 XVECEXP (pat, 0, i), flags) :
991 #endif
992 #ifdef ANNUL_IFTRUE_SLOTS
993 (INSN_ANNULLED_BRANCH_P (jump)
994 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
995 ? eligible_for_annul_true (jump, i - 1,
996 XVECEXP (pat, 0, i), flags) :
997 #endif
998 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
999 break;
1001 return (i == XVECLEN (pat, 0));
1004 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1005 any insns we wish to place in the delay slot of JUMP. */
1007 static int
1008 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1010 int flags, i;
1011 rtx li;
1013 /* Make sure all the insns in DELAY_LIST would still be
1014 valid after threading the jump. If they are still
1015 valid, then return nonzero. */
1017 flags = get_jump_flags (jump, newlabel);
1018 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1019 if (! (
1020 #ifdef ANNUL_IFFALSE_SLOTS
1021 (INSN_ANNULLED_BRANCH_P (jump)
1022 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1023 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1024 #endif
1025 #ifdef ANNUL_IFTRUE_SLOTS
1026 (INSN_ANNULLED_BRANCH_P (jump)
1027 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1028 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1029 #endif
1030 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1031 break;
1033 return (li == NULL);
1036 /* DELAY_LIST is a list of insns that have already been placed into delay
1037 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1038 If not, return 0; otherwise return 1. */
1040 static int
1041 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1043 rtx temp;
1045 if (delay_list)
1047 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1049 rtx trial = XEXP (temp, 0);
1051 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1052 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1053 return 0;
1057 return 1;
1060 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1061 the condition tested by INSN is CONDITION and the resources shown in
1062 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1063 from SEQ's delay list, in addition to whatever insns it may execute
1064 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1065 needed while searching for delay slot insns. Return the concatenated
1066 delay list if possible, otherwise, return 0.
1068 SLOTS_TO_FILL is the total number of slots required by INSN, and
1069 PSLOTS_FILLED points to the number filled so far (also the number of
1070 insns in DELAY_LIST). It is updated with the number that have been
1071 filled from the SEQUENCE, if any.
1073 PANNUL_P points to a nonzero value if we already know that we need
1074 to annul INSN. If this routine determines that annulling is needed,
1075 it may set that value nonzero.
1077 PNEW_THREAD points to a location that is to receive the place at which
1078 execution should continue. */
1080 static rtx
1081 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1082 rtx delay_list, struct resources *sets,
1083 struct resources *needed,
1084 struct resources *other_needed,
1085 int slots_to_fill, int *pslots_filled,
1086 int *pannul_p, rtx *pnew_thread)
1088 rtx temp;
1089 int slots_remaining = slots_to_fill - *pslots_filled;
1090 int total_slots_filled = *pslots_filled;
1091 rtx new_delay_list = 0;
1092 int must_annul = *pannul_p;
1093 int used_annul = 0;
1094 int i;
1095 struct resources cc_set;
1097 /* We can't do anything if there are more delay slots in SEQ than we
1098 can handle, or if we don't know that it will be a taken branch.
1099 We know that it will be a taken branch if it is either an unconditional
1100 branch or a conditional branch with a stricter branch condition.
1102 Also, exit if the branch has more than one set, since then it is computing
1103 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1104 ??? It may be possible to move other sets into INSN in addition to
1105 moving the instructions in the delay slots.
1107 We can not steal the delay list if one of the instructions in the
1108 current delay_list modifies the condition codes and the jump in the
1109 sequence is a conditional jump. We can not do this because we can
1110 not change the direction of the jump because the condition codes
1111 will effect the direction of the jump in the sequence. */
1113 CLEAR_RESOURCE (&cc_set);
1114 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1116 rtx trial = XEXP (temp, 0);
1118 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1119 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1120 return delay_list;
1123 if (XVECLEN (seq, 0) - 1 > slots_remaining
1124 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1125 || ! single_set (XVECEXP (seq, 0, 0)))
1126 return delay_list;
1128 #ifdef MD_CAN_REDIRECT_BRANCH
1129 /* On some targets, branches with delay slots can have a limited
1130 displacement. Give the back end a chance to tell us we can't do
1131 this. */
1132 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1133 return delay_list;
1134 #endif
1136 for (i = 1; i < XVECLEN (seq, 0); i++)
1138 rtx trial = XVECEXP (seq, 0, i);
1139 int flags;
1141 if (insn_references_resource_p (trial, sets, false)
1142 || insn_sets_resource_p (trial, needed, false)
1143 || insn_sets_resource_p (trial, sets, false)
1144 #ifdef HAVE_cc0
1145 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1146 delay list. */
1147 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1148 #endif
1149 /* If TRIAL is from the fallthrough code of an annulled branch insn
1150 in SEQ, we cannot use it. */
1151 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1152 && ! INSN_FROM_TARGET_P (trial)))
1153 return delay_list;
1155 /* If this insn was already done (usually in a previous delay slot),
1156 pretend we put it in our delay slot. */
1157 if (redundant_insn (trial, insn, new_delay_list))
1158 continue;
1160 /* We will end up re-vectoring this branch, so compute flags
1161 based on jumping to the new label. */
1162 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1164 if (! must_annul
1165 && ((condition == const_true_rtx
1166 || (! insn_sets_resource_p (trial, other_needed, false)
1167 && ! may_trap_or_fault_p (PATTERN (trial)))))
1168 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1169 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1170 && (must_annul = 1,
1171 check_annul_list_true_false (0, delay_list)
1172 && check_annul_list_true_false (0, new_delay_list)
1173 && eligible_for_annul_false (insn, total_slots_filled,
1174 trial, flags)))
1176 if (must_annul)
1177 used_annul = 1;
1178 temp = copy_delay_slot_insn (trial);
1179 INSN_FROM_TARGET_P (temp) = 1;
1180 new_delay_list = add_to_delay_list (temp, new_delay_list);
1181 total_slots_filled++;
1183 if (--slots_remaining == 0)
1184 break;
1186 else
1187 return delay_list;
1190 /* Show the place to which we will be branching. */
1191 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1193 /* Add any new insns to the delay list and update the count of the
1194 number of slots filled. */
1195 *pslots_filled = total_slots_filled;
1196 if (used_annul)
1197 *pannul_p = 1;
1199 if (delay_list == 0)
1200 return new_delay_list;
1202 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1203 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1205 return delay_list;
1208 /* Similar to steal_delay_list_from_target except that SEQ is on the
1209 fallthrough path of INSN. Here we only do something if the delay insn
1210 of SEQ is an unconditional branch. In that case we steal its delay slot
1211 for INSN since unconditional branches are much easier to fill. */
1213 static rtx
1214 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1215 rtx delay_list, struct resources *sets,
1216 struct resources *needed,
1217 struct resources *other_needed,
1218 int slots_to_fill, int *pslots_filled,
1219 int *pannul_p)
1221 int i;
1222 int flags;
1223 int must_annul = *pannul_p;
1224 int used_annul = 0;
1226 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1228 /* We can't do anything if SEQ's delay insn isn't an
1229 unconditional branch. */
1231 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1232 return delay_list;
1234 for (i = 1; i < XVECLEN (seq, 0); i++)
1236 rtx trial = XVECEXP (seq, 0, i);
1238 /* If TRIAL sets CC0, stealing it will move it too far from the use
1239 of CC0. */
1240 if (insn_references_resource_p (trial, sets, false)
1241 || insn_sets_resource_p (trial, needed, false)
1242 || insn_sets_resource_p (trial, sets, false)
1243 #ifdef HAVE_cc0
1244 || sets_cc0_p (PATTERN (trial))
1245 #endif
1248 break;
1250 /* If this insn was already done, we don't need it. */
1251 if (redundant_insn (trial, insn, delay_list))
1253 delete_from_delay_slot (trial);
1254 continue;
1257 if (! must_annul
1258 && ((condition == const_true_rtx
1259 || (! insn_sets_resource_p (trial, other_needed, false)
1260 && ! may_trap_or_fault_p (PATTERN (trial)))))
1261 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1262 : (must_annul || delay_list == NULL) && (must_annul = 1,
1263 check_annul_list_true_false (1, delay_list)
1264 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1266 if (must_annul)
1267 used_annul = 1;
1268 delete_from_delay_slot (trial);
1269 delay_list = add_to_delay_list (trial, delay_list);
1271 if (++(*pslots_filled) == slots_to_fill)
1272 break;
1274 else
1275 break;
1278 if (used_annul)
1279 *pannul_p = 1;
1280 return delay_list;
1283 /* Try merging insns starting at THREAD which match exactly the insns in
1284 INSN's delay list.
1286 If all insns were matched and the insn was previously annulling, the
1287 annul bit will be cleared.
1289 For each insn that is merged, if the branch is or will be non-annulling,
1290 we delete the merged insn. */
1292 static void
1293 try_merge_delay_insns (rtx insn, rtx thread)
1295 rtx trial, next_trial;
1296 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1297 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1298 int slot_number = 1;
1299 int num_slots = XVECLEN (PATTERN (insn), 0);
1300 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1301 struct resources set, needed;
1302 rtx merged_insns = 0;
1303 int i;
1304 int flags;
1306 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1308 CLEAR_RESOURCE (&needed);
1309 CLEAR_RESOURCE (&set);
1311 /* If this is not an annulling branch, take into account anything needed in
1312 INSN's delay slot. This prevents two increments from being incorrectly
1313 folded into one. If we are annulling, this would be the correct
1314 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1315 will essentially disable this optimization. This method is somewhat of
1316 a kludge, but I don't see a better way.) */
1317 if (! annul_p)
1318 for (i = 1 ; i < num_slots; i++)
1319 if (XVECEXP (PATTERN (insn), 0, i))
1320 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1321 true);
1323 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1325 rtx pat = PATTERN (trial);
1326 rtx oldtrial = trial;
1328 next_trial = next_nonnote_insn (trial);
1330 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1331 if (NONJUMP_INSN_P (trial)
1332 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1333 continue;
1335 if (GET_CODE (next_to_match) == GET_CODE (trial)
1336 #ifdef HAVE_cc0
1337 /* We can't share an insn that sets cc0. */
1338 && ! sets_cc0_p (pat)
1339 #endif
1340 && ! insn_references_resource_p (trial, &set, true)
1341 && ! insn_sets_resource_p (trial, &set, true)
1342 && ! insn_sets_resource_p (trial, &needed, true)
1343 && (trial = try_split (pat, trial, 0)) != 0
1344 /* Update next_trial, in case try_split succeeded. */
1345 && (next_trial = next_nonnote_insn (trial))
1346 /* Likewise THREAD. */
1347 && (thread = oldtrial == thread ? trial : thread)
1348 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1349 /* Have to test this condition if annul condition is different
1350 from (and less restrictive than) non-annulling one. */
1351 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1354 if (! annul_p)
1356 update_block (trial, thread);
1357 if (trial == thread)
1358 thread = next_active_insn (thread);
1360 delete_related_insns (trial);
1361 INSN_FROM_TARGET_P (next_to_match) = 0;
1363 else
1364 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1366 if (++slot_number == num_slots)
1367 break;
1369 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1372 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1373 mark_referenced_resources (trial, &needed, true);
1376 /* See if we stopped on a filled insn. If we did, try to see if its
1377 delay slots match. */
1378 if (slot_number != num_slots
1379 && trial && NONJUMP_INSN_P (trial)
1380 && GET_CODE (PATTERN (trial)) == SEQUENCE
1381 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1382 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1384 rtx pat = PATTERN (trial);
1385 rtx filled_insn = XVECEXP (pat, 0, 0);
1387 /* Account for resources set/needed by the filled insn. */
1388 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1389 mark_referenced_resources (filled_insn, &needed, true);
1391 for (i = 1; i < XVECLEN (pat, 0); i++)
1393 rtx dtrial = XVECEXP (pat, 0, i);
1395 if (! insn_references_resource_p (dtrial, &set, true)
1396 && ! insn_sets_resource_p (dtrial, &set, true)
1397 && ! insn_sets_resource_p (dtrial, &needed, true)
1398 #ifdef HAVE_cc0
1399 && ! sets_cc0_p (PATTERN (dtrial))
1400 #endif
1401 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1402 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1404 if (! annul_p)
1406 rtx new_rtx;
1408 update_block (dtrial, thread);
1409 new_rtx = delete_from_delay_slot (dtrial);
1410 if (INSN_DELETED_P (thread))
1411 thread = new_rtx;
1412 INSN_FROM_TARGET_P (next_to_match) = 0;
1414 else
1415 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1416 merged_insns);
1418 if (++slot_number == num_slots)
1419 break;
1421 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1423 else
1425 /* Keep track of the set/referenced resources for the delay
1426 slots of any trial insns we encounter. */
1427 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1428 mark_referenced_resources (dtrial, &needed, true);
1433 /* If all insns in the delay slot have been matched and we were previously
1434 annulling the branch, we need not any more. In that case delete all the
1435 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1436 the delay list so that we know that it isn't only being used at the
1437 target. */
1438 if (slot_number == num_slots && annul_p)
1440 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1442 if (GET_MODE (merged_insns) == SImode)
1444 rtx new_rtx;
1446 update_block (XEXP (merged_insns, 0), thread);
1447 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1448 if (INSN_DELETED_P (thread))
1449 thread = new_rtx;
1451 else
1453 update_block (XEXP (merged_insns, 0), thread);
1454 delete_related_insns (XEXP (merged_insns, 0));
1458 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1460 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1461 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1465 /* See if INSN is redundant with an insn in front of TARGET. Often this
1466 is called when INSN is a candidate for a delay slot of TARGET.
1467 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1468 of INSN. Often INSN will be redundant with an insn in a delay slot of
1469 some previous insn. This happens when we have a series of branches to the
1470 same label; in that case the first insn at the target might want to go
1471 into each of the delay slots.
1473 If we are not careful, this routine can take up a significant fraction
1474 of the total compilation time (4%), but only wins rarely. Hence we
1475 speed this routine up by making two passes. The first pass goes back
1476 until it hits a label and sees if it finds an insn with an identical
1477 pattern. Only in this (relatively rare) event does it check for
1478 data conflicts.
1480 We do not split insns we encounter. This could cause us not to find a
1481 redundant insn, but the cost of splitting seems greater than the possible
1482 gain in rare cases. */
1484 static rtx
1485 redundant_insn (rtx insn, rtx target, rtx delay_list)
1487 rtx target_main = target;
1488 rtx ipat = PATTERN (insn);
1489 rtx trial, pat;
1490 struct resources needed, set;
1491 int i;
1492 unsigned insns_to_search;
1494 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1495 are allowed to not actually assign to such a register. */
1496 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1497 return 0;
1499 /* Scan backwards looking for a match. */
1500 for (trial = PREV_INSN (target),
1501 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1502 trial && insns_to_search > 0;
1503 trial = PREV_INSN (trial))
1505 if (LABEL_P (trial))
1506 return 0;
1508 if (!INSN_P (trial))
1509 continue;
1510 --insns_to_search;
1512 pat = PATTERN (trial);
1513 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1514 continue;
1516 if (GET_CODE (pat) == SEQUENCE)
1518 /* Stop for a CALL and its delay slots because it is difficult to
1519 track its resource needs correctly. */
1520 if (CALL_P (XVECEXP (pat, 0, 0)))
1521 return 0;
1523 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1524 slots because it is difficult to track its resource needs
1525 correctly. */
1527 #ifdef INSN_SETS_ARE_DELAYED
1528 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1529 return 0;
1530 #endif
1532 #ifdef INSN_REFERENCES_ARE_DELAYED
1533 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1534 return 0;
1535 #endif
1537 /* See if any of the insns in the delay slot match, updating
1538 resource requirements as we go. */
1539 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1540 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1541 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1542 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1543 break;
1545 /* If found a match, exit this loop early. */
1546 if (i > 0)
1547 break;
1550 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1551 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1552 break;
1555 /* If we didn't find an insn that matches, return 0. */
1556 if (trial == 0)
1557 return 0;
1559 /* See what resources this insn sets and needs. If they overlap, or
1560 if this insn references CC0, it can't be redundant. */
1562 CLEAR_RESOURCE (&needed);
1563 CLEAR_RESOURCE (&set);
1564 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1565 mark_referenced_resources (insn, &needed, true);
1567 /* If TARGET is a SEQUENCE, get the main insn. */
1568 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1569 target_main = XVECEXP (PATTERN (target), 0, 0);
1571 if (resource_conflicts_p (&needed, &set)
1572 #ifdef HAVE_cc0
1573 || reg_mentioned_p (cc0_rtx, ipat)
1574 #endif
1575 /* The insn requiring the delay may not set anything needed or set by
1576 INSN. */
1577 || insn_sets_resource_p (target_main, &needed, true)
1578 || insn_sets_resource_p (target_main, &set, true))
1579 return 0;
1581 /* Insns we pass may not set either NEEDED or SET, so merge them for
1582 simpler tests. */
1583 needed.memory |= set.memory;
1584 IOR_HARD_REG_SET (needed.regs, set.regs);
1586 /* This insn isn't redundant if it conflicts with an insn that either is
1587 or will be in a delay slot of TARGET. */
1589 while (delay_list)
1591 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1592 return 0;
1593 delay_list = XEXP (delay_list, 1);
1596 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1597 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1598 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1599 true))
1600 return 0;
1602 /* Scan backwards until we reach a label or an insn that uses something
1603 INSN sets or sets something insn uses or sets. */
1605 for (trial = PREV_INSN (target),
1606 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1607 trial && !LABEL_P (trial) && insns_to_search > 0;
1608 trial = PREV_INSN (trial))
1610 if (!INSN_P (trial))
1611 continue;
1612 --insns_to_search;
1614 pat = PATTERN (trial);
1615 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1616 continue;
1618 if (GET_CODE (pat) == SEQUENCE)
1620 bool annul_p = false;
1621 rtx control = XVECEXP (pat, 0, 0);
1623 /* If this is a CALL_INSN and its delay slots, it is hard to track
1624 the resource needs properly, so give up. */
1625 if (CALL_P (control))
1626 return 0;
1628 /* If this is an INSN or JUMP_INSN with delayed effects, it
1629 is hard to track the resource needs properly, so give up. */
1631 #ifdef INSN_SETS_ARE_DELAYED
1632 if (INSN_SETS_ARE_DELAYED (control))
1633 return 0;
1634 #endif
1636 #ifdef INSN_REFERENCES_ARE_DELAYED
1637 if (INSN_REFERENCES_ARE_DELAYED (control))
1638 return 0;
1639 #endif
1641 if (JUMP_P (control))
1642 annul_p = INSN_ANNULLED_BRANCH_P (control);
1644 /* See if any of the insns in the delay slot match, updating
1645 resource requirements as we go. */
1646 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1648 rtx candidate = XVECEXP (pat, 0, i);
1650 /* If an insn will be annulled if the branch is false, it isn't
1651 considered as a possible duplicate insn. */
1652 if (rtx_equal_p (PATTERN (candidate), ipat)
1653 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1655 /* Show that this insn will be used in the sequel. */
1656 INSN_FROM_TARGET_P (candidate) = 0;
1657 return candidate;
1660 /* Unless this is an annulled insn from the target of a branch,
1661 we must stop if it sets anything needed or set by INSN. */
1662 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1663 && insn_sets_resource_p (candidate, &needed, true))
1664 return 0;
1667 /* If the insn requiring the delay slot conflicts with INSN, we
1668 must stop. */
1669 if (insn_sets_resource_p (control, &needed, true))
1670 return 0;
1672 else
1674 /* See if TRIAL is the same as INSN. */
1675 pat = PATTERN (trial);
1676 if (rtx_equal_p (pat, ipat))
1677 return trial;
1679 /* Can't go any further if TRIAL conflicts with INSN. */
1680 if (insn_sets_resource_p (trial, &needed, true))
1681 return 0;
1685 return 0;
1688 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1689 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1690 is nonzero, we are allowed to fall into this thread; otherwise, we are
1691 not.
1693 If LABEL is used more than one or we pass a label other than LABEL before
1694 finding an active insn, we do not own this thread. */
1696 static int
1697 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1699 rtx active_insn;
1700 rtx insn;
1702 /* We don't own the function end. */
1703 if (thread == 0 || ANY_RETURN_P (thread))
1704 return 0;
1706 /* Get the first active insn, or THREAD, if it is an active insn. */
1707 active_insn = next_active_insn (PREV_INSN (thread));
1709 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1710 if (LABEL_P (insn)
1711 && (insn != label || LABEL_NUSES (insn) != 1))
1712 return 0;
1714 if (allow_fallthrough)
1715 return 1;
1717 /* Ensure that we reach a BARRIER before any insn or label. */
1718 for (insn = prev_nonnote_insn (thread);
1719 insn == 0 || !BARRIER_P (insn);
1720 insn = prev_nonnote_insn (insn))
1721 if (insn == 0
1722 || LABEL_P (insn)
1723 || (NONJUMP_INSN_P (insn)
1724 && GET_CODE (PATTERN (insn)) != USE
1725 && GET_CODE (PATTERN (insn)) != CLOBBER))
1726 return 0;
1728 return 1;
1731 /* Called when INSN is being moved from a location near the target of a jump.
1732 We leave a marker of the form (use (INSN)) immediately in front
1733 of WHERE for mark_target_live_regs. These markers will be deleted when
1734 reorg finishes.
1736 We used to try to update the live status of registers if WHERE is at
1737 the start of a basic block, but that can't work since we may remove a
1738 BARRIER in relax_delay_slots. */
1740 static void
1741 update_block (rtx insn, rtx where)
1743 /* Ignore if this was in a delay slot and it came from the target of
1744 a branch. */
1745 if (INSN_FROM_TARGET_P (insn))
1746 return;
1748 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1750 /* INSN might be making a value live in a block where it didn't use to
1751 be. So recompute liveness information for this block. */
1753 incr_ticks_for_insn (insn);
1756 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1757 the basic block containing the jump. */
1759 static int
1760 reorg_redirect_jump (rtx jump, rtx nlabel)
1762 incr_ticks_for_insn (jump);
1763 return redirect_jump (jump, nlabel, 1);
1766 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1767 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1768 that reference values used in INSN. If we find one, then we move the
1769 REG_DEAD note to INSN.
1771 This is needed to handle the case where a later insn (after INSN) has a
1772 REG_DEAD note for a register used by INSN, and this later insn subsequently
1773 gets moved before a CODE_LABEL because it is a redundant insn. In this
1774 case, mark_target_live_regs may be confused into thinking the register
1775 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1777 static void
1778 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1780 rtx p, link, next;
1782 for (p = next_nonnote_insn (insn); p != delayed_insn;
1783 p = next_nonnote_insn (p))
1784 for (link = REG_NOTES (p); link; link = next)
1786 next = XEXP (link, 1);
1788 if (REG_NOTE_KIND (link) != REG_DEAD
1789 || !REG_P (XEXP (link, 0)))
1790 continue;
1792 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1794 /* Move the REG_DEAD note from P to INSN. */
1795 remove_note (p, link);
1796 XEXP (link, 1) = REG_NOTES (insn);
1797 REG_NOTES (insn) = link;
1802 /* Called when an insn redundant with start_insn is deleted. If there
1803 is a REG_DEAD note for the target of start_insn between start_insn
1804 and stop_insn, then the REG_DEAD note needs to be deleted since the
1805 value no longer dies there.
1807 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1808 confused into thinking the register is dead. */
1810 static void
1811 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1813 rtx p, link, next;
1815 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1816 p = next_nonnote_insn (p))
1817 for (link = REG_NOTES (p); link; link = next)
1819 next = XEXP (link, 1);
1821 if (REG_NOTE_KIND (link) != REG_DEAD
1822 || !REG_P (XEXP (link, 0)))
1823 continue;
1825 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1827 remove_note (p, link);
1828 return;
1833 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1835 This handles the case of udivmodXi4 instructions which optimize their
1836 output depending on whether any REG_UNUSED notes are present.
1837 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1838 does. */
1840 static void
1841 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1843 rtx link, next;
1845 for (link = REG_NOTES (insn); link; link = next)
1847 next = XEXP (link, 1);
1849 if (REG_NOTE_KIND (link) != REG_UNUSED
1850 || !REG_P (XEXP (link, 0)))
1851 continue;
1853 if (! find_regno_note (redundant_insn, REG_UNUSED,
1854 REGNO (XEXP (link, 0))))
1855 remove_note (insn, link);
1859 /* Return the label before INSN, or put a new label there. */
1861 static rtx
1862 get_label_before (rtx insn)
1864 rtx label;
1866 /* Find an existing label at this point
1867 or make a new one if there is none. */
1868 label = prev_nonnote_insn (insn);
1870 if (label == 0 || !LABEL_P (label))
1872 rtx prev = PREV_INSN (insn);
1874 label = gen_label_rtx ();
1875 emit_label_after (label, prev);
1876 LABEL_NUSES (label) = 0;
1878 return label;
1881 /* Scan a function looking for insns that need a delay slot and find insns to
1882 put into the delay slot.
1884 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1885 as calls). We do these first since we don't want jump insns (that are
1886 easier to fill) to get the only insns that could be used for non-jump insns.
1887 When it is zero, only try to fill JUMP_INSNs.
1889 When slots are filled in this manner, the insns (including the
1890 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1891 it is possible to tell whether a delay slot has really been filled
1892 or not. `final' knows how to deal with this, by communicating
1893 through FINAL_SEQUENCE. */
1895 static void
1896 fill_simple_delay_slots (int non_jumps_p)
1898 rtx insn, pat, trial, next_trial;
1899 int i;
1900 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1901 struct resources needed, set;
1902 int slots_to_fill, slots_filled;
1903 rtx delay_list;
1905 for (i = 0; i < num_unfilled_slots; i++)
1907 int flags;
1908 /* Get the next insn to fill. If it has already had any slots assigned,
1909 we can't do anything with it. Maybe we'll improve this later. */
1911 insn = unfilled_slots_base[i];
1912 if (insn == 0
1913 || INSN_DELETED_P (insn)
1914 || (NONJUMP_INSN_P (insn)
1915 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1916 || (JUMP_P (insn) && non_jumps_p)
1917 || (!JUMP_P (insn) && ! non_jumps_p))
1918 continue;
1920 /* It may have been that this insn used to need delay slots, but
1921 now doesn't; ignore in that case. This can happen, for example,
1922 on the HP PA RISC, where the number of delay slots depends on
1923 what insns are nearby. */
1924 slots_to_fill = num_delay_slots (insn);
1926 /* Some machine description have defined instructions to have
1927 delay slots only in certain circumstances which may depend on
1928 nearby insns (which change due to reorg's actions).
1930 For example, the PA port normally has delay slots for unconditional
1931 jumps.
1933 However, the PA port claims such jumps do not have a delay slot
1934 if they are immediate successors of certain CALL_INSNs. This
1935 allows the port to favor filling the delay slot of the call with
1936 the unconditional jump. */
1937 if (slots_to_fill == 0)
1938 continue;
1940 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1941 says how many. After initialization, first try optimizing
1943 call _foo call _foo
1944 nop add %o7,.-L1,%o7
1945 b,a L1
1948 If this case applies, the delay slot of the call is filled with
1949 the unconditional jump. This is done first to avoid having the
1950 delay slot of the call filled in the backward scan. Also, since
1951 the unconditional jump is likely to also have a delay slot, that
1952 insn must exist when it is subsequently scanned.
1954 This is tried on each insn with delay slots as some machines
1955 have insns which perform calls, but are not represented as
1956 CALL_INSNs. */
1958 slots_filled = 0;
1959 delay_list = 0;
1961 if (JUMP_P (insn))
1962 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1963 else
1964 flags = get_jump_flags (insn, NULL_RTX);
1966 if ((trial = next_active_insn (insn))
1967 && JUMP_P (trial)
1968 && simplejump_p (trial)
1969 && eligible_for_delay (insn, slots_filled, trial, flags)
1970 && no_labels_between_p (insn, trial)
1971 && ! can_throw_internal (trial))
1973 rtx *tmp;
1974 slots_filled++;
1975 delay_list = add_to_delay_list (trial, delay_list);
1977 /* TRIAL may have had its delay slot filled, then unfilled. When
1978 the delay slot is unfilled, TRIAL is placed back on the unfilled
1979 slots obstack. Unfortunately, it is placed on the end of the
1980 obstack, not in its original location. Therefore, we must search
1981 from entry i + 1 to the end of the unfilled slots obstack to
1982 try and find TRIAL. */
1983 tmp = &unfilled_slots_base[i + 1];
1984 while (*tmp != trial && tmp != unfilled_slots_next)
1985 tmp++;
1987 /* Remove the unconditional jump from consideration for delay slot
1988 filling and unthread it. */
1989 if (*tmp == trial)
1990 *tmp = 0;
1992 rtx next = NEXT_INSN (trial);
1993 rtx prev = PREV_INSN (trial);
1994 if (prev)
1995 NEXT_INSN (prev) = next;
1996 if (next)
1997 PREV_INSN (next) = prev;
2001 /* Now, scan backwards from the insn to search for a potential
2002 delay-slot candidate. Stop searching when a label or jump is hit.
2004 For each candidate, if it is to go into the delay slot (moved
2005 forward in execution sequence), it must not need or set any resources
2006 that were set by later insns and must not set any resources that
2007 are needed for those insns.
2009 The delay slot insn itself sets resources unless it is a call
2010 (in which case the called routine, not the insn itself, is doing
2011 the setting). */
2013 if (slots_filled < slots_to_fill)
2015 CLEAR_RESOURCE (&needed);
2016 CLEAR_RESOURCE (&set);
2017 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2018 mark_referenced_resources (insn, &needed, false);
2020 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2021 trial = next_trial)
2023 next_trial = prev_nonnote_insn (trial);
2025 /* This must be an INSN or CALL_INSN. */
2026 pat = PATTERN (trial);
2028 /* Stand-alone USE and CLOBBER are just for flow. */
2029 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2030 continue;
2032 /* Check for resource conflict first, to avoid unnecessary
2033 splitting. */
2034 if (! insn_references_resource_p (trial, &set, true)
2035 && ! insn_sets_resource_p (trial, &set, true)
2036 && ! insn_sets_resource_p (trial, &needed, true)
2037 #ifdef HAVE_cc0
2038 /* Can't separate set of cc0 from its use. */
2039 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2040 #endif
2041 && ! can_throw_internal (trial))
2043 trial = try_split (pat, trial, 1);
2044 next_trial = prev_nonnote_insn (trial);
2045 if (eligible_for_delay (insn, slots_filled, trial, flags))
2047 /* In this case, we are searching backward, so if we
2048 find insns to put on the delay list, we want
2049 to put them at the head, rather than the
2050 tail, of the list. */
2052 update_reg_dead_notes (trial, insn);
2053 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2054 trial, delay_list);
2055 update_block (trial, trial);
2056 delete_related_insns (trial);
2057 if (slots_to_fill == ++slots_filled)
2058 break;
2059 continue;
2063 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2064 mark_referenced_resources (trial, &needed, true);
2068 /* If all needed slots haven't been filled, we come here. */
2070 /* Try to optimize case of jumping around a single insn. */
2071 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2072 if (slots_filled != slots_to_fill
2073 && delay_list == 0
2074 && JUMP_P (insn)
2075 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2076 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2078 delay_list = optimize_skip (insn);
2079 if (delay_list)
2080 slots_filled += 1;
2082 #endif
2084 /* Try to get insns from beyond the insn needing the delay slot.
2085 These insns can neither set or reference resources set in insns being
2086 skipped, cannot set resources in the insn being skipped, and, if this
2087 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2088 call might not return).
2090 There used to be code which continued past the target label if
2091 we saw all uses of the target label. This code did not work,
2092 because it failed to account for some instructions which were
2093 both annulled and marked as from the target. This can happen as a
2094 result of optimize_skip. Since this code was redundant with
2095 fill_eager_delay_slots anyways, it was just deleted. */
2097 if (slots_filled != slots_to_fill
2098 /* If this instruction could throw an exception which is
2099 caught in the same function, then it's not safe to fill
2100 the delay slot with an instruction from beyond this
2101 point. For example, consider:
2103 int i = 2;
2105 try {
2106 f();
2107 i = 3;
2108 } catch (...) {}
2110 return i;
2112 Even though `i' is a local variable, we must be sure not
2113 to put `i = 3' in the delay slot if `f' might throw an
2114 exception.
2116 Presumably, we should also check to see if we could get
2117 back to this function via `setjmp'. */
2118 && ! can_throw_internal (insn)
2119 && !JUMP_P (insn))
2121 int maybe_never = 0;
2122 rtx pat, trial_delay;
2124 CLEAR_RESOURCE (&needed);
2125 CLEAR_RESOURCE (&set);
2126 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2127 mark_referenced_resources (insn, &needed, true);
2129 if (CALL_P (insn))
2130 maybe_never = 1;
2132 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2133 trial = next_trial)
2135 next_trial = next_nonnote_insn (trial);
2137 /* This must be an INSN or CALL_INSN. */
2138 pat = PATTERN (trial);
2140 /* Stand-alone USE and CLOBBER are just for flow. */
2141 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2142 continue;
2144 /* If this already has filled delay slots, get the insn needing
2145 the delay slots. */
2146 if (GET_CODE (pat) == SEQUENCE)
2147 trial_delay = XVECEXP (pat, 0, 0);
2148 else
2149 trial_delay = trial;
2151 /* Stop our search when seeing a jump. */
2152 if (JUMP_P (trial_delay))
2153 break;
2155 /* See if we have a resource problem before we try to split. */
2156 if (GET_CODE (pat) != SEQUENCE
2157 && ! insn_references_resource_p (trial, &set, true)
2158 && ! insn_sets_resource_p (trial, &set, true)
2159 && ! insn_sets_resource_p (trial, &needed, true)
2160 #ifdef HAVE_cc0
2161 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2162 #endif
2163 && ! (maybe_never && may_trap_or_fault_p (pat))
2164 && (trial = try_split (pat, trial, 0))
2165 && eligible_for_delay (insn, slots_filled, trial, flags)
2166 && ! can_throw_internal(trial))
2168 next_trial = next_nonnote_insn (trial);
2169 delay_list = add_to_delay_list (trial, delay_list);
2170 #ifdef HAVE_cc0
2171 if (reg_mentioned_p (cc0_rtx, pat))
2172 link_cc0_insns (trial);
2173 #endif
2174 delete_related_insns (trial);
2175 if (slots_to_fill == ++slots_filled)
2176 break;
2177 continue;
2180 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2181 mark_referenced_resources (trial, &needed, true);
2183 /* Ensure we don't put insns between the setting of cc and the
2184 comparison by moving a setting of cc into an earlier delay
2185 slot since these insns could clobber the condition code. */
2186 set.cc = 1;
2188 /* If this is a call, we might not get here. */
2189 if (CALL_P (trial_delay))
2190 maybe_never = 1;
2193 /* If there are slots left to fill and our search was stopped by an
2194 unconditional branch, try the insn at the branch target. We can
2195 redirect the branch if it works.
2197 Don't do this if the insn at the branch target is a branch. */
2198 if (slots_to_fill != slots_filled
2199 && trial
2200 && jump_to_label_p (trial)
2201 && simplejump_p (trial)
2202 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2203 && ! (NONJUMP_INSN_P (next_trial)
2204 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2205 && !JUMP_P (next_trial)
2206 && ! insn_references_resource_p (next_trial, &set, true)
2207 && ! insn_sets_resource_p (next_trial, &set, true)
2208 && ! insn_sets_resource_p (next_trial, &needed, true)
2209 #ifdef HAVE_cc0
2210 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2211 #endif
2212 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2213 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2214 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2215 && ! can_throw_internal (trial))
2217 /* See comment in relax_delay_slots about necessity of using
2218 next_real_insn here. */
2219 rtx new_label = next_real_insn (next_trial);
2221 if (new_label != 0)
2222 new_label = get_label_before (new_label);
2223 else
2224 new_label = find_end_label (simple_return_rtx);
2226 if (new_label)
2228 delay_list
2229 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2230 delay_list);
2231 slots_filled++;
2232 reorg_redirect_jump (trial, new_label);
2237 /* If this is an unconditional jump, then try to get insns from the
2238 target of the jump. */
2239 if (JUMP_P (insn)
2240 && simplejump_p (insn)
2241 && slots_filled != slots_to_fill)
2242 delay_list
2243 = fill_slots_from_thread (insn, const_true_rtx,
2244 next_active_insn (JUMP_LABEL (insn)),
2245 NULL, 1, 1,
2246 own_thread_p (JUMP_LABEL (insn),
2247 JUMP_LABEL (insn), 0),
2248 slots_to_fill, &slots_filled,
2249 delay_list);
2251 if (delay_list)
2252 unfilled_slots_base[i]
2253 = emit_delay_sequence (insn, delay_list, slots_filled);
2255 if (slots_to_fill == slots_filled)
2256 unfilled_slots_base[i] = 0;
2258 note_delay_statistics (slots_filled, 0);
2262 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2263 return the ultimate label reached by any such chain of jumps.
2264 Return a suitable return rtx if the chain ultimately leads to a
2265 return instruction.
2266 If LABEL is not followed by a jump, return LABEL.
2267 If the chain loops or we can't find end, return LABEL,
2268 since that tells caller to avoid changing the insn.
2269 If the returned label is obtained by following a REG_CROSSING_JUMP
2270 jump, set *CROSSING to true, otherwise set it to false. */
2272 static rtx
2273 follow_jumps (rtx label, rtx jump, bool *crossing)
2275 rtx insn;
2276 rtx next;
2277 rtx value = label;
2278 int depth;
2280 *crossing = false;
2281 if (ANY_RETURN_P (label))
2282 return label;
2283 for (depth = 0;
2284 (depth < 10
2285 && (insn = next_active_insn (value)) != 0
2286 && JUMP_P (insn)
2287 && JUMP_LABEL (insn) != NULL_RTX
2288 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2289 || ANY_RETURN_P (PATTERN (insn)))
2290 && (next = NEXT_INSN (insn))
2291 && BARRIER_P (next));
2292 depth++)
2294 rtx this_label = JUMP_LABEL (insn);
2295 rtx tem;
2297 /* If we have found a cycle, make the insn jump to itself. */
2298 if (this_label == label)
2299 return label;
2300 if (ANY_RETURN_P (this_label))
2301 return this_label;
2302 tem = next_active_insn (this_label);
2303 if (tem && JUMP_TABLE_DATA_P (tem))
2304 break;
2306 if (!targetm.can_follow_jump (jump, insn))
2307 break;
2308 if (!*crossing)
2309 *crossing
2310 = find_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX) != NULL_RTX;
2311 value = this_label;
2313 if (depth == 10)
2314 return label;
2315 return value;
2318 /* Try to find insns to place in delay slots.
2320 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2321 or is an unconditional branch if CONDITION is const_true_rtx.
2322 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2324 THREAD is a flow-of-control, either the insns to be executed if the
2325 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2327 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2328 to see if any potential delay slot insns set things needed there.
2330 LIKELY is nonzero if it is extremely likely that the branch will be
2331 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2332 end of a loop back up to the top.
2334 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2335 thread. I.e., it is the fallthrough code of our jump or the target of the
2336 jump when we are the only jump going there.
2338 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2339 case, we can only take insns from the head of the thread for our delay
2340 slot. We then adjust the jump to point after the insns we have taken. */
2342 static rtx
2343 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2344 rtx opposite_thread, int likely, int thread_if_true,
2345 int own_thread, int slots_to_fill,
2346 int *pslots_filled, rtx delay_list)
2348 rtx new_thread;
2349 struct resources opposite_needed, set, needed;
2350 rtx trial;
2351 int lose = 0;
2352 int must_annul = 0;
2353 int flags;
2355 /* Validate our arguments. */
2356 gcc_assert(condition != const_true_rtx || thread_if_true);
2357 gcc_assert(own_thread || thread_if_true);
2359 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2361 /* If our thread is the end of subroutine, we can't get any delay
2362 insns from that. */
2363 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2364 return delay_list;
2366 /* If this is an unconditional branch, nothing is needed at the
2367 opposite thread. Otherwise, compute what is needed there. */
2368 if (condition == const_true_rtx)
2369 CLEAR_RESOURCE (&opposite_needed);
2370 else
2371 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2373 /* If the insn at THREAD can be split, do it here to avoid having to
2374 update THREAD and NEW_THREAD if it is done in the loop below. Also
2375 initialize NEW_THREAD. */
2377 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2379 /* Scan insns at THREAD. We are looking for an insn that can be removed
2380 from THREAD (it neither sets nor references resources that were set
2381 ahead of it and it doesn't set anything needs by the insns ahead of
2382 it) and that either can be placed in an annulling insn or aren't
2383 needed at OPPOSITE_THREAD. */
2385 CLEAR_RESOURCE (&needed);
2386 CLEAR_RESOURCE (&set);
2388 /* If we do not own this thread, we must stop as soon as we find
2389 something that we can't put in a delay slot, since all we can do
2390 is branch into THREAD at a later point. Therefore, labels stop
2391 the search if this is not the `true' thread. */
2393 for (trial = thread;
2394 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2395 trial = next_nonnote_insn (trial))
2397 rtx pat, old_trial;
2399 /* If we have passed a label, we no longer own this thread. */
2400 if (LABEL_P (trial))
2402 own_thread = 0;
2403 continue;
2406 pat = PATTERN (trial);
2407 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2408 continue;
2410 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2411 don't separate or copy insns that set and use CC0. */
2412 if (! insn_references_resource_p (trial, &set, true)
2413 && ! insn_sets_resource_p (trial, &set, true)
2414 && ! insn_sets_resource_p (trial, &needed, true)
2415 #ifdef HAVE_cc0
2416 && ! (reg_mentioned_p (cc0_rtx, pat)
2417 && (! own_thread || ! sets_cc0_p (pat)))
2418 #endif
2419 && ! can_throw_internal (trial))
2421 rtx prior_insn;
2423 /* If TRIAL is redundant with some insn before INSN, we don't
2424 actually need to add it to the delay list; we can merely pretend
2425 we did. */
2426 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2428 fix_reg_dead_note (prior_insn, insn);
2429 if (own_thread)
2431 update_block (trial, thread);
2432 if (trial == thread)
2434 thread = next_active_insn (thread);
2435 if (new_thread == trial)
2436 new_thread = thread;
2439 delete_related_insns (trial);
2441 else
2443 update_reg_unused_notes (prior_insn, trial);
2444 new_thread = next_active_insn (trial);
2447 continue;
2450 /* There are two ways we can win: If TRIAL doesn't set anything
2451 needed at the opposite thread and can't trap, or if it can
2452 go into an annulled delay slot. */
2453 if (!must_annul
2454 && (condition == const_true_rtx
2455 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2456 && ! may_trap_or_fault_p (pat)
2457 && ! RTX_FRAME_RELATED_P (trial))))
2459 old_trial = trial;
2460 trial = try_split (pat, trial, 0);
2461 if (new_thread == old_trial)
2462 new_thread = trial;
2463 if (thread == old_trial)
2464 thread = trial;
2465 pat = PATTERN (trial);
2466 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2467 goto winner;
2469 else if (0
2470 #ifdef ANNUL_IFTRUE_SLOTS
2471 || ! thread_if_true
2472 #endif
2473 #ifdef ANNUL_IFFALSE_SLOTS
2474 || thread_if_true
2475 #endif
2478 old_trial = trial;
2479 trial = try_split (pat, trial, 0);
2480 if (new_thread == old_trial)
2481 new_thread = trial;
2482 if (thread == old_trial)
2483 thread = trial;
2484 pat = PATTERN (trial);
2485 if ((must_annul || delay_list == NULL) && (thread_if_true
2486 ? check_annul_list_true_false (0, delay_list)
2487 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2488 : check_annul_list_true_false (1, delay_list)
2489 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2491 rtx temp;
2493 must_annul = 1;
2494 winner:
2496 #ifdef HAVE_cc0
2497 if (reg_mentioned_p (cc0_rtx, pat))
2498 link_cc0_insns (trial);
2499 #endif
2501 /* If we own this thread, delete the insn. If this is the
2502 destination of a branch, show that a basic block status
2503 may have been updated. In any case, mark the new
2504 starting point of this thread. */
2505 if (own_thread)
2507 rtx note;
2509 update_block (trial, thread);
2510 if (trial == thread)
2512 thread = next_active_insn (thread);
2513 if (new_thread == trial)
2514 new_thread = thread;
2517 /* We are moving this insn, not deleting it. We must
2518 temporarily increment the use count on any referenced
2519 label lest it be deleted by delete_related_insns. */
2520 for (note = REG_NOTES (trial);
2521 note != NULL_RTX;
2522 note = XEXP (note, 1))
2523 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2524 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2526 /* REG_LABEL_OPERAND could be
2527 NOTE_INSN_DELETED_LABEL too. */
2528 if (LABEL_P (XEXP (note, 0)))
2529 LABEL_NUSES (XEXP (note, 0))++;
2530 else
2531 gcc_assert (REG_NOTE_KIND (note)
2532 == REG_LABEL_OPERAND);
2534 if (jump_to_label_p (trial))
2535 LABEL_NUSES (JUMP_LABEL (trial))++;
2537 delete_related_insns (trial);
2539 for (note = REG_NOTES (trial);
2540 note != NULL_RTX;
2541 note = XEXP (note, 1))
2542 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2543 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2545 /* REG_LABEL_OPERAND could be
2546 NOTE_INSN_DELETED_LABEL too. */
2547 if (LABEL_P (XEXP (note, 0)))
2548 LABEL_NUSES (XEXP (note, 0))--;
2549 else
2550 gcc_assert (REG_NOTE_KIND (note)
2551 == REG_LABEL_OPERAND);
2553 if (jump_to_label_p (trial))
2554 LABEL_NUSES (JUMP_LABEL (trial))--;
2556 else
2557 new_thread = next_active_insn (trial);
2559 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2560 if (thread_if_true)
2561 INSN_FROM_TARGET_P (temp) = 1;
2563 delay_list = add_to_delay_list (temp, delay_list);
2565 if (slots_to_fill == ++(*pslots_filled))
2567 /* Even though we have filled all the slots, we
2568 may be branching to a location that has a
2569 redundant insn. Skip any if so. */
2570 while (new_thread && ! own_thread
2571 && ! insn_sets_resource_p (new_thread, &set, true)
2572 && ! insn_sets_resource_p (new_thread, &needed,
2573 true)
2574 && ! insn_references_resource_p (new_thread,
2575 &set, true)
2576 && (prior_insn
2577 = redundant_insn (new_thread, insn,
2578 delay_list)))
2580 /* We know we do not own the thread, so no need
2581 to call update_block and delete_insn. */
2582 fix_reg_dead_note (prior_insn, insn);
2583 update_reg_unused_notes (prior_insn, new_thread);
2584 new_thread = next_active_insn (new_thread);
2586 break;
2589 continue;
2594 /* This insn can't go into a delay slot. */
2595 lose = 1;
2596 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2597 mark_referenced_resources (trial, &needed, true);
2599 /* Ensure we don't put insns between the setting of cc and the comparison
2600 by moving a setting of cc into an earlier delay slot since these insns
2601 could clobber the condition code. */
2602 set.cc = 1;
2604 /* If this insn is a register-register copy and the next insn has
2605 a use of our destination, change it to use our source. That way,
2606 it will become a candidate for our delay slot the next time
2607 through this loop. This case occurs commonly in loops that
2608 scan a list.
2610 We could check for more complex cases than those tested below,
2611 but it doesn't seem worth it. It might also be a good idea to try
2612 to swap the two insns. That might do better.
2614 We can't do this if the next insn modifies our destination, because
2615 that would make the replacement into the insn invalid. We also can't
2616 do this if it modifies our source, because it might be an earlyclobber
2617 operand. This latter test also prevents updating the contents of
2618 a PRE_INC. We also can't do this if there's overlap of source and
2619 destination. Overlap may happen for larger-than-register-size modes. */
2621 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2622 && REG_P (SET_SRC (pat))
2623 && REG_P (SET_DEST (pat))
2624 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2626 rtx next = next_nonnote_insn (trial);
2628 if (next && NONJUMP_INSN_P (next)
2629 && GET_CODE (PATTERN (next)) != USE
2630 && ! reg_set_p (SET_DEST (pat), next)
2631 && ! reg_set_p (SET_SRC (pat), next)
2632 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2633 && ! modified_in_p (SET_DEST (pat), next))
2634 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2638 /* If we stopped on a branch insn that has delay slots, see if we can
2639 steal some of the insns in those slots. */
2640 if (trial && NONJUMP_INSN_P (trial)
2641 && GET_CODE (PATTERN (trial)) == SEQUENCE
2642 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2644 /* If this is the `true' thread, we will want to follow the jump,
2645 so we can only do this if we have taken everything up to here. */
2646 if (thread_if_true && trial == new_thread)
2648 delay_list
2649 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2650 delay_list, &set, &needed,
2651 &opposite_needed, slots_to_fill,
2652 pslots_filled, &must_annul,
2653 &new_thread);
2654 /* If we owned the thread and are told that it branched
2655 elsewhere, make sure we own the thread at the new location. */
2656 if (own_thread && trial != new_thread)
2657 own_thread = own_thread_p (new_thread, new_thread, 0);
2659 else if (! thread_if_true)
2660 delay_list
2661 = steal_delay_list_from_fallthrough (insn, condition,
2662 PATTERN (trial),
2663 delay_list, &set, &needed,
2664 &opposite_needed, slots_to_fill,
2665 pslots_filled, &must_annul);
2668 /* If we haven't found anything for this delay slot and it is very
2669 likely that the branch will be taken, see if the insn at our target
2670 increments or decrements a register with an increment that does not
2671 depend on the destination register. If so, try to place the opposite
2672 arithmetic insn after the jump insn and put the arithmetic insn in the
2673 delay slot. If we can't do this, return. */
2674 if (delay_list == 0 && likely
2675 && new_thread && !ANY_RETURN_P (new_thread)
2676 && NONJUMP_INSN_P (new_thread)
2677 && !RTX_FRAME_RELATED_P (new_thread)
2678 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2679 && asm_noperands (PATTERN (new_thread)) < 0)
2681 rtx pat = PATTERN (new_thread);
2682 rtx dest;
2683 rtx src;
2685 trial = new_thread;
2686 pat = PATTERN (trial);
2688 if (!NONJUMP_INSN_P (trial)
2689 || GET_CODE (pat) != SET
2690 || ! eligible_for_delay (insn, 0, trial, flags)
2691 || can_throw_internal (trial))
2692 return 0;
2694 dest = SET_DEST (pat), src = SET_SRC (pat);
2695 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2696 && rtx_equal_p (XEXP (src, 0), dest)
2697 && (!FLOAT_MODE_P (GET_MODE (src))
2698 || flag_unsafe_math_optimizations)
2699 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2700 && ! side_effects_p (pat))
2702 rtx other = XEXP (src, 1);
2703 rtx new_arith;
2704 rtx ninsn;
2706 /* If this is a constant adjustment, use the same code with
2707 the negated constant. Otherwise, reverse the sense of the
2708 arithmetic. */
2709 if (CONST_INT_P (other))
2710 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2711 negate_rtx (GET_MODE (src), other));
2712 else
2713 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2714 GET_MODE (src), dest, other);
2716 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2717 insn);
2719 if (recog_memoized (ninsn) < 0
2720 || (extract_insn (ninsn), ! constrain_operands (1)))
2722 delete_related_insns (ninsn);
2723 return 0;
2726 if (own_thread)
2728 update_block (trial, thread);
2729 if (trial == thread)
2731 thread = next_active_insn (thread);
2732 if (new_thread == trial)
2733 new_thread = thread;
2735 delete_related_insns (trial);
2737 else
2738 new_thread = next_active_insn (trial);
2740 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2741 if (thread_if_true)
2742 INSN_FROM_TARGET_P (ninsn) = 1;
2744 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2745 (*pslots_filled)++;
2749 if (delay_list && must_annul)
2750 INSN_ANNULLED_BRANCH_P (insn) = 1;
2752 /* If we are to branch into the middle of this thread, find an appropriate
2753 label or make a new one if none, and redirect INSN to it. If we hit the
2754 end of the function, use the end-of-function label. */
2755 if (new_thread != thread)
2757 rtx label;
2758 bool crossing = false;
2760 gcc_assert (thread_if_true);
2762 if (new_thread && simplejump_or_return_p (new_thread)
2763 && redirect_with_delay_list_safe_p (insn,
2764 JUMP_LABEL (new_thread),
2765 delay_list))
2766 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
2768 if (ANY_RETURN_P (new_thread))
2769 label = find_end_label (new_thread);
2770 else if (LABEL_P (new_thread))
2771 label = new_thread;
2772 else
2773 label = get_label_before (new_thread);
2775 if (label)
2777 reorg_redirect_jump (insn, label);
2778 if (crossing)
2779 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
2783 return delay_list;
2786 /* Make another attempt to find insns to place in delay slots.
2788 We previously looked for insns located in front of the delay insn
2789 and, for non-jump delay insns, located behind the delay insn.
2791 Here only try to schedule jump insns and try to move insns from either
2792 the target or the following insns into the delay slot. If annulling is
2793 supported, we will be likely to do this. Otherwise, we can do this only
2794 if safe. */
2796 static void
2797 fill_eager_delay_slots (void)
2799 rtx insn;
2800 int i;
2801 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2803 for (i = 0; i < num_unfilled_slots; i++)
2805 rtx condition;
2806 rtx target_label, insn_at_target, fallthrough_insn;
2807 rtx delay_list = 0;
2808 int own_target;
2809 int own_fallthrough;
2810 int prediction, slots_to_fill, slots_filled;
2812 insn = unfilled_slots_base[i];
2813 if (insn == 0
2814 || INSN_DELETED_P (insn)
2815 || !JUMP_P (insn)
2816 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2817 continue;
2819 slots_to_fill = num_delay_slots (insn);
2820 /* Some machine description have defined instructions to have
2821 delay slots only in certain circumstances which may depend on
2822 nearby insns (which change due to reorg's actions).
2824 For example, the PA port normally has delay slots for unconditional
2825 jumps.
2827 However, the PA port claims such jumps do not have a delay slot
2828 if they are immediate successors of certain CALL_INSNs. This
2829 allows the port to favor filling the delay slot of the call with
2830 the unconditional jump. */
2831 if (slots_to_fill == 0)
2832 continue;
2834 slots_filled = 0;
2835 target_label = JUMP_LABEL (insn);
2836 condition = get_branch_condition (insn, target_label);
2838 if (condition == 0)
2839 continue;
2841 /* Get the next active fallthrough and target insns and see if we own
2842 them. Then see whether the branch is likely true. We don't need
2843 to do a lot of this for unconditional branches. */
2845 insn_at_target = first_active_target_insn (target_label);
2846 own_target = own_thread_p (target_label, target_label, 0);
2848 if (condition == const_true_rtx)
2850 own_fallthrough = 0;
2851 fallthrough_insn = 0;
2852 prediction = 2;
2854 else
2856 fallthrough_insn = next_active_insn (insn);
2857 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2858 prediction = mostly_true_jump (insn);
2861 /* If this insn is expected to branch, first try to get insns from our
2862 target, then our fallthrough insns. If it is not expected to branch,
2863 try the other order. */
2865 if (prediction > 0)
2867 delay_list
2868 = fill_slots_from_thread (insn, condition, insn_at_target,
2869 fallthrough_insn, prediction == 2, 1,
2870 own_target,
2871 slots_to_fill, &slots_filled, delay_list);
2873 if (delay_list == 0 && own_fallthrough)
2875 /* Even though we didn't find anything for delay slots,
2876 we might have found a redundant insn which we deleted
2877 from the thread that was filled. So we have to recompute
2878 the next insn at the target. */
2879 target_label = JUMP_LABEL (insn);
2880 insn_at_target = first_active_target_insn (target_label);
2882 delay_list
2883 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2884 insn_at_target, 0, 0,
2885 own_fallthrough,
2886 slots_to_fill, &slots_filled,
2887 delay_list);
2890 else
2892 if (own_fallthrough)
2893 delay_list
2894 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2895 insn_at_target, 0, 0,
2896 own_fallthrough,
2897 slots_to_fill, &slots_filled,
2898 delay_list);
2900 if (delay_list == 0)
2901 delay_list
2902 = fill_slots_from_thread (insn, condition, insn_at_target,
2903 next_active_insn (insn), 0, 1,
2904 own_target,
2905 slots_to_fill, &slots_filled,
2906 delay_list);
2909 if (delay_list)
2910 unfilled_slots_base[i]
2911 = emit_delay_sequence (insn, delay_list, slots_filled);
2913 if (slots_to_fill == slots_filled)
2914 unfilled_slots_base[i] = 0;
2916 note_delay_statistics (slots_filled, 1);
2920 static void delete_computation (rtx insn);
2922 /* Recursively delete prior insns that compute the value (used only by INSN
2923 which the caller is deleting) stored in the register mentioned by NOTE
2924 which is a REG_DEAD note associated with INSN. */
2926 static void
2927 delete_prior_computation (rtx note, rtx insn)
2929 rtx our_prev;
2930 rtx reg = XEXP (note, 0);
2932 for (our_prev = prev_nonnote_insn (insn);
2933 our_prev && (NONJUMP_INSN_P (our_prev)
2934 || CALL_P (our_prev));
2935 our_prev = prev_nonnote_insn (our_prev))
2937 rtx pat = PATTERN (our_prev);
2939 /* If we reach a CALL which is not calling a const function
2940 or the callee pops the arguments, then give up. */
2941 if (CALL_P (our_prev)
2942 && (! RTL_CONST_CALL_P (our_prev)
2943 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2944 break;
2946 /* If we reach a SEQUENCE, it is too complex to try to
2947 do anything with it, so give up. We can be run during
2948 and after reorg, so SEQUENCE rtl can legitimately show
2949 up here. */
2950 if (GET_CODE (pat) == SEQUENCE)
2951 break;
2953 if (GET_CODE (pat) == USE
2954 && NONJUMP_INSN_P (XEXP (pat, 0)))
2955 /* reorg creates USEs that look like this. We leave them
2956 alone because reorg needs them for its own purposes. */
2957 break;
2959 if (reg_set_p (reg, pat))
2961 if (side_effects_p (pat) && !CALL_P (our_prev))
2962 break;
2964 if (GET_CODE (pat) == PARALLEL)
2966 /* If we find a SET of something else, we can't
2967 delete the insn. */
2969 int i;
2971 for (i = 0; i < XVECLEN (pat, 0); i++)
2973 rtx part = XVECEXP (pat, 0, i);
2975 if (GET_CODE (part) == SET
2976 && SET_DEST (part) != reg)
2977 break;
2980 if (i == XVECLEN (pat, 0))
2981 delete_computation (our_prev);
2983 else if (GET_CODE (pat) == SET
2984 && REG_P (SET_DEST (pat)))
2986 int dest_regno = REGNO (SET_DEST (pat));
2987 int dest_endregno = END_REGNO (SET_DEST (pat));
2988 int regno = REGNO (reg);
2989 int endregno = END_REGNO (reg);
2991 if (dest_regno >= regno
2992 && dest_endregno <= endregno)
2993 delete_computation (our_prev);
2995 /* We may have a multi-word hard register and some, but not
2996 all, of the words of the register are needed in subsequent
2997 insns. Write REG_UNUSED notes for those parts that were not
2998 needed. */
2999 else if (dest_regno <= regno
3000 && dest_endregno >= endregno)
3002 int i;
3004 add_reg_note (our_prev, REG_UNUSED, reg);
3006 for (i = dest_regno; i < dest_endregno; i++)
3007 if (! find_regno_note (our_prev, REG_UNUSED, i))
3008 break;
3010 if (i == dest_endregno)
3011 delete_computation (our_prev);
3015 break;
3018 /* If PAT references the register that dies here, it is an
3019 additional use. Hence any prior SET isn't dead. However, this
3020 insn becomes the new place for the REG_DEAD note. */
3021 if (reg_overlap_mentioned_p (reg, pat))
3023 XEXP (note, 1) = REG_NOTES (our_prev);
3024 REG_NOTES (our_prev) = note;
3025 break;
3030 /* Delete INSN and recursively delete insns that compute values used only
3031 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3033 Look at all our REG_DEAD notes. If a previous insn does nothing other
3034 than set a register that dies in this insn, we can delete that insn
3035 as well.
3037 On machines with CC0, if CC0 is used in this insn, we may be able to
3038 delete the insn that set it. */
3040 static void
3041 delete_computation (rtx insn)
3043 rtx note, next;
3045 #ifdef HAVE_cc0
3046 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3048 rtx prev = prev_nonnote_insn (insn);
3049 /* We assume that at this stage
3050 CC's are always set explicitly
3051 and always immediately before the jump that
3052 will use them. So if the previous insn
3053 exists to set the CC's, delete it
3054 (unless it performs auto-increments, etc.). */
3055 if (prev && NONJUMP_INSN_P (prev)
3056 && sets_cc0_p (PATTERN (prev)))
3058 if (sets_cc0_p (PATTERN (prev)) > 0
3059 && ! side_effects_p (PATTERN (prev)))
3060 delete_computation (prev);
3061 else
3062 /* Otherwise, show that cc0 won't be used. */
3063 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3066 #endif
3068 for (note = REG_NOTES (insn); note; note = next)
3070 next = XEXP (note, 1);
3072 if (REG_NOTE_KIND (note) != REG_DEAD
3073 /* Verify that the REG_NOTE is legitimate. */
3074 || !REG_P (XEXP (note, 0)))
3075 continue;
3077 delete_prior_computation (note, insn);
3080 delete_related_insns (insn);
3083 /* If all INSN does is set the pc, delete it,
3084 and delete the insn that set the condition codes for it
3085 if that's what the previous thing was. */
3087 static void
3088 delete_jump (rtx insn)
3090 rtx set = single_set (insn);
3092 if (set && GET_CODE (SET_DEST (set)) == PC)
3093 delete_computation (insn);
3096 static rtx
3097 label_before_next_insn (rtx x, rtx scan_limit)
3099 rtx insn = next_active_insn (x);
3100 while (insn)
3102 insn = PREV_INSN (insn);
3103 if (insn == scan_limit || insn == NULL_RTX)
3104 return NULL_RTX;
3105 if (LABEL_P (insn))
3106 break;
3108 return insn;
3112 /* Once we have tried two ways to fill a delay slot, make a pass over the
3113 code to try to improve the results and to do such things as more jump
3114 threading. */
3116 static void
3117 relax_delay_slots (rtx first)
3119 rtx insn, next, pat;
3120 rtx trial, delay_insn, target_label;
3122 /* Look at every JUMP_INSN and see if we can improve it. */
3123 for (insn = first; insn; insn = next)
3125 rtx other;
3126 bool crossing;
3128 next = next_active_insn (insn);
3130 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3131 the next insn, or jumps to a label that is not the last of a
3132 group of consecutive labels. */
3133 if (JUMP_P (insn)
3134 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3135 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3137 target_label
3138 = skip_consecutive_labels (follow_jumps (target_label, insn,
3139 &crossing));
3140 if (ANY_RETURN_P (target_label))
3141 target_label = find_end_label (target_label);
3143 if (target_label && next_active_insn (target_label) == next
3144 && ! condjump_in_parallel_p (insn))
3146 delete_jump (insn);
3147 continue;
3150 if (target_label && target_label != JUMP_LABEL (insn))
3152 reorg_redirect_jump (insn, target_label);
3153 if (crossing)
3154 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3157 /* See if this jump conditionally branches around an unconditional
3158 jump. If so, invert this jump and point it to the target of the
3159 second jump. */
3160 if (next && simplejump_or_return_p (next)
3161 && any_condjump_p (insn)
3162 && target_label
3163 && next_active_insn (target_label) == next_active_insn (next)
3164 && no_labels_between_p (insn, next))
3166 rtx label = JUMP_LABEL (next);
3168 /* Be careful how we do this to avoid deleting code or
3169 labels that are momentarily dead. See similar optimization
3170 in jump.c.
3172 We also need to ensure we properly handle the case when
3173 invert_jump fails. */
3175 ++LABEL_NUSES (target_label);
3176 if (!ANY_RETURN_P (label))
3177 ++LABEL_NUSES (label);
3179 if (invert_jump (insn, label, 1))
3181 delete_related_insns (next);
3182 next = insn;
3185 if (!ANY_RETURN_P (label))
3186 --LABEL_NUSES (label);
3188 if (--LABEL_NUSES (target_label) == 0)
3189 delete_related_insns (target_label);
3191 continue;
3195 /* If this is an unconditional jump and the previous insn is a
3196 conditional jump, try reversing the condition of the previous
3197 insn and swapping our targets. The next pass might be able to
3198 fill the slots.
3200 Don't do this if we expect the conditional branch to be true, because
3201 we would then be making the more common case longer. */
3203 if (simplejump_or_return_p (insn)
3204 && (other = prev_active_insn (insn)) != 0
3205 && any_condjump_p (other)
3206 && no_labels_between_p (other, insn)
3207 && 0 > mostly_true_jump (other))
3209 rtx other_target = JUMP_LABEL (other);
3210 target_label = JUMP_LABEL (insn);
3212 if (invert_jump (other, target_label, 0))
3213 reorg_redirect_jump (insn, other_target);
3216 /* Now look only at cases where we have a filled delay slot. */
3217 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3218 continue;
3220 pat = PATTERN (insn);
3221 delay_insn = XVECEXP (pat, 0, 0);
3223 /* See if the first insn in the delay slot is redundant with some
3224 previous insn. Remove it from the delay slot if so; then set up
3225 to reprocess this insn. */
3226 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3228 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3229 next = prev_active_insn (next);
3230 continue;
3233 /* See if we have a RETURN insn with a filled delay slot followed
3234 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3235 the first RETURN (but not its delay insn). This gives the same
3236 effect in fewer instructions.
3238 Only do so if optimizing for size since this results in slower, but
3239 smaller code. */
3240 if (optimize_function_for_size_p (cfun)
3241 && ANY_RETURN_P (PATTERN (delay_insn))
3242 && next
3243 && JUMP_P (next)
3244 && PATTERN (next) == PATTERN (delay_insn))
3246 rtx after;
3247 int i;
3249 /* Delete the RETURN and just execute the delay list insns.
3251 We do this by deleting the INSN containing the SEQUENCE, then
3252 re-emitting the insns separately, and then deleting the RETURN.
3253 This allows the count of the jump target to be properly
3254 decremented.
3256 Note that we need to change the INSN_UID of the re-emitted insns
3257 since it is used to hash the insns for mark_target_live_regs and
3258 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3260 Clear the from target bit, since these insns are no longer
3261 in delay slots. */
3262 for (i = 0; i < XVECLEN (pat, 0); i++)
3263 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3265 trial = PREV_INSN (insn);
3266 delete_related_insns (insn);
3267 gcc_assert (GET_CODE (pat) == SEQUENCE);
3268 add_insn_after (delay_insn, trial, NULL);
3269 after = delay_insn;
3270 for (i = 1; i < XVECLEN (pat, 0); i++)
3271 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3272 delete_scheduled_jump (delay_insn);
3273 continue;
3276 /* Now look only at the cases where we have a filled JUMP_INSN. */
3277 if (!JUMP_P (delay_insn)
3278 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3279 continue;
3281 target_label = JUMP_LABEL (delay_insn);
3282 if (target_label && ANY_RETURN_P (target_label))
3283 continue;
3285 /* If this jump goes to another unconditional jump, thread it, but
3286 don't convert a jump into a RETURN here. */
3287 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3288 &crossing));
3289 if (ANY_RETURN_P (trial))
3290 trial = find_end_label (trial);
3292 if (trial && trial != target_label
3293 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3295 reorg_redirect_jump (delay_insn, trial);
3296 target_label = trial;
3297 if (crossing)
3298 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3301 /* If the first insn at TARGET_LABEL is redundant with a previous
3302 insn, redirect the jump to the following insn and process again.
3303 We use next_real_insn instead of next_active_insn so we
3304 don't skip USE-markers, or we'll end up with incorrect
3305 liveness info. */
3306 trial = next_real_insn (target_label);
3307 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3308 && redundant_insn (trial, insn, 0)
3309 && ! can_throw_internal (trial))
3311 /* Figure out where to emit the special USE insn so we don't
3312 later incorrectly compute register live/death info. */
3313 rtx tmp = next_active_insn (trial);
3314 if (tmp == 0)
3315 tmp = find_end_label (simple_return_rtx);
3317 if (tmp)
3319 /* Insert the special USE insn and update dataflow info. */
3320 update_block (trial, tmp);
3322 /* Now emit a label before the special USE insn, and
3323 redirect our jump to the new label. */
3324 target_label = get_label_before (PREV_INSN (tmp));
3325 reorg_redirect_jump (delay_insn, target_label);
3326 next = insn;
3327 continue;
3331 /* Similarly, if it is an unconditional jump with one insn in its
3332 delay list and that insn is redundant, thread the jump. */
3333 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3334 && XVECLEN (PATTERN (trial), 0) == 2
3335 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3336 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3337 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3339 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3340 if (ANY_RETURN_P (target_label))
3341 target_label = find_end_label (target_label);
3343 if (target_label
3344 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3345 insn))
3347 reorg_redirect_jump (delay_insn, target_label);
3348 next = insn;
3349 continue;
3353 /* See if we have a simple (conditional) jump that is useless. */
3354 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3355 && ! condjump_in_parallel_p (delay_insn)
3356 && prev_active_insn (target_label) == insn
3357 && ! BARRIER_P (prev_nonnote_insn (target_label))
3358 #ifdef HAVE_cc0
3359 /* If the last insn in the delay slot sets CC0 for some insn,
3360 various code assumes that it is in a delay slot. We could
3361 put it back where it belonged and delete the register notes,
3362 but it doesn't seem worthwhile in this uncommon case. */
3363 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3364 REG_CC_USER, NULL_RTX)
3365 #endif
3368 rtx after;
3369 int i;
3371 /* All this insn does is execute its delay list and jump to the
3372 following insn. So delete the jump and just execute the delay
3373 list insns.
3375 We do this by deleting the INSN containing the SEQUENCE, then
3376 re-emitting the insns separately, and then deleting the jump.
3377 This allows the count of the jump target to be properly
3378 decremented.
3380 Note that we need to change the INSN_UID of the re-emitted insns
3381 since it is used to hash the insns for mark_target_live_regs and
3382 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3384 Clear the from target bit, since these insns are no longer
3385 in delay slots. */
3386 for (i = 0; i < XVECLEN (pat, 0); i++)
3387 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3389 trial = PREV_INSN (insn);
3390 delete_related_insns (insn);
3391 gcc_assert (GET_CODE (pat) == SEQUENCE);
3392 add_insn_after (delay_insn, trial, NULL);
3393 after = delay_insn;
3394 for (i = 1; i < XVECLEN (pat, 0); i++)
3395 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3396 delete_scheduled_jump (delay_insn);
3397 continue;
3400 /* See if this is an unconditional jump around a single insn which is
3401 identical to the one in its delay slot. In this case, we can just
3402 delete the branch and the insn in its delay slot. */
3403 if (next && NONJUMP_INSN_P (next)
3404 && label_before_next_insn (next, insn) == target_label
3405 && simplejump_p (insn)
3406 && XVECLEN (pat, 0) == 2
3407 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3409 delete_related_insns (insn);
3410 continue;
3413 /* See if this jump (with its delay slots) conditionally branches
3414 around an unconditional jump (without delay slots). If so, invert
3415 this jump and point it to the target of the second jump. We cannot
3416 do this for annulled jumps, though. Again, don't convert a jump to
3417 a RETURN here. */
3418 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3419 && any_condjump_p (delay_insn)
3420 && next && simplejump_or_return_p (next)
3421 && next_active_insn (target_label) == next_active_insn (next)
3422 && no_labels_between_p (insn, next))
3424 rtx label = JUMP_LABEL (next);
3425 rtx old_label = JUMP_LABEL (delay_insn);
3427 if (ANY_RETURN_P (label))
3428 label = find_end_label (label);
3430 /* find_end_label can generate a new label. Check this first. */
3431 if (label
3432 && no_labels_between_p (insn, next)
3433 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3435 /* Be careful how we do this to avoid deleting code or labels
3436 that are momentarily dead. See similar optimization in
3437 jump.c */
3438 if (old_label)
3439 ++LABEL_NUSES (old_label);
3441 if (invert_jump (delay_insn, label, 1))
3443 int i;
3445 /* Must update the INSN_FROM_TARGET_P bits now that
3446 the branch is reversed, so that mark_target_live_regs
3447 will handle the delay slot insn correctly. */
3448 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3450 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3451 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3454 delete_related_insns (next);
3455 next = insn;
3458 if (old_label && --LABEL_NUSES (old_label) == 0)
3459 delete_related_insns (old_label);
3460 continue;
3464 /* If we own the thread opposite the way this insn branches, see if we
3465 can merge its delay slots with following insns. */
3466 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3467 && own_thread_p (NEXT_INSN (insn), 0, 1))
3468 try_merge_delay_insns (insn, next);
3469 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3470 && own_thread_p (target_label, target_label, 0))
3471 try_merge_delay_insns (insn, next_active_insn (target_label));
3473 /* If we get here, we haven't deleted INSN. But we may have deleted
3474 NEXT, so recompute it. */
3475 next = next_active_insn (insn);
3480 /* Look for filled jumps to the end of function label. We can try to convert
3481 them into RETURN insns if the insns in the delay slot are valid for the
3482 RETURN as well. */
3484 static void
3485 make_return_insns (rtx first)
3487 rtx insn, jump_insn, pat;
3488 rtx real_return_label = function_return_label;
3489 rtx real_simple_return_label = function_simple_return_label;
3490 int slots, i;
3492 /* See if there is a RETURN insn in the function other than the one we
3493 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3494 into a RETURN to jump to it. */
3495 for (insn = first; insn; insn = NEXT_INSN (insn))
3496 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3498 rtx t = get_label_before (insn);
3499 if (PATTERN (insn) == ret_rtx)
3500 real_return_label = t;
3501 else
3502 real_simple_return_label = t;
3503 break;
3506 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3507 was equal to END_OF_FUNCTION_LABEL. */
3508 if (real_return_label)
3509 LABEL_NUSES (real_return_label)++;
3510 if (real_simple_return_label)
3511 LABEL_NUSES (real_simple_return_label)++;
3513 /* Clear the list of insns to fill so we can use it. */
3514 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3516 for (insn = first; insn; insn = NEXT_INSN (insn))
3518 int flags;
3519 rtx kind, real_label;
3521 /* Only look at filled JUMP_INSNs that go to the end of function
3522 label. */
3523 if (!NONJUMP_INSN_P (insn)
3524 || GET_CODE (PATTERN (insn)) != SEQUENCE
3525 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3526 continue;
3528 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3530 kind = ret_rtx;
3531 real_label = real_return_label;
3533 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3534 == function_simple_return_label)
3536 kind = simple_return_rtx;
3537 real_label = real_simple_return_label;
3539 else
3540 continue;
3542 pat = PATTERN (insn);
3543 jump_insn = XVECEXP (pat, 0, 0);
3545 /* If we can't make the jump into a RETURN, try to redirect it to the best
3546 RETURN and go on to the next insn. */
3547 if (!reorg_redirect_jump (jump_insn, kind))
3549 /* Make sure redirecting the jump will not invalidate the delay
3550 slot insns. */
3551 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3552 reorg_redirect_jump (jump_insn, real_label);
3553 continue;
3556 /* See if this RETURN can accept the insns current in its delay slot.
3557 It can if it has more or an equal number of slots and the contents
3558 of each is valid. */
3560 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3561 slots = num_delay_slots (jump_insn);
3562 if (slots >= XVECLEN (pat, 0) - 1)
3564 for (i = 1; i < XVECLEN (pat, 0); i++)
3565 if (! (
3566 #ifdef ANNUL_IFFALSE_SLOTS
3567 (INSN_ANNULLED_BRANCH_P (jump_insn)
3568 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3569 ? eligible_for_annul_false (jump_insn, i - 1,
3570 XVECEXP (pat, 0, i), flags) :
3571 #endif
3572 #ifdef ANNUL_IFTRUE_SLOTS
3573 (INSN_ANNULLED_BRANCH_P (jump_insn)
3574 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3575 ? eligible_for_annul_true (jump_insn, i - 1,
3576 XVECEXP (pat, 0, i), flags) :
3577 #endif
3578 eligible_for_delay (jump_insn, i - 1,
3579 XVECEXP (pat, 0, i), flags)))
3580 break;
3582 else
3583 i = 0;
3585 if (i == XVECLEN (pat, 0))
3586 continue;
3588 /* We have to do something with this insn. If it is an unconditional
3589 RETURN, delete the SEQUENCE and output the individual insns,
3590 followed by the RETURN. Then set things up so we try to find
3591 insns for its delay slots, if it needs some. */
3592 if (ANY_RETURN_P (PATTERN (jump_insn)))
3594 rtx prev = PREV_INSN (insn);
3596 delete_related_insns (insn);
3597 for (i = 1; i < XVECLEN (pat, 0); i++)
3598 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3600 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3601 emit_barrier_after (insn);
3603 if (slots)
3604 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3606 else
3607 /* It is probably more efficient to keep this with its current
3608 delay slot as a branch to a RETURN. */
3609 reorg_redirect_jump (jump_insn, real_label);
3612 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3613 new delay slots we have created. */
3614 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3615 delete_related_insns (real_return_label);
3616 if (real_simple_return_label != NULL_RTX
3617 && --LABEL_NUSES (real_simple_return_label) == 0)
3618 delete_related_insns (real_simple_return_label);
3620 fill_simple_delay_slots (1);
3621 fill_simple_delay_slots (0);
3624 /* Try to find insns to place in delay slots. */
3626 static void
3627 dbr_schedule (rtx first)
3629 rtx insn, next, epilogue_insn = 0;
3630 int i;
3631 bool need_return_insns;
3633 /* If the current function has no insns other than the prologue and
3634 epilogue, then do not try to fill any delay slots. */
3635 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3636 return;
3638 /* Find the highest INSN_UID and allocate and initialize our map from
3639 INSN_UID's to position in code. */
3640 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3642 if (INSN_UID (insn) > max_uid)
3643 max_uid = INSN_UID (insn);
3644 if (NOTE_P (insn)
3645 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3646 epilogue_insn = insn;
3649 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3650 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3651 uid_to_ruid[INSN_UID (insn)] = i;
3653 /* Initialize the list of insns that need filling. */
3654 if (unfilled_firstobj == 0)
3656 gcc_obstack_init (&unfilled_slots_obstack);
3657 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3660 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3662 rtx target;
3664 /* Skip vector tables. We can't get attributes for them. */
3665 if (JUMP_TABLE_DATA_P (insn))
3666 continue;
3668 if (JUMP_P (insn))
3669 INSN_ANNULLED_BRANCH_P (insn) = 0;
3670 INSN_FROM_TARGET_P (insn) = 0;
3672 if (num_delay_slots (insn) > 0)
3673 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3675 /* Ensure all jumps go to the last of a set of consecutive labels. */
3676 if (JUMP_P (insn)
3677 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3678 && !ANY_RETURN_P (JUMP_LABEL (insn))
3679 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3680 != JUMP_LABEL (insn)))
3681 redirect_jump (insn, target, 1);
3684 init_resource_info (epilogue_insn);
3686 /* Show we haven't computed an end-of-function label yet. */
3687 function_return_label = function_simple_return_label = NULL_RTX;
3689 /* Initialize the statistics for this function. */
3690 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3691 memset (num_filled_delays, 0, sizeof num_filled_delays);
3693 /* Now do the delay slot filling. Try everything twice in case earlier
3694 changes make more slots fillable. */
3696 for (reorg_pass_number = 0;
3697 reorg_pass_number < MAX_REORG_PASSES;
3698 reorg_pass_number++)
3700 fill_simple_delay_slots (1);
3701 fill_simple_delay_slots (0);
3702 fill_eager_delay_slots ();
3703 relax_delay_slots (first);
3706 /* If we made an end of function label, indicate that it is now
3707 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3708 If it is now unused, delete it. */
3709 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3710 delete_related_insns (function_return_label);
3711 if (function_simple_return_label
3712 && --LABEL_NUSES (function_simple_return_label) == 0)
3713 delete_related_insns (function_simple_return_label);
3715 need_return_insns = false;
3716 #ifdef HAVE_return
3717 need_return_insns |= HAVE_return && function_return_label != 0;
3718 #endif
3719 #ifdef HAVE_simple_return
3720 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3721 #endif
3722 if (need_return_insns)
3723 make_return_insns (first);
3725 /* Delete any USE insns made by update_block; subsequent passes don't need
3726 them or know how to deal with them. */
3727 for (insn = first; insn; insn = next)
3729 next = NEXT_INSN (insn);
3731 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3732 && INSN_P (XEXP (PATTERN (insn), 0)))
3733 next = delete_related_insns (insn);
3736 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3738 /* It is not clear why the line below is needed, but it does seem to be. */
3739 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3741 if (dump_file)
3743 int i, j, need_comma;
3744 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3745 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3747 for (reorg_pass_number = 0;
3748 reorg_pass_number < MAX_REORG_PASSES;
3749 reorg_pass_number++)
3751 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3752 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3754 need_comma = 0;
3755 fprintf (dump_file, ";; Reorg function #%d\n", i);
3757 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3758 num_insns_needing_delays[i][reorg_pass_number]);
3760 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3761 if (num_filled_delays[i][j][reorg_pass_number])
3763 if (need_comma)
3764 fprintf (dump_file, ", ");
3765 need_comma = 1;
3766 fprintf (dump_file, "%d got %d delays",
3767 num_filled_delays[i][j][reorg_pass_number], j);
3769 fprintf (dump_file, "\n");
3772 memset (total_delay_slots, 0, sizeof total_delay_slots);
3773 memset (total_annul_slots, 0, sizeof total_annul_slots);
3774 for (insn = first; insn; insn = NEXT_INSN (insn))
3776 if (! INSN_DELETED_P (insn)
3777 && NONJUMP_INSN_P (insn)
3778 && GET_CODE (PATTERN (insn)) != USE
3779 && GET_CODE (PATTERN (insn)) != CLOBBER)
3781 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3783 rtx control;
3784 j = XVECLEN (PATTERN (insn), 0) - 1;
3785 if (j > MAX_DELAY_HISTOGRAM)
3786 j = MAX_DELAY_HISTOGRAM;
3787 control = XVECEXP (PATTERN (insn), 0, 0);
3788 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3789 total_annul_slots[j]++;
3790 else
3791 total_delay_slots[j]++;
3793 else if (num_delay_slots (insn) > 0)
3794 total_delay_slots[0]++;
3797 fprintf (dump_file, ";; Reorg totals: ");
3798 need_comma = 0;
3799 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3801 if (total_delay_slots[j])
3803 if (need_comma)
3804 fprintf (dump_file, ", ");
3805 need_comma = 1;
3806 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3809 fprintf (dump_file, "\n");
3810 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3811 fprintf (dump_file, ";; Reorg annuls: ");
3812 need_comma = 0;
3813 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3815 if (total_annul_slots[j])
3817 if (need_comma)
3818 fprintf (dump_file, ", ");
3819 need_comma = 1;
3820 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3823 fprintf (dump_file, "\n");
3824 #endif
3825 fprintf (dump_file, "\n");
3828 free_resource_info ();
3829 free (uid_to_ruid);
3830 crtl->dbr_scheduled_p = true;
3832 #endif /* DELAY_SLOTS */
3834 static bool
3835 gate_handle_delay_slots (void)
3837 #ifdef DELAY_SLOTS
3838 /* At -O0 dataflow info isn't updated after RA. */
3839 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3840 #else
3841 return 0;
3842 #endif
3845 /* Run delay slot optimization. */
3846 static unsigned int
3847 rest_of_handle_delay_slots (void)
3849 #ifdef DELAY_SLOTS
3850 dbr_schedule (get_insns ());
3851 #endif
3852 return 0;
3855 struct rtl_opt_pass pass_delay_slots =
3858 RTL_PASS,
3859 "dbr", /* name */
3860 OPTGROUP_NONE, /* optinfo_flags */
3861 gate_handle_delay_slots, /* gate */
3862 rest_of_handle_delay_slots, /* execute */
3863 NULL, /* sub */
3864 NULL, /* next */
3865 0, /* static_pass_number */
3866 TV_DBR_SCHED, /* tv_id */
3867 0, /* properties_required */
3868 0, /* properties_provided */
3869 0, /* properties_destroyed */
3870 0, /* todo_flags_start */
3871 0 /* todo_flags_finish */
3875 /* Machine dependent reorg pass. */
3876 static bool
3877 gate_handle_machine_reorg (void)
3879 return targetm.machine_dependent_reorg != 0;
3883 static unsigned int
3884 rest_of_handle_machine_reorg (void)
3886 targetm.machine_dependent_reorg ();
3887 return 0;
3890 struct rtl_opt_pass pass_machine_reorg =
3893 RTL_PASS,
3894 "mach", /* name */
3895 OPTGROUP_NONE, /* optinfo_flags */
3896 gate_handle_machine_reorg, /* gate */
3897 rest_of_handle_machine_reorg, /* execute */
3898 NULL, /* sub */
3899 NULL, /* next */
3900 0, /* static_pass_number */
3901 TV_MACH_DEP, /* tv_id */
3902 0, /* properties_required */
3903 0, /* properties_provided */
3904 0, /* properties_destroyed */
3905 0, /* todo_flags_start */
3906 0 /* todo_flags_finish */