1 # Copyright
(C
) 1999-2017 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
443 void f() __attribute__((ifunc("g")));
447 # Returns true if --gc-sections is supported on the target.
449 proc check_gc_sections_available { } {
450 global gc_sections_available_saved
453 if {![info exists gc_sections_available_saved]} {
454 # Some targets don't support gc
-sections despite whatever
's
455 # advertised by ld's options.
456 if { [istarget alpha
*-*-*]
457 ||
[istarget ia64
-*-*] } {
458 set gc_sections_available_saved
0
462 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
464 if { [board_info target
exists ldflags
]
465 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
466 set gc_sections_available_saved
0
470 # VxWorks kernel modules are relocatable objects linked with
-r
,
471 #
while RTP executables are linked with
-q
(--emit
-relocs
).
472 # Both of these options are incompatible with
--gc
-sections.
473 if { [istarget
*-*-vxworks
*] } {
474 set gc_sections_available_saved
0
478 # Check
if the
ld used by gcc supports
--gc
-sections.
479 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
480 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
481 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
482 set gc_sections_available_saved
1
484 set gc_sections_available_saved
0
487 return $gc_sections_available_saved
490 #
Return 1 if according to target_info struct and explicit target list
491 # target is supposed to support trampolines.
493 proc check_effective_target_trampolines
{ } {
494 if [target_info
exists no_trampolines
] {
497 if { [istarget avr
-*-*]
498 ||
[istarget msp430
-*-*]
499 ||
[istarget nvptx
-*-*]
500 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
501 ||
[istarget hppa64
-hp
-hpux11.23
] } {
507 #
Return 1 if according to target_info struct and explicit target list
508 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
509 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
510 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
511 # depend
on this option should
do that
).
513 proc check_effective_target_keeps_null_pointer_checks
{ } {
514 if [target_info
exists keeps_null_pointer_checks
] {
517 if { [istarget avr
-*-*] } {
523 #
Return the autofdo profile wrapper
525 proc profopt
-perf
-wrapper
{ } {
527 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
530 #
Return true
if profiling is supported
on the target.
532 proc check_profiling_available
{ test_what
} {
533 global profiling_available_saved
535 verbose
"Profiling argument is <$test_what>" 1
537 # These conditions depend
on the
argument so examine them before
538 # looking at the
cache variable.
540 # Tree profiling requires TLS runtime support.
541 if { $test_what
== "-fprofile-generate" } {
542 if { ![check_effective_target_tls_runtime
] } {
547 if { $test_what
== "-fauto-profile" } {
548 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
549 verbose
"autofdo only supported on linux"
552 # not cross compiling?
554 verbose
"autofdo not supported for non native builds"
557 set event
[profopt
-perf
-wrapper
]
559 verbose
"autofdo not supported"
563 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
564 if { [lindex $
status 0] != 0 } {
565 verbose
"autofdo not supported because perf does not work"
569 # no good way to check this in advance
-- check later instead.
570 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
571 #
if { [lindex $
status 0] != 255 } {
572 # verbose
"autofdo not supported due to missing create_gcov"
577 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
578 # vendor compiler. We cannot reliably predict the directory where the
579 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
580 # necessarily find mcrt1.o even if we have it.
581 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
585 # We don't yet support profiling
for MIPS16.
586 if { [istarget mips
*-*-*]
587 && ![check_effective_target_nomips16
]
588 && ($test_what
== "-p" || $test_what == "-pg") } {
592 # MinGW does not support
-p.
593 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
597 # cygwin does not support
-p.
598 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
602 # uClibc does not have gcrt1.o.
603 if { [check_effective_target_uclibc
]
604 && ($test_what
== "-p" || $test_what == "-pg") } {
608 # Now examine the
cache variable.
609 if {![info exists profiling_available_saved
]} {
610 # Some targets don
't have any implementation of __bb_init_func or are
611 # missing other needed machinery.
612 if {[istarget aarch64*-*-elf]
613 || [istarget am3*-*-linux*]
614 || [istarget arm*-*-eabi*]
615 || [istarget arm*-*-elf]
616 || [istarget arm*-*-symbianelf*]
617 || [istarget avr-*-*]
618 || [istarget bfin-*-*]
619 || [istarget cris-*-*]
620 || [istarget crisv32-*-*]
621 || [istarget fido-*-elf]
622 || [istarget h8300-*-*]
623 || [istarget lm32-*-*]
624 || [istarget m32c-*-elf]
625 || [istarget m68k-*-elf]
626 || [istarget m68k-*-uclinux*]
627 || [istarget mips*-*-elf*]
628 || [istarget mmix-*-*]
629 || [istarget mn10300-*-elf*]
630 || [istarget moxie-*-elf*]
631 || [istarget msp430-*-*]
632 || [istarget nds32*-*-elf]
633 || [istarget nios2-*-elf]
634 || [istarget nvptx-*-*]
635 || [istarget powerpc-*-eabi*]
636 || [istarget powerpc-*-elf]
638 || [istarget tic6x-*-elf]
639 || [istarget visium-*-*]
640 || [istarget xstormy16-*]
641 || [istarget xtensa*-*-elf]
642 || [istarget *-*-rtems*]
643 || [istarget *-*-vxworks*] } {
644 set profiling_available_saved 0
646 set profiling_available_saved 1
650 # -pg link test result can't be cached since it may change between
652 set profiling_working $profiling_available_saved
653 if { $profiling_available_saved
== 1
654 && ![check_no_compiler_messages_nocache profiling executable
{
655 int main
() { return 0; } } "-pg"] } {
656 set profiling_working
0
659 return $profiling_working
662 # Check to see
if a target is
"freestanding". This is as per the definition
663 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
664 # extra headers or libraries other than what is considered essential.
665 proc check_effective_target_freestanding
{ } {
666 if { [istarget nvptx
-*-*] } {
672 #
Return 1 if target has packed layout of structure members by
673 # default
, 0 otherwise. Note that this is slightly different than
674 # whether the target has
"natural alignment": both attributes may be
677 proc check_effective_target_default_packed
{ } {
678 return [check_no_compiler_messages default_packed assembly
{
679 struct x
{ char a
; long b
; } c
;
680 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
684 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
685 # documentation
, where the test also comes from.
687 proc check_effective_target_pcc_bitfield_type_matters
{ } {
688 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
689 # bitfields, but let's stick to the example code from the docs.
690 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
691 struct foo1
{ char x
; char
:0; char y
; };
692 struct foo2
{ char x
; int :0; char y
; };
693 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
697 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
699 proc add_options_for_tls
{ flags
} {
700 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
701 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
702 # Need to duplicate native TLS check from
703 # check_effective_target_tls_native to avoid recursion.
704 if { ([istarget powerpc
-ibm
-aix
*]) &&
705 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
707 int f
(void
) { return i
; }
708 void g
(int j
) { i
= j
; }
710 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
715 #
Return 1 if indirect jumps are supported
, 0 otherwise.
717 proc check_effective_target_indirect_jumps
{} {
718 if { [istarget nvptx
-*-*] } {
724 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
726 proc check_effective_target_nonlocal_goto
{} {
727 if { [istarget nvptx
-*-*] } {
733 #
Return 1 if global constructors are supported
, 0 otherwise.
735 proc check_effective_target_global_constructor
{} {
736 if { [istarget nvptx
-*-*] } {
742 #
Return 1 if taking label
values is supported
, 0 otherwise.
744 proc check_effective_target_label_values
{} {
745 if { [istarget nvptx
-*-*] } {
748 return [check_no_compiler_messages label_values assembly
{
749 #ifdef NO_LABEL_VALUES
755 #
Return 1 if builtin_return_address and builtin_frame_address are
756 # supported
, 0 otherwise.
758 proc check_effective_target_return_address
{} {
759 if { [istarget nvptx
-*-*] } {
765 #
Return 1 if the assembler does not verify function types against
766 # calls
, 0 otherwise. Such verification will typically
show up problems
767 # with K
&R C function declarations.
769 proc check_effective_target_untyped_assembly
{} {
770 if { [istarget nvptx
-*-*] } {
776 #
Return 1 if alloca is supported
, 0 otherwise.
778 proc check_effective_target_alloca
{} {
779 if { [istarget nvptx
-*-*] } {
780 return [check_no_compiler_messages alloca assembly
{
782 void g
(int n
) { f
(__builtin_alloca
(n
)); }
788 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
790 proc check_effective_target_tls
{} {
791 return [check_no_compiler_messages tls assembly
{
793 int f
(void
) { return i
; }
794 void g
(int j
) { i
= j
; }
798 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
800 proc check_effective_target_tls_native
{} {
801 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
802 # functions
, so we fail to automatically detect it.
803 if { [istarget
*-*-vxworks
*] } {
807 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
809 int f
(void
) { return i
; }
810 void g
(int j
) { i
= j
; }
814 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
816 proc check_effective_target_tls_emulated
{} {
817 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
818 # functions
, so we fail to automatically detect it.
819 if { [istarget
*-*-vxworks
*] } {
823 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
825 int f
(void
) { return i
; }
826 void g
(int j
) { i
= j
; }
830 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
832 proc check_effective_target_tls_runtime
{} {
833 # The runtime does not have TLS support
, but just
834 # running the test below is insufficient to
show this.
835 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
838 return [check_runtime tls_runtime
{
839 __thread
int thr
= 0;
840 int main
(void
) { return thr
; }
841 } [add_options_for_tls
""]]
844 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
846 proc check_effective_target_cas_char
{} {
847 return [check_no_compiler_messages cas_char assembly
{
848 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
854 proc check_effective_target_cas_int
{} {
855 return [check_no_compiler_messages cas_int assembly
{
856 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
858 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
866 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
868 proc check_effective_target_function_sections
{} {
869 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
870 if { [istarget
*-*-darwin
*] } {
874 return [check_no_compiler_messages functionsections assembly
{
876 } "-ffunction-sections"]
879 #
Return 1 if instruction scheduling is available
, 0 otherwise.
881 proc check_effective_target_scheduling
{} {
882 return [check_no_compiler_messages scheduling object
{
884 } "-fschedule-insns"]
887 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
889 proc check_effective_target_trapping
{} {
890 return [check_no_compiler_messages trapping object
{
891 int add
(int a
, int b
) { return a
+ b
; }
895 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
898 proc check_effective_target_fgraphite
{} {
899 return [check_no_compiler_messages fgraphite object
{
904 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
907 proc check_effective_target_fopenacc
{} {
908 # nvptx can be built with the device
-side bits of openacc
, but it
909 # does not make sense to test it as an openacc host.
910 if [istarget nvptx
-*-*] { return 0 }
912 return [check_no_compiler_messages fopenacc object
{
917 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
920 proc check_effective_target_fopenmp
{} {
921 # nvptx can be built with the device
-side bits of libgomp
, but it
922 # does not make sense to test it as an openmp host.
923 if [istarget nvptx
-*-*] { return 0 }
925 return [check_no_compiler_messages fopenmp object
{
930 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
933 proc check_effective_target_fgnu_tm
{} {
934 return [check_no_compiler_messages fgnu_tm object
{
939 #
Return 1 if the target supports mmap
, 0 otherwise.
941 proc check_effective_target_mmap
{} {
942 return [check_function_available
"mmap"]
945 #
Return 1 if the target supports dlopen
, 0 otherwise.
946 proc check_effective_target_dlopen
{} {
947 return [check_no_compiler_messages dlopen executable
{
949 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
950 } [add_options_for_dlopen
""]]
953 proc add_options_for_dlopen
{ flags
} {
957 #
Return 1 if the target supports clone
, 0 otherwise.
958 proc check_effective_target_clone
{} {
959 return [check_function_available
"clone"]
962 #
Return 1 if the target supports setrlimit
, 0 otherwise.
963 proc check_effective_target_setrlimit
{} {
964 # Darwin has non
-posix compliant RLIMIT_AS
965 if { [istarget
*-*-darwin
*] } {
968 return [check_function_available
"setrlimit"]
971 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
972 proc check_effective_target_gettimeofday
{} {
973 return [check_function_available
"gettimeofday"]
976 #
Return 1 if the target supports swapcontext
, 0 otherwise.
977 proc check_effective_target_swapcontext
{} {
978 return [check_no_compiler_messages swapcontext executable
{
979 #
include <ucontext.h
>
982 ucontext_t orig_context
,child_context
;
983 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
988 #
Return 1 if compilation with
-pthread is error
-free
for trivial
991 proc check_effective_target_pthread
{} {
992 return [check_no_compiler_messages pthread object
{
997 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1000 proc check_effective_target_stabs
{} {
1001 return [check_no_compiler_messages stabs object
{
1006 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1007 #
for trivial code
, 0 otherwise.
1009 proc check_effective_target_pe_aligned_commons
{} {
1010 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1011 return [check_no_compiler_messages pe_aligned_commons object
{
1013 } "-mpe-aligned-commons"]
1018 #
Return 1 if the target supports
-static
1019 proc check_effective_target_static
{} {
1020 return [check_no_compiler_messages static executable
{
1021 int main
(void
) { return 0; }
1025 #
Return 1 if the target supports
-fstack
-protector
1026 proc check_effective_target_fstack_protector
{} {
1027 return [check_runtime fstack_protector
{
1028 int main
(void
) { return 0; }
1029 } "-fstack-protector"]
1032 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1033 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1034 # warn when
-fprofile
-use is also supplied we test that combination too.
1036 proc check_effective_target_freorder
{} {
1037 if { [check_no_compiler_messages freorder object
{
1039 } "-freorder-blocks-and-partition"]
1040 && [check_no_compiler_messages fprofile_use_freorder object
{
1042 } "-fprofile-use -freorder-blocks-and-partition"] } {
1048 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1049 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1050 # out of scope
for this test.
1052 proc check_effective_target_fpic
{ } {
1053 # Note that M68K has a multilib that supports
-fpic but not
1054 #
-fPIC
, so we need to check both. We test with a
program that
1055 # requires GOT references.
1056 foreach
arg {fpic fPIC
} {
1057 if [check_no_compiler_messages $
arg object
{
1058 extern
int foo
(void
); extern
int bar
;
1059 int baz
(void
) { return foo
() + bar
; }
1067 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1068 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1069 # assumes compiler will give warning if -fpic not supported. Here we check
1070 # whether binutils supports those new -fpic relocation modifiers, and assume
1071 # -fpic is supported if there is binutils support. GCC configuration will
1072 # enable -fpic for AArch64 in this case.
1074 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1075 # memory model -fpic relocation types.
1077 proc check_effective_target_aarch64_small_fpic { } {
1078 if { [istarget aarch64*-*-*] } {
1079 return [check_no_compiler_messages aarch64_small_fpic object {
1080 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1087 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1088 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1089 # in binutils since
2015-03-04 as PR gas
/17843.
1091 # This test directive make sure binutils support all features needed by TLS LE
1092 # under
-mtls
-size
=32 on AArch64.
1094 proc check_effective_target_aarch64_tlsle32
{ } {
1095 if { [istarget aarch64
*-*-*] } {
1096 return [check_no_compiler_messages aarch64_tlsle32 object
{
1097 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1104 #
Return 1 if -shared is supported
, as in no warnings or errors
1105 # emitted
, 0 otherwise.
1107 proc check_effective_target_shared
{ } {
1108 # Note that M68K has a multilib that supports
-fpic but not
1109 #
-fPIC
, so we need to check both. We test with a
program that
1110 # requires GOT references.
1111 return [check_no_compiler_messages shared executable
{
1112 extern
int foo
(void
); extern
int bar
;
1113 int baz
(void
) { return foo
() + bar
; }
1117 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1119 proc check_effective_target_pie
{ } {
1120 if { [istarget
*-*-darwin\
[912\
]*]
1121 ||
[istarget
*-*-dragonfly
*]
1122 ||
[istarget
*-*-freebsd
*]
1123 ||
[istarget
*-*-linux
*]
1124 ||
[istarget
*-*-gnu
*] } {
1127 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1128 # Full PIE support was added in Solaris
11.x and Solaris
12, but gcc
1129 # errors out
if missing
, so check
for that.
1130 return [check_no_compiler_messages pie executable
{
1131 int main
(void
) { return 0; }
1137 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1139 proc check_effective_target_mpaired_single
{ } {
1140 return [check_no_compiler_messages mpaired_single object
{
1142 } "-mpaired-single"]
1145 #
Return true
if the target has access to FPU instructions.
1147 proc check_effective_target_hard_float
{ } {
1148 if { [istarget mips
*-*-*] } {
1149 return [check_no_compiler_messages hard_float assembly
{
1150 #
if (defined __mips_soft_float || defined __mips16
)
1151 #error __mips_soft_float || __mips16
1156 # This proc is actually checking the availabilty of FPU
1157 # support
for doubles
, so
on the RX we must fail
if the
1158 #
64-bit double multilib has been selected.
1159 if { [istarget rx
-*-*] } {
1161 #
return [check_no_compiler_messages hard_float assembly
{
1162 #
if defined __RX_64_BIT_DOUBLES__
1163 #error __RX_64_BIT_DOUBLES__
1168 # The generic test equates hard_float with
"no call for adding doubles".
1169 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1170 double a
(double b
, double c
) { return b
+ c
; }
1174 #
Return true
if the target is a
64-bit MIPS target.
1176 proc check_effective_target_mips64
{ } {
1177 return [check_no_compiler_messages mips64 assembly
{
1184 #
Return true
if the target is a MIPS target that does not produce
1187 proc check_effective_target_nomips16
{ } {
1188 return [check_no_compiler_messages nomips16 object
{
1192 /* A cheap way of testing
for -mflip
-mips16.
*/
1193 void foo
(void
) { asm
("addiu $20,$20,1"); }
1194 void bar
(void
) { asm
("addiu $20,$20,1"); }
1199 # Add the options needed
for MIPS16 function attributes. At the moment
,
1200 # we don
't support MIPS16 PIC.
1202 proc add_options_for_mips16_attribute { flags } {
1203 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1206 # Return true if we can force a mode that allows MIPS16 code generation.
1207 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1210 proc check_effective_target_mips16_attribute
{ } {
1211 return [check_no_compiler_messages mips16_attribute assembly
{
1215 #
if defined __mips_hard_float \
1216 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1217 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1218 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1220 } [add_options_for_mips16_attribute
""]]
1223 #
Return 1 if the target supports long double larger than double when
1224 # using the new ABI
, 0 otherwise.
1226 proc check_effective_target_mips_newabi_large_long_double
{ } {
1227 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1228 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1232 #
Return true
if the target is a MIPS target that has access
1233 # to the LL and SC instructions.
1235 proc check_effective_target_mips_llsc
{ } {
1236 if { ![istarget mips
*-*-*] } {
1239 # Assume that these instructions are always implemented
for
1240 # non
-elf
* targets
, via emulation
if necessary.
1241 if { ![istarget
*-*-elf
*] } {
1244 # Otherwise assume LL
/SC support
for everything but MIPS I.
1245 return [check_no_compiler_messages mips_llsc assembly
{
1252 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1254 proc check_effective_target_mips_rel
{ } {
1255 if { ![istarget mips
*-*-*] } {
1258 return [check_no_compiler_messages mips_rel object
{
1259 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1260 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1261 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1266 #
Return true
if the target is a MIPS target that uses the EABI.
1268 proc check_effective_target_mips_eabi
{ } {
1269 if { ![istarget mips
*-*-*] } {
1272 return [check_no_compiler_messages mips_eabi object
{
1279 #
Return 1 if the current multilib does not generate PIC by default.
1281 proc check_effective_target_nonpic
{ } {
1282 return [check_no_compiler_messages nonpic assembly
{
1289 #
Return 1 if the current multilib generates PIE by default.
1291 proc check_effective_target_pie_enabled
{ } {
1292 return [check_no_compiler_messages pie_enabled assembly
{
1299 #
Return 1 if the target generates
-fstack
-protector by default.
1301 proc check_effective_target_fstack_protector_enabled
{} {
1302 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1303 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1304 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1310 #
Return 1 if the target does not use a
status wrapper.
1312 proc check_effective_target_unwrapped
{ } {
1313 if { [target_info needs_status_wrapper
] != "" \
1314 && [target_info needs_status_wrapper
] != "0" } {
1320 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1322 proc check_iconv_available
{ test_what
} {
1325 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1326 if { ![info exists libiconv
] } {
1327 set libiconv
"-liconv"
1329 set test_what
[lindex $test_what
1]
1330 return [check_runtime_nocache $test_what
[subst
{
1336 cd
= iconv_open
("$test_what", "UTF-8");
1337 if (cd
== (iconv_t
) -1)
1344 #
Return true
if Cilk Library is supported
on the target.
1345 proc check_effective_target_cilkplus_runtime
{ } {
1346 return [ check_no_compiler_messages_nocache cilkplus_runtime executable
{
1350 int __cilkrts_set_param
(const char
*, const char
*);
1352 int x
= __cilkrts_set_param
("nworkers", "0");
1355 } "-fcilkplus -lcilkrts" ]
1358 #
Return true
if the atomic library is supported
on the target.
1359 proc check_effective_target_libatomic_available
{ } {
1360 return [check_no_compiler_messages libatomic_available executable
{
1361 int main
(void
) { return 0; }
1365 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1367 proc check_ascii_locale_available
{ } {
1371 #
Return true
if named sections are supported
on this target.
1373 proc check_named_sections_available
{ } {
1374 return [check_no_compiler_messages named_sections assembly
{
1375 int __attribute__
((section
("whatever"))) foo;
1379 #
Return true
if the
"naked" function attribute is supported on this target.
1381 proc check_effective_target_naked_functions
{ } {
1382 return [check_no_compiler_messages naked_functions assembly
{
1383 void f
() __attribute__
((naked
));
1387 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1390 # When the target
name changes
, replace the cached result.
1392 proc check_effective_target_fortran_large_real
{ } {
1393 return [check_no_compiler_messages fortran_large_real executable
{
1395 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1402 #
Return 1 if the target supports Fortran real kind real
(16),
1403 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1404 # this checks
for Real
(16) only
; the other returned real
(10) if
1405 # both real
(10) and real
(16) are available.
1407 # When the target
name changes
, replace the cached result.
1409 proc check_effective_target_fortran_real_16
{ } {
1410 return [check_no_compiler_messages fortran_real_16 executable
{
1419 #
Return 1 if the target supports Fortran
's IEEE modules,
1422 # When the target name changes, replace the cached result.
1424 proc check_effective_target_fortran_ieee { flags } {
1425 return [check_no_compiler_messages fortran_ieee executable {
1427 use, intrinsic :: ieee_features
1433 # Return 1 if the target supports SQRT for the largest floating-point
1434 # type. (Some targets lack the libm support for this FP type.)
1435 # On most targets, this check effectively checks either whether sqrtl is
1436 # available or on __float128 systems whether libquadmath is installed,
1437 # which provides sqrtq.
1439 # When the target name changes, replace the cached result.
1441 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1442 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1444 use iso_fortran_env, only: real_kinds
1445 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1446 real(kind=maxFP), volatile :: x
1454 # Return 1 if the target supports Fortran integer kinds larger than
1455 # integer(8), 0 otherwise.
1457 # When the target name changes, replace the cached result.
1459 proc check_effective_target_fortran_large_int { } {
1460 return [check_no_compiler_messages fortran_large_int executable {
1462 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1463 integer(kind=k) :: i
1468 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1470 # When the target name changes, replace the cached result.
1472 proc check_effective_target_fortran_integer_16 { } {
1473 return [check_no_compiler_messages fortran_integer_16 executable {
1480 # Return 1 if we can statically link libgfortran, 0 otherwise.
1482 # When the target name changes, replace the cached result.
1484 proc check_effective_target_static_libgfortran { } {
1485 return [check_no_compiler_messages static_libgfortran executable {
1492 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1494 proc check_effective_target_rdynamic { } {
1495 return [check_no_compiler_messages rdynamic executable {
1496 int main() { return 0; }
1500 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1502 proc check_effective_target_cilkplus { } {
1503 # Skip cilk-plus tests on int16 and size16 targets for now.
1504 # The cilk-plus tests are not generic enough to cover these
1505 # cases and would throw hundreds of FAILs.
1506 if { [check_effective_target_int16]
1507 || ![check_effective_target_size32plus] } {
1511 # Skip AVR, its RAM is too small and too many tests would fail.
1512 if { [istarget avr-*-*] } {
1516 if { ! [check_effective_target_pthread] } {
1523 proc check_linker_plugin_available { } {
1524 return [check_no_compiler_messages_nocache linker_plugin executable {
1525 int main() { return 0; }
1526 } "-flto -fuse-linker-plugin"]
1529 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1530 # otherwise. Cache the result.
1532 proc check_750cl_hw_available { } {
1533 return [check_cached_effective_target 750cl_hw_available {
1534 # If this is not the right target then we can skip the test.
1535 if { ![istarget powerpc-*paired*] } {
1538 check_runtime_nocache 750cl_hw_available {
1542 asm volatile ("ps_mul v0,v0,v0");
1544 asm volatile ("ps_mul 0,0,0");
1553 # Return 1 if the target OS supports running SSE executables, 0
1554 # otherwise. Cache the result.
1556 proc check_sse_os_support_available { } {
1557 return [check_cached_effective_target sse_os_support_available {
1558 # If this is not the right target then we can skip the test.
1559 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1561 } elseif { [istarget i?86-*-solaris2*] } {
1562 # The Solaris 2 kernel doesn't save and restore SSE registers
1563 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1564 check_runtime_nocache sse_os_support_available
{
1567 asm volatile
("movaps %xmm0,%xmm0");
1577 #
Return 1 if the target OS supports running AVX executables
, 0
1578 # otherwise.
Cache the result.
1580 proc check_avx_os_support_available
{ } {
1581 return [check_cached_effective_target avx_os_support_available
{
1582 #
If this is not the right target
then we can skip the test.
1583 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1586 # Check that OS has AVX and SSE saving enabled.
1587 check_runtime_nocache avx_os_support_available
{
1590 unsigned
int eax
, edx
;
1592 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1593 return (eax
& 6) != 6;
1600 #
Return 1 if the target supports executing SSE instructions
, 0
1601 # otherwise.
Cache the result.
1603 proc check_sse_hw_available
{ } {
1604 return [check_cached_effective_target sse_hw_available
{
1605 #
If this is not the right target
then we can skip the test.
1606 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1609 check_runtime_nocache sse_hw_available
{
1613 unsigned
int eax
, ebx
, ecx
, edx
;
1614 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1615 return !(edx
& bit_SSE
);
1623 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1624 #
0 otherwise.
Cache the result.
1626 proc check_mpaired_single_hw_available
{ } {
1627 return [check_cached_effective_target mpaired_single_hw_available
{
1628 #
If this is not the right target
then we can skip the test.
1629 if { !([istarget mips
*-*-*]) } {
1632 check_runtime_nocache mpaired_single_hw_available
{
1635 asm volatile
("pll.ps $f2,$f4,$f6");
1643 #
Return 1 if the target supports executing Loongson vector instructions
,
1644 #
0 otherwise.
Cache the result.
1646 proc check_mips_loongson_hw_available
{ } {
1647 return [check_cached_effective_target mips_loongson_hw_available
{
1648 #
If this is not the right target
then we can skip the test.
1649 if { !([istarget mips
*-*-*]) } {
1652 check_runtime_nocache mips_loongson_hw_available
{
1653 #
include <loongson.h
>
1656 asm volatile
("paddw $f2,$f4,$f6");
1664 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1665 # otherwise.
Cache the result.
1667 proc check_mips_msa_hw_available
{ } {
1668 return [check_cached_effective_target mips_msa_hw_available
{
1669 #
If this is not the right target
then we can skip the test.
1670 if { !([istarget mips
*-*-*]) } {
1673 check_runtime_nocache mips_msa_hw_available
{
1674 #
if !defined
(__mips_msa
)
1675 #error
"MSA NOT AVAIL"
1677 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1678 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1680 #
if !defined
(__mips_hard_float
)
1681 #error
"MSA HARD_FLOAT REQUIRED"
1683 #
if __mips_fpr
!= 64
1684 #error
"MSA 64-bit FPR REQUIRED"
1690 v8i16 v
= __builtin_msa_ldi_h
(0);
1700 #
Return 1 if the target supports executing SSE2 instructions
, 0
1701 # otherwise.
Cache the result.
1703 proc check_sse2_hw_available
{ } {
1704 return [check_cached_effective_target sse2_hw_available
{
1705 #
If this is not the right target
then we can skip the test.
1706 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1709 check_runtime_nocache sse2_hw_available
{
1713 unsigned
int eax
, ebx
, ecx
, edx
;
1714 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1715 return !(edx
& bit_SSE2
);
1723 #
Return 1 if the target supports executing SSE4 instructions
, 0
1724 # otherwise.
Cache the result.
1726 proc check_sse4_hw_available
{ } {
1727 return [check_cached_effective_target sse4_hw_available
{
1728 #
If this is not the right target
then we can skip the test.
1729 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1732 check_runtime_nocache sse4_hw_available
{
1736 unsigned
int eax
, ebx
, ecx
, edx
;
1737 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1738 return !(ecx
& bit_SSE4_2
);
1746 #
Return 1 if the target supports executing AVX instructions
, 0
1747 # otherwise.
Cache the result.
1749 proc check_avx_hw_available
{ } {
1750 return [check_cached_effective_target avx_hw_available
{
1751 #
If this is not the right target
then we can skip the test.
1752 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1755 check_runtime_nocache avx_hw_available
{
1759 unsigned
int eax
, ebx
, ecx
, edx
;
1760 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1761 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1762 != (bit_AVX | bit_OSXSAVE
));
1770 #
Return 1 if the target supports executing AVX2 instructions
, 0
1771 # otherwise.
Cache the result.
1773 proc check_avx2_hw_available
{ } {
1774 return [check_cached_effective_target avx2_hw_available
{
1775 #
If this is not the right target
then we can skip the test.
1776 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1779 check_runtime_nocache avx2_hw_available
{
1783 unsigned
int eax
, ebx
, ecx
, edx
;
1784 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
)
1785 ||
((ecx
& bit_OSXSAVE
) != bit_OSXSAVE
))
1788 if (__get_cpuid_max
(0, NULL
) < 7)
1791 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1793 return (ebx
& bit_AVX2
) != bit_AVX2
;
1800 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1802 proc check_effective_target_sse_runtime
{ } {
1803 if { [check_effective_target_sse
]
1804 && [check_sse_hw_available
]
1805 && [check_sse_os_support_available
] } {
1811 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1813 proc check_effective_target_sse2_runtime
{ } {
1814 if { [check_effective_target_sse2
]
1815 && [check_sse2_hw_available
]
1816 && [check_sse_os_support_available
] } {
1822 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1824 proc check_effective_target_sse4_runtime
{ } {
1825 if { [check_effective_target_sse4
]
1826 && [check_sse4_hw_available
]
1827 && [check_sse_os_support_available
] } {
1833 #
Return 1 if the target supports running MIPS Paired
-Single
1834 # executables
, 0 otherwise.
1836 proc check_effective_target_mpaired_single_runtime
{ } {
1837 if { [check_effective_target_mpaired_single
]
1838 && [check_mpaired_single_hw_available
] } {
1844 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1846 proc check_effective_target_mips_loongson_runtime
{ } {
1847 if { [check_effective_target_mips_loongson
]
1848 && [check_mips_loongson_hw_available
] } {
1854 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1856 proc check_effective_target_mips_msa_runtime
{ } {
1857 if { [check_effective_target_mips_msa
]
1858 && [check_mips_msa_hw_available
] } {
1864 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1866 proc check_effective_target_avx_runtime
{ } {
1867 if { [check_effective_target_avx
]
1868 && [check_avx_hw_available
]
1869 && [check_avx_os_support_available
] } {
1875 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1877 proc check_effective_target_avx2_runtime
{ } {
1878 if { [check_effective_target_avx2
]
1879 && [check_avx2_hw_available
]
1880 && [check_avx_os_support_available
] } {
1886 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1887 #
move instructions
for moves from GPR to FPR.
1889 proc check_effective_target_powerpc64_no_dm
{ } {
1890 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1891 # checks
if we
do not use direct moves
, but use the old
-fashioned
1892 # slower
move-via
-the
-stack.
1893 return [check_no_messages_and_pattern powerpc64_no_dm \
1894 {\mmulld\M.
*\mlfd
} assembly
{
1895 double f
(long long x
) { return x
*x
; }
1899 #
Return 1 if the target supports executing power8 vector instructions
, 0
1900 # otherwise.
Cache the result.
1902 proc check_p8vector_hw_available
{ } {
1903 return [check_cached_effective_target p8vector_hw_available
{
1904 # Some simulators are known to not support VSX
/power8 instructions.
1905 #
For now
, disable
on Darwin
1906 if { [istarget powerpc
-*-eabi
]
1907 ||
[istarget powerpc
*-*-eabispe
]
1908 ||
[istarget
*-*-darwin
*]} {
1911 set options
"-mpower8-vector"
1912 check_runtime_nocache p8vector_hw_available
{
1916 asm volatile
("xxlorc vs0,vs0,vs0");
1918 asm volatile
("xxlorc 0,0,0");
1927 #
Return 1 if the target supports executing power9 vector instructions
, 0
1928 # otherwise.
Cache the result.
1930 proc check_p9vector_hw_available
{ } {
1931 return [check_cached_effective_target p9vector_hw_available
{
1932 # Some simulators are known to not support VSX
/power8
/power9
1933 # instructions.
For now
, disable
on Darwin.
1934 if { [istarget powerpc
-*-eabi
]
1935 ||
[istarget powerpc
*-*-eabispe
]
1936 ||
[istarget
*-*-darwin
*]} {
1939 set options
"-mpower9-vector"
1940 check_runtime_nocache p9vector_hw_available
{
1944 vector double v
= (vector double
) { 0.0, 0.0 };
1945 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1953 #
Return 1 if the target supports executing power9 modulo instructions
, 0
1954 # otherwise.
Cache the result.
1956 proc check_p9modulo_hw_available
{ } {
1957 return [check_cached_effective_target p9modulo_hw_available
{
1958 # Some simulators are known to not support VSX
/power8
/power9
1959 # instructions.
For now
, disable
on Darwin.
1960 if { [istarget powerpc
-*-eabi
]
1961 ||
[istarget powerpc
*-*-eabispe
]
1962 ||
[istarget
*-*-darwin
*]} {
1965 set options
"-mmodulo"
1966 check_runtime_nocache p9modulo_hw_available
{
1969 int i
= 5, j
= 3, r
= -1;
1970 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1978 #
Return 1 if the target supports executing __float128
on PowerPC via software
1979 # emulation
, 0 otherwise.
Cache the result.
1981 proc check_ppc_float128_sw_available
{ } {
1982 return [check_cached_effective_target ppc_float128_sw_available
{
1983 # Some simulators are known to not support VSX
/power8
/power9
1984 # instructions.
For now
, disable
on Darwin.
1985 if { [istarget powerpc
-*-eabi
]
1986 ||
[istarget powerpc
*-*-eabispe
]
1987 ||
[istarget
*-*-darwin
*]} {
1990 set options
"-mfloat128 -mvsx"
1991 check_runtime_nocache ppc_float128_sw_available
{
1992 volatile __float128 x
= 1.0q
;
1993 volatile __float128 y
= 2.0q
;
1996 __float128 z
= x
+ y
;
2004 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2005 # hardware instructions
, 0 otherwise.
Cache the result.
2007 proc check_ppc_float128_hw_available
{ } {
2008 return [check_cached_effective_target ppc_float128_hw_available
{
2009 # Some simulators are known to not support VSX
/power8
/power9
2010 # instructions.
For now
, disable
on Darwin.
2011 if { [istarget powerpc
-*-eabi
]
2012 ||
[istarget powerpc
*-*-eabispe
]
2013 ||
[istarget
*-*-darwin
*]} {
2016 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2017 check_runtime_nocache ppc_float128_hw_available
{
2018 volatile __float128 x
= 1.0q
;
2019 volatile __float128 y
= 2.0q
;
2022 __float128 z
= x
+ y
;
2023 __float128 w
= -1.0q
;
2025 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2026 return ((z
!= 3.0q
) ||
(z
!= w
);
2033 #
Return 1 if the target supports executing VSX instructions
, 0
2034 # otherwise.
Cache the result.
2036 proc check_vsx_hw_available
{ } {
2037 return [check_cached_effective_target vsx_hw_available
{
2038 # Some simulators are known to not support VSX instructions.
2039 #
For now
, disable
on Darwin
2040 if { [istarget powerpc
-*-eabi
]
2041 ||
[istarget powerpc
*-*-eabispe
]
2042 ||
[istarget
*-*-darwin
*]} {
2046 check_runtime_nocache vsx_hw_available
{
2050 asm volatile
("xxlor vs0,vs0,vs0");
2052 asm volatile
("xxlor 0,0,0");
2061 #
Return 1 if the target supports executing AltiVec instructions
, 0
2062 # otherwise.
Cache the result.
2064 proc check_vmx_hw_available
{ } {
2065 return [check_cached_effective_target vmx_hw_available
{
2066 # Some simulators are known to not support VMX instructions.
2067 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2070 # Most targets don
't require special flags for this test case, but
2071 # Darwin does. Just to be sure, make sure VSX is not enabled for
2072 # the altivec tests.
2073 if { [istarget *-*-darwin*]
2074 || [istarget *-*-aix*] } {
2075 set options "-maltivec -mno-vsx"
2077 set options "-mno-vsx"
2079 check_runtime_nocache vmx_hw_available {
2083 asm volatile ("vor v0,v0,v0");
2085 asm volatile ("vor 0,0,0");
2094 proc check_ppc_recip_hw_available { } {
2095 return [check_cached_effective_target ppc_recip_hw_available {
2096 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2097 # For now, disable on Darwin
2098 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2101 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2102 check_runtime_nocache ppc_recip_hw_available {
2103 volatile double d_recip, d_rsqrt, d_four = 4.0;
2104 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2107 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2108 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2109 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2110 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2118 # Return 1 if the target supports executing AltiVec and Cell PPU
2119 # instructions, 0 otherwise. Cache the result.
2121 proc check_effective_target_cell_hw { } {
2122 return [check_cached_effective_target cell_hw_available {
2123 # Some simulators are known to not support VMX and PPU instructions.
2124 if { [istarget powerpc-*-eabi*] } {
2127 # Most targets don't require special flags
for this test
2128 # case
, but Darwin and AIX
do.
2129 if { [istarget
*-*-darwin
*]
2130 ||
[istarget
*-*-aix
*] } {
2131 set options
"-maltivec -mcpu=cell"
2133 set options
"-mcpu=cell"
2135 check_runtime_nocache cell_hw_available
{
2139 asm volatile
("vor v0,v0,v0");
2140 asm volatile
("lvlx v0,r0,r0");
2142 asm volatile
("vor 0,0,0");
2143 asm volatile
("lvlx 0,0,0");
2152 #
Return 1 if the target supports executing
64-bit instructions
, 0
2153 # otherwise.
Cache the result.
2155 proc check_effective_target_powerpc64
{ } {
2156 global powerpc64_available_saved
2159 if [info exists powerpc64_available_saved
] {
2160 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2162 set powerpc64_available_saved
0
2164 # Some simulators are known to not support powerpc64 instructions.
2165 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2166 verbose
"check_effective_target_powerpc64 returning 0" 2
2167 return $powerpc64_available_saved
2170 #
Set up
, compile, and
execute a test
program containing a
64-bit
2171 # instruction.
Include the current process ID in the file
2172 # names to prevent conflicts with invocations
for multiple
2177 set f
[open $src
"w"]
2178 puts $f
"int main() {"
2179 puts $f
"#ifdef __MACH__"
2180 puts $f
" asm volatile (\"extsw r0,r0\");"
2182 puts $f
" asm volatile (\"extsw 0,0\");"
2184 puts $f
" return 0; }"
2187 set opts
"additional_flags=-mcpu=G5"
2189 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2190 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2193 if [string match
"" $lines] then {
2194 # No error message
, compilation succeeded.
2195 set result
[$
{tool
}_load
"./$exe" "" ""]
2196 set status [lindex $result
0]
2197 remote_file build
delete $exe
2198 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2200 if { $
status == "pass" } then {
2201 set powerpc64_available_saved
1
2204 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2208 return $powerpc64_available_saved
2211 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2212 # complex float arguments. This affects gfortran tests that
call cabsf
2213 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2214 #
argument passing as the compiler under test
, 1 otherwise.
2216 proc check_effective_target_broken_cplxf_arg
{ } {
2217 # Skip the work
for targets known not to be affected.
2218 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2222 return [check_cached_effective_target broken_cplxf_arg
{
2223 check_runtime_nocache broken_cplxf_arg
{
2224 #
include <complex.h
>
2225 extern void abort
(void
);
2226 float fabsf
(float
);
2227 float cabsf
(_Complex float
);
2234 if (fabsf
(f
- 5.0) > 0.0001)
2235 /* Yes
, it
's broken. */
2237 /* All fine, not broken. */
2244 # Return 1 is this is a TI C6X target supporting C67X instructions
2245 proc check_effective_target_ti_c67x { } {
2246 return [check_no_compiler_messages ti_c67x assembly {
2247 #if !defined(_TMS320C6700)
2248 #error !_TMS320C6700
2253 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2254 proc check_effective_target_ti_c64xp { } {
2255 return [check_no_compiler_messages ti_c64xp assembly {
2256 #if !defined(_TMS320C6400_PLUS)
2257 #error !_TMS320C6400_PLUS
2263 proc check_alpha_max_hw_available { } {
2264 return [check_runtime alpha_max_hw_available {
2265 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2269 # Returns true iff the FUNCTION is available on the target system.
2270 # (This is essentially a Tcl implementation of Autoconf's
2273 proc check_function_available
{ function
} {
2274 return [check_no_compiler_messages $
{function
}_available \
2280 int main
() { $function
(); }
2284 # Returns true iff
"fork" is available on the target system.
2286 proc check_fork_available
{} {
2287 return [check_function_available
"fork"]
2290 # Returns true iff
"mkfifo" is available on the target system.
2292 proc check_mkfifo_available
{} {
2293 if { [istarget
*-*-cygwin
*] } {
2294 # Cygwin has mkfifo
, but support is incomplete.
2298 return [check_function_available
"mkfifo"]
2301 # Returns true iff
"__cxa_atexit" is used on the target system.
2303 proc check_cxa_atexit_available
{ } {
2304 return [check_cached_effective_target cxa_atexit_available
{
2305 if { [istarget hppa
*-*-hpux10
*] } {
2306 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2308 } elseif { [istarget *-*-vxworks] } {
2309 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2312 check_runtime_nocache cxa_atexit_available
{
2315 static unsigned
int count;
2332 Y
() { f
(); count = 2; }
2341 int main
() { return 0; }
2347 proc check_effective_target_objc2
{ } {
2348 return [check_no_compiler_messages objc2 object
{
2357 proc check_effective_target_next_runtime
{ } {
2358 return [check_no_compiler_messages objc2 object
{
2359 #ifdef __NEXT_RUNTIME__
2362 #error
!__NEXT_RUNTIME__
2367 #
Return 1 if we
're generating 32-bit code using default options, 0
2370 proc check_effective_target_ilp32 { } {
2371 return [check_no_compiler_messages ilp32 object {
2372 int dummy[sizeof (int) == 4
2373 && sizeof (void *) == 4
2374 && sizeof (long) == 4 ? 1 : -1];
2378 # Return 1 if we're generating ia32 code using default options
, 0
2381 proc check_effective_target_ia32
{ } {
2382 return [check_no_compiler_messages ia32 object
{
2383 int dummy
[sizeof
(int) == 4
2384 && sizeof
(void
*) == 4
2385 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2389 #
Return 1 if we
're generating x32 code using default options, 0
2392 proc check_effective_target_x32 { } {
2393 return [check_no_compiler_messages x32 object {
2394 int dummy[sizeof (int) == 4
2395 && sizeof (void *) == 4
2396 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2400 # Return 1 if we're generating
32-bit integers using default
2401 # options
, 0 otherwise.
2403 proc check_effective_target_int32
{ } {
2404 return [check_no_compiler_messages int32 object
{
2405 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2409 #
Return 1 if we
're generating 32-bit or larger integers using default
2410 # options, 0 otherwise.
2412 proc check_effective_target_int32plus { } {
2413 return [check_no_compiler_messages int32plus object {
2414 int dummy[sizeof (int) >= 4 ? 1 : -1];
2418 # Return 1 if we're generating
32-bit or larger pointers using default
2419 # options
, 0 otherwise.
2421 proc check_effective_target_ptr32plus
{ } {
2422 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2423 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2424 # cannot really hold a
32-bit address
, so we always
return false here.
2425 if { [istarget msp430
-*-*] } {
2429 return [check_no_compiler_messages ptr32plus object
{
2430 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2434 #
Return 1 if we support
32-bit or larger array and structure sizes
2435 # using default options
, 0 otherwise. Avoid false positive
on
2436 # targets with
20 or
24 bit address spaces.
2438 proc check_effective_target_size32plus
{ } {
2439 return [check_no_compiler_messages size32plus object
{
2440 char dummy
[16777217L];
2444 # Returns
1 if we
're generating 16-bit or smaller integers with the
2445 # default options, 0 otherwise.
2447 proc check_effective_target_int16 { } {
2448 return [check_no_compiler_messages int16 object {
2449 int dummy[sizeof (int) < 4 ? 1 : -1];
2453 # Return 1 if we're generating
64-bit code using default options
, 0
2456 proc check_effective_target_lp64
{ } {
2457 return [check_no_compiler_messages lp64 object
{
2458 int dummy
[sizeof
(int) == 4
2459 && sizeof
(void
*) == 8
2460 && sizeof
(long
) == 8 ?
1 : -1];
2464 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2467 proc check_effective_target_llp64 { } {
2468 return [check_no_compiler_messages llp64 object {
2469 int dummy[sizeof (int) == 4
2470 && sizeof (void *) == 8
2471 && sizeof (long long) == 8
2472 && sizeof (long) == 4 ? 1 : -1];
2476 # Return 1 if long and int have different sizes,
2479 proc check_effective_target_long_neq_int { } {
2480 return [check_no_compiler_messages long_ne_int object {
2481 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2485 # Return 1 if the target supports long double larger than double,
2488 proc check_effective_target_large_long_double { } {
2489 return [check_no_compiler_messages large_long_double object {
2490 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2494 # Return 1 if the target supports double larger than float,
2497 proc check_effective_target_large_double { } {
2498 return [check_no_compiler_messages large_double object {
2499 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2503 # Return 1 if the target supports long double of 128 bits,
2506 proc check_effective_target_longdouble128 { } {
2507 return [check_no_compiler_messages longdouble128 object {
2508 int dummy[sizeof(long double) == 16 ? 1 : -1];
2512 # Return 1 if the target supports double of 64 bits,
2515 proc check_effective_target_double64 { } {
2516 return [check_no_compiler_messages double64 object {
2517 int dummy[sizeof(double) == 8 ? 1 : -1];
2521 # Return 1 if the target supports double of at least 64 bits,
2524 proc check_effective_target_double64plus { } {
2525 return [check_no_compiler_messages double64plus object {
2526 int dummy[sizeof(double) >= 8 ? 1 : -1];
2530 # Return 1 if the target supports 'w
' suffix on floating constant
2533 proc check_effective_target_has_w_floating_suffix { } {
2535 if [check_effective_target_c++] {
2536 append opts "-std=gnu++03"
2538 return [check_no_compiler_messages w_fp_suffix object {
2543 # Return 1 if the target supports 'q
' suffix on floating constant
2546 proc check_effective_target_has_q_floating_suffix { } {
2548 if [check_effective_target_c++] {
2549 append opts "-std=gnu++03"
2551 return [check_no_compiler_messages q_fp_suffix object {
2556 # Return 1 if the target supports the _FloatN / _FloatNx type
2557 # indicated in the function name, 0 otherwise.
2559 proc check_effective_target_float16 {} {
2560 return [check_no_compiler_messages_nocache float16 object {
2562 } [add_options_for_float16 ""]]
2565 proc check_effective_target_float32 {} {
2566 return [check_no_compiler_messages_nocache float32 object {
2568 } [add_options_for_float32 ""]]
2571 proc check_effective_target_float64 {} {
2572 return [check_no_compiler_messages_nocache float64 object {
2574 } [add_options_for_float64 ""]]
2577 proc check_effective_target_float128 {} {
2578 return [check_no_compiler_messages_nocache float128 object {
2580 } [add_options_for_float128 ""]]
2583 proc check_effective_target_float32x {} {
2584 return [check_no_compiler_messages_nocache float32x object {
2586 } [add_options_for_float32x ""]]
2589 proc check_effective_target_float64x {} {
2590 return [check_no_compiler_messages_nocache float64x object {
2592 } [add_options_for_float64x ""]]
2595 proc check_effective_target_float128x {} {
2596 return [check_no_compiler_messages_nocache float128x object {
2598 } [add_options_for_float128x ""]]
2601 # Likewise, but runtime support for any special options used as well
2602 # as compile-time support is required.
2604 proc check_effective_target_float16_runtime {} {
2605 return [check_effective_target_float16]
2608 proc check_effective_target_float32_runtime {} {
2609 return [check_effective_target_float32]
2612 proc check_effective_target_float64_runtime {} {
2613 return [check_effective_target_float64]
2616 proc check_effective_target_float128_runtime {} {
2617 if { ![check_effective_target_float128] } {
2620 if { [istarget powerpc*-*-*] } {
2621 return [check_effective_target_base_quadfloat_support]
2626 proc check_effective_target_float32x_runtime {} {
2627 return [check_effective_target_float32x]
2630 proc check_effective_target_float64x_runtime {} {
2631 if { ![check_effective_target_float64x] } {
2634 if { [istarget powerpc*-*-*] } {
2635 return [check_effective_target_base_quadfloat_support]
2640 proc check_effective_target_float128x_runtime {} {
2641 return [check_effective_target_float128x]
2644 # Return 1 if the target hardware supports any options added for
2645 # _FloatN and _FloatNx types, 0 otherwise.
2647 proc check_effective_target_floatn_nx_runtime {} {
2648 if { [istarget powerpc*-*-aix*] } {
2651 if { [istarget powerpc*-*-*] } {
2652 return [check_effective_target_base_quadfloat_support]
2657 # Add options needed to use the _FloatN / _FloatNx type indicated in
2658 # the function name.
2660 proc add_options_for_float16 { flags } {
2661 if { [istarget arm*-*-*] } {
2662 return "$flags -mfp16-format=ieee"
2667 proc add_options_for_float32 { flags } {
2671 proc add_options_for_float64 { flags } {
2675 proc add_options_for_float128 { flags } {
2676 return [add_options_for___float128 "$flags"]
2679 proc add_options_for_float32x { flags } {
2683 proc add_options_for_float64x { flags } {
2684 return [add_options_for___float128 "$flags"]
2687 proc add_options_for_float128x { flags } {
2691 # Return 1 if the target supports __float128,
2694 proc check_effective_target___float128 { } {
2695 if { [istarget powerpc*-*-*] } {
2696 return [check_ppc_float128_sw_available]
2698 if { [istarget ia64-*-*]
2699 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2705 proc add_options_for___float128 { flags } {
2706 if { [istarget powerpc*-*-*] } {
2707 return "$flags -mfloat128 -mvsx"
2712 # Return 1 if the target supports any special run-time requirements
2713 # for __float128 or _Float128,
2716 proc check_effective_target_base_quadfloat_support { } {
2717 if { [istarget powerpc*-*-*] } {
2718 return [check_vsx_hw_available]
2723 # Return 1 if the target supports compiling fixed-point,
2726 proc check_effective_target_fixed_point { } {
2727 return [check_no_compiler_messages fixed_point object {
2728 _Sat _Fract x; _Sat _Accum y;
2732 # Return 1 if the target supports compiling decimal floating point,
2735 proc check_effective_target_dfp_nocache { } {
2736 verbose "check_effective_target_dfp_nocache: compiling source" 2
2737 set ret [check_no_compiler_messages_nocache dfp object {
2738 float x __attribute__((mode(DD)));
2740 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2744 proc check_effective_target_dfprt_nocache { } {
2745 return [check_runtime_nocache dfprt {
2746 typedef float d64 __attribute__((mode(DD)));
2747 d64 x = 1.2df, y = 2.3dd, z;
2748 int main () { z = x + y; return 0; }
2752 # Return 1 if the target supports compiling Decimal Floating Point,
2755 # This won't change
for different subtargets so
cache the result.
2757 proc check_effective_target_dfp
{ } {
2758 return [check_cached_effective_target dfp
{
2759 check_effective_target_dfp_nocache
2763 #
Return 1 if the target supports linking and executing Decimal Floating
2764 # Point
, 0 otherwise.
2766 # This won
't change for different subtargets so cache the result.
2768 proc check_effective_target_dfprt { } {
2769 return [check_cached_effective_target dfprt {
2770 check_effective_target_dfprt_nocache
2774 proc check_effective_target_powerpc_popcntb_ok { } {
2775 return [check_cached_effective_target powerpc_popcntb_ok {
2777 # Disable on Darwin.
2778 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2781 check_runtime_nocache powerpc_popcntb_ok {
2783 volatile int a = 0x12345678;
2786 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2794 # Return 1 if the target supports executing DFP hardware instructions,
2795 # 0 otherwise. Cache the result.
2797 proc check_dfp_hw_available { } {
2798 return [check_cached_effective_target dfp_hw_available {
2799 # For now, disable on Darwin
2800 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2803 check_runtime_nocache dfp_hw_available {
2804 volatile _Decimal64 r;
2805 volatile _Decimal64 a = 4.0DD;
2806 volatile _Decimal64 b = 2.0DD;
2809 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2810 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2811 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2812 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2815 } "-mcpu=power6 -mhard-float"
2820 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2822 proc check_effective_target_ucn_nocache { } {
2823 # -std=c99 is only valid for C
2824 if [check_effective_target_c] {
2825 set ucnopts "-std=c99"
2829 verbose "check_effective_target_ucn_nocache: compiling source" 2
2830 set ret [check_no_compiler_messages_nocache ucn object {
2833 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2837 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2839 # This won't change
for different subtargets
, so
cache the result.
2841 proc check_effective_target_ucn
{ } {
2842 return [check_cached_effective_target ucn
{
2843 check_effective_target_ucn_nocache
2847 #
Return 1 if the target needs a command line
argument to enable a SIMD
2850 proc check_effective_target_vect_cmdline_needed
{ } {
2851 global et_vect_cmdline_needed_saved
2852 global et_vect_cmdline_needed_target_name
2854 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2855 set et_vect_cmdline_needed_target_name
""
2858 #
If the target has changed since we
set the cached value
, clear it.
2859 set current_target
[current_target_name
]
2860 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2861 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2862 set et_vect_cmdline_needed_target_name $current_target
2863 if { [info exists et_vect_cmdline_needed_saved
] } {
2864 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2865 unset et_vect_cmdline_needed_saved
2869 if [info exists et_vect_cmdline_needed_saved
] {
2870 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2872 set et_vect_cmdline_needed_saved
1
2873 if { [istarget alpha
*-*-*]
2874 ||
[istarget ia64
-*-*]
2875 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
2876 && ![is
-effective
-target ia32
])
2877 ||
([istarget powerpc
*-*-*]
2878 && ([check_effective_target_powerpc_spe
]
2879 ||
[check_effective_target_powerpc_altivec
]))
2880 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2881 ||
[istarget spu
-*-*]
2882 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2883 ||
[istarget aarch64
*-*-*] } {
2884 set et_vect_cmdline_needed_saved
0
2888 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2889 return $et_vect_cmdline_needed_saved
2892 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2894 # This won
't change for different subtargets so cache the result.
2896 proc check_effective_target_vect_int { } {
2897 global et_vect_int_saved
2900 if [info exists et_vect_int_saved($et_index)] {
2901 verbose "check_effective_target_vect_int: using cached result" 2
2903 set et_vect_int_saved($et_index) 0
2904 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2905 || ([istarget powerpc*-*-*]
2906 && ![istarget powerpc-*-linux*paired*])
2907 || [istarget spu-*-*]
2908 || [istarget sparc*-*-*]
2909 || [istarget alpha*-*-*]
2910 || [istarget ia64-*-*]
2911 || [istarget aarch64*-*-*]
2912 || [check_effective_target_arm32]
2913 || ([istarget mips*-*-*]
2914 && ([et-is-effective-target mips_loongson]
2915 || [et-is-effective-target mips_msa])) } {
2916 set et_vect_int_saved($et_index) 1
2920 verbose "check_effective_target_vect_int:\
2921 returning $et_vect_int_saved($et_index)" 2
2922 return $et_vect_int_saved($et_index)
2925 # Return 1 if the target supports signed int->float conversion
2928 proc check_effective_target_vect_intfloat_cvt { } {
2929 global et_vect_intfloat_cvt_saved
2932 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
2933 verbose "check_effective_target_vect_intfloat_cvt:\
2934 using cached result" 2
2936 set et_vect_intfloat_cvt_saved($et_index) 0
2937 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2938 || ([istarget powerpc*-*-*]
2939 && ![istarget powerpc-*-linux*paired*])
2940 || ([istarget arm*-*-*]
2941 && [check_effective_target_arm_neon_ok])
2942 || ([istarget mips*-*-*]
2943 && [et-is-effective-target mips_msa]) } {
2944 set et_vect_intfloat_cvt_saved($et_index) 1
2948 verbose "check_effective_target_vect_intfloat_cvt:\
2949 returning $et_vect_intfloat_cvt_saved($et_index)" 2
2950 return $et_vect_intfloat_cvt_saved($et_index)
2953 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
2955 proc check_effective_target_int128
{ } {
2956 return [check_no_compiler_messages int128 object
{
2958 #ifndef __SIZEOF_INT128__
2967 #
Return 1 if the target supports unsigned
int->float conversion
2970 proc check_effective_target_vect_uintfloat_cvt
{ } {
2971 global et_vect_uintfloat_cvt_saved
2974 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
2975 verbose
"check_effective_target_vect_uintfloat_cvt:\
2976 using cached result
" 2
2978 set et_vect_uintfloat_cvt_saved
($et_index
) 0
2979 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
2980 ||
([istarget powerpc
*-*-*]
2981 && ![istarget powerpc
-*-linux
*paired
*])
2982 ||
[istarget aarch64
*-*-*]
2983 ||
([istarget arm
*-*-*]
2984 && [check_effective_target_arm_neon_ok
])
2985 ||
([istarget mips
*-*-*]
2986 && [et
-is
-effective
-target mips_msa
]) } {
2987 set et_vect_uintfloat_cvt_saved
($et_index
) 1
2991 verbose
"check_effective_target_vect_uintfloat_cvt:\
2992 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
2993 return $et_vect_uintfloat_cvt_saved
($et_index
)
2997 #
Return 1 if the target supports signed float
->int conversion
3000 proc check_effective_target_vect_floatint_cvt
{ } {
3001 global et_vect_floatint_cvt_saved
3004 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3005 verbose
"check_effective_target_vect_floatint_cvt:\
3006 using cached result
" 2
3008 set et_vect_floatint_cvt_saved
($et_index
) 0
3009 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3010 ||
([istarget powerpc
*-*-*]
3011 && ![istarget powerpc
-*-linux
*paired
*])
3012 ||
([istarget arm
*-*-*]
3013 && [check_effective_target_arm_neon_ok
])
3014 ||
([istarget mips
*-*-*]
3015 && [et
-is
-effective
-target mips_msa
]) } {
3016 set et_vect_floatint_cvt_saved
($et_index
) 1
3020 verbose
"check_effective_target_vect_floatint_cvt:\
3021 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3022 return $et_vect_floatint_cvt_saved
($et_index
)
3025 #
Return 1 if the target supports unsigned float
->int conversion
3028 proc check_effective_target_vect_floatuint_cvt
{ } {
3029 global et_vect_floatuint_cvt_saved
3032 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3033 verbose
"check_effective_target_vect_floatuint_cvt:\
3034 using cached result
" 2
3036 set et_vect_floatuint_cvt_saved
($et_index
) 0
3037 if { ([istarget powerpc
*-*-*]
3038 && ![istarget powerpc
-*-linux
*paired
*])
3039 ||
([istarget arm
*-*-*]
3040 && [check_effective_target_arm_neon_ok
])
3041 ||
([istarget mips
*-*-*]
3042 && [et
-is
-effective
-target mips_msa
]) } {
3043 set et_vect_floatuint_cvt_saved
($et_index
) 1
3047 verbose
"check_effective_target_vect_floatuint_cvt:\
3048 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3049 return $et_vect_floatuint_cvt_saved
($et_index
)
3052 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3054 # This won
't change for different subtargets so cache the result.
3056 proc check_effective_target_vect_simd_clones { } {
3057 global et_vect_simd_clones_saved
3060 if [info exists et_vect_simd_clones_saved($et_index)] {
3061 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3063 set et_vect_simd_clones_saved($et_index) 0
3064 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3065 # avx2 and avx512f clone. Only the right clone for the
3066 # specified arch will be chosen, but still we need to at least
3067 # be able to assemble avx512f.
3068 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3069 && [check_effective_target_avx512f]) } {
3070 set et_vect_simd_clones_saved($et_index) 1
3074 verbose "check_effective_target_vect_simd_clones:\
3075 returning $et_vect_simd_clones_saved($et_index)" 2
3076 return $et_vect_simd_clones_saved($et_index)
3079 # Return 1 if this is a AArch64 target supporting big endian
3080 proc check_effective_target_aarch64_big_endian { } {
3081 return [check_no_compiler_messages aarch64_big_endian assembly {
3082 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3083 #error !__aarch64__ || !__AARCH64EB__
3088 # Return 1 if this is a AArch64 target supporting little endian
3089 proc check_effective_target_aarch64_little_endian { } {
3090 if { ![istarget aarch64*-*-*] } {
3094 return [check_no_compiler_messages aarch64_little_endian assembly {
3095 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3101 # Return 1 if this is a compiler supporting ARC atomic operations
3102 proc check_effective_target_arc_atomic { } {
3103 return [check_no_compiler_messages arc_atomic assembly {
3104 #if !defined(__ARC_ATOMIC__)
3110 # Return 1 if this is an arm target using 32-bit instructions
3111 proc check_effective_target_arm32 { } {
3112 if { ![istarget arm*-*-*] } {
3116 return [check_no_compiler_messages arm32 assembly {
3117 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3118 #error !__arm || __thumb__ && !__thumb2__
3123 # Return 1 if this is an arm target not using Thumb
3124 proc check_effective_target_arm_nothumb { } {
3125 if { ![istarget arm*-*-*] } {
3129 return [check_no_compiler_messages arm_nothumb assembly {
3130 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3131 #error !__arm__ || __thumb || __thumb2__
3136 # Return 1 if this is a little-endian ARM target
3137 proc check_effective_target_arm_little_endian { } {
3138 if { ![istarget arm*-*-*] } {
3142 return [check_no_compiler_messages arm_little_endian assembly {
3143 #if !defined(__arm__) || !defined(__ARMEL__)
3144 #error !__arm__ || !__ARMEL__
3149 # Return 1 if this is an ARM target that only supports aligned vector accesses
3150 proc check_effective_target_arm_vect_no_misalign { } {
3151 if { ![istarget arm*-*-*] } {
3155 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3156 #if !defined(__arm__) \
3157 || (defined(__ARM_FEATURE_UNALIGNED) \
3158 && defined(__ARMEL__))
3159 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3165 # Return 1 if this is an ARM target supporting -mfpu=vfp
3166 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3169 proc check_effective_target_arm_vfp_ok { } {
3170 if { [check_effective_target_arm32] } {
3171 return [check_no_compiler_messages arm_vfp_ok object {
3173 } "-mfpu=vfp -mfloat-abi=softfp"]
3179 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3180 # -mfloat-abi=softfp.
3182 proc check_effective_target_arm_vfp3_ok { } {
3183 if { [check_effective_target_arm32] } {
3184 return [check_no_compiler_messages arm_vfp3_ok object {
3186 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3192 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3193 # -mfloat-abi=softfp.
3194 proc check_effective_target_arm_v8_vfp_ok {} {
3195 if { [check_effective_target_arm32] } {
3196 return [check_no_compiler_messages arm_v8_vfp_ok object {
3199 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3202 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3208 # Return 1 if this is an ARM target supporting -mfpu=vfp
3209 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3212 proc check_effective_target_arm_hard_vfp_ok { } {
3213 if { [check_effective_target_arm32]
3214 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3215 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3216 int main() { return 0;}
3217 } "-mfpu=vfp -mfloat-abi=hard"]
3223 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3224 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3225 # incompatible with these options. Also set et_arm_fp_flags to the
3226 # best options to add.
3228 proc check_effective_target_arm_fp_ok_nocache { } {
3229 global et_arm_fp_flags
3230 set et_arm_fp_flags ""
3231 if { [check_effective_target_arm32] } {
3232 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3233 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3235 #error __ARM_FP not defined
3238 set et_arm_fp_flags $flags
3247 proc check_effective_target_arm_fp_ok { } {
3248 return [check_cached_effective_target arm_fp_ok \
3249 check_effective_target_arm_fp_ok_nocache]
3252 # Add the options needed to define __ARM_FP. We need either
3253 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3254 # specified by the multilib, use it.
3256 proc add_options_for_arm_fp { flags } {
3257 if { ! [check_effective_target_arm_fp_ok] } {
3260 global et_arm_fp_flags
3261 return "$flags $et_arm_fp_flags"
3264 # Return 1 if this is an ARM target that supports DSP multiply with
3265 # current multilib flags.
3267 proc check_effective_target_arm_dsp { } {
3268 return [check_no_compiler_messages arm_dsp assembly {
3269 #ifndef __ARM_FEATURE_DSP
3276 # Return 1 if this is an ARM target that supports unaligned word/halfword
3277 # load/store instructions.
3279 proc check_effective_target_arm_unaligned { } {
3280 return [check_no_compiler_messages arm_unaligned assembly {
3281 #ifndef __ARM_FEATURE_UNALIGNED
3282 #error no unaligned support
3288 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3289 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3290 # incompatible with these options. Also set et_arm_crypto_flags to the
3291 # best options to add.
3293 proc check_effective_target_arm_crypto_ok_nocache { } {
3294 global et_arm_crypto_flags
3295 set et_arm_crypto_flags ""
3296 if { [check_effective_target_arm_v8_neon_ok] } {
3297 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3298 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3299 #include "arm_neon.h"
3301 foo (uint8x16_t a, uint8x16_t b)
3303 return vaeseq_u8 (a, b);
3306 set et_arm_crypto_flags $flags
3315 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3317 proc check_effective_target_arm_crypto_ok { } {
3318 return [check_cached_effective_target arm_crypto_ok \
3319 check_effective_target_arm_crypto_ok_nocache]
3322 # Add options for crypto extensions.
3323 proc add_options_for_arm_crypto { flags } {
3324 if { ! [check_effective_target_arm_crypto_ok] } {
3327 global et_arm_crypto_flags
3328 return "$flags $et_arm_crypto_flags"
3331 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3332 # or -mfloat-abi=hard, but if one is already specified by the
3333 # multilib, use it. Similarly, if a -mfpu option already enables
3334 # NEON, do not add -mfpu=neon.
3336 proc add_options_for_arm_neon { flags } {
3337 if { ! [check_effective_target_arm_neon_ok] } {
3340 global et_arm_neon_flags
3341 return "$flags $et_arm_neon_flags"
3344 proc add_options_for_arm_v8_vfp { flags } {
3345 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3348 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3351 proc add_options_for_arm_v8_neon { flags } {
3352 if { ! [check_effective_target_arm_v8_neon_ok] } {
3355 global et_arm_v8_neon_flags
3356 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3359 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3360 # options for AArch64 and for ARM.
3362 proc add_options_for_arm_v8_1a_neon { flags } {
3363 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3366 global et_arm_v8_1a_neon_flags
3367 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3370 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3371 # Also adds the ARMv8 FP options for ARM and for AArch64.
3373 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3374 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3377 global et_arm_v8_2a_fp16_scalar_flags
3378 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3381 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3382 # the ARMv8 NEON options for ARM and for AArch64.
3384 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3385 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3388 global et_arm_v8_2a_fp16_neon_flags
3389 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3392 proc add_options_for_arm_crc { flags } {
3393 if { ! [check_effective_target_arm_crc_ok] } {
3396 global et_arm_crc_flags
3397 return "$flags $et_arm_crc_flags"
3400 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3401 # or -mfloat-abi=hard, but if one is already specified by the
3402 # multilib, use it. Similarly, if a -mfpu option already enables
3403 # NEON, do not add -mfpu=neon.
3405 proc add_options_for_arm_neonv2 { flags } {
3406 if { ! [check_effective_target_arm_neonv2_ok] } {
3409 global et_arm_neonv2_flags
3410 return "$flags $et_arm_neonv2_flags"
3413 # Add the options needed for vfp3.
3414 proc add_options_for_arm_vfp3 { flags } {
3415 if { ! [check_effective_target_arm_vfp3_ok] } {
3418 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3421 # Return 1 if this is an ARM target supporting -mfpu=neon
3422 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3423 # incompatible with these options. Also set et_arm_neon_flags to the
3424 # best options to add.
3426 proc check_effective_target_arm_neon_ok_nocache { } {
3427 global et_arm_neon_flags
3428 set et_arm_neon_flags ""
3429 if { [check_effective_target_arm32] } {
3430 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3431 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3433 #ifndef __ARM_NEON__
3436 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3437 configured for -mcpu=arm926ej-s, for example. */
3438 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3439 #error Architecture does not support NEON.
3442 set et_arm_neon_flags $flags
3451 proc check_effective_target_arm_neon_ok { } {
3452 return [check_cached_effective_target arm_neon_ok \
3453 check_effective_target_arm_neon_ok_nocache]
3456 proc check_effective_target_arm_crc_ok_nocache { } {
3457 global et_arm_crc_flags
3458 set et_arm_crc_flags "-march=armv8-a+crc"
3459 return [check_no_compiler_messages_nocache arm_crc_ok object {
3460 #if !defined (__ARM_FEATURE_CRC32)
3463 } "$et_arm_crc_flags"]
3466 proc check_effective_target_arm_crc_ok { } {
3467 return [check_cached_effective_target arm_crc_ok \
3468 check_effective_target_arm_crc_ok_nocache]
3471 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3472 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3473 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3474 # the best options to add.
3476 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3477 global et_arm_neon_fp16_flags
3478 global et_arm_neon_flags
3479 set et_arm_neon_fp16_flags ""
3480 if { [check_effective_target_arm32]
3481 && [check_effective_target_arm_neon_ok] } {
3482 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3483 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3484 "-mfp16-format=ieee"
3485 "-mfloat-abi=softfp -mfp16-format=ieee"
3486 "-mfpu=neon-fp16 -mfp16-format=ieee"
3487 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3488 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3489 #include "arm_neon.h"
3491 foo (float32x4_t arg)
3493 return vcvt_f16_f32 (arg);
3495 } "$et_arm_neon_flags $flags"] } {
3496 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3505 proc check_effective_target_arm_neon_fp16_ok { } {
3506 return [check_cached_effective_target arm_neon_fp16_ok \
3507 check_effective_target_arm_neon_fp16_ok_nocache]
3510 proc check_effective_target_arm_neon_fp16_hw { } {
3511 if {! [check_effective_target_arm_neon_fp16_ok] } {
3514 global et_arm_neon_fp16_flags
3515 check_runtime_nocache arm_neon_fp16_hw {
3517 main (int argc, char **argv)
3519 asm ("vcvt.f32.f16 q1, d0");
3522 } $et_arm_neon_fp16_flags
3525 proc add_options_for_arm_neon_fp16 { flags } {
3526 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3529 global et_arm_neon_fp16_flags
3530 return "$flags $et_arm_neon_fp16_flags"
3533 # Return 1 if this is an ARM target supporting the FP16 alternative
3534 # format. Some multilibs may be incompatible with the options needed. Also
3535 # set et_arm_neon_fp16_flags to the best options to add.
3537 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3538 global et_arm_neon_fp16_flags
3539 set et_arm_neon_fp16_flags ""
3540 if { [check_effective_target_arm32] } {
3541 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3542 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3543 if { [check_no_compiler_messages_nocache \
3544 arm_fp16_alternative_ok object {
3545 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3546 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3548 } "$flags -mfp16-format=alternative"] } {
3549 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3558 proc check_effective_target_arm_fp16_alternative_ok { } {
3559 return [check_cached_effective_target arm_fp16_alternative_ok \
3560 check_effective_target_arm_fp16_alternative_ok_nocache]
3563 # Return 1 if this is an ARM target supports specifying the FP16 none
3564 # format. Some multilibs may be incompatible with the options needed.
3566 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3567 if { [check_effective_target_arm32] } {
3568 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3569 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3570 if { [check_no_compiler_messages_nocache \
3571 arm_fp16_none_ok object {
3572 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3573 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3575 #if defined (__ARM_FP16_FORMAT_IEEE)
3576 #error __ARM_FP16_FORMAT_IEEE defined
3578 } "$flags -mfp16-format=none"] } {
3587 proc check_effective_target_arm_fp16_none_ok { } {
3588 return [check_cached_effective_target arm_fp16_none_ok \
3589 check_effective_target_arm_fp16_none_ok_nocache]
3592 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3593 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3594 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3595 # best options to add.
3597 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3598 global et_arm_v8_neon_flags
3599 set et_arm_v8_neon_flags ""
3600 if { [check_effective_target_arm32] } {
3601 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3602 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3604 #error not armv8 or later
3606 #include "arm_neon.h"
3610 __asm__ volatile ("vrintn.f32 q0, q0");
3612 } "$flags -march=armv8-a"] } {
3613 set et_arm_v8_neon_flags $flags
3622 proc check_effective_target_arm_v8_neon_ok { } {
3623 return [check_cached_effective_target arm_v8_neon_ok \
3624 check_effective_target_arm_v8_neon_ok_nocache]
3627 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3628 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3629 # incompatible with these options. Also set et_arm_neonv2_flags to the
3630 # best options to add.
3632 proc check_effective_target_arm_neonv2_ok_nocache { } {
3633 global et_arm_neonv2_flags
3634 global et_arm_neon_flags
3635 set et_arm_neonv2_flags ""
3636 if { [check_effective_target_arm32]
3637 && [check_effective_target_arm_neon_ok] } {
3638 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3639 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3640 #include "arm_neon.h"
3642 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3644 return vfma_f32 (a, b, c);
3646 } "$et_arm_neon_flags $flags"] } {
3647 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3656 proc check_effective_target_arm_neonv2_ok { } {
3657 return [check_cached_effective_target arm_neonv2_ok \
3658 check_effective_target_arm_neonv2_ok_nocache]
3661 # Add the options needed for VFP FP16 support. We need either
3662 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3663 # the multilib, use it.
3665 proc add_options_for_arm_fp16 { flags } {
3666 if { ! [check_effective_target_arm_fp16_ok] } {
3669 global et_arm_fp16_flags
3670 return "$flags $et_arm_fp16_flags"
3673 # Add the options needed to enable support for IEEE format
3674 # half-precision support. This is valid for ARM targets.
3676 proc add_options_for_arm_fp16_ieee { flags } {
3677 if { ! [check_effective_target_arm_fp16_ok] } {
3680 global et_arm_fp16_flags
3681 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3684 # Add the options needed to enable support for ARM Alternative format
3685 # half-precision support. This is valid for ARM targets.
3687 proc add_options_for_arm_fp16_alternative { flags } {
3688 if { ! [check_effective_target_arm_fp16_ok] } {
3691 global et_arm_fp16_flags
3692 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3695 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3696 # Skip multilibs that are incompatible with these options and set
3697 # et_arm_fp16_flags to the best options to add. This test is valid for
3700 proc check_effective_target_arm_fp16_ok_nocache { } {
3701 global et_arm_fp16_flags
3702 set et_arm_fp16_flags ""
3703 if { ! [check_effective_target_arm32] } {
3707 [list "" { *-*-* } { "-mfpu=*" } \
3708 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3709 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3710 # Multilib flags would override -mfpu.
3713 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3714 # Must generate floating-point instructions.
3717 if [check_effective_target_arm_hf_eabi] {
3718 # Use existing float-abi and force an fpu which supports fp16
3719 set et_arm_fp16_flags "-mfpu=vfpv4"
3722 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3723 # The existing -mfpu value is OK; use it, but add softfp.
3724 set et_arm_fp16_flags "-mfloat-abi=softfp"
3727 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3728 # macro to check for this support.
3729 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3730 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3733 set et_arm_fp16_flags "$flags"
3740 proc check_effective_target_arm_fp16_ok { } {
3741 return [check_cached_effective_target arm_fp16_ok \
3742 check_effective_target_arm_fp16_ok_nocache]
3745 # Return 1 if the target supports executing VFP FP16 instructions, 0
3746 # otherwise. This test is valid for ARM only.
3748 proc check_effective_target_arm_fp16_hw { } {
3749 if {! [check_effective_target_arm_fp16_ok] } {
3752 global et_arm_fp16_flags
3753 check_runtime_nocache arm_fp16_hw {
3755 main (int argc, char **argv)
3759 asm ("vcvtb.f32.f16 %0, %1"
3760 : "=w" (r) : "w" (a)
3761 : /* No clobbers. */);
3762 return (r == 1.0) ? 0 : 1;
3764 } "$et_arm_fp16_flags -mfp16-format=ieee"
3767 # Creates a series of routines that return 1 if the given architecture
3768 # can be selected and a routine to give the flags to select that architecture
3769 # Note: Extra flags may be added to disable options from newer compilers
3770 # (Thumb in particular - but others may be added in the future).
3771 # -march=armv7ve is special and is handled explicitly after this loop because
3772 # it needs more than one predefine check to identify.
3773 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3774 # /* { dg-add-options arm_arch_v5 } */
3775 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3776 foreach { armfunc armflag armdef } {
3777 v4 "-march=armv4 -marm" __ARM_ARCH_4__
3778 v4t "-march=armv4t" __ARM_ARCH_4T__
3779 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3780 v5t "-march=armv5t" __ARM_ARCH_5T__
3781 v5te "-march=armv5te" __ARM_ARCH_5TE__
3782 v6 "-march=armv6" __ARM_ARCH_6__
3783 v6k "-march=armv6k" __ARM_ARCH_6K__
3784 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3785 v6z "-march=armv6z" __ARM_ARCH_6Z__
3786 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
3787 v7a "-march=armv7-a" __ARM_ARCH_7A__
3788 v7r "-march=armv7-r" __ARM_ARCH_7R__
3789 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3790 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3791 v8a "-march=armv8-a" __ARM_ARCH_8A__
3792 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3793 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3794 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__
3795 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
3796 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3797 proc check_effective_target_arm_arch_FUNC_ok { } {
3798 if { [ string match "*-marm*" "FLAG" ] &&
3799 ![check_effective_target_arm_arm_ok] } {
3802 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3809 proc add_options_for_arm_arch_FUNC { flags } {
3810 return "$flags FLAG"
3813 proc check_effective_target_arm_arch_FUNC_multilib { } {
3814 return [check_runtime arm_arch_FUNC_multilib {
3820 } [add_options_for_arm_arch_FUNC ""]]
3825 # Same functions as above but for -march=armv7ve. To uniquely identify
3826 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3827 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3829 proc check_effective_target_arm_arch_v7ve_ok { } {
3830 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3831 ![check_effective_target_arm_arm_ok] } {
3834 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3835 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3838 } "-march=armv7ve" ]
3841 proc add_options_for_arm_arch_v7ve { flags } {
3842 return "$flags -march=armv7ve"
3845 # Return 1 if GCC was configured with --with-mode=
3846 proc check_effective_target_default_mode { } {
3848 return [check_configured_with "with-mode="]
3851 # Return 1 if this is an ARM target where -marm causes ARM to be
3854 proc check_effective_target_arm_arm_ok { } {
3855 return [check_no_compiler_messages arm_arm_ok assembly {
3856 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3857 #error !__arm__ || __thumb__ || __thumb2__
3863 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3866 proc check_effective_target_arm_thumb1_ok { } {
3867 return [check_no_compiler_messages arm_thumb1_ok assembly {
3868 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3869 #error !__arm__ || !__thumb__ || __thumb2__
3871 int foo (int i) { return i; }
3875 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3878 proc check_effective_target_arm_thumb2_ok { } {
3879 return [check_no_compiler_messages arm_thumb2_ok assembly {
3880 #if !defined(__thumb2__)
3883 int foo (int i) { return i; }
3887 # Return 1 if this is an ARM target where Thumb-1 is used without options
3888 # added by the test.
3890 proc check_effective_target_arm_thumb1 { } {
3891 return [check_no_compiler_messages arm_thumb1 assembly {
3892 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3893 #error !__arm__ || !__thumb__ || __thumb2__
3899 # Return 1 if this is an ARM target where Thumb-2 is used without options
3900 # added by the test.
3902 proc check_effective_target_arm_thumb2 { } {
3903 return [check_no_compiler_messages arm_thumb2 assembly {
3904 #if !defined(__thumb2__)
3911 # Return 1 if this is an ARM target where conditional execution is available.
3913 proc check_effective_target_arm_cond_exec { } {
3914 return [check_no_compiler_messages arm_cond_exec assembly {
3915 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3922 # Return 1 if this is an ARM cortex-M profile cpu
3924 proc check_effective_target_arm_cortex_m { } {
3925 if { ![istarget arm*-*-*] } {
3928 return [check_no_compiler_messages arm_cortex_m assembly {
3929 #if defined(__ARM_ARCH_ISA_ARM)
3930 #error __ARM_ARCH_ISA_ARM is defined
3936 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3937 # used and MOVT/MOVW instructions to be available.
3939 proc check_effective_target_arm_thumb1_movt_ok {} {
3940 if [check_effective_target_arm_thumb1_ok] {
3941 return [check_no_compiler_messages arm_movt object {
3945 asm ("movt r0, #42");
3953 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3954 # used and CBZ and CBNZ instructions are available.
3956 proc check_effective_target_arm_thumb1_cbz_ok {} {
3957 if [check_effective_target_arm_thumb1_ok] {
3958 return [check_no_compiler_messages arm_movt object {
3962 asm ("cbz r0, 2f\n2:");
3970 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
3973 proc check_effective_target_arm_cmse_ok {} {
3974 return [check_no_compiler_messages arm_cmse object {
3983 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3985 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3986 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3987 int foo (void) { return 0; }
3988 } "-O2 -mprint-tune-info" ]
3991 # Return 1 if the target supports executing NEON instructions, 0
3992 # otherwise. Cache the result.
3994 proc check_effective_target_arm_neon_hw { } {
3995 return [check_runtime arm_neon_hw_available {
3999 long long a = 0, b = 1;
4000 asm ("vorr %P0, %P1, %P2"
4002 : "0" (a), "w" (b));
4005 } [add_options_for_arm_neon ""]]
4008 proc check_effective_target_arm_neonv2_hw { } {
4009 return [check_runtime arm_neon_hwv2_available {
4010 #include "arm_neon.h"
4014 float32x2_t a, b, c;
4015 asm ("vfma.f32 %P0, %P1, %P2"
4017 : "w" (b), "w" (c));
4020 } [add_options_for_arm_neonv2 ""]]
4023 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4024 # otherwise. The test is valid for AArch64 and ARM. Record the command
4025 # line options needed.
4027 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4028 global et_arm_v8_1a_neon_flags
4029 set et_arm_v8_1a_neon_flags ""
4031 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4035 # Iterate through sets of options to find the compiler flags that
4036 # need to be added to the -march option. Start with the empty set
4037 # since AArch64 only needs the -march setting.
4038 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4039 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4040 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4041 #if !defined (__ARM_FEATURE_QRDMX)
4042 #error "__ARM_FEATURE_QRDMX not defined"
4044 } "$flags -march=armv8.1-a"] } {
4045 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
4053 proc check_effective_target_arm_v8_1a_neon_ok { } {
4054 return [check_cached_effective_target arm_v8_1a_neon_ok \
4055 check_effective_target_arm_v8_1a_neon_ok_nocache]
4058 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4059 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4060 # Record the command line options needed.
4062 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4063 global et_arm_v8_2a_fp16_scalar_flags
4064 set et_arm_v8_2a_fp16_scalar_flags ""
4066 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4070 # Iterate through sets of options to find the compiler flags that
4071 # need to be added to the -march option.
4072 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4073 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4074 if { [check_no_compiler_messages_nocache \
4075 arm_v8_2a_fp16_scalar_ok object {
4076 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4077 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4079 } "$flags -march=armv8.2-a+fp16"] } {
4080 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4088 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4089 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4090 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4093 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4094 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4095 # Record the command line options needed.
4097 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4098 global et_arm_v8_2a_fp16_neon_flags
4099 set et_arm_v8_2a_fp16_neon_flags ""
4101 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4105 # Iterate through sets of options to find the compiler flags that
4106 # need to be added to the -march option.
4107 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4108 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4109 if { [check_no_compiler_messages_nocache \
4110 arm_v8_2a_fp16_neon_ok object {
4111 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4112 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4114 } "$flags -march=armv8.2-a+fp16"] } {
4115 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4123 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4124 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4125 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4128 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4131 proc check_effective_target_arm_v8_neon_hw { } {
4132 return [check_runtime arm_v8_neon_hw_available {
4133 #include "arm_neon.h"
4137 float32x2_t a = { 1.0f, 2.0f };
4138 #ifdef __ARM_ARCH_ISA_A64
4139 asm ("frinta %0.2s, %1.2s"
4143 asm ("vrinta.f32 %P0, %P1"
4147 return a[0] == 2.0f;
4149 } [add_options_for_arm_v8_neon ""]]
4152 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4153 # otherwise. The test is valid for AArch64 and ARM.
4155 proc check_effective_target_arm_v8_1a_neon_hw { } {
4156 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4159 return [check_runtime arm_v8_1a_neon_hw_available {
4163 #ifdef __ARM_ARCH_ISA_A64
4164 __Int32x2_t a = {0, 1};
4165 __Int32x2_t b = {0, 2};
4168 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4171 : /* No clobbers. */);
4175 __simd64_int32_t a = {0, 1};
4176 __simd64_int32_t b = {0, 2};
4177 __simd64_int32_t result;
4179 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4182 : /* No clobbers. */);
4187 } [add_options_for_arm_v8_1a_neon ""]]
4190 # Return 1 if the target supports executing floating point instructions from
4191 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4194 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4195 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4198 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4205 #ifdef __ARM_ARCH_ISA_A64
4207 asm ("fabs %h0, %h1"
4210 : /* No clobbers. */);
4214 asm ("vabs.f16 %0, %1"
4217 : /* No clobbers. */);
4221 return (result == 1.0) ? 0 : 1;
4223 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4226 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4227 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4230 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4231 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4234 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4238 #ifdef __ARM_ARCH_ISA_A64
4240 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4241 __Float16x4_t result;
4243 asm ("fabs %0.4h, %1.4h"
4246 : /* No clobbers. */);
4250 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4251 __simd64_float16_t result;
4253 asm ("vabs.f16 %P0, %P1"
4256 : /* No clobbers. */);
4260 return (result[0] == 1.0) ? 0 : 1;
4262 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4265 # Return 1 if this is a ARM target with NEON enabled.
4267 proc check_effective_target_arm_neon { } {
4268 if { [check_effective_target_arm32] } {
4269 return [check_no_compiler_messages arm_neon object {
4270 #ifndef __ARM_NEON__
4281 proc check_effective_target_arm_neonv2 { } {
4282 if { [check_effective_target_arm32] } {
4283 return [check_no_compiler_messages arm_neon object {
4284 #ifndef __ARM_NEON__
4287 #ifndef __ARM_FEATURE_FMA
4299 # Return 1 if this is an ARM target with load acquire and store release
4300 # instructions for 8-, 16- and 32-bit types.
4302 proc check_effective_target_arm_acq_rel { } {
4303 return [check_no_compiler_messages arm_acq_rel object {
4305 load_acquire_store_release (void)
4307 asm ("lda r0, [r1]\n\t"
4313 : : : "r0", "memory");
4318 # Add the options needed for MIPS Paired-Single.
4320 proc add_options_for_mpaired_single { flags } {
4321 if { ! [check_effective_target_mpaired_single] } {
4324 return "$flags -mpaired-single"
4327 # Add the options needed for MIPS SIMD Architecture.
4329 proc add_options_for_mips_msa { flags } {
4330 if { ! [check_effective_target_mips_msa] } {
4333 return "$flags -mmsa"
4336 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4337 # the Loongson vector modes.
4339 proc check_effective_target_mips_loongson { } {
4340 return [check_no_compiler_messages loongson assembly {
4341 #if !defined(__mips_loongson_vector_rev)
4342 #error !__mips_loongson_vector_rev
4347 # Return 1 if this is a MIPS target that supports the legacy NAN.
4349 proc check_effective_target_mips_nanlegacy { } {
4350 return [check_no_compiler_messages nanlegacy assembly {
4352 int main () { return 0; }
4356 # Return 1 if an MSA program can be compiled to object
4358 proc check_effective_target_mips_msa { } {
4359 if ![check_effective_target_nomips16] {
4362 return [check_no_compiler_messages msa object {
4363 #if !defined(__mips_msa)
4364 #error "MSA NOT AVAIL"
4366 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4367 #error "MSA NOT AVAIL FOR ISA REV < 2"
4369 #if !defined(__mips_hard_float)
4370 #error "MSA HARD_FLOAT REQUIRED"
4372 #if __mips_fpr != 64
4373 #error "MSA 64-bit FPR REQUIRED"
4379 v8i16 v = __builtin_msa_ldi_h (1);
4387 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4390 proc check_effective_target_arm_eabi { } {
4391 return [check_no_compiler_messages arm_eabi object {
4392 #ifndef __ARM_EABI__
4400 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4401 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4403 proc check_effective_target_arm_hf_eabi { } {
4404 return [check_no_compiler_messages arm_hf_eabi object {
4405 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4406 #error not hard-float EABI
4413 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4414 # Some multilibs may be incompatible with this option.
4416 proc check_effective_target_arm_iwmmxt_ok { } {
4417 if { [check_effective_target_arm32] } {
4418 return [check_no_compiler_messages arm_iwmmxt_ok object {
4426 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4427 # for an ARM target.
4428 proc check_effective_target_arm_prefer_ldrd_strd { } {
4429 if { ![check_effective_target_arm32] } {
4433 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4434 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4438 # Return 1 if this is a PowerPC target supporting -meabi.
4440 proc check_effective_target_powerpc_eabi_ok { } {
4441 if { [istarget powerpc*-*-*] } {
4442 return [check_no_compiler_messages powerpc_eabi_ok object {
4450 # Return 1 if this is a PowerPC target with floating-point registers.
4452 proc check_effective_target_powerpc_fprs { } {
4453 if { [istarget powerpc*-*-*]
4454 || [istarget rs6000-*-*] } {
4455 return [check_no_compiler_messages powerpc_fprs object {
4467 # Return 1 if this is a PowerPC target with hardware double-precision
4470 proc check_effective_target_powerpc_hard_double { } {
4471 if { [istarget powerpc*-*-*]
4472 || [istarget rs6000-*-*] } {
4473 return [check_no_compiler_messages powerpc_hard_double object {
4485 # Return 1 if this is a PowerPC target supporting -maltivec.
4487 proc check_effective_target_powerpc_altivec_ok { } {
4488 if { ([istarget powerpc*-*-*]
4489 && ![istarget powerpc-*-linux*paired*])
4490 || [istarget rs6000-*-*] } {
4491 # AltiVec is not supported on AIX before 5.3.
4492 if { [istarget powerpc*-*-aix4*]
4493 || [istarget powerpc*-*-aix5.1*]
4494 || [istarget powerpc*-*-aix5.2*] } {
4497 return [check_no_compiler_messages powerpc_altivec_ok object {
4505 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4507 proc check_effective_target_powerpc_p8vector_ok { } {
4508 if { ([istarget powerpc*-*-*]
4509 && ![istarget powerpc-*-linux*paired*])
4510 || [istarget rs6000-*-*] } {
4511 # AltiVec is not supported on AIX before 5.3.
4512 if { [istarget powerpc*-*-aix4*]
4513 || [istarget powerpc*-*-aix5.1*]
4514 || [istarget powerpc*-*-aix5.2*] } {
4517 return [check_no_compiler_messages powerpc_p8vector_ok object {
4520 asm volatile ("xxlorc vs0,vs0,vs0");
4522 asm volatile ("xxlorc 0,0,0");
4526 } "-mpower8-vector"]
4532 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4534 proc check_effective_target_powerpc_p9vector_ok { } {
4535 if { ([istarget powerpc*-*-*]
4536 && ![istarget powerpc-*-linux*paired*])
4537 || [istarget rs6000-*-*] } {
4538 # AltiVec is not supported on AIX before 5.3.
4539 if { [istarget powerpc*-*-aix4*]
4540 || [istarget powerpc*-*-aix5.1*]
4541 || [istarget powerpc*-*-aix5.2*] } {
4544 return [check_no_compiler_messages powerpc_p9vector_ok object {
4547 vector double v = (vector double) { 0.0, 0.0 };
4548 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4551 } "-mpower9-vector"]
4557 # Return 1 if this is a PowerPC target supporting -mmodulo
4559 proc check_effective_target_powerpc_p9modulo_ok { } {
4560 if { ([istarget powerpc*-*-*]
4561 && ![istarget powerpc-*-linux*paired*])
4562 || [istarget rs6000-*-*] } {
4563 # AltiVec is not supported on AIX before 5.3.
4564 if { [istarget powerpc*-*-aix4*]
4565 || [istarget powerpc*-*-aix5.1*]
4566 || [istarget powerpc*-*-aix5.2*] } {
4569 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4571 int i = 5, j = 3, r = -1;
4572 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4581 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4582 # software emulation on power7/power8 systems or hardware support on power9.
4584 proc check_effective_target_powerpc_float128_sw_ok { } {
4585 if { ([istarget powerpc*-*-*]
4586 && ![istarget powerpc-*-linux*paired*])
4587 || [istarget rs6000-*-*] } {
4588 # AltiVec is not supported on AIX before 5.3.
4589 if { [istarget powerpc*-*-aix4*]
4590 || [istarget powerpc*-*-aix5.1*]
4591 || [istarget powerpc*-*-aix5.2*] } {
4594 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4595 volatile __float128 x = 1.0q;
4596 volatile __float128 y = 2.0q;
4598 __float128 z = x + y;
4601 } "-mfloat128 -mvsx"]
4607 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4608 # support on power9.
4610 proc check_effective_target_powerpc_float128_hw_ok { } {
4611 if { ([istarget powerpc*-*-*]
4612 && ![istarget powerpc-*-linux*paired*])
4613 || [istarget rs6000-*-*] } {
4614 # AltiVec is not supported on AIX before 5.3.
4615 if { [istarget powerpc*-*-aix4*]
4616 || [istarget powerpc*-*-aix5.1*]
4617 || [istarget powerpc*-*-aix5.2*] } {
4620 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4621 volatile __float128 x = 1.0q;
4622 volatile __float128 y = 2.0q;
4625 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4628 } "-mfloat128-hardware"]
4634 # Return 1 if this is a PowerPC target supporting -mvsx
4636 proc check_effective_target_powerpc_vsx_ok { } {
4637 if { ([istarget powerpc*-*-*]
4638 && ![istarget powerpc-*-linux*paired*])
4639 || [istarget rs6000-*-*] } {
4640 # VSX is not supported on AIX before 7.1.
4641 if { [istarget powerpc*-*-aix4*]
4642 || [istarget powerpc*-*-aix5*]
4643 || [istarget powerpc*-*-aix6*] } {
4646 return [check_no_compiler_messages powerpc_vsx_ok object {
4649 asm volatile ("xxlor vs0,vs0,vs0");
4651 asm volatile ("xxlor 0,0,0");
4661 # Return 1 if this is a PowerPC target supporting -mhtm
4663 proc check_effective_target_powerpc_htm_ok { } {
4664 if { ([istarget powerpc*-*-*]
4665 && ![istarget powerpc-*-linux*paired*])
4666 || [istarget rs6000-*-*] } {
4667 # HTM is not supported on AIX yet.
4668 if { [istarget powerpc*-*-aix*] } {
4671 return [check_no_compiler_messages powerpc_htm_ok object {
4673 asm volatile ("tbegin. 0");
4682 # Return 1 if the target supports executing HTM hardware instructions,
4683 # 0 otherwise. Cache the result.
4685 proc check_htm_hw_available { } {
4686 return [check_cached_effective_target htm_hw_available {
4687 # For now, disable on Darwin
4688 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4691 check_runtime_nocache htm_hw_available {
4701 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4703 proc check_effective_target_powerpc_ppu_ok { } {
4704 if [check_effective_target_powerpc_altivec_ok] {
4705 return [check_no_compiler_messages cell_asm_available object {
4708 asm volatile ("lvlx v0,v0,v0");
4710 asm volatile ("lvlx 0,0,0");
4720 # Return 1 if this is a PowerPC target that supports SPU.
4722 proc check_effective_target_powerpc_spu { } {
4723 if { [istarget powerpc*-*-linux*] } {
4724 return [check_effective_target_powerpc_altivec_ok]
4730 # Return 1 if this is a PowerPC SPE target. The check includes options
4731 # specified by dg-options for this test, so don't
cache the result.
4733 proc check_effective_target_powerpc_spe_nocache
{ } {
4734 if { [istarget powerpc
*-*-*] } {
4735 return [check_no_compiler_messages_nocache powerpc_spe object
{
4741 } [current_compiler_flags
]]
4747 #
Return 1 if this is a PowerPC target with SPE enabled.
4749 proc check_effective_target_powerpc_spe
{ } {
4750 if { [istarget powerpc
*-*-*] } {
4751 return [check_no_compiler_messages powerpc_spe object
{
4763 #
Return 1 if this is a PowerPC target with Altivec enabled.
4765 proc check_effective_target_powerpc_altivec
{ } {
4766 if { [istarget powerpc
*-*-*] } {
4767 return [check_no_compiler_messages powerpc_altivec object
{
4779 #
Return 1 if this is a PowerPC
405 target. The check includes options
4780 # specified by dg
-options
for this test
, so don
't cache the result.
4782 proc check_effective_target_powerpc_405_nocache { } {
4783 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4784 return [check_no_compiler_messages_nocache powerpc_405 object {
4790 } [current_compiler_flags]]
4796 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4798 proc check_effective_target_powerpc_elfv2 { } {
4799 if { [istarget powerpc*-*-*] } {
4800 return [check_no_compiler_messages powerpc_elfv2 object {
4802 #error not ELF v2 ABI
4812 # Return 1 if this is a SPU target with a toolchain that
4813 # supports automatic overlay generation.
4815 proc check_effective_target_spu_auto_overlay { } {
4816 if { [istarget spu*-*-elf*] } {
4817 return [check_no_compiler_messages spu_auto_overlay executable {
4819 } "-Wl,--auto-overlay" ]
4825 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4826 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4827 # test environment appears to run executables on such a simulator.
4829 proc check_effective_target_ultrasparc_hw { } {
4830 return [check_runtime ultrasparc_hw {
4831 int main() { return 0; }
4832 } "-mcpu=ultrasparc"]
4835 # Return 1 if the test environment supports executing UltraSPARC VIS2
4836 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4838 proc check_effective_target_ultrasparc_vis2_hw { } {
4839 return [check_runtime ultrasparc_vis2_hw {
4840 int main() { __asm__(".word 0x81b00320"); return 0; }
4841 } "-mcpu=ultrasparc3"]
4844 # Return 1 if the test environment supports executing UltraSPARC VIS3
4845 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4847 proc check_effective_target_ultrasparc_vis3_hw { } {
4848 return [check_runtime ultrasparc_vis3_hw {
4849 int main() { __asm__(".word 0x81b00220"); return 0; }
4853 # Return 1 if this is a SPARC-V9 target.
4855 proc check_effective_target_sparc_v9 { } {
4856 if { [istarget sparc*-*-*] } {
4857 return [check_no_compiler_messages sparc_v9 object {
4859 asm volatile ("return %i7+8");
4868 # Return 1 if this is a SPARC target with VIS enabled.
4870 proc check_effective_target_sparc_vis { } {
4871 if { [istarget sparc*-*-*] } {
4872 return [check_no_compiler_messages sparc_vis object {
4884 # Return 1 if the target supports hardware vector shift operation.
4886 proc check_effective_target_vect_shift { } {
4887 global et_vect_shift_saved
4890 if [info exists et_vect_shift_saved($et_index)] {
4891 verbose "check_effective_target_vect_shift: using cached result" 2
4893 set et_vect_shift_saved($et_index) 0
4894 if { ([istarget powerpc*-*-*]
4895 && ![istarget powerpc-*-linux*paired*])
4896 || [istarget ia64-*-*]
4897 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4898 || [istarget aarch64*-*-*]
4899 || [check_effective_target_arm32]
4900 || ([istarget mips*-*-*]
4901 && ([et-is-effective-target mips_msa]
4902 || [et-is-effective-target mips_loongson])) } {
4903 set et_vect_shift_saved($et_index) 1
4907 verbose "check_effective_target_vect_shift:\
4908 returning $et_vect_shift_saved($et_index)" 2
4909 return $et_vect_shift_saved($et_index)
4912 proc check_effective_target_whole_vector_shift { } {
4913 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4914 || [istarget ia64-*-*]
4915 || [istarget aarch64*-*-*]
4916 || [istarget powerpc64*-*-*]
4917 || ([check_effective_target_arm32]
4918 && [check_effective_target_arm_little_endian])
4919 || ([istarget mips*-*-*]
4920 && [et-is-effective-target mips_loongson]) } {
4926 verbose "check_effective_target_vect_long: returning $answer" 2
4930 # Return 1 if the target supports vector bswap operations.
4932 proc check_effective_target_vect_bswap { } {
4933 global et_vect_bswap_saved
4936 if [info exists et_vect_bswap_saved($et_index)] {
4937 verbose "check_effective_target_vect_bswap: using cached result" 2
4939 set et_vect_bswap_saved($et_index) 0
4940 if { [istarget aarch64*-*-*]
4941 || ([istarget arm*-*-*]
4942 && [check_effective_target_arm_neon])
4944 set et_vect_bswap_saved($et_index) 1
4948 verbose "check_effective_target_vect_bswap:\
4949 returning $et_vect_bswap_saved($et_index)" 2
4950 return $et_vect_bswap_saved($et_index)
4953 # Return 1 if the target supports hardware vector shift operation for char.
4955 proc check_effective_target_vect_shift_char { } {
4956 global et_vect_shift_char_saved
4959 if [info exists et_vect_shift_char_saved($et_index)] {
4960 verbose "check_effective_target_vect_shift_char: using cached result" 2
4962 set et_vect_shift_char_saved($et_index) 0
4963 if { ([istarget powerpc*-*-*]
4964 && ![istarget powerpc-*-linux*paired*])
4965 || [check_effective_target_arm32]
4966 || ([istarget mips*-*-*]
4967 && [et-is-effective-target mips_msa]) } {
4968 set et_vect_shift_char_saved($et_index) 1
4972 verbose "check_effective_target_vect_shift_char:\
4973 returning $et_vect_shift_char_saved($et_index)" 2
4974 return $et_vect_shift_char_saved($et_index)
4977 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4979 # This can change for different subtargets so do not cache the result.
4981 proc check_effective_target_vect_long { } {
4982 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4983 || (([istarget powerpc*-*-*]
4984 && ![istarget powerpc-*-linux*paired*])
4985 && [check_effective_target_ilp32])
4986 || [check_effective_target_arm32]
4987 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4988 || [istarget aarch64*-*-*]
4989 || ([istarget mips*-*-*]
4990 && [et-is-effective-target mips_msa]) } {
4996 verbose "check_effective_target_vect_long: returning $answer" 2
5000 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5002 # This won't change
for different subtargets so
cache the result.
5004 proc check_effective_target_vect_float
{ } {
5005 global et_vect_float_saved
5008 if [info exists et_vect_float_saved
($et_index
)] {
5009 verbose
"check_effective_target_vect_float: using cached result" 2
5011 set et_vect_float_saved
($et_index
) 0
5012 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5013 ||
[istarget powerpc
*-*-*]
5014 ||
[istarget spu
-*-*]
5015 ||
[istarget mips
-sde
-elf
]
5016 ||
[istarget mipsisa64
*-*-*]
5017 ||
[istarget ia64
-*-*]
5018 ||
[istarget aarch64
*-*-*]
5019 ||
([istarget mips
*-*-*]
5020 && [et
-is
-effective
-target mips_msa
])
5021 ||
[check_effective_target_arm32
] } {
5022 set et_vect_float_saved
($et_index
) 1
5026 verbose
"check_effective_target_vect_float:\
5027 returning $et_vect_float_saved
($et_index
)" 2
5028 return $et_vect_float_saved
($et_index
)
5031 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5033 # This won
't change for different subtargets so cache the result.
5035 proc check_effective_target_vect_double { } {
5036 global et_vect_double_saved
5039 if [info exists et_vect_double_saved($et_index)] {
5040 verbose "check_effective_target_vect_double: using cached result" 2
5042 set et_vect_double_saved($et_index) 0
5043 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5044 && [check_no_compiler_messages vect_double assembly {
5045 #ifdef __tune_atom__
5046 # error No double vectorizer support.
5049 || [istarget aarch64*-*-*]
5050 || [istarget spu-*-*]
5051 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5052 || ([istarget mips*-*-*]
5053 && [et-is-effective-target mips_msa]) } {
5054 set et_vect_double_saved($et_index) 1
5058 verbose "check_effective_target_vect_double:\
5059 returning $et_vect_double_saved($et_index)" 2
5060 return $et_vect_double_saved($et_index)
5063 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5065 # This won't change
for different subtargets so
cache the result.
5067 proc check_effective_target_vect_long_long
{ } {
5068 global et_vect_long_long_saved
5071 if [info exists et_vect_long_long_saved
($et_index
)] {
5072 verbose
"check_effective_target_vect_long_long: using cached result" 2
5074 set et_vect_long_long_saved
($et_index
) 0
5075 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5076 ||
([istarget mips
*-*-*]
5077 && [et
-is
-effective
-target mips_msa
]) } {
5078 set et_vect_long_long_saved
($et_index
) 1
5082 verbose
"check_effective_target_vect_long_long:\
5083 returning $et_vect_long_long_saved
($et_index
)" 2
5084 return $et_vect_long_long_saved
($et_index
)
5088 #
Return 1 if the target plus current options does not support a vector
5089 #
max instruction
on "int", 0 otherwise.
5091 # This won
't change for different subtargets so cache the result.
5093 proc check_effective_target_vect_no_int_min_max { } {
5094 global et_vect_no_int_min_max_saved
5097 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5098 verbose "check_effective_target_vect_no_int_min_max:\
5099 using cached result" 2
5101 set et_vect_no_int_min_max_saved($et_index) 0
5102 if { [istarget sparc*-*-*]
5103 || [istarget spu-*-*]
5104 || [istarget alpha*-*-*]
5105 || ([istarget mips*-*-*]
5106 && [et-is-effective-target mips_loongson]) } {
5107 set et_vect_no_int_min_max_saved($et_index) 1
5110 verbose "check_effective_target_vect_no_int_min_max:\
5111 returning $et_vect_no_int_min_max_saved($et_index)" 2
5112 return $et_vect_no_int_min_max_saved($et_index)
5115 # Return 1 if the target plus current options does not support a vector
5116 # add instruction on "int", 0 otherwise.
5118 # This won't change
for different subtargets so
cache the result.
5120 proc check_effective_target_vect_no_int_add
{ } {
5121 global et_vect_no_int_add_saved
5124 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5125 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5127 set et_vect_no_int_add_saved
($et_index
) 0
5128 # Alpha only supports vector add
on V8QI and V4HI.
5129 if { [istarget alpha
*-*-*] } {
5130 set et_vect_no_int_add_saved
($et_index
) 1
5133 verbose
"check_effective_target_vect_no_int_add:\
5134 returning $et_vect_no_int_add_saved
($et_index
)" 2
5135 return $et_vect_no_int_add_saved
($et_index
)
5138 #
Return 1 if the target plus current options does not support vector
5139 # bitwise instructions
, 0 otherwise.
5141 # This won
't change for different subtargets so cache the result.
5143 proc check_effective_target_vect_no_bitwise { } {
5144 global et_vect_no_bitwise_saved
5147 if [info exists et_vect_no_bitwise_saved($et_index)] {
5148 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5150 set et_vect_no_bitwise_saved($et_index) 0
5152 verbose "check_effective_target_vect_no_bitwise:\
5153 returning $et_vect_no_bitwise_saved($et_index)" 2
5154 return $et_vect_no_bitwise_saved($et_index)
5157 # Return 1 if the target plus current options supports vector permutation,
5160 # This won't change
for different subtargets so
cache the result.
5162 proc check_effective_target_vect_perm
{ } {
5163 global et_vect_perm_saved
5166 if [info exists et_vect_perm_saved
($et_index
)] {
5167 verbose
"check_effective_target_vect_perm: using cached result" 2
5169 set et_vect_perm_saved
($et_index
) 0
5170 if { [is
-effective
-target arm_neon_ok
]
5171 ||
[istarget aarch64
*-*-*]
5172 ||
[istarget powerpc
*-*-*]
5173 ||
[istarget spu
-*-*]
5174 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5175 ||
([istarget mips
*-*-*]
5176 && ([et
-is
-effective
-target mpaired_single
]
5177 ||
[et
-is
-effective
-target mips_msa
])) } {
5178 set et_vect_perm_saved
($et_index
) 1
5181 verbose
"check_effective_target_vect_perm:\
5182 returning $et_vect_perm_saved
($et_index
)" 2
5183 return $et_vect_perm_saved
($et_index
)
5186 #
Return 1 if the target plus current options supports vector permutation
5187 #
on byte
-sized elements
, 0 otherwise.
5189 # This won
't change for different subtargets so cache the result.
5191 proc check_effective_target_vect_perm_byte { } {
5192 global et_vect_perm_byte_saved
5195 if [info exists et_vect_perm_byte_saved($et_index)] {
5196 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5198 set et_vect_perm_byte_saved($et_index) 0
5199 if { ([is-effective-target arm_neon_ok]
5200 && [is-effective-target arm_little_endian])
5201 || ([istarget aarch64*-*-*]
5202 && [is-effective-target aarch64_little_endian])
5203 || [istarget powerpc*-*-*]
5204 || [istarget spu-*-*]
5205 || ([istarget mips-*.*]
5206 && [et-is-effective-target mips_msa]) } {
5207 set et_vect_perm_byte_saved($et_index) 1
5210 verbose "check_effective_target_vect_perm_byte:\
5211 returning $et_vect_perm_byte_saved($et_index)" 2
5212 return $et_vect_perm_byte_saved($et_index)
5215 # Return 1 if the target plus current options supports vector permutation
5216 # on short-sized elements, 0 otherwise.
5218 # This won't change
for different subtargets so
cache the result.
5220 proc check_effective_target_vect_perm_short
{ } {
5221 global et_vect_perm_short_saved
5224 if [info exists et_vect_perm_short_saved
($et_index
)] {
5225 verbose
"check_effective_target_vect_perm_short: using cached result" 2
5227 set et_vect_perm_short_saved
($et_index
) 0
5228 if { ([is
-effective
-target arm_neon_ok
]
5229 && [is
-effective
-target arm_little_endian
])
5230 ||
([istarget aarch64
*-*-*]
5231 && [is
-effective
-target aarch64_little_endian
])
5232 ||
[istarget powerpc
*-*-*]
5233 ||
[istarget spu
-*-*]
5234 ||
([istarget mips
*-*-*]
5235 && [et
-is
-effective
-target mips_msa
]) } {
5236 set et_vect_perm_short_saved
($et_index
) 1
5239 verbose
"check_effective_target_vect_perm_short:\
5240 returning $et_vect_perm_short_saved
($et_index
)" 2
5241 return $et_vect_perm_short_saved
($et_index
)
5244 #
Return 1 if the target plus current options supports a vector
5245 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5247 # This won
't change for different subtargets so cache the result.
5249 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5250 global et_vect_widen_sum_hi_to_si_pattern_saved
5253 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5254 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5255 using cached result" 2
5257 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5258 if { [istarget powerpc*-*-*]
5259 || [istarget aarch64*-*-*]
5260 || ([istarget arm*-*-*] &&
5261 [check_effective_target_arm_neon_ok])
5262 || [istarget ia64-*-*] } {
5263 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5266 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5267 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5268 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5271 # Return 1 if the target plus current options supports a vector
5272 # widening summation of *short* args into *int* result, 0 otherwise.
5273 # A target can also support this widening summation if it can support
5274 # promotion (unpacking) from shorts to ints.
5276 # This won't change
for different subtargets so
cache the result.
5278 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
5279 global et_vect_widen_sum_hi_to_si_saved
5282 if [info exists et_vect_widen_sum_hi_to_si_saved
($et_index
)] {
5283 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5284 using cached result
" 2
5286 set et_vect_widen_sum_hi_to_si_saved
($et_index
) \
5287 [check_effective_target_vect_unpack
]
5288 if { [istarget powerpc
*-*-*]
5289 ||
[istarget ia64
-*-*] } {
5290 set et_vect_widen_sum_hi_to_si_saved
($et_index
) 1
5293 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5294 returning $et_vect_widen_sum_hi_to_si_saved
($et_index
)" 2
5295 return $et_vect_widen_sum_hi_to_si_saved
($et_index
)
5298 #
Return 1 if the target plus current options supports a vector
5299 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
5300 # A target can also support this widening summation
if it can support
5301 # promotion
(unpacking
) from chars to shorts.
5303 # This won
't change for different subtargets so cache the result.
5305 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5306 global et_vect_widen_sum_qi_to_hi_saved
5309 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5310 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5311 using cached result" 2
5313 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5314 if { [check_effective_target_vect_unpack]
5315 || [check_effective_target_arm_neon_ok]
5316 || [istarget ia64-*-*] } {
5317 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5320 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5321 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5322 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5325 # Return 1 if the target plus current options supports a vector
5326 # widening summation of *char* args into *int* result, 0 otherwise.
5328 # This won't change
for different subtargets so
cache the result.
5330 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
5331 global et_vect_widen_sum_qi_to_si_saved
5334 if [info exists et_vect_widen_sum_qi_to_si_saved
($et_index
)] {
5335 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5336 using cached result
" 2
5338 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 0
5339 if { [istarget powerpc
*-*-*] } {
5340 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 1
5343 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5344 returning $et_vect_widen_sum_qi_to_si_saved
($et_index
)" 2
5345 return $et_vect_widen_sum_qi_to_si_saved
($et_index
)
5348 #
Return 1 if the target plus current options supports a vector
5349 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
5350 # A target can also support this widening multplication
if it can support
5351 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
5352 # multiplication of shorts
).
5354 # This won
't change for different subtargets so cache the result.
5357 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5358 global et_vect_widen_mult_qi_to_hi_saved
5361 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5362 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5363 using cached result" 2
5365 if { [check_effective_target_vect_unpack]
5366 && [check_effective_target_vect_short_mult] } {
5367 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5369 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5371 if { [istarget powerpc*-*-*]
5372 || [istarget aarch64*-*-*]
5373 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5374 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5377 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5378 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5379 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5382 # Return 1 if the target plus current options supports a vector
5383 # widening multiplication of *short* args into *int* result, 0 otherwise.
5384 # A target can also support this widening multplication if it can support
5385 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5386 # multiplication of ints).
5388 # This won't change
for different subtargets so
cache the result.
5391 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
5392 global et_vect_widen_mult_hi_to_si_saved
5395 if [info exists et_vect_widen_mult_hi_to_si_saved
($et_index
)] {
5396 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
5397 using cached result
" 2
5399 if { [check_effective_target_vect_unpack
]
5400 && [check_effective_target_vect_int_mult
] } {
5401 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
5403 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 0
5405 if { [istarget powerpc
*-*-*]
5406 ||
[istarget spu
-*-*]
5407 ||
[istarget ia64
-*-*]
5408 ||
[istarget aarch64
*-*-*]
5409 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5410 ||
([istarget arm
*-*-*]
5411 && [check_effective_target_arm_neon_ok
]) } {
5412 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
5415 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
5416 returning $et_vect_widen_mult_hi_to_si_saved
($et_index
)" 2
5417 return $et_vect_widen_mult_hi_to_si_saved
($et_index
)
5420 #
Return 1 if the target plus current options supports a vector
5421 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
5423 # This won
't change for different subtargets so cache the result.
5425 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5426 global et_vect_widen_mult_qi_to_hi_pattern_saved
5429 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5430 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5431 using cached result" 2
5433 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5434 if { [istarget powerpc*-*-*]
5435 || ([istarget arm*-*-*]
5436 && [check_effective_target_arm_neon_ok]
5437 && [check_effective_target_arm_little_endian]) } {
5438 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5441 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5442 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5443 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5446 # Return 1 if the target plus current options supports a vector
5447 # widening multiplication of *short* args into *int* result, 0 otherwise.
5449 # This won't change
for different subtargets so
cache the result.
5451 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
5452 global et_vect_widen_mult_hi_to_si_pattern_saved
5455 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)] {
5456 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5457 using cached result
" 2
5459 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 0
5460 if { [istarget powerpc
*-*-*]
5461 ||
[istarget spu
-*-*]
5462 ||
[istarget ia64
-*-*]
5463 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5464 ||
([istarget arm
*-*-*]
5465 && [check_effective_target_arm_neon_ok
]
5466 && [check_effective_target_arm_little_endian
]) } {
5467 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 1
5470 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5471 returning $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)" 2
5472 return $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)
5475 #
Return 1 if the target plus current options supports a vector
5476 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
5478 # This won
't change for different subtargets so cache the result.
5480 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5481 global et_vect_widen_mult_si_to_di_pattern_saved
5484 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5485 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5486 using cached result" 2
5488 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5489 if {[istarget ia64-*-*]
5490 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5491 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5494 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5495 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5496 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5499 # Return 1 if the target plus current options supports a vector
5500 # widening shift, 0 otherwise.
5502 # This won't change
for different subtargets so
cache the result.
5504 proc check_effective_target_vect_widen_shift
{ } {
5505 global et_vect_widen_shift_saved
5508 if [info exists et_vect_shift_saved
($et_index
)] {
5509 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
5511 set et_vect_widen_shift_saved
($et_index
) 0
5512 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
5513 set et_vect_widen_shift_saved
($et_index
) 1
5516 verbose
"check_effective_target_vect_widen_shift:\
5517 returning $et_vect_widen_shift_saved
($et_index
)" 2
5518 return $et_vect_widen_shift_saved
($et_index
)
5521 #
Return 1 if the target plus current options supports a vector
5522 # dot
-product of signed chars
, 0 otherwise.
5524 # This won
't change for different subtargets so cache the result.
5526 proc check_effective_target_vect_sdot_qi { } {
5527 global et_vect_sdot_qi_saved
5530 if [info exists et_vect_sdot_qi_saved($et_index)] {
5531 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5533 set et_vect_sdot_qi_saved($et_index) 0
5534 if { [istarget ia64-*-*]
5535 || ([istarget mips*-*-*]
5536 && [et-is-effective-target mips_msa]) } {
5537 set et_vect_udot_qi_saved 1
5540 verbose "check_effective_target_vect_sdot_qi:\
5541 returning $et_vect_sdot_qi_saved($et_index)" 2
5542 return $et_vect_sdot_qi_saved($et_index)
5545 # Return 1 if the target plus current options supports a vector
5546 # dot-product of unsigned chars, 0 otherwise.
5548 # This won't change
for different subtargets so
cache the result.
5550 proc check_effective_target_vect_udot_qi
{ } {
5551 global et_vect_udot_qi_saved
5554 if [info exists et_vect_udot_qi_saved
($et_index
)] {
5555 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
5557 set et_vect_udot_qi_saved
($et_index
) 0
5558 if { [istarget powerpc
*-*-*]
5559 ||
[istarget ia64
-*-*]
5560 ||
([istarget mips
*-*-*]
5561 && [et
-is
-effective
-target mips_msa
]) } {
5562 set et_vect_udot_qi_saved
($et_index
) 1
5565 verbose
"check_effective_target_vect_udot_qi:\
5566 returning $et_vect_udot_qi_saved
($et_index
)" 2
5567 return $et_vect_udot_qi_saved
($et_index
)
5570 #
Return 1 if the target plus current options supports a vector
5571 # dot
-product of signed shorts
, 0 otherwise.
5573 # This won
't change for different subtargets so cache the result.
5575 proc check_effective_target_vect_sdot_hi { } {
5576 global et_vect_sdot_hi_saved
5579 if [info exists et_vect_sdot_hi_saved($et_index)] {
5580 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
5582 set et_vect_sdot_hi_saved($et_index) 0
5583 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5584 || [istarget ia64-*-*]
5585 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5586 || ([istarget mips*-*-*]
5587 && [et-is-effective-target mips_msa]) } {
5588 set et_vect_sdot_hi_saved($et_index) 1
5591 verbose "check_effective_target_vect_sdot_hi:\
5592 returning $et_vect_sdot_hi_saved($et_index)" 2
5593 return $et_vect_sdot_hi_saved($et_index)
5596 # Return 1 if the target plus current options supports a vector
5597 # dot-product of unsigned shorts, 0 otherwise.
5599 # This won't change
for different subtargets so
cache the result.
5601 proc check_effective_target_vect_udot_hi
{ } {
5602 global et_vect_udot_hi_saved
5605 if [info exists et_vect_udot_hi_saved
($et_index
)] {
5606 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
5608 set et_vect_udot_hi_saved
($et_index
) 0
5609 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
5610 ||
([istarget mips
*-*-*]
5611 && [et
-is
-effective
-target mips_msa
]) } {
5612 set et_vect_udot_hi_saved
($et_index
) 1
5615 verbose
"check_effective_target_vect_udot_hi:\
5616 returning $et_vect_udot_hi_saved
($et_index
)" 2
5617 return $et_vect_udot_hi_saved
($et_index
)
5620 #
Return 1 if the target plus current options supports a vector
5621 # sad operation of unsigned chars
, 0 otherwise.
5623 # This won
't change for different subtargets so cache the result.
5625 proc check_effective_target_vect_usad_char { } {
5626 global et_vect_usad_char_saved
5629 if [info exists et_vect_usad_char_saved($et_index)] {
5630 verbose "check_effective_target_vect_usad_char: using cached result" 2
5632 set et_vect_usad_char_saved($et_index) 0
5633 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5634 set et_vect_usad_char_saved($et_index) 1
5637 verbose "check_effective_target_vect_usad_char:\
5638 returning $et_vect_usad_char_saved($et_index)" 2
5639 return $et_vect_usad_char_saved($et_index)
5642 # Return 1 if the target plus current options supports a vector
5643 # demotion (packing) of shorts (to chars) and ints (to shorts)
5644 # using modulo arithmetic, 0 otherwise.
5646 # This won't change
for different subtargets so
cache the result.
5648 proc check_effective_target_vect_pack_trunc
{ } {
5649 global et_vect_pack_trunc_saved
5652 if [info exists et_vect_pack_trunc_saved
($et_index
)] {
5653 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
5655 set et_vect_pack_trunc_saved
($et_index
) 0
5656 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
5657 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5658 ||
[istarget aarch64
*-*-*]
5659 ||
[istarget spu
-*-*]
5660 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
5661 && [check_effective_target_arm_little_endian
])
5662 ||
([istarget mips
*-*-*]
5663 && [et
-is
-effective
-target mips_msa
]) } {
5664 set et_vect_pack_trunc_saved
($et_index
) 1
5667 verbose
"check_effective_target_vect_pack_trunc:\
5668 returning $et_vect_pack_trunc_saved
($et_index
)" 2
5669 return $et_vect_pack_trunc_saved
($et_index
)
5672 #
Return 1 if the target plus current options supports a vector
5673 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
5675 # This won
't change for different subtargets so cache the result.
5677 proc check_effective_target_vect_unpack { } {
5678 global et_vect_unpack_saved
5681 if [info exists et_vect_unpack_saved($et_index)] {
5682 verbose "check_effective_target_vect_unpack: using cached result" 2
5684 set et_vect_unpack_saved($et_index) 0
5685 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5686 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5687 || [istarget spu-*-*]
5688 || [istarget ia64-*-*]
5689 || [istarget aarch64*-*-*]
5690 || ([istarget mips*-*-*]
5691 && [et-is-effective-target mips_msa])
5692 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5693 && [check_effective_target_arm_little_endian]) } {
5694 set et_vect_unpack_saved($et_index) 1
5697 verbose "check_effective_target_vect_unpack:\
5698 returning $et_vect_unpack_saved($et_index)" 2
5699 return $et_vect_unpack_saved($et_index)
5702 # Return 1 if the target plus current options does not guarantee
5703 # that its STACK_BOUNDARY is >= the reguired vector alignment.
5705 # This won't change
for different subtargets so
cache the result.
5707 proc check_effective_target_unaligned_stack
{ } {
5708 global et_unaligned_stack_saved
5710 if [info exists et_unaligned_stack_saved
] {
5711 verbose
"check_effective_target_unaligned_stack: using cached result" 2
5713 set et_unaligned_stack_saved
0
5715 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5716 return $et_unaligned_stack_saved
5719 #
Return 1 if the target plus current options does not support a vector
5720 # alignment mechanism
, 0 otherwise.
5722 # This won
't change for different subtargets so cache the result.
5724 proc check_effective_target_vect_no_align { } {
5725 global et_vect_no_align_saved
5728 if [info exists et_vect_no_align_saved($et_index)] {
5729 verbose "check_effective_target_vect_no_align: using cached result" 2
5731 set et_vect_no_align_saved($et_index) 0
5732 if { [istarget mipsisa64*-*-*]
5733 || [istarget mips-sde-elf]
5734 || [istarget sparc*-*-*]
5735 || [istarget ia64-*-*]
5736 || [check_effective_target_arm_vect_no_misalign]
5737 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5738 || ([istarget mips*-*-*]
5739 && [et-is-effective-target mips_loongson]) } {
5740 set et_vect_no_align_saved($et_index) 1
5743 verbose "check_effective_target_vect_no_align:\
5744 returning $et_vect_no_align_saved($et_index)" 2
5745 return $et_vect_no_align_saved($et_index)
5748 # Return 1 if the target supports a vector misalign access, 0 otherwise.
5750 # This won't change
for different subtargets so
cache the result.
5752 proc check_effective_target_vect_hw_misalign
{ } {
5753 global et_vect_hw_misalign_saved
5756 if [info exists et_vect_hw_misalign_saved
($et_index
)] {
5757 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
5759 set et_vect_hw_misalign_saved
($et_index
) 0
5760 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5761 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
5762 ||
[istarget aarch64
*-*-*]
5763 ||
([istarget mips
*-*-*] && [et
-is
-effective
-target mips_msa
]) } {
5764 set et_vect_hw_misalign_saved
($et_index
) 1
5766 if { [istarget arm
*-*-*] } {
5767 set et_vect_hw_misalign_saved
($et_index
) [check_effective_target_arm_vect_no_misalign
]
5770 verbose
"check_effective_target_vect_hw_misalign:\
5771 returning $et_vect_hw_misalign_saved
($et_index
)" 2
5772 return $et_vect_hw_misalign_saved
($et_index
)
5776 #
Return 1 if arrays are aligned to the vector alignment
5777 # boundary
, 0 otherwise.
5779 proc check_effective_target_vect_aligned_arrays
{ } {
5780 set et_vect_aligned_arrays
0
5781 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
5782 && !([is
-effective
-target ia32
]
5783 ||
([check_avx_available
] && ![check_prefer_avx128
])))
5784 ||
[istarget spu
-*-*] } {
5785 set et_vect_aligned_arrays
1
5788 verbose
"check_effective_target_vect_aligned_arrays:\
5789 returning $et_vect_aligned_arrays
" 2
5790 return $et_vect_aligned_arrays
5793 #
Return 1 if types of size
32 bit or less are naturally aligned
5794 #
(aligned to their type
-size
), 0 otherwise.
5796 # This won
't change for different subtargets so cache the result.
5798 proc check_effective_target_natural_alignment_32 { } {
5799 global et_natural_alignment_32
5801 if [info exists et_natural_alignment_32_saved] {
5802 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5804 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5805 set et_natural_alignment_32_saved 1
5806 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
5807 || [istarget avr-*-*] } {
5808 set et_natural_alignment_32_saved 0
5811 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5812 return $et_natural_alignment_32_saved
5815 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5816 # type-size), 0 otherwise.
5818 # This won't change
for different subtargets so
cache the result.
5820 proc check_effective_target_natural_alignment_64
{ } {
5821 global et_natural_alignment_64
5823 if [info exists et_natural_alignment_64_saved
] {
5824 verbose
"check_effective_target_natural_alignment_64: using cached result" 2
5826 set et_natural_alignment_64_saved
0
5827 if { ([is
-effective
-target lp64
] && ![istarget
*-*-darwin
*])
5828 ||
[istarget spu
-*-*] } {
5829 set et_natural_alignment_64_saved
1
5832 verbose
"check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5833 return $et_natural_alignment_64_saved
5836 #
Return 1 if all vector types are naturally aligned
(aligned to their
5837 # type
-size
), 0 otherwise.
5839 proc check_effective_target_vect_natural_alignment
{ } {
5840 set et_vect_natural_alignment
1
5841 if { [check_effective_target_arm_eabi
]
5842 ||
[istarget nvptx
-*-*]
5843 ||
[istarget s390
*-*-*] } {
5844 set et_vect_natural_alignment
0
5846 verbose
"check_effective_target_vect_natural_alignment:\
5847 returning $et_vect_natural_alignment
" 2
5848 return $et_vect_natural_alignment
5851 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
5853 proc check_effective_target_vector_alignment_reachable
{ } {
5854 set et_vector_alignment_reachable
0
5855 if { [check_effective_target_vect_aligned_arrays
]
5856 ||
[check_effective_target_natural_alignment_32
] } {
5857 set et_vector_alignment_reachable
1
5859 verbose
"check_effective_target_vector_alignment_reachable:\
5860 returning $et_vector_alignment_reachable
" 2
5861 return $et_vector_alignment_reachable
5864 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
5866 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
5867 set et_vector_alignment_reachable_for_64bit
0
5868 if { [check_effective_target_vect_aligned_arrays
]
5869 ||
[check_effective_target_natural_alignment_64
] } {
5870 set et_vector_alignment_reachable_for_64bit
1
5872 verbose
"check_effective_target_vector_alignment_reachable_for_64bit:\
5873 returning $et_vector_alignment_reachable_for_64bit
" 2
5874 return $et_vector_alignment_reachable_for_64bit
5877 #
Return 1 if the target only requires element alignment
for vector accesses
5879 proc check_effective_target_vect_element_align
{ } {
5880 global et_vect_element_align
5883 if [info exists et_vect_element_align
($et_index
)] {
5884 verbose
"check_effective_target_vect_element_align:\
5885 using cached result
" 2
5887 set et_vect_element_align
($et_index
) 0
5888 if { ([istarget arm
*-*-*]
5889 && ![check_effective_target_arm_vect_no_misalign
])
5890 ||
[check_effective_target_vect_hw_misalign
] } {
5891 set et_vect_element_align
($et_index
) 1
5895 verbose
"check_effective_target_vect_element_align:\
5896 returning $et_vect_element_align
($et_index
)" 2
5897 return $et_vect_element_align
($et_index
)
5900 #
Return 1 if the target supports vector LOAD_LANES operations
, 0 otherwise.
5902 proc check_effective_target_vect_load_lanes
{ } {
5903 global et_vect_load_lanes
5905 if [info exists et_vect_load_lanes
] {
5906 verbose
"check_effective_target_vect_load_lanes: using cached result" 2
5908 set et_vect_load_lanes
0
5909 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])
5910 ||
[istarget aarch64
*-*-*] } {
5911 set et_vect_load_lanes
1
5915 verbose
"check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5916 return $et_vect_load_lanes
5919 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
5921 proc check_effective_target_vect_condition
{ } {
5922 global et_vect_cond_saved
5925 if [info exists et_vect_cond_saved
($et_index
)] {
5926 verbose
"check_effective_target_vect_cond: using cached result" 2
5928 set et_vect_cond_saved
($et_index
) 0
5929 if { [istarget aarch64
*-*-*]
5930 ||
[istarget powerpc
*-*-*]
5931 ||
[istarget ia64
-*-*]
5932 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5933 ||
[istarget spu
-*-*]
5934 ||
([istarget mips
*-*-*]
5935 && [et
-is
-effective
-target mips_msa
])
5936 ||
([istarget arm
*-*-*]
5937 && [check_effective_target_arm_neon_ok
]) } {
5938 set et_vect_cond_saved
($et_index
) 1
5942 verbose
"check_effective_target_vect_cond:\
5943 returning $et_vect_cond_saved
($et_index
)" 2
5944 return $et_vect_cond_saved
($et_index
)
5947 #
Return 1 if the target supports vector conditional operations where
5948 # the comparison has different type from the lhs
, 0 otherwise.
5950 proc check_effective_target_vect_cond_mixed
{ } {
5951 global et_vect_cond_mixed_saved
5954 if [info exists et_vect_cond_mixed_saved
($et_index
)] {
5955 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
5957 set et_vect_cond_mixed_saved
($et_index
) 0
5958 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5959 ||
[istarget aarch64
*-*-*]
5960 ||
[istarget powerpc
*-*-*]
5961 ||
([istarget mips
*-*-*]
5962 && [et
-is
-effective
-target mips_msa
]) } {
5963 set et_vect_cond_mixed_saved
($et_index
) 1
5967 verbose
"check_effective_target_vect_cond_mixed:\
5968 returning $et_vect_cond_mixed_saved
($et_index
)" 2
5969 return $et_vect_cond_mixed_saved
($et_index
)
5972 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
5974 proc check_effective_target_vect_char_mult
{ } {
5975 global et_vect_char_mult_saved
5978 if [info exists et_vect_char_mult_saved
($et_index
)] {
5979 verbose
"check_effective_target_vect_char_mult: using cached result" 2
5981 set et_vect_char_mult_saved
($et_index
) 0
5982 if { [istarget aarch64
*-*-*]
5983 ||
[istarget ia64
-*-*]
5984 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5985 ||
[check_effective_target_arm32
]
5986 ||
[check_effective_target_powerpc_altivec
]
5987 ||
([istarget mips
*-*-*]
5988 && [et
-is
-effective
-target mips_msa
]) } {
5989 set et_vect_char_mult_saved
($et_index
) 1
5993 verbose
"check_effective_target_vect_char_mult:\
5994 returning $et_vect_char_mult_saved
($et_index
)" 2
5995 return $et_vect_char_mult_saved
($et_index
)
5998 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
6000 proc check_effective_target_vect_short_mult
{ } {
6001 global et_vect_short_mult_saved
6004 if [info exists et_vect_short_mult_saved
($et_index
)] {
6005 verbose
"check_effective_target_vect_short_mult: using cached result" 2
6007 set et_vect_short_mult_saved
($et_index
) 0
6008 if { [istarget ia64
-*-*]
6009 ||
[istarget spu
-*-*]
6010 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6011 ||
[istarget powerpc
*-*-*]
6012 ||
[istarget aarch64
*-*-*]
6013 ||
[check_effective_target_arm32
]
6014 ||
([istarget mips
*-*-*]
6015 && ([et
-is
-effective
-target mips_msa
]
6016 ||
[et
-is
-effective
-target mips_loongson
])) } {
6017 set et_vect_short_mult_saved
($et_index
) 1
6021 verbose
"check_effective_target_vect_short_mult:\
6022 returning $et_vect_short_mult_saved
($et_index
)" 2
6023 return $et_vect_short_mult_saved
($et_index
)
6026 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
6028 proc check_effective_target_vect_int_mult
{ } {
6029 global et_vect_int_mult_saved
6032 if [info exists et_vect_int_mult_saved
($et_index
)] {
6033 verbose
"check_effective_target_vect_int_mult: using cached result" 2
6035 set et_vect_int_mult_saved
($et_index
) 0
6036 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6037 ||
[istarget spu
-*-*]
6038 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6039 ||
[istarget ia64
-*-*]
6040 ||
[istarget aarch64
*-*-*]
6041 ||
([istarget mips
*-*-*]
6042 && [et
-is
-effective
-target mips_msa
])
6043 ||
[check_effective_target_arm32
] } {
6044 set et_vect_int_mult_saved
($et_index
) 1
6048 verbose
"check_effective_target_vect_int_mult:\
6049 returning $et_vect_int_mult_saved
($et_index
)" 2
6050 return $et_vect_int_mult_saved
($et_index
)
6053 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
6055 proc check_effective_target_vect_extract_even_odd
{ } {
6056 global et_vect_extract_even_odd_saved
6059 if [info exists et_vect_extract_even_odd_saved
($et_index
)] {
6060 verbose
"check_effective_target_vect_extract_even_odd:\
6061 using cached result
" 2
6063 set et_vect_extract_even_odd_saved
($et_index
) 0
6064 if { [istarget aarch64
*-*-*]
6065 ||
[istarget powerpc
*-*-*]
6066 ||
[is
-effective
-target arm_neon_ok
]
6067 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6068 ||
[istarget ia64
-*-*]
6069 ||
[istarget spu
-*-*]
6070 ||
([istarget mips
*-*-*]
6071 && ([et
-is
-effective
-target mips_msa
]
6072 ||
[et
-is
-effective
-target mpaired_single
])) } {
6073 set et_vect_extract_even_odd_saved
($et_index
) 1
6077 verbose
"check_effective_target_vect_extract_even_odd:\
6078 returning $et_vect_extract_even_odd_saved
($et_index
)" 2
6079 return $et_vect_extract_even_odd_saved
($et_index
)
6082 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
6084 proc check_effective_target_vect_interleave
{ } {
6085 global et_vect_interleave_saved
6088 if [info exists et_vect_interleave_saved
($et_index
)] {
6089 verbose
"check_effective_target_vect_interleave: using cached result" 2
6091 set et_vect_interleave_saved
($et_index
) 0
6092 if { [istarget aarch64
*-*-*]
6093 ||
[istarget powerpc
*-*-*]
6094 ||
[is
-effective
-target arm_neon_ok
]
6095 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6096 ||
[istarget ia64
-*-*]
6097 ||
[istarget spu
-*-*]
6098 ||
([istarget mips
*-*-*]
6099 && ([et
-is
-effective
-target mpaired_single
]
6100 ||
[et
-is
-effective
-target mips_msa
])) } {
6101 set et_vect_interleave_saved
($et_index
) 1
6105 verbose
"check_effective_target_vect_interleave:\
6106 returning $et_vect_interleave_saved
($et_index
)" 2
6107 return $et_vect_interleave_saved
($et_index
)
6110 foreach N
{2 3 4 8} {
6111 eval
[string map
[list N $N
] {
6112 #
Return 1 if the target supports
2-vector interleaving
6113 proc check_effective_target_vect_stridedN
{ } {
6114 global et_vect_stridedN_saved
6117 if [info exists et_vect_stridedN_saved
($et_index
)] {
6118 verbose
"check_effective_target_vect_stridedN:\
6119 using cached result
" 2
6121 set et_vect_stridedN_saved
($et_index
) 0
6123 && [check_effective_target_vect_interleave
]
6124 && [check_effective_target_vect_extract_even_odd
] } {
6125 set et_vect_stridedN_saved
($et_index
) 1
6127 if { ([istarget arm
*-*-*]
6128 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
6129 set et_vect_stridedN_saved
($et_index
) 1
6133 verbose
"check_effective_target_vect_stridedN:\
6134 returning $et_vect_stridedN_saved
($et_index
)" 2
6135 return $et_vect_stridedN_saved
($et_index
)
6140 #
Return 1 if the target supports multiple vector sizes
6142 proc check_effective_target_vect_multiple_sizes
{ } {
6143 global et_vect_multiple_sizes_saved
6146 set et_vect_multiple_sizes_saved
($et_index
) 0
6147 if { [istarget aarch64
*-*-*]
6148 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])
6149 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6150 && ([check_avx_available
] && ![check_prefer_avx128
])) } {
6151 set et_vect_multiple_sizes_saved
($et_index
) 1
6154 verbose
"check_effective_target_vect_multiple_sizes:\
6155 returning $et_vect_multiple_sizes_saved
($et_index
)" 2
6156 return $et_vect_multiple_sizes_saved
($et_index
)
6159 #
Return 1 if the target supports vectors of
64 bits.
6161 proc check_effective_target_vect64
{ } {
6162 global et_vect64_saved
6165 if [info exists et_vect64_saved
($et_index
)] {
6166 verbose
"check_effective_target_vect64: using cached result" 2
6168 set et_vect64_saved
($et_index
) 0
6169 if { ([istarget arm
*-*-*]
6170 && [check_effective_target_arm_neon_ok
]
6171 && [check_effective_target_arm_little_endian
])
6172 ||
[istarget aarch64
*-*-*]
6173 ||
[istarget sparc
*-*-*] } {
6174 set et_vect64_saved
($et_index
) 1
6178 verbose
"check_effective_target_vect64:\
6179 returning $et_vect64_saved
($et_index
)" 2
6180 return $et_vect64_saved
($et_index
)
6183 #
Return 1 if the target supports vector copysignf calls.
6185 proc check_effective_target_vect_call_copysignf
{ } {
6186 global et_vect_call_copysignf_saved
6189 if [info exists et_vect_call_copysignf_saved
($et_index
)] {
6190 verbose
"check_effective_target_vect_call_copysignf:\
6191 using cached result
" 2
6193 set et_vect_call_copysignf_saved
($et_index
) 0
6194 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6195 ||
[istarget powerpc
*-*-*]
6196 ||
[istarget aarch64
*-*-*] } {
6197 set et_vect_call_copysignf_saved
($et_index
) 1
6201 verbose
"check_effective_target_vect_call_copysignf:\
6202 returning $et_vect_call_copysignf_saved
($et_index
)" 2
6203 return $et_vect_call_copysignf_saved
($et_index
)
6206 #
Return 1 if the target supports hardware square root instructions.
6208 proc check_effective_target_sqrt_insn
{ } {
6209 global et_sqrt_insn_saved
6211 if [info exists et_sqrt_insn_saved
] {
6212 verbose
"check_effective_target_hw_sqrt: using cached result" 2
6214 set et_sqrt_insn_saved
0
6215 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6216 ||
[istarget powerpc
*-*-*]
6217 ||
[istarget aarch64
*-*-*]
6218 ||
([istarget arm
*-*-*] && [check_effective_target_arm_vfp_ok
]) } {
6219 set et_sqrt_insn_saved
1
6223 verbose
"check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6224 return $et_sqrt_insn_saved
6227 #
Return 1 if the target supports vector sqrtf calls.
6229 proc check_effective_target_vect_call_sqrtf
{ } {
6230 global et_vect_call_sqrtf_saved
6233 if [info exists et_vect_call_sqrtf_saved
($et_index
)] {
6234 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
6236 set et_vect_call_sqrtf_saved
($et_index
) 0
6237 if { [istarget aarch64
*-*-*]
6238 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6239 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
]) } {
6240 set et_vect_call_sqrtf_saved
($et_index
) 1
6244 verbose
"check_effective_target_vect_call_sqrtf:\
6245 returning $et_vect_call_sqrtf_saved
($et_index
)" 2
6246 return $et_vect_call_sqrtf_saved
($et_index
)
6249 #
Return 1 if the target supports vector lrint calls.
6251 proc check_effective_target_vect_call_lrint
{ } {
6252 set et_vect_call_lrint
0
6253 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6254 && [check_effective_target_ilp32
]) } {
6255 set et_vect_call_lrint
1
6258 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6259 return $et_vect_call_lrint
6262 #
Return 1 if the target supports vector btrunc calls.
6264 proc check_effective_target_vect_call_btrunc
{ } {
6265 global et_vect_call_btrunc_saved
6268 if [info exists et_vect_call_btrunc_saved
($et_index
)] {
6269 verbose
"check_effective_target_vect_call_btrunc:\
6270 using cached result
" 2
6272 set et_vect_call_btrunc_saved
($et_index
) 0
6273 if { [istarget aarch64
*-*-*] } {
6274 set et_vect_call_btrunc_saved
($et_index
) 1
6278 verbose
"check_effective_target_vect_call_btrunc:\
6279 returning $et_vect_call_btrunc_saved
($et_index
)" 2
6280 return $et_vect_call_btrunc_saved
($et_index
)
6283 #
Return 1 if the target supports vector btruncf calls.
6285 proc check_effective_target_vect_call_btruncf
{ } {
6286 global et_vect_call_btruncf_saved
6289 if [info exists et_vect_call_btruncf_saved
($et_index
)] {
6290 verbose
"check_effective_target_vect_call_btruncf:\
6291 using cached result
" 2
6293 set et_vect_call_btruncf_saved
($et_index
) 0
6294 if { [istarget aarch64
*-*-*] } {
6295 set et_vect_call_btruncf_saved
($et_index
) 1
6299 verbose
"check_effective_target_vect_call_btruncf:\
6300 returning $et_vect_call_btruncf_saved
($et_index
)" 2
6301 return $et_vect_call_btruncf_saved
($et_index
)
6304 #
Return 1 if the target supports vector ceil calls.
6306 proc check_effective_target_vect_call_ceil
{ } {
6307 global et_vect_call_ceil_saved
6310 if [info exists et_vect_call_ceil_saved
($et_index
)] {
6311 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
6313 set et_vect_call_ceil_saved
($et_index
) 0
6314 if { [istarget aarch64
*-*-*] } {
6315 set et_vect_call_ceil_saved
($et_index
) 1
6319 verbose
"check_effective_target_vect_call_ceil:\
6320 returning $et_vect_call_ceil_saved
($et_index
)" 2
6321 return $et_vect_call_ceil_saved
($et_index
)
6324 #
Return 1 if the target supports vector ceilf calls.
6326 proc check_effective_target_vect_call_ceilf
{ } {
6327 global et_vect_call_ceilf_saved
6330 if [info exists et_vect_call_ceilf_saved
($et_index
)] {
6331 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
6333 set et_vect_call_ceilf_saved
($et_index
) 0
6334 if { [istarget aarch64
*-*-*] } {
6335 set et_vect_call_ceilf_saved
($et_index
) 1
6339 verbose
"check_effective_target_vect_call_ceilf:\
6340 returning $et_vect_call_ceilf_saved
($et_index
)" 2
6341 return $et_vect_call_ceilf_saved
($et_index
)
6344 #
Return 1 if the target supports vector floor calls.
6346 proc check_effective_target_vect_call_floor
{ } {
6347 global et_vect_call_floor_saved
6350 if [info exists et_vect_call_floor_saved
($et_index
)] {
6351 verbose
"check_effective_target_vect_call_floor: using cached result" 2
6353 set et_vect_call_floor_saved
($et_index
) 0
6354 if { [istarget aarch64
*-*-*] } {
6355 set et_vect_call_floor_saved
($et_index
) 1
6359 verbose
"check_effective_target_vect_call_floor:\
6360 returning $et_vect_call_floor_saved
($et_index
)" 2
6361 return $et_vect_call_floor_saved
($et_index
)
6364 #
Return 1 if the target supports vector floorf calls.
6366 proc check_effective_target_vect_call_floorf
{ } {
6367 global et_vect_call_floorf_saved
6370 if [info exists et_vect_call_floorf_saved
($et_index
)] {
6371 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
6373 set et_vect_call_floorf_saved
($et_index
) 0
6374 if { [istarget aarch64
*-*-*] } {
6375 set et_vect_call_floorf_saved
($et_index
) 1
6379 verbose
"check_effective_target_vect_call_floorf:\
6380 returning $et_vect_call_floorf_saved
($et_index
)" 2
6381 return $et_vect_call_floorf_saved
($et_index
)
6384 #
Return 1 if the target supports vector lceil calls.
6386 proc check_effective_target_vect_call_lceil
{ } {
6387 global et_vect_call_lceil_saved
6390 if [info exists et_vect_call_lceil_saved
($et_index
)] {
6391 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
6393 set et_vect_call_lceil_saved
($et_index
) 0
6394 if { [istarget aarch64
*-*-*] } {
6395 set et_vect_call_lceil_saved
($et_index
) 1
6399 verbose
"check_effective_target_vect_call_lceil:\
6400 returning $et_vect_call_lceil_saved
($et_index
)" 2
6401 return $et_vect_call_lceil_saved
($et_index
)
6404 #
Return 1 if the target supports vector lfloor calls.
6406 proc check_effective_target_vect_call_lfloor
{ } {
6407 global et_vect_call_lfloor_saved
6410 if [info exists et_vect_call_lfloor_saved
($et_index
)] {
6411 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
6413 set et_vect_call_lfloor_saved
($et_index
) 0
6414 if { [istarget aarch64
*-*-*] } {
6415 set et_vect_call_lfloor_saved
($et_index
) 1
6419 verbose
"check_effective_target_vect_call_lfloor:\
6420 returning $et_vect_call_lfloor_saved
($et_index
)" 2
6421 return $et_vect_call_lfloor_saved
($et_index
)
6424 #
Return 1 if the target supports vector nearbyint calls.
6426 proc check_effective_target_vect_call_nearbyint
{ } {
6427 global et_vect_call_nearbyint_saved
6430 if [info exists et_vect_call_nearbyint_saved
($et_index
)] {
6431 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
6433 set et_vect_call_nearbyint_saved
($et_index
) 0
6434 if { [istarget aarch64
*-*-*] } {
6435 set et_vect_call_nearbyint_saved
($et_index
) 1
6439 verbose
"check_effective_target_vect_call_nearbyint:\
6440 returning $et_vect_call_nearbyint_saved
($et_index
)" 2
6441 return $et_vect_call_nearbyint_saved
($et_index
)
6444 #
Return 1 if the target supports vector nearbyintf calls.
6446 proc check_effective_target_vect_call_nearbyintf
{ } {
6447 global et_vect_call_nearbyintf_saved
6450 if [info exists et_vect_call_nearbyintf_saved
($et_index
)] {
6451 verbose
"check_effective_target_vect_call_nearbyintf:\
6452 using cached result
" 2
6454 set et_vect_call_nearbyintf_saved
($et_index
) 0
6455 if { [istarget aarch64
*-*-*] } {
6456 set et_vect_call_nearbyintf_saved
($et_index
) 1
6460 verbose
"check_effective_target_vect_call_nearbyintf:\
6461 returning $et_vect_call_nearbyintf_saved
($et_index
)" 2
6462 return $et_vect_call_nearbyintf_saved
($et_index
)
6465 #
Return 1 if the target supports vector
round calls.
6467 proc check_effective_target_vect_call_round
{ } {
6468 global et_vect_call_round_saved
6471 if [info exists et_vect_call_round_saved
($et_index
)] {
6472 verbose
"check_effective_target_vect_call_round: using cached result" 2
6474 set et_vect_call_round_saved
($et_index
) 0
6475 if { [istarget aarch64
*-*-*] } {
6476 set et_vect_call_round_saved
($et_index
) 1
6480 verbose
"check_effective_target_vect_call_round:\
6481 returning $et_vect_call_round_saved
($et_index
)" 2
6482 return $et_vect_call_round_saved
($et_index
)
6485 #
Return 1 if the target supports vector roundf calls.
6487 proc check_effective_target_vect_call_roundf
{ } {
6488 global et_vect_call_roundf_saved
6491 if [info exists et_vect_call_roundf_saved
($et_index
)] {
6492 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
6494 set et_vect_call_roundf_saved
($et_index
) 0
6495 if { [istarget aarch64
*-*-*] } {
6496 set et_vect_call_roundf_saved
($et_index
) 1
6500 verbose
"check_effective_target_vect_call_roundf:\
6501 returning $et_vect_call_roundf_saved
($et_index
)" 2
6502 return $et_vect_call_roundf_saved
($et_index
)
6505 #
Return 1 if the target supports section
-anchors
6507 proc check_effective_target_section_anchors
{ } {
6508 global et_section_anchors_saved
6510 if [info exists et_section_anchors_saved
] {
6511 verbose
"check_effective_target_section_anchors: using cached result" 2
6513 set et_section_anchors_saved
0
6514 if { [istarget powerpc
*-*-*]
6515 ||
[istarget arm
*-*-*]
6516 ||
[istarget aarch64
*-*-*] } {
6517 set et_section_anchors_saved
1
6521 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6522 return $et_section_anchors_saved
6525 #
Return 1 if the target supports atomic operations
on "int_128" values.
6527 proc check_effective_target_sync_int_128
{ } {
6528 if { [istarget spu
-*-*] } {
6535 #
Return 1 if the target supports atomic operations
on "int_128" values
6536 # and can
execute them.
6537 # This requires support
for both compare
-and
-swap and true atomic loads.
6539 proc check_effective_target_sync_int_128_runtime
{ } {
6540 if { [istarget spu
-*-*] } {
6547 #
Return 1 if the target supports atomic operations
on "long long".
6549 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
6550 # Note
: 32bit s390 targets require
-mzarch in dg
-options.
6552 proc check_effective_target_sync_long_long
{ } {
6553 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6554 ||
[istarget aarch64
*-*-*]
6555 ||
[istarget arm
*-*-*]
6556 ||
[istarget alpha
*-*-*]
6557 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
])
6558 ||
[istarget s390
*-*-*]
6559 ||
[istarget spu
-*-*] } {
6566 #
Return 1 if the target supports atomic operations
on "long long"
6567 # and can
execute them.
6569 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
6571 proc check_effective_target_sync_long_long_runtime
{ } {
6572 if { (([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
6573 && [check_cached_effective_target sync_long_long_available
{
6574 check_runtime_nocache sync_long_long_available
{
6578 unsigned
int eax
, ebx
, ecx
, edx
;
6579 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
6580 return !(edx
& bit_CMPXCHG8B
);
6585 ||
[istarget aarch64
*-*-*]
6586 ||
([istarget arm
*-*-linux
-*]
6587 && [check_runtime sync_longlong_runtime
{
6593 if (sizeof
(long long
) != 8)
6596 /* Just check
for native
;
6597 checking
for kernel fallback is tricky.
*/
6598 asm volatile
("ldrexd r0,r1, [%0]"
6599 : : "r" (&l1) : "r0", "r1");
6603 ||
[istarget alpha
*-*-*]
6604 ||
([istarget sparc
*-*-*]
6605 && [check_effective_target_lp64
]
6606 && [check_effective_target_ultrasparc_hw
])
6607 ||
[istarget spu
-*-*]
6608 ||
([istarget powerpc
*-*-*] && [check_effective_target_lp64
]) } {
6615 #
Return 1 if the target supports byte swap instructions.
6617 proc check_effective_target_bswap
{ } {
6618 global et_bswap_saved
6620 if [info exists et_bswap_saved
] {
6621 verbose
"check_effective_target_bswap: using cached result" 2
6623 set et_bswap_saved
0
6624 if { [istarget aarch64
*-*-*]
6625 ||
[istarget alpha
*-*-*]
6626 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6627 ||
[istarget m68k
-*-*]
6628 ||
[istarget powerpc
*-*-*]
6629 ||
[istarget rs6000
-*-*]
6630 ||
[istarget s390
*-*-*]
6631 ||
([istarget arm
*-*-*]
6632 && [check_no_compiler_messages_nocache arm_v6_or_later object
{
6634 #error not armv6 or later
6638 set et_bswap_saved
1
6642 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
6643 return $et_bswap_saved
6646 #
Return 1 if the target supports
16-bit byte swap instructions.
6648 proc check_effective_target_bswap16
{ } {
6649 global et_bswap16_saved
6651 if [info exists et_bswap16_saved
] {
6652 verbose
"check_effective_target_bswap16: using cached result" 2
6654 set et_bswap16_saved
0
6655 if { [is
-effective
-target bswap
]
6656 && ![istarget alpha
*-*-*]
6657 && !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
6658 set et_bswap16_saved
1
6662 verbose
"check_effective_target_bswap16: returning $et_bswap16_saved" 2
6663 return $et_bswap16_saved
6666 #
Return 1 if the target supports
32-bit byte swap instructions.
6668 proc check_effective_target_bswap32
{ } {
6669 global et_bswap32_saved
6671 if [info exists et_bswap32_saved
] {
6672 verbose
"check_effective_target_bswap32: using cached result" 2
6674 set et_bswap32_saved
0
6675 if { [is
-effective
-target bswap
] } {
6676 set et_bswap32_saved
1
6680 verbose
"check_effective_target_bswap32: returning $et_bswap32_saved" 2
6681 return $et_bswap32_saved
6684 #
Return 1 if the target supports
64-bit byte swap instructions.
6686 # Note
: 32bit s390 targets require
-mzarch in dg
-options.
6688 proc check_effective_target_bswap64
{ } {
6689 global et_bswap64_saved
6691 # expand_unop can expand
64-bit byte swap
on 32-bit targets
6692 if { [is
-effective
-target bswap
] && [is
-effective
-target int32plus
] } {
6698 #
Return 1 if the target supports atomic operations
on "int" and "long".
6700 proc check_effective_target_sync_int_long
{ } {
6701 global et_sync_int_long_saved
6703 if [info exists et_sync_int_long_saved
] {
6704 verbose
"check_effective_target_sync_int_long: using cached result" 2
6706 set et_sync_int_long_saved
0
6707 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
6708 # load-reserved/store-conditional instructions.
6709 if { [istarget ia64-*-*]
6710 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6711 || [istarget aarch64*-*-*]
6712 || [istarget alpha*-*-*]
6713 || [istarget arm*-*-linux-*]
6714 || ([istarget arm*-*-*]
6715 && [check_effective_target_arm_acq_rel])
6716 || [istarget bfin*-*linux*]
6717 || [istarget hppa*-*linux*]
6718 || [istarget s390*-*-*]
6719 || [istarget powerpc*-*-*]
6720 || [istarget crisv32-*-*] || [istarget cris-*-*]
6721 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6722 || [istarget spu-*-*]
6723 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6724 || [check_effective_target_mips_llsc] } {
6725 set et_sync_int_long_saved 1
6729 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6730 return $et_sync_int_long_saved
6733 # Return 1 if the target supports atomic operations on "char" and "short".
6735 proc check_effective_target_sync_char_short { } {
6736 global et_sync_char_short_saved
6738 if [info exists et_sync_char_short_saved] {
6739 verbose "check_effective_target_sync_char_short: using cached result" 2
6741 set et_sync_char_short_saved 0
6742 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6743 #
load-reserved/store
-conditional instructions.
6744 if { [istarget aarch64
*-*-*]
6745 ||
[istarget ia64
-*-*]
6746 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6747 ||
[istarget alpha
*-*-*]
6748 ||
[istarget arm
*-*-linux
-*]
6749 ||
([istarget arm
*-*-*]
6750 && [check_effective_target_arm_acq_rel
])
6751 ||
[istarget hppa
*-*linux
*]
6752 ||
[istarget s390
*-*-*]
6753 ||
[istarget powerpc
*-*-*]
6754 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
6755 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
6756 ||
[istarget spu
-*-*]
6757 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
6758 ||
[check_effective_target_mips_llsc
] } {
6759 set et_sync_char_short_saved
1
6763 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6764 return $et_sync_char_short_saved
6767 #
Return 1 if the target uses a ColdFire FPU.
6769 proc check_effective_target_coldfire_fpu
{ } {
6770 return [check_no_compiler_messages coldfire_fpu assembly
{
6777 #
Return true
if this is a uClibc target.
6779 proc check_effective_target_uclibc
{} {
6780 return [check_no_compiler_messages uclibc object
{
6781 #
include <features.h
>
6782 #
if !defined
(__UCLIBC__
)
6788 #
Return true
if this is a uclibc target and
if the uclibc feature
6789 # described by __$feature__ is not present.
6791 proc check_missing_uclibc_feature
{feature
} {
6792 return [check_no_compiler_messages $feature object
"
6793 #
include <features.h
>
6794 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
6800 #
Return true
if this is a Newlib target.
6802 proc check_effective_target_newlib
{} {
6803 return [check_no_compiler_messages newlib object
{
6808 # Some newlib versions don
't provide a frexpl and instead depend
6809 # on frexp to implement long double conversions in their printf-like
6810 # functions. This leads to broken results. Detect such versions here.
6812 proc check_effective_target_newlib_broken_long_double_io {} {
6813 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
6819 # Return true if this is NOT a Bionic target.
6821 proc check_effective_target_non_bionic {} {
6822 return [check_no_compiler_messages non_bionic object {
6824 #if defined (__BIONIC__)
6830 # Return true if this target has error.h header.
6832 proc check_effective_target_error_h {} {
6833 return [check_no_compiler_messages error_h object {
6838 # Return true if this target has tgmath.h header.
6840 proc check_effective_target_tgmath_h {} {
6841 return [check_no_compiler_messages tgmath_h object {
6846 # Return true if target's libc supports complex functions.
6848 proc check_effective_target_libc_has_complex_functions
{} {
6849 return [check_no_compiler_messages libc_has_complex_functions object
{
6850 #
include <complex.h
>
6855 #
(a
) an error of a few ULP is expected in string to floating
-point
6856 # conversion functions
; and
6857 #
(b
) overflow is not always detected correctly by those functions.
6859 proc check_effective_target_lax_strtofp
{} {
6860 # By default
, assume that all uClibc targets suffer from this.
6861 return [check_effective_target_uclibc
]
6864 #
Return 1 if this is a target
for which wcsftime is a dummy
6865 # function that always returns
0.
6867 proc check_effective_target_dummy_wcsftime
{} {
6868 # By default
, assume that all uClibc targets suffer from this.
6869 return [check_effective_target_uclibc
]
6872 #
Return 1 if constructors with initialization priority arguments are
6873 # supposed
on this target.
6875 proc check_effective_target_init_priority
{} {
6876 return [check_no_compiler_messages init_priority assembly
"
6877 void f
() __attribute__
((constructor
(1000)));
6882 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
6883 # This can be used with
any check_
* proc that takes no
argument and
6884 # returns only
1 or
0. It could be used with check_
* procs that take
6885 # arguments with keywords that pass particular arguments.
6887 proc is
-effective
-target
{ arg } {
6890 if { ![info exists et_index
] } {
6891 # Initialize the effective target index that is used in some
6892 # check_effective_target_
* procs.
6895 if { [info procs check_effective_target_$
{arg}] != [list
] } {
6896 set selected
[check_effective_target_$
{arg}]
6899 "vmx_hw" { set selected [check_vmx_hw_available] }
6900 "vsx_hw" { set selected [check_vsx_hw_available] }
6901 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6902 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6903 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6904 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6905 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6906 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6907 "dfp_hw" { set selected [check_dfp_hw_available] }
6908 "htm_hw" { set selected [check_htm_hw_available] }
6909 "named_sections" { set selected [check_named_sections_available] }
6910 "gc_sections" { set selected [check_gc_sections_available] }
6911 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6912 default
{ error
"unknown effective target keyword `$arg'" }
6915 verbose
"is-effective-target: $arg $selected" 2
6919 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
6921 proc is
-effective
-target
-keyword
{ arg } {
6922 if { [info procs check_effective_target_$
{arg}] != [list
] } {
6925 # These have different names
for their check_
* procs.
6927 "vmx_hw" { return 1 }
6928 "vsx_hw" { return 1 }
6929 "p8vector_hw" { return 1 }
6930 "p9vector_hw" { return 1 }
6931 "p9modulo_hw" { return 1 }
6932 "ppc_float128_sw" { return 1 }
6933 "ppc_float128_hw" { return 1 }
6934 "ppc_recip_hw" { return 1 }
6935 "dfp_hw" { return 1 }
6936 "htm_hw" { return 1 }
6937 "named_sections" { return 1 }
6938 "gc_sections" { return 1 }
6939 "cxa_atexit" { return 1 }
6940 default
{ return 0 }
6945 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
6946 # indicate what target is currently being processed. This is
for
6947 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
6950 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
6951 global dg
-do-what
-default
6952 global EFFECTIVE_TARGETS
6955 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
6956 foreach target $EFFECTIVE_TARGETS
{
6957 set target_flags $flags
6958 set dg
-do-what
-default
compile
6959 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
6960 if { [info procs add_options_for_$
{target
}] != [list
] } {
6961 set target_flags
[add_options_for_$
{target
} "$flags"]
6963 if { [info procs check_effective_target_$
{target
}_runtime
]
6964 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
6965 set dg
-do-what
-default run
6967 $runtest $testcases $target_flags $
{default
-extra
-flags
}
6971 $runtest $testcases $flags $
{default
-extra
-flags
}
6975 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6976 # et_index
, 0 otherwise.
6978 proc et
-is
-effective
-target
{ target
} {
6979 global EFFECTIVE_TARGETS
6982 if { [llength $EFFECTIVE_TARGETS
] > $et_index
6983 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
6989 #
Return 1 if target default to short enums
6991 proc check_effective_target_short_enums
{ } {
6992 return [check_no_compiler_messages short_enums assembly
{
6994 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
6998 #
Return 1 if target supports merging string constants at link time.
7000 proc check_effective_target_string_merging
{ } {
7001 return [check_no_messages_and_pattern string_merging \
7002 "rodata\\.str" assembly {
7003 const char
*var
= "String";
7007 #
Return 1 if target has the basic signed and unsigned types in
7008 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7009 # working
<stdint.h
> for all targets.
7011 proc check_effective_target_stdint_types
{ } {
7012 return [check_no_compiler_messages stdint_types assembly
{
7014 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7015 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7019 #
Return 1 if target has the basic signed and unsigned types in
7020 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7021 # these types agree with those in the header, as some systems have
7022 # only <inttypes.h>.
7024 proc check_effective_target_inttypes_types { } {
7025 return [check_no_compiler_messages inttypes_types assembly {
7026 #include <inttypes.h>
7027 int8_t a; int16_t b; int32_t c; int64_t d;
7028 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7032 # Return 1 if programs are intended to be run on a simulator
7033 # (i.e. slowly) rather than hardware (i.e. fast).
7035 proc check_effective_target_simulator { } {
7037 # All "src/sim" simulators set this one.
7038 if [board_info target exists is_simulator] {
7039 return [board_info target is_simulator]
7042 # The "sid" simulators don't
set that one
, but at least they
set
7044 if [board_info target
exists slow_simulator
] {
7045 return [board_info target slow_simulator
]
7051 #
Return 1 if programs are intended to be run
on hardware rather than
7054 proc check_effective_target_hw
{ } {
7056 # All
"src/sim" simulators set this one.
7057 if [board_info target
exists is_simulator
] {
7058 if [board_info target is_simulator
] {
7065 # The
"sid" simulators don't set that one, but at least they set
7067 if [board_info target
exists slow_simulator
] {
7068 if [board_info target slow_simulator
] {
7078 #
Return 1 if the target is a VxWorks kernel.
7080 proc check_effective_target_vxworks_kernel
{ } {
7081 return [check_no_compiler_messages vxworks_kernel assembly
{
7082 #
if !defined __vxworks || defined __RTP__
7088 #
Return 1 if the target is a VxWorks RTP.
7090 proc check_effective_target_vxworks_rtp
{ } {
7091 return [check_no_compiler_messages vxworks_rtp assembly
{
7092 #
if !defined __vxworks ||
!defined __RTP__
7098 #
Return 1 if the target is expected to provide wide character support.
7100 proc check_effective_target_wchar
{ } {
7101 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7104 return [check_no_compiler_messages wchar assembly
{
7109 #
Return 1 if the target has
<pthread.h
>.
7111 proc check_effective_target_pthread_h
{ } {
7112 return [check_no_compiler_messages pthread_h assembly
{
7113 #
include <pthread.h
>
7117 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7118 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7119 # chsize. We test
for a trivially functional truncation
; no stubs.
7120 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7121 # different function to be used.
7123 proc check_effective_target_fd_truncate { } {
7125 #define _FILE_OFFSET_BITS 64
7132 FILE *f = fopen ("tst.tmp", "wb");
7134 const char t[] = "test writing more than ten characters";
7138 write (fd, t, sizeof (t) - 1);
7140 if (ftruncate (fd, 10) != 0)
7149 f = fopen ("tst.tmp", "rb");
7150 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7158 if { [check_runtime ftruncate $prog] } {
7162 regsub "ftruncate" $prog "chsize" prog
7163 return [check_runtime chsize $prog]
7166 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7168 proc add_options_for_c99_runtime { flags } {
7169 if { [istarget *-*-solaris2*] } {
7170 return "$flags -std=c99"
7172 if { [istarget powerpc-*-darwin*] } {
7173 return "$flags -mmacosx-version-min=10.3"
7178 # Add to FLAGS all the target-specific flags needed to enable
7179 # full IEEE compliance mode.
7181 proc add_options_for_ieee { flags } {
7182 if { [istarget alpha*-*-*]
7183 || [istarget sh*-*-*] } {
7184 return "$flags -mieee"
7186 if { [istarget rx-*-*] } {
7187 return "$flags -mnofpu"
7192 if {![info exists flags_to_postpone]} {
7193 set flags_to_postpone ""
7196 # Add to FLAGS the flags needed to enable functions to bind locally
7197 # when using pic/PIC passes in the testsuite.
7198 proc add_options_for_bind_pic_locally { flags } {
7199 global flags_to_postpone
7201 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7202 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7203 # order to make sure that the multilib_flags doesn't override this.
7205 if {[check_no_compiler_messages using_pic2 assembly
{
7210 set flags_to_postpone
"-fPIE"
7213 if {[check_no_compiler_messages using_pic1 assembly
{
7218 set flags_to_postpone
"-fpie"
7224 # Add to FLAGS the flags needed to enable
64-bit vectors.
7226 proc add_options_for_double_vectors
{ flags
} {
7227 if [is
-effective
-target arm_neon_ok
] {
7228 return "$flags -mvectorize-with-neon-double"
7234 #
Return 1 if the target provides a full C99 runtime.
7236 proc check_effective_target_c99_runtime
{ } {
7237 return [check_cached_effective_target c99_runtime
{
7240 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7241 set contents
[read $file
]
7244 #ifndef HAVE_C99_RUNTIME
7245 #error
!HAVE_C99_RUNTIME
7248 check_no_compiler_messages_nocache c99_runtime assembly \
7249 $contents
[add_options_for_c99_runtime
""]
7253 #
Return 1 if target wchar_t is at least
4 bytes.
7255 proc check_effective_target_4byte_wchar_t
{ } {
7256 return [check_no_compiler_messages
4byte_wchar_t object
{
7257 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7261 #
Return 1 if the target supports automatic stack alignment.
7263 proc check_effective_target_automatic_stack_alignment
{ } {
7264 # Ordinarily x86 supports automatic stack alignment ...
7265 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
7266 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
7267 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
7268 return [check_effective_target_ilp32];
7275 # Return true if we are compiling for AVX target.
7277 proc check_avx_available { } {
7278 if { [check_no_compiler_messages avx_available assembly {
7288 # Return true if 32- and 16-bytes vectors are available.
7290 proc check_effective_target_vect_sizes_32B_16B { } {
7291 if { [check_avx_available] && ![check_prefer_avx128] } {
7298 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7301 proc check_prefer_avx128 { } {
7302 if ![check_avx_available] {
7305 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7306 float a[1024],b[1024],c[1024];
7307 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7308 } "-O2 -ftree-vectorize"]
7312 # Return 1 if avx512f instructions can be compiled.
7314 proc check_effective_target_avx512f { } {
7315 return [check_no_compiler_messages avx512f object {
7316 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7318 __m512d _mm512_add (__m512d a)
7320 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7325 # Return 1 if avx instructions can be compiled.
7327 proc check_effective_target_avx { } {
7328 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7331 return [check_no_compiler_messages avx object {
7332 void _mm256_zeroall (void)
7334 __builtin_ia32_vzeroall ();
7339 # Return 1 if avx2 instructions can be compiled.
7340 proc check_effective_target_avx2 { } {
7341 return [check_no_compiler_messages avx2 object {
7342 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7344 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7346 return __builtin_ia32_andnotsi256 (__X, __Y);
7351 # Return 1 if sse instructions can be compiled.
7352 proc check_effective_target_sse { } {
7353 return [check_no_compiler_messages sse object {
7356 __builtin_ia32_stmxcsr ();
7362 # Return 1 if sse2 instructions can be compiled.
7363 proc check_effective_target_sse2 { } {
7364 return [check_no_compiler_messages sse2 object {
7365 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7367 __m128i _mm_srli_si128 (__m128i __A, int __N)
7369 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7374 # Return 1 if sse4.1 instructions can be compiled.
7375 proc check_effective_target_sse4 { } {
7376 return [check_no_compiler_messages sse4.1 object {
7377 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7378 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7380 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7382 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7388 # Return 1 if F16C instructions can be compiled.
7390 proc check_effective_target_f16c { } {
7391 return [check_no_compiler_messages f16c object {
7392 #include "immintrin.h"
7394 foo (unsigned short val)
7396 return _cvtsh_ss (val);
7401 # Return 1 if C wchar_t type is compatible with char16_t.
7403 proc check_effective_target_wchar_t_char16_t_compatible { } {
7404 return [check_no_compiler_messages wchar_t_char16_t object {
7406 __CHAR16_TYPE__ *p16 = &wc;
7407 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7411 # Return 1 if C wchar_t type is compatible with char32_t.
7413 proc check_effective_target_wchar_t_char32_t_compatible { } {
7414 return [check_no_compiler_messages wchar_t_char32_t object {
7416 __CHAR32_TYPE__ *p32 = &wc;
7417 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7421 # Return 1 if pow10 function exists.
7423 proc check_effective_target_pow10 { } {
7424 return [check_runtime pow10 {
7434 # Return 1 if frexpl function exists.
7436 proc check_effective_target_frexpl { } {
7437 return [check_runtime frexpl {
7442 x = frexpl (5.0, &y);
7449 # Return 1 if issignaling function exists.
7450 proc check_effective_target_issignaling {} {
7451 return [check_runtime issignaling {
7456 return issignaling (0.0);
7461 # Return 1 if current options generate DFP instructions, 0 otherwise.
7462 proc check_effective_target_hard_dfp {} {
7463 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7464 typedef float d64 __attribute__((mode(DD)));
7466 void foo (void) { z = x + y; }
7470 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7471 # for strchr etc. functions.
7473 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7474 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7477 #if !defined(__cplusplus) \
7478 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7479 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7480 ISO C++ correct string.h and wchar.h protos not supported.
7487 # Return 1 if GNU as is used.
7489 proc check_effective_target_gas { } {
7490 global use_gas_saved
7493 if {![info exists use_gas_saved]} {
7494 # Check if the as used by gcc is GNU as.
7495 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7496 # Provide /dev/null as input, otherwise gas times out reading from
7498 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7499 set as_output [lindex $status 1]
7500 if { [ string first "GNU" $as_output ] >= 0 } {
7506 return $use_gas_saved
7509 # Return 1 if GNU ld is used.
7511 proc check_effective_target_gld { } {
7512 global use_gld_saved
7515 if {![info exists use_gld_saved]} {
7516 # Check if the ld used by gcc is GNU ld.
7517 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7518 set status [remote_exec host "$gcc_ld" "--version"]
7519 set ld_output [lindex $status 1]
7520 if { [ string first "GNU" $ld_output ] >= 0 } {
7526 return $use_gld_saved
7529 # Return 1 if the compiler has been configure with link-time optimization
7532 proc check_effective_target_lto { } {
7533 if { [istarget nvptx-*-*] } {
7536 return [check_no_compiler_messages lto object {
7541 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7543 proc check_effective_target_maybe_x32 { } {
7544 return [check_no_compiler_messages maybe_x32 object {
7546 } "-mx32 -maddress-mode=short"]
7549 # Return 1 if this target supports the -fsplit-stack option, 0
7552 proc check_effective_target_split_stack {} {
7553 return [check_no_compiler_messages split_stack object {
7558 # Return 1 if this target supports the -masm=intel option, 0
7561 proc check_effective_target_masm_intel {} {
7562 return [check_no_compiler_messages masm_intel object {
7563 extern void abort (void);
7567 # Return 1 if the language for the compiler under test is C.
7569 proc check_effective_target_c { } {
7571 if [string match $tool "gcc"] {
7577 # Return 1 if the language for the compiler under test is C++.
7579 proc check_effective_target_c++ { } {
7581 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7587 set cxx_default "c++14"
7588 # Check whether the current active language standard supports the features
7589 # of C++11/C++14 by checking for the presence of one of the -std flags.
7590 # This assumes that the default for the compiler is $cxx_default, and that
7591 # there will never be multiple -std= arguments on the command line.
7592 proc check_effective_target_c++11_only { } {
7594 if ![check_effective_target_c++] {
7597 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7600 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7605 proc check_effective_target_c++11 { } {
7606 if [check_effective_target_c++11_only] {
7609 return [check_effective_target_c++14]
7611 proc check_effective_target_c++11_down { } {
7612 if ![check_effective_target_c++] {
7615 return [expr ![check_effective_target_c++14] ]
7618 proc check_effective_target_c++14_only { } {
7620 if ![check_effective_target_c++] {
7623 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7626 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7632 proc check_effective_target_c++14 { } {
7633 if [check_effective_target_c++14_only] {
7636 return [check_effective_target_c++1z]
7638 proc check_effective_target_c++14_down { } {
7639 if ![check_effective_target_c++] {
7642 return [expr ![check_effective_target_c++1z] ]
7645 proc check_effective_target_c++98_only { } {
7647 if ![check_effective_target_c++] {
7650 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7653 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7659 proc check_effective_target_c++1z_only { } {
7661 if ![check_effective_target_c++] {
7664 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7667 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7672 proc check_effective_target_c++1z { } {
7673 return [check_effective_target_c++1z_only]
7676 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7677 proc check_effective_target_concepts { } {
7678 return [check-flags { "" { } { -fconcepts } }]
7681 # Return 1 if expensive testcases should be run.
7683 proc check_effective_target_run_expensive_tests { } {
7684 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7690 # Returns 1 if "mempcpy" is available on the target system.
7692 proc check_effective_target_mempcpy {} {
7693 return [check_function_available "mempcpy"]
7696 # Returns 1 if "stpcpy" is available on the target system.
7698 proc check_effective_target_stpcpy {} {
7699 return [check_function_available "stpcpy"]
7702 # Check whether the vectorizer tests are supported by the target and
7703 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7704 # If a port wants to execute the tests more than once it should append
7705 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7706 # will be added by a call to add_options_for_<target>.
7707 # Set dg-do-what-default to either compile or run, depending on target
7708 # capabilities. Do not set this if the supported target is appended to
7709 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7710 # automatically. Return the number of effective targets if vectorizer tests
7711 # are supported, 0 otherwise.
7713 proc check_vect_support_and_set_flags { } {
7714 global DEFAULT_VECTCFLAGS
7715 global dg-do-what-default
7716 global EFFECTIVE_TARGETS
7718 if [istarget powerpc-*paired*] {
7719 lappend DEFAULT_VECTCFLAGS "-mpaired"
7720 if [check_750cl_hw_available] {
7721 set dg-do-what-default run
7723 set dg-do-what-default compile
7725 } elseif [istarget powerpc*-*-*] {
7726 # Skip targets not supporting -maltivec.
7727 if ![is-effective-target powerpc_altivec_ok] {
7731 lappend DEFAULT_VECTCFLAGS "-maltivec"
7732 if [check_p9vector_hw_available] {
7733 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7734 } elseif [check_p8vector_hw_available] {
7735 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7736 } elseif [check_vsx_hw_available] {
7737 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7740 if [check_vmx_hw_available] {
7741 set dg-do-what-default run
7743 if [is-effective-target ilp32] {
7744 # Specify a cpu that supports VMX for compile-only tests.
7745 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7747 set dg-do-what-default compile
7749 } elseif { [istarget spu-*-*] } {
7750 set dg-do-what-default run
7751 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7752 lappend DEFAULT_VECTCFLAGS "-msse2"
7753 if { [check_effective_target_sse2_runtime] } {
7754 set dg-do-what-default run
7756 set dg-do-what-default compile
7758 } elseif { [istarget mips*-*-*]
7759 && [check_effective_target_nomips16] } {
7760 if { [check_effective_target_mpaired_single] } {
7761 lappend EFFECTIVE_TARGETS mpaired_single
7763 if { [check_effective_target_mips_loongson] } {
7764 lappend EFFECTIVE_TARGETS mips_loongson
7766 if { [check_effective_target_mips_msa] } {
7767 lappend EFFECTIVE_TARGETS mips_msa
7769 return [llength $EFFECTIVE_TARGETS]
7770 } elseif [istarget sparc*-*-*] {
7771 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7772 if [check_effective_target_ultrasparc_hw] {
7773 set dg-do-what-default run
7775 set dg-do-what-default compile
7777 } elseif [istarget alpha*-*-*] {
7778 # Alpha's vectorization capabilities are extremely limited.
7779 # It
's more effort than its worth disabling all of the tests
7780 # that it cannot pass. But if you actually want to see what
7781 # does work, command out the return.
7784 lappend DEFAULT_VECTCFLAGS "-mmax"
7785 if [check_alpha_max_hw_available] {
7786 set dg-do-what-default run
7788 set dg-do-what-default compile
7790 } elseif [istarget ia64-*-*] {
7791 set dg-do-what-default run
7792 } elseif [is-effective-target arm_neon_ok] {
7793 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7794 # NEON does not support denormals, so is not used for vectorization by
7795 # default to avoid loss of precision. We must pass -ffast-math to test
7796 # vectorization of float operations.
7797 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7798 if [is-effective-target arm_neon_hw] {
7799 set dg-do-what-default run
7801 set dg-do-what-default compile
7803 } elseif [istarget "aarch64*-*-*"] {
7804 set dg-do-what-default run
7812 # Return 1 if the target does *not* require strict alignment.
7814 proc check_effective_target_non_strict_align {} {
7816 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7817 # are interfaces defined for misaligned access and thus
7818 # depending on the architecture levels unaligned access is
7820 if [istarget "arm*-*-*"] {
7821 return [check_effective_target_arm_unaligned]
7824 return [check_no_compiler_messages non_strict_align assembly {
7826 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7828 void foo(void) { z = (c *) y; }
7832 # Return 1 if the target has <ucontext.h>.
7834 proc check_effective_target_ucontext_h { } {
7835 return [check_no_compiler_messages ucontext_h assembly {
7836 #include <ucontext.h>
7840 proc check_effective_target_aarch64_tiny { } {
7841 if { [istarget aarch64*-*-*] } {
7842 return [check_no_compiler_messages aarch64_tiny object {
7843 #ifdef __AARCH64_CMODEL_TINY__
7846 #error target not AArch64 tiny code model
7854 # Create functions to check that the AArch64 assembler supports the
7855 # various architecture extensions via the .arch_extension pseudo-op.
7857 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7858 eval [string map [list FUNC $aarch64_ext] {
7859 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7860 if { [istarget aarch64*-*-*] } {
7861 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7862 __asm__ (".arch_extension FUNC");
7863 } "-march=armv8-a+FUNC"]
7871 proc check_effective_target_aarch64_small { } {
7872 if { [istarget aarch64*-*-*] } {
7873 return [check_no_compiler_messages aarch64_small object {
7874 #ifdef __AARCH64_CMODEL_SMALL__
7877 #error target not AArch64 small code model
7885 proc check_effective_target_aarch64_large { } {
7886 if { [istarget aarch64*-*-*] } {
7887 return [check_no_compiler_messages aarch64_large object {
7888 #ifdef __AARCH64_CMODEL_LARGE__
7891 #error target not AArch64 large code model
7900 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
7901 # register set, instruction set, addressing capabilities and ABI.
7903 proc check_effective_target_avr_tiny { } {
7904 if { [istarget avr*-*-*] } {
7905 return [check_no_compiler_messages avr_tiny object {
7909 #error target not a reduced AVR Tiny core
7917 # Return 1 if <fenv.h> is available with all the standard IEEE
7918 # exceptions and floating-point exceptions are raised by arithmetic
7919 # operations. (If the target requires special options for "inexact"
7920 # exceptions, those need to be specified in the testcases.)
7922 proc check_effective_target_fenv_exceptions {} {
7923 return [check_runtime fenv_exceptions {
7926 #ifndef FE_DIVBYZERO
7927 # error Missing FE_DIVBYZERO
7930 # error Missing FE_INEXACT
7933 # error Missing FE_INVALID
7936 # error Missing FE_OVERFLOW
7938 #ifndef FE_UNDERFLOW
7939 # error Missing FE_UNDERFLOW
7941 volatile float a = 0.0f, r;
7946 if (fetestexcept (FE_INVALID))
7951 } [add_options_for_ieee "-std=gnu99"]]
7954 proc check_effective_target_tiny {} {
7955 global et_target_tiny_saved
7957 if [info exists et_target_tiny_saved] {
7958 verbose "check_effective_target_tiny: using cached result" 2
7960 set et_target_tiny_saved 0
7961 if { [istarget aarch64*-*-*]
7962 && [check_effective_target_aarch64_tiny] } {
7963 set et_target_tiny_saved 1
7965 if { [istarget avr-*-*]
7966 && [check_effective_target_avr_tiny] } {
7967 set et_target_tiny_saved 1
7971 return $et_target_tiny_saved
7974 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7976 proc check_effective_target_logical_op_short_circuit {} {
7977 if { [istarget mips*-*-*]
7978 || [istarget arc*-*-*]
7979 || [istarget avr*-*-*]
7980 || [istarget crisv32-*-*] || [istarget cris-*-*]
7981 || [istarget mmix-*-*]
7982 || [istarget s390*-*-*]
7983 || [istarget powerpc*-*-*]
7984 || [istarget nios2*-*-*]
7985 || [istarget riscv*-*-*]
7986 || [istarget visium-*-*]
7987 || [check_effective_target_arm_cortex_m] } {
7993 # Record that dg-final test TEST requires convential compilation.
7995 proc force_conventional_output_for { test } {
7996 if { [info proc $test] == "" } {
7997 perror "$test does not exist"
8000 proc ${test}_required_options {} {
8001 global gcc_force_conventional_output
8002 return $gcc_force_conventional_output
8006 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8007 # otherwise. Cache the result.
8009 proc check_effective_target_pie_copyreloc { } {
8010 global pie_copyreloc_available_saved
8012 global GCC_UNDER_TEST
8014 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8018 # Need auto-host.h to check linker support.
8019 if { ![file exists ../../auto-host.h ] } {
8023 if [info exists pie_copyreloc_available_saved] {
8024 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8026 # Set up and compile to see if linker supports PIE with copy
8027 # reloc. Include the current process ID in the file names to
8028 # prevent conflicts with invocations for multiple testsuites.
8033 set f [open $src "w"]
8034 puts $f "#include \"../../auto-host.h\""
8035 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8036 puts $f "# error Linker does not support PIE with copy reloc."
8040 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8041 set lines [${tool}_target_compile $src $obj object ""]
8046 if [string match "" $lines] then {
8047 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8048 set pie_copyreloc_available_saved 1
8050 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8051 set pie_copyreloc_available_saved 0
8055 return $pie_copyreloc_available_saved
8058 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8059 # otherwise. Cache the result.
8061 proc check_effective_target_got32x_reloc { } {
8062 global got32x_reloc_available_saved
8064 global GCC_UNDER_TEST
8066 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8070 # Need auto-host.h to check linker support.
8071 if { ![file exists ../../auto-host.h ] } {
8075 if [info exists got32x_reloc_available_saved] {
8076 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8078 # Include the current process ID in the file names to prevent
8079 # conflicts with invocations for multiple testsuites.
8081 set src got32x[pid].c
8082 set obj got32x[pid].o
8084 set f [open $src "w"]
8085 puts $f "#include \"../../auto-host.h\""
8086 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8087 puts $f "# error Assembler does not support R_386_GOT32X."
8091 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8092 set lines [${tool}_target_compile $src $obj object ""]
8097 if [string match "" $lines] then {
8098 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8099 set got32x_reloc_available_saved 1
8101 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8102 set got32x_reloc_available_saved 0
8106 return $got32x_reloc_available_saved
8109 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8110 # 0 otherwise. Cache the result.
8112 proc check_effective_target_tls_get_addr_via_got { } {
8113 global tls_get_addr_via_got_available_saved
8115 global GCC_UNDER_TEST
8117 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8121 # Need auto-host.h to check linker support.
8122 if { ![file exists ../../auto-host.h ] } {
8126 if [info exists tls_get_addr_via_got_available_saved] {
8127 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8129 # Include the current process ID in the file names to prevent
8130 # conflicts with invocations for multiple testsuites.
8132 set src tls_get_addr_via_got[pid].c
8133 set obj tls_get_addr_via_got[pid].o
8135 set f [open $src "w"]
8136 puts $f "#include \"../../auto-host.h\""
8137 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8138 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8142 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8143 set lines [${tool}_target_compile $src $obj object ""]
8148 if [string match "" $lines] then {
8149 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8150 set tls_get_addr_via_got_available_saved 1
8152 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8153 set tls_get_addr_via_got_available_saved 0
8157 return $tls_get_addr_via_got_available_saved
8160 # Return 1 if the target uses comdat groups.
8162 proc check_effective_target_comdat_group {} {
8163 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8165 inline int foo () { return 1; }
8170 # Return 1 if target supports __builtin_eh_return
8171 proc check_effective_target_builtin_eh_return { } {
8172 return [check_no_compiler_messages builtin_eh_return object {
8173 void test (long l, void *p)
8175 __builtin_eh_return (l, p);
8180 # Return 1 if the target supports max reduction for vectors.
8182 proc check_effective_target_vect_max_reduc { } {
8183 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
8189 # Return 1 if there is an nvptx offload compiler.
8191 proc check_effective_target_offload_nvptx { } {
8192 return [check_no_compiler_messages offload_nvptx object {
8193 int main () {return 0;}
8194 } "-foffload=nvptx-none" ]
8197 # Return 1 if the compiler has been configured with hsa offloading.
8199 proc check_effective_target_offload_hsa { } {
8200 return [check_no_compiler_messages offload_hsa assembly {
8201 int main () {return 0;}
8205 # Return 1 if the target support -fprofile-update=atomic
8206 proc check_effective_target_profile_update_atomic {} {
8207 return [check_no_compiler_messages profile_update_atomic assembly {
8208 int main (void) { return 0; }
8209 } "-fprofile-update=atomic -fprofile-generate"]
8212 # Return 1 if vector (va - vector add) instructions are understood by
8213 # the assembler and can be executed. This also covers checking for
8214 # the VX kernel feature. A kernel without that feature does not
8215 # enable the vector facility and the following check will die with a
8217 proc check_effective_target_s390_vx { } {
8218 if ![istarget s390*-*-*] then {
8222 return [check_runtime s390_check_vx {
8225 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8228 } "-march=z13 -mzarch" ]
8231 # Same as above but for the arch12 vector enhancement facility. Test
8232 # is performed with the vector nand instruction.
8233 proc check_effective_target_s390_vxe { } {
8234 if ![istarget s390*-*-*] then {
8238 return [check_runtime s390_check_vxe {
8241 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8244 } "-march=arch12 -mzarch" ]
8247 #For versions of ARM architectures that have hardware div insn,
8248 #disable the divmod transform
8250 proc check_effective_target_arm_divmod_simode { } {
8251 return [check_no_compiler_messages arm_divmod assembly {
8252 #ifdef __ARM_ARCH_EXT_IDIV__
8259 # Return 1 if target supports divmod hardware insn or divmod libcall.
8261 proc check_effective_target_divmod { } {
8262 #TODO: Add checks for all targets that have either hardware divmod insn
8263 # or define libfunc for divmod.
8264 if { [istarget arm*-*-*]
8265 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8271 # Return 1 if target supports divmod for SImode. The reason for
8272 # separating this from check_effective_target_divmod is that
8273 # some versions of ARM architecture define div instruction
8274 # only for simode, and for these archs, we do not want to enable
8275 # divmod transform for simode.
8277 proc check_effective_target_divmod_simode { } {
8278 if { [istarget arm*-*-*] } {
8279 return [check_effective_target_arm_divmod_simode]
8282 return [check_effective_target_divmod]
8285 # Return 1 if store merging optimization is applicable for target.
8286 # Store merging is not profitable for targets like the avr which
8287 # can load/store only one byte at a time. Use int size as a proxy
8288 # for the number of bytes the target can write, and skip for targets
8289 # with a smallish (< 32) size.
8291 proc check_effective_target_store_merge { } {
8292 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8299 # Return 1 if the target supports coprocessor instructions: cdp, ldc, stc, mcr and
8301 proc check_effective_target_arm_coproc1_ok_nocache { } {
8302 if { ![istarget arm*-*-*] } {
8305 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8306 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8312 proc check_effective_target_arm_coproc1_ok { } {
8313 return [check_cached_effective_target arm_coproc1_ok \
8314 check_effective_target_arm_coproc1_ok_nocache]
8317 # Return 1 if the target supports all coprocessor instructions checked by
8318 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8319 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8320 proc check_effective_target_arm_coproc2_ok_nocache { } {
8321 if { ![check_effective_target_arm_coproc1_ok] } {
8324 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8331 proc check_effective_target_arm_coproc2_ok { } {
8332 return [check_cached_effective_target arm_coproc2_ok \
8333 check_effective_target_arm_coproc2_ok_nocache]
8336 # Return 1 if the target supports all coprocessor instructions checked by
8337 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8339 proc check_effective_target_arm_coproc3_ok_nocache { } {
8340 if { ![check_effective_target_arm_coproc2_ok] } {
8343 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8344 #if __ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__)
8350 proc check_effective_target_arm_coproc3_ok { } {
8351 return [check_cached_effective_target arm_coproc3_ok \
8352 check_effective_target_arm_coproc3_ok_nocache]
8355 # Return 1 if the target supports all coprocessor instructions checked by
8356 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
8358 proc check_effective_target_arm_coproc4_ok_nocache { } {
8359 if { ![check_effective_target_arm_coproc3_ok] } {
8362 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
8369 proc check_effective_target_arm_coproc4_ok { } {
8370 return [check_cached_effective_target arm_coproc4_ok \
8371 check_effective_target_arm_coproc4_ok_nocache]