gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
   3    2007, 2008, 2009 Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6                   Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify it under
  11 the terms of the GNU General Public License as published by the Free
  12 Software Foundation; either version 3, or (at your option) any later
  13 version.
  14
  15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  18 for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 #ifndef _S390_H
  25 #define _S390_H
  26
  27 /* Override the __fixdfdi etc. routines when building libgcc2.
  28    ??? This should be done in a cleaner way ...  */
  29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  30 #include <config/s390/fixdfdi.h>
  31 #endif
  32
  33 /* Which processor to generate code or schedule for. The cpu attribute
  34    defines a list that mirrors this list, so changes to s390.md must be
  35    made at the same time.  */
  36
  37 enum processor_type
  38 {
  39   PROCESSOR_9672_G5,
  40   PROCESSOR_9672_G6,
  41   PROCESSOR_2064_Z900,
  42   PROCESSOR_2084_Z990,
  43   PROCESSOR_2094_Z9_109,
  44   PROCESSOR_2097_Z10,
  45   PROCESSOR_max
  46 };
  47
  48 /* Optional architectural facilities supported by the processor.  */
  49
  50 enum processor_flags
  51 {
  52   PF_IEEE_FLOAT = 1,
  53   PF_ZARCH = 2,
  54   PF_LONG_DISPLACEMENT = 4,
  55   PF_EXTIMM = 8,
  56   PF_DFP = 16,
  57   PF_Z10 = 32
  58 };
  59
  60 extern enum processor_type s390_tune;
  61 extern int s390_tune_flags;
  62
  63 /* This is necessary to avoid a warning about comparing different enum
  64    types.  */
  65 #define s390_tune_attr ((enum attr_cpu)s390_tune)
  66
  67 extern enum processor_type s390_arch;
  68 extern int s390_arch_flags;
  69
  70 /* These flags indicate that the generated code should run on a cpu
  71    providing the respective hardware facility regardless of the
  72    current cpu mode (ESA or z/Architecture).  */
  73
  74 #define TARGET_CPU_IEEE_FLOAT \
  75         (s390_arch_flags & PF_IEEE_FLOAT)
  76 #define TARGET_CPU_ZARCH \
  77         (s390_arch_flags & PF_ZARCH)
  78 #define TARGET_CPU_LONG_DISPLACEMENT \
  79         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  80 #define TARGET_CPU_EXTIMM \
  81         (s390_arch_flags & PF_EXTIMM)
  82 #define TARGET_CPU_DFP \
  83         (s390_arch_flags & PF_DFP)
  84 #define TARGET_CPU_Z10 \
  85         (s390_arch_flags & PF_Z10)
  86
  87 /* These flags indicate that the generated code should run on a cpu
  88    providing the respective hardware facility when run in
  89    z/Architecture mode.  */
  90
  91 #define TARGET_LONG_DISPLACEMENT \
  92        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  93 #define TARGET_EXTIMM \
  94        (TARGET_ZARCH && TARGET_CPU_EXTIMM)
  95 #define TARGET_DFP \
  96        (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT)
  97 #define TARGET_Z10 \
  98        (TARGET_ZARCH && TARGET_CPU_Z10)
  99
 100 /* Run-time target specification.  */
 101
 102 /* Defaults for option flags defined only on some subtargets.  */
 103 #ifndef TARGET_TPF_PROFILING
 104 #define TARGET_TPF_PROFILING 0
 105 #endif
 106
 107 /* This will be overridden by OS headers.  */
 108 #define TARGET_TPF 0
 109
 110 /* Target CPU builtins.  */
 111 #define TARGET_CPU_CPP_BUILTINS()                       \
 112   do                                                    \
 113     {                                                   \
 114       builtin_assert ("cpu=s390");                      \
 115       builtin_assert ("machine=s390");                  \
 116       builtin_define ("__s390__");                      \
 117       if (TARGET_64BIT)                                 \
 118         builtin_define ("__s390x__");                   \
 119       if (TARGET_LONG_DOUBLE_128)                       \
 120         builtin_define ("__LONG_DOUBLE_128__");         \
 121     }                                                   \
 122   while (0)
 123
 124 #ifdef DEFAULT_TARGET_64BIT
 125 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP)
 126 #else
 127 #define TARGET_DEFAULT             0
 128 #endif
 129
 130 /* Support for configure-time defaults.  */
 131 #define OPTION_DEFAULT_SPECS                                    \
 132   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 133   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 134   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 135
 136 /* Defaulting rules.  */
 137 #ifdef DEFAULT_TARGET_64BIT
 138 #define DRIVER_SELF_SPECS                                       \
 139   "%{!m31:%{!m64:-m64}}",                                       \
 140   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 141   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 142 #else
 143 #define DRIVER_SELF_SPECS                                       \
 144   "%{!m31:%{!m64:-m31}}",                                       \
 145   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 146   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 147 #endif
 148
 149 /* Target version string.  Overridden by the OS header.  */
 150 #ifdef DEFAULT_TARGET_64BIT
 151 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 152 #else
 153 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 154 #endif
 155
 156 /* Hooks to override options.  */
 157 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 158 #define OVERRIDE_OPTIONS override_options ()
 159
 160 /* Frame pointer is not used for debugging.  */
 161 #define CAN_DEBUG_WITHOUT_FP
 162
 163 /* Constants needed to control the TEST DATA CLASS (TDC) instruction.  */
 164 #define S390_TDC_POSITIVE_ZERO                     (1 << 11)
 165 #define S390_TDC_NEGATIVE_ZERO                     (1 << 10)
 166 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER    (1 << 9)
 167 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER    (1 << 8)
 168 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER  (1 << 7)
 169 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER  (1 << 6)
 170 #define S390_TDC_POSITIVE_INFINITY                 (1 << 5)
 171 #define S390_TDC_NEGATIVE_INFINITY                 (1 << 4)
 172 #define S390_TDC_POSITIVE_QUIET_NAN                (1 << 3)
 173 #define S390_TDC_NEGATIVE_QUIET_NAN                (1 << 2)
 174 #define S390_TDC_POSITIVE_SIGNALING_NAN            (1 << 1)
 175 #define S390_TDC_NEGATIVE_SIGNALING_NAN            (1 << 0)
 176
 177 /* The following values are different for DFP.  */
 178 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9)
 179 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8)
 180 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER   (1 << 7)
 181 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER   (1 << 6)
 182
 183 /* For signbit, the BFP-DFP-difference makes no difference. */
 184 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
 185                           | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
 186                           | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
 187                           | S390_TDC_NEGATIVE_INFINITY \
 188                           | S390_TDC_NEGATIVE_QUIET_NAN \
 189                           | S390_TDC_NEGATIVE_SIGNALING_NAN )
 190
 191 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
 192                           | S390_TDC_NEGATIVE_INFINITY )
 193
 194 /* In libgcc2, determine target settings as compile-time constants.  */
 195 #ifdef IN_LIBGCC2
 196 #undef TARGET_64BIT
 197 #ifdef __s390x__
 198 #define TARGET_64BIT 1
 199 #else
 200 #define TARGET_64BIT 0
 201 #endif
 202 #endif
 203
 204
 205 /* Target machine storage layout.  */
 206
 207 /* Everything is big-endian.  */
 208 #define BITS_BIG_ENDIAN 1
 209 #define BYTES_BIG_ENDIAN 1
 210 #define WORDS_BIG_ENDIAN 1
 211
 212 /* Width of a word, in units (bytes).  */
 213 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 214 #ifndef IN_LIBGCC2
 215 #define MIN_UNITS_PER_WORD 4
 216 #endif
 217 #define MAX_BITS_PER_WORD 64
 218
 219 /* Function arguments and return values are promoted to word size.  */
 220 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 221 if (INTEGRAL_MODE_P (MODE) &&                           \
 222     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 223   (MODE) = Pmode;                                       \
 224           }
 225
 226 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 227 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 228
 229 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 230 #define STACK_BOUNDARY 64
 231
 232 /* Allocation boundary (in *bits*) for the code of a function.  */
 233 #define FUNCTION_BOUNDARY 32
 234
 235 /* There is no point aligning anything to a rounder boundary than this.  */
 236 #define BIGGEST_ALIGNMENT 64
 237
 238 /* Alignment of field after `int : 0' in a structure.  */
 239 #define EMPTY_FIELD_BOUNDARY 32
 240
 241 /* Alignment on even addresses for LARL instruction.  */
 242 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 243 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 244
 245 /* Alignment is not required by the hardware.  */
 246 #define STRICT_ALIGNMENT 0
 247
 248 /* Mode of stack savearea.
 249    FUNCTION is VOIDmode because calling convention maintains SP.
 250    BLOCK needs Pmode for SP.
 251    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 252 #define STACK_SAVEAREA_MODE(LEVEL)      \
 253   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 254   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 255
 256
 257 /* Type layout.  */
 258
 259 /* Sizes in bits of the source language data types.  */
 260 #define SHORT_TYPE_SIZE 16
 261 #define INT_TYPE_SIZE 32
 262 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 263 #define LONG_LONG_TYPE_SIZE 64
 264 #define FLOAT_TYPE_SIZE 32
 265 #define DOUBLE_TYPE_SIZE 64
 266 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
 267
 268 /* Define this to set long double type size to use in libgcc2.c, which can
 269    not depend on target_flags.  */
 270 #ifdef __LONG_DOUBLE_128__
 271 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
 272 #else
 273 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
 274 #endif
 275
 276 /* Work around target_flags dependency in ada/targtyps.c.  */
 277 #define WIDEST_HARDWARE_FP_SIZE 64
 278
 279 /* We use "unsigned char" as default.  */
 280 #define DEFAULT_SIGNED_CHAR 0
 281
 282
 283 /* Register usage.  */
 284
 285 /* We have 16 general purpose registers (registers 0-15),
 286    and 16 floating point registers (registers 16-31).
 287    (On non-IEEE machines, we have only 4 fp registers.)
 288
 289    Amongst the general purpose registers, some are used
 290    for specific purposes:
 291    GPR 11: Hard frame pointer (if needed)
 292    GPR 12: Global offset table pointer (if needed)
 293    GPR 13: Literal pool base register
 294    GPR 14: Return address register
 295    GPR 15: Stack pointer
 296
 297    Registers 32-35 are 'fake' hard registers that do not
 298    correspond to actual hardware:
 299    Reg 32: Argument pointer
 300    Reg 33: Condition code
 301    Reg 34: Frame pointer
 302    Reg 35: Return address pointer
 303
 304    Registers 36 and 37 are mapped to access registers
 305    0 and 1, used to implement thread-local storage.  */
 306
 307 #define FIRST_PSEUDO_REGISTER 38
 308
 309 /* Standard register usage.  */
 310 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 311 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 312 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < 32)
 313 #define CC_REGNO_P(N)           ((N) == 33)
 314 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 315 #define ACCESS_REGNO_P(N)       ((N) == 36 || (N) == 37)
 316
 317 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 318 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 319 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 320 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 321 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 322 #define ACCESS_REG_P(X)         (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
 323
 324 /* Set up fixed registers and calling convention:
 325
 326    GPRs 0-5 are always call-clobbered,
 327    GPRs 6-15 are always call-saved.
 328    GPR 12 is fixed if used as GOT pointer.
 329    GPR 13 is always fixed (as literal pool pointer).
 330    GPR 14 is always fixed on S/390 machines (as return address).
 331    GPR 15 is always fixed (as stack pointer).
 332    The 'fake' hard registers are call-clobbered and fixed.
 333    The access registers are call-saved and fixed.
 334
 335    On 31-bit, FPRs 18-19 are call-clobbered;
 336    on 64-bit, FPRs 24-31 are call-clobbered.
 337    The remaining FPRs are call-saved.  */
 338
 339 #define FIXED_REGISTERS                         \
 340 { 0, 0, 0, 0,                                   \
 341   0, 0, 0, 0,                                   \
 342   0, 0, 0, 0,                                   \
 343   0, 1, 1, 1,                                   \
 344   0, 0, 0, 0,                                   \
 345   0, 0, 0, 0,                                   \
 346   0, 0, 0, 0,                                   \
 347   0, 0, 0, 0,                                   \
 348   1, 1, 1, 1,                                   \
 349   1, 1 }
 350
 351 #define CALL_USED_REGISTERS                     \
 352 { 1, 1, 1, 1,                                   \
 353   1, 1, 0, 0,                                   \
 354   0, 0, 0, 0,                                   \
 355   0, 1, 1, 1,                                   \
 356   1, 1, 1, 1,                                   \
 357   1, 1, 1, 1,                                   \
 358   1, 1, 1, 1,                                   \
 359   1, 1, 1, 1,                                   \
 360   1, 1, 1, 1,                                   \
 361   1, 1 }
 362
 363 #define CALL_REALLY_USED_REGISTERS              \
 364 { 1, 1, 1, 1,                                   \
 365   1, 1, 0, 0,                                   \
 366   0, 0, 0, 0,                                   \
 367   0, 0, 0, 0,                                   \
 368   1, 1, 1, 1,                                   \
 369   1, 1, 1, 1,                                   \
 370   1, 1, 1, 1,                                   \
 371   1, 1, 1, 1,                                   \
 372   1, 1, 1, 1,                                   \
 373   0, 0 }
 374
 375 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 376
 377 /* Preferred register allocation order.  */
 378 #define REG_ALLOC_ORDER                                         \
 379 {  1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13,            \
 380    16, 17, 18, 19, 20, 21, 22, 23,                              \
 381    24, 25, 26, 27, 28, 29, 30, 31,                              \
 382    15, 32, 33, 34, 35, 36, 37 }
 383
 384
 385 /* Fitting values into registers.  */
 386
 387 /* Integer modes <= word size fit into any GPR.
 388    Integer modes > word size fit into successive GPRs, starting with
 389    an even-numbered register.
 390    SImode and DImode fit into FPRs as well.
 391
 392    Floating point modes <= word size fit into any FPR or GPR.
 393    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 394    into any FPR, or an even-odd GPR pair.
 395    TFmode fits only into an even-odd FPR pair.
 396
 397    Complex floating point modes fit either into two FPRs, or into
 398    successive GPRs (again starting with an even number).
 399    TCmode fits only into two successive even-odd FPR pairs.
 400
 401    Condition code modes fit only into the CC register.  */
 402
 403 /* Because all registers in a class have the same size HARD_REGNO_NREGS
 404    is equivalent to CLASS_MAX_NREGS.  */
 405 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 406   s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
 407
 408 #define HARD_REGNO_MODE_OK(REGNO, MODE)         \
 409   s390_hard_regno_mode_ok ((REGNO), (MODE))
 410
 411 #define HARD_REGNO_RENAME_OK(FROM, TO)          \
 412   s390_hard_regno_rename_ok (FROM, TO)
 413
 414 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 415    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 416    == ((MODE2) == SFmode || (MODE2) == DFmode))
 417
 418 /* Maximum number of registers to represent a value of mode MODE
 419    in a register of class CLASS.  */
 420 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 421   s390_class_max_nregs ((CLASS), (MODE))
 422
 423 /* If a 4-byte value is loaded into a FPR, it is placed into the
 424    *upper* half of the register, not the lower.  Therefore, we
 425    cannot use SUBREGs to switch between modes in FP registers.
 426    Likewise for access registers, since they have only half the
 427    word size on 64-bit.  */
 428 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)                       \
 429   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                           \
 430    ? ((reg_classes_intersect_p (FP_REGS, CLASS)                         \
 431        && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8))         \
 432       || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
 433
 434 /* Register classes.  */
 435
 436 /* We use the following register classes:
 437    GENERAL_REGS     All general purpose registers
 438    ADDR_REGS        All general purpose registers except %r0
 439                     (These registers can be used in address generation)
 440    FP_REGS          All floating point registers
 441    CC_REGS          The condition code register
 442    ACCESS_REGS      The access registers
 443
 444    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 445    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 446    GENERAL_CC_REGS  Union of GENERAL_REGS and CC_REGS
 447    ADDR_CC_REGS     Union of ADDR_REGS and CC_REGS
 448
 449    NO_REGS          No registers
 450    ALL_REGS         All registers
 451
 452    Note that the 'fake' frame pointer and argument pointer registers
 453    are included amongst the address registers here.  */
 454
 455 enum reg_class
 456 {
 457   NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
 458   ADDR_CC_REGS, GENERAL_CC_REGS,
 459   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 460   ALL_REGS, LIM_REG_CLASSES
 461 };
 462 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 463
 464 #define REG_CLASS_NAMES                                                 \
 465 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS",     \
 466   "ADDR_CC_REGS", "GENERAL_CC_REGS",                                    \
 467   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 468
 469 /* Class -> register mapping.  */
 470 #define REG_CLASS_CONTENTS \
 471 {                                                       \
 472   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 473   { 0x00000000, 0x00000002 },   /* CC_REGS */           \
 474   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 475   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 476   { 0x00000000, 0x00000030 },   /* ACCESS_REGS */       \
 477   { 0x0000fffe, 0x0000000f },   /* ADDR_CC_REGS */      \
 478   { 0x0000ffff, 0x0000000f },   /* GENERAL_CC_REGS */   \
 479   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 480   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 481   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 482   { 0xffffffff, 0x0000003f },   /* ALL_REGS */          \
 483 }
 484
 485 /* The following macro defines cover classes for Integrated Register
 486    Allocator.  Cover classes is a set of non-intersected register
 487    classes covering all hard registers used for register allocation
 488    purpose.  Any move between two registers of a cover class should be
 489    cheaper than load or store of the registers.  The macro value is
 490    array of register classes with LIM_REG_CLASSES used as the end
 491    marker.  */
 492
 493 #define IRA_COVER_CLASSES                                                    \
 494 {                                                                            \
 495   GENERAL_REGS, FP_REGS, CC_REGS, ACCESS_REGS, LIM_REG_CLASSES               \
 496 }
 497
 498 /* In some case register allocation order is not enough for IRA to
 499    generate a good code.  The following macro (if defined) increases
 500    cost of REGNO for a pseudo approximately by pseudo usage frequency
 501    multiplied by the macro value.
 502
 503    We avoid usage of BASE_REGNUM by nonzero macro value because the
 504    reload can decide not to use the hard register because some
 505    constant was forced to be in memory.  */
 506 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno)       \
 507   (regno == BASE_REGNUM ? 0.0 : 0.5)
 508
 509 /* Register -> class mapping.  */
 510 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 511 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 512
 513 /* ADDR_REGS can be used as base or index register.  */
 514 #define INDEX_REG_CLASS ADDR_REGS
 515 #define BASE_REG_CLASS ADDR_REGS
 516
 517 /* Check whether REGNO is a hard register of the suitable class
 518    or a pseudo register currently allocated to one such.  */
 519 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 520     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 521       && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                        \
 522      || ADDR_REGNO_P (reg_renumber[REGNO]))
 523 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 524
 525
 526 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 527    return the class of reg to actually use.  */
 528 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 529   s390_preferred_reload_class ((X), (CLASS))
 530
 531 /* We need secondary memory to move data between GPRs and FPRs.  With
 532    DFP the ldgr lgdr instructions are available.  But these
 533    instructions do not handle GPR pairs so it is not possible for 31
 534    bit.  */
 535 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 536  ((CLASS1) != (CLASS2)                                \
 537   && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS)     \
 538   && (!TARGET_DFP || !TARGET_64BIT || GET_MODE_SIZE (MODE) != 8))
 539
 540 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 541    because the movsi and movsf patterns don't handle r/f moves.  */
 542 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 543  (GET_MODE_BITSIZE (MODE) < 32                          \
 544   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 545   : MODE)
 546
 547
 548 /* Stack layout and calling conventions.  */
 549
 550 /* Our stack grows from higher to lower addresses.  However, local variables
 551    are accessed by positive offsets, and function arguments are stored at
 552    increasing addresses.  */
 553 #define STACK_GROWS_DOWNWARD
 554 #define FRAME_GROWS_DOWNWARD 1
 555 /* #undef ARGS_GROW_DOWNWARD */
 556
 557 /* The basic stack layout looks like this: the stack pointer points
 558    to the register save area for called functions.  Above that area
 559    is the location to place outgoing arguments.  Above those follow
 560    dynamic allocations (alloca), and finally the local variables.  */
 561
 562 /* Offset from stack-pointer to first location of outgoing args.  */
 563 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 564
 565 /* Offset within stack frame to start allocating local variables at.  */
 566 #define STARTING_FRAME_OFFSET 0
 567
 568 /* Offset from the stack pointer register to an item dynamically
 569    allocated on the stack, e.g., by `alloca'.  */
 570 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
 571   (STACK_POINTER_OFFSET + crtl->outgoing_args_size)
 572
 573 /* Offset of first parameter from the argument pointer register value.
 574    We have a fake argument pointer register that points directly to
 575    the argument area.  */
 576 #define FIRST_PARM_OFFSET(FNDECL) 0
 577
 578 /* Defining this macro makes __builtin_frame_address(0) and
 579    __builtin_return_address(0) work with -fomit-frame-pointer.  */
 580 #define INITIAL_FRAME_ADDRESS_RTX                                             \
 581   (plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 582
 583 /* The return address of the current frame is retrieved
 584    from the initial value of register RETURN_REGNUM.
 585    For frames farther back, we use the stack slot where
 586    the corresponding RETURN_REGNUM register was saved.  */
 587 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                          \
 588   (TARGET_PACKED_STACK ?                                                      \
 589    plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
 590
 591 /* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of
 592    builtin_frame_address.  Otherwise arg pointer -
 593    STACK_POINTER_OFFSET would be returned for
 594    __builtin_frame_address(0) what might result in an address pointing
 595    somewhere into the middle of the local variables since the packed
 596    stack layout generally does not need all the bytes in the register
 597    save area.  */
 598 #define FRAME_ADDR_RTX(FRAME)                   \
 599   DYNAMIC_CHAIN_ADDRESS ((FRAME))
 600
 601 #define RETURN_ADDR_RTX(COUNT, FRAME)                                         \
 602   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 603
 604 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 605 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 606
 607
 608 /* Exception handling.  */
 609
 610 /* Describe calling conventions for DWARF-2 exception handling.  */
 611 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 612 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 613 #define DWARF_FRAME_RETURN_COLUMN  14
 614
 615 /* Describe how we implement __builtin_eh_return.  */
 616 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 617 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 618
 619 /* Select a format to encode pointers in exception handling data.  */
 620 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 621   (flag_pic                                                                 \
 622     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 623    : DW_EH_PE_absptr)
 624
 625
 626 /* Frame registers.  */
 627
 628 #define STACK_POINTER_REGNUM 15
 629 #define FRAME_POINTER_REGNUM 34
 630 #define HARD_FRAME_POINTER_REGNUM 11
 631 #define ARG_POINTER_REGNUM 32
 632 #define RETURN_ADDRESS_POINTER_REGNUM 35
 633
 634 /* The static chain must be call-clobbered, but not used for
 635    function argument passing.  As register 1 is clobbered by
 636    the trampoline code, we only have one option.  */
 637 #define STATIC_CHAIN_REGNUM 0
 638
 639 /* Number of hardware registers that go into the DWARF-2 unwind info.
 640    To avoid ABI incompatibility, this number must not change even as
 641    'fake' hard registers are added or removed.  */
 642 #define DWARF_FRAME_REGISTERS 34
 643
 644
 645 /* Frame pointer and argument pointer elimination.  */
 646
 647 #define ELIMINABLE_REGS                                         \
 648 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },                \
 649  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },           \
 650  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },                  \
 651  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },             \
 652  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM },       \
 653  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },  \
 654  { BASE_REGNUM, BASE_REGNUM }}
 655
 656 #define CAN_ELIMINATE(FROM, TO) \
 657   s390_can_eliminate ((FROM), (TO))
 658
 659 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 660   (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
 661
 662
 663 /* Stack arguments.  */
 664
 665 /* We need current_function_outgoing_args to be valid.  */
 666 #define ACCUMULATE_OUTGOING_ARGS 1
 667
 668 /* Return doesn't modify the stack.  */
 669 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 670
 671
 672 /* Register arguments.  */
 673
 674 typedef struct s390_arg_structure
 675 {
 676   int gprs;                     /* gpr so far */
 677   int fprs;                     /* fpr so far */
 678 }
 679 CUMULATIVE_ARGS;
 680
 681 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 682   ((CUM).gprs=0, (CUM).fprs=0)
 683
 684 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 685   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 686
 687 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 688   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 689
 690 /* Arguments can be placed in general registers 2 to 6, or in floating
 691    point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
 692    bit.  */
 693 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 694   (N) == 16 || (N) == 17 || (TARGET_64BIT && ((N) == 18 || (N) == 19)))
 695
 696
 697 /* Scalar return values.  */
 698
 699 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 700   s390_function_value ((VALTYPE), VOIDmode)
 701
 702 #define LIBCALL_VALUE(MODE) \
 703   s390_function_value (NULL, (MODE))
 704
 705 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 706 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 707
 708
 709 /* Function entry and exit.  */
 710
 711 /* When returning from a function, the stack pointer does not matter.  */
 712 #define EXIT_IGNORE_STACK       1
 713
 714
 715 /* Profiling.  */
 716
 717 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 718   s390_function_profiler ((FILE), ((LABELNO)))
 719
 720 #define PROFILE_BEFORE_PROLOGUE 1
 721
 722
 723 /* Trampolines for nested functions.  */
 724
 725 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
 726
 727 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 728    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 729
 730 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 731    s390_trampoline_template (FILE)
 732
 733
 734 /* Addressing modes, and classification of registers for them.  */
 735
 736 /* Recognize any constant value that is a valid address.  */
 737 #define CONSTANT_ADDRESS_P(X) 0
 738
 739 /* Maximum number of registers that can appear in a valid memory address.  */
 740 #define MAX_REGS_PER_ADDRESS 2
 741
 742 /* This definition replaces the formerly used 'm' constraint with a
 743 different constraint letter in order to avoid changing semantics of
 744 the 'm' constraint when accepting new address formats in
 745 legitimate_address_p.  The constraint letter defined here must not be
 746 used in insn definitions or inline assemblies.  */
 747 #define TARGET_MEM_CONSTRAINT 'e'
 748
 749 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 750    valid memory address for an instruction.
 751    The MODE argument is the machine mode for the MEM expression
 752    that wants to use this address.  */
 753 #ifdef REG_OK_STRICT
 754 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 755 {                                                                       \
 756   if (legitimate_address_p (MODE, X, 1))                                \
 757     goto ADDR;                                                          \
 758 }
 759 #else
 760 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 761 {                                                                       \
 762   if (legitimate_address_p (MODE, X, 0))                                \
 763     goto ADDR;                                                          \
 764 }
 765 #endif
 766
 767 /* Try a machine-dependent way of reloading an illegitimate address
 768    operand.  If we find one, push the reload and jump to WIN.  This
 769    macro is used in only one place: `find_reloads_address' in reload.c.  */
 770 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 771 do {                                                                    \
 772   rtx new_rtx = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE));       \
 773   if (new_rtx)                                                          \
 774     {                                                                   \
 775       (AD) = new_rtx;                                                   \
 776       goto WIN;                                                         \
 777     }                                                                   \
 778 } while (0)
 779
 780 /* Nonzero if the constant value X is a legitimate general operand.
 781    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 782 #define LEGITIMATE_CONSTANT_P(X) \
 783      legitimate_constant_p (X)
 784
 785 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 786 #define SYMBOLIC_CONST(X)       \
 787 (GET_CODE (X) == SYMBOL_REF                                             \
 788  || GET_CODE (X) == LABEL_REF                                           \
 789  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 790
 791 #define TLS_SYMBOLIC_CONST(X)   \
 792 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 793  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 794
 795
 796 /* Condition codes.  */
 797
 798 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 799    return the mode to be used for the comparison.  */
 800 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 801
 802 /* Canonicalize a comparison from one we don't have to one we do have.  */
 803 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 804   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 805
 806 /* Relative costs of operations.  */
 807
 808 /* On s390, copy between fprs and gprs is expensive.  */
 809 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 810   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 811         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 812     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 813         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 814
 815 /* A C expression for the cost of moving data of mode M between a
 816    register and memory.  A value of 2 is the default; this cost is
 817    relative to those in `REGISTER_MOVE_COST'.  */
 818 #define MEMORY_MOVE_COST(M, C, I) 1
 819
 820 /* A C expression for the cost of a branch instruction.  A value of 1
 821    is the default; other values are interpreted relative to that.  */
 822 #define BRANCH_COST(speed_p, predictable_p) 1
 823
 824 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 825 #define SLOW_BYTE_ACCESS 1
 826
 827 /* An integer expression for the size in bits of the largest integer machine
 828    mode that should actually be used.  We allow pairs of registers.  */
 829 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 830
 831 /* The maximum number of bytes that a single instruction can move quickly
 832    between memory and registers or between two memory locations.  */
 833 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 834 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
 835 #define MAX_MOVE_MAX 16
 836
 837 /* Determine whether to use move_by_pieces or block move insn.  */
 838 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 839   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 840     || (TARGET_64BIT && (SIZE) == 8) )
 841
 842 /* Determine whether to use clear_by_pieces or block clear insn.  */
 843 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 844   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 845     || (TARGET_64BIT && (SIZE) == 8) )
 846
 847 /* This macro is used to determine whether store_by_pieces should be
 848    called to "memcpy" storage when the source is a constant string.  */
 849 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 850
 851 /* Likewise to decide whether to "memset" storage with byte values
 852    other than zero.  */
 853 #define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P (SIZE, ALIGN)
 854
 855 /* Don't perform CSE on function addresses.  */
 856 #define NO_FUNCTION_CSE
 857
 858 /* This value is used in tree-sra to decide whether it might benefical
 859    to split a struct move into several word-size moves.  For S/390
 860    only small values make sense here since struct moves are relatively
 861    cheap thanks to mvc so the small default value choosen for archs
 862    with memmove patterns should be ok.  But this value is multiplied
 863    in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
 864    here to compensate for that factor since mvc costs exactly the same
 865    on 31 and 64 bit.  */
 866 #define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4)
 867
 868
 869 /* Sections.  */
 870
 871 /* Output before read-only data.  */
 872 #define TEXT_SECTION_ASM_OP ".text"
 873
 874 /* Output before writable (initialized) data.  */
 875 #define DATA_SECTION_ASM_OP ".data"
 876
 877 /* Output before writable (uninitialized) data.  */
 878 #define BSS_SECTION_ASM_OP ".bss"
 879
 880 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 881    in where code resides.  We have to write it as asm code.  */
 882 #ifndef __s390x__
 883 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 884     asm (SECTION_OP "\n\
 885         bras\t%r2,1f\n\
 886 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 887 1:      l\t%r3,0(%r2)\n\
 888         bas\t%r14,0(%r3,%r2)\n\
 889         .previous");
 890 #endif
 891
 892
 893 /* Position independent code.  */
 894
 895 extern int flag_pic;
 896
 897 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 898
 899 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 900
 901
 902 /* Assembler file format.  */
 903
 904 /* Character to start a comment.  */
 905 #define ASM_COMMENT_START "#"
 906
 907 /* Declare an uninitialized external linkage data object.  */
 908 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 909   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 910
 911 /* Globalizing directive for a label.  */
 912 #define GLOBAL_ASM_OP ".globl "
 913
 914 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 915 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 916   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 917
 918 /* Advance the location counter by SIZE bytes.  */
 919 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 920   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 921
 922 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 923 #define LOCAL_LABEL_PREFIX "."
 924
 925 /* How to refer to registers in assembler output.  This sequence is
 926    indexed by compiler's hard-register-number (see above).  */
 927 #define REGISTER_NAMES                                                  \
 928 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 929   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 930   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 931   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 932   "%ap",  "%cc",  "%fp",  "%rp",  "%a0",  "%a1"                         \
 933 }
 934
 935 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 936 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 937 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 938
 939 /* Output machine-dependent UNSPECs in address constants.  */
 940 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 941 do {                                                    \
 942   if (!s390_output_addr_const_extra (FILE, (X)))        \
 943     goto FAIL;                                          \
 944 } while (0);
 945
 946 /* Output an element of a case-vector that is absolute.  */
 947 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 948 do {                                                                    \
 949   char buf[32];                                                         \
 950   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 951   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 952   assemble_name ((FILE), buf);                                          \
 953   fputc ('\n', (FILE));                                                 \
 954 } while (0)
 955
 956 /* Output an element of a case-vector that is relative.  */
 957 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 958 do {                                                                    \
 959   char buf[32];                                                         \
 960   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 961   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 962   assemble_name ((FILE), buf);                                          \
 963   fputc ('-', (FILE));                                                  \
 964   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 965   assemble_name ((FILE), buf);                                          \
 966   fputc ('\n', (FILE));                                                 \
 967 } while (0)
 968
 969
 970 /* Miscellaneous parameters.  */
 971
 972 /* Specify the machine mode that this machine uses for the index in the
 973    tablejump instruction.  */
 974 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
 975
 976 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 977    is done just by pretending it is already truncated.  */
 978 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 979
 980 /* Specify the machine mode that pointers have.
 981    After generation of rtl, the compiler makes no further distinction
 982    between pointers and any other objects of this machine mode.  */
 983 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
 984
 985 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
 986 #define POINTERS_EXTEND_UNSIGNED -1
 987
 988 /* A function address in a call instruction is a byte address (for
 989    indexing purposes) so give the MEM rtx a byte's mode.  */
 990 #define FUNCTION_MODE QImode
 991
 992 /* Specify the value which is used when clz operand is zero.  */
 993 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
 994
 995 /* Machine-specific symbol_ref flags.  */
 996 #define SYMBOL_FLAG_ALIGN1                (SYMBOL_FLAG_MACH_DEP << 0)
 997 #define SYMBOL_REF_ALIGN1_P(X)          \
 998   ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1))
 999 #define SYMBOL_FLAG_NOT_NATURALLY_ALIGNED (SYMBOL_FLAG_MACH_DEP << 1)
1000 #define SYMBOL_REF_NOT_NATURALLY_ALIGNED_P(X) \
1001   ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_NOT_NATURALLY_ALIGNED))
1002
1003 /* Check whether integer displacement is in range.  */
1004 #define DISP_IN_RANGE(d) \
1005   (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
1006                            : ((d) >= 0 && (d) <= 4095))
1007
1008 #endif