1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl
;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num
= 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconsthalf
;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
118 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
157 htab_t const_int_htab
;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
161 htab_t mem_attrs_htab
;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
165 htab_t reg_attrs_htab
;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
169 htab_t const_double_htab
;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
173 htab_t const_fixed_htab
;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx
make_call_insn_raw (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void set_used_decls (tree
);
184 static void mark_label_nuses (rtx
);
185 static hashval_t
const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t
const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx
lookup_const_double (rtx
);
190 static hashval_t
const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx
lookup_const_fixed (rtx
);
193 static hashval_t
mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
197 static hashval_t
reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs
*get_reg_attrs (tree
, int);
200 static tree
component_ref_for_mem_expr (tree
);
201 static rtx
gen_const_vector (enum machine_mode
, int);
202 static void copy_rtx_if_shared_1 (rtx
*orig
);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x
)
213 return (hashval_t
) INTVAL ((const_rtx
) x
);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x
, const void *y
)
223 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x
)
230 const_rtx
const value
= (const_rtx
) x
;
233 if (GET_MODE (value
) == VOIDmode
)
234 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
237 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h
^= GET_MODE (value
);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x
, const void *y
)
249 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
251 if (GET_MODE (a
) != GET_MODE (b
))
253 if (GET_MODE (a
) == VOIDmode
)
254 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
255 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
258 CONST_DOUBLE_REAL_VALUE (b
));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x
)
266 const_rtx
const value
= (const_rtx
) x
;
269 h
= fixed_hash (CONST_FIXED_VALUE (value
));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h
^= GET_MODE (value
);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x
, const void *y
)
281 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
283 if (GET_MODE (a
) != GET_MODE (b
))
285 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x
)
293 const mem_attrs
*const p
= (const mem_attrs
*) x
;
295 return (p
->alias
^ (p
->align
* 1000)
296 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
297 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x
, const void *y
)
308 const mem_attrs
*const p
= (const mem_attrs
*) x
;
309 const mem_attrs
*const q
= (const mem_attrs
*) y
;
311 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
312 && p
->size
== q
->size
&& p
->align
== q
->align
313 && (p
->expr
== q
->expr
314 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
315 && operand_equal_p (p
->expr
, q
->expr
, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
324 unsigned int align
, enum machine_mode mode
)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias
== 0 && expr
== 0 && offset
== 0
334 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
335 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
336 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
341 attrs
.offset
= offset
;
345 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
348 *slot
= ggc_alloc (sizeof (mem_attrs
));
349 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
352 return (mem_attrs
*) *slot
;
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x
)
360 const reg_attrs
*const p
= (const reg_attrs
*) x
;
362 return ((p
->offset
* 1000) ^ (long) p
->decl
);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x
, const void *y
)
372 const reg_attrs
*const p
= (const reg_attrs
*) x
;
373 const reg_attrs
*const q
= (const reg_attrs
*) y
;
375 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl
, int offset
)
387 /* If everything is the default, we can just return zero. */
388 if (decl
== 0 && offset
== 0)
392 attrs
.offset
= offset
;
394 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
397 *slot
= ggc_alloc (sizeof (reg_attrs
));
398 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
401 return (reg_attrs
*) *slot
;
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
413 MEM_VOLATILE_P (x
) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode
, int regno
)
426 rtx x
= gen_rtx_raw_REG (mode
, regno
);
427 ORIGINAL_REGNO (x
) = regno
;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
440 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
441 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
445 return const_true_rtx
;
448 /* Look up the CONST_INT in the hash table. */
449 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
450 (hashval_t
) arg
, INSERT
);
452 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
458 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
460 return GEN_INT (trunc_int_for_mode (c
, mode
));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real
)
473 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
485 rtx real
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (real
, mode
);
490 return lookup_const_double (real
);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed
)
500 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
513 rtx fixed
= rtx_alloc (CONST_FIXED
);
514 PUT_MODE (fixed
, mode
);
518 return lookup_const_fixed (fixed
);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode
!= VOIDmode
)
544 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
545 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
550 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
551 return gen_int_mode (i0
, mode
);
553 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
560 /* We use VOIDmode for integers. */
561 value
= rtx_alloc (CONST_DOUBLE
);
562 PUT_MODE (value
, VOIDmode
);
564 CONST_DOUBLE_LOW (value
) = i0
;
565 CONST_DOUBLE_HIGH (value
) = i1
;
567 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
568 XWINT (value
, i
) = 0;
570 return lookup_const_double (value
);
574 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode
== Pmode
&& !reload_in_progress
)
592 if (regno
== FRAME_POINTER_REGNUM
593 && (!reload_completed
|| frame_pointer_needed
))
594 return frame_pointer_rtx
;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno
== HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed
|| frame_pointer_needed
))
598 return hard_frame_pointer_rtx
;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno
== ARG_POINTER_REGNUM
)
602 return arg_pointer_rtx
;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
606 return return_address_pointer_rtx
;
608 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
610 return pic_offset_table_rtx
;
611 if (regno
== STACK_POINTER_REGNUM
)
612 return stack_pointer_rtx
;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno
< FIRST_PSEUDO_REGISTER
631 && reg_raw_mode
[regno
] == mode
)
632 return regno_reg_rtx
[regno
];
635 return gen_raw_REG (mode
, regno
);
639 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
641 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode
, rtx addr
)
655 rtx mem
= gen_rtx_MEM (mode
, addr
);
656 MEM_READONLY_P (mem
) = 1;
657 MEM_NOTRAP_P (mem
) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode
, rtx addr
)
667 rtx mem
= gen_rtx_MEM (mode
, addr
);
668 MEM_NOTRAP_P (mem
) = 1;
669 set_mem_alias_set (mem
, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
679 rtx mem
= gen_rtx_MEM (mode
, addr
);
680 MEM_NOTRAP_P (mem
) = 1;
681 if (!cfun
->calls_alloca
)
682 set_mem_alias_set (mem
, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
691 const_rtx reg
, unsigned int offset
)
693 unsigned int isize
= GET_MODE_SIZE (imode
);
694 unsigned int osize
= GET_MODE_SIZE (omode
);
696 /* All subregs must be aligned. */
697 if (offset
% osize
!= 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode
== word_mode
)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
717 && GET_MODE_INNER (imode
) == omode
)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
745 unsigned int regno
= REGNO (reg
);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
749 && GET_MODE_INNER (imode
) == omode
)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
755 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize
< UNITS_PER_WORD
)
766 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
767 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
768 if (offset
% UNITS_PER_WORD
!= low_off
)
775 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
777 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
778 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
787 enum machine_mode inmode
;
789 inmode
= GET_MODE (reg
);
790 if (inmode
== VOIDmode
)
792 return gen_rtx_SUBREG (mode
, reg
,
793 subreg_lowpart_offset (mode
, inmode
));
796 /* gen_rtvec (n, [rt1, ..., rtn])
798 ** This routine creates an rtvec and stores within it the
799 ** pointers to rtx's which are its arguments.
804 gen_rtvec (int n
, ...)
813 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
815 vector
= XALLOCAVEC (rtx
, n
);
817 for (i
= 0; i
< n
; i
++)
818 vector
[i
] = va_arg (p
, rtx
);
820 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
824 return gen_rtvec_v (save_n
, vector
);
828 gen_rtvec_v (int n
, rtx
*argp
)
834 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
836 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
838 for (i
= 0; i
< n
; i
++)
839 rt_val
->elem
[i
] = *argp
++;
844 /* Return the number of bytes between the start of an OUTER_MODE
845 in-memory value and the start of an INNER_MODE in-memory value,
846 given that the former is a lowpart of the latter. It may be a
847 paradoxical lowpart, in which case the offset will be negative
848 on big-endian targets. */
851 byte_lowpart_offset (enum machine_mode outer_mode
,
852 enum machine_mode inner_mode
)
854 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
855 return subreg_lowpart_offset (outer_mode
, inner_mode
);
857 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
860 /* Generate a REG rtx for a new pseudo register of mode MODE.
861 This pseudo is assigned the next sequential register number. */
864 gen_reg_rtx (enum machine_mode mode
)
868 gcc_assert (can_create_pseudo_p ());
870 if (generating_concat_p
871 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
872 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
874 /* For complex modes, don't make a single pseudo.
875 Instead, make a CONCAT of two pseudos.
876 This allows noncontiguous allocation of the real and imaginary parts,
877 which makes much better code. Besides, allocating DCmode
878 pseudos overstrains reload on some machines like the 386. */
879 rtx realpart
, imagpart
;
880 enum machine_mode partmode
= GET_MODE_INNER (mode
);
882 realpart
= gen_reg_rtx (partmode
);
883 imagpart
= gen_reg_rtx (partmode
);
884 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
887 /* Make sure regno_pointer_align, and regno_reg_rtx are large
888 enough to have an element for this pseudo reg number. */
890 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
892 int old_size
= crtl
->emit
.regno_pointer_align_length
;
896 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
897 memset (tmp
+ old_size
, 0, old_size
);
898 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
900 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
901 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
902 regno_reg_rtx
= new1
;
904 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
907 val
= gen_raw_REG (mode
, reg_rtx_no
);
908 regno_reg_rtx
[reg_rtx_no
++] = val
;
912 /* Update NEW with the same attributes as REG, but with OFFSET added
913 to the REG_OFFSET. */
916 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
918 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
919 REG_OFFSET (reg
) + offset
);
922 /* Generate a register with same attributes as REG, but with OFFSET
923 added to the REG_OFFSET. */
926 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
929 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
931 update_reg_offset (new_rtx
, reg
, offset
);
935 /* Generate a new pseudo-register with the same attributes as REG, but
936 with OFFSET added to the REG_OFFSET. */
939 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
941 rtx new_rtx
= gen_reg_rtx (mode
);
943 update_reg_offset (new_rtx
, reg
, offset
);
947 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
948 new register is a (possibly paradoxical) lowpart of the old one. */
951 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
953 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
954 PUT_MODE (reg
, mode
);
957 /* Copy REG's attributes from X, if X has any attributes. If REG and X
958 have different modes, REG is a (possibly paradoxical) lowpart of X. */
961 set_reg_attrs_from_value (rtx reg
, rtx x
)
965 /* Hard registers can be reused for multiple purposes within the same
966 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
968 if (HARD_REGISTER_P (reg
))
971 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
974 if (MEM_OFFSET (x
) && GET_CODE (MEM_OFFSET (x
)) == CONST_INT
)
976 = get_reg_attrs (MEM_EXPR (x
), INTVAL (MEM_OFFSET (x
)) + offset
);
978 mark_reg_pointer (reg
, MEM_ALIGN (x
));
983 update_reg_offset (reg
, x
, offset
);
985 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
989 /* Generate a REG rtx for a new pseudo register, copying the mode
990 and attributes from X. */
993 gen_reg_rtx_and_attrs (rtx x
)
995 rtx reg
= gen_reg_rtx (GET_MODE (x
));
996 set_reg_attrs_from_value (reg
, x
);
1000 /* Set the register attributes for registers contained in PARM_RTX.
1001 Use needed values from memory attributes of MEM. */
1004 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1006 if (REG_P (parm_rtx
))
1007 set_reg_attrs_from_value (parm_rtx
, mem
);
1008 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1010 /* Check for a NULL entry in the first slot, used to indicate that the
1011 parameter goes both on the stack and in registers. */
1012 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1013 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1015 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1016 if (REG_P (XEXP (x
, 0)))
1017 REG_ATTRS (XEXP (x
, 0))
1018 = get_reg_attrs (MEM_EXPR (mem
),
1019 INTVAL (XEXP (x
, 1)));
1024 /* Set the REG_ATTRS for registers in value X, given that X represents
1028 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1030 if (GET_CODE (x
) == SUBREG
)
1032 gcc_assert (subreg_lowpart_p (x
));
1037 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1039 if (GET_CODE (x
) == CONCAT
)
1041 if (REG_P (XEXP (x
, 0)))
1042 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1043 if (REG_P (XEXP (x
, 1)))
1044 REG_ATTRS (XEXP (x
, 1))
1045 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1047 if (GET_CODE (x
) == PARALLEL
)
1051 /* Check for a NULL entry, used to indicate that the parameter goes
1052 both on the stack and in registers. */
1053 if (XEXP (XVECEXP (x
, 0, 0), 0))
1058 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1060 rtx y
= XVECEXP (x
, 0, i
);
1061 if (REG_P (XEXP (y
, 0)))
1062 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1067 /* Assign the RTX X to declaration T. */
1070 set_decl_rtl (tree t
, rtx x
)
1072 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1074 set_reg_attrs_for_decl_rtl (t
, x
);
1077 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1078 if the ABI requires the parameter to be passed by reference. */
1081 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1083 DECL_INCOMING_RTL (t
) = x
;
1084 if (x
&& !by_reference_p
)
1085 set_reg_attrs_for_decl_rtl (t
, x
);
1088 /* Identify REG (which may be a CONCAT) as a user register. */
1091 mark_user_reg (rtx reg
)
1093 if (GET_CODE (reg
) == CONCAT
)
1095 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1096 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1100 gcc_assert (REG_P (reg
));
1101 REG_USERVAR_P (reg
) = 1;
1105 /* Identify REG as a probable pointer register and show its alignment
1106 as ALIGN, if nonzero. */
1109 mark_reg_pointer (rtx reg
, int align
)
1111 if (! REG_POINTER (reg
))
1113 REG_POINTER (reg
) = 1;
1116 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1118 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1119 /* We can no-longer be sure just how aligned this pointer is. */
1120 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1123 /* Return 1 plus largest pseudo reg number used in the current function. */
1131 /* Return 1 + the largest label number used so far in the current function. */
1134 max_label_num (void)
1139 /* Return first label number used in this function (if any were used). */
1142 get_first_label_num (void)
1144 return first_label_num
;
1147 /* If the rtx for label was created during the expansion of a nested
1148 function, then first_label_num won't include this label number.
1149 Fix this now so that array indices work later. */
1152 maybe_set_first_label_num (rtx x
)
1154 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1155 first_label_num
= CODE_LABEL_NUMBER (x
);
1158 /* Return a value representing some low-order bits of X, where the number
1159 of low-order bits is given by MODE. Note that no conversion is done
1160 between floating-point and fixed-point values, rather, the bit
1161 representation is returned.
1163 This function handles the cases in common between gen_lowpart, below,
1164 and two variants in cse.c and combine.c. These are the cases that can
1165 be safely handled at all points in the compilation.
1167 If this is not a case we can handle, return 0. */
1170 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1172 int msize
= GET_MODE_SIZE (mode
);
1175 enum machine_mode innermode
;
1177 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1178 so we have to make one up. Yuk. */
1179 innermode
= GET_MODE (x
);
1180 if (GET_CODE (x
) == CONST_INT
1181 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1182 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1183 else if (innermode
== VOIDmode
)
1184 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1186 xsize
= GET_MODE_SIZE (innermode
);
1188 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1190 if (innermode
== mode
)
1193 /* MODE must occupy no more words than the mode of X. */
1194 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1195 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1198 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1199 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1202 offset
= subreg_lowpart_offset (mode
, innermode
);
1204 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1205 && (GET_MODE_CLASS (mode
) == MODE_INT
1206 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1208 /* If we are getting the low-order part of something that has been
1209 sign- or zero-extended, we can either just use the object being
1210 extended or make a narrower extension. If we want an even smaller
1211 piece than the size of the object being extended, call ourselves
1214 This case is used mostly by combine and cse. */
1216 if (GET_MODE (XEXP (x
, 0)) == mode
)
1218 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1219 return gen_lowpart_common (mode
, XEXP (x
, 0));
1220 else if (msize
< xsize
)
1221 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1223 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1224 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1225 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1226 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1228 /* Otherwise, we can't do this. */
1233 gen_highpart (enum machine_mode mode
, rtx x
)
1235 unsigned int msize
= GET_MODE_SIZE (mode
);
1238 /* This case loses if X is a subreg. To catch bugs early,
1239 complain if an invalid MODE is used even in other cases. */
1240 gcc_assert (msize
<= UNITS_PER_WORD
1241 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1243 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1244 subreg_highpart_offset (mode
, GET_MODE (x
)));
1245 gcc_assert (result
);
1247 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1248 the target if we have a MEM. gen_highpart must return a valid operand,
1249 emitting code if necessary to do so. */
1252 result
= validize_mem (result
);
1253 gcc_assert (result
);
1259 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1260 be VOIDmode constant. */
1262 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1264 if (GET_MODE (exp
) != VOIDmode
)
1266 gcc_assert (GET_MODE (exp
) == innermode
);
1267 return gen_highpart (outermode
, exp
);
1269 return simplify_gen_subreg (outermode
, exp
, innermode
,
1270 subreg_highpart_offset (outermode
, innermode
));
1273 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1276 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1278 unsigned int offset
= 0;
1279 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1283 if (WORDS_BIG_ENDIAN
)
1284 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1285 if (BYTES_BIG_ENDIAN
)
1286 offset
+= difference
% UNITS_PER_WORD
;
1292 /* Return offset in bytes to get OUTERMODE high part
1293 of the value in mode INNERMODE stored in memory in target format. */
1295 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1297 unsigned int offset
= 0;
1298 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1300 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1304 if (! WORDS_BIG_ENDIAN
)
1305 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1306 if (! BYTES_BIG_ENDIAN
)
1307 offset
+= difference
% UNITS_PER_WORD
;
1313 /* Return 1 iff X, assumed to be a SUBREG,
1314 refers to the least significant part of its containing reg.
1315 If X is not a SUBREG, always return 1 (it is its own low part!). */
1318 subreg_lowpart_p (const_rtx x
)
1320 if (GET_CODE (x
) != SUBREG
)
1322 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1325 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1326 == SUBREG_BYTE (x
));
1329 /* Return subword OFFSET of operand OP.
1330 The word number, OFFSET, is interpreted as the word number starting
1331 at the low-order address. OFFSET 0 is the low-order word if not
1332 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1334 If we cannot extract the required word, we return zero. Otherwise,
1335 an rtx corresponding to the requested word will be returned.
1337 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1338 reload has completed, a valid address will always be returned. After
1339 reload, if a valid address cannot be returned, we return zero.
1341 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1342 it is the responsibility of the caller.
1344 MODE is the mode of OP in case it is a CONST_INT.
1346 ??? This is still rather broken for some cases. The problem for the
1347 moment is that all callers of this thing provide no 'goal mode' to
1348 tell us to work with. This exists because all callers were written
1349 in a word based SUBREG world.
1350 Now use of this function can be deprecated by simplify_subreg in most
1355 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1357 if (mode
== VOIDmode
)
1358 mode
= GET_MODE (op
);
1360 gcc_assert (mode
!= VOIDmode
);
1362 /* If OP is narrower than a word, fail. */
1364 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1367 /* If we want a word outside OP, return zero. */
1369 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1372 /* Form a new MEM at the requested address. */
1375 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1377 if (! validate_address
)
1380 else if (reload_completed
)
1382 if (! strict_memory_address_p (word_mode
, XEXP (new_rtx
, 0)))
1386 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1389 /* Rest can be handled by simplify_subreg. */
1390 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1393 /* Similar to `operand_subword', but never return 0. If we can't
1394 extract the required subword, put OP into a register and try again.
1395 The second attempt must succeed. We always validate the address in
1398 MODE is the mode of OP, in case it is CONST_INT. */
1401 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1403 rtx result
= operand_subword (op
, offset
, 1, mode
);
1408 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1410 /* If this is a register which can not be accessed by words, copy it
1411 to a pseudo register. */
1413 op
= copy_to_reg (op
);
1415 op
= force_reg (mode
, op
);
1418 result
= operand_subword (op
, offset
, 1, mode
);
1419 gcc_assert (result
);
1424 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1425 or (2) a component ref of something variable. Represent the later with
1426 a NULL expression. */
1429 component_ref_for_mem_expr (tree ref
)
1431 tree inner
= TREE_OPERAND (ref
, 0);
1433 if (TREE_CODE (inner
) == COMPONENT_REF
)
1434 inner
= component_ref_for_mem_expr (inner
);
1437 /* Now remove any conversions: they don't change what the underlying
1438 object is. Likewise for SAVE_EXPR. */
1439 while (CONVERT_EXPR_P (inner
)
1440 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1441 || TREE_CODE (inner
) == SAVE_EXPR
)
1442 inner
= TREE_OPERAND (inner
, 0);
1444 if (! DECL_P (inner
))
1448 if (inner
== TREE_OPERAND (ref
, 0))
1451 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1452 TREE_OPERAND (ref
, 1), NULL_TREE
);
1455 /* Returns 1 if both MEM_EXPR can be considered equal
1459 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1464 if (! expr1
|| ! expr2
)
1467 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1470 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1472 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1473 TREE_OPERAND (expr2
, 0))
1474 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1475 TREE_OPERAND (expr2
, 1));
1477 if (INDIRECT_REF_P (expr1
))
1478 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1479 TREE_OPERAND (expr2
, 0));
1481 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1482 have been resolved here. */
1483 gcc_assert (DECL_P (expr1
));
1485 /* Decls with different pointers can't be equal. */
1489 /* Given REF (a MEM) and T, either the type of X or the expression
1490 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1491 if we are making a new object of this type. BITPOS is nonzero if
1492 there is an offset outstanding on T that will be applied later. */
1495 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1496 HOST_WIDE_INT bitpos
)
1498 alias_set_type alias
= MEM_ALIAS_SET (ref
);
1499 tree expr
= MEM_EXPR (ref
);
1500 rtx offset
= MEM_OFFSET (ref
);
1501 rtx size
= MEM_SIZE (ref
);
1502 unsigned int align
= MEM_ALIGN (ref
);
1503 HOST_WIDE_INT apply_bitpos
= 0;
1506 /* It can happen that type_for_mode was given a mode for which there
1507 is no language-level type. In which case it returns NULL, which
1512 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1513 if (type
== error_mark_node
)
1516 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1517 wrong answer, as it assumes that DECL_RTL already has the right alias
1518 info. Callers should not set DECL_RTL until after the call to
1519 set_mem_attributes. */
1520 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1522 /* Get the alias set from the expression or type (perhaps using a
1523 front-end routine) and use it. */
1524 alias
= get_alias_set (t
);
1526 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1527 MEM_IN_STRUCT_P (ref
)
1528 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1529 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1531 /* If we are making an object of this type, or if this is a DECL, we know
1532 that it is a scalar if the type is not an aggregate. */
1533 if ((objectp
|| DECL_P (t
))
1534 && ! AGGREGATE_TYPE_P (type
)
1535 && TREE_CODE (type
) != COMPLEX_TYPE
)
1536 MEM_SCALAR_P (ref
) = 1;
1538 /* We can set the alignment from the type if we are making an object,
1539 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1540 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1541 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1542 || TYPE_ALIGN_OK (type
))
1543 align
= MAX (align
, TYPE_ALIGN (type
));
1545 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1547 if (integer_zerop (TREE_OPERAND (t
, 1)))
1548 /* We don't know anything about the alignment. */
1549 align
= BITS_PER_UNIT
;
1551 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1554 /* If the size is known, we can set that. */
1555 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1556 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1558 /* If T is not a type, we may be able to deduce some more information about
1564 if (TREE_THIS_VOLATILE (t
))
1565 MEM_VOLATILE_P (ref
) = 1;
1567 /* Now remove any conversions: they don't change what the underlying
1568 object is. Likewise for SAVE_EXPR. */
1569 while (CONVERT_EXPR_P (t
)
1570 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1571 || TREE_CODE (t
) == SAVE_EXPR
)
1572 t
= TREE_OPERAND (t
, 0);
1574 /* We may look through structure-like accesses for the purposes of
1575 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1577 while (TREE_CODE (base
) == COMPONENT_REF
1578 || TREE_CODE (base
) == REALPART_EXPR
1579 || TREE_CODE (base
) == IMAGPART_EXPR
1580 || TREE_CODE (base
) == BIT_FIELD_REF
)
1581 base
= TREE_OPERAND (base
, 0);
1585 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1586 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1588 MEM_NOTRAP_P (ref
) = 1;
1591 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1593 base
= get_base_address (base
);
1594 if (base
&& DECL_P (base
)
1595 && TREE_READONLY (base
)
1596 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1598 tree base_type
= TREE_TYPE (base
);
1599 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1600 || DECL_ARTIFICIAL (base
));
1601 MEM_READONLY_P (ref
) = 1;
1604 /* If this expression uses it's parent's alias set, mark it such
1605 that we won't change it. */
1606 if (component_uses_parent_alias_set (t
))
1607 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1609 /* If this is a decl, set the attributes of the MEM from it. */
1613 offset
= const0_rtx
;
1614 apply_bitpos
= bitpos
;
1615 size
= (DECL_SIZE_UNIT (t
)
1616 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1617 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1618 align
= DECL_ALIGN (t
);
1621 /* If this is a constant, we know the alignment. */
1622 else if (CONSTANT_CLASS_P (t
))
1624 align
= TYPE_ALIGN (type
);
1625 #ifdef CONSTANT_ALIGNMENT
1626 align
= CONSTANT_ALIGNMENT (t
, align
);
1630 /* If this is a field reference and not a bit-field, record it. */
1631 /* ??? There is some information that can be gleaned from bit-fields,
1632 such as the word offset in the structure that might be modified.
1633 But skip it for now. */
1634 else if (TREE_CODE (t
) == COMPONENT_REF
1635 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1637 expr
= component_ref_for_mem_expr (t
);
1638 offset
= const0_rtx
;
1639 apply_bitpos
= bitpos
;
1640 /* ??? Any reason the field size would be different than
1641 the size we got from the type? */
1644 /* If this is an array reference, look for an outer field reference. */
1645 else if (TREE_CODE (t
) == ARRAY_REF
)
1647 tree off_tree
= size_zero_node
;
1648 /* We can't modify t, because we use it at the end of the
1654 tree index
= TREE_OPERAND (t2
, 1);
1655 tree low_bound
= array_ref_low_bound (t2
);
1656 tree unit_size
= array_ref_element_size (t2
);
1658 /* We assume all arrays have sizes that are a multiple of a byte.
1659 First subtract the lower bound, if any, in the type of the
1660 index, then convert to sizetype and multiply by the size of
1661 the array element. */
1662 if (! integer_zerop (low_bound
))
1663 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1666 off_tree
= size_binop (PLUS_EXPR
,
1667 size_binop (MULT_EXPR
,
1668 fold_convert (sizetype
,
1672 t2
= TREE_OPERAND (t2
, 0);
1674 while (TREE_CODE (t2
) == ARRAY_REF
);
1680 if (host_integerp (off_tree
, 1))
1682 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1683 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1684 align
= DECL_ALIGN (t2
);
1685 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1687 offset
= GEN_INT (ioff
);
1688 apply_bitpos
= bitpos
;
1691 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1693 expr
= component_ref_for_mem_expr (t2
);
1694 if (host_integerp (off_tree
, 1))
1696 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1697 apply_bitpos
= bitpos
;
1699 /* ??? Any reason the field size would be different than
1700 the size we got from the type? */
1702 else if (flag_argument_noalias
> 1
1703 && (INDIRECT_REF_P (t2
))
1704 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1711 /* If this is a Fortran indirect argument reference, record the
1713 else if (flag_argument_noalias
> 1
1714 && (INDIRECT_REF_P (t
))
1715 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1722 /* If we modified OFFSET based on T, then subtract the outstanding
1723 bit position offset. Similarly, increase the size of the accessed
1724 object to contain the negative offset. */
1727 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1729 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1732 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1734 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1735 we're overlapping. */
1740 /* Now set the attributes we computed above. */
1742 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1744 /* If this is already known to be a scalar or aggregate, we are done. */
1745 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1748 /* If it is a reference into an aggregate, this is part of an aggregate.
1749 Otherwise we don't know. */
1750 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1751 || TREE_CODE (t
) == ARRAY_RANGE_REF
1752 || TREE_CODE (t
) == BIT_FIELD_REF
)
1753 MEM_IN_STRUCT_P (ref
) = 1;
1757 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1759 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1762 /* Set MEM to the decl that REG refers to. */
1765 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1768 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1769 GEN_INT (REG_OFFSET (reg
)),
1770 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1773 /* Set the alias set of MEM to SET. */
1776 set_mem_alias_set (rtx mem
, alias_set_type set
)
1778 #ifdef ENABLE_CHECKING
1779 /* If the new and old alias sets don't conflict, something is wrong. */
1780 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1783 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1784 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1788 /* Set the alignment of MEM to ALIGN bits. */
1791 set_mem_align (rtx mem
, unsigned int align
)
1793 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1794 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1798 /* Set the expr for MEM to EXPR. */
1801 set_mem_expr (rtx mem
, tree expr
)
1804 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1805 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1808 /* Set the offset of MEM to OFFSET. */
1811 set_mem_offset (rtx mem
, rtx offset
)
1813 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1814 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1818 /* Set the size of MEM to SIZE. */
1821 set_mem_size (rtx mem
, rtx size
)
1823 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1824 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1828 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1829 and its address changed to ADDR. (VOIDmode means don't change the mode.
1830 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1831 returned memory location is required to be valid. The memory
1832 attributes are not changed. */
1835 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1839 gcc_assert (MEM_P (memref
));
1840 if (mode
== VOIDmode
)
1841 mode
= GET_MODE (memref
);
1843 addr
= XEXP (memref
, 0);
1844 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1845 && (!validate
|| memory_address_p (mode
, addr
)))
1850 if (reload_in_progress
|| reload_completed
)
1851 gcc_assert (memory_address_p (mode
, addr
));
1853 addr
= memory_address (mode
, addr
);
1856 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1859 new_rtx
= gen_rtx_MEM (mode
, addr
);
1860 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1864 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1865 way we are changing MEMREF, so we only preserve the alias set. */
1868 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1870 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1), size
;
1871 enum machine_mode mmode
= GET_MODE (new_rtx
);
1874 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1875 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1877 /* If there are no changes, just return the original memory reference. */
1878 if (new_rtx
== memref
)
1880 if (MEM_ATTRS (memref
) == 0
1881 || (MEM_EXPR (memref
) == NULL
1882 && MEM_OFFSET (memref
) == NULL
1883 && MEM_SIZE (memref
) == size
1884 && MEM_ALIGN (memref
) == align
))
1887 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1888 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1892 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1897 /* Return a memory reference like MEMREF, but with its mode changed
1898 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1899 nonzero, the memory address is forced to be valid.
1900 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1901 and caller is responsible for adjusting MEMREF base register. */
1904 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1905 int validate
, int adjust
)
1907 rtx addr
= XEXP (memref
, 0);
1909 rtx memoffset
= MEM_OFFSET (memref
);
1911 unsigned int memalign
= MEM_ALIGN (memref
);
1913 /* If there are no changes, just return the original memory reference. */
1914 if (mode
== GET_MODE (memref
) && !offset
1915 && (!validate
|| memory_address_p (mode
, addr
)))
1918 /* ??? Prefer to create garbage instead of creating shared rtl.
1919 This may happen even if offset is nonzero -- consider
1920 (plus (plus reg reg) const_int) -- so do this always. */
1921 addr
= copy_rtx (addr
);
1925 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1926 object, we can merge it into the LO_SUM. */
1927 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1929 && (unsigned HOST_WIDE_INT
) offset
1930 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1931 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1932 plus_constant (XEXP (addr
, 1), offset
));
1934 addr
= plus_constant (addr
, offset
);
1937 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
1939 /* Compute the new values of the memory attributes due to this adjustment.
1940 We add the offsets and update the alignment. */
1942 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1944 /* Compute the new alignment by taking the MIN of the alignment and the
1945 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1950 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1952 /* We can compute the size in a number of ways. */
1953 if (GET_MODE (new_rtx
) != BLKmode
)
1954 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx
)));
1955 else if (MEM_SIZE (memref
))
1956 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1958 MEM_ATTRS (new_rtx
) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1959 memoffset
, size
, memalign
, GET_MODE (new_rtx
));
1961 /* At some point, we should validate that this offset is within the object,
1962 if all the appropriate values are known. */
1966 /* Return a memory reference like MEMREF, but with its mode changed
1967 to MODE and its address changed to ADDR, which is assumed to be
1968 MEMREF offset by OFFSET bytes. If VALIDATE is
1969 nonzero, the memory address is forced to be valid. */
1972 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1973 HOST_WIDE_INT offset
, int validate
)
1975 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1976 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1979 /* Return a memory reference like MEMREF, but whose address is changed by
1980 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1981 known to be in OFFSET (possibly 1). */
1984 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1986 rtx new_rtx
, addr
= XEXP (memref
, 0);
1988 new_rtx
= simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1990 /* At this point we don't know _why_ the address is invalid. It
1991 could have secondary memory references, multiplies or anything.
1993 However, if we did go and rearrange things, we can wind up not
1994 being able to recognize the magic around pic_offset_table_rtx.
1995 This stuff is fragile, and is yet another example of why it is
1996 bad to expose PIC machinery too early. */
1997 if (! memory_address_p (GET_MODE (memref
), new_rtx
)
1998 && GET_CODE (addr
) == PLUS
1999 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2001 addr
= force_reg (GET_MODE (addr
), addr
);
2002 new_rtx
= simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2005 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2006 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2008 /* If there are no changes, just return the original memory reference. */
2009 if (new_rtx
== memref
)
2012 /* Update the alignment to reflect the offset. Reset the offset, which
2015 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2016 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2017 GET_MODE (new_rtx
));
2021 /* Return a memory reference like MEMREF, but with its address changed to
2022 ADDR. The caller is asserting that the actual piece of memory pointed
2023 to is the same, just the form of the address is being changed, such as
2024 by putting something into a register. */
2027 replace_equiv_address (rtx memref
, rtx addr
)
2029 /* change_address_1 copies the memory attribute structure without change
2030 and that's exactly what we want here. */
2031 update_temp_slot_address (XEXP (memref
, 0), addr
);
2032 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2035 /* Likewise, but the reference is not required to be valid. */
2038 replace_equiv_address_nv (rtx memref
, rtx addr
)
2040 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2043 /* Return a memory reference like MEMREF, but with its mode widened to
2044 MODE and offset by OFFSET. This would be used by targets that e.g.
2045 cannot issue QImode memory operations and have to use SImode memory
2046 operations plus masking logic. */
2049 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2051 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2052 tree expr
= MEM_EXPR (new_rtx
);
2053 rtx memoffset
= MEM_OFFSET (new_rtx
);
2054 unsigned int size
= GET_MODE_SIZE (mode
);
2056 /* If there are no changes, just return the original memory reference. */
2057 if (new_rtx
== memref
)
2060 /* If we don't know what offset we were at within the expression, then
2061 we can't know if we've overstepped the bounds. */
2067 if (TREE_CODE (expr
) == COMPONENT_REF
)
2069 tree field
= TREE_OPERAND (expr
, 1);
2070 tree offset
= component_ref_field_offset (expr
);
2072 if (! DECL_SIZE_UNIT (field
))
2078 /* Is the field at least as large as the access? If so, ok,
2079 otherwise strip back to the containing structure. */
2080 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2081 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2082 && INTVAL (memoffset
) >= 0)
2085 if (! host_integerp (offset
, 1))
2091 expr
= TREE_OPERAND (expr
, 0);
2093 = (GEN_INT (INTVAL (memoffset
)
2094 + tree_low_cst (offset
, 1)
2095 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2098 /* Similarly for the decl. */
2099 else if (DECL_P (expr
)
2100 && DECL_SIZE_UNIT (expr
)
2101 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2102 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2103 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2107 /* The widened memory access overflows the expression, which means
2108 that it could alias another expression. Zap it. */
2115 memoffset
= NULL_RTX
;
2117 /* The widened memory may alias other stuff, so zap the alias set. */
2118 /* ??? Maybe use get_alias_set on any remaining expression. */
2120 MEM_ATTRS (new_rtx
) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2121 MEM_ALIGN (new_rtx
), mode
);
2126 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2129 gen_label_rtx (void)
2131 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2132 NULL
, label_num
++, NULL
);
2135 /* For procedure integration. */
2137 /* Install new pointers to the first and last insns in the chain.
2138 Also, set cur_insn_uid to one higher than the last in use.
2139 Used for an inline-procedure after copying the insn chain. */
2142 set_new_first_and_last_insn (rtx first
, rtx last
)
2150 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2151 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2156 /* Go through all the RTL insn bodies and copy any invalid shared
2157 structure. This routine should only be called once. */
2160 unshare_all_rtl_1 (rtx insn
)
2162 /* Unshare just about everything else. */
2163 unshare_all_rtl_in_chain (insn
);
2165 /* Make sure the addresses of stack slots found outside the insn chain
2166 (such as, in DECL_RTL of a variable) are not shared
2167 with the insn chain.
2169 This special care is necessary when the stack slot MEM does not
2170 actually appear in the insn chain. If it does appear, its address
2171 is unshared from all else at that point. */
2172 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2175 /* Go through all the RTL insn bodies and copy any invalid shared
2176 structure, again. This is a fairly expensive thing to do so it
2177 should be done sparingly. */
2180 unshare_all_rtl_again (rtx insn
)
2185 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2188 reset_used_flags (PATTERN (p
));
2189 reset_used_flags (REG_NOTES (p
));
2192 /* Make sure that virtual stack slots are not shared. */
2193 set_used_decls (DECL_INITIAL (cfun
->decl
));
2195 /* Make sure that virtual parameters are not shared. */
2196 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2197 set_used_flags (DECL_RTL (decl
));
2199 reset_used_flags (stack_slot_list
);
2201 unshare_all_rtl_1 (insn
);
2205 unshare_all_rtl (void)
2207 unshare_all_rtl_1 (get_insns ());
2211 struct rtl_opt_pass pass_unshare_all_rtl
=
2215 "unshare", /* name */
2217 unshare_all_rtl
, /* execute */
2220 0, /* static_pass_number */
2222 0, /* properties_required */
2223 0, /* properties_provided */
2224 0, /* properties_destroyed */
2225 0, /* todo_flags_start */
2226 TODO_dump_func
| TODO_verify_rtl_sharing
/* todo_flags_finish */
2231 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2232 Recursively does the same for subexpressions. */
2235 verify_rtx_sharing (rtx orig
, rtx insn
)
2240 const char *format_ptr
;
2245 code
= GET_CODE (x
);
2247 /* These types may be freely shared. */
2263 /* SCRATCH must be shared because they represent distinct values. */
2265 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2270 if (shared_const_p (orig
))
2275 /* A MEM is allowed to be shared if its address is constant. */
2276 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2277 || reload_completed
|| reload_in_progress
)
2286 /* This rtx may not be shared. If it has already been seen,
2287 replace it with a copy of itself. */
2288 #ifdef ENABLE_CHECKING
2289 if (RTX_FLAG (x
, used
))
2291 error ("invalid rtl sharing found in the insn");
2293 error ("shared rtx");
2295 internal_error ("internal consistency failure");
2298 gcc_assert (!RTX_FLAG (x
, used
));
2300 RTX_FLAG (x
, used
) = 1;
2302 /* Now scan the subexpressions recursively. */
2304 format_ptr
= GET_RTX_FORMAT (code
);
2306 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2308 switch (*format_ptr
++)
2311 verify_rtx_sharing (XEXP (x
, i
), insn
);
2315 if (XVEC (x
, i
) != NULL
)
2318 int len
= XVECLEN (x
, i
);
2320 for (j
= 0; j
< len
; j
++)
2322 /* We allow sharing of ASM_OPERANDS inside single
2324 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2325 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2327 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2329 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2338 /* Go through all the RTL insn bodies and check that there is no unexpected
2339 sharing in between the subexpressions. */
2342 verify_rtl_sharing (void)
2346 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2349 reset_used_flags (PATTERN (p
));
2350 reset_used_flags (REG_NOTES (p
));
2351 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2354 rtx q
, sequence
= PATTERN (p
);
2356 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2358 q
= XVECEXP (sequence
, 0, i
);
2359 gcc_assert (INSN_P (q
));
2360 reset_used_flags (PATTERN (q
));
2361 reset_used_flags (REG_NOTES (q
));
2366 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2369 verify_rtx_sharing (PATTERN (p
), p
);
2370 verify_rtx_sharing (REG_NOTES (p
), p
);
2374 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2375 Assumes the mark bits are cleared at entry. */
2378 unshare_all_rtl_in_chain (rtx insn
)
2380 for (; insn
; insn
= NEXT_INSN (insn
))
2383 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2384 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2388 /* Go through all virtual stack slots of a function and mark them as
2389 shared. We never replace the DECL_RTLs themselves with a copy,
2390 but expressions mentioned into a DECL_RTL cannot be shared with
2391 expressions in the instruction stream.
2393 Note that reload may convert pseudo registers into memories in-place.
2394 Pseudo registers are always shared, but MEMs never are. Thus if we
2395 reset the used flags on MEMs in the instruction stream, we must set
2396 them again on MEMs that appear in DECL_RTLs. */
2399 set_used_decls (tree blk
)
2404 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2405 if (DECL_RTL_SET_P (t
))
2406 set_used_flags (DECL_RTL (t
));
2408 /* Now process sub-blocks. */
2409 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2413 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2414 Recursively does the same for subexpressions. Uses
2415 copy_rtx_if_shared_1 to reduce stack space. */
2418 copy_rtx_if_shared (rtx orig
)
2420 copy_rtx_if_shared_1 (&orig
);
2424 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2425 use. Recursively does the same for subexpressions. */
2428 copy_rtx_if_shared_1 (rtx
*orig1
)
2434 const char *format_ptr
;
2438 /* Repeat is used to turn tail-recursion into iteration. */
2445 code
= GET_CODE (x
);
2447 /* These types may be freely shared. */
2462 /* SCRATCH must be shared because they represent distinct values. */
2465 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2470 if (shared_const_p (x
))
2479 /* The chain of insns is not being copied. */
2486 /* This rtx may not be shared. If it has already been seen,
2487 replace it with a copy of itself. */
2489 if (RTX_FLAG (x
, used
))
2491 x
= shallow_copy_rtx (x
);
2494 RTX_FLAG (x
, used
) = 1;
2496 /* Now scan the subexpressions recursively.
2497 We can store any replaced subexpressions directly into X
2498 since we know X is not shared! Any vectors in X
2499 must be copied if X was copied. */
2501 format_ptr
= GET_RTX_FORMAT (code
);
2502 length
= GET_RTX_LENGTH (code
);
2505 for (i
= 0; i
< length
; i
++)
2507 switch (*format_ptr
++)
2511 copy_rtx_if_shared_1 (last_ptr
);
2512 last_ptr
= &XEXP (x
, i
);
2516 if (XVEC (x
, i
) != NULL
)
2519 int len
= XVECLEN (x
, i
);
2521 /* Copy the vector iff I copied the rtx and the length
2523 if (copied
&& len
> 0)
2524 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2526 /* Call recursively on all inside the vector. */
2527 for (j
= 0; j
< len
; j
++)
2530 copy_rtx_if_shared_1 (last_ptr
);
2531 last_ptr
= &XVECEXP (x
, i
, j
);
2546 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2547 to look for shared sub-parts. */
2550 reset_used_flags (rtx x
)
2554 const char *format_ptr
;
2557 /* Repeat is used to turn tail-recursion into iteration. */
2562 code
= GET_CODE (x
);
2564 /* These types may be freely shared so we needn't do any resetting
2586 /* The chain of insns is not being copied. */
2593 RTX_FLAG (x
, used
) = 0;
2595 format_ptr
= GET_RTX_FORMAT (code
);
2596 length
= GET_RTX_LENGTH (code
);
2598 for (i
= 0; i
< length
; i
++)
2600 switch (*format_ptr
++)
2608 reset_used_flags (XEXP (x
, i
));
2612 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2613 reset_used_flags (XVECEXP (x
, i
, j
));
2619 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2620 to look for shared sub-parts. */
2623 set_used_flags (rtx x
)
2627 const char *format_ptr
;
2632 code
= GET_CODE (x
);
2634 /* These types may be freely shared so we needn't do any resetting
2656 /* The chain of insns is not being copied. */
2663 RTX_FLAG (x
, used
) = 1;
2665 format_ptr
= GET_RTX_FORMAT (code
);
2666 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2668 switch (*format_ptr
++)
2671 set_used_flags (XEXP (x
, i
));
2675 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2676 set_used_flags (XVECEXP (x
, i
, j
));
2682 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2683 Return X or the rtx for the pseudo reg the value of X was copied into.
2684 OTHER must be valid as a SET_DEST. */
2687 make_safe_from (rtx x
, rtx other
)
2690 switch (GET_CODE (other
))
2693 other
= SUBREG_REG (other
);
2695 case STRICT_LOW_PART
:
2698 other
= XEXP (other
, 0);
2707 && GET_CODE (x
) != SUBREG
)
2709 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2710 || reg_mentioned_p (other
, x
))))
2712 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2713 emit_move_insn (temp
, x
);
2719 /* Emission of insns (adding them to the doubly-linked list). */
2721 /* Return the first insn of the current sequence or current function. */
2729 /* Specify a new insn as the first in the chain. */
2732 set_first_insn (rtx insn
)
2734 gcc_assert (!PREV_INSN (insn
));
2738 /* Return the last insn emitted in current sequence or current function. */
2741 get_last_insn (void)
2746 /* Specify a new insn as the last in the chain. */
2749 set_last_insn (rtx insn
)
2751 gcc_assert (!NEXT_INSN (insn
));
2755 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2758 get_last_insn_anywhere (void)
2760 struct sequence_stack
*stack
;
2763 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2764 if (stack
->last
!= 0)
2769 /* Return the first nonnote insn emitted in current sequence or current
2770 function. This routine looks inside SEQUENCEs. */
2773 get_first_nonnote_insn (void)
2775 rtx insn
= first_insn
;
2780 for (insn
= next_insn (insn
);
2781 insn
&& NOTE_P (insn
);
2782 insn
= next_insn (insn
))
2786 if (NONJUMP_INSN_P (insn
)
2787 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2788 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2795 /* Return the last nonnote insn emitted in current sequence or current
2796 function. This routine looks inside SEQUENCEs. */
2799 get_last_nonnote_insn (void)
2801 rtx insn
= last_insn
;
2806 for (insn
= previous_insn (insn
);
2807 insn
&& NOTE_P (insn
);
2808 insn
= previous_insn (insn
))
2812 if (NONJUMP_INSN_P (insn
)
2813 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2814 insn
= XVECEXP (PATTERN (insn
), 0,
2815 XVECLEN (PATTERN (insn
), 0) - 1);
2822 /* Return a number larger than any instruction's uid in this function. */
2827 return cur_insn_uid
;
2830 /* Return the next insn. If it is a SEQUENCE, return the first insn
2834 next_insn (rtx insn
)
2838 insn
= NEXT_INSN (insn
);
2839 if (insn
&& NONJUMP_INSN_P (insn
)
2840 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2841 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2847 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2851 previous_insn (rtx insn
)
2855 insn
= PREV_INSN (insn
);
2856 if (insn
&& NONJUMP_INSN_P (insn
)
2857 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2858 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2864 /* Return the next insn after INSN that is not a NOTE. This routine does not
2865 look inside SEQUENCEs. */
2868 next_nonnote_insn (rtx insn
)
2872 insn
= NEXT_INSN (insn
);
2873 if (insn
== 0 || !NOTE_P (insn
))
2880 /* Return the previous insn before INSN that is not a NOTE. This routine does
2881 not look inside SEQUENCEs. */
2884 prev_nonnote_insn (rtx insn
)
2888 insn
= PREV_INSN (insn
);
2889 if (insn
== 0 || !NOTE_P (insn
))
2896 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2897 or 0, if there is none. This routine does not look inside
2901 next_real_insn (rtx insn
)
2905 insn
= NEXT_INSN (insn
);
2906 if (insn
== 0 || INSN_P (insn
))
2913 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2914 or 0, if there is none. This routine does not look inside
2918 prev_real_insn (rtx insn
)
2922 insn
= PREV_INSN (insn
);
2923 if (insn
== 0 || INSN_P (insn
))
2930 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2931 This routine does not look inside SEQUENCEs. */
2934 last_call_insn (void)
2938 for (insn
= get_last_insn ();
2939 insn
&& !CALL_P (insn
);
2940 insn
= PREV_INSN (insn
))
2946 /* Find the next insn after INSN that really does something. This routine
2947 does not look inside SEQUENCEs. Until reload has completed, this is the
2948 same as next_real_insn. */
2951 active_insn_p (const_rtx insn
)
2953 return (CALL_P (insn
) || JUMP_P (insn
)
2954 || (NONJUMP_INSN_P (insn
)
2955 && (! reload_completed
2956 || (GET_CODE (PATTERN (insn
)) != USE
2957 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2961 next_active_insn (rtx insn
)
2965 insn
= NEXT_INSN (insn
);
2966 if (insn
== 0 || active_insn_p (insn
))
2973 /* Find the last insn before INSN that really does something. This routine
2974 does not look inside SEQUENCEs. Until reload has completed, this is the
2975 same as prev_real_insn. */
2978 prev_active_insn (rtx insn
)
2982 insn
= PREV_INSN (insn
);
2983 if (insn
== 0 || active_insn_p (insn
))
2990 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2993 next_label (rtx insn
)
2997 insn
= NEXT_INSN (insn
);
2998 if (insn
== 0 || LABEL_P (insn
))
3005 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3008 prev_label (rtx insn
)
3012 insn
= PREV_INSN (insn
);
3013 if (insn
== 0 || LABEL_P (insn
))
3020 /* Return the last label to mark the same position as LABEL. Return null
3021 if LABEL itself is null. */
3024 skip_consecutive_labels (rtx label
)
3028 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3036 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3037 and REG_CC_USER notes so we can find it. */
3040 link_cc0_insns (rtx insn
)
3042 rtx user
= next_nonnote_insn (insn
);
3044 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3045 user
= XVECEXP (PATTERN (user
), 0, 0);
3047 add_reg_note (user
, REG_CC_SETTER
, insn
);
3048 add_reg_note (insn
, REG_CC_USER
, user
);
3051 /* Return the next insn that uses CC0 after INSN, which is assumed to
3052 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3053 applied to the result of this function should yield INSN).
3055 Normally, this is simply the next insn. However, if a REG_CC_USER note
3056 is present, it contains the insn that uses CC0.
3058 Return 0 if we can't find the insn. */
3061 next_cc0_user (rtx insn
)
3063 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3066 return XEXP (note
, 0);
3068 insn
= next_nonnote_insn (insn
);
3069 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3070 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3072 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3078 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3079 note, it is the previous insn. */
3082 prev_cc0_setter (rtx insn
)
3084 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3087 return XEXP (note
, 0);
3089 insn
= prev_nonnote_insn (insn
);
3090 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3097 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3100 find_auto_inc (rtx
*xp
, void *data
)
3103 rtx reg
= (rtx
) data
;
3105 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3108 switch (GET_CODE (x
))
3116 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3127 /* Increment the label uses for all labels present in rtx. */
3130 mark_label_nuses (rtx x
)
3136 code
= GET_CODE (x
);
3137 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3138 LABEL_NUSES (XEXP (x
, 0))++;
3140 fmt
= GET_RTX_FORMAT (code
);
3141 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3144 mark_label_nuses (XEXP (x
, i
));
3145 else if (fmt
[i
] == 'E')
3146 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3147 mark_label_nuses (XVECEXP (x
, i
, j
));
3152 /* Try splitting insns that can be split for better scheduling.
3153 PAT is the pattern which might split.
3154 TRIAL is the insn providing PAT.
3155 LAST is nonzero if we should return the last insn of the sequence produced.
3157 If this routine succeeds in splitting, it returns the first or last
3158 replacement insn depending on the value of LAST. Otherwise, it
3159 returns TRIAL. If the insn to be returned can be split, it will be. */
3162 try_split (rtx pat
, rtx trial
, int last
)
3164 rtx before
= PREV_INSN (trial
);
3165 rtx after
= NEXT_INSN (trial
);
3166 int has_barrier
= 0;
3169 rtx insn_last
, insn
;
3172 if (any_condjump_p (trial
)
3173 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3174 split_branch_probability
= INTVAL (XEXP (note
, 0));
3175 probability
= split_branch_probability
;
3177 seq
= split_insns (pat
, trial
);
3179 split_branch_probability
= -1;
3181 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3182 We may need to handle this specially. */
3183 if (after
&& BARRIER_P (after
))
3186 after
= NEXT_INSN (after
);
3192 /* Avoid infinite loop if any insn of the result matches
3193 the original pattern. */
3197 if (INSN_P (insn_last
)
3198 && rtx_equal_p (PATTERN (insn_last
), pat
))
3200 if (!NEXT_INSN (insn_last
))
3202 insn_last
= NEXT_INSN (insn_last
);
3205 /* We will be adding the new sequence to the function. The splitters
3206 may have introduced invalid RTL sharing, so unshare the sequence now. */
3207 unshare_all_rtl_in_chain (seq
);
3210 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3214 mark_jump_label (PATTERN (insn
), insn
, 0);
3216 if (probability
!= -1
3217 && any_condjump_p (insn
)
3218 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3220 /* We can preserve the REG_BR_PROB notes only if exactly
3221 one jump is created, otherwise the machine description
3222 is responsible for this step using
3223 split_branch_probability variable. */
3224 gcc_assert (njumps
== 1);
3225 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3230 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3231 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3234 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3237 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3240 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3241 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3245 /* Copy notes, particularly those related to the CFG. */
3246 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3248 switch (REG_NOTE_KIND (note
))
3251 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3254 || (flag_non_call_exceptions
&& INSN_P (insn
)
3255 && may_trap_p (PATTERN (insn
))))
3256 add_reg_note (insn
, REG_EH_REGION
, XEXP (note
, 0));
3262 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3265 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3269 case REG_NON_LOCAL_GOTO
:
3270 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3273 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3279 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3281 rtx reg
= XEXP (note
, 0);
3282 if (!FIND_REG_INC_NOTE (insn
, reg
)
3283 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3284 add_reg_note (insn
, REG_INC
, reg
);
3294 /* If there are LABELS inside the split insns increment the
3295 usage count so we don't delete the label. */
3299 while (insn
!= NULL_RTX
)
3301 /* JUMP_P insns have already been "marked" above. */
3302 if (NONJUMP_INSN_P (insn
))
3303 mark_label_nuses (PATTERN (insn
));
3305 insn
= PREV_INSN (insn
);
3309 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3311 delete_insn (trial
);
3313 emit_barrier_after (tem
);
3315 /* Recursively call try_split for each new insn created; by the
3316 time control returns here that insn will be fully split, so
3317 set LAST and continue from the insn after the one returned.
3318 We can't use next_active_insn here since AFTER may be a note.
3319 Ignore deleted insns, which can be occur if not optimizing. */
3320 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3321 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3322 tem
= try_split (PATTERN (tem
), tem
, 1);
3324 /* Return either the first or the last insn, depending on which was
3327 ? (after
? PREV_INSN (after
) : last_insn
)
3328 : NEXT_INSN (before
);
3331 /* Make and return an INSN rtx, initializing all its slots.
3332 Store PATTERN in the pattern slots. */
3335 make_insn_raw (rtx pattern
)
3339 insn
= rtx_alloc (INSN
);
3341 INSN_UID (insn
) = cur_insn_uid
++;
3342 PATTERN (insn
) = pattern
;
3343 INSN_CODE (insn
) = -1;
3344 REG_NOTES (insn
) = NULL
;
3345 INSN_LOCATOR (insn
) = curr_insn_locator ();
3346 BLOCK_FOR_INSN (insn
) = NULL
;
3348 #ifdef ENABLE_RTL_CHECKING
3351 && (returnjump_p (insn
)
3352 || (GET_CODE (insn
) == SET
3353 && SET_DEST (insn
) == pc_rtx
)))
3355 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3363 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3366 make_jump_insn_raw (rtx pattern
)
3370 insn
= rtx_alloc (JUMP_INSN
);
3371 INSN_UID (insn
) = cur_insn_uid
++;
3373 PATTERN (insn
) = pattern
;
3374 INSN_CODE (insn
) = -1;
3375 REG_NOTES (insn
) = NULL
;
3376 JUMP_LABEL (insn
) = NULL
;
3377 INSN_LOCATOR (insn
) = curr_insn_locator ();
3378 BLOCK_FOR_INSN (insn
) = NULL
;
3383 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3386 make_call_insn_raw (rtx pattern
)
3390 insn
= rtx_alloc (CALL_INSN
);
3391 INSN_UID (insn
) = cur_insn_uid
++;
3393 PATTERN (insn
) = pattern
;
3394 INSN_CODE (insn
) = -1;
3395 REG_NOTES (insn
) = NULL
;
3396 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3397 INSN_LOCATOR (insn
) = curr_insn_locator ();
3398 BLOCK_FOR_INSN (insn
) = NULL
;
3403 /* Add INSN to the end of the doubly-linked list.
3404 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3409 PREV_INSN (insn
) = last_insn
;
3410 NEXT_INSN (insn
) = 0;
3412 if (NULL
!= last_insn
)
3413 NEXT_INSN (last_insn
) = insn
;
3415 if (NULL
== first_insn
)
3421 /* Add INSN into the doubly-linked list after insn AFTER. This and
3422 the next should be the only functions called to insert an insn once
3423 delay slots have been filled since only they know how to update a
3427 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3429 rtx next
= NEXT_INSN (after
);
3431 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3433 NEXT_INSN (insn
) = next
;
3434 PREV_INSN (insn
) = after
;
3438 PREV_INSN (next
) = insn
;
3439 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3440 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3442 else if (last_insn
== after
)
3446 struct sequence_stack
*stack
= seq_stack
;
3447 /* Scan all pending sequences too. */
3448 for (; stack
; stack
= stack
->next
)
3449 if (after
== stack
->last
)
3458 if (!BARRIER_P (after
)
3459 && !BARRIER_P (insn
)
3460 && (bb
= BLOCK_FOR_INSN (after
)))
3462 set_block_for_insn (insn
, bb
);
3464 df_insn_rescan (insn
);
3465 /* Should not happen as first in the BB is always
3466 either NOTE or LABEL. */
3467 if (BB_END (bb
) == after
3468 /* Avoid clobbering of structure when creating new BB. */
3469 && !BARRIER_P (insn
)
3470 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3474 NEXT_INSN (after
) = insn
;
3475 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3477 rtx sequence
= PATTERN (after
);
3478 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3482 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3483 the previous should be the only functions called to insert an insn
3484 once delay slots have been filled since only they know how to
3485 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3489 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3491 rtx prev
= PREV_INSN (before
);
3493 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3495 PREV_INSN (insn
) = prev
;
3496 NEXT_INSN (insn
) = before
;
3500 NEXT_INSN (prev
) = insn
;
3501 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3503 rtx sequence
= PATTERN (prev
);
3504 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3507 else if (first_insn
== before
)
3511 struct sequence_stack
*stack
= seq_stack
;
3512 /* Scan all pending sequences too. */
3513 for (; stack
; stack
= stack
->next
)
3514 if (before
== stack
->first
)
3516 stack
->first
= insn
;
3524 && !BARRIER_P (before
)
3525 && !BARRIER_P (insn
))
3526 bb
= BLOCK_FOR_INSN (before
);
3530 set_block_for_insn (insn
, bb
);
3532 df_insn_rescan (insn
);
3533 /* Should not happen as first in the BB is always either NOTE or
3535 gcc_assert (BB_HEAD (bb
) != insn
3536 /* Avoid clobbering of structure when creating new BB. */
3538 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3541 PREV_INSN (before
) = insn
;
3542 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3543 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3547 /* Replace insn with an deleted instruction note. */
3549 void set_insn_deleted (rtx insn
)
3551 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3552 PUT_CODE (insn
, NOTE
);
3553 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3557 /* Remove an insn from its doubly-linked list. This function knows how
3558 to handle sequences. */
3560 remove_insn (rtx insn
)
3562 rtx next
= NEXT_INSN (insn
);
3563 rtx prev
= PREV_INSN (insn
);
3566 /* Later in the code, the block will be marked dirty. */
3567 df_insn_delete (NULL
, INSN_UID (insn
));
3571 NEXT_INSN (prev
) = next
;
3572 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3574 rtx sequence
= PATTERN (prev
);
3575 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3578 else if (first_insn
== insn
)
3582 struct sequence_stack
*stack
= seq_stack
;
3583 /* Scan all pending sequences too. */
3584 for (; stack
; stack
= stack
->next
)
3585 if (insn
== stack
->first
)
3587 stack
->first
= next
;
3596 PREV_INSN (next
) = prev
;
3597 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3598 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3600 else if (last_insn
== insn
)
3604 struct sequence_stack
*stack
= seq_stack
;
3605 /* Scan all pending sequences too. */
3606 for (; stack
; stack
= stack
->next
)
3607 if (insn
== stack
->last
)
3615 if (!BARRIER_P (insn
)
3616 && (bb
= BLOCK_FOR_INSN (insn
)))
3619 df_set_bb_dirty (bb
);
3620 if (BB_HEAD (bb
) == insn
)
3622 /* Never ever delete the basic block note without deleting whole
3624 gcc_assert (!NOTE_P (insn
));
3625 BB_HEAD (bb
) = next
;
3627 if (BB_END (bb
) == insn
)
3632 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3635 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3637 gcc_assert (call_insn
&& CALL_P (call_insn
));
3639 /* Put the register usage information on the CALL. If there is already
3640 some usage information, put ours at the end. */
3641 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3645 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3646 link
= XEXP (link
, 1))
3649 XEXP (link
, 1) = call_fusage
;
3652 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3655 /* Delete all insns made since FROM.
3656 FROM becomes the new last instruction. */
3659 delete_insns_since (rtx from
)
3664 NEXT_INSN (from
) = 0;
3668 /* This function is deprecated, please use sequences instead.
3670 Move a consecutive bunch of insns to a different place in the chain.
3671 The insns to be moved are those between FROM and TO.
3672 They are moved to a new position after the insn AFTER.
3673 AFTER must not be FROM or TO or any insn in between.
3675 This function does not know about SEQUENCEs and hence should not be
3676 called after delay-slot filling has been done. */
3679 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3681 /* Splice this bunch out of where it is now. */
3682 if (PREV_INSN (from
))
3683 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3685 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3686 if (last_insn
== to
)
3687 last_insn
= PREV_INSN (from
);
3688 if (first_insn
== from
)
3689 first_insn
= NEXT_INSN (to
);
3691 /* Make the new neighbors point to it and it to them. */
3692 if (NEXT_INSN (after
))
3693 PREV_INSN (NEXT_INSN (after
)) = to
;
3695 NEXT_INSN (to
) = NEXT_INSN (after
);
3696 PREV_INSN (from
) = after
;
3697 NEXT_INSN (after
) = from
;
3698 if (after
== last_insn
)
3702 /* Same as function above, but take care to update BB boundaries. */
3704 reorder_insns (rtx from
, rtx to
, rtx after
)
3706 rtx prev
= PREV_INSN (from
);
3707 basic_block bb
, bb2
;
3709 reorder_insns_nobb (from
, to
, after
);
3711 if (!BARRIER_P (after
)
3712 && (bb
= BLOCK_FOR_INSN (after
)))
3715 df_set_bb_dirty (bb
);
3717 if (!BARRIER_P (from
)
3718 && (bb2
= BLOCK_FOR_INSN (from
)))
3720 if (BB_END (bb2
) == to
)
3721 BB_END (bb2
) = prev
;
3722 df_set_bb_dirty (bb2
);
3725 if (BB_END (bb
) == after
)
3728 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3730 df_insn_change_bb (x
, bb
);
3735 /* Emit insn(s) of given code and pattern
3736 at a specified place within the doubly-linked list.
3738 All of the emit_foo global entry points accept an object
3739 X which is either an insn list or a PATTERN of a single
3742 There are thus a few canonical ways to generate code and
3743 emit it at a specific place in the instruction stream. For
3744 example, consider the instruction named SPOT and the fact that
3745 we would like to emit some instructions before SPOT. We might
3749 ... emit the new instructions ...
3750 insns_head = get_insns ();
3753 emit_insn_before (insns_head, SPOT);
3755 It used to be common to generate SEQUENCE rtl instead, but that
3756 is a relic of the past which no longer occurs. The reason is that
3757 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3758 generated would almost certainly die right after it was created. */
3760 /* Make X be output before the instruction BEFORE. */
3763 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
3768 gcc_assert (before
);
3773 switch (GET_CODE (x
))
3784 rtx next
= NEXT_INSN (insn
);
3785 add_insn_before (insn
, before
, bb
);
3791 #ifdef ENABLE_RTL_CHECKING
3798 last
= make_insn_raw (x
);
3799 add_insn_before (last
, before
, bb
);
3806 /* Make an instruction with body X and code JUMP_INSN
3807 and output it before the instruction BEFORE. */
3810 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3812 rtx insn
, last
= NULL_RTX
;
3814 gcc_assert (before
);
3816 switch (GET_CODE (x
))
3827 rtx next
= NEXT_INSN (insn
);
3828 add_insn_before (insn
, before
, NULL
);
3834 #ifdef ENABLE_RTL_CHECKING
3841 last
= make_jump_insn_raw (x
);
3842 add_insn_before (last
, before
, NULL
);
3849 /* Make an instruction with body X and code CALL_INSN
3850 and output it before the instruction BEFORE. */
3853 emit_call_insn_before_noloc (rtx x
, rtx before
)
3855 rtx last
= NULL_RTX
, insn
;
3857 gcc_assert (before
);
3859 switch (GET_CODE (x
))
3870 rtx next
= NEXT_INSN (insn
);
3871 add_insn_before (insn
, before
, NULL
);
3877 #ifdef ENABLE_RTL_CHECKING
3884 last
= make_call_insn_raw (x
);
3885 add_insn_before (last
, before
, NULL
);
3892 /* Make an insn of code BARRIER
3893 and output it before the insn BEFORE. */
3896 emit_barrier_before (rtx before
)
3898 rtx insn
= rtx_alloc (BARRIER
);
3900 INSN_UID (insn
) = cur_insn_uid
++;
3902 add_insn_before (insn
, before
, NULL
);
3906 /* Emit the label LABEL before the insn BEFORE. */
3909 emit_label_before (rtx label
, rtx before
)
3911 /* This can be called twice for the same label as a result of the
3912 confusion that follows a syntax error! So make it harmless. */
3913 if (INSN_UID (label
) == 0)
3915 INSN_UID (label
) = cur_insn_uid
++;
3916 add_insn_before (label
, before
, NULL
);
3922 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3925 emit_note_before (enum insn_note subtype
, rtx before
)
3927 rtx note
= rtx_alloc (NOTE
);
3928 INSN_UID (note
) = cur_insn_uid
++;
3929 NOTE_KIND (note
) = subtype
;
3930 BLOCK_FOR_INSN (note
) = NULL
;
3931 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3933 add_insn_before (note
, before
, NULL
);
3937 /* Helper for emit_insn_after, handles lists of instructions
3941 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
3945 if (!bb
&& !BARRIER_P (after
))
3946 bb
= BLOCK_FOR_INSN (after
);
3950 df_set_bb_dirty (bb
);
3951 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3952 if (!BARRIER_P (last
))
3954 set_block_for_insn (last
, bb
);
3955 df_insn_rescan (last
);
3957 if (!BARRIER_P (last
))
3959 set_block_for_insn (last
, bb
);
3960 df_insn_rescan (last
);
3962 if (BB_END (bb
) == after
)
3966 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3969 after_after
= NEXT_INSN (after
);
3971 NEXT_INSN (after
) = first
;
3972 PREV_INSN (first
) = after
;
3973 NEXT_INSN (last
) = after_after
;
3975 PREV_INSN (after_after
) = last
;
3977 if (after
== last_insn
)
3982 /* Make X be output after the insn AFTER and set the BB of insn. If
3983 BB is NULL, an attempt is made to infer the BB from AFTER. */
3986 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
3995 switch (GET_CODE (x
))
4003 last
= emit_insn_after_1 (x
, after
, bb
);
4006 #ifdef ENABLE_RTL_CHECKING
4013 last
= make_insn_raw (x
);
4014 add_insn_after (last
, after
, bb
);
4022 /* Make an insn of code JUMP_INSN with body X
4023 and output it after the insn AFTER. */
4026 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4032 switch (GET_CODE (x
))
4040 last
= emit_insn_after_1 (x
, after
, NULL
);
4043 #ifdef ENABLE_RTL_CHECKING
4050 last
= make_jump_insn_raw (x
);
4051 add_insn_after (last
, after
, NULL
);
4058 /* Make an instruction with body X and code CALL_INSN
4059 and output it after the instruction AFTER. */
4062 emit_call_insn_after_noloc (rtx x
, rtx after
)
4068 switch (GET_CODE (x
))
4076 last
= emit_insn_after_1 (x
, after
, NULL
);
4079 #ifdef ENABLE_RTL_CHECKING
4086 last
= make_call_insn_raw (x
);
4087 add_insn_after (last
, after
, NULL
);
4094 /* Make an insn of code BARRIER
4095 and output it after the insn AFTER. */
4098 emit_barrier_after (rtx after
)
4100 rtx insn
= rtx_alloc (BARRIER
);
4102 INSN_UID (insn
) = cur_insn_uid
++;
4104 add_insn_after (insn
, after
, NULL
);
4108 /* Emit the label LABEL after the insn AFTER. */
4111 emit_label_after (rtx label
, rtx after
)
4113 /* This can be called twice for the same label
4114 as a result of the confusion that follows a syntax error!
4115 So make it harmless. */
4116 if (INSN_UID (label
) == 0)
4118 INSN_UID (label
) = cur_insn_uid
++;
4119 add_insn_after (label
, after
, NULL
);
4125 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4128 emit_note_after (enum insn_note subtype
, rtx after
)
4130 rtx note
= rtx_alloc (NOTE
);
4131 INSN_UID (note
) = cur_insn_uid
++;
4132 NOTE_KIND (note
) = subtype
;
4133 BLOCK_FOR_INSN (note
) = NULL
;
4134 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4135 add_insn_after (note
, after
, NULL
);
4139 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4141 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4143 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4145 if (pattern
== NULL_RTX
|| !loc
)
4148 after
= NEXT_INSN (after
);
4151 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4152 INSN_LOCATOR (after
) = loc
;
4155 after
= NEXT_INSN (after
);
4160 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4162 emit_insn_after (rtx pattern
, rtx after
)
4165 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4167 return emit_insn_after_noloc (pattern
, after
, NULL
);
4170 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4172 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4174 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4176 if (pattern
== NULL_RTX
|| !loc
)
4179 after
= NEXT_INSN (after
);
4182 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4183 INSN_LOCATOR (after
) = loc
;
4186 after
= NEXT_INSN (after
);
4191 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4193 emit_jump_insn_after (rtx pattern
, rtx after
)
4196 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4198 return emit_jump_insn_after_noloc (pattern
, after
);
4201 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4203 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4205 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4207 if (pattern
== NULL_RTX
|| !loc
)
4210 after
= NEXT_INSN (after
);
4213 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4214 INSN_LOCATOR (after
) = loc
;
4217 after
= NEXT_INSN (after
);
4222 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4224 emit_call_insn_after (rtx pattern
, rtx after
)
4227 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4229 return emit_call_insn_after_noloc (pattern
, after
);
4232 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4234 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4236 rtx first
= PREV_INSN (before
);
4237 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4239 if (pattern
== NULL_RTX
|| !loc
)
4243 first
= get_insns ();
4245 first
= NEXT_INSN (first
);
4248 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4249 INSN_LOCATOR (first
) = loc
;
4252 first
= NEXT_INSN (first
);
4257 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4259 emit_insn_before (rtx pattern
, rtx before
)
4261 if (INSN_P (before
))
4262 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4264 return emit_insn_before_noloc (pattern
, before
, NULL
);
4267 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4269 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4271 rtx first
= PREV_INSN (before
);
4272 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4274 if (pattern
== NULL_RTX
)
4277 first
= NEXT_INSN (first
);
4280 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4281 INSN_LOCATOR (first
) = loc
;
4284 first
= NEXT_INSN (first
);
4289 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4291 emit_jump_insn_before (rtx pattern
, rtx before
)
4293 if (INSN_P (before
))
4294 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4296 return emit_jump_insn_before_noloc (pattern
, before
);
4299 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4301 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4303 rtx first
= PREV_INSN (before
);
4304 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4306 if (pattern
== NULL_RTX
)
4309 first
= NEXT_INSN (first
);
4312 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4313 INSN_LOCATOR (first
) = loc
;
4316 first
= NEXT_INSN (first
);
4321 /* like emit_call_insn_before_noloc,
4322 but set insn_locator according to before. */
4324 emit_call_insn_before (rtx pattern
, rtx before
)
4326 if (INSN_P (before
))
4327 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4329 return emit_call_insn_before_noloc (pattern
, before
);
4332 /* Take X and emit it at the end of the doubly-linked
4335 Returns the last insn emitted. */
4340 rtx last
= last_insn
;
4346 switch (GET_CODE (x
))
4357 rtx next
= NEXT_INSN (insn
);
4364 #ifdef ENABLE_RTL_CHECKING
4371 last
= make_insn_raw (x
);
4379 /* Make an insn of code JUMP_INSN with pattern X
4380 and add it to the end of the doubly-linked list. */
4383 emit_jump_insn (rtx x
)
4385 rtx last
= NULL_RTX
, insn
;
4387 switch (GET_CODE (x
))
4398 rtx next
= NEXT_INSN (insn
);
4405 #ifdef ENABLE_RTL_CHECKING
4412 last
= make_jump_insn_raw (x
);
4420 /* Make an insn of code CALL_INSN with pattern X
4421 and add it to the end of the doubly-linked list. */
4424 emit_call_insn (rtx x
)
4428 switch (GET_CODE (x
))
4436 insn
= emit_insn (x
);
4439 #ifdef ENABLE_RTL_CHECKING
4446 insn
= make_call_insn_raw (x
);
4454 /* Add the label LABEL to the end of the doubly-linked list. */
4457 emit_label (rtx label
)
4459 /* This can be called twice for the same label
4460 as a result of the confusion that follows a syntax error!
4461 So make it harmless. */
4462 if (INSN_UID (label
) == 0)
4464 INSN_UID (label
) = cur_insn_uid
++;
4470 /* Make an insn of code BARRIER
4471 and add it to the end of the doubly-linked list. */
4476 rtx barrier
= rtx_alloc (BARRIER
);
4477 INSN_UID (barrier
) = cur_insn_uid
++;
4482 /* Emit a copy of note ORIG. */
4485 emit_note_copy (rtx orig
)
4489 note
= rtx_alloc (NOTE
);
4491 INSN_UID (note
) = cur_insn_uid
++;
4492 NOTE_DATA (note
) = NOTE_DATA (orig
);
4493 NOTE_KIND (note
) = NOTE_KIND (orig
);
4494 BLOCK_FOR_INSN (note
) = NULL
;
4500 /* Make an insn of code NOTE or type NOTE_NO
4501 and add it to the end of the doubly-linked list. */
4504 emit_note (enum insn_note kind
)
4508 note
= rtx_alloc (NOTE
);
4509 INSN_UID (note
) = cur_insn_uid
++;
4510 NOTE_KIND (note
) = kind
;
4511 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4512 BLOCK_FOR_INSN (note
) = NULL
;
4517 /* Emit a clobber of lvalue X. */
4520 emit_clobber (rtx x
)
4522 /* CONCATs should not appear in the insn stream. */
4523 if (GET_CODE (x
) == CONCAT
)
4525 emit_clobber (XEXP (x
, 0));
4526 return emit_clobber (XEXP (x
, 1));
4528 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4531 /* Return a sequence of insns to clobber lvalue X. */
4545 /* Emit a use of rvalue X. */
4550 /* CONCATs should not appear in the insn stream. */
4551 if (GET_CODE (x
) == CONCAT
)
4553 emit_use (XEXP (x
, 0));
4554 return emit_use (XEXP (x
, 1));
4556 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4559 /* Return a sequence of insns to use rvalue X. */
4573 /* Cause next statement to emit a line note even if the line number
4577 force_next_line_note (void)
4582 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4583 note of this type already exists, remove it first. */
4586 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4588 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4594 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4595 has multiple sets (some callers assume single_set
4596 means the insn only has one set, when in fact it
4597 means the insn only has one * useful * set). */
4598 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4604 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4605 It serves no useful purpose and breaks eliminate_regs. */
4606 if (GET_CODE (datum
) == ASM_OPERANDS
)
4611 XEXP (note
, 0) = datum
;
4612 df_notes_rescan (insn
);
4620 XEXP (note
, 0) = datum
;
4626 add_reg_note (insn
, kind
, datum
);
4632 df_notes_rescan (insn
);
4638 return REG_NOTES (insn
);
4641 /* Return an indication of which type of insn should have X as a body.
4642 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4644 static enum rtx_code
4645 classify_insn (rtx x
)
4649 if (GET_CODE (x
) == CALL
)
4651 if (GET_CODE (x
) == RETURN
)
4653 if (GET_CODE (x
) == SET
)
4655 if (SET_DEST (x
) == pc_rtx
)
4657 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4662 if (GET_CODE (x
) == PARALLEL
)
4665 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4666 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4668 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4669 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4671 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4672 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4678 /* Emit the rtl pattern X as an appropriate kind of insn.
4679 If X is a label, it is simply added into the insn chain. */
4684 enum rtx_code code
= classify_insn (x
);
4689 return emit_label (x
);
4691 return emit_insn (x
);
4694 rtx insn
= emit_jump_insn (x
);
4695 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4696 return emit_barrier ();
4700 return emit_call_insn (x
);
4706 /* Space for free sequence stack entries. */
4707 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4709 /* Begin emitting insns to a sequence. If this sequence will contain
4710 something that might cause the compiler to pop arguments to function
4711 calls (because those pops have previously been deferred; see
4712 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4713 before calling this function. That will ensure that the deferred
4714 pops are not accidentally emitted in the middle of this sequence. */
4717 start_sequence (void)
4719 struct sequence_stack
*tem
;
4721 if (free_sequence_stack
!= NULL
)
4723 tem
= free_sequence_stack
;
4724 free_sequence_stack
= tem
->next
;
4727 tem
= GGC_NEW (struct sequence_stack
);
4729 tem
->next
= seq_stack
;
4730 tem
->first
= first_insn
;
4731 tem
->last
= last_insn
;
4739 /* Set up the insn chain starting with FIRST as the current sequence,
4740 saving the previously current one. See the documentation for
4741 start_sequence for more information about how to use this function. */
4744 push_to_sequence (rtx first
)
4750 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4756 /* Like push_to_sequence, but take the last insn as an argument to avoid
4757 looping through the list. */
4760 push_to_sequence2 (rtx first
, rtx last
)
4768 /* Set up the outer-level insn chain
4769 as the current sequence, saving the previously current one. */
4772 push_topmost_sequence (void)
4774 struct sequence_stack
*stack
, *top
= NULL
;
4778 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4781 first_insn
= top
->first
;
4782 last_insn
= top
->last
;
4785 /* After emitting to the outer-level insn chain, update the outer-level
4786 insn chain, and restore the previous saved state. */
4789 pop_topmost_sequence (void)
4791 struct sequence_stack
*stack
, *top
= NULL
;
4793 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4796 top
->first
= first_insn
;
4797 top
->last
= last_insn
;
4802 /* After emitting to a sequence, restore previous saved state.
4804 To get the contents of the sequence just made, you must call
4805 `get_insns' *before* calling here.
4807 If the compiler might have deferred popping arguments while
4808 generating this sequence, and this sequence will not be immediately
4809 inserted into the instruction stream, use do_pending_stack_adjust
4810 before calling get_insns. That will ensure that the deferred
4811 pops are inserted into this sequence, and not into some random
4812 location in the instruction stream. See INHIBIT_DEFER_POP for more
4813 information about deferred popping of arguments. */
4818 struct sequence_stack
*tem
= seq_stack
;
4820 first_insn
= tem
->first
;
4821 last_insn
= tem
->last
;
4822 seq_stack
= tem
->next
;
4824 memset (tem
, 0, sizeof (*tem
));
4825 tem
->next
= free_sequence_stack
;
4826 free_sequence_stack
= tem
;
4829 /* Return 1 if currently emitting into a sequence. */
4832 in_sequence_p (void)
4834 return seq_stack
!= 0;
4837 /* Put the various virtual registers into REGNO_REG_RTX. */
4840 init_virtual_regs (void)
4842 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4843 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4844 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4845 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4846 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4850 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4851 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4852 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4853 static int copy_insn_n_scratches
;
4855 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4856 copied an ASM_OPERANDS.
4857 In that case, it is the original input-operand vector. */
4858 static rtvec orig_asm_operands_vector
;
4860 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4861 copied an ASM_OPERANDS.
4862 In that case, it is the copied input-operand vector. */
4863 static rtvec copy_asm_operands_vector
;
4865 /* Likewise for the constraints vector. */
4866 static rtvec orig_asm_constraints_vector
;
4867 static rtvec copy_asm_constraints_vector
;
4869 /* Recursively create a new copy of an rtx for copy_insn.
4870 This function differs from copy_rtx in that it handles SCRATCHes and
4871 ASM_OPERANDs properly.
4872 Normally, this function is not used directly; use copy_insn as front end.
4873 However, you could first copy an insn pattern with copy_insn and then use
4874 this function afterwards to properly copy any REG_NOTEs containing
4878 copy_insn_1 (rtx orig
)
4883 const char *format_ptr
;
4885 code
= GET_CODE (orig
);
4900 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4905 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4906 if (copy_insn_scratch_in
[i
] == orig
)
4907 return copy_insn_scratch_out
[i
];
4911 if (shared_const_p (orig
))
4915 /* A MEM with a constant address is not sharable. The problem is that
4916 the constant address may need to be reloaded. If the mem is shared,
4917 then reloading one copy of this mem will cause all copies to appear
4918 to have been reloaded. */
4924 /* Copy the various flags, fields, and other information. We assume
4925 that all fields need copying, and then clear the fields that should
4926 not be copied. That is the sensible default behavior, and forces
4927 us to explicitly document why we are *not* copying a flag. */
4928 copy
= shallow_copy_rtx (orig
);
4930 /* We do not copy the USED flag, which is used as a mark bit during
4931 walks over the RTL. */
4932 RTX_FLAG (copy
, used
) = 0;
4934 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4937 RTX_FLAG (copy
, jump
) = 0;
4938 RTX_FLAG (copy
, call
) = 0;
4939 RTX_FLAG (copy
, frame_related
) = 0;
4942 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4944 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4945 switch (*format_ptr
++)
4948 if (XEXP (orig
, i
) != NULL
)
4949 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4954 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4955 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4956 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4957 XVEC (copy
, i
) = copy_asm_operands_vector
;
4958 else if (XVEC (orig
, i
) != NULL
)
4960 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4961 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4962 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4973 /* These are left unchanged. */
4980 if (code
== SCRATCH
)
4982 i
= copy_insn_n_scratches
++;
4983 gcc_assert (i
< MAX_RECOG_OPERANDS
);
4984 copy_insn_scratch_in
[i
] = orig
;
4985 copy_insn_scratch_out
[i
] = copy
;
4987 else if (code
== ASM_OPERANDS
)
4989 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4990 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4991 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4992 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4998 /* Create a new copy of an rtx.
4999 This function differs from copy_rtx in that it handles SCRATCHes and
5000 ASM_OPERANDs properly.
5001 INSN doesn't really have to be a full INSN; it could be just the
5004 copy_insn (rtx insn
)
5006 copy_insn_n_scratches
= 0;
5007 orig_asm_operands_vector
= 0;
5008 orig_asm_constraints_vector
= 0;
5009 copy_asm_operands_vector
= 0;
5010 copy_asm_constraints_vector
= 0;
5011 return copy_insn_1 (insn
);
5014 /* Initialize data structures and variables in this file
5015 before generating rtl for each function. */
5023 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5024 last_location
= UNKNOWN_LOCATION
;
5025 first_label_num
= label_num
;
5028 /* Init the tables that describe all the pseudo regs. */
5030 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5032 crtl
->emit
.regno_pointer_align
5033 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5036 = GGC_NEWVEC (rtx
, crtl
->emit
.regno_pointer_align_length
);
5038 /* Put copies of all the hard registers into regno_reg_rtx. */
5039 memcpy (regno_reg_rtx
,
5040 static_regno_reg_rtx
,
5041 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5043 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5044 init_virtual_regs ();
5046 /* Indicate that the virtual registers and stack locations are
5048 REG_POINTER (stack_pointer_rtx
) = 1;
5049 REG_POINTER (frame_pointer_rtx
) = 1;
5050 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5051 REG_POINTER (arg_pointer_rtx
) = 1;
5053 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5054 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5055 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5056 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5057 REG_POINTER (virtual_cfa_rtx
) = 1;
5059 #ifdef STACK_BOUNDARY
5060 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5061 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5062 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5063 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5065 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5066 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5067 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5068 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5069 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5072 #ifdef INIT_EXPANDERS
5077 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5080 gen_const_vector (enum machine_mode mode
, int constant
)
5085 enum machine_mode inner
;
5087 units
= GET_MODE_NUNITS (mode
);
5088 inner
= GET_MODE_INNER (mode
);
5090 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5092 v
= rtvec_alloc (units
);
5094 /* We need to call this function after we set the scalar const_tiny_rtx
5096 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5098 for (i
= 0; i
< units
; ++i
)
5099 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5101 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5105 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5106 all elements are zero, and the one vector when all elements are one. */
5108 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5110 enum machine_mode inner
= GET_MODE_INNER (mode
);
5111 int nunits
= GET_MODE_NUNITS (mode
);
5115 /* Check to see if all of the elements have the same value. */
5116 x
= RTVEC_ELT (v
, nunits
- 1);
5117 for (i
= nunits
- 2; i
>= 0; i
--)
5118 if (RTVEC_ELT (v
, i
) != x
)
5121 /* If the values are all the same, check to see if we can use one of the
5122 standard constant vectors. */
5125 if (x
== CONST0_RTX (inner
))
5126 return CONST0_RTX (mode
);
5127 else if (x
== CONST1_RTX (inner
))
5128 return CONST1_RTX (mode
);
5131 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5134 /* Initialise global register information required by all functions. */
5137 init_emit_regs (void)
5141 /* Reset register attributes */
5142 htab_empty (reg_attrs_htab
);
5144 /* We need reg_raw_mode, so initialize the modes now. */
5145 init_reg_modes_target ();
5147 /* Assign register numbers to the globally defined register rtx. */
5148 pc_rtx
= gen_rtx_PC (VOIDmode
);
5149 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5150 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5151 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5152 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5153 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5154 virtual_incoming_args_rtx
=
5155 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5156 virtual_stack_vars_rtx
=
5157 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5158 virtual_stack_dynamic_rtx
=
5159 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5160 virtual_outgoing_args_rtx
=
5161 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5162 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5164 /* Initialize RTL for commonly used hard registers. These are
5165 copied into regno_reg_rtx as we begin to compile each function. */
5166 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5167 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5169 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5170 return_address_pointer_rtx
5171 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5174 #ifdef STATIC_CHAIN_REGNUM
5175 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5177 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5178 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5179 static_chain_incoming_rtx
5180 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5183 static_chain_incoming_rtx
= static_chain_rtx
;
5187 static_chain_rtx
= STATIC_CHAIN
;
5189 #ifdef STATIC_CHAIN_INCOMING
5190 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5192 static_chain_incoming_rtx
= static_chain_rtx
;
5196 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5197 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5199 pic_offset_table_rtx
= NULL_RTX
;
5202 /* Create some permanent unique rtl objects shared between all functions.
5203 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5206 init_emit_once (int line_numbers
)
5209 enum machine_mode mode
;
5210 enum machine_mode double_mode
;
5212 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5214 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5215 const_int_htab_eq
, NULL
);
5217 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5218 const_double_htab_eq
, NULL
);
5220 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5221 const_fixed_htab_eq
, NULL
);
5223 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5224 mem_attrs_htab_eq
, NULL
);
5225 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5226 reg_attrs_htab_eq
, NULL
);
5228 no_line_numbers
= ! line_numbers
;
5230 /* Compute the word and byte modes. */
5232 byte_mode
= VOIDmode
;
5233 word_mode
= VOIDmode
;
5234 double_mode
= VOIDmode
;
5236 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5238 mode
= GET_MODE_WIDER_MODE (mode
))
5240 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5241 && byte_mode
== VOIDmode
)
5244 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5245 && word_mode
== VOIDmode
)
5249 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5251 mode
= GET_MODE_WIDER_MODE (mode
))
5253 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5254 && double_mode
== VOIDmode
)
5258 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5260 #ifdef INIT_EXPANDERS
5261 /* This is to initialize {init|mark|free}_machine_status before the first
5262 call to push_function_context_to. This is needed by the Chill front
5263 end which calls push_function_context_to before the first call to
5264 init_function_start. */
5268 /* Create the unique rtx's for certain rtx codes and operand values. */
5270 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5271 tries to use these variables. */
5272 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5273 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5274 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5276 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5277 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5278 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5280 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5282 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5283 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5284 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5289 dconsthalf
= dconst1
;
5290 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5292 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5294 const REAL_VALUE_TYPE
*const r
=
5295 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5297 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5299 mode
= GET_MODE_WIDER_MODE (mode
))
5300 const_tiny_rtx
[i
][(int) mode
] =
5301 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5303 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5305 mode
= GET_MODE_WIDER_MODE (mode
))
5306 const_tiny_rtx
[i
][(int) mode
] =
5307 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5309 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5311 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5313 mode
= GET_MODE_WIDER_MODE (mode
))
5314 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5316 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5318 mode
= GET_MODE_WIDER_MODE (mode
))
5319 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5322 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5324 mode
= GET_MODE_WIDER_MODE (mode
))
5326 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5327 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5330 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5332 mode
= GET_MODE_WIDER_MODE (mode
))
5334 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5335 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5338 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5340 mode
= GET_MODE_WIDER_MODE (mode
))
5342 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5343 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5346 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5348 mode
= GET_MODE_WIDER_MODE (mode
))
5350 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5351 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5354 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5356 mode
= GET_MODE_WIDER_MODE (mode
))
5358 FCONST0(mode
).data
.high
= 0;
5359 FCONST0(mode
).data
.low
= 0;
5360 FCONST0(mode
).mode
= mode
;
5361 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5362 FCONST0 (mode
), mode
);
5365 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5367 mode
= GET_MODE_WIDER_MODE (mode
))
5369 FCONST0(mode
).data
.high
= 0;
5370 FCONST0(mode
).data
.low
= 0;
5371 FCONST0(mode
).mode
= mode
;
5372 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5373 FCONST0 (mode
), mode
);
5376 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5378 mode
= GET_MODE_WIDER_MODE (mode
))
5380 FCONST0(mode
).data
.high
= 0;
5381 FCONST0(mode
).data
.low
= 0;
5382 FCONST0(mode
).mode
= mode
;
5383 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5384 FCONST0 (mode
), mode
);
5386 /* We store the value 1. */
5387 FCONST1(mode
).data
.high
= 0;
5388 FCONST1(mode
).data
.low
= 0;
5389 FCONST1(mode
).mode
= mode
;
5390 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5391 2 * HOST_BITS_PER_WIDE_INT
,
5392 &FCONST1(mode
).data
.low
,
5393 &FCONST1(mode
).data
.high
,
5394 SIGNED_FIXED_POINT_MODE_P (mode
));
5395 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5396 FCONST1 (mode
), mode
);
5399 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5401 mode
= GET_MODE_WIDER_MODE (mode
))
5403 FCONST0(mode
).data
.high
= 0;
5404 FCONST0(mode
).data
.low
= 0;
5405 FCONST0(mode
).mode
= mode
;
5406 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5407 FCONST0 (mode
), mode
);
5409 /* We store the value 1. */
5410 FCONST1(mode
).data
.high
= 0;
5411 FCONST1(mode
).data
.low
= 0;
5412 FCONST1(mode
).mode
= mode
;
5413 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5414 2 * HOST_BITS_PER_WIDE_INT
,
5415 &FCONST1(mode
).data
.low
,
5416 &FCONST1(mode
).data
.high
,
5417 SIGNED_FIXED_POINT_MODE_P (mode
));
5418 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5419 FCONST1 (mode
), mode
);
5422 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5424 mode
= GET_MODE_WIDER_MODE (mode
))
5426 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5429 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5431 mode
= GET_MODE_WIDER_MODE (mode
))
5433 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5436 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5438 mode
= GET_MODE_WIDER_MODE (mode
))
5440 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5441 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5444 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5446 mode
= GET_MODE_WIDER_MODE (mode
))
5448 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5449 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5452 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5453 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5454 const_tiny_rtx
[0][i
] = const0_rtx
;
5456 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5457 if (STORE_FLAG_VALUE
== 1)
5458 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5461 /* Produce exact duplicate of insn INSN after AFTER.
5462 Care updating of libcall regions if present. */
5465 emit_copy_of_insn_after (rtx insn
, rtx after
)
5469 switch (GET_CODE (insn
))
5472 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5476 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5480 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5481 if (CALL_INSN_FUNCTION_USAGE (insn
))
5482 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5483 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5484 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5485 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5486 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5487 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5488 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5495 /* Update LABEL_NUSES. */
5496 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5498 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5500 /* If the old insn is frame related, then so is the new one. This is
5501 primarily needed for IA-64 unwind info which marks epilogue insns,
5502 which may be duplicated by the basic block reordering code. */
5503 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5505 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5506 will make them. REG_LABEL_TARGETs are created there too, but are
5507 supposed to be sticky, so we copy them. */
5508 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5509 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5511 if (GET_CODE (link
) == EXPR_LIST
)
5512 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5513 copy_insn_1 (XEXP (link
, 0)));
5515 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5518 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5522 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5524 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5526 if (hard_reg_clobbers
[mode
][regno
])
5527 return hard_reg_clobbers
[mode
][regno
];
5529 return (hard_reg_clobbers
[mode
][regno
] =
5530 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5533 #include "gt-emit-rtl.h"