1 /* Copyright (C) 2016-2019 Free Software Foundation, Inc.
3 This file is free software; you can redistribute it and/or modify it under
4 the terms of the GNU General Public License as published by the Free
5 Software Foundation; either version 3 of the License, or (at your option)
8 This file is distributed in the hope that it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 You should have received a copy of the GNU General Public License
14 along with GCC; see the file COPYING3. If not see
15 <http://www.gnu.org/licenses/>. */
20 extern void gcn_asm_output_symbol_ref (FILE *file
, rtx x
);
21 extern tree
gcn_builtin_decl (unsigned code
, bool initialize_p
);
22 extern bool gcn_can_split_p (machine_mode
, rtx
);
23 extern bool gcn_constant64_p (rtx
);
24 extern bool gcn_constant_p (rtx
);
25 extern rtx
gcn_convert_mask_mode (rtx reg
);
26 extern char * gcn_expand_dpp_shr_insn (machine_mode
, const char *, int, int);
27 extern void gcn_expand_epilogue ();
28 extern rtx
gcn_expand_scaled_offsets (addr_space_t as
, rtx base
, rtx offsets
,
29 rtx scale
, bool unsigned_p
, rtx exec
);
30 extern void gcn_expand_prologue ();
31 extern rtx
gcn_expand_reduc_scalar (machine_mode
, rtx
, int);
32 extern rtx
gcn_expand_scalar_to_vector_address (machine_mode
, rtx
, rtx
, rtx
);
33 extern void gcn_expand_vector_init (rtx
, rtx
);
34 extern bool gcn_flat_address_p (rtx
, machine_mode
);
35 extern bool gcn_fp_constant_p (rtx
, bool);
36 extern rtx
gcn_full_exec ();
37 extern rtx
gcn_full_exec_reg ();
38 extern rtx
gcn_gen_undef (machine_mode
);
39 extern bool gcn_global_address_p (rtx
);
40 extern tree
gcn_goacc_adjust_propagation_record (tree record_type
, bool sender
,
42 extern void gcn_goacc_adjust_gangprivate_decl (tree var
);
43 extern void gcn_goacc_reduction (gcall
*call
);
44 extern bool gcn_hard_regno_rename_ok (unsigned int from_reg
,
46 extern machine_mode
gcn_hard_regno_caller_save_mode (unsigned int regno
,
48 machine_mode regmode
);
49 extern bool gcn_hard_regno_mode_ok (int regno
, machine_mode mode
);
50 extern int gcn_hard_regno_nregs (int regno
, machine_mode mode
);
51 extern void gcn_hsa_declare_function_name (FILE *file
, const char *name
,
53 extern HOST_WIDE_INT
gcn_initial_elimination_offset (int, int);
54 extern bool gcn_inline_constant64_p (rtx
);
55 extern bool gcn_inline_constant_p (rtx
);
56 extern int gcn_inline_fp_constant_p (rtx
, bool);
57 extern reg_class
gcn_mode_code_base_reg_class (machine_mode
, addr_space_t
,
59 extern rtx
gcn_oacc_dim_pos (int dim
);
60 extern rtx
gcn_oacc_dim_size (int dim
);
61 extern rtx
gcn_operand_doublepart (machine_mode
, rtx
, int);
62 extern rtx
gcn_operand_part (machine_mode
, rtx
, int);
63 extern bool gcn_regno_mode_code_ok_for_base_p (int, machine_mode
,
64 addr_space_t
, int, int);
65 extern reg_class
gcn_regno_reg_class (int regno
);
66 extern rtx
gcn_scalar_exec ();
67 extern rtx
gcn_scalar_exec_reg ();
68 extern bool gcn_scalar_flat_address_p (rtx
);
69 extern bool gcn_scalar_flat_mem_p (rtx
);
70 extern bool gcn_sgpr_move_p (rtx
, rtx
);
71 extern bool gcn_valid_move_p (machine_mode
, rtx
, rtx
);
72 extern rtx
gcn_vec_constant (machine_mode
, int);
73 extern rtx
gcn_vec_constant (machine_mode
, rtx
);
74 extern bool gcn_vgpr_move_p (rtx
, rtx
);
75 extern void print_operand_address (FILE *file
, register rtx addr
);
76 extern void print_operand (FILE *file
, rtx x
, int code
);
77 extern bool regno_ok_for_index_p (int);
89 extern bool gcn_valid_cvt_p (machine_mode from
, machine_mode to
,
93 extern void gcn_init_cumulative_args (CUMULATIVE_ARGS
*, tree
, rtx
, tree
,
95 class gimple_opt_pass
;
96 extern gimple_opt_pass
*make_pass_omp_gcn (gcc::context
*ctxt
);
99 /* Return true if MODE is valid for 1 VGPR register. */
102 vgpr_1reg_mode_p (machine_mode mode
)
104 return (mode
== SImode
|| mode
== SFmode
|| mode
== HImode
|| mode
== QImode
105 || mode
== V64QImode
|| mode
== V64HImode
|| mode
== V64SImode
106 || mode
== V64HFmode
|| mode
== V64SFmode
|| mode
== BImode
);
109 /* Return true if MODE is valid for 1 SGPR register. */
112 sgpr_1reg_mode_p (machine_mode mode
)
114 return (mode
== SImode
|| mode
== SFmode
|| mode
== HImode
115 || mode
== QImode
|| mode
== BImode
);
118 /* Return true if MODE is valid for pair of VGPR registers. */
121 vgpr_2reg_mode_p (machine_mode mode
)
123 return (mode
== DImode
|| mode
== DFmode
124 || mode
== V64DImode
|| mode
== V64DFmode
);
127 /* Return true if MODE can be handled directly by VGPR operations. */
130 vgpr_vector_mode_p (machine_mode mode
)
132 return (mode
== V64QImode
|| mode
== V64HImode
133 || mode
== V64SImode
|| mode
== V64DImode
134 || mode
== V64HFmode
|| mode
== V64SFmode
|| mode
== V64DFmode
);
138 /* Return true if MODE is valid for pair of SGPR registers. */
141 sgpr_2reg_mode_p (machine_mode mode
)
143 return mode
== DImode
|| mode
== DFmode
;