1 /* { dg-do compile { target ia32 } } */
2 /* { dg-options "-O2 -msse2 -mtune=core2" } */
3 /* { dg-additional-options "-mno-vect8-ret-in-mem" { target *-*-vxworks* } } */
7 typedef __SIZE_TYPE__
size_t;
10 unsigned_add3 (const __m64
* a
, const __m64
* b
, size_t count
)
15 sum
= _mm_add_si64 (a
[count
-1], b
[count
-1]);
20 /* { dg-final { scan-assembler-times "movq\[ \\t\]+\[^\n\]*%mm" 1 } } */