PR target/80969 - Fix ICE with -mabi=ms -mavx512f, reduce wasted space when realignin...
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / builtin_target.c
blob9c190eb7ebc393b8cd802c03cba82be08e92171f
1 /* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
2 are recognized. It also independently uses CPUID to get cpu type and
3 features supported and checks if the builtins correctly identify the
4 platform. The code to do the identification is adapted from
5 libgcc/config/i386/cpuinfo.c. */
7 /* { dg-do run } */
9 #include <assert.h>
10 #include "cpuid.h"
12 /* Check if the Intel CPU model and sub-model are identified. */
13 static void
14 check_intel_cpu_model (unsigned int family, unsigned int model,
15 unsigned int brand_id)
17 /* Parse family and model only if brand ID is 0. */
18 if (brand_id == 0)
20 switch (family)
22 case 0x5:
23 /* Pentium. */
24 break;
25 case 0x6:
26 switch (model)
28 case 0x1c:
29 case 0x26:
30 /* Atom. */
31 assert (__builtin_cpu_is ("atom"));
32 break;
33 case 0x37:
34 case 0x4a:
35 case 0x4d:
36 case 0x5a:
37 case 0x5d:
38 /* Silvermont. */
39 assert (__builtin_cpu_is ("silvermont"));
40 break;
41 case 0x57:
42 /* Knights Landing. */
43 assert (__builtin_cpu_is ("knl"));
44 break;
45 case 0x1a:
46 case 0x1e:
47 case 0x1f:
48 case 0x2e:
49 /* Nehalem. */
50 assert (__builtin_cpu_is ("corei7"));
51 assert (__builtin_cpu_is ("nehalem"));
52 break;
53 case 0x25:
54 case 0x2c:
55 case 0x2f:
56 /* Westmere. */
57 assert (__builtin_cpu_is ("corei7"));
58 assert (__builtin_cpu_is ("westmere"));
59 break;
60 case 0x2a:
61 case 0x2d:
62 /* Sandy Bridge. */
63 assert (__builtin_cpu_is ("corei7"));
64 assert (__builtin_cpu_is ("sandybridge"));
65 break;
66 case 0x3a:
67 case 0x3e:
68 /* Ivy Bridge. */
69 assert (__builtin_cpu_is ("corei7"));
70 assert (__builtin_cpu_is ("ivybridge"));
71 break;
72 case 0x3c:
73 case 0x3f:
74 case 0x45:
75 case 0x46:
76 /* Haswell. */
77 assert (__builtin_cpu_is ("corei7"));
78 assert (__builtin_cpu_is ("haswell"));
79 break;
80 case 0x3d:
81 case 0x47:
82 case 0x4f:
83 case 0x56:
84 /* Broadwell. */
85 assert (__builtin_cpu_is ("corei7"));
86 assert (__builtin_cpu_is ("broadwell"));
87 break;
88 case 0x4e:
89 case 0x5e:
90 /* Skylake. */
91 case 0x8e:
92 case 0x9e:
93 /* Kaby Lake. */
94 assert (__builtin_cpu_is ("corei7"));
95 assert (__builtin_cpu_is ("skylake"));
96 break;
97 case 0x55:
98 /* Skylake with AVX-512 support. */
99 assert (__builtin_cpu_is ("corei7"));
100 assert (__builtin_cpu_is ("skylake-avx512"));
101 break;
102 case 0x17:
103 case 0x1d:
104 /* Penryn. */
105 case 0x0f:
106 /* Merom. */
107 assert (__builtin_cpu_is ("core2"));
108 break;
109 default:
110 break;
112 break;
113 default:
114 /* We have no idea. */
115 break;
120 /* Check if the AMD CPU model and sub-model are identified. */
121 static void
122 check_amd_cpu_model (unsigned int family, unsigned int model)
124 switch (family)
126 /* AMD Family 10h. */
127 case 0x10:
128 switch (model)
130 case 0x2:
131 /* Barcelona. */
132 assert (__builtin_cpu_is ("amdfam10h"));
133 assert (__builtin_cpu_is ("barcelona"));
134 break;
135 case 0x4:
136 /* Shanghai. */
137 assert (__builtin_cpu_is ("amdfam10h"));
138 assert (__builtin_cpu_is ("shanghai"));
139 break;
140 case 0x8:
141 /* Istanbul. */
142 assert (__builtin_cpu_is ("amdfam10h"));
143 assert (__builtin_cpu_is ("istanbul"));
144 break;
145 default:
146 break;
148 break;
149 /* AMD Family 15h. */
150 case 0x15:
151 assert (__builtin_cpu_is ("amdfam15h"));
152 /* Bulldozer version 1. */
153 if ( model <= 0xf)
154 assert (__builtin_cpu_is ("bdver1"));
155 /* Bulldozer version 2. */
156 if (model >= 0x10 && model <= 0x1f)
157 assert (__builtin_cpu_is ("bdver2"));
158 break;
159 default:
160 break;
164 /* Check if the ISA features are identified. */
165 static void
166 check_features (unsigned int ecx, unsigned int edx,
167 int max_cpuid_level)
169 unsigned int eax, ebx;
170 unsigned int ext_level;
172 if (edx & bit_CMOV)
173 assert (__builtin_cpu_supports ("cmov"));
174 if (edx & bit_MMX)
175 assert (__builtin_cpu_supports ("mmx"));
176 if (edx & bit_SSE)
177 assert (__builtin_cpu_supports ("sse"));
178 if (edx & bit_SSE2)
179 assert (__builtin_cpu_supports ("sse2"));
180 if (ecx & bit_POPCNT)
181 assert (__builtin_cpu_supports ("popcnt"));
182 if (ecx & bit_AES)
183 assert (__builtin_cpu_supports ("aes"));
184 if (ecx & bit_PCLMUL)
185 assert (__builtin_cpu_supports ("pclmul"));
186 if (ecx & bit_SSE3)
187 assert (__builtin_cpu_supports ("sse3"));
188 if (ecx & bit_SSSE3)
189 assert (__builtin_cpu_supports ("ssse3"));
190 if (ecx & bit_SSE4_1)
191 assert (__builtin_cpu_supports ("sse4.1"));
192 if (ecx & bit_SSE4_2)
193 assert (__builtin_cpu_supports ("sse4.2"));
194 if (ecx & bit_AVX)
195 assert (__builtin_cpu_supports ("avx"));
196 if (ecx & bit_FMA)
197 assert (__builtin_cpu_supports ("fma"));
199 /* Get advanced features at level 7 (eax = 7, ecx = 0). */
200 if (max_cpuid_level >= 7)
202 __cpuid_count (7, 0, eax, ebx, ecx, edx);
203 if (ebx & bit_BMI)
204 assert (__builtin_cpu_supports ("bmi"));
205 if (ebx & bit_AVX2)
206 assert (__builtin_cpu_supports ("avx2"));
207 if (ebx & bit_BMI2)
208 assert (__builtin_cpu_supports ("bmi2"));
209 if (ebx & bit_AVX512F)
210 assert (__builtin_cpu_supports ("avx512f"));
211 if (ebx & bit_AVX512VL)
212 assert (__builtin_cpu_supports ("avx512vl"));
213 if (ebx & bit_AVX512BW)
214 assert (__builtin_cpu_supports ("avx512bw"));
215 if (ebx & bit_AVX512DQ)
216 assert (__builtin_cpu_supports ("avx512dq"));
217 if (ebx & bit_AVX512CD)
218 assert (__builtin_cpu_supports ("avx512cd"));
219 if (ebx & bit_AVX512PF)
220 assert (__builtin_cpu_supports ("avx512pf"));
221 if (ebx & bit_AVX512ER)
222 assert (__builtin_cpu_supports ("avx512er"));
223 if (ebx & bit_AVX512IFMA)
224 assert (__builtin_cpu_supports ("avx512ifma"));
225 if (ecx & bit_AVX512VBMI)
226 assert (__builtin_cpu_supports ("avx512vbmi"));
227 if (ecx & bit_AVX512VPOPCNTDQ)
228 assert (__builtin_cpu_supports ("avx512vpopcntdq"));
229 if (edx & bit_AVX5124VNNIW)
230 assert (__builtin_cpu_supports ("avx5124vnniw"));
231 if (edx & bit_AVX5124FMAPS)
232 assert (__builtin_cpu_supports ("avx5124fmaps"));
235 /* Check cpuid level of extended features. */
236 __cpuid (0x80000000, ext_level, ebx, ecx, edx);
238 if (ext_level >= 0x80000001)
240 __cpuid (0x80000001, eax, ebx, ecx, edx);
242 if (ecx & bit_SSE4a)
243 assert (__builtin_cpu_supports ("sse4a"));
244 if (ecx & bit_FMA4)
245 assert (__builtin_cpu_supports ("fma4"));
246 if (ecx & bit_XOP)
247 assert (__builtin_cpu_supports ("xop"));
251 static int __attribute__ ((noinline))
252 __get_cpuid_output (unsigned int __level,
253 unsigned int *__eax, unsigned int *__ebx,
254 unsigned int *__ecx, unsigned int *__edx)
256 return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
259 static int
260 check_detailed ()
262 unsigned int eax, ebx, ecx, edx;
264 int max_level;
265 unsigned int vendor;
266 unsigned int model, family, brand_id;
267 unsigned int extended_model, extended_family;
269 /* Assume cpuid insn present. Run in level 0 to get vendor id. */
270 if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
271 return 0;
273 vendor = ebx;
274 max_level = eax;
276 if (max_level < 1)
277 return 0;
279 if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
280 return 0;
282 model = (eax >> 4) & 0x0f;
283 family = (eax >> 8) & 0x0f;
284 brand_id = ebx & 0xff;
285 extended_model = (eax >> 12) & 0xf0;
286 extended_family = (eax >> 20) & 0xff;
288 if (vendor == signature_INTEL_ebx)
290 assert (__builtin_cpu_is ("intel"));
291 /* Adjust family and model for Intel CPUs. */
292 if (family == 0x0f)
294 family += extended_family;
295 model += extended_model;
297 else if (family == 0x06)
298 model += extended_model;
299 check_intel_cpu_model (family, model, brand_id);
300 check_features (ecx, edx, max_level);
302 else if (vendor == signature_AMD_ebx)
304 assert (__builtin_cpu_is ("amd"));
305 /* Adjust model and family for AMD CPUS. */
306 if (family == 0x0f)
308 family += extended_family;
309 model += (extended_model << 4);
311 check_amd_cpu_model (family, model);
312 check_features (ecx, edx, max_level);
315 return 0;
318 static int
319 quick_check ()
321 /* Check CPU Features. */
322 assert (__builtin_cpu_supports ("cmov") >= 0);
324 assert (__builtin_cpu_supports ("mmx") >= 0);
326 assert (__builtin_cpu_supports ("popcnt") >= 0);
328 assert (__builtin_cpu_supports ("sse") >= 0);
330 assert (__builtin_cpu_supports ("sse2") >= 0);
332 assert (__builtin_cpu_supports ("sse3") >= 0);
334 assert (__builtin_cpu_supports ("ssse3") >= 0);
336 assert (__builtin_cpu_supports ("sse4.1") >= 0);
338 assert (__builtin_cpu_supports ("sse4.2") >= 0);
340 assert (__builtin_cpu_supports ("avx") >= 0);
342 assert (__builtin_cpu_supports ("avx2") >= 0);
344 assert (__builtin_cpu_supports ("avx512f") >= 0);
346 assert (__builtin_cpu_supports ("avx5124vnniw") >= 0);
348 assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);
350 assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0);
352 /* Check CPU type. */
353 assert (__builtin_cpu_is ("amd") >= 0);
355 assert (__builtin_cpu_is ("intel") >= 0);
357 assert (__builtin_cpu_is ("atom") >= 0);
359 assert (__builtin_cpu_is ("core2") >= 0);
361 assert (__builtin_cpu_is ("corei7") >= 0);
363 assert (__builtin_cpu_is ("nehalem") >= 0);
365 assert (__builtin_cpu_is ("westmere") >= 0);
367 assert (__builtin_cpu_is ("sandybridge") >= 0);
369 assert (__builtin_cpu_is ("amdfam10h") >= 0);
371 assert (__builtin_cpu_is ("barcelona") >= 0);
373 assert (__builtin_cpu_is ("shanghai") >= 0);
375 assert (__builtin_cpu_is ("istanbul") >= 0);
377 assert (__builtin_cpu_is ("amdfam15h") >= 0);
379 assert (__builtin_cpu_is ("bdver1") >= 0);
381 assert (__builtin_cpu_is ("bdver2") >= 0);
383 return 0;
386 int main ()
388 __builtin_cpu_init ();
389 quick_check ();
390 check_detailed ();
391 return 0;