1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
30 #include "hard-reg-set.h"
31 #include "insn-config.h"
41 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
43 /* Forward declarations */
44 static void set_of_1 (rtx
, const_rtx
, void *);
45 static bool covers_regno_p (const_rtx
, unsigned int);
46 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
47 static int rtx_referenced_p_1 (rtx
*, void *);
48 static int computed_jump_p_1 (const_rtx
);
49 static void parms_set (rtx
, const_rtx
, void *);
51 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
52 const_rtx
, enum machine_mode
,
53 unsigned HOST_WIDE_INT
);
54 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
55 const_rtx
, enum machine_mode
,
56 unsigned HOST_WIDE_INT
);
57 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
60 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
61 enum machine_mode
, unsigned int);
63 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
64 -1 if a code has no such operand. */
65 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
67 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
68 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
69 SIGN_EXTEND then while narrowing we also have to enforce the
70 representation and sign-extend the value to mode DESTINATION_REP.
72 If the value is already sign-extended to DESTINATION_REP mode we
73 can just switch to DESTINATION mode on it. For each pair of
74 integral modes SOURCE and DESTINATION, when truncating from SOURCE
75 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
76 contains the number of high-order bits in SOURCE that have to be
77 copies of the sign-bit so that we can do this mode-switch to
81 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
83 /* Return 1 if the value of X is unstable
84 (would be different at a different point in the program).
85 The frame pointer, arg pointer, etc. are considered stable
86 (within one function) and so is anything marked `unchanging'. */
89 rtx_unstable_p (const_rtx x
)
91 const RTX_CODE code
= GET_CODE (x
);
98 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
110 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
111 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
112 /* The arg pointer varies if it is not a fixed register. */
113 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
115 /* ??? When call-clobbered, the value is stable modulo the restore
116 that must happen after a call. This currently screws up local-alloc
117 into believing that the restore is not needed. */
118 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
123 if (MEM_VOLATILE_P (x
))
132 fmt
= GET_RTX_FORMAT (code
);
133 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
136 if (rtx_unstable_p (XEXP (x
, i
)))
139 else if (fmt
[i
] == 'E')
142 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
143 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
150 /* Return 1 if X has a value that can vary even between two
151 executions of the program. 0 means X can be compared reliably
152 against certain constants or near-constants.
153 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
154 zero, we are slightly more conservative.
155 The frame pointer and the arg pointer are considered constant. */
158 rtx_varies_p (const_rtx x
, bool for_alias
)
171 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
183 /* Note that we have to test for the actual rtx used for the frame
184 and arg pointers and not just the register number in case we have
185 eliminated the frame and/or arg pointer and are using it
187 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
188 /* The arg pointer varies if it is not a fixed register. */
189 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
191 if (x
== pic_offset_table_rtx
192 /* ??? When call-clobbered, the value is stable modulo the restore
193 that must happen after a call. This currently screws up
194 local-alloc into believing that the restore is not needed, so we
195 must return 0 only if we are called from alias analysis. */
196 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
201 /* The operand 0 of a LO_SUM is considered constant
202 (in fact it is related specifically to operand 1)
203 during alias analysis. */
204 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
205 || rtx_varies_p (XEXP (x
, 1), for_alias
);
208 if (MEM_VOLATILE_P (x
))
217 fmt
= GET_RTX_FORMAT (code
);
218 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
221 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
224 else if (fmt
[i
] == 'E')
227 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
228 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
235 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
236 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
237 whether nonzero is returned for unaligned memory accesses on strict
238 alignment machines. */
241 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
242 enum machine_mode mode
, bool unaligned_mems
)
244 enum rtx_code code
= GET_CODE (x
);
248 && GET_MODE_SIZE (mode
) != 0)
250 HOST_WIDE_INT actual_offset
= offset
;
251 #ifdef SPARC_STACK_BOUNDARY_HACK
252 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
253 the real alignment of %sp. However, when it does this, the
254 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
255 if (SPARC_STACK_BOUNDARY_HACK
256 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
257 actual_offset
-= STACK_POINTER_OFFSET
;
260 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
267 if (SYMBOL_REF_WEAK (x
))
269 if (!CONSTANT_POOL_ADDRESS_P (x
))
272 HOST_WIDE_INT decl_size
;
277 size
= GET_MODE_SIZE (mode
);
281 /* If the size of the access or of the symbol is unknown,
283 decl
= SYMBOL_REF_DECL (x
);
285 /* Else check that the access is in bounds. TODO: restructure
286 expr_size/tree_expr_size/int_expr_size and just use the latter. */
289 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
290 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
291 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
293 else if (TREE_CODE (decl
) == STRING_CST
)
294 decl_size
= TREE_STRING_LENGTH (decl
);
295 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
296 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
300 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
309 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
310 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
311 || x
== stack_pointer_rtx
312 /* The arg pointer varies if it is not a fixed register. */
313 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
315 /* All of the virtual frame registers are stack references. */
316 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
317 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
322 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
323 mode
, unaligned_mems
);
326 /* An address is assumed not to trap if:
327 - it is the pic register plus a constant. */
328 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
331 /* - or it is an address that can't trap plus a constant integer,
332 with the proper remainder modulo the mode size if we are
333 considering unaligned memory references. */
334 if (CONST_INT_P (XEXP (x
, 1))
335 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
336 size
, mode
, unaligned_mems
))
343 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
344 mode
, unaligned_mems
);
351 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
352 mode
, unaligned_mems
);
358 /* If it isn't one of the case above, it can cause a trap. */
362 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
365 rtx_addr_can_trap_p (const_rtx x
)
367 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
370 /* Return true if X is an address that is known to not be zero. */
373 nonzero_address_p (const_rtx x
)
375 const enum rtx_code code
= GET_CODE (x
);
380 return !SYMBOL_REF_WEAK (x
);
386 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
387 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
388 || x
== stack_pointer_rtx
389 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
391 /* All of the virtual frame registers are stack references. */
392 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
393 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
398 return nonzero_address_p (XEXP (x
, 0));
401 if (CONST_INT_P (XEXP (x
, 1)))
402 return nonzero_address_p (XEXP (x
, 0));
403 /* Handle PIC references. */
404 else if (XEXP (x
, 0) == pic_offset_table_rtx
405 && CONSTANT_P (XEXP (x
, 1)))
410 /* Similar to the above; allow positive offsets. Further, since
411 auto-inc is only allowed in memories, the register must be a
413 if (CONST_INT_P (XEXP (x
, 1))
414 && INTVAL (XEXP (x
, 1)) > 0)
416 return nonzero_address_p (XEXP (x
, 0));
419 /* Similarly. Further, the offset is always positive. */
426 return nonzero_address_p (XEXP (x
, 0));
429 return nonzero_address_p (XEXP (x
, 1));
435 /* If it isn't one of the case above, might be zero. */
439 /* Return 1 if X refers to a memory location whose address
440 cannot be compared reliably with constant addresses,
441 or if X refers to a BLKmode memory object.
442 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
443 zero, we are slightly more conservative. */
446 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
457 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
459 fmt
= GET_RTX_FORMAT (code
);
460 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
463 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
466 else if (fmt
[i
] == 'E')
469 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
470 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
476 /* Return the value of the integer term in X, if one is apparent;
478 Only obvious integer terms are detected.
479 This is used in cse.c with the `related_value' field. */
482 get_integer_term (const_rtx x
)
484 if (GET_CODE (x
) == CONST
)
487 if (GET_CODE (x
) == MINUS
488 && CONST_INT_P (XEXP (x
, 1)))
489 return - INTVAL (XEXP (x
, 1));
490 if (GET_CODE (x
) == PLUS
491 && CONST_INT_P (XEXP (x
, 1)))
492 return INTVAL (XEXP (x
, 1));
496 /* If X is a constant, return the value sans apparent integer term;
498 Only obvious integer terms are detected. */
501 get_related_value (const_rtx x
)
503 if (GET_CODE (x
) != CONST
)
506 if (GET_CODE (x
) == PLUS
507 && CONST_INT_P (XEXP (x
, 1)))
509 else if (GET_CODE (x
) == MINUS
510 && CONST_INT_P (XEXP (x
, 1)))
515 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
516 to somewhere in the same object or object_block as SYMBOL. */
519 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
523 if (GET_CODE (symbol
) != SYMBOL_REF
)
531 if (CONSTANT_POOL_ADDRESS_P (symbol
)
532 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
535 decl
= SYMBOL_REF_DECL (symbol
);
536 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
540 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
541 && SYMBOL_REF_BLOCK (symbol
)
542 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
543 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
544 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
550 /* Split X into a base and a constant offset, storing them in *BASE_OUT
551 and *OFFSET_OUT respectively. */
554 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
556 if (GET_CODE (x
) == CONST
)
559 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
561 *base_out
= XEXP (x
, 0);
562 *offset_out
= XEXP (x
, 1);
567 *offset_out
= const0_rtx
;
570 /* Return the number of places FIND appears within X. If COUNT_DEST is
571 zero, we do not count occurrences inside the destination of a SET. */
574 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
578 const char *format_ptr
;
600 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
602 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
606 if (MEM_P (find
) && rtx_equal_p (x
, find
))
611 if (SET_DEST (x
) == find
&& ! count_dest
)
612 return count_occurrences (SET_SRC (x
), find
, count_dest
);
619 format_ptr
= GET_RTX_FORMAT (code
);
622 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
624 switch (*format_ptr
++)
627 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
631 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
632 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
640 /* Nonzero if register REG appears somewhere within IN.
641 Also works if REG is not a register; in this case it checks
642 for a subexpression of IN that is Lisp "equal" to REG. */
645 reg_mentioned_p (const_rtx reg
, const_rtx in
)
657 if (GET_CODE (in
) == LABEL_REF
)
658 return reg
== XEXP (in
, 0);
660 code
= GET_CODE (in
);
664 /* Compare registers by number. */
666 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
668 /* These codes have no constituent expressions
679 /* These are kept unique for a given value. */
686 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
689 fmt
= GET_RTX_FORMAT (code
);
691 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
696 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
697 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
700 else if (fmt
[i
] == 'e'
701 && reg_mentioned_p (reg
, XEXP (in
, i
)))
707 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
708 no CODE_LABEL insn. */
711 no_labels_between_p (const_rtx beg
, const_rtx end
)
716 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
722 /* Nonzero if register REG is used in an insn between
723 FROM_INSN and TO_INSN (exclusive of those two). */
726 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
730 if (from_insn
== to_insn
)
733 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
734 if (NONDEBUG_INSN_P (insn
)
735 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
736 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
741 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
742 is entirely replaced by a new value and the only use is as a SET_DEST,
743 we do not consider it a reference. */
746 reg_referenced_p (const_rtx x
, const_rtx body
)
750 switch (GET_CODE (body
))
753 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
756 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
757 of a REG that occupies all of the REG, the insn references X if
758 it is mentioned in the destination. */
759 if (GET_CODE (SET_DEST (body
)) != CC0
760 && GET_CODE (SET_DEST (body
)) != PC
761 && !REG_P (SET_DEST (body
))
762 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
763 && REG_P (SUBREG_REG (SET_DEST (body
)))
764 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
765 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
766 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
767 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
768 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
773 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
774 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
781 return reg_overlap_mentioned_p (x
, body
);
784 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
787 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
790 case UNSPEC_VOLATILE
:
791 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
792 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
797 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
798 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
803 if (MEM_P (XEXP (body
, 0)))
804 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
809 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
811 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
818 /* Nonzero if register REG is set or clobbered in an insn between
819 FROM_INSN and TO_INSN (exclusive of those two). */
822 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
826 if (from_insn
== to_insn
)
829 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
830 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
835 /* Internals of reg_set_between_p. */
837 reg_set_p (const_rtx reg
, const_rtx insn
)
839 /* We can be passed an insn or part of one. If we are passed an insn,
840 check if a side-effect of the insn clobbers REG. */
842 && (FIND_REG_INC_NOTE (insn
, reg
)
845 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
846 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
847 GET_MODE (reg
), REGNO (reg
)))
849 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
852 return set_of (reg
, insn
) != NULL_RTX
;
855 /* Similar to reg_set_between_p, but check all registers in X. Return 0
856 only if none of them are modified between START and END. Return 1 if
857 X contains a MEM; this routine does use memory aliasing. */
860 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
862 const enum rtx_code code
= GET_CODE (x
);
886 if (modified_between_p (XEXP (x
, 0), start
, end
))
888 if (MEM_READONLY_P (x
))
890 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
891 if (memory_modified_in_insn_p (x
, insn
))
897 return reg_set_between_p (x
, start
, end
);
903 fmt
= GET_RTX_FORMAT (code
);
904 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
906 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
909 else if (fmt
[i
] == 'E')
910 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
911 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
918 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
919 of them are modified in INSN. Return 1 if X contains a MEM; this routine
920 does use memory aliasing. */
923 modified_in_p (const_rtx x
, const_rtx insn
)
925 const enum rtx_code code
= GET_CODE (x
);
945 if (modified_in_p (XEXP (x
, 0), insn
))
947 if (MEM_READONLY_P (x
))
949 if (memory_modified_in_insn_p (x
, insn
))
955 return reg_set_p (x
, insn
);
961 fmt
= GET_RTX_FORMAT (code
);
962 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
964 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
967 else if (fmt
[i
] == 'E')
968 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
969 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
976 /* Helper function for set_of. */
984 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
986 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
987 if (rtx_equal_p (x
, data
->pat
)
988 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
992 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
993 (either directly or via STRICT_LOW_PART and similar modifiers). */
995 set_of (const_rtx pat
, const_rtx insn
)
997 struct set_of_data data
;
998 data
.found
= NULL_RTX
;
1000 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1004 /* Given an INSN, return a SET expression if this insn has only a single SET.
1005 It may also have CLOBBERs, USEs, or SET whose output
1006 will not be used, which we ignore. */
1009 single_set_2 (const_rtx insn
, const_rtx pat
)
1012 int set_verified
= 1;
1015 if (GET_CODE (pat
) == PARALLEL
)
1017 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1019 rtx sub
= XVECEXP (pat
, 0, i
);
1020 switch (GET_CODE (sub
))
1027 /* We can consider insns having multiple sets, where all
1028 but one are dead as single set insns. In common case
1029 only single set is present in the pattern so we want
1030 to avoid checking for REG_UNUSED notes unless necessary.
1032 When we reach set first time, we just expect this is
1033 the single set we are looking for and only when more
1034 sets are found in the insn, we check them. */
1037 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1038 && !side_effects_p (set
))
1044 set
= sub
, set_verified
= 0;
1045 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1046 || side_effects_p (sub
))
1058 /* Given an INSN, return nonzero if it has more than one SET, else return
1062 multiple_sets (const_rtx insn
)
1067 /* INSN must be an insn. */
1068 if (! INSN_P (insn
))
1071 /* Only a PARALLEL can have multiple SETs. */
1072 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1074 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1075 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1077 /* If we have already found a SET, then return now. */
1085 /* Either zero or one SET. */
1089 /* Return nonzero if the destination of SET equals the source
1090 and there are no side effects. */
1093 set_noop_p (const_rtx set
)
1095 rtx src
= SET_SRC (set
);
1096 rtx dst
= SET_DEST (set
);
1098 if (dst
== pc_rtx
&& src
== pc_rtx
)
1101 if (MEM_P (dst
) && MEM_P (src
))
1102 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1104 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1105 return rtx_equal_p (XEXP (dst
, 0), src
)
1106 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1107 && !side_effects_p (src
);
1109 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1110 dst
= XEXP (dst
, 0);
1112 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1114 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1116 src
= SUBREG_REG (src
);
1117 dst
= SUBREG_REG (dst
);
1120 return (REG_P (src
) && REG_P (dst
)
1121 && REGNO (src
) == REGNO (dst
));
1124 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1128 noop_move_p (const_rtx insn
)
1130 rtx pat
= PATTERN (insn
);
1132 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1135 /* Insns carrying these notes are useful later on. */
1136 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1139 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1142 if (GET_CODE (pat
) == PARALLEL
)
1145 /* If nothing but SETs of registers to themselves,
1146 this insn can also be deleted. */
1147 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1149 rtx tem
= XVECEXP (pat
, 0, i
);
1151 if (GET_CODE (tem
) == USE
1152 || GET_CODE (tem
) == CLOBBER
)
1155 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1165 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1166 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1167 If the object was modified, if we hit a partial assignment to X, or hit a
1168 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1169 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1173 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1177 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1181 rtx set
= single_set (p
);
1182 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1184 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1186 rtx src
= SET_SRC (set
);
1188 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1189 src
= XEXP (note
, 0);
1191 if ((valid_to
== NULL_RTX
1192 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1193 /* Reject hard registers because we don't usually want
1194 to use them; we'd rather use a pseudo. */
1196 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1203 /* If set in non-simple way, we don't have a value. */
1204 if (reg_set_p (x
, p
))
1211 /* Return nonzero if register in range [REGNO, ENDREGNO)
1212 appears either explicitly or implicitly in X
1213 other than being stored into.
1215 References contained within the substructure at LOC do not count.
1216 LOC may be zero, meaning don't ignore anything. */
1219 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1223 unsigned int x_regno
;
1228 /* The contents of a REG_NONNEG note is always zero, so we must come here
1229 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1233 code
= GET_CODE (x
);
1238 x_regno
= REGNO (x
);
1240 /* If we modifying the stack, frame, or argument pointer, it will
1241 clobber a virtual register. In fact, we could be more precise,
1242 but it isn't worth it. */
1243 if ((x_regno
== STACK_POINTER_REGNUM
1244 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1245 || x_regno
== ARG_POINTER_REGNUM
1247 || x_regno
== FRAME_POINTER_REGNUM
)
1248 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1251 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1254 /* If this is a SUBREG of a hard reg, we can see exactly which
1255 registers are being modified. Otherwise, handle normally. */
1256 if (REG_P (SUBREG_REG (x
))
1257 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1259 unsigned int inner_regno
= subreg_regno (x
);
1260 unsigned int inner_endregno
1261 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1262 ? subreg_nregs (x
) : 1);
1264 return endregno
> inner_regno
&& regno
< inner_endregno
;
1270 if (&SET_DEST (x
) != loc
1271 /* Note setting a SUBREG counts as referring to the REG it is in for
1272 a pseudo but not for hard registers since we can
1273 treat each word individually. */
1274 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1275 && loc
!= &SUBREG_REG (SET_DEST (x
))
1276 && REG_P (SUBREG_REG (SET_DEST (x
)))
1277 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1278 && refers_to_regno_p (regno
, endregno
,
1279 SUBREG_REG (SET_DEST (x
)), loc
))
1280 || (!REG_P (SET_DEST (x
))
1281 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1284 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1293 /* X does not match, so try its subexpressions. */
1295 fmt
= GET_RTX_FORMAT (code
);
1296 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1298 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1306 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1309 else if (fmt
[i
] == 'E')
1312 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1313 if (loc
!= &XVECEXP (x
, i
, j
)
1314 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1321 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1322 we check if any register number in X conflicts with the relevant register
1323 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1324 contains a MEM (we don't bother checking for memory addresses that can't
1325 conflict because we expect this to be a rare case. */
1328 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1330 unsigned int regno
, endregno
;
1332 /* If either argument is a constant, then modifying X can not
1333 affect IN. Here we look at IN, we can profitably combine
1334 CONSTANT_P (x) with the switch statement below. */
1335 if (CONSTANT_P (in
))
1339 switch (GET_CODE (x
))
1341 case STRICT_LOW_PART
:
1344 /* Overly conservative. */
1349 regno
= REGNO (SUBREG_REG (x
));
1350 if (regno
< FIRST_PSEUDO_REGISTER
)
1351 regno
= subreg_regno (x
);
1352 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1353 ? subreg_nregs (x
) : 1);
1358 endregno
= END_REGNO (x
);
1360 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1370 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1371 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1374 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1377 else if (fmt
[i
] == 'E')
1380 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1381 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1391 return reg_mentioned_p (x
, in
);
1397 /* If any register in here refers to it we return true. */
1398 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1399 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1400 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1406 gcc_assert (CONSTANT_P (x
));
1411 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1412 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1413 ignored by note_stores, but passed to FUN.
1415 FUN receives three arguments:
1416 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1417 2. the SET or CLOBBER rtx that does the store,
1418 3. the pointer DATA provided to note_stores.
1420 If the item being stored in or clobbered is a SUBREG of a hard register,
1421 the SUBREG will be passed. */
1424 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1428 if (GET_CODE (x
) == COND_EXEC
)
1429 x
= COND_EXEC_CODE (x
);
1431 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1433 rtx dest
= SET_DEST (x
);
1435 while ((GET_CODE (dest
) == SUBREG
1436 && (!REG_P (SUBREG_REG (dest
))
1437 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1438 || GET_CODE (dest
) == ZERO_EXTRACT
1439 || GET_CODE (dest
) == STRICT_LOW_PART
)
1440 dest
= XEXP (dest
, 0);
1442 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1443 each of whose first operand is a register. */
1444 if (GET_CODE (dest
) == PARALLEL
)
1446 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1447 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1448 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1451 (*fun
) (dest
, x
, data
);
1454 else if (GET_CODE (x
) == PARALLEL
)
1455 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1456 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1459 /* Like notes_stores, but call FUN for each expression that is being
1460 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1461 FUN for each expression, not any interior subexpressions. FUN receives a
1462 pointer to the expression and the DATA passed to this function.
1464 Note that this is not quite the same test as that done in reg_referenced_p
1465 since that considers something as being referenced if it is being
1466 partially set, while we do not. */
1469 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1474 switch (GET_CODE (body
))
1477 (*fun
) (&COND_EXEC_TEST (body
), data
);
1478 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1482 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1483 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1487 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1488 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1492 (*fun
) (&XEXP (body
, 0), data
);
1496 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1497 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1501 (*fun
) (&TRAP_CONDITION (body
), data
);
1505 (*fun
) (&XEXP (body
, 0), data
);
1509 case UNSPEC_VOLATILE
:
1510 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1511 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1515 if (MEM_P (XEXP (body
, 0)))
1516 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1521 rtx dest
= SET_DEST (body
);
1523 /* For sets we replace everything in source plus registers in memory
1524 expression in store and operands of a ZERO_EXTRACT. */
1525 (*fun
) (&SET_SRC (body
), data
);
1527 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1529 (*fun
) (&XEXP (dest
, 1), data
);
1530 (*fun
) (&XEXP (dest
, 2), data
);
1533 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1534 dest
= XEXP (dest
, 0);
1537 (*fun
) (&XEXP (dest
, 0), data
);
1542 /* All the other possibilities never store. */
1543 (*fun
) (pbody
, data
);
1548 /* Return nonzero if X's old contents don't survive after INSN.
1549 This will be true if X is (cc0) or if X is a register and
1550 X dies in INSN or because INSN entirely sets X.
1552 "Entirely set" means set directly and not through a SUBREG, or
1553 ZERO_EXTRACT, so no trace of the old contents remains.
1554 Likewise, REG_INC does not count.
1556 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1557 but for this use that makes no difference, since regs don't overlap
1558 during their lifetimes. Therefore, this function may be used
1559 at any time after deaths have been computed.
1561 If REG is a hard reg that occupies multiple machine registers, this
1562 function will only return 1 if each of those registers will be replaced
1566 dead_or_set_p (const_rtx insn
, const_rtx x
)
1568 unsigned int regno
, end_regno
;
1571 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1572 if (GET_CODE (x
) == CC0
)
1575 gcc_assert (REG_P (x
));
1578 end_regno
= END_REGNO (x
);
1579 for (i
= regno
; i
< end_regno
; i
++)
1580 if (! dead_or_set_regno_p (insn
, i
))
1586 /* Return TRUE iff DEST is a register or subreg of a register and
1587 doesn't change the number of words of the inner register, and any
1588 part of the register is TEST_REGNO. */
1591 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1593 unsigned int regno
, endregno
;
1595 if (GET_CODE (dest
) == SUBREG
1596 && (((GET_MODE_SIZE (GET_MODE (dest
))
1597 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1598 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1599 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1600 dest
= SUBREG_REG (dest
);
1605 regno
= REGNO (dest
);
1606 endregno
= END_REGNO (dest
);
1607 return (test_regno
>= regno
&& test_regno
< endregno
);
1610 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1611 any member matches the covers_regno_no_parallel_p criteria. */
1614 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1616 if (GET_CODE (dest
) == PARALLEL
)
1618 /* Some targets place small structures in registers for return
1619 values of functions, and those registers are wrapped in
1620 PARALLELs that we may see as the destination of a SET. */
1623 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1625 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1626 if (inner
!= NULL_RTX
1627 && covers_regno_no_parallel_p (inner
, test_regno
))
1634 return covers_regno_no_parallel_p (dest
, test_regno
);
1637 /* Utility function for dead_or_set_p to check an individual register. */
1640 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1644 /* See if there is a death note for something that includes TEST_REGNO. */
1645 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1649 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1652 pattern
= PATTERN (insn
);
1654 if (GET_CODE (pattern
) == COND_EXEC
)
1655 pattern
= COND_EXEC_CODE (pattern
);
1657 if (GET_CODE (pattern
) == SET
)
1658 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1659 else if (GET_CODE (pattern
) == PARALLEL
)
1663 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1665 rtx body
= XVECEXP (pattern
, 0, i
);
1667 if (GET_CODE (body
) == COND_EXEC
)
1668 body
= COND_EXEC_CODE (body
);
1670 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1671 && covers_regno_p (SET_DEST (body
), test_regno
))
1679 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1680 If DATUM is nonzero, look for one whose datum is DATUM. */
1683 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1687 gcc_checking_assert (insn
);
1689 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1690 if (! INSN_P (insn
))
1694 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1695 if (REG_NOTE_KIND (link
) == kind
)
1700 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1701 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1706 /* Return the reg-note of kind KIND in insn INSN which applies to register
1707 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1708 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1709 it might be the case that the note overlaps REGNO. */
1712 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1716 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1717 if (! INSN_P (insn
))
1720 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1721 if (REG_NOTE_KIND (link
) == kind
1722 /* Verify that it is a register, so that scratch and MEM won't cause a
1724 && REG_P (XEXP (link
, 0))
1725 && REGNO (XEXP (link
, 0)) <= regno
1726 && END_REGNO (XEXP (link
, 0)) > regno
)
1731 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1735 find_reg_equal_equiv_note (const_rtx insn
)
1742 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1743 if (REG_NOTE_KIND (link
) == REG_EQUAL
1744 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1746 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1747 insns that have multiple sets. Checking single_set to
1748 make sure of this is not the proper check, as explained
1749 in the comment in set_unique_reg_note.
1751 This should be changed into an assert. */
1752 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1759 /* Check whether INSN is a single_set whose source is known to be
1760 equivalent to a constant. Return that constant if so, otherwise
1764 find_constant_src (const_rtx insn
)
1768 set
= single_set (insn
);
1771 x
= avoid_constant_pool_reference (SET_SRC (set
));
1776 note
= find_reg_equal_equiv_note (insn
);
1777 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1778 return XEXP (note
, 0);
1783 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1784 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1787 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1789 /* If it's not a CALL_INSN, it can't possibly have a
1790 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1800 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1802 link
= XEXP (link
, 1))
1803 if (GET_CODE (XEXP (link
, 0)) == code
1804 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1809 unsigned int regno
= REGNO (datum
);
1811 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1812 to pseudo registers, so don't bother checking. */
1814 if (regno
< FIRST_PSEUDO_REGISTER
)
1816 unsigned int end_regno
= END_HARD_REGNO (datum
);
1819 for (i
= regno
; i
< end_regno
; i
++)
1820 if (find_regno_fusage (insn
, code
, i
))
1828 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1829 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1832 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1836 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1837 to pseudo registers, so don't bother checking. */
1839 if (regno
>= FIRST_PSEUDO_REGISTER
1843 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1847 if (GET_CODE (op
= XEXP (link
, 0)) == code
1848 && REG_P (reg
= XEXP (op
, 0))
1849 && REGNO (reg
) <= regno
1850 && END_HARD_REGNO (reg
) > regno
)
1858 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1859 stored as the pointer to the next register note. */
1862 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1870 case REG_LABEL_TARGET
:
1871 case REG_LABEL_OPERAND
:
1872 /* These types of register notes use an INSN_LIST rather than an
1873 EXPR_LIST, so that copying is done right and dumps look
1875 note
= alloc_INSN_LIST (datum
, list
);
1876 PUT_REG_NOTE_KIND (note
, kind
);
1880 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1887 /* Add register note with kind KIND and datum DATUM to INSN. */
1890 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1892 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1895 /* Remove register note NOTE from the REG_NOTES of INSN. */
1898 remove_note (rtx insn
, const_rtx note
)
1902 if (note
== NULL_RTX
)
1905 if (REG_NOTES (insn
) == note
)
1906 REG_NOTES (insn
) = XEXP (note
, 1);
1908 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1909 if (XEXP (link
, 1) == note
)
1911 XEXP (link
, 1) = XEXP (note
, 1);
1915 switch (REG_NOTE_KIND (note
))
1919 df_notes_rescan (insn
);
1926 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1929 remove_reg_equal_equiv_notes (rtx insn
)
1933 loc
= ®_NOTES (insn
);
1936 enum reg_note kind
= REG_NOTE_KIND (*loc
);
1937 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
1938 *loc
= XEXP (*loc
, 1);
1940 loc
= &XEXP (*loc
, 1);
1944 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1945 return 1 if it is found. A simple equality test is used to determine if
1949 in_expr_list_p (const_rtx listp
, const_rtx node
)
1953 for (x
= listp
; x
; x
= XEXP (x
, 1))
1954 if (node
== XEXP (x
, 0))
1960 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1961 remove that entry from the list if it is found.
1963 A simple equality test is used to determine if NODE matches. */
1966 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
1969 rtx prev
= NULL_RTX
;
1973 if (node
== XEXP (temp
, 0))
1975 /* Splice the node out of the list. */
1977 XEXP (prev
, 1) = XEXP (temp
, 1);
1979 *listp
= XEXP (temp
, 1);
1985 temp
= XEXP (temp
, 1);
1989 /* Nonzero if X contains any volatile instructions. These are instructions
1990 which may cause unpredictable machine state instructions, and thus no
1991 instructions should be moved or combined across them. This includes
1992 only volatile asms and UNSPEC_VOLATILE instructions. */
1995 volatile_insn_p (const_rtx x
)
1997 const RTX_CODE code
= GET_CODE (x
);
2018 case UNSPEC_VOLATILE
:
2019 /* case TRAP_IF: This isn't clear yet. */
2024 if (MEM_VOLATILE_P (x
))
2031 /* Recursively scan the operands of this expression. */
2034 const char *const fmt
= GET_RTX_FORMAT (code
);
2037 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2041 if (volatile_insn_p (XEXP (x
, i
)))
2044 else if (fmt
[i
] == 'E')
2047 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2048 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2056 /* Nonzero if X contains any volatile memory references
2057 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2060 volatile_refs_p (const_rtx x
)
2062 const RTX_CODE code
= GET_CODE (x
);
2081 case UNSPEC_VOLATILE
:
2087 if (MEM_VOLATILE_P (x
))
2094 /* Recursively scan the operands of this expression. */
2097 const char *const fmt
= GET_RTX_FORMAT (code
);
2100 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2104 if (volatile_refs_p (XEXP (x
, i
)))
2107 else if (fmt
[i
] == 'E')
2110 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2111 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2119 /* Similar to above, except that it also rejects register pre- and post-
2123 side_effects_p (const_rtx x
)
2125 const RTX_CODE code
= GET_CODE (x
);
2145 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2146 when some combination can't be done. If we see one, don't think
2147 that we can simplify the expression. */
2148 return (GET_MODE (x
) != VOIDmode
);
2157 case UNSPEC_VOLATILE
:
2158 /* case TRAP_IF: This isn't clear yet. */
2164 if (MEM_VOLATILE_P (x
))
2171 /* Recursively scan the operands of this expression. */
2174 const char *fmt
= GET_RTX_FORMAT (code
);
2177 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2181 if (side_effects_p (XEXP (x
, i
)))
2184 else if (fmt
[i
] == 'E')
2187 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2188 if (side_effects_p (XVECEXP (x
, i
, j
)))
2196 /* Return nonzero if evaluating rtx X might cause a trap.
2197 FLAGS controls how to consider MEMs. A nonzero means the context
2198 of the access may have changed from the original, such that the
2199 address may have become invalid. */
2202 may_trap_p_1 (const_rtx x
, unsigned flags
)
2208 /* We make no distinction currently, but this function is part of
2209 the internal target-hooks ABI so we keep the parameter as
2210 "unsigned flags". */
2211 bool code_changed
= flags
!= 0;
2215 code
= GET_CODE (x
);
2218 /* Handle these cases quickly. */
2233 case UNSPEC_VOLATILE
:
2234 return targetm
.unspec_may_trap_p (x
, flags
);
2241 return MEM_VOLATILE_P (x
);
2243 /* Memory ref can trap unless it's a static var or a stack slot. */
2245 /* Recognize specific pattern of stack checking probes. */
2246 if (flag_stack_check
2247 && MEM_VOLATILE_P (x
)
2248 && XEXP (x
, 0) == stack_pointer_rtx
)
2250 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2251 reference; moving it out of context such as when moving code
2252 when optimizing, might cause its address to become invalid. */
2254 || !MEM_NOTRAP_P (x
))
2256 HOST_WIDE_INT size
= MEM_SIZE (x
) ? INTVAL (MEM_SIZE (x
)) : 0;
2257 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2258 GET_MODE (x
), code_changed
);
2263 /* Division by a non-constant might trap. */
2268 if (HONOR_SNANS (GET_MODE (x
)))
2270 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2271 return flag_trapping_math
;
2272 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2277 /* An EXPR_LIST is used to represent a function call. This
2278 certainly may trap. */
2287 /* Some floating point comparisons may trap. */
2288 if (!flag_trapping_math
)
2290 /* ??? There is no machine independent way to check for tests that trap
2291 when COMPARE is used, though many targets do make this distinction.
2292 For instance, sparc uses CCFPE for compares which generate exceptions
2293 and CCFP for compares which do not generate exceptions. */
2294 if (HONOR_NANS (GET_MODE (x
)))
2296 /* But often the compare has some CC mode, so check operand
2298 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2299 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2305 if (HONOR_SNANS (GET_MODE (x
)))
2307 /* Often comparison is CC mode, so check operand modes. */
2308 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2309 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2314 /* Conversion of floating point might trap. */
2315 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2322 /* These operations don't trap even with floating point. */
2326 /* Any floating arithmetic may trap. */
2327 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
))
2328 && flag_trapping_math
)
2332 fmt
= GET_RTX_FORMAT (code
);
2333 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2337 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2340 else if (fmt
[i
] == 'E')
2343 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2344 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2351 /* Return nonzero if evaluating rtx X might cause a trap. */
2354 may_trap_p (const_rtx x
)
2356 return may_trap_p_1 (x
, 0);
2359 /* Same as above, but additionally return nonzero if evaluating rtx X might
2360 cause a fault. We define a fault for the purpose of this function as a
2361 erroneous execution condition that cannot be encountered during the normal
2362 execution of a valid program; the typical example is an unaligned memory
2363 access on a strict alignment machine. The compiler guarantees that it
2364 doesn't generate code that will fault from a valid program, but this
2365 guarantee doesn't mean anything for individual instructions. Consider
2366 the following example:
2368 struct S { int d; union { char *cp; int *ip; }; };
2370 int foo(struct S *s)
2378 on a strict alignment machine. In a valid program, foo will never be
2379 invoked on a structure for which d is equal to 1 and the underlying
2380 unique field of the union not aligned on a 4-byte boundary, but the
2381 expression *s->ip might cause a fault if considered individually.
2383 At the RTL level, potentially problematic expressions will almost always
2384 verify may_trap_p; for example, the above dereference can be emitted as
2385 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2386 However, suppose that foo is inlined in a caller that causes s->cp to
2387 point to a local character variable and guarantees that s->d is not set
2388 to 1; foo may have been effectively translated into pseudo-RTL as:
2391 (set (reg:SI) (mem:SI (%fp - 7)))
2393 (set (reg:QI) (mem:QI (%fp - 7)))
2395 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2396 memory reference to a stack slot, but it will certainly cause a fault
2397 on a strict alignment machine. */
2400 may_trap_or_fault_p (const_rtx x
)
2402 return may_trap_p_1 (x
, 1);
2405 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2406 i.e., an inequality. */
2409 inequality_comparisons_p (const_rtx x
)
2413 const enum rtx_code code
= GET_CODE (x
);
2444 len
= GET_RTX_LENGTH (code
);
2445 fmt
= GET_RTX_FORMAT (code
);
2447 for (i
= 0; i
< len
; i
++)
2451 if (inequality_comparisons_p (XEXP (x
, i
)))
2454 else if (fmt
[i
] == 'E')
2457 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2458 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2466 /* Replace any occurrence of FROM in X with TO. The function does
2467 not enter into CONST_DOUBLE for the replace.
2469 Note that copying is not done so X must not be shared unless all copies
2470 are to be modified. */
2473 replace_rtx (rtx x
, rtx from
, rtx to
)
2478 /* The following prevents loops occurrence when we change MEM in
2479 CONST_DOUBLE onto the same CONST_DOUBLE. */
2480 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2486 /* Allow this function to make replacements in EXPR_LISTs. */
2490 if (GET_CODE (x
) == SUBREG
)
2492 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2494 if (CONST_INT_P (new_rtx
))
2496 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2497 GET_MODE (SUBREG_REG (x
)),
2502 SUBREG_REG (x
) = new_rtx
;
2506 else if (GET_CODE (x
) == ZERO_EXTEND
)
2508 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2510 if (CONST_INT_P (new_rtx
))
2512 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2513 new_rtx
, GET_MODE (XEXP (x
, 0)));
2517 XEXP (x
, 0) = new_rtx
;
2522 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2523 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2526 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2527 else if (fmt
[i
] == 'E')
2528 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2529 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2535 /* Replace occurrences of the old label in *X with the new one.
2536 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2539 replace_label (rtx
*x
, void *data
)
2542 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2543 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2544 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2549 if (GET_CODE (l
) == SYMBOL_REF
2550 && CONSTANT_POOL_ADDRESS_P (l
))
2552 rtx c
= get_pool_constant (l
);
2553 if (rtx_referenced_p (old_label
, c
))
2556 replace_label_data
*d
= (replace_label_data
*) data
;
2558 /* Create a copy of constant C; replace the label inside
2559 but do not update LABEL_NUSES because uses in constant pool
2561 new_c
= copy_rtx (c
);
2562 d
->update_label_nuses
= false;
2563 for_each_rtx (&new_c
, replace_label
, data
);
2564 d
->update_label_nuses
= update_label_nuses
;
2566 /* Add the new constant NEW_C to constant pool and replace
2567 the old reference to constant by new reference. */
2568 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2569 *x
= replace_rtx (l
, l
, new_l
);
2574 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2575 field. This is not handled by for_each_rtx because it doesn't
2576 handle unprinted ('0') fields. */
2577 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2578 JUMP_LABEL (l
) = new_label
;
2580 if ((GET_CODE (l
) == LABEL_REF
2581 || GET_CODE (l
) == INSN_LIST
)
2582 && XEXP (l
, 0) == old_label
)
2584 XEXP (l
, 0) = new_label
;
2585 if (update_label_nuses
)
2587 ++LABEL_NUSES (new_label
);
2588 --LABEL_NUSES (old_label
);
2596 /* When *BODY is equal to X or X is directly referenced by *BODY
2597 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2598 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2601 rtx_referenced_p_1 (rtx
*body
, void *x
)
2605 if (*body
== NULL_RTX
)
2606 return y
== NULL_RTX
;
2608 /* Return true if a label_ref *BODY refers to label Y. */
2609 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2610 return XEXP (*body
, 0) == y
;
2612 /* If *BODY is a reference to pool constant traverse the constant. */
2613 if (GET_CODE (*body
) == SYMBOL_REF
2614 && CONSTANT_POOL_ADDRESS_P (*body
))
2615 return rtx_referenced_p (y
, get_pool_constant (*body
));
2617 /* By default, compare the RTL expressions. */
2618 return rtx_equal_p (*body
, y
);
2621 /* Return true if X is referenced in BODY. */
2624 rtx_referenced_p (rtx x
, rtx body
)
2626 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2629 /* If INSN is a tablejump return true and store the label (before jump table) to
2630 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2633 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2638 && (label
= JUMP_LABEL (insn
)) != NULL_RTX
2639 && (table
= next_active_insn (label
)) != NULL_RTX
2640 && JUMP_TABLE_DATA_P (table
))
2651 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2652 constant that is not in the constant pool and not in the condition
2653 of an IF_THEN_ELSE. */
2656 computed_jump_p_1 (const_rtx x
)
2658 const enum rtx_code code
= GET_CODE (x
);
2678 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2679 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2682 return (computed_jump_p_1 (XEXP (x
, 1))
2683 || computed_jump_p_1 (XEXP (x
, 2)));
2689 fmt
= GET_RTX_FORMAT (code
);
2690 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2693 && computed_jump_p_1 (XEXP (x
, i
)))
2696 else if (fmt
[i
] == 'E')
2697 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2698 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2705 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2707 Tablejumps and casesi insns are not considered indirect jumps;
2708 we can recognize them by a (use (label_ref)). */
2711 computed_jump_p (const_rtx insn
)
2716 rtx pat
= PATTERN (insn
);
2718 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2719 if (JUMP_LABEL (insn
) != NULL
)
2722 if (GET_CODE (pat
) == PARALLEL
)
2724 int len
= XVECLEN (pat
, 0);
2725 int has_use_labelref
= 0;
2727 for (i
= len
- 1; i
>= 0; i
--)
2728 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2729 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2731 has_use_labelref
= 1;
2733 if (! has_use_labelref
)
2734 for (i
= len
- 1; i
>= 0; i
--)
2735 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2736 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2737 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2740 else if (GET_CODE (pat
) == SET
2741 && SET_DEST (pat
) == pc_rtx
2742 && computed_jump_p_1 (SET_SRC (pat
)))
2748 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2749 calls. Processes the subexpressions of EXP and passes them to F. */
2751 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2754 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2757 for (; format
[n
] != '\0'; n
++)
2764 result
= (*f
) (x
, data
);
2766 /* Do not traverse sub-expressions. */
2768 else if (result
!= 0)
2769 /* Stop the traversal. */
2773 /* There are no sub-expressions. */
2776 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2779 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2787 if (XVEC (exp
, n
) == 0)
2789 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2792 x
= &XVECEXP (exp
, n
, j
);
2793 result
= (*f
) (x
, data
);
2795 /* Do not traverse sub-expressions. */
2797 else if (result
!= 0)
2798 /* Stop the traversal. */
2802 /* There are no sub-expressions. */
2805 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2808 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2816 /* Nothing to do. */
2824 /* Traverse X via depth-first search, calling F for each
2825 sub-expression (including X itself). F is also passed the DATA.
2826 If F returns -1, do not traverse sub-expressions, but continue
2827 traversing the rest of the tree. If F ever returns any other
2828 nonzero value, stop the traversal, and return the value returned
2829 by F. Otherwise, return 0. This function does not traverse inside
2830 tree structure that contains RTX_EXPRs, or into sub-expressions
2831 whose format code is `0' since it is not known whether or not those
2832 codes are actually RTL.
2834 This routine is very general, and could (should?) be used to
2835 implement many of the other routines in this file. */
2838 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2844 result
= (*f
) (x
, data
);
2846 /* Do not traverse sub-expressions. */
2848 else if (result
!= 0)
2849 /* Stop the traversal. */
2853 /* There are no sub-expressions. */
2856 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2860 return for_each_rtx_1 (*x
, i
, f
, data
);
2864 /* Searches X for any reference to REGNO, returning the rtx of the
2865 reference found if any. Otherwise, returns NULL_RTX. */
2868 regno_use_in (unsigned int regno
, rtx x
)
2874 if (REG_P (x
) && REGNO (x
) == regno
)
2877 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2878 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2882 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
2885 else if (fmt
[i
] == 'E')
2886 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2887 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
2894 /* Return a value indicating whether OP, an operand of a commutative
2895 operation, is preferred as the first or second operand. The higher
2896 the value, the stronger the preference for being the first operand.
2897 We use negative values to indicate a preference for the first operand
2898 and positive values for the second operand. */
2901 commutative_operand_precedence (rtx op
)
2903 enum rtx_code code
= GET_CODE (op
);
2905 /* Constants always come the second operand. Prefer "nice" constants. */
2906 if (code
== CONST_INT
)
2908 if (code
== CONST_DOUBLE
)
2910 if (code
== CONST_FIXED
)
2912 op
= avoid_constant_pool_reference (op
);
2913 code
= GET_CODE (op
);
2915 switch (GET_RTX_CLASS (code
))
2918 if (code
== CONST_INT
)
2920 if (code
== CONST_DOUBLE
)
2922 if (code
== CONST_FIXED
)
2927 /* SUBREGs of objects should come second. */
2928 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
2933 /* Complex expressions should be the first, so decrease priority
2934 of objects. Prefer pointer objects over non pointer objects. */
2935 if ((REG_P (op
) && REG_POINTER (op
))
2936 || (MEM_P (op
) && MEM_POINTER (op
)))
2940 case RTX_COMM_ARITH
:
2941 /* Prefer operands that are themselves commutative to be first.
2942 This helps to make things linear. In particular,
2943 (and (and (reg) (reg)) (not (reg))) is canonical. */
2947 /* If only one operand is a binary expression, it will be the first
2948 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2949 is canonical, although it will usually be further simplified. */
2953 /* Then prefer NEG and NOT. */
2954 if (code
== NEG
|| code
== NOT
)
2962 /* Return 1 iff it is necessary to swap operands of commutative operation
2963 in order to canonicalize expression. */
2966 swap_commutative_operands_p (rtx x
, rtx y
)
2968 return (commutative_operand_precedence (x
)
2969 < commutative_operand_precedence (y
));
2972 /* Return 1 if X is an autoincrement side effect and the register is
2973 not the stack pointer. */
2975 auto_inc_p (const_rtx x
)
2977 switch (GET_CODE (x
))
2985 /* There are no REG_INC notes for SP. */
2986 if (XEXP (x
, 0) != stack_pointer_rtx
)
2994 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2996 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3005 code
= GET_CODE (in
);
3006 fmt
= GET_RTX_FORMAT (code
);
3007 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3011 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3014 else if (fmt
[i
] == 'E')
3015 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3016 if (loc
== &XVECEXP (in
, i
, j
)
3017 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3023 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3024 and SUBREG_BYTE, return the bit offset where the subreg begins
3025 (counting from the least significant bit of the operand). */
3028 subreg_lsb_1 (enum machine_mode outer_mode
,
3029 enum machine_mode inner_mode
,
3030 unsigned int subreg_byte
)
3032 unsigned int bitpos
;
3036 /* A paradoxical subreg begins at bit position 0. */
3037 if (GET_MODE_BITSIZE (outer_mode
) > GET_MODE_BITSIZE (inner_mode
))
3040 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3041 /* If the subreg crosses a word boundary ensure that
3042 it also begins and ends on a word boundary. */
3043 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3044 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3045 && (subreg_byte
% UNITS_PER_WORD
3046 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3048 if (WORDS_BIG_ENDIAN
)
3049 word
= (GET_MODE_SIZE (inner_mode
)
3050 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3052 word
= subreg_byte
/ UNITS_PER_WORD
;
3053 bitpos
= word
* BITS_PER_WORD
;
3055 if (BYTES_BIG_ENDIAN
)
3056 byte
= (GET_MODE_SIZE (inner_mode
)
3057 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3059 byte
= subreg_byte
% UNITS_PER_WORD
;
3060 bitpos
+= byte
* BITS_PER_UNIT
;
3065 /* Given a subreg X, return the bit offset where the subreg begins
3066 (counting from the least significant bit of the reg). */
3069 subreg_lsb (const_rtx x
)
3071 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3075 /* Fill in information about a subreg of a hard register.
3076 xregno - A regno of an inner hard subreg_reg (or what will become one).
3077 xmode - The mode of xregno.
3078 offset - The byte offset.
3079 ymode - The mode of a top level SUBREG (or what may become one).
3080 info - Pointer to structure to fill in. */
3082 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3083 unsigned int offset
, enum machine_mode ymode
,
3084 struct subreg_info
*info
)
3086 int nregs_xmode
, nregs_ymode
;
3087 int mode_multiple
, nregs_multiple
;
3088 int offset_adj
, y_offset
, y_offset_adj
;
3089 int regsize_xmode
, regsize_ymode
;
3092 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3096 /* If there are holes in a non-scalar mode in registers, we expect
3097 that it is made up of its units concatenated together. */
3098 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3100 enum machine_mode xmode_unit
;
3102 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3103 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3106 xmode_unit
= GET_MODE_INNER (xmode
);
3107 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3108 gcc_assert (nregs_xmode
3109 == (GET_MODE_NUNITS (xmode
)
3110 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3111 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3112 == (hard_regno_nregs
[xregno
][xmode_unit
]
3113 * GET_MODE_NUNITS (xmode
)));
3115 /* You can only ask for a SUBREG of a value with holes in the middle
3116 if you don't cross the holes. (Such a SUBREG should be done by
3117 picking a different register class, or doing it in memory if
3118 necessary.) An example of a value with holes is XCmode on 32-bit
3119 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3120 3 for each part, but in memory it's two 128-bit parts.
3121 Padding is assumed to be at the end (not necessarily the 'high part')
3123 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3124 < GET_MODE_NUNITS (xmode
))
3125 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3126 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3127 / GET_MODE_SIZE (xmode_unit
))))
3129 info
->representable_p
= false;
3134 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3136 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3138 /* Paradoxical subregs are otherwise valid. */
3141 && GET_MODE_SIZE (ymode
) > GET_MODE_SIZE (xmode
))
3143 info
->representable_p
= true;
3144 /* If this is a big endian paradoxical subreg, which uses more
3145 actual hard registers than the original register, we must
3146 return a negative offset so that we find the proper highpart
3148 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3149 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3150 info
->offset
= nregs_xmode
- nregs_ymode
;
3153 info
->nregs
= nregs_ymode
;
3157 /* If registers store different numbers of bits in the different
3158 modes, we cannot generally form this subreg. */
3159 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3160 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3161 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3162 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3164 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3165 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3166 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3168 info
->representable_p
= false;
3170 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3171 info
->offset
= offset
/ regsize_xmode
;
3174 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3176 info
->representable_p
= false;
3178 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3179 info
->offset
= offset
/ regsize_xmode
;
3184 /* Lowpart subregs are otherwise valid. */
3185 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3187 info
->representable_p
= true;
3190 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3193 info
->nregs
= nregs_ymode
;
3198 /* This should always pass, otherwise we don't know how to verify
3199 the constraint. These conditions may be relaxed but
3200 subreg_regno_offset would need to be redesigned. */
3201 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3202 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3204 /* The XMODE value can be seen as a vector of NREGS_XMODE
3205 values. The subreg must represent a lowpart of given field.
3206 Compute what field it is. */
3207 offset_adj
= offset
;
3208 offset_adj
-= subreg_lowpart_offset (ymode
,
3209 mode_for_size (GET_MODE_BITSIZE (xmode
)
3213 /* Size of ymode must not be greater than the size of xmode. */
3214 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3215 gcc_assert (mode_multiple
!= 0);
3217 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3218 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3219 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3221 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3222 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3226 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3229 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3230 info
->nregs
= nregs_ymode
;
3233 /* This function returns the regno offset of a subreg expression.
3234 xregno - A regno of an inner hard subreg_reg (or what will become one).
3235 xmode - The mode of xregno.
3236 offset - The byte offset.
3237 ymode - The mode of a top level SUBREG (or what may become one).
3238 RETURN - The regno offset which would be used. */
3240 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3241 unsigned int offset
, enum machine_mode ymode
)
3243 struct subreg_info info
;
3244 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3248 /* This function returns true when the offset is representable via
3249 subreg_offset in the given regno.
3250 xregno - A regno of an inner hard subreg_reg (or what will become one).
3251 xmode - The mode of xregno.
3252 offset - The byte offset.
3253 ymode - The mode of a top level SUBREG (or what may become one).
3254 RETURN - Whether the offset is representable. */
3256 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3257 unsigned int offset
, enum machine_mode ymode
)
3259 struct subreg_info info
;
3260 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3261 return info
.representable_p
;
3264 /* Return the number of a YMODE register to which
3266 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3268 can be simplified. Return -1 if the subreg can't be simplified.
3270 XREGNO is a hard register number. */
3273 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3274 unsigned int offset
, enum machine_mode ymode
)
3276 struct subreg_info info
;
3277 unsigned int yregno
;
3279 #ifdef CANNOT_CHANGE_MODE_CLASS
3280 /* Give the backend a chance to disallow the mode change. */
3281 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3282 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3283 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
))
3287 /* We shouldn't simplify stack-related registers. */
3288 if ((!reload_completed
|| frame_pointer_needed
)
3289 && xregno
== FRAME_POINTER_REGNUM
)
3292 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3293 && xregno
== ARG_POINTER_REGNUM
)
3296 if (xregno
== STACK_POINTER_REGNUM
)
3299 /* Try to get the register offset. */
3300 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3301 if (!info
.representable_p
)
3304 /* Make sure that the offsetted register value is in range. */
3305 yregno
= xregno
+ info
.offset
;
3306 if (!HARD_REGISTER_NUM_P (yregno
))
3309 /* See whether (reg:YMODE YREGNO) is valid.
3311 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3312 This is a kludge to work around how float/complex arguments are passed
3313 on 32-bit SPARC and should be fixed. */
3314 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3315 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3318 return (int) yregno
;
3321 /* Return the final regno that a subreg expression refers to. */
3323 subreg_regno (const_rtx x
)
3326 rtx subreg
= SUBREG_REG (x
);
3327 int regno
= REGNO (subreg
);
3329 ret
= regno
+ subreg_regno_offset (regno
,
3337 /* Return the number of registers that a subreg expression refers
3340 subreg_nregs (const_rtx x
)
3342 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3345 /* Return the number of registers that a subreg REG with REGNO
3346 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3347 changed so that the regno can be passed in. */
3350 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3352 struct subreg_info info
;
3353 rtx subreg
= SUBREG_REG (x
);
3355 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3361 struct parms_set_data
3367 /* Helper function for noticing stores to parameter registers. */
3369 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3371 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3372 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3373 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3375 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3380 /* Look backward for first parameter to be loaded.
3381 Note that loads of all parameters will not necessarily be
3382 found if CSE has eliminated some of them (e.g., an argument
3383 to the outer function is passed down as a parameter).
3384 Do not skip BOUNDARY. */
3386 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3388 struct parms_set_data parm
;
3389 rtx p
, before
, first_set
;
3391 /* Since different machines initialize their parameter registers
3392 in different orders, assume nothing. Collect the set of all
3393 parameter registers. */
3394 CLEAR_HARD_REG_SET (parm
.regs
);
3396 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3397 if (GET_CODE (XEXP (p
, 0)) == USE
3398 && REG_P (XEXP (XEXP (p
, 0), 0)))
3400 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3402 /* We only care about registers which can hold function
3404 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3407 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3411 first_set
= call_insn
;
3413 /* Search backward for the first set of a register in this set. */
3414 while (parm
.nregs
&& before
!= boundary
)
3416 before
= PREV_INSN (before
);
3418 /* It is possible that some loads got CSEed from one call to
3419 another. Stop in that case. */
3420 if (CALL_P (before
))
3423 /* Our caller needs either ensure that we will find all sets
3424 (in case code has not been optimized yet), or take care
3425 for possible labels in a way by setting boundary to preceding
3427 if (LABEL_P (before
))
3429 gcc_assert (before
== boundary
);
3433 if (INSN_P (before
))
3435 int nregs_old
= parm
.nregs
;
3436 note_stores (PATTERN (before
), parms_set
, &parm
);
3437 /* If we found something that did not set a parameter reg,
3438 we're done. Do not keep going, as that might result
3439 in hoisting an insn before the setting of a pseudo
3440 that is used by the hoisted insn. */
3441 if (nregs_old
!= parm
.nregs
)
3450 /* Return true if we should avoid inserting code between INSN and preceding
3451 call instruction. */
3454 keep_with_call_p (const_rtx insn
)
3458 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3460 if (REG_P (SET_DEST (set
))
3461 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3462 && fixed_regs
[REGNO (SET_DEST (set
))]
3463 && general_operand (SET_SRC (set
), VOIDmode
))
3465 if (REG_P (SET_SRC (set
))
3466 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3467 && REG_P (SET_DEST (set
))
3468 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3470 /* There may be a stack pop just after the call and before the store
3471 of the return register. Search for the actual store when deciding
3472 if we can break or not. */
3473 if (SET_DEST (set
) == stack_pointer_rtx
)
3475 /* This CONST_CAST is okay because next_nonnote_insn just
3476 returns its argument and we assign it to a const_rtx
3478 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX(insn
));
3479 if (i2
&& keep_with_call_p (i2
))
3486 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3487 to non-complex jumps. That is, direct unconditional, conditional,
3488 and tablejumps, but not computed jumps or returns. It also does
3489 not apply to the fallthru case of a conditional jump. */
3492 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3494 rtx tmp
= JUMP_LABEL (jump_insn
);
3499 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3501 rtvec vec
= XVEC (PATTERN (tmp
),
3502 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3503 int i
, veclen
= GET_NUM_ELEM (vec
);
3505 for (i
= 0; i
< veclen
; ++i
)
3506 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3510 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3517 /* Return an estimate of the cost of computing rtx X.
3518 One use is in cse, to decide which expression to keep in the hash table.
3519 Another is in rtl generation, to pick the cheapest way to multiply.
3520 Other uses like the latter are expected in the future.
3522 SPEED parameter specify whether costs optimized for speed or size should
3526 rtx_cost (rtx x
, enum rtx_code outer_code ATTRIBUTE_UNUSED
, bool speed
)
3536 /* Compute the default costs of certain things.
3537 Note that targetm.rtx_costs can override the defaults. */
3539 code
= GET_CODE (x
);
3543 total
= COSTS_N_INSNS (5);
3549 total
= COSTS_N_INSNS (7);
3552 /* Used in combine.c as a marker. */
3556 total
= COSTS_N_INSNS (1);
3566 /* If we can't tie these modes, make this expensive. The larger
3567 the mode, the more expensive it is. */
3568 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3569 return COSTS_N_INSNS (2
3570 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
3574 if (targetm
.rtx_costs (x
, code
, outer_code
, &total
, speed
))
3579 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3580 which is already in total. */
3582 fmt
= GET_RTX_FORMAT (code
);
3583 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3585 total
+= rtx_cost (XEXP (x
, i
), code
, speed
);
3586 else if (fmt
[i
] == 'E')
3587 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3588 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, speed
);
3593 /* Return cost of address expression X.
3594 Expect that X is properly formed address reference.
3596 SPEED parameter specify whether costs optimized for speed or size should
3600 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3602 /* We may be asked for cost of various unusual addresses, such as operands
3603 of push instruction. It is not worthwhile to complicate writing
3604 of the target hook by such cases. */
3606 if (!memory_address_addr_space_p (mode
, x
, as
))
3609 return targetm
.address_cost (x
, speed
);
3612 /* If the target doesn't override, compute the cost as with arithmetic. */
3615 default_address_cost (rtx x
, bool speed
)
3617 return rtx_cost (x
, MEM
, speed
);
3621 unsigned HOST_WIDE_INT
3622 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3624 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3628 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3630 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3633 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3634 It avoids exponential behavior in nonzero_bits1 when X has
3635 identical subexpressions on the first or the second level. */
3637 static unsigned HOST_WIDE_INT
3638 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3639 enum machine_mode known_mode
,
3640 unsigned HOST_WIDE_INT known_ret
)
3642 if (x
== known_x
&& mode
== known_mode
)
3645 /* Try to find identical subexpressions. If found call
3646 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3647 precomputed value for the subexpression as KNOWN_RET. */
3649 if (ARITHMETIC_P (x
))
3651 rtx x0
= XEXP (x
, 0);
3652 rtx x1
= XEXP (x
, 1);
3654 /* Check the first level. */
3656 return nonzero_bits1 (x
, mode
, x0
, mode
,
3657 cached_nonzero_bits (x0
, mode
, known_x
,
3658 known_mode
, known_ret
));
3660 /* Check the second level. */
3661 if (ARITHMETIC_P (x0
)
3662 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3663 return nonzero_bits1 (x
, mode
, x1
, mode
,
3664 cached_nonzero_bits (x1
, mode
, known_x
,
3665 known_mode
, known_ret
));
3667 if (ARITHMETIC_P (x1
)
3668 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3669 return nonzero_bits1 (x
, mode
, x0
, mode
,
3670 cached_nonzero_bits (x0
, mode
, known_x
,
3671 known_mode
, known_ret
));
3674 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3677 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3678 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3679 is less useful. We can't allow both, because that results in exponential
3680 run time recursion. There is a nullstone testcase that triggered
3681 this. This macro avoids accidental uses of num_sign_bit_copies. */
3682 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3684 /* Given an expression, X, compute which bits in X can be nonzero.
3685 We don't care about bits outside of those defined in MODE.
3687 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3688 an arithmetic operation, we can do better. */
3690 static unsigned HOST_WIDE_INT
3691 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3692 enum machine_mode known_mode
,
3693 unsigned HOST_WIDE_INT known_ret
)
3695 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3696 unsigned HOST_WIDE_INT inner_nz
;
3698 unsigned int mode_width
= GET_MODE_BITSIZE (mode
);
3700 /* For floating-point and vector values, assume all bits are needed. */
3701 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3702 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3705 /* If X is wider than MODE, use its mode instead. */
3706 if (GET_MODE_BITSIZE (GET_MODE (x
)) > mode_width
)
3708 mode
= GET_MODE (x
);
3709 nonzero
= GET_MODE_MASK (mode
);
3710 mode_width
= GET_MODE_BITSIZE (mode
);
3713 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3714 /* Our only callers in this case look for single bit values. So
3715 just return the mode mask. Those tests will then be false. */
3718 #ifndef WORD_REGISTER_OPERATIONS
3719 /* If MODE is wider than X, but both are a single word for both the host
3720 and target machines, we can compute this from which bits of the
3721 object might be nonzero in its own mode, taking into account the fact
3722 that on many CISC machines, accessing an object in a wider mode
3723 causes the high-order bits to become undefined. So they are
3724 not known to be zero. */
3726 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3727 && GET_MODE_BITSIZE (GET_MODE (x
)) <= BITS_PER_WORD
3728 && GET_MODE_BITSIZE (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3729 && GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (GET_MODE (x
)))
3731 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3732 known_x
, known_mode
, known_ret
);
3733 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3738 code
= GET_CODE (x
);
3742 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3743 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3744 all the bits above ptr_mode are known to be zero. */
3745 /* As we do not know which address space the pointer is refering to,
3746 we can do this only if the target does not support different pointer
3747 or address modes depending on the address space. */
3748 if (target_default_pointer_address_modes_p ()
3749 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3751 nonzero
&= GET_MODE_MASK (ptr_mode
);
3754 /* Include declared information about alignment of pointers. */
3755 /* ??? We don't properly preserve REG_POINTER changes across
3756 pointer-to-integer casts, so we can't trust it except for
3757 things that we know must be pointers. See execute/960116-1.c. */
3758 if ((x
== stack_pointer_rtx
3759 || x
== frame_pointer_rtx
3760 || x
== arg_pointer_rtx
)
3761 && REGNO_POINTER_ALIGN (REGNO (x
)))
3763 unsigned HOST_WIDE_INT alignment
3764 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3766 #ifdef PUSH_ROUNDING
3767 /* If PUSH_ROUNDING is defined, it is possible for the
3768 stack to be momentarily aligned only to that amount,
3769 so we pick the least alignment. */
3770 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3771 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3775 nonzero
&= ~(alignment
- 1);
3779 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3780 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3781 known_mode
, known_ret
,
3785 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
3786 known_mode
, known_ret
);
3788 return nonzero_for_hook
;
3792 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3793 /* If X is negative in MODE, sign-extend the value. */
3795 && mode_width
< BITS_PER_WORD
3796 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
3798 return UINTVAL (x
) | ((unsigned HOST_WIDE_INT
) (-1) << mode_width
);
3804 #ifdef LOAD_EXTEND_OP
3805 /* In many, if not most, RISC machines, reading a byte from memory
3806 zeros the rest of the register. Noticing that fact saves a lot
3807 of extra zero-extends. */
3808 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
3809 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
3814 case UNEQ
: case LTGT
:
3815 case GT
: case GTU
: case UNGT
:
3816 case LT
: case LTU
: case UNLT
:
3817 case GE
: case GEU
: case UNGE
:
3818 case LE
: case LEU
: case UNLE
:
3819 case UNORDERED
: case ORDERED
:
3820 /* If this produces an integer result, we know which bits are set.
3821 Code here used to clear bits outside the mode of X, but that is
3823 /* Mind that MODE is the mode the caller wants to look at this
3824 operation in, and not the actual operation mode. We can wind
3825 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3826 that describes the results of a vector compare. */
3827 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
3828 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
3829 nonzero
= STORE_FLAG_VALUE
;
3834 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3835 and num_sign_bit_copies. */
3836 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3837 == GET_MODE_BITSIZE (GET_MODE (x
)))
3841 if (GET_MODE_SIZE (GET_MODE (x
)) < mode_width
)
3842 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
3847 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3848 and num_sign_bit_copies. */
3849 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3850 == GET_MODE_BITSIZE (GET_MODE (x
)))
3856 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
3857 known_x
, known_mode
, known_ret
)
3858 & GET_MODE_MASK (mode
));
3862 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3863 known_x
, known_mode
, known_ret
);
3864 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3865 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3869 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3870 Otherwise, show all the bits in the outer mode but not the inner
3872 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
3873 known_x
, known_mode
, known_ret
);
3874 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3876 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3878 & (((unsigned HOST_WIDE_INT
) 1
3879 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0))) - 1))))
3880 inner_nz
|= (GET_MODE_MASK (mode
)
3881 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
3884 nonzero
&= inner_nz
;
3888 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3889 known_x
, known_mode
, known_ret
)
3890 & cached_nonzero_bits (XEXP (x
, 1), mode
,
3891 known_x
, known_mode
, known_ret
);
3895 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
3897 unsigned HOST_WIDE_INT nonzero0
3898 = cached_nonzero_bits (XEXP (x
, 0), mode
,
3899 known_x
, known_mode
, known_ret
);
3901 /* Don't call nonzero_bits for the second time if it cannot change
3903 if ((nonzero
& nonzero0
) != nonzero
)
3905 | cached_nonzero_bits (XEXP (x
, 1), mode
,
3906 known_x
, known_mode
, known_ret
);
3910 case PLUS
: case MINUS
:
3912 case DIV
: case UDIV
:
3913 case MOD
: case UMOD
:
3914 /* We can apply the rules of arithmetic to compute the number of
3915 high- and low-order zero bits of these operations. We start by
3916 computing the width (position of the highest-order nonzero bit)
3917 and the number of low-order zero bits for each value. */
3919 unsigned HOST_WIDE_INT nz0
3920 = cached_nonzero_bits (XEXP (x
, 0), mode
,
3921 known_x
, known_mode
, known_ret
);
3922 unsigned HOST_WIDE_INT nz1
3923 = cached_nonzero_bits (XEXP (x
, 1), mode
,
3924 known_x
, known_mode
, known_ret
);
3925 int sign_index
= GET_MODE_BITSIZE (GET_MODE (x
)) - 1;
3926 int width0
= floor_log2 (nz0
) + 1;
3927 int width1
= floor_log2 (nz1
) + 1;
3928 int low0
= floor_log2 (nz0
& -nz0
);
3929 int low1
= floor_log2 (nz1
& -nz1
);
3930 unsigned HOST_WIDE_INT op0_maybe_minusp
3931 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
3932 unsigned HOST_WIDE_INT op1_maybe_minusp
3933 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
3934 unsigned int result_width
= mode_width
;
3940 result_width
= MAX (width0
, width1
) + 1;
3941 result_low
= MIN (low0
, low1
);
3944 result_low
= MIN (low0
, low1
);
3947 result_width
= width0
+ width1
;
3948 result_low
= low0
+ low1
;
3953 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
3954 result_width
= width0
;
3959 result_width
= width0
;
3964 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
3965 result_width
= MIN (width0
, width1
);
3966 result_low
= MIN (low0
, low1
);
3971 result_width
= MIN (width0
, width1
);
3972 result_low
= MIN (low0
, low1
);
3978 if (result_width
< mode_width
)
3979 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
3982 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
3984 #ifdef POINTERS_EXTEND_UNSIGNED
3985 /* If pointers extend unsigned and this is an addition or subtraction
3986 to a pointer in Pmode, all the bits above ptr_mode are known to be
3988 /* As we do not know which address space the pointer is refering to,
3989 we can do this only if the target does not support different pointer
3990 or address modes depending on the address space. */
3991 if (target_default_pointer_address_modes_p ()
3992 && POINTERS_EXTEND_UNSIGNED
> 0 && GET_MODE (x
) == Pmode
3993 && (code
== PLUS
|| code
== MINUS
)
3994 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
3995 nonzero
&= GET_MODE_MASK (ptr_mode
);
4001 if (CONST_INT_P (XEXP (x
, 1))
4002 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4003 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4007 /* If this is a SUBREG formed for a promoted variable that has
4008 been zero-extended, we know that at least the high-order bits
4009 are zero, though others might be too. */
4011 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4012 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4013 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4014 known_x
, known_mode
, known_ret
);
4016 /* If the inner mode is a single word for both the host and target
4017 machines, we can compute this from which bits of the inner
4018 object might be nonzero. */
4019 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) <= BITS_PER_WORD
4020 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4021 <= HOST_BITS_PER_WIDE_INT
))
4023 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4024 known_x
, known_mode
, known_ret
);
4026 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4027 /* If this is a typical RISC machine, we only have to worry
4028 about the way loads are extended. */
4029 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4031 & (((unsigned HOST_WIDE_INT
) 1
4032 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) - 1))))
4034 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) != ZERO_EXTEND
)
4035 || !MEM_P (SUBREG_REG (x
)))
4038 /* On many CISC machines, accessing an object in a wider mode
4039 causes the high-order bits to become undefined. So they are
4040 not known to be zero. */
4041 if (GET_MODE_SIZE (GET_MODE (x
))
4042 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4043 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4044 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x
))));
4053 /* The nonzero bits are in two classes: any bits within MODE
4054 that aren't in GET_MODE (x) are always significant. The rest of the
4055 nonzero bits are those that are significant in the operand of
4056 the shift when shifted the appropriate number of bits. This
4057 shows that high-order bits are cleared by the right shift and
4058 low-order bits by left shifts. */
4059 if (CONST_INT_P (XEXP (x
, 1))
4060 && INTVAL (XEXP (x
, 1)) >= 0
4061 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4062 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (GET_MODE (x
)))
4064 enum machine_mode inner_mode
= GET_MODE (x
);
4065 unsigned int width
= GET_MODE_BITSIZE (inner_mode
);
4066 int count
= INTVAL (XEXP (x
, 1));
4067 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4068 unsigned HOST_WIDE_INT op_nonzero
4069 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4070 known_x
, known_mode
, known_ret
);
4071 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4072 unsigned HOST_WIDE_INT outer
= 0;
4074 if (mode_width
> width
)
4075 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4077 if (code
== LSHIFTRT
)
4079 else if (code
== ASHIFTRT
)
4083 /* If the sign bit may have been nonzero before the shift, we
4084 need to mark all the places it could have been copied to
4085 by the shift as possibly nonzero. */
4086 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4087 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4090 else if (code
== ASHIFT
)
4093 inner
= ((inner
<< (count
% width
)
4094 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4096 nonzero
&= (outer
| inner
);
4102 /* This is at most the number of bits in the mode. */
4103 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4107 /* If CLZ has a known value at zero, then the nonzero bits are
4108 that value, plus the number of bits in the mode minus one. */
4109 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4111 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4117 /* If CTZ has a known value at zero, then the nonzero bits are
4118 that value, plus the number of bits in the mode minus one. */
4119 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4121 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4132 unsigned HOST_WIDE_INT nonzero_true
4133 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4134 known_x
, known_mode
, known_ret
);
4136 /* Don't call nonzero_bits for the second time if it cannot change
4138 if ((nonzero
& nonzero_true
) != nonzero
)
4139 nonzero
&= nonzero_true
4140 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4141 known_x
, known_mode
, known_ret
);
4152 /* See the macro definition above. */
4153 #undef cached_num_sign_bit_copies
4156 /* The function cached_num_sign_bit_copies is a wrapper around
4157 num_sign_bit_copies1. It avoids exponential behavior in
4158 num_sign_bit_copies1 when X has identical subexpressions on the
4159 first or the second level. */
4162 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4163 enum machine_mode known_mode
,
4164 unsigned int known_ret
)
4166 if (x
== known_x
&& mode
== known_mode
)
4169 /* Try to find identical subexpressions. If found call
4170 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4171 the precomputed value for the subexpression as KNOWN_RET. */
4173 if (ARITHMETIC_P (x
))
4175 rtx x0
= XEXP (x
, 0);
4176 rtx x1
= XEXP (x
, 1);
4178 /* Check the first level. */
4181 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4182 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4186 /* Check the second level. */
4187 if (ARITHMETIC_P (x0
)
4188 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4190 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4191 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4195 if (ARITHMETIC_P (x1
)
4196 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4198 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4199 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4204 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4207 /* Return the number of bits at the high-order end of X that are known to
4208 be equal to the sign bit. X will be used in mode MODE; if MODE is
4209 VOIDmode, X will be used in its own mode. The returned value will always
4210 be between 1 and the number of bits in MODE. */
4213 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4214 enum machine_mode known_mode
,
4215 unsigned int known_ret
)
4217 enum rtx_code code
= GET_CODE (x
);
4218 unsigned int bitwidth
= GET_MODE_BITSIZE (mode
);
4219 int num0
, num1
, result
;
4220 unsigned HOST_WIDE_INT nonzero
;
4222 /* If we weren't given a mode, use the mode of X. If the mode is still
4223 VOIDmode, we don't know anything. Likewise if one of the modes is
4226 if (mode
== VOIDmode
)
4227 mode
= GET_MODE (x
);
4229 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4230 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4233 /* For a smaller object, just ignore the high bits. */
4234 if (bitwidth
< GET_MODE_BITSIZE (GET_MODE (x
)))
4236 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4237 known_x
, known_mode
, known_ret
);
4239 num0
- (int) (GET_MODE_BITSIZE (GET_MODE (x
)) - bitwidth
));
4242 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_BITSIZE (GET_MODE (x
)))
4244 #ifndef WORD_REGISTER_OPERATIONS
4245 /* If this machine does not do all register operations on the entire
4246 register and MODE is wider than the mode of X, we can say nothing
4247 at all about the high-order bits. */
4250 /* Likewise on machines that do, if the mode of the object is smaller
4251 than a word and loads of that size don't sign extend, we can say
4252 nothing about the high order bits. */
4253 if (GET_MODE_BITSIZE (GET_MODE (x
)) < BITS_PER_WORD
4254 #ifdef LOAD_EXTEND_OP
4255 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4266 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4267 /* If pointers extend signed and this is a pointer in Pmode, say that
4268 all the bits above ptr_mode are known to be sign bit copies. */
4269 /* As we do not know which address space the pointer is refering to,
4270 we can do this only if the target does not support different pointer
4271 or address modes depending on the address space. */
4272 if (target_default_pointer_address_modes_p ()
4273 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4274 && mode
== Pmode
&& REG_POINTER (x
))
4275 return GET_MODE_BITSIZE (Pmode
) - GET_MODE_BITSIZE (ptr_mode
) + 1;
4279 unsigned int copies_for_hook
= 1, copies
= 1;
4280 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4281 known_mode
, known_ret
,
4285 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4286 known_mode
, known_ret
);
4288 if (copies
> 1 || copies_for_hook
> 1)
4289 return MAX (copies
, copies_for_hook
);
4291 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4296 #ifdef LOAD_EXTEND_OP
4297 /* Some RISC machines sign-extend all loads of smaller than a word. */
4298 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4299 return MAX (1, ((int) bitwidth
4300 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1));
4305 /* If the constant is negative, take its 1's complement and remask.
4306 Then see how many zero bits we have. */
4307 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4308 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4309 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4310 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4312 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4315 /* If this is a SUBREG for a promoted object that is sign-extended
4316 and we are looking at it in a wider mode, we know that at least the
4317 high-order bits are known to be sign bit copies. */
4319 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4321 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4322 known_x
, known_mode
, known_ret
);
4323 return MAX ((int) bitwidth
4324 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1,
4328 /* For a smaller object, just ignore the high bits. */
4329 if (bitwidth
<= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))))
4331 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4332 known_x
, known_mode
, known_ret
);
4333 return MAX (1, (num0
4334 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4338 #ifdef WORD_REGISTER_OPERATIONS
4339 #ifdef LOAD_EXTEND_OP
4340 /* For paradoxical SUBREGs on machines where all register operations
4341 affect the entire register, just look inside. Note that we are
4342 passing MODE to the recursive call, so the number of sign bit copies
4343 will remain relative to that mode, not the inner mode. */
4345 /* This works only if loads sign extend. Otherwise, if we get a
4346 reload for the inner part, it may be loaded from the stack, and
4347 then we lose all sign bit copies that existed before the store
4350 if ((GET_MODE_SIZE (GET_MODE (x
))
4351 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4352 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4353 && MEM_P (SUBREG_REG (x
)))
4354 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4355 known_x
, known_mode
, known_ret
);
4361 if (CONST_INT_P (XEXP (x
, 1)))
4362 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4366 return (bitwidth
- GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4367 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4368 known_x
, known_mode
, known_ret
));
4371 /* For a smaller object, just ignore the high bits. */
4372 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4373 known_x
, known_mode
, known_ret
);
4374 return MAX (1, (num0
- (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4378 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4379 known_x
, known_mode
, known_ret
);
4381 case ROTATE
: case ROTATERT
:
4382 /* If we are rotating left by a number of bits less than the number
4383 of sign bit copies, we can just subtract that amount from the
4385 if (CONST_INT_P (XEXP (x
, 1))
4386 && INTVAL (XEXP (x
, 1)) >= 0
4387 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4389 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4390 known_x
, known_mode
, known_ret
);
4391 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4392 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4397 /* In general, this subtracts one sign bit copy. But if the value
4398 is known to be positive, the number of sign bit copies is the
4399 same as that of the input. Finally, if the input has just one bit
4400 that might be nonzero, all the bits are copies of the sign bit. */
4401 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4402 known_x
, known_mode
, known_ret
);
4403 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4404 return num0
> 1 ? num0
- 1 : 1;
4406 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4411 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4416 case IOR
: case AND
: case XOR
:
4417 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4418 /* Logical operations will preserve the number of sign-bit copies.
4419 MIN and MAX operations always return one of the operands. */
4420 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4421 known_x
, known_mode
, known_ret
);
4422 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4423 known_x
, known_mode
, known_ret
);
4425 /* If num1 is clearing some of the top bits then regardless of
4426 the other term, we are guaranteed to have at least that many
4427 high-order zero bits. */
4430 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4431 && CONST_INT_P (XEXP (x
, 1))
4432 && (UINTVAL (XEXP (x
, 1))
4433 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4436 /* Similarly for IOR when setting high-order bits. */
4439 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4440 && CONST_INT_P (XEXP (x
, 1))
4441 && (UINTVAL (XEXP (x
, 1))
4442 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4445 return MIN (num0
, num1
);
4447 case PLUS
: case MINUS
:
4448 /* For addition and subtraction, we can have a 1-bit carry. However,
4449 if we are subtracting 1 from a positive number, there will not
4450 be such a carry. Furthermore, if the positive number is known to
4451 be 0 or 1, we know the result is either -1 or 0. */
4453 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4454 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4456 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4457 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4458 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4459 : bitwidth
- floor_log2 (nonzero
) - 1);
4462 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4463 known_x
, known_mode
, known_ret
);
4464 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4465 known_x
, known_mode
, known_ret
);
4466 result
= MAX (1, MIN (num0
, num1
) - 1);
4468 #ifdef POINTERS_EXTEND_UNSIGNED
4469 /* If pointers extend signed and this is an addition or subtraction
4470 to a pointer in Pmode, all the bits above ptr_mode are known to be
4472 /* As we do not know which address space the pointer is refering to,
4473 we can do this only if the target does not support different pointer
4474 or address modes depending on the address space. */
4475 if (target_default_pointer_address_modes_p ()
4476 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4477 && (code
== PLUS
|| code
== MINUS
)
4478 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4479 result
= MAX ((int) (GET_MODE_BITSIZE (Pmode
)
4480 - GET_MODE_BITSIZE (ptr_mode
) + 1),
4486 /* The number of bits of the product is the sum of the number of
4487 bits of both terms. However, unless one of the terms if known
4488 to be positive, we must allow for an additional bit since negating
4489 a negative number can remove one sign bit copy. */
4491 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4492 known_x
, known_mode
, known_ret
);
4493 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4494 known_x
, known_mode
, known_ret
);
4496 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4498 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4499 || (((nonzero_bits (XEXP (x
, 0), mode
)
4500 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4501 && ((nonzero_bits (XEXP (x
, 1), mode
)
4502 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4506 return MAX (1, result
);
4509 /* The result must be <= the first operand. If the first operand
4510 has the high bit set, we know nothing about the number of sign
4512 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4514 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4515 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4518 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4519 known_x
, known_mode
, known_ret
);
4522 /* The result must be <= the second operand. If the second operand
4523 has (or just might have) the high bit set, we know nothing about
4524 the number of sign bit copies. */
4525 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4527 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4528 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4531 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4532 known_x
, known_mode
, known_ret
);
4535 /* Similar to unsigned division, except that we have to worry about
4536 the case where the divisor is negative, in which case we have
4538 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4539 known_x
, known_mode
, known_ret
);
4541 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4542 || (nonzero_bits (XEXP (x
, 1), mode
)
4543 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4549 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4550 known_x
, known_mode
, known_ret
);
4552 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4553 || (nonzero_bits (XEXP (x
, 1), mode
)
4554 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4560 /* Shifts by a constant add to the number of bits equal to the
4562 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4563 known_x
, known_mode
, known_ret
);
4564 if (CONST_INT_P (XEXP (x
, 1))
4565 && INTVAL (XEXP (x
, 1)) > 0
4566 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (GET_MODE (x
)))
4567 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4572 /* Left shifts destroy copies. */
4573 if (!CONST_INT_P (XEXP (x
, 1))
4574 || INTVAL (XEXP (x
, 1)) < 0
4575 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4576 || INTVAL (XEXP (x
, 1)) >= GET_MODE_BITSIZE (GET_MODE (x
)))
4579 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4580 known_x
, known_mode
, known_ret
);
4581 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4584 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4585 known_x
, known_mode
, known_ret
);
4586 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4587 known_x
, known_mode
, known_ret
);
4588 return MIN (num0
, num1
);
4590 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4591 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4592 case GEU
: case GTU
: case LEU
: case LTU
:
4593 case UNORDERED
: case ORDERED
:
4594 /* If the constant is negative, take its 1's complement and remask.
4595 Then see how many zero bits we have. */
4596 nonzero
= STORE_FLAG_VALUE
;
4597 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4598 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4599 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4601 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4607 /* If we haven't been able to figure it out by one of the above rules,
4608 see if some of the high-order bits are known to be zero. If so,
4609 count those bits and return one less than that amount. If we can't
4610 safely compute the mask for this mode, always return BITWIDTH. */
4612 bitwidth
= GET_MODE_BITSIZE (mode
);
4613 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4616 nonzero
= nonzero_bits (x
, mode
);
4617 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4618 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4621 /* Calculate the rtx_cost of a single instruction. A return value of
4622 zero indicates an instruction pattern without a known cost. */
4625 insn_rtx_cost (rtx pat
, bool speed
)
4630 /* Extract the single set rtx from the instruction pattern.
4631 We can't use single_set since we only have the pattern. */
4632 if (GET_CODE (pat
) == SET
)
4634 else if (GET_CODE (pat
) == PARALLEL
)
4637 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4639 rtx x
= XVECEXP (pat
, 0, i
);
4640 if (GET_CODE (x
) == SET
)
4653 cost
= rtx_cost (SET_SRC (set
), SET
, speed
);
4654 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4657 /* Given an insn INSN and condition COND, return the condition in a
4658 canonical form to simplify testing by callers. Specifically:
4660 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4661 (2) Both operands will be machine operands; (cc0) will have been replaced.
4662 (3) If an operand is a constant, it will be the second operand.
4663 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4664 for GE, GEU, and LEU.
4666 If the condition cannot be understood, or is an inequality floating-point
4667 comparison which needs to be reversed, 0 will be returned.
4669 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4671 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4672 insn used in locating the condition was found. If a replacement test
4673 of the condition is desired, it should be placed in front of that
4674 insn and we will be sure that the inputs are still valid.
4676 If WANT_REG is nonzero, we wish the condition to be relative to that
4677 register, if possible. Therefore, do not canonicalize the condition
4678 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4679 to be a compare to a CC mode register.
4681 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4685 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4686 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4693 int reverse_code
= 0;
4694 enum machine_mode mode
;
4695 basic_block bb
= BLOCK_FOR_INSN (insn
);
4697 code
= GET_CODE (cond
);
4698 mode
= GET_MODE (cond
);
4699 op0
= XEXP (cond
, 0);
4700 op1
= XEXP (cond
, 1);
4703 code
= reversed_comparison_code (cond
, insn
);
4704 if (code
== UNKNOWN
)
4710 /* If we are comparing a register with zero, see if the register is set
4711 in the previous insn to a COMPARE or a comparison operation. Perform
4712 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4715 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4716 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4717 && op1
== CONST0_RTX (GET_MODE (op0
))
4720 /* Set nonzero when we find something of interest. */
4724 /* If comparison with cc0, import actual comparison from compare
4728 if ((prev
= prev_nonnote_insn (prev
)) == 0
4729 || !NONJUMP_INSN_P (prev
)
4730 || (set
= single_set (prev
)) == 0
4731 || SET_DEST (set
) != cc0_rtx
)
4734 op0
= SET_SRC (set
);
4735 op1
= CONST0_RTX (GET_MODE (op0
));
4741 /* If this is a COMPARE, pick up the two things being compared. */
4742 if (GET_CODE (op0
) == COMPARE
)
4744 op1
= XEXP (op0
, 1);
4745 op0
= XEXP (op0
, 0);
4748 else if (!REG_P (op0
))
4751 /* Go back to the previous insn. Stop if it is not an INSN. We also
4752 stop if it isn't a single set or if it has a REG_INC note because
4753 we don't want to bother dealing with it. */
4755 prev
= prev_nonnote_nondebug_insn (prev
);
4758 || !NONJUMP_INSN_P (prev
)
4759 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4760 /* In cfglayout mode, there do not have to be labels at the
4761 beginning of a block, or jumps at the end, so the previous
4762 conditions would not stop us when we reach bb boundary. */
4763 || BLOCK_FOR_INSN (prev
) != bb
)
4766 set
= set_of (op0
, prev
);
4769 && (GET_CODE (set
) != SET
4770 || !rtx_equal_p (SET_DEST (set
), op0
)))
4773 /* If this is setting OP0, get what it sets it to if it looks
4777 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4778 #ifdef FLOAT_STORE_FLAG_VALUE
4779 REAL_VALUE_TYPE fsfv
;
4782 /* ??? We may not combine comparisons done in a CCmode with
4783 comparisons not done in a CCmode. This is to aid targets
4784 like Alpha that have an IEEE compliant EQ instruction, and
4785 a non-IEEE compliant BEQ instruction. The use of CCmode is
4786 actually artificial, simply to prevent the combination, but
4787 should not affect other platforms.
4789 However, we must allow VOIDmode comparisons to match either
4790 CCmode or non-CCmode comparison, because some ports have
4791 modeless comparisons inside branch patterns.
4793 ??? This mode check should perhaps look more like the mode check
4794 in simplify_comparison in combine. */
4796 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4799 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4800 && (GET_MODE_BITSIZE (inner_mode
)
4801 <= HOST_BITS_PER_WIDE_INT
)
4802 && (STORE_FLAG_VALUE
4803 & ((unsigned HOST_WIDE_INT
) 1
4804 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4805 #ifdef FLOAT_STORE_FLAG_VALUE
4807 && SCALAR_FLOAT_MODE_P (inner_mode
)
4808 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4809 REAL_VALUE_NEGATIVE (fsfv
)))
4812 && COMPARISON_P (SET_SRC (set
))))
4813 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4814 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4815 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4817 else if (((code
== EQ
4819 && (GET_MODE_BITSIZE (inner_mode
)
4820 <= HOST_BITS_PER_WIDE_INT
)
4821 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4822 && (STORE_FLAG_VALUE
4823 & ((unsigned HOST_WIDE_INT
) 1
4824 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4825 #ifdef FLOAT_STORE_FLAG_VALUE
4827 && SCALAR_FLOAT_MODE_P (inner_mode
)
4828 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4829 REAL_VALUE_NEGATIVE (fsfv
)))
4832 && COMPARISON_P (SET_SRC (set
))
4833 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4834 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4835 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4845 else if (reg_set_p (op0
, prev
))
4846 /* If this sets OP0, but not directly, we have to give up. */
4851 /* If the caller is expecting the condition to be valid at INSN,
4852 make sure X doesn't change before INSN. */
4853 if (valid_at_insn_p
)
4854 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
4856 if (COMPARISON_P (x
))
4857 code
= GET_CODE (x
);
4860 code
= reversed_comparison_code (x
, prev
);
4861 if (code
== UNKNOWN
)
4866 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
4872 /* If constant is first, put it last. */
4873 if (CONSTANT_P (op0
))
4874 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
4876 /* If OP0 is the result of a comparison, we weren't able to find what
4877 was really being compared, so fail. */
4879 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
4882 /* Canonicalize any ordered comparison with integers involving equality
4883 if we can do computations in the relevant mode and we do not
4886 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
4887 && CONST_INT_P (op1
)
4888 && GET_MODE (op0
) != VOIDmode
4889 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
4891 HOST_WIDE_INT const_val
= INTVAL (op1
);
4892 unsigned HOST_WIDE_INT uconst_val
= const_val
;
4893 unsigned HOST_WIDE_INT max_val
4894 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
4899 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
4900 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
4903 /* When cross-compiling, const_val might be sign-extended from
4904 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4906 if ((const_val
& max_val
)
4907 != ((unsigned HOST_WIDE_INT
) 1
4908 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1)))
4909 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
4913 if (uconst_val
< max_val
)
4914 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
4918 if (uconst_val
!= 0)
4919 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
4927 /* Never return CC0; return zero instead. */
4931 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
4934 /* Given a jump insn JUMP, return the condition that will cause it to branch
4935 to its JUMP_LABEL. If the condition cannot be understood, or is an
4936 inequality floating-point comparison which needs to be reversed, 0 will
4939 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4940 insn used in locating the condition was found. If a replacement test
4941 of the condition is desired, it should be placed in front of that
4942 insn and we will be sure that the inputs are still valid. If EARLIEST
4943 is null, the returned condition will be valid at INSN.
4945 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4946 compare CC mode register.
4948 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4951 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
4957 /* If this is not a standard conditional jump, we can't parse it. */
4959 || ! any_condjump_p (jump
))
4961 set
= pc_set (jump
);
4963 cond
= XEXP (SET_SRC (set
), 0);
4965 /* If this branches to JUMP_LABEL when the condition is false, reverse
4968 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
4969 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
4971 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
4972 allow_cc_mode
, valid_at_insn_p
);
4975 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
4976 TARGET_MODE_REP_EXTENDED.
4978 Note that we assume that the property of
4979 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
4980 narrower than mode B. I.e., if A is a mode narrower than B then in
4981 order to be able to operate on it in mode B, mode A needs to
4982 satisfy the requirements set by the representation of mode B. */
4985 init_num_sign_bit_copies_in_rep (void)
4987 enum machine_mode mode
, in_mode
;
4989 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
4990 in_mode
= GET_MODE_WIDER_MODE (mode
))
4991 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
4992 mode
= GET_MODE_WIDER_MODE (mode
))
4994 enum machine_mode i
;
4996 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
4997 extends to the next widest mode. */
4998 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
4999 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5001 /* We are in in_mode. Count how many bits outside of mode
5002 have to be copies of the sign-bit. */
5003 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5005 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5007 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5008 /* We can only check sign-bit copies starting from the
5009 top-bit. In order to be able to check the bits we
5010 have already seen we pretend that subsequent bits
5011 have to be sign-bit copies too. */
5012 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5013 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5014 += GET_MODE_BITSIZE (wider
) - GET_MODE_BITSIZE (i
);
5019 /* Suppose that truncation from the machine mode of X to MODE is not a
5020 no-op. See if there is anything special about X so that we can
5021 assume it already contains a truncated value of MODE. */
5024 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5026 /* This register has already been used in MODE without explicit
5028 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5031 /* See if we already satisfy the requirements of MODE. If yes we
5032 can just switch to MODE. */
5033 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5034 && (num_sign_bit_copies (x
, GET_MODE (x
))
5035 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5041 /* Initialize non_rtx_starting_operands, which is used to speed up
5047 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5049 const char *format
= GET_RTX_FORMAT (i
);
5050 const char *first
= strpbrk (format
, "eEV");
5051 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5054 init_num_sign_bit_copies_in_rep ();
5057 /* Check whether this is a constant pool constant. */
5059 constant_pool_constant_p (rtx x
)
5061 x
= avoid_constant_pool_reference (x
);
5062 return GET_CODE (x
) == CONST_DOUBLE
;
5065 /* If M is a bitmask that selects a field of low-order bits within an item but
5066 not the entire word, return the length of the field. Return -1 otherwise.
5067 M is used in machine mode MODE. */
5070 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5072 if (mode
!= VOIDmode
)
5074 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
5076 m
&= GET_MODE_MASK (mode
);
5079 return exact_log2 (m
+ 1);