gcc/testsuite/gcc.target/riscv/rvv/base/vmsleu_vv_m-1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
   3
   4 #include "riscv_vector.h"
   5
   6 vbool64_t test___riscv_vmsleu_vv_u8mf8_b64_m(vbool64_t mask,vuint8mf8_t op1,vuint8mf8_t op2,size_t vl)
   7 {
   8     return __riscv_vmsleu_vv_u8mf8_b64_m(mask,op1,op2,vl);
   9 }
  10
  11
  12 vbool32_t test___riscv_vmsleu_vv_u8mf4_b32_m(vbool32_t mask,vuint8mf4_t op1,vuint8mf4_t op2,size_t vl)
  13 {
  14     return __riscv_vmsleu_vv_u8mf4_b32_m(mask,op1,op2,vl);
  15 }
  16
  17
  18 vbool16_t test___riscv_vmsleu_vv_u8mf2_b16_m(vbool16_t mask,vuint8mf2_t op1,vuint8mf2_t op2,size_t vl)
  19 {
  20     return __riscv_vmsleu_vv_u8mf2_b16_m(mask,op1,op2,vl);
  21 }
  22
  23
  24 vbool8_t test___riscv_vmsleu_vv_u8m1_b8_m(vbool8_t mask,vuint8m1_t op1,vuint8m1_t op2,size_t vl)
  25 {
  26     return __riscv_vmsleu_vv_u8m1_b8_m(mask,op1,op2,vl);
  27 }
  28
  29
  30 vbool4_t test___riscv_vmsleu_vv_u8m2_b4_m(vbool4_t mask,vuint8m2_t op1,vuint8m2_t op2,size_t vl)
  31 {
  32     return __riscv_vmsleu_vv_u8m2_b4_m(mask,op1,op2,vl);
  33 }
  34
  35
  36 vbool2_t test___riscv_vmsleu_vv_u8m4_b2_m(vbool2_t mask,vuint8m4_t op1,vuint8m4_t op2,size_t vl)
  37 {
  38     return __riscv_vmsleu_vv_u8m4_b2_m(mask,op1,op2,vl);
  39 }
  40
  41
  42 vbool1_t test___riscv_vmsleu_vv_u8m8_b1_m(vbool1_t mask,vuint8m8_t op1,vuint8m8_t op2,size_t vl)
  43 {
  44     return __riscv_vmsleu_vv_u8m8_b1_m(mask,op1,op2,vl);
  45 }
  46
  47
  48 vbool64_t test___riscv_vmsleu_vv_u16mf4_b64_m(vbool64_t mask,vuint16mf4_t op1,vuint16mf4_t op2,size_t vl)
  49 {
  50     return __riscv_vmsleu_vv_u16mf4_b64_m(mask,op1,op2,vl);
  51 }
  52
  53
  54 vbool32_t test___riscv_vmsleu_vv_u16mf2_b32_m(vbool32_t mask,vuint16mf2_t op1,vuint16mf2_t op2,size_t vl)
  55 {
  56     return __riscv_vmsleu_vv_u16mf2_b32_m(mask,op1,op2,vl);
  57 }
  58
  59
  60 vbool16_t test___riscv_vmsleu_vv_u16m1_b16_m(vbool16_t mask,vuint16m1_t op1,vuint16m1_t op2,size_t vl)
  61 {
  62     return __riscv_vmsleu_vv_u16m1_b16_m(mask,op1,op2,vl);
  63 }
  64
  65
  66 vbool8_t test___riscv_vmsleu_vv_u16m2_b8_m(vbool8_t mask,vuint16m2_t op1,vuint16m2_t op2,size_t vl)
  67 {
  68     return __riscv_vmsleu_vv_u16m2_b8_m(mask,op1,op2,vl);
  69 }
  70
  71
  72 vbool4_t test___riscv_vmsleu_vv_u16m4_b4_m(vbool4_t mask,vuint16m4_t op1,vuint16m4_t op2,size_t vl)
  73 {
  74     return __riscv_vmsleu_vv_u16m4_b4_m(mask,op1,op2,vl);
  75 }
  76
  77
  78 vbool2_t test___riscv_vmsleu_vv_u16m8_b2_m(vbool2_t mask,vuint16m8_t op1,vuint16m8_t op2,size_t vl)
  79 {
  80     return __riscv_vmsleu_vv_u16m8_b2_m(mask,op1,op2,vl);
  81 }
  82
  83
  84 vbool64_t test___riscv_vmsleu_vv_u32mf2_b64_m(vbool64_t mask,vuint32mf2_t op1,vuint32mf2_t op2,size_t vl)
  85 {
  86     return __riscv_vmsleu_vv_u32mf2_b64_m(mask,op1,op2,vl);
  87 }
  88
  89
  90 vbool32_t test___riscv_vmsleu_vv_u32m1_b32_m(vbool32_t mask,vuint32m1_t op1,vuint32m1_t op2,size_t vl)
  91 {
  92     return __riscv_vmsleu_vv_u32m1_b32_m(mask,op1,op2,vl);
  93 }
  94
  95
  96 vbool16_t test___riscv_vmsleu_vv_u32m2_b16_m(vbool16_t mask,vuint32m2_t op1,vuint32m2_t op2,size_t vl)
  97 {
  98     return __riscv_vmsleu_vv_u32m2_b16_m(mask,op1,op2,vl);
  99 }
 100
 101
 102 vbool8_t test___riscv_vmsleu_vv_u32m4_b8_m(vbool8_t mask,vuint32m4_t op1,vuint32m4_t op2,size_t vl)
 103 {
 104     return __riscv_vmsleu_vv_u32m4_b8_m(mask,op1,op2,vl);
 105 }
 106
 107
 108 vbool4_t test___riscv_vmsleu_vv_u32m8_b4_m(vbool4_t mask,vuint32m8_t op1,vuint32m8_t op2,size_t vl)
 109 {
 110     return __riscv_vmsleu_vv_u32m8_b4_m(mask,op1,op2,vl);
 111 }
 112
 113
 114 vbool64_t test___riscv_vmsleu_vv_u64m1_b64_m(vbool64_t mask,vuint64m1_t op1,vuint64m1_t op2,size_t vl)
 115 {
 116     return __riscv_vmsleu_vv_u64m1_b64_m(mask,op1,op2,vl);
 117 }
 118
 119
 120 vbool32_t test___riscv_vmsleu_vv_u64m2_b32_m(vbool32_t mask,vuint64m2_t op1,vuint64m2_t op2,size_t vl)
 121 {
 122     return __riscv_vmsleu_vv_u64m2_b32_m(mask,op1,op2,vl);
 123 }
 124
 125
 126 vbool16_t test___riscv_vmsleu_vv_u64m4_b16_m(vbool16_t mask,vuint64m4_t op1,vuint64m4_t op2,size_t vl)
 127 {
 128     return __riscv_vmsleu_vv_u64m4_b16_m(mask,op1,op2,vl);
 129 }
 130
 131
 132 vbool8_t test___riscv_vmsleu_vv_u64m8_b8_m(vbool8_t mask,vuint64m8_t op1,vuint64m8_t op2,size_t vl)
 133 {
 134     return __riscv_vmsleu_vv_u64m8_b8_m(mask,op1,op2,vl);
 135 }
 136
 137
 138
 139 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 140 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 141 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 142 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 143 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 144 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 145 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 146 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 147 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 148 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 149 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 150 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 151 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 152 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 153 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 154 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 155 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 156 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 157 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 158 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 159 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */
 160 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmsleu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t} 1 } } */