1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
39 #include "cfgcleanup.h"
43 #include "tree-pass.h"
45 #include "shrink-wrap.h"
50 #ifndef MAX_CONDITIONAL_EXECUTE
51 #define MAX_CONDITIONAL_EXECUTE \
52 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
56 #define IFCVT_MULTIPLE_DUMPS 1
58 #define NULL_BLOCK ((basic_block) NULL)
60 /* True if after combine pass. */
61 static bool ifcvt_after_combine
;
63 /* True if the target has the cbranchcc4 optab. */
64 static bool have_cbranchcc4
;
66 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
67 static int num_possible_if_blocks
;
69 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
71 static int num_updated_if_blocks
;
73 /* # of changes made. */
74 static int num_true_changes
;
76 /* Whether conditional execution changes were made. */
77 static int cond_exec_changed_p
;
79 /* Forward references. */
80 static int count_bb_insns (const_basic_block
);
81 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
82 static rtx_insn
*first_active_insn (basic_block
);
83 static rtx_insn
*last_active_insn (basic_block
, int);
84 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
85 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
86 static basic_block
block_fallthru (basic_block
);
87 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
89 static rtx
cond_exec_get_condition (rtx_insn
*);
90 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
91 static int noce_operand_ok (const_rtx
);
92 static void merge_if_block (ce_if_block
*);
93 static int find_cond_trap (basic_block
, edge
, edge
);
94 static basic_block
find_if_header (basic_block
, int);
95 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
96 static int noce_find_if_block (basic_block
, edge
, edge
, int);
97 static int cond_exec_find_if_block (ce_if_block
*);
98 static int find_if_case_1 (basic_block
, edge
, edge
);
99 static int find_if_case_2 (basic_block
, edge
, edge
);
100 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
102 static void noce_emit_move_insn (rtx
, rtx
);
103 static rtx_insn
*block_has_only_trap (basic_block
);
105 /* Count the number of non-jump active insns in BB. */
108 count_bb_insns (const_basic_block bb
)
111 rtx_insn
*insn
= BB_HEAD (bb
);
115 if (active_insn_p (insn
) && !JUMP_P (insn
))
118 if (insn
== BB_END (bb
))
120 insn
= NEXT_INSN (insn
);
126 /* Determine whether the total insn_rtx_cost on non-jump insns in
127 basic block BB is less than MAX_COST. This function returns
128 false if the cost of any instruction could not be estimated.
130 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
131 as those insns are being speculated. MAX_COST is scaled with SCALE
132 plus a small fudge factor. */
135 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
138 rtx_insn
*insn
= BB_HEAD (bb
);
139 bool speed
= optimize_bb_for_speed_p (bb
);
141 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
142 applied to insn_rtx_cost when optimizing for size. Only do
143 this after combine because if-conversion might interfere with
144 passes before combine.
146 Use optimize_function_for_speed_p instead of the pre-defined
147 variable speed to make sure it is set to same value for all
148 basic blocks in one if-conversion transformation. */
149 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
150 scale
= REG_BR_PROB_BASE
;
151 /* Our branch probability/scaling factors are just estimates and don't
152 account for cases where we can get speculation for free and other
153 secondary benefits. So we fudge the scale factor to make speculating
154 appear a little more profitable when optimizing for performance. */
156 scale
+= REG_BR_PROB_BASE
/ 8;
163 if (NONJUMP_INSN_P (insn
))
165 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
169 /* If this instruction is the load or set of a "stack" register,
170 such as a floating point register on x87, then the cost of
171 speculatively executing this insn may need to include
172 the additional cost of popping its result off of the
173 register stack. Unfortunately, correctly recognizing and
174 accounting for this additional overhead is tricky, so for
175 now we simply prohibit such speculative execution. */
178 rtx set
= single_set (insn
);
179 if (set
&& STACK_REG_P (SET_DEST (set
)))
185 if (count
>= max_cost
)
188 else if (CALL_P (insn
))
191 if (insn
== BB_END (bb
))
193 insn
= NEXT_INSN (insn
);
199 /* Return the first non-jump active insn in the basic block. */
202 first_active_insn (basic_block bb
)
204 rtx_insn
*insn
= BB_HEAD (bb
);
208 if (insn
== BB_END (bb
))
210 insn
= NEXT_INSN (insn
);
213 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
215 if (insn
== BB_END (bb
))
217 insn
= NEXT_INSN (insn
);
226 /* Return the last non-jump active (non-jump) insn in the basic block. */
229 last_active_insn (basic_block bb
, int skip_use_p
)
231 rtx_insn
*insn
= BB_END (bb
);
232 rtx_insn
*head
= BB_HEAD (bb
);
236 || DEBUG_INSN_P (insn
)
238 && NONJUMP_INSN_P (insn
)
239 && GET_CODE (PATTERN (insn
)) == USE
))
243 insn
= PREV_INSN (insn
);
252 /* Return the active insn before INSN inside basic block CURR_BB. */
255 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
257 if (!insn
|| insn
== BB_HEAD (curr_bb
))
260 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
262 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
265 /* No other active insn all the way to the start of the basic block. */
266 if (insn
== BB_HEAD (curr_bb
))
273 /* Return the active insn after INSN inside basic block CURR_BB. */
276 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
278 if (!insn
|| insn
== BB_END (curr_bb
))
281 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
283 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
286 /* No other active insn all the way to the end of the basic block. */
287 if (insn
== BB_END (curr_bb
))
294 /* Return the basic block reached by falling though the basic block BB. */
297 block_fallthru (basic_block bb
)
299 edge e
= find_fallthru_edge (bb
->succs
);
301 return (e
) ? e
->dest
: NULL_BLOCK
;
304 /* Return true if RTXs A and B can be safely interchanged. */
307 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
309 if (!rtx_equal_p (a
, b
))
312 if (GET_CODE (a
) != MEM
)
315 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
316 reference is not. Interchanging a dead type-unsafe memory reference with
317 a live type-safe one creates a live type-unsafe memory reference, in other
318 words, it makes the program illegal.
319 We check here conservatively whether the two memory references have equal
320 memory attributes. */
322 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
326 /* Go through a bunch of insns, converting them to conditional
327 execution format if possible. Return TRUE if all of the non-note
328 insns were processed. */
331 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
332 /* if block information */rtx_insn
*start
,
333 /* first insn to look at */rtx end
,
334 /* last insn to look at */rtx test
,
335 /* conditional execution test */int prob_val
,
336 /* probability of branch taken. */int mod_ok
)
338 int must_be_last
= FALSE
;
346 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
348 /* dwarf2out can't cope with conditional prologues. */
349 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
352 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
355 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
357 /* dwarf2out can't cope with conditional unwind info. */
358 if (RTX_FRAME_RELATED_P (insn
))
361 /* Remove USE insns that get in the way. */
362 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
364 /* ??? Ug. Actually unlinking the thing is problematic,
365 given what we'd have to coordinate with our callers. */
366 SET_INSN_DELETED (insn
);
370 /* Last insn wasn't last? */
374 if (modified_in_p (test
, insn
))
381 /* Now build the conditional form of the instruction. */
382 pattern
= PATTERN (insn
);
383 xtest
= copy_rtx (test
);
385 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
387 if (GET_CODE (pattern
) == COND_EXEC
)
389 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
392 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
393 COND_EXEC_TEST (pattern
));
394 pattern
= COND_EXEC_CODE (pattern
);
397 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
399 /* If the machine needs to modify the insn being conditionally executed,
400 say for example to force a constant integer operand into a temp
401 register, do so here. */
402 #ifdef IFCVT_MODIFY_INSN
403 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
408 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
410 if (CALL_P (insn
) && prob_val
>= 0)
411 validate_change (insn
, ®_NOTES (insn
),
412 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
413 prob_val
, REG_NOTES (insn
)), 1);
423 /* Return the condition for a jump. Do not do any special processing. */
426 cond_exec_get_condition (rtx_insn
*jump
)
430 if (any_condjump_p (jump
))
431 test_if
= SET_SRC (pc_set (jump
));
434 cond
= XEXP (test_if
, 0);
436 /* If this branches to JUMP_LABEL when the condition is false,
437 reverse the condition. */
438 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
439 && label_ref_label (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
441 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
445 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
452 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
453 to conditional execution. Return TRUE if we were successful at
454 converting the block. */
457 cond_exec_process_if_block (ce_if_block
* ce_info
,
458 /* if block information */int do_multiple_p
)
460 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
461 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
462 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
463 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
464 rtx_insn
*then_start
; /* first insn in THEN block */
465 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
466 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
467 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
468 int max
; /* max # of insns to convert. */
469 int then_mod_ok
; /* whether conditional mods are ok in THEN */
470 rtx true_expr
; /* test for else block insns */
471 rtx false_expr
; /* test for then block insns */
472 int true_prob_val
; /* probability of else block */
473 int false_prob_val
; /* probability of then block */
474 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
475 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
476 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
477 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
478 int then_n_insns
, else_n_insns
, n_insns
;
479 enum rtx_code false_code
;
482 /* If test is comprised of && or || elements, and we've failed at handling
483 all of them together, just use the last test if it is the special case of
484 && elements without an ELSE block. */
485 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
487 if (else_bb
|| ! ce_info
->and_and_p
)
490 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
491 ce_info
->num_multiple_test_blocks
= 0;
492 ce_info
->num_and_and_blocks
= 0;
493 ce_info
->num_or_or_blocks
= 0;
496 /* Find the conditional jump to the ELSE or JOIN part, and isolate
498 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
502 /* If the conditional jump is more than just a conditional jump,
503 then we can not do conditional execution conversion on this block. */
504 if (! onlyjump_p (BB_END (test_bb
)))
507 /* Collect the bounds of where we're to search, skipping any labels, jumps
508 and notes at the beginning and end of the block. Then count the total
509 number of insns and see if it is small enough to convert. */
510 then_start
= first_active_insn (then_bb
);
511 then_end
= last_active_insn (then_bb
, TRUE
);
512 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
513 n_insns
= then_n_insns
;
514 max
= MAX_CONDITIONAL_EXECUTE
;
521 else_start
= first_active_insn (else_bb
);
522 else_end
= last_active_insn (else_bb
, TRUE
);
523 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
524 n_insns
+= else_n_insns
;
526 /* Look for matching sequences at the head and tail of the two blocks,
527 and limit the range of insns to be converted if possible. */
528 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
529 &then_first_tail
, &else_first_tail
,
531 if (then_first_tail
== BB_HEAD (then_bb
))
532 then_start
= then_end
= NULL
;
533 if (else_first_tail
== BB_HEAD (else_bb
))
534 else_start
= else_end
= NULL
;
539 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
541 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
542 n_insns
-= 2 * n_matching
;
547 && then_n_insns
> n_matching
548 && else_n_insns
> n_matching
)
550 int longest_match
= MIN (then_n_insns
- n_matching
,
551 else_n_insns
- n_matching
);
553 = flow_find_head_matching_sequence (then_bb
, else_bb
,
562 /* We won't pass the insns in the head sequence to
563 cond_exec_process_insns, so we need to test them here
564 to make sure that they don't clobber the condition. */
565 for (insn
= BB_HEAD (then_bb
);
566 insn
!= NEXT_INSN (then_last_head
);
567 insn
= NEXT_INSN (insn
))
568 if (!LABEL_P (insn
) && !NOTE_P (insn
)
569 && !DEBUG_INSN_P (insn
)
570 && modified_in_p (test_expr
, insn
))
574 if (then_last_head
== then_end
)
575 then_start
= then_end
= NULL
;
576 if (else_last_head
== else_end
)
577 else_start
= else_end
= NULL
;
582 then_start
= find_active_insn_after (then_bb
, then_last_head
);
584 else_start
= find_active_insn_after (else_bb
, else_last_head
);
585 n_insns
-= 2 * n_matching
;
593 /* Map test_expr/test_jump into the appropriate MD tests to use on
594 the conditionally executed code. */
596 true_expr
= test_expr
;
598 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
599 if (false_code
!= UNKNOWN
)
600 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
601 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
603 false_expr
= NULL_RTX
;
605 #ifdef IFCVT_MODIFY_TESTS
606 /* If the machine description needs to modify the tests, such as setting a
607 conditional execution register from a comparison, it can do so here. */
608 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
610 /* See if the conversion failed. */
611 if (!true_expr
|| !false_expr
)
615 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
618 true_prob_val
= XINT (note
, 0);
619 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
627 /* If we have && or || tests, do them here. These tests are in the adjacent
628 blocks after the first block containing the test. */
629 if (ce_info
->num_multiple_test_blocks
> 0)
631 basic_block bb
= test_bb
;
632 basic_block last_test_bb
= ce_info
->last_test_bb
;
639 rtx_insn
*start
, *end
;
641 enum rtx_code f_code
;
643 bb
= block_fallthru (bb
);
644 start
= first_active_insn (bb
);
645 end
= last_active_insn (bb
, TRUE
);
647 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
648 false_prob_val
, FALSE
))
651 /* If the conditional jump is more than just a conditional jump, then
652 we can not do conditional execution conversion on this block. */
653 if (! onlyjump_p (BB_END (bb
)))
656 /* Find the conditional jump and isolate the test. */
657 t
= cond_exec_get_condition (BB_END (bb
));
661 f_code
= reversed_comparison_code (t
, BB_END (bb
));
662 if (f_code
== UNKNOWN
)
665 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
666 if (ce_info
->and_and_p
)
668 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
669 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
673 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
674 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
677 /* If the machine description needs to modify the tests, such as
678 setting a conditional execution register from a comparison, it can
680 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
681 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
683 /* See if the conversion failed. */
691 while (bb
!= last_test_bb
);
694 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
695 on then THEN block. */
696 then_mod_ok
= (else_bb
== NULL_BLOCK
);
698 /* Go through the THEN and ELSE blocks converting the insns if possible
699 to conditional execution. */
703 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
704 false_expr
, false_prob_val
,
708 if (else_bb
&& else_end
709 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
710 true_expr
, true_prob_val
, TRUE
))
713 /* If we cannot apply the changes, fail. Do not go through the normal fail
714 processing, since apply_change_group will call cancel_changes. */
715 if (! apply_change_group ())
717 #ifdef IFCVT_MODIFY_CANCEL
718 /* Cancel any machine dependent changes. */
719 IFCVT_MODIFY_CANCEL (ce_info
);
724 #ifdef IFCVT_MODIFY_FINAL
725 /* Do any machine dependent final modifications. */
726 IFCVT_MODIFY_FINAL (ce_info
);
729 /* Conversion succeeded. */
731 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
732 n_insns
, (n_insns
== 1) ? " was" : "s were");
734 /* Merge the blocks! If we had matching sequences, make sure to delete one
735 copy at the appropriate location first: delete the copy in the THEN branch
736 for a tail sequence so that the remaining one is executed last for both
737 branches, and delete the copy in the ELSE branch for a head sequence so
738 that the remaining one is executed first for both branches. */
741 rtx_insn
*from
= then_first_tail
;
743 from
= find_active_insn_after (then_bb
, from
);
744 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
747 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
749 merge_if_block (ce_info
);
750 cond_exec_changed_p
= TRUE
;
754 #ifdef IFCVT_MODIFY_CANCEL
755 /* Cancel any machine dependent changes. */
756 IFCVT_MODIFY_CANCEL (ce_info
);
763 /* Used by noce_process_if_block to communicate with its subroutines.
765 The subroutines know that A and B may be evaluated freely. They
766 know that X is a register. They should insert new instructions
767 before cond_earliest. */
771 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
772 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
774 /* The jump that ends TEST_BB. */
777 /* The jump condition. */
780 /* New insns should be inserted before this one. */
781 rtx_insn
*cond_earliest
;
783 /* Insns in the THEN and ELSE block. There is always just this
784 one insns in those blocks. The insns are single_set insns.
785 If there was no ELSE block, INSN_B is the last insn before
786 COND_EARLIEST, or NULL_RTX. In the former case, the insn
787 operands are still valid, as if INSN_B was moved down below
789 rtx_insn
*insn_a
, *insn_b
;
791 /* The SET_SRC of INSN_A and INSN_B. */
794 /* The SET_DEST of INSN_A. */
797 /* The original set destination that the THEN and ELSE basic blocks finally
798 write their result to. */
800 /* True if this if block is not canonical. In the canonical form of
801 if blocks, the THEN_BB is the block reached via the fallthru edge
802 from TEST_BB. For the noce transformations, we allow the symmetric
804 bool then_else_reversed
;
806 /* True if the contents of then_bb and else_bb are a
807 simple single set instruction. */
811 /* True if we're optimisizing the control block for speed, false if
812 we're optimizing for size. */
815 /* An estimate of the original costs. When optimizing for size, this is the
816 combined cost of COND, JUMP and the costs for THEN_BB and ELSE_BB.
817 When optimizing for speed, we use the costs of COND plus the minimum of
818 the costs for THEN_BB and ELSE_BB, as computed in the next field. */
819 unsigned int original_cost
;
821 /* Maximum permissible cost for the unconditional sequence we should
822 generate to replace this branch. */
823 unsigned int max_seq_cost
;
825 /* The name of the noce transform that succeeded in if-converting
826 this structure. Used for debugging. */
827 const char *transform_name
;
830 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
831 static int noce_try_move (struct noce_if_info
*);
832 static int noce_try_ifelse_collapse (struct noce_if_info
*);
833 static int noce_try_store_flag (struct noce_if_info
*);
834 static int noce_try_addcc (struct noce_if_info
*);
835 static int noce_try_store_flag_constants (struct noce_if_info
*);
836 static int noce_try_store_flag_mask (struct noce_if_info
*);
837 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
839 static int noce_try_cmove (struct noce_if_info
*);
840 static int noce_try_cmove_arith (struct noce_if_info
*);
841 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
842 static int noce_try_minmax (struct noce_if_info
*);
843 static int noce_try_abs (struct noce_if_info
*);
844 static int noce_try_sign_mask (struct noce_if_info
*);
846 /* Return TRUE if SEQ is a good candidate as a replacement for the
847 if-convertible sequence described in IF_INFO. */
850 noce_conversion_profitable_p (rtx_insn
*seq
, struct noce_if_info
*if_info
)
852 bool speed_p
= if_info
->speed_p
;
854 /* Cost up the new sequence. */
855 unsigned int cost
= seq_cost (seq
, speed_p
);
857 if (cost
<= if_info
->original_cost
)
860 /* When compiling for size, we can make a reasonably accurately guess
861 at the size growth. When compiling for speed, use the maximum. */
862 return speed_p
&& cost
<= if_info
->max_seq_cost
;
865 /* Helper function for noce_try_store_flag*. */
868 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
871 rtx cond
= if_info
->cond
;
875 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
876 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
878 /* If earliest == jump, or when the condition is complex, try to
879 build the store_flag insn directly. */
883 rtx set
= pc_set (if_info
->jump
);
884 cond
= XEXP (SET_SRC (set
), 0);
885 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
886 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
887 reversep
= !reversep
;
888 if (if_info
->then_else_reversed
)
889 reversep
= !reversep
;
893 code
= reversed_comparison_code (cond
, if_info
->jump
);
895 code
= GET_CODE (cond
);
897 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
898 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
900 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
902 rtx set
= gen_rtx_SET (x
, src
);
905 rtx_insn
*insn
= emit_insn (set
);
907 if (recog_memoized (insn
) >= 0)
909 rtx_insn
*seq
= get_insns ();
913 if_info
->cond_earliest
= if_info
->jump
;
921 /* Don't even try if the comparison operands or the mode of X are weird. */
922 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
925 return emit_store_flag (x
, code
, XEXP (cond
, 0),
926 XEXP (cond
, 1), VOIDmode
,
927 (code
== LTU
|| code
== LEU
928 || code
== GEU
|| code
== GTU
), normalize
);
931 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
932 X is the destination/target and Y is the value to copy. */
935 noce_emit_move_insn (rtx x
, rtx y
)
937 machine_mode outmode
;
941 if (GET_CODE (x
) != STRICT_LOW_PART
)
943 rtx_insn
*seq
, *insn
;
948 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
949 otherwise construct a suitable SET pattern ourselves. */
950 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
951 ? emit_move_insn (x
, y
)
952 : emit_insn (gen_rtx_SET (x
, y
));
956 if (recog_memoized (insn
) <= 0)
958 if (GET_CODE (x
) == ZERO_EXTRACT
)
960 rtx op
= XEXP (x
, 0);
961 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
962 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
964 /* store_bit_field expects START to be relative to
965 BYTES_BIG_ENDIAN and adjusts this value for machines with
966 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
967 invoke store_bit_field again it is necessary to have the START
968 value from the first call. */
969 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
972 start
= BITS_PER_UNIT
- start
- size
;
975 gcc_assert (REG_P (op
));
976 start
= BITS_PER_WORD
- start
- size
;
980 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
981 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
985 switch (GET_RTX_CLASS (GET_CODE (y
)))
988 ot
= code_to_optab (GET_CODE (y
));
992 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
993 if (target
!= NULL_RTX
)
996 emit_move_insn (x
, target
);
1004 case RTX_COMM_ARITH
:
1005 ot
= code_to_optab (GET_CODE (y
));
1009 target
= expand_binop (GET_MODE (y
), ot
,
1010 XEXP (y
, 0), XEXP (y
, 1),
1011 x
, 0, OPTAB_DIRECT
);
1012 if (target
!= NULL_RTX
)
1015 emit_move_insn (x
, target
);
1031 outer
= XEXP (x
, 0);
1032 inner
= XEXP (outer
, 0);
1033 outmode
= GET_MODE (outer
);
1034 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1035 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1036 0, 0, outmode
, y
, false);
1039 /* Return the CC reg if it is used in COND. */
1042 cc_in_cond (rtx cond
)
1044 if (have_cbranchcc4
&& cond
1045 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1046 return XEXP (cond
, 0);
1051 /* Return sequence of instructions generated by if conversion. This
1052 function calls end_sequence() to end the current stream, ensures
1053 that the instructions are unshared, recognizable non-jump insns.
1054 On failure, this function returns a NULL_RTX. */
1057 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1060 rtx_insn
*seq
= get_insns ();
1061 rtx cc
= cc_in_cond (if_info
->cond
);
1063 set_used_flags (if_info
->x
);
1064 set_used_flags (if_info
->cond
);
1065 set_used_flags (if_info
->a
);
1066 set_used_flags (if_info
->b
);
1068 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1069 set_used_flags (insn
);
1071 unshare_all_rtl_in_chain (seq
);
1074 /* Make sure that all of the instructions emitted are recognizable,
1075 and that we haven't introduced a new jump instruction.
1076 As an exercise for the reader, build a general mechanism that
1077 allows proper placement of required clobbers. */
1078 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1080 || recog_memoized (insn
) == -1
1081 /* Make sure new generated code does not clobber CC. */
1082 || (cc
&& set_of (cc
, insn
)))
1088 /* Return true iff the then and else basic block (if it exists)
1089 consist of a single simple set instruction. */
1092 noce_simple_bbs (struct noce_if_info
*if_info
)
1094 if (!if_info
->then_simple
)
1097 if (if_info
->else_bb
)
1098 return if_info
->else_simple
;
1103 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1104 "if (a == b) x = a; else x = b" into "x = b". */
1107 noce_try_move (struct noce_if_info
*if_info
)
1109 rtx cond
= if_info
->cond
;
1110 enum rtx_code code
= GET_CODE (cond
);
1114 if (code
!= NE
&& code
!= EQ
)
1117 if (!noce_simple_bbs (if_info
))
1120 /* This optimization isn't valid if either A or B could be a NaN
1121 or a signed zero. */
1122 if (HONOR_NANS (if_info
->x
)
1123 || HONOR_SIGNED_ZEROS (if_info
->x
))
1126 /* Check whether the operands of the comparison are A and in
1128 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1129 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1130 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1131 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1133 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1136 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1138 /* Avoid generating the move if the source is the destination. */
1139 if (! rtx_equal_p (if_info
->x
, y
))
1142 noce_emit_move_insn (if_info
->x
, y
);
1143 seq
= end_ifcvt_sequence (if_info
);
1147 emit_insn_before_setloc (seq
, if_info
->jump
,
1148 INSN_LOCATION (if_info
->insn_a
));
1150 if_info
->transform_name
= "noce_try_move";
1156 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1157 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1158 If that is the case, emit the result into x. */
1161 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1163 if (!noce_simple_bbs (if_info
))
1166 machine_mode mode
= GET_MODE (if_info
->x
);
1167 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1168 if_info
->cond
, if_info
->b
,
1171 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1176 noce_emit_move_insn (if_info
->x
, if_then_else
);
1177 seq
= end_ifcvt_sequence (if_info
);
1181 emit_insn_before_setloc (seq
, if_info
->jump
,
1182 INSN_LOCATION (if_info
->insn_a
));
1184 if_info
->transform_name
= "noce_try_ifelse_collapse";
1189 /* Convert "if (test) x = 1; else x = 0".
1191 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1192 tried in noce_try_store_flag_constants after noce_try_cmove has had
1193 a go at the conversion. */
1196 noce_try_store_flag (struct noce_if_info
*if_info
)
1202 if (!noce_simple_bbs (if_info
))
1205 if (CONST_INT_P (if_info
->b
)
1206 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1207 && if_info
->a
== const0_rtx
)
1209 else if (if_info
->b
== const0_rtx
1210 && CONST_INT_P (if_info
->a
)
1211 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1212 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1220 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1223 if (target
!= if_info
->x
)
1224 noce_emit_move_insn (if_info
->x
, target
);
1226 seq
= end_ifcvt_sequence (if_info
);
1230 emit_insn_before_setloc (seq
, if_info
->jump
,
1231 INSN_LOCATION (if_info
->insn_a
));
1232 if_info
->transform_name
= "noce_try_store_flag";
1243 /* Convert "if (test) x = -A; else x = A" into
1244 x = A; if (test) x = -x if the machine can do the
1245 conditional negate form of this cheaply.
1246 Try this before noce_try_cmove that will just load the
1247 immediates into two registers and do a conditional select
1248 between them. If the target has a conditional negate or
1249 conditional invert operation we can save a potentially
1250 expensive constant synthesis. */
1253 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1255 if (!noce_simple_bbs (if_info
))
1258 if (!CONST_INT_P (if_info
->a
)
1259 || !CONST_INT_P (if_info
->b
)
1260 || !REG_P (if_info
->x
))
1263 machine_mode mode
= GET_MODE (if_info
->x
);
1265 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1266 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1268 rtx cond
= if_info
->cond
;
1276 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1278 else if (val_a
== ~val_b
)
1286 rtx tmp
= gen_reg_rtx (mode
);
1287 noce_emit_move_insn (tmp
, if_info
->a
);
1289 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1293 rtx_insn
*seq
= get_insns ();
1301 if (target
!= if_info
->x
)
1302 noce_emit_move_insn (if_info
->x
, target
);
1304 seq
= end_ifcvt_sequence (if_info
);
1309 emit_insn_before_setloc (seq
, if_info
->jump
,
1310 INSN_LOCATION (if_info
->insn_a
));
1311 if_info
->transform_name
= "noce_try_inverse_constants";
1320 /* Convert "if (test) x = a; else x = b", for A and B constant.
1321 Also allow A = y + c1, B = y + c2, with a common y between A
1325 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1330 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1333 machine_mode mode
= GET_MODE (if_info
->x
);;
1334 rtx common
= NULL_RTX
;
1339 /* Handle cases like x := test ? y + 3 : y + 4. */
1340 if (GET_CODE (a
) == PLUS
1341 && GET_CODE (b
) == PLUS
1342 && CONST_INT_P (XEXP (a
, 1))
1343 && CONST_INT_P (XEXP (b
, 1))
1344 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1345 /* Allow expressions that are not using the result or plain
1346 registers where we handle overlap below. */
1347 && (REG_P (XEXP (a
, 0))
1348 || (noce_operand_ok (XEXP (a
, 0))
1349 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0)))))
1351 common
= XEXP (a
, 0);
1356 if (!noce_simple_bbs (if_info
))
1362 ifalse
= INTVAL (a
);
1364 bool subtract_flag_p
= false;
1366 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1367 /* Make sure we can represent the difference between the two values. */
1369 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1372 diff
= trunc_int_for_mode (diff
, mode
);
1374 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1378 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1381 /* We could collapse these cases but it is easier to follow the
1382 diff/STORE_FLAG_VALUE combinations when they are listed
1386 => 4 + (test != 0). */
1387 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1390 => can_reverse | 4 + (test == 0)
1391 !can_reverse | 3 - (test != 0). */
1392 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1394 reversep
= can_reverse
;
1395 subtract_flag_p
= !can_reverse
;
1396 /* If we need to subtract the flag and we have PLUS-immediate
1397 A and B then it is unlikely to be beneficial to play tricks
1399 if (subtract_flag_p
&& common
)
1403 => can_reverse | 3 + (test == 0)
1404 !can_reverse | 4 - (test != 0). */
1405 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1407 reversep
= can_reverse
;
1408 subtract_flag_p
= !can_reverse
;
1409 /* If we need to subtract the flag and we have PLUS-immediate
1410 A and B then it is unlikely to be beneficial to play tricks
1412 if (subtract_flag_p
&& common
)
1416 => 4 + (test != 0). */
1417 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1422 /* Is this (cond) ? 2^n : 0? */
1423 else if (ifalse
== 0 && pow2p_hwi (itrue
)
1424 && STORE_FLAG_VALUE
== 1)
1426 /* Is this (cond) ? 0 : 2^n? */
1427 else if (itrue
== 0 && pow2p_hwi (ifalse
) && can_reverse
1428 && STORE_FLAG_VALUE
== 1)
1433 /* Is this (cond) ? -1 : x? */
1434 else if (itrue
== -1
1435 && STORE_FLAG_VALUE
== -1)
1437 /* Is this (cond) ? x : -1? */
1438 else if (ifalse
== -1 && can_reverse
1439 && STORE_FLAG_VALUE
== -1)
1449 std::swap (itrue
, ifalse
);
1450 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1455 /* If we have x := test ? x + 3 : x + 4 then move the original
1456 x out of the way while we store flags. */
1457 if (common
&& rtx_equal_p (common
, if_info
->x
))
1459 common
= gen_reg_rtx (mode
);
1460 noce_emit_move_insn (common
, if_info
->x
);
1463 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1470 /* if (test) x = 3; else x = 4;
1471 => x = 3 + (test == 0); */
1472 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1474 /* Add the common part now. This may allow combine to merge this
1475 with the store flag operation earlier into some sort of conditional
1476 increment/decrement if the target allows it. */
1478 target
= expand_simple_binop (mode
, PLUS
,
1480 target
, 0, OPTAB_WIDEN
);
1482 /* Always use ifalse here. It should have been swapped with itrue
1483 when appropriate when reversep is true. */
1484 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1485 gen_int_mode (ifalse
, mode
), target
,
1486 if_info
->x
, 0, OPTAB_WIDEN
);
1488 /* Other cases are not beneficial when the original A and B are PLUS
1495 /* if (test) x = 8; else x = 0;
1496 => x = (test != 0) << 3; */
1497 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1499 target
= expand_simple_binop (mode
, ASHIFT
,
1500 target
, GEN_INT (tmp
), if_info
->x
, 0,
1504 /* if (test) x = -1; else x = b;
1505 => x = -(test != 0) | b; */
1506 else if (itrue
== -1)
1508 target
= expand_simple_binop (mode
, IOR
,
1509 target
, gen_int_mode (ifalse
, mode
),
1510 if_info
->x
, 0, OPTAB_WIDEN
);
1524 if (target
!= if_info
->x
)
1525 noce_emit_move_insn (if_info
->x
, target
);
1527 seq
= end_ifcvt_sequence (if_info
);
1528 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1531 emit_insn_before_setloc (seq
, if_info
->jump
,
1532 INSN_LOCATION (if_info
->insn_a
));
1533 if_info
->transform_name
= "noce_try_store_flag_constants";
1541 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1542 similarly for "foo--". */
1545 noce_try_addcc (struct noce_if_info
*if_info
)
1549 int subtract
, normalize
;
1551 if (!noce_simple_bbs (if_info
))
1554 if (GET_CODE (if_info
->a
) == PLUS
1555 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1556 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1559 rtx cond
= if_info
->cond
;
1560 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1562 /* First try to use addcc pattern. */
1563 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1564 && general_operand (XEXP (cond
, 1), VOIDmode
))
1567 target
= emit_conditional_add (if_info
->x
, code
,
1572 XEXP (if_info
->a
, 1),
1573 GET_MODE (if_info
->x
),
1574 (code
== LTU
|| code
== GEU
1575 || code
== LEU
|| code
== GTU
));
1578 if (target
!= if_info
->x
)
1579 noce_emit_move_insn (if_info
->x
, target
);
1581 seq
= end_ifcvt_sequence (if_info
);
1582 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1585 emit_insn_before_setloc (seq
, if_info
->jump
,
1586 INSN_LOCATION (if_info
->insn_a
));
1587 if_info
->transform_name
= "noce_try_addcc";
1594 /* If that fails, construct conditional increment or decrement using
1595 setcc. We're changing a branch and an increment to a comparison and
1597 if (XEXP (if_info
->a
, 1) == const1_rtx
1598 || XEXP (if_info
->a
, 1) == constm1_rtx
)
1601 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1602 subtract
= 0, normalize
= 0;
1603 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1604 subtract
= 1, normalize
= 0;
1606 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1609 target
= noce_emit_store_flag (if_info
,
1610 gen_reg_rtx (GET_MODE (if_info
->x
)),
1614 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1615 subtract
? MINUS
: PLUS
,
1616 if_info
->b
, target
, if_info
->x
,
1620 if (target
!= if_info
->x
)
1621 noce_emit_move_insn (if_info
->x
, target
);
1623 seq
= end_ifcvt_sequence (if_info
);
1624 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1627 emit_insn_before_setloc (seq
, if_info
->jump
,
1628 INSN_LOCATION (if_info
->insn_a
));
1629 if_info
->transform_name
= "noce_try_addcc";
1639 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1642 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1648 if (!noce_simple_bbs (if_info
))
1653 if ((if_info
->a
== const0_rtx
1654 && rtx_equal_p (if_info
->b
, if_info
->x
))
1655 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1658 && if_info
->b
== const0_rtx
1659 && rtx_equal_p (if_info
->a
, if_info
->x
)))
1662 target
= noce_emit_store_flag (if_info
,
1663 gen_reg_rtx (GET_MODE (if_info
->x
)),
1666 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1668 target
, if_info
->x
, 0,
1673 if (target
!= if_info
->x
)
1674 noce_emit_move_insn (if_info
->x
, target
);
1676 seq
= end_ifcvt_sequence (if_info
);
1677 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1680 emit_insn_before_setloc (seq
, if_info
->jump
,
1681 INSN_LOCATION (if_info
->insn_a
));
1682 if_info
->transform_name
= "noce_try_store_flag_mask";
1693 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1696 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1697 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1699 rtx target ATTRIBUTE_UNUSED
;
1700 int unsignedp ATTRIBUTE_UNUSED
;
1702 /* If earliest == jump, try to build the cmove insn directly.
1703 This is helpful when combine has created some complex condition
1704 (like for alpha's cmovlbs) that we can't hope to regenerate
1705 through the normal interface. */
1707 if (if_info
->cond_earliest
== if_info
->jump
)
1709 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1710 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1711 cond
, vtrue
, vfalse
);
1712 rtx set
= gen_rtx_SET (x
, if_then_else
);
1715 rtx_insn
*insn
= emit_insn (set
);
1717 if (recog_memoized (insn
) >= 0)
1719 rtx_insn
*seq
= get_insns ();
1729 /* Don't even try if the comparison operands are weird
1730 except that the target supports cbranchcc4. */
1731 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1732 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1734 if (!have_cbranchcc4
1735 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1736 || cmp_b
!= const0_rtx
)
1740 unsignedp
= (code
== LTU
|| code
== GEU
1741 || code
== LEU
|| code
== GTU
);
1743 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1744 vtrue
, vfalse
, GET_MODE (x
),
1749 /* We might be faced with a situation like:
1752 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1753 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1755 We can't do a conditional move in mode M, but it's possible that we
1756 could do a conditional move in mode N instead and take a subreg of
1759 If we can't create new pseudos, though, don't bother. */
1760 if (reload_completed
)
1763 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1765 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1766 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1767 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1768 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1769 rtx promoted_target
;
1771 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1772 || byte_vtrue
!= byte_vfalse
1773 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1774 != SUBREG_PROMOTED_VAR_P (vfalse
))
1775 || (SUBREG_PROMOTED_GET (vtrue
)
1776 != SUBREG_PROMOTED_GET (vfalse
)))
1779 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1781 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1782 VOIDmode
, reg_vtrue
, reg_vfalse
,
1783 GET_MODE (reg_vtrue
), unsignedp
);
1784 /* Nope, couldn't do it in that mode either. */
1788 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1789 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1790 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1791 emit_move_insn (x
, target
);
1798 /* Try only simple constants and registers here. More complex cases
1799 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1800 has had a go at it. */
1803 noce_try_cmove (struct noce_if_info
*if_info
)
1809 if (!noce_simple_bbs (if_info
))
1812 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1813 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1817 code
= GET_CODE (if_info
->cond
);
1818 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1819 XEXP (if_info
->cond
, 0),
1820 XEXP (if_info
->cond
, 1),
1821 if_info
->a
, if_info
->b
);
1825 if (target
!= if_info
->x
)
1826 noce_emit_move_insn (if_info
->x
, target
);
1828 seq
= end_ifcvt_sequence (if_info
);
1832 emit_insn_before_setloc (seq
, if_info
->jump
,
1833 INSN_LOCATION (if_info
->insn_a
));
1834 if_info
->transform_name
= "noce_try_cmove";
1838 /* If both a and b are constants try a last-ditch transformation:
1839 if (test) x = a; else x = b;
1840 => x = (-(test != 0) & (b - a)) + a;
1841 Try this only if the target-specific expansion above has failed.
1842 The target-specific expander may want to generate sequences that
1843 we don't know about, so give them a chance before trying this
1845 else if (!targetm
.have_conditional_execution ()
1846 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
))
1848 machine_mode mode
= GET_MODE (if_info
->x
);
1849 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1850 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1851 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1858 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1859 /* Make sure we can represent the difference
1860 between the two values. */
1862 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1868 diff
= trunc_int_for_mode (diff
, mode
);
1869 target
= expand_simple_binop (mode
, AND
,
1870 target
, gen_int_mode (diff
, mode
),
1871 if_info
->x
, 0, OPTAB_WIDEN
);
1873 target
= expand_simple_binop (mode
, PLUS
,
1874 target
, gen_int_mode (ifalse
, mode
),
1875 if_info
->x
, 0, OPTAB_WIDEN
);
1878 if (target
!= if_info
->x
)
1879 noce_emit_move_insn (if_info
->x
, target
);
1881 seq
= end_ifcvt_sequence (if_info
);
1882 if (!seq
|| !noce_conversion_profitable_p (seq
, if_info
))
1885 emit_insn_before_setloc (seq
, if_info
->jump
,
1886 INSN_LOCATION (if_info
->insn_a
));
1887 if_info
->transform_name
= "noce_try_cmove";
1903 /* Return true if X contains a conditional code mode rtx. */
1906 contains_ccmode_rtx_p (rtx x
)
1908 subrtx_iterator::array_type array
;
1909 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1910 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1916 /* Helper for bb_valid_for_noce_process_p. Validate that
1917 the rtx insn INSN is a single set that does not set
1918 the conditional register CC and is in general valid for
1922 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1925 || !NONJUMP_INSN_P (insn
)
1926 || (cc
&& set_of (cc
, insn
)))
1929 rtx sset
= single_set (insn
);
1931 /* Currently support only simple single sets in test_bb. */
1933 || !noce_operand_ok (SET_DEST (sset
))
1934 || contains_ccmode_rtx_p (SET_DEST (sset
))
1935 || !noce_operand_ok (SET_SRC (sset
)))
1942 /* Return true iff the registers that the insns in BB_A set do not get
1943 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1944 renamed later by the caller and so conflicts on it should be ignored
1945 in this function. */
1948 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1951 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1956 FOR_BB_INSNS (bb_a
, a_insn
)
1958 if (!active_insn_p (a_insn
))
1961 rtx sset_a
= single_set (a_insn
);
1965 BITMAP_FREE (bba_sets
);
1968 /* Record all registers that BB_A sets. */
1969 FOR_EACH_INSN_DEF (def
, a_insn
)
1970 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1971 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1976 FOR_BB_INSNS (bb_b
, b_insn
)
1978 if (!active_insn_p (b_insn
))
1981 rtx sset_b
= single_set (b_insn
);
1985 BITMAP_FREE (bba_sets
);
1989 /* Make sure this is a REG and not some instance
1990 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1991 If we have a memory destination then we have a pair of simple
1992 basic blocks performing an operation of the form [addr] = c ? a : b.
1993 bb_valid_for_noce_process_p will have ensured that these are
1994 the only stores present. In that case [addr] should be the location
1995 to be renamed. Assert that the callers set this up properly. */
1996 if (MEM_P (SET_DEST (sset_b
)))
1997 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1998 else if (!REG_P (SET_DEST (sset_b
)))
2000 BITMAP_FREE (bba_sets
);
2004 /* If the insn uses a reg set in BB_A return false. */
2005 FOR_EACH_INSN_USE (use
, b_insn
)
2007 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
2009 BITMAP_FREE (bba_sets
);
2016 BITMAP_FREE (bba_sets
);
2020 /* Emit copies of all the active instructions in BB except the last.
2021 This is a helper for noce_try_cmove_arith. */
2024 noce_emit_all_but_last (basic_block bb
)
2026 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
2028 FOR_BB_INSNS (bb
, insn
)
2030 if (insn
!= last
&& active_insn_p (insn
))
2032 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2034 emit_insn (PATTERN (to_emit
));
2039 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2040 the resulting insn or NULL if it's not a valid insn. */
2043 noce_emit_insn (rtx to_emit
)
2045 gcc_assert (to_emit
);
2046 rtx_insn
*insn
= emit_insn (to_emit
);
2048 if (recog_memoized (insn
) < 0)
2054 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2055 and including the penultimate one in BB if it is not simple
2056 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2057 insn in the block. The reason for that is that LAST_INSN may
2058 have been modified by the preparation in noce_try_cmove_arith. */
2061 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2064 noce_emit_all_but_last (bb
);
2066 if (last_insn
&& !noce_emit_insn (last_insn
))
2072 /* Try more complex cases involving conditional_move. */
2075 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2081 rtx_insn
*insn_a
, *insn_b
;
2082 bool a_simple
= if_info
->then_simple
;
2083 bool b_simple
= if_info
->else_simple
;
2084 basic_block then_bb
= if_info
->then_bb
;
2085 basic_block else_bb
= if_info
->else_bb
;
2089 rtx_insn
*ifcvt_seq
;
2091 /* A conditional move from two memory sources is equivalent to a
2092 conditional on their addresses followed by a load. Don't do this
2093 early because it'll screw alias analysis. Note that we've
2094 already checked for no side effects. */
2095 if (cse_not_expected
2096 && MEM_P (a
) && MEM_P (b
)
2097 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
))
2099 machine_mode address_mode
= get_address_mode (a
);
2103 x
= gen_reg_rtx (address_mode
);
2107 /* ??? We could handle this if we knew that a load from A or B could
2108 not trap or fault. This is also true if we've already loaded
2109 from the address along the path from ENTRY. */
2110 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2113 /* if (test) x = a + b; else x = c - d;
2120 code
= GET_CODE (if_info
->cond
);
2121 insn_a
= if_info
->insn_a
;
2122 insn_b
= if_info
->insn_b
;
2124 machine_mode x_mode
= GET_MODE (x
);
2126 if (!can_conditionally_move_p (x_mode
))
2129 /* Possibly rearrange operands to make things come out more natural. */
2130 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2133 if (rtx_equal_p (b
, x
))
2135 else if (general_operand (b
, GET_MODE (b
)))
2140 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2142 std::swap (insn_a
, insn_b
);
2143 std::swap (a_simple
, b_simple
);
2144 std::swap (then_bb
, else_bb
);
2148 if (then_bb
&& else_bb
2149 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2150 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2155 /* If one of the blocks is empty then the corresponding B or A value
2156 came from the test block. The non-empty complex block that we will
2157 emit might clobber the register used by B or A, so move it to a pseudo
2160 rtx tmp_a
= NULL_RTX
;
2161 rtx tmp_b
= NULL_RTX
;
2163 if (b_simple
|| !else_bb
)
2164 tmp_b
= gen_reg_rtx (x_mode
);
2166 if (a_simple
|| !then_bb
)
2167 tmp_a
= gen_reg_rtx (x_mode
);
2172 rtx emit_a
= NULL_RTX
;
2173 rtx emit_b
= NULL_RTX
;
2174 rtx_insn
*tmp_insn
= NULL
;
2175 bool modified_in_a
= false;
2176 bool modified_in_b
= false;
2177 /* If either operand is complex, load it into a register first.
2178 The best way to do this is to copy the original insn. In this
2179 way we preserve any clobbers etc that the insn may have had.
2180 This is of course not possible in the IS_MEM case. */
2182 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2187 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2188 emit_a
= gen_rtx_SET (reg
, a
);
2194 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2196 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2197 rtx set
= single_set (copy_of_a
);
2200 emit_a
= PATTERN (copy_of_a
);
2204 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2205 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2211 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2215 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2216 emit_b
= gen_rtx_SET (reg
, b
);
2222 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2223 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2224 rtx set
= single_set (copy_of_b
);
2227 emit_b
= PATTERN (copy_of_b
);
2231 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2232 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2238 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2239 if (tmp_b
&& then_bb
)
2241 FOR_BB_INSNS (then_bb
, tmp_insn
)
2242 /* Don't check inside insn_a. We will have changed it to emit_a
2243 with a destination that doesn't conflict. */
2244 if (!(insn_a
&& tmp_insn
== insn_a
)
2245 && modified_in_p (orig_b
, tmp_insn
))
2247 modified_in_a
= true;
2253 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2254 if (tmp_a
&& else_bb
)
2256 FOR_BB_INSNS (else_bb
, tmp_insn
)
2257 /* Don't check inside insn_b. We will have changed it to emit_b
2258 with a destination that doesn't conflict. */
2259 if (!(insn_b
&& tmp_insn
== insn_b
)
2260 && modified_in_p (orig_a
, tmp_insn
))
2262 modified_in_b
= true;
2267 /* If insn to set up A clobbers any registers B depends on, try to
2268 swap insn that sets up A with the one that sets up B. If even
2269 that doesn't help, punt. */
2270 if (modified_in_a
&& !modified_in_b
)
2272 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2273 goto end_seq_and_fail
;
2275 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2276 goto end_seq_and_fail
;
2278 else if (!modified_in_a
)
2280 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2281 goto end_seq_and_fail
;
2283 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2284 goto end_seq_and_fail
;
2287 goto end_seq_and_fail
;
2289 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2290 XEXP (if_info
->cond
, 1), a
, b
);
2293 goto end_seq_and_fail
;
2295 /* If we're handling a memory for above, emit the load now. */
2298 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2300 /* Copy over flags as appropriate. */
2301 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2302 MEM_VOLATILE_P (mem
) = 1;
2303 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2304 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2306 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2308 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2309 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2311 noce_emit_move_insn (if_info
->x
, mem
);
2313 else if (target
!= x
)
2314 noce_emit_move_insn (x
, target
);
2316 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2317 if (!ifcvt_seq
|| !noce_conversion_profitable_p (ifcvt_seq
, if_info
))
2320 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2321 INSN_LOCATION (if_info
->insn_a
));
2322 if_info
->transform_name
= "noce_try_cmove_arith";
2330 /* For most cases, the simplified condition we found is the best
2331 choice, but this is not the case for the min/max/abs transforms.
2332 For these we wish to know that it is A or B in the condition. */
2335 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2336 rtx_insn
**earliest
)
2342 /* If target is already mentioned in the known condition, return it. */
2343 if (reg_mentioned_p (target
, if_info
->cond
))
2345 *earliest
= if_info
->cond_earliest
;
2346 return if_info
->cond
;
2349 set
= pc_set (if_info
->jump
);
2350 cond
= XEXP (SET_SRC (set
), 0);
2352 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2353 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2354 if (if_info
->then_else_reversed
)
2357 /* If we're looking for a constant, try to make the conditional
2358 have that constant in it. There are two reasons why it may
2359 not have the constant we want:
2361 1. GCC may have needed to put the constant in a register, because
2362 the target can't compare directly against that constant. For
2363 this case, we look for a SET immediately before the comparison
2364 that puts a constant in that register.
2366 2. GCC may have canonicalized the conditional, for example
2367 replacing "if x < 4" with "if x <= 3". We can undo that (or
2368 make equivalent types of changes) to get the constants we need
2369 if they're off by one in the right direction. */
2371 if (CONST_INT_P (target
))
2373 enum rtx_code code
= GET_CODE (if_info
->cond
);
2374 rtx op_a
= XEXP (if_info
->cond
, 0);
2375 rtx op_b
= XEXP (if_info
->cond
, 1);
2376 rtx_insn
*prev_insn
;
2378 /* First, look to see if we put a constant in a register. */
2379 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2381 && BLOCK_FOR_INSN (prev_insn
)
2382 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2383 && INSN_P (prev_insn
)
2384 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2386 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2388 src
= SET_SRC (PATTERN (prev_insn
));
2389 if (CONST_INT_P (src
))
2391 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2393 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2396 if (CONST_INT_P (op_a
))
2398 std::swap (op_a
, op_b
);
2399 code
= swap_condition (code
);
2404 /* Now, look to see if we can get the right constant by
2405 adjusting the conditional. */
2406 if (CONST_INT_P (op_b
))
2408 HOST_WIDE_INT desired_val
= INTVAL (target
);
2409 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2414 if (desired_val
!= HOST_WIDE_INT_MAX
2415 && actual_val
== desired_val
+ 1)
2418 op_b
= GEN_INT (desired_val
);
2422 if (desired_val
!= HOST_WIDE_INT_MIN
2423 && actual_val
== desired_val
- 1)
2426 op_b
= GEN_INT (desired_val
);
2430 if (desired_val
!= HOST_WIDE_INT_MIN
2431 && actual_val
== desired_val
- 1)
2434 op_b
= GEN_INT (desired_val
);
2438 if (desired_val
!= HOST_WIDE_INT_MAX
2439 && actual_val
== desired_val
+ 1)
2442 op_b
= GEN_INT (desired_val
);
2450 /* If we made any changes, generate a new conditional that is
2451 equivalent to what we started with, but has the right
2453 if (code
!= GET_CODE (if_info
->cond
)
2454 || op_a
!= XEXP (if_info
->cond
, 0)
2455 || op_b
!= XEXP (if_info
->cond
, 1))
2457 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2458 *earliest
= if_info
->cond_earliest
;
2463 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2464 earliest
, target
, have_cbranchcc4
, true);
2465 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2468 /* We almost certainly searched back to a different place.
2469 Need to re-verify correct lifetimes. */
2471 /* X may not be mentioned in the range (cond_earliest, jump]. */
2472 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2473 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2476 /* A and B may not be modified in the range [cond_earliest, jump). */
2477 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2479 && (modified_in_p (if_info
->a
, insn
)
2480 || modified_in_p (if_info
->b
, insn
)))
2486 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2489 noce_try_minmax (struct noce_if_info
*if_info
)
2492 rtx_insn
*earliest
, *seq
;
2493 enum rtx_code code
, op
;
2496 if (!noce_simple_bbs (if_info
))
2499 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2500 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2501 to get the target to tell us... */
2502 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2503 || HONOR_NANS (if_info
->x
))
2506 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2510 /* Verify the condition is of the form we expect, and canonicalize
2511 the comparison code. */
2512 code
= GET_CODE (cond
);
2513 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2515 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2518 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2520 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2522 code
= swap_condition (code
);
2527 /* Determine what sort of operation this is. Note that the code is for
2528 a taken branch, so the code->operation mapping appears backwards. */
2561 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2562 if_info
->a
, if_info
->b
,
2563 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2569 if (target
!= if_info
->x
)
2570 noce_emit_move_insn (if_info
->x
, target
);
2572 seq
= end_ifcvt_sequence (if_info
);
2576 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2577 if_info
->cond
= cond
;
2578 if_info
->cond_earliest
= earliest
;
2579 if_info
->transform_name
= "noce_try_minmax";
2584 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2585 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2589 noce_try_abs (struct noce_if_info
*if_info
)
2591 rtx cond
, target
, a
, b
, c
;
2592 rtx_insn
*earliest
, *seq
;
2594 bool one_cmpl
= false;
2596 if (!noce_simple_bbs (if_info
))
2599 /* Reject modes with signed zeros. */
2600 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2603 /* Recognize A and B as constituting an ABS or NABS. The canonical
2604 form is a branch around the negation, taken when the object is the
2605 first operand of a comparison against 0 that evaluates to true. */
2608 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2610 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2615 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2620 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2629 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2633 /* Verify the condition is of the form we expect. */
2634 if (rtx_equal_p (XEXP (cond
, 0), b
))
2636 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2644 /* Verify that C is zero. Search one step backward for a
2645 REG_EQUAL note or a simple source if necessary. */
2649 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2651 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2652 && (set
= single_set (insn
))
2653 && rtx_equal_p (SET_DEST (set
), c
))
2655 rtx note
= find_reg_equal_equiv_note (insn
);
2665 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2666 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2667 c
= get_pool_constant (XEXP (c
, 0));
2669 /* Work around funny ideas get_condition has wrt canonicalization.
2670 Note that these rtx constants are known to be CONST_INT, and
2671 therefore imply integer comparisons.
2672 The one_cmpl case is more complicated, as we want to handle
2673 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2674 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2675 but not other cases (x > -1 is equivalent of x >= 0). */
2676 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2678 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2683 else if (c
== CONST0_RTX (GET_MODE (b
)))
2686 && GET_CODE (cond
) != GE
2687 && GET_CODE (cond
) != LT
)
2693 /* Determine what sort of operation this is. */
2694 switch (GET_CODE (cond
))
2713 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2716 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2718 /* ??? It's a quandary whether cmove would be better here, especially
2719 for integers. Perhaps combine will clean things up. */
2720 if (target
&& negate
)
2723 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2726 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2736 if (target
!= if_info
->x
)
2737 noce_emit_move_insn (if_info
->x
, target
);
2739 seq
= end_ifcvt_sequence (if_info
);
2743 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2744 if_info
->cond
= cond
;
2745 if_info
->cond_earliest
= earliest
;
2746 if_info
->transform_name
= "noce_try_abs";
2751 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2754 noce_try_sign_mask (struct noce_if_info
*if_info
)
2760 bool t_unconditional
;
2762 if (!noce_simple_bbs (if_info
))
2765 cond
= if_info
->cond
;
2766 code
= GET_CODE (cond
);
2771 if (if_info
->a
== const0_rtx
)
2773 if ((code
== LT
&& c
== const0_rtx
)
2774 || (code
== LE
&& c
== constm1_rtx
))
2777 else if (if_info
->b
== const0_rtx
)
2779 if ((code
== GE
&& c
== const0_rtx
)
2780 || (code
== GT
&& c
== constm1_rtx
))
2784 if (! t
|| side_effects_p (t
))
2787 /* We currently don't handle different modes. */
2788 mode
= GET_MODE (t
);
2789 if (GET_MODE (m
) != mode
)
2792 /* This is only profitable if T is unconditionally executed/evaluated in the
2793 original insn sequence or T is cheap. The former happens if B is the
2794 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2795 INSN_B which can happen for e.g. conditional stores to memory. For the
2796 cost computation use the block TEST_BB where the evaluation will end up
2797 after the transformation. */
2800 && (if_info
->insn_b
== NULL_RTX
2801 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2802 if (!(t_unconditional
2803 || (set_src_cost (t
, mode
, if_info
->speed_p
)
2804 < COSTS_N_INSNS (2))))
2808 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2809 "(signed) m >> 31" directly. This benefits targets with specialized
2810 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2811 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2812 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2821 noce_emit_move_insn (if_info
->x
, t
);
2823 seq
= end_ifcvt_sequence (if_info
);
2827 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2828 if_info
->transform_name
= "noce_try_sign_mask";
2834 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2838 noce_try_bitop (struct noce_if_info
*if_info
)
2840 rtx cond
, x
, a
, result
;
2847 cond
= if_info
->cond
;
2848 code
= GET_CODE (cond
);
2850 if (!noce_simple_bbs (if_info
))
2853 /* Check for no else condition. */
2854 if (! rtx_equal_p (x
, if_info
->b
))
2857 /* Check for a suitable condition. */
2858 if (code
!= NE
&& code
!= EQ
)
2860 if (XEXP (cond
, 1) != const0_rtx
)
2862 cond
= XEXP (cond
, 0);
2864 /* ??? We could also handle AND here. */
2865 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2867 if (XEXP (cond
, 1) != const1_rtx
2868 || !CONST_INT_P (XEXP (cond
, 2))
2869 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2871 bitnum
= INTVAL (XEXP (cond
, 2));
2872 mode
= GET_MODE (x
);
2873 if (BITS_BIG_ENDIAN
)
2874 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2875 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2882 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2884 /* Check for "if (X & C) x = x op C". */
2885 if (! rtx_equal_p (x
, XEXP (a
, 0))
2886 || !CONST_INT_P (XEXP (a
, 1))
2887 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2888 != HOST_WIDE_INT_1U
<< bitnum
)
2891 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2892 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2893 if (GET_CODE (a
) == IOR
)
2894 result
= (code
== NE
) ? a
: NULL_RTX
;
2895 else if (code
== NE
)
2897 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2898 result
= gen_int_mode (HOST_WIDE_INT_1
<< bitnum
, mode
);
2899 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2903 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2904 result
= gen_int_mode (~(HOST_WIDE_INT_1
<< bitnum
), mode
);
2905 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2908 else if (GET_CODE (a
) == AND
)
2910 /* Check for "if (X & C) x &= ~C". */
2911 if (! rtx_equal_p (x
, XEXP (a
, 0))
2912 || !CONST_INT_P (XEXP (a
, 1))
2913 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2914 != (~(HOST_WIDE_INT_1
<< bitnum
) & GET_MODE_MASK (mode
)))
2917 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2918 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2919 result
= (code
== EQ
) ? a
: NULL_RTX
;
2927 noce_emit_move_insn (x
, result
);
2928 seq
= end_ifcvt_sequence (if_info
);
2932 emit_insn_before_setloc (seq
, if_info
->jump
,
2933 INSN_LOCATION (if_info
->insn_a
));
2935 if_info
->transform_name
= "noce_try_bitop";
2940 /* Similar to get_condition, only the resulting condition must be
2941 valid at JUMP, instead of at EARLIEST.
2943 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2944 THEN block of the caller, and we have to reverse the condition. */
2947 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2952 if (! any_condjump_p (jump
))
2955 set
= pc_set (jump
);
2957 /* If this branches to JUMP_LABEL when the condition is false,
2958 reverse the condition. */
2959 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2960 && label_ref_label (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2962 /* We may have to reverse because the caller's if block is not canonical,
2963 i.e. the THEN block isn't the fallthrough block for the TEST block
2964 (see find_if_header). */
2965 if (then_else_reversed
)
2968 /* If the condition variable is a register and is MODE_INT, accept it. */
2970 cond
= XEXP (SET_SRC (set
), 0);
2971 tmp
= XEXP (cond
, 0);
2972 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2973 && (GET_MODE (tmp
) != BImode
2974 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2979 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2980 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2984 /* Otherwise, fall back on canonicalize_condition to do the dirty
2985 work of manipulating MODE_CC values and COMPARE rtx codes. */
2986 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2987 NULL_RTX
, have_cbranchcc4
, true);
2989 /* We don't handle side-effects in the condition, like handling
2990 REG_INC notes and making sure no duplicate conditions are emitted. */
2991 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2997 /* Return true if OP is ok for if-then-else processing. */
3000 noce_operand_ok (const_rtx op
)
3002 if (side_effects_p (op
))
3005 /* We special-case memories, so handle any of them with
3006 no address side effects. */
3008 return ! side_effects_p (XEXP (op
, 0));
3010 return ! may_trap_p (op
);
3013 /* Return true if X contains a MEM subrtx. */
3016 contains_mem_rtx_p (rtx x
)
3018 subrtx_iterator::array_type array
;
3019 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
3026 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3027 The condition used in this if-conversion is in COND.
3028 In practice, check that TEST_BB ends with a single set
3029 x := a and all previous computations
3030 in TEST_BB don't produce any values that are live after TEST_BB.
3031 In other words, all the insns in TEST_BB are there only
3032 to compute a value for x. Add the rtx cost of the insns
3033 in TEST_BB to COST. Record whether TEST_BB is a single simple
3034 set instruction in SIMPLE_P. */
3037 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3038 unsigned int *cost
, bool *simple_p
)
3043 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3044 rtx last_set
= NULL_RTX
;
3046 rtx cc
= cc_in_cond (cond
);
3048 if (!insn_valid_noce_process_p (last_insn
, cc
))
3050 last_set
= single_set (last_insn
);
3052 rtx x
= SET_DEST (last_set
);
3053 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3054 rtx first_set
= single_set (first_insn
);
3059 /* We have a single simple set, that's okay. */
3060 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3062 if (first_insn
== last_insn
)
3064 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3065 *cost
+= insn_rtx_cost (first_set
, speed_p
);
3069 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3070 gcc_assert (prev_last_insn
);
3072 /* For now, disallow setting x multiple times in test_bb. */
3073 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3076 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3078 /* The regs that are live out of test_bb. */
3079 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3081 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3083 FOR_BB_INSNS (test_bb
, insn
)
3085 if (insn
!= last_insn
)
3087 if (!active_insn_p (insn
))
3090 if (!insn_valid_noce_process_p (insn
, cc
))
3091 goto free_bitmap_and_fail
;
3093 rtx sset
= single_set (insn
);
3096 if (contains_mem_rtx_p (SET_SRC (sset
))
3097 || !REG_P (SET_DEST (sset
))
3098 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3099 goto free_bitmap_and_fail
;
3101 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3102 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3106 /* If any of the intermediate results in test_bb are live after test_bb
3108 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3109 goto free_bitmap_and_fail
;
3111 BITMAP_FREE (test_bb_temps
);
3112 *cost
+= potential_cost
;
3116 free_bitmap_and_fail
:
3117 BITMAP_FREE (test_bb_temps
);
3121 /* We have something like:
3124 { i = a; j = b; k = c; }
3128 tmp_i = (x > y) ? a : i;
3129 tmp_j = (x > y) ? b : j;
3130 tmp_k = (x > y) ? c : k;
3135 Subsequent passes are expected to clean up the extra moves.
3137 Look for special cases such as writes to one register which are
3138 read back in another SET, as might occur in a swap idiom or
3147 Which we want to rewrite to:
3149 tmp_i = (x > y) ? a : i;
3150 tmp_j = (x > y) ? tmp_i : j;
3154 We can catch these when looking at (SET x y) by keeping a list of the
3155 registers we would have targeted before if-conversion and looking back
3156 through it for an overlap with Y. If we find one, we rewire the
3157 conditional set to use the temporary we introduced earlier.
3159 IF_INFO contains the useful information about the block structure and
3160 jump instructions. */
3163 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3165 basic_block test_bb
= if_info
->test_bb
;
3166 basic_block then_bb
= if_info
->then_bb
;
3167 basic_block join_bb
= if_info
->join_bb
;
3168 rtx_insn
*jump
= if_info
->jump
;
3169 rtx_insn
*cond_earliest
;
3174 /* Decompose the condition attached to the jump. */
3175 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3176 rtx x
= XEXP (cond
, 0);
3177 rtx y
= XEXP (cond
, 1);
3178 rtx_code cond_code
= GET_CODE (cond
);
3180 /* The true targets for a conditional move. */
3181 auto_vec
<rtx
> targets
;
3182 /* The temporaries introduced to allow us to not consider register
3184 auto_vec
<rtx
> temporaries
;
3185 /* The insns we've emitted. */
3186 auto_vec
<rtx_insn
*> unmodified_insns
;
3189 FOR_BB_INSNS (then_bb
, insn
)
3191 /* Skip over non-insns. */
3192 if (!active_insn_p (insn
))
3195 rtx set
= single_set (insn
);
3196 gcc_checking_assert (set
);
3198 rtx target
= SET_DEST (set
);
3199 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3200 rtx new_val
= SET_SRC (set
);
3201 rtx old_val
= target
;
3203 /* If we were supposed to read from an earlier write in this block,
3204 we've changed the register allocation. Rewire the read. While
3205 we are looking, also try to catch a swap idiom. */
3206 for (int i
= count
- 1; i
>= 0; --i
)
3207 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3209 /* Catch a "swap" style idiom. */
3210 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3211 /* The write to targets[i] is only live until the read
3212 here. As the condition codes match, we can propagate
3214 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3216 new_val
= temporaries
[i
];
3220 /* If we had a non-canonical conditional jump (i.e. one where
3221 the fallthrough is to the "else" case) we need to reverse
3222 the conditional select. */
3223 if (if_info
->then_else_reversed
)
3224 std::swap (old_val
, new_val
);
3227 /* We allow simple lowpart register subreg SET sources in
3228 bb_ok_for_noce_convert_multiple_sets. Be careful when processing
3230 (set (reg:SI r1) (reg:SI r2))
3231 (set (reg:HI r3) (subreg:HI (r1)))
3232 For the second insn new_val or old_val (r1 in this example) will be
3233 taken from the temporaries and have the wider mode which will not
3234 match with the mode of the other source of the conditional move, so
3235 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
3236 Wrap the two cmove operands into subregs if appropriate to prevent
3238 if (GET_MODE (new_val
) != GET_MODE (temp
))
3240 machine_mode src_mode
= GET_MODE (new_val
);
3241 machine_mode dst_mode
= GET_MODE (temp
);
3242 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3247 new_val
= lowpart_subreg (dst_mode
, new_val
, src_mode
);
3249 if (GET_MODE (old_val
) != GET_MODE (temp
))
3251 machine_mode src_mode
= GET_MODE (old_val
);
3252 machine_mode dst_mode
= GET_MODE (temp
);
3253 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3258 old_val
= lowpart_subreg (dst_mode
, old_val
, src_mode
);
3261 /* Actually emit the conditional move. */
3262 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3263 x
, y
, new_val
, old_val
);
3265 /* If we failed to expand the conditional move, drop out and don't
3267 if (temp_dest
== NULL_RTX
)
3275 targets
.safe_push (target
);
3276 temporaries
.safe_push (temp_dest
);
3277 unmodified_insns
.safe_push (insn
);
3280 /* We must have seen some sort of insn to insert, otherwise we were
3281 given an empty BB to convert, and we can't handle that. */
3282 gcc_assert (!unmodified_insns
.is_empty ());
3284 /* Now fixup the assignments. */
3285 for (int i
= 0; i
< count
; i
++)
3286 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3288 /* Actually emit the sequence if it isn't too expensive. */
3289 rtx_insn
*seq
= get_insns ();
3291 if (!noce_conversion_profitable_p (seq
, if_info
))
3297 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3298 set_used_flags (insn
);
3300 /* Mark all our temporaries and targets as used. */
3301 for (int i
= 0; i
< count
; i
++)
3303 set_used_flags (temporaries
[i
]);
3304 set_used_flags (targets
[i
]);
3307 set_used_flags (cond
);
3311 unshare_all_rtl_in_chain (seq
);
3317 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3319 || recog_memoized (insn
) == -1)
3322 emit_insn_before_setloc (seq
, if_info
->jump
,
3323 INSN_LOCATION (unmodified_insns
.last ()));
3325 /* Clean up THEN_BB and the edges in and out of it. */
3326 remove_edge (find_edge (test_bb
, join_bb
));
3327 remove_edge (find_edge (then_bb
, join_bb
));
3328 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3329 delete_basic_block (then_bb
);
3332 /* Maybe merge blocks now the jump is simple enough. */
3333 if (can_merge_blocks_p (test_bb
, join_bb
))
3335 merge_blocks (test_bb
, join_bb
);
3339 num_updated_if_blocks
++;
3340 if_info
->transform_name
= "noce_convert_multiple_sets";
3344 /* Return true iff basic block TEST_BB is comprised of only
3345 (SET (REG) (REG)) insns suitable for conversion to a series
3346 of conditional moves. Also check that we have more than one set
3347 (other routines can handle a single set better than we would), and
3348 fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. */
3351 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
)
3355 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3357 FOR_BB_INSNS (test_bb
, insn
)
3359 /* Skip over notes etc. */
3360 if (!active_insn_p (insn
))
3363 /* We only handle SET insns. */
3364 rtx set
= single_set (insn
);
3365 if (set
== NULL_RTX
)
3368 rtx dest
= SET_DEST (set
);
3369 rtx src
= SET_SRC (set
);
3371 /* We can possibly relax this, but for now only handle REG to REG
3372 (including subreg) moves. This avoids any issues that might come
3373 from introducing loads/stores that might violate data-race-freedom
3379 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3380 && subreg_lowpart_p (src
))))
3383 /* Destination must be appropriate for a conditional write. */
3384 if (!noce_operand_ok (dest
))
3387 /* We must be able to conditionally move in this mode. */
3388 if (!can_conditionally_move_p (GET_MODE (dest
)))
3394 /* If we would only put out one conditional move, the other strategies
3395 this pass tries are better optimized and will be more appropriate.
3396 Some targets want to strictly limit the number of conditional moves
3397 that are emitted, they set this through PARAM, we need to respect
3399 return count
> 1 && count
<= param
;
3402 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3403 it without using conditional execution. Return TRUE if we were successful
3404 at converting the block. */
3407 noce_process_if_block (struct noce_if_info
*if_info
)
3409 basic_block test_bb
= if_info
->test_bb
; /* test block */
3410 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3411 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3412 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3413 rtx_insn
*jump
= if_info
->jump
;
3414 rtx cond
= if_info
->cond
;
3415 rtx_insn
*insn_a
, *insn_b
;
3417 rtx orig_x
, x
, a
, b
;
3419 /* We're looking for patterns of the form
3421 (1) if (...) x = a; else x = b;
3422 (2) x = b; if (...) x = a;
3423 (3) if (...) x = a; // as if with an initial x = x.
3424 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3425 The later patterns require jumps to be more expensive.
3426 For the if (...) x = a; else x = b; case we allow multiple insns
3427 inside the then and else blocks as long as their only effect is
3428 to calculate a value for x.
3429 ??? For future expansion, further expand the "multiple X" rules. */
3431 /* First look for multiple SETS. */
3433 && HAVE_conditional_move
3435 && bb_ok_for_noce_convert_multiple_sets (then_bb
))
3437 if (noce_convert_multiple_sets (if_info
))
3439 if (dump_file
&& if_info
->transform_name
)
3440 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3441 if_info
->transform_name
);
3446 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3447 unsigned int then_cost
= 0, else_cost
= 0;
3448 if (!bb_valid_for_noce_process_p (then_bb
, cond
, &then_cost
,
3449 &if_info
->then_simple
))
3453 && !bb_valid_for_noce_process_p (else_bb
, cond
, &else_cost
,
3454 &if_info
->else_simple
))
3457 if (else_bb
== NULL
)
3458 if_info
->original_cost
+= then_cost
;
3460 if_info
->original_cost
+= MIN (then_cost
, else_cost
);
3462 if_info
->original_cost
+= then_cost
+ else_cost
;
3464 insn_a
= last_active_insn (then_bb
, FALSE
);
3465 set_a
= single_set (insn_a
);
3468 x
= SET_DEST (set_a
);
3469 a
= SET_SRC (set_a
);
3471 /* Look for the other potential set. Make sure we've got equivalent
3473 /* ??? This is overconservative. Storing to two different mems is
3474 as easy as conditionally computing the address. Storing to a
3475 single mem merely requires a scratch memory to use as one of the
3476 destination addresses; often the memory immediately below the
3477 stack pointer is available for this. */
3481 insn_b
= last_active_insn (else_bb
, FALSE
);
3482 set_b
= single_set (insn_b
);
3485 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3490 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3491 /* We're going to be moving the evaluation of B down from above
3492 COND_EARLIEST to JUMP. Make sure the relevant data is still
3495 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3496 || !NONJUMP_INSN_P (insn_b
)
3497 || (set_b
= single_set (insn_b
)) == NULL_RTX
3498 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3499 || ! noce_operand_ok (SET_SRC (set_b
))
3500 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3501 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3502 /* Avoid extending the lifetime of hard registers on small
3503 register class machines. */
3504 || (REG_P (SET_SRC (set_b
))
3505 && HARD_REGISTER_P (SET_SRC (set_b
))
3506 && targetm
.small_register_classes_for_mode_p
3507 (GET_MODE (SET_SRC (set_b
))))
3508 /* Likewise with X. In particular this can happen when
3509 noce_get_condition looks farther back in the instruction
3510 stream than one might expect. */
3511 || reg_overlap_mentioned_p (x
, cond
)
3512 || reg_overlap_mentioned_p (x
, a
)
3513 || modified_between_p (x
, insn_b
, jump
))
3520 /* If x has side effects then only the if-then-else form is safe to
3521 convert. But even in that case we would need to restore any notes
3522 (such as REG_INC) at then end. That can be tricky if
3523 noce_emit_move_insn expands to more than one insn, so disable the
3524 optimization entirely for now if there are side effects. */
3525 if (side_effects_p (x
))
3528 b
= (set_b
? SET_SRC (set_b
) : x
);
3530 /* Only operate on register destinations, and even then avoid extending
3531 the lifetime of hard registers on small register class machines. */
3533 if_info
->orig_x
= orig_x
;
3535 || (HARD_REGISTER_P (x
)
3536 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3538 if (GET_MODE (x
) == BLKmode
)
3541 if (GET_CODE (x
) == ZERO_EXTRACT
3542 && (!CONST_INT_P (XEXP (x
, 1))
3543 || !CONST_INT_P (XEXP (x
, 2))))
3546 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3547 ? XEXP (x
, 0) : x
));
3550 /* Don't operate on sources that may trap or are volatile. */
3551 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3555 /* Set up the info block for our subroutines. */
3556 if_info
->insn_a
= insn_a
;
3557 if_info
->insn_b
= insn_b
;
3562 /* Try optimizations in some approximation of a useful order. */
3563 /* ??? Should first look to see if X is live incoming at all. If it
3564 isn't, we don't need anything but an unconditional set. */
3566 /* Look and see if A and B are really the same. Avoid creating silly
3567 cmove constructs that no one will fix up later. */
3568 if (noce_simple_bbs (if_info
)
3569 && rtx_interchangeable_p (a
, b
))
3571 /* If we have an INSN_B, we don't have to create any new rtl. Just
3572 move the instruction that we already have. If we don't have an
3573 INSN_B, that means that A == X, and we've got a noop move. In
3574 that case don't do anything and let the code below delete INSN_A. */
3575 if (insn_b
&& else_bb
)
3579 if (else_bb
&& insn_b
== BB_END (else_bb
))
3580 BB_END (else_bb
) = PREV_INSN (insn_b
);
3581 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3583 /* If there was a REG_EQUAL note, delete it since it may have been
3584 true due to this insn being after a jump. */
3585 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3586 remove_note (insn_b
, note
);
3590 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3591 x must be executed twice. */
3592 else if (insn_b
&& side_effects_p (orig_x
))
3599 if (!set_b
&& MEM_P (orig_x
))
3600 /* We want to avoid store speculation to avoid cases like
3601 if (pthread_mutex_trylock(mutex))
3603 Rather than go to much effort here, we rely on the SSA optimizers,
3604 which do a good enough job these days. */
3607 if (noce_try_move (if_info
))
3609 if (noce_try_ifelse_collapse (if_info
))
3611 if (noce_try_store_flag (if_info
))
3613 if (noce_try_bitop (if_info
))
3615 if (noce_try_minmax (if_info
))
3617 if (noce_try_abs (if_info
))
3619 if (noce_try_inverse_constants (if_info
))
3621 if (!targetm
.have_conditional_execution ()
3622 && noce_try_store_flag_constants (if_info
))
3624 if (HAVE_conditional_move
3625 && noce_try_cmove (if_info
))
3627 if (! targetm
.have_conditional_execution ())
3629 if (noce_try_addcc (if_info
))
3631 if (noce_try_store_flag_mask (if_info
))
3633 if (HAVE_conditional_move
3634 && noce_try_cmove_arith (if_info
))
3636 if (noce_try_sign_mask (if_info
))
3640 if (!else_bb
&& set_b
)
3651 if (dump_file
&& if_info
->transform_name
)
3652 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3653 if_info
->transform_name
);
3655 /* If we used a temporary, fix it up now. */
3661 noce_emit_move_insn (orig_x
, x
);
3663 set_used_flags (orig_x
);
3664 unshare_all_rtl_in_chain (seq
);
3667 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3670 /* The original THEN and ELSE blocks may now be removed. The test block
3671 must now jump to the join block. If the test block and the join block
3672 can be merged, do so. */
3675 delete_basic_block (else_bb
);
3679 remove_edge (find_edge (test_bb
, join_bb
));
3681 remove_edge (find_edge (then_bb
, join_bb
));
3682 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3683 delete_basic_block (then_bb
);
3686 if (can_merge_blocks_p (test_bb
, join_bb
))
3688 merge_blocks (test_bb
, join_bb
);
3692 num_updated_if_blocks
++;
3696 /* Check whether a block is suitable for conditional move conversion.
3697 Every insn must be a simple set of a register to a constant or a
3698 register. For each assignment, store the value in the pointer map
3699 VALS, keyed indexed by register pointer, then store the register
3700 pointer in REGS. COND is the condition we will test. */
3703 check_cond_move_block (basic_block bb
,
3704 hash_map
<rtx
, rtx
> *vals
,
3709 rtx cc
= cc_in_cond (cond
);
3711 /* We can only handle simple jumps at the end of the basic block.
3712 It is almost impossible to update the CFG otherwise. */
3714 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3717 FOR_BB_INSNS (bb
, insn
)
3721 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3723 set
= single_set (insn
);
3727 dest
= SET_DEST (set
);
3728 src
= SET_SRC (set
);
3730 || (HARD_REGISTER_P (dest
)
3731 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3734 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3737 if (side_effects_p (src
) || side_effects_p (dest
))
3740 if (may_trap_p (src
) || may_trap_p (dest
))
3743 /* Don't try to handle this if the source register was
3744 modified earlier in the block. */
3747 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3748 && vals
->get (SUBREG_REG (src
))))
3751 /* Don't try to handle this if the destination register was
3752 modified earlier in the block. */
3753 if (vals
->get (dest
))
3756 /* Don't try to handle this if the condition uses the
3757 destination register. */
3758 if (reg_overlap_mentioned_p (dest
, cond
))
3761 /* Don't try to handle this if the source register is modified
3762 later in the block. */
3763 if (!CONSTANT_P (src
)
3764 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3767 /* Skip it if the instruction to be moved might clobber CC. */
3768 if (cc
&& set_of (cc
, insn
))
3771 vals
->put (dest
, src
);
3773 regs
->safe_push (dest
);
3779 /* Given a basic block BB suitable for conditional move conversion,
3780 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3781 the register values depending on COND, emit the insns in the block as
3782 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3783 processed. The caller has started a sequence for the conversion.
3784 Return true if successful, false if something goes wrong. */
3787 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3788 basic_block bb
, rtx cond
,
3789 hash_map
<rtx
, rtx
> *then_vals
,
3790 hash_map
<rtx
, rtx
> *else_vals
,
3795 rtx cond_arg0
, cond_arg1
;
3797 code
= GET_CODE (cond
);
3798 cond_arg0
= XEXP (cond
, 0);
3799 cond_arg1
= XEXP (cond
, 1);
3801 FOR_BB_INSNS (bb
, insn
)
3803 rtx set
, target
, dest
, t
, e
;
3805 /* ??? Maybe emit conditional debug insn? */
3806 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3808 set
= single_set (insn
);
3809 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3811 dest
= SET_DEST (set
);
3813 rtx
*then_slot
= then_vals
->get (dest
);
3814 rtx
*else_slot
= else_vals
->get (dest
);
3815 t
= then_slot
? *then_slot
: NULL_RTX
;
3816 e
= else_slot
? *else_slot
: NULL_RTX
;
3820 /* If this register was set in the then block, we already
3821 handled this case there. */
3834 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3840 noce_emit_move_insn (dest
, target
);
3846 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3847 it using only conditional moves. Return TRUE if we were successful at
3848 converting the block. */
3851 cond_move_process_if_block (struct noce_if_info
*if_info
)
3853 basic_block test_bb
= if_info
->test_bb
;
3854 basic_block then_bb
= if_info
->then_bb
;
3855 basic_block else_bb
= if_info
->else_bb
;
3856 basic_block join_bb
= if_info
->join_bb
;
3857 rtx_insn
*jump
= if_info
->jump
;
3858 rtx cond
= if_info
->cond
;
3859 rtx_insn
*seq
, *loc_insn
;
3862 vec
<rtx
> then_regs
= vNULL
;
3863 vec
<rtx
> else_regs
= vNULL
;
3865 int success_p
= FALSE
;
3866 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3868 /* Build a mapping for each block to the value used for each
3870 hash_map
<rtx
, rtx
> then_vals
;
3871 hash_map
<rtx
, rtx
> else_vals
;
3873 /* Make sure the blocks are suitable. */
3874 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3876 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3879 /* Make sure the blocks can be used together. If the same register
3880 is set in both blocks, and is not set to a constant in both
3881 cases, then both blocks must set it to the same register. We
3882 have already verified that if it is set to a register, that the
3883 source register does not change after the assignment. Also count
3884 the number of registers set in only one of the blocks. */
3886 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3888 rtx
*then_slot
= then_vals
.get (reg
);
3889 rtx
*else_slot
= else_vals
.get (reg
);
3891 gcc_checking_assert (then_slot
);
3896 rtx then_val
= *then_slot
;
3897 rtx else_val
= *else_slot
;
3898 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3899 && !rtx_equal_p (then_val
, else_val
))
3904 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3905 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3907 gcc_checking_assert (else_vals
.get (reg
));
3908 if (!then_vals
.get (reg
))
3912 /* Make sure it is reasonable to convert this block. What matters
3913 is the number of assignments currently made in only one of the
3914 branches, since if we convert we are going to always execute
3916 if (c
> MAX_CONDITIONAL_EXECUTE
3920 /* Try to emit the conditional moves. First do the then block,
3921 then do anything left in the else blocks. */
3923 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3924 &then_vals
, &else_vals
, false)
3926 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3927 &then_vals
, &else_vals
, true)))
3932 seq
= end_ifcvt_sequence (if_info
);
3936 loc_insn
= first_active_insn (then_bb
);
3939 loc_insn
= first_active_insn (else_bb
);
3940 gcc_assert (loc_insn
);
3942 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3946 delete_basic_block (else_bb
);
3950 remove_edge (find_edge (test_bb
, join_bb
));
3952 remove_edge (find_edge (then_bb
, join_bb
));
3953 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3954 delete_basic_block (then_bb
);
3957 if (can_merge_blocks_p (test_bb
, join_bb
))
3959 merge_blocks (test_bb
, join_bb
);
3963 num_updated_if_blocks
++;
3967 then_regs
.release ();
3968 else_regs
.release ();
3973 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3974 IF-THEN-ELSE-JOIN block.
3976 If so, we'll try to convert the insns to not require the branch,
3977 using only transformations that do not require conditional execution.
3979 Return TRUE if we were successful at converting the block. */
3982 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3985 basic_block then_bb
, else_bb
, join_bb
;
3986 bool then_else_reversed
= false;
3989 rtx_insn
*cond_earliest
;
3990 struct noce_if_info if_info
;
3991 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3993 /* We only ever should get here before reload. */
3994 gcc_assert (!reload_completed
);
3996 /* Recognize an IF-THEN-ELSE-JOIN block. */
3997 if (single_pred_p (then_edge
->dest
)
3998 && single_succ_p (then_edge
->dest
)
3999 && single_pred_p (else_edge
->dest
)
4000 && single_succ_p (else_edge
->dest
)
4001 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
4003 then_bb
= then_edge
->dest
;
4004 else_bb
= else_edge
->dest
;
4005 join_bb
= single_succ (then_bb
);
4007 /* Recognize an IF-THEN-JOIN block. */
4008 else if (single_pred_p (then_edge
->dest
)
4009 && single_succ_p (then_edge
->dest
)
4010 && single_succ (then_edge
->dest
) == else_edge
->dest
)
4012 then_bb
= then_edge
->dest
;
4013 else_bb
= NULL_BLOCK
;
4014 join_bb
= else_edge
->dest
;
4016 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
4017 of basic blocks in cfglayout mode does not matter, so the fallthrough
4018 edge can go to any basic block (and not just to bb->next_bb, like in
4020 else if (single_pred_p (else_edge
->dest
)
4021 && single_succ_p (else_edge
->dest
)
4022 && single_succ (else_edge
->dest
) == then_edge
->dest
)
4024 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
4025 To make this work, we have to invert the THEN and ELSE blocks
4026 and reverse the jump condition. */
4027 then_bb
= else_edge
->dest
;
4028 else_bb
= NULL_BLOCK
;
4029 join_bb
= single_succ (then_bb
);
4030 then_else_reversed
= true;
4033 /* Not a form we can handle. */
4036 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4037 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4040 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4043 num_possible_if_blocks
++;
4048 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4049 (else_bb
) ? "-ELSE" : "",
4050 pass
, test_bb
->index
, then_bb
->index
);
4053 fprintf (dump_file
, ", else %d", else_bb
->index
);
4055 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4058 /* If the conditional jump is more than just a conditional
4059 jump, then we can not do if-conversion on this block. */
4060 jump
= BB_END (test_bb
);
4061 if (! onlyjump_p (jump
))
4064 /* If this is not a standard conditional jump, we can't parse it. */
4065 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
4069 /* We must be comparing objects whose modes imply the size. */
4070 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4073 /* Initialize an IF_INFO struct to pass around. */
4074 memset (&if_info
, 0, sizeof if_info
);
4075 if_info
.test_bb
= test_bb
;
4076 if_info
.then_bb
= then_bb
;
4077 if_info
.else_bb
= else_bb
;
4078 if_info
.join_bb
= join_bb
;
4079 if_info
.cond
= cond
;
4080 if_info
.cond_earliest
= cond_earliest
;
4081 if_info
.jump
= jump
;
4082 if_info
.then_else_reversed
= then_else_reversed
;
4083 if_info
.speed_p
= speed_p
;
4084 if_info
.max_seq_cost
4085 = targetm
.max_noce_ifcvt_seq_cost (then_edge
);
4086 /* We'll add in the cost of THEN_BB and ELSE_BB later, when we check
4087 that they are valid to transform. We can't easily get back to the insn
4088 for COND (and it may not exist if we had to canonicalize to get COND),
4089 and jump_insns are always given a cost of 1 by seq_cost, so treat
4090 both instructions as having cost COSTS_N_INSNS (1). */
4091 if_info
.original_cost
= COSTS_N_INSNS (2);
4094 /* Do the real work. */
4096 if (noce_process_if_block (&if_info
))
4099 if (HAVE_conditional_move
4100 && cond_move_process_if_block (&if_info
))
4107 /* Merge the blocks and mark for local life update. */
4110 merge_if_block (struct ce_if_block
* ce_info
)
4112 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4113 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4114 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4115 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4116 basic_block combo_bb
;
4118 /* All block merging is done into the lower block numbers. */
4121 df_set_bb_dirty (test_bb
);
4123 /* Merge any basic blocks to handle && and || subtests. Each of
4124 the blocks are on the fallthru path from the predecessor block. */
4125 if (ce_info
->num_multiple_test_blocks
> 0)
4127 basic_block bb
= test_bb
;
4128 basic_block last_test_bb
= ce_info
->last_test_bb
;
4129 basic_block fallthru
= block_fallthru (bb
);
4134 fallthru
= block_fallthru (bb
);
4135 merge_blocks (combo_bb
, bb
);
4138 while (bb
!= last_test_bb
);
4141 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4142 label, but it might if there were || tests. That label's count should be
4143 zero, and it normally should be removed. */
4147 /* If THEN_BB has no successors, then there's a BARRIER after it.
4148 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4149 is no longer needed, and in fact it is incorrect to leave it in
4151 if (EDGE_COUNT (then_bb
->succs
) == 0
4152 && EDGE_COUNT (combo_bb
->succs
) > 1)
4154 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4155 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4156 end
= NEXT_INSN (end
);
4158 if (end
&& BARRIER_P (end
))
4161 merge_blocks (combo_bb
, then_bb
);
4165 /* The ELSE block, if it existed, had a label. That label count
4166 will almost always be zero, but odd things can happen when labels
4167 get their addresses taken. */
4170 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4171 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4172 is no longer needed, and in fact it is incorrect to leave it in
4174 if (EDGE_COUNT (else_bb
->succs
) == 0
4175 && EDGE_COUNT (combo_bb
->succs
) > 1)
4177 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4178 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4179 end
= NEXT_INSN (end
);
4181 if (end
&& BARRIER_P (end
))
4184 merge_blocks (combo_bb
, else_bb
);
4188 /* If there was no join block reported, that means it was not adjacent
4189 to the others, and so we cannot merge them. */
4193 rtx_insn
*last
= BB_END (combo_bb
);
4195 /* The outgoing edge for the current COMBO block should already
4196 be correct. Verify this. */
4197 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4198 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4199 || (NONJUMP_INSN_P (last
)
4200 && GET_CODE (PATTERN (last
)) == TRAP_IF
4201 && (TRAP_CONDITION (PATTERN (last
))
4202 == const_true_rtx
)));
4205 /* There should still be something at the end of the THEN or ELSE
4206 blocks taking us to our final destination. */
4207 gcc_assert (JUMP_P (last
)
4208 || (EDGE_SUCC (combo_bb
, 0)->dest
4209 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4211 && SIBLING_CALL_P (last
))
4212 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4213 && can_throw_internal (last
)));
4216 /* The JOIN block may have had quite a number of other predecessors too.
4217 Since we've already merged the TEST, THEN and ELSE blocks, we should
4218 have only one remaining edge from our if-then-else diamond. If there
4219 is more than one remaining edge, it must come from elsewhere. There
4220 may be zero incoming edges if the THEN block didn't actually join
4221 back up (as with a call to a non-return function). */
4222 else if (EDGE_COUNT (join_bb
->preds
) < 2
4223 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4225 /* We can merge the JOIN cleanly and update the dataflow try
4226 again on this pass.*/
4227 merge_blocks (combo_bb
, join_bb
);
4232 /* We cannot merge the JOIN. */
4234 /* The outgoing edge for the current COMBO block should already
4235 be correct. Verify this. */
4236 gcc_assert (single_succ_p (combo_bb
)
4237 && single_succ (combo_bb
) == join_bb
);
4239 /* Remove the jump and cruft from the end of the COMBO block. */
4240 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4241 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4244 num_updated_if_blocks
++;
4247 /* Find a block ending in a simple IF condition and try to transform it
4248 in some way. When converting a multi-block condition, put the new code
4249 in the first such block and delete the rest. Return a pointer to this
4250 first block if some transformation was done. Return NULL otherwise. */
4253 find_if_header (basic_block test_bb
, int pass
)
4255 ce_if_block ce_info
;
4259 /* The kind of block we're looking for has exactly two successors. */
4260 if (EDGE_COUNT (test_bb
->succs
) != 2)
4263 then_edge
= EDGE_SUCC (test_bb
, 0);
4264 else_edge
= EDGE_SUCC (test_bb
, 1);
4266 if (df_get_bb_dirty (then_edge
->dest
))
4268 if (df_get_bb_dirty (else_edge
->dest
))
4271 /* Neither edge should be abnormal. */
4272 if ((then_edge
->flags
& EDGE_COMPLEX
)
4273 || (else_edge
->flags
& EDGE_COMPLEX
))
4276 /* Nor exit the loop. */
4277 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4278 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4281 /* The THEN edge is canonically the one that falls through. */
4282 if (then_edge
->flags
& EDGE_FALLTHRU
)
4284 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4285 std::swap (then_edge
, else_edge
);
4287 /* Otherwise this must be a multiway branch of some sort. */
4290 memset (&ce_info
, 0, sizeof (ce_info
));
4291 ce_info
.test_bb
= test_bb
;
4292 ce_info
.then_bb
= then_edge
->dest
;
4293 ce_info
.else_bb
= else_edge
->dest
;
4294 ce_info
.pass
= pass
;
4296 #ifdef IFCVT_MACHDEP_INIT
4297 IFCVT_MACHDEP_INIT (&ce_info
);
4300 if (!reload_completed
4301 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4304 if (reload_completed
4305 && targetm
.have_conditional_execution ()
4306 && cond_exec_find_if_block (&ce_info
))
4309 if (targetm
.have_trap ()
4310 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4311 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4314 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4315 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4317 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4319 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4327 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4328 /* Set this so we continue looking. */
4329 cond_exec_changed_p
= TRUE
;
4330 return ce_info
.test_bb
;
4333 /* Return true if a block has two edges, one of which falls through to the next
4334 block, and the other jumps to a specific block, so that we can tell if the
4335 block is part of an && test or an || test. Returns either -1 or the number
4336 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4339 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4342 int fallthru_p
= FALSE
;
4349 if (!cur_bb
|| !target_bb
)
4352 /* If no edges, obviously it doesn't jump or fallthru. */
4353 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4356 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4358 if (cur_edge
->flags
& EDGE_COMPLEX
)
4359 /* Anything complex isn't what we want. */
4362 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4365 else if (cur_edge
->dest
== target_bb
)
4372 if ((jump_p
& fallthru_p
) == 0)
4375 /* Don't allow calls in the block, since this is used to group && and ||
4376 together for conditional execution support. ??? we should support
4377 conditional execution support across calls for IA-64 some day, but
4378 for now it makes the code simpler. */
4379 end
= BB_END (cur_bb
);
4380 insn
= BB_HEAD (cur_bb
);
4382 while (insn
!= NULL_RTX
)
4389 && !DEBUG_INSN_P (insn
)
4390 && GET_CODE (PATTERN (insn
)) != USE
4391 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4397 insn
= NEXT_INSN (insn
);
4403 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4404 block. If so, we'll try to convert the insns to not require the branch.
4405 Return TRUE if we were successful at converting the block. */
4408 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4410 basic_block test_bb
= ce_info
->test_bb
;
4411 basic_block then_bb
= ce_info
->then_bb
;
4412 basic_block else_bb
= ce_info
->else_bb
;
4413 basic_block join_bb
= NULL_BLOCK
;
4418 ce_info
->last_test_bb
= test_bb
;
4420 /* We only ever should get here after reload,
4421 and if we have conditional execution. */
4422 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4424 /* Discover if any fall through predecessors of the current test basic block
4425 were && tests (which jump to the else block) or || tests (which jump to
4427 if (single_pred_p (test_bb
)
4428 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4430 basic_block bb
= single_pred (test_bb
);
4431 basic_block target_bb
;
4432 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4435 /* Determine if the preceding block is an && or || block. */
4436 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4438 ce_info
->and_and_p
= TRUE
;
4439 target_bb
= else_bb
;
4441 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4443 ce_info
->and_and_p
= FALSE
;
4444 target_bb
= then_bb
;
4447 target_bb
= NULL_BLOCK
;
4449 if (target_bb
&& n_insns
<= max_insns
)
4451 int total_insns
= 0;
4454 ce_info
->last_test_bb
= test_bb
;
4456 /* Found at least one && or || block, look for more. */
4459 ce_info
->test_bb
= test_bb
= bb
;
4460 total_insns
+= n_insns
;
4463 if (!single_pred_p (bb
))
4466 bb
= single_pred (bb
);
4467 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4469 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4471 ce_info
->num_multiple_test_blocks
= blocks
;
4472 ce_info
->num_multiple_test_insns
= total_insns
;
4474 if (ce_info
->and_and_p
)
4475 ce_info
->num_and_and_blocks
= blocks
;
4477 ce_info
->num_or_or_blocks
= blocks
;
4481 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4482 other than any || blocks which jump to the THEN block. */
4483 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4486 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4487 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4489 if (cur_edge
->flags
& EDGE_COMPLEX
)
4493 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4495 if (cur_edge
->flags
& EDGE_COMPLEX
)
4499 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4500 if (EDGE_COUNT (then_bb
->succs
) > 0
4501 && (!single_succ_p (then_bb
)
4502 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4503 || (epilogue_completed
4504 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4507 /* If the THEN block has no successors, conditional execution can still
4508 make a conditional call. Don't do this unless the ELSE block has
4509 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4510 Check for the last insn of the THEN block being an indirect jump, which
4511 is listed as not having any successors, but confuses the rest of the CE
4512 code processing. ??? we should fix this in the future. */
4513 if (EDGE_COUNT (then_bb
->succs
) == 0)
4515 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4517 rtx_insn
*last_insn
= BB_END (then_bb
);
4520 && NOTE_P (last_insn
)
4521 && last_insn
!= BB_HEAD (then_bb
))
4522 last_insn
= PREV_INSN (last_insn
);
4525 && JUMP_P (last_insn
)
4526 && ! simplejump_p (last_insn
))
4530 else_bb
= NULL_BLOCK
;
4536 /* If the THEN block's successor is the other edge out of the TEST block,
4537 then we have an IF-THEN combo without an ELSE. */
4538 else if (single_succ (then_bb
) == else_bb
)
4541 else_bb
= NULL_BLOCK
;
4544 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4545 has exactly one predecessor and one successor, and the outgoing edge
4546 is not complex, then we have an IF-THEN-ELSE combo. */
4547 else if (single_succ_p (else_bb
)
4548 && single_succ (then_bb
) == single_succ (else_bb
)
4549 && single_pred_p (else_bb
)
4550 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4551 && !(epilogue_completed
4552 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4553 join_bb
= single_succ (else_bb
);
4555 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4559 num_possible_if_blocks
++;
4564 "\nIF-THEN%s block found, pass %d, start block %d "
4565 "[insn %d], then %d [%d]",
4566 (else_bb
) ? "-ELSE" : "",
4569 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4571 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4574 fprintf (dump_file
, ", else %d [%d]",
4576 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4578 fprintf (dump_file
, ", join %d [%d]",
4580 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4582 if (ce_info
->num_multiple_test_blocks
> 0)
4583 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4584 ce_info
->num_multiple_test_blocks
,
4585 (ce_info
->and_and_p
) ? "&&" : "||",
4586 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4587 ce_info
->last_test_bb
->index
,
4588 ((BB_HEAD (ce_info
->last_test_bb
))
4589 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4592 fputc ('\n', dump_file
);
4595 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4596 first condition for free, since we've already asserted that there's a
4597 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4598 we checked the FALLTHRU flag, those are already adjacent to the last IF
4600 /* ??? As an enhancement, move the ELSE block. Have to deal with
4601 BLOCK notes, if by no other means than backing out the merge if they
4602 exist. Sticky enough I don't want to think about it now. */
4604 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4606 if ((next
= next
->next_bb
) != join_bb
4607 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4615 /* Do the real work. */
4617 ce_info
->else_bb
= else_bb
;
4618 ce_info
->join_bb
= join_bb
;
4620 /* If we have && and || tests, try to first handle combining the && and ||
4621 tests into the conditional code, and if that fails, go back and handle
4622 it without the && and ||, which at present handles the && case if there
4623 was no ELSE block. */
4624 if (cond_exec_process_if_block (ce_info
, TRUE
))
4627 if (ce_info
->num_multiple_test_blocks
)
4631 if (cond_exec_process_if_block (ce_info
, FALSE
))
4638 /* Convert a branch over a trap, or a branch
4639 to a trap, into a conditional trap. */
4642 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4644 basic_block then_bb
= then_edge
->dest
;
4645 basic_block else_bb
= else_edge
->dest
;
4646 basic_block other_bb
, trap_bb
;
4647 rtx_insn
*trap
, *jump
;
4649 rtx_insn
*cond_earliest
;
4652 /* Locate the block with the trap instruction. */
4653 /* ??? While we look for no successors, we really ought to allow
4654 EH successors. Need to fix merge_if_block for that to work. */
4655 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4656 trap_bb
= then_bb
, other_bb
= else_bb
;
4657 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4658 trap_bb
= else_bb
, other_bb
= then_bb
;
4664 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4665 test_bb
->index
, trap_bb
->index
);
4668 /* If this is not a standard conditional jump, we can't parse it. */
4669 jump
= BB_END (test_bb
);
4670 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4674 /* If the conditional jump is more than just a conditional jump, then
4675 we can not do if-conversion on this block. Give up for returnjump_p,
4676 changing a conditional return followed by unconditional trap for
4677 conditional trap followed by unconditional return is likely not
4678 beneficial and harder to handle. */
4679 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4682 /* We must be comparing objects whose modes imply the size. */
4683 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4686 /* Reverse the comparison code, if necessary. */
4687 code
= GET_CODE (cond
);
4688 if (then_bb
== trap_bb
)
4690 code
= reversed_comparison_code (cond
, jump
);
4691 if (code
== UNKNOWN
)
4695 /* Attempt to generate the conditional trap. */
4696 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4697 copy_rtx (XEXP (cond
, 1)),
4698 TRAP_CODE (PATTERN (trap
)));
4702 /* Emit the new insns before cond_earliest. */
4703 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4705 /* Delete the trap block if possible. */
4706 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4707 df_set_bb_dirty (test_bb
);
4708 df_set_bb_dirty (then_bb
);
4709 df_set_bb_dirty (else_bb
);
4711 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4713 delete_basic_block (trap_bb
);
4717 /* Wire together the blocks again. */
4718 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4719 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4720 else if (trap_bb
== then_bb
)
4722 rtx lab
= JUMP_LABEL (jump
);
4723 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4724 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4725 LABEL_NUSES (lab
) += 1;
4726 JUMP_LABEL (newjump
) = lab
;
4727 emit_barrier_after (newjump
);
4731 if (can_merge_blocks_p (test_bb
, other_bb
))
4733 merge_blocks (test_bb
, other_bb
);
4737 num_updated_if_blocks
++;
4741 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4745 block_has_only_trap (basic_block bb
)
4749 /* We're not the exit block. */
4750 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4753 /* The block must have no successors. */
4754 if (EDGE_COUNT (bb
->succs
) > 0)
4757 /* The only instruction in the THEN block must be the trap. */
4758 trap
= first_active_insn (bb
);
4759 if (! (trap
== BB_END (bb
)
4760 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4761 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4767 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4768 transformable, but not necessarily the other. There need be no
4771 Return TRUE if we were successful at converting the block.
4773 Cases we'd like to look at:
4776 if (test) goto over; // x not live
4784 if (! test) goto label;
4787 if (test) goto E; // x not live
4801 (3) // This one's really only interesting for targets that can do
4802 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4803 // it results in multiple branches on a cache line, which often
4804 // does not sit well with predictors.
4806 if (test1) goto E; // predicted not taken
4822 (A) Don't do (2) if the branch is predicted against the block we're
4823 eliminating. Do it anyway if we can eliminate a branch; this requires
4824 that the sole successor of the eliminated block postdominate the other
4827 (B) With CE, on (3) we can steal from both sides of the if, creating
4836 Again, this is most useful if J postdominates.
4838 (C) CE substitutes for helpful life information.
4840 (D) These heuristics need a lot of work. */
4842 /* Tests for case 1 above. */
4845 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4847 basic_block then_bb
= then_edge
->dest
;
4848 basic_block else_bb
= else_edge
->dest
;
4850 int then_bb_index
, then_prob
;
4851 rtx else_target
= NULL_RTX
;
4853 /* If we are partitioning hot/cold basic blocks, we don't want to
4854 mess up unconditional or indirect jumps that cross between hot
4857 Basic block partitioning may result in some jumps that appear to
4858 be optimizable (or blocks that appear to be mergeable), but which really
4859 must be left untouched (they are required to make it safely across
4860 partition boundaries). See the comments at the top of
4861 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4863 if ((BB_END (then_bb
)
4864 && JUMP_P (BB_END (then_bb
))
4865 && CROSSING_JUMP_P (BB_END (then_bb
)))
4866 || (BB_END (test_bb
)
4867 && JUMP_P (BB_END (test_bb
))
4868 && CROSSING_JUMP_P (BB_END (test_bb
)))
4869 || (BB_END (else_bb
)
4870 && JUMP_P (BB_END (else_bb
))
4871 && CROSSING_JUMP_P (BB_END (else_bb
))))
4874 /* THEN has one successor. */
4875 if (!single_succ_p (then_bb
))
4878 /* THEN does not fall through, but is not strange either. */
4879 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4882 /* THEN has one predecessor. */
4883 if (!single_pred_p (then_bb
))
4886 /* THEN must do something. */
4887 if (forwarder_block_p (then_bb
))
4890 num_possible_if_blocks
++;
4893 "\nIF-CASE-1 found, start %d, then %d\n",
4894 test_bb
->index
, then_bb
->index
);
4896 if (then_edge
->probability
)
4897 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4899 then_prob
= REG_BR_PROB_BASE
/ 2;
4901 /* We're speculating from the THEN path, we want to make sure the cost
4902 of speculation is within reason. */
4903 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4904 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4905 predictable_edge_p (then_edge
)))))
4908 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4910 rtx_insn
*jump
= BB_END (else_edge
->src
);
4911 gcc_assert (JUMP_P (jump
));
4912 else_target
= JUMP_LABEL (jump
);
4915 /* Registers set are dead, or are predicable. */
4916 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4917 single_succ_edge (then_bb
), 1))
4920 /* Conversion went ok, including moving the insns and fixing up the
4921 jump. Adjust the CFG to match. */
4923 /* We can avoid creating a new basic block if then_bb is immediately
4924 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4925 through to else_bb. */
4927 if (then_bb
->next_bb
== else_bb
4928 && then_bb
->prev_bb
== test_bb
4929 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4931 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4934 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4935 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4936 else_bb
, else_target
);
4938 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4941 df_set_bb_dirty (test_bb
);
4942 df_set_bb_dirty (else_bb
);
4944 then_bb_index
= then_bb
->index
;
4945 delete_basic_block (then_bb
);
4947 /* Make rest of code believe that the newly created block is the THEN_BB
4948 block we removed. */
4951 df_bb_replace (then_bb_index
, new_bb
);
4952 /* This should have been done above via force_nonfallthru_and_redirect
4953 (possibly called from redirect_edge_and_branch_force). */
4954 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4958 num_updated_if_blocks
++;
4962 /* Test for case 2 above. */
4965 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4967 basic_block then_bb
= then_edge
->dest
;
4968 basic_block else_bb
= else_edge
->dest
;
4970 int then_prob
, else_prob
;
4972 /* We do not want to speculate (empty) loop latches. */
4974 && else_bb
->loop_father
->latch
== else_bb
)
4977 /* If we are partitioning hot/cold basic blocks, we don't want to
4978 mess up unconditional or indirect jumps that cross between hot
4981 Basic block partitioning may result in some jumps that appear to
4982 be optimizable (or blocks that appear to be mergeable), but which really
4983 must be left untouched (they are required to make it safely across
4984 partition boundaries). See the comments at the top of
4985 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4987 if ((BB_END (then_bb
)
4988 && JUMP_P (BB_END (then_bb
))
4989 && CROSSING_JUMP_P (BB_END (then_bb
)))
4990 || (BB_END (test_bb
)
4991 && JUMP_P (BB_END (test_bb
))
4992 && CROSSING_JUMP_P (BB_END (test_bb
)))
4993 || (BB_END (else_bb
)
4994 && JUMP_P (BB_END (else_bb
))
4995 && CROSSING_JUMP_P (BB_END (else_bb
))))
4998 /* ELSE has one successor. */
4999 if (!single_succ_p (else_bb
))
5002 else_succ
= single_succ_edge (else_bb
);
5004 /* ELSE outgoing edge is not complex. */
5005 if (else_succ
->flags
& EDGE_COMPLEX
)
5008 /* ELSE has one predecessor. */
5009 if (!single_pred_p (else_bb
))
5012 /* THEN is not EXIT. */
5013 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
5016 if (else_edge
->probability
)
5018 else_prob
= else_edge
->probability
;
5019 then_prob
= REG_BR_PROB_BASE
- else_prob
;
5023 else_prob
= REG_BR_PROB_BASE
/ 2;
5024 then_prob
= REG_BR_PROB_BASE
/ 2;
5027 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
5028 if (else_prob
> then_prob
)
5030 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
5031 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
5037 num_possible_if_blocks
++;
5040 "\nIF-CASE-2 found, start %d, else %d\n",
5041 test_bb
->index
, else_bb
->index
);
5043 /* We're speculating from the ELSE path, we want to make sure the cost
5044 of speculation is within reason. */
5045 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
5046 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
5047 predictable_edge_p (else_edge
)))))
5050 /* Registers set are dead, or are predicable. */
5051 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
5054 /* Conversion went ok, including moving the insns and fixing up the
5055 jump. Adjust the CFG to match. */
5057 df_set_bb_dirty (test_bb
);
5058 df_set_bb_dirty (then_bb
);
5059 delete_basic_block (else_bb
);
5062 num_updated_if_blocks
++;
5064 /* ??? We may now fallthru from one of THEN's successors into a join
5065 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5070 /* Used by the code above to perform the actual rtl transformations.
5071 Return TRUE if successful.
5073 TEST_BB is the block containing the conditional branch. MERGE_BB
5074 is the block containing the code to manipulate. DEST_EDGE is an
5075 edge representing a jump to the join block; after the conversion,
5076 TEST_BB should be branching to its destination.
5077 REVERSEP is true if the sense of the branch should be reversed. */
5080 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5081 basic_block other_bb
, edge dest_edge
, int reversep
)
5083 basic_block new_dest
= dest_edge
->dest
;
5084 rtx_insn
*head
, *end
, *jump
;
5085 rtx_insn
*earliest
= NULL
;
5087 bitmap merge_set
= NULL
;
5088 /* Number of pending changes. */
5089 int n_validated_changes
= 0;
5090 rtx new_dest_label
= NULL_RTX
;
5092 jump
= BB_END (test_bb
);
5094 /* Find the extent of the real code in the merge block. */
5095 head
= BB_HEAD (merge_bb
);
5096 end
= BB_END (merge_bb
);
5098 while (DEBUG_INSN_P (end
) && end
!= head
)
5099 end
= PREV_INSN (end
);
5101 /* If merge_bb ends with a tablejump, predicating/moving insn's
5102 into test_bb and then deleting merge_bb will result in the jumptable
5103 that follows merge_bb being removed along with merge_bb and then we
5104 get an unresolved reference to the jumptable. */
5105 if (tablejump_p (end
, NULL
, NULL
))
5109 head
= NEXT_INSN (head
);
5110 while (DEBUG_INSN_P (head
) && head
!= end
)
5111 head
= NEXT_INSN (head
);
5119 head
= NEXT_INSN (head
);
5120 while (DEBUG_INSN_P (head
) && head
!= end
)
5121 head
= NEXT_INSN (head
);
5126 if (!onlyjump_p (end
))
5133 end
= PREV_INSN (end
);
5134 while (DEBUG_INSN_P (end
) && end
!= head
)
5135 end
= PREV_INSN (end
);
5138 /* Don't move frame-related insn across the conditional branch. This
5139 can lead to one of the paths of the branch having wrong unwind info. */
5140 if (epilogue_completed
)
5142 rtx_insn
*insn
= head
;
5145 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5149 insn
= NEXT_INSN (insn
);
5153 /* Disable handling dead code by conditional execution if the machine needs
5154 to do anything funny with the tests, etc. */
5155 #ifndef IFCVT_MODIFY_TESTS
5156 if (targetm
.have_conditional_execution ())
5158 /* In the conditional execution case, we have things easy. We know
5159 the condition is reversible. We don't have to check life info
5160 because we're going to conditionally execute the code anyway.
5161 All that's left is making sure the insns involved can actually
5166 cond
= cond_exec_get_condition (jump
);
5170 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5171 int prob_val
= (note
? XINT (note
, 0) : -1);
5175 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5178 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5181 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5184 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5185 && verify_changes (0))
5186 n_validated_changes
= num_validated_changes ();
5194 /* If we allocated new pseudos (e.g. in the conditional move
5195 expander called from noce_emit_cmove), we must resize the
5197 if (max_regno
< max_reg_num ())
5198 max_regno
= max_reg_num ();
5200 /* Try the NCE path if the CE path did not result in any changes. */
5201 if (n_validated_changes
== 0)
5208 /* In the non-conditional execution case, we have to verify that there
5209 are no trapping operations, no calls, no references to memory, and
5210 that any registers modified are dead at the branch site. */
5212 if (!any_condjump_p (jump
))
5215 /* Find the extent of the conditional. */
5216 cond
= noce_get_condition (jump
, &earliest
, false);
5220 live
= BITMAP_ALLOC (®_obstack
);
5221 simulate_backwards_to_point (merge_bb
, live
, end
);
5222 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5224 df_get_live_in (other_bb
), NULL
);
5229 /* Collect the set of registers set in MERGE_BB. */
5230 merge_set
= BITMAP_ALLOC (®_obstack
);
5232 FOR_BB_INSNS (merge_bb
, insn
)
5233 if (NONDEBUG_INSN_P (insn
))
5234 df_simulate_find_defs (insn
, merge_set
);
5236 /* If shrink-wrapping, disable this optimization when test_bb is
5237 the first basic block and merge_bb exits. The idea is to not
5238 move code setting up a return register as that may clobber a
5239 register used to pass function parameters, which then must be
5240 saved in caller-saved regs. A caller-saved reg requires the
5241 prologue, killing a shrink-wrap opportunity. */
5242 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5243 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5244 && single_succ_p (new_dest
)
5245 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5246 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5251 return_regs
= BITMAP_ALLOC (®_obstack
);
5253 /* Start off with the intersection of regs used to pass
5254 params and regs used to return values. */
5255 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5256 if (FUNCTION_ARG_REGNO_P (i
)
5257 && targetm
.calls
.function_value_regno_p (i
))
5258 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5260 bitmap_and_into (return_regs
,
5261 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5262 bitmap_and_into (return_regs
,
5263 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5264 if (!bitmap_empty_p (return_regs
))
5266 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5267 if (NONDEBUG_INSN_P (insn
))
5271 /* If this insn sets any reg in return_regs, add all
5272 reg uses to the set of regs we're interested in. */
5273 FOR_EACH_INSN_DEF (def
, insn
)
5274 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5276 df_simulate_uses (insn
, return_regs
);
5280 if (bitmap_intersect_p (merge_set
, return_regs
))
5282 BITMAP_FREE (return_regs
);
5283 BITMAP_FREE (merge_set
);
5287 BITMAP_FREE (return_regs
);
5292 /* We don't want to use normal invert_jump or redirect_jump because
5293 we don't want to delete_insn called. Also, we want to do our own
5294 change group management. */
5296 old_dest
= JUMP_LABEL (jump
);
5297 if (other_bb
!= new_dest
)
5299 if (!any_condjump_p (jump
))
5302 if (JUMP_P (BB_END (dest_edge
->src
)))
5303 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5304 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5305 new_dest_label
= ret_rtx
;
5307 new_dest_label
= block_label (new_dest
);
5309 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5311 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5312 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5316 if (verify_changes (n_validated_changes
))
5317 confirm_change_group ();
5321 if (other_bb
!= new_dest
)
5323 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5326 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5329 std::swap (BRANCH_EDGE (test_bb
)->count
,
5330 FALLTHRU_EDGE (test_bb
)->count
);
5331 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5332 FALLTHRU_EDGE (test_bb
)->probability
);
5333 update_br_prob_note (test_bb
);
5337 /* Move the insns out of MERGE_BB to before the branch. */
5342 if (end
== BB_END (merge_bb
))
5343 BB_END (merge_bb
) = PREV_INSN (head
);
5345 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5346 notes being moved might become invalid. */
5352 if (! INSN_P (insn
))
5354 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5357 remove_note (insn
, note
);
5358 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5360 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5361 notes referring to the registers being set might become invalid. */
5367 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5368 remove_reg_equal_equiv_notes_for_regno (i
);
5370 BITMAP_FREE (merge_set
);
5373 reorder_insns (head
, end
, PREV_INSN (earliest
));
5376 /* Remove the jump and edge if we can. */
5377 if (other_bb
== new_dest
)
5380 remove_edge (BRANCH_EDGE (test_bb
));
5381 /* ??? Can't merge blocks here, as then_bb is still in use.
5382 At minimum, the merge will get done just before bb-reorder. */
5391 BITMAP_FREE (merge_set
);
5396 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5397 we are after combine pass. */
5400 if_convert (bool after_combine
)
5407 df_live_add_problem ();
5408 df_live_set_all_dirty ();
5411 /* Record whether we are after combine pass. */
5412 ifcvt_after_combine
= after_combine
;
5413 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5414 != CODE_FOR_nothing
);
5415 num_possible_if_blocks
= 0;
5416 num_updated_if_blocks
= 0;
5417 num_true_changes
= 0;
5419 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5420 mark_loop_exit_edges ();
5421 loop_optimizer_finalize ();
5422 free_dominance_info (CDI_DOMINATORS
);
5424 /* Compute postdominators. */
5425 calculate_dominance_info (CDI_POST_DOMINATORS
);
5427 df_set_flags (DF_LR_RUN_DCE
);
5429 /* Go through each of the basic blocks looking for things to convert. If we
5430 have conditional execution, we make multiple passes to allow us to handle
5431 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5436 /* Only need to do dce on the first pass. */
5437 df_clear_flags (DF_LR_RUN_DCE
);
5438 cond_exec_changed_p
= FALSE
;
5441 #ifdef IFCVT_MULTIPLE_DUMPS
5442 if (dump_file
&& pass
> 1)
5443 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5446 FOR_EACH_BB_FN (bb
, cfun
)
5449 while (!df_get_bb_dirty (bb
)
5450 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5454 #ifdef IFCVT_MULTIPLE_DUMPS
5455 if (dump_file
&& cond_exec_changed_p
)
5456 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5459 while (cond_exec_changed_p
);
5461 #ifdef IFCVT_MULTIPLE_DUMPS
5463 fprintf (dump_file
, "\n\n========== no more changes\n");
5466 free_dominance_info (CDI_POST_DOMINATORS
);
5471 clear_aux_for_blocks ();
5473 /* If we allocated new pseudos, we must resize the array for sched1. */
5474 if (max_regno
< max_reg_num ())
5475 max_regno
= max_reg_num ();
5477 /* Write the final stats. */
5478 if (dump_file
&& num_possible_if_blocks
> 0)
5481 "\n%d possible IF blocks searched.\n",
5482 num_possible_if_blocks
);
5484 "%d IF blocks converted.\n",
5485 num_updated_if_blocks
);
5487 "%d true changes made.\n\n\n",
5492 df_remove_problem (df_live
);
5494 checking_verify_flow_info ();
5497 /* If-conversion and CFG cleanup. */
5499 rest_of_handle_if_conversion (void)
5501 if (flag_if_conversion
)
5505 dump_reg_info (dump_file
);
5506 dump_flow_info (dump_file
, dump_flags
);
5508 cleanup_cfg (CLEANUP_EXPENSIVE
);
5518 const pass_data pass_data_rtl_ifcvt
=
5520 RTL_PASS
, /* type */
5522 OPTGROUP_NONE
, /* optinfo_flags */
5523 TV_IFCVT
, /* tv_id */
5524 0, /* properties_required */
5525 0, /* properties_provided */
5526 0, /* properties_destroyed */
5527 0, /* todo_flags_start */
5528 TODO_df_finish
, /* todo_flags_finish */
5531 class pass_rtl_ifcvt
: public rtl_opt_pass
5534 pass_rtl_ifcvt (gcc::context
*ctxt
)
5535 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5538 /* opt_pass methods: */
5539 virtual bool gate (function
*)
5541 return (optimize
> 0) && dbg_cnt (if_conversion
);
5544 virtual unsigned int execute (function
*)
5546 return rest_of_handle_if_conversion ();
5549 }; // class pass_rtl_ifcvt
5554 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5556 return new pass_rtl_ifcvt (ctxt
);
5560 /* Rerun if-conversion, as combine may have simplified things enough
5561 to now meet sequence length restrictions. */
5565 const pass_data pass_data_if_after_combine
=
5567 RTL_PASS
, /* type */
5569 OPTGROUP_NONE
, /* optinfo_flags */
5570 TV_IFCVT
, /* tv_id */
5571 0, /* properties_required */
5572 0, /* properties_provided */
5573 0, /* properties_destroyed */
5574 0, /* todo_flags_start */
5575 TODO_df_finish
, /* todo_flags_finish */
5578 class pass_if_after_combine
: public rtl_opt_pass
5581 pass_if_after_combine (gcc::context
*ctxt
)
5582 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5585 /* opt_pass methods: */
5586 virtual bool gate (function
*)
5588 return optimize
> 0 && flag_if_conversion
5589 && dbg_cnt (if_after_combine
);
5592 virtual unsigned int execute (function
*)
5598 }; // class pass_if_after_combine
5603 make_pass_if_after_combine (gcc::context
*ctxt
)
5605 return new pass_if_after_combine (ctxt
);
5611 const pass_data pass_data_if_after_reload
=
5613 RTL_PASS
, /* type */
5615 OPTGROUP_NONE
, /* optinfo_flags */
5616 TV_IFCVT2
, /* tv_id */
5617 0, /* properties_required */
5618 0, /* properties_provided */
5619 0, /* properties_destroyed */
5620 0, /* todo_flags_start */
5621 TODO_df_finish
, /* todo_flags_finish */
5624 class pass_if_after_reload
: public rtl_opt_pass
5627 pass_if_after_reload (gcc::context
*ctxt
)
5628 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5631 /* opt_pass methods: */
5632 virtual bool gate (function
*)
5634 return optimize
> 0 && flag_if_conversion2
5635 && dbg_cnt (if_after_reload
);
5638 virtual unsigned int execute (function
*)
5644 }; // class pass_if_after_reload
5649 make_pass_if_after_reload (gcc::context
*ctxt
)
5651 return new pass_if_after_reload (ctxt
);