gcc/config/aarch64/aarch64-cost-tables.h

   1 /* RTX cost tables for AArch64.
   2
   3    Copyright (C) 2014-2016 Free Software Foundation, Inc.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_AARCH64_COST_TABLES_H
  22 #define GCC_AARCH64_COST_TABLES_H
  23
  24 #include "config/arm/aarch-cost-tables.h"
  25
  26 /* ThunderX does not have implement AArch32.  */
  27 const struct cpu_cost_table thunderx_extra_costs =
  28 {
  29   /* ALU */
  30   {
  31     0,                  /* Arith.  */
  32     0,                  /* Logical.  */
  33     0,                  /* Shift.  */
  34     0,                  /* Shift_reg.  */
  35     COSTS_N_INSNS (1),  /* Arith_shift.  */
  36     COSTS_N_INSNS (1),  /* Arith_shift_reg.  */
  37     COSTS_N_INSNS (1),  /* UNUSED: Log_shift.  */
  38     COSTS_N_INSNS (1),  /* UNUSED: Log_shift_reg.  */
  39     0,                  /* Extend.  */
  40     COSTS_N_INSNS (1),  /* Extend_arith.  */
  41     0,                  /* Bfi.  */
  42     0,                  /* Bfx.  */
  43     COSTS_N_INSNS (5),  /* Clz.  */
  44     0,                  /* rev.  */
  45     0,                  /* UNUSED: non_exec.  */
  46     false               /* UNUSED: non_exec_costs_exec.  */
  47   },
  48   {
  49     /* MULT SImode */
  50     {
  51       COSTS_N_INSNS (3),        /* Simple.  */
  52       0,                        /* Flag_setting.  */
  53       0,                        /* Extend.  */
  54       0,                        /* Add.  */
  55       COSTS_N_INSNS (1),        /* Extend_add.  */
  56       COSTS_N_INSNS (21)        /* Idiv.  */
  57     },
  58     /* MULT DImode */
  59     {
  60       COSTS_N_INSNS (3),        /* Simple.  */
  61       0,                        /* Flag_setting.  */
  62       0,                        /* Extend.  */
  63       0,                        /* Add.  */
  64       COSTS_N_INSNS (1),        /* Extend_add.  */
  65       COSTS_N_INSNS (37)        /* Idiv.  */
  66     },
  67   },
  68   /* LD/ST */
  69   {
  70     COSTS_N_INSNS (2),  /* Load.  */
  71     COSTS_N_INSNS (2),  /* Load_sign_extend.  */
  72     COSTS_N_INSNS (2),  /* Ldrd.  */
  73     0,                  /* N/A: Ldm_1st.  */
  74     0,                  /* N/A: Ldm_regs_per_insn_1st.  */
  75     0,                  /* N/A: Ldm_regs_per_insn_subsequent.  */
  76     COSTS_N_INSNS (3),  /* Loadf.  */
  77     COSTS_N_INSNS (3),  /* Loadd.  */
  78     0,                  /* N/A: Load_unaligned.  */
  79     0,                  /* Store.  */
  80     0,                  /* Strd.  */
  81     0,                  /* N/A: Stm_1st.  */
  82     0,                  /* N/A: Stm_regs_per_insn_1st.  */
  83     0,                  /* N/A: Stm_regs_per_insn_subsequent.  */
  84     0,                  /* Storef.  */
  85     0,                  /* Stored.  */
  86     COSTS_N_INSNS (1),  /* Store_unaligned.  */
  87     COSTS_N_INSNS (1),  /* Loadv.  */
  88     COSTS_N_INSNS (1)   /* Storev.  */
  89   },
  90   {
  91     /* FP SFmode */
  92     {
  93       COSTS_N_INSNS (11),       /* Div.  */
  94       COSTS_N_INSNS (5),        /* Mult.  */
  95       COSTS_N_INSNS (5),        /* Mult_addsub.  */
  96       COSTS_N_INSNS (5),        /* Fma.  */
  97       COSTS_N_INSNS (3),        /* Addsub.  */
  98       0,                        /* Fpconst.  */
  99       COSTS_N_INSNS (1),        /* Neg.  */
 100       0,                        /* Compare.  */
 101       COSTS_N_INSNS (5),        /* Widen.  */
 102       COSTS_N_INSNS (5),        /* Narrow.  */
 103       COSTS_N_INSNS (5),        /* Toint.  */
 104       COSTS_N_INSNS (5),        /* Fromint.  */
 105       COSTS_N_INSNS (1)         /* Roundint.  */
 106     },
 107     /* FP DFmode */
 108     {
 109       COSTS_N_INSNS (21),       /* Div.  */
 110       COSTS_N_INSNS (5),        /* Mult.  */
 111       COSTS_N_INSNS (5),        /* Mult_addsub.  */
 112       COSTS_N_INSNS (5),        /* Fma.  */
 113       COSTS_N_INSNS (3),        /* Addsub.  */
 114       0,                        /* Fpconst.  */
 115       COSTS_N_INSNS (1),        /* Neg.  */
 116       0,                        /* Compare.  */
 117       COSTS_N_INSNS (5),        /* Widen.  */
 118       COSTS_N_INSNS (5),        /* Narrow.  */
 119       COSTS_N_INSNS (5),        /* Toint.  */
 120       COSTS_N_INSNS (5),        /* Fromint.  */
 121       COSTS_N_INSNS (1)         /* Roundint.  */
 122     }
 123   },
 124   /* Vector */
 125   {
 126     COSTS_N_INSNS (1)   /* Alu.  */
 127   }
 128 };
 129
 130 const struct cpu_cost_table vulcan_extra_costs =
 131 {
 132   /* ALU */
 133   {
 134     0,                  /* Arith.  */
 135     0,                  /* Logical.  */
 136     0,                  /* Shift.  */
 137     0,                  /* Shift_reg.  */
 138     COSTS_N_INSNS (1),  /* Arith_shift.  */
 139     COSTS_N_INSNS (1),  /* Arith_shift_reg.  */
 140     COSTS_N_INSNS (1),  /* Log_shift.  */
 141     COSTS_N_INSNS (1),  /* Log_shift_reg.  */
 142     0,                  /* Extend.  */
 143     COSTS_N_INSNS (1),  /* Extend_arith.  */
 144     0,                  /* Bfi.  */
 145     0,                  /* Bfx.  */
 146     COSTS_N_INSNS (3),  /* Clz.  */
 147     0,                  /* Rev.  */
 148     0,                  /* Non_exec.  */
 149     true                /* Non_exec_costs_exec.  */
 150   },
 151   {
 152     /* MULT SImode */
 153     {
 154       COSTS_N_INSNS (4),        /* Simple.  */
 155       COSTS_N_INSNS (4),        /* Flag_setting.  */
 156       COSTS_N_INSNS (4),        /* Extend.  */
 157       COSTS_N_INSNS (5),        /* Add.  */
 158       COSTS_N_INSNS (5),        /* Extend_add.  */
 159       COSTS_N_INSNS (18)        /* Idiv.  */
 160     },
 161     /* MULT DImode */
 162     {
 163       COSTS_N_INSNS (4),       /* Simple.  */
 164       0,                       /* Flag_setting.  */
 165       COSTS_N_INSNS (4),       /* Extend.  */
 166       COSTS_N_INSNS (5),       /* Add.  */
 167       COSTS_N_INSNS (5),       /* Extend_add.  */
 168       COSTS_N_INSNS (26)       /* Idiv.  */
 169     }
 170   },
 171   /* LD/ST */
 172   {
 173     COSTS_N_INSNS (4),  /* Load.  */
 174     COSTS_N_INSNS (4),  /* Load_sign_extend.  */
 175     COSTS_N_INSNS (5),  /* Ldrd.  */
 176     COSTS_N_INSNS (4),  /* Ldm_1st.  */
 177     1,                  /* Ldm_regs_per_insn_1st.  */
 178     1,                  /* Ldm_regs_per_insn_subsequent.  */
 179     COSTS_N_INSNS (4),  /* Loadf.  */
 180     COSTS_N_INSNS (4),  /* Loadd.  */
 181     COSTS_N_INSNS (4),  /* Load_unaligned.  */
 182     0,                  /* Store.  */
 183     0,                  /* Strd.  */
 184     0,                  /* Stm_1st.  */
 185     1,                  /* Stm_regs_per_insn_1st.  */
 186     1,                  /* Stm_regs_per_insn_subsequent.  */
 187     0,                  /* Storef.  */
 188     0,                  /* Stored.  */
 189     0,                  /* Store_unaligned.  */
 190     COSTS_N_INSNS (1),  /* Loadv.  */
 191     COSTS_N_INSNS (1)   /* Storev.  */
 192   },
 193   {
 194     /* FP SFmode */
 195     {
 196       COSTS_N_INSNS (4),        /* Div.  */
 197       COSTS_N_INSNS (1),        /* Mult.  */
 198       COSTS_N_INSNS (1),        /* Mult_addsub. */
 199       COSTS_N_INSNS (1),        /* Fma.  */
 200       COSTS_N_INSNS (1),        /* Addsub.  */
 201       COSTS_N_INSNS (1),        /* Fpconst. */
 202       COSTS_N_INSNS (1),        /* Neg.  */
 203       COSTS_N_INSNS (1),        /* Compare.  */
 204       COSTS_N_INSNS (2),        /* Widen.  */
 205       COSTS_N_INSNS (2),        /* Narrow.  */
 206       COSTS_N_INSNS (2),        /* Toint.  */
 207       COSTS_N_INSNS (2),        /* Fromint.  */
 208       COSTS_N_INSNS (2)         /* Roundint.  */
 209     },
 210     /* FP DFmode */
 211     {
 212       COSTS_N_INSNS (6),        /* Div.  */
 213       COSTS_N_INSNS (1),        /* Mult.  */
 214       COSTS_N_INSNS (1),        /* Mult_addsub.  */
 215       COSTS_N_INSNS (1),        /* Fma.  */
 216       COSTS_N_INSNS (1),        /* Addsub.  */
 217       COSTS_N_INSNS (1),        /* Fpconst.  */
 218       COSTS_N_INSNS (1),        /* Neg.  */
 219       COSTS_N_INSNS (1),        /* Compare.  */
 220       COSTS_N_INSNS (2),        /* Widen.  */
 221       COSTS_N_INSNS (2),        /* Narrow.  */
 222       COSTS_N_INSNS (2),        /* Toint.  */
 223       COSTS_N_INSNS (2),        /* Fromint.  */
 224       COSTS_N_INSNS (2)         /* Roundint.  */
 225     }
 226   },
 227   /* Vector */
 228   {
 229     COSTS_N_INSNS (1)   /* Alu.  */
 230   }
 231 };
 232
 233
 234 #endif
 235