libjava/sysdep/m68k/locks.h

   1 // locks.h - Thread synchronization primitives. m68k implementation.
   2
   3 /* Copyright (C) 2006, 2012  Free Software Foundation
   4
   5    This file is part of libgcj.
   6
   7 This software is copyrighted work licensed under the terms of the
   8 Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
   9 details.  */
  10
  11 #ifndef __SYSDEP_LOCKS_H__
  12 #define __SYSDEP_LOCKS_H__
  13
  14 /* Integer type big enough for object address.  */
  15 typedef size_t obj_addr_t __attribute__ ((aligned (4)));
  16
  17 // Atomically replace *addr by new_val if it was initially equal to old.
  18 // Return true if the comparison succeeded.
  19 // Assumed to have acquire semantics, i.e. later memory operations
  20 // cannot execute before the compare_and_swap finishes.
  21 static inline bool
  22 compare_and_swap(volatile obj_addr_t *addr,
  23                  obj_addr_t old, obj_addr_t new_val)
  24 {
  25   return __sync_bool_compare_and_swap (addr, old, new_val);
  26 }
  27
  28 // Ensure that subsequent instructions do not execute on stale
  29 // data that was loaded from memory before the barrier.
  30 // On m68k, the hardware ensures that reads are properly ordered.
  31 static inline void
  32 read_barrier(void)
  33 {
  34 }
  35
  36 // Ensure that prior stores to memory are completed with respect to other
  37 // processors.
  38 static inline void
  39 write_barrier(void)
  40 {
  41   // m68k does not reorder writes. We just need to ensure that gcc also doesn't.
  42   __asm__ __volatile__(" " : : : "memory");
  43 }
  44
  45 // Set *addr to new_val with release semantics, i.e. making sure
  46 // that prior loads and stores complete before this
  47 // assignment.
  48 // On m68k, the hardware shouldn't reorder reads and writes,
  49 // so we just have to convince gcc not to do it either.
  50 static inline void
  51 release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
  52 {
  53   write_barrier ();
  54   *addr = new_val;
  55 }
  56
  57 // Compare_and_swap with release semantics instead of acquire semantics.
  58 // On many architecture, the operation makes both guarantees, so the
  59 // implementation can be the same.
  60 static inline bool
  61 compare_and_swap_release(volatile obj_addr_t *addr,
  62                          obj_addr_t old,
  63                          obj_addr_t new_val)
  64 {
  65   return compare_and_swap(addr, old, new_val);
  66 }
  67
  68 #endif