1 ;; Predicate definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2004-2015 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Return true if OP is either a i387 or SSE fp register.
21 (define_predicate "any_fp_register_operand"
22 (and (match_code "reg")
23 (match_test "ANY_FP_REGNO_P (REGNO (op))")))
25 ;; Return true if OP is an i387 fp register.
26 (define_predicate "fp_register_operand"
27 (and (match_code "reg")
28 (match_test "STACK_REGNO_P (REGNO (op))")))
30 ;; Return true if OP is a non-fp register_operand.
31 (define_predicate "register_and_not_any_fp_reg_operand"
32 (and (match_code "reg")
33 (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
35 ;; True if the operand is a GENERAL class register.
36 (define_predicate "general_reg_operand"
37 (and (match_code "reg")
38 (match_test "GENERAL_REG_P (op)")))
40 ;; Return true if OP is a register operand other than an i387 fp register.
41 (define_predicate "register_and_not_fp_reg_operand"
42 (and (match_code "reg")
43 (not (match_test "STACK_REGNO_P (REGNO (op))"))))
45 ;; True if the operand is an MMX register.
46 (define_predicate "mmx_reg_operand"
47 (and (match_code "reg")
48 (match_test "MMX_REGNO_P (REGNO (op))")))
50 ;; True if the operand is an SSE register.
51 (define_predicate "sse_reg_operand"
52 (and (match_code "reg")
53 (match_test "SSE_REGNO_P (REGNO (op))")))
55 ;; True if the operand is an AVX-512 new register.
56 (define_predicate "ext_sse_reg_operand"
57 (and (match_code "reg")
58 (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
60 ;; True if the operand is an AVX-512 mask register.
61 (define_predicate "mask_reg_operand"
62 (and (match_code "reg")
63 (match_test "MASK_REGNO_P (REGNO (op))")))
65 ;; Return true if op is a QImode register.
66 (define_predicate "any_QIreg_operand"
67 (and (match_code "reg")
68 (match_test "ANY_QI_REGNO_P (REGNO (op))")))
70 ;; Return true if op is one of QImode registers: %[abcd][hl].
71 (define_predicate "QIreg_operand"
72 (and (match_code "reg")
73 (match_test "QI_REGNO_P (REGNO (op))")))
75 ;; Return true if op is a QImode register operand other than %[abcd][hl].
76 (define_predicate "ext_QIreg_operand"
77 (and (match_test "TARGET_64BIT")
79 (not (match_test "QI_REGNO_P (REGNO (op))"))))
81 ;; Return true if op is the AX register.
82 (define_predicate "ax_reg_operand"
83 (and (match_code "reg")
84 (match_test "REGNO (op) == AX_REG")))
86 ;; Return true if op is the flags register.
87 (define_predicate "flags_reg_operand"
88 (and (match_code "reg")
89 (match_test "REGNO (op) == FLAGS_REG")))
91 ;; Match an SI or HImode register for a zero_extract.
92 (define_special_predicate "ext_register_operand"
93 (match_operand 0 "register_operand")
95 if ((!TARGET_64BIT || GET_MODE (op) != DImode)
96 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
98 if (GET_CODE (op) == SUBREG)
101 /* Be careful to accept only registers having upper parts. */
103 && (REGNO (op) > LAST_VIRTUAL_REGISTER || QI_REGNO_P (REGNO (op))));
106 ;; Match nonimmediate operands, but exclude memory operands on 64bit targets.
107 (define_predicate "nonimmediate_x64nomem_operand"
108 (if_then_else (match_test "TARGET_64BIT")
109 (match_operand 0 "register_operand")
110 (match_operand 0 "nonimmediate_operand")))
112 ;; Match general operands, but exclude memory operands on 64bit targets.
113 (define_predicate "general_x64nomem_operand"
114 (if_then_else (match_test "TARGET_64BIT")
115 (match_operand 0 "nonmemory_operand")
116 (match_operand 0 "general_operand")))
118 ;; Match register operands, include memory operand for TARGET_MIX_SSE_I387.
119 (define_predicate "register_mixssei387nonimm_operand"
120 (if_then_else (match_test "TARGET_MIX_SSE_I387")
121 (match_operand 0 "nonimmediate_operand")
122 (match_operand 0 "register_operand")))
124 ;; Return true if VALUE is symbol reference
125 (define_predicate "symbol_operand"
126 (match_code "symbol_ref"))
128 ;; Return true if VALUE can be stored in a sign extended immediate field.
129 (define_predicate "x86_64_immediate_operand"
130 (match_code "const_int,symbol_ref,label_ref,const")
133 return immediate_operand (op, mode);
135 switch (GET_CODE (op))
139 HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
140 return trunc_int_for_mode (val, SImode) == val;
143 /* For certain code models, the symbolic references are known to fit.
144 in CM_SMALL_PIC model we know it fits if it is local to the shared
145 library. Don't count TLS SYMBOL_REFs here, since they should fit
146 only if inside of UNSPEC handled below. */
147 /* TLS symbols are not constant. */
148 if (SYMBOL_REF_TLS_MODEL (op))
150 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL
151 || (ix86_cmodel == CM_MEDIUM && !SYMBOL_REF_FAR_ADDR_P (op)));
154 /* For certain code models, the code is near as well. */
155 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
156 || ix86_cmodel == CM_KERNEL);
159 /* We also may accept the offsetted memory references in certain
161 if (GET_CODE (XEXP (op, 0)) == UNSPEC)
162 switch (XINT (XEXP (op, 0), 1))
164 case UNSPEC_GOTPCREL:
166 case UNSPEC_GOTNTPOFF:
173 if (GET_CODE (XEXP (op, 0)) == PLUS)
175 rtx op1 = XEXP (XEXP (op, 0), 0);
176 rtx op2 = XEXP (XEXP (op, 0), 1);
177 HOST_WIDE_INT offset;
179 if (ix86_cmodel == CM_LARGE)
181 if (!CONST_INT_P (op2))
183 offset = trunc_int_for_mode (INTVAL (op2), DImode);
184 switch (GET_CODE (op1))
187 /* TLS symbols are not constant. */
188 if (SYMBOL_REF_TLS_MODEL (op1))
190 /* For CM_SMALL assume that latest object is 16MB before
191 end of 31bits boundary. We may also accept pretty
192 large negative constants knowing that all objects are
193 in the positive half of address space. */
194 if ((ix86_cmodel == CM_SMALL
195 || (ix86_cmodel == CM_MEDIUM
196 && !SYMBOL_REF_FAR_ADDR_P (op1)))
197 && offset < 16*1024*1024
198 && trunc_int_for_mode (offset, SImode) == offset)
200 /* For CM_KERNEL we know that all object resist in the
201 negative half of 32bits address space. We may not
202 accept negative offsets, since they may be just off
203 and we may accept pretty large positive ones. */
204 if (ix86_cmodel == CM_KERNEL
206 && trunc_int_for_mode (offset, SImode) == offset)
211 /* These conditions are similar to SYMBOL_REF ones, just the
212 constraints for code models differ. */
213 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
214 && offset < 16*1024*1024
215 && trunc_int_for_mode (offset, SImode) == offset)
217 if (ix86_cmodel == CM_KERNEL
219 && trunc_int_for_mode (offset, SImode) == offset)
224 switch (XINT (op1, 1))
228 if (trunc_int_for_mode (offset, SImode) == offset)
246 ;; Return true if VALUE can be stored in the zero extended immediate field.
247 (define_predicate "x86_64_zext_immediate_operand"
248 (match_code "const_int,symbol_ref,label_ref,const")
250 switch (GET_CODE (op))
253 return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
256 /* For certain code models, the symbolic references are known to fit. */
257 /* TLS symbols are not constant. */
258 if (SYMBOL_REF_TLS_MODEL (op))
260 return (ix86_cmodel == CM_SMALL
261 || (ix86_cmodel == CM_MEDIUM
262 && !SYMBOL_REF_FAR_ADDR_P (op)));
265 /* For certain code models, the code is near as well. */
266 return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
269 /* We also may accept the offsetted memory references in certain
271 if (GET_CODE (XEXP (op, 0)) == PLUS)
273 rtx op1 = XEXP (XEXP (op, 0), 0);
274 rtx op2 = XEXP (XEXP (op, 0), 1);
276 if (ix86_cmodel == CM_LARGE)
278 switch (GET_CODE (op1))
281 /* TLS symbols are not constant. */
282 if (SYMBOL_REF_TLS_MODEL (op1))
284 /* For small code model we may accept pretty large positive
285 offsets, since one bit is available for free. Negative
286 offsets are limited by the size of NULL pointer area
287 specified by the ABI. */
288 if ((ix86_cmodel == CM_SMALL
289 || (ix86_cmodel == CM_MEDIUM
290 && !SYMBOL_REF_FAR_ADDR_P (op1)))
292 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
293 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
295 /* ??? For the kernel, we may accept adjustment of
296 -0x10000000, since we know that it will just convert
297 negative address space to positive, but perhaps this
298 is not worthwhile. */
302 /* These conditions are similar to SYMBOL_REF ones, just the
303 constraints for code models differ. */
304 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
306 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
307 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
323 ;; Return true if size of VALUE can be stored in a sign
324 ;; extended immediate field.
325 (define_predicate "x86_64_immediate_size_operand"
326 (and (match_code "symbol_ref")
327 (ior (not (match_test "TARGET_64BIT"))
328 (match_test "ix86_cmodel == CM_SMALL")
329 (match_test "ix86_cmodel == CM_KERNEL"))))
331 ;; Return true if OP is general operand representable on x86_64.
332 (define_predicate "x86_64_general_operand"
333 (if_then_else (match_test "TARGET_64BIT")
334 (ior (match_operand 0 "nonimmediate_operand")
335 (match_operand 0 "x86_64_immediate_operand"))
336 (match_operand 0 "general_operand")))
338 ;; Return true if OP is non-VOIDmode general operand representable
339 ;; on x86_64. This predicate is used in sign-extending conversion
340 ;; operations that require non-VOIDmode immediate operands.
341 (define_predicate "x86_64_sext_operand"
342 (and (match_test "GET_MODE (op) != VOIDmode")
343 (match_operand 0 "x86_64_general_operand")))
345 ;; Return true if OP is non-VOIDmode general operand. This predicate
346 ;; is used in sign-extending conversion operations that require
347 ;; non-VOIDmode immediate operands.
348 (define_predicate "sext_operand"
349 (and (match_test "GET_MODE (op) != VOIDmode")
350 (match_operand 0 "general_operand")))
352 ;; Return true if OP is representable on x86_64 as zero-extended operand.
353 ;; This predicate is used in zero-extending conversion operations that
354 ;; require non-VOIDmode immediate operands.
355 (define_predicate "x86_64_zext_operand"
356 (if_then_else (match_test "TARGET_64BIT")
357 (ior (match_operand 0 "nonimmediate_operand")
358 (and (match_operand 0 "x86_64_zext_immediate_operand")
359 (match_test "GET_MODE (op) != VOIDmode")))
360 (match_operand 0 "nonimmediate_operand")))
362 ;; Return true if OP is general operand representable on x86_64
363 ;; as either sign extended or zero extended constant.
364 (define_predicate "x86_64_szext_general_operand"
365 (if_then_else (match_test "TARGET_64BIT")
366 (ior (match_operand 0 "nonimmediate_operand")
367 (match_operand 0 "x86_64_immediate_operand")
368 (match_operand 0 "x86_64_zext_immediate_operand"))
369 (match_operand 0 "general_operand")))
371 ;; Return true if OP is nonmemory operand representable on x86_64.
372 (define_predicate "x86_64_nonmemory_operand"
373 (if_then_else (match_test "TARGET_64BIT")
374 (ior (match_operand 0 "register_operand")
375 (match_operand 0 "x86_64_immediate_operand"))
376 (match_operand 0 "nonmemory_operand")))
378 ;; Return true if OP is nonmemory operand representable on x86_64.
379 (define_predicate "x86_64_szext_nonmemory_operand"
380 (if_then_else (match_test "TARGET_64BIT")
381 (ior (match_operand 0 "register_operand")
382 (match_operand 0 "x86_64_immediate_operand")
383 (match_operand 0 "x86_64_zext_immediate_operand"))
384 (match_operand 0 "nonmemory_operand")))
386 ;; Return true when operand is PIC expression that can be computed by lea
388 (define_predicate "pic_32bit_operand"
389 (match_code "const,symbol_ref,label_ref")
394 /* Rule out relocations that translate into 64bit constants. */
395 if (TARGET_64BIT && GET_CODE (op) == CONST)
398 if (GET_CODE (op) == PLUS && CONST_INT_P (XEXP (op, 1)))
400 if (GET_CODE (op) == UNSPEC
401 && (XINT (op, 1) == UNSPEC_GOTOFF
402 || XINT (op, 1) == UNSPEC_GOT))
406 return symbolic_operand (op, mode);
409 ;; Return true if OP is nonmemory operand acceptable by movabs patterns.
410 (define_predicate "x86_64_movabs_operand"
411 (and (match_operand 0 "nonmemory_operand")
412 (not (match_operand 0 "pic_32bit_operand"))))
414 ;; Return true if OP is either a symbol reference or a sum of a symbol
415 ;; reference and a constant.
416 (define_predicate "symbolic_operand"
417 (match_code "symbol_ref,label_ref,const")
419 switch (GET_CODE (op))
427 if (GET_CODE (op) == SYMBOL_REF
428 || GET_CODE (op) == LABEL_REF
429 || (GET_CODE (op) == UNSPEC
430 && (XINT (op, 1) == UNSPEC_GOT
431 || XINT (op, 1) == UNSPEC_GOTOFF
432 || XINT (op, 1) == UNSPEC_PCREL
433 || XINT (op, 1) == UNSPEC_GOTPCREL)))
435 if (GET_CODE (op) != PLUS
436 || !CONST_INT_P (XEXP (op, 1)))
440 if (GET_CODE (op) == SYMBOL_REF
441 || GET_CODE (op) == LABEL_REF)
443 /* Only @GOTOFF gets offsets. */
444 if (GET_CODE (op) != UNSPEC
445 || XINT (op, 1) != UNSPEC_GOTOFF)
448 op = XVECEXP (op, 0, 0);
449 if (GET_CODE (op) == SYMBOL_REF
450 || GET_CODE (op) == LABEL_REF)
459 ;; Return true if OP is a symbolic operand that resolves locally.
460 (define_predicate "local_symbolic_operand"
461 (match_code "const,label_ref,symbol_ref")
463 if (GET_CODE (op) == CONST
464 && GET_CODE (XEXP (op, 0)) == PLUS
465 && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
466 op = XEXP (XEXP (op, 0), 0);
468 if (GET_CODE (op) == LABEL_REF)
471 if (GET_CODE (op) != SYMBOL_REF)
474 if (SYMBOL_REF_TLS_MODEL (op))
477 /* Dll-imported symbols are always external. */
478 if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
480 if (SYMBOL_REF_LOCAL_P (op))
483 /* There is, however, a not insubstantial body of code in the rest of
484 the compiler that assumes it can just stick the results of
485 ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
486 /* ??? This is a hack. Should update the body of the compiler to
487 always create a DECL an invoke targetm.encode_section_info. */
488 if (strncmp (XSTR (op, 0), internal_label_prefix,
489 internal_label_prefix_len) == 0)
495 ;; Test for a legitimate @GOTOFF operand.
497 ;; VxWorks does not impose a fixed gap between segments; the run-time
498 ;; gap can be different from the object-file gap. We therefore can't
499 ;; use @GOTOFF unless we are absolutely sure that the symbol is in the
500 ;; same segment as the GOT. Unfortunately, the flexibility of linker
501 ;; scripts means that we can't be sure of that in general, so assume
502 ;; that @GOTOFF is never valid on VxWorks.
503 (define_predicate "gotoff_operand"
504 (and (not (match_test "TARGET_VXWORKS_RTP"))
505 (match_operand 0 "local_symbolic_operand")))
507 ;; Test for various thread-local symbols.
508 (define_special_predicate "tls_symbolic_operand"
509 (and (match_code "symbol_ref")
510 (match_test "SYMBOL_REF_TLS_MODEL (op)")))
512 (define_special_predicate "tls_modbase_operand"
513 (and (match_code "symbol_ref")
514 (match_test "op == ix86_tls_module_base ()")))
516 ;; Test for a pc-relative call operand
517 (define_predicate "constant_call_address_operand"
518 (match_code "symbol_ref")
520 if (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
522 if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
527 ;; P6 processors will jump to the address after the decrement when %esp
528 ;; is used as a call operand, so they will execute return address as a code.
529 ;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17.
531 (define_predicate "call_register_no_elim_operand"
532 (match_operand 0 "register_operand")
534 if (GET_CODE (op) == SUBREG)
535 op = SUBREG_REG (op);
537 if (!TARGET_64BIT && op == stack_pointer_rtx)
540 return register_no_elim_operand (op, mode);
543 ;; True for any non-virtual or eliminable register. Used in places where
544 ;; instantiation of such a register may cause the pattern to not be recognized.
545 (define_predicate "register_no_elim_operand"
546 (match_operand 0 "register_operand")
548 if (GET_CODE (op) == SUBREG)
549 op = SUBREG_REG (op);
550 return !(op == arg_pointer_rtx
551 || op == frame_pointer_rtx
552 || IN_RANGE (REGNO (op),
553 FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
556 ;; Similarly, but include the stack pointer. This is used to prevent esp
557 ;; from being used as an index reg.
558 (define_predicate "index_register_operand"
559 (match_operand 0 "register_operand")
561 if (GET_CODE (op) == SUBREG)
562 op = SUBREG_REG (op);
563 if (reload_completed)
564 return REG_OK_FOR_INDEX_STRICT_P (op);
566 return REG_OK_FOR_INDEX_NONSTRICT_P (op);
569 ;; Return false if this is any eliminable register. Otherwise general_operand.
570 (define_predicate "general_no_elim_operand"
571 (if_then_else (match_code "reg,subreg")
572 (match_operand 0 "register_no_elim_operand")
573 (match_operand 0 "general_operand")))
575 ;; Return false if this is any eliminable register. Otherwise
576 ;; register_operand or a constant.
577 (define_predicate "nonmemory_no_elim_operand"
578 (ior (match_operand 0 "register_no_elim_operand")
579 (match_operand 0 "immediate_operand")))
581 ;; Test for a valid operand for indirect branch.
582 (define_predicate "indirect_branch_operand"
583 (ior (match_operand 0 "register_operand")
584 (and (not (match_test "TARGET_X32"))
585 (match_operand 0 "memory_operand"))))
587 ;; Return true if OP is a memory operands that can be used in sibcalls.
588 (define_predicate "sibcall_memory_operand"
589 (and (match_operand 0 "memory_operand")
590 (match_test "CONSTANT_P (XEXP (op, 0))")))
592 ;; Test for a valid operand for a call instruction.
593 ;; Allow constant call address operands in Pmode only.
594 (define_special_predicate "call_insn_operand"
595 (ior (match_test "constant_call_address_operand
596 (op, mode == VOIDmode ? mode : Pmode)")
597 (match_operand 0 "call_register_no_elim_operand")
598 (and (not (match_test "TARGET_X32"))
599 (match_operand 0 "memory_operand"))))
601 ;; Similarly, but for tail calls, in which we cannot allow memory references.
602 (define_special_predicate "sibcall_insn_operand"
603 (ior (match_test "constant_call_address_operand
604 (op, mode == VOIDmode ? mode : Pmode)")
605 (match_operand 0 "register_no_elim_operand")
606 (and (not (match_test "TARGET_X32"))
607 (match_operand 0 "sibcall_memory_operand"))))
609 ;; Match exactly zero.
610 (define_predicate "const0_operand"
611 (match_code "const_int,const_wide_int,const_double,const_vector")
613 if (mode == VOIDmode)
614 mode = GET_MODE (op);
615 return op == CONST0_RTX (mode);
619 (define_predicate "constm1_operand"
620 (match_code "const_int,const_wide_int,const_double,const_vector")
622 if (mode == VOIDmode)
623 mode = GET_MODE (op);
624 return op == CONSTM1_RTX (mode);
627 ;; Match one or vector filled with ones.
628 (define_predicate "const1_operand"
629 (match_code "const_int,const_wide_int,const_double,const_vector")
631 if (mode == VOIDmode)
632 mode = GET_MODE (op);
633 return op == CONST1_RTX (mode);
636 ;; Match exactly eight.
637 (define_predicate "const8_operand"
638 (and (match_code "const_int")
639 (match_test "INTVAL (op) == 8")))
641 ;; Match exactly 128.
642 (define_predicate "const128_operand"
643 (and (match_code "const_int")
644 (match_test "INTVAL (op) == 128")))
646 ;; Match exactly 0x0FFFFFFFF in anddi as a zero-extension operation
647 (define_predicate "const_32bit_mask"
648 (and (match_code "const_int")
649 (match_test "trunc_int_for_mode (INTVAL (op), DImode)
650 == (HOST_WIDE_INT) 0xffffffff")))
652 ;; Match 2, 4, or 8. Used for leal multiplicands.
653 (define_predicate "const248_operand"
654 (match_code "const_int")
656 HOST_WIDE_INT i = INTVAL (op);
657 return i == 2 || i == 4 || i == 8;
660 ;; Match 2, 3, 6, or 7
661 (define_predicate "const2367_operand"
662 (match_code "const_int")
664 HOST_WIDE_INT i = INTVAL (op);
665 return i == 2 || i == 3 || i == 6 || i == 7;
668 ;; Match 1, 2, 4, or 8
669 (define_predicate "const1248_operand"
670 (match_code "const_int")
672 HOST_WIDE_INT i = INTVAL (op);
673 return i == 1 || i == 2 || i == 4 || i == 8;
676 ;; Match 3, 5, or 9. Used for leal multiplicands.
677 (define_predicate "const359_operand"
678 (match_code "const_int")
680 HOST_WIDE_INT i = INTVAL (op);
681 return i == 3 || i == 5 || i == 9;
684 ;; Match 4 or 8 to 11. Used for embeded rounding.
685 (define_predicate "const_4_or_8_to_11_operand"
686 (match_code "const_int")
688 HOST_WIDE_INT i = INTVAL (op);
689 return i == 4 || (i >= 8 && i <= 11);
692 ;; Match 4 or 8. Used for SAE.
693 (define_predicate "const48_operand"
694 (match_code "const_int")
696 HOST_WIDE_INT i = INTVAL (op);
697 return i == 4 || i == 8;
701 (define_predicate "const_0_to_1_operand"
702 (and (match_code "const_int")
703 (ior (match_test "op == const0_rtx")
704 (match_test "op == const1_rtx"))))
707 (define_predicate "const_0_to_3_operand"
708 (and (match_code "const_int")
709 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
712 (define_predicate "const_0_to_4_operand"
713 (and (match_code "const_int")
714 (match_test "IN_RANGE (INTVAL (op), 0, 4)")))
717 (define_predicate "const_0_to_5_operand"
718 (and (match_code "const_int")
719 (match_test "IN_RANGE (INTVAL (op), 0, 5)")))
722 (define_predicate "const_0_to_7_operand"
723 (and (match_code "const_int")
724 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
727 (define_predicate "const_0_to_15_operand"
728 (and (match_code "const_int")
729 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
732 (define_predicate "const_0_to_31_operand"
733 (and (match_code "const_int")
734 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
737 (define_predicate "const_0_to_63_operand"
738 (and (match_code "const_int")
739 (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
742 (define_predicate "const_0_to_255_operand"
743 (and (match_code "const_int")
744 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
746 ;; Match (0 to 255) * 8
747 (define_predicate "const_0_to_255_mul_8_operand"
748 (match_code "const_int")
750 unsigned HOST_WIDE_INT val = INTVAL (op);
751 return val <= 255*8 && val % 8 == 0;
754 ;; Return true if OP is CONST_INT >= 1 and <= 31 (a valid operand
755 ;; for shift & compare patterns, as shifting by 0 does not change flags).
756 (define_predicate "const_1_to_31_operand"
757 (and (match_code "const_int")
758 (match_test "IN_RANGE (INTVAL (op), 1, 31)")))
760 ;; Return true if OP is CONST_INT >= 1 and <= 63 (a valid operand
761 ;; for 64bit shift & compare patterns, as shifting by 0 does not change flags).
762 (define_predicate "const_1_to_63_operand"
763 (and (match_code "const_int")
764 (match_test "IN_RANGE (INTVAL (op), 1, 63)")))
767 (define_predicate "const_2_to_3_operand"
768 (and (match_code "const_int")
769 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
772 (define_predicate "const_4_to_5_operand"
773 (and (match_code "const_int")
774 (match_test "IN_RANGE (INTVAL (op), 4, 5)")))
777 (define_predicate "const_4_to_7_operand"
778 (and (match_code "const_int")
779 (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
782 (define_predicate "const_6_to_7_operand"
783 (and (match_code "const_int")
784 (match_test "IN_RANGE (INTVAL (op), 6, 7)")))
787 (define_predicate "const_8_to_9_operand"
788 (and (match_code "const_int")
789 (match_test "IN_RANGE (INTVAL (op), 8, 9)")))
792 (define_predicate "const_8_to_11_operand"
793 (and (match_code "const_int")
794 (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
797 (define_predicate "const_8_to_15_operand"
798 (and (match_code "const_int")
799 (match_test "IN_RANGE (INTVAL (op), 8, 15)")))
802 (define_predicate "const_10_to_11_operand"
803 (and (match_code "const_int")
804 (match_test "IN_RANGE (INTVAL (op), 10, 11)")))
807 (define_predicate "const_12_to_13_operand"
808 (and (match_code "const_int")
809 (match_test "IN_RANGE (INTVAL (op), 12, 13)")))
812 (define_predicate "const_12_to_15_operand"
813 (and (match_code "const_int")
814 (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
817 (define_predicate "const_14_to_15_operand"
818 (and (match_code "const_int")
819 (match_test "IN_RANGE (INTVAL (op), 14, 15)")))
822 (define_predicate "const_16_to_19_operand"
823 (and (match_code "const_int")
824 (match_test "IN_RANGE (INTVAL (op), 16, 19)")))
827 (define_predicate "const_16_to_31_operand"
828 (and (match_code "const_int")
829 (match_test "IN_RANGE (INTVAL (op), 16, 31)")))
832 (define_predicate "const_20_to_23_operand"
833 (and (match_code "const_int")
834 (match_test "IN_RANGE (INTVAL (op), 20, 23)")))
837 (define_predicate "const_24_to_27_operand"
838 (and (match_code "const_int")
839 (match_test "IN_RANGE (INTVAL (op), 24, 27)")))
842 (define_predicate "const_28_to_31_operand"
843 (and (match_code "const_int")
844 (match_test "IN_RANGE (INTVAL (op), 28, 31)")))
846 ;; True if this is a constant appropriate for an increment or decrement.
847 (define_predicate "incdec_operand"
848 (match_code "const_int")
850 /* On Pentium4, the inc and dec operations causes extra dependency on flag
851 registers, since carry flag is not set. */
852 if (!TARGET_USE_INCDEC && !optimize_insn_for_size_p ())
854 return op == const1_rtx || op == constm1_rtx;
857 ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
858 (define_predicate "reg_or_pm1_operand"
859 (ior (match_operand 0 "register_operand")
860 (and (match_code "const_int")
861 (ior (match_test "op == const1_rtx")
862 (match_test "op == constm1_rtx")))))
864 ;; True if OP is acceptable as operand of DImode shift expander.
865 (define_predicate "shiftdi_operand"
866 (if_then_else (match_test "TARGET_64BIT")
867 (match_operand 0 "nonimmediate_operand")
868 (match_operand 0 "register_operand")))
870 (define_predicate "ashldi_input_operand"
871 (if_then_else (match_test "TARGET_64BIT")
872 (match_operand 0 "nonimmediate_operand")
873 (match_operand 0 "reg_or_pm1_operand")))
875 ;; Return true if OP is a vector load from the constant pool with just
876 ;; the first element nonzero.
877 (define_predicate "zero_extended_scalar_load_operand"
881 op = maybe_get_pool_constant (op);
883 if (!(op && GET_CODE (op) == CONST_VECTOR))
886 n_elts = CONST_VECTOR_NUNITS (op);
888 for (n_elts--; n_elts > 0; n_elts--)
890 rtx elt = CONST_VECTOR_ELT (op, n_elts);
891 if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
897 /* Return true if operand is a vector constant that is all ones. */
898 (define_predicate "vector_all_ones_operand"
899 (match_code "const_vector")
901 int nunits = GET_MODE_NUNITS (mode);
903 if (GET_CODE (op) == CONST_VECTOR
904 && CONST_VECTOR_NUNITS (op) == nunits)
907 for (i = 0; i < nunits; ++i)
909 rtx x = CONST_VECTOR_ELT (op, i);
910 if (x != constm1_rtx)
919 ; Return true when OP is operand acceptable for standard SSE move.
920 (define_predicate "vector_move_operand"
921 (ior (match_operand 0 "nonimmediate_operand")
922 (match_operand 0 "const0_operand")))
924 ;; Return true when OP is either nonimmediate operand, or any
926 (define_predicate "nonimmediate_or_const_vector_operand"
927 (ior (match_operand 0 "nonimmediate_operand")
928 (match_code "const_vector")))
930 ;; Return true when OP is nonimmediate or standard SSE constant.
931 (define_predicate "nonimmediate_or_sse_const_operand"
932 (match_operand 0 "general_operand")
934 if (nonimmediate_operand (op, mode))
936 if (standard_sse_constant_p (op) > 0)
941 ;; Return true if OP is a register or a zero.
942 (define_predicate "reg_or_0_operand"
943 (ior (match_operand 0 "register_operand")
944 (match_operand 0 "const0_operand")))
946 ;; Return true for RTX codes that force SImode address.
947 (define_predicate "SImode_address_operand"
948 (match_code "subreg,zero_extend,and"))
950 ;; Return true if op if a valid address for LEA, and does not contain
951 ;; a segment override. Defined as a special predicate to allow
952 ;; mode-less const_int operands pass to address_operand.
953 (define_special_predicate "address_no_seg_operand"
954 (match_test "address_operand (op, VOIDmode)")
956 struct ix86_address parts;
959 if (!CONST_INT_P (op)
961 && GET_MODE (op) != mode)
964 ok = ix86_decompose_address (op, &parts);
966 return parts.seg == SEG_DEFAULT;
969 ;; Return true if op if a valid base register, displacement or
970 ;; sum of base register and displacement for VSIB addressing.
971 (define_predicate "vsib_address_operand"
972 (match_test "address_operand (op, VOIDmode)")
974 struct ix86_address parts;
978 ok = ix86_decompose_address (op, &parts);
980 if (parts.index || parts.seg != SEG_DEFAULT)
983 /* VSIB addressing doesn't support (%rip). */
987 if (GET_CODE (disp) == CONST)
989 disp = XEXP (disp, 0);
990 if (GET_CODE (disp) == PLUS)
991 disp = XEXP (disp, 0);
992 if (GET_CODE (disp) == UNSPEC)
993 switch (XINT (disp, 1))
995 case UNSPEC_GOTPCREL:
997 case UNSPEC_GOTNTPOFF:
1003 && (GET_CODE (disp) == SYMBOL_REF
1004 || GET_CODE (disp) == LABEL_REF))
1011 ;; Return true if op is valid MPX address operand without base
1012 (define_predicate "address_mpx_no_base_operand"
1013 (match_test "address_operand (op, VOIDmode)")
1015 struct ix86_address parts;
1018 ok = ix86_decompose_address (op, &parts);
1021 if (parts.index && parts.base)
1024 if (parts.seg != SEG_DEFAULT)
1027 /* Do not support (%rip). */
1028 if (parts.disp && flag_pic && TARGET_64BIT
1029 && SYMBOLIC_CONST (parts.disp))
1031 if (GET_CODE (parts.disp) != CONST
1032 || GET_CODE (XEXP (parts.disp, 0)) != PLUS
1033 || GET_CODE (XEXP (XEXP (parts.disp, 0), 0)) != UNSPEC
1034 || !CONST_INT_P (XEXP (XEXP (parts.disp, 0), 1))
1035 || (XINT (XEXP (XEXP (parts.disp, 0), 0), 1) != UNSPEC_DTPOFF
1036 && XINT (XEXP (XEXP (parts.disp, 0), 0), 1) != UNSPEC_NTPOFF))
1043 ;; Return true if op is valid MPX address operand without index
1044 (define_predicate "address_mpx_no_index_operand"
1045 (match_test "address_operand (op, VOIDmode)")
1047 struct ix86_address parts;
1050 ok = ix86_decompose_address (op, &parts);
1056 if (parts.seg != SEG_DEFAULT)
1059 /* Do not support (%rip). */
1060 if (parts.disp && flag_pic && TARGET_64BIT
1061 && SYMBOLIC_CONST (parts.disp)
1062 && (GET_CODE (parts.disp) != CONST
1063 || GET_CODE (XEXP (parts.disp, 0)) != PLUS
1064 || GET_CODE (XEXP (XEXP (parts.disp, 0), 0)) != UNSPEC
1065 || !CONST_INT_P (XEXP (XEXP (parts.disp, 0), 1))
1066 || (XINT (XEXP (XEXP (parts.disp, 0), 0), 1) != UNSPEC_DTPOFF
1067 && XINT (XEXP (XEXP (parts.disp, 0), 0), 1) != UNSPEC_NTPOFF)))
1073 (define_predicate "vsib_mem_operator"
1076 (define_predicate "bnd_mem_operator"
1079 ;; Return true if the rtx is known to be at least 32 bits aligned.
1080 (define_predicate "aligned_operand"
1081 (match_operand 0 "general_operand")
1083 struct ix86_address parts;
1086 /* Registers and immediate operands are always "aligned". */
1090 /* All patterns using aligned_operand on memory operands ends up
1091 in promoting memory operand to 64bit and thus causing memory mismatch. */
1092 if (TARGET_MEMORY_MISMATCH_STALL && !optimize_insn_for_size_p ())
1095 /* Don't even try to do any aligned optimizations with volatiles. */
1096 if (MEM_VOLATILE_P (op))
1099 if (MEM_ALIGN (op) >= 32)
1104 /* Pushes and pops are only valid on the stack pointer. */
1105 if (GET_CODE (op) == PRE_DEC
1106 || GET_CODE (op) == POST_INC)
1109 /* Decode the address. */
1110 ok = ix86_decompose_address (op, &parts);
1113 if (parts.base && GET_CODE (parts.base) == SUBREG)
1114 parts.base = SUBREG_REG (parts.base);
1115 if (parts.index && GET_CODE (parts.index) == SUBREG)
1116 parts.index = SUBREG_REG (parts.index);
1118 /* Look for some component that isn't known to be aligned. */
1121 if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
1126 if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
1131 if (!CONST_INT_P (parts.disp)
1132 || (INTVAL (parts.disp) & 3))
1136 /* Didn't find one -- this must be an aligned address. */
1140 ;; Return true if OP is memory operand with a displacement.
1141 (define_predicate "memory_displacement_operand"
1142 (match_operand 0 "memory_operand")
1144 struct ix86_address parts;
1147 ok = ix86_decompose_address (XEXP (op, 0), &parts);
1149 return parts.disp != NULL_RTX;
1152 ;; Return true if OP is memory operand with a displacement only.
1153 (define_predicate "memory_displacement_only_operand"
1154 (match_operand 0 "memory_operand")
1156 struct ix86_address parts;
1162 ok = ix86_decompose_address (XEXP (op, 0), &parts);
1165 if (parts.base || parts.index)
1168 return parts.disp != NULL_RTX;
1171 ;; Return true if OP is memory operand that cannot be represented
1172 ;; by the modRM array.
1173 (define_predicate "long_memory_operand"
1174 (and (match_operand 0 "memory_operand")
1175 (match_test "memory_address_length (op, false)")))
1177 ;; Return true if OP is a comparison operator that can be issued by fcmov.
1178 (define_predicate "fcmov_comparison_operator"
1179 (match_operand 0 "comparison_operator")
1181 machine_mode inmode = GET_MODE (XEXP (op, 0));
1182 enum rtx_code code = GET_CODE (op);
1184 if (inmode == CCFPmode || inmode == CCFPUmode)
1186 if (!ix86_trivial_fp_comparison_operator (op, mode))
1188 code = ix86_fp_compare_code_to_integer (code);
1190 /* i387 supports just limited amount of conditional codes. */
1193 case LTU: case GTU: case LEU: case GEU:
1194 if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode
1195 || inmode == CCCmode)
1198 case ORDERED: case UNORDERED:
1206 ;; Return true if OP is a comparison that can be used in the CMPSS/CMPPS insns.
1207 ;; The first set are supported directly; the second set can't be done with
1208 ;; full IEEE support, i.e. NaNs.
1210 (define_predicate "sse_comparison_operator"
1211 (ior (match_code "eq,ne,lt,le,unordered,unge,ungt,ordered")
1212 (and (match_test "TARGET_AVX")
1213 (match_code "ge,gt,uneq,unle,unlt,ltgt"))))
1215 (define_predicate "ix86_comparison_int_operator"
1216 (match_code "ne,eq,ge,gt,le,lt"))
1218 (define_predicate "ix86_comparison_uns_operator"
1219 (match_code "ne,eq,geu,gtu,leu,ltu"))
1221 (define_predicate "bt_comparison_operator"
1222 (match_code "ne,eq"))
1224 ;; Return true if OP is a valid comparison operator in valid mode.
1225 (define_predicate "ix86_comparison_operator"
1226 (match_operand 0 "comparison_operator")
1228 machine_mode inmode = GET_MODE (XEXP (op, 0));
1229 enum rtx_code code = GET_CODE (op);
1231 if (inmode == CCFPmode || inmode == CCFPUmode)
1232 return ix86_trivial_fp_comparison_operator (op, mode);
1239 if (inmode == CCmode || inmode == CCGCmode
1240 || inmode == CCGOCmode || inmode == CCNOmode)
1243 case LTU: case GTU: case LEU: case GEU:
1244 if (inmode == CCmode || inmode == CCCmode)
1247 case ORDERED: case UNORDERED:
1248 if (inmode == CCmode)
1252 if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
1260 ;; Return true if OP is a valid comparison operator
1261 ;; testing carry flag to be set.
1262 (define_predicate "ix86_carry_flag_operator"
1263 (match_code "ltu,lt,unlt,gtu,gt,ungt,le,unle,ge,unge,ltgt,uneq")
1265 machine_mode inmode = GET_MODE (XEXP (op, 0));
1266 enum rtx_code code = GET_CODE (op);
1268 if (inmode == CCFPmode || inmode == CCFPUmode)
1270 if (!ix86_trivial_fp_comparison_operator (op, mode))
1272 code = ix86_fp_compare_code_to_integer (code);
1274 else if (inmode == CCCmode)
1275 return code == LTU || code == GTU;
1276 else if (inmode != CCmode)
1282 ;; Return true if this comparison only requires testing one flag bit.
1283 (define_predicate "ix86_trivial_fp_comparison_operator"
1284 (match_code "gt,ge,unlt,unle,uneq,ltgt,ordered,unordered"))
1286 ;; Return true if we know how to do this comparison. Others require
1287 ;; testing more than one flag bit, and we let the generic middle-end
1289 (define_predicate "ix86_fp_comparison_operator"
1290 (if_then_else (match_test "ix86_fp_comparison_strategy (GET_CODE (op))
1291 == IX86_FPCMP_ARITH")
1292 (match_operand 0 "comparison_operator")
1293 (match_operand 0 "ix86_trivial_fp_comparison_operator")))
1295 ;; Same as above, but for swapped comparison used in *jcc<fp>_<int>_i387.
1296 (define_predicate "ix86_swapped_fp_comparison_operator"
1297 (match_operand 0 "comparison_operator")
1299 enum rtx_code code = GET_CODE (op);
1302 PUT_CODE (op, swap_condition (code));
1303 ret = ix86_fp_comparison_operator (op, mode);
1304 PUT_CODE (op, code);
1308 ;; Nearly general operand, but accept any const_double, since we wish
1309 ;; to be able to drop them into memory rather than have them get pulled
1311 (define_predicate "cmp_fp_expander_operand"
1312 (ior (match_code "const_double")
1313 (match_operand 0 "general_operand")))
1315 ;; Return true if this is a valid binary floating-point operation.
1316 (define_predicate "binary_fp_operator"
1317 (match_code "plus,minus,mult,div"))
1319 ;; Return true if this is a multiply operation.
1320 (define_predicate "mult_operator"
1321 (match_code "mult"))
1323 ;; Return true if this is a division operation.
1324 (define_predicate "div_operator"
1327 ;; Return true if this is a plus, minus, and, ior or xor operation.
1328 (define_predicate "plusminuslogic_operator"
1329 (match_code "plus,minus,and,ior,xor"))
1331 ;; Return true if this is a float extend operation.
1332 (define_predicate "float_operator"
1333 (match_code "float"))
1335 ;; Return true for ARITHMETIC_P.
1336 (define_predicate "arith_or_logical_operator"
1337 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
1338 mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
1340 ;; Return true for COMMUTATIVE_P.
1341 (define_predicate "commutative_operator"
1342 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax"))
1344 ;; Return true if OP is a binary operator that can be promoted to wider mode.
1345 (define_predicate "promotable_binary_operator"
1346 (ior (match_code "plus,minus,and,ior,xor,ashift")
1347 (and (match_code "mult")
1348 (match_test "TARGET_TUNE_PROMOTE_HIMODE_IMUL"))))
1350 (define_predicate "compare_operator"
1351 (match_code "compare"))
1353 (define_predicate "absneg_operator"
1354 (match_code "abs,neg"))
1356 ;; Return true if OP is misaligned memory operand
1357 (define_predicate "misaligned_operand"
1358 (and (match_code "mem")
1359 (match_test "MEM_ALIGN (op) < GET_MODE_ALIGNMENT (mode)")))
1361 ;; Return true if OP is a emms operation, known to be a PARALLEL.
1362 (define_predicate "emms_operation"
1363 (match_code "parallel")
1367 if (XVECLEN (op, 0) != 17)
1370 for (i = 0; i < 8; i++)
1372 rtx elt = XVECEXP (op, 0, i+1);
1374 if (GET_CODE (elt) != CLOBBER
1375 || GET_CODE (SET_DEST (elt)) != REG
1376 || GET_MODE (SET_DEST (elt)) != XFmode
1377 || REGNO (SET_DEST (elt)) != FIRST_STACK_REG + i)
1380 elt = XVECEXP (op, 0, i+9);
1382 if (GET_CODE (elt) != CLOBBER
1383 || GET_CODE (SET_DEST (elt)) != REG
1384 || GET_MODE (SET_DEST (elt)) != DImode
1385 || REGNO (SET_DEST (elt)) != FIRST_MMX_REG + i)
1391 ;; Return true if OP is a vzeroall operation, known to be a PARALLEL.
1392 (define_predicate "vzeroall_operation"
1393 (match_code "parallel")
1395 unsigned i, nregs = TARGET_64BIT ? 16 : 8;
1397 if ((unsigned) XVECLEN (op, 0) != 1 + nregs)
1400 for (i = 0; i < nregs; i++)
1402 rtx elt = XVECEXP (op, 0, i+1);
1404 if (GET_CODE (elt) != SET
1405 || GET_CODE (SET_DEST (elt)) != REG
1406 || GET_MODE (SET_DEST (elt)) != V8SImode
1407 || REGNO (SET_DEST (elt)) != SSE_REGNO (i)
1408 || SET_SRC (elt) != CONST0_RTX (V8SImode))
1414 ;; return true if OP is a vzeroupper operation.
1415 (define_predicate "vzeroupper_operation"
1416 (and (match_code "unspec_volatile")
1417 (match_test "XINT (op, 1) == UNSPECV_VZEROUPPER")))
1419 ;; Return true if OP is a parallel for a vbroadcast permute.
1421 (define_predicate "avx_vbroadcast_operand"
1422 (and (match_code "parallel")
1423 (match_code "const_int" "a"))
1425 rtx elt = XVECEXP (op, 0, 0);
1426 int i, nelt = XVECLEN (op, 0);
1428 /* Don't bother checking there are the right number of operands,
1429 merely that they're all identical. */
1430 for (i = 1; i < nelt; ++i)
1431 if (XVECEXP (op, 0, i) != elt)
1436 ;; Return true if OP is a parallel for a palignr permute.
1437 (define_predicate "palignr_operand"
1438 (and (match_code "parallel")
1439 (match_code "const_int" "a"))
1441 int elt = INTVAL (XVECEXP (op, 0, 0));
1442 int i, nelt = XVECLEN (op, 0);
1444 /* Check that an order in the permutation is suitable for palignr.
1445 For example, {5 6 7 0 1 2 3 4} is "palignr 5, xmm, xmm". */
1446 for (i = 1; i < nelt; ++i)
1447 if (INTVAL (XVECEXP (op, 0, i)) != ((elt + i) % nelt))
1452 ;; Return true if OP is a proper third operand to vpblendw256.
1453 (define_predicate "avx2_pblendw_operand"
1454 (match_code "const_int")
1456 HOST_WIDE_INT val = INTVAL (op);
1457 HOST_WIDE_INT low = val & 0xff;
1458 return val == ((low << 8) | low);
1461 ;; Return true if OP is nonimmediate_operand or CONST_VECTOR.
1462 (define_predicate "general_vector_operand"
1463 (ior (match_operand 0 "nonimmediate_operand")
1464 (match_code "const_vector")))
1466 ;; Return true if OP is either -1 constant or stored in register.
1467 (define_predicate "register_or_constm1_operand"
1468 (ior (match_operand 0 "register_operand")
1469 (and (match_code "const_int")
1470 (match_test "op == constm1_rtx"))))