1 ;; DFA based pipeline description for the r3000
2 ;; This is a special pipeline - this is also the default schedule and
3 ;; so we need to schedule instructions that may not exist on the r2k/r3k.
5 (define_automaton "r3k_alu,r3k_imuldiv")
7 (define_cpu_unit "r3k_alu" "r3k_alu")
8 (define_cpu_unit "r3k_imuldiv" "r3k_imuldiv")
10 (define_insn_reservation "r3k_generic" 1
11 (and (eq_attr "cpu" "r3000")
12 (eq_attr "type" "unknown,prefetch,prefetchx,condmove,const,arith,
13 shift,slt,clz,trap,multi,nop"))
16 (define_insn_reservation "r3k_load" 2
17 (and (eq_attr "cpu" "r3000")
18 (eq_attr "type" "load,fpload,fpidxload,xfer"))
21 (define_insn_reservation "r3k_store" 1
22 (and (eq_attr "cpu" "r3000")
23 (eq_attr "type" "store,fpstore,fpidxstore"))
26 (define_insn_reservation "r3k_branch" 1
27 (and (eq_attr "cpu" "r3000")
28 (eq_attr "type" "branch,jump,call"))
31 (define_insn_reservation "r3k_hilo" 1
32 (and (eq_attr "cpu" "r3000")
33 (eq_attr "type" "mfhilo,mthilo"))
36 (define_insn_reservation "r3k_imul" 12
37 (and (eq_attr "cpu" "r3000")
38 (eq_attr "type" "imul,imadd"))
41 (define_insn_reservation "r3k_idiv" 35
42 (and (eq_attr "cpu" "r3000")
43 (eq_attr "type" "idiv"))
46 (define_insn_reservation "r3k_fmove" 1
47 (and (eq_attr "cpu" "r3000")
48 (eq_attr "type" "fabs,fneg,fmove,fcvt"))
51 (define_insn_reservation "r3k_fadd" 2
52 (and (eq_attr "cpu" "r3000")
53 (eq_attr "type" "fcmp,fadd"))
56 (define_insn_reservation "r3k_fmul_single" 4
57 (and (eq_attr "cpu" "r3000")
58 (and (eq_attr "type" "fmul,fmadd")
59 (eq_attr "mode" "SF")))
62 (define_insn_reservation "r3k_fmul_double" 5
63 (and (eq_attr "cpu" "r3000")
64 (and (eq_attr "type" "fmul,fmadd")
65 (eq_attr "mode" "DF")))
68 (define_insn_reservation "r3k_fdiv_single" 12
69 (and (eq_attr "cpu" "r3000")
70 (and (eq_attr "type" "fdiv,fsqrt,frsqrt")
71 (eq_attr "mode" "SF")))
74 (define_insn_reservation "r3k_fdiv_double" 19
75 (and (eq_attr "cpu" "r3000")
76 (and (eq_attr "type" "fdiv,fsqrt,frsqrt")
77 (eq_attr "mode" "DF")))