1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
46 /* Each optab contains info on how this target machine
47 can perform a particular operation
48 for all sizes and kinds of operands.
50 The operation to be performed is often specified
51 by passing one of these optabs as an argument.
53 See expr.h for documentation of these optabs. */
55 optab optab_table
[OTI_MAX
];
57 rtx libfunc_table
[LTI_MAX
];
59 /* Tables of patterns for extending one integer mode to another. */
60 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
62 /* Tables of patterns for converting between fixed and floating point. */
63 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
64 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
65 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
67 /* Contains the optab used for each rtx code. */
68 optab code_to_optab
[NUM_RTX_CODE
+ 1];
70 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
71 gives the gen_function to make a branch to test that condition. */
73 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
75 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
76 gives the insn code to make a store-condition insn
77 to test that condition. */
79 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
81 #ifdef HAVE_conditional_move
82 /* Indexed by the machine mode, gives the insn code to make a conditional
83 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
84 setcc_gen_code to cut down on the number of named patterns. Consider a day
85 when a lot more rtx codes are conditional (eg: for the ARM). */
87 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
90 static int add_equal_note
PARAMS ((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
91 static rtx widen_operand
PARAMS ((rtx
, enum machine_mode
,
92 enum machine_mode
, int, int));
93 static int expand_cmplxdiv_straight
PARAMS ((rtx
, rtx
, rtx
, rtx
,
94 rtx
, rtx
, enum machine_mode
,
95 int, enum optab_methods
,
96 enum mode_class
, optab
));
97 static int expand_cmplxdiv_wide
PARAMS ((rtx
, rtx
, rtx
, rtx
,
98 rtx
, rtx
, enum machine_mode
,
99 int, enum optab_methods
,
100 enum mode_class
, optab
));
101 static void prepare_cmp_insn
PARAMS ((rtx
*, rtx
*, enum rtx_code
*, rtx
,
102 enum machine_mode
*, int *,
103 enum can_compare_purpose
));
104 static enum insn_code can_fix_p
PARAMS ((enum machine_mode
, enum machine_mode
,
106 static enum insn_code can_float_p
PARAMS ((enum machine_mode
,
109 static rtx ftruncify
PARAMS ((rtx
));
110 static optab new_optab
PARAMS ((void));
111 static inline optab init_optab
PARAMS ((enum rtx_code
));
112 static inline optab init_optabv
PARAMS ((enum rtx_code
));
113 static void init_libfuncs
PARAMS ((optab
, int, int, const char *, int));
114 static void init_integral_libfuncs
PARAMS ((optab
, const char *, int));
115 static void init_floating_libfuncs
PARAMS ((optab
, const char *, int));
116 #ifdef HAVE_conditional_trap
117 static void init_traps
PARAMS ((void));
119 static void emit_cmp_and_jump_insn_1
PARAMS ((rtx
, rtx
, enum machine_mode
,
120 enum rtx_code
, int, rtx
));
121 static void prepare_float_lib_cmp
PARAMS ((rtx
*, rtx
*, enum rtx_code
*,
122 enum machine_mode
*, int *));
123 static rtx expand_vector_binop
PARAMS ((enum machine_mode
, optab
,
125 enum optab_methods
));
126 static rtx expand_vector_unop
PARAMS ((enum machine_mode
, optab
, rtx
, rtx
,
129 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
130 the result of operation CODE applied to OP0 (and OP1 if it is a binary
133 If the last insn does not set TARGET, don't do anything, but return 1.
135 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
136 don't add the REG_EQUAL note but return 0. Our caller can then try
137 again, ensuring that TARGET is not one of the operands. */
140 add_equal_note (insns
, target
, code
, op0
, op1
)
146 rtx last_insn
, insn
, set
;
151 || NEXT_INSN (insns
) == NULL_RTX
)
154 if (GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
155 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
158 if (GET_CODE (target
) == ZERO_EXTRACT
)
161 for (last_insn
= insns
;
162 NEXT_INSN (last_insn
) != NULL_RTX
;
163 last_insn
= NEXT_INSN (last_insn
))
166 set
= single_set (last_insn
);
170 if (! rtx_equal_p (SET_DEST (set
), target
)
171 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
173 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
174 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
178 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
179 besides the last insn. */
180 if (reg_overlap_mentioned_p (target
, op0
)
181 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
183 insn
= PREV_INSN (last_insn
);
184 while (insn
!= NULL_RTX
)
186 if (reg_set_p (target
, insn
))
189 insn
= PREV_INSN (insn
);
193 if (GET_RTX_CLASS (code
) == '1')
194 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
196 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
198 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
203 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
204 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
205 not actually do a sign-extend or zero-extend, but can leave the
206 higher-order bits of the result rtx undefined, for example, in the case
207 of logical operations, but not right shifts. */
210 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
212 enum machine_mode mode
, oldmode
;
218 /* If we don't have to extend and this is a constant, return it. */
219 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
222 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
223 extend since it will be more efficient to do so unless the signedness of
224 a promoted object differs from our extension. */
226 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
227 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
228 return convert_modes (mode
, oldmode
, op
, unsignedp
);
230 /* If MODE is no wider than a single word, we return a paradoxical
232 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
233 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
235 /* Otherwise, get an object of MODE, clobber it, and set the low-order
238 result
= gen_reg_rtx (mode
);
239 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
240 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
244 /* Generate code to perform a straightforward complex divide. */
247 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
248 unsignedp
, methods
, class, binoptab
)
249 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
250 enum machine_mode submode
;
252 enum optab_methods methods
;
253 enum mode_class
class;
260 optab this_add_optab
= add_optab
;
261 optab this_sub_optab
= sub_optab
;
262 optab this_neg_optab
= neg_optab
;
263 optab this_mul_optab
= smul_optab
;
265 if (binoptab
== sdivv_optab
)
267 this_add_optab
= addv_optab
;
268 this_sub_optab
= subv_optab
;
269 this_neg_optab
= negv_optab
;
270 this_mul_optab
= smulv_optab
;
273 /* Don't fetch these from memory more than once. */
274 real0
= force_reg (submode
, real0
);
275 real1
= force_reg (submode
, real1
);
278 imag0
= force_reg (submode
, imag0
);
280 imag1
= force_reg (submode
, imag1
);
282 /* Divisor: c*c + d*d. */
283 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
284 NULL_RTX
, unsignedp
, methods
);
286 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
287 NULL_RTX
, unsignedp
, methods
);
289 if (temp1
== 0 || temp2
== 0)
292 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
293 NULL_RTX
, unsignedp
, methods
);
299 /* Mathematically, ((a)(c-id))/divisor. */
300 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
302 /* Calculate the dividend. */
303 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
304 NULL_RTX
, unsignedp
, methods
);
306 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
307 NULL_RTX
, unsignedp
, methods
);
309 if (real_t
== 0 || imag_t
== 0)
312 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
313 NULL_RTX
, unsignedp
);
317 /* Mathematically, ((a+ib)(c-id))/divider. */
318 /* Calculate the dividend. */
319 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
320 NULL_RTX
, unsignedp
, methods
);
322 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
323 NULL_RTX
, unsignedp
, methods
);
325 if (temp1
== 0 || temp2
== 0)
328 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
329 NULL_RTX
, unsignedp
, methods
);
331 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
332 NULL_RTX
, unsignedp
, methods
);
334 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
335 NULL_RTX
, unsignedp
, methods
);
337 if (temp1
== 0 || temp2
== 0)
340 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
341 NULL_RTX
, unsignedp
, methods
);
343 if (real_t
== 0 || imag_t
== 0)
347 if (class == MODE_COMPLEX_FLOAT
)
348 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
349 realr
, unsignedp
, methods
);
351 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
352 real_t
, divisor
, realr
, unsignedp
);
358 emit_move_insn (realr
, res
);
360 if (class == MODE_COMPLEX_FLOAT
)
361 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
362 imagr
, unsignedp
, methods
);
364 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
365 imag_t
, divisor
, imagr
, unsignedp
);
371 emit_move_insn (imagr
, res
);
376 /* Generate code to perform a wide-input-range-acceptable complex divide. */
379 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
380 unsignedp
, methods
, class, binoptab
)
381 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
382 enum machine_mode submode
;
384 enum optab_methods methods
;
385 enum mode_class
class;
390 rtx temp1
, temp2
, lab1
, lab2
;
391 enum machine_mode mode
;
393 optab this_add_optab
= add_optab
;
394 optab this_sub_optab
= sub_optab
;
395 optab this_neg_optab
= neg_optab
;
396 optab this_mul_optab
= smul_optab
;
398 if (binoptab
== sdivv_optab
)
400 this_add_optab
= addv_optab
;
401 this_sub_optab
= subv_optab
;
402 this_neg_optab
= negv_optab
;
403 this_mul_optab
= smulv_optab
;
406 /* Don't fetch these from memory more than once. */
407 real0
= force_reg (submode
, real0
);
408 real1
= force_reg (submode
, real1
);
411 imag0
= force_reg (submode
, imag0
);
413 imag1
= force_reg (submode
, imag1
);
415 /* XXX What's an "unsigned" complex number? */
423 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
424 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
427 if (temp1
== 0 || temp2
== 0)
430 mode
= GET_MODE (temp1
);
431 lab1
= gen_label_rtx ();
432 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
433 mode
, unsignedp
, lab1
);
435 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
437 if (class == MODE_COMPLEX_FLOAT
)
438 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
439 NULL_RTX
, unsignedp
, methods
);
441 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
442 imag1
, real1
, NULL_RTX
, unsignedp
);
447 /* Calculate divisor. */
449 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
450 NULL_RTX
, unsignedp
, methods
);
455 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
456 NULL_RTX
, unsignedp
, methods
);
461 /* Calculate dividend. */
467 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
469 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
470 NULL_RTX
, unsignedp
, methods
);
475 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
476 NULL_RTX
, unsignedp
);
478 if (real_t
== 0 || imag_t
== 0)
483 /* Compute (a+ib)/(c+id) as
484 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
486 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
487 NULL_RTX
, unsignedp
, methods
);
492 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
493 NULL_RTX
, unsignedp
, methods
);
495 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
496 NULL_RTX
, unsignedp
, methods
);
501 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
502 NULL_RTX
, unsignedp
, methods
);
504 if (real_t
== 0 || imag_t
== 0)
508 if (class == MODE_COMPLEX_FLOAT
)
509 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
510 realr
, unsignedp
, methods
);
512 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
513 real_t
, divisor
, realr
, unsignedp
);
519 emit_move_insn (realr
, res
);
521 if (class == MODE_COMPLEX_FLOAT
)
522 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
523 imagr
, unsignedp
, methods
);
525 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
526 imag_t
, divisor
, imagr
, unsignedp
);
532 emit_move_insn (imagr
, res
);
534 lab2
= gen_label_rtx ();
535 emit_jump_insn (gen_jump (lab2
));
540 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
542 if (class == MODE_COMPLEX_FLOAT
)
543 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
544 NULL_RTX
, unsignedp
, methods
);
546 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
547 real1
, imag1
, NULL_RTX
, unsignedp
);
552 /* Calculate divisor. */
554 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
555 NULL_RTX
, unsignedp
, methods
);
560 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
561 NULL_RTX
, unsignedp
, methods
);
566 /* Calculate dividend. */
570 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
572 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
573 NULL_RTX
, unsignedp
, methods
);
575 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
576 NULL_RTX
, unsignedp
);
578 if (real_t
== 0 || imag_t
== 0)
583 /* Compute (a+ib)/(c+id) as
584 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
586 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
587 NULL_RTX
, unsignedp
, methods
);
592 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
593 NULL_RTX
, unsignedp
, methods
);
595 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
596 NULL_RTX
, unsignedp
, methods
);
601 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
602 NULL_RTX
, unsignedp
, methods
);
604 if (real_t
== 0 || imag_t
== 0)
608 if (class == MODE_COMPLEX_FLOAT
)
609 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
610 realr
, unsignedp
, methods
);
612 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
613 real_t
, divisor
, realr
, unsignedp
);
619 emit_move_insn (realr
, res
);
621 if (class == MODE_COMPLEX_FLOAT
)
622 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
623 imagr
, unsignedp
, methods
);
625 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
626 imag_t
, divisor
, imagr
, unsignedp
);
632 emit_move_insn (imagr
, res
);
639 /* Wrapper around expand_binop which takes an rtx code to specify
640 the operation to perform, not an optab pointer. All other
641 arguments are the same. */
643 expand_simple_binop (mode
, code
, op0
, op1
, target
, unsignedp
, methods
)
644 enum machine_mode mode
;
649 enum optab_methods methods
;
651 optab binop
= code_to_optab
[(int) code
];
655 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
658 /* Generate code to perform an operation specified by BINOPTAB
659 on operands OP0 and OP1, with result having machine-mode MODE.
661 UNSIGNEDP is for the case where we have to widen the operands
662 to perform the operation. It says to use zero-extension.
664 If TARGET is nonzero, the value
665 is generated there, if it is convenient to do so.
666 In all cases an rtx is returned for the locus of the value;
667 this may or may not be TARGET. */
670 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
671 enum machine_mode mode
;
676 enum optab_methods methods
;
678 enum optab_methods next_methods
679 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
680 ? OPTAB_WIDEN
: methods
);
681 enum mode_class
class;
682 enum machine_mode wider_mode
;
684 int commutative_op
= 0;
685 int shift_op
= (binoptab
->code
== ASHIFT
686 || binoptab
->code
== ASHIFTRT
687 || binoptab
->code
== LSHIFTRT
688 || binoptab
->code
== ROTATE
689 || binoptab
->code
== ROTATERT
);
690 rtx entry_last
= get_last_insn ();
693 class = GET_MODE_CLASS (mode
);
695 op0
= protect_from_queue (op0
, 0);
696 op1
= protect_from_queue (op1
, 0);
698 target
= protect_from_queue (target
, 1);
702 op0
= force_not_mem (op0
);
703 op1
= force_not_mem (op1
);
706 /* If subtracting an integer constant, convert this into an addition of
707 the negated constant. */
709 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
711 op1
= negate_rtx (mode
, op1
);
712 binoptab
= add_optab
;
715 /* If we are inside an appropriately-short loop and one operand is an
716 expensive constant, force it into a register. */
717 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
718 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
719 op0
= force_reg (mode
, op0
);
721 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
722 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
723 op1
= force_reg (mode
, op1
);
725 /* Record where to delete back to if we backtrack. */
726 last
= get_last_insn ();
728 /* If operation is commutative,
729 try to make the first operand a register.
730 Even better, try to make it the same as the target.
731 Also try to make the last operand a constant. */
732 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
733 || binoptab
== smul_widen_optab
734 || binoptab
== umul_widen_optab
735 || binoptab
== smul_highpart_optab
736 || binoptab
== umul_highpart_optab
)
740 if (((target
== 0 || GET_CODE (target
) == REG
)
741 ? ((GET_CODE (op1
) == REG
742 && GET_CODE (op0
) != REG
)
744 : rtx_equal_p (op1
, target
))
745 || GET_CODE (op0
) == CONST_INT
)
753 /* If we can do it with a three-operand insn, do so. */
755 if (methods
!= OPTAB_MUST_WIDEN
756 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
758 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
759 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
760 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
762 rtx xop0
= op0
, xop1
= op1
;
767 temp
= gen_reg_rtx (mode
);
769 /* If it is a commutative operator and the modes would match
770 if we would swap the operands, we can save the conversions. */
773 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
774 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
778 tmp
= op0
; op0
= op1
; op1
= tmp
;
779 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
783 /* In case the insn wants input operands in modes different from
784 those of the actual operands, convert the operands. It would
785 seem that we don't need to convert CONST_INTs, but we do, so
786 that they're properly zero-extended, sign-extended or truncated
789 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
790 xop0
= convert_modes (mode0
,
791 GET_MODE (op0
) != VOIDmode
796 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
797 xop1
= convert_modes (mode1
,
798 GET_MODE (op1
) != VOIDmode
803 /* Now, if insn's predicates don't allow our operands, put them into
806 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
807 && mode0
!= VOIDmode
)
808 xop0
= copy_to_mode_reg (mode0
, xop0
);
810 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
811 && mode1
!= VOIDmode
)
812 xop1
= copy_to_mode_reg (mode1
, xop1
);
814 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
815 temp
= gen_reg_rtx (mode
);
817 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
820 /* If PAT is composed of more than one insn, try to add an appropriate
821 REG_EQUAL note to it. If we can't because TEMP conflicts with an
822 operand, call ourselves again, this time without a target. */
823 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
824 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
826 delete_insns_since (last
);
827 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
835 delete_insns_since (last
);
838 /* If this is a multiply, see if we can do a widening operation that
839 takes operands of this mode and makes a wider mode. */
841 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
842 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
843 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
844 != CODE_FOR_nothing
))
846 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
847 unsignedp
? umul_widen_optab
: smul_widen_optab
,
848 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
852 if (GET_MODE_CLASS (mode
) == MODE_INT
)
853 return gen_lowpart (mode
, temp
);
855 return convert_to_mode (mode
, temp
, unsignedp
);
859 /* Look for a wider mode of the same class for which we think we
860 can open-code the operation. Check for a widening multiply at the
861 wider mode as well. */
863 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
864 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
865 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
866 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
868 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
869 || (binoptab
== smul_optab
870 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
871 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
872 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
873 != CODE_FOR_nothing
)))
875 rtx xop0
= op0
, xop1
= op1
;
878 /* For certain integer operations, we need not actually extend
879 the narrow operands, as long as we will truncate
880 the results to the same narrowness. */
882 if ((binoptab
== ior_optab
|| binoptab
== and_optab
883 || binoptab
== xor_optab
884 || binoptab
== add_optab
|| binoptab
== sub_optab
885 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
886 && class == MODE_INT
)
889 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
891 /* The second operand of a shift must always be extended. */
892 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
893 no_extend
&& binoptab
!= ashl_optab
);
895 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
896 unsignedp
, OPTAB_DIRECT
);
899 if (class != MODE_INT
)
902 target
= gen_reg_rtx (mode
);
903 convert_move (target
, temp
, 0);
907 return gen_lowpart (mode
, temp
);
910 delete_insns_since (last
);
914 /* These can be done a word at a time. */
915 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
917 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
918 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
924 /* If TARGET is the same as one of the operands, the REG_EQUAL note
925 won't be accurate, so use a new target. */
926 if (target
== 0 || target
== op0
|| target
== op1
)
927 target
= gen_reg_rtx (mode
);
931 /* Do the actual arithmetic. */
932 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
934 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
935 rtx x
= expand_binop (word_mode
, binoptab
,
936 operand_subword_force (op0
, i
, mode
),
937 operand_subword_force (op1
, i
, mode
),
938 target_piece
, unsignedp
, next_methods
);
943 if (target_piece
!= x
)
944 emit_move_insn (target_piece
, x
);
947 insns
= get_insns ();
950 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
952 if (binoptab
->code
!= UNKNOWN
)
954 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
955 copy_rtx (op0
), copy_rtx (op1
));
959 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
964 /* Synthesize double word shifts from single word shifts. */
965 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
966 || binoptab
== ashr_optab
)
968 && GET_CODE (op1
) == CONST_INT
969 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
970 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
971 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
972 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
974 rtx insns
, inter
, equiv_value
;
975 rtx into_target
, outof_target
;
976 rtx into_input
, outof_input
;
977 int shift_count
, left_shift
, outof_word
;
979 /* If TARGET is the same as one of the operands, the REG_EQUAL note
980 won't be accurate, so use a new target. */
981 if (target
== 0 || target
== op0
|| target
== op1
)
982 target
= gen_reg_rtx (mode
);
986 shift_count
= INTVAL (op1
);
988 /* OUTOF_* is the word we are shifting bits away from, and
989 INTO_* is the word that we are shifting bits towards, thus
990 they differ depending on the direction of the shift and
993 left_shift
= binoptab
== ashl_optab
;
994 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
996 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
997 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
999 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1000 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1002 if (shift_count
>= BITS_PER_WORD
)
1004 inter
= expand_binop (word_mode
, binoptab
,
1006 GEN_INT (shift_count
- BITS_PER_WORD
),
1007 into_target
, unsignedp
, next_methods
);
1009 if (inter
!= 0 && inter
!= into_target
)
1010 emit_move_insn (into_target
, inter
);
1012 /* For a signed right shift, we must fill the word we are shifting
1013 out of with copies of the sign bit. Otherwise it is zeroed. */
1014 if (inter
!= 0 && binoptab
!= ashr_optab
)
1015 inter
= CONST0_RTX (word_mode
);
1016 else if (inter
!= 0)
1017 inter
= expand_binop (word_mode
, binoptab
,
1019 GEN_INT (BITS_PER_WORD
- 1),
1020 outof_target
, unsignedp
, next_methods
);
1022 if (inter
!= 0 && inter
!= outof_target
)
1023 emit_move_insn (outof_target
, inter
);
1028 optab reverse_unsigned_shift
, unsigned_shift
;
1030 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1031 we must do a logical shift in the opposite direction of the
1034 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1036 /* For a shift of less than BITS_PER_WORD, to compute the word
1037 shifted towards, we need to unsigned shift the orig value of
1040 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1042 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1044 GEN_INT (BITS_PER_WORD
- shift_count
),
1045 0, unsignedp
, next_methods
);
1050 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1051 op1
, 0, unsignedp
, next_methods
);
1054 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1055 into_target
, unsignedp
, next_methods
);
1057 if (inter
!= 0 && inter
!= into_target
)
1058 emit_move_insn (into_target
, inter
);
1061 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1062 op1
, outof_target
, unsignedp
, next_methods
);
1064 if (inter
!= 0 && inter
!= outof_target
)
1065 emit_move_insn (outof_target
, inter
);
1068 insns
= get_insns ();
1073 if (binoptab
->code
!= UNKNOWN
)
1074 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1078 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1083 /* Synthesize double word rotates from single word shifts. */
1084 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1085 && class == MODE_INT
1086 && GET_CODE (op1
) == CONST_INT
1087 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1088 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1089 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1091 rtx insns
, equiv_value
;
1092 rtx into_target
, outof_target
;
1093 rtx into_input
, outof_input
;
1095 int shift_count
, left_shift
, outof_word
;
1097 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1098 won't be accurate, so use a new target. */
1099 if (target
== 0 || target
== op0
|| target
== op1
)
1100 target
= gen_reg_rtx (mode
);
1104 shift_count
= INTVAL (op1
);
1106 /* OUTOF_* is the word we are shifting bits away from, and
1107 INTO_* is the word that we are shifting bits towards, thus
1108 they differ depending on the direction of the shift and
1109 WORDS_BIG_ENDIAN. */
1111 left_shift
= (binoptab
== rotl_optab
);
1112 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1114 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1115 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1117 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1118 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1120 if (shift_count
== BITS_PER_WORD
)
1122 /* This is just a word swap. */
1123 emit_move_insn (outof_target
, into_input
);
1124 emit_move_insn (into_target
, outof_input
);
1129 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1130 rtx first_shift_count
, second_shift_count
;
1131 optab reverse_unsigned_shift
, unsigned_shift
;
1133 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1134 ? lshr_optab
: ashl_optab
);
1136 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1137 ? ashl_optab
: lshr_optab
);
1139 if (shift_count
> BITS_PER_WORD
)
1141 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1142 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1146 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1147 second_shift_count
= GEN_INT (shift_count
);
1150 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1151 outof_input
, first_shift_count
,
1152 NULL_RTX
, unsignedp
, next_methods
);
1153 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1154 into_input
, second_shift_count
,
1155 NULL_RTX
, unsignedp
, next_methods
);
1157 if (into_temp1
!= 0 && into_temp2
!= 0)
1158 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1159 into_target
, unsignedp
, next_methods
);
1163 if (inter
!= 0 && inter
!= into_target
)
1164 emit_move_insn (into_target
, inter
);
1166 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1167 into_input
, first_shift_count
,
1168 NULL_RTX
, unsignedp
, next_methods
);
1169 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1170 outof_input
, second_shift_count
,
1171 NULL_RTX
, unsignedp
, next_methods
);
1173 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1174 inter
= expand_binop (word_mode
, ior_optab
,
1175 outof_temp1
, outof_temp2
,
1176 outof_target
, unsignedp
, next_methods
);
1178 if (inter
!= 0 && inter
!= outof_target
)
1179 emit_move_insn (outof_target
, inter
);
1182 insns
= get_insns ();
1187 if (binoptab
->code
!= UNKNOWN
)
1188 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1192 /* We can't make this a no conflict block if this is a word swap,
1193 because the word swap case fails if the input and output values
1194 are in the same register. */
1195 if (shift_count
!= BITS_PER_WORD
)
1196 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1205 /* These can be done a word at a time by propagating carries. */
1206 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1207 && class == MODE_INT
1208 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1209 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1212 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1213 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1214 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1215 rtx xop0
, xop1
, xtarget
;
1217 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1218 value is one of those, use it. Otherwise, use 1 since it is the
1219 one easiest to get. */
1220 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1221 int normalizep
= STORE_FLAG_VALUE
;
1226 /* Prepare the operands. */
1227 xop0
= force_reg (mode
, op0
);
1228 xop1
= force_reg (mode
, op1
);
1230 xtarget
= gen_reg_rtx (mode
);
1232 if (target
== 0 || GET_CODE (target
) != REG
)
1235 /* Indicate for flow that the entire target reg is being set. */
1236 if (GET_CODE (target
) == REG
)
1237 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1239 /* Do the actual arithmetic. */
1240 for (i
= 0; i
< nwords
; i
++)
1242 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1243 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1244 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1245 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1248 /* Main add/subtract of the input operands. */
1249 x
= expand_binop (word_mode
, binoptab
,
1250 op0_piece
, op1_piece
,
1251 target_piece
, unsignedp
, next_methods
);
1257 /* Store carry from main add/subtract. */
1258 carry_out
= gen_reg_rtx (word_mode
);
1259 carry_out
= emit_store_flag_force (carry_out
,
1260 (binoptab
== add_optab
1263 word_mode
, 1, normalizep
);
1270 /* Add/subtract previous carry to main result. */
1271 newx
= expand_binop (word_mode
,
1272 normalizep
== 1 ? binoptab
: otheroptab
,
1274 NULL_RTX
, 1, next_methods
);
1278 /* Get out carry from adding/subtracting carry in. */
1279 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1280 carry_tmp
= emit_store_flag_force (carry_tmp
,
1281 (binoptab
== add_optab
1284 word_mode
, 1, normalizep
);
1286 /* Logical-ior the two poss. carry together. */
1287 carry_out
= expand_binop (word_mode
, ior_optab
,
1288 carry_out
, carry_tmp
,
1289 carry_out
, 0, next_methods
);
1293 emit_move_insn (target_piece
, newx
);
1296 carry_in
= carry_out
;
1299 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1301 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1303 rtx temp
= emit_move_insn (target
, xtarget
);
1305 set_unique_reg_note (temp
,
1307 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1316 delete_insns_since (last
);
1319 /* If we want to multiply two two-word values and have normal and widening
1320 multiplies of single-word values, we can do this with three smaller
1321 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1322 because we are not operating on one word at a time.
1324 The multiplication proceeds as follows:
1325 _______________________
1326 [__op0_high_|__op0_low__]
1327 _______________________
1328 * [__op1_high_|__op1_low__]
1329 _______________________________________________
1330 _______________________
1331 (1) [__op0_low__*__op1_low__]
1332 _______________________
1333 (2a) [__op0_low__*__op1_high_]
1334 _______________________
1335 (2b) [__op0_high_*__op1_low__]
1336 _______________________
1337 (3) [__op0_high_*__op1_high_]
1340 This gives a 4-word result. Since we are only interested in the
1341 lower 2 words, partial result (3) and the upper words of (2a) and
1342 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1343 calculated using non-widening multiplication.
1345 (1), however, needs to be calculated with an unsigned widening
1346 multiplication. If this operation is not directly supported we
1347 try using a signed widening multiplication and adjust the result.
1348 This adjustment works as follows:
1350 If both operands are positive then no adjustment is needed.
1352 If the operands have different signs, for example op0_low < 0 and
1353 op1_low >= 0, the instruction treats the most significant bit of
1354 op0_low as a sign bit instead of a bit with significance
1355 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1356 with 2**BITS_PER_WORD - op0_low, and two's complements the
1357 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1360 Similarly, if both operands are negative, we need to add
1361 (op0_low + op1_low) * 2**BITS_PER_WORD.
1363 We use a trick to adjust quickly. We logically shift op0_low right
1364 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1365 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1366 logical shift exists, we do an arithmetic right shift and subtract
1369 if (binoptab
== smul_optab
1370 && class == MODE_INT
1371 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1372 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1373 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1374 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1375 != CODE_FOR_nothing
)
1376 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1377 != CODE_FOR_nothing
)))
1379 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1380 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1381 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1382 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1383 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1384 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1386 rtx op0_xhigh
= NULL_RTX
;
1387 rtx op1_xhigh
= NULL_RTX
;
1389 /* If the target is the same as one of the inputs, don't use it. This
1390 prevents problems with the REG_EQUAL note. */
1391 if (target
== op0
|| target
== op1
1392 || (target
!= 0 && GET_CODE (target
) != REG
))
1395 /* Multiply the two lower words to get a double-word product.
1396 If unsigned widening multiplication is available, use that;
1397 otherwise use the signed form and compensate. */
1399 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1401 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1402 target
, 1, OPTAB_DIRECT
);
1404 /* If we didn't succeed, delete everything we did so far. */
1406 delete_insns_since (last
);
1408 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1412 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1413 != CODE_FOR_nothing
)
1415 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1416 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1417 target
, 1, OPTAB_DIRECT
);
1418 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1419 NULL_RTX
, 1, next_methods
);
1421 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1422 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1425 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1426 NULL_RTX
, 0, next_methods
);
1428 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1429 op0_xhigh
, op0_xhigh
, 0,
1433 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1434 NULL_RTX
, 1, next_methods
);
1436 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1437 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1440 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1441 NULL_RTX
, 0, next_methods
);
1443 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1444 op1_xhigh
, op1_xhigh
, 0,
1449 /* If we have been able to directly compute the product of the
1450 low-order words of the operands and perform any required adjustments
1451 of the operands, we proceed by trying two more multiplications
1452 and then computing the appropriate sum.
1454 We have checked above that the required addition is provided.
1455 Full-word addition will normally always succeed, especially if
1456 it is provided at all, so we don't worry about its failure. The
1457 multiplication may well fail, however, so we do handle that. */
1459 if (product
&& op0_xhigh
&& op1_xhigh
)
1461 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1462 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1463 NULL_RTX
, 0, OPTAB_DIRECT
);
1465 if (!REG_P (product_high
))
1466 product_high
= force_reg (word_mode
, product_high
);
1469 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1470 product_high
, 0, next_methods
);
1472 if (temp
!= 0 && temp
!= product_high
)
1473 emit_move_insn (product_high
, temp
);
1476 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1477 NULL_RTX
, 0, OPTAB_DIRECT
);
1480 temp
= expand_binop (word_mode
, add_optab
, temp
,
1481 product_high
, product_high
,
1484 if (temp
!= 0 && temp
!= product_high
)
1485 emit_move_insn (product_high
, temp
);
1487 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1491 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1493 temp
= emit_move_insn (product
, product
);
1494 set_unique_reg_note (temp
,
1496 gen_rtx_fmt_ee (MULT
, mode
,
1505 /* If we get here, we couldn't do it for some reason even though we
1506 originally thought we could. Delete anything we've emitted in
1509 delete_insns_since (last
);
1512 /* Open-code the vector operations if we have no hardware support
1514 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1515 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1516 unsignedp
, methods
);
1518 /* We need to open-code the complex type operations: '+, -, * and /' */
1520 /* At this point we allow operations between two similar complex
1521 numbers, and also if one of the operands is not a complex number
1522 but rather of MODE_FLOAT or MODE_INT. However, the caller
1523 must make sure that the MODE of the non-complex operand matches
1524 the SUBMODE of the complex operand. */
1526 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1528 rtx real0
= 0, imag0
= 0;
1529 rtx real1
= 0, imag1
= 0;
1530 rtx realr
, imagr
, res
;
1535 /* Find the correct mode for the real and imaginary parts */
1536 enum machine_mode submode
= GET_MODE_INNER(mode
);
1538 if (submode
== BLKmode
)
1542 target
= gen_reg_rtx (mode
);
1546 realr
= gen_realpart (submode
, target
);
1547 imagr
= gen_imagpart (submode
, target
);
1549 if (GET_MODE (op0
) == mode
)
1551 real0
= gen_realpart (submode
, op0
);
1552 imag0
= gen_imagpart (submode
, op0
);
1557 if (GET_MODE (op1
) == mode
)
1559 real1
= gen_realpart (submode
, op1
);
1560 imag1
= gen_imagpart (submode
, op1
);
1565 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1568 switch (binoptab
->code
)
1571 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1573 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1574 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1575 realr
, unsignedp
, methods
);
1579 else if (res
!= realr
)
1580 emit_move_insn (realr
, res
);
1582 if (imag0
!= 0 && imag1
!= 0)
1583 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1584 imagr
, unsignedp
, methods
);
1585 else if (imag0
!= 0)
1587 else if (binoptab
->code
== MINUS
)
1588 res
= expand_unop (submode
,
1589 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1590 imag1
, imagr
, unsignedp
);
1596 else if (res
!= imagr
)
1597 emit_move_insn (imagr
, res
);
1603 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1605 if (imag0
!= 0 && imag1
!= 0)
1609 /* Don't fetch these from memory more than once. */
1610 real0
= force_reg (submode
, real0
);
1611 real1
= force_reg (submode
, real1
);
1612 imag0
= force_reg (submode
, imag0
);
1613 imag1
= force_reg (submode
, imag1
);
1615 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1616 unsignedp
, methods
);
1618 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1619 unsignedp
, methods
);
1621 if (temp1
== 0 || temp2
== 0)
1626 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1627 temp1
, temp2
, realr
, unsignedp
, methods
));
1631 else if (res
!= realr
)
1632 emit_move_insn (realr
, res
);
1634 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1635 NULL_RTX
, unsignedp
, methods
);
1637 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1638 NULL_RTX
, unsignedp
, methods
);
1640 if (temp1
== 0 || temp2
== 0)
1645 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1646 temp1
, temp2
, imagr
, unsignedp
, methods
));
1650 else if (res
!= imagr
)
1651 emit_move_insn (imagr
, res
);
1657 /* Don't fetch these from memory more than once. */
1658 real0
= force_reg (submode
, real0
);
1659 real1
= force_reg (submode
, real1
);
1661 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1662 realr
, unsignedp
, methods
);
1665 else if (res
!= realr
)
1666 emit_move_insn (realr
, res
);
1669 res
= expand_binop (submode
, binoptab
,
1670 real1
, imag0
, imagr
, unsignedp
, methods
);
1672 res
= expand_binop (submode
, binoptab
,
1673 real0
, imag1
, imagr
, unsignedp
, methods
);
1677 else if (res
!= imagr
)
1678 emit_move_insn (imagr
, res
);
1685 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1689 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1691 /* Don't fetch these from memory more than once. */
1692 real1
= force_reg (submode
, real1
);
1694 /* Simply divide the real and imaginary parts by `c' */
1695 if (class == MODE_COMPLEX_FLOAT
)
1696 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1697 realr
, unsignedp
, methods
);
1699 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1700 real0
, real1
, realr
, unsignedp
);
1704 else if (res
!= realr
)
1705 emit_move_insn (realr
, res
);
1707 if (class == MODE_COMPLEX_FLOAT
)
1708 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1709 imagr
, unsignedp
, methods
);
1711 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1712 imag0
, real1
, imagr
, unsignedp
);
1716 else if (res
!= imagr
)
1717 emit_move_insn (imagr
, res
);
1723 switch (flag_complex_divide_method
)
1726 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1727 realr
, imagr
, submode
,
1733 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1734 realr
, imagr
, submode
,
1754 if (binoptab
->code
!= UNKNOWN
)
1756 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1757 copy_rtx (op0
), copy_rtx (op1
));
1761 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1767 /* It can't be open-coded in this mode.
1768 Use a library call if one is available and caller says that's ok. */
1770 if (binoptab
->handlers
[(int) mode
].libfunc
1771 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1775 enum machine_mode op1_mode
= mode
;
1782 op1_mode
= word_mode
;
1783 /* Specify unsigned here,
1784 since negative shift counts are meaningless. */
1785 op1x
= convert_to_mode (word_mode
, op1
, 1);
1788 if (GET_MODE (op0
) != VOIDmode
1789 && GET_MODE (op0
) != mode
)
1790 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1792 /* Pass 1 for NO_QUEUE so we don't lose any increments
1793 if the libcall is cse'd or moved. */
1794 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1795 NULL_RTX
, LCT_CONST
, mode
, 2,
1796 op0
, mode
, op1x
, op1_mode
);
1798 insns
= get_insns ();
1801 target
= gen_reg_rtx (mode
);
1802 emit_libcall_block (insns
, target
, value
,
1803 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1808 delete_insns_since (last
);
1810 /* It can't be done in this mode. Can we do it in a wider mode? */
1812 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1813 || methods
== OPTAB_MUST_WIDEN
))
1815 /* Caller says, don't even try. */
1816 delete_insns_since (entry_last
);
1820 /* Compute the value of METHODS to pass to recursive calls.
1821 Don't allow widening to be tried recursively. */
1823 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1825 /* Look for a wider mode of the same class for which it appears we can do
1828 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1830 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1831 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1833 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1834 != CODE_FOR_nothing
)
1835 || (methods
== OPTAB_LIB
1836 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1838 rtx xop0
= op0
, xop1
= op1
;
1841 /* For certain integer operations, we need not actually extend
1842 the narrow operands, as long as we will truncate
1843 the results to the same narrowness. */
1845 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1846 || binoptab
== xor_optab
1847 || binoptab
== add_optab
|| binoptab
== sub_optab
1848 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1849 && class == MODE_INT
)
1852 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1853 unsignedp
, no_extend
);
1855 /* The second operand of a shift must always be extended. */
1856 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1857 no_extend
&& binoptab
!= ashl_optab
);
1859 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1860 unsignedp
, methods
);
1863 if (class != MODE_INT
)
1866 target
= gen_reg_rtx (mode
);
1867 convert_move (target
, temp
, 0);
1871 return gen_lowpart (mode
, temp
);
1874 delete_insns_since (last
);
1879 delete_insns_since (entry_last
);
1883 /* Like expand_binop, but for open-coding vectors binops. */
1886 expand_vector_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
1887 enum machine_mode mode
;
1892 enum optab_methods methods
;
1894 enum machine_mode submode
, tmode
;
1895 int size
, elts
, subsize
, subbitsize
, i
;
1896 rtx t
, a
, b
, res
, seq
;
1897 enum mode_class
class;
1899 class = GET_MODE_CLASS (mode
);
1901 size
= GET_MODE_SIZE (mode
);
1902 submode
= GET_MODE_INNER (mode
);
1904 /* Search for the widest vector mode with the same inner mode that is
1905 still narrower than MODE and that allows to open-code this operator.
1906 Note, if we find such a mode and the handler later decides it can't
1907 do the expansion, we'll be called recursively with the narrower mode. */
1908 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1909 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1910 tmode
= GET_MODE_WIDER_MODE (tmode
))
1912 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1913 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1917 switch (binoptab
->code
)
1922 tmode
= int_mode_for_mode (mode
);
1923 if (tmode
!= BLKmode
)
1929 subsize
= GET_MODE_SIZE (submode
);
1930 subbitsize
= GET_MODE_BITSIZE (submode
);
1931 elts
= size
/ subsize
;
1933 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1934 but that we operate on more than one element at a time. */
1935 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1940 /* Errors can leave us with a const0_rtx as operand. */
1941 if (GET_MODE (op0
) != mode
)
1942 op0
= copy_to_mode_reg (mode
, op0
);
1943 if (GET_MODE (op1
) != mode
)
1944 op1
= copy_to_mode_reg (mode
, op1
);
1947 target
= gen_reg_rtx (mode
);
1949 for (i
= 0; i
< elts
; ++i
)
1951 /* If this is part of a register, and not the first item in the
1952 word, we can't store using a SUBREG - that would clobber
1954 And storing with a SUBREG is only possible for the least
1955 significant part, hence we can't do it for big endian
1956 (unless we want to permute the evaluation order. */
1957 if (GET_CODE (target
) == REG
1958 && (BYTES_BIG_ENDIAN
1959 ? subsize
< UNITS_PER_WORD
1960 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1963 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1964 if (CONSTANT_P (op0
))
1965 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1967 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1968 NULL_RTX
, submode
, submode
, size
);
1969 if (CONSTANT_P (op1
))
1970 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1972 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1973 NULL_RTX
, submode
, submode
, size
);
1975 if (binoptab
->code
== DIV
)
1977 if (class == MODE_VECTOR_FLOAT
)
1978 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1979 unsignedp
, methods
);
1981 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1982 a
, b
, t
, unsignedp
);
1985 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1986 unsignedp
, methods
);
1992 emit_move_insn (t
, res
);
1994 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2010 /* Like expand_unop but for open-coding vector unops. */
2013 expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2014 enum machine_mode mode
;
2020 enum machine_mode submode
, tmode
;
2021 int size
, elts
, subsize
, subbitsize
, i
;
2024 size
= GET_MODE_SIZE (mode
);
2025 submode
= GET_MODE_INNER (mode
);
2027 /* Search for the widest vector mode with the same inner mode that is
2028 still narrower than MODE and that allows to open-code this operator.
2029 Note, if we find such a mode and the handler later decides it can't
2030 do the expansion, we'll be called recursively with the narrower mode. */
2031 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2032 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2033 tmode
= GET_MODE_WIDER_MODE (tmode
))
2035 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2036 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2039 /* If there is no negate operation, try doing a subtract from zero. */
2040 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2041 /* Avoid infinite recursion when an
2042 error has left us with the wrong mode. */
2043 && GET_MODE (op0
) == mode
)
2046 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2047 target
, unsignedp
, OPTAB_DIRECT
);
2052 if (unoptab
== one_cmpl_optab
)
2054 tmode
= int_mode_for_mode (mode
);
2055 if (tmode
!= BLKmode
)
2059 subsize
= GET_MODE_SIZE (submode
);
2060 subbitsize
= GET_MODE_BITSIZE (submode
);
2061 elts
= size
/ subsize
;
2063 /* Errors can leave us with a const0_rtx as operand. */
2064 if (GET_MODE (op0
) != mode
)
2065 op0
= copy_to_mode_reg (mode
, op0
);
2068 target
= gen_reg_rtx (mode
);
2072 for (i
= 0; i
< elts
; ++i
)
2074 /* If this is part of a register, and not the first item in the
2075 word, we can't store using a SUBREG - that would clobber
2077 And storing with a SUBREG is only possible for the least
2078 significant part, hence we can't do it for big endian
2079 (unless we want to permute the evaluation order. */
2080 if (GET_CODE (target
) == REG
2081 && (BYTES_BIG_ENDIAN
2082 ? subsize
< UNITS_PER_WORD
2083 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2086 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2087 if (CONSTANT_P (op0
))
2088 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2090 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2091 t
, submode
, submode
, size
);
2093 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2096 emit_move_insn (t
, res
);
2098 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2109 /* Expand a binary operator which has both signed and unsigned forms.
2110 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2113 If we widen unsigned operands, we may use a signed wider operation instead
2114 of an unsigned wider operation, since the result would be the same. */
2117 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
2118 enum machine_mode mode
;
2119 optab uoptab
, soptab
;
2120 rtx op0
, op1
, target
;
2122 enum optab_methods methods
;
2125 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2126 struct optab wide_soptab
;
2128 /* Do it without widening, if possible. */
2129 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2130 unsignedp
, OPTAB_DIRECT
);
2131 if (temp
|| methods
== OPTAB_DIRECT
)
2134 /* Try widening to a signed int. Make a fake signed optab that
2135 hides any signed insn for direct use. */
2136 wide_soptab
= *soptab
;
2137 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2138 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2140 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2141 unsignedp
, OPTAB_WIDEN
);
2143 /* For unsigned operands, try widening to an unsigned int. */
2144 if (temp
== 0 && unsignedp
)
2145 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2146 unsignedp
, OPTAB_WIDEN
);
2147 if (temp
|| methods
== OPTAB_WIDEN
)
2150 /* Use the right width lib call if that exists. */
2151 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2152 if (temp
|| methods
== OPTAB_LIB
)
2155 /* Must widen and use a lib call, use either signed or unsigned. */
2156 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2157 unsignedp
, methods
);
2161 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2162 unsignedp
, methods
);
2166 /* Generate code to perform an operation specified by BINOPTAB
2167 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2168 We assume that the order of the operands for the instruction
2169 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2170 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2172 Either TARG0 or TARG1 may be zero, but what that means is that
2173 the result is not actually wanted. We will generate it into
2174 a dummy pseudo-reg and discard it. They may not both be zero.
2176 Returns 1 if this operation can be performed; 0 if not. */
2179 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
2185 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2186 enum mode_class
class;
2187 enum machine_mode wider_mode
;
2188 rtx entry_last
= get_last_insn ();
2191 class = GET_MODE_CLASS (mode
);
2193 op0
= protect_from_queue (op0
, 0);
2194 op1
= protect_from_queue (op1
, 0);
2198 op0
= force_not_mem (op0
);
2199 op1
= force_not_mem (op1
);
2202 /* If we are inside an appropriately-short loop and one operand is an
2203 expensive constant, force it into a register. */
2204 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2205 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2206 op0
= force_reg (mode
, op0
);
2208 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2209 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2210 op1
= force_reg (mode
, op1
);
2213 targ0
= protect_from_queue (targ0
, 1);
2215 targ0
= gen_reg_rtx (mode
);
2217 targ1
= protect_from_queue (targ1
, 1);
2219 targ1
= gen_reg_rtx (mode
);
2221 /* Record where to go back to if we fail. */
2222 last
= get_last_insn ();
2224 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2226 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2227 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2228 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2230 rtx xop0
= op0
, xop1
= op1
;
2232 /* In case the insn wants input operands in modes different from
2233 those of the actual operands, convert the operands. It would
2234 seem that we don't need to convert CONST_INTs, but we do, so
2235 that they're properly zero-extended, sign-extended or truncated
2238 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2239 xop0
= convert_modes (mode0
,
2240 GET_MODE (op0
) != VOIDmode
2245 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2246 xop1
= convert_modes (mode1
,
2247 GET_MODE (op1
) != VOIDmode
2252 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2253 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2254 xop0
= copy_to_mode_reg (mode0
, xop0
);
2256 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2257 xop1
= copy_to_mode_reg (mode1
, xop1
);
2259 /* We could handle this, but we should always be called with a pseudo
2260 for our targets and all insns should take them as outputs. */
2261 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2262 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2265 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2272 delete_insns_since (last
);
2275 /* It can't be done in this mode. Can we do it in a wider mode? */
2277 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2279 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2280 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2282 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2283 != CODE_FOR_nothing
)
2285 rtx t0
= gen_reg_rtx (wider_mode
);
2286 rtx t1
= gen_reg_rtx (wider_mode
);
2287 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2288 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2290 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2293 convert_move (targ0
, t0
, unsignedp
);
2294 convert_move (targ1
, t1
, unsignedp
);
2298 delete_insns_since (last
);
2303 delete_insns_since (entry_last
);
2307 /* Wrapper around expand_unop which takes an rtx code to specify
2308 the operation to perform, not an optab pointer. All other
2309 arguments are the same. */
2311 expand_simple_unop (mode
, code
, op0
, target
, unsignedp
)
2312 enum machine_mode mode
;
2318 optab unop
= code_to_optab
[(int) code
];
2322 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2325 /* Generate code to perform an operation specified by UNOPTAB
2326 on operand OP0, with result having machine-mode MODE.
2328 UNSIGNEDP is for the case where we have to widen the operands
2329 to perform the operation. It says to use zero-extension.
2331 If TARGET is nonzero, the value
2332 is generated there, if it is convenient to do so.
2333 In all cases an rtx is returned for the locus of the value;
2334 this may or may not be TARGET. */
2337 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2338 enum machine_mode mode
;
2344 enum mode_class
class;
2345 enum machine_mode wider_mode
;
2347 rtx last
= get_last_insn ();
2350 class = GET_MODE_CLASS (mode
);
2352 op0
= protect_from_queue (op0
, 0);
2356 op0
= force_not_mem (op0
);
2360 target
= protect_from_queue (target
, 1);
2362 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2364 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2365 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2371 temp
= gen_reg_rtx (mode
);
2373 if (GET_MODE (xop0
) != VOIDmode
2374 && GET_MODE (xop0
) != mode0
)
2375 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2377 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2379 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2380 xop0
= copy_to_mode_reg (mode0
, xop0
);
2382 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2383 temp
= gen_reg_rtx (mode
);
2385 pat
= GEN_FCN (icode
) (temp
, xop0
);
2388 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2389 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2391 delete_insns_since (last
);
2392 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2400 delete_insns_since (last
);
2403 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2405 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2406 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2407 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2409 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2413 /* For certain operations, we need not actually extend
2414 the narrow operand, as long as we will truncate the
2415 results to the same narrowness. */
2417 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2418 (unoptab
== neg_optab
2419 || unoptab
== one_cmpl_optab
)
2420 && class == MODE_INT
);
2422 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2427 if (class != MODE_INT
)
2430 target
= gen_reg_rtx (mode
);
2431 convert_move (target
, temp
, 0);
2435 return gen_lowpart (mode
, temp
);
2438 delete_insns_since (last
);
2442 /* These can be done a word at a time. */
2443 if (unoptab
== one_cmpl_optab
2444 && class == MODE_INT
2445 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2446 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2451 if (target
== 0 || target
== op0
)
2452 target
= gen_reg_rtx (mode
);
2456 /* Do the actual arithmetic. */
2457 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2459 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2460 rtx x
= expand_unop (word_mode
, unoptab
,
2461 operand_subword_force (op0
, i
, mode
),
2462 target_piece
, unsignedp
);
2464 if (target_piece
!= x
)
2465 emit_move_insn (target_piece
, x
);
2468 insns
= get_insns ();
2471 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2472 gen_rtx_fmt_e (unoptab
->code
, mode
,
2477 /* Open-code the complex negation operation. */
2478 else if (unoptab
->code
== NEG
2479 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2485 /* Find the correct mode for the real and imaginary parts */
2486 enum machine_mode submode
= GET_MODE_INNER (mode
);
2488 if (submode
== BLKmode
)
2492 target
= gen_reg_rtx (mode
);
2496 target_piece
= gen_imagpart (submode
, target
);
2497 x
= expand_unop (submode
, unoptab
,
2498 gen_imagpart (submode
, op0
),
2499 target_piece
, unsignedp
);
2500 if (target_piece
!= x
)
2501 emit_move_insn (target_piece
, x
);
2503 target_piece
= gen_realpart (submode
, target
);
2504 x
= expand_unop (submode
, unoptab
,
2505 gen_realpart (submode
, op0
),
2506 target_piece
, unsignedp
);
2507 if (target_piece
!= x
)
2508 emit_move_insn (target_piece
, x
);
2513 emit_no_conflict_block (seq
, target
, op0
, 0,
2514 gen_rtx_fmt_e (unoptab
->code
, mode
,
2519 /* Try negating floating point values by flipping the sign bit. */
2520 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2521 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2523 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2524 enum machine_mode imode
= int_mode_for_mode (mode
);
2525 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2527 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2529 HOST_WIDE_INT hi
, lo
;
2530 rtx last
= get_last_insn ();
2532 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2535 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2539 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2542 temp
= expand_binop (imode
, xor_optab
,
2543 gen_lowpart (imode
, op0
),
2544 immed_double_const (lo
, hi
, imode
),
2545 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2547 return gen_lowpart (mode
, temp
);
2548 delete_insns_since (last
);
2552 /* Now try a library call in this mode. */
2553 if (unoptab
->handlers
[(int) mode
].libfunc
)
2560 /* Pass 1 for NO_QUEUE so we don't lose any increments
2561 if the libcall is cse'd or moved. */
2562 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2563 NULL_RTX
, LCT_CONST
, mode
, 1, op0
, mode
);
2564 insns
= get_insns ();
2567 target
= gen_reg_rtx (mode
);
2568 emit_libcall_block (insns
, target
, value
,
2569 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2574 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2575 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2577 /* It can't be done in this mode. Can we do it in a wider mode? */
2579 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2581 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2582 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2584 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2585 != CODE_FOR_nothing
)
2586 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2590 /* For certain operations, we need not actually extend
2591 the narrow operand, as long as we will truncate the
2592 results to the same narrowness. */
2594 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2595 (unoptab
== neg_optab
2596 || unoptab
== one_cmpl_optab
)
2597 && class == MODE_INT
);
2599 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2604 if (class != MODE_INT
)
2607 target
= gen_reg_rtx (mode
);
2608 convert_move (target
, temp
, 0);
2612 return gen_lowpart (mode
, temp
);
2615 delete_insns_since (last
);
2620 /* If there is no negate operation, try doing a subtract from zero.
2621 The US Software GOFAST library needs this. */
2622 if (unoptab
->code
== NEG
)
2625 temp
= expand_binop (mode
,
2626 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2627 CONST0_RTX (mode
), op0
,
2628 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2636 /* Emit code to compute the absolute value of OP0, with result to
2637 TARGET if convenient. (TARGET may be 0.) The return value says
2638 where the result actually is to be found.
2640 MODE is the mode of the operand; the mode of the result is
2641 different but can be deduced from MODE.
2646 expand_abs (mode
, op0
, target
, result_unsignedp
, safe
)
2647 enum machine_mode mode
;
2650 int result_unsignedp
;
2656 result_unsignedp
= 1;
2658 /* First try to do it with a special abs instruction. */
2659 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2664 /* For floating point modes, try clearing the sign bit. */
2665 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2666 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2668 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2669 enum machine_mode imode
= int_mode_for_mode (mode
);
2670 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2672 if (imode
!= BLKmode
&& bitpos
>= 0)
2674 HOST_WIDE_INT hi
, lo
;
2675 rtx last
= get_last_insn ();
2677 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2680 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2684 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2687 temp
= expand_binop (imode
, and_optab
,
2688 gen_lowpart (imode
, op0
),
2689 immed_double_const (~lo
, ~hi
, imode
),
2690 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2692 return gen_lowpart (mode
, temp
);
2693 delete_insns_since (last
);
2697 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2698 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2700 rtx last
= get_last_insn ();
2702 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2704 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2710 delete_insns_since (last
);
2713 /* If this machine has expensive jumps, we can do integer absolute
2714 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2715 where W is the width of MODE. */
2717 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2719 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2720 size_int (GET_MODE_BITSIZE (mode
) - 1),
2723 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2726 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2727 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2733 /* If that does not win, use conditional jump and negate. */
2735 /* It is safe to use the target if it is the same
2736 as the source if this is also a pseudo register */
2737 if (op0
== target
&& GET_CODE (op0
) == REG
2738 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2741 op1
= gen_label_rtx ();
2742 if (target
== 0 || ! safe
2743 || GET_MODE (target
) != mode
2744 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2745 || (GET_CODE (target
) == REG
2746 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2747 target
= gen_reg_rtx (mode
);
2749 emit_move_insn (target
, op0
);
2752 /* If this mode is an integer too wide to compare properly,
2753 compare word by word. Rely on CSE to optimize constant cases. */
2754 if (GET_MODE_CLASS (mode
) == MODE_INT
2755 && ! can_compare_p (GE
, mode
, ccp_jump
))
2756 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2759 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2760 NULL_RTX
, NULL_RTX
, op1
);
2762 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2765 emit_move_insn (target
, op0
);
2771 /* Emit code to compute the absolute value of OP0, with result to
2772 TARGET if convenient. (TARGET may be 0.) The return value says
2773 where the result actually is to be found.
2775 MODE is the mode of the operand; the mode of the result is
2776 different but can be deduced from MODE.
2778 UNSIGNEDP is relevant for complex integer modes. */
2781 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2782 enum machine_mode mode
;
2787 enum mode_class
class = GET_MODE_CLASS (mode
);
2788 enum machine_mode wider_mode
;
2790 rtx entry_last
= get_last_insn ();
2793 optab this_abs_optab
;
2795 /* Find the correct mode for the real and imaginary parts. */
2796 enum machine_mode submode
= GET_MODE_INNER (mode
);
2798 if (submode
== BLKmode
)
2801 op0
= protect_from_queue (op0
, 0);
2805 op0
= force_not_mem (op0
);
2808 last
= get_last_insn ();
2811 target
= protect_from_queue (target
, 1);
2813 this_abs_optab
= ! unsignedp
&& flag_trapv
2814 && (GET_MODE_CLASS(mode
) == MODE_INT
)
2815 ? absv_optab
: abs_optab
;
2817 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2819 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
2820 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2826 temp
= gen_reg_rtx (submode
);
2828 if (GET_MODE (xop0
) != VOIDmode
2829 && GET_MODE (xop0
) != mode0
)
2830 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2832 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2834 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2835 xop0
= copy_to_mode_reg (mode0
, xop0
);
2837 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2838 temp
= gen_reg_rtx (submode
);
2840 pat
= GEN_FCN (icode
) (temp
, xop0
);
2843 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2844 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
2847 delete_insns_since (last
);
2848 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
2857 delete_insns_since (last
);
2860 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2862 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2863 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2865 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
2866 != CODE_FOR_nothing
)
2870 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2871 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2875 if (class != MODE_COMPLEX_INT
)
2878 target
= gen_reg_rtx (submode
);
2879 convert_move (target
, temp
, 0);
2883 return gen_lowpart (submode
, temp
);
2886 delete_insns_since (last
);
2890 /* Open-code the complex absolute-value operation
2891 if we can open-code sqrt. Otherwise it's not worth while. */
2892 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
2895 rtx real
, imag
, total
;
2897 real
= gen_realpart (submode
, op0
);
2898 imag
= gen_imagpart (submode
, op0
);
2900 /* Square both parts. */
2901 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2902 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2904 /* Sum the parts. */
2905 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2906 0, OPTAB_LIB_WIDEN
);
2908 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2909 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2911 delete_insns_since (last
);
2916 /* Now try a library call in this mode. */
2917 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
2924 /* Pass 1 for NO_QUEUE so we don't lose any increments
2925 if the libcall is cse'd or moved. */
2926 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2927 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
2928 insns
= get_insns ();
2931 target
= gen_reg_rtx (submode
);
2932 emit_libcall_block (insns
, target
, value
,
2933 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
2938 /* It can't be done in this mode. Can we do it in a wider mode? */
2940 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2941 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2943 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
2944 != CODE_FOR_nothing
)
2945 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2949 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2951 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2955 if (class != MODE_COMPLEX_INT
)
2958 target
= gen_reg_rtx (submode
);
2959 convert_move (target
, temp
, 0);
2963 return gen_lowpart (submode
, temp
);
2966 delete_insns_since (last
);
2970 delete_insns_since (entry_last
);
2974 /* Generate an instruction whose insn-code is INSN_CODE,
2975 with two operands: an output TARGET and an input OP0.
2976 TARGET *must* be nonzero, and the output is always stored there.
2977 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2978 the value that is stored into TARGET. */
2981 emit_unop_insn (icode
, target
, op0
, code
)
2988 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2991 temp
= target
= protect_from_queue (target
, 1);
2993 op0
= protect_from_queue (op0
, 0);
2995 /* Sign and zero extension from memory is often done specially on
2996 RISC machines, so forcing into a register here can pessimize
2998 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2999 op0
= force_not_mem (op0
);
3001 /* Now, if insn does not accept our operands, put them into pseudos. */
3003 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3004 op0
= copy_to_mode_reg (mode0
, op0
);
3006 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3007 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
3008 temp
= gen_reg_rtx (GET_MODE (temp
));
3010 pat
= GEN_FCN (icode
) (temp
, op0
);
3012 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3013 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3018 emit_move_insn (target
, temp
);
3021 /* Emit code to perform a series of operations on a multi-word quantity, one
3024 Such a block is preceded by a CLOBBER of the output, consists of multiple
3025 insns, each setting one word of the output, and followed by a SET copying
3026 the output to itself.
3028 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3029 note indicating that it doesn't conflict with the (also multi-word)
3030 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3033 INSNS is a block of code generated to perform the operation, not including
3034 the CLOBBER and final copy. All insns that compute intermediate values
3035 are first emitted, followed by the block as described above.
3037 TARGET, OP0, and OP1 are the output and inputs of the operations,
3038 respectively. OP1 may be zero for a unary operation.
3040 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3043 If TARGET is not a register, INSNS is simply emitted with no special
3044 processing. Likewise if anything in INSNS is not an INSN or if
3045 there is a libcall block inside INSNS.
3047 The final insn emitted is returned. */
3050 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
3056 rtx prev
, next
, first
, last
, insn
;
3058 if (GET_CODE (target
) != REG
|| reload_in_progress
)
3059 return emit_insn (insns
);
3061 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3062 if (GET_CODE (insn
) != INSN
3063 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3064 return emit_insn (insns
);
3066 /* First emit all insns that do not store into words of the output and remove
3067 these from the list. */
3068 for (insn
= insns
; insn
; insn
= next
)
3073 next
= NEXT_INSN (insn
);
3075 /* Some ports (cris) create an libcall regions at their own. We must
3076 avoid any potential nesting of LIBCALLs. */
3077 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3078 remove_note (insn
, note
);
3079 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3080 remove_note (insn
, note
);
3082 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3083 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3084 set
= PATTERN (insn
);
3085 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3087 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3088 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3090 set
= XVECEXP (PATTERN (insn
), 0, i
);
3098 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3100 if (PREV_INSN (insn
))
3101 NEXT_INSN (PREV_INSN (insn
)) = next
;
3106 PREV_INSN (next
) = PREV_INSN (insn
);
3112 prev
= get_last_insn ();
3114 /* Now write the CLOBBER of the output, followed by the setting of each
3115 of the words, followed by the final copy. */
3116 if (target
!= op0
&& target
!= op1
)
3117 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3119 for (insn
= insns
; insn
; insn
= next
)
3121 next
= NEXT_INSN (insn
);
3124 if (op1
&& GET_CODE (op1
) == REG
)
3125 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3128 if (op0
&& GET_CODE (op0
) == REG
)
3129 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3133 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3134 != CODE_FOR_nothing
)
3136 last
= emit_move_insn (target
, target
);
3138 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3142 last
= get_last_insn ();
3144 /* Remove any existing REG_EQUAL note from "last", or else it will
3145 be mistaken for a note referring to the full contents of the
3146 alleged libcall value when found together with the REG_RETVAL
3147 note added below. An existing note can come from an insn
3148 expansion at "last". */
3149 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3153 first
= get_insns ();
3155 first
= NEXT_INSN (prev
);
3157 /* Encapsulate the block so it gets manipulated as a unit. */
3158 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3160 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3165 /* Emit code to make a call to a constant function or a library call.
3167 INSNS is a list containing all insns emitted in the call.
3168 These insns leave the result in RESULT. Our block is to copy RESULT
3169 to TARGET, which is logically equivalent to EQUIV.
3171 We first emit any insns that set a pseudo on the assumption that these are
3172 loading constants into registers; doing so allows them to be safely cse'ed
3173 between blocks. Then we emit all the other insns in the block, followed by
3174 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3175 note with an operand of EQUIV.
3177 Moving assignments to pseudos outside of the block is done to improve
3178 the generated code, but is not required to generate correct code,
3179 hence being unable to move an assignment is not grounds for not making
3180 a libcall block. There are two reasons why it is safe to leave these
3181 insns inside the block: First, we know that these pseudos cannot be
3182 used in generated RTL outside the block since they are created for
3183 temporary purposes within the block. Second, CSE will not record the
3184 values of anything set inside a libcall block, so we know they must
3185 be dead at the end of the block.
3187 Except for the first group of insns (the ones setting pseudos), the
3188 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3191 emit_libcall_block (insns
, target
, result
, equiv
)
3197 rtx final_dest
= target
;
3198 rtx prev
, next
, first
, last
, insn
;
3200 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3201 into a MEM later. Protect the libcall block from this change. */
3202 if (! REG_P (target
) || REG_USERVAR_P (target
))
3203 target
= gen_reg_rtx (GET_MODE (target
));
3205 /* If we're using non-call exceptions, a libcall corresponding to an
3206 operation that may trap may also trap. */
3207 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3209 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3210 if (GET_CODE (insn
) == CALL_INSN
)
3212 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3214 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3215 remove_note (insn
, note
);
3219 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3220 reg note to indicate that this call cannot throw or execute a nonlocal
3221 goto (unless there is already a REG_EH_REGION note, in which case
3223 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3224 if (GET_CODE (insn
) == CALL_INSN
)
3226 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3229 XEXP (note
, 0) = GEN_INT (-1);
3231 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
3235 /* First emit all insns that set pseudos. Remove them from the list as
3236 we go. Avoid insns that set pseudos which were referenced in previous
3237 insns. These can be generated by move_by_pieces, for example,
3238 to update an address. Similarly, avoid insns that reference things
3239 set in previous insns. */
3241 for (insn
= insns
; insn
; insn
= next
)
3243 rtx set
= single_set (insn
);
3246 /* Some ports (cris) create an libcall regions at their own. We must
3247 avoid any potential nesting of LIBCALLs. */
3248 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3249 remove_note (insn
, note
);
3250 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3251 remove_note (insn
, note
);
3253 next
= NEXT_INSN (insn
);
3255 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
3256 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3258 || ((! INSN_P(insns
)
3259 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3260 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3261 && ! modified_in_p (SET_SRC (set
), insns
)
3262 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3264 if (PREV_INSN (insn
))
3265 NEXT_INSN (PREV_INSN (insn
)) = next
;
3270 PREV_INSN (next
) = PREV_INSN (insn
);
3276 prev
= get_last_insn ();
3278 /* Write the remaining insns followed by the final copy. */
3280 for (insn
= insns
; insn
; insn
= next
)
3282 next
= NEXT_INSN (insn
);
3287 last
= emit_move_insn (target
, result
);
3288 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3289 != CODE_FOR_nothing
)
3290 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3293 /* Remove any existing REG_EQUAL note from "last", or else it will
3294 be mistaken for a note referring to the full contents of the
3295 libcall value when found together with the REG_RETVAL note added
3296 below. An existing note can come from an insn expansion at
3298 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3301 if (final_dest
!= target
)
3302 emit_move_insn (final_dest
, target
);
3305 first
= get_insns ();
3307 first
= NEXT_INSN (prev
);
3309 /* Encapsulate the block so it gets manipulated as a unit. */
3310 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3312 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3314 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3319 /* Generate code to store zero in X. */
3325 emit_move_insn (x
, const0_rtx
);
3328 /* Generate code to store 1 in X
3329 assuming it contains zero beforehand. */
3332 emit_0_to_1_insn (x
)
3335 emit_move_insn (x
, const1_rtx
);
3338 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3339 PURPOSE describes how this comparison will be used. CODE is the rtx
3340 comparison code we will be using.
3342 ??? Actually, CODE is slightly weaker than that. A target is still
3343 required to implement all of the normal bcc operations, but not
3344 required to implement all (or any) of the unordered bcc operations. */
3347 can_compare_p (code
, mode
, purpose
)
3349 enum machine_mode mode
;
3350 enum can_compare_purpose purpose
;
3354 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3356 if (purpose
== ccp_jump
)
3357 return bcc_gen_fctn
[(int) code
] != NULL
;
3358 else if (purpose
== ccp_store_flag
)
3359 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3361 /* There's only one cmov entry point, and it's allowed to fail. */
3364 if (purpose
== ccp_jump
3365 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3367 if (purpose
== ccp_cmov
3368 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3370 if (purpose
== ccp_store_flag
3371 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3374 mode
= GET_MODE_WIDER_MODE (mode
);
3376 while (mode
!= VOIDmode
);
3381 /* This function is called when we are going to emit a compare instruction that
3382 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3384 *PMODE is the mode of the inputs (in case they are const_int).
3385 *PUNSIGNEDP nonzero says that the operands are unsigned;
3386 this matters if they need to be widened.
3388 If they have mode BLKmode, then SIZE specifies the size of both operands.
3390 This function performs all the setup necessary so that the caller only has
3391 to emit a single comparison insn. This setup can involve doing a BLKmode
3392 comparison or emitting a library call to perform the comparison if no insn
3393 is available to handle it.
3394 The values which are passed in through pointers can be modified; the caller
3395 should perform the comparison on the modified values. */
3398 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, purpose
)
3400 enum rtx_code
*pcomparison
;
3402 enum machine_mode
*pmode
;
3404 enum can_compare_purpose purpose
;
3406 enum machine_mode mode
= *pmode
;
3407 rtx x
= *px
, y
= *py
;
3408 int unsignedp
= *punsignedp
;
3409 enum mode_class
class;
3411 class = GET_MODE_CLASS (mode
);
3413 /* They could both be VOIDmode if both args are immediate constants,
3414 but we should fold that at an earlier stage.
3415 With no special code here, this will call abort,
3416 reminding the programmer to implement such folding. */
3418 if (mode
!= BLKmode
&& flag_force_mem
)
3420 x
= force_not_mem (x
);
3421 y
= force_not_mem (y
);
3424 /* If we are inside an appropriately-short loop and one operand is an
3425 expensive constant, force it into a register. */
3426 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3427 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3428 x
= force_reg (mode
, x
);
3430 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3431 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3432 y
= force_reg (mode
, y
);
3435 /* Abort if we have a non-canonical comparison. The RTL documentation
3436 states that canonical comparisons are required only for targets which
3438 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3442 /* Don't let both operands fail to indicate the mode. */
3443 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3444 x
= force_reg (mode
, x
);
3446 /* Handle all BLKmode compares. */
3448 if (mode
== BLKmode
)
3451 enum machine_mode result_mode
;
3452 rtx opalign ATTRIBUTE_UNUSED
3453 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3456 x
= protect_from_queue (x
, 0);
3457 y
= protect_from_queue (y
, 0);
3461 #ifdef HAVE_cmpstrqi
3463 && GET_CODE (size
) == CONST_INT
3464 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3466 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3467 result
= gen_reg_rtx (result_mode
);
3468 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3472 #ifdef HAVE_cmpstrhi
3474 && GET_CODE (size
) == CONST_INT
3475 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3477 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3478 result
= gen_reg_rtx (result_mode
);
3479 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3483 #ifdef HAVE_cmpstrsi
3486 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3487 result
= gen_reg_rtx (result_mode
);
3488 size
= protect_from_queue (size
, 0);
3489 emit_insn (gen_cmpstrsi (result
, x
, y
,
3490 convert_to_mode (SImode
, size
, 1),
3496 #ifdef TARGET_MEM_FUNCTIONS
3497 result
= emit_library_call_value (memcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3498 TYPE_MODE (integer_type_node
), 3,
3499 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3500 convert_to_mode (TYPE_MODE (sizetype
), size
,
3501 TREE_UNSIGNED (sizetype
)),
3502 TYPE_MODE (sizetype
));
3504 result
= emit_library_call_value (bcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3505 TYPE_MODE (integer_type_node
), 3,
3506 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3507 convert_to_mode (TYPE_MODE (integer_type_node
),
3509 TREE_UNSIGNED (integer_type_node
)),
3510 TYPE_MODE (integer_type_node
));
3513 result_mode
= TYPE_MODE (integer_type_node
);
3517 *pmode
= result_mode
;
3523 if (can_compare_p (*pcomparison
, mode
, purpose
))
3526 /* Handle a lib call just for the mode we are using. */
3528 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3530 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3533 /* If we want unsigned, and this mode has a distinct unsigned
3534 comparison routine, use that. */
3535 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3536 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3538 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3539 word_mode
, 2, x
, mode
, y
, mode
);
3541 /* Integer comparison returns a result that must be compared against 1,
3542 so that even if we do an unsigned compare afterward,
3543 there is still a value that can represent the result "less than". */
3550 if (class == MODE_FLOAT
)
3551 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3557 /* Before emitting an insn with code ICODE, make sure that X, which is going
3558 to be used for operand OPNUM of the insn, is converted from mode MODE to
3559 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3560 that it is accepted by the operand predicate. Return the new value. */
3563 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3567 enum machine_mode mode
, wider_mode
;
3570 x
= protect_from_queue (x
, 0);
3572 if (mode
!= wider_mode
)
3573 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3575 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3576 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3577 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3581 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3582 we can do the comparison.
3583 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3584 be NULL_RTX which indicates that only a comparison is to be generated. */
3587 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3589 enum machine_mode mode
;
3590 enum rtx_code comparison
;
3594 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3595 enum mode_class
class = GET_MODE_CLASS (mode
);
3596 enum machine_mode wider_mode
= mode
;
3598 /* Try combined insns first. */
3601 enum insn_code icode
;
3602 PUT_MODE (test
, wider_mode
);
3606 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3608 if (icode
!= CODE_FOR_nothing
3609 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3611 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3612 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3613 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3618 /* Handle some compares against zero. */
3619 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3620 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3622 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3623 emit_insn (GEN_FCN (icode
) (x
));
3625 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3629 /* Handle compares for which there is a directly suitable insn. */
3631 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3632 if (icode
!= CODE_FOR_nothing
)
3634 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3635 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3636 emit_insn (GEN_FCN (icode
) (x
, y
));
3638 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3642 if (class != MODE_INT
&& class != MODE_FLOAT
3643 && class != MODE_COMPLEX_FLOAT
)
3646 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3648 while (wider_mode
!= VOIDmode
);
3653 /* Generate code to compare X with Y so that the condition codes are
3654 set and to jump to LABEL if the condition is true. If X is a
3655 constant and Y is not a constant, then the comparison is swapped to
3656 ensure that the comparison RTL has the canonical form.
3658 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3659 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3660 the proper branch condition code.
3662 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3664 MODE is the mode of the inputs (in case they are const_int).
3666 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3667 be passed unchanged to emit_cmp_insn, then potentially converted into an
3668 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3671 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, label
)
3673 enum rtx_code comparison
;
3675 enum machine_mode mode
;
3679 rtx op0
= x
, op1
= y
;
3681 /* Swap operands and condition to ensure canonical RTL. */
3682 if (swap_commutative_operands_p (x
, y
))
3684 /* If we're not emitting a branch, this means some caller
3690 comparison
= swap_condition (comparison
);
3694 /* If OP0 is still a constant, then both X and Y must be constants. Force
3695 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3697 if (CONSTANT_P (op0
))
3698 op0
= force_reg (mode
, op0
);
3703 comparison
= unsigned_condition (comparison
);
3705 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3707 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3710 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3713 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
)
3715 enum rtx_code comparison
;
3717 enum machine_mode mode
;
3720 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3723 /* Emit a library call comparison between floating point X and Y.
3724 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3727 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3729 enum rtx_code
*pcomparison
;
3730 enum machine_mode
*pmode
;
3733 enum rtx_code comparison
= *pcomparison
;
3735 rtx x
= *px
= protect_from_queue (*px
, 0);
3736 rtx y
= *py
= protect_from_queue (*py
, 0);
3737 enum machine_mode mode
= GET_MODE (x
);
3745 libfunc
= eqhf2_libfunc
;
3749 libfunc
= nehf2_libfunc
;
3753 libfunc
= gthf2_libfunc
;
3754 if (libfunc
== NULL_RTX
)
3756 tmp
= x
; x
= y
; y
= tmp
;
3758 libfunc
= lthf2_libfunc
;
3763 libfunc
= gehf2_libfunc
;
3764 if (libfunc
== NULL_RTX
)
3766 tmp
= x
; x
= y
; y
= tmp
;
3768 libfunc
= lehf2_libfunc
;
3773 libfunc
= lthf2_libfunc
;
3774 if (libfunc
== NULL_RTX
)
3776 tmp
= x
; x
= y
; y
= tmp
;
3778 libfunc
= gthf2_libfunc
;
3783 libfunc
= lehf2_libfunc
;
3784 if (libfunc
== NULL_RTX
)
3786 tmp
= x
; x
= y
; y
= tmp
;
3788 libfunc
= gehf2_libfunc
;
3793 libfunc
= unordhf2_libfunc
;
3799 else if (mode
== SFmode
)
3803 libfunc
= eqsf2_libfunc
;
3807 libfunc
= nesf2_libfunc
;
3811 libfunc
= gtsf2_libfunc
;
3812 if (libfunc
== NULL_RTX
)
3814 tmp
= x
; x
= y
; y
= tmp
;
3816 libfunc
= ltsf2_libfunc
;
3821 libfunc
= gesf2_libfunc
;
3822 if (libfunc
== NULL_RTX
)
3824 tmp
= x
; x
= y
; y
= tmp
;
3826 libfunc
= lesf2_libfunc
;
3831 libfunc
= ltsf2_libfunc
;
3832 if (libfunc
== NULL_RTX
)
3834 tmp
= x
; x
= y
; y
= tmp
;
3836 libfunc
= gtsf2_libfunc
;
3841 libfunc
= lesf2_libfunc
;
3842 if (libfunc
== NULL_RTX
)
3844 tmp
= x
; x
= y
; y
= tmp
;
3846 libfunc
= gesf2_libfunc
;
3851 libfunc
= unordsf2_libfunc
;
3857 else if (mode
== DFmode
)
3861 libfunc
= eqdf2_libfunc
;
3865 libfunc
= nedf2_libfunc
;
3869 libfunc
= gtdf2_libfunc
;
3870 if (libfunc
== NULL_RTX
)
3872 tmp
= x
; x
= y
; y
= tmp
;
3874 libfunc
= ltdf2_libfunc
;
3879 libfunc
= gedf2_libfunc
;
3880 if (libfunc
== NULL_RTX
)
3882 tmp
= x
; x
= y
; y
= tmp
;
3884 libfunc
= ledf2_libfunc
;
3889 libfunc
= ltdf2_libfunc
;
3890 if (libfunc
== NULL_RTX
)
3892 tmp
= x
; x
= y
; y
= tmp
;
3894 libfunc
= gtdf2_libfunc
;
3899 libfunc
= ledf2_libfunc
;
3900 if (libfunc
== NULL_RTX
)
3902 tmp
= x
; x
= y
; y
= tmp
;
3904 libfunc
= gedf2_libfunc
;
3909 libfunc
= unorddf2_libfunc
;
3915 else if (mode
== XFmode
)
3919 libfunc
= eqxf2_libfunc
;
3923 libfunc
= nexf2_libfunc
;
3927 libfunc
= gtxf2_libfunc
;
3928 if (libfunc
== NULL_RTX
)
3930 tmp
= x
; x
= y
; y
= tmp
;
3932 libfunc
= ltxf2_libfunc
;
3937 libfunc
= gexf2_libfunc
;
3938 if (libfunc
== NULL_RTX
)
3940 tmp
= x
; x
= y
; y
= tmp
;
3942 libfunc
= lexf2_libfunc
;
3947 libfunc
= ltxf2_libfunc
;
3948 if (libfunc
== NULL_RTX
)
3950 tmp
= x
; x
= y
; y
= tmp
;
3952 libfunc
= gtxf2_libfunc
;
3957 libfunc
= lexf2_libfunc
;
3958 if (libfunc
== NULL_RTX
)
3960 tmp
= x
; x
= y
; y
= tmp
;
3962 libfunc
= gexf2_libfunc
;
3967 libfunc
= unordxf2_libfunc
;
3973 else if (mode
== TFmode
)
3977 libfunc
= eqtf2_libfunc
;
3981 libfunc
= netf2_libfunc
;
3985 libfunc
= gttf2_libfunc
;
3986 if (libfunc
== NULL_RTX
)
3988 tmp
= x
; x
= y
; y
= tmp
;
3990 libfunc
= lttf2_libfunc
;
3995 libfunc
= getf2_libfunc
;
3996 if (libfunc
== NULL_RTX
)
3998 tmp
= x
; x
= y
; y
= tmp
;
4000 libfunc
= letf2_libfunc
;
4005 libfunc
= lttf2_libfunc
;
4006 if (libfunc
== NULL_RTX
)
4008 tmp
= x
; x
= y
; y
= tmp
;
4010 libfunc
= gttf2_libfunc
;
4015 libfunc
= letf2_libfunc
;
4016 if (libfunc
== NULL_RTX
)
4018 tmp
= x
; x
= y
; y
= tmp
;
4020 libfunc
= getf2_libfunc
;
4025 libfunc
= unordtf2_libfunc
;
4033 enum machine_mode wider_mode
;
4035 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
4036 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4038 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
4039 != CODE_FOR_nothing
)
4040 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
4042 x
= protect_from_queue (x
, 0);
4043 y
= protect_from_queue (y
, 0);
4044 *px
= convert_to_mode (wider_mode
, x
, 0);
4045 *py
= convert_to_mode (wider_mode
, y
, 0);
4046 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
4056 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
4057 word_mode
, 2, x
, mode
, y
, mode
);
4061 if (comparison
== UNORDERED
)
4063 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
4064 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4070 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4073 emit_indirect_jump (loc
)
4076 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4078 loc
= copy_to_mode_reg (Pmode
, loc
);
4080 emit_jump_insn (gen_indirect_jump (loc
));
4084 #ifdef HAVE_conditional_move
4086 /* Emit a conditional move instruction if the machine supports one for that
4087 condition and machine mode.
4089 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4090 the mode to use should they be constants. If it is VOIDmode, they cannot
4093 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4094 should be stored there. MODE is the mode to use should they be constants.
4095 If it is VOIDmode, they cannot both be constants.
4097 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4098 is not supported. */
4101 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4106 enum machine_mode cmode
;
4108 enum machine_mode mode
;
4111 rtx tem
, subtarget
, comparison
, insn
;
4112 enum insn_code icode
;
4113 enum rtx_code reversed
;
4115 /* If one operand is constant, make it the second one. Only do this
4116 if the other operand is not constant as well. */
4118 if (swap_commutative_operands_p (op0
, op1
))
4123 code
= swap_condition (code
);
4126 /* get_condition will prefer to generate LT and GT even if the old
4127 comparison was against zero, so undo that canonicalization here since
4128 comparisons against zero are cheaper. */
4129 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4130 code
= LE
, op1
= const0_rtx
;
4131 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4132 code
= GE
, op1
= const0_rtx
;
4134 if (cmode
== VOIDmode
)
4135 cmode
= GET_MODE (op0
);
4137 if (swap_commutative_operands_p (op2
, op3
)
4138 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4147 if (mode
== VOIDmode
)
4148 mode
= GET_MODE (op2
);
4150 icode
= movcc_gen_code
[mode
];
4152 if (icode
== CODE_FOR_nothing
)
4157 op2
= force_not_mem (op2
);
4158 op3
= force_not_mem (op3
);
4162 target
= protect_from_queue (target
, 1);
4164 target
= gen_reg_rtx (mode
);
4170 op2
= protect_from_queue (op2
, 0);
4171 op3
= protect_from_queue (op3
, 0);
4173 /* If the insn doesn't accept these operands, put them in pseudos. */
4175 if (! (*insn_data
[icode
].operand
[0].predicate
)
4176 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4177 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4179 if (! (*insn_data
[icode
].operand
[2].predicate
)
4180 (op2
, insn_data
[icode
].operand
[2].mode
))
4181 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4183 if (! (*insn_data
[icode
].operand
[3].predicate
)
4184 (op3
, insn_data
[icode
].operand
[3].mode
))
4185 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4187 /* Everything should now be in the suitable form, so emit the compare insn
4188 and then the conditional move. */
4191 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4193 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4194 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4195 return NULL and let the caller figure out how best to deal with this
4197 if (GET_CODE (comparison
) != code
)
4200 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4202 /* If that failed, then give up. */
4208 if (subtarget
!= target
)
4209 convert_move (target
, subtarget
, 0);
4214 /* Return nonzero if a conditional move of mode MODE is supported.
4216 This function is for combine so it can tell whether an insn that looks
4217 like a conditional move is actually supported by the hardware. If we
4218 guess wrong we lose a bit on optimization, but that's it. */
4219 /* ??? sparc64 supports conditionally moving integers values based on fp
4220 comparisons, and vice versa. How do we handle them? */
4223 can_conditionally_move_p (mode
)
4224 enum machine_mode mode
;
4226 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4232 #endif /* HAVE_conditional_move */
4234 /* Emit a conditional addition instruction if the machine supports one for that
4235 condition and machine mode.
4237 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4238 the mode to use should they be constants. If it is VOIDmode, they cannot
4241 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4242 should be stored there. MODE is the mode to use should they be constants.
4243 If it is VOIDmode, they cannot both be constants.
4245 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4246 is not supported. */
4249 emit_conditional_add (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4254 enum machine_mode cmode
;
4256 enum machine_mode mode
;
4259 rtx tem
, subtarget
, comparison
, insn
;
4260 enum insn_code icode
;
4261 enum rtx_code reversed
;
4263 /* If one operand is constant, make it the second one. Only do this
4264 if the other operand is not constant as well. */
4266 if (swap_commutative_operands_p (op0
, op1
))
4271 code
= swap_condition (code
);
4274 /* get_condition will prefer to generate LT and GT even if the old
4275 comparison was against zero, so undo that canonicalization here since
4276 comparisons against zero are cheaper. */
4277 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4278 code
= LE
, op1
= const0_rtx
;
4279 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4280 code
= GE
, op1
= const0_rtx
;
4282 if (cmode
== VOIDmode
)
4283 cmode
= GET_MODE (op0
);
4285 if (swap_commutative_operands_p (op2
, op3
)
4286 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4295 if (mode
== VOIDmode
)
4296 mode
= GET_MODE (op2
);
4298 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4300 if (icode
== CODE_FOR_nothing
)
4305 op2
= force_not_mem (op2
);
4306 op3
= force_not_mem (op3
);
4310 target
= protect_from_queue (target
, 1);
4312 target
= gen_reg_rtx (mode
);
4318 op2
= protect_from_queue (op2
, 0);
4319 op3
= protect_from_queue (op3
, 0);
4321 /* If the insn doesn't accept these operands, put them in pseudos. */
4323 if (! (*insn_data
[icode
].operand
[0].predicate
)
4324 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4325 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4327 if (! (*insn_data
[icode
].operand
[2].predicate
)
4328 (op2
, insn_data
[icode
].operand
[2].mode
))
4329 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4331 if (! (*insn_data
[icode
].operand
[3].predicate
)
4332 (op3
, insn_data
[icode
].operand
[3].mode
))
4333 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4335 /* Everything should now be in the suitable form, so emit the compare insn
4336 and then the conditional move. */
4339 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4341 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4342 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4343 return NULL and let the caller figure out how best to deal with this
4345 if (GET_CODE (comparison
) != code
)
4348 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4350 /* If that failed, then give up. */
4356 if (subtarget
!= target
)
4357 convert_move (target
, subtarget
, 0);
4362 /* These functions generate an insn body and return it
4363 rather than emitting the insn.
4365 They do not protect from queued increments,
4366 because they may be used 1) in protect_from_queue itself
4367 and 2) in other passes where there is no queue. */
4369 /* Generate and return an insn body to add Y to X. */
4372 gen_add2_insn (x
, y
)
4375 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4377 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4378 (x
, insn_data
[icode
].operand
[0].mode
))
4379 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4380 (x
, insn_data
[icode
].operand
[1].mode
))
4381 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4382 (y
, insn_data
[icode
].operand
[2].mode
)))
4385 return (GEN_FCN (icode
) (x
, x
, y
));
4388 /* Generate and return an insn body to add r1 and c,
4389 storing the result in r0. */
4391 gen_add3_insn (r0
, r1
, c
)
4394 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4396 if (icode
== CODE_FOR_nothing
4397 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4398 (r0
, insn_data
[icode
].operand
[0].mode
))
4399 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4400 (r1
, insn_data
[icode
].operand
[1].mode
))
4401 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4402 (c
, insn_data
[icode
].operand
[2].mode
)))
4405 return (GEN_FCN (icode
) (r0
, r1
, c
));
4409 have_add2_insn (x
, y
)
4414 if (GET_MODE (x
) == VOIDmode
)
4417 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4419 if (icode
== CODE_FOR_nothing
)
4422 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4423 (x
, insn_data
[icode
].operand
[0].mode
))
4424 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4425 (x
, insn_data
[icode
].operand
[1].mode
))
4426 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4427 (y
, insn_data
[icode
].operand
[2].mode
)))
4433 /* Generate and return an insn body to subtract Y from X. */
4436 gen_sub2_insn (x
, y
)
4439 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4441 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4442 (x
, insn_data
[icode
].operand
[0].mode
))
4443 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4444 (x
, insn_data
[icode
].operand
[1].mode
))
4445 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4446 (y
, insn_data
[icode
].operand
[2].mode
)))
4449 return (GEN_FCN (icode
) (x
, x
, y
));
4452 /* Generate and return an insn body to subtract r1 and c,
4453 storing the result in r0. */
4455 gen_sub3_insn (r0
, r1
, c
)
4458 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4460 if (icode
== CODE_FOR_nothing
4461 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4462 (r0
, insn_data
[icode
].operand
[0].mode
))
4463 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4464 (r1
, insn_data
[icode
].operand
[1].mode
))
4465 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4466 (c
, insn_data
[icode
].operand
[2].mode
)))
4469 return (GEN_FCN (icode
) (r0
, r1
, c
));
4473 have_sub2_insn (x
, y
)
4478 if (GET_MODE (x
) == VOIDmode
)
4481 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4483 if (icode
== CODE_FOR_nothing
)
4486 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4487 (x
, insn_data
[icode
].operand
[0].mode
))
4488 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4489 (x
, insn_data
[icode
].operand
[1].mode
))
4490 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4491 (y
, insn_data
[icode
].operand
[2].mode
)))
4497 /* Generate the body of an instruction to copy Y into X.
4498 It may be a list of insns, if one insn isn't enough. */
4501 gen_move_insn (x
, y
)
4504 enum machine_mode mode
= GET_MODE (x
);
4505 enum insn_code insn_code
;
4508 if (mode
== VOIDmode
)
4509 mode
= GET_MODE (y
);
4511 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
4513 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
4514 find a mode to do it in. If we have a movcc, use it. Otherwise,
4515 find the MODE_INT mode of the same width. */
4517 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
4519 enum machine_mode tmode
= VOIDmode
;
4523 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
4526 for (tmode
= QImode
; tmode
!= VOIDmode
;
4527 tmode
= GET_MODE_WIDER_MODE (tmode
))
4528 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
4531 if (tmode
== VOIDmode
)
4534 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
4535 may call change_address which is not appropriate if we were
4536 called when a reload was in progress. We don't have to worry
4537 about changing the address since the size in bytes is supposed to
4538 be the same. Copy the MEM to change the mode and move any
4539 substitutions from the old MEM to the new one. */
4541 if (reload_in_progress
)
4543 x
= gen_lowpart_common (tmode
, x1
);
4544 if (x
== 0 && GET_CODE (x1
) == MEM
)
4546 x
= adjust_address_nv (x1
, tmode
, 0);
4547 copy_replacements (x1
, x
);
4550 y
= gen_lowpart_common (tmode
, y1
);
4551 if (y
== 0 && GET_CODE (y1
) == MEM
)
4553 y
= adjust_address_nv (y1
, tmode
, 0);
4554 copy_replacements (y1
, y
);
4559 x
= gen_lowpart (tmode
, x
);
4560 y
= gen_lowpart (tmode
, y
);
4563 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
4564 return (GEN_FCN (insn_code
) (x
, y
));
4568 emit_move_insn_1 (x
, y
);
4574 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4575 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4576 no such operation exists, CODE_FOR_nothing will be returned. */
4579 can_extend_p (to_mode
, from_mode
, unsignedp
)
4580 enum machine_mode to_mode
, from_mode
;
4583 #ifdef HAVE_ptr_extend
4585 return CODE_FOR_ptr_extend
;
4588 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
!= 0];
4591 /* Generate the body of an insn to extend Y (with mode MFROM)
4592 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4595 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
4597 enum machine_mode mto
, mfrom
;
4600 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
!= 0]) (x
, y
));
4603 /* can_fix_p and can_float_p say whether the target machine
4604 can directly convert a given fixed point type to
4605 a given floating point type, or vice versa.
4606 The returned value is the CODE_FOR_... value to use,
4607 or CODE_FOR_nothing if these modes cannot be directly converted.
4609 *TRUNCP_PTR is set to 1 if it is necessary to output
4610 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4612 static enum insn_code
4613 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
4614 enum machine_mode fltmode
, fixmode
;
4619 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0]
4620 != CODE_FOR_nothing
)
4621 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4623 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
4626 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4628 return CODE_FOR_nothing
;
4631 static enum insn_code
4632 can_float_p (fltmode
, fixmode
, unsignedp
)
4633 enum machine_mode fixmode
, fltmode
;
4636 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4639 /* Generate code to convert FROM to floating point
4640 and store in TO. FROM must be fixed point and not VOIDmode.
4641 UNSIGNEDP nonzero means regard FROM as unsigned.
4642 Normally this is done by correcting the final value
4643 if it is negative. */
4646 expand_float (to
, from
, unsignedp
)
4650 enum insn_code icode
;
4652 enum machine_mode fmode
, imode
;
4654 /* Crash now, because we won't be able to decide which mode to use. */
4655 if (GET_MODE (from
) == VOIDmode
)
4658 /* Look for an insn to do the conversion. Do it in the specified
4659 modes if possible; otherwise convert either input, output or both to
4660 wider mode. If the integer mode is wider than the mode of FROM,
4661 we can do the conversion signed even if the input is unsigned. */
4663 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4664 imode
= GET_MODE_WIDER_MODE (imode
))
4665 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4666 fmode
= GET_MODE_WIDER_MODE (fmode
))
4668 int doing_unsigned
= unsignedp
;
4670 if (fmode
!= GET_MODE (to
)
4671 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4674 icode
= can_float_p (fmode
, imode
, unsignedp
);
4675 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4676 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4678 if (icode
!= CODE_FOR_nothing
)
4680 to
= protect_from_queue (to
, 1);
4681 from
= protect_from_queue (from
, 0);
4683 if (imode
!= GET_MODE (from
))
4684 from
= convert_to_mode (imode
, from
, unsignedp
);
4686 if (fmode
!= GET_MODE (to
))
4687 target
= gen_reg_rtx (fmode
);
4689 emit_unop_insn (icode
, target
, from
,
4690 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4693 convert_move (to
, target
, 0);
4698 /* Unsigned integer, and no way to convert directly.
4699 Convert as signed, then conditionally adjust the result. */
4702 rtx label
= gen_label_rtx ();
4704 REAL_VALUE_TYPE offset
;
4708 to
= protect_from_queue (to
, 1);
4709 from
= protect_from_queue (from
, 0);
4712 from
= force_not_mem (from
);
4714 /* Look for a usable floating mode FMODE wider than the source and at
4715 least as wide as the target. Using FMODE will avoid rounding woes
4716 with unsigned values greater than the signed maximum value. */
4718 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4719 fmode
= GET_MODE_WIDER_MODE (fmode
))
4720 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4721 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4724 if (fmode
== VOIDmode
)
4726 /* There is no such mode. Pretend the target is wide enough. */
4727 fmode
= GET_MODE (to
);
4729 /* Avoid double-rounding when TO is narrower than FROM. */
4730 if ((significand_size (fmode
) + 1)
4731 < GET_MODE_BITSIZE (GET_MODE (from
)))
4734 rtx neglabel
= gen_label_rtx ();
4736 /* Don't use TARGET if it isn't a register, is a hard register,
4737 or is the wrong mode. */
4738 if (GET_CODE (target
) != REG
4739 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4740 || GET_MODE (target
) != fmode
)
4741 target
= gen_reg_rtx (fmode
);
4743 imode
= GET_MODE (from
);
4744 do_pending_stack_adjust ();
4746 /* Test whether the sign bit is set. */
4747 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4750 /* The sign bit is not set. Convert as signed. */
4751 expand_float (target
, from
, 0);
4752 emit_jump_insn (gen_jump (label
));
4755 /* The sign bit is set.
4756 Convert to a usable (positive signed) value by shifting right
4757 one bit, while remembering if a nonzero bit was shifted
4758 out; i.e., compute (from & 1) | (from >> 1). */
4760 emit_label (neglabel
);
4761 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4762 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4763 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4765 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4767 expand_float (target
, temp
, 0);
4769 /* Multiply by 2 to undo the shift above. */
4770 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4771 target
, 0, OPTAB_LIB_WIDEN
);
4773 emit_move_insn (target
, temp
);
4775 do_pending_stack_adjust ();
4781 /* If we are about to do some arithmetic to correct for an
4782 unsigned operand, do it in a pseudo-register. */
4784 if (GET_MODE (to
) != fmode
4785 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4786 target
= gen_reg_rtx (fmode
);
4788 /* Convert as signed integer to floating. */
4789 expand_float (target
, from
, 0);
4791 /* If FROM is negative (and therefore TO is negative),
4792 correct its value by 2**bitwidth. */
4794 do_pending_stack_adjust ();
4795 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4799 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4800 temp
= expand_binop (fmode
, add_optab
, target
,
4801 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4802 target
, 0, OPTAB_LIB_WIDEN
);
4804 emit_move_insn (target
, temp
);
4806 do_pending_stack_adjust ();
4811 /* No hardware instruction available; call a library routine to convert from
4812 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4818 to
= protect_from_queue (to
, 1);
4819 from
= protect_from_queue (from
, 0);
4821 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4822 from
= convert_to_mode (SImode
, from
, unsignedp
);
4825 from
= force_not_mem (from
);
4827 if (GET_MODE (to
) == SFmode
)
4829 if (GET_MODE (from
) == SImode
)
4830 libfcn
= floatsisf_libfunc
;
4831 else if (GET_MODE (from
) == DImode
)
4832 libfcn
= floatdisf_libfunc
;
4833 else if (GET_MODE (from
) == TImode
)
4834 libfcn
= floattisf_libfunc
;
4838 else if (GET_MODE (to
) == DFmode
)
4840 if (GET_MODE (from
) == SImode
)
4841 libfcn
= floatsidf_libfunc
;
4842 else if (GET_MODE (from
) == DImode
)
4843 libfcn
= floatdidf_libfunc
;
4844 else if (GET_MODE (from
) == TImode
)
4845 libfcn
= floattidf_libfunc
;
4849 else if (GET_MODE (to
) == XFmode
)
4851 if (GET_MODE (from
) == SImode
)
4852 libfcn
= floatsixf_libfunc
;
4853 else if (GET_MODE (from
) == DImode
)
4854 libfcn
= floatdixf_libfunc
;
4855 else if (GET_MODE (from
) == TImode
)
4856 libfcn
= floattixf_libfunc
;
4860 else if (GET_MODE (to
) == TFmode
)
4862 if (GET_MODE (from
) == SImode
)
4863 libfcn
= floatsitf_libfunc
;
4864 else if (GET_MODE (from
) == DImode
)
4865 libfcn
= floatditf_libfunc
;
4866 else if (GET_MODE (from
) == TImode
)
4867 libfcn
= floattitf_libfunc
;
4876 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4877 GET_MODE (to
), 1, from
,
4879 insns
= get_insns ();
4882 emit_libcall_block (insns
, target
, value
,
4883 gen_rtx_FLOAT (GET_MODE (to
), from
));
4888 /* Copy result to requested destination
4889 if we have been computing in a temp location. */
4893 if (GET_MODE (target
) == GET_MODE (to
))
4894 emit_move_insn (to
, target
);
4896 convert_move (to
, target
, 0);
4900 /* expand_fix: generate code to convert FROM to fixed point
4901 and store in TO. FROM must be floating point. */
4907 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4908 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4912 expand_fix (to
, from
, unsignedp
)
4916 enum insn_code icode
;
4918 enum machine_mode fmode
, imode
;
4922 /* We first try to find a pair of modes, one real and one integer, at
4923 least as wide as FROM and TO, respectively, in which we can open-code
4924 this conversion. If the integer mode is wider than the mode of TO,
4925 we can do the conversion either signed or unsigned. */
4927 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4928 fmode
= GET_MODE_WIDER_MODE (fmode
))
4929 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4930 imode
= GET_MODE_WIDER_MODE (imode
))
4932 int doing_unsigned
= unsignedp
;
4934 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4935 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4936 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4938 if (icode
!= CODE_FOR_nothing
)
4940 to
= protect_from_queue (to
, 1);
4941 from
= protect_from_queue (from
, 0);
4943 if (fmode
!= GET_MODE (from
))
4944 from
= convert_to_mode (fmode
, from
, 0);
4947 from
= ftruncify (from
);
4949 if (imode
!= GET_MODE (to
))
4950 target
= gen_reg_rtx (imode
);
4952 emit_unop_insn (icode
, target
, from
,
4953 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4955 convert_move (to
, target
, unsignedp
);
4960 /* For an unsigned conversion, there is one more way to do it.
4961 If we have a signed conversion, we generate code that compares
4962 the real value to the largest representable positive number. If if
4963 is smaller, the conversion is done normally. Otherwise, subtract
4964 one plus the highest signed number, convert, and add it back.
4966 We only need to check all real modes, since we know we didn't find
4967 anything with a wider integer mode. */
4969 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4970 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4971 fmode
= GET_MODE_WIDER_MODE (fmode
))
4972 /* Make sure we won't lose significant bits doing this. */
4973 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
4974 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4978 REAL_VALUE_TYPE offset
;
4979 rtx limit
, lab1
, lab2
, insn
;
4981 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4982 real_2expN (&offset
, bitsize
- 1);
4983 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4984 lab1
= gen_label_rtx ();
4985 lab2
= gen_label_rtx ();
4988 to
= protect_from_queue (to
, 1);
4989 from
= protect_from_queue (from
, 0);
4992 from
= force_not_mem (from
);
4994 if (fmode
!= GET_MODE (from
))
4995 from
= convert_to_mode (fmode
, from
, 0);
4997 /* See if we need to do the subtraction. */
4998 do_pending_stack_adjust ();
4999 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5002 /* If not, do the signed "fix" and branch around fixup code. */
5003 expand_fix (to
, from
, 0);
5004 emit_jump_insn (gen_jump (lab2
));
5007 /* Otherwise, subtract 2**(N-1), convert to signed number,
5008 then add 2**(N-1). Do the addition using XOR since this
5009 will often generate better code. */
5011 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5012 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5013 expand_fix (to
, target
, 0);
5014 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5016 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5018 to
, 1, OPTAB_LIB_WIDEN
);
5021 emit_move_insn (to
, target
);
5025 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
5026 != CODE_FOR_nothing
)
5028 /* Make a place for a REG_NOTE and add it. */
5029 insn
= emit_move_insn (to
, to
);
5030 set_unique_reg_note (insn
,
5032 gen_rtx_fmt_e (UNSIGNED_FIX
,
5040 /* We can't do it with an insn, so use a library call. But first ensure
5041 that the mode of TO is at least as wide as SImode, since those are the
5042 only library calls we know about. */
5044 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5046 target
= gen_reg_rtx (SImode
);
5048 expand_fix (target
, from
, unsignedp
);
5050 else if (GET_MODE (from
) == SFmode
)
5052 if (GET_MODE (to
) == SImode
)
5053 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
5054 else if (GET_MODE (to
) == DImode
)
5055 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
5056 else if (GET_MODE (to
) == TImode
)
5057 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
5061 else if (GET_MODE (from
) == DFmode
)
5063 if (GET_MODE (to
) == SImode
)
5064 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
5065 else if (GET_MODE (to
) == DImode
)
5066 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
5067 else if (GET_MODE (to
) == TImode
)
5068 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
5072 else if (GET_MODE (from
) == XFmode
)
5074 if (GET_MODE (to
) == SImode
)
5075 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
5076 else if (GET_MODE (to
) == DImode
)
5077 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
5078 else if (GET_MODE (to
) == TImode
)
5079 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
5083 else if (GET_MODE (from
) == TFmode
)
5085 if (GET_MODE (to
) == SImode
)
5086 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
5087 else if (GET_MODE (to
) == DImode
)
5088 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
5089 else if (GET_MODE (to
) == TImode
)
5090 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
5102 to
= protect_from_queue (to
, 1);
5103 from
= protect_from_queue (from
, 0);
5106 from
= force_not_mem (from
);
5110 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
5111 GET_MODE (to
), 1, from
,
5113 insns
= get_insns ();
5116 emit_libcall_block (insns
, target
, value
,
5117 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5118 GET_MODE (to
), from
));
5123 if (GET_MODE (to
) == GET_MODE (target
))
5124 emit_move_insn (to
, target
);
5126 convert_move (to
, target
, 0);
5130 /* Report whether we have an instruction to perform the operation
5131 specified by CODE on operands of mode MODE. */
5133 have_insn_for (code
, mode
)
5135 enum machine_mode mode
;
5137 return (code_to_optab
[(int) code
] != 0
5138 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
5139 != CODE_FOR_nothing
));
5142 /* Create a blank optab. */
5147 optab op
= (optab
) ggc_alloc (sizeof (struct optab
));
5148 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5150 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
5151 op
->handlers
[i
].libfunc
= 0;
5157 /* Same, but fill in its code as CODE, and write it into the
5158 code_to_optab table. */
5163 optab op
= new_optab ();
5165 code_to_optab
[(int) code
] = op
;
5169 /* Same, but fill in its code as CODE, and do _not_ write it into
5170 the code_to_optab table. */
5175 optab op
= new_optab ();
5180 /* Initialize the libfunc fields of an entire group of entries in some
5181 optab. Each entry is set equal to a string consisting of a leading
5182 pair of underscores followed by a generic operation name followed by
5183 a mode name (downshifted to lower case) followed by a single character
5184 representing the number of operands for the given operation (which is
5185 usually one of the characters '2', '3', or '4').
5187 OPTABLE is the table in which libfunc fields are to be initialized.
5188 FIRST_MODE is the first machine mode index in the given optab to
5190 LAST_MODE is the last machine mode index in the given optab to
5192 OPNAME is the generic (string) name of the operation.
5193 SUFFIX is the character which specifies the number of operands for
5194 the given generic operation.
5198 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
5206 unsigned opname_len
= strlen (opname
);
5208 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
5209 mode
= (enum machine_mode
) ((int) mode
+ 1))
5211 const char *mname
= GET_MODE_NAME (mode
);
5212 unsigned mname_len
= strlen (mname
);
5213 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5220 for (q
= opname
; *q
; )
5222 for (q
= mname
; *q
; q
++)
5223 *p
++ = TOLOWER (*q
);
5227 optable
->handlers
[(int) mode
].libfunc
5228 = gen_rtx_SYMBOL_REF (Pmode
, ggc_alloc_string (libfunc_name
,
5233 /* Initialize the libfunc fields of an entire group of entries in some
5234 optab which correspond to all integer mode operations. The parameters
5235 have the same meaning as similarly named ones for the `init_libfuncs'
5236 routine. (See above). */
5239 init_integral_libfuncs (optable
, opname
, suffix
)
5244 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
5247 /* Initialize the libfunc fields of an entire group of entries in some
5248 optab which correspond to all real mode operations. The parameters
5249 have the same meaning as similarly named ones for the `init_libfuncs'
5250 routine. (See above). */
5253 init_floating_libfuncs (optable
, opname
, suffix
)
5258 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
5262 init_one_libfunc (name
)
5265 /* Create a FUNCTION_DECL that can be passed to
5266 targetm.encode_section_info. */
5267 /* ??? We don't have any type information except for this is
5268 a function. Pretend this is "int foo()". */
5269 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5270 build_function_type (integer_type_node
, NULL_TREE
));
5271 DECL_ARTIFICIAL (decl
) = 1;
5272 DECL_EXTERNAL (decl
) = 1;
5273 TREE_PUBLIC (decl
) = 1;
5275 /* Return the symbol_ref from the mem rtx. */
5276 return XEXP (DECL_RTL (decl
), 0);
5279 /* Call this once to initialize the contents of the optabs
5280 appropriately for the current target machine. */
5285 unsigned int i
, j
, k
;
5287 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5289 for (i
= 0; i
< ARRAY_SIZE (fixtab
); i
++)
5290 for (j
= 0; j
< ARRAY_SIZE (fixtab
[0]); j
++)
5291 for (k
= 0; k
< ARRAY_SIZE (fixtab
[0][0]); k
++)
5292 fixtab
[i
][j
][k
] = CODE_FOR_nothing
;
5294 for (i
= 0; i
< ARRAY_SIZE (fixtrunctab
); i
++)
5295 for (j
= 0; j
< ARRAY_SIZE (fixtrunctab
[0]); j
++)
5296 for (k
= 0; k
< ARRAY_SIZE (fixtrunctab
[0][0]); k
++)
5297 fixtrunctab
[i
][j
][k
] = CODE_FOR_nothing
;
5299 for (i
= 0; i
< ARRAY_SIZE (floattab
); i
++)
5300 for (j
= 0; j
< ARRAY_SIZE (floattab
[0]); j
++)
5301 for (k
= 0; k
< ARRAY_SIZE (floattab
[0][0]); k
++)
5302 floattab
[i
][j
][k
] = CODE_FOR_nothing
;
5304 for (i
= 0; i
< ARRAY_SIZE (extendtab
); i
++)
5305 for (j
= 0; j
< ARRAY_SIZE (extendtab
[0]); j
++)
5306 for (k
= 0; k
< ARRAY_SIZE (extendtab
[0][0]); k
++)
5307 extendtab
[i
][j
][k
] = CODE_FOR_nothing
;
5309 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5310 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5312 #ifdef HAVE_conditional_move
5313 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5314 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5317 add_optab
= init_optab (PLUS
);
5318 addv_optab
= init_optabv (PLUS
);
5319 sub_optab
= init_optab (MINUS
);
5320 subv_optab
= init_optabv (MINUS
);
5321 smul_optab
= init_optab (MULT
);
5322 smulv_optab
= init_optabv (MULT
);
5323 smul_highpart_optab
= init_optab (UNKNOWN
);
5324 umul_highpart_optab
= init_optab (UNKNOWN
);
5325 smul_widen_optab
= init_optab (UNKNOWN
);
5326 umul_widen_optab
= init_optab (UNKNOWN
);
5327 sdiv_optab
= init_optab (DIV
);
5328 sdivv_optab
= init_optabv (DIV
);
5329 sdivmod_optab
= init_optab (UNKNOWN
);
5330 udiv_optab
= init_optab (UDIV
);
5331 udivmod_optab
= init_optab (UNKNOWN
);
5332 smod_optab
= init_optab (MOD
);
5333 umod_optab
= init_optab (UMOD
);
5334 ftrunc_optab
= init_optab (UNKNOWN
);
5335 and_optab
= init_optab (AND
);
5336 ior_optab
= init_optab (IOR
);
5337 xor_optab
= init_optab (XOR
);
5338 ashl_optab
= init_optab (ASHIFT
);
5339 ashr_optab
= init_optab (ASHIFTRT
);
5340 lshr_optab
= init_optab (LSHIFTRT
);
5341 rotl_optab
= init_optab (ROTATE
);
5342 rotr_optab
= init_optab (ROTATERT
);
5343 smin_optab
= init_optab (SMIN
);
5344 smax_optab
= init_optab (SMAX
);
5345 umin_optab
= init_optab (UMIN
);
5346 umax_optab
= init_optab (UMAX
);
5348 /* These three have codes assigned exclusively for the sake of
5350 mov_optab
= init_optab (SET
);
5351 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5352 cmp_optab
= init_optab (COMPARE
);
5354 ucmp_optab
= init_optab (UNKNOWN
);
5355 tst_optab
= init_optab (UNKNOWN
);
5356 neg_optab
= init_optab (NEG
);
5357 negv_optab
= init_optabv (NEG
);
5358 abs_optab
= init_optab (ABS
);
5359 absv_optab
= init_optabv (ABS
);
5360 addcc_optab
= init_optab (UNKNOWN
);
5361 one_cmpl_optab
= init_optab (NOT
);
5362 ffs_optab
= init_optab (FFS
);
5363 sqrt_optab
= init_optab (SQRT
);
5364 floor_optab
= init_optab (UNKNOWN
);
5365 ceil_optab
= init_optab (UNKNOWN
);
5366 round_optab
= init_optab (UNKNOWN
);
5367 trunc_optab
= init_optab (UNKNOWN
);
5368 nearbyint_optab
= init_optab (UNKNOWN
);
5369 sin_optab
= init_optab (UNKNOWN
);
5370 cos_optab
= init_optab (UNKNOWN
);
5371 exp_optab
= init_optab (UNKNOWN
);
5372 log_optab
= init_optab (UNKNOWN
);
5373 strlen_optab
= init_optab (UNKNOWN
);
5374 cbranch_optab
= init_optab (UNKNOWN
);
5375 cmov_optab
= init_optab (UNKNOWN
);
5376 cstore_optab
= init_optab (UNKNOWN
);
5377 push_optab
= init_optab (UNKNOWN
);
5379 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5381 movstr_optab
[i
] = CODE_FOR_nothing
;
5382 clrstr_optab
[i
] = CODE_FOR_nothing
;
5384 #ifdef HAVE_SECONDARY_RELOADS
5385 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5389 /* Fill in the optabs with the insns we support. */
5392 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
5393 /* This flag says the same insns that convert to a signed fixnum
5394 also convert validly to an unsigned one. */
5395 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5396 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5397 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
5400 /* Initialize the optabs with the names of the library functions. */
5401 init_integral_libfuncs (add_optab
, "add", '3');
5402 init_floating_libfuncs (add_optab
, "add", '3');
5403 init_integral_libfuncs (addv_optab
, "addv", '3');
5404 init_floating_libfuncs (addv_optab
, "add", '3');
5405 init_integral_libfuncs (sub_optab
, "sub", '3');
5406 init_floating_libfuncs (sub_optab
, "sub", '3');
5407 init_integral_libfuncs (subv_optab
, "subv", '3');
5408 init_floating_libfuncs (subv_optab
, "sub", '3');
5409 init_integral_libfuncs (smul_optab
, "mul", '3');
5410 init_floating_libfuncs (smul_optab
, "mul", '3');
5411 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5412 init_floating_libfuncs (smulv_optab
, "mul", '3');
5413 init_integral_libfuncs (sdiv_optab
, "div", '3');
5414 init_floating_libfuncs (sdiv_optab
, "div", '3');
5415 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5416 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5417 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5418 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5419 init_integral_libfuncs (smod_optab
, "mod", '3');
5420 init_integral_libfuncs (umod_optab
, "umod", '3');
5421 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5422 init_integral_libfuncs (and_optab
, "and", '3');
5423 init_integral_libfuncs (ior_optab
, "ior", '3');
5424 init_integral_libfuncs (xor_optab
, "xor", '3');
5425 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5426 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5427 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5428 init_integral_libfuncs (smin_optab
, "min", '3');
5429 init_floating_libfuncs (smin_optab
, "min", '3');
5430 init_integral_libfuncs (smax_optab
, "max", '3');
5431 init_floating_libfuncs (smax_optab
, "max", '3');
5432 init_integral_libfuncs (umin_optab
, "umin", '3');
5433 init_integral_libfuncs (umax_optab
, "umax", '3');
5434 init_integral_libfuncs (neg_optab
, "neg", '2');
5435 init_floating_libfuncs (neg_optab
, "neg", '2');
5436 init_integral_libfuncs (negv_optab
, "negv", '2');
5437 init_floating_libfuncs (negv_optab
, "neg", '2');
5438 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5439 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5441 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5442 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5443 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5444 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5446 #ifdef MULSI3_LIBCALL
5447 smul_optab
->handlers
[(int) SImode
].libfunc
5448 = init_one_libfunc (MULSI3_LIBCALL
);
5450 #ifdef MULDI3_LIBCALL
5451 smul_optab
->handlers
[(int) DImode
].libfunc
5452 = init_one_libfunc (MULDI3_LIBCALL
);
5455 #ifdef DIVSI3_LIBCALL
5456 sdiv_optab
->handlers
[(int) SImode
].libfunc
5457 = init_one_libfunc (DIVSI3_LIBCALL
);
5459 #ifdef DIVDI3_LIBCALL
5460 sdiv_optab
->handlers
[(int) DImode
].libfunc
5461 = init_one_libfunc (DIVDI3_LIBCALL
);
5464 #ifdef UDIVSI3_LIBCALL
5465 udiv_optab
->handlers
[(int) SImode
].libfunc
5466 = init_one_libfunc (UDIVSI3_LIBCALL
);
5468 #ifdef UDIVDI3_LIBCALL
5469 udiv_optab
->handlers
[(int) DImode
].libfunc
5470 = init_one_libfunc (UDIVDI3_LIBCALL
);
5473 #ifdef MODSI3_LIBCALL
5474 smod_optab
->handlers
[(int) SImode
].libfunc
5475 = init_one_libfunc (MODSI3_LIBCALL
);
5477 #ifdef MODDI3_LIBCALL
5478 smod_optab
->handlers
[(int) DImode
].libfunc
5479 = init_one_libfunc (MODDI3_LIBCALL
);
5482 #ifdef UMODSI3_LIBCALL
5483 umod_optab
->handlers
[(int) SImode
].libfunc
5484 = init_one_libfunc (UMODSI3_LIBCALL
);
5486 #ifdef UMODDI3_LIBCALL
5487 umod_optab
->handlers
[(int) DImode
].libfunc
5488 = init_one_libfunc (UMODDI3_LIBCALL
);
5491 /* Use cabs for DC complex abs, since systems generally have cabs.
5492 Don't define any libcall for SCmode, so that cabs will be used. */
5493 abs_optab
->handlers
[(int) DCmode
].libfunc
5494 = init_one_libfunc ("cabs");
5496 /* The ffs function operates on `int'. */
5497 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5498 = init_one_libfunc ("ffs");
5500 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
5501 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
5502 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
5503 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
5504 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
5506 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
5507 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
5508 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
5509 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
5510 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
5512 abort_libfunc
= init_one_libfunc ("abort");
5513 memcpy_libfunc
= init_one_libfunc ("memcpy");
5514 memmove_libfunc
= init_one_libfunc ("memmove");
5515 bcopy_libfunc
= init_one_libfunc ("bcopy");
5516 memcmp_libfunc
= init_one_libfunc ("memcmp");
5517 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
5518 memset_libfunc
= init_one_libfunc ("memset");
5519 bzero_libfunc
= init_one_libfunc ("bzero");
5521 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5522 ? "_Unwind_SjLj_Resume"
5523 : "_Unwind_Resume");
5524 #ifndef DONT_USE_BUILTIN_SETJMP
5525 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5526 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5528 setjmp_libfunc
= init_one_libfunc ("setjmp");
5529 longjmp_libfunc
= init_one_libfunc ("longjmp");
5531 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5532 unwind_sjlj_unregister_libfunc
5533 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5535 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
5536 nehf2_libfunc
= init_one_libfunc ("__nehf2");
5537 gthf2_libfunc
= init_one_libfunc ("__gthf2");
5538 gehf2_libfunc
= init_one_libfunc ("__gehf2");
5539 lthf2_libfunc
= init_one_libfunc ("__lthf2");
5540 lehf2_libfunc
= init_one_libfunc ("__lehf2");
5541 unordhf2_libfunc
= init_one_libfunc ("__unordhf2");
5543 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
5544 nesf2_libfunc
= init_one_libfunc ("__nesf2");
5545 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
5546 gesf2_libfunc
= init_one_libfunc ("__gesf2");
5547 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
5548 lesf2_libfunc
= init_one_libfunc ("__lesf2");
5549 unordsf2_libfunc
= init_one_libfunc ("__unordsf2");
5551 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
5552 nedf2_libfunc
= init_one_libfunc ("__nedf2");
5553 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
5554 gedf2_libfunc
= init_one_libfunc ("__gedf2");
5555 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
5556 ledf2_libfunc
= init_one_libfunc ("__ledf2");
5557 unorddf2_libfunc
= init_one_libfunc ("__unorddf2");
5559 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
5560 nexf2_libfunc
= init_one_libfunc ("__nexf2");
5561 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
5562 gexf2_libfunc
= init_one_libfunc ("__gexf2");
5563 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
5564 lexf2_libfunc
= init_one_libfunc ("__lexf2");
5565 unordxf2_libfunc
= init_one_libfunc ("__unordxf2");
5567 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
5568 netf2_libfunc
= init_one_libfunc ("__netf2");
5569 gttf2_libfunc
= init_one_libfunc ("__gttf2");
5570 getf2_libfunc
= init_one_libfunc ("__getf2");
5571 lttf2_libfunc
= init_one_libfunc ("__lttf2");
5572 letf2_libfunc
= init_one_libfunc ("__letf2");
5573 unordtf2_libfunc
= init_one_libfunc ("__unordtf2");
5575 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
5576 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
5577 floattisf_libfunc
= init_one_libfunc ("__floattisf");
5579 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
5580 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
5581 floattidf_libfunc
= init_one_libfunc ("__floattidf");
5583 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
5584 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
5585 floattixf_libfunc
= init_one_libfunc ("__floattixf");
5587 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
5588 floatditf_libfunc
= init_one_libfunc ("__floatditf");
5589 floattitf_libfunc
= init_one_libfunc ("__floattitf");
5591 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
5592 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
5593 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
5595 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
5596 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
5597 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
5599 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
5600 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
5601 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
5603 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
5604 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
5605 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
5607 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
5608 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
5609 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
5611 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
5612 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
5613 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
5615 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
5616 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
5617 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
5619 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
5620 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
5621 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
5623 /* For function entry/exit instrumentation. */
5624 profile_function_entry_libfunc
5625 = init_one_libfunc ("__cyg_profile_func_enter");
5626 profile_function_exit_libfunc
5627 = init_one_libfunc ("__cyg_profile_func_exit");
5629 #ifdef HAVE_conditional_trap
5633 #ifdef INIT_TARGET_OPTABS
5634 /* Allow the target to add more libcalls or rename some, etc. */
5639 static GTY(()) rtx trap_rtx
;
5641 #ifdef HAVE_conditional_trap
5642 /* The insn generating function can not take an rtx_code argument.
5643 TRAP_RTX is used as an rtx argument. Its code is replaced with
5644 the code to be used in the trap insn and all other fields are
5650 if (HAVE_conditional_trap
)
5652 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5657 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5658 CODE. Return 0 on failure. */
5661 gen_cond_trap (code
, op1
, op2
, tcode
)
5662 enum rtx_code code ATTRIBUTE_UNUSED
;
5663 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
5665 enum machine_mode mode
= GET_MODE (op1
);
5667 if (mode
== VOIDmode
)
5670 #ifdef HAVE_conditional_trap
5671 if (HAVE_conditional_trap
5672 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
5676 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
5677 PUT_CODE (trap_rtx
, code
);
5678 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5682 insn
= get_insns ();
5692 #include "gt-optabs.h"