1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
39 #include "coretypes.h"
45 #include "hard-reg-set.h"
46 #include "basic-block.h"
47 #include "insn-config.h"
57 #include "insn-flags.h"
60 /* Not really meaningful values, but at least something. */
61 #ifndef SIMULTANEOUS_PREFETCHES
62 #define SIMULTANEOUS_PREFETCHES 3
64 #ifndef PREFETCH_BLOCK
65 #define PREFETCH_BLOCK 32
68 #define HAVE_prefetch 0
69 #define CODE_FOR_prefetch 0
70 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
73 /* Give up the prefetch optimizations once we exceed a given threshhold.
74 It is unlikely that we would be able to optimize something in a loop
75 with so many detected prefetches. */
76 #define MAX_PREFETCHES 100
77 /* The number of prefetch blocks that are beneficial to fetch at once before
78 a loop with a known (and low) iteration count. */
79 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
80 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
81 since it is likely that the data are already in the cache. */
82 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
84 /* Parameterize some prefetch heuristics so they can be turned on and off
85 easily for performance testing on new architecures. These can be
86 defined in target-dependent files. */
88 /* Prefetch is worthwhile only when loads/stores are dense. */
89 #ifndef PREFETCH_ONLY_DENSE_MEM
90 #define PREFETCH_ONLY_DENSE_MEM 1
93 /* Define what we mean by "dense" loads and stores; This value divided by 256
94 is the minimum percentage of memory references that worth prefetching. */
95 #ifndef PREFETCH_DENSE_MEM
96 #define PREFETCH_DENSE_MEM 220
99 /* Do not prefetch for a loop whose iteration count is known to be low. */
100 #ifndef PREFETCH_NO_LOW_LOOPCNT
101 #define PREFETCH_NO_LOW_LOOPCNT 1
104 /* Define what we mean by a "low" iteration count. */
105 #ifndef PREFETCH_LOW_LOOPCNT
106 #define PREFETCH_LOW_LOOPCNT 32
109 /* Do not prefetch for a loop that contains a function call; such a loop is
110 probably not an internal loop. */
111 #ifndef PREFETCH_NO_CALL
112 #define PREFETCH_NO_CALL 1
115 /* Do not prefetch accesses with an extreme stride. */
116 #ifndef PREFETCH_NO_EXTREME_STRIDE
117 #define PREFETCH_NO_EXTREME_STRIDE 1
120 /* Define what we mean by an "extreme" stride. */
121 #ifndef PREFETCH_EXTREME_STRIDE
122 #define PREFETCH_EXTREME_STRIDE 4096
125 /* Define a limit to how far apart indices can be and still be merged
126 into a single prefetch. */
127 #ifndef PREFETCH_EXTREME_DIFFERENCE
128 #define PREFETCH_EXTREME_DIFFERENCE 4096
131 /* Issue prefetch instructions before the loop to fetch data to be used
132 in the first few loop iterations. */
133 #ifndef PREFETCH_BEFORE_LOOP
134 #define PREFETCH_BEFORE_LOOP 1
137 /* Do not handle reversed order prefetches (negative stride). */
138 #ifndef PREFETCH_NO_REVERSE_ORDER
139 #define PREFETCH_NO_REVERSE_ORDER 1
142 /* Prefetch even if the GIV is in conditional code. */
143 #ifndef PREFETCH_CONDITIONAL
144 #define PREFETCH_CONDITIONAL 1
147 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
148 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
150 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
151 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
152 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
154 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
155 ((REGNO) < FIRST_PSEUDO_REGISTER \
156 ? (int) HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
159 /* Vector mapping INSN_UIDs to luids.
160 The luids are like uids but increase monotonically always.
161 We use them to see whether a jump comes from outside a given loop. */
165 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
166 number the insn is contained in. */
168 struct loop
**uid_loop
;
170 /* 1 + largest uid of any insn. */
172 int max_uid_for_loop
;
174 /* Number of loops detected in current function. Used as index to the
177 static int max_loop_num
;
179 /* Bound on pseudo register number before loop optimization.
180 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
181 unsigned int max_reg_before_loop
;
183 /* The value to pass to the next call of reg_scan_update. */
184 static int loop_max_reg
;
186 /* During the analysis of a loop, a chain of `struct movable's
187 is made to record all the movable insns found.
188 Then the entire chain can be scanned to decide which to move. */
192 rtx insn
; /* A movable insn */
193 rtx set_src
; /* The expression this reg is set from. */
194 rtx set_dest
; /* The destination of this SET. */
195 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
196 of any registers used within the LIBCALL. */
197 int consec
; /* Number of consecutive following insns
198 that must be moved with this one. */
199 unsigned int regno
; /* The register it sets */
200 short lifetime
; /* lifetime of that register;
201 may be adjusted when matching movables
202 that load the same value are found. */
203 short savings
; /* Number of insns we can move for this reg,
204 including other movables that force this
205 or match this one. */
206 unsigned int cond
: 1; /* 1 if only conditionally movable */
207 unsigned int force
: 1; /* 1 means MUST move this insn */
208 unsigned int global
: 1; /* 1 means reg is live outside this loop */
209 /* If PARTIAL is 1, GLOBAL means something different:
210 that the reg is live outside the range from where it is set
211 to the following label. */
212 unsigned int done
: 1; /* 1 inhibits further processing of this */
214 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
215 In particular, moving it does not make it
217 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
218 load SRC, rather than copying INSN. */
219 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
220 first insn of a consecutive sets group. */
221 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
222 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
223 that we should avoid changing when clearing
224 the rest of the reg. */
225 struct movable
*match
; /* First entry for same value */
226 struct movable
*forces
; /* An insn that must be moved if this is */
227 struct movable
*next
;
231 FILE *loop_dump_stream
;
233 /* Forward declarations. */
235 static void invalidate_loops_containing_label
PARAMS ((rtx
));
236 static void find_and_verify_loops
PARAMS ((rtx
, struct loops
*));
237 static void mark_loop_jump
PARAMS ((rtx
, struct loop
*));
238 static void prescan_loop
PARAMS ((struct loop
*));
239 static int reg_in_basic_block_p
PARAMS ((rtx
, rtx
));
240 static int consec_sets_invariant_p
PARAMS ((const struct loop
*,
242 static int labels_in_range_p
PARAMS ((rtx
, int));
243 static void count_one_set
PARAMS ((struct loop_regs
*, rtx
, rtx
, rtx
*));
244 static void note_addr_stored
PARAMS ((rtx
, rtx
, void *));
245 static void note_set_pseudo_multiple_uses
PARAMS ((rtx
, rtx
, void *));
246 static int loop_reg_used_before_p
PARAMS ((const struct loop
*, rtx
, rtx
));
247 static void scan_loop
PARAMS ((struct loop
*, int));
249 static void replace_call_address
PARAMS ((rtx
, rtx
, rtx
));
251 static rtx skip_consec_insns
PARAMS ((rtx
, int));
252 static int libcall_benefit
PARAMS ((rtx
));
253 static void ignore_some_movables
PARAMS ((struct loop_movables
*));
254 static void force_movables
PARAMS ((struct loop_movables
*));
255 static void combine_movables
PARAMS ((struct loop_movables
*,
256 struct loop_regs
*));
257 static int num_unmoved_movables
PARAMS ((const struct loop
*));
258 static int regs_match_p
PARAMS ((rtx
, rtx
, struct loop_movables
*));
259 static int rtx_equal_for_loop_p
PARAMS ((rtx
, rtx
, struct loop_movables
*,
260 struct loop_regs
*));
261 static void add_label_notes
PARAMS ((rtx
, rtx
));
262 static void move_movables
PARAMS ((struct loop
*loop
, struct loop_movables
*,
264 static void loop_movables_add
PARAMS((struct loop_movables
*,
266 static void loop_movables_free
PARAMS((struct loop_movables
*));
267 static int count_nonfixed_reads
PARAMS ((const struct loop
*, rtx
));
268 static void loop_bivs_find
PARAMS((struct loop
*));
269 static void loop_bivs_init_find
PARAMS((struct loop
*));
270 static void loop_bivs_check
PARAMS((struct loop
*));
271 static void loop_givs_find
PARAMS((struct loop
*));
272 static void loop_givs_check
PARAMS((struct loop
*));
273 static int loop_biv_eliminable_p
PARAMS((struct loop
*, struct iv_class
*,
275 static int loop_giv_reduce_benefit
PARAMS((struct loop
*, struct iv_class
*,
276 struct induction
*, rtx
));
277 static void loop_givs_dead_check
PARAMS((struct loop
*, struct iv_class
*));
278 static void loop_givs_reduce
PARAMS((struct loop
*, struct iv_class
*));
279 static void loop_givs_rescan
PARAMS((struct loop
*, struct iv_class
*,
281 static void loop_ivs_free
PARAMS((struct loop
*));
282 static void strength_reduce
PARAMS ((struct loop
*, int));
283 static void find_single_use_in_loop
PARAMS ((struct loop_regs
*, rtx
, rtx
));
284 static int valid_initial_value_p
PARAMS ((rtx
, rtx
, int, rtx
));
285 static void find_mem_givs
PARAMS ((const struct loop
*, rtx
, rtx
, int, int));
286 static void record_biv
PARAMS ((struct loop
*, struct induction
*,
287 rtx
, rtx
, rtx
, rtx
, rtx
*,
289 static void check_final_value
PARAMS ((const struct loop
*,
290 struct induction
*));
291 static void loop_ivs_dump
PARAMS((const struct loop
*, FILE *, int));
292 static void loop_iv_class_dump
PARAMS((const struct iv_class
*, FILE *, int));
293 static void loop_biv_dump
PARAMS((const struct induction
*, FILE *, int));
294 static void loop_giv_dump
PARAMS((const struct induction
*, FILE *, int));
295 static void record_giv
PARAMS ((const struct loop
*, struct induction
*,
296 rtx
, rtx
, rtx
, rtx
, rtx
, rtx
, int,
297 enum g_types
, int, int, rtx
*));
298 static void update_giv_derive
PARAMS ((const struct loop
*, rtx
));
299 static void check_ext_dependent_givs
PARAMS ((struct iv_class
*,
300 struct loop_info
*));
301 static int basic_induction_var
PARAMS ((const struct loop
*, rtx
,
302 enum machine_mode
, rtx
, rtx
,
303 rtx
*, rtx
*, rtx
**));
304 static rtx simplify_giv_expr
PARAMS ((const struct loop
*, rtx
, rtx
*, int *));
305 static int general_induction_var
PARAMS ((const struct loop
*loop
, rtx
, rtx
*,
306 rtx
*, rtx
*, rtx
*, int, int *,
308 static int consec_sets_giv
PARAMS ((const struct loop
*, int, rtx
,
309 rtx
, rtx
, rtx
*, rtx
*, rtx
*, rtx
*));
310 static int check_dbra_loop
PARAMS ((struct loop
*, int));
311 static rtx express_from_1
PARAMS ((rtx
, rtx
, rtx
));
312 static rtx combine_givs_p
PARAMS ((struct induction
*, struct induction
*));
313 static int cmp_combine_givs_stats
PARAMS ((const PTR
, const PTR
));
314 static void combine_givs
PARAMS ((struct loop_regs
*, struct iv_class
*));
315 static int product_cheap_p
PARAMS ((rtx
, rtx
));
316 static int maybe_eliminate_biv
PARAMS ((const struct loop
*, struct iv_class
*,
318 static int maybe_eliminate_biv_1
PARAMS ((const struct loop
*, rtx
, rtx
,
319 struct iv_class
*, int,
321 static int last_use_this_basic_block
PARAMS ((rtx
, rtx
));
322 static void record_initial
PARAMS ((rtx
, rtx
, void *));
323 static void update_reg_last_use
PARAMS ((rtx
, rtx
));
324 static rtx next_insn_in_loop
PARAMS ((const struct loop
*, rtx
));
325 static void loop_regs_scan
PARAMS ((const struct loop
*, int));
326 static int count_insns_in_loop
PARAMS ((const struct loop
*));
327 static void load_mems
PARAMS ((const struct loop
*));
328 static int insert_loop_mem
PARAMS ((rtx
*, void *));
329 static int replace_loop_mem
PARAMS ((rtx
*, void *));
330 static void replace_loop_mems
PARAMS ((rtx
, rtx
, rtx
));
331 static int replace_loop_reg
PARAMS ((rtx
*, void *));
332 static void replace_loop_regs
PARAMS ((rtx insn
, rtx
, rtx
));
333 static void note_reg_stored
PARAMS ((rtx
, rtx
, void *));
334 static void try_copy_prop
PARAMS ((const struct loop
*, rtx
, unsigned int));
335 static void try_swap_copy_prop
PARAMS ((const struct loop
*, rtx
,
337 static int replace_label
PARAMS ((rtx
*, void *));
338 static rtx check_insn_for_givs
PARAMS((struct loop
*, rtx
, int, int));
339 static rtx check_insn_for_bivs
PARAMS((struct loop
*, rtx
, int, int));
340 static rtx gen_add_mult
PARAMS ((rtx
, rtx
, rtx
, rtx
));
341 static void loop_regs_update
PARAMS ((const struct loop
*, rtx
));
342 static int iv_add_mult_cost
PARAMS ((rtx
, rtx
, rtx
, rtx
));
344 static rtx loop_insn_emit_after
PARAMS((const struct loop
*, basic_block
,
346 static rtx loop_call_insn_emit_before
PARAMS((const struct loop
*,
347 basic_block
, rtx
, rtx
));
348 static rtx loop_call_insn_hoist
PARAMS((const struct loop
*, rtx
));
349 static rtx loop_insn_sink_or_swim
PARAMS((const struct loop
*, rtx
));
351 static void loop_dump_aux
PARAMS ((const struct loop
*, FILE *, int));
352 static void loop_delete_insns
PARAMS ((rtx
, rtx
));
353 static HOST_WIDE_INT remove_constant_addition
PARAMS ((rtx
*));
354 static rtx gen_load_of_final_value
PARAMS ((rtx
, rtx
));
355 void debug_ivs
PARAMS ((const struct loop
*));
356 void debug_iv_class
PARAMS ((const struct iv_class
*));
357 void debug_biv
PARAMS ((const struct induction
*));
358 void debug_giv
PARAMS ((const struct induction
*));
359 void debug_loop
PARAMS ((const struct loop
*));
360 void debug_loops
PARAMS ((const struct loops
*));
362 typedef struct rtx_pair
368 typedef struct loop_replace_args
375 /* Nonzero iff INSN is between START and END, inclusive. */
376 #define INSN_IN_RANGE_P(INSN, START, END) \
377 (INSN_UID (INSN) < max_uid_for_loop \
378 && INSN_LUID (INSN) >= INSN_LUID (START) \
379 && INSN_LUID (INSN) <= INSN_LUID (END))
381 /* Indirect_jump_in_function is computed once per function. */
382 static int indirect_jump_in_function
;
383 static int indirect_jump_in_function_p
PARAMS ((rtx
));
385 static int compute_luids
PARAMS ((rtx
, rtx
, int));
387 static int biv_elimination_giv_has_0_offset
PARAMS ((struct induction
*,
391 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
392 copy the value of the strength reduced giv to its original register. */
393 static int copy_cost
;
395 /* Cost of using a register, to normalize the benefits of a giv. */
396 static int reg_address_cost
;
401 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
403 reg_address_cost
= address_cost (reg
, SImode
);
405 copy_cost
= COSTS_N_INSNS (1);
408 /* Compute the mapping from uids to luids.
409 LUIDs are numbers assigned to insns, like uids,
410 except that luids increase monotonically through the code.
411 Start at insn START and stop just before END. Assign LUIDs
412 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
414 compute_luids (start
, end
, prev_luid
)
421 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
423 if (INSN_UID (insn
) >= max_uid_for_loop
)
425 /* Don't assign luids to line-number NOTEs, so that the distance in
426 luids between two insns is not affected by -g. */
427 if (GET_CODE (insn
) != NOTE
428 || NOTE_LINE_NUMBER (insn
) <= 0)
429 uid_luid
[INSN_UID (insn
)] = ++i
;
431 /* Give a line number note the same luid as preceding insn. */
432 uid_luid
[INSN_UID (insn
)] = i
;
437 /* Entry point of this file. Perform loop optimization
438 on the current function. F is the first insn of the function
439 and DUMPFILE is a stream for output of a trace of actions taken
440 (or 0 if none should be output). */
443 loop_optimize (f
, dumpfile
, flags
)
444 /* f is the first instruction of a chain of insns for one function */
451 struct loops loops_data
;
452 struct loops
*loops
= &loops_data
;
453 struct loop_info
*loops_info
;
455 loop_dump_stream
= dumpfile
;
457 init_recog_no_volatile ();
459 max_reg_before_loop
= max_reg_num ();
460 loop_max_reg
= max_reg_before_loop
;
464 /* Count the number of loops. */
467 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
469 if (GET_CODE (insn
) == NOTE
470 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
474 /* Don't waste time if no loops. */
475 if (max_loop_num
== 0)
478 loops
->num
= max_loop_num
;
480 /* Get size to use for tables indexed by uids.
481 Leave some space for labels allocated by find_and_verify_loops. */
482 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
484 uid_luid
= (int *) xcalloc (max_uid_for_loop
, sizeof (int));
485 uid_loop
= (struct loop
**) xcalloc (max_uid_for_loop
,
486 sizeof (struct loop
*));
488 /* Allocate storage for array of loops. */
489 loops
->array
= (struct loop
*)
490 xcalloc (loops
->num
, sizeof (struct loop
));
492 /* Find and process each loop.
493 First, find them, and record them in order of their beginnings. */
494 find_and_verify_loops (f
, loops
);
496 /* Allocate and initialize auxiliary loop information. */
497 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
498 for (i
= 0; i
< loops
->num
; i
++)
499 loops
->array
[i
].aux
= loops_info
+ i
;
501 /* Now find all register lifetimes. This must be done after
502 find_and_verify_loops, because it might reorder the insns in the
504 reg_scan (f
, max_reg_before_loop
, 1);
506 /* This must occur after reg_scan so that registers created by gcse
507 will have entries in the register tables.
509 We could have added a call to reg_scan after gcse_main in toplev.c,
510 but moving this call to init_alias_analysis is more efficient. */
511 init_alias_analysis ();
513 /* See if we went too far. Note that get_max_uid already returns
514 one more that the maximum uid of all insn. */
515 if (get_max_uid () > max_uid_for_loop
)
517 /* Now reset it to the actual size we need. See above. */
518 max_uid_for_loop
= get_max_uid ();
520 /* find_and_verify_loops has already called compute_luids, but it
521 might have rearranged code afterwards, so we need to recompute
523 compute_luids (f
, NULL_RTX
, 0);
525 /* Don't leave gaps in uid_luid for insns that have been
526 deleted. It is possible that the first or last insn
527 using some register has been deleted by cross-jumping.
528 Make sure that uid_luid for that former insn's uid
529 points to the general area where that insn used to be. */
530 for (i
= 0; i
< max_uid_for_loop
; i
++)
532 uid_luid
[0] = uid_luid
[i
];
533 if (uid_luid
[0] != 0)
536 for (i
= 0; i
< max_uid_for_loop
; i
++)
537 if (uid_luid
[i
] == 0)
538 uid_luid
[i
] = uid_luid
[i
- 1];
540 /* Determine if the function has indirect jump. On some systems
541 this prevents low overhead loop instructions from being used. */
542 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
544 /* Now scan the loops, last ones first, since this means inner ones are done
545 before outer ones. */
546 for (i
= max_loop_num
- 1; i
>= 0; i
--)
548 struct loop
*loop
= &loops
->array
[i
];
550 if (! loop
->invalid
&& loop
->end
)
551 scan_loop (loop
, flags
);
554 end_alias_analysis ();
563 /* Returns the next insn, in execution order, after INSN. START and
564 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
565 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
566 insn-stream; it is used with loops that are entered near the
570 next_insn_in_loop (loop
, insn
)
571 const struct loop
*loop
;
574 insn
= NEXT_INSN (insn
);
576 if (insn
== loop
->end
)
579 /* Go to the top of the loop, and continue there. */
586 if (insn
== loop
->scan_start
)
593 /* Optimize one loop described by LOOP. */
595 /* ??? Could also move memory writes out of loops if the destination address
596 is invariant, the source is invariant, the memory write is not volatile,
597 and if we can prove that no read inside the loop can read this address
598 before the write occurs. If there is a read of this address after the
599 write, then we can also mark the memory read as invariant. */
602 scan_loop (loop
, flags
)
606 struct loop_info
*loop_info
= LOOP_INFO (loop
);
607 struct loop_regs
*regs
= LOOP_REGS (loop
);
609 rtx loop_start
= loop
->start
;
610 rtx loop_end
= loop
->end
;
612 /* 1 if we are scanning insns that could be executed zero times. */
614 /* 1 if we are scanning insns that might never be executed
615 due to a subroutine call which might exit before they are reached. */
617 /* Number of insns in the loop. */
620 rtx temp
, update_start
, update_end
;
621 /* The SET from an insn, if it is the only SET in the insn. */
623 /* Chain describing insns movable in current loop. */
624 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
625 /* Ratio of extra register life span we can justify
626 for saving an instruction. More if loop doesn't call subroutines
627 since in that case saving an insn makes more difference
628 and more registers are available. */
630 /* Nonzero if we are scanning instructions in a sub-loop. */
639 /* Determine whether this loop starts with a jump down to a test at
640 the end. This will occur for a small number of loops with a test
641 that is too complex to duplicate in front of the loop.
643 We search for the first insn or label in the loop, skipping NOTEs.
644 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
645 (because we might have a loop executed only once that contains a
646 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
647 (in case we have a degenerate loop).
649 Note that if we mistakenly think that a loop is entered at the top
650 when, in fact, it is entered at the exit test, the only effect will be
651 slightly poorer optimization. Making the opposite error can generate
652 incorrect code. Since very few loops now start with a jump to the
653 exit test, the code here to detect that case is very conservative. */
655 for (p
= NEXT_INSN (loop_start
);
657 && GET_CODE (p
) != CODE_LABEL
&& ! INSN_P (p
)
658 && (GET_CODE (p
) != NOTE
659 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
660 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
664 loop
->scan_start
= p
;
666 /* If loop end is the end of the current function, then emit a
667 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
668 note insn. This is the position we use when sinking insns out of
670 if (NEXT_INSN (loop
->end
) != 0)
671 loop
->sink
= NEXT_INSN (loop
->end
);
673 loop
->sink
= emit_note_after (NOTE_INSN_DELETED
, loop
->end
);
675 /* Set up variables describing this loop. */
677 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
679 /* If loop has a jump before the first label,
680 the true entry is the target of that jump.
681 Start scan from there.
682 But record in LOOP->TOP the place where the end-test jumps
683 back to so we can scan that after the end of the loop. */
684 if (GET_CODE (p
) == JUMP_INSN
685 /* Loop entry must be unconditional jump (and not a RETURN) */
686 && any_uncondjump_p (p
)
687 && JUMP_LABEL (p
) != 0
688 /* Check to see whether the jump actually
689 jumps out of the loop (meaning it's no loop).
690 This case can happen for things like
691 do {..} while (0). If this label was generated previously
692 by loop, we can't tell anything about it and have to reject
694 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
696 loop
->top
= next_label (loop
->scan_start
);
697 loop
->scan_start
= JUMP_LABEL (p
);
700 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
701 as required by loop_reg_used_before_p. So skip such loops. (This
702 test may never be true, but it's best to play it safe.)
704 Also, skip loops where we do not start scanning at a label. This
705 test also rejects loops starting with a JUMP_INSN that failed the
708 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
709 || GET_CODE (loop
->scan_start
) != CODE_LABEL
)
711 if (loop_dump_stream
)
712 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
713 INSN_UID (loop_start
), INSN_UID (loop_end
));
717 /* Allocate extra space for REGs that might be created by load_mems.
718 We allocate a little extra slop as well, in the hopes that we
719 won't have to reallocate the regs array. */
720 loop_regs_scan (loop
, loop_info
->mems_idx
+ 16);
721 insn_count
= count_insns_in_loop (loop
);
723 if (loop_dump_stream
)
725 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
726 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
728 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
729 INSN_UID (loop
->cont
));
732 /* Scan through the loop finding insns that are safe to move.
733 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
734 this reg will be considered invariant for subsequent insns.
735 We consider whether subsequent insns use the reg
736 in deciding whether it is worth actually moving.
738 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
739 and therefore it is possible that the insns we are scanning
740 would never be executed. At such times, we must make sure
741 that it is safe to execute the insn once instead of zero times.
742 When MAYBE_NEVER is 0, all insns will be executed at least once
743 so that is not a problem. */
745 for (in_libcall
= 0, p
= next_insn_in_loop (loop
, loop
->scan_start
);
747 p
= next_insn_in_loop (loop
, p
))
749 if (in_libcall
&& INSN_P (p
) && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
751 if (GET_CODE (p
) == INSN
)
753 temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
757 && (set
= single_set (p
))
758 && GET_CODE (SET_DEST (set
)) == REG
759 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
760 && SET_DEST (set
) != pic_offset_table_rtx
762 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
767 rtx src
= SET_SRC (set
);
768 rtx dependencies
= 0;
770 /* Figure out what to use as a source of this insn. If a
771 REG_EQUIV note is given or if a REG_EQUAL note with a
772 constant operand is specified, use it as the source and
773 mark that we should move this insn by calling
774 emit_move_insn rather that duplicating the insn.
776 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
778 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
780 src
= XEXP (temp
, 0), move_insn
= 1;
783 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
784 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
785 src
= XEXP (temp
, 0), move_insn
= 1;
786 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
788 src
= XEXP (temp
, 0);
789 /* A libcall block can use regs that don't appear in
790 the equivalent expression. To move the libcall,
791 we must move those regs too. */
792 dependencies
= libcall_other_reg (p
, src
);
796 /* For parallels, add any possible uses to the depencies, as
797 we can't move the insn without resolving them first. */
798 if (GET_CODE (PATTERN (p
)) == PARALLEL
)
800 for (i
= 0; i
< XVECLEN (PATTERN (p
), 0); i
++)
802 rtx x
= XVECEXP (PATTERN (p
), 0, i
);
803 if (GET_CODE (x
) == USE
)
805 = gen_rtx_EXPR_LIST (VOIDmode
, XEXP (x
, 0),
810 /* Don't try to optimize a register that was made
811 by loop-optimization for an inner loop.
812 We don't know its life-span, so we can't compute
814 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
816 else if (/* The register is used in basic blocks other
817 than the one where it is set (meaning that
818 something after this point in the loop might
819 depend on its value before the set). */
820 ! reg_in_basic_block_p (p
, SET_DEST (set
))
821 /* And the set is not guaranteed to be executed once
822 the loop starts, or the value before the set is
823 needed before the set occurs...
825 ??? Note we have quadratic behavior here, mitigated
826 by the fact that the previous test will often fail for
827 large loops. Rather than re-scanning the entire loop
828 each time for register usage, we should build tables
829 of the register usage and use them here instead. */
831 || loop_reg_used_before_p (loop
, set
, p
)))
832 /* It is unsafe to move the set.
834 This code used to consider it OK to move a set of a variable
835 which was not created by the user and not used in an exit
837 That behavior is incorrect and was removed. */
839 else if ((tem
= loop_invariant_p (loop
, src
))
840 && (dependencies
== 0
842 = loop_invariant_p (loop
, dependencies
)) != 0)
843 && (regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
== 1
845 = consec_sets_invariant_p
846 (loop
, SET_DEST (set
),
847 regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
,
849 /* If the insn can cause a trap (such as divide by zero),
850 can't move it unless it's guaranteed to be executed
851 once loop is entered. Even a function call might
852 prevent the trap insn from being reached
853 (since it might exit!) */
854 && ! ((maybe_never
|| call_passed
)
855 && may_trap_p (src
)))
858 int regno
= REGNO (SET_DEST (set
));
860 /* A potential lossage is where we have a case where two insns
861 can be combined as long as they are both in the loop, but
862 we move one of them outside the loop. For large loops,
863 this can lose. The most common case of this is the address
864 of a function being called.
866 Therefore, if this register is marked as being used
867 exactly once if we are in a loop with calls
868 (a "large loop"), see if we can replace the usage of
869 this register with the source of this SET. If we can,
872 Don't do this if P has a REG_RETVAL note or if we have
873 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
875 if (loop_info
->has_call
876 && regs
->array
[regno
].single_usage
!= 0
877 && regs
->array
[regno
].single_usage
!= const0_rtx
878 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
879 && (REGNO_LAST_UID (regno
)
880 == INSN_UID (regs
->array
[regno
].single_usage
))
881 && regs
->array
[regno
].set_in_loop
== 1
882 && GET_CODE (SET_SRC (set
)) != ASM_OPERANDS
883 && ! side_effects_p (SET_SRC (set
))
884 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
885 && (! SMALL_REGISTER_CLASSES
886 || (! (GET_CODE (SET_SRC (set
)) == REG
887 && (REGNO (SET_SRC (set
))
888 < FIRST_PSEUDO_REGISTER
))))
889 /* This test is not redundant; SET_SRC (set) might be
890 a call-clobbered register and the life of REGNO
891 might span a call. */
892 && ! modified_between_p (SET_SRC (set
), p
,
893 regs
->array
[regno
].single_usage
)
894 && no_labels_between_p (p
,
895 regs
->array
[regno
].single_usage
)
896 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
897 regs
->array
[regno
].single_usage
))
899 /* Replace any usage in a REG_EQUAL note. Must copy
900 the new source, so that we don't get rtx sharing
901 between the SET_SOURCE and REG_NOTES of insn p. */
902 REG_NOTES (regs
->array
[regno
].single_usage
)
904 (REG_NOTES (regs
->array
[regno
].single_usage
),
905 SET_DEST (set
), copy_rtx (SET_SRC (set
))));
908 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
910 regs
->array
[regno
+i
].set_in_loop
= 0;
914 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
918 m
->dependencies
= dependencies
;
919 m
->set_dest
= SET_DEST (set
);
922 = regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
- 1;
926 m
->move_insn
= move_insn
;
927 m
->move_insn_first
= 0;
928 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
929 m
->savemode
= VOIDmode
;
931 /* Set M->cond if either loop_invariant_p
932 or consec_sets_invariant_p returned 2
933 (only conditionally invariant). */
934 m
->cond
= ((tem
| tem1
| tem2
) > 1);
935 m
->global
= LOOP_REG_GLOBAL_P (loop
, regno
);
937 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
938 m
->savings
= regs
->array
[regno
].n_times_set
;
939 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
940 m
->savings
+= libcall_benefit (p
);
941 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
)); i
++)
942 regs
->array
[regno
+i
].set_in_loop
= move_insn
? -2 : -1;
943 /* Add M to the end of the chain MOVABLES. */
944 loop_movables_add (movables
, m
);
948 /* It is possible for the first instruction to have a
949 REG_EQUAL note but a non-invariant SET_SRC, so we must
950 remember the status of the first instruction in case
951 the last instruction doesn't have a REG_EQUAL note. */
952 m
->move_insn_first
= m
->move_insn
;
954 /* Skip this insn, not checking REG_LIBCALL notes. */
955 p
= next_nonnote_insn (p
);
956 /* Skip the consecutive insns, if there are any. */
957 p
= skip_consec_insns (p
, m
->consec
);
958 /* Back up to the last insn of the consecutive group. */
959 p
= prev_nonnote_insn (p
);
961 /* We must now reset m->move_insn, m->is_equiv, and
962 possibly m->set_src to correspond to the effects of
964 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
966 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
969 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
970 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
971 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
977 = (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
980 /* If this register is always set within a STRICT_LOW_PART
981 or set to zero, then its high bytes are constant.
982 So clear them outside the loop and within the loop
983 just load the low bytes.
984 We must check that the machine has an instruction to do so.
985 Also, if the value loaded into the register
986 depends on the same register, this cannot be done. */
987 else if (SET_SRC (set
) == const0_rtx
988 && GET_CODE (NEXT_INSN (p
)) == INSN
989 && (set1
= single_set (NEXT_INSN (p
)))
990 && GET_CODE (set1
) == SET
991 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
992 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
993 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
995 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
997 int regno
= REGNO (SET_DEST (set
));
998 if (regs
->array
[regno
].set_in_loop
== 2)
1001 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
1004 m
->set_dest
= SET_DEST (set
);
1005 m
->dependencies
= 0;
1011 m
->move_insn_first
= 0;
1013 /* If the insn may not be executed on some cycles,
1014 we can't clear the whole reg; clear just high part.
1015 Not even if the reg is used only within this loop.
1022 Clearing x before the inner loop could clobber a value
1023 being saved from the last time around the outer loop.
1024 However, if the reg is not used outside this loop
1025 and all uses of the register are in the same
1026 basic block as the store, there is no problem.
1028 If this insn was made by loop, we don't know its
1029 INSN_LUID and hence must make a conservative
1031 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1032 || LOOP_REG_GLOBAL_P (loop
, regno
)
1033 || (labels_in_range_p
1034 (p
, REGNO_FIRST_LUID (regno
))));
1035 if (maybe_never
&& m
->global
)
1036 m
->savemode
= GET_MODE (SET_SRC (set1
));
1038 m
->savemode
= VOIDmode
;
1042 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
1045 i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
1047 regs
->array
[regno
+i
].set_in_loop
= -1;
1048 /* Add M to the end of the chain MOVABLES. */
1049 loop_movables_add (movables
, m
);
1054 /* Past a call insn, we get to insns which might not be executed
1055 because the call might exit. This matters for insns that trap.
1056 Constant and pure call insns always return, so they don't count. */
1057 else if (GET_CODE (p
) == CALL_INSN
&& ! CONST_OR_PURE_CALL_P (p
))
1059 /* Past a label or a jump, we get to insns for which we
1060 can't count on whether or how many times they will be
1061 executed during each iteration. Therefore, we can
1062 only move out sets of trivial variables
1063 (those not used after the loop). */
1064 /* Similar code appears twice in strength_reduce. */
1065 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1066 /* If we enter the loop in the middle, and scan around to the
1067 beginning, don't set maybe_never for that. This must be an
1068 unconditional jump, otherwise the code at the top of the
1069 loop might never be executed. Unconditional jumps are
1070 followed by a barrier then the loop_end. */
1071 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop
->top
1072 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
1073 && any_uncondjump_p (p
)))
1075 else if (GET_CODE (p
) == NOTE
)
1077 /* At the virtual top of a converted loop, insns are again known to
1078 be executed: logically, the loop begins here even though the exit
1079 code has been duplicated. */
1080 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1081 maybe_never
= call_passed
= 0;
1082 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1084 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1089 /* If one movable subsumes another, ignore that other. */
1091 ignore_some_movables (movables
);
1093 /* For each movable insn, see if the reg that it loads
1094 leads when it dies right into another conditionally movable insn.
1095 If so, record that the second insn "forces" the first one,
1096 since the second can be moved only if the first is. */
1098 force_movables (movables
);
1100 /* See if there are multiple movable insns that load the same value.
1101 If there are, make all but the first point at the first one
1102 through the `match' field, and add the priorities of them
1103 all together as the priority of the first. */
1105 combine_movables (movables
, regs
);
1107 /* Now consider each movable insn to decide whether it is worth moving.
1108 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1110 Generally this increases code size, so do not move moveables when
1111 optimizing for code size. */
1113 if (! optimize_size
)
1115 move_movables (loop
, movables
, threshold
, insn_count
);
1117 /* Recalculate regs->array if move_movables has created new
1119 if (max_reg_num () > regs
->num
)
1121 loop_regs_scan (loop
, 0);
1122 for (update_start
= loop_start
;
1123 PREV_INSN (update_start
)
1124 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1125 update_start
= PREV_INSN (update_start
))
1127 update_end
= NEXT_INSN (loop_end
);
1129 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1130 loop_max_reg
= max_reg_num ();
1134 /* Now candidates that still are negative are those not moved.
1135 Change regs->array[I].set_in_loop to indicate that those are not actually
1137 for (i
= 0; i
< regs
->num
; i
++)
1138 if (regs
->array
[i
].set_in_loop
< 0)
1139 regs
->array
[i
].set_in_loop
= regs
->array
[i
].n_times_set
;
1141 /* Now that we've moved some things out of the loop, we might be able to
1142 hoist even more memory references. */
1145 /* Recalculate regs->array if load_mems has created new registers. */
1146 if (max_reg_num () > regs
->num
)
1147 loop_regs_scan (loop
, 0);
1149 for (update_start
= loop_start
;
1150 PREV_INSN (update_start
)
1151 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1152 update_start
= PREV_INSN (update_start
))
1154 update_end
= NEXT_INSN (loop_end
);
1156 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1157 loop_max_reg
= max_reg_num ();
1159 if (flag_strength_reduce
)
1161 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
)
1162 /* Ensure our label doesn't go away. */
1163 LABEL_NUSES (update_end
)++;
1165 strength_reduce (loop
, flags
);
1167 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1168 loop_max_reg
= max_reg_num ();
1170 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
1171 && --LABEL_NUSES (update_end
) == 0)
1172 delete_related_insns (update_end
);
1176 /* The movable information is required for strength reduction. */
1177 loop_movables_free (movables
);
1184 /* Add elements to *OUTPUT to record all the pseudo-regs
1185 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1188 record_excess_regs (in_this
, not_in_this
, output
)
1189 rtx in_this
, not_in_this
;
1196 code
= GET_CODE (in_this
);
1210 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1211 && ! reg_mentioned_p (in_this
, not_in_this
))
1212 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1219 fmt
= GET_RTX_FORMAT (code
);
1220 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1227 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1228 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1232 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1238 /* Check what regs are referred to in the libcall block ending with INSN,
1239 aside from those mentioned in the equivalent value.
1240 If there are none, return 0.
1241 If there are one or more, return an EXPR_LIST containing all of them. */
1244 libcall_other_reg (insn
, equiv
)
1247 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1248 rtx p
= XEXP (note
, 0);
1251 /* First, find all the regs used in the libcall block
1252 that are not mentioned as inputs to the result. */
1256 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1257 || GET_CODE (p
) == CALL_INSN
)
1258 record_excess_regs (PATTERN (p
), equiv
, &output
);
1265 /* Return 1 if all uses of REG
1266 are between INSN and the end of the basic block. */
1269 reg_in_basic_block_p (insn
, reg
)
1272 int regno
= REGNO (reg
);
1275 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1278 /* Search this basic block for the already recorded last use of the reg. */
1279 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1281 switch (GET_CODE (p
))
1288 /* Ordinary insn: if this is the last use, we win. */
1289 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1294 /* Jump insn: if this is the last use, we win. */
1295 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1297 /* Otherwise, it's the end of the basic block, so we lose. */
1302 /* It's the end of the basic block, so we lose. */
1310 /* The "last use" that was recorded can't be found after the first
1311 use. This can happen when the last use was deleted while
1312 processing an inner loop, this inner loop was then completely
1313 unrolled, and the outer loop is always exited after the inner loop,
1314 so that everything after the first use becomes a single basic block. */
1318 /* Compute the benefit of eliminating the insns in the block whose
1319 last insn is LAST. This may be a group of insns used to compute a
1320 value directly or can contain a library call. */
1323 libcall_benefit (last
)
1329 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1330 insn
!= last
; insn
= NEXT_INSN (insn
))
1332 if (GET_CODE (insn
) == CALL_INSN
)
1333 benefit
+= 10; /* Assume at least this many insns in a library
1335 else if (GET_CODE (insn
) == INSN
1336 && GET_CODE (PATTERN (insn
)) != USE
1337 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1344 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1347 skip_consec_insns (insn
, count
)
1351 for (; count
> 0; count
--)
1355 /* If first insn of libcall sequence, skip to end. */
1356 /* Do this at start of loop, since INSN is guaranteed to
1358 if (GET_CODE (insn
) != NOTE
1359 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1360 insn
= XEXP (temp
, 0);
1363 insn
= NEXT_INSN (insn
);
1364 while (GET_CODE (insn
) == NOTE
);
1370 /* Ignore any movable whose insn falls within a libcall
1371 which is part of another movable.
1372 We make use of the fact that the movable for the libcall value
1373 was made later and so appears later on the chain. */
1376 ignore_some_movables (movables
)
1377 struct loop_movables
*movables
;
1379 struct movable
*m
, *m1
;
1381 for (m
= movables
->head
; m
; m
= m
->next
)
1383 /* Is this a movable for the value of a libcall? */
1384 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1388 /* Check for earlier movables inside that range,
1389 and mark them invalid. We cannot use LUIDs here because
1390 insns created by loop.c for prior loops don't have LUIDs.
1391 Rather than reject all such insns from movables, we just
1392 explicitly check each insn in the libcall (since invariant
1393 libcalls aren't that common). */
1394 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1395 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1396 if (m1
->insn
== insn
)
1402 /* For each movable insn, see if the reg that it loads
1403 leads when it dies right into another conditionally movable insn.
1404 If so, record that the second insn "forces" the first one,
1405 since the second can be moved only if the first is. */
1408 force_movables (movables
)
1409 struct loop_movables
*movables
;
1411 struct movable
*m
, *m1
;
1413 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
1414 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1415 if (!m1
->partial
&& !m1
->done
)
1417 int regno
= m1
->regno
;
1418 for (m
= m1
->next
; m
; m
= m
->next
)
1419 /* ??? Could this be a bug? What if CSE caused the
1420 register of M1 to be used after this insn?
1421 Since CSE does not update regno_last_uid,
1422 this insn M->insn might not be where it dies.
1423 But very likely this doesn't matter; what matters is
1424 that M's reg is computed from M1's reg. */
1425 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1428 if (m
!= 0 && m
->set_src
== m1
->set_dest
1429 /* If m->consec, m->set_src isn't valid. */
1433 /* Increase the priority of the moving the first insn
1434 since it permits the second to be moved as well. */
1438 m1
->lifetime
+= m
->lifetime
;
1439 m1
->savings
+= m
->savings
;
1444 /* Find invariant expressions that are equal and can be combined into
1448 combine_movables (movables
, regs
)
1449 struct loop_movables
*movables
;
1450 struct loop_regs
*regs
;
1453 char *matched_regs
= (char *) xmalloc (regs
->num
);
1454 enum machine_mode mode
;
1456 /* Regs that are set more than once are not allowed to match
1457 or be matched. I'm no longer sure why not. */
1458 /* Only pseudo registers are allowed to match or be matched,
1459 since move_movables does not validate the change. */
1460 /* Perhaps testing m->consec_sets would be more appropriate here? */
1462 for (m
= movables
->head
; m
; m
= m
->next
)
1463 if (m
->match
== 0 && regs
->array
[m
->regno
].n_times_set
== 1
1464 && m
->regno
>= FIRST_PSEUDO_REGISTER
1468 int regno
= m
->regno
;
1470 memset (matched_regs
, 0, regs
->num
);
1471 matched_regs
[regno
] = 1;
1473 /* We want later insns to match the first one. Don't make the first
1474 one match any later ones. So start this loop at m->next. */
1475 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1476 if (m
!= m1
&& m1
->match
== 0
1477 && regs
->array
[m1
->regno
].n_times_set
== 1
1478 && m1
->regno
>= FIRST_PSEUDO_REGISTER
1479 /* A reg used outside the loop mustn't be eliminated. */
1481 /* A reg used for zero-extending mustn't be eliminated. */
1483 && (matched_regs
[m1
->regno
]
1486 /* Can combine regs with different modes loaded from the
1487 same constant only if the modes are the same or
1488 if both are integer modes with M wider or the same
1489 width as M1. The check for integer is redundant, but
1490 safe, since the only case of differing destination
1491 modes with equal sources is when both sources are
1492 VOIDmode, i.e., CONST_INT. */
1493 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1494 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1495 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1496 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1497 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1498 /* See if the source of M1 says it matches M. */
1499 && ((GET_CODE (m1
->set_src
) == REG
1500 && matched_regs
[REGNO (m1
->set_src
)])
1501 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1503 && ((m
->dependencies
== m1
->dependencies
)
1504 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1506 m
->lifetime
+= m1
->lifetime
;
1507 m
->savings
+= m1
->savings
;
1510 matched_regs
[m1
->regno
] = 1;
1514 /* Now combine the regs used for zero-extension.
1515 This can be done for those not marked `global'
1516 provided their lives don't overlap. */
1518 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1519 mode
= GET_MODE_WIDER_MODE (mode
))
1521 struct movable
*m0
= 0;
1523 /* Combine all the registers for extension from mode MODE.
1524 Don't combine any that are used outside this loop. */
1525 for (m
= movables
->head
; m
; m
= m
->next
)
1526 if (m
->partial
&& ! m
->global
1527 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1531 int first
= REGNO_FIRST_LUID (m
->regno
);
1532 int last
= REGNO_LAST_LUID (m
->regno
);
1536 /* First one: don't check for overlap, just record it. */
1541 /* Make sure they extend to the same mode.
1542 (Almost always true.) */
1543 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1546 /* We already have one: check for overlap with those
1547 already combined together. */
1548 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1549 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1550 if (! (REGNO_FIRST_LUID (m1
->regno
) > last
1551 || REGNO_LAST_LUID (m1
->regno
) < first
))
1554 /* No overlap: we can combine this with the others. */
1555 m0
->lifetime
+= m
->lifetime
;
1556 m0
->savings
+= m
->savings
;
1566 free (matched_regs
);
1569 /* Returns the number of movable instructions in LOOP that were not
1570 moved outside the loop. */
1573 num_unmoved_movables (loop
)
1574 const struct loop
*loop
;
1579 for (m
= LOOP_MOVABLES (loop
)->head
; m
; m
= m
->next
)
1587 /* Return 1 if regs X and Y will become the same if moved. */
1590 regs_match_p (x
, y
, movables
)
1592 struct loop_movables
*movables
;
1594 unsigned int xn
= REGNO (x
);
1595 unsigned int yn
= REGNO (y
);
1596 struct movable
*mx
, *my
;
1598 for (mx
= movables
->head
; mx
; mx
= mx
->next
)
1599 if (mx
->regno
== xn
)
1602 for (my
= movables
->head
; my
; my
= my
->next
)
1603 if (my
->regno
== yn
)
1607 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1609 || mx
== my
->match
));
1612 /* Return 1 if X and Y are identical-looking rtx's.
1613 This is the Lisp function EQUAL for rtx arguments.
1615 If two registers are matching movables or a movable register and an
1616 equivalent constant, consider them equal. */
1619 rtx_equal_for_loop_p (x
, y
, movables
, regs
)
1621 struct loop_movables
*movables
;
1622 struct loop_regs
*regs
;
1632 if (x
== 0 || y
== 0)
1635 code
= GET_CODE (x
);
1637 /* If we have a register and a constant, they may sometimes be
1639 if (GET_CODE (x
) == REG
&& regs
->array
[REGNO (x
)].set_in_loop
== -2
1642 for (m
= movables
->head
; m
; m
= m
->next
)
1643 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1644 && rtx_equal_p (m
->set_src
, y
))
1647 else if (GET_CODE (y
) == REG
&& regs
->array
[REGNO (y
)].set_in_loop
== -2
1650 for (m
= movables
->head
; m
; m
= m
->next
)
1651 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1652 && rtx_equal_p (m
->set_src
, x
))
1656 /* Otherwise, rtx's of different codes cannot be equal. */
1657 if (code
!= GET_CODE (y
))
1660 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1661 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1663 if (GET_MODE (x
) != GET_MODE (y
))
1666 /* These three types of rtx's can be compared nonrecursively. */
1668 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1670 if (code
== LABEL_REF
)
1671 return XEXP (x
, 0) == XEXP (y
, 0);
1672 if (code
== SYMBOL_REF
)
1673 return XSTR (x
, 0) == XSTR (y
, 0);
1675 /* Compare the elements. If any pair of corresponding elements
1676 fail to match, return 0 for the whole things. */
1678 fmt
= GET_RTX_FORMAT (code
);
1679 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1684 if (XWINT (x
, i
) != XWINT (y
, i
))
1689 if (XINT (x
, i
) != XINT (y
, i
))
1694 /* Two vectors must have the same length. */
1695 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1698 /* And the corresponding elements must match. */
1699 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1700 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
1701 movables
, regs
) == 0)
1706 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
, regs
)
1712 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1717 /* These are just backpointers, so they don't matter. */
1723 /* It is believed that rtx's at this level will never
1724 contain anything but integers and other rtx's,
1725 except for within LABEL_REFs and SYMBOL_REFs. */
1733 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1734 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1735 references is incremented once for each added note. */
1738 add_label_notes (x
, insns
)
1742 enum rtx_code code
= GET_CODE (x
);
1747 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1749 /* This code used to ignore labels that referred to dispatch tables to
1750 avoid flow generating (slighly) worse code.
1752 We no longer ignore such label references (see LABEL_REF handling in
1753 mark_jump_label for additional information). */
1754 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1755 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1757 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
, XEXP (x
, 0),
1759 if (LABEL_P (XEXP (x
, 0)))
1760 LABEL_NUSES (XEXP (x
, 0))++;
1764 fmt
= GET_RTX_FORMAT (code
);
1765 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1768 add_label_notes (XEXP (x
, i
), insns
);
1769 else if (fmt
[i
] == 'E')
1770 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1771 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1775 /* Scan MOVABLES, and move the insns that deserve to be moved.
1776 If two matching movables are combined, replace one reg with the
1777 other throughout. */
1780 move_movables (loop
, movables
, threshold
, insn_count
)
1782 struct loop_movables
*movables
;
1786 struct loop_regs
*regs
= LOOP_REGS (loop
);
1787 int nregs
= regs
->num
;
1791 rtx loop_start
= loop
->start
;
1792 rtx loop_end
= loop
->end
;
1793 /* Map of pseudo-register replacements to handle combining
1794 when we move several insns that load the same value
1795 into different pseudo-registers. */
1796 rtx
*reg_map
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
1797 char *already_moved
= (char *) xcalloc (nregs
, sizeof (char));
1799 for (m
= movables
->head
; m
; m
= m
->next
)
1801 /* Describe this movable insn. */
1803 if (loop_dump_stream
)
1805 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1806 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1808 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1810 fprintf (loop_dump_stream
, "cond ");
1812 fprintf (loop_dump_stream
, "force ");
1814 fprintf (loop_dump_stream
, "global ");
1816 fprintf (loop_dump_stream
, "done ");
1818 fprintf (loop_dump_stream
, "move-insn ");
1820 fprintf (loop_dump_stream
, "matches %d ",
1821 INSN_UID (m
->match
->insn
));
1823 fprintf (loop_dump_stream
, "forces %d ",
1824 INSN_UID (m
->forces
->insn
));
1827 /* Ignore the insn if it's already done (it matched something else).
1828 Otherwise, see if it is now safe to move. */
1832 || (1 == loop_invariant_p (loop
, m
->set_src
)
1833 && (m
->dependencies
== 0
1834 || 1 == loop_invariant_p (loop
, m
->dependencies
))
1836 || 1 == consec_sets_invariant_p (loop
, m
->set_dest
,
1839 && (! m
->forces
|| m
->forces
->done
))
1843 int savings
= m
->savings
;
1845 /* We have an insn that is safe to move.
1846 Compute its desirability. */
1851 if (loop_dump_stream
)
1852 fprintf (loop_dump_stream
, "savings %d ", savings
);
1854 if (regs
->array
[regno
].moved_once
&& loop_dump_stream
)
1855 fprintf (loop_dump_stream
, "halved since already moved ");
1857 /* An insn MUST be moved if we already moved something else
1858 which is safe only if this one is moved too: that is,
1859 if already_moved[REGNO] is nonzero. */
1861 /* An insn is desirable to move if the new lifetime of the
1862 register is no more than THRESHOLD times the old lifetime.
1863 If it's not desirable, it means the loop is so big
1864 that moving won't speed things up much,
1865 and it is liable to make register usage worse. */
1867 /* It is also desirable to move if it can be moved at no
1868 extra cost because something else was already moved. */
1870 if (already_moved
[regno
]
1871 || flag_move_all_movables
1872 || (threshold
* savings
* m
->lifetime
) >=
1873 (regs
->array
[regno
].moved_once
? insn_count
* 2 : insn_count
)
1874 || (m
->forces
&& m
->forces
->done
1875 && regs
->array
[m
->forces
->regno
].n_times_set
== 1))
1879 rtx first
= NULL_RTX
;
1881 /* Now move the insns that set the reg. */
1883 if (m
->partial
&& m
->match
)
1887 /* Find the end of this chain of matching regs.
1888 Thus, we load each reg in the chain from that one reg.
1889 And that reg is loaded with 0 directly,
1890 since it has ->match == 0. */
1891 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1892 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1893 SET_DEST (PATTERN (m1
->insn
)));
1894 i1
= loop_insn_hoist (loop
, newpat
);
1896 /* Mark the moved, invariant reg as being allowed to
1897 share a hard reg with the other matching invariant. */
1898 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1899 r1
= SET_DEST (PATTERN (m
->insn
));
1900 r2
= SET_DEST (PATTERN (m1
->insn
));
1902 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1903 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1905 delete_insn (m
->insn
);
1910 if (loop_dump_stream
)
1911 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1913 /* If we are to re-generate the item being moved with a
1914 new move insn, first delete what we have and then emit
1915 the move insn before the loop. */
1916 else if (m
->move_insn
)
1920 for (count
= m
->consec
; count
>= 0; count
--)
1922 /* If this is the first insn of a library call sequence,
1923 something is very wrong. */
1924 if (GET_CODE (p
) != NOTE
1925 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1928 /* If this is the last insn of a libcall sequence, then
1929 delete every insn in the sequence except the last.
1930 The last insn is handled in the normal manner. */
1931 if (GET_CODE (p
) != NOTE
1932 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1934 temp
= XEXP (temp
, 0);
1936 temp
= delete_insn (temp
);
1940 p
= delete_insn (p
);
1942 /* simplify_giv_expr expects that it can walk the insns
1943 at m->insn forwards and see this old sequence we are
1944 tossing here. delete_insn does preserve the next
1945 pointers, but when we skip over a NOTE we must fix
1946 it up. Otherwise that code walks into the non-deleted
1948 while (p
&& GET_CODE (p
) == NOTE
)
1949 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1953 emit_move_insn (m
->set_dest
, m
->set_src
);
1957 add_label_notes (m
->set_src
, seq
);
1959 i1
= loop_insn_hoist (loop
, seq
);
1960 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1961 set_unique_reg_note (i1
,
1962 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1965 if (loop_dump_stream
)
1966 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1968 /* The more regs we move, the less we like moving them. */
1973 for (count
= m
->consec
; count
>= 0; count
--)
1977 /* If first insn of libcall sequence, skip to end. */
1978 /* Do this at start of loop, since p is guaranteed to
1980 if (GET_CODE (p
) != NOTE
1981 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1984 /* If last insn of libcall sequence, move all
1985 insns except the last before the loop. The last
1986 insn is handled in the normal manner. */
1987 if (GET_CODE (p
) != NOTE
1988 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1992 rtx fn_address_insn
= 0;
1995 for (temp
= XEXP (temp
, 0); temp
!= p
;
1996 temp
= NEXT_INSN (temp
))
2002 if (GET_CODE (temp
) == NOTE
)
2005 body
= PATTERN (temp
);
2007 /* Find the next insn after TEMP,
2008 not counting USE or NOTE insns. */
2009 for (next
= NEXT_INSN (temp
); next
!= p
;
2010 next
= NEXT_INSN (next
))
2011 if (! (GET_CODE (next
) == INSN
2012 && GET_CODE (PATTERN (next
)) == USE
)
2013 && GET_CODE (next
) != NOTE
)
2016 /* If that is the call, this may be the insn
2017 that loads the function address.
2019 Extract the function address from the insn
2020 that loads it into a register.
2021 If this insn was cse'd, we get incorrect code.
2023 So emit a new move insn that copies the
2024 function address into the register that the
2025 call insn will use. flow.c will delete any
2026 redundant stores that we have created. */
2027 if (GET_CODE (next
) == CALL_INSN
2028 && GET_CODE (body
) == SET
2029 && GET_CODE (SET_DEST (body
)) == REG
2030 && (n
= find_reg_note (temp
, REG_EQUAL
,
2033 fn_reg
= SET_SRC (body
);
2034 if (GET_CODE (fn_reg
) != REG
)
2035 fn_reg
= SET_DEST (body
);
2036 fn_address
= XEXP (n
, 0);
2037 fn_address_insn
= temp
;
2039 /* We have the call insn.
2040 If it uses the register we suspect it might,
2041 load it with the correct address directly. */
2042 if (GET_CODE (temp
) == CALL_INSN
2044 && reg_referenced_p (fn_reg
, body
))
2045 loop_insn_emit_after (loop
, 0, fn_address_insn
,
2047 (fn_reg
, fn_address
));
2049 if (GET_CODE (temp
) == CALL_INSN
)
2051 i1
= loop_call_insn_hoist (loop
, body
);
2052 /* Because the USAGE information potentially
2053 contains objects other than hard registers
2054 we need to copy it. */
2055 if (CALL_INSN_FUNCTION_USAGE (temp
))
2056 CALL_INSN_FUNCTION_USAGE (i1
)
2057 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2060 i1
= loop_insn_hoist (loop
, body
);
2063 if (temp
== fn_address_insn
)
2064 fn_address_insn
= i1
;
2065 REG_NOTES (i1
) = REG_NOTES (temp
);
2066 REG_NOTES (temp
) = NULL
;
2072 if (m
->savemode
!= VOIDmode
)
2074 /* P sets REG to zero; but we should clear only
2075 the bits that are not covered by the mode
2077 rtx reg
= m
->set_dest
;
2082 tem
= expand_simple_binop
2083 (GET_MODE (reg
), AND
, reg
,
2084 GEN_INT ((((HOST_WIDE_INT
) 1
2085 << GET_MODE_BITSIZE (m
->savemode
)))
2087 reg
, 1, OPTAB_LIB_WIDEN
);
2091 emit_move_insn (reg
, tem
);
2092 sequence
= get_insns ();
2094 i1
= loop_insn_hoist (loop
, sequence
);
2096 else if (GET_CODE (p
) == CALL_INSN
)
2098 i1
= loop_call_insn_hoist (loop
, PATTERN (p
));
2099 /* Because the USAGE information potentially
2100 contains objects other than hard registers
2101 we need to copy it. */
2102 if (CALL_INSN_FUNCTION_USAGE (p
))
2103 CALL_INSN_FUNCTION_USAGE (i1
)
2104 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2106 else if (count
== m
->consec
&& m
->move_insn_first
)
2109 /* The SET_SRC might not be invariant, so we must
2110 use the REG_EQUAL note. */
2112 emit_move_insn (m
->set_dest
, m
->set_src
);
2116 add_label_notes (m
->set_src
, seq
);
2118 i1
= loop_insn_hoist (loop
, seq
);
2119 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2120 set_unique_reg_note (i1
, m
->is_equiv
? REG_EQUIV
2121 : REG_EQUAL
, m
->set_src
);
2124 i1
= loop_insn_hoist (loop
, PATTERN (p
));
2126 if (REG_NOTES (i1
) == 0)
2128 REG_NOTES (i1
) = REG_NOTES (p
);
2129 REG_NOTES (p
) = NULL
;
2131 /* If there is a REG_EQUAL note present whose value
2132 is not loop invariant, then delete it, since it
2133 may cause problems with later optimization passes.
2134 It is possible for cse to create such notes
2135 like this as a result of record_jump_cond. */
2137 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2138 && ! loop_invariant_p (loop
, XEXP (temp
, 0)))
2139 remove_note (i1
, temp
);
2145 if (loop_dump_stream
)
2146 fprintf (loop_dump_stream
, " moved to %d",
2149 /* If library call, now fix the REG_NOTES that contain
2150 insn pointers, namely REG_LIBCALL on FIRST
2151 and REG_RETVAL on I1. */
2152 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2154 XEXP (temp
, 0) = first
;
2155 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2156 XEXP (temp
, 0) = i1
;
2163 /* simplify_giv_expr expects that it can walk the insns
2164 at m->insn forwards and see this old sequence we are
2165 tossing here. delete_insn does preserve the next
2166 pointers, but when we skip over a NOTE we must fix
2167 it up. Otherwise that code walks into the non-deleted
2169 while (p
&& GET_CODE (p
) == NOTE
)
2170 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2173 /* The more regs we move, the less we like moving them. */
2177 /* Any other movable that loads the same register
2179 already_moved
[regno
] = 1;
2181 /* This reg has been moved out of one loop. */
2182 regs
->array
[regno
].moved_once
= 1;
2184 /* The reg set here is now invariant. */
2188 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, m
->set_dest
); i
++)
2189 regs
->array
[regno
+i
].set_in_loop
= 0;
2194 /* Change the length-of-life info for the register
2195 to say it lives at least the full length of this loop.
2196 This will help guide optimizations in outer loops. */
2198 if (REGNO_FIRST_LUID (regno
) > INSN_LUID (loop_start
))
2199 /* This is the old insn before all the moved insns.
2200 We can't use the moved insn because it is out of range
2201 in uid_luid. Only the old insns have luids. */
2202 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2203 if (REGNO_LAST_LUID (regno
) < INSN_LUID (loop_end
))
2204 REGNO_LAST_UID (regno
) = INSN_UID (loop_end
);
2206 /* Combine with this moved insn any other matching movables. */
2209 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
2214 /* Schedule the reg loaded by M1
2215 for replacement so that shares the reg of M.
2216 If the modes differ (only possible in restricted
2217 circumstances, make a SUBREG.
2219 Note this assumes that the target dependent files
2220 treat REG and SUBREG equally, including within
2221 GO_IF_LEGITIMATE_ADDRESS and in all the
2222 predicates since we never verify that replacing the
2223 original register with a SUBREG results in a
2224 recognizable insn. */
2225 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2226 reg_map
[m1
->regno
] = m
->set_dest
;
2229 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2232 /* Get rid of the matching insn
2233 and prevent further processing of it. */
2236 /* if library call, delete all insns. */
2237 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2239 delete_insn_chain (XEXP (temp
, 0), m1
->insn
);
2241 delete_insn (m1
->insn
);
2243 /* Any other movable that loads the same register
2245 already_moved
[m1
->regno
] = 1;
2247 /* The reg merged here is now invariant,
2248 if the reg it matches is invariant. */
2253 i
< LOOP_REGNO_NREGS (regno
, m1
->set_dest
);
2255 regs
->array
[m1
->regno
+i
].set_in_loop
= 0;
2259 else if (loop_dump_stream
)
2260 fprintf (loop_dump_stream
, "not desirable");
2262 else if (loop_dump_stream
&& !m
->match
)
2263 fprintf (loop_dump_stream
, "not safe");
2265 if (loop_dump_stream
)
2266 fprintf (loop_dump_stream
, "\n");
2270 new_start
= loop_start
;
2272 /* Go through all the instructions in the loop, making
2273 all the register substitutions scheduled in REG_MAP. */
2274 for (p
= new_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
2275 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2276 || GET_CODE (p
) == CALL_INSN
)
2278 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2279 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2285 free (already_moved
);
2290 loop_movables_add (movables
, m
)
2291 struct loop_movables
*movables
;
2294 if (movables
->head
== 0)
2297 movables
->last
->next
= m
;
2303 loop_movables_free (movables
)
2304 struct loop_movables
*movables
;
2307 struct movable
*m_next
;
2309 for (m
= movables
->head
; m
; m
= m_next
)
2317 /* Scan X and replace the address of any MEM in it with ADDR.
2318 REG is the address that MEM should have before the replacement. */
2321 replace_call_address (x
, reg
, addr
)
2330 code
= GET_CODE (x
);
2344 /* Short cut for very common case. */
2345 replace_call_address (XEXP (x
, 1), reg
, addr
);
2349 /* Short cut for very common case. */
2350 replace_call_address (XEXP (x
, 0), reg
, addr
);
2354 /* If this MEM uses a reg other than the one we expected,
2355 something is wrong. */
2356 if (XEXP (x
, 0) != reg
)
2365 fmt
= GET_RTX_FORMAT (code
);
2366 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2369 replace_call_address (XEXP (x
, i
), reg
, addr
);
2370 else if (fmt
[i
] == 'E')
2373 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2374 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2380 /* Return the number of memory refs to addresses that vary
2384 count_nonfixed_reads (loop
, x
)
2385 const struct loop
*loop
;
2396 code
= GET_CODE (x
);
2410 return ((loop_invariant_p (loop
, XEXP (x
, 0)) != 1)
2411 + count_nonfixed_reads (loop
, XEXP (x
, 0)));
2418 fmt
= GET_RTX_FORMAT (code
);
2419 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2422 value
+= count_nonfixed_reads (loop
, XEXP (x
, i
));
2426 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2427 value
+= count_nonfixed_reads (loop
, XVECEXP (x
, i
, j
));
2433 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2434 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2435 `unknown_address_altered', `unknown_constant_address_altered', and
2436 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2437 list `store_mems' in LOOP. */
2445 struct loop_info
*loop_info
= LOOP_INFO (loop
);
2446 rtx start
= loop
->start
;
2447 rtx end
= loop
->end
;
2448 /* The label after END. Jumping here is just like falling off the
2449 end of the loop. We use next_nonnote_insn instead of next_label
2450 as a hedge against the (pathological) case where some actual insn
2451 might end up between the two. */
2452 rtx exit_target
= next_nonnote_insn (end
);
2454 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2455 loop_info
->pre_header_has_call
= 0;
2456 loop_info
->has_call
= 0;
2457 loop_info
->has_nonconst_call
= 0;
2458 loop_info
->has_prefetch
= 0;
2459 loop_info
->has_volatile
= 0;
2460 loop_info
->has_tablejump
= 0;
2461 loop_info
->has_multiple_exit_targets
= 0;
2464 loop_info
->unknown_address_altered
= 0;
2465 loop_info
->unknown_constant_address_altered
= 0;
2466 loop_info
->store_mems
= NULL_RTX
;
2467 loop_info
->first_loop_store_insn
= NULL_RTX
;
2468 loop_info
->mems_idx
= 0;
2469 loop_info
->num_mem_sets
= 0;
2470 /* If loop opts run twice, this was set on 1st pass for 2nd. */
2471 loop_info
->preconditioned
= NOTE_PRECONDITIONED (end
);
2473 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
2474 insn
= PREV_INSN (insn
))
2476 if (GET_CODE (insn
) == CALL_INSN
)
2478 loop_info
->pre_header_has_call
= 1;
2483 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2484 insn
= NEXT_INSN (insn
))
2486 switch (GET_CODE (insn
))
2489 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2492 /* Count number of loops contained in this one. */
2495 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2500 if (! CONST_OR_PURE_CALL_P (insn
))
2502 loop_info
->unknown_address_altered
= 1;
2503 loop_info
->has_nonconst_call
= 1;
2505 else if (pure_call_p (insn
))
2506 loop_info
->has_nonconst_call
= 1;
2507 loop_info
->has_call
= 1;
2508 if (can_throw_internal (insn
))
2509 loop_info
->has_multiple_exit_targets
= 1;
2513 if (! loop_info
->has_multiple_exit_targets
)
2515 rtx set
= pc_set (insn
);
2519 rtx src
= SET_SRC (set
);
2522 if (GET_CODE (src
) == IF_THEN_ELSE
)
2524 label1
= XEXP (src
, 1);
2525 label2
= XEXP (src
, 2);
2535 if (label1
&& label1
!= pc_rtx
)
2537 if (GET_CODE (label1
) != LABEL_REF
)
2539 /* Something tricky. */
2540 loop_info
->has_multiple_exit_targets
= 1;
2543 else if (XEXP (label1
, 0) != exit_target
2544 && LABEL_OUTSIDE_LOOP_P (label1
))
2546 /* A jump outside the current loop. */
2547 loop_info
->has_multiple_exit_targets
= 1;
2559 /* A return, or something tricky. */
2560 loop_info
->has_multiple_exit_targets
= 1;
2566 if (volatile_refs_p (PATTERN (insn
)))
2567 loop_info
->has_volatile
= 1;
2569 if (GET_CODE (insn
) == JUMP_INSN
2570 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2571 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2572 loop_info
->has_tablejump
= 1;
2574 note_stores (PATTERN (insn
), note_addr_stored
, loop_info
);
2575 if (! loop_info
->first_loop_store_insn
&& loop_info
->store_mems
)
2576 loop_info
->first_loop_store_insn
= insn
;
2578 if (flag_non_call_exceptions
&& can_throw_internal (insn
))
2579 loop_info
->has_multiple_exit_targets
= 1;
2587 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2588 if (/* An exception thrown by a called function might land us
2590 ! loop_info
->has_nonconst_call
2591 /* We don't want loads for MEMs moved to a location before the
2592 one at which their stack memory becomes allocated. (Note
2593 that this is not a problem for malloc, etc., since those
2594 require actual function calls. */
2595 && ! current_function_calls_alloca
2596 /* There are ways to leave the loop other than falling off the
2598 && ! loop_info
->has_multiple_exit_targets
)
2599 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2600 insn
= NEXT_INSN (insn
))
2601 for_each_rtx (&insn
, insert_loop_mem
, loop_info
);
2603 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2604 that loop_invariant_p and load_mems can use true_dependence
2605 to determine what is really clobbered. */
2606 if (loop_info
->unknown_address_altered
)
2608 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2610 loop_info
->store_mems
2611 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2613 if (loop_info
->unknown_constant_address_altered
)
2615 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2617 RTX_UNCHANGING_P (mem
) = 1;
2618 loop_info
->store_mems
2619 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2623 /* Invalidate all loops containing LABEL. */
2626 invalidate_loops_containing_label (label
)
2630 for (loop
= uid_loop
[INSN_UID (label
)]; loop
; loop
= loop
->outer
)
2634 /* Scan the function looking for loops. Record the start and end of each loop.
2635 Also mark as invalid loops any loops that contain a setjmp or are branched
2636 to from outside the loop. */
2639 find_and_verify_loops (f
, loops
)
2641 struct loops
*loops
;
2646 struct loop
*current_loop
;
2647 struct loop
*next_loop
;
2650 num_loops
= loops
->num
;
2652 compute_luids (f
, NULL_RTX
, 0);
2654 /* If there are jumps to undefined labels,
2655 treat them as jumps out of any/all loops.
2656 This also avoids writing past end of tables when there are no loops. */
2659 /* Find boundaries of loops, mark which loops are contained within
2660 loops, and invalidate loops that have setjmp. */
2663 current_loop
= NULL
;
2664 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2666 if (GET_CODE (insn
) == NOTE
)
2667 switch (NOTE_LINE_NUMBER (insn
))
2669 case NOTE_INSN_LOOP_BEG
:
2670 next_loop
= loops
->array
+ num_loops
;
2671 next_loop
->num
= num_loops
;
2673 next_loop
->start
= insn
;
2674 next_loop
->outer
= current_loop
;
2675 current_loop
= next_loop
;
2678 case NOTE_INSN_LOOP_CONT
:
2679 current_loop
->cont
= insn
;
2682 case NOTE_INSN_LOOP_VTOP
:
2683 current_loop
->vtop
= insn
;
2686 case NOTE_INSN_LOOP_END
:
2690 current_loop
->end
= insn
;
2691 current_loop
= current_loop
->outer
;
2698 if (GET_CODE (insn
) == CALL_INSN
2699 && find_reg_note (insn
, REG_SETJMP
, NULL
))
2701 /* In this case, we must invalidate our current loop and any
2703 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
2706 if (loop_dump_stream
)
2707 fprintf (loop_dump_stream
,
2708 "\nLoop at %d ignored due to setjmp.\n",
2709 INSN_UID (loop
->start
));
2713 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2714 enclosing loop, but this doesn't matter. */
2715 uid_loop
[INSN_UID (insn
)] = current_loop
;
2718 /* Any loop containing a label used in an initializer must be invalidated,
2719 because it can be jumped into from anywhere. */
2720 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2721 invalidate_loops_containing_label (XEXP (label
, 0));
2723 /* Any loop containing a label used for an exception handler must be
2724 invalidated, because it can be jumped into from anywhere. */
2725 for_each_eh_label (invalidate_loops_containing_label
);
2727 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2728 loop that it is not contained within, that loop is marked invalid.
2729 If any INSN or CALL_INSN uses a label's address, then the loop containing
2730 that label is marked invalid, because it could be jumped into from
2733 Also look for blocks of code ending in an unconditional branch that
2734 exits the loop. If such a block is surrounded by a conditional
2735 branch around the block, move the block elsewhere (see below) and
2736 invert the jump to point to the code block. This may eliminate a
2737 label in our loop and will simplify processing by both us and a
2738 possible second cse pass. */
2740 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2743 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
2745 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2747 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2749 invalidate_loops_containing_label (XEXP (note
, 0));
2752 if (GET_CODE (insn
) != JUMP_INSN
)
2755 mark_loop_jump (PATTERN (insn
), this_loop
);
2757 /* See if this is an unconditional branch outside the loop. */
2759 && (GET_CODE (PATTERN (insn
)) == RETURN
2760 || (any_uncondjump_p (insn
)
2761 && onlyjump_p (insn
)
2762 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
2764 && get_max_uid () < max_uid_for_loop
)
2767 rtx our_next
= next_real_insn (insn
);
2768 rtx last_insn_to_move
= NEXT_INSN (insn
);
2769 struct loop
*dest_loop
;
2770 struct loop
*outer_loop
= NULL
;
2772 /* Go backwards until we reach the start of the loop, a label,
2774 for (p
= PREV_INSN (insn
);
2775 GET_CODE (p
) != CODE_LABEL
2776 && ! (GET_CODE (p
) == NOTE
2777 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2778 && GET_CODE (p
) != JUMP_INSN
;
2782 /* Check for the case where we have a jump to an inner nested
2783 loop, and do not perform the optimization in that case. */
2785 if (JUMP_LABEL (insn
))
2787 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
2790 for (outer_loop
= dest_loop
; outer_loop
;
2791 outer_loop
= outer_loop
->outer
)
2792 if (outer_loop
== this_loop
)
2797 /* Make sure that the target of P is within the current loop. */
2799 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2800 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
2801 outer_loop
= this_loop
;
2803 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2804 we have a block of code to try to move.
2806 We look backward and then forward from the target of INSN
2807 to find a BARRIER at the same loop depth as the target.
2808 If we find such a BARRIER, we make a new label for the start
2809 of the block, invert the jump in P and point it to that label,
2810 and move the block of code to the spot we found. */
2813 && GET_CODE (p
) == JUMP_INSN
2814 && JUMP_LABEL (p
) != 0
2815 /* Just ignore jumps to labels that were never emitted.
2816 These always indicate compilation errors. */
2817 && INSN_UID (JUMP_LABEL (p
)) != 0
2818 && any_condjump_p (p
) && onlyjump_p (p
)
2819 && next_real_insn (JUMP_LABEL (p
)) == our_next
2820 /* If it's not safe to move the sequence, then we
2822 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
2823 &last_insn_to_move
))
2826 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2827 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
2831 /* Search for possible garbage past the conditional jumps
2832 and look for the last barrier. */
2833 for (tmp
= last_insn_to_move
;
2834 tmp
&& GET_CODE (tmp
) != CODE_LABEL
; tmp
= NEXT_INSN (tmp
))
2835 if (GET_CODE (tmp
) == BARRIER
)
2836 last_insn_to_move
= tmp
;
2838 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2839 if (GET_CODE (loc
) == BARRIER
2840 /* Don't move things inside a tablejump. */
2841 && ((loc2
= next_nonnote_insn (loc
)) == 0
2842 || GET_CODE (loc2
) != CODE_LABEL
2843 || (loc2
= next_nonnote_insn (loc2
)) == 0
2844 || GET_CODE (loc2
) != JUMP_INSN
2845 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2846 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2847 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2851 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2852 if (GET_CODE (loc
) == BARRIER
2853 /* Don't move things inside a tablejump. */
2854 && ((loc2
= next_nonnote_insn (loc
)) == 0
2855 || GET_CODE (loc2
) != CODE_LABEL
2856 || (loc2
= next_nonnote_insn (loc2
)) == 0
2857 || GET_CODE (loc2
) != JUMP_INSN
2858 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2859 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2860 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2865 rtx cond_label
= JUMP_LABEL (p
);
2866 rtx new_label
= get_label_after (p
);
2868 /* Ensure our label doesn't go away. */
2869 LABEL_NUSES (cond_label
)++;
2871 /* Verify that uid_loop is large enough and that
2873 if (invert_jump (p
, new_label
, 1))
2877 /* If no suitable BARRIER was found, create a suitable
2878 one before TARGET. Since TARGET is a fall through
2879 path, we'll need to insert a jump around our block
2880 and add a BARRIER before TARGET.
2882 This creates an extra unconditional jump outside
2883 the loop. However, the benefits of removing rarely
2884 executed instructions from inside the loop usually
2885 outweighs the cost of the extra unconditional jump
2886 outside the loop. */
2891 temp
= gen_jump (JUMP_LABEL (insn
));
2892 temp
= emit_jump_insn_before (temp
, target
);
2893 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2894 LABEL_NUSES (JUMP_LABEL (insn
))++;
2895 loc
= emit_barrier_before (target
);
2898 /* Include the BARRIER after INSN and copy the
2900 if (squeeze_notes (&new_label
, &last_insn_to_move
))
2902 reorder_insns (new_label
, last_insn_to_move
, loc
);
2904 /* All those insns are now in TARGET_LOOP. */
2906 q
!= NEXT_INSN (last_insn_to_move
);
2908 uid_loop
[INSN_UID (q
)] = target_loop
;
2910 /* The label jumped to by INSN is no longer a loop
2911 exit. Unless INSN does not have a label (e.g.,
2912 it is a RETURN insn), search loop->exit_labels
2913 to find its label_ref, and remove it. Also turn
2914 off LABEL_OUTSIDE_LOOP_P bit. */
2915 if (JUMP_LABEL (insn
))
2917 for (q
= 0, r
= this_loop
->exit_labels
;
2919 q
= r
, r
= LABEL_NEXTREF (r
))
2920 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2922 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2924 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2926 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
2930 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
2934 /* If we didn't find it, then something is
2940 /* P is now a jump outside the loop, so it must be put
2941 in loop->exit_labels, and marked as such.
2942 The easiest way to do this is to just call
2943 mark_loop_jump again for P. */
2944 mark_loop_jump (PATTERN (p
), this_loop
);
2946 /* If INSN now jumps to the insn after it,
2948 if (JUMP_LABEL (insn
) != 0
2949 && (next_real_insn (JUMP_LABEL (insn
))
2950 == next_real_insn (insn
)))
2951 delete_related_insns (insn
);
2954 /* Continue the loop after where the conditional
2955 branch used to jump, since the only branch insn
2956 in the block (if it still remains) is an inter-loop
2957 branch and hence needs no processing. */
2958 insn
= NEXT_INSN (cond_label
);
2960 if (--LABEL_NUSES (cond_label
) == 0)
2961 delete_related_insns (cond_label
);
2963 /* This loop will be continued with NEXT_INSN (insn). */
2964 insn
= PREV_INSN (insn
);
2971 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2972 loops it is contained in, mark the target loop invalid.
2974 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2977 mark_loop_jump (x
, loop
)
2981 struct loop
*dest_loop
;
2982 struct loop
*outer_loop
;
2985 switch (GET_CODE (x
))
2998 /* There could be a label reference in here. */
2999 mark_loop_jump (XEXP (x
, 0), loop
);
3005 mark_loop_jump (XEXP (x
, 0), loop
);
3006 mark_loop_jump (XEXP (x
, 1), loop
);
3010 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3011 mark_loop_jump (XEXP (x
, 1), loop
);
3016 mark_loop_jump (XEXP (x
, 0), loop
);
3020 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
3022 /* Link together all labels that branch outside the loop. This
3023 is used by final_[bg]iv_value and the loop unrolling code. Also
3024 mark this LABEL_REF so we know that this branch should predict
3027 /* A check to make sure the label is not in an inner nested loop,
3028 since this does not count as a loop exit. */
3031 for (outer_loop
= dest_loop
; outer_loop
;
3032 outer_loop
= outer_loop
->outer
)
3033 if (outer_loop
== loop
)
3039 if (loop
&& ! outer_loop
)
3041 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3042 LABEL_NEXTREF (x
) = loop
->exit_labels
;
3043 loop
->exit_labels
= x
;
3045 for (outer_loop
= loop
;
3046 outer_loop
&& outer_loop
!= dest_loop
;
3047 outer_loop
= outer_loop
->outer
)
3048 outer_loop
->exit_count
++;
3051 /* If this is inside a loop, but not in the current loop or one enclosed
3052 by it, it invalidates at least one loop. */
3057 /* We must invalidate every nested loop containing the target of this
3058 label, except those that also contain the jump insn. */
3060 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
3062 /* Stop when we reach a loop that also contains the jump insn. */
3063 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3064 if (dest_loop
== outer_loop
)
3067 /* If we get here, we know we need to invalidate a loop. */
3068 if (loop_dump_stream
&& ! dest_loop
->invalid
)
3069 fprintf (loop_dump_stream
,
3070 "\nLoop at %d ignored due to multiple entry points.\n",
3071 INSN_UID (dest_loop
->start
));
3073 dest_loop
->invalid
= 1;
3078 /* If this is not setting pc, ignore. */
3079 if (SET_DEST (x
) == pc_rtx
)
3080 mark_loop_jump (SET_SRC (x
), loop
);
3084 mark_loop_jump (XEXP (x
, 1), loop
);
3085 mark_loop_jump (XEXP (x
, 2), loop
);
3090 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3091 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
3095 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3096 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
3100 /* Strictly speaking this is not a jump into the loop, only a possible
3101 jump out of the loop. However, we have no way to link the destination
3102 of this jump onto the list of exit labels. To be safe we mark this
3103 loop and any containing loops as invalid. */
3106 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3108 if (loop_dump_stream
&& ! outer_loop
->invalid
)
3109 fprintf (loop_dump_stream
,
3110 "\nLoop at %d ignored due to unknown exit jump.\n",
3111 INSN_UID (outer_loop
->start
));
3112 outer_loop
->invalid
= 1;
3119 /* Return nonzero if there is a label in the range from
3120 insn INSN to and including the insn whose luid is END
3121 INSN must have an assigned luid (i.e., it must not have
3122 been previously created by loop.c). */
3125 labels_in_range_p (insn
, end
)
3129 while (insn
&& INSN_LUID (insn
) <= end
)
3131 if (GET_CODE (insn
) == CODE_LABEL
)
3133 insn
= NEXT_INSN (insn
);
3139 /* Record that a memory reference X is being set. */
3142 note_addr_stored (x
, y
, data
)
3144 rtx y ATTRIBUTE_UNUSED
;
3145 void *data ATTRIBUTE_UNUSED
;
3147 struct loop_info
*loop_info
= data
;
3149 if (x
== 0 || GET_CODE (x
) != MEM
)
3152 /* Count number of memory writes.
3153 This affects heuristics in strength_reduce. */
3154 loop_info
->num_mem_sets
++;
3156 /* BLKmode MEM means all memory is clobbered. */
3157 if (GET_MODE (x
) == BLKmode
)
3159 if (RTX_UNCHANGING_P (x
))
3160 loop_info
->unknown_constant_address_altered
= 1;
3162 loop_info
->unknown_address_altered
= 1;
3167 loop_info
->store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
,
3168 loop_info
->store_mems
);
3171 /* X is a value modified by an INSN that references a biv inside a loop
3172 exit test (ie, X is somehow related to the value of the biv). If X
3173 is a pseudo that is used more than once, then the biv is (effectively)
3174 used more than once. DATA is a pointer to a loop_regs structure. */
3177 note_set_pseudo_multiple_uses (x
, y
, data
)
3179 rtx y ATTRIBUTE_UNUSED
;
3182 struct loop_regs
*regs
= (struct loop_regs
*) data
;
3187 while (GET_CODE (x
) == STRICT_LOW_PART
3188 || GET_CODE (x
) == SIGN_EXTRACT
3189 || GET_CODE (x
) == ZERO_EXTRACT
3190 || GET_CODE (x
) == SUBREG
)
3193 if (GET_CODE (x
) != REG
|| REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3196 /* If we do not have usage information, or if we know the register
3197 is used more than once, note that fact for check_dbra_loop. */
3198 if (REGNO (x
) >= max_reg_before_loop
3199 || ! regs
->array
[REGNO (x
)].single_usage
3200 || regs
->array
[REGNO (x
)].single_usage
== const0_rtx
)
3201 regs
->multiple_uses
= 1;
3204 /* Return nonzero if the rtx X is invariant over the current loop.
3206 The value is 2 if we refer to something only conditionally invariant.
3208 A memory ref is invariant if it is not volatile and does not conflict
3209 with anything stored in `loop_info->store_mems'. */
3212 loop_invariant_p (loop
, x
)
3213 const struct loop
*loop
;
3216 struct loop_info
*loop_info
= LOOP_INFO (loop
);
3217 struct loop_regs
*regs
= LOOP_REGS (loop
);
3221 int conditional
= 0;
3226 code
= GET_CODE (x
);
3236 /* A LABEL_REF is normally invariant, however, if we are unrolling
3237 loops, and this label is inside the loop, then it isn't invariant.
3238 This is because each unrolled copy of the loop body will have
3239 a copy of this label. If this was invariant, then an insn loading
3240 the address of this label into a register might get moved outside
3241 the loop, and then each loop body would end up using the same label.
3243 We don't know the loop bounds here though, so just fail for all
3245 if (flag_unroll_loops
)
3252 case UNSPEC_VOLATILE
:
3256 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3257 since the reg might be set by initialization within the loop. */
3259 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3260 || x
== arg_pointer_rtx
|| x
== pic_offset_table_rtx
)
3261 && ! current_function_has_nonlocal_goto
)
3264 if (LOOP_INFO (loop
)->has_call
3265 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3268 /* Out-of-range regs can occur when we are called from unrolling.
3269 These have always been created by the unroller and are set in
3270 the loop, hence are never invariant. */
3272 if (REGNO (x
) >= regs
->num
)
3275 if (regs
->array
[REGNO (x
)].set_in_loop
< 0)
3278 return regs
->array
[REGNO (x
)].set_in_loop
== 0;
3281 /* Volatile memory references must be rejected. Do this before
3282 checking for read-only items, so that volatile read-only items
3283 will be rejected also. */
3284 if (MEM_VOLATILE_P (x
))
3287 /* See if there is any dependence between a store and this load. */
3288 mem_list_entry
= loop_info
->store_mems
;
3289 while (mem_list_entry
)
3291 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3295 mem_list_entry
= XEXP (mem_list_entry
, 1);
3298 /* It's not invalidated by a store in memory
3299 but we must still verify the address is invariant. */
3303 /* Don't mess with insns declared volatile. */
3304 if (MEM_VOLATILE_P (x
))
3312 fmt
= GET_RTX_FORMAT (code
);
3313 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3317 int tem
= loop_invariant_p (loop
, XEXP (x
, i
));
3323 else if (fmt
[i
] == 'E')
3326 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3328 int tem
= loop_invariant_p (loop
, XVECEXP (x
, i
, j
));
3338 return 1 + conditional
;
3341 /* Return nonzero if all the insns in the loop that set REG
3342 are INSN and the immediately following insns,
3343 and if each of those insns sets REG in an invariant way
3344 (not counting uses of REG in them).
3346 The value is 2 if some of these insns are only conditionally invariant.
3348 We assume that INSN itself is the first set of REG
3349 and that its source is invariant. */
3352 consec_sets_invariant_p (loop
, reg
, n_sets
, insn
)
3353 const struct loop
*loop
;
3357 struct loop_regs
*regs
= LOOP_REGS (loop
);
3359 unsigned int regno
= REGNO (reg
);
3361 /* Number of sets we have to insist on finding after INSN. */
3362 int count
= n_sets
- 1;
3363 int old
= regs
->array
[regno
].set_in_loop
;
3367 /* If N_SETS hit the limit, we can't rely on its value. */
3371 regs
->array
[regno
].set_in_loop
= 0;
3379 code
= GET_CODE (p
);
3381 /* If library call, skip to end of it. */
3382 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3387 && (set
= single_set (p
))
3388 && GET_CODE (SET_DEST (set
)) == REG
3389 && REGNO (SET_DEST (set
)) == regno
)
3391 this = loop_invariant_p (loop
, SET_SRC (set
));
3394 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3396 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3397 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3399 this = (CONSTANT_P (XEXP (temp
, 0))
3400 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3401 && loop_invariant_p (loop
, XEXP (temp
, 0))));
3408 else if (code
!= NOTE
)
3410 regs
->array
[regno
].set_in_loop
= old
;
3415 regs
->array
[regno
].set_in_loop
= old
;
3416 /* If loop_invariant_p ever returned 2, we return 2. */
3417 return 1 + (value
& 2);
3421 /* I don't think this condition is sufficient to allow INSN
3422 to be moved, so we no longer test it. */
3424 /* Return 1 if all insns in the basic block of INSN and following INSN
3425 that set REG are invariant according to TABLE. */
3428 all_sets_invariant_p (reg
, insn
, table
)
3433 int regno
= REGNO (reg
);
3439 code
= GET_CODE (p
);
3440 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3442 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3443 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3444 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3446 if (! loop_invariant_p (loop
, SET_SRC (PATTERN (p
)), table
))
3453 /* Look at all uses (not sets) of registers in X. For each, if it is
3454 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3455 a different insn, set USAGE[REGNO] to const0_rtx. */
3458 find_single_use_in_loop (regs
, insn
, x
)
3459 struct loop_regs
*regs
;
3463 enum rtx_code code
= GET_CODE (x
);
3464 const char *fmt
= GET_RTX_FORMAT (code
);
3468 regs
->array
[REGNO (x
)].single_usage
3469 = (regs
->array
[REGNO (x
)].single_usage
!= 0
3470 && regs
->array
[REGNO (x
)].single_usage
!= insn
)
3471 ? const0_rtx
: insn
;
3473 else if (code
== SET
)
3475 /* Don't count SET_DEST if it is a REG; otherwise count things
3476 in SET_DEST because if a register is partially modified, it won't
3477 show up as a potential movable so we don't care how USAGE is set
3479 if (GET_CODE (SET_DEST (x
)) != REG
)
3480 find_single_use_in_loop (regs
, insn
, SET_DEST (x
));
3481 find_single_use_in_loop (regs
, insn
, SET_SRC (x
));
3484 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3486 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3487 find_single_use_in_loop (regs
, insn
, XEXP (x
, i
));
3488 else if (fmt
[i
] == 'E')
3489 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3490 find_single_use_in_loop (regs
, insn
, XVECEXP (x
, i
, j
));
3494 /* Count and record any set in X which is contained in INSN. Update
3495 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3499 count_one_set (regs
, insn
, x
, last_set
)
3500 struct loop_regs
*regs
;
3504 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3505 /* Don't move a reg that has an explicit clobber.
3506 It's not worth the pain to try to do it correctly. */
3507 regs
->array
[REGNO (XEXP (x
, 0))].may_not_optimize
= 1;
3509 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3511 rtx dest
= SET_DEST (x
);
3512 while (GET_CODE (dest
) == SUBREG
3513 || GET_CODE (dest
) == ZERO_EXTRACT
3514 || GET_CODE (dest
) == SIGN_EXTRACT
3515 || GET_CODE (dest
) == STRICT_LOW_PART
)
3516 dest
= XEXP (dest
, 0);
3517 if (GET_CODE (dest
) == REG
)
3520 int regno
= REGNO (dest
);
3521 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, dest
); i
++)
3523 /* If this is the first setting of this reg
3524 in current basic block, and it was set before,
3525 it must be set in two basic blocks, so it cannot
3526 be moved out of the loop. */
3527 if (regs
->array
[regno
].set_in_loop
> 0
3529 regs
->array
[regno
+i
].may_not_optimize
= 1;
3530 /* If this is not first setting in current basic block,
3531 see if reg was used in between previous one and this.
3532 If so, neither one can be moved. */
3533 if (last_set
[regno
] != 0
3534 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3535 regs
->array
[regno
+i
].may_not_optimize
= 1;
3536 if (regs
->array
[regno
+i
].set_in_loop
< 127)
3537 ++regs
->array
[regno
+i
].set_in_loop
;
3538 last_set
[regno
+i
] = insn
;
3544 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3545 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3546 contained in insn INSN is used by any insn that precedes INSN in
3547 cyclic order starting from the loop entry point.
3549 We don't want to use INSN_LUID here because if we restrict INSN to those
3550 that have a valid INSN_LUID, it means we cannot move an invariant out
3551 from an inner loop past two loops. */
3554 loop_reg_used_before_p (loop
, set
, insn
)
3555 const struct loop
*loop
;
3558 rtx reg
= SET_DEST (set
);
3561 /* Scan forward checking for register usage. If we hit INSN, we
3562 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3563 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3565 if (INSN_P (p
) && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3576 /* Information we collect about arrays that we might want to prefetch. */
3577 struct prefetch_info
3579 struct iv_class
*class; /* Class this prefetch is based on. */
3580 struct induction
*giv
; /* GIV this prefetch is based on. */
3581 rtx base_address
; /* Start prefetching from this address plus
3583 HOST_WIDE_INT index
;
3584 HOST_WIDE_INT stride
; /* Prefetch stride in bytes in each
3586 unsigned int bytes_accessed
; /* Sum of sizes of all accesses to this
3587 prefetch area in one iteration. */
3588 unsigned int total_bytes
; /* Total bytes loop will access in this block.
3589 This is set only for loops with known
3590 iteration counts and is 0xffffffff
3592 int prefetch_in_loop
; /* Number of prefetch insns in loop. */
3593 int prefetch_before_loop
; /* Number of prefetch insns before loop. */
3594 unsigned int write
: 1; /* 1 for read/write prefetches. */
3597 /* Data used by check_store function. */
3598 struct check_store_data
3604 static void check_store
PARAMS ((rtx
, rtx
, void *));
3605 static void emit_prefetch_instructions
PARAMS ((struct loop
*));
3606 static int rtx_equal_for_prefetch_p
PARAMS ((rtx
, rtx
));
3608 /* Set mem_write when mem_address is found. Used as callback to
3611 check_store (x
, pat
, data
)
3612 rtx x
, pat ATTRIBUTE_UNUSED
;
3615 struct check_store_data
*d
= (struct check_store_data
*) data
;
3617 if ((GET_CODE (x
) == MEM
) && rtx_equal_p (d
->mem_address
, XEXP (x
, 0)))
3621 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3622 important to get some addresses combined. Later more sophisticated
3623 transformations can be added when necesary.
3625 ??? Same trick with swapping operand is done at several other places.
3626 It can be nice to develop some common way to handle this. */
3629 rtx_equal_for_prefetch_p (x
, y
)
3634 enum rtx_code code
= GET_CODE (x
);
3639 if (code
!= GET_CODE (y
))
3642 code
= GET_CODE (x
);
3644 if (GET_RTX_CLASS (code
) == 'c')
3646 return ((rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 0))
3647 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 1)))
3648 || (rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 1))
3649 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 0))));
3651 /* Compare the elements. If any pair of corresponding elements fails to
3652 match, return 0 for the whole thing. */
3654 fmt
= GET_RTX_FORMAT (code
);
3655 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3660 if (XWINT (x
, i
) != XWINT (y
, i
))
3665 if (XINT (x
, i
) != XINT (y
, i
))
3670 /* Two vectors must have the same length. */
3671 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
3674 /* And the corresponding elements must match. */
3675 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3676 if (rtx_equal_for_prefetch_p (XVECEXP (x
, i
, j
),
3677 XVECEXP (y
, i
, j
)) == 0)
3682 if (rtx_equal_for_prefetch_p (XEXP (x
, i
), XEXP (y
, i
)) == 0)
3687 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
3692 /* These are just backpointers, so they don't matter. */
3698 /* It is believed that rtx's at this level will never
3699 contain anything but integers and other rtx's,
3700 except for within LABEL_REFs and SYMBOL_REFs. */
3708 /* Remove constant addition value from the expression X (when present)
3711 static HOST_WIDE_INT
3712 remove_constant_addition (x
)
3715 HOST_WIDE_INT addval
= 0;
3718 /* Avoid clobbering a shared CONST expression. */
3719 if (GET_CODE (exp
) == CONST
)
3721 if (GET_CODE (XEXP (exp
, 0)) == PLUS
3722 && GET_CODE (XEXP (XEXP (exp
, 0), 0)) == SYMBOL_REF
3723 && GET_CODE (XEXP (XEXP (exp
, 0), 1)) == CONST_INT
)
3725 *x
= XEXP (XEXP (exp
, 0), 0);
3726 return INTVAL (XEXP (XEXP (exp
, 0), 1));
3731 if (GET_CODE (exp
) == CONST_INT
)
3733 addval
= INTVAL (exp
);
3737 /* For plus expression recurse on ourself. */
3738 else if (GET_CODE (exp
) == PLUS
)
3740 addval
+= remove_constant_addition (&XEXP (exp
, 0));
3741 addval
+= remove_constant_addition (&XEXP (exp
, 1));
3743 /* In case our parameter was constant, remove extra zero from the
3745 if (XEXP (exp
, 0) == const0_rtx
)
3747 else if (XEXP (exp
, 1) == const0_rtx
)
3754 /* Attempt to identify accesses to arrays that are most likely to cause cache
3755 misses, and emit prefetch instructions a few prefetch blocks forward.
3757 To detect the arrays we use the GIV information that was collected by the
3758 strength reduction pass.
3760 The prefetch instructions are generated after the GIV information is done
3761 and before the strength reduction process. The new GIVs are injected into
3762 the strength reduction tables, so the prefetch addresses are optimized as
3765 GIVs are split into base address, stride, and constant addition values.
3766 GIVs with the same address, stride and close addition values are combined
3767 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3768 for write instructions can be used for the block we write to, on machines
3769 that support write prefetches.
3771 Several heuristics are used to determine when to prefetch. They are
3772 controlled by defined symbols that can be overridden for each target. */
3775 emit_prefetch_instructions (loop
)
3778 int num_prefetches
= 0;
3779 int num_real_prefetches
= 0;
3780 int num_real_write_prefetches
= 0;
3781 int num_prefetches_before
= 0;
3782 int num_write_prefetches_before
= 0;
3785 struct iv_class
*bl
;
3786 struct induction
*iv
;
3787 struct prefetch_info info
[MAX_PREFETCHES
];
3788 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3793 /* Consider only loops w/o calls. When a call is done, the loop is probably
3794 slow enough to read the memory. */
3795 if (PREFETCH_NO_CALL
&& LOOP_INFO (loop
)->has_call
)
3797 if (loop_dump_stream
)
3798 fprintf (loop_dump_stream
, "Prefetch: ignoring loop: has call.\n");
3803 /* Don't prefetch in loops known to have few iterations. */
3804 if (PREFETCH_NO_LOW_LOOPCNT
3805 && LOOP_INFO (loop
)->n_iterations
3806 && LOOP_INFO (loop
)->n_iterations
<= PREFETCH_LOW_LOOPCNT
)
3808 if (loop_dump_stream
)
3809 fprintf (loop_dump_stream
,
3810 "Prefetch: ignoring loop: not enough iterations.\n");
3814 /* Search all induction variables and pick those interesting for the prefetch
3816 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
3818 struct induction
*biv
= bl
->biv
, *biv1
;
3823 /* Expect all BIVs to be executed in each iteration. This makes our
3824 analysis more conservative. */
3827 /* Discard non-constant additions that we can't handle well yet, and
3828 BIVs that are executed multiple times; such BIVs ought to be
3829 handled in the nested loop. We accept not_every_iteration BIVs,
3830 since these only result in larger strides and make our
3831 heuristics more conservative. */
3832 if (GET_CODE (biv
->add_val
) != CONST_INT
)
3834 if (loop_dump_stream
)
3836 fprintf (loop_dump_stream
,
3837 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3838 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3839 print_rtl (loop_dump_stream
, biv
->add_val
);
3840 fprintf (loop_dump_stream
, "\n");
3845 if (biv
->maybe_multiple
)
3847 if (loop_dump_stream
)
3849 fprintf (loop_dump_stream
,
3850 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3851 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3852 print_rtl (loop_dump_stream
, biv
->add_val
);
3853 fprintf (loop_dump_stream
, "\n");
3858 basestride
+= INTVAL (biv1
->add_val
);
3859 biv1
= biv1
->next_iv
;
3862 if (biv1
|| !basestride
)
3865 for (iv
= bl
->giv
; iv
; iv
= iv
->next_iv
)
3869 HOST_WIDE_INT index
= 0;
3871 HOST_WIDE_INT stride
= 0;
3872 int stride_sign
= 1;
3873 struct check_store_data d
;
3874 const char *ignore_reason
= NULL
;
3875 int size
= GET_MODE_SIZE (GET_MODE (iv
));
3877 /* See whether an induction variable is interesting to us and if
3878 not, report the reason. */
3879 if (iv
->giv_type
!= DEST_ADDR
)
3880 ignore_reason
= "giv is not a destination address";
3882 /* We are interested only in constant stride memory references
3883 in order to be able to compute density easily. */
3884 else if (GET_CODE (iv
->mult_val
) != CONST_INT
)
3885 ignore_reason
= "stride is not constant";
3889 stride
= INTVAL (iv
->mult_val
) * basestride
;
3896 /* On some targets, reversed order prefetches are not
3898 if (PREFETCH_NO_REVERSE_ORDER
&& stride_sign
< 0)
3899 ignore_reason
= "reversed order stride";
3901 /* Prefetch of accesses with an extreme stride might not be
3902 worthwhile, either. */
3903 else if (PREFETCH_NO_EXTREME_STRIDE
3904 && stride
> PREFETCH_EXTREME_STRIDE
)
3905 ignore_reason
= "extreme stride";
3907 /* Ignore GIVs with varying add values; we can't predict the
3908 value for the next iteration. */
3909 else if (!loop_invariant_p (loop
, iv
->add_val
))
3910 ignore_reason
= "giv has varying add value";
3912 /* Ignore GIVs in the nested loops; they ought to have been
3914 else if (iv
->maybe_multiple
)
3915 ignore_reason
= "giv is in nested loop";
3918 if (ignore_reason
!= NULL
)
3920 if (loop_dump_stream
)
3921 fprintf (loop_dump_stream
,
3922 "Prefetch: ignoring giv at %d: %s.\n",
3923 INSN_UID (iv
->insn
), ignore_reason
);
3927 /* Determine the pointer to the basic array we are examining. It is
3928 the sum of the BIV's initial value and the GIV's add_val. */
3929 address
= copy_rtx (iv
->add_val
);
3930 temp
= copy_rtx (bl
->initial_value
);
3932 address
= simplify_gen_binary (PLUS
, Pmode
, temp
, address
);
3933 index
= remove_constant_addition (&address
);
3936 d
.mem_address
= *iv
->location
;
3938 /* When the GIV is not always executed, we might be better off by
3939 not dirtying the cache pages. */
3940 if (PREFETCH_CONDITIONAL
|| iv
->always_executed
)
3941 note_stores (PATTERN (iv
->insn
), check_store
, &d
);
3944 if (loop_dump_stream
)
3945 fprintf (loop_dump_stream
, "Prefetch: Ignoring giv at %d: %s\n",
3946 INSN_UID (iv
->insn
), "in conditional code.");
3950 /* Attempt to find another prefetch to the same array and see if we
3951 can merge this one. */
3952 for (i
= 0; i
< num_prefetches
; i
++)
3953 if (rtx_equal_for_prefetch_p (address
, info
[i
].base_address
)
3954 && stride
== info
[i
].stride
)
3956 /* In case both access same array (same location
3957 just with small difference in constant indexes), merge
3958 the prefetches. Just do the later and the earlier will
3959 get prefetched from previous iteration.
3960 The artificial threshold should not be too small,
3961 but also not bigger than small portion of memory usually
3962 traversed by single loop. */
3963 if (index
>= info
[i
].index
3964 && index
- info
[i
].index
< PREFETCH_EXTREME_DIFFERENCE
)
3966 info
[i
].write
|= d
.mem_write
;
3967 info
[i
].bytes_accessed
+= size
;
3968 info
[i
].index
= index
;
3971 info
[num_prefetches
].base_address
= address
;
3976 if (index
< info
[i
].index
3977 && info
[i
].index
- index
< PREFETCH_EXTREME_DIFFERENCE
)
3979 info
[i
].write
|= d
.mem_write
;
3980 info
[i
].bytes_accessed
+= size
;
3986 /* Merging failed. */
3989 info
[num_prefetches
].giv
= iv
;
3990 info
[num_prefetches
].class = bl
;
3991 info
[num_prefetches
].index
= index
;
3992 info
[num_prefetches
].stride
= stride
;
3993 info
[num_prefetches
].base_address
= address
;
3994 info
[num_prefetches
].write
= d
.mem_write
;
3995 info
[num_prefetches
].bytes_accessed
= size
;
3997 if (num_prefetches
>= MAX_PREFETCHES
)
3999 if (loop_dump_stream
)
4000 fprintf (loop_dump_stream
,
4001 "Maximal number of prefetches exceeded.\n");
4008 for (i
= 0; i
< num_prefetches
; i
++)
4012 /* Attempt to calculate the total number of bytes fetched by all
4013 iterations of the loop. Avoid overflow. */
4014 if (LOOP_INFO (loop
)->n_iterations
4015 && ((unsigned HOST_WIDE_INT
) (0xffffffff / info
[i
].stride
)
4016 >= LOOP_INFO (loop
)->n_iterations
))
4017 info
[i
].total_bytes
= info
[i
].stride
* LOOP_INFO (loop
)->n_iterations
;
4019 info
[i
].total_bytes
= 0xffffffff;
4021 density
= info
[i
].bytes_accessed
* 100 / info
[i
].stride
;
4023 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4024 if (PREFETCH_ONLY_DENSE_MEM
)
4025 if (density
* 256 > PREFETCH_DENSE_MEM
* 100
4026 && (info
[i
].total_bytes
/ PREFETCH_BLOCK
4027 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN
))
4029 info
[i
].prefetch_before_loop
= 1;
4030 info
[i
].prefetch_in_loop
4031 = (info
[i
].total_bytes
/ PREFETCH_BLOCK
4032 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX
);
4036 info
[i
].prefetch_in_loop
= 0, info
[i
].prefetch_before_loop
= 0;
4037 if (loop_dump_stream
)
4038 fprintf (loop_dump_stream
,
4039 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4040 INSN_UID (info
[i
].giv
->insn
), density
);
4043 info
[i
].prefetch_in_loop
= 1, info
[i
].prefetch_before_loop
= 1;
4045 /* Find how many prefetch instructions we'll use within the loop. */
4046 if (info
[i
].prefetch_in_loop
!= 0)
4048 info
[i
].prefetch_in_loop
= ((info
[i
].stride
+ PREFETCH_BLOCK
- 1)
4050 num_real_prefetches
+= info
[i
].prefetch_in_loop
;
4052 num_real_write_prefetches
+= info
[i
].prefetch_in_loop
;
4056 /* Determine how many iterations ahead to prefetch within the loop, based
4057 on how many prefetches we currently expect to do within the loop. */
4058 if (num_real_prefetches
!= 0)
4060 if ((ahead
= SIMULTANEOUS_PREFETCHES
/ num_real_prefetches
) == 0)
4062 if (loop_dump_stream
)
4063 fprintf (loop_dump_stream
,
4064 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4065 SIMULTANEOUS_PREFETCHES
, num_real_prefetches
);
4066 num_real_prefetches
= 0, num_real_write_prefetches
= 0;
4069 /* We'll also use AHEAD to determine how many prefetch instructions to
4070 emit before a loop, so don't leave it zero. */
4072 ahead
= PREFETCH_BLOCKS_BEFORE_LOOP_MAX
;
4074 for (i
= 0; i
< num_prefetches
; i
++)
4076 /* Update if we've decided not to prefetch anything within the loop. */
4077 if (num_real_prefetches
== 0)
4078 info
[i
].prefetch_in_loop
= 0;
4080 /* Find how many prefetch instructions we'll use before the loop. */
4081 if (info
[i
].prefetch_before_loop
!= 0)
4083 int n
= info
[i
].total_bytes
/ PREFETCH_BLOCK
;
4086 info
[i
].prefetch_before_loop
= n
;
4087 num_prefetches_before
+= n
;
4089 num_write_prefetches_before
+= n
;
4092 if (loop_dump_stream
)
4094 if (info
[i
].prefetch_in_loop
== 0
4095 && info
[i
].prefetch_before_loop
== 0)
4097 fprintf (loop_dump_stream
, "Prefetch insn: %d",
4098 INSN_UID (info
[i
].giv
->insn
));
4099 fprintf (loop_dump_stream
,
4100 "; in loop: %d; before: %d; %s\n",
4101 info
[i
].prefetch_in_loop
,
4102 info
[i
].prefetch_before_loop
,
4103 info
[i
].write
? "read/write" : "read only");
4104 fprintf (loop_dump_stream
,
4105 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4106 (int) (info
[i
].bytes_accessed
* 100 / info
[i
].stride
),
4107 info
[i
].bytes_accessed
, info
[i
].total_bytes
);
4108 fprintf (loop_dump_stream
, " index: ");
4109 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].index
);
4110 fprintf (loop_dump_stream
, "; stride: ");
4111 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].stride
);
4112 fprintf (loop_dump_stream
, "; address: ");
4113 print_rtl (loop_dump_stream
, info
[i
].base_address
);
4114 fprintf (loop_dump_stream
, "\n");
4118 if (num_real_prefetches
+ num_prefetches_before
> 0)
4120 /* Record that this loop uses prefetch instructions. */
4121 LOOP_INFO (loop
)->has_prefetch
= 1;
4123 if (loop_dump_stream
)
4125 fprintf (loop_dump_stream
, "Real prefetches needed within loop: %d (write: %d)\n",
4126 num_real_prefetches
, num_real_write_prefetches
);
4127 fprintf (loop_dump_stream
, "Real prefetches needed before loop: %d (write: %d)\n",
4128 num_prefetches_before
, num_write_prefetches_before
);
4132 for (i
= 0; i
< num_prefetches
; i
++)
4136 for (y
= 0; y
< info
[i
].prefetch_in_loop
; y
++)
4138 rtx loc
= copy_rtx (*info
[i
].giv
->location
);
4140 int bytes_ahead
= PREFETCH_BLOCK
* (ahead
+ y
);
4141 rtx before_insn
= info
[i
].giv
->insn
;
4142 rtx prev_insn
= PREV_INSN (info
[i
].giv
->insn
);
4145 /* We can save some effort by offsetting the address on
4146 architectures with offsettable memory references. */
4147 if (offsettable_address_p (0, VOIDmode
, loc
))
4148 loc
= plus_constant (loc
, bytes_ahead
);
4151 rtx reg
= gen_reg_rtx (Pmode
);
4152 loop_iv_add_mult_emit_before (loop
, loc
, const1_rtx
,
4153 GEN_INT (bytes_ahead
), reg
,
4159 /* Make sure the address operand is valid for prefetch. */
4160 if (! (*insn_data
[(int)CODE_FOR_prefetch
].operand
[0].predicate
)
4161 (loc
, insn_data
[(int)CODE_FOR_prefetch
].operand
[0].mode
))
4162 loc
= force_reg (Pmode
, loc
);
4163 emit_insn (gen_prefetch (loc
, GEN_INT (info
[i
].write
),
4167 emit_insn_before (seq
, before_insn
);
4169 /* Check all insns emitted and record the new GIV
4171 insn
= NEXT_INSN (prev_insn
);
4172 while (insn
!= before_insn
)
4174 insn
= check_insn_for_givs (loop
, insn
,
4175 info
[i
].giv
->always_executed
,
4176 info
[i
].giv
->maybe_multiple
);
4177 insn
= NEXT_INSN (insn
);
4181 if (PREFETCH_BEFORE_LOOP
)
4183 /* Emit insns before the loop to fetch the first cache lines or,
4184 if we're not prefetching within the loop, everything we expect
4186 for (y
= 0; y
< info
[i
].prefetch_before_loop
; y
++)
4188 rtx reg
= gen_reg_rtx (Pmode
);
4189 rtx loop_start
= loop
->start
;
4190 rtx init_val
= info
[i
].class->initial_value
;
4191 rtx add_val
= simplify_gen_binary (PLUS
, Pmode
,
4192 info
[i
].giv
->add_val
,
4193 GEN_INT (y
* PREFETCH_BLOCK
));
4195 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4196 non-constant INIT_VAL to have the same mode as REG, which
4197 in this case we know to be Pmode. */
4198 if (GET_MODE (init_val
) != Pmode
&& !CONSTANT_P (init_val
))
4199 init_val
= convert_to_mode (Pmode
, init_val
, 0);
4200 loop_iv_add_mult_emit_before (loop
, init_val
,
4201 info
[i
].giv
->mult_val
,
4202 add_val
, reg
, 0, loop_start
);
4203 emit_insn_before (gen_prefetch (reg
, GEN_INT (info
[i
].write
),
4213 /* A "basic induction variable" or biv is a pseudo reg that is set
4214 (within this loop) only by incrementing or decrementing it. */
4215 /* A "general induction variable" or giv is a pseudo reg whose
4216 value is a linear function of a biv. */
4218 /* Bivs are recognized by `basic_induction_var';
4219 Givs by `general_induction_var'. */
4221 /* Communication with routines called via `note_stores'. */
4223 static rtx note_insn
;
4225 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4227 static rtx addr_placeholder
;
4229 /* ??? Unfinished optimizations, and possible future optimizations,
4230 for the strength reduction code. */
4232 /* ??? The interaction of biv elimination, and recognition of 'constant'
4233 bivs, may cause problems. */
4235 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4236 performance problems.
4238 Perhaps don't eliminate things that can be combined with an addressing
4239 mode. Find all givs that have the same biv, mult_val, and add_val;
4240 then for each giv, check to see if its only use dies in a following
4241 memory address. If so, generate a new memory address and check to see
4242 if it is valid. If it is valid, then store the modified memory address,
4243 otherwise, mark the giv as not done so that it will get its own iv. */
4245 /* ??? Could try to optimize branches when it is known that a biv is always
4248 /* ??? When replace a biv in a compare insn, we should replace with closest
4249 giv so that an optimized branch can still be recognized by the combiner,
4250 e.g. the VAX acb insn. */
4252 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4253 was rerun in loop_optimize whenever a register was added or moved.
4254 Also, some of the optimizations could be a little less conservative. */
4256 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4257 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4260 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4261 least once for every loop iteration except for the last one.
4263 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4267 for_each_insn_in_loop (loop
, fncall
)
4269 loop_insn_callback fncall
;
4271 int not_every_iteration
= 0;
4272 int maybe_multiple
= 0;
4273 int past_loop_latch
= 0;
4277 /* If loop_scan_start points to the loop exit test, we have to be wary of
4278 subversive use of gotos inside expression statements. */
4279 if (prev_nonnote_insn (loop
->scan_start
) != prev_nonnote_insn (loop
->start
))
4280 maybe_multiple
= back_branch_in_range_p (loop
, loop
->scan_start
);
4282 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4283 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
4285 p
= next_insn_in_loop (loop
, p
))
4287 p
= fncall (loop
, p
, not_every_iteration
, maybe_multiple
);
4289 /* Past CODE_LABEL, we get to insns that may be executed multiple
4290 times. The only way we can be sure that they can't is if every
4291 jump insn between here and the end of the loop either
4292 returns, exits the loop, is a jump to a location that is still
4293 behind the label, or is a jump to the loop start. */
4295 if (GET_CODE (p
) == CODE_LABEL
)
4303 insn
= NEXT_INSN (insn
);
4304 if (insn
== loop
->scan_start
)
4306 if (insn
== loop
->end
)
4312 if (insn
== loop
->scan_start
)
4316 if (GET_CODE (insn
) == JUMP_INSN
4317 && GET_CODE (PATTERN (insn
)) != RETURN
4318 && (!any_condjump_p (insn
)
4319 || (JUMP_LABEL (insn
) != 0
4320 && JUMP_LABEL (insn
) != loop
->scan_start
4321 && !loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
4329 /* Past a jump, we get to insns for which we can't count
4330 on whether they will be executed during each iteration. */
4331 /* This code appears twice in strength_reduce. There is also similar
4332 code in scan_loop. */
4333 if (GET_CODE (p
) == JUMP_INSN
4334 /* If we enter the loop in the middle, and scan around to the
4335 beginning, don't set not_every_iteration for that.
4336 This can be any kind of jump, since we want to know if insns
4337 will be executed if the loop is executed. */
4338 && !(JUMP_LABEL (p
) == loop
->top
4339 && ((NEXT_INSN (NEXT_INSN (p
)) == loop
->end
4340 && any_uncondjump_p (p
))
4341 || (NEXT_INSN (p
) == loop
->end
&& any_condjump_p (p
)))))
4345 /* If this is a jump outside the loop, then it also doesn't
4346 matter. Check to see if the target of this branch is on the
4347 loop->exits_labels list. */
4349 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
4350 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4354 not_every_iteration
= 1;
4357 else if (GET_CODE (p
) == NOTE
)
4359 /* At the virtual top of a converted loop, insns are again known to
4360 be executed each iteration: logically, the loop begins here
4361 even though the exit code has been duplicated.
4363 Insns are also again known to be executed each iteration at
4364 the LOOP_CONT note. */
4365 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
4366 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
4368 not_every_iteration
= 0;
4369 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4371 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4375 /* Note if we pass a loop latch. If we do, then we can not clear
4376 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4377 a loop since a jump before the last CODE_LABEL may have started
4378 a new loop iteration.
4380 Note that LOOP_TOP is only set for rotated loops and we need
4381 this check for all loops, so compare against the CODE_LABEL
4382 which immediately follows LOOP_START. */
4383 if (GET_CODE (p
) == JUMP_INSN
4384 && JUMP_LABEL (p
) == NEXT_INSN (loop
->start
))
4385 past_loop_latch
= 1;
4387 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4388 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4389 or not an insn is known to be executed each iteration of the
4390 loop, whether or not any iterations are known to occur.
4392 Therefore, if we have just passed a label and have no more labels
4393 between here and the test insn of the loop, and we have not passed
4394 a jump to the top of the loop, then we know these insns will be
4395 executed each iteration. */
4397 if (not_every_iteration
4399 && GET_CODE (p
) == CODE_LABEL
4400 && no_labels_between_p (p
, loop
->end
)
4401 && loop_insn_first_p (p
, loop
->cont
))
4402 not_every_iteration
= 0;
4407 loop_bivs_find (loop
)
4410 struct loop_regs
*regs
= LOOP_REGS (loop
);
4411 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4412 /* Temporary list pointers for traversing ivs->list. */
4413 struct iv_class
*bl
, **backbl
;
4417 for_each_insn_in_loop (loop
, check_insn_for_bivs
);
4419 /* Scan ivs->list to remove all regs that proved not to be bivs.
4420 Make a sanity check against regs->n_times_set. */
4421 for (backbl
= &ivs
->list
, bl
= *backbl
; bl
; bl
= bl
->next
)
4423 if (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4424 /* Above happens if register modified by subreg, etc. */
4425 /* Make sure it is not recognized as a basic induction var: */
4426 || regs
->array
[bl
->regno
].n_times_set
!= bl
->biv_count
4427 /* If never incremented, it is invariant that we decided not to
4428 move. So leave it alone. */
4429 || ! bl
->incremented
)
4431 if (loop_dump_stream
)
4432 fprintf (loop_dump_stream
, "Biv %d: discarded, %s\n",
4434 (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4435 ? "not induction variable"
4436 : (! bl
->incremented
? "never incremented"
4439 REG_IV_TYPE (ivs
, bl
->regno
) = NOT_BASIC_INDUCT
;
4446 if (loop_dump_stream
)
4447 fprintf (loop_dump_stream
, "Biv %d: verified\n", bl
->regno
);
4453 /* Determine how BIVS are initialized by looking through pre-header
4454 extended basic block. */
4456 loop_bivs_init_find (loop
)
4459 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4460 /* Temporary list pointers for traversing ivs->list. */
4461 struct iv_class
*bl
;
4465 /* Find initial value for each biv by searching backwards from loop_start,
4466 halting at first label. Also record any test condition. */
4469 for (p
= loop
->start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
4475 if (GET_CODE (p
) == CALL_INSN
)
4479 note_stores (PATTERN (p
), record_initial
, ivs
);
4481 /* Record any test of a biv that branches around the loop if no store
4482 between it and the start of loop. We only care about tests with
4483 constants and registers and only certain of those. */
4484 if (GET_CODE (p
) == JUMP_INSN
4485 && JUMP_LABEL (p
) != 0
4486 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop
->end
)
4487 && (test
= get_condition_for_loop (loop
, p
)) != 0
4488 && GET_CODE (XEXP (test
, 0)) == REG
4489 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
4490 && (bl
= REG_IV_CLASS (ivs
, REGNO (XEXP (test
, 0)))) != 0
4491 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop
->start
)
4492 && bl
->init_insn
== 0)
4494 /* If an NE test, we have an initial value! */
4495 if (GET_CODE (test
) == NE
)
4498 bl
->init_set
= gen_rtx_SET (VOIDmode
,
4499 XEXP (test
, 0), XEXP (test
, 1));
4502 bl
->initial_test
= test
;
4508 /* Look at the each biv and see if we can say anything better about its
4509 initial value from any initializing insns set up above. (This is done
4510 in two passes to avoid missing SETs in a PARALLEL.) */
4512 loop_bivs_check (loop
)
4515 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4516 /* Temporary list pointers for traversing ivs->list. */
4517 struct iv_class
*bl
;
4518 struct iv_class
**backbl
;
4520 for (backbl
= &ivs
->list
; (bl
= *backbl
); backbl
= &bl
->next
)
4525 if (! bl
->init_insn
)
4528 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4529 is a constant, use the value of that. */
4530 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
4531 && CONSTANT_P (XEXP (note
, 0)))
4532 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
4533 && CONSTANT_P (XEXP (note
, 0))))
4534 src
= XEXP (note
, 0);
4536 src
= SET_SRC (bl
->init_set
);
4538 if (loop_dump_stream
)
4539 fprintf (loop_dump_stream
,
4540 "Biv %d: initialized at insn %d: initial value ",
4541 bl
->regno
, INSN_UID (bl
->init_insn
));
4543 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
4544 || GET_MODE (src
) == VOIDmode
)
4545 && valid_initial_value_p (src
, bl
->init_insn
,
4546 LOOP_INFO (loop
)->pre_header_has_call
,
4549 bl
->initial_value
= src
;
4551 if (loop_dump_stream
)
4553 print_simple_rtl (loop_dump_stream
, src
);
4554 fputc ('\n', loop_dump_stream
);
4557 /* If we can't make it a giv,
4558 let biv keep initial value of "itself". */
4559 else if (loop_dump_stream
)
4560 fprintf (loop_dump_stream
, "is complex\n");
4565 /* Search the loop for general induction variables. */
4568 loop_givs_find (loop
)
4571 for_each_insn_in_loop (loop
, check_insn_for_givs
);
4575 /* For each giv for which we still don't know whether or not it is
4576 replaceable, check to see if it is replaceable because its final value
4577 can be calculated. */
4580 loop_givs_check (loop
)
4583 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4584 struct iv_class
*bl
;
4586 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4588 struct induction
*v
;
4590 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4591 if (! v
->replaceable
&& ! v
->not_replaceable
)
4592 check_final_value (loop
, v
);
4597 /* Return nonzero if it is possible to eliminate the biv BL provided
4598 all givs are reduced. This is possible if either the reg is not
4599 used outside the loop, or we can compute what its final value will
4603 loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
)
4605 struct iv_class
*bl
;
4609 /* For architectures with a decrement_and_branch_until_zero insn,
4610 don't do this if we put a REG_NONNEG note on the endtest for this
4613 #ifdef HAVE_decrement_and_branch_until_zero
4616 if (loop_dump_stream
)
4617 fprintf (loop_dump_stream
,
4618 "Cannot eliminate nonneg biv %d.\n", bl
->regno
);
4623 /* Check that biv is used outside loop or if it has a final value.
4624 Compare against bl->init_insn rather than loop->start. We aren't
4625 concerned with any uses of the biv between init_insn and
4626 loop->start since these won't be affected by the value of the biv
4627 elsewhere in the function, so long as init_insn doesn't use the
4630 if ((REGNO_LAST_LUID (bl
->regno
) < INSN_LUID (loop
->end
)
4632 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4633 && REGNO_FIRST_LUID (bl
->regno
) >= INSN_LUID (bl
->init_insn
)
4634 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4635 || (bl
->final_value
= final_biv_value (loop
, bl
)))
4636 return maybe_eliminate_biv (loop
, bl
, 0, threshold
, insn_count
);
4638 if (loop_dump_stream
)
4640 fprintf (loop_dump_stream
,
4641 "Cannot eliminate biv %d.\n",
4643 fprintf (loop_dump_stream
,
4644 "First use: insn %d, last use: insn %d.\n",
4645 REGNO_FIRST_UID (bl
->regno
),
4646 REGNO_LAST_UID (bl
->regno
));
4652 /* Reduce each giv of BL that we have decided to reduce. */
4655 loop_givs_reduce (loop
, bl
)
4657 struct iv_class
*bl
;
4659 struct induction
*v
;
4661 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4663 struct induction
*tv
;
4664 if (! v
->ignore
&& v
->same
== 0)
4666 int auto_inc_opt
= 0;
4668 /* If the code for derived givs immediately below has already
4669 allocated a new_reg, we must keep it. */
4671 v
->new_reg
= gen_reg_rtx (v
->mode
);
4674 /* If the target has auto-increment addressing modes, and
4675 this is an address giv, then try to put the increment
4676 immediately after its use, so that flow can create an
4677 auto-increment addressing mode. */
4678 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4679 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4680 /* We don't handle reversed biv's because bl->biv->insn
4681 does not have a valid INSN_LUID. */
4683 && v
->always_executed
&& ! v
->maybe_multiple
4684 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4686 /* If other giv's have been combined with this one, then
4687 this will work only if all uses of the other giv's occur
4688 before this giv's insn. This is difficult to check.
4690 We simplify this by looking for the common case where
4691 there is one DEST_REG giv, and this giv's insn is the
4692 last use of the dest_reg of that DEST_REG giv. If the
4693 increment occurs after the address giv, then we can
4694 perform the optimization. (Otherwise, the increment
4695 would have to go before other_giv, and we would not be
4696 able to combine it with the address giv to get an
4697 auto-inc address.) */
4698 if (v
->combined_with
)
4700 struct induction
*other_giv
= 0;
4702 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4710 if (! tv
&& other_giv
4711 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4712 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4713 == INSN_UID (v
->insn
))
4714 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4717 /* Check for case where increment is before the address
4718 giv. Do this test in "loop order". */
4719 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4720 && (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4721 || (INSN_LUID (bl
->biv
->insn
)
4722 > INSN_LUID (loop
->scan_start
))))
4723 || (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4724 && (INSN_LUID (loop
->scan_start
)
4725 < INSN_LUID (bl
->biv
->insn
))))
4734 /* We can't put an insn immediately after one setting
4735 cc0, or immediately before one using cc0. */
4736 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4737 || (auto_inc_opt
== -1
4738 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4740 && sets_cc0_p (PATTERN (prev
))))
4746 v
->auto_inc_opt
= 1;
4750 /* For each place where the biv is incremented, add an insn
4751 to increment the new, reduced reg for the giv. */
4752 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4757 insert_before
= NEXT_INSN (tv
->insn
);
4758 else if (auto_inc_opt
== 1)
4759 insert_before
= NEXT_INSN (v
->insn
);
4761 insert_before
= v
->insn
;
4763 if (tv
->mult_val
== const1_rtx
)
4764 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4765 v
->new_reg
, v
->new_reg
,
4767 else /* tv->mult_val == const0_rtx */
4768 /* A multiply is acceptable here
4769 since this is presumed to be seldom executed. */
4770 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4771 v
->add_val
, v
->new_reg
,
4775 /* Add code at loop start to initialize giv's reduced reg. */
4777 loop_iv_add_mult_hoist (loop
,
4778 extend_value_for_giv (v
, bl
->initial_value
),
4779 v
->mult_val
, v
->add_val
, v
->new_reg
);
4785 /* Check for givs whose first use is their definition and whose
4786 last use is the definition of another giv. If so, it is likely
4787 dead and should not be used to derive another giv nor to
4791 loop_givs_dead_check (loop
, bl
)
4792 struct loop
*loop ATTRIBUTE_UNUSED
;
4793 struct iv_class
*bl
;
4795 struct induction
*v
;
4797 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4800 || (v
->same
&& v
->same
->ignore
))
4803 if (v
->giv_type
== DEST_REG
4804 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4806 struct induction
*v1
;
4808 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4809 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4817 loop_givs_rescan (loop
, bl
, reg_map
)
4819 struct iv_class
*bl
;
4822 struct induction
*v
;
4824 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4826 if (v
->same
&& v
->same
->ignore
)
4832 /* Update expression if this was combined, in case other giv was
4835 v
->new_reg
= replace_rtx (v
->new_reg
,
4836 v
->same
->dest_reg
, v
->same
->new_reg
);
4838 /* See if this register is known to be a pointer to something. If
4839 so, see if we can find the alignment. First see if there is a
4840 destination register that is a pointer. If so, this shares the
4841 alignment too. Next see if we can deduce anything from the
4842 computational information. If not, and this is a DEST_ADDR
4843 giv, at least we know that it's a pointer, though we don't know
4845 if (GET_CODE (v
->new_reg
) == REG
4846 && v
->giv_type
== DEST_REG
4847 && REG_POINTER (v
->dest_reg
))
4848 mark_reg_pointer (v
->new_reg
,
4849 REGNO_POINTER_ALIGN (REGNO (v
->dest_reg
)));
4850 else if (GET_CODE (v
->new_reg
) == REG
4851 && REG_POINTER (v
->src_reg
))
4853 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->src_reg
));
4856 || GET_CODE (v
->add_val
) != CONST_INT
4857 || INTVAL (v
->add_val
) % (align
/ BITS_PER_UNIT
) != 0)
4860 mark_reg_pointer (v
->new_reg
, align
);
4862 else if (GET_CODE (v
->new_reg
) == REG
4863 && GET_CODE (v
->add_val
) == REG
4864 && REG_POINTER (v
->add_val
))
4866 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->add_val
));
4868 if (align
== 0 || GET_CODE (v
->mult_val
) != CONST_INT
4869 || INTVAL (v
->mult_val
) % (align
/ BITS_PER_UNIT
) != 0)
4872 mark_reg_pointer (v
->new_reg
, align
);
4874 else if (GET_CODE (v
->new_reg
) == REG
&& v
->giv_type
== DEST_ADDR
)
4875 mark_reg_pointer (v
->new_reg
, 0);
4877 if (v
->giv_type
== DEST_ADDR
)
4878 /* Store reduced reg as the address in the memref where we found
4880 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4881 else if (v
->replaceable
)
4883 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4887 rtx original_insn
= v
->insn
;
4890 /* Not replaceable; emit an insn to set the original giv reg from
4891 the reduced giv, same as above. */
4892 v
->insn
= loop_insn_emit_after (loop
, 0, original_insn
,
4893 gen_move_insn (v
->dest_reg
,
4896 /* The original insn may have a REG_EQUAL note. This note is
4897 now incorrect and may result in invalid substitutions later.
4898 The original insn is dead, but may be part of a libcall
4899 sequence, which doesn't seem worth the bother of handling. */
4900 note
= find_reg_note (original_insn
, REG_EQUAL
, NULL_RTX
);
4902 remove_note (original_insn
, note
);
4905 /* When a loop is reversed, givs which depend on the reversed
4906 biv, and which are live outside the loop, must be set to their
4907 correct final value. This insn is only needed if the giv is
4908 not replaceable. The correct final value is the same as the
4909 value that the giv starts the reversed loop with. */
4910 if (bl
->reversed
&& ! v
->replaceable
)
4911 loop_iv_add_mult_sink (loop
,
4912 extend_value_for_giv (v
, bl
->initial_value
),
4913 v
->mult_val
, v
->add_val
, v
->dest_reg
);
4914 else if (v
->final_value
)
4915 loop_insn_sink_or_swim (loop
,
4916 gen_load_of_final_value (v
->dest_reg
,
4919 if (loop_dump_stream
)
4921 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4922 INSN_UID (v
->insn
));
4923 print_simple_rtl (loop_dump_stream
, v
->new_reg
);
4924 fprintf (loop_dump_stream
, "\n");
4931 loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
)
4932 struct loop
*loop ATTRIBUTE_UNUSED
;
4933 struct iv_class
*bl
;
4934 struct induction
*v
;
4940 benefit
= v
->benefit
;
4941 PUT_MODE (test_reg
, v
->mode
);
4942 add_cost
= iv_add_mult_cost (bl
->biv
->add_val
, v
->mult_val
,
4943 test_reg
, test_reg
);
4945 /* Reduce benefit if not replaceable, since we will insert a
4946 move-insn to replace the insn that calculates this giv. Don't do
4947 this unless the giv is a user variable, since it will often be
4948 marked non-replaceable because of the duplication of the exit
4949 code outside the loop. In such a case, the copies we insert are
4950 dead and will be deleted. So they don't have a cost. Similar
4951 situations exist. */
4952 /* ??? The new final_[bg]iv_value code does a much better job of
4953 finding replaceable giv's, and hence this code may no longer be
4955 if (! v
->replaceable
&& ! bl
->eliminable
4956 && REG_USERVAR_P (v
->dest_reg
))
4957 benefit
-= copy_cost
;
4959 /* Decrease the benefit to count the add-insns that we will insert
4960 to increment the reduced reg for the giv. ??? This can
4961 overestimate the run-time cost of the additional insns, e.g. if
4962 there are multiple basic blocks that increment the biv, but only
4963 one of these blocks is executed during each iteration. There is
4964 no good way to detect cases like this with the current structure
4965 of the loop optimizer. This code is more accurate for
4966 determining code size than run-time benefits. */
4967 benefit
-= add_cost
* bl
->biv_count
;
4969 /* Decide whether to strength-reduce this giv or to leave the code
4970 unchanged (recompute it from the biv each time it is used). This
4971 decision can be made independently for each giv. */
4974 /* Attempt to guess whether autoincrement will handle some of the
4975 new add insns; if so, increase BENEFIT (undo the subtraction of
4976 add_cost that was done above). */
4977 if (v
->giv_type
== DEST_ADDR
4978 /* Increasing the benefit is risky, since this is only a guess.
4979 Avoid increasing register pressure in cases where there would
4980 be no other benefit from reducing this giv. */
4982 && GET_CODE (v
->mult_val
) == CONST_INT
)
4984 int size
= GET_MODE_SIZE (GET_MODE (v
->mem
));
4986 if (HAVE_POST_INCREMENT
4987 && INTVAL (v
->mult_val
) == size
)
4988 benefit
+= add_cost
* bl
->biv_count
;
4989 else if (HAVE_PRE_INCREMENT
4990 && INTVAL (v
->mult_val
) == size
)
4991 benefit
+= add_cost
* bl
->biv_count
;
4992 else if (HAVE_POST_DECREMENT
4993 && -INTVAL (v
->mult_val
) == size
)
4994 benefit
+= add_cost
* bl
->biv_count
;
4995 else if (HAVE_PRE_DECREMENT
4996 && -INTVAL (v
->mult_val
) == size
)
4997 benefit
+= add_cost
* bl
->biv_count
;
5005 /* Free IV structures for LOOP. */
5008 loop_ivs_free (loop
)
5011 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5012 struct iv_class
*iv
= ivs
->list
;
5018 struct iv_class
*next
= iv
->next
;
5019 struct induction
*induction
;
5020 struct induction
*next_induction
;
5022 for (induction
= iv
->biv
; induction
; induction
= next_induction
)
5024 next_induction
= induction
->next_iv
;
5027 for (induction
= iv
->giv
; induction
; induction
= next_induction
)
5029 next_induction
= induction
->next_iv
;
5039 /* Perform strength reduction and induction variable elimination.
5041 Pseudo registers created during this function will be beyond the
5042 last valid index in several tables including
5043 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5044 problem here, because the added registers cannot be givs outside of
5045 their loop, and hence will never be reconsidered. But scan_loop
5046 must check regnos to make sure they are in bounds. */
5049 strength_reduce (loop
, flags
)
5053 struct loop_info
*loop_info
= LOOP_INFO (loop
);
5054 struct loop_regs
*regs
= LOOP_REGS (loop
);
5055 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5057 /* Temporary list pointer for traversing ivs->list. */
5058 struct iv_class
*bl
;
5059 /* Ratio of extra register life span we can justify
5060 for saving an instruction. More if loop doesn't call subroutines
5061 since in that case saving an insn makes more difference
5062 and more registers are available. */
5063 /* ??? could set this to last value of threshold in move_movables */
5064 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
5065 /* Map of pseudo-register replacements. */
5066 rtx
*reg_map
= NULL
;
5068 int unrolled_insn_copies
= 0;
5069 rtx test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
5070 int insn_count
= count_insns_in_loop (loop
);
5072 addr_placeholder
= gen_reg_rtx (Pmode
);
5074 ivs
->n_regs
= max_reg_before_loop
;
5075 ivs
->regs
= (struct iv
*) xcalloc (ivs
->n_regs
, sizeof (struct iv
));
5077 /* Find all BIVs in loop. */
5078 loop_bivs_find (loop
);
5080 /* Exit if there are no bivs. */
5083 /* Can still unroll the loop anyways, but indicate that there is no
5084 strength reduction info available. */
5085 if (flags
& LOOP_UNROLL
)
5086 unroll_loop (loop
, insn_count
, 0);
5088 loop_ivs_free (loop
);
5092 /* Determine how BIVS are initialized by looking through pre-header
5093 extended basic block. */
5094 loop_bivs_init_find (loop
);
5096 /* Look at the each biv and see if we can say anything better about its
5097 initial value from any initializing insns set up above. */
5098 loop_bivs_check (loop
);
5100 /* Search the loop for general induction variables. */
5101 loop_givs_find (loop
);
5103 /* Try to calculate and save the number of loop iterations. This is
5104 set to zero if the actual number can not be calculated. This must
5105 be called after all giv's have been identified, since otherwise it may
5106 fail if the iteration variable is a giv. */
5107 loop_iterations (loop
);
5109 #ifdef HAVE_prefetch
5110 if (flags
& LOOP_PREFETCH
)
5111 emit_prefetch_instructions (loop
);
5114 /* Now for each giv for which we still don't know whether or not it is
5115 replaceable, check to see if it is replaceable because its final value
5116 can be calculated. This must be done after loop_iterations is called,
5117 so that final_giv_value will work correctly. */
5118 loop_givs_check (loop
);
5120 /* Try to prove that the loop counter variable (if any) is always
5121 nonnegative; if so, record that fact with a REG_NONNEG note
5122 so that "decrement and branch until zero" insn can be used. */
5123 check_dbra_loop (loop
, insn_count
);
5125 /* Create reg_map to hold substitutions for replaceable giv regs.
5126 Some givs might have been made from biv increments, so look at
5127 ivs->reg_iv_type for a suitable size. */
5128 reg_map_size
= ivs
->n_regs
;
5129 reg_map
= (rtx
*) xcalloc (reg_map_size
, sizeof (rtx
));
5131 /* Examine each iv class for feasibility of strength reduction/induction
5132 variable elimination. */
5134 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
5136 struct induction
*v
;
5139 /* Test whether it will be possible to eliminate this biv
5140 provided all givs are reduced. */
5141 bl
->eliminable
= loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
);
5143 /* This will be true at the end, if all givs which depend on this
5144 biv have been strength reduced.
5145 We can't (currently) eliminate the biv unless this is so. */
5146 bl
->all_reduced
= 1;
5148 /* Check each extension dependent giv in this class to see if its
5149 root biv is safe from wrapping in the interior mode. */
5150 check_ext_dependent_givs (bl
, loop_info
);
5152 /* Combine all giv's for this iv_class. */
5153 combine_givs (regs
, bl
);
5155 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5157 struct induction
*tv
;
5159 if (v
->ignore
|| v
->same
)
5162 benefit
= loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
);
5164 /* If an insn is not to be strength reduced, then set its ignore
5165 flag, and clear bl->all_reduced. */
5167 /* A giv that depends on a reversed biv must be reduced if it is
5168 used after the loop exit, otherwise, it would have the wrong
5169 value after the loop exit. To make it simple, just reduce all
5170 of such giv's whether or not we know they are used after the loop
5173 if (! flag_reduce_all_givs
5174 && v
->lifetime
* threshold
* benefit
< insn_count
5177 if (loop_dump_stream
)
5178 fprintf (loop_dump_stream
,
5179 "giv of insn %d not worth while, %d vs %d.\n",
5181 v
->lifetime
* threshold
* benefit
, insn_count
);
5183 bl
->all_reduced
= 0;
5187 /* Check that we can increment the reduced giv without a
5188 multiply insn. If not, reject it. */
5190 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
5191 if (tv
->mult_val
== const1_rtx
5192 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
5194 if (loop_dump_stream
)
5195 fprintf (loop_dump_stream
,
5196 "giv of insn %d: would need a multiply.\n",
5197 INSN_UID (v
->insn
));
5199 bl
->all_reduced
= 0;
5205 /* Check for givs whose first use is their definition and whose
5206 last use is the definition of another giv. If so, it is likely
5207 dead and should not be used to derive another giv nor to
5209 loop_givs_dead_check (loop
, bl
);
5211 /* Reduce each giv that we decided to reduce. */
5212 loop_givs_reduce (loop
, bl
);
5214 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5217 For each giv register that can be reduced now: if replaceable,
5218 substitute reduced reg wherever the old giv occurs;
5219 else add new move insn "giv_reg = reduced_reg". */
5220 loop_givs_rescan (loop
, bl
, reg_map
);
5222 /* All the givs based on the biv bl have been reduced if they
5225 /* For each giv not marked as maybe dead that has been combined with a
5226 second giv, clear any "maybe dead" mark on that second giv.
5227 v->new_reg will either be or refer to the register of the giv it
5230 Doing this clearing avoids problems in biv elimination where
5231 a giv's new_reg is a complex value that can't be put in the
5232 insn but the giv combined with (with a reg as new_reg) is
5233 marked maybe_dead. Since the register will be used in either
5234 case, we'd prefer it be used from the simpler giv. */
5236 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5237 if (! v
->maybe_dead
&& v
->same
)
5238 v
->same
->maybe_dead
= 0;
5240 /* Try to eliminate the biv, if it is a candidate.
5241 This won't work if ! bl->all_reduced,
5242 since the givs we planned to use might not have been reduced.
5244 We have to be careful that we didn't initially think we could
5245 eliminate this biv because of a giv that we now think may be
5246 dead and shouldn't be used as a biv replacement.
5248 Also, there is the possibility that we may have a giv that looks
5249 like it can be used to eliminate a biv, but the resulting insn
5250 isn't valid. This can happen, for example, on the 88k, where a
5251 JUMP_INSN can compare a register only with zero. Attempts to
5252 replace it with a compare with a constant will fail.
5254 Note that in cases where this call fails, we may have replaced some
5255 of the occurrences of the biv with a giv, but no harm was done in
5256 doing so in the rare cases where it can occur. */
5258 if (bl
->all_reduced
== 1 && bl
->eliminable
5259 && maybe_eliminate_biv (loop
, bl
, 1, threshold
, insn_count
))
5261 /* ?? If we created a new test to bypass the loop entirely,
5262 or otherwise drop straight in, based on this test, then
5263 we might want to rewrite it also. This way some later
5264 pass has more hope of removing the initialization of this
5267 /* If final_value != 0, then the biv may be used after loop end
5268 and we must emit an insn to set it just in case.
5270 Reversed bivs already have an insn after the loop setting their
5271 value, so we don't need another one. We can't calculate the
5272 proper final value for such a biv here anyways. */
5273 if (bl
->final_value
&& ! bl
->reversed
)
5274 loop_insn_sink_or_swim (loop
,
5275 gen_load_of_final_value (bl
->biv
->dest_reg
,
5278 if (loop_dump_stream
)
5279 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
5282 /* See above note wrt final_value. But since we couldn't eliminate
5283 the biv, we must set the value after the loop instead of before. */
5284 else if (bl
->final_value
&& ! bl
->reversed
)
5285 loop_insn_sink (loop
, gen_load_of_final_value (bl
->biv
->dest_reg
,
5289 /* Go through all the instructions in the loop, making all the
5290 register substitutions scheduled in REG_MAP. */
5292 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
5293 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5294 || GET_CODE (p
) == CALL_INSN
)
5296 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
5297 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
5301 if (loop_info
->n_iterations
> 0)
5303 /* When we completely unroll a loop we will likely not need the increment
5304 of the loop BIV and we will not need the conditional branch at the
5306 unrolled_insn_copies
= insn_count
- 2;
5309 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5310 need the comparison before the conditional branch at the end of the
5312 unrolled_insn_copies
-= 1;
5315 /* We'll need one copy for each loop iteration. */
5316 unrolled_insn_copies
*= loop_info
->n_iterations
;
5318 /* A little slop to account for the ability to remove initialization
5319 code, better CSE, and other secondary benefits of completely
5320 unrolling some loops. */
5321 unrolled_insn_copies
-= 1;
5323 /* Clamp the value. */
5324 if (unrolled_insn_copies
< 0)
5325 unrolled_insn_copies
= 0;
5328 /* Unroll loops from within strength reduction so that we can use the
5329 induction variable information that strength_reduce has already
5330 collected. Always unroll loops that would be as small or smaller
5331 unrolled than when rolled. */
5332 if ((flags
& LOOP_UNROLL
)
5333 || ((flags
& LOOP_AUTO_UNROLL
)
5334 && loop_info
->n_iterations
> 0
5335 && unrolled_insn_copies
<= insn_count
))
5336 unroll_loop (loop
, insn_count
, 1);
5338 #ifdef HAVE_doloop_end
5339 if (HAVE_doloop_end
&& (flags
& LOOP_BCT
) && flag_branch_on_count_reg
)
5340 doloop_optimize (loop
);
5341 #endif /* HAVE_doloop_end */
5343 /* In case number of iterations is known, drop branch prediction note
5344 in the branch. Do that only in second loop pass, as loop unrolling
5345 may change the number of iterations performed. */
5346 if (flags
& LOOP_BCT
)
5348 unsigned HOST_WIDE_INT n
5349 = loop_info
->n_iterations
/ loop_info
->unroll_number
;
5351 predict_insn (prev_nonnote_insn (loop
->end
), PRED_LOOP_ITERATIONS
,
5352 REG_BR_PROB_BASE
- REG_BR_PROB_BASE
/ n
);
5355 if (loop_dump_stream
)
5356 fprintf (loop_dump_stream
, "\n");
5358 loop_ivs_free (loop
);
5363 /*Record all basic induction variables calculated in the insn. */
5365 check_insn_for_bivs (loop
, p
, not_every_iteration
, maybe_multiple
)
5368 int not_every_iteration
;
5371 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5378 if (GET_CODE (p
) == INSN
5379 && (set
= single_set (p
))
5380 && GET_CODE (SET_DEST (set
)) == REG
)
5382 dest_reg
= SET_DEST (set
);
5383 if (REGNO (dest_reg
) < max_reg_before_loop
5384 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
5385 && REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
5387 if (basic_induction_var (loop
, SET_SRC (set
),
5388 GET_MODE (SET_SRC (set
)),
5389 dest_reg
, p
, &inc_val
, &mult_val
,
5392 /* It is a possible basic induction variable.
5393 Create and initialize an induction structure for it. */
5396 = (struct induction
*) xmalloc (sizeof (struct induction
));
5398 record_biv (loop
, v
, p
, dest_reg
, inc_val
, mult_val
, location
,
5399 not_every_iteration
, maybe_multiple
);
5400 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = BASIC_INDUCT
;
5402 else if (REGNO (dest_reg
) < ivs
->n_regs
)
5403 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
5409 /* Record all givs calculated in the insn.
5410 A register is a giv if: it is only set once, it is a function of a
5411 biv and a constant (or invariant), and it is not a biv. */
5413 check_insn_for_givs (loop
, p
, not_every_iteration
, maybe_multiple
)
5416 int not_every_iteration
;
5419 struct loop_regs
*regs
= LOOP_REGS (loop
);
5422 /* Look for a general induction variable in a register. */
5423 if (GET_CODE (p
) == INSN
5424 && (set
= single_set (p
))
5425 && GET_CODE (SET_DEST (set
)) == REG
5426 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
5435 rtx last_consec_insn
;
5437 dest_reg
= SET_DEST (set
);
5438 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
5441 if (/* SET_SRC is a giv. */
5442 (general_induction_var (loop
, SET_SRC (set
), &src_reg
, &add_val
,
5443 &mult_val
, &ext_val
, 0, &benefit
, VOIDmode
)
5444 /* Equivalent expression is a giv. */
5445 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5446 && general_induction_var (loop
, XEXP (regnote
, 0), &src_reg
,
5447 &add_val
, &mult_val
, &ext_val
, 0,
5448 &benefit
, VOIDmode
)))
5449 /* Don't try to handle any regs made by loop optimization.
5450 We have nothing on them in regno_first_uid, etc. */
5451 && REGNO (dest_reg
) < max_reg_before_loop
5452 /* Don't recognize a BASIC_INDUCT_VAR here. */
5453 && dest_reg
!= src_reg
5454 /* This must be the only place where the register is set. */
5455 && (regs
->array
[REGNO (dest_reg
)].n_times_set
== 1
5456 /* or all sets must be consecutive and make a giv. */
5457 || (benefit
= consec_sets_giv (loop
, benefit
, p
,
5459 &add_val
, &mult_val
, &ext_val
,
5460 &last_consec_insn
))))
5463 = (struct induction
*) xmalloc (sizeof (struct induction
));
5465 /* If this is a library call, increase benefit. */
5466 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5467 benefit
+= libcall_benefit (p
);
5469 /* Skip the consecutive insns, if there are any. */
5470 if (regs
->array
[REGNO (dest_reg
)].n_times_set
!= 1)
5471 p
= last_consec_insn
;
5473 record_giv (loop
, v
, p
, src_reg
, dest_reg
, mult_val
, add_val
,
5474 ext_val
, benefit
, DEST_REG
, not_every_iteration
,
5475 maybe_multiple
, (rtx
*) 0);
5480 #ifndef DONT_REDUCE_ADDR
5481 /* Look for givs which are memory addresses. */
5482 /* This resulted in worse code on a VAX 8600. I wonder if it
5484 if (GET_CODE (p
) == INSN
)
5485 find_mem_givs (loop
, PATTERN (p
), p
, not_every_iteration
,
5489 /* Update the status of whether giv can derive other givs. This can
5490 change when we pass a label or an insn that updates a biv. */
5491 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5492 || GET_CODE (p
) == CODE_LABEL
)
5493 update_giv_derive (loop
, p
);
5497 /* Return 1 if X is a valid source for an initial value (or as value being
5498 compared against in an initial test).
5500 X must be either a register or constant and must not be clobbered between
5501 the current insn and the start of the loop.
5503 INSN is the insn containing X. */
5506 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
5515 /* Only consider pseudos we know about initialized in insns whose luids
5517 if (GET_CODE (x
) != REG
5518 || REGNO (x
) >= max_reg_before_loop
)
5521 /* Don't use call-clobbered registers across a call which clobbers it. On
5522 some machines, don't use any hard registers at all. */
5523 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
5524 && (SMALL_REGISTER_CLASSES
5525 || (call_used_regs
[REGNO (x
)] && call_seen
)))
5528 /* Don't use registers that have been clobbered before the start of the
5530 if (reg_set_between_p (x
, insn
, loop_start
))
5536 /* Scan X for memory refs and check each memory address
5537 as a possible giv. INSN is the insn whose pattern X comes from.
5538 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5539 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5540 more thanonce in each loop iteration. */
5543 find_mem_givs (loop
, x
, insn
, not_every_iteration
, maybe_multiple
)
5544 const struct loop
*loop
;
5547 int not_every_iteration
, maybe_multiple
;
5556 code
= GET_CODE (x
);
5581 /* This code used to disable creating GIVs with mult_val == 1 and
5582 add_val == 0. However, this leads to lost optimizations when
5583 it comes time to combine a set of related DEST_ADDR GIVs, since
5584 this one would not be seen. */
5586 if (general_induction_var (loop
, XEXP (x
, 0), &src_reg
, &add_val
,
5587 &mult_val
, &ext_val
, 1, &benefit
,
5590 /* Found one; record it. */
5592 = (struct induction
*) xmalloc (sizeof (struct induction
));
5594 record_giv (loop
, v
, insn
, src_reg
, addr_placeholder
, mult_val
,
5595 add_val
, ext_val
, benefit
, DEST_ADDR
,
5596 not_every_iteration
, maybe_multiple
, &XEXP (x
, 0));
5607 /* Recursively scan the subexpressions for other mem refs. */
5609 fmt
= GET_RTX_FORMAT (code
);
5610 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5612 find_mem_givs (loop
, XEXP (x
, i
), insn
, not_every_iteration
,
5614 else if (fmt
[i
] == 'E')
5615 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
5616 find_mem_givs (loop
, XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
5620 /* Fill in the data about one biv update.
5621 V is the `struct induction' in which we record the biv. (It is
5622 allocated by the caller, with alloca.)
5623 INSN is the insn that sets it.
5624 DEST_REG is the biv's reg.
5626 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5627 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5628 being set to INC_VAL.
5630 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5631 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5632 can be executed more than once per iteration. If MAYBE_MULTIPLE
5633 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5634 executed exactly once per iteration. */
5637 record_biv (loop
, v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
5638 not_every_iteration
, maybe_multiple
)
5640 struct induction
*v
;
5646 int not_every_iteration
;
5649 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5650 struct iv_class
*bl
;
5653 v
->src_reg
= dest_reg
;
5654 v
->dest_reg
= dest_reg
;
5655 v
->mult_val
= mult_val
;
5656 v
->add_val
= inc_val
;
5657 v
->ext_dependent
= NULL_RTX
;
5658 v
->location
= location
;
5659 v
->mode
= GET_MODE (dest_reg
);
5660 v
->always_computable
= ! not_every_iteration
;
5661 v
->always_executed
= ! not_every_iteration
;
5662 v
->maybe_multiple
= maybe_multiple
;
5664 /* Add this to the reg's iv_class, creating a class
5665 if this is the first incrementation of the reg. */
5667 bl
= REG_IV_CLASS (ivs
, REGNO (dest_reg
));
5670 /* Create and initialize new iv_class. */
5672 bl
= (struct iv_class
*) xmalloc (sizeof (struct iv_class
));
5674 bl
->regno
= REGNO (dest_reg
);
5680 /* Set initial value to the reg itself. */
5681 bl
->initial_value
= dest_reg
;
5682 bl
->final_value
= 0;
5683 /* We haven't seen the initializing insn yet */
5686 bl
->initial_test
= 0;
5687 bl
->incremented
= 0;
5691 bl
->total_benefit
= 0;
5693 /* Add this class to ivs->list. */
5694 bl
->next
= ivs
->list
;
5697 /* Put it in the array of biv register classes. */
5698 REG_IV_CLASS (ivs
, REGNO (dest_reg
)) = bl
;
5701 /* Update IV_CLASS entry for this biv. */
5702 v
->next_iv
= bl
->biv
;
5705 if (mult_val
== const1_rtx
)
5706 bl
->incremented
= 1;
5708 if (loop_dump_stream
)
5709 loop_biv_dump (v
, loop_dump_stream
, 0);
5712 /* Fill in the data about one giv.
5713 V is the `struct induction' in which we record the giv. (It is
5714 allocated by the caller, with alloca.)
5715 INSN is the insn that sets it.
5716 BENEFIT estimates the savings from deleting this insn.
5717 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5718 into a register or is used as a memory address.
5720 SRC_REG is the biv reg which the giv is computed from.
5721 DEST_REG is the giv's reg (if the giv is stored in a reg).
5722 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5723 LOCATION points to the place where this giv's value appears in INSN. */
5726 record_giv (loop
, v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, ext_val
,
5727 benefit
, type
, not_every_iteration
, maybe_multiple
, location
)
5728 const struct loop
*loop
;
5729 struct induction
*v
;
5733 rtx mult_val
, add_val
, ext_val
;
5736 int not_every_iteration
, maybe_multiple
;
5739 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5740 struct induction
*b
;
5741 struct iv_class
*bl
;
5742 rtx set
= single_set (insn
);
5745 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5746 undo the MULT canonicalization that we performed earlier. */
5747 temp
= simplify_rtx (add_val
);
5749 && ! (GET_CODE (add_val
) == MULT
5750 && GET_CODE (temp
) == ASHIFT
))
5754 v
->src_reg
= src_reg
;
5756 v
->dest_reg
= dest_reg
;
5757 v
->mult_val
= mult_val
;
5758 v
->add_val
= add_val
;
5759 v
->ext_dependent
= ext_val
;
5760 v
->benefit
= benefit
;
5761 v
->location
= location
;
5763 v
->combined_with
= 0;
5764 v
->maybe_multiple
= maybe_multiple
;
5766 v
->derive_adjustment
= 0;
5772 v
->auto_inc_opt
= 0;
5776 /* The v->always_computable field is used in update_giv_derive, to
5777 determine whether a giv can be used to derive another giv. For a
5778 DEST_REG giv, INSN computes a new value for the giv, so its value
5779 isn't computable if INSN insn't executed every iteration.
5780 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5781 it does not compute a new value. Hence the value is always computable
5782 regardless of whether INSN is executed each iteration. */
5784 if (type
== DEST_ADDR
)
5785 v
->always_computable
= 1;
5787 v
->always_computable
= ! not_every_iteration
;
5789 v
->always_executed
= ! not_every_iteration
;
5791 if (type
== DEST_ADDR
)
5793 v
->mode
= GET_MODE (*location
);
5796 else /* type == DEST_REG */
5798 v
->mode
= GET_MODE (SET_DEST (set
));
5800 v
->lifetime
= LOOP_REG_LIFETIME (loop
, REGNO (dest_reg
));
5802 /* If the lifetime is zero, it means that this register is
5803 really a dead store. So mark this as a giv that can be
5804 ignored. This will not prevent the biv from being eliminated. */
5805 if (v
->lifetime
== 0)
5808 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
5809 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
5812 /* Add the giv to the class of givs computed from one biv. */
5814 bl
= REG_IV_CLASS (ivs
, REGNO (src_reg
));
5817 v
->next_iv
= bl
->giv
;
5819 /* Don't count DEST_ADDR. This is supposed to count the number of
5820 insns that calculate givs. */
5821 if (type
== DEST_REG
)
5823 bl
->total_benefit
+= benefit
;
5826 /* Fatal error, biv missing for this giv? */
5829 if (type
== DEST_ADDR
)
5832 v
->not_replaceable
= 0;
5836 /* The giv can be replaced outright by the reduced register only if all
5837 of the following conditions are true:
5838 - the insn that sets the giv is always executed on any iteration
5839 on which the giv is used at all
5840 (there are two ways to deduce this:
5841 either the insn is executed on every iteration,
5842 or all uses follow that insn in the same basic block),
5843 - the giv is not used outside the loop
5844 - no assignments to the biv occur during the giv's lifetime. */
5846 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
5847 /* Previous line always fails if INSN was moved by loop opt. */
5848 && REGNO_LAST_LUID (REGNO (dest_reg
))
5849 < INSN_LUID (loop
->end
)
5850 && (! not_every_iteration
5851 || last_use_this_basic_block (dest_reg
, insn
)))
5853 /* Now check that there are no assignments to the biv within the
5854 giv's lifetime. This requires two separate checks. */
5856 /* Check each biv update, and fail if any are between the first
5857 and last use of the giv.
5859 If this loop contains an inner loop that was unrolled, then
5860 the insn modifying the biv may have been emitted by the loop
5861 unrolling code, and hence does not have a valid luid. Just
5862 mark the biv as not replaceable in this case. It is not very
5863 useful as a biv, because it is used in two different loops.
5864 It is very unlikely that we would be able to optimize the giv
5865 using this biv anyways. */
5868 v
->not_replaceable
= 0;
5869 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5871 if (INSN_UID (b
->insn
) >= max_uid_for_loop
5872 || ((INSN_LUID (b
->insn
)
5873 >= REGNO_FIRST_LUID (REGNO (dest_reg
)))
5874 && (INSN_LUID (b
->insn
)
5875 <= REGNO_LAST_LUID (REGNO (dest_reg
)))))
5878 v
->not_replaceable
= 1;
5883 /* If there are any backwards branches that go from after the
5884 biv update to before it, then this giv is not replaceable. */
5886 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5887 if (back_branch_in_range_p (loop
, b
->insn
))
5890 v
->not_replaceable
= 1;
5896 /* May still be replaceable, we don't have enough info here to
5899 v
->not_replaceable
= 0;
5903 /* Record whether the add_val contains a const_int, for later use by
5908 v
->no_const_addval
= 1;
5909 if (tem
== const0_rtx
)
5911 else if (CONSTANT_P (add_val
))
5912 v
->no_const_addval
= 0;
5913 if (GET_CODE (tem
) == PLUS
)
5917 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5918 tem
= XEXP (tem
, 0);
5919 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5920 tem
= XEXP (tem
, 1);
5924 if (CONSTANT_P (XEXP (tem
, 1)))
5925 v
->no_const_addval
= 0;
5929 if (loop_dump_stream
)
5930 loop_giv_dump (v
, loop_dump_stream
, 0);
5933 /* All this does is determine whether a giv can be made replaceable because
5934 its final value can be calculated. This code can not be part of record_giv
5935 above, because final_giv_value requires that the number of loop iterations
5936 be known, and that can not be accurately calculated until after all givs
5937 have been identified. */
5940 check_final_value (loop
, v
)
5941 const struct loop
*loop
;
5942 struct induction
*v
;
5944 rtx final_value
= 0;
5946 /* DEST_ADDR givs will never reach here, because they are always marked
5947 replaceable above in record_giv. */
5949 /* The giv can be replaced outright by the reduced register only if all
5950 of the following conditions are true:
5951 - the insn that sets the giv is always executed on any iteration
5952 on which the giv is used at all
5953 (there are two ways to deduce this:
5954 either the insn is executed on every iteration,
5955 or all uses follow that insn in the same basic block),
5956 - its final value can be calculated (this condition is different
5957 than the one above in record_giv)
5958 - it's not used before the it's set
5959 - no assignments to the biv occur during the giv's lifetime. */
5962 /* This is only called now when replaceable is known to be false. */
5963 /* Clear replaceable, so that it won't confuse final_giv_value. */
5967 if ((final_value
= final_giv_value (loop
, v
))
5968 && (v
->always_executed
5969 || last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5971 int biv_increment_seen
= 0, before_giv_insn
= 0;
5976 v
->not_replaceable
= 0;
5978 /* When trying to determine whether or not a biv increment occurs
5979 during the lifetime of the giv, we can ignore uses of the variable
5980 outside the loop because final_value is true. Hence we can not
5981 use regno_last_uid and regno_first_uid as above in record_giv. */
5983 /* Search the loop to determine whether any assignments to the
5984 biv occur during the giv's lifetime. Start with the insn
5985 that sets the giv, and search around the loop until we come
5986 back to that insn again.
5988 Also fail if there is a jump within the giv's lifetime that jumps
5989 to somewhere outside the lifetime but still within the loop. This
5990 catches spaghetti code where the execution order is not linear, and
5991 hence the above test fails. Here we assume that the giv lifetime
5992 does not extend from one iteration of the loop to the next, so as
5993 to make the test easier. Since the lifetime isn't known yet,
5994 this requires two loops. See also record_giv above. */
5996 last_giv_use
= v
->insn
;
6003 before_giv_insn
= 1;
6004 p
= NEXT_INSN (loop
->start
);
6009 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
6010 || GET_CODE (p
) == CALL_INSN
)
6012 /* It is possible for the BIV increment to use the GIV if we
6013 have a cycle. Thus we must be sure to check each insn for
6014 both BIV and GIV uses, and we must check for BIV uses
6017 if (! biv_increment_seen
6018 && reg_set_p (v
->src_reg
, PATTERN (p
)))
6019 biv_increment_seen
= 1;
6021 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
6023 if (biv_increment_seen
|| before_giv_insn
)
6026 v
->not_replaceable
= 1;
6034 /* Now that the lifetime of the giv is known, check for branches
6035 from within the lifetime to outside the lifetime if it is still
6045 p
= NEXT_INSN (loop
->start
);
6046 if (p
== last_giv_use
)
6049 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
6050 && LABEL_NAME (JUMP_LABEL (p
))
6051 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
6052 && loop_insn_first_p (loop
->start
, JUMP_LABEL (p
)))
6053 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
6054 && loop_insn_first_p (JUMP_LABEL (p
), loop
->end
))))
6057 v
->not_replaceable
= 1;
6059 if (loop_dump_stream
)
6060 fprintf (loop_dump_stream
,
6061 "Found branch outside giv lifetime.\n");
6068 /* If it is replaceable, then save the final value. */
6070 v
->final_value
= final_value
;
6073 if (loop_dump_stream
&& v
->replaceable
)
6074 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
6075 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
6078 /* Update the status of whether a giv can derive other givs.
6080 We need to do something special if there is or may be an update to the biv
6081 between the time the giv is defined and the time it is used to derive
6084 In addition, a giv that is only conditionally set is not allowed to
6085 derive another giv once a label has been passed.
6087 The cases we look at are when a label or an update to a biv is passed. */
6090 update_giv_derive (loop
, p
)
6091 const struct loop
*loop
;
6094 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6095 struct iv_class
*bl
;
6096 struct induction
*biv
, *giv
;
6100 /* Search all IV classes, then all bivs, and finally all givs.
6102 There are three cases we are concerned with. First we have the situation
6103 of a giv that is only updated conditionally. In that case, it may not
6104 derive any givs after a label is passed.
6106 The second case is when a biv update occurs, or may occur, after the
6107 definition of a giv. For certain biv updates (see below) that are
6108 known to occur between the giv definition and use, we can adjust the
6109 giv definition. For others, or when the biv update is conditional,
6110 we must prevent the giv from deriving any other givs. There are two
6111 sub-cases within this case.
6113 If this is a label, we are concerned with any biv update that is done
6114 conditionally, since it may be done after the giv is defined followed by
6115 a branch here (actually, we need to pass both a jump and a label, but
6116 this extra tracking doesn't seem worth it).
6118 If this is a jump, we are concerned about any biv update that may be
6119 executed multiple times. We are actually only concerned about
6120 backward jumps, but it is probably not worth performing the test
6121 on the jump again here.
6123 If this is a biv update, we must adjust the giv status to show that a
6124 subsequent biv update was performed. If this adjustment cannot be done,
6125 the giv cannot derive further givs. */
6127 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
6128 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
6129 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
6132 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
6134 /* If cant_derive is already true, there is no point in
6135 checking all of these conditions again. */
6136 if (giv
->cant_derive
)
6139 /* If this giv is conditionally set and we have passed a label,
6140 it cannot derive anything. */
6141 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
6142 giv
->cant_derive
= 1;
6144 /* Skip givs that have mult_val == 0, since
6145 they are really invariants. Also skip those that are
6146 replaceable, since we know their lifetime doesn't contain
6148 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
6151 /* The only way we can allow this giv to derive another
6152 is if this is a biv increment and we can form the product
6153 of biv->add_val and giv->mult_val. In this case, we will
6154 be able to compute a compensation. */
6155 else if (biv
->insn
== p
)
6160 if (biv
->mult_val
== const1_rtx
)
6161 tem
= simplify_giv_expr (loop
,
6162 gen_rtx_MULT (giv
->mode
,
6165 &ext_val_dummy
, &dummy
);
6167 if (tem
&& giv
->derive_adjustment
)
6168 tem
= simplify_giv_expr
6170 gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
6171 &ext_val_dummy
, &dummy
);
6174 giv
->derive_adjustment
= tem
;
6176 giv
->cant_derive
= 1;
6178 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
6179 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
6180 giv
->cant_derive
= 1;
6185 /* Check whether an insn is an increment legitimate for a basic induction var.
6186 X is the source of insn P, or a part of it.
6187 MODE is the mode in which X should be interpreted.
6189 DEST_REG is the putative biv, also the destination of the insn.
6190 We accept patterns of these forms:
6191 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6192 REG = INVARIANT + REG
6194 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6195 store the additive term into *INC_VAL, and store the place where
6196 we found the additive term into *LOCATION.
6198 If X is an assignment of an invariant into DEST_REG, we set
6199 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6201 We also want to detect a BIV when it corresponds to a variable
6202 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6203 of the variable may be a PLUS that adds a SUBREG of that variable to
6204 an invariant and then sign- or zero-extends the result of the PLUS
6207 Most GIVs in such cases will be in the promoted mode, since that is the
6208 probably the natural computation mode (and almost certainly the mode
6209 used for addresses) on the machine. So we view the pseudo-reg containing
6210 the variable as the BIV, as if it were simply incremented.
6212 Note that treating the entire pseudo as a BIV will result in making
6213 simple increments to any GIVs based on it. However, if the variable
6214 overflows in its declared mode but not its promoted mode, the result will
6215 be incorrect. This is acceptable if the variable is signed, since
6216 overflows in such cases are undefined, but not if it is unsigned, since
6217 those overflows are defined. So we only check for SIGN_EXTEND and
6220 If we cannot find a biv, we return 0. */
6223 basic_induction_var (loop
, x
, mode
, dest_reg
, p
, inc_val
, mult_val
, location
)
6224 const struct loop
*loop
;
6226 enum machine_mode mode
;
6237 code
= GET_CODE (x
);
6242 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
6243 || (GET_CODE (XEXP (x
, 0)) == SUBREG
6244 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
6245 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
6247 argp
= &XEXP (x
, 1);
6249 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
6250 || (GET_CODE (XEXP (x
, 1)) == SUBREG
6251 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
6252 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
6254 argp
= &XEXP (x
, 0);
6260 if (loop_invariant_p (loop
, arg
) != 1)
6263 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
6264 *mult_val
= const1_rtx
;
6269 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6270 handle addition of promoted variables.
6271 ??? The comment at the start of this function is wrong: promoted
6272 variable increments don't look like it says they do. */
6273 return basic_induction_var (loop
, SUBREG_REG (x
),
6274 GET_MODE (SUBREG_REG (x
)),
6275 dest_reg
, p
, inc_val
, mult_val
, location
);
6278 /* If this register is assigned in a previous insn, look at its
6279 source, but don't go outside the loop or past a label. */
6281 /* If this sets a register to itself, we would repeat any previous
6282 biv increment if we applied this strategy blindly. */
6283 if (rtx_equal_p (dest_reg
, x
))
6292 insn
= PREV_INSN (insn
);
6294 while (insn
&& GET_CODE (insn
) == NOTE
6295 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6299 set
= single_set (insn
);
6302 dest
= SET_DEST (set
);
6304 || (GET_CODE (dest
) == SUBREG
6305 && (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
6306 && (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
6307 && SUBREG_REG (dest
) == x
))
6308 return basic_induction_var (loop
, SET_SRC (set
),
6309 (GET_MODE (SET_SRC (set
)) == VOIDmode
6311 : GET_MODE (SET_SRC (set
))),
6313 inc_val
, mult_val
, location
);
6315 while (GET_CODE (dest
) == SIGN_EXTRACT
6316 || GET_CODE (dest
) == ZERO_EXTRACT
6317 || GET_CODE (dest
) == SUBREG
6318 || GET_CODE (dest
) == STRICT_LOW_PART
)
6319 dest
= XEXP (dest
, 0);
6325 /* Can accept constant setting of biv only when inside inner most loop.
6326 Otherwise, a biv of an inner loop may be incorrectly recognized
6327 as a biv of the outer loop,
6328 causing code to be moved INTO the inner loop. */
6330 if (loop_invariant_p (loop
, x
) != 1)
6335 /* convert_modes aborts if we try to convert to or from CCmode, so just
6336 exclude that case. It is very unlikely that a condition code value
6337 would be a useful iterator anyways. convert_modes aborts if we try to
6338 convert a float mode to non-float or vice versa too. */
6339 if (loop
->level
== 1
6340 && GET_MODE_CLASS (mode
) == GET_MODE_CLASS (GET_MODE (dest_reg
))
6341 && GET_MODE_CLASS (mode
) != MODE_CC
)
6343 /* Possible bug here? Perhaps we don't know the mode of X. */
6344 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
6345 *mult_val
= const0_rtx
;
6352 return basic_induction_var (loop
, XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
6353 dest_reg
, p
, inc_val
, mult_val
, location
);
6356 /* Similar, since this can be a sign extension. */
6357 for (insn
= PREV_INSN (p
);
6358 (insn
&& GET_CODE (insn
) == NOTE
6359 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6360 insn
= PREV_INSN (insn
))
6364 set
= single_set (insn
);
6366 if (! rtx_equal_p (dest_reg
, XEXP (x
, 0))
6367 && set
&& SET_DEST (set
) == XEXP (x
, 0)
6368 && GET_CODE (XEXP (x
, 1)) == CONST_INT
6369 && INTVAL (XEXP (x
, 1)) >= 0
6370 && GET_CODE (SET_SRC (set
)) == ASHIFT
6371 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
6372 return basic_induction_var (loop
, XEXP (SET_SRC (set
), 0),
6373 GET_MODE (XEXP (x
, 0)),
6374 dest_reg
, insn
, inc_val
, mult_val
,
6383 /* A general induction variable (giv) is any quantity that is a linear
6384 function of a basic induction variable,
6385 i.e. giv = biv * mult_val + add_val.
6386 The coefficients can be any loop invariant quantity.
6387 A giv need not be computed directly from the biv;
6388 it can be computed by way of other givs. */
6390 /* Determine whether X computes a giv.
6391 If it does, return a nonzero value
6392 which is the benefit from eliminating the computation of X;
6393 set *SRC_REG to the register of the biv that it is computed from;
6394 set *ADD_VAL and *MULT_VAL to the coefficients,
6395 such that the value of X is biv * mult + add; */
6398 general_induction_var (loop
, x
, src_reg
, add_val
, mult_val
, ext_val
,
6399 is_addr
, pbenefit
, addr_mode
)
6400 const struct loop
*loop
;
6408 enum machine_mode addr_mode
;
6410 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6413 /* If this is an invariant, forget it, it isn't a giv. */
6414 if (loop_invariant_p (loop
, x
) == 1)
6418 *ext_val
= NULL_RTX
;
6419 x
= simplify_giv_expr (loop
, x
, ext_val
, pbenefit
);
6423 switch (GET_CODE (x
))
6427 /* Since this is now an invariant and wasn't before, it must be a giv
6428 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6430 *src_reg
= ivs
->list
->biv
->dest_reg
;
6431 *mult_val
= const0_rtx
;
6436 /* This is equivalent to a BIV. */
6438 *mult_val
= const1_rtx
;
6439 *add_val
= const0_rtx
;
6443 /* Either (plus (biv) (invar)) or
6444 (plus (mult (biv) (invar_1)) (invar_2)). */
6445 if (GET_CODE (XEXP (x
, 0)) == MULT
)
6447 *src_reg
= XEXP (XEXP (x
, 0), 0);
6448 *mult_val
= XEXP (XEXP (x
, 0), 1);
6452 *src_reg
= XEXP (x
, 0);
6453 *mult_val
= const1_rtx
;
6455 *add_val
= XEXP (x
, 1);
6459 /* ADD_VAL is zero. */
6460 *src_reg
= XEXP (x
, 0);
6461 *mult_val
= XEXP (x
, 1);
6462 *add_val
= const0_rtx
;
6469 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6470 unless they are CONST_INT). */
6471 if (GET_CODE (*add_val
) == USE
)
6472 *add_val
= XEXP (*add_val
, 0);
6473 if (GET_CODE (*mult_val
) == USE
)
6474 *mult_val
= XEXP (*mult_val
, 0);
6477 *pbenefit
+= address_cost (orig_x
, addr_mode
) - reg_address_cost
;
6479 *pbenefit
+= rtx_cost (orig_x
, SET
);
6481 /* Always return true if this is a giv so it will be detected as such,
6482 even if the benefit is zero or negative. This allows elimination
6483 of bivs that might otherwise not be eliminated. */
6487 /* Given an expression, X, try to form it as a linear function of a biv.
6488 We will canonicalize it to be of the form
6489 (plus (mult (BIV) (invar_1))
6491 with possible degeneracies.
6493 The invariant expressions must each be of a form that can be used as a
6494 machine operand. We surround then with a USE rtx (a hack, but localized
6495 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6496 routine; it is the caller's responsibility to strip them.
6498 If no such canonicalization is possible (i.e., two biv's are used or an
6499 expression that is neither invariant nor a biv or giv), this routine
6502 For a nonzero return, the result will have a code of CONST_INT, USE,
6503 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6505 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6507 static rtx sge_plus
PARAMS ((enum machine_mode
, rtx
, rtx
));
6508 static rtx sge_plus_constant
PARAMS ((rtx
, rtx
));
6511 simplify_giv_expr (loop
, x
, ext_val
, benefit
)
6512 const struct loop
*loop
;
6517 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6518 struct loop_regs
*regs
= LOOP_REGS (loop
);
6519 enum machine_mode mode
= GET_MODE (x
);
6523 /* If this is not an integer mode, or if we cannot do arithmetic in this
6524 mode, this can't be a giv. */
6525 if (mode
!= VOIDmode
6526 && (GET_MODE_CLASS (mode
) != MODE_INT
6527 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
6530 switch (GET_CODE (x
))
6533 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6534 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6535 if (arg0
== 0 || arg1
== 0)
6538 /* Put constant last, CONST_INT last if both constant. */
6539 if ((GET_CODE (arg0
) == USE
6540 || GET_CODE (arg0
) == CONST_INT
)
6541 && ! ((GET_CODE (arg0
) == USE
6542 && GET_CODE (arg1
) == USE
)
6543 || GET_CODE (arg1
) == CONST_INT
))
6544 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6546 /* Handle addition of zero, then addition of an invariant. */
6547 if (arg1
== const0_rtx
)
6549 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
6550 switch (GET_CODE (arg0
))
6554 /* Adding two invariants must result in an invariant, so enclose
6555 addition operation inside a USE and return it. */
6556 if (GET_CODE (arg0
) == USE
)
6557 arg0
= XEXP (arg0
, 0);
6558 if (GET_CODE (arg1
) == USE
)
6559 arg1
= XEXP (arg1
, 0);
6561 if (GET_CODE (arg0
) == CONST_INT
)
6562 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6563 if (GET_CODE (arg1
) == CONST_INT
)
6564 tem
= sge_plus_constant (arg0
, arg1
);
6566 tem
= sge_plus (mode
, arg0
, arg1
);
6568 if (GET_CODE (tem
) != CONST_INT
)
6569 tem
= gen_rtx_USE (mode
, tem
);
6574 /* biv + invar or mult + invar. Return sum. */
6575 return gen_rtx_PLUS (mode
, arg0
, arg1
);
6578 /* (a + invar_1) + invar_2. Associate. */
6580 simplify_giv_expr (loop
,
6592 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6593 MULT to reduce cases. */
6594 if (GET_CODE (arg0
) == REG
)
6595 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
6596 if (GET_CODE (arg1
) == REG
)
6597 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
6599 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6600 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6601 Recurse to associate the second PLUS. */
6602 if (GET_CODE (arg1
) == MULT
)
6603 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6605 if (GET_CODE (arg1
) == PLUS
)
6607 simplify_giv_expr (loop
,
6609 gen_rtx_PLUS (mode
, arg0
,
6614 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6615 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
6618 if (!rtx_equal_p (arg0
, arg1
))
6621 return simplify_giv_expr (loop
,
6630 /* Handle "a - b" as "a + b * (-1)". */
6631 return simplify_giv_expr (loop
,
6640 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6641 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6642 if (arg0
== 0 || arg1
== 0)
6645 /* Put constant last, CONST_INT last if both constant. */
6646 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
6647 && GET_CODE (arg1
) != CONST_INT
)
6648 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6650 /* If second argument is not now constant, not giv. */
6651 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
6654 /* Handle multiply by 0 or 1. */
6655 if (arg1
== const0_rtx
)
6658 else if (arg1
== const1_rtx
)
6661 switch (GET_CODE (arg0
))
6664 /* biv * invar. Done. */
6665 return gen_rtx_MULT (mode
, arg0
, arg1
);
6668 /* Product of two constants. */
6669 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
6672 /* invar * invar is a giv, but attempt to simplify it somehow. */
6673 if (GET_CODE (arg1
) != CONST_INT
)
6676 arg0
= XEXP (arg0
, 0);
6677 if (GET_CODE (arg0
) == MULT
)
6679 /* (invar_0 * invar_1) * invar_2. Associate. */
6680 return simplify_giv_expr (loop
,
6689 /* Porpagate the MULT expressions to the intermost nodes. */
6690 else if (GET_CODE (arg0
) == PLUS
)
6692 /* (invar_0 + invar_1) * invar_2. Distribute. */
6693 return simplify_giv_expr (loop
,
6705 return gen_rtx_USE (mode
, gen_rtx_MULT (mode
, arg0
, arg1
));
6708 /* (a * invar_1) * invar_2. Associate. */
6709 return simplify_giv_expr (loop
,
6718 /* (a + invar_1) * invar_2. Distribute. */
6719 return simplify_giv_expr (loop
,
6734 /* Shift by constant is multiply by power of two. */
6735 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
6739 simplify_giv_expr (loop
,
6742 GEN_INT ((HOST_WIDE_INT
) 1
6743 << INTVAL (XEXP (x
, 1)))),
6747 /* "-a" is "a * (-1)" */
6748 return simplify_giv_expr (loop
,
6749 gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
6753 /* "~a" is "-a - 1". Silly, but easy. */
6754 return simplify_giv_expr (loop
,
6755 gen_rtx_MINUS (mode
,
6756 gen_rtx_NEG (mode
, XEXP (x
, 0)),
6761 /* Already in proper form for invariant. */
6767 /* Conditionally recognize extensions of simple IVs. After we've
6768 computed loop traversal counts and verified the range of the
6769 source IV, we'll reevaluate this as a GIV. */
6770 if (*ext_val
== NULL_RTX
)
6772 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6773 if (arg0
&& *ext_val
== NULL_RTX
&& GET_CODE (arg0
) == REG
)
6775 *ext_val
= gen_rtx_fmt_e (GET_CODE (x
), mode
, arg0
);
6782 /* If this is a new register, we can't deal with it. */
6783 if (REGNO (x
) >= max_reg_before_loop
)
6786 /* Check for biv or giv. */
6787 switch (REG_IV_TYPE (ivs
, REGNO (x
)))
6791 case GENERAL_INDUCT
:
6793 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (x
));
6795 /* Form expression from giv and add benefit. Ensure this giv
6796 can derive another and subtract any needed adjustment if so. */
6798 /* Increasing the benefit here is risky. The only case in which it
6799 is arguably correct is if this is the only use of V. In other
6800 cases, this will artificially inflate the benefit of the current
6801 giv, and lead to suboptimal code. Thus, it is disabled, since
6802 potentially not reducing an only marginally beneficial giv is
6803 less harmful than reducing many givs that are not really
6806 rtx single_use
= regs
->array
[REGNO (x
)].single_usage
;
6807 if (single_use
&& single_use
!= const0_rtx
)
6808 *benefit
+= v
->benefit
;
6814 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
6815 v
->src_reg
, v
->mult_val
),
6818 if (v
->derive_adjustment
)
6819 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
6820 arg0
= simplify_giv_expr (loop
, tem
, ext_val
, benefit
);
6823 if (!v
->ext_dependent
)
6828 *ext_val
= v
->ext_dependent
;
6836 /* If it isn't an induction variable, and it is invariant, we
6837 may be able to simplify things further by looking through
6838 the bits we just moved outside the loop. */
6839 if (loop_invariant_p (loop
, x
) == 1)
6842 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
6844 for (m
= movables
->head
; m
; m
= m
->next
)
6845 if (rtx_equal_p (x
, m
->set_dest
))
6847 /* Ok, we found a match. Substitute and simplify. */
6849 /* If we match another movable, we must use that, as
6850 this one is going away. */
6852 return simplify_giv_expr (loop
, m
->match
->set_dest
,
6855 /* If consec is nonzero, this is a member of a group of
6856 instructions that were moved together. We handle this
6857 case only to the point of seeking to the last insn and
6858 looking for a REG_EQUAL. Fail if we don't find one. */
6865 tem
= NEXT_INSN (tem
);
6869 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
6871 tem
= XEXP (tem
, 0);
6875 tem
= single_set (m
->insn
);
6877 tem
= SET_SRC (tem
);
6882 /* What we are most interested in is pointer
6883 arithmetic on invariants -- only take
6884 patterns we may be able to do something with. */
6885 if (GET_CODE (tem
) == PLUS
6886 || GET_CODE (tem
) == MULT
6887 || GET_CODE (tem
) == ASHIFT
6888 || GET_CODE (tem
) == CONST_INT
6889 || GET_CODE (tem
) == SYMBOL_REF
)
6891 tem
= simplify_giv_expr (loop
, tem
, ext_val
,
6896 else if (GET_CODE (tem
) == CONST
6897 && GET_CODE (XEXP (tem
, 0)) == PLUS
6898 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6899 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6901 tem
= simplify_giv_expr (loop
, XEXP (tem
, 0),
6913 /* Fall through to general case. */
6915 /* If invariant, return as USE (unless CONST_INT).
6916 Otherwise, not giv. */
6917 if (GET_CODE (x
) == USE
)
6920 if (loop_invariant_p (loop
, x
) == 1)
6922 if (GET_CODE (x
) == CONST_INT
)
6924 if (GET_CODE (x
) == CONST
6925 && GET_CODE (XEXP (x
, 0)) == PLUS
6926 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6927 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
6929 return gen_rtx_USE (mode
, x
);
6936 /* This routine folds invariants such that there is only ever one
6937 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6940 sge_plus_constant (x
, c
)
6943 if (GET_CODE (x
) == CONST_INT
)
6944 return GEN_INT (INTVAL (x
) + INTVAL (c
));
6945 else if (GET_CODE (x
) != PLUS
)
6946 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
6947 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
6949 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
6950 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
6952 else if (GET_CODE (XEXP (x
, 0)) == PLUS
6953 || GET_CODE (XEXP (x
, 1)) != PLUS
)
6955 return gen_rtx_PLUS (GET_MODE (x
),
6956 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
6960 return gen_rtx_PLUS (GET_MODE (x
),
6961 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
6966 sge_plus (mode
, x
, y
)
6967 enum machine_mode mode
;
6970 while (GET_CODE (y
) == PLUS
)
6972 rtx a
= XEXP (y
, 0);
6973 if (GET_CODE (a
) == CONST_INT
)
6974 x
= sge_plus_constant (x
, a
);
6976 x
= gen_rtx_PLUS (mode
, x
, a
);
6979 if (GET_CODE (y
) == CONST_INT
)
6980 x
= sge_plus_constant (x
, y
);
6982 x
= gen_rtx_PLUS (mode
, x
, y
);
6986 /* Help detect a giv that is calculated by several consecutive insns;
6990 The caller has already identified the first insn P as having a giv as dest;
6991 we check that all other insns that set the same register follow
6992 immediately after P, that they alter nothing else,
6993 and that the result of the last is still a giv.
6995 The value is 0 if the reg set in P is not really a giv.
6996 Otherwise, the value is the amount gained by eliminating
6997 all the consecutive insns that compute the value.
6999 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
7000 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
7002 The coefficients of the ultimate giv value are stored in
7003 *MULT_VAL and *ADD_VAL. */
7006 consec_sets_giv (loop
, first_benefit
, p
, src_reg
, dest_reg
,
7007 add_val
, mult_val
, ext_val
, last_consec_insn
)
7008 const struct loop
*loop
;
7016 rtx
*last_consec_insn
;
7018 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7019 struct loop_regs
*regs
= LOOP_REGS (loop
);
7026 /* Indicate that this is a giv so that we can update the value produced in
7027 each insn of the multi-insn sequence.
7029 This induction structure will be used only by the call to
7030 general_induction_var below, so we can allocate it on our stack.
7031 If this is a giv, our caller will replace the induct var entry with
7032 a new induction structure. */
7033 struct induction
*v
;
7035 if (REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != UNKNOWN_INDUCT
)
7038 v
= (struct induction
*) alloca (sizeof (struct induction
));
7039 v
->src_reg
= src_reg
;
7040 v
->mult_val
= *mult_val
;
7041 v
->add_val
= *add_val
;
7042 v
->benefit
= first_benefit
;
7044 v
->derive_adjustment
= 0;
7045 v
->ext_dependent
= NULL_RTX
;
7047 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
7048 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
7050 count
= regs
->array
[REGNO (dest_reg
)].n_times_set
- 1;
7055 code
= GET_CODE (p
);
7057 /* If libcall, skip to end of call sequence. */
7058 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
7062 && (set
= single_set (p
))
7063 && GET_CODE (SET_DEST (set
)) == REG
7064 && SET_DEST (set
) == dest_reg
7065 && (general_induction_var (loop
, SET_SRC (set
), &src_reg
,
7066 add_val
, mult_val
, ext_val
, 0,
7068 /* Giv created by equivalent expression. */
7069 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
7070 && general_induction_var (loop
, XEXP (temp
, 0), &src_reg
,
7071 add_val
, mult_val
, ext_val
, 0,
7072 &benefit
, VOIDmode
)))
7073 && src_reg
== v
->src_reg
)
7075 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
7076 benefit
+= libcall_benefit (p
);
7079 v
->mult_val
= *mult_val
;
7080 v
->add_val
= *add_val
;
7081 v
->benefit
+= benefit
;
7083 else if (code
!= NOTE
)
7085 /* Allow insns that set something other than this giv to a
7086 constant. Such insns are needed on machines which cannot
7087 include long constants and should not disqualify a giv. */
7089 && (set
= single_set (p
))
7090 && SET_DEST (set
) != dest_reg
7091 && CONSTANT_P (SET_SRC (set
)))
7094 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7099 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7100 *last_consec_insn
= p
;
7104 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7105 represented by G1. If no such expression can be found, or it is clear that
7106 it cannot possibly be a valid address, 0 is returned.
7108 To perform the computation, we note that
7111 where `v' is the biv.
7113 So G2 = (y/b) * G1 + (b - a*y/x).
7115 Note that MULT = y/x.
7117 Update: A and B are now allowed to be additive expressions such that
7118 B contains all variables in A. That is, computing B-A will not require
7119 subtracting variables. */
7122 express_from_1 (a
, b
, mult
)
7125 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7127 if (mult
== const0_rtx
)
7130 /* If MULT is not 1, we cannot handle A with non-constants, since we
7131 would then be required to subtract multiples of the registers in A.
7132 This is theoretically possible, and may even apply to some Fortran
7133 constructs, but it is a lot of work and we do not attempt it here. */
7135 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
7138 /* In general these structures are sorted top to bottom (down the PLUS
7139 chain), but not left to right across the PLUS. If B is a higher
7140 order giv than A, we can strip one level and recurse. If A is higher
7141 order, we'll eventually bail out, but won't know that until the end.
7142 If they are the same, we'll strip one level around this loop. */
7144 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
7146 rtx ra
, rb
, oa
, ob
, tmp
;
7148 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7149 if (GET_CODE (ra
) == PLUS
)
7150 tmp
= ra
, ra
= oa
, oa
= tmp
;
7152 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
7153 if (GET_CODE (rb
) == PLUS
)
7154 tmp
= rb
, rb
= ob
, ob
= tmp
;
7156 if (rtx_equal_p (ra
, rb
))
7157 /* We matched: remove one reg completely. */
7159 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
7160 /* An alternate match. */
7162 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
7163 /* An alternate match. */
7167 /* Indicates an extra register in B. Strip one level from B and
7168 recurse, hoping B was the higher order expression. */
7169 ob
= express_from_1 (a
, ob
, mult
);
7172 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
7176 /* Here we are at the last level of A, go through the cases hoping to
7177 get rid of everything but a constant. */
7179 if (GET_CODE (a
) == PLUS
)
7183 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7184 if (rtx_equal_p (oa
, b
))
7186 else if (!rtx_equal_p (ra
, b
))
7189 if (GET_CODE (oa
) != CONST_INT
)
7192 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
7194 else if (GET_CODE (a
) == CONST_INT
)
7196 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
7198 else if (CONSTANT_P (a
))
7200 enum machine_mode mode_a
= GET_MODE (a
);
7201 enum machine_mode mode_b
= GET_MODE (b
);
7202 enum machine_mode mode
= mode_b
== VOIDmode
? mode_a
: mode_b
;
7203 return simplify_gen_binary (MINUS
, mode
, b
, a
);
7205 else if (GET_CODE (b
) == PLUS
)
7207 if (rtx_equal_p (a
, XEXP (b
, 0)))
7209 else if (rtx_equal_p (a
, XEXP (b
, 1)))
7214 else if (rtx_equal_p (a
, b
))
7221 express_from (g1
, g2
)
7222 struct induction
*g1
, *g2
;
7226 /* The value that G1 will be multiplied by must be a constant integer. Also,
7227 the only chance we have of getting a valid address is if b*c/a (see above
7228 for notation) is also an integer. */
7229 if (GET_CODE (g1
->mult_val
) == CONST_INT
7230 && GET_CODE (g2
->mult_val
) == CONST_INT
)
7232 if (g1
->mult_val
== const0_rtx
7233 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
7235 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
7237 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
7241 /* ??? Find out if the one is a multiple of the other? */
7245 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
7246 if (add
== NULL_RTX
)
7248 /* Failed. If we've got a multiplication factor between G1 and G2,
7249 scale G1's addend and try again. */
7250 if (INTVAL (mult
) > 1)
7252 rtx g1_add_val
= g1
->add_val
;
7253 if (GET_CODE (g1_add_val
) == MULT
7254 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
7257 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
7258 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
7259 XEXP (g1_add_val
, 0), GEN_INT (m
));
7263 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
7267 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
7270 if (add
== NULL_RTX
)
7273 /* Form simplified final result. */
7274 if (mult
== const0_rtx
)
7276 else if (mult
== const1_rtx
)
7277 mult
= g1
->dest_reg
;
7279 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
7281 if (add
== const0_rtx
)
7285 if (GET_CODE (add
) == PLUS
7286 && CONSTANT_P (XEXP (add
, 1)))
7288 rtx tem
= XEXP (add
, 1);
7289 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
7293 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
7297 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7298 represented by G1. This indicates that G2 should be combined with G1 and
7299 that G2 can use (either directly or via an address expression) a register
7300 used to represent G1. */
7303 combine_givs_p (g1
, g2
)
7304 struct induction
*g1
, *g2
;
7308 /* With the introduction of ext dependent givs, we must care for modes.
7309 G2 must not use a wider mode than G1. */
7310 if (GET_MODE_SIZE (g1
->mode
) < GET_MODE_SIZE (g2
->mode
))
7313 ret
= comb
= express_from (g1
, g2
);
7314 if (comb
== NULL_RTX
)
7316 if (g1
->mode
!= g2
->mode
)
7317 ret
= gen_lowpart (g2
->mode
, comb
);
7319 /* If these givs are identical, they can be combined. We use the results
7320 of express_from because the addends are not in a canonical form, so
7321 rtx_equal_p is a weaker test. */
7322 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7323 combination to be the other way round. */
7324 if (comb
== g1
->dest_reg
7325 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
7330 /* If G2 can be expressed as a function of G1 and that function is valid
7331 as an address and no more expensive than using a register for G2,
7332 the expression of G2 in terms of G1 can be used. */
7334 && g2
->giv_type
== DEST_ADDR
7335 && memory_address_p (GET_MODE (g2
->mem
), ret
)
7336 /* ??? Looses, especially with -fforce-addr, where *g2->location
7337 will always be a register, and so anything more complicated
7341 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
7343 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
7354 /* Check each extension dependent giv in this class to see if its
7355 root biv is safe from wrapping in the interior mode, which would
7356 make the giv illegal. */
7359 check_ext_dependent_givs (bl
, loop_info
)
7360 struct iv_class
*bl
;
7361 struct loop_info
*loop_info
;
7363 int ze_ok
= 0, se_ok
= 0, info_ok
= 0;
7364 enum machine_mode biv_mode
= GET_MODE (bl
->biv
->src_reg
);
7365 HOST_WIDE_INT start_val
;
7366 unsigned HOST_WIDE_INT u_end_val
= 0;
7367 unsigned HOST_WIDE_INT u_start_val
= 0;
7369 struct induction
*v
;
7371 /* Make sure the iteration data is available. We must have
7372 constants in order to be certain of no overflow. */
7373 /* ??? An unknown iteration count with an increment of +-1
7374 combined with friendly exit tests of against an invariant
7375 value is also ameanable to optimization. Not implemented. */
7376 if (loop_info
->n_iterations
> 0
7377 && bl
->initial_value
7378 && GET_CODE (bl
->initial_value
) == CONST_INT
7379 && (incr
= biv_total_increment (bl
))
7380 && GET_CODE (incr
) == CONST_INT
7381 /* Make sure the host can represent the arithmetic. */
7382 && HOST_BITS_PER_WIDE_INT
>= GET_MODE_BITSIZE (biv_mode
))
7384 unsigned HOST_WIDE_INT abs_incr
, total_incr
;
7385 HOST_WIDE_INT s_end_val
;
7389 start_val
= INTVAL (bl
->initial_value
);
7390 u_start_val
= start_val
;
7392 neg_incr
= 0, abs_incr
= INTVAL (incr
);
7393 if (INTVAL (incr
) < 0)
7394 neg_incr
= 1, abs_incr
= -abs_incr
;
7395 total_incr
= abs_incr
* loop_info
->n_iterations
;
7397 /* Check for host arithmatic overflow. */
7398 if (total_incr
/ loop_info
->n_iterations
== abs_incr
)
7400 unsigned HOST_WIDE_INT u_max
;
7401 HOST_WIDE_INT s_max
;
7403 u_end_val
= start_val
+ (neg_incr
? -total_incr
: total_incr
);
7404 s_end_val
= u_end_val
;
7405 u_max
= GET_MODE_MASK (biv_mode
);
7408 /* Check zero extension of biv ok. */
7410 /* Check for host arithmatic overflow. */
7412 ? u_end_val
< u_start_val
7413 : u_end_val
> u_start_val
)
7414 /* Check for target arithmetic overflow. */
7416 ? 1 /* taken care of with host overflow */
7417 : u_end_val
<= u_max
))
7422 /* Check sign extension of biv ok. */
7423 /* ??? While it is true that overflow with signed and pointer
7424 arithmetic is undefined, I fear too many programmers don't
7425 keep this fact in mind -- myself included on occasion.
7426 So leave alone with the signed overflow optimizations. */
7427 if (start_val
>= -s_max
- 1
7428 /* Check for host arithmatic overflow. */
7430 ? s_end_val
< start_val
7431 : s_end_val
> start_val
)
7432 /* Check for target arithmetic overflow. */
7434 ? s_end_val
>= -s_max
- 1
7435 : s_end_val
<= s_max
))
7442 /* Invalidate givs that fail the tests. */
7443 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7444 if (v
->ext_dependent
)
7446 enum rtx_code code
= GET_CODE (v
->ext_dependent
);
7459 /* We don't know whether this value is being used as either
7460 signed or unsigned, so to safely truncate we must satisfy
7461 both. The initial check here verifies the BIV itself;
7462 once that is successful we may check its range wrt the
7466 enum machine_mode outer_mode
= GET_MODE (v
->ext_dependent
);
7467 unsigned HOST_WIDE_INT max
= GET_MODE_MASK (outer_mode
) >> 1;
7469 /* We know from the above that both endpoints are nonnegative,
7470 and that there is no wrapping. Verify that both endpoints
7471 are within the (signed) range of the outer mode. */
7472 if (u_start_val
<= max
&& u_end_val
<= max
)
7483 if (loop_dump_stream
)
7485 fprintf (loop_dump_stream
,
7486 "Verified ext dependent giv at %d of reg %d\n",
7487 INSN_UID (v
->insn
), bl
->regno
);
7492 if (loop_dump_stream
)
7497 why
= "biv iteration values overflowed";
7501 incr
= biv_total_increment (bl
);
7502 if (incr
== const1_rtx
)
7503 why
= "biv iteration info incomplete; incr by 1";
7505 why
= "biv iteration info incomplete";
7508 fprintf (loop_dump_stream
,
7509 "Failed ext dependent giv at %d, %s\n",
7510 INSN_UID (v
->insn
), why
);
7513 bl
->all_reduced
= 0;
7518 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7521 extend_value_for_giv (v
, value
)
7522 struct induction
*v
;
7525 rtx ext_dep
= v
->ext_dependent
;
7530 /* Recall that check_ext_dependent_givs verified that the known bounds
7531 of a biv did not overflow or wrap with respect to the extension for
7532 the giv. Therefore, constants need no additional adjustment. */
7533 if (CONSTANT_P (value
) && GET_MODE (value
) == VOIDmode
)
7536 /* Otherwise, we must adjust the value to compensate for the
7537 differing modes of the biv and the giv. */
7538 return gen_rtx_fmt_e (GET_CODE (ext_dep
), GET_MODE (ext_dep
), value
);
7541 struct combine_givs_stats
7548 cmp_combine_givs_stats (xp
, yp
)
7552 const struct combine_givs_stats
* const x
=
7553 (const struct combine_givs_stats
*) xp
;
7554 const struct combine_givs_stats
* const y
=
7555 (const struct combine_givs_stats
*) yp
;
7557 d
= y
->total_benefit
- x
->total_benefit
;
7558 /* Stabilize the sort. */
7560 d
= x
->giv_number
- y
->giv_number
;
7564 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7565 any other. If so, point SAME to the giv combined with and set NEW_REG to
7566 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7567 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7570 combine_givs (regs
, bl
)
7571 struct loop_regs
*regs
;
7572 struct iv_class
*bl
;
7574 /* Additional benefit to add for being combined multiple times. */
7575 const int extra_benefit
= 3;
7577 struct induction
*g1
, *g2
, **giv_array
;
7578 int i
, j
, k
, giv_count
;
7579 struct combine_givs_stats
*stats
;
7582 /* Count givs, because bl->giv_count is incorrect here. */
7584 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7589 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7591 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7593 giv_array
[i
++] = g1
;
7595 stats
= (struct combine_givs_stats
*) xcalloc (giv_count
, sizeof (*stats
));
7596 can_combine
= (rtx
*) xcalloc (giv_count
, giv_count
* sizeof (rtx
));
7598 for (i
= 0; i
< giv_count
; i
++)
7604 stats
[i
].giv_number
= i
;
7606 /* If a DEST_REG GIV is used only once, do not allow it to combine
7607 with anything, for in doing so we will gain nothing that cannot
7608 be had by simply letting the GIV with which we would have combined
7609 to be reduced on its own. The losage shows up in particular with
7610 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7611 be seen elsewhere as well. */
7612 if (g1
->giv_type
== DEST_REG
7613 && (single_use
= regs
->array
[REGNO (g1
->dest_reg
)].single_usage
)
7614 && single_use
!= const0_rtx
)
7617 this_benefit
= g1
->benefit
;
7618 /* Add an additional weight for zero addends. */
7619 if (g1
->no_const_addval
)
7622 for (j
= 0; j
< giv_count
; j
++)
7628 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
7630 can_combine
[i
* giv_count
+ j
] = this_combine
;
7631 this_benefit
+= g2
->benefit
+ extra_benefit
;
7634 stats
[i
].total_benefit
= this_benefit
;
7637 /* Iterate, combining until we can't. */
7639 qsort (stats
, giv_count
, sizeof (*stats
), cmp_combine_givs_stats
);
7641 if (loop_dump_stream
)
7643 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
7644 for (k
= 0; k
< giv_count
; k
++)
7646 g1
= giv_array
[stats
[k
].giv_number
];
7647 if (!g1
->combined_with
&& !g1
->same
)
7648 fprintf (loop_dump_stream
, " {%d, %d}",
7649 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
7650 stats
[k
].total_benefit
);
7652 putc ('\n', loop_dump_stream
);
7655 for (k
= 0; k
< giv_count
; k
++)
7657 int g1_add_benefit
= 0;
7659 i
= stats
[k
].giv_number
;
7662 /* If it has already been combined, skip. */
7663 if (g1
->combined_with
|| g1
->same
)
7666 for (j
= 0; j
< giv_count
; j
++)
7669 if (g1
!= g2
&& can_combine
[i
* giv_count
+ j
]
7670 /* If it has already been combined, skip. */
7671 && ! g2
->same
&& ! g2
->combined_with
)
7675 g2
->new_reg
= can_combine
[i
* giv_count
+ j
];
7677 /* For destination, we now may replace by mem expression instead
7678 of register. This changes the costs considerably, so add the
7680 if (g2
->giv_type
== DEST_ADDR
)
7681 g2
->benefit
= (g2
->benefit
+ reg_address_cost
7682 - address_cost (g2
->new_reg
,
7683 GET_MODE (g2
->mem
)));
7684 g1
->combined_with
++;
7685 g1
->lifetime
+= g2
->lifetime
;
7687 g1_add_benefit
+= g2
->benefit
;
7689 /* ??? The new final_[bg]iv_value code does a much better job
7690 of finding replaceable giv's, and hence this code may no
7691 longer be necessary. */
7692 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
7693 g1_add_benefit
-= copy_cost
;
7695 /* To help optimize the next set of combinations, remove
7696 this giv from the benefits of other potential mates. */
7697 for (l
= 0; l
< giv_count
; ++l
)
7699 int m
= stats
[l
].giv_number
;
7700 if (can_combine
[m
* giv_count
+ j
])
7701 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
7704 if (loop_dump_stream
)
7705 fprintf (loop_dump_stream
,
7706 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7707 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
),
7708 g1
->benefit
, g1_add_benefit
, g1
->lifetime
);
7712 /* To help optimize the next set of combinations, remove
7713 this giv from the benefits of other potential mates. */
7714 if (g1
->combined_with
)
7716 for (j
= 0; j
< giv_count
; ++j
)
7718 int m
= stats
[j
].giv_number
;
7719 if (can_combine
[m
* giv_count
+ i
])
7720 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
7723 g1
->benefit
+= g1_add_benefit
;
7725 /* We've finished with this giv, and everything it touched.
7726 Restart the combination so that proper weights for the
7727 rest of the givs are properly taken into account. */
7728 /* ??? Ideally we would compact the arrays at this point, so
7729 as to not cover old ground. But sanely compacting
7730 can_combine is tricky. */
7740 /* Generate sequence for REG = B * M + A. */
7743 gen_add_mult (b
, m
, a
, reg
)
7744 rtx b
; /* initial value of basic induction variable */
7745 rtx m
; /* multiplicative constant */
7746 rtx a
; /* additive constant */
7747 rtx reg
; /* destination register */
7753 /* Use unsigned arithmetic. */
7754 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7756 emit_move_insn (reg
, result
);
7764 /* Update registers created in insn sequence SEQ. */
7767 loop_regs_update (loop
, seq
)
7768 const struct loop
*loop ATTRIBUTE_UNUSED
;
7773 /* Update register info for alias analysis. */
7775 if (seq
== NULL_RTX
)
7781 while (insn
!= NULL_RTX
)
7783 rtx set
= single_set (insn
);
7785 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7786 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
7788 insn
= NEXT_INSN (insn
);
7791 else if (GET_CODE (seq
) == SET
7792 && GET_CODE (SET_DEST (seq
)) == REG
)
7793 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
7797 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7800 loop_iv_add_mult_emit_before (loop
, b
, m
, a
, reg
, before_bb
, before_insn
)
7801 const struct loop
*loop
;
7802 rtx b
; /* initial value of basic induction variable */
7803 rtx m
; /* multiplicative constant */
7804 rtx a
; /* additive constant */
7805 rtx reg
; /* destination register */
7806 basic_block before_bb
;
7813 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
);
7817 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7818 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7820 /* Increase the lifetime of any invariants moved further in code. */
7821 update_reg_last_use (a
, before_insn
);
7822 update_reg_last_use (b
, before_insn
);
7823 update_reg_last_use (m
, before_insn
);
7825 loop_insn_emit_before (loop
, before_bb
, before_insn
, seq
);
7827 /* It is possible that the expansion created lots of new registers.
7828 Iterate over the sequence we just created and record them all. */
7829 loop_regs_update (loop
, seq
);
7833 /* Emit insns in loop pre-header to set REG = B * M + A. */
7836 loop_iv_add_mult_sink (loop
, b
, m
, a
, reg
)
7837 const struct loop
*loop
;
7838 rtx b
; /* initial value of basic induction variable */
7839 rtx m
; /* multiplicative constant */
7840 rtx a
; /* additive constant */
7841 rtx reg
; /* destination register */
7845 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7846 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7848 /* Increase the lifetime of any invariants moved further in code.
7849 ???? Is this really necessary? */
7850 update_reg_last_use (a
, loop
->sink
);
7851 update_reg_last_use (b
, loop
->sink
);
7852 update_reg_last_use (m
, loop
->sink
);
7854 loop_insn_sink (loop
, seq
);
7856 /* It is possible that the expansion created lots of new registers.
7857 Iterate over the sequence we just created and record them all. */
7858 loop_regs_update (loop
, seq
);
7862 /* Emit insns after loop to set REG = B * M + A. */
7865 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
)
7866 const struct loop
*loop
;
7867 rtx b
; /* initial value of basic induction variable */
7868 rtx m
; /* multiplicative constant */
7869 rtx a
; /* additive constant */
7870 rtx reg
; /* destination register */
7874 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7875 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7877 loop_insn_hoist (loop
, seq
);
7879 /* It is possible that the expansion created lots of new registers.
7880 Iterate over the sequence we just created and record them all. */
7881 loop_regs_update (loop
, seq
);
7886 /* Similar to gen_add_mult, but compute cost rather than generating
7890 iv_add_mult_cost (b
, m
, a
, reg
)
7891 rtx b
; /* initial value of basic induction variable */
7892 rtx m
; /* multiplicative constant */
7893 rtx a
; /* additive constant */
7894 rtx reg
; /* destination register */
7900 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7902 emit_move_insn (reg
, result
);
7903 last
= get_last_insn ();
7906 rtx t
= single_set (last
);
7908 cost
+= rtx_cost (SET_SRC (t
), SET
);
7909 last
= PREV_INSN (last
);
7915 /* Test whether A * B can be computed without
7916 an actual multiply insn. Value is 1 if so.
7918 ??? This function stinks because it generates a ton of wasted RTL
7919 ??? and as a result fragments GC memory to no end. There are other
7920 ??? places in the compiler which are invoked a lot and do the same
7921 ??? thing, generate wasted RTL just to see if something is possible. */
7924 product_cheap_p (a
, b
)
7931 /* If only one is constant, make it B. */
7932 if (GET_CODE (a
) == CONST_INT
)
7933 tmp
= a
, a
= b
, b
= tmp
;
7935 /* If first constant, both constant, so don't need multiply. */
7936 if (GET_CODE (a
) == CONST_INT
)
7939 /* If second not constant, neither is constant, so would need multiply. */
7940 if (GET_CODE (b
) != CONST_INT
)
7943 /* One operand is constant, so might not need multiply insn. Generate the
7944 code for the multiply and see if a call or multiply, or long sequence
7945 of insns is generated. */
7948 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 1);
7956 while (tmp
!= NULL_RTX
)
7958 rtx next
= NEXT_INSN (tmp
);
7961 || GET_CODE (tmp
) != INSN
7962 || (GET_CODE (PATTERN (tmp
)) == SET
7963 && GET_CODE (SET_SRC (PATTERN (tmp
))) == MULT
)
7964 || (GET_CODE (PATTERN (tmp
)) == PARALLEL
7965 && GET_CODE (XVECEXP (PATTERN (tmp
), 0, 0)) == SET
7966 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp
), 0, 0))) == MULT
))
7975 else if (GET_CODE (tmp
) == SET
7976 && GET_CODE (SET_SRC (tmp
)) == MULT
)
7978 else if (GET_CODE (tmp
) == PARALLEL
7979 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
7980 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
7986 /* Check to see if loop can be terminated by a "decrement and branch until
7987 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7988 Also try reversing an increment loop to a decrement loop
7989 to see if the optimization can be performed.
7990 Value is nonzero if optimization was performed. */
7992 /* This is useful even if the architecture doesn't have such an insn,
7993 because it might change a loops which increments from 0 to n to a loop
7994 which decrements from n to 0. A loop that decrements to zero is usually
7995 faster than one that increments from zero. */
7997 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7998 such as approx_final_value, biv_total_increment, loop_iterations, and
7999 final_[bg]iv_value. */
8002 check_dbra_loop (loop
, insn_count
)
8006 struct loop_info
*loop_info
= LOOP_INFO (loop
);
8007 struct loop_regs
*regs
= LOOP_REGS (loop
);
8008 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8009 struct iv_class
*bl
;
8016 rtx before_comparison
;
8020 int compare_and_branch
;
8021 rtx loop_start
= loop
->start
;
8022 rtx loop_end
= loop
->end
;
8024 /* If last insn is a conditional branch, and the insn before tests a
8025 register value, try to optimize it. Otherwise, we can't do anything. */
8027 jump
= PREV_INSN (loop_end
);
8028 comparison
= get_condition_for_loop (loop
, jump
);
8029 if (comparison
== 0)
8031 if (!onlyjump_p (jump
))
8034 /* Try to compute whether the compare/branch at the loop end is one or
8035 two instructions. */
8036 get_condition (jump
, &first_compare
);
8037 if (first_compare
== jump
)
8038 compare_and_branch
= 1;
8039 else if (first_compare
== prev_nonnote_insn (jump
))
8040 compare_and_branch
= 2;
8045 /* If more than one condition is present to control the loop, then
8046 do not proceed, as this function does not know how to rewrite
8047 loop tests with more than one condition.
8049 Look backwards from the first insn in the last comparison
8050 sequence and see if we've got another comparison sequence. */
8053 if ((jump1
= prev_nonnote_insn (first_compare
)) != loop
->cont
)
8054 if (GET_CODE (jump1
) == JUMP_INSN
)
8058 /* Check all of the bivs to see if the compare uses one of them.
8059 Skip biv's set more than once because we can't guarantee that
8060 it will be zero on the last iteration. Also skip if the biv is
8061 used between its update and the test insn. */
8063 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
8065 if (bl
->biv_count
== 1
8066 && ! bl
->biv
->maybe_multiple
8067 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
8068 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
8076 /* Look for the case where the basic induction variable is always
8077 nonnegative, and equals zero on the last iteration.
8078 In this case, add a reg_note REG_NONNEG, which allows the
8079 m68k DBRA instruction to be used. */
8081 if (((GET_CODE (comparison
) == GT
8082 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
8083 && INTVAL (XEXP (comparison
, 1)) == -1)
8084 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
8085 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
8086 && INTVAL (bl
->biv
->add_val
) < 0)
8088 /* Initial value must be greater than 0,
8089 init_val % -dec_value == 0 to ensure that it equals zero on
8090 the last iteration */
8092 if (GET_CODE (bl
->initial_value
) == CONST_INT
8093 && INTVAL (bl
->initial_value
) > 0
8094 && (INTVAL (bl
->initial_value
)
8095 % (-INTVAL (bl
->biv
->add_val
))) == 0)
8097 /* register always nonnegative, add REG_NOTE to branch */
8098 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8100 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8107 /* If the decrement is 1 and the value was tested as >= 0 before
8108 the loop, then we can safely optimize. */
8109 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
8111 if (GET_CODE (p
) == CODE_LABEL
)
8113 if (GET_CODE (p
) != JUMP_INSN
)
8116 before_comparison
= get_condition_for_loop (loop
, p
);
8117 if (before_comparison
8118 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
8119 && GET_CODE (before_comparison
) == LT
8120 && XEXP (before_comparison
, 1) == const0_rtx
8121 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
8122 && INTVAL (bl
->biv
->add_val
) == -1)
8124 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8126 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8134 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
8135 && INTVAL (bl
->biv
->add_val
) > 0)
8137 /* Try to change inc to dec, so can apply above optimization. */
8139 all registers modified are induction variables or invariant,
8140 all memory references have non-overlapping addresses
8141 (obviously true if only one write)
8142 allow 2 insns for the compare/jump at the end of the loop. */
8143 /* Also, we must avoid any instructions which use both the reversed
8144 biv and another biv. Such instructions will fail if the loop is
8145 reversed. We meet this condition by requiring that either
8146 no_use_except_counting is true, or else that there is only
8148 int num_nonfixed_reads
= 0;
8149 /* 1 if the iteration var is used only to count iterations. */
8150 int no_use_except_counting
= 0;
8151 /* 1 if the loop has no memory store, or it has a single memory store
8152 which is reversible. */
8153 int reversible_mem_store
= 1;
8155 if (bl
->giv_count
== 0
8156 && !loop
->exit_count
8157 && !loop_info
->has_multiple_exit_targets
)
8159 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
8160 struct iv_class
*blt
;
8162 /* If there are no givs for this biv, and the only exit is the
8163 fall through at the end of the loop, then
8164 see if perhaps there are no uses except to count. */
8165 no_use_except_counting
= 1;
8166 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8169 rtx set
= single_set (p
);
8171 if (set
&& GET_CODE (SET_DEST (set
)) == REG
8172 && REGNO (SET_DEST (set
)) == bl
->regno
)
8173 /* An insn that sets the biv is okay. */
8175 else if ((p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
8176 || p
== prev_nonnote_insn (loop_end
))
8177 && reg_mentioned_p (bivreg
, PATTERN (p
)))
8179 /* If either of these insns uses the biv and sets a pseudo
8180 that has more than one usage, then the biv has uses
8181 other than counting since it's used to derive a value
8182 that is used more than one time. */
8183 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
8185 if (regs
->multiple_uses
)
8187 no_use_except_counting
= 0;
8191 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
8193 no_use_except_counting
= 0;
8198 /* A biv has uses besides counting if it is used to set
8200 for (blt
= ivs
->list
; blt
; blt
= blt
->next
)
8202 && reg_mentioned_p (bivreg
, SET_SRC (blt
->init_set
)))
8204 no_use_except_counting
= 0;
8209 if (no_use_except_counting
)
8210 /* No need to worry about MEMs. */
8212 else if (loop_info
->num_mem_sets
<= 1)
8214 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8216 num_nonfixed_reads
+= count_nonfixed_reads (loop
, PATTERN (p
));
8218 /* If the loop has a single store, and the destination address is
8219 invariant, then we can't reverse the loop, because this address
8220 might then have the wrong value at loop exit.
8221 This would work if the source was invariant also, however, in that
8222 case, the insn should have been moved out of the loop. */
8224 if (loop_info
->num_mem_sets
== 1)
8226 struct induction
*v
;
8228 /* If we could prove that each of the memory locations
8229 written to was different, then we could reverse the
8230 store -- but we don't presently have any way of
8232 reversible_mem_store
= 0;
8234 /* If the store depends on a register that is set after the
8235 store, it depends on the initial value, and is thus not
8237 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
8239 if (v
->giv_type
== DEST_REG
8240 && reg_mentioned_p (v
->dest_reg
,
8241 PATTERN (loop_info
->first_loop_store_insn
))
8242 && loop_insn_first_p (loop_info
->first_loop_store_insn
,
8244 reversible_mem_store
= 0;
8251 /* This code only acts for innermost loops. Also it simplifies
8252 the memory address check by only reversing loops with
8253 zero or one memory access.
8254 Two memory accesses could involve parts of the same array,
8255 and that can't be reversed.
8256 If the biv is used only for counting, than we don't need to worry
8257 about all these things. */
8259 if ((num_nonfixed_reads
<= 1
8260 && ! loop_info
->has_nonconst_call
8261 && ! loop_info
->has_prefetch
8262 && ! loop_info
->has_volatile
8263 && reversible_mem_store
8264 && (bl
->giv_count
+ bl
->biv_count
+ loop_info
->num_mem_sets
8265 + num_unmoved_movables (loop
) + compare_and_branch
== insn_count
)
8266 && (bl
== ivs
->list
&& bl
->next
== 0))
8267 || (no_use_except_counting
&& ! loop_info
->has_prefetch
))
8271 /* Loop can be reversed. */
8272 if (loop_dump_stream
)
8273 fprintf (loop_dump_stream
, "Can reverse loop\n");
8275 /* Now check other conditions:
8277 The increment must be a constant, as must the initial value,
8278 and the comparison code must be LT.
8280 This test can probably be improved since +/- 1 in the constant
8281 can be obtained by changing LT to LE and vice versa; this is
8285 /* for constants, LE gets turned into LT */
8286 && (GET_CODE (comparison
) == LT
8287 || (GET_CODE (comparison
) == LE
8288 && no_use_except_counting
)))
8290 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
8291 rtx initial_value
, comparison_value
;
8293 enum rtx_code cmp_code
;
8294 int comparison_const_width
;
8295 unsigned HOST_WIDE_INT comparison_sign_mask
;
8297 add_val
= INTVAL (bl
->biv
->add_val
);
8298 comparison_value
= XEXP (comparison
, 1);
8299 if (GET_MODE (comparison_value
) == VOIDmode
)
8300 comparison_const_width
8301 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
8303 comparison_const_width
8304 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
8305 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
8306 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
8307 comparison_sign_mask
8308 = (unsigned HOST_WIDE_INT
) 1 << (comparison_const_width
- 1);
8310 /* If the comparison value is not a loop invariant, then we
8311 can not reverse this loop.
8313 ??? If the insns which initialize the comparison value as
8314 a whole compute an invariant result, then we could move
8315 them out of the loop and proceed with loop reversal. */
8316 if (! loop_invariant_p (loop
, comparison_value
))
8319 if (GET_CODE (comparison_value
) == CONST_INT
)
8320 comparison_val
= INTVAL (comparison_value
);
8321 initial_value
= bl
->initial_value
;
8323 /* Normalize the initial value if it is an integer and
8324 has no other use except as a counter. This will allow
8325 a few more loops to be reversed. */
8326 if (no_use_except_counting
8327 && GET_CODE (comparison_value
) == CONST_INT
8328 && GET_CODE (initial_value
) == CONST_INT
)
8330 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
8331 /* The code below requires comparison_val to be a multiple
8332 of add_val in order to do the loop reversal, so
8333 round up comparison_val to a multiple of add_val.
8334 Since comparison_value is constant, we know that the
8335 current comparison code is LT. */
8336 comparison_val
= comparison_val
+ add_val
- 1;
8338 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
8339 /* We postpone overflow checks for COMPARISON_VAL here;
8340 even if there is an overflow, we might still be able to
8341 reverse the loop, if converting the loop exit test to
8343 initial_value
= const0_rtx
;
8346 /* First check if we can do a vanilla loop reversal. */
8347 if (initial_value
== const0_rtx
8348 /* If we have a decrement_and_branch_on_count,
8349 prefer the NE test, since this will allow that
8350 instruction to be generated. Note that we must
8351 use a vanilla loop reversal if the biv is used to
8352 calculate a giv or has a non-counting use. */
8353 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8354 && defined (HAVE_decrement_and_branch_on_count)
8355 && (! (add_val
== 1 && loop
->vtop
8356 && (bl
->biv_count
== 0
8357 || no_use_except_counting
)))
8359 && GET_CODE (comparison_value
) == CONST_INT
8360 /* Now do postponed overflow checks on COMPARISON_VAL. */
8361 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
8362 & comparison_sign_mask
))
8364 /* Register will always be nonnegative, with value
8365 0 on last iteration */
8366 add_adjust
= add_val
;
8370 else if (add_val
== 1 && loop
->vtop
8371 && (bl
->biv_count
== 0
8372 || no_use_except_counting
))
8380 if (GET_CODE (comparison
) == LE
)
8381 add_adjust
-= add_val
;
8383 /* If the initial value is not zero, or if the comparison
8384 value is not an exact multiple of the increment, then we
8385 can not reverse this loop. */
8386 if (initial_value
== const0_rtx
8387 && GET_CODE (comparison_value
) == CONST_INT
)
8389 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
8394 if (! no_use_except_counting
|| add_val
!= 1)
8398 final_value
= comparison_value
;
8400 /* Reset these in case we normalized the initial value
8401 and comparison value above. */
8402 if (GET_CODE (comparison_value
) == CONST_INT
8403 && GET_CODE (initial_value
) == CONST_INT
)
8405 comparison_value
= GEN_INT (comparison_val
);
8407 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
8409 bl
->initial_value
= initial_value
;
8411 /* Save some info needed to produce the new insns. */
8412 reg
= bl
->biv
->dest_reg
;
8413 jump_label
= condjump_label (PREV_INSN (loop_end
));
8414 new_add_val
= GEN_INT (-INTVAL (bl
->biv
->add_val
));
8416 /* Set start_value; if this is not a CONST_INT, we need
8418 Initialize biv to start_value before loop start.
8419 The old initializing insn will be deleted as a
8420 dead store by flow.c. */
8421 if (initial_value
== const0_rtx
8422 && GET_CODE (comparison_value
) == CONST_INT
)
8424 start_value
= GEN_INT (comparison_val
- add_adjust
);
8425 loop_insn_hoist (loop
, gen_move_insn (reg
, start_value
));
8427 else if (GET_CODE (initial_value
) == CONST_INT
)
8429 enum machine_mode mode
= GET_MODE (reg
);
8430 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
8431 rtx add_insn
= gen_add3_insn (reg
, comparison_value
, offset
);
8437 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
8438 loop_insn_hoist (loop
, add_insn
);
8439 if (GET_CODE (comparison
) == LE
)
8440 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
8443 else if (! add_adjust
)
8445 enum machine_mode mode
= GET_MODE (reg
);
8446 rtx sub_insn
= gen_sub3_insn (reg
, comparison_value
,
8452 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
8453 loop_insn_hoist (loop
, sub_insn
);
8456 /* We could handle the other cases too, but it'll be
8457 better to have a testcase first. */
8460 /* We may not have a single insn which can increment a reg, so
8461 create a sequence to hold all the insns from expand_inc. */
8463 expand_inc (reg
, new_add_val
);
8467 p
= loop_insn_emit_before (loop
, 0, bl
->biv
->insn
, tem
);
8468 delete_insn (bl
->biv
->insn
);
8470 /* Update biv info to reflect its new status. */
8472 bl
->initial_value
= start_value
;
8473 bl
->biv
->add_val
= new_add_val
;
8475 /* Update loop info. */
8476 loop_info
->initial_value
= reg
;
8477 loop_info
->initial_equiv_value
= reg
;
8478 loop_info
->final_value
= const0_rtx
;
8479 loop_info
->final_equiv_value
= const0_rtx
;
8480 loop_info
->comparison_value
= const0_rtx
;
8481 loop_info
->comparison_code
= cmp_code
;
8482 loop_info
->increment
= new_add_val
;
8484 /* Inc LABEL_NUSES so that delete_insn will
8485 not delete the label. */
8486 LABEL_NUSES (XEXP (jump_label
, 0))++;
8488 /* Emit an insn after the end of the loop to set the biv's
8489 proper exit value if it is used anywhere outside the loop. */
8490 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
8492 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
8493 loop_insn_sink (loop
, gen_load_of_final_value (reg
, final_value
));
8495 /* Delete compare/branch at end of loop. */
8496 delete_related_insns (PREV_INSN (loop_end
));
8497 if (compare_and_branch
== 2)
8498 delete_related_insns (first_compare
);
8500 /* Add new compare/branch insn at end of loop. */
8502 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
8504 XEXP (jump_label
, 0));
8507 emit_jump_insn_before (tem
, loop_end
);
8509 for (tem
= PREV_INSN (loop_end
);
8510 tem
&& GET_CODE (tem
) != JUMP_INSN
;
8511 tem
= PREV_INSN (tem
))
8515 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
8521 /* Increment of LABEL_NUSES done above. */
8522 /* Register is now always nonnegative,
8523 so add REG_NONNEG note to the branch. */
8524 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, reg
,
8530 /* No insn may reference both the reversed and another biv or it
8531 will fail (see comment near the top of the loop reversal
8533 Earlier on, we have verified that the biv has no use except
8534 counting, or it is the only biv in this function.
8535 However, the code that computes no_use_except_counting does
8536 not verify reg notes. It's possible to have an insn that
8537 references another biv, and has a REG_EQUAL note with an
8538 expression based on the reversed biv. To avoid this case,
8539 remove all REG_EQUAL notes based on the reversed biv
8541 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8545 rtx set
= single_set (p
);
8546 /* If this is a set of a GIV based on the reversed biv, any
8547 REG_EQUAL notes should still be correct. */
8549 || GET_CODE (SET_DEST (set
)) != REG
8550 || (size_t) REGNO (SET_DEST (set
)) >= ivs
->n_regs
8551 || REG_IV_TYPE (ivs
, REGNO (SET_DEST (set
))) != GENERAL_INDUCT
8552 || REG_IV_INFO (ivs
, REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
8553 for (pnote
= ®_NOTES (p
); *pnote
;)
8555 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
8556 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
8558 *pnote
= XEXP (*pnote
, 1);
8560 pnote
= &XEXP (*pnote
, 1);
8564 /* Mark that this biv has been reversed. Each giv which depends
8565 on this biv, and which is also live past the end of the loop
8566 will have to be fixed up. */
8570 if (loop_dump_stream
)
8572 fprintf (loop_dump_stream
, "Reversed loop");
8574 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
8576 fprintf (loop_dump_stream
, "\n");
8587 /* Verify whether the biv BL appears to be eliminable,
8588 based on the insns in the loop that refer to it.
8590 If ELIMINATE_P is nonzero, actually do the elimination.
8592 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8593 determine whether invariant insns should be placed inside or at the
8594 start of the loop. */
8597 maybe_eliminate_biv (loop
, bl
, eliminate_p
, threshold
, insn_count
)
8598 const struct loop
*loop
;
8599 struct iv_class
*bl
;
8601 int threshold
, insn_count
;
8603 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8604 rtx reg
= bl
->biv
->dest_reg
;
8607 /* Scan all insns in the loop, stopping if we find one that uses the
8608 biv in a way that we cannot eliminate. */
8610 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
8612 enum rtx_code code
= GET_CODE (p
);
8613 basic_block where_bb
= 0;
8614 rtx where_insn
= threshold
>= insn_count
? 0 : p
;
8617 /* If this is a libcall that sets a giv, skip ahead to its end. */
8618 if (GET_RTX_CLASS (code
) == 'i')
8620 note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
8624 rtx last
= XEXP (note
, 0);
8625 rtx set
= single_set (last
);
8627 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
8629 unsigned int regno
= REGNO (SET_DEST (set
));
8631 if (regno
< ivs
->n_regs
8632 && REG_IV_TYPE (ivs
, regno
) == GENERAL_INDUCT
8633 && REG_IV_INFO (ivs
, regno
)->src_reg
== bl
->biv
->src_reg
)
8639 /* Closely examine the insn if the biv is mentioned. */
8640 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
8641 && reg_mentioned_p (reg
, PATTERN (p
))
8642 && ! maybe_eliminate_biv_1 (loop
, PATTERN (p
), p
, bl
,
8643 eliminate_p
, where_bb
, where_insn
))
8645 if (loop_dump_stream
)
8646 fprintf (loop_dump_stream
,
8647 "Cannot eliminate biv %d: biv used in insn %d.\n",
8648 bl
->regno
, INSN_UID (p
));
8652 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
8654 && (note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)) != NULL_RTX
8655 && reg_mentioned_p (reg
, XEXP (note
, 0)))
8656 remove_note (p
, note
);
8661 if (loop_dump_stream
)
8662 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
8663 bl
->regno
, eliminate_p
? "was" : "can be");
8670 /* INSN and REFERENCE are instructions in the same insn chain.
8671 Return nonzero if INSN is first. */
8674 loop_insn_first_p (insn
, reference
)
8675 rtx insn
, reference
;
8679 for (p
= insn
, q
= reference
;;)
8681 /* Start with test for not first so that INSN == REFERENCE yields not
8683 if (q
== insn
|| ! p
)
8685 if (p
== reference
|| ! q
)
8688 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8689 previous insn, hence the <= comparison below does not work if
8691 if (INSN_UID (p
) < max_uid_for_loop
8692 && INSN_UID (q
) < max_uid_for_loop
8693 && GET_CODE (p
) != NOTE
)
8694 return INSN_LUID (p
) <= INSN_LUID (q
);
8696 if (INSN_UID (p
) >= max_uid_for_loop
8697 || GET_CODE (p
) == NOTE
)
8699 if (INSN_UID (q
) >= max_uid_for_loop
)
8704 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8705 the offset that we have to take into account due to auto-increment /
8706 div derivation is zero. */
8708 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
8709 struct induction
*biv
, *giv
;
8712 /* If the giv V had the auto-inc address optimization applied
8713 to it, and INSN occurs between the giv insn and the biv
8714 insn, then we'd have to adjust the value used here.
8715 This is rare, so we don't bother to make this possible. */
8716 if (giv
->auto_inc_opt
8717 && ((loop_insn_first_p (giv
->insn
, insn
)
8718 && loop_insn_first_p (insn
, biv
->insn
))
8719 || (loop_insn_first_p (biv
->insn
, insn
)
8720 && loop_insn_first_p (insn
, giv
->insn
))))
8726 /* If BL appears in X (part of the pattern of INSN), see if we can
8727 eliminate its use. If so, return 1. If not, return 0.
8729 If BIV does not appear in X, return 1.
8731 If ELIMINATE_P is nonzero, actually do the elimination.
8732 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8733 Depending on how many items have been moved out of the loop, it
8734 will either be before INSN (when WHERE_INSN is nonzero) or at the
8735 start of the loop (when WHERE_INSN is zero). */
8738 maybe_eliminate_biv_1 (loop
, x
, insn
, bl
, eliminate_p
, where_bb
, where_insn
)
8739 const struct loop
*loop
;
8741 struct iv_class
*bl
;
8743 basic_block where_bb
;
8746 enum rtx_code code
= GET_CODE (x
);
8747 rtx reg
= bl
->biv
->dest_reg
;
8748 enum machine_mode mode
= GET_MODE (reg
);
8749 struct induction
*v
;
8761 /* If we haven't already been able to do something with this BIV,
8762 we can't eliminate it. */
8768 /* If this sets the BIV, it is not a problem. */
8769 if (SET_DEST (x
) == reg
)
8772 /* If this is an insn that defines a giv, it is also ok because
8773 it will go away when the giv is reduced. */
8774 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8775 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
8779 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
8781 /* Can replace with any giv that was reduced and
8782 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8783 Require a constant for MULT_VAL, so we know it's nonzero.
8784 ??? We disable this optimization to avoid potential
8787 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8788 if (GET_CODE (v
->mult_val
) == CONST_INT
&& v
->mult_val
!= const0_rtx
8789 && v
->add_val
== const0_rtx
8790 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8794 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8800 /* If the giv has the opposite direction of change,
8801 then reverse the comparison. */
8802 if (INTVAL (v
->mult_val
) < 0)
8803 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
8804 const0_rtx
, v
->new_reg
);
8808 /* We can probably test that giv's reduced reg. */
8809 if (validate_change (insn
, &SET_SRC (x
), new, 0))
8813 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8814 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8815 Require a constant for MULT_VAL, so we know it's nonzero.
8816 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8817 overflow problem. */
8819 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8820 if (GET_CODE (v
->mult_val
) == CONST_INT
8821 && v
->mult_val
!= const0_rtx
8822 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8824 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8825 || GET_CODE (v
->add_val
) == LABEL_REF
8826 || GET_CODE (v
->add_val
) == CONST
8827 || (GET_CODE (v
->add_val
) == REG
8828 && REG_POINTER (v
->add_val
))))
8830 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8836 /* If the giv has the opposite direction of change,
8837 then reverse the comparison. */
8838 if (INTVAL (v
->mult_val
) < 0)
8839 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
8842 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
8843 copy_rtx (v
->add_val
));
8845 /* Replace biv with the giv's reduced register. */
8846 update_reg_last_use (v
->add_val
, insn
);
8847 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8850 /* Insn doesn't support that constant or invariant. Copy it
8851 into a register (it will be a loop invariant.) */
8852 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
8854 loop_insn_emit_before (loop
, 0, where_insn
,
8856 copy_rtx (v
->add_val
)));
8858 /* Substitute the new register for its invariant value in
8859 the compare expression. */
8860 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
8861 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8870 case GT
: case GE
: case GTU
: case GEU
:
8871 case LT
: case LE
: case LTU
: case LEU
:
8872 /* See if either argument is the biv. */
8873 if (XEXP (x
, 0) == reg
)
8874 arg
= XEXP (x
, 1), arg_operand
= 1;
8875 else if (XEXP (x
, 1) == reg
)
8876 arg
= XEXP (x
, 0), arg_operand
= 0;
8880 if (CONSTANT_P (arg
))
8882 /* First try to replace with any giv that has constant positive
8883 mult_val and constant add_val. We might be able to support
8884 negative mult_val, but it seems complex to do it in general. */
8886 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8887 if (GET_CODE (v
->mult_val
) == CONST_INT
8888 && INTVAL (v
->mult_val
) > 0
8889 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8890 || GET_CODE (v
->add_val
) == LABEL_REF
8891 || GET_CODE (v
->add_val
) == CONST
8892 || (GET_CODE (v
->add_val
) == REG
8893 && REG_POINTER (v
->add_val
)))
8894 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8897 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8900 /* Don't eliminate if the linear combination that makes up
8901 the giv overflows when it is applied to ARG. */
8902 if (GET_CODE (arg
) == CONST_INT
)
8906 if (GET_CODE (v
->add_val
) == CONST_INT
)
8907 add_val
= v
->add_val
;
8909 add_val
= const0_rtx
;
8911 if (const_mult_add_overflow_p (arg
, v
->mult_val
,
8919 /* Replace biv with the giv's reduced reg. */
8920 validate_change (insn
, &XEXP (x
, 1 - arg_operand
), v
->new_reg
, 1);
8922 /* If all constants are actually constant integers and
8923 the derived constant can be directly placed in the COMPARE,
8925 if (GET_CODE (arg
) == CONST_INT
8926 && GET_CODE (v
->add_val
) == CONST_INT
)
8928 tem
= expand_mult_add (arg
, NULL_RTX
, v
->mult_val
,
8929 v
->add_val
, mode
, 1);
8933 /* Otherwise, load it into a register. */
8934 tem
= gen_reg_rtx (mode
);
8935 loop_iv_add_mult_emit_before (loop
, arg
,
8936 v
->mult_val
, v
->add_val
,
8937 tem
, where_bb
, where_insn
);
8940 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8942 if (apply_change_group ())
8946 /* Look for giv with positive constant mult_val and nonconst add_val.
8947 Insert insns to calculate new compare value.
8948 ??? Turn this off due to possible overflow. */
8950 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8951 if (GET_CODE (v
->mult_val
) == CONST_INT
8952 && INTVAL (v
->mult_val
) > 0
8953 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8959 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8965 tem
= gen_reg_rtx (mode
);
8967 /* Replace biv with giv's reduced register. */
8968 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8971 /* Compute value to compare against. */
8972 loop_iv_add_mult_emit_before (loop
, arg
,
8973 v
->mult_val
, v
->add_val
,
8974 tem
, where_bb
, where_insn
);
8975 /* Use it in this insn. */
8976 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8977 if (apply_change_group ())
8981 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
8983 if (loop_invariant_p (loop
, arg
) == 1)
8985 /* Look for giv with constant positive mult_val and nonconst
8986 add_val. Insert insns to compute new compare value.
8987 ??? Turn this off due to possible overflow. */
8989 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8990 if (GET_CODE (v
->mult_val
) == CONST_INT
&& INTVAL (v
->mult_val
) > 0
8991 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8997 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9003 tem
= gen_reg_rtx (mode
);
9005 /* Replace biv with giv's reduced register. */
9006 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
9009 /* Compute value to compare against. */
9010 loop_iv_add_mult_emit_before (loop
, arg
,
9011 v
->mult_val
, v
->add_val
,
9012 tem
, where_bb
, where_insn
);
9013 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
9014 if (apply_change_group ())
9019 /* This code has problems. Basically, you can't know when
9020 seeing if we will eliminate BL, whether a particular giv
9021 of ARG will be reduced. If it isn't going to be reduced,
9022 we can't eliminate BL. We can try forcing it to be reduced,
9023 but that can generate poor code.
9025 The problem is that the benefit of reducing TV, below should
9026 be increased if BL can actually be eliminated, but this means
9027 we might have to do a topological sort of the order in which
9028 we try to process biv. It doesn't seem worthwhile to do
9029 this sort of thing now. */
9032 /* Otherwise the reg compared with had better be a biv. */
9033 if (GET_CODE (arg
) != REG
9034 || REG_IV_TYPE (ivs
, REGNO (arg
)) != BASIC_INDUCT
)
9037 /* Look for a pair of givs, one for each biv,
9038 with identical coefficients. */
9039 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9041 struct induction
*tv
;
9043 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
9046 for (tv
= REG_IV_CLASS (ivs
, REGNO (arg
))->giv
; tv
;
9048 if (! tv
->ignore
&& ! tv
->maybe_dead
9049 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
9050 && rtx_equal_p (tv
->add_val
, v
->add_val
)
9051 && tv
->mode
== mode
)
9053 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9059 /* Replace biv with its giv's reduced reg. */
9060 XEXP (x
, 1 - arg_operand
) = v
->new_reg
;
9061 /* Replace other operand with the other giv's
9063 XEXP (x
, arg_operand
) = tv
->new_reg
;
9070 /* If we get here, the biv can't be eliminated. */
9074 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9075 biv is used in it, since it will be replaced. */
9076 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9077 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
9085 /* See if any subexpression fails elimination. */
9086 fmt
= GET_RTX_FORMAT (code
);
9087 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
9092 if (! maybe_eliminate_biv_1 (loop
, XEXP (x
, i
), insn
, bl
,
9093 eliminate_p
, where_bb
, where_insn
))
9098 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9099 if (! maybe_eliminate_biv_1 (loop
, XVECEXP (x
, i
, j
), insn
, bl
,
9100 eliminate_p
, where_bb
, where_insn
))
9109 /* Return nonzero if the last use of REG
9110 is in an insn following INSN in the same basic block. */
9113 last_use_this_basic_block (reg
, insn
)
9119 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
9122 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
9128 /* Called via `note_stores' to record the initial value of a biv. Here we
9129 just record the location of the set and process it later. */
9132 record_initial (dest
, set
, data
)
9135 void *data ATTRIBUTE_UNUSED
;
9137 struct loop_ivs
*ivs
= (struct loop_ivs
*) data
;
9138 struct iv_class
*bl
;
9140 if (GET_CODE (dest
) != REG
9141 || REGNO (dest
) >= ivs
->n_regs
9142 || REG_IV_TYPE (ivs
, REGNO (dest
)) != BASIC_INDUCT
)
9145 bl
= REG_IV_CLASS (ivs
, REGNO (dest
));
9147 /* If this is the first set found, record it. */
9148 if (bl
->init_insn
== 0)
9150 bl
->init_insn
= note_insn
;
9155 /* If any of the registers in X are "old" and currently have a last use earlier
9156 than INSN, update them to have a last use of INSN. Their actual last use
9157 will be the previous insn but it will not have a valid uid_luid so we can't
9158 use it. X must be a source expression only. */
9161 update_reg_last_use (x
, insn
)
9165 /* Check for the case where INSN does not have a valid luid. In this case,
9166 there is no need to modify the regno_last_uid, as this can only happen
9167 when code is inserted after the loop_end to set a pseudo's final value,
9168 and hence this insn will never be the last use of x.
9169 ???? This comment is not correct. See for example loop_givs_reduce.
9170 This may insert an insn before another new insn. */
9171 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
9172 && INSN_UID (insn
) < max_uid_for_loop
9173 && REGNO_LAST_LUID (REGNO (x
)) < INSN_LUID (insn
))
9175 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
9180 const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
9181 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
9184 update_reg_last_use (XEXP (x
, i
), insn
);
9185 else if (fmt
[i
] == 'E')
9186 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9187 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
9192 /* Given an insn INSN and condition COND, return the condition in a
9193 canonical form to simplify testing by callers. Specifically:
9195 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9196 (2) Both operands will be machine operands; (cc0) will have been replaced.
9197 (3) If an operand is a constant, it will be the second operand.
9198 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9199 for GE, GEU, and LEU.
9201 If the condition cannot be understood, or is an inequality floating-point
9202 comparison which needs to be reversed, 0 will be returned.
9204 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9206 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9207 insn used in locating the condition was found. If a replacement test
9208 of the condition is desired, it should be placed in front of that
9209 insn and we will be sure that the inputs are still valid.
9211 If WANT_REG is nonzero, we wish the condition to be relative to that
9212 register, if possible. Therefore, do not canonicalize the condition
9216 canonicalize_condition (insn
, cond
, reverse
, earliest
, want_reg
)
9228 int reverse_code
= 0;
9229 enum machine_mode mode
;
9231 code
= GET_CODE (cond
);
9232 mode
= GET_MODE (cond
);
9233 op0
= XEXP (cond
, 0);
9234 op1
= XEXP (cond
, 1);
9237 code
= reversed_comparison_code (cond
, insn
);
9238 if (code
== UNKNOWN
)
9244 /* If we are comparing a register with zero, see if the register is set
9245 in the previous insn to a COMPARE or a comparison operation. Perform
9246 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9249 while (GET_RTX_CLASS (code
) == '<'
9250 && op1
== CONST0_RTX (GET_MODE (op0
))
9253 /* Set nonzero when we find something of interest. */
9257 /* If comparison with cc0, import actual comparison from compare
9261 if ((prev
= prev_nonnote_insn (prev
)) == 0
9262 || GET_CODE (prev
) != INSN
9263 || (set
= single_set (prev
)) == 0
9264 || SET_DEST (set
) != cc0_rtx
)
9267 op0
= SET_SRC (set
);
9268 op1
= CONST0_RTX (GET_MODE (op0
));
9274 /* If this is a COMPARE, pick up the two things being compared. */
9275 if (GET_CODE (op0
) == COMPARE
)
9277 op1
= XEXP (op0
, 1);
9278 op0
= XEXP (op0
, 0);
9281 else if (GET_CODE (op0
) != REG
)
9284 /* Go back to the previous insn. Stop if it is not an INSN. We also
9285 stop if it isn't a single set or if it has a REG_INC note because
9286 we don't want to bother dealing with it. */
9288 if ((prev
= prev_nonnote_insn (prev
)) == 0
9289 || GET_CODE (prev
) != INSN
9290 || FIND_REG_INC_NOTE (prev
, NULL_RTX
))
9293 set
= set_of (op0
, prev
);
9296 && (GET_CODE (set
) != SET
9297 || !rtx_equal_p (SET_DEST (set
), op0
)))
9300 /* If this is setting OP0, get what it sets it to if it looks
9304 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
9305 #ifdef FLOAT_STORE_FLAG_VALUE
9306 REAL_VALUE_TYPE fsfv
;
9309 /* ??? We may not combine comparisons done in a CCmode with
9310 comparisons not done in a CCmode. This is to aid targets
9311 like Alpha that have an IEEE compliant EQ instruction, and
9312 a non-IEEE compliant BEQ instruction. The use of CCmode is
9313 actually artificial, simply to prevent the combination, but
9314 should not affect other platforms.
9316 However, we must allow VOIDmode comparisons to match either
9317 CCmode or non-CCmode comparison, because some ports have
9318 modeless comparisons inside branch patterns.
9320 ??? This mode check should perhaps look more like the mode check
9321 in simplify_comparison in combine. */
9323 if ((GET_CODE (SET_SRC (set
)) == COMPARE
9326 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9327 && (GET_MODE_BITSIZE (inner_mode
)
9328 <= HOST_BITS_PER_WIDE_INT
)
9329 && (STORE_FLAG_VALUE
9330 & ((HOST_WIDE_INT
) 1
9331 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9332 #ifdef FLOAT_STORE_FLAG_VALUE
9334 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9335 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9336 REAL_VALUE_NEGATIVE (fsfv
)))
9339 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
9340 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9341 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9342 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9344 else if (((code
== EQ
9346 && (GET_MODE_BITSIZE (inner_mode
)
9347 <= HOST_BITS_PER_WIDE_INT
)
9348 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9349 && (STORE_FLAG_VALUE
9350 & ((HOST_WIDE_INT
) 1
9351 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9352 #ifdef FLOAT_STORE_FLAG_VALUE
9354 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9355 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9356 REAL_VALUE_NEGATIVE (fsfv
)))
9359 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
9360 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9361 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9362 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9372 else if (reg_set_p (op0
, prev
))
9373 /* If this sets OP0, but not directly, we have to give up. */
9378 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
9379 code
= GET_CODE (x
);
9382 code
= reversed_comparison_code (x
, prev
);
9383 if (code
== UNKNOWN
)
9388 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
9394 /* If constant is first, put it last. */
9395 if (CONSTANT_P (op0
))
9396 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
9398 /* If OP0 is the result of a comparison, we weren't able to find what
9399 was really being compared, so fail. */
9400 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
9403 /* Canonicalize any ordered comparison with integers involving equality
9404 if we can do computations in the relevant mode and we do not
9407 if (GET_CODE (op1
) == CONST_INT
9408 && GET_MODE (op0
) != VOIDmode
9409 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
9411 HOST_WIDE_INT const_val
= INTVAL (op1
);
9412 unsigned HOST_WIDE_INT uconst_val
= const_val
;
9413 unsigned HOST_WIDE_INT max_val
9414 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
9419 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
9420 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
9423 /* When cross-compiling, const_val might be sign-extended from
9424 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9426 if ((HOST_WIDE_INT
) (const_val
& max_val
)
9427 != (((HOST_WIDE_INT
) 1
9428 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
9429 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
9433 if (uconst_val
< max_val
)
9434 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
9438 if (uconst_val
!= 0)
9439 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
9448 /* Never return CC0; return zero instead. */
9453 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
9456 /* Given a jump insn JUMP, return the condition that will cause it to branch
9457 to its JUMP_LABEL. If the condition cannot be understood, or is an
9458 inequality floating-point comparison which needs to be reversed, 0 will
9461 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9462 insn used in locating the condition was found. If a replacement test
9463 of the condition is desired, it should be placed in front of that
9464 insn and we will be sure that the inputs are still valid. */
9467 get_condition (jump
, earliest
)
9475 /* If this is not a standard conditional jump, we can't parse it. */
9476 if (GET_CODE (jump
) != JUMP_INSN
9477 || ! any_condjump_p (jump
))
9479 set
= pc_set (jump
);
9481 cond
= XEXP (SET_SRC (set
), 0);
9483 /* If this branches to JUMP_LABEL when the condition is false, reverse
9486 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
9487 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
9489 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
);
9492 /* Similar to above routine, except that we also put an invariant last
9493 unless both operands are invariants. */
9496 get_condition_for_loop (loop
, x
)
9497 const struct loop
*loop
;
9500 rtx comparison
= get_condition (x
, (rtx
*) 0);
9503 || ! loop_invariant_p (loop
, XEXP (comparison
, 0))
9504 || loop_invariant_p (loop
, XEXP (comparison
, 1)))
9507 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
9508 XEXP (comparison
, 1), XEXP (comparison
, 0));
9511 /* Scan the function and determine whether it has indirect (computed) jumps.
9513 This is taken mostly from flow.c; similar code exists elsewhere
9514 in the compiler. It may be useful to put this into rtlanal.c. */
9516 indirect_jump_in_function_p (start
)
9521 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
9522 if (computed_jump_p (insn
))
9528 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9529 documentation for LOOP_MEMS for the definition of `appropriate'.
9530 This function is called from prescan_loop via for_each_rtx. */
9533 insert_loop_mem (mem
, data
)
9535 void *data ATTRIBUTE_UNUSED
;
9537 struct loop_info
*loop_info
= data
;
9544 switch (GET_CODE (m
))
9550 /* We're not interested in MEMs that are only clobbered. */
9554 /* We're not interested in the MEM associated with a
9555 CONST_DOUBLE, so there's no need to traverse into this. */
9559 /* We're not interested in any MEMs that only appear in notes. */
9563 /* This is not a MEM. */
9567 /* See if we've already seen this MEM. */
9568 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9569 if (rtx_equal_p (m
, loop_info
->mems
[i
].mem
))
9571 if (GET_MODE (m
) != GET_MODE (loop_info
->mems
[i
].mem
))
9572 /* The modes of the two memory accesses are different. If
9573 this happens, something tricky is going on, and we just
9574 don't optimize accesses to this MEM. */
9575 loop_info
->mems
[i
].optimize
= 0;
9580 /* Resize the array, if necessary. */
9581 if (loop_info
->mems_idx
== loop_info
->mems_allocated
)
9583 if (loop_info
->mems_allocated
!= 0)
9584 loop_info
->mems_allocated
*= 2;
9586 loop_info
->mems_allocated
= 32;
9588 loop_info
->mems
= (loop_mem_info
*)
9589 xrealloc (loop_info
->mems
,
9590 loop_info
->mems_allocated
* sizeof (loop_mem_info
));
9593 /* Actually insert the MEM. */
9594 loop_info
->mems
[loop_info
->mems_idx
].mem
= m
;
9595 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9596 because we can't put it in a register. We still store it in the
9597 table, though, so that if we see the same address later, but in a
9598 non-BLK mode, we'll not think we can optimize it at that point. */
9599 loop_info
->mems
[loop_info
->mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
9600 loop_info
->mems
[loop_info
->mems_idx
].reg
= NULL_RTX
;
9601 ++loop_info
->mems_idx
;
9607 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9609 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9610 register that is modified by an insn between FROM and TO. If the
9611 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9612 more, stop incrementing it, to avoid overflow.
9614 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9615 register I is used, if it is only used once. Otherwise, it is set
9616 to 0 (for no uses) or const0_rtx for more than one use. This
9617 parameter may be zero, in which case this processing is not done.
9619 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9620 optimize register I. */
9623 loop_regs_scan (loop
, extra_size
)
9624 const struct loop
*loop
;
9627 struct loop_regs
*regs
= LOOP_REGS (loop
);
9629 /* last_set[n] is nonzero iff reg n has been set in the current
9630 basic block. In that case, it is the insn that last set reg n. */
9635 old_nregs
= regs
->num
;
9636 regs
->num
= max_reg_num ();
9638 /* Grow the regs array if not allocated or too small. */
9639 if (regs
->num
>= regs
->size
)
9641 regs
->size
= regs
->num
+ extra_size
;
9643 regs
->array
= (struct loop_reg
*)
9644 xrealloc (regs
->array
, regs
->size
* sizeof (*regs
->array
));
9646 /* Zero the new elements. */
9647 memset (regs
->array
+ old_nregs
, 0,
9648 (regs
->size
- old_nregs
) * sizeof (*regs
->array
));
9651 /* Clear previously scanned fields but do not clear n_times_set. */
9652 for (i
= 0; i
< old_nregs
; i
++)
9654 regs
->array
[i
].set_in_loop
= 0;
9655 regs
->array
[i
].may_not_optimize
= 0;
9656 regs
->array
[i
].single_usage
= NULL_RTX
;
9659 last_set
= (rtx
*) xcalloc (regs
->num
, sizeof (rtx
));
9661 /* Scan the loop, recording register usage. */
9662 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9663 insn
= NEXT_INSN (insn
))
9667 /* Record registers that have exactly one use. */
9668 find_single_use_in_loop (regs
, insn
, PATTERN (insn
));
9670 /* Include uses in REG_EQUAL notes. */
9671 if (REG_NOTES (insn
))
9672 find_single_use_in_loop (regs
, insn
, REG_NOTES (insn
));
9674 if (GET_CODE (PATTERN (insn
)) == SET
9675 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
9676 count_one_set (regs
, insn
, PATTERN (insn
), last_set
);
9677 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
9680 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
9681 count_one_set (regs
, insn
, XVECEXP (PATTERN (insn
), 0, i
),
9686 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
9687 memset (last_set
, 0, regs
->num
* sizeof (rtx
));
9689 /* Invalidate all registers used for function argument passing.
9690 We check rtx_varies_p for the same reason as below, to allow
9691 optimizing PIC calculations. */
9692 if (GET_CODE (insn
) == CALL_INSN
)
9695 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
9697 link
= XEXP (link
, 1))
9701 if (GET_CODE (op
= XEXP (link
, 0)) == USE
9702 && GET_CODE (reg
= XEXP (op
, 0)) == REG
9703 && rtx_varies_p (reg
, 1))
9704 regs
->array
[REGNO (reg
)].may_not_optimize
= 1;
9709 /* Invalidate all hard registers clobbered by calls. With one exception:
9710 a call-clobbered PIC register is still function-invariant for our
9711 purposes, since we can hoist any PIC calculations out of the loop.
9712 Thus the call to rtx_varies_p. */
9713 if (LOOP_INFO (loop
)->has_call
)
9714 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
9715 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
)
9716 && rtx_varies_p (regno_reg_rtx
[i
], 1))
9718 regs
->array
[i
].may_not_optimize
= 1;
9719 regs
->array
[i
].set_in_loop
= 1;
9722 #ifdef AVOID_CCMODE_COPIES
9723 /* Don't try to move insns which set CC registers if we should not
9724 create CCmode register copies. */
9725 for (i
= regs
->num
- 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
9726 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
9727 regs
->array
[i
].may_not_optimize
= 1;
9730 /* Set regs->array[I].n_times_set for the new registers. */
9731 for (i
= old_nregs
; i
< regs
->num
; i
++)
9732 regs
->array
[i
].n_times_set
= regs
->array
[i
].set_in_loop
;
9737 /* Returns the number of real INSNs in the LOOP. */
9740 count_insns_in_loop (loop
)
9741 const struct loop
*loop
;
9746 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9747 insn
= NEXT_INSN (insn
))
9754 /* Move MEMs into registers for the duration of the loop. */
9758 const struct loop
*loop
;
9760 struct loop_info
*loop_info
= LOOP_INFO (loop
);
9761 struct loop_regs
*regs
= LOOP_REGS (loop
);
9762 int maybe_never
= 0;
9764 rtx p
, prev_ebb_head
;
9765 rtx label
= NULL_RTX
;
9767 /* Nonzero if the next instruction may never be executed. */
9768 int next_maybe_never
= 0;
9769 unsigned int last_max_reg
= max_reg_num ();
9771 if (loop_info
->mems_idx
== 0)
9774 /* We cannot use next_label here because it skips over normal insns. */
9775 end_label
= next_nonnote_insn (loop
->end
);
9776 if (end_label
&& GET_CODE (end_label
) != CODE_LABEL
)
9777 end_label
= NULL_RTX
;
9779 /* Check to see if it's possible that some instructions in the loop are
9780 never executed. Also check if there is a goto out of the loop other
9781 than right after the end of the loop. */
9782 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9784 p
= next_insn_in_loop (loop
, p
))
9786 if (GET_CODE (p
) == CODE_LABEL
)
9788 else if (GET_CODE (p
) == JUMP_INSN
9789 /* If we enter the loop in the middle, and scan
9790 around to the beginning, don't set maybe_never
9791 for that. This must be an unconditional jump,
9792 otherwise the code at the top of the loop might
9793 never be executed. Unconditional jumps are
9794 followed a by barrier then loop end. */
9795 && ! (GET_CODE (p
) == JUMP_INSN
9796 && JUMP_LABEL (p
) == loop
->top
9797 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
9798 && any_uncondjump_p (p
)))
9800 /* If this is a jump outside of the loop but not right
9801 after the end of the loop, we would have to emit new fixup
9802 sequences for each such label. */
9803 if (/* If we can't tell where control might go when this
9804 JUMP_INSN is executed, we must be conservative. */
9806 || (JUMP_LABEL (p
) != end_label
9807 && (INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
9808 || INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop
->start
)
9809 || INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop
->end
))))
9812 if (!any_condjump_p (p
))
9813 /* Something complicated. */
9816 /* If there are any more instructions in the loop, they
9817 might not be reached. */
9818 next_maybe_never
= 1;
9820 else if (next_maybe_never
)
9824 /* Find start of the extended basic block that enters the loop. */
9825 for (p
= loop
->start
;
9826 PREV_INSN (p
) && GET_CODE (p
) != CODE_LABEL
;
9833 /* Build table of mems that get set to constant values before the
9835 for (; p
!= loop
->start
; p
= NEXT_INSN (p
))
9836 cselib_process_insn (p
);
9838 /* Actually move the MEMs. */
9839 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9841 regset_head load_copies
;
9842 regset_head store_copies
;
9845 rtx mem
= loop_info
->mems
[i
].mem
;
9848 if (MEM_VOLATILE_P (mem
)
9849 || loop_invariant_p (loop
, XEXP (mem
, 0)) != 1)
9850 /* There's no telling whether or not MEM is modified. */
9851 loop_info
->mems
[i
].optimize
= 0;
9853 /* Go through the MEMs written to in the loop to see if this
9854 one is aliased by one of them. */
9855 mem_list_entry
= loop_info
->store_mems
;
9856 while (mem_list_entry
)
9858 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
9860 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
9863 /* MEM is indeed aliased by this store. */
9864 loop_info
->mems
[i
].optimize
= 0;
9867 mem_list_entry
= XEXP (mem_list_entry
, 1);
9870 if (flag_float_store
&& written
9871 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
9872 loop_info
->mems
[i
].optimize
= 0;
9874 /* If this MEM is written to, we must be sure that there
9875 are no reads from another MEM that aliases this one. */
9876 if (loop_info
->mems
[i
].optimize
&& written
)
9880 for (j
= 0; j
< loop_info
->mems_idx
; ++j
)
9884 else if (true_dependence (mem
,
9886 loop_info
->mems
[j
].mem
,
9889 /* It's not safe to hoist loop_info->mems[i] out of
9890 the loop because writes to it might not be
9891 seen by reads from loop_info->mems[j]. */
9892 loop_info
->mems
[i
].optimize
= 0;
9898 if (maybe_never
&& may_trap_p (mem
))
9899 /* We can't access the MEM outside the loop; it might
9900 cause a trap that wouldn't have happened otherwise. */
9901 loop_info
->mems
[i
].optimize
= 0;
9903 if (!loop_info
->mems
[i
].optimize
)
9904 /* We thought we were going to lift this MEM out of the
9905 loop, but later discovered that we could not. */
9908 INIT_REG_SET (&load_copies
);
9909 INIT_REG_SET (&store_copies
);
9911 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9912 order to keep scan_loop from moving stores to this MEM
9913 out of the loop just because this REG is neither a
9914 user-variable nor used in the loop test. */
9915 reg
= gen_reg_rtx (GET_MODE (mem
));
9916 REG_USERVAR_P (reg
) = 1;
9917 loop_info
->mems
[i
].reg
= reg
;
9919 /* Now, replace all references to the MEM with the
9920 corresponding pseudos. */
9922 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9924 p
= next_insn_in_loop (loop
, p
))
9930 set
= single_set (p
);
9932 /* See if this copies the mem into a register that isn't
9933 modified afterwards. We'll try to do copy propagation
9934 a little further on. */
9936 /* @@@ This test is _way_ too conservative. */
9938 && GET_CODE (SET_DEST (set
)) == REG
9939 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
9940 && REGNO (SET_DEST (set
)) < last_max_reg
9941 && regs
->array
[REGNO (SET_DEST (set
))].n_times_set
== 1
9942 && rtx_equal_p (SET_SRC (set
), mem
))
9943 SET_REGNO_REG_SET (&load_copies
, REGNO (SET_DEST (set
)));
9945 /* See if this copies the mem from a register that isn't
9946 modified afterwards. We'll try to remove the
9947 redundant copy later on by doing a little register
9948 renaming and copy propagation. This will help
9949 to untangle things for the BIV detection code. */
9952 && GET_CODE (SET_SRC (set
)) == REG
9953 && REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
9954 && REGNO (SET_SRC (set
)) < last_max_reg
9955 && regs
->array
[REGNO (SET_SRC (set
))].n_times_set
== 1
9956 && rtx_equal_p (SET_DEST (set
), mem
))
9957 SET_REGNO_REG_SET (&store_copies
, REGNO (SET_SRC (set
)));
9959 /* If this is a call which uses / clobbers this memory
9960 location, we must not change the interface here. */
9961 if (GET_CODE (p
) == CALL_INSN
9962 && reg_mentioned_p (loop_info
->mems
[i
].mem
,
9963 CALL_INSN_FUNCTION_USAGE (p
)))
9966 loop_info
->mems
[i
].optimize
= 0;
9970 /* Replace the memory reference with the shadow register. */
9971 replace_loop_mems (p
, loop_info
->mems
[i
].mem
,
9972 loop_info
->mems
[i
].reg
);
9975 if (GET_CODE (p
) == CODE_LABEL
9976 || GET_CODE (p
) == JUMP_INSN
)
9980 if (! loop_info
->mems
[i
].optimize
)
9981 ; /* We found we couldn't do the replacement, so do nothing. */
9982 else if (! apply_change_group ())
9983 /* We couldn't replace all occurrences of the MEM. */
9984 loop_info
->mems
[i
].optimize
= 0;
9987 /* Load the memory immediately before LOOP->START, which is
9988 the NOTE_LOOP_BEG. */
9989 cselib_val
*e
= cselib_lookup (mem
, VOIDmode
, 0);
9993 struct elt_loc_list
*const_equiv
= 0;
9997 struct elt_loc_list
*equiv
;
9998 struct elt_loc_list
*best_equiv
= 0;
9999 for (equiv
= e
->locs
; equiv
; equiv
= equiv
->next
)
10001 if (CONSTANT_P (equiv
->loc
))
10002 const_equiv
= equiv
;
10003 else if (GET_CODE (equiv
->loc
) == REG
10004 /* Extending hard register lifetimes causes crash
10005 on SRC targets. Doing so on non-SRC is
10006 probably also not good idea, since we most
10007 probably have pseudoregister equivalence as
10009 && REGNO (equiv
->loc
) >= FIRST_PSEUDO_REGISTER
)
10010 best_equiv
= equiv
;
10012 /* Use the constant equivalence if that is cheap enough. */
10014 best_equiv
= const_equiv
;
10015 else if (const_equiv
10016 && (rtx_cost (const_equiv
->loc
, SET
)
10017 <= rtx_cost (best_equiv
->loc
, SET
)))
10019 best_equiv
= const_equiv
;
10023 /* If best_equiv is nonzero, we know that MEM is set to a
10024 constant or register before the loop. We will use this
10025 knowledge to initialize the shadow register with that
10026 constant or reg rather than by loading from MEM. */
10028 best
= copy_rtx (best_equiv
->loc
);
10031 set
= gen_move_insn (reg
, best
);
10032 set
= loop_insn_hoist (loop
, set
);
10035 for (p
= prev_ebb_head
; p
!= loop
->start
; p
= NEXT_INSN (p
))
10036 if (REGNO_LAST_UID (REGNO (best
)) == INSN_UID (p
))
10038 REGNO_LAST_UID (REGNO (best
)) = INSN_UID (set
);
10044 set_unique_reg_note (set
, REG_EQUAL
, copy_rtx (const_equiv
->loc
));
10048 if (label
== NULL_RTX
)
10050 label
= gen_label_rtx ();
10051 emit_label_after (label
, loop
->end
);
10054 /* Store the memory immediately after END, which is
10055 the NOTE_LOOP_END. */
10056 set
= gen_move_insn (copy_rtx (mem
), reg
);
10057 loop_insn_emit_after (loop
, 0, label
, set
);
10060 if (loop_dump_stream
)
10062 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
10063 REGNO (reg
), (written
? "r/w" : "r/o"));
10064 print_rtl (loop_dump_stream
, mem
);
10065 fputc ('\n', loop_dump_stream
);
10068 /* Attempt a bit of copy propagation. This helps untangle the
10069 data flow, and enables {basic,general}_induction_var to find
10071 EXECUTE_IF_SET_IN_REG_SET
10072 (&load_copies
, FIRST_PSEUDO_REGISTER
, j
,
10074 try_copy_prop (loop
, reg
, j
);
10076 CLEAR_REG_SET (&load_copies
);
10078 EXECUTE_IF_SET_IN_REG_SET
10079 (&store_copies
, FIRST_PSEUDO_REGISTER
, j
,
10081 try_swap_copy_prop (loop
, reg
, j
);
10083 CLEAR_REG_SET (&store_copies
);
10087 if (label
!= NULL_RTX
&& end_label
!= NULL_RTX
)
10089 /* Now, we need to replace all references to the previous exit
10090 label with the new one. */
10095 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
10097 for_each_rtx (&p
, replace_label
, &rr
);
10099 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
10100 field. This is not handled by for_each_rtx because it doesn't
10101 handle unprinted ('0') fields. We need to update JUMP_LABEL
10102 because the immediately following unroll pass will use it.
10103 replace_label would not work anyways, because that only handles
10105 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
10106 JUMP_LABEL (p
) = label
;
10113 /* For communication between note_reg_stored and its caller. */
10114 struct note_reg_stored_arg
10120 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10121 is equal to ARG. */
10123 note_reg_stored (x
, setter
, arg
)
10124 rtx x
, setter ATTRIBUTE_UNUSED
;
10127 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*) arg
;
10132 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10133 There must be exactly one insn that sets this pseudo; it will be
10134 deleted if all replacements succeed and we can prove that the register
10135 is not used after the loop. */
10138 try_copy_prop (loop
, replacement
, regno
)
10139 const struct loop
*loop
;
10141 unsigned int regno
;
10143 /* This is the reg that we are copying from. */
10144 rtx reg_rtx
= regno_reg_rtx
[regno
];
10147 /* These help keep track of whether we replaced all uses of the reg. */
10148 int replaced_last
= 0;
10149 int store_is_first
= 0;
10151 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10153 insn
= next_insn_in_loop (loop
, insn
))
10157 /* Only substitute within one extended basic block from the initializing
10159 if (GET_CODE (insn
) == CODE_LABEL
&& init_insn
)
10162 if (! INSN_P (insn
))
10165 /* Is this the initializing insn? */
10166 set
= single_set (insn
);
10168 && GET_CODE (SET_DEST (set
)) == REG
10169 && REGNO (SET_DEST (set
)) == regno
)
10175 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
10176 store_is_first
= 1;
10179 /* Only substitute after seeing the initializing insn. */
10180 if (init_insn
&& insn
!= init_insn
)
10182 struct note_reg_stored_arg arg
;
10184 replace_loop_regs (insn
, reg_rtx
, replacement
);
10185 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
10188 /* Stop replacing when REPLACEMENT is modified. */
10189 arg
.reg
= replacement
;
10191 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
10194 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL
);
10196 /* It is possible that we've turned previously valid REG_EQUAL to
10197 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10198 REPLACEMENT is modified, we get different meaning. */
10199 if (note
&& reg_mentioned_p (replacement
, XEXP (note
, 0)))
10200 remove_note (insn
, note
);
10207 if (apply_change_group ())
10209 if (loop_dump_stream
)
10210 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
10211 if (store_is_first
&& replaced_last
)
10216 /* Assume we're just deleting INIT_INSN. */
10218 /* Look for REG_RETVAL note. If we're deleting the end of
10219 the libcall sequence, the whole sequence can go. */
10220 retval_note
= find_reg_note (init_insn
, REG_RETVAL
, NULL_RTX
);
10221 /* If we found a REG_RETVAL note, find the first instruction
10222 in the sequence. */
10224 first
= XEXP (retval_note
, 0);
10226 /* Delete the instructions. */
10227 loop_delete_insns (first
, init_insn
);
10229 if (loop_dump_stream
)
10230 fprintf (loop_dump_stream
, ".\n");
10234 /* Replace all the instructions from FIRST up to and including LAST
10235 with NOTE_INSN_DELETED notes. */
10238 loop_delete_insns (first
, last
)
10244 if (loop_dump_stream
)
10245 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
10247 delete_insn (first
);
10249 /* If this was the LAST instructions we're supposed to delete,
10254 first
= NEXT_INSN (first
);
10258 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10259 loop LOOP if the order of the sets of these registers can be
10260 swapped. There must be exactly one insn within the loop that sets
10261 this pseudo followed immediately by a move insn that sets
10262 REPLACEMENT with REGNO. */
10264 try_swap_copy_prop (loop
, replacement
, regno
)
10265 const struct loop
*loop
;
10267 unsigned int regno
;
10270 rtx set
= NULL_RTX
;
10271 unsigned int new_regno
;
10273 new_regno
= REGNO (replacement
);
10275 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10277 insn
= next_insn_in_loop (loop
, insn
))
10279 /* Search for the insn that copies REGNO to NEW_REGNO? */
10281 && (set
= single_set (insn
))
10282 && GET_CODE (SET_DEST (set
)) == REG
10283 && REGNO (SET_DEST (set
)) == new_regno
10284 && GET_CODE (SET_SRC (set
)) == REG
10285 && REGNO (SET_SRC (set
)) == regno
)
10289 if (insn
!= NULL_RTX
)
10294 /* Some DEF-USE info would come in handy here to make this
10295 function more general. For now, just check the previous insn
10296 which is the most likely candidate for setting REGNO. */
10298 prev_insn
= PREV_INSN (insn
);
10301 && (prev_set
= single_set (prev_insn
))
10302 && GET_CODE (SET_DEST (prev_set
)) == REG
10303 && REGNO (SET_DEST (prev_set
)) == regno
)
10306 (set (reg regno) (expr))
10307 (set (reg new_regno) (reg regno))
10309 so try converting this to:
10310 (set (reg new_regno) (expr))
10311 (set (reg regno) (reg new_regno))
10313 The former construct is often generated when a global
10314 variable used for an induction variable is shadowed by a
10315 register (NEW_REGNO). The latter construct improves the
10316 chances of GIV replacement and BIV elimination. */
10318 validate_change (prev_insn
, &SET_DEST (prev_set
),
10320 validate_change (insn
, &SET_DEST (set
),
10322 validate_change (insn
, &SET_SRC (set
),
10325 if (apply_change_group ())
10327 if (loop_dump_stream
)
10328 fprintf (loop_dump_stream
,
10329 " Swapped set of reg %d at %d with reg %d at %d.\n",
10330 regno
, INSN_UID (insn
),
10331 new_regno
, INSN_UID (prev_insn
));
10333 /* Update first use of REGNO. */
10334 if (REGNO_FIRST_UID (regno
) == INSN_UID (prev_insn
))
10335 REGNO_FIRST_UID (regno
) = INSN_UID (insn
);
10337 /* Now perform copy propagation to hopefully
10338 remove all uses of REGNO within the loop. */
10339 try_copy_prop (loop
, replacement
, regno
);
10345 /* Replace MEM with its associated pseudo register. This function is
10346 called from load_mems via for_each_rtx. DATA is actually a pointer
10347 to a structure describing the instruction currently being scanned
10348 and the MEM we are currently replacing. */
10351 replace_loop_mem (mem
, data
)
10355 loop_replace_args
*args
= (loop_replace_args
*) data
;
10361 switch (GET_CODE (m
))
10367 /* We're not interested in the MEM associated with a
10368 CONST_DOUBLE, so there's no need to traverse into one. */
10372 /* This is not a MEM. */
10376 if (!rtx_equal_p (args
->match
, m
))
10377 /* This is not the MEM we are currently replacing. */
10380 /* Actually replace the MEM. */
10381 validate_change (args
->insn
, mem
, args
->replacement
, 1);
10387 replace_loop_mems (insn
, mem
, reg
)
10392 loop_replace_args args
;
10396 args
.replacement
= reg
;
10398 for_each_rtx (&insn
, replace_loop_mem
, &args
);
10401 /* Replace one register with another. Called through for_each_rtx; PX points
10402 to the rtx being scanned. DATA is actually a pointer to
10403 a structure of arguments. */
10406 replace_loop_reg (px
, data
)
10411 loop_replace_args
*args
= (loop_replace_args
*) data
;
10416 if (x
== args
->match
)
10417 validate_change (args
->insn
, px
, args
->replacement
, 1);
10423 replace_loop_regs (insn
, reg
, replacement
)
10428 loop_replace_args args
;
10432 args
.replacement
= replacement
;
10434 for_each_rtx (&insn
, replace_loop_reg
, &args
);
10437 /* Replace occurrences of the old exit label for the loop with the new
10438 one. DATA is an rtx_pair containing the old and new labels,
10442 replace_label (x
, data
)
10447 rtx old_label
= ((rtx_pair
*) data
)->r1
;
10448 rtx new_label
= ((rtx_pair
*) data
)->r2
;
10453 if (GET_CODE (l
) != LABEL_REF
)
10456 if (XEXP (l
, 0) != old_label
)
10459 XEXP (l
, 0) = new_label
;
10460 ++LABEL_NUSES (new_label
);
10461 --LABEL_NUSES (old_label
);
10466 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10467 (ignored in the interim). */
10470 loop_insn_emit_after (loop
, where_bb
, where_insn
, pattern
)
10471 const struct loop
*loop ATTRIBUTE_UNUSED
;
10472 basic_block where_bb ATTRIBUTE_UNUSED
;
10476 return emit_insn_after (pattern
, where_insn
);
10480 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10481 in basic block WHERE_BB (ignored in the interim) within the loop
10482 otherwise hoist PATTERN into the loop pre-header. */
10485 loop_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10486 const struct loop
*loop
;
10487 basic_block where_bb ATTRIBUTE_UNUSED
;
10492 return loop_insn_hoist (loop
, pattern
);
10493 return emit_insn_before (pattern
, where_insn
);
10497 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10498 WHERE_BB (ignored in the interim) within the loop. */
10501 loop_call_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10502 const struct loop
*loop ATTRIBUTE_UNUSED
;
10503 basic_block where_bb ATTRIBUTE_UNUSED
;
10507 return emit_call_insn_before (pattern
, where_insn
);
10511 /* Hoist insn for PATTERN into the loop pre-header. */
10514 loop_insn_hoist (loop
, pattern
)
10515 const struct loop
*loop
;
10518 return loop_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10522 /* Hoist call insn for PATTERN into the loop pre-header. */
10525 loop_call_insn_hoist (loop
, pattern
)
10526 const struct loop
*loop
;
10529 return loop_call_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10533 /* Sink insn for PATTERN after the loop end. */
10536 loop_insn_sink (loop
, pattern
)
10537 const struct loop
*loop
;
10540 return loop_insn_emit_before (loop
, 0, loop
->sink
, pattern
);
10543 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10544 and constant. Emit sequence of intructions to load it into REG */
10546 gen_load_of_final_value (reg
, final_value
)
10547 rtx reg
, final_value
;
10551 final_value
= force_operand (final_value
, reg
);
10552 if (final_value
!= reg
)
10553 emit_move_insn (reg
, final_value
);
10554 seq
= get_insns ();
10559 /* If the loop has multiple exits, emit insn for PATTERN before the
10560 loop to ensure that it will always be executed no matter how the
10561 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10562 since this is slightly more efficient. */
10565 loop_insn_sink_or_swim (loop
, pattern
)
10566 const struct loop
*loop
;
10569 if (loop
->exit_count
)
10570 return loop_insn_hoist (loop
, pattern
);
10572 return loop_insn_sink (loop
, pattern
);
10576 loop_ivs_dump (loop
, file
, verbose
)
10577 const struct loop
*loop
;
10581 struct iv_class
*bl
;
10584 if (! loop
|| ! file
)
10587 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10590 fprintf (file
, "Loop %d: %d IV classes\n", loop
->num
, iv_num
);
10592 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10594 loop_iv_class_dump (bl
, file
, verbose
);
10595 fputc ('\n', file
);
10601 loop_iv_class_dump (bl
, file
, verbose
)
10602 const struct iv_class
*bl
;
10604 int verbose ATTRIBUTE_UNUSED
;
10606 struct induction
*v
;
10610 if (! bl
|| ! file
)
10613 fprintf (file
, "IV class for reg %d, benefit %d\n",
10614 bl
->regno
, bl
->total_benefit
);
10616 fprintf (file
, " Init insn %d", INSN_UID (bl
->init_insn
));
10617 if (bl
->initial_value
)
10619 fprintf (file
, ", init val: ");
10620 print_simple_rtl (file
, bl
->initial_value
);
10622 if (bl
->initial_test
)
10624 fprintf (file
, ", init test: ");
10625 print_simple_rtl (file
, bl
->initial_test
);
10627 fputc ('\n', file
);
10629 if (bl
->final_value
)
10631 fprintf (file
, " Final val: ");
10632 print_simple_rtl (file
, bl
->final_value
);
10633 fputc ('\n', file
);
10636 if ((incr
= biv_total_increment (bl
)))
10638 fprintf (file
, " Total increment: ");
10639 print_simple_rtl (file
, incr
);
10640 fputc ('\n', file
);
10643 /* List the increments. */
10644 for (i
= 0, v
= bl
->biv
; v
; v
= v
->next_iv
, i
++)
10646 fprintf (file
, " Inc%d: insn %d, incr: ", i
, INSN_UID (v
->insn
));
10647 print_simple_rtl (file
, v
->add_val
);
10648 fputc ('\n', file
);
10651 /* List the givs. */
10652 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
, i
++)
10654 fprintf (file
, " Giv%d: insn %d, benefit %d, ",
10655 i
, INSN_UID (v
->insn
), v
->benefit
);
10656 if (v
->giv_type
== DEST_ADDR
)
10657 print_simple_rtl (file
, v
->mem
);
10659 print_simple_rtl (file
, single_set (v
->insn
));
10660 fputc ('\n', file
);
10666 loop_biv_dump (v
, file
, verbose
)
10667 const struct induction
*v
;
10676 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10677 fprintf (file
, " const ");
10678 print_simple_rtl (file
, v
->add_val
);
10680 if (verbose
&& v
->final_value
)
10682 fputc ('\n', file
);
10683 fprintf (file
, " final ");
10684 print_simple_rtl (file
, v
->final_value
);
10687 fputc ('\n', file
);
10692 loop_giv_dump (v
, file
, verbose
)
10693 const struct induction
*v
;
10700 if (v
->giv_type
== DEST_REG
)
10701 fprintf (file
, "Giv %d: insn %d",
10702 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10704 fprintf (file
, "Dest address: insn %d",
10705 INSN_UID (v
->insn
));
10707 fprintf (file
, " src reg %d benefit %d",
10708 REGNO (v
->src_reg
), v
->benefit
);
10709 fprintf (file
, " lifetime %d",
10712 if (v
->replaceable
)
10713 fprintf (file
, " replaceable");
10715 if (v
->no_const_addval
)
10716 fprintf (file
, " ncav");
10718 if (v
->ext_dependent
)
10720 switch (GET_CODE (v
->ext_dependent
))
10723 fprintf (file
, " ext se");
10726 fprintf (file
, " ext ze");
10729 fprintf (file
, " ext tr");
10736 fputc ('\n', file
);
10737 fprintf (file
, " mult ");
10738 print_simple_rtl (file
, v
->mult_val
);
10740 fputc ('\n', file
);
10741 fprintf (file
, " add ");
10742 print_simple_rtl (file
, v
->add_val
);
10744 if (verbose
&& v
->final_value
)
10746 fputc ('\n', file
);
10747 fprintf (file
, " final ");
10748 print_simple_rtl (file
, v
->final_value
);
10751 fputc ('\n', file
);
10757 const struct loop
*loop
;
10759 loop_ivs_dump (loop
, stderr
, 1);
10764 debug_iv_class (bl
)
10765 const struct iv_class
*bl
;
10767 loop_iv_class_dump (bl
, stderr
, 1);
10773 const struct induction
*v
;
10775 loop_biv_dump (v
, stderr
, 1);
10781 const struct induction
*v
;
10783 loop_giv_dump (v
, stderr
, 1);
10787 #define LOOP_BLOCK_NUM_1(INSN) \
10788 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10790 /* The notes do not have an assigned block, so look at the next insn. */
10791 #define LOOP_BLOCK_NUM(INSN) \
10792 ((INSN) ? (GET_CODE (INSN) == NOTE \
10793 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10794 : LOOP_BLOCK_NUM_1 (INSN)) \
10797 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10800 loop_dump_aux (loop
, file
, verbose
)
10801 const struct loop
*loop
;
10803 int verbose ATTRIBUTE_UNUSED
;
10807 if (! loop
|| ! file
)
10810 /* Print diagnostics to compare our concept of a loop with
10811 what the loop notes say. */
10812 if (! PREV_INSN (loop
->first
->head
)
10813 || GET_CODE (PREV_INSN (loop
->first
->head
)) != NOTE
10814 || NOTE_LINE_NUMBER (PREV_INSN (loop
->first
->head
))
10815 != NOTE_INSN_LOOP_BEG
)
10816 fprintf (file
, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10817 INSN_UID (PREV_INSN (loop
->first
->head
)));
10818 if (! NEXT_INSN (loop
->last
->end
)
10819 || GET_CODE (NEXT_INSN (loop
->last
->end
)) != NOTE
10820 || NOTE_LINE_NUMBER (NEXT_INSN (loop
->last
->end
))
10821 != NOTE_INSN_LOOP_END
)
10822 fprintf (file
, ";; No NOTE_INSN_LOOP_END at %d\n",
10823 INSN_UID (NEXT_INSN (loop
->last
->end
)));
10828 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10829 LOOP_BLOCK_NUM (loop
->start
),
10830 LOOP_INSN_UID (loop
->start
),
10831 LOOP_BLOCK_NUM (loop
->cont
),
10832 LOOP_INSN_UID (loop
->cont
),
10833 LOOP_BLOCK_NUM (loop
->cont
),
10834 LOOP_INSN_UID (loop
->cont
),
10835 LOOP_BLOCK_NUM (loop
->vtop
),
10836 LOOP_INSN_UID (loop
->vtop
),
10837 LOOP_BLOCK_NUM (loop
->end
),
10838 LOOP_INSN_UID (loop
->end
));
10839 fprintf (file
, ";; top %d (%d), scan start %d (%d)\n",
10840 LOOP_BLOCK_NUM (loop
->top
),
10841 LOOP_INSN_UID (loop
->top
),
10842 LOOP_BLOCK_NUM (loop
->scan_start
),
10843 LOOP_INSN_UID (loop
->scan_start
));
10844 fprintf (file
, ";; exit_count %d", loop
->exit_count
);
10845 if (loop
->exit_count
)
10847 fputs (", labels:", file
);
10848 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
10850 fprintf (file
, " %d ",
10851 LOOP_INSN_UID (XEXP (label
, 0)));
10854 fputs ("\n", file
);
10856 /* This can happen when a marked loop appears as two nested loops,
10857 say from while (a || b) {}. The inner loop won't match
10858 the loop markers but the outer one will. */
10859 if (LOOP_BLOCK_NUM (loop
->cont
) != loop
->latch
->index
)
10860 fprintf (file
, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10864 /* Call this function from the debugger to dump LOOP. */
10868 const struct loop
*loop
;
10870 flow_loop_dump (loop
, stderr
, loop_dump_aux
, 1);
10873 /* Call this function from the debugger to dump LOOPS. */
10876 debug_loops (loops
)
10877 const struct loops
*loops
;
10879 flow_loops_dump (loops
, stderr
, loop_dump_aux
, 1);