PR target/83368
[official-gcc.git] / gcc / testsuite / gcc.dg / vmx / perm-be-order.c
blob604f63dc95f811a13cad9a5e987813549eedf388
1 /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */
3 #include "harness.h"
5 static void test()
7 /* Input vectors. */
8 vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
9 vector unsigned char vucb = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};
10 vector signed char vsca = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};
11 vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
12 vector unsigned short vusa = {0,1,2,3,4,5,6,7};
13 vector unsigned short vusb = {8,9,10,11,12,13,14,15};
14 vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
15 vector signed short vssb = {0,1,2,3,4,5,6,7};
16 vector unsigned int vuia = {0,1,2,3};
17 vector unsigned int vuib = {4,5,6,7};
18 vector signed int vsia = {-4,-3,-2,-1};
19 vector signed int vsib = {0,1,2,3};
20 vector float vfa = {-4.0,-3.0,-2.0,-1.0};
21 vector float vfb = {0.0,1.0,2.0,3.0};
23 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
24 vector unsigned char vucp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};
25 vector unsigned char vscp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23};
26 vector unsigned char vusp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};
27 vector unsigned char vssp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22};
28 vector unsigned char vuip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};
29 vector unsigned char vsip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};
30 vector unsigned char vfp = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20};
31 #else
32 vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
33 vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
34 vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};
35 vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};
36 vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
37 vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
38 vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
39 #endif
41 /* Result vectors. */
42 vector unsigned char vuc;
43 vector signed char vsc;
44 vector unsigned short vus;
45 vector signed short vss;
46 vector unsigned int vui;
47 vector signed int vsi;
48 vector float vf;
50 /* Expected result vectors. */
51 vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
52 vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};
53 vector unsigned short vusr = {0,15,1,14,2,13,3,12};
54 vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};
55 vector unsigned int vuir = {0,7,1,6};
56 vector signed int vsir = {-4,3,-3,2};
57 vector float vfr = {-4.0,3.0,-3.0,2.0};
59 vuc = vec_perm (vuca, vucb, vucp);
60 vsc = vec_perm (vsca, vscb, vscp);
61 vus = vec_perm (vusa, vusb, vusp);
62 vss = vec_perm (vssa, vssb, vssp);
63 vui = vec_perm (vuia, vuib, vuip);
64 vsi = vec_perm (vsia, vsib, vsip);
65 vf = vec_perm (vfa, vfb, vfp );
67 check (vec_all_eq (vuc, vucr), "vuc");
68 check (vec_all_eq (vsc, vscr), "vsc");
69 check (vec_all_eq (vus, vusr), "vus");
70 check (vec_all_eq (vss, vssr), "vss");
71 check (vec_all_eq (vui, vuir), "vui");
72 check (vec_all_eq (vsi, vsir), "vsi");
73 check (vec_all_eq (vf, vfr), "vf" );