c-family/
[official-gcc.git] / gcc / reorg.c
blobe07b8341ed4fbf7ffd91b030308831ac1d14035d
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
4 Free Software Foundation, Inc.
5 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
6 Hacked by Michael Tiemann (tiemann@cygnus.com).
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 3, or (at your option) any later
13 version.
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
24 /* Instruction reorganization pass.
26 This pass runs after register allocation and final jump
27 optimization. It should be the last pass to run before peephole.
28 It serves primarily to fill delay slots of insns, typically branch
29 and call insns. Other insns typically involve more complicated
30 interactions of data dependencies and resource constraints, and
31 are better handled by scheduling before register allocation (by the
32 function `schedule_insns').
34 The Branch Penalty is the number of extra cycles that are needed to
35 execute a branch insn. On an ideal machine, branches take a single
36 cycle, and the Branch Penalty is 0. Several RISC machines approach
37 branch delays differently:
39 The MIPS has a single branch delay slot. Most insns
40 (except other branches) can be used to fill this slot. When the
41 slot is filled, two insns execute in two cycles, reducing the
42 branch penalty to zero.
44 The SPARC always has a branch delay slot, but its effects can be
45 annulled when the branch is not taken. This means that failing to
46 find other sources of insns, we can hoist an insn from the branch
47 target that would only be safe to execute knowing that the branch
48 is taken.
50 The HP-PA always has a branch delay slot. For unconditional branches
51 its effects can be annulled when the branch is taken. The effects
52 of the delay slot in a conditional branch can be nullified for forward
53 taken branches, or for untaken backward branches. This means
54 we can hoist insns from the fall-through path for forward branches or
55 steal insns from the target of backward branches.
57 The TMS320C3x and C4x have three branch delay slots. When the three
58 slots are filled, the branch penalty is zero. Most insns can fill the
59 delay slots except jump insns.
61 Three techniques for filling delay slots have been implemented so far:
63 (1) `fill_simple_delay_slots' is the simplest, most efficient way
64 to fill delay slots. This pass first looks for insns which come
65 from before the branch and which are safe to execute after the
66 branch. Then it searches after the insn requiring delay slots or,
67 in the case of a branch, for insns that are after the point at
68 which the branch merges into the fallthrough code, if such a point
69 exists. When such insns are found, the branch penalty decreases
70 and no code expansion takes place.
72 (2) `fill_eager_delay_slots' is more complicated: it is used for
73 scheduling conditional jumps, or for scheduling jumps which cannot
74 be filled using (1). A machine need not have annulled jumps to use
75 this strategy, but it helps (by keeping more options open).
76 `fill_eager_delay_slots' tries to guess the direction the branch
77 will go; if it guesses right 100% of the time, it can reduce the
78 branch penalty as much as `fill_simple_delay_slots' does. If it
79 guesses wrong 100% of the time, it might as well schedule nops. When
80 `fill_eager_delay_slots' takes insns from the fall-through path of
81 the jump, usually there is no code expansion; when it takes insns
82 from the branch target, there is code expansion if it is not the
83 only way to reach that target.
85 (3) `relax_delay_slots' uses a set of rules to simplify code that
86 has been reorganized by (1) and (2). It finds cases where
87 conditional test can be eliminated, jumps can be threaded, extra
88 insns can be eliminated, etc. It is the job of (1) and (2) to do a
89 good job of scheduling locally; `relax_delay_slots' takes care of
90 making the various individual schedules work well together. It is
91 especially tuned to handle the control flow interactions of branch
92 insns. It does nothing for insns with delay slots that do not
93 branch.
95 On machines that use CC0, we are very conservative. We will not make
96 a copy of an insn involving CC0 since we want to maintain a 1-1
97 correspondence between the insn that sets and uses CC0. The insns are
98 allowed to be separated by placing an insn that sets CC0 (but not an insn
99 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
100 delay slot. In that case, we point each insn at the other with REG_CC_USER
101 and REG_CC_SETTER notes. Note that these restrictions affect very few
102 machines because most RISC machines with delay slots will not use CC0
103 (the RT is the only known exception at this point).
105 Not yet implemented:
107 The Acorn Risc Machine can conditionally execute most insns, so
108 it is profitable to move single insns into a position to execute
109 based on the condition code of the previous insn.
111 The HP-PA can conditionally nullify insns, providing a similar
112 effect to the ARM, differing mostly in which insn is "in charge". */
114 #include "config.h"
115 #include "system.h"
116 #include "coretypes.h"
117 #include "tm.h"
118 #include "diagnostic-core.h"
119 #include "rtl.h"
120 #include "tm_p.h"
121 #include "expr.h"
122 #include "function.h"
123 #include "insn-config.h"
124 #include "conditions.h"
125 #include "hard-reg-set.h"
126 #include "basic-block.h"
127 #include "regs.h"
128 #include "recog.h"
129 #include "flags.h"
130 #include "obstack.h"
131 #include "insn-attr.h"
132 #include "resource.h"
133 #include "except.h"
134 #include "params.h"
135 #include "target.h"
136 #include "tree-pass.h"
137 #include "emit-rtl.h"
139 #ifdef DELAY_SLOTS
141 #ifndef ANNUL_IFTRUE_SLOTS
142 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
143 #endif
144 #ifndef ANNUL_IFFALSE_SLOTS
145 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
146 #endif
148 /* Insns which have delay slots that have not yet been filled. */
150 static struct obstack unfilled_slots_obstack;
151 static rtx *unfilled_firstobj;
153 /* Define macros to refer to the first and last slot containing unfilled
154 insns. These are used because the list may move and its address
155 should be recomputed at each use. */
157 #define unfilled_slots_base \
158 ((rtx *) obstack_base (&unfilled_slots_obstack))
160 #define unfilled_slots_next \
161 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
163 /* Points to the label before the end of the function, or before a
164 return insn. */
165 static rtx function_return_label;
166 /* Likewise for a simple_return. */
167 static rtx function_simple_return_label;
169 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
170 not always monotonically increase. */
171 static int *uid_to_ruid;
173 /* Highest valid index in `uid_to_ruid'. */
174 static int max_uid;
176 static int stop_search_p (rtx, int);
177 static int resource_conflicts_p (struct resources *, struct resources *);
178 static int insn_references_resource_p (rtx, struct resources *, bool);
179 static int insn_sets_resource_p (rtx, struct resources *, bool);
180 static rtx find_end_label (rtx);
181 static rtx emit_delay_sequence (rtx, rtx, int);
182 static rtx add_to_delay_list (rtx, rtx);
183 static rtx delete_from_delay_slot (rtx);
184 static void delete_scheduled_jump (rtx);
185 static void note_delay_statistics (int, int);
186 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
187 static rtx optimize_skip (rtx);
188 #endif
189 static int get_jump_flags (rtx, rtx);
190 static int rare_destination (rtx);
191 static int mostly_true_jump (rtx, rtx);
192 static rtx get_branch_condition (rtx, rtx);
193 static int condition_dominates_p (rtx, rtx);
194 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
195 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
196 static int check_annul_list_true_false (int, rtx);
197 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
198 struct resources *,
199 struct resources *,
200 struct resources *,
201 int, int *, int *, rtx *);
202 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
203 struct resources *,
204 struct resources *,
205 struct resources *,
206 int, int *, int *);
207 static void try_merge_delay_insns (rtx, rtx);
208 static rtx redundant_insn (rtx, rtx, rtx);
209 static int own_thread_p (rtx, rtx, int);
210 static void update_block (rtx, rtx);
211 static int reorg_redirect_jump (rtx, rtx);
212 static void update_reg_dead_notes (rtx, rtx);
213 static void fix_reg_dead_note (rtx, rtx);
214 static void update_reg_unused_notes (rtx, rtx);
215 static void fill_simple_delay_slots (int);
216 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
217 int, int, int, int,
218 int *, rtx);
219 static void fill_eager_delay_slots (void);
220 static void relax_delay_slots (rtx);
221 static void make_return_insns (rtx);
223 /* A wrapper around next_active_insn which takes care to return ret_rtx
224 unchanged. */
226 static rtx
227 first_active_target_insn (rtx insn)
229 if (ANY_RETURN_P (insn))
230 return insn;
231 return next_active_insn (insn);
234 /* Return true iff INSN is a simplejump, or any kind of return insn. */
236 static bool
237 simplejump_or_return_p (rtx insn)
239 return (JUMP_P (insn)
240 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
243 /* Return TRUE if this insn should stop the search for insn to fill delay
244 slots. LABELS_P indicates that labels should terminate the search.
245 In all cases, jumps terminate the search. */
247 static int
248 stop_search_p (rtx insn, int labels_p)
250 if (insn == 0)
251 return 1;
253 /* If the insn can throw an exception that is caught within the function,
254 it may effectively perform a jump from the viewpoint of the function.
255 Therefore act like for a jump. */
256 if (can_throw_internal (insn))
257 return 1;
259 switch (GET_CODE (insn))
261 case NOTE:
262 case CALL_INSN:
263 return 0;
265 case CODE_LABEL:
266 return labels_p;
268 case JUMP_INSN:
269 case BARRIER:
270 return 1;
272 case INSN:
273 /* OK unless it contains a delay slot or is an `asm' insn of some type.
274 We don't know anything about these. */
275 return (GET_CODE (PATTERN (insn)) == SEQUENCE
276 || GET_CODE (PATTERN (insn)) == ASM_INPUT
277 || asm_noperands (PATTERN (insn)) >= 0);
279 default:
280 gcc_unreachable ();
284 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
285 resource set contains a volatile memory reference. Otherwise, return FALSE. */
287 static int
288 resource_conflicts_p (struct resources *res1, struct resources *res2)
290 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
291 || (res1->unch_memory && res2->unch_memory)
292 || res1->volatil || res2->volatil)
293 return 1;
295 #ifdef HARD_REG_SET
296 return (res1->regs & res2->regs) != HARD_CONST (0);
297 #else
299 int i;
301 for (i = 0; i < HARD_REG_SET_LONGS; i++)
302 if ((res1->regs[i] & res2->regs[i]) != 0)
303 return 1;
304 return 0;
306 #endif
309 /* Return TRUE if any resource marked in RES, a `struct resources', is
310 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
311 routine is using those resources.
313 We compute this by computing all the resources referenced by INSN and
314 seeing if this conflicts with RES. It might be faster to directly check
315 ourselves, and this is the way it used to work, but it means duplicating
316 a large block of complex code. */
318 static int
319 insn_references_resource_p (rtx insn, struct resources *res,
320 bool include_delayed_effects)
322 struct resources insn_res;
324 CLEAR_RESOURCE (&insn_res);
325 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
326 return resource_conflicts_p (&insn_res, res);
329 /* Return TRUE if INSN modifies resources that are marked in RES.
330 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
331 included. CC0 is only modified if it is explicitly set; see comments
332 in front of mark_set_resources for details. */
334 static int
335 insn_sets_resource_p (rtx insn, struct resources *res,
336 bool include_delayed_effects)
338 struct resources insn_sets;
340 CLEAR_RESOURCE (&insn_sets);
341 mark_set_resources (insn, &insn_sets, 0,
342 (include_delayed_effects
343 ? MARK_SRC_DEST_CALL
344 : MARK_SRC_DEST));
345 return resource_conflicts_p (&insn_sets, res);
348 /* Find a label at the end of the function or before a RETURN. If there
349 is none, try to make one. If that fails, returns 0.
351 The property of such a label is that it is placed just before the
352 epilogue or a bare RETURN insn, so that another bare RETURN can be
353 turned into a jump to the label unconditionally. In particular, the
354 label cannot be placed before a RETURN insn with a filled delay slot.
356 ??? There may be a problem with the current implementation. Suppose
357 we start with a bare RETURN insn and call find_end_label. It may set
358 function_return_label just before the RETURN. Suppose the machinery
359 is able to fill the delay slot of the RETURN insn afterwards. Then
360 function_return_label is no longer valid according to the property
361 described above and find_end_label will still return it unmodified.
362 Note that this is probably mitigated by the following observation:
363 once function_return_label is made, it is very likely the target of
364 a jump, so filling the delay slot of the RETURN will be much more
365 difficult.
366 KIND is either simple_return_rtx or ret_rtx, indicating which type of
367 return we're looking for. */
369 static rtx
370 find_end_label (rtx kind)
372 rtx insn;
373 rtx *plabel;
375 if (kind == ret_rtx)
376 plabel = &function_return_label;
377 else
379 gcc_assert (kind == simple_return_rtx);
380 plabel = &function_simple_return_label;
383 /* If we found one previously, return it. */
384 if (*plabel)
385 return *plabel;
387 /* Otherwise, see if there is a label at the end of the function. If there
388 is, it must be that RETURN insns aren't needed, so that is our return
389 label and we don't have to do anything else. */
391 insn = get_last_insn ();
392 while (NOTE_P (insn)
393 || (NONJUMP_INSN_P (insn)
394 && (GET_CODE (PATTERN (insn)) == USE
395 || GET_CODE (PATTERN (insn)) == CLOBBER)))
396 insn = PREV_INSN (insn);
398 /* When a target threads its epilogue we might already have a
399 suitable return insn. If so put a label before it for the
400 function_return_label. */
401 if (BARRIER_P (insn)
402 && JUMP_P (PREV_INSN (insn))
403 && PATTERN (PREV_INSN (insn)) == kind)
405 rtx temp = PREV_INSN (PREV_INSN (insn));
406 rtx label = gen_label_rtx ();
407 LABEL_NUSES (label) = 0;
409 /* Put the label before any USE insns that may precede the RETURN
410 insn. */
411 while (GET_CODE (temp) == USE)
412 temp = PREV_INSN (temp);
414 emit_label_after (label, temp);
415 *plabel = label;
418 else if (LABEL_P (insn))
419 *plabel = insn;
420 else
422 rtx label = gen_label_rtx ();
423 LABEL_NUSES (label) = 0;
424 /* If the basic block reorder pass moves the return insn to
425 some other place try to locate it again and put our
426 function_return_label there. */
427 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
428 insn = PREV_INSN (insn);
429 if (insn)
431 insn = PREV_INSN (insn);
433 /* Put the label before any USE insns that may precede the
434 RETURN insn. */
435 while (GET_CODE (insn) == USE)
436 insn = PREV_INSN (insn);
438 emit_label_after (label, insn);
440 else
442 #ifdef HAVE_epilogue
443 if (HAVE_epilogue
444 #ifdef HAVE_return
445 && ! HAVE_return
446 #endif
448 /* The RETURN insn has its delay slot filled so we cannot
449 emit the label just before it. Since we already have
450 an epilogue and cannot emit a new RETURN, we cannot
451 emit the label at all. */
452 return NULL_RTX;
453 #endif /* HAVE_epilogue */
455 /* Otherwise, make a new label and emit a RETURN and BARRIER,
456 if needed. */
457 emit_label (label);
458 #ifdef HAVE_return
459 /* We don't bother trying to create a return insn if the
460 epilogue has filled delay-slots; we would have to try and
461 move the delay-slot fillers to the delay-slots for the new
462 return insn or in front of the new return insn. */
463 if (crtl->epilogue_delay_list == NULL
464 && HAVE_return)
466 /* The return we make may have delay slots too. */
467 rtx insn = gen_return ();
468 insn = emit_jump_insn (insn);
469 set_return_jump_label (insn);
470 emit_barrier ();
471 if (num_delay_slots (insn) > 0)
472 obstack_ptr_grow (&unfilled_slots_obstack, insn);
474 #endif
476 *plabel = label;
479 /* Show one additional use for this label so it won't go away until
480 we are done. */
481 ++LABEL_NUSES (*plabel);
483 return *plabel;
486 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
487 the pattern of INSN with the SEQUENCE.
489 Chain the insns so that NEXT_INSN of each insn in the sequence points to
490 the next and NEXT_INSN of the last insn in the sequence points to
491 the first insn after the sequence. Similarly for PREV_INSN. This makes
492 it easier to scan all insns.
494 Returns the SEQUENCE that replaces INSN. */
496 static rtx
497 emit_delay_sequence (rtx insn, rtx list, int length)
499 int i = 1;
500 rtx li;
501 int had_barrier = 0;
503 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
504 rtvec seqv = rtvec_alloc (length + 1);
505 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
506 rtx seq_insn = make_insn_raw (seq);
507 rtx first = get_insns ();
508 rtx last = get_last_insn ();
510 /* Make a copy of the insn having delay slots. */
511 rtx delay_insn = copy_rtx (insn);
513 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
514 confuse further processing. Update LAST in case it was the last insn.
515 We will put the BARRIER back in later. */
516 if (NEXT_INSN (insn) && BARRIER_P (NEXT_INSN (insn)))
518 delete_related_insns (NEXT_INSN (insn));
519 last = get_last_insn ();
520 had_barrier = 1;
523 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
524 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
525 PREV_INSN (seq_insn) = PREV_INSN (insn);
527 if (insn != last)
528 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
530 if (insn != first)
531 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
533 /* Note the calls to set_new_first_and_last_insn must occur after
534 SEQ_INSN has been completely spliced into the insn stream.
536 Otherwise CUR_INSN_UID will get set to an incorrect value because
537 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
538 if (insn == last)
539 set_new_first_and_last_insn (first, seq_insn);
541 if (insn == first)
542 set_new_first_and_last_insn (seq_insn, last);
544 /* Build our SEQUENCE and rebuild the insn chain. */
545 XVECEXP (seq, 0, 0) = delay_insn;
546 INSN_DELETED_P (delay_insn) = 0;
547 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
549 INSN_LOCATION (seq_insn) = INSN_LOCATION (delay_insn);
551 for (li = list; li; li = XEXP (li, 1), i++)
553 rtx tem = XEXP (li, 0);
554 rtx note, next;
556 /* Show that this copy of the insn isn't deleted. */
557 INSN_DELETED_P (tem) = 0;
559 XVECEXP (seq, 0, i) = tem;
560 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
561 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
563 /* SPARC assembler, for instance, emit warning when debug info is output
564 into the delay slot. */
565 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
566 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
567 INSN_LOCATION (tem) = 0;
569 for (note = REG_NOTES (tem); note; note = next)
571 next = XEXP (note, 1);
572 switch (REG_NOTE_KIND (note))
574 case REG_DEAD:
575 /* Remove any REG_DEAD notes because we can't rely on them now
576 that the insn has been moved. */
577 remove_note (tem, note);
578 break;
580 case REG_LABEL_OPERAND:
581 case REG_LABEL_TARGET:
582 /* Keep the label reference count up to date. */
583 if (LABEL_P (XEXP (note, 0)))
584 LABEL_NUSES (XEXP (note, 0)) ++;
585 break;
587 default:
588 break;
593 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
595 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
596 last insn in that SEQUENCE to point to us. Similarly for the first
597 insn in the following insn if it is a SEQUENCE. */
599 if (PREV_INSN (seq_insn) && NONJUMP_INSN_P (PREV_INSN (seq_insn))
600 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
601 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
602 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
603 = seq_insn;
605 if (NEXT_INSN (seq_insn) && NONJUMP_INSN_P (NEXT_INSN (seq_insn))
606 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
607 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
609 /* If there used to be a BARRIER, put it back. */
610 if (had_barrier)
611 emit_barrier_after (seq_insn);
613 gcc_assert (i == length + 1);
615 return seq_insn;
618 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
619 be in the order in which the insns are to be executed. */
621 static rtx
622 add_to_delay_list (rtx insn, rtx delay_list)
624 /* If we have an empty list, just make a new list element. If
625 INSN has its block number recorded, clear it since we may
626 be moving the insn to a new block. */
628 if (delay_list == 0)
630 clear_hashed_info_for_insn (insn);
631 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
634 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
635 list. */
636 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
638 return delay_list;
641 /* Delete INSN from the delay slot of the insn that it is in, which may
642 produce an insn with no delay slots. Return the new insn. */
644 static rtx
645 delete_from_delay_slot (rtx insn)
647 rtx trial, seq_insn, seq, prev;
648 rtx delay_list = 0;
649 int i;
650 int had_barrier = 0;
652 /* We first must find the insn containing the SEQUENCE with INSN in its
653 delay slot. Do this by finding an insn, TRIAL, where
654 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
656 for (trial = insn;
657 PREV_INSN (NEXT_INSN (trial)) == trial;
658 trial = NEXT_INSN (trial))
661 seq_insn = PREV_INSN (NEXT_INSN (trial));
662 seq = PATTERN (seq_insn);
664 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
665 had_barrier = 1;
667 /* Create a delay list consisting of all the insns other than the one
668 we are deleting (unless we were the only one). */
669 if (XVECLEN (seq, 0) > 2)
670 for (i = 1; i < XVECLEN (seq, 0); i++)
671 if (XVECEXP (seq, 0, i) != insn)
672 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
674 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
675 list, and rebuild the delay list if non-empty. */
676 prev = PREV_INSN (seq_insn);
677 trial = XVECEXP (seq, 0, 0);
678 delete_related_insns (seq_insn);
679 add_insn_after (trial, prev, NULL);
681 /* If there was a barrier after the old SEQUENCE, remit it. */
682 if (had_barrier)
683 emit_barrier_after (trial);
685 /* If there are any delay insns, remit them. Otherwise clear the
686 annul flag. */
687 if (delay_list)
688 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
689 else if (JUMP_P (trial))
690 INSN_ANNULLED_BRANCH_P (trial) = 0;
692 INSN_FROM_TARGET_P (insn) = 0;
694 /* Show we need to fill this insn again. */
695 obstack_ptr_grow (&unfilled_slots_obstack, trial);
697 return trial;
700 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
701 the insn that sets CC0 for it and delete it too. */
703 static void
704 delete_scheduled_jump (rtx insn)
706 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
707 delete the insn that sets the condition code, but it is hard to find it.
708 Since this case is rare anyway, don't bother trying; there would likely
709 be other insns that became dead anyway, which we wouldn't know to
710 delete. */
712 #ifdef HAVE_cc0
713 if (reg_mentioned_p (cc0_rtx, insn))
715 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
717 /* If a reg-note was found, it points to an insn to set CC0. This
718 insn is in the delay list of some other insn. So delete it from
719 the delay list it was in. */
720 if (note)
722 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
723 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
724 delete_from_delay_slot (XEXP (note, 0));
726 else
728 /* The insn setting CC0 is our previous insn, but it may be in
729 a delay slot. It will be the last insn in the delay slot, if
730 it is. */
731 rtx trial = previous_insn (insn);
732 if (NOTE_P (trial))
733 trial = prev_nonnote_insn (trial);
734 if (sets_cc0_p (PATTERN (trial)) != 1
735 || FIND_REG_INC_NOTE (trial, NULL_RTX))
736 return;
737 if (PREV_INSN (NEXT_INSN (trial)) == trial)
738 delete_related_insns (trial);
739 else
740 delete_from_delay_slot (trial);
743 #endif
745 delete_related_insns (insn);
748 /* Counters for delay-slot filling. */
750 #define NUM_REORG_FUNCTIONS 2
751 #define MAX_DELAY_HISTOGRAM 3
752 #define MAX_REORG_PASSES 2
754 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
756 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
758 static int reorg_pass_number;
760 static void
761 note_delay_statistics (int slots_filled, int index)
763 num_insns_needing_delays[index][reorg_pass_number]++;
764 if (slots_filled > MAX_DELAY_HISTOGRAM)
765 slots_filled = MAX_DELAY_HISTOGRAM;
766 num_filled_delays[index][slots_filled][reorg_pass_number]++;
769 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
771 /* Optimize the following cases:
773 1. When a conditional branch skips over only one instruction,
774 use an annulling branch and put that insn in the delay slot.
775 Use either a branch that annuls when the condition if true or
776 invert the test with a branch that annuls when the condition is
777 false. This saves insns, since otherwise we must copy an insn
778 from the L1 target.
780 (orig) (skip) (otherwise)
781 Bcc.n L1 Bcc',a L1 Bcc,a L1'
782 insn insn insn2
783 L1: L1: L1:
784 insn2 insn2 insn2
785 insn3 insn3 L1':
786 insn3
788 2. When a conditional branch skips over only one instruction,
789 and after that, it unconditionally branches somewhere else,
790 perform the similar optimization. This saves executing the
791 second branch in the case where the inverted condition is true.
793 Bcc.n L1 Bcc',a L2
794 insn insn
795 L1: L1:
796 Bra L2 Bra L2
798 INSN is a JUMP_INSN.
800 This should be expanded to skip over N insns, where N is the number
801 of delay slots required. */
803 static rtx
804 optimize_skip (rtx insn)
806 rtx trial = next_nonnote_insn (insn);
807 rtx next_trial = next_active_insn (trial);
808 rtx delay_list = 0;
809 int flags;
811 flags = get_jump_flags (insn, JUMP_LABEL (insn));
813 if (trial == 0
814 || !NONJUMP_INSN_P (trial)
815 || GET_CODE (PATTERN (trial)) == SEQUENCE
816 || recog_memoized (trial) < 0
817 || (! eligible_for_annul_false (insn, 0, trial, flags)
818 && ! eligible_for_annul_true (insn, 0, trial, flags))
819 || can_throw_internal (trial))
820 return 0;
822 /* There are two cases where we are just executing one insn (we assume
823 here that a branch requires only one insn; this should be generalized
824 at some point): Where the branch goes around a single insn or where
825 we have one insn followed by a branch to the same label we branch to.
826 In both of these cases, inverting the jump and annulling the delay
827 slot give the same effect in fewer insns. */
828 if ((next_trial == next_active_insn (JUMP_LABEL (insn))
829 && ! (next_trial == 0 && crtl->epilogue_delay_list != 0))
830 || (next_trial != 0
831 && simplejump_or_return_p (next_trial)
832 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
834 if (eligible_for_annul_false (insn, 0, trial, flags))
836 if (invert_jump (insn, JUMP_LABEL (insn), 1))
837 INSN_FROM_TARGET_P (trial) = 1;
838 else if (! eligible_for_annul_true (insn, 0, trial, flags))
839 return 0;
842 delay_list = add_to_delay_list (trial, NULL_RTX);
843 next_trial = next_active_insn (trial);
844 update_block (trial, trial);
845 delete_related_insns (trial);
847 /* Also, if we are targeting an unconditional
848 branch, thread our jump to the target of that branch. Don't
849 change this into a RETURN here, because it may not accept what
850 we have in the delay slot. We'll fix this up later. */
851 if (next_trial && simplejump_or_return_p (next_trial))
853 rtx target_label = JUMP_LABEL (next_trial);
854 if (ANY_RETURN_P (target_label))
855 target_label = find_end_label (target_label);
857 if (target_label)
859 /* Recompute the flags based on TARGET_LABEL since threading
860 the jump to TARGET_LABEL may change the direction of the
861 jump (which may change the circumstances in which the
862 delay slot is nullified). */
863 flags = get_jump_flags (insn, target_label);
864 if (eligible_for_annul_true (insn, 0, trial, flags))
865 reorg_redirect_jump (insn, target_label);
869 INSN_ANNULLED_BRANCH_P (insn) = 1;
872 return delay_list;
874 #endif
876 /* Encode and return branch direction and prediction information for
877 INSN assuming it will jump to LABEL.
879 Non conditional branches return no direction information and
880 are predicted as very likely taken. */
882 static int
883 get_jump_flags (rtx insn, rtx label)
885 int flags;
887 /* get_jump_flags can be passed any insn with delay slots, these may
888 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
889 direction information, and only if they are conditional jumps.
891 If LABEL is a return, then there is no way to determine the branch
892 direction. */
893 if (JUMP_P (insn)
894 && (condjump_p (insn) || condjump_in_parallel_p (insn))
895 && !ANY_RETURN_P (label)
896 && INSN_UID (insn) <= max_uid
897 && INSN_UID (label) <= max_uid)
898 flags
899 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
900 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
901 /* No valid direction information. */
902 else
903 flags = 0;
905 return flags;
908 /* Return 1 if INSN is a destination that will be branched to rarely (the
909 return point of a function); return 2 if DEST will be branched to very
910 rarely (a call to a function that doesn't return). Otherwise,
911 return 0. */
913 static int
914 rare_destination (rtx insn)
916 int jump_count = 0;
917 rtx next;
919 for (; insn && !ANY_RETURN_P (insn); insn = next)
921 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
922 insn = XVECEXP (PATTERN (insn), 0, 0);
924 next = NEXT_INSN (insn);
926 switch (GET_CODE (insn))
928 case CODE_LABEL:
929 return 0;
930 case BARRIER:
931 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
932 don't scan past JUMP_INSNs, so any barrier we find here must
933 have been after a CALL_INSN and hence mean the call doesn't
934 return. */
935 return 2;
936 case JUMP_INSN:
937 if (ANY_RETURN_P (PATTERN (insn)))
938 return 1;
939 else if (simplejump_p (insn)
940 && jump_count++ < 10)
941 next = JUMP_LABEL (insn);
942 else
943 return 0;
945 default:
946 break;
950 /* If we got here it means we hit the end of the function. So this
951 is an unlikely destination. */
953 return 1;
956 /* Return truth value of the statement that this branch
957 is mostly taken. If we think that the branch is extremely likely
958 to be taken, we return 2. If the branch is slightly more likely to be
959 taken, return 1. If the branch is slightly less likely to be taken,
960 return 0 and if the branch is highly unlikely to be taken, return -1.
962 CONDITION, if nonzero, is the condition that JUMP_INSN is testing. */
964 static int
965 mostly_true_jump (rtx jump_insn, rtx condition)
967 rtx target_label = JUMP_LABEL (jump_insn);
968 rtx note;
969 int rare_dest, rare_fallthrough;
971 /* If branch probabilities are available, then use that number since it
972 always gives a correct answer. */
973 note = find_reg_note (jump_insn, REG_BR_PROB, 0);
974 if (note)
976 int prob = INTVAL (XEXP (note, 0));
978 if (prob >= REG_BR_PROB_BASE * 9 / 10)
979 return 2;
980 else if (prob >= REG_BR_PROB_BASE / 2)
981 return 1;
982 else if (prob >= REG_BR_PROB_BASE / 10)
983 return 0;
984 else
985 return -1;
988 /* Look at the relative rarities of the fallthrough and destination. If
989 they differ, we can predict the branch that way. */
990 rare_dest = rare_destination (target_label);
991 rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
993 switch (rare_fallthrough - rare_dest)
995 case -2:
996 return -1;
997 case -1:
998 return 0;
999 case 0:
1000 break;
1001 case 1:
1002 return 1;
1003 case 2:
1004 return 2;
1007 /* If we couldn't figure out what this jump was, assume it won't be
1008 taken. This should be rare. */
1009 if (condition == 0)
1010 return 0;
1012 /* Predict backward branches usually take, forward branches usually not. If
1013 we don't know whether this is forward or backward, assume the branch
1014 will be taken, since most are. */
1015 return (ANY_RETURN_P (target_label) || INSN_UID (jump_insn) > max_uid
1016 || INSN_UID (target_label) > max_uid
1017 || (uid_to_ruid[INSN_UID (jump_insn)]
1018 > uid_to_ruid[INSN_UID (target_label)]));
1021 /* Return the condition under which INSN will branch to TARGET. If TARGET
1022 is zero, return the condition under which INSN will return. If INSN is
1023 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1024 type of jump, or it doesn't go to TARGET, return 0. */
1026 static rtx
1027 get_branch_condition (rtx insn, rtx target)
1029 rtx pat = PATTERN (insn);
1030 rtx src;
1032 if (condjump_in_parallel_p (insn))
1033 pat = XVECEXP (pat, 0, 0);
1035 if (ANY_RETURN_P (pat))
1036 return pat == target ? const_true_rtx : 0;
1038 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1039 return 0;
1041 src = SET_SRC (pat);
1042 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1043 return const_true_rtx;
1045 else if (GET_CODE (src) == IF_THEN_ELSE
1046 && XEXP (src, 2) == pc_rtx
1047 && GET_CODE (XEXP (src, 1)) == LABEL_REF
1048 && XEXP (XEXP (src, 1), 0) == target)
1049 return XEXP (src, 0);
1051 else if (GET_CODE (src) == IF_THEN_ELSE
1052 && XEXP (src, 1) == pc_rtx
1053 && GET_CODE (XEXP (src, 2)) == LABEL_REF
1054 && XEXP (XEXP (src, 2), 0) == target)
1056 enum rtx_code rev;
1057 rev = reversed_comparison_code (XEXP (src, 0), insn);
1058 if (rev != UNKNOWN)
1059 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
1060 XEXP (XEXP (src, 0), 0),
1061 XEXP (XEXP (src, 0), 1));
1064 return 0;
1067 /* Return nonzero if CONDITION is more strict than the condition of
1068 INSN, i.e., if INSN will always branch if CONDITION is true. */
1070 static int
1071 condition_dominates_p (rtx condition, rtx insn)
1073 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1074 enum rtx_code code = GET_CODE (condition);
1075 enum rtx_code other_code;
1077 if (rtx_equal_p (condition, other_condition)
1078 || other_condition == const_true_rtx)
1079 return 1;
1081 else if (condition == const_true_rtx || other_condition == 0)
1082 return 0;
1084 other_code = GET_CODE (other_condition);
1085 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1086 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1087 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1088 return 0;
1090 return comparison_dominates_p (code, other_code);
1093 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1094 any insns already in the delay slot of JUMP. */
1096 static int
1097 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
1099 int flags, i;
1100 rtx pat = PATTERN (seq);
1102 /* Make sure all the delay slots of this jump would still
1103 be valid after threading the jump. If they are still
1104 valid, then return nonzero. */
1106 flags = get_jump_flags (jump, newlabel);
1107 for (i = 1; i < XVECLEN (pat, 0); i++)
1108 if (! (
1109 #ifdef ANNUL_IFFALSE_SLOTS
1110 (INSN_ANNULLED_BRANCH_P (jump)
1111 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1112 ? eligible_for_annul_false (jump, i - 1,
1113 XVECEXP (pat, 0, i), flags) :
1114 #endif
1115 #ifdef ANNUL_IFTRUE_SLOTS
1116 (INSN_ANNULLED_BRANCH_P (jump)
1117 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1118 ? eligible_for_annul_true (jump, i - 1,
1119 XVECEXP (pat, 0, i), flags) :
1120 #endif
1121 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
1122 break;
1124 return (i == XVECLEN (pat, 0));
1127 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1128 any insns we wish to place in the delay slot of JUMP. */
1130 static int
1131 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1133 int flags, i;
1134 rtx li;
1136 /* Make sure all the insns in DELAY_LIST would still be
1137 valid after threading the jump. If they are still
1138 valid, then return nonzero. */
1140 flags = get_jump_flags (jump, newlabel);
1141 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1142 if (! (
1143 #ifdef ANNUL_IFFALSE_SLOTS
1144 (INSN_ANNULLED_BRANCH_P (jump)
1145 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1146 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1147 #endif
1148 #ifdef ANNUL_IFTRUE_SLOTS
1149 (INSN_ANNULLED_BRANCH_P (jump)
1150 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1151 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1152 #endif
1153 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1154 break;
1156 return (li == NULL);
1159 /* DELAY_LIST is a list of insns that have already been placed into delay
1160 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1161 If not, return 0; otherwise return 1. */
1163 static int
1164 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1166 rtx temp;
1168 if (delay_list)
1170 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1172 rtx trial = XEXP (temp, 0);
1174 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1175 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1176 return 0;
1180 return 1;
1183 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1184 the condition tested by INSN is CONDITION and the resources shown in
1185 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1186 from SEQ's delay list, in addition to whatever insns it may execute
1187 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1188 needed while searching for delay slot insns. Return the concatenated
1189 delay list if possible, otherwise, return 0.
1191 SLOTS_TO_FILL is the total number of slots required by INSN, and
1192 PSLOTS_FILLED points to the number filled so far (also the number of
1193 insns in DELAY_LIST). It is updated with the number that have been
1194 filled from the SEQUENCE, if any.
1196 PANNUL_P points to a nonzero value if we already know that we need
1197 to annul INSN. If this routine determines that annulling is needed,
1198 it may set that value nonzero.
1200 PNEW_THREAD points to a location that is to receive the place at which
1201 execution should continue. */
1203 static rtx
1204 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1205 rtx delay_list, struct resources *sets,
1206 struct resources *needed,
1207 struct resources *other_needed,
1208 int slots_to_fill, int *pslots_filled,
1209 int *pannul_p, rtx *pnew_thread)
1211 rtx temp;
1212 int slots_remaining = slots_to_fill - *pslots_filled;
1213 int total_slots_filled = *pslots_filled;
1214 rtx new_delay_list = 0;
1215 int must_annul = *pannul_p;
1216 int used_annul = 0;
1217 int i;
1218 struct resources cc_set;
1220 /* We can't do anything if there are more delay slots in SEQ than we
1221 can handle, or if we don't know that it will be a taken branch.
1222 We know that it will be a taken branch if it is either an unconditional
1223 branch or a conditional branch with a stricter branch condition.
1225 Also, exit if the branch has more than one set, since then it is computing
1226 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1227 ??? It may be possible to move other sets into INSN in addition to
1228 moving the instructions in the delay slots.
1230 We can not steal the delay list if one of the instructions in the
1231 current delay_list modifies the condition codes and the jump in the
1232 sequence is a conditional jump. We can not do this because we can
1233 not change the direction of the jump because the condition codes
1234 will effect the direction of the jump in the sequence. */
1236 CLEAR_RESOURCE (&cc_set);
1237 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1239 rtx trial = XEXP (temp, 0);
1241 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1242 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1243 return delay_list;
1246 if (XVECLEN (seq, 0) - 1 > slots_remaining
1247 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1248 || ! single_set (XVECEXP (seq, 0, 0)))
1249 return delay_list;
1251 #ifdef MD_CAN_REDIRECT_BRANCH
1252 /* On some targets, branches with delay slots can have a limited
1253 displacement. Give the back end a chance to tell us we can't do
1254 this. */
1255 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1256 return delay_list;
1257 #endif
1259 for (i = 1; i < XVECLEN (seq, 0); i++)
1261 rtx trial = XVECEXP (seq, 0, i);
1262 int flags;
1264 if (insn_references_resource_p (trial, sets, false)
1265 || insn_sets_resource_p (trial, needed, false)
1266 || insn_sets_resource_p (trial, sets, false)
1267 #ifdef HAVE_cc0
1268 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1269 delay list. */
1270 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1271 #endif
1272 /* If TRIAL is from the fallthrough code of an annulled branch insn
1273 in SEQ, we cannot use it. */
1274 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1275 && ! INSN_FROM_TARGET_P (trial)))
1276 return delay_list;
1278 /* If this insn was already done (usually in a previous delay slot),
1279 pretend we put it in our delay slot. */
1280 if (redundant_insn (trial, insn, new_delay_list))
1281 continue;
1283 /* We will end up re-vectoring this branch, so compute flags
1284 based on jumping to the new label. */
1285 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1287 if (! must_annul
1288 && ((condition == const_true_rtx
1289 || (! insn_sets_resource_p (trial, other_needed, false)
1290 && ! may_trap_or_fault_p (PATTERN (trial)))))
1291 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1292 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1293 && (must_annul = 1,
1294 check_annul_list_true_false (0, delay_list)
1295 && check_annul_list_true_false (0, new_delay_list)
1296 && eligible_for_annul_false (insn, total_slots_filled,
1297 trial, flags)))
1299 if (must_annul)
1300 used_annul = 1;
1301 temp = copy_delay_slot_insn (trial);
1302 INSN_FROM_TARGET_P (temp) = 1;
1303 new_delay_list = add_to_delay_list (temp, new_delay_list);
1304 total_slots_filled++;
1306 if (--slots_remaining == 0)
1307 break;
1309 else
1310 return delay_list;
1313 /* Show the place to which we will be branching. */
1314 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1316 /* Add any new insns to the delay list and update the count of the
1317 number of slots filled. */
1318 *pslots_filled = total_slots_filled;
1319 if (used_annul)
1320 *pannul_p = 1;
1322 if (delay_list == 0)
1323 return new_delay_list;
1325 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1326 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1328 return delay_list;
1331 /* Similar to steal_delay_list_from_target except that SEQ is on the
1332 fallthrough path of INSN. Here we only do something if the delay insn
1333 of SEQ is an unconditional branch. In that case we steal its delay slot
1334 for INSN since unconditional branches are much easier to fill. */
1336 static rtx
1337 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1338 rtx delay_list, struct resources *sets,
1339 struct resources *needed,
1340 struct resources *other_needed,
1341 int slots_to_fill, int *pslots_filled,
1342 int *pannul_p)
1344 int i;
1345 int flags;
1346 int must_annul = *pannul_p;
1347 int used_annul = 0;
1349 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1351 /* We can't do anything if SEQ's delay insn isn't an
1352 unconditional branch. */
1354 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1355 return delay_list;
1357 for (i = 1; i < XVECLEN (seq, 0); i++)
1359 rtx trial = XVECEXP (seq, 0, i);
1361 /* If TRIAL sets CC0, stealing it will move it too far from the use
1362 of CC0. */
1363 if (insn_references_resource_p (trial, sets, false)
1364 || insn_sets_resource_p (trial, needed, false)
1365 || insn_sets_resource_p (trial, sets, false)
1366 #ifdef HAVE_cc0
1367 || sets_cc0_p (PATTERN (trial))
1368 #endif
1371 break;
1373 /* If this insn was already done, we don't need it. */
1374 if (redundant_insn (trial, insn, delay_list))
1376 delete_from_delay_slot (trial);
1377 continue;
1380 if (! must_annul
1381 && ((condition == const_true_rtx
1382 || (! insn_sets_resource_p (trial, other_needed, false)
1383 && ! may_trap_or_fault_p (PATTERN (trial)))))
1384 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1385 : (must_annul || delay_list == NULL) && (must_annul = 1,
1386 check_annul_list_true_false (1, delay_list)
1387 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1389 if (must_annul)
1390 used_annul = 1;
1391 delete_from_delay_slot (trial);
1392 delay_list = add_to_delay_list (trial, delay_list);
1394 if (++(*pslots_filled) == slots_to_fill)
1395 break;
1397 else
1398 break;
1401 if (used_annul)
1402 *pannul_p = 1;
1403 return delay_list;
1406 /* Try merging insns starting at THREAD which match exactly the insns in
1407 INSN's delay list.
1409 If all insns were matched and the insn was previously annulling, the
1410 annul bit will be cleared.
1412 For each insn that is merged, if the branch is or will be non-annulling,
1413 we delete the merged insn. */
1415 static void
1416 try_merge_delay_insns (rtx insn, rtx thread)
1418 rtx trial, next_trial;
1419 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1420 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1421 int slot_number = 1;
1422 int num_slots = XVECLEN (PATTERN (insn), 0);
1423 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1424 struct resources set, needed;
1425 rtx merged_insns = 0;
1426 int i;
1427 int flags;
1429 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1431 CLEAR_RESOURCE (&needed);
1432 CLEAR_RESOURCE (&set);
1434 /* If this is not an annulling branch, take into account anything needed in
1435 INSN's delay slot. This prevents two increments from being incorrectly
1436 folded into one. If we are annulling, this would be the correct
1437 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1438 will essentially disable this optimization. This method is somewhat of
1439 a kludge, but I don't see a better way.) */
1440 if (! annul_p)
1441 for (i = 1 ; i < num_slots; i++)
1442 if (XVECEXP (PATTERN (insn), 0, i))
1443 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1444 true);
1446 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1448 rtx pat = PATTERN (trial);
1449 rtx oldtrial = trial;
1451 next_trial = next_nonnote_insn (trial);
1453 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1454 if (NONJUMP_INSN_P (trial)
1455 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1456 continue;
1458 if (GET_CODE (next_to_match) == GET_CODE (trial)
1459 #ifdef HAVE_cc0
1460 /* We can't share an insn that sets cc0. */
1461 && ! sets_cc0_p (pat)
1462 #endif
1463 && ! insn_references_resource_p (trial, &set, true)
1464 && ! insn_sets_resource_p (trial, &set, true)
1465 && ! insn_sets_resource_p (trial, &needed, true)
1466 && (trial = try_split (pat, trial, 0)) != 0
1467 /* Update next_trial, in case try_split succeeded. */
1468 && (next_trial = next_nonnote_insn (trial))
1469 /* Likewise THREAD. */
1470 && (thread = oldtrial == thread ? trial : thread)
1471 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1472 /* Have to test this condition if annul condition is different
1473 from (and less restrictive than) non-annulling one. */
1474 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1477 if (! annul_p)
1479 update_block (trial, thread);
1480 if (trial == thread)
1481 thread = next_active_insn (thread);
1483 delete_related_insns (trial);
1484 INSN_FROM_TARGET_P (next_to_match) = 0;
1486 else
1487 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1489 if (++slot_number == num_slots)
1490 break;
1492 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1495 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1496 mark_referenced_resources (trial, &needed, true);
1499 /* See if we stopped on a filled insn. If we did, try to see if its
1500 delay slots match. */
1501 if (slot_number != num_slots
1502 && trial && NONJUMP_INSN_P (trial)
1503 && GET_CODE (PATTERN (trial)) == SEQUENCE
1504 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1505 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1507 rtx pat = PATTERN (trial);
1508 rtx filled_insn = XVECEXP (pat, 0, 0);
1510 /* Account for resources set/needed by the filled insn. */
1511 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1512 mark_referenced_resources (filled_insn, &needed, true);
1514 for (i = 1; i < XVECLEN (pat, 0); i++)
1516 rtx dtrial = XVECEXP (pat, 0, i);
1518 if (! insn_references_resource_p (dtrial, &set, true)
1519 && ! insn_sets_resource_p (dtrial, &set, true)
1520 && ! insn_sets_resource_p (dtrial, &needed, true)
1521 #ifdef HAVE_cc0
1522 && ! sets_cc0_p (PATTERN (dtrial))
1523 #endif
1524 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1525 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1527 if (! annul_p)
1529 rtx new_rtx;
1531 update_block (dtrial, thread);
1532 new_rtx = delete_from_delay_slot (dtrial);
1533 if (INSN_DELETED_P (thread))
1534 thread = new_rtx;
1535 INSN_FROM_TARGET_P (next_to_match) = 0;
1537 else
1538 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1539 merged_insns);
1541 if (++slot_number == num_slots)
1542 break;
1544 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1546 else
1548 /* Keep track of the set/referenced resources for the delay
1549 slots of any trial insns we encounter. */
1550 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1551 mark_referenced_resources (dtrial, &needed, true);
1556 /* If all insns in the delay slot have been matched and we were previously
1557 annulling the branch, we need not any more. In that case delete all the
1558 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1559 the delay list so that we know that it isn't only being used at the
1560 target. */
1561 if (slot_number == num_slots && annul_p)
1563 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1565 if (GET_MODE (merged_insns) == SImode)
1567 rtx new_rtx;
1569 update_block (XEXP (merged_insns, 0), thread);
1570 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1571 if (INSN_DELETED_P (thread))
1572 thread = new_rtx;
1574 else
1576 update_block (XEXP (merged_insns, 0), thread);
1577 delete_related_insns (XEXP (merged_insns, 0));
1581 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1583 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1584 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1588 /* See if INSN is redundant with an insn in front of TARGET. Often this
1589 is called when INSN is a candidate for a delay slot of TARGET.
1590 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1591 of INSN. Often INSN will be redundant with an insn in a delay slot of
1592 some previous insn. This happens when we have a series of branches to the
1593 same label; in that case the first insn at the target might want to go
1594 into each of the delay slots.
1596 If we are not careful, this routine can take up a significant fraction
1597 of the total compilation time (4%), but only wins rarely. Hence we
1598 speed this routine up by making two passes. The first pass goes back
1599 until it hits a label and sees if it finds an insn with an identical
1600 pattern. Only in this (relatively rare) event does it check for
1601 data conflicts.
1603 We do not split insns we encounter. This could cause us not to find a
1604 redundant insn, but the cost of splitting seems greater than the possible
1605 gain in rare cases. */
1607 static rtx
1608 redundant_insn (rtx insn, rtx target, rtx delay_list)
1610 rtx target_main = target;
1611 rtx ipat = PATTERN (insn);
1612 rtx trial, pat;
1613 struct resources needed, set;
1614 int i;
1615 unsigned insns_to_search;
1617 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1618 are allowed to not actually assign to such a register. */
1619 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1620 return 0;
1622 /* Scan backwards looking for a match. */
1623 for (trial = PREV_INSN (target),
1624 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1625 trial && insns_to_search > 0;
1626 trial = PREV_INSN (trial))
1628 if (LABEL_P (trial))
1629 return 0;
1631 if (!NONDEBUG_INSN_P (trial))
1632 continue;
1633 --insns_to_search;
1635 pat = PATTERN (trial);
1636 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1637 continue;
1639 if (GET_CODE (pat) == SEQUENCE)
1641 /* Stop for a CALL and its delay slots because it is difficult to
1642 track its resource needs correctly. */
1643 if (CALL_P (XVECEXP (pat, 0, 0)))
1644 return 0;
1646 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1647 slots because it is difficult to track its resource needs
1648 correctly. */
1650 #ifdef INSN_SETS_ARE_DELAYED
1651 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1652 return 0;
1653 #endif
1655 #ifdef INSN_REFERENCES_ARE_DELAYED
1656 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1657 return 0;
1658 #endif
1660 /* See if any of the insns in the delay slot match, updating
1661 resource requirements as we go. */
1662 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1663 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1664 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1665 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1666 break;
1668 /* If found a match, exit this loop early. */
1669 if (i > 0)
1670 break;
1673 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1674 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1675 break;
1678 /* If we didn't find an insn that matches, return 0. */
1679 if (trial == 0)
1680 return 0;
1682 /* See what resources this insn sets and needs. If they overlap, or
1683 if this insn references CC0, it can't be redundant. */
1685 CLEAR_RESOURCE (&needed);
1686 CLEAR_RESOURCE (&set);
1687 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1688 mark_referenced_resources (insn, &needed, true);
1690 /* If TARGET is a SEQUENCE, get the main insn. */
1691 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1692 target_main = XVECEXP (PATTERN (target), 0, 0);
1694 if (resource_conflicts_p (&needed, &set)
1695 #ifdef HAVE_cc0
1696 || reg_mentioned_p (cc0_rtx, ipat)
1697 #endif
1698 /* The insn requiring the delay may not set anything needed or set by
1699 INSN. */
1700 || insn_sets_resource_p (target_main, &needed, true)
1701 || insn_sets_resource_p (target_main, &set, true))
1702 return 0;
1704 /* Insns we pass may not set either NEEDED or SET, so merge them for
1705 simpler tests. */
1706 needed.memory |= set.memory;
1707 needed.unch_memory |= set.unch_memory;
1708 IOR_HARD_REG_SET (needed.regs, set.regs);
1710 /* This insn isn't redundant if it conflicts with an insn that either is
1711 or will be in a delay slot of TARGET. */
1713 while (delay_list)
1715 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1716 return 0;
1717 delay_list = XEXP (delay_list, 1);
1720 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1721 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1722 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1723 true))
1724 return 0;
1726 /* Scan backwards until we reach a label or an insn that uses something
1727 INSN sets or sets something insn uses or sets. */
1729 for (trial = PREV_INSN (target),
1730 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1731 trial && !LABEL_P (trial) && insns_to_search > 0;
1732 trial = PREV_INSN (trial))
1734 if (!NONDEBUG_INSN_P (trial))
1735 continue;
1736 --insns_to_search;
1738 pat = PATTERN (trial);
1739 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1740 continue;
1742 if (GET_CODE (pat) == SEQUENCE)
1744 bool annul_p = false;
1745 rtx control = XVECEXP (pat, 0, 0);
1747 /* If this is a CALL_INSN and its delay slots, it is hard to track
1748 the resource needs properly, so give up. */
1749 if (CALL_P (control))
1750 return 0;
1752 /* If this is an INSN or JUMP_INSN with delayed effects, it
1753 is hard to track the resource needs properly, so give up. */
1755 #ifdef INSN_SETS_ARE_DELAYED
1756 if (INSN_SETS_ARE_DELAYED (control))
1757 return 0;
1758 #endif
1760 #ifdef INSN_REFERENCES_ARE_DELAYED
1761 if (INSN_REFERENCES_ARE_DELAYED (control))
1762 return 0;
1763 #endif
1765 if (JUMP_P (control))
1766 annul_p = INSN_ANNULLED_BRANCH_P (control);
1768 /* See if any of the insns in the delay slot match, updating
1769 resource requirements as we go. */
1770 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1772 rtx candidate = XVECEXP (pat, 0, i);
1774 /* If an insn will be annulled if the branch is false, it isn't
1775 considered as a possible duplicate insn. */
1776 if (rtx_equal_p (PATTERN (candidate), ipat)
1777 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1779 /* Show that this insn will be used in the sequel. */
1780 INSN_FROM_TARGET_P (candidate) = 0;
1781 return candidate;
1784 /* Unless this is an annulled insn from the target of a branch,
1785 we must stop if it sets anything needed or set by INSN. */
1786 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1787 && insn_sets_resource_p (candidate, &needed, true))
1788 return 0;
1791 /* If the insn requiring the delay slot conflicts with INSN, we
1792 must stop. */
1793 if (insn_sets_resource_p (control, &needed, true))
1794 return 0;
1796 else
1798 /* See if TRIAL is the same as INSN. */
1799 pat = PATTERN (trial);
1800 if (rtx_equal_p (pat, ipat))
1801 return trial;
1803 /* Can't go any further if TRIAL conflicts with INSN. */
1804 if (insn_sets_resource_p (trial, &needed, true))
1805 return 0;
1809 return 0;
1812 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1813 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1814 is nonzero, we are allowed to fall into this thread; otherwise, we are
1815 not.
1817 If LABEL is used more than one or we pass a label other than LABEL before
1818 finding an active insn, we do not own this thread. */
1820 static int
1821 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1823 rtx active_insn;
1824 rtx insn;
1826 /* We don't own the function end. */
1827 if (thread == 0 || ANY_RETURN_P (thread))
1828 return 0;
1830 /* Get the first active insn, or THREAD, if it is an active insn. */
1831 active_insn = next_active_insn (PREV_INSN (thread));
1833 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1834 if (LABEL_P (insn)
1835 && (insn != label || LABEL_NUSES (insn) != 1))
1836 return 0;
1838 if (allow_fallthrough)
1839 return 1;
1841 /* Ensure that we reach a BARRIER before any insn or label. */
1842 for (insn = prev_nonnote_insn (thread);
1843 insn == 0 || !BARRIER_P (insn);
1844 insn = prev_nonnote_insn (insn))
1845 if (insn == 0
1846 || LABEL_P (insn)
1847 || (NONJUMP_INSN_P (insn)
1848 && GET_CODE (PATTERN (insn)) != USE
1849 && GET_CODE (PATTERN (insn)) != CLOBBER))
1850 return 0;
1852 return 1;
1855 /* Called when INSN is being moved from a location near the target of a jump.
1856 We leave a marker of the form (use (INSN)) immediately in front
1857 of WHERE for mark_target_live_regs. These markers will be deleted when
1858 reorg finishes.
1860 We used to try to update the live status of registers if WHERE is at
1861 the start of a basic block, but that can't work since we may remove a
1862 BARRIER in relax_delay_slots. */
1864 static void
1865 update_block (rtx insn, rtx where)
1867 /* Ignore if this was in a delay slot and it came from the target of
1868 a branch. */
1869 if (INSN_FROM_TARGET_P (insn))
1870 return;
1872 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1874 /* INSN might be making a value live in a block where it didn't use to
1875 be. So recompute liveness information for this block. */
1877 incr_ticks_for_insn (insn);
1880 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1881 the basic block containing the jump. */
1883 static int
1884 reorg_redirect_jump (rtx jump, rtx nlabel)
1886 incr_ticks_for_insn (jump);
1887 return redirect_jump (jump, nlabel, 1);
1890 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1891 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1892 that reference values used in INSN. If we find one, then we move the
1893 REG_DEAD note to INSN.
1895 This is needed to handle the case where a later insn (after INSN) has a
1896 REG_DEAD note for a register used by INSN, and this later insn subsequently
1897 gets moved before a CODE_LABEL because it is a redundant insn. In this
1898 case, mark_target_live_regs may be confused into thinking the register
1899 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1901 static void
1902 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1904 rtx p, link, next;
1906 for (p = next_nonnote_insn (insn); p != delayed_insn;
1907 p = next_nonnote_insn (p))
1908 for (link = REG_NOTES (p); link; link = next)
1910 next = XEXP (link, 1);
1912 if (REG_NOTE_KIND (link) != REG_DEAD
1913 || !REG_P (XEXP (link, 0)))
1914 continue;
1916 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1918 /* Move the REG_DEAD note from P to INSN. */
1919 remove_note (p, link);
1920 XEXP (link, 1) = REG_NOTES (insn);
1921 REG_NOTES (insn) = link;
1926 /* Called when an insn redundant with start_insn is deleted. If there
1927 is a REG_DEAD note for the target of start_insn between start_insn
1928 and stop_insn, then the REG_DEAD note needs to be deleted since the
1929 value no longer dies there.
1931 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1932 confused into thinking the register is dead. */
1934 static void
1935 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1937 rtx p, link, next;
1939 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1940 p = next_nonnote_insn (p))
1941 for (link = REG_NOTES (p); link; link = next)
1943 next = XEXP (link, 1);
1945 if (REG_NOTE_KIND (link) != REG_DEAD
1946 || !REG_P (XEXP (link, 0)))
1947 continue;
1949 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1951 remove_note (p, link);
1952 return;
1957 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1959 This handles the case of udivmodXi4 instructions which optimize their
1960 output depending on whether any REG_UNUSED notes are present.
1961 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1962 does. */
1964 static void
1965 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1967 rtx link, next;
1969 for (link = REG_NOTES (insn); link; link = next)
1971 next = XEXP (link, 1);
1973 if (REG_NOTE_KIND (link) != REG_UNUSED
1974 || !REG_P (XEXP (link, 0)))
1975 continue;
1977 if (! find_regno_note (redundant_insn, REG_UNUSED,
1978 REGNO (XEXP (link, 0))))
1979 remove_note (insn, link);
1983 /* Return the label before INSN, or put a new label there. */
1985 static rtx
1986 get_label_before (rtx insn)
1988 rtx label;
1990 /* Find an existing label at this point
1991 or make a new one if there is none. */
1992 label = prev_nonnote_insn (insn);
1994 if (label == 0 || !LABEL_P (label))
1996 rtx prev = PREV_INSN (insn);
1998 label = gen_label_rtx ();
1999 emit_label_after (label, prev);
2000 LABEL_NUSES (label) = 0;
2002 return label;
2005 /* Scan a function looking for insns that need a delay slot and find insns to
2006 put into the delay slot.
2008 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
2009 as calls). We do these first since we don't want jump insns (that are
2010 easier to fill) to get the only insns that could be used for non-jump insns.
2011 When it is zero, only try to fill JUMP_INSNs.
2013 When slots are filled in this manner, the insns (including the
2014 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2015 it is possible to tell whether a delay slot has really been filled
2016 or not. `final' knows how to deal with this, by communicating
2017 through FINAL_SEQUENCE. */
2019 static void
2020 fill_simple_delay_slots (int non_jumps_p)
2022 rtx insn, pat, trial, next_trial;
2023 int i;
2024 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2025 struct resources needed, set;
2026 int slots_to_fill, slots_filled;
2027 rtx delay_list;
2029 for (i = 0; i < num_unfilled_slots; i++)
2031 int flags;
2032 /* Get the next insn to fill. If it has already had any slots assigned,
2033 we can't do anything with it. Maybe we'll improve this later. */
2035 insn = unfilled_slots_base[i];
2036 if (insn == 0
2037 || INSN_DELETED_P (insn)
2038 || (NONJUMP_INSN_P (insn)
2039 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2040 || (JUMP_P (insn) && non_jumps_p)
2041 || (!JUMP_P (insn) && ! non_jumps_p))
2042 continue;
2044 /* It may have been that this insn used to need delay slots, but
2045 now doesn't; ignore in that case. This can happen, for example,
2046 on the HP PA RISC, where the number of delay slots depends on
2047 what insns are nearby. */
2048 slots_to_fill = num_delay_slots (insn);
2050 /* Some machine description have defined instructions to have
2051 delay slots only in certain circumstances which may depend on
2052 nearby insns (which change due to reorg's actions).
2054 For example, the PA port normally has delay slots for unconditional
2055 jumps.
2057 However, the PA port claims such jumps do not have a delay slot
2058 if they are immediate successors of certain CALL_INSNs. This
2059 allows the port to favor filling the delay slot of the call with
2060 the unconditional jump. */
2061 if (slots_to_fill == 0)
2062 continue;
2064 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2065 says how many. After initialization, first try optimizing
2067 call _foo call _foo
2068 nop add %o7,.-L1,%o7
2069 b,a L1
2072 If this case applies, the delay slot of the call is filled with
2073 the unconditional jump. This is done first to avoid having the
2074 delay slot of the call filled in the backward scan. Also, since
2075 the unconditional jump is likely to also have a delay slot, that
2076 insn must exist when it is subsequently scanned.
2078 This is tried on each insn with delay slots as some machines
2079 have insns which perform calls, but are not represented as
2080 CALL_INSNs. */
2082 slots_filled = 0;
2083 delay_list = 0;
2085 if (JUMP_P (insn))
2086 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2087 else
2088 flags = get_jump_flags (insn, NULL_RTX);
2090 if ((trial = next_active_insn (insn))
2091 && JUMP_P (trial)
2092 && simplejump_p (trial)
2093 && eligible_for_delay (insn, slots_filled, trial, flags)
2094 && no_labels_between_p (insn, trial)
2095 && ! can_throw_internal (trial))
2097 rtx *tmp;
2098 slots_filled++;
2099 delay_list = add_to_delay_list (trial, delay_list);
2101 /* TRIAL may have had its delay slot filled, then unfilled. When
2102 the delay slot is unfilled, TRIAL is placed back on the unfilled
2103 slots obstack. Unfortunately, it is placed on the end of the
2104 obstack, not in its original location. Therefore, we must search
2105 from entry i + 1 to the end of the unfilled slots obstack to
2106 try and find TRIAL. */
2107 tmp = &unfilled_slots_base[i + 1];
2108 while (*tmp != trial && tmp != unfilled_slots_next)
2109 tmp++;
2111 /* Remove the unconditional jump from consideration for delay slot
2112 filling and unthread it. */
2113 if (*tmp == trial)
2114 *tmp = 0;
2116 rtx next = NEXT_INSN (trial);
2117 rtx prev = PREV_INSN (trial);
2118 if (prev)
2119 NEXT_INSN (prev) = next;
2120 if (next)
2121 PREV_INSN (next) = prev;
2125 /* Now, scan backwards from the insn to search for a potential
2126 delay-slot candidate. Stop searching when a label or jump is hit.
2128 For each candidate, if it is to go into the delay slot (moved
2129 forward in execution sequence), it must not need or set any resources
2130 that were set by later insns and must not set any resources that
2131 are needed for those insns.
2133 The delay slot insn itself sets resources unless it is a call
2134 (in which case the called routine, not the insn itself, is doing
2135 the setting). */
2137 if (slots_filled < slots_to_fill)
2139 CLEAR_RESOURCE (&needed);
2140 CLEAR_RESOURCE (&set);
2141 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2142 mark_referenced_resources (insn, &needed, false);
2144 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2145 trial = next_trial)
2147 next_trial = prev_nonnote_insn (trial);
2149 /* This must be an INSN or CALL_INSN. */
2150 pat = PATTERN (trial);
2152 /* Stand-alone USE and CLOBBER are just for flow. */
2153 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2154 continue;
2156 /* Check for resource conflict first, to avoid unnecessary
2157 splitting. */
2158 if (! insn_references_resource_p (trial, &set, true)
2159 && ! insn_sets_resource_p (trial, &set, true)
2160 && ! insn_sets_resource_p (trial, &needed, true)
2161 #ifdef HAVE_cc0
2162 /* Can't separate set of cc0 from its use. */
2163 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2164 #endif
2165 && ! can_throw_internal (trial))
2167 trial = try_split (pat, trial, 1);
2168 next_trial = prev_nonnote_insn (trial);
2169 if (eligible_for_delay (insn, slots_filled, trial, flags))
2171 /* In this case, we are searching backward, so if we
2172 find insns to put on the delay list, we want
2173 to put them at the head, rather than the
2174 tail, of the list. */
2176 update_reg_dead_notes (trial, insn);
2177 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2178 trial, delay_list);
2179 update_block (trial, trial);
2180 delete_related_insns (trial);
2181 if (slots_to_fill == ++slots_filled)
2182 break;
2183 continue;
2187 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2188 mark_referenced_resources (trial, &needed, true);
2192 /* If all needed slots haven't been filled, we come here. */
2194 /* Try to optimize case of jumping around a single insn. */
2195 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2196 if (slots_filled != slots_to_fill
2197 && delay_list == 0
2198 && JUMP_P (insn)
2199 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
2201 delay_list = optimize_skip (insn);
2202 if (delay_list)
2203 slots_filled += 1;
2205 #endif
2207 /* Try to get insns from beyond the insn needing the delay slot.
2208 These insns can neither set or reference resources set in insns being
2209 skipped, cannot set resources in the insn being skipped, and, if this
2210 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2211 call might not return).
2213 There used to be code which continued past the target label if
2214 we saw all uses of the target label. This code did not work,
2215 because it failed to account for some instructions which were
2216 both annulled and marked as from the target. This can happen as a
2217 result of optimize_skip. Since this code was redundant with
2218 fill_eager_delay_slots anyways, it was just deleted. */
2220 if (slots_filled != slots_to_fill
2221 /* If this instruction could throw an exception which is
2222 caught in the same function, then it's not safe to fill
2223 the delay slot with an instruction from beyond this
2224 point. For example, consider:
2226 int i = 2;
2228 try {
2229 f();
2230 i = 3;
2231 } catch (...) {}
2233 return i;
2235 Even though `i' is a local variable, we must be sure not
2236 to put `i = 3' in the delay slot if `f' might throw an
2237 exception.
2239 Presumably, we should also check to see if we could get
2240 back to this function via `setjmp'. */
2241 && ! can_throw_internal (insn)
2242 && (!JUMP_P (insn)
2243 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
2244 && ! simplejump_p (insn)
2245 && !ANY_RETURN_P (JUMP_LABEL (insn)))))
2247 /* Invariant: If insn is a JUMP_INSN, the insn's jump
2248 label. Otherwise, zero. */
2249 rtx target = 0;
2250 int maybe_never = 0;
2251 rtx pat, trial_delay;
2253 CLEAR_RESOURCE (&needed);
2254 CLEAR_RESOURCE (&set);
2256 if (CALL_P (insn))
2258 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2259 mark_referenced_resources (insn, &needed, true);
2260 maybe_never = 1;
2262 else
2264 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2265 mark_referenced_resources (insn, &needed, true);
2266 if (JUMP_P (insn))
2267 target = JUMP_LABEL (insn);
2270 if (target == 0 || ANY_RETURN_P (target))
2271 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2272 trial = next_trial)
2274 next_trial = next_nonnote_insn (trial);
2276 /* This must be an INSN or CALL_INSN. */
2277 pat = PATTERN (trial);
2279 /* Stand-alone USE and CLOBBER are just for flow. */
2280 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2281 continue;
2283 /* If this already has filled delay slots, get the insn needing
2284 the delay slots. */
2285 if (GET_CODE (pat) == SEQUENCE)
2286 trial_delay = XVECEXP (pat, 0, 0);
2287 else
2288 trial_delay = trial;
2290 /* Stop our search when seeing a jump. */
2291 if (JUMP_P (trial_delay))
2292 break;
2294 /* See if we have a resource problem before we try to
2295 split. */
2296 if (GET_CODE (pat) != SEQUENCE
2297 && ! insn_references_resource_p (trial, &set, true)
2298 && ! insn_sets_resource_p (trial, &set, true)
2299 && ! insn_sets_resource_p (trial, &needed, true)
2300 #ifdef HAVE_cc0
2301 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2302 #endif
2303 && ! (maybe_never && may_trap_or_fault_p (pat))
2304 && (trial = try_split (pat, trial, 0))
2305 && eligible_for_delay (insn, slots_filled, trial, flags)
2306 && ! can_throw_internal(trial))
2308 next_trial = next_nonnote_insn (trial);
2309 delay_list = add_to_delay_list (trial, delay_list);
2311 #ifdef HAVE_cc0
2312 if (reg_mentioned_p (cc0_rtx, pat))
2313 link_cc0_insns (trial);
2314 #endif
2316 delete_related_insns (trial);
2317 if (slots_to_fill == ++slots_filled)
2318 break;
2319 continue;
2322 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2323 mark_referenced_resources (trial, &needed, true);
2325 /* Ensure we don't put insns between the setting of cc and the
2326 comparison by moving a setting of cc into an earlier delay
2327 slot since these insns could clobber the condition code. */
2328 set.cc = 1;
2330 /* If this is a call or jump, we might not get here. */
2331 if (CALL_P (trial_delay)
2332 || JUMP_P (trial_delay))
2333 maybe_never = 1;
2336 /* If there are slots left to fill and our search was stopped by an
2337 unconditional branch, try the insn at the branch target. We can
2338 redirect the branch if it works.
2340 Don't do this if the insn at the branch target is a branch. */
2341 if (slots_to_fill != slots_filled
2342 && trial
2343 && jump_to_label_p (trial)
2344 && simplejump_p (trial)
2345 && (target == 0 || JUMP_LABEL (trial) == target)
2346 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2347 && ! (NONJUMP_INSN_P (next_trial)
2348 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2349 && !JUMP_P (next_trial)
2350 && ! insn_references_resource_p (next_trial, &set, true)
2351 && ! insn_sets_resource_p (next_trial, &set, true)
2352 && ! insn_sets_resource_p (next_trial, &needed, true)
2353 #ifdef HAVE_cc0
2354 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2355 #endif
2356 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2357 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2358 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2359 && ! can_throw_internal (trial))
2361 /* See comment in relax_delay_slots about necessity of using
2362 next_real_insn here. */
2363 rtx new_label = next_real_insn (next_trial);
2365 if (new_label != 0)
2366 new_label = get_label_before (new_label);
2367 else
2368 new_label = find_end_label (simple_return_rtx);
2370 if (new_label)
2372 delay_list
2373 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2374 delay_list);
2375 slots_filled++;
2376 reorg_redirect_jump (trial, new_label);
2378 /* If we merged because we both jumped to the same place,
2379 redirect the original insn also. */
2380 if (target)
2381 reorg_redirect_jump (insn, new_label);
2386 /* If this is an unconditional jump, then try to get insns from the
2387 target of the jump. */
2388 if (JUMP_P (insn)
2389 && simplejump_p (insn)
2390 && slots_filled != slots_to_fill)
2391 delay_list
2392 = fill_slots_from_thread (insn, const_true_rtx,
2393 next_active_insn (JUMP_LABEL (insn)),
2394 NULL, 1, 1,
2395 own_thread_p (JUMP_LABEL (insn),
2396 JUMP_LABEL (insn), 0),
2397 slots_to_fill, &slots_filled,
2398 delay_list);
2400 if (delay_list)
2401 unfilled_slots_base[i]
2402 = emit_delay_sequence (insn, delay_list, slots_filled);
2404 if (slots_to_fill == slots_filled)
2405 unfilled_slots_base[i] = 0;
2407 note_delay_statistics (slots_filled, 0);
2410 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2411 /* See if the epilogue needs any delay slots. Try to fill them if so.
2412 The only thing we can do is scan backwards from the end of the
2413 function. If we did this in a previous pass, it is incorrect to do it
2414 again. */
2415 if (crtl->epilogue_delay_list)
2416 return;
2418 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2419 if (slots_to_fill == 0)
2420 return;
2422 slots_filled = 0;
2423 CLEAR_RESOURCE (&set);
2425 /* The frame pointer and stack pointer are needed at the beginning of
2426 the epilogue, so instructions setting them can not be put in the
2427 epilogue delay slot. However, everything else needed at function
2428 end is safe, so we don't want to use end_of_function_needs here. */
2429 CLEAR_RESOURCE (&needed);
2430 if (frame_pointer_needed)
2432 SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM);
2433 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2434 SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM);
2435 #endif
2436 if (! EXIT_IGNORE_STACK
2437 || crtl->sp_is_unchanging)
2438 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2440 else
2441 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2443 #ifdef EPILOGUE_USES
2444 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2446 if (EPILOGUE_USES (i))
2447 SET_HARD_REG_BIT (needed.regs, i);
2449 #endif
2451 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2452 trial = PREV_INSN (trial))
2454 if (NOTE_P (trial))
2455 continue;
2456 pat = PATTERN (trial);
2457 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2458 continue;
2460 if (! insn_references_resource_p (trial, &set, true)
2461 && ! insn_sets_resource_p (trial, &needed, true)
2462 && ! insn_sets_resource_p (trial, &set, true)
2463 #ifdef HAVE_cc0
2464 /* Don't want to mess with cc0 here. */
2465 && ! reg_mentioned_p (cc0_rtx, pat)
2466 #endif
2467 && ! can_throw_internal (trial))
2469 trial = try_split (pat, trial, 1);
2470 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2472 /* Here as well we are searching backward, so put the
2473 insns we find on the head of the list. */
2475 crtl->epilogue_delay_list
2476 = gen_rtx_INSN_LIST (VOIDmode, trial,
2477 crtl->epilogue_delay_list);
2478 mark_end_of_function_resources (trial, true);
2479 update_block (trial, trial);
2480 delete_related_insns (trial);
2482 /* Clear deleted bit so final.c will output the insn. */
2483 INSN_DELETED_P (trial) = 0;
2485 if (slots_to_fill == ++slots_filled)
2486 break;
2487 continue;
2491 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2492 mark_referenced_resources (trial, &needed, true);
2495 note_delay_statistics (slots_filled, 0);
2496 #endif
2499 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2500 return the ultimate label reached by any such chain of jumps.
2501 Return a suitable return rtx if the chain ultimately leads to a
2502 return instruction.
2503 If LABEL is not followed by a jump, return LABEL.
2504 If the chain loops or we can't find end, return LABEL,
2505 since that tells caller to avoid changing the insn.
2506 If the returned label is obtained by following a REG_CROSSING_JUMP
2507 jump, set *CROSSING to true, otherwise set it to false. */
2509 static rtx
2510 follow_jumps (rtx label, rtx jump, bool *crossing)
2512 rtx insn;
2513 rtx next;
2514 rtx value = label;
2515 int depth;
2517 *crossing = false;
2518 if (ANY_RETURN_P (label))
2519 return label;
2520 for (depth = 0;
2521 (depth < 10
2522 && (insn = next_active_insn (value)) != 0
2523 && JUMP_P (insn)
2524 && JUMP_LABEL (insn) != NULL_RTX
2525 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2526 || ANY_RETURN_P (PATTERN (insn)))
2527 && (next = NEXT_INSN (insn))
2528 && BARRIER_P (next));
2529 depth++)
2531 rtx this_label = JUMP_LABEL (insn);
2532 rtx tem;
2534 /* If we have found a cycle, make the insn jump to itself. */
2535 if (this_label == label)
2536 return label;
2537 if (ANY_RETURN_P (this_label))
2538 return this_label;
2539 tem = next_active_insn (this_label);
2540 if (tem
2541 && (GET_CODE (PATTERN (tem)) == ADDR_VEC
2542 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
2543 break;
2545 if (!targetm.can_follow_jump (jump, insn))
2546 break;
2547 if (!*crossing)
2548 *crossing
2549 = find_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX) != NULL_RTX;
2550 value = this_label;
2552 if (depth == 10)
2553 return label;
2554 return value;
2557 /* Try to find insns to place in delay slots.
2559 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2560 or is an unconditional branch if CONDITION is const_true_rtx.
2561 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2563 THREAD is a flow-of-control, either the insns to be executed if the
2564 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2566 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2567 to see if any potential delay slot insns set things needed there.
2569 LIKELY is nonzero if it is extremely likely that the branch will be
2570 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2571 end of a loop back up to the top.
2573 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2574 thread. I.e., it is the fallthrough code of our jump or the target of the
2575 jump when we are the only jump going there.
2577 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2578 case, we can only take insns from the head of the thread for our delay
2579 slot. We then adjust the jump to point after the insns we have taken. */
2581 static rtx
2582 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2583 rtx opposite_thread, int likely, int thread_if_true,
2584 int own_thread, int slots_to_fill,
2585 int *pslots_filled, rtx delay_list)
2587 rtx new_thread;
2588 struct resources opposite_needed, set, needed;
2589 rtx trial;
2590 int lose = 0;
2591 int must_annul = 0;
2592 int flags;
2594 /* Validate our arguments. */
2595 gcc_assert(condition != const_true_rtx || thread_if_true);
2596 gcc_assert(own_thread || thread_if_true);
2598 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2600 /* If our thread is the end of subroutine, we can't get any delay
2601 insns from that. */
2602 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2603 return delay_list;
2605 /* If this is an unconditional branch, nothing is needed at the
2606 opposite thread. Otherwise, compute what is needed there. */
2607 if (condition == const_true_rtx)
2608 CLEAR_RESOURCE (&opposite_needed);
2609 else
2610 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2612 /* If the insn at THREAD can be split, do it here to avoid having to
2613 update THREAD and NEW_THREAD if it is done in the loop below. Also
2614 initialize NEW_THREAD. */
2616 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2618 /* Scan insns at THREAD. We are looking for an insn that can be removed
2619 from THREAD (it neither sets nor references resources that were set
2620 ahead of it and it doesn't set anything needs by the insns ahead of
2621 it) and that either can be placed in an annulling insn or aren't
2622 needed at OPPOSITE_THREAD. */
2624 CLEAR_RESOURCE (&needed);
2625 CLEAR_RESOURCE (&set);
2627 /* If we do not own this thread, we must stop as soon as we find
2628 something that we can't put in a delay slot, since all we can do
2629 is branch into THREAD at a later point. Therefore, labels stop
2630 the search if this is not the `true' thread. */
2632 for (trial = thread;
2633 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2634 trial = next_nonnote_insn (trial))
2636 rtx pat, old_trial;
2638 /* If we have passed a label, we no longer own this thread. */
2639 if (LABEL_P (trial))
2641 own_thread = 0;
2642 continue;
2645 pat = PATTERN (trial);
2646 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2647 continue;
2649 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2650 don't separate or copy insns that set and use CC0. */
2651 if (! insn_references_resource_p (trial, &set, true)
2652 && ! insn_sets_resource_p (trial, &set, true)
2653 && ! insn_sets_resource_p (trial, &needed, true)
2654 #ifdef HAVE_cc0
2655 && ! (reg_mentioned_p (cc0_rtx, pat)
2656 && (! own_thread || ! sets_cc0_p (pat)))
2657 #endif
2658 && ! can_throw_internal (trial))
2660 rtx prior_insn;
2662 /* If TRIAL is redundant with some insn before INSN, we don't
2663 actually need to add it to the delay list; we can merely pretend
2664 we did. */
2665 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2667 fix_reg_dead_note (prior_insn, insn);
2668 if (own_thread)
2670 update_block (trial, thread);
2671 if (trial == thread)
2673 thread = next_active_insn (thread);
2674 if (new_thread == trial)
2675 new_thread = thread;
2678 delete_related_insns (trial);
2680 else
2682 update_reg_unused_notes (prior_insn, trial);
2683 new_thread = next_active_insn (trial);
2686 continue;
2689 /* There are two ways we can win: If TRIAL doesn't set anything
2690 needed at the opposite thread and can't trap, or if it can
2691 go into an annulled delay slot. */
2692 if (!must_annul
2693 && (condition == const_true_rtx
2694 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2695 && ! may_trap_or_fault_p (pat)
2696 && ! RTX_FRAME_RELATED_P (trial))))
2698 old_trial = trial;
2699 trial = try_split (pat, trial, 0);
2700 if (new_thread == old_trial)
2701 new_thread = trial;
2702 if (thread == old_trial)
2703 thread = trial;
2704 pat = PATTERN (trial);
2705 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2706 goto winner;
2708 else if (0
2709 #ifdef ANNUL_IFTRUE_SLOTS
2710 || ! thread_if_true
2711 #endif
2712 #ifdef ANNUL_IFFALSE_SLOTS
2713 || thread_if_true
2714 #endif
2717 old_trial = trial;
2718 trial = try_split (pat, trial, 0);
2719 if (new_thread == old_trial)
2720 new_thread = trial;
2721 if (thread == old_trial)
2722 thread = trial;
2723 pat = PATTERN (trial);
2724 if ((must_annul || delay_list == NULL) && (thread_if_true
2725 ? check_annul_list_true_false (0, delay_list)
2726 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2727 : check_annul_list_true_false (1, delay_list)
2728 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2730 rtx temp;
2732 must_annul = 1;
2733 winner:
2735 #ifdef HAVE_cc0
2736 if (reg_mentioned_p (cc0_rtx, pat))
2737 link_cc0_insns (trial);
2738 #endif
2740 /* If we own this thread, delete the insn. If this is the
2741 destination of a branch, show that a basic block status
2742 may have been updated. In any case, mark the new
2743 starting point of this thread. */
2744 if (own_thread)
2746 rtx note;
2748 update_block (trial, thread);
2749 if (trial == thread)
2751 thread = next_active_insn (thread);
2752 if (new_thread == trial)
2753 new_thread = thread;
2756 /* We are moving this insn, not deleting it. We must
2757 temporarily increment the use count on any referenced
2758 label lest it be deleted by delete_related_insns. */
2759 for (note = REG_NOTES (trial);
2760 note != NULL_RTX;
2761 note = XEXP (note, 1))
2762 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2763 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2765 /* REG_LABEL_OPERAND could be
2766 NOTE_INSN_DELETED_LABEL too. */
2767 if (LABEL_P (XEXP (note, 0)))
2768 LABEL_NUSES (XEXP (note, 0))++;
2769 else
2770 gcc_assert (REG_NOTE_KIND (note)
2771 == REG_LABEL_OPERAND);
2773 if (jump_to_label_p (trial))
2774 LABEL_NUSES (JUMP_LABEL (trial))++;
2776 delete_related_insns (trial);
2778 for (note = REG_NOTES (trial);
2779 note != NULL_RTX;
2780 note = XEXP (note, 1))
2781 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2782 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2784 /* REG_LABEL_OPERAND could be
2785 NOTE_INSN_DELETED_LABEL too. */
2786 if (LABEL_P (XEXP (note, 0)))
2787 LABEL_NUSES (XEXP (note, 0))--;
2788 else
2789 gcc_assert (REG_NOTE_KIND (note)
2790 == REG_LABEL_OPERAND);
2792 if (jump_to_label_p (trial))
2793 LABEL_NUSES (JUMP_LABEL (trial))--;
2795 else
2796 new_thread = next_active_insn (trial);
2798 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2799 if (thread_if_true)
2800 INSN_FROM_TARGET_P (temp) = 1;
2802 delay_list = add_to_delay_list (temp, delay_list);
2804 if (slots_to_fill == ++(*pslots_filled))
2806 /* Even though we have filled all the slots, we
2807 may be branching to a location that has a
2808 redundant insn. Skip any if so. */
2809 while (new_thread && ! own_thread
2810 && ! insn_sets_resource_p (new_thread, &set, true)
2811 && ! insn_sets_resource_p (new_thread, &needed,
2812 true)
2813 && ! insn_references_resource_p (new_thread,
2814 &set, true)
2815 && (prior_insn
2816 = redundant_insn (new_thread, insn,
2817 delay_list)))
2819 /* We know we do not own the thread, so no need
2820 to call update_block and delete_insn. */
2821 fix_reg_dead_note (prior_insn, insn);
2822 update_reg_unused_notes (prior_insn, new_thread);
2823 new_thread = next_active_insn (new_thread);
2825 break;
2828 continue;
2833 /* This insn can't go into a delay slot. */
2834 lose = 1;
2835 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2836 mark_referenced_resources (trial, &needed, true);
2838 /* Ensure we don't put insns between the setting of cc and the comparison
2839 by moving a setting of cc into an earlier delay slot since these insns
2840 could clobber the condition code. */
2841 set.cc = 1;
2843 /* If this insn is a register-register copy and the next insn has
2844 a use of our destination, change it to use our source. That way,
2845 it will become a candidate for our delay slot the next time
2846 through this loop. This case occurs commonly in loops that
2847 scan a list.
2849 We could check for more complex cases than those tested below,
2850 but it doesn't seem worth it. It might also be a good idea to try
2851 to swap the two insns. That might do better.
2853 We can't do this if the next insn modifies our destination, because
2854 that would make the replacement into the insn invalid. We also can't
2855 do this if it modifies our source, because it might be an earlyclobber
2856 operand. This latter test also prevents updating the contents of
2857 a PRE_INC. We also can't do this if there's overlap of source and
2858 destination. Overlap may happen for larger-than-register-size modes. */
2860 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2861 && REG_P (SET_SRC (pat))
2862 && REG_P (SET_DEST (pat))
2863 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2865 rtx next = next_nonnote_insn (trial);
2867 if (next && NONJUMP_INSN_P (next)
2868 && GET_CODE (PATTERN (next)) != USE
2869 && ! reg_set_p (SET_DEST (pat), next)
2870 && ! reg_set_p (SET_SRC (pat), next)
2871 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2872 && ! modified_in_p (SET_DEST (pat), next))
2873 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2877 /* If we stopped on a branch insn that has delay slots, see if we can
2878 steal some of the insns in those slots. */
2879 if (trial && NONJUMP_INSN_P (trial)
2880 && GET_CODE (PATTERN (trial)) == SEQUENCE
2881 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2883 /* If this is the `true' thread, we will want to follow the jump,
2884 so we can only do this if we have taken everything up to here. */
2885 if (thread_if_true && trial == new_thread)
2887 delay_list
2888 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2889 delay_list, &set, &needed,
2890 &opposite_needed, slots_to_fill,
2891 pslots_filled, &must_annul,
2892 &new_thread);
2893 /* If we owned the thread and are told that it branched
2894 elsewhere, make sure we own the thread at the new location. */
2895 if (own_thread && trial != new_thread)
2896 own_thread = own_thread_p (new_thread, new_thread, 0);
2898 else if (! thread_if_true)
2899 delay_list
2900 = steal_delay_list_from_fallthrough (insn, condition,
2901 PATTERN (trial),
2902 delay_list, &set, &needed,
2903 &opposite_needed, slots_to_fill,
2904 pslots_filled, &must_annul);
2907 /* If we haven't found anything for this delay slot and it is very
2908 likely that the branch will be taken, see if the insn at our target
2909 increments or decrements a register with an increment that does not
2910 depend on the destination register. If so, try to place the opposite
2911 arithmetic insn after the jump insn and put the arithmetic insn in the
2912 delay slot. If we can't do this, return. */
2913 if (delay_list == 0 && likely
2914 && new_thread && !ANY_RETURN_P (new_thread)
2915 && NONJUMP_INSN_P (new_thread)
2916 && !RTX_FRAME_RELATED_P (new_thread)
2917 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2918 && asm_noperands (PATTERN (new_thread)) < 0)
2920 rtx pat = PATTERN (new_thread);
2921 rtx dest;
2922 rtx src;
2924 trial = new_thread;
2925 pat = PATTERN (trial);
2927 if (!NONJUMP_INSN_P (trial)
2928 || GET_CODE (pat) != SET
2929 || ! eligible_for_delay (insn, 0, trial, flags)
2930 || can_throw_internal (trial))
2931 return 0;
2933 dest = SET_DEST (pat), src = SET_SRC (pat);
2934 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2935 && rtx_equal_p (XEXP (src, 0), dest)
2936 && (!FLOAT_MODE_P (GET_MODE (src))
2937 || flag_unsafe_math_optimizations)
2938 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2939 && ! side_effects_p (pat))
2941 rtx other = XEXP (src, 1);
2942 rtx new_arith;
2943 rtx ninsn;
2945 /* If this is a constant adjustment, use the same code with
2946 the negated constant. Otherwise, reverse the sense of the
2947 arithmetic. */
2948 if (CONST_INT_P (other))
2949 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2950 negate_rtx (GET_MODE (src), other));
2951 else
2952 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2953 GET_MODE (src), dest, other);
2955 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2956 insn);
2958 if (recog_memoized (ninsn) < 0
2959 || (extract_insn (ninsn), ! constrain_operands (1)))
2961 delete_related_insns (ninsn);
2962 return 0;
2965 if (own_thread)
2967 update_block (trial, thread);
2968 if (trial == thread)
2970 thread = next_active_insn (thread);
2971 if (new_thread == trial)
2972 new_thread = thread;
2974 delete_related_insns (trial);
2976 else
2977 new_thread = next_active_insn (trial);
2979 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2980 if (thread_if_true)
2981 INSN_FROM_TARGET_P (ninsn) = 1;
2983 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2984 (*pslots_filled)++;
2988 if (delay_list && must_annul)
2989 INSN_ANNULLED_BRANCH_P (insn) = 1;
2991 /* If we are to branch into the middle of this thread, find an appropriate
2992 label or make a new one if none, and redirect INSN to it. If we hit the
2993 end of the function, use the end-of-function label. */
2994 if (new_thread != thread)
2996 rtx label;
2997 bool crossing = false;
2999 gcc_assert (thread_if_true);
3001 if (new_thread && simplejump_or_return_p (new_thread)
3002 && redirect_with_delay_list_safe_p (insn,
3003 JUMP_LABEL (new_thread),
3004 delay_list))
3005 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
3007 if (ANY_RETURN_P (new_thread))
3008 label = find_end_label (new_thread);
3009 else if (LABEL_P (new_thread))
3010 label = new_thread;
3011 else
3012 label = get_label_before (new_thread);
3014 if (label)
3016 reorg_redirect_jump (insn, label);
3017 if (crossing)
3018 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3022 return delay_list;
3025 /* Make another attempt to find insns to place in delay slots.
3027 We previously looked for insns located in front of the delay insn
3028 and, for non-jump delay insns, located behind the delay insn.
3030 Here only try to schedule jump insns and try to move insns from either
3031 the target or the following insns into the delay slot. If annulling is
3032 supported, we will be likely to do this. Otherwise, we can do this only
3033 if safe. */
3035 static void
3036 fill_eager_delay_slots (void)
3038 rtx insn;
3039 int i;
3040 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
3042 for (i = 0; i < num_unfilled_slots; i++)
3044 rtx condition;
3045 rtx target_label, insn_at_target, fallthrough_insn;
3046 rtx delay_list = 0;
3047 int own_target;
3048 int own_fallthrough;
3049 int prediction, slots_to_fill, slots_filled;
3051 insn = unfilled_slots_base[i];
3052 if (insn == 0
3053 || INSN_DELETED_P (insn)
3054 || !JUMP_P (insn)
3055 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
3056 continue;
3058 slots_to_fill = num_delay_slots (insn);
3059 /* Some machine description have defined instructions to have
3060 delay slots only in certain circumstances which may depend on
3061 nearby insns (which change due to reorg's actions).
3063 For example, the PA port normally has delay slots for unconditional
3064 jumps.
3066 However, the PA port claims such jumps do not have a delay slot
3067 if they are immediate successors of certain CALL_INSNs. This
3068 allows the port to favor filling the delay slot of the call with
3069 the unconditional jump. */
3070 if (slots_to_fill == 0)
3071 continue;
3073 slots_filled = 0;
3074 target_label = JUMP_LABEL (insn);
3075 condition = get_branch_condition (insn, target_label);
3077 if (condition == 0)
3078 continue;
3080 /* Get the next active fallthrough and target insns and see if we own
3081 them. Then see whether the branch is likely true. We don't need
3082 to do a lot of this for unconditional branches. */
3084 insn_at_target = first_active_target_insn (target_label);
3085 own_target = own_thread_p (target_label, target_label, 0);
3087 if (condition == const_true_rtx)
3089 own_fallthrough = 0;
3090 fallthrough_insn = 0;
3091 prediction = 2;
3093 else
3095 fallthrough_insn = next_active_insn (insn);
3096 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
3097 prediction = mostly_true_jump (insn, condition);
3100 /* If this insn is expected to branch, first try to get insns from our
3101 target, then our fallthrough insns. If it is not expected to branch,
3102 try the other order. */
3104 if (prediction > 0)
3106 delay_list
3107 = fill_slots_from_thread (insn, condition, insn_at_target,
3108 fallthrough_insn, prediction == 2, 1,
3109 own_target,
3110 slots_to_fill, &slots_filled, delay_list);
3112 if (delay_list == 0 && own_fallthrough)
3114 /* Even though we didn't find anything for delay slots,
3115 we might have found a redundant insn which we deleted
3116 from the thread that was filled. So we have to recompute
3117 the next insn at the target. */
3118 target_label = JUMP_LABEL (insn);
3119 insn_at_target = first_active_target_insn (target_label);
3121 delay_list
3122 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3123 insn_at_target, 0, 0,
3124 own_fallthrough,
3125 slots_to_fill, &slots_filled,
3126 delay_list);
3129 else
3131 if (own_fallthrough)
3132 delay_list
3133 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3134 insn_at_target, 0, 0,
3135 own_fallthrough,
3136 slots_to_fill, &slots_filled,
3137 delay_list);
3139 if (delay_list == 0)
3140 delay_list
3141 = fill_slots_from_thread (insn, condition, insn_at_target,
3142 next_active_insn (insn), 0, 1,
3143 own_target,
3144 slots_to_fill, &slots_filled,
3145 delay_list);
3148 if (delay_list)
3149 unfilled_slots_base[i]
3150 = emit_delay_sequence (insn, delay_list, slots_filled);
3152 if (slots_to_fill == slots_filled)
3153 unfilled_slots_base[i] = 0;
3155 note_delay_statistics (slots_filled, 1);
3159 static void delete_computation (rtx insn);
3161 /* Recursively delete prior insns that compute the value (used only by INSN
3162 which the caller is deleting) stored in the register mentioned by NOTE
3163 which is a REG_DEAD note associated with INSN. */
3165 static void
3166 delete_prior_computation (rtx note, rtx insn)
3168 rtx our_prev;
3169 rtx reg = XEXP (note, 0);
3171 for (our_prev = prev_nonnote_insn (insn);
3172 our_prev && (NONJUMP_INSN_P (our_prev)
3173 || CALL_P (our_prev));
3174 our_prev = prev_nonnote_insn (our_prev))
3176 rtx pat = PATTERN (our_prev);
3178 /* If we reach a CALL which is not calling a const function
3179 or the callee pops the arguments, then give up. */
3180 if (CALL_P (our_prev)
3181 && (! RTL_CONST_CALL_P (our_prev)
3182 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3183 break;
3185 /* If we reach a SEQUENCE, it is too complex to try to
3186 do anything with it, so give up. We can be run during
3187 and after reorg, so SEQUENCE rtl can legitimately show
3188 up here. */
3189 if (GET_CODE (pat) == SEQUENCE)
3190 break;
3192 if (GET_CODE (pat) == USE
3193 && NONJUMP_INSN_P (XEXP (pat, 0)))
3194 /* reorg creates USEs that look like this. We leave them
3195 alone because reorg needs them for its own purposes. */
3196 break;
3198 if (reg_set_p (reg, pat))
3200 if (side_effects_p (pat) && !CALL_P (our_prev))
3201 break;
3203 if (GET_CODE (pat) == PARALLEL)
3205 /* If we find a SET of something else, we can't
3206 delete the insn. */
3208 int i;
3210 for (i = 0; i < XVECLEN (pat, 0); i++)
3212 rtx part = XVECEXP (pat, 0, i);
3214 if (GET_CODE (part) == SET
3215 && SET_DEST (part) != reg)
3216 break;
3219 if (i == XVECLEN (pat, 0))
3220 delete_computation (our_prev);
3222 else if (GET_CODE (pat) == SET
3223 && REG_P (SET_DEST (pat)))
3225 int dest_regno = REGNO (SET_DEST (pat));
3226 int dest_endregno = END_REGNO (SET_DEST (pat));
3227 int regno = REGNO (reg);
3228 int endregno = END_REGNO (reg);
3230 if (dest_regno >= regno
3231 && dest_endregno <= endregno)
3232 delete_computation (our_prev);
3234 /* We may have a multi-word hard register and some, but not
3235 all, of the words of the register are needed in subsequent
3236 insns. Write REG_UNUSED notes for those parts that were not
3237 needed. */
3238 else if (dest_regno <= regno
3239 && dest_endregno >= endregno)
3241 int i;
3243 add_reg_note (our_prev, REG_UNUSED, reg);
3245 for (i = dest_regno; i < dest_endregno; i++)
3246 if (! find_regno_note (our_prev, REG_UNUSED, i))
3247 break;
3249 if (i == dest_endregno)
3250 delete_computation (our_prev);
3254 break;
3257 /* If PAT references the register that dies here, it is an
3258 additional use. Hence any prior SET isn't dead. However, this
3259 insn becomes the new place for the REG_DEAD note. */
3260 if (reg_overlap_mentioned_p (reg, pat))
3262 XEXP (note, 1) = REG_NOTES (our_prev);
3263 REG_NOTES (our_prev) = note;
3264 break;
3269 /* Delete INSN and recursively delete insns that compute values used only
3270 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3272 Look at all our REG_DEAD notes. If a previous insn does nothing other
3273 than set a register that dies in this insn, we can delete that insn
3274 as well.
3276 On machines with CC0, if CC0 is used in this insn, we may be able to
3277 delete the insn that set it. */
3279 static void
3280 delete_computation (rtx insn)
3282 rtx note, next;
3284 #ifdef HAVE_cc0
3285 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3287 rtx prev = prev_nonnote_insn (insn);
3288 /* We assume that at this stage
3289 CC's are always set explicitly
3290 and always immediately before the jump that
3291 will use them. So if the previous insn
3292 exists to set the CC's, delete it
3293 (unless it performs auto-increments, etc.). */
3294 if (prev && NONJUMP_INSN_P (prev)
3295 && sets_cc0_p (PATTERN (prev)))
3297 if (sets_cc0_p (PATTERN (prev)) > 0
3298 && ! side_effects_p (PATTERN (prev)))
3299 delete_computation (prev);
3300 else
3301 /* Otherwise, show that cc0 won't be used. */
3302 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3305 #endif
3307 for (note = REG_NOTES (insn); note; note = next)
3309 next = XEXP (note, 1);
3311 if (REG_NOTE_KIND (note) != REG_DEAD
3312 /* Verify that the REG_NOTE is legitimate. */
3313 || !REG_P (XEXP (note, 0)))
3314 continue;
3316 delete_prior_computation (note, insn);
3319 delete_related_insns (insn);
3322 /* If all INSN does is set the pc, delete it,
3323 and delete the insn that set the condition codes for it
3324 if that's what the previous thing was. */
3326 static void
3327 delete_jump (rtx insn)
3329 rtx set = single_set (insn);
3331 if (set && GET_CODE (SET_DEST (set)) == PC)
3332 delete_computation (insn);
3335 static rtx
3336 label_before_next_insn (rtx x, rtx scan_limit)
3338 rtx insn = next_active_insn (x);
3339 while (insn)
3341 insn = PREV_INSN (insn);
3342 if (insn == scan_limit || insn == NULL_RTX)
3343 return NULL_RTX;
3344 if (LABEL_P (insn))
3345 break;
3347 return insn;
3351 /* Once we have tried two ways to fill a delay slot, make a pass over the
3352 code to try to improve the results and to do such things as more jump
3353 threading. */
3355 static void
3356 relax_delay_slots (rtx first)
3358 rtx insn, next, pat;
3359 rtx trial, delay_insn, target_label;
3361 /* Look at every JUMP_INSN and see if we can improve it. */
3362 for (insn = first; insn; insn = next)
3364 rtx other;
3365 bool crossing;
3367 next = next_active_insn (insn);
3369 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3370 the next insn, or jumps to a label that is not the last of a
3371 group of consecutive labels. */
3372 if (JUMP_P (insn)
3373 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3374 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3376 target_label
3377 = skip_consecutive_labels (follow_jumps (target_label, insn,
3378 &crossing));
3379 if (ANY_RETURN_P (target_label))
3380 target_label = find_end_label (target_label);
3382 if (target_label && next_active_insn (target_label) == next
3383 && ! condjump_in_parallel_p (insn))
3385 delete_jump (insn);
3386 continue;
3389 if (target_label && target_label != JUMP_LABEL (insn))
3391 reorg_redirect_jump (insn, target_label);
3392 if (crossing)
3393 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3396 /* See if this jump conditionally branches around an unconditional
3397 jump. If so, invert this jump and point it to the target of the
3398 second jump. */
3399 if (next && simplejump_or_return_p (next)
3400 && any_condjump_p (insn)
3401 && target_label
3402 && next_active_insn (target_label) == next_active_insn (next)
3403 && no_labels_between_p (insn, next))
3405 rtx label = JUMP_LABEL (next);
3407 /* Be careful how we do this to avoid deleting code or
3408 labels that are momentarily dead. See similar optimization
3409 in jump.c.
3411 We also need to ensure we properly handle the case when
3412 invert_jump fails. */
3414 ++LABEL_NUSES (target_label);
3415 if (!ANY_RETURN_P (label))
3416 ++LABEL_NUSES (label);
3418 if (invert_jump (insn, label, 1))
3420 delete_related_insns (next);
3421 next = insn;
3424 if (!ANY_RETURN_P (label))
3425 --LABEL_NUSES (label);
3427 if (--LABEL_NUSES (target_label) == 0)
3428 delete_related_insns (target_label);
3430 continue;
3434 /* If this is an unconditional jump and the previous insn is a
3435 conditional jump, try reversing the condition of the previous
3436 insn and swapping our targets. The next pass might be able to
3437 fill the slots.
3439 Don't do this if we expect the conditional branch to be true, because
3440 we would then be making the more common case longer. */
3442 if (simplejump_or_return_p (insn)
3443 && (other = prev_active_insn (insn)) != 0
3444 && any_condjump_p (other)
3445 && no_labels_between_p (other, insn)
3446 && 0 > mostly_true_jump (other,
3447 get_branch_condition (other,
3448 JUMP_LABEL (other))))
3450 rtx other_target = JUMP_LABEL (other);
3451 target_label = JUMP_LABEL (insn);
3453 if (invert_jump (other, target_label, 0))
3454 reorg_redirect_jump (insn, other_target);
3457 /* Now look only at cases where we have a filled delay slot. */
3458 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3459 continue;
3461 pat = PATTERN (insn);
3462 delay_insn = XVECEXP (pat, 0, 0);
3464 /* See if the first insn in the delay slot is redundant with some
3465 previous insn. Remove it from the delay slot if so; then set up
3466 to reprocess this insn. */
3467 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3469 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3470 next = prev_active_insn (next);
3471 continue;
3474 /* See if we have a RETURN insn with a filled delay slot followed
3475 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3476 the first RETURN (but not its delay insn). This gives the same
3477 effect in fewer instructions.
3479 Only do so if optimizing for size since this results in slower, but
3480 smaller code. */
3481 if (optimize_function_for_size_p (cfun)
3482 && ANY_RETURN_P (PATTERN (delay_insn))
3483 && next
3484 && JUMP_P (next)
3485 && PATTERN (next) == PATTERN (delay_insn))
3487 rtx after;
3488 int i;
3490 /* Delete the RETURN and just execute the delay list insns.
3492 We do this by deleting the INSN containing the SEQUENCE, then
3493 re-emitting the insns separately, and then deleting the RETURN.
3494 This allows the count of the jump target to be properly
3495 decremented.
3497 Note that we need to change the INSN_UID of the re-emitted insns
3498 since it is used to hash the insns for mark_target_live_regs and
3499 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3501 Clear the from target bit, since these insns are no longer
3502 in delay slots. */
3503 for (i = 0; i < XVECLEN (pat, 0); i++)
3504 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3506 trial = PREV_INSN (insn);
3507 delete_related_insns (insn);
3508 gcc_assert (GET_CODE (pat) == SEQUENCE);
3509 add_insn_after (delay_insn, trial, NULL);
3510 after = delay_insn;
3511 for (i = 1; i < XVECLEN (pat, 0); i++)
3512 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3513 delete_scheduled_jump (delay_insn);
3514 continue;
3517 /* Now look only at the cases where we have a filled JUMP_INSN. */
3518 if (!JUMP_P (delay_insn)
3519 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3520 continue;
3522 target_label = JUMP_LABEL (delay_insn);
3523 if (target_label && ANY_RETURN_P (target_label))
3524 continue;
3526 /* If this jump goes to another unconditional jump, thread it, but
3527 don't convert a jump into a RETURN here. */
3528 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3529 &crossing));
3530 if (ANY_RETURN_P (trial))
3531 trial = find_end_label (trial);
3533 if (trial && trial != target_label
3534 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3536 reorg_redirect_jump (delay_insn, trial);
3537 target_label = trial;
3538 if (crossing)
3539 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3542 /* If the first insn at TARGET_LABEL is redundant with a previous
3543 insn, redirect the jump to the following insn and process again.
3544 We use next_real_insn instead of next_active_insn so we
3545 don't skip USE-markers, or we'll end up with incorrect
3546 liveness info. */
3547 trial = next_real_insn (target_label);
3548 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3549 && redundant_insn (trial, insn, 0)
3550 && ! can_throw_internal (trial))
3552 /* Figure out where to emit the special USE insn so we don't
3553 later incorrectly compute register live/death info. */
3554 rtx tmp = next_active_insn (trial);
3555 if (tmp == 0)
3556 tmp = find_end_label (simple_return_rtx);
3558 if (tmp)
3560 /* Insert the special USE insn and update dataflow info. */
3561 update_block (trial, tmp);
3563 /* Now emit a label before the special USE insn, and
3564 redirect our jump to the new label. */
3565 target_label = get_label_before (PREV_INSN (tmp));
3566 reorg_redirect_jump (delay_insn, target_label);
3567 next = insn;
3568 continue;
3572 /* Similarly, if it is an unconditional jump with one insn in its
3573 delay list and that insn is redundant, thread the jump. */
3574 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3575 && XVECLEN (PATTERN (trial), 0) == 2
3576 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3577 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3578 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3580 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3581 if (ANY_RETURN_P (target_label))
3582 target_label = find_end_label (target_label);
3584 if (target_label
3585 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3586 insn))
3588 reorg_redirect_jump (delay_insn, target_label);
3589 next = insn;
3590 continue;
3594 /* See if we have a simple (conditional) jump that is useless. */
3595 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3596 && ! condjump_in_parallel_p (delay_insn)
3597 && prev_active_insn (target_label) == insn
3598 && ! BARRIER_P (prev_nonnote_insn (target_label))
3599 #ifdef HAVE_cc0
3600 /* If the last insn in the delay slot sets CC0 for some insn,
3601 various code assumes that it is in a delay slot. We could
3602 put it back where it belonged and delete the register notes,
3603 but it doesn't seem worthwhile in this uncommon case. */
3604 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3605 REG_CC_USER, NULL_RTX)
3606 #endif
3609 rtx after;
3610 int i;
3612 /* All this insn does is execute its delay list and jump to the
3613 following insn. So delete the jump and just execute the delay
3614 list insns.
3616 We do this by deleting the INSN containing the SEQUENCE, then
3617 re-emitting the insns separately, and then deleting the jump.
3618 This allows the count of the jump target to be properly
3619 decremented.
3621 Note that we need to change the INSN_UID of the re-emitted insns
3622 since it is used to hash the insns for mark_target_live_regs and
3623 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3625 Clear the from target bit, since these insns are no longer
3626 in delay slots. */
3627 for (i = 0; i < XVECLEN (pat, 0); i++)
3628 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3630 trial = PREV_INSN (insn);
3631 delete_related_insns (insn);
3632 gcc_assert (GET_CODE (pat) == SEQUENCE);
3633 add_insn_after (delay_insn, trial, NULL);
3634 after = delay_insn;
3635 for (i = 1; i < XVECLEN (pat, 0); i++)
3636 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3637 delete_scheduled_jump (delay_insn);
3638 continue;
3641 /* See if this is an unconditional jump around a single insn which is
3642 identical to the one in its delay slot. In this case, we can just
3643 delete the branch and the insn in its delay slot. */
3644 if (next && NONJUMP_INSN_P (next)
3645 && label_before_next_insn (next, insn) == target_label
3646 && simplejump_p (insn)
3647 && XVECLEN (pat, 0) == 2
3648 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3650 delete_related_insns (insn);
3651 continue;
3654 /* See if this jump (with its delay slots) conditionally branches
3655 around an unconditional jump (without delay slots). If so, invert
3656 this jump and point it to the target of the second jump. We cannot
3657 do this for annulled jumps, though. Again, don't convert a jump to
3658 a RETURN here. */
3659 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3660 && any_condjump_p (delay_insn)
3661 && next && simplejump_or_return_p (next)
3662 && next_active_insn (target_label) == next_active_insn (next)
3663 && no_labels_between_p (insn, next))
3665 rtx label = JUMP_LABEL (next);
3666 rtx old_label = JUMP_LABEL (delay_insn);
3668 if (ANY_RETURN_P (label))
3669 label = find_end_label (label);
3671 /* find_end_label can generate a new label. Check this first. */
3672 if (label
3673 && no_labels_between_p (insn, next)
3674 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3676 /* Be careful how we do this to avoid deleting code or labels
3677 that are momentarily dead. See similar optimization in
3678 jump.c */
3679 if (old_label)
3680 ++LABEL_NUSES (old_label);
3682 if (invert_jump (delay_insn, label, 1))
3684 int i;
3686 /* Must update the INSN_FROM_TARGET_P bits now that
3687 the branch is reversed, so that mark_target_live_regs
3688 will handle the delay slot insn correctly. */
3689 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3691 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3692 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3695 delete_related_insns (next);
3696 next = insn;
3699 if (old_label && --LABEL_NUSES (old_label) == 0)
3700 delete_related_insns (old_label);
3701 continue;
3705 /* If we own the thread opposite the way this insn branches, see if we
3706 can merge its delay slots with following insns. */
3707 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3708 && own_thread_p (NEXT_INSN (insn), 0, 1))
3709 try_merge_delay_insns (insn, next);
3710 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3711 && own_thread_p (target_label, target_label, 0))
3712 try_merge_delay_insns (insn, next_active_insn (target_label));
3714 /* If we get here, we haven't deleted INSN. But we may have deleted
3715 NEXT, so recompute it. */
3716 next = next_active_insn (insn);
3721 /* Look for filled jumps to the end of function label. We can try to convert
3722 them into RETURN insns if the insns in the delay slot are valid for the
3723 RETURN as well. */
3725 static void
3726 make_return_insns (rtx first)
3728 rtx insn, jump_insn, pat;
3729 rtx real_return_label = function_return_label;
3730 rtx real_simple_return_label = function_simple_return_label;
3731 int slots, i;
3733 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3734 /* If a previous pass filled delay slots in the epilogue, things get a
3735 bit more complicated, as those filler insns would generally (without
3736 data flow analysis) have to be executed after any existing branch
3737 delay slot filler insns. It is also unknown whether such a
3738 transformation would actually be profitable. Note that the existing
3739 code only cares for branches with (some) filled delay slots. */
3740 if (crtl->epilogue_delay_list != NULL)
3741 return;
3742 #endif
3744 /* See if there is a RETURN insn in the function other than the one we
3745 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3746 into a RETURN to jump to it. */
3747 for (insn = first; insn; insn = NEXT_INSN (insn))
3748 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3750 rtx t = get_label_before (insn);
3751 if (PATTERN (insn) == ret_rtx)
3752 real_return_label = t;
3753 else
3754 real_simple_return_label = t;
3755 break;
3758 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3759 was equal to END_OF_FUNCTION_LABEL. */
3760 if (real_return_label)
3761 LABEL_NUSES (real_return_label)++;
3762 if (real_simple_return_label)
3763 LABEL_NUSES (real_simple_return_label)++;
3765 /* Clear the list of insns to fill so we can use it. */
3766 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3768 for (insn = first; insn; insn = NEXT_INSN (insn))
3770 int flags;
3771 rtx kind, real_label;
3773 /* Only look at filled JUMP_INSNs that go to the end of function
3774 label. */
3775 if (!NONJUMP_INSN_P (insn)
3776 || GET_CODE (PATTERN (insn)) != SEQUENCE
3777 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3778 continue;
3780 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3782 kind = ret_rtx;
3783 real_label = real_return_label;
3785 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3786 == function_simple_return_label)
3788 kind = simple_return_rtx;
3789 real_label = real_simple_return_label;
3791 else
3792 continue;
3794 pat = PATTERN (insn);
3795 jump_insn = XVECEXP (pat, 0, 0);
3797 /* If we can't make the jump into a RETURN, try to redirect it to the best
3798 RETURN and go on to the next insn. */
3799 if (!reorg_redirect_jump (jump_insn, kind))
3801 /* Make sure redirecting the jump will not invalidate the delay
3802 slot insns. */
3803 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3804 reorg_redirect_jump (jump_insn, real_label);
3805 continue;
3808 /* See if this RETURN can accept the insns current in its delay slot.
3809 It can if it has more or an equal number of slots and the contents
3810 of each is valid. */
3812 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3813 slots = num_delay_slots (jump_insn);
3814 if (slots >= XVECLEN (pat, 0) - 1)
3816 for (i = 1; i < XVECLEN (pat, 0); i++)
3817 if (! (
3818 #ifdef ANNUL_IFFALSE_SLOTS
3819 (INSN_ANNULLED_BRANCH_P (jump_insn)
3820 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3821 ? eligible_for_annul_false (jump_insn, i - 1,
3822 XVECEXP (pat, 0, i), flags) :
3823 #endif
3824 #ifdef ANNUL_IFTRUE_SLOTS
3825 (INSN_ANNULLED_BRANCH_P (jump_insn)
3826 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3827 ? eligible_for_annul_true (jump_insn, i - 1,
3828 XVECEXP (pat, 0, i), flags) :
3829 #endif
3830 eligible_for_delay (jump_insn, i - 1,
3831 XVECEXP (pat, 0, i), flags)))
3832 break;
3834 else
3835 i = 0;
3837 if (i == XVECLEN (pat, 0))
3838 continue;
3840 /* We have to do something with this insn. If it is an unconditional
3841 RETURN, delete the SEQUENCE and output the individual insns,
3842 followed by the RETURN. Then set things up so we try to find
3843 insns for its delay slots, if it needs some. */
3844 if (ANY_RETURN_P (PATTERN (jump_insn)))
3846 rtx prev = PREV_INSN (insn);
3848 delete_related_insns (insn);
3849 for (i = 1; i < XVECLEN (pat, 0); i++)
3850 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3852 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3853 emit_barrier_after (insn);
3855 if (slots)
3856 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3858 else
3859 /* It is probably more efficient to keep this with its current
3860 delay slot as a branch to a RETURN. */
3861 reorg_redirect_jump (jump_insn, real_label);
3864 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3865 new delay slots we have created. */
3866 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3867 delete_related_insns (real_return_label);
3868 if (real_simple_return_label != NULL_RTX
3869 && --LABEL_NUSES (real_simple_return_label) == 0)
3870 delete_related_insns (real_simple_return_label);
3872 fill_simple_delay_slots (1);
3873 fill_simple_delay_slots (0);
3876 /* Try to find insns to place in delay slots. */
3878 void
3879 dbr_schedule (rtx first)
3881 rtx insn, next, epilogue_insn = 0;
3882 int i;
3883 bool need_return_insns;
3885 /* If the current function has no insns other than the prologue and
3886 epilogue, then do not try to fill any delay slots. */
3887 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3888 return;
3890 /* Find the highest INSN_UID and allocate and initialize our map from
3891 INSN_UID's to position in code. */
3892 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3894 if (INSN_UID (insn) > max_uid)
3895 max_uid = INSN_UID (insn);
3896 if (NOTE_P (insn)
3897 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3898 epilogue_insn = insn;
3901 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3902 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3903 uid_to_ruid[INSN_UID (insn)] = i;
3905 /* Initialize the list of insns that need filling. */
3906 if (unfilled_firstobj == 0)
3908 gcc_obstack_init (&unfilled_slots_obstack);
3909 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3912 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3914 rtx target;
3916 if (JUMP_P (insn))
3917 INSN_ANNULLED_BRANCH_P (insn) = 0;
3918 INSN_FROM_TARGET_P (insn) = 0;
3920 /* Skip vector tables. We can't get attributes for them. */
3921 if (JUMP_TABLE_DATA_P (insn))
3922 continue;
3924 if (num_delay_slots (insn) > 0)
3925 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3927 /* Ensure all jumps go to the last of a set of consecutive labels. */
3928 if (JUMP_P (insn)
3929 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3930 && !ANY_RETURN_P (JUMP_LABEL (insn))
3931 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3932 != JUMP_LABEL (insn)))
3933 redirect_jump (insn, target, 1);
3936 init_resource_info (epilogue_insn);
3938 /* Show we haven't computed an end-of-function label yet. */
3939 function_return_label = function_simple_return_label = NULL_RTX;
3941 /* Initialize the statistics for this function. */
3942 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3943 memset (num_filled_delays, 0, sizeof num_filled_delays);
3945 /* Now do the delay slot filling. Try everything twice in case earlier
3946 changes make more slots fillable. */
3948 for (reorg_pass_number = 0;
3949 reorg_pass_number < MAX_REORG_PASSES;
3950 reorg_pass_number++)
3952 fill_simple_delay_slots (1);
3953 fill_simple_delay_slots (0);
3954 fill_eager_delay_slots ();
3955 relax_delay_slots (first);
3958 /* If we made an end of function label, indicate that it is now
3959 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3960 If it is now unused, delete it. */
3961 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3962 delete_related_insns (function_return_label);
3963 if (function_simple_return_label
3964 && --LABEL_NUSES (function_simple_return_label) == 0)
3965 delete_related_insns (function_simple_return_label);
3967 need_return_insns = false;
3968 #ifdef HAVE_return
3969 need_return_insns |= HAVE_return && function_return_label != 0;
3970 #endif
3971 #ifdef HAVE_simple_return
3972 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3973 #endif
3974 if (need_return_insns)
3975 make_return_insns (first);
3977 /* Delete any USE insns made by update_block; subsequent passes don't need
3978 them or know how to deal with them. */
3979 for (insn = first; insn; insn = next)
3981 next = NEXT_INSN (insn);
3983 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3984 && INSN_P (XEXP (PATTERN (insn), 0)))
3985 next = delete_related_insns (insn);
3988 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3990 /* It is not clear why the line below is needed, but it does seem to be. */
3991 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3993 if (dump_file)
3995 int i, j, need_comma;
3996 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3997 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3999 for (reorg_pass_number = 0;
4000 reorg_pass_number < MAX_REORG_PASSES;
4001 reorg_pass_number++)
4003 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
4004 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
4006 need_comma = 0;
4007 fprintf (dump_file, ";; Reorg function #%d\n", i);
4009 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
4010 num_insns_needing_delays[i][reorg_pass_number]);
4012 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
4013 if (num_filled_delays[i][j][reorg_pass_number])
4015 if (need_comma)
4016 fprintf (dump_file, ", ");
4017 need_comma = 1;
4018 fprintf (dump_file, "%d got %d delays",
4019 num_filled_delays[i][j][reorg_pass_number], j);
4021 fprintf (dump_file, "\n");
4024 memset (total_delay_slots, 0, sizeof total_delay_slots);
4025 memset (total_annul_slots, 0, sizeof total_annul_slots);
4026 for (insn = first; insn; insn = NEXT_INSN (insn))
4028 if (! INSN_DELETED_P (insn)
4029 && NONJUMP_INSN_P (insn)
4030 && GET_CODE (PATTERN (insn)) != USE
4031 && GET_CODE (PATTERN (insn)) != CLOBBER)
4033 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
4035 rtx control;
4036 j = XVECLEN (PATTERN (insn), 0) - 1;
4037 if (j > MAX_DELAY_HISTOGRAM)
4038 j = MAX_DELAY_HISTOGRAM;
4039 control = XVECEXP (PATTERN (insn), 0, 0);
4040 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
4041 total_annul_slots[j]++;
4042 else
4043 total_delay_slots[j]++;
4045 else if (num_delay_slots (insn) > 0)
4046 total_delay_slots[0]++;
4049 fprintf (dump_file, ";; Reorg totals: ");
4050 need_comma = 0;
4051 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
4053 if (total_delay_slots[j])
4055 if (need_comma)
4056 fprintf (dump_file, ", ");
4057 need_comma = 1;
4058 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
4061 fprintf (dump_file, "\n");
4062 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
4063 fprintf (dump_file, ";; Reorg annuls: ");
4064 need_comma = 0;
4065 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
4067 if (total_annul_slots[j])
4069 if (need_comma)
4070 fprintf (dump_file, ", ");
4071 need_comma = 1;
4072 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
4075 fprintf (dump_file, "\n");
4076 #endif
4077 fprintf (dump_file, "\n");
4080 free_resource_info ();
4081 free (uid_to_ruid);
4082 #ifdef DELAY_SLOTS_FOR_EPILOGUE
4083 /* SPARC assembler, for instance, emit warning when debug info is output
4084 into the delay slot. */
4086 rtx link;
4088 for (link = crtl->epilogue_delay_list;
4089 link;
4090 link = XEXP (link, 1))
4091 INSN_LOCATION (XEXP (link, 0)) = 0;
4094 #endif
4095 crtl->dbr_scheduled_p = true;
4097 #endif /* DELAY_SLOTS */
4099 static bool
4100 gate_handle_delay_slots (void)
4102 #ifdef DELAY_SLOTS
4103 /* At -O0 dataflow info isn't updated after RA. */
4104 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
4105 #else
4106 return 0;
4107 #endif
4110 /* Run delay slot optimization. */
4111 static unsigned int
4112 rest_of_handle_delay_slots (void)
4114 #ifdef DELAY_SLOTS
4115 dbr_schedule (get_insns ());
4116 #endif
4117 return 0;
4120 struct rtl_opt_pass pass_delay_slots =
4123 RTL_PASS,
4124 "dbr", /* name */
4125 gate_handle_delay_slots, /* gate */
4126 rest_of_handle_delay_slots, /* execute */
4127 NULL, /* sub */
4128 NULL, /* next */
4129 0, /* static_pass_number */
4130 TV_DBR_SCHED, /* tv_id */
4131 0, /* properties_required */
4132 0, /* properties_provided */
4133 0, /* properties_destroyed */
4134 0, /* todo_flags_start */
4135 TODO_ggc_collect /* todo_flags_finish */
4139 /* Machine dependent reorg pass. */
4140 static bool
4141 gate_handle_machine_reorg (void)
4143 return targetm.machine_dependent_reorg != 0;
4147 static unsigned int
4148 rest_of_handle_machine_reorg (void)
4150 targetm.machine_dependent_reorg ();
4151 return 0;
4154 struct rtl_opt_pass pass_machine_reorg =
4157 RTL_PASS,
4158 "mach", /* name */
4159 gate_handle_machine_reorg, /* gate */
4160 rest_of_handle_machine_reorg, /* execute */
4161 NULL, /* sub */
4162 NULL, /* next */
4163 0, /* static_pass_number */
4164 TV_MACH_DEP, /* tv_id */
4165 0, /* properties_required */
4166 0, /* properties_provided */
4167 0, /* properties_destroyed */
4168 0, /* todo_flags_start */
4169 TODO_ggc_collect /* todo_flags_finish */