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1 /* Change pseudos by memory.
2 Copyright (C) 2010, 2011, 2012
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains code for a pass to change spilled pseudos into
24 memory.
26 The pass creates necessary stack slots and assigns spilled pseudos
27 to the stack slots in following way:
29 for all spilled pseudos P most frequently used first do
30 for all stack slots S do
31 if P doesn't conflict with pseudos assigned to S then
32 assign S to P and goto to the next pseudo process
33 end
34 end
35 create new stack slot S and assign P to S
36 end
38 The actual algorithm is bit more complicated because of different
39 pseudo sizes.
41 After that the code changes spilled pseudos (except ones created
42 from scratches) by corresponding stack slot memory in RTL.
44 If at least one stack slot was created, we need to run more passes
45 because we have new addresses which should be checked and because
46 the old address displacements might change and address constraints
47 (or insn memory constraints) might not be satisfied any more.
49 For some targets, the pass can spill some pseudos into hard
50 registers of different class (usually into vector registers)
51 instead of spilling them into memory if it is possible and
52 profitable. Spilling GENERAL_REGS pseudo into SSE registers for
53 Intel Corei7 is an example of such optimization. And this is
54 actually recommended by Intel optimization guide.
56 The file also contains code for final change of pseudos on hard
57 regs correspondingly assigned to them. */
59 #include "config.h"
60 #include "system.h"
61 #include "coretypes.h"
62 #include "tm.h"
63 #include "rtl.h"
64 #include "tm_p.h"
65 #include "insn-config.h"
66 #include "recog.h"
67 #include "output.h"
68 #include "regs.h"
69 #include "hard-reg-set.h"
70 #include "flags.h"
71 #include "function.h"
72 #include "expr.h"
73 #include "basic-block.h"
74 #include "except.h"
75 #include "timevar.h"
76 #include "target.h"
77 #include "lra-int.h"
78 #include "ira.h"
79 #include "df.h"
82 /* Max regno at the start of the pass. */
83 static int regs_num;
85 /* Map spilled regno -> hard regno used instead of memory for
86 spilling. */
87 static rtx *spill_hard_reg;
89 /* The structure describes stack slot of a spilled pseudo. */
90 struct pseudo_slot
92 /* Number (0, 1, ...) of the stack slot to which given pseudo
93 belongs. */
94 int slot_num;
95 /* First or next slot with the same slot number. */
96 struct pseudo_slot *next, *first;
97 /* Memory representing the spilled pseudo. */
98 rtx mem;
101 /* The stack slots for each spilled pseudo. Indexed by regnos. */
102 static struct pseudo_slot *pseudo_slots;
104 /* The structure describes a register or a stack slot which can be
105 used for several spilled pseudos. */
106 struct slot
108 /* First pseudo with given stack slot. */
109 int regno;
110 /* Hard reg into which the slot pseudos are spilled. The value is
111 negative for pseudos spilled into memory. */
112 int hard_regno;
113 /* Memory representing the all stack slot. It can be different from
114 memory representing a pseudo belonging to give stack slot because
115 pseudo can be placed in a part of the corresponding stack slot.
116 The value is NULL for pseudos spilled into a hard reg. */
117 rtx mem;
118 /* Combined live ranges of all pseudos belonging to given slot. It
119 is used to figure out that a new spilled pseudo can use given
120 stack slot. */
121 lra_live_range_t live_ranges;
124 /* Array containing info about the stack slots. The array element is
125 indexed by the stack slot number in the range [0..slots_num). */
126 static struct slot *slots;
127 /* The number of the stack slots currently existing. */
128 static int slots_num;
130 /* Set up memory of the spilled pseudo I. The function can allocate
131 the corresponding stack slot if it is not done yet. */
132 static void
133 assign_mem_slot (int i)
135 rtx x = NULL_RTX;
136 enum machine_mode mode = GET_MODE (regno_reg_rtx[i]);
137 unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
138 unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
139 unsigned int max_ref_width = GET_MODE_SIZE (lra_reg_info[i].biggest_mode);
140 unsigned int total_size = MAX (inherent_size, max_ref_width);
141 unsigned int min_align = max_ref_width * BITS_PER_UNIT;
142 int adjust = 0;
144 lra_assert (regno_reg_rtx[i] != NULL_RTX && REG_P (regno_reg_rtx[i])
145 && lra_reg_info[i].nrefs != 0 && reg_renumber[i] < 0);
147 x = slots[pseudo_slots[i].slot_num].mem;
149 /* We can use a slot already allocated because it is guaranteed the
150 slot provides both enough inherent space and enough total
151 space. */
152 if (x)
154 /* Each pseudo has an inherent size which comes from its own mode,
155 and a total size which provides room for paradoxical subregs
156 which refer to the pseudo reg in wider modes. We allocate a new
157 slot, making sure that it has enough inherent space and total
158 space. */
159 else
161 rtx stack_slot;
163 /* No known place to spill from => no slot to reuse. */
164 x = assign_stack_local (mode, total_size,
165 min_align > inherent_align
166 || total_size > inherent_size ? -1 : 0);
167 x = lra_eliminate_regs_1 (x, GET_MODE (x), false, false, true);
168 stack_slot = x;
169 /* Cancel the big-endian correction done in assign_stack_local.
170 Get the address of the beginning of the slot. This is so we
171 can do a big-endian correction unconditionally below. */
172 if (BYTES_BIG_ENDIAN)
174 adjust = inherent_size - total_size;
175 if (adjust)
176 stack_slot
177 = adjust_address_nv (x,
178 mode_for_size (total_size * BITS_PER_UNIT,
179 MODE_INT, 1),
180 adjust);
182 slots[pseudo_slots[i].slot_num].mem = stack_slot;
185 /* On a big endian machine, the "address" of the slot is the address
186 of the low part that fits its inherent mode. */
187 if (BYTES_BIG_ENDIAN && inherent_size < total_size)
188 adjust += (total_size - inherent_size);
190 x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
192 /* Set all of the memory attributes as appropriate for a spill. */
193 set_mem_attrs_for_spill (x);
194 pseudo_slots[i].mem = x;
197 /* Sort pseudos according their usage frequencies. */
198 static int
199 regno_freq_compare (const void *v1p, const void *v2p)
201 const int regno1 = *(const int *) v1p;
202 const int regno2 = *(const int *) v2p;
203 int diff;
205 if ((diff = lra_reg_info[regno2].freq - lra_reg_info[regno1].freq) != 0)
206 return diff;
207 return regno1 - regno2;
210 /* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1. */
211 #ifdef STACK_GROWS_DOWNWARD
212 # undef STACK_GROWS_DOWNWARD
213 # define STACK_GROWS_DOWNWARD 1
214 #else
215 # define STACK_GROWS_DOWNWARD 0
216 #endif
218 /* Sort pseudos according to their slots, putting the slots in the order
219 that they should be allocated. Slots with lower numbers have the highest
220 priority and should get the smallest displacement from the stack or
221 frame pointer (whichever is being used).
223 The first allocated slot is always closest to the frame pointer,
224 so prefer lower slot numbers when frame_pointer_needed. If the stack
225 and frame grow in the same direction, then the first allocated slot is
226 always closest to the initial stack pointer and furthest away from the
227 final stack pointer, so allocate higher numbers first when using the
228 stack pointer in that case. The reverse is true if the stack and
229 frame grow in opposite directions. */
230 static int
231 pseudo_reg_slot_compare (const void *v1p, const void *v2p)
233 const int regno1 = *(const int *) v1p;
234 const int regno2 = *(const int *) v2p;
235 int diff, slot_num1, slot_num2;
236 int total_size1, total_size2;
238 slot_num1 = pseudo_slots[regno1].slot_num;
239 slot_num2 = pseudo_slots[regno2].slot_num;
240 if ((diff = slot_num1 - slot_num2) != 0)
241 return (frame_pointer_needed
242 || !FRAME_GROWS_DOWNWARD == STACK_GROWS_DOWNWARD ? diff : -diff);
243 total_size1 = GET_MODE_SIZE (lra_reg_info[regno1].biggest_mode);
244 total_size2 = GET_MODE_SIZE (lra_reg_info[regno2].biggest_mode);
245 if ((diff = total_size2 - total_size1) != 0)
246 return diff;
247 return regno1 - regno2;
250 /* Assign spill hard registers to N pseudos in PSEUDO_REGNOS which is
251 sorted in order of highest frequency first. Put the pseudos which
252 did not get a spill hard register at the beginning of array
253 PSEUDO_REGNOS. Return the number of such pseudos. */
254 static int
255 assign_spill_hard_regs (int *pseudo_regnos, int n)
257 int i, k, p, regno, res, spill_class_size, hard_regno, nr;
258 enum reg_class rclass, spill_class;
259 enum machine_mode mode;
260 lra_live_range_t r;
261 rtx insn, set;
262 basic_block bb;
263 HARD_REG_SET conflict_hard_regs;
264 bitmap_head ok_insn_bitmap;
265 bitmap setjump_crosses = regstat_get_setjmp_crosses ();
266 /* Hard registers which can not be used for any purpose at given
267 program point because they are unallocatable or already allocated
268 for other pseudos. */
269 HARD_REG_SET *reserved_hard_regs;
271 if (! lra_reg_spill_p)
272 return n;
273 /* Set up reserved hard regs for every program point. */
274 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
275 for (p = 0; p < lra_live_max_point; p++)
276 COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
277 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
278 if (lra_reg_info[i].nrefs != 0
279 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
280 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
281 for (p = r->start; p <= r->finish; p++)
282 add_to_hard_reg_set (&reserved_hard_regs[p],
283 lra_reg_info[i].biggest_mode, hard_regno);
284 bitmap_initialize (&ok_insn_bitmap, &reg_obstack);
285 FOR_EACH_BB (bb)
286 FOR_BB_INSNS (bb, insn)
287 if (DEBUG_INSN_P (insn)
288 || ((set = single_set (insn)) != NULL_RTX
289 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))))
290 bitmap_set_bit (&ok_insn_bitmap, INSN_UID (insn));
291 for (res = i = 0; i < n; i++)
293 regno = pseudo_regnos[i];
294 rclass = lra_get_allocno_class (regno);
295 if (bitmap_bit_p (setjump_crosses, regno)
296 || (spill_class
297 = ((enum reg_class)
298 targetm.spill_class ((reg_class_t) rclass,
299 PSEUDO_REGNO_MODE (regno)))) == NO_REGS
300 || bitmap_intersect_compl_p (&lra_reg_info[regno].insn_bitmap,
301 &ok_insn_bitmap))
303 pseudo_regnos[res++] = regno;
304 continue;
306 lra_assert (spill_class != NO_REGS);
307 COPY_HARD_REG_SET (conflict_hard_regs,
308 lra_reg_info[regno].conflict_hard_regs);
309 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
310 for (p = r->start; p <= r->finish; p++)
311 IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
312 spill_class_size = ira_class_hard_regs_num[spill_class];
313 mode = lra_reg_info[regno].biggest_mode;
314 for (k = 0; k < spill_class_size; k++)
316 hard_regno = ira_class_hard_regs[spill_class][k];
317 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
318 break;
320 if (k >= spill_class_size)
322 /* There is no available regs -- assign memory later. */
323 pseudo_regnos[res++] = regno;
324 continue;
326 if (lra_dump_file != NULL)
327 fprintf (lra_dump_file, " Spill r%d into hr%d\n", regno, hard_regno);
328 /* Update reserved_hard_regs. */
329 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
330 for (p = r->start; p <= r->finish; p++)
331 add_to_hard_reg_set (&reserved_hard_regs[p],
332 lra_reg_info[regno].biggest_mode, hard_regno);
333 spill_hard_reg[regno]
334 = gen_raw_REG (PSEUDO_REGNO_MODE (regno), hard_regno);
335 for (nr = 0;
336 nr < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode];
337 nr++)
338 /* Just loop. */;
339 df_set_regs_ever_live (hard_regno + nr, true);
341 bitmap_clear (&ok_insn_bitmap);
342 free (reserved_hard_regs);
343 return res;
346 /* Add pseudo REGNO to slot SLOT_NUM. */
347 static void
348 add_pseudo_to_slot (int regno, int slot_num)
350 struct pseudo_slot *first;
352 if (slots[slot_num].regno < 0)
354 /* It is the first pseudo in the slot. */
355 slots[slot_num].regno = regno;
356 pseudo_slots[regno].first = &pseudo_slots[regno];
357 pseudo_slots[regno].next = NULL;
359 else
361 first = pseudo_slots[regno].first = &pseudo_slots[slots[slot_num].regno];
362 pseudo_slots[regno].next = first->next;
363 first->next = &pseudo_slots[regno];
365 pseudo_slots[regno].mem = NULL_RTX;
366 pseudo_slots[regno].slot_num = slot_num;
367 slots[slot_num].live_ranges
368 = lra_merge_live_ranges (slots[slot_num].live_ranges,
369 lra_copy_live_range_list
370 (lra_reg_info[regno].live_ranges));
373 /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of
374 length N. Sort pseudos in PSEUDO_REGNOS for subsequent assigning
375 memory stack slots. */
376 static void
377 assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
379 int i, j, regno;
381 slots_num = 0;
382 /* Assign stack slot numbers to spilled pseudos, use smaller numbers
383 for most frequently used pseudos. */
384 for (i = 0; i < n; i++)
386 regno = pseudo_regnos[i];
387 if (! flag_ira_share_spill_slots)
388 j = slots_num;
389 else
391 for (j = 0; j < slots_num; j++)
392 if (slots[j].hard_regno < 0
393 && ! (lra_intersected_live_ranges_p
394 (slots[j].live_ranges,
395 lra_reg_info[regno].live_ranges)))
396 break;
398 if (j >= slots_num)
400 /* New slot. */
401 slots[j].live_ranges = NULL;
402 slots[j].regno = slots[j].hard_regno = -1;
403 slots[j].mem = NULL_RTX;
404 slots_num++;
406 add_pseudo_to_slot (regno, j);
408 /* Sort regnos according to their slot numbers. */
409 qsort (pseudo_regnos, n, sizeof (int), pseudo_reg_slot_compare);
412 /* Recursively process LOC in INSN and change spilled pseudos to the
413 corresponding memory or spilled hard reg. Ignore spilled pseudos
414 created from the scratches. */
415 static void
416 remove_pseudos (rtx *loc, rtx insn)
418 int i;
419 rtx hard_reg;
420 const char *fmt;
421 enum rtx_code code;
423 if (*loc == NULL_RTX)
424 return;
425 code = GET_CODE (*loc);
426 if (code == REG && (i = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
427 && lra_get_regno_hard_regno (i) < 0
428 /* We do not want to assign memory for former scratches because
429 it might result in an address reload for some targets. In
430 any case we transform such pseudos not getting hard registers
431 into scratches back. */
432 && ! lra_former_scratch_p (i))
434 hard_reg = spill_hard_reg[i];
435 *loc = copy_rtx (hard_reg != NULL_RTX ? hard_reg : pseudo_slots[i].mem);
436 return;
439 fmt = GET_RTX_FORMAT (code);
440 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
442 if (fmt[i] == 'e')
443 remove_pseudos (&XEXP (*loc, i), insn);
444 else if (fmt[i] == 'E')
446 int j;
448 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
449 remove_pseudos (&XVECEXP (*loc, i, j), insn);
454 /* Convert spilled pseudos into their stack slots or spill hard regs,
455 put insns to process on the constraint stack (that is all insns in
456 which pseudos were changed to memory or spill hard regs). */
457 static void
458 spill_pseudos (void)
460 basic_block bb;
461 rtx insn;
462 int i;
463 bitmap_head spilled_pseudos, changed_insns;
465 bitmap_initialize (&spilled_pseudos, &reg_obstack);
466 bitmap_initialize (&changed_insns, &reg_obstack);
467 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
469 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
470 && ! lra_former_scratch_p (i))
472 bitmap_set_bit (&spilled_pseudos, i);
473 bitmap_ior_into (&changed_insns, &lra_reg_info[i].insn_bitmap);
476 FOR_EACH_BB (bb)
478 FOR_BB_INSNS (bb, insn)
479 if (bitmap_bit_p (&changed_insns, INSN_UID (insn)))
481 remove_pseudos (&PATTERN (insn), insn);
482 if (CALL_P (insn))
483 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
484 if (lra_dump_file != NULL)
485 fprintf (lra_dump_file,
486 "Changing spilled pseudos to memory in insn #%u\n",
487 INSN_UID (insn));
488 lra_push_insn (insn);
489 if (lra_reg_spill_p || targetm.different_addr_displacement_p ())
490 lra_set_used_insn_alternative (insn, -1);
492 else if (CALL_P (insn))
493 /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE does
494 not affect value of insn_bitmap of the corresponding
495 lra_reg_info. That is because we don't need to reload
496 pseudos in CALL_INSN_FUNCTION_USAGEs. So if we process
497 only insns in the insn_bitmap of given pseudo here, we
498 can miss the pseudo in some
499 CALL_INSN_FUNCTION_USAGEs. */
500 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
501 bitmap_and_compl_into (df_get_live_in (bb), &spilled_pseudos);
502 bitmap_and_compl_into (df_get_live_out (bb), &spilled_pseudos);
504 bitmap_clear (&spilled_pseudos);
505 bitmap_clear (&changed_insns);
508 /* Return true if we need to change some pseudos into memory. */
509 bool
510 lra_need_for_spills_p (void)
512 int i; max_regno = max_reg_num ();
514 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
515 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
516 && ! lra_former_scratch_p (i))
517 return true;
518 return false;
521 /* Change spilled pseudos into memory or spill hard regs. Put changed
522 insns on the constraint stack (these insns will be considered on
523 the next constraint pass). The changed insns are all insns in
524 which pseudos were changed. */
525 void
526 lra_spill (void)
528 int i, n, curr_regno;
529 int *pseudo_regnos;
531 regs_num = max_reg_num ();
532 spill_hard_reg = XNEWVEC (rtx, regs_num);
533 pseudo_regnos = XNEWVEC (int, regs_num);
534 for (n = 0, i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
535 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
536 /* We do not want to assign memory for former scratches. */
537 && ! lra_former_scratch_p (i))
539 spill_hard_reg[i] = NULL_RTX;
540 pseudo_regnos[n++] = i;
542 lra_assert (n > 0);
543 pseudo_slots = XNEWVEC (struct pseudo_slot, regs_num);
544 slots = XNEWVEC (struct slot, regs_num);
545 /* Sort regnos according their usage frequencies. */
546 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare);
547 n = assign_spill_hard_regs (pseudo_regnos, n);
548 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n);
549 for (i = 0; i < n; i++)
550 if (pseudo_slots[pseudo_regnos[i]].mem == NULL_RTX)
551 assign_mem_slot (pseudo_regnos[i]);
552 if (lra_dump_file != NULL)
554 for (i = 0; i < slots_num; i++)
556 fprintf (lra_dump_file, " Slot %d regnos (width = %d):", i,
557 GET_MODE_SIZE (GET_MODE (slots[i].mem)));
558 for (curr_regno = slots[i].regno;;
559 curr_regno = pseudo_slots[curr_regno].next - pseudo_slots)
561 fprintf (lra_dump_file, " %d", curr_regno);
562 if (pseudo_slots[curr_regno].next == NULL)
563 break;
565 fprintf (lra_dump_file, "\n");
568 spill_pseudos ();
569 free (slots);
570 free (pseudo_slots);
571 free (pseudo_regnos);
574 /* Apply alter_subreg for subregs of regs in *LOC. Use FINAL_P for
575 alter_subreg calls. Return true if any subreg of reg is
576 processed. */
577 static bool
578 alter_subregs (rtx *loc, bool final_p)
580 int i;
581 rtx x = *loc;
582 bool res;
583 const char *fmt;
584 enum rtx_code code;
586 if (x == NULL_RTX)
587 return false;
588 code = GET_CODE (x);
589 if (code == SUBREG && REG_P (SUBREG_REG (x)))
591 lra_assert (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER);
592 alter_subreg (loc, final_p);
593 return true;
595 fmt = GET_RTX_FORMAT (code);
596 res = false;
597 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
599 if (fmt[i] == 'e')
601 if (alter_subregs (&XEXP (x, i), final_p))
602 res = true;
604 else if (fmt[i] == 'E')
606 int j;
608 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
609 if (alter_subregs (&XVECEXP (x, i, j), final_p))
610 res = true;
613 return res;
616 /* Final change of pseudos got hard registers into the corresponding
617 hard registers. */
618 void
619 lra_hard_reg_substitution (void)
621 int i, hard_regno;
622 basic_block bb;
623 rtx insn;
624 int max_regno = max_reg_num ();
626 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
627 if (lra_reg_info[i].nrefs != 0
628 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
629 SET_REGNO (regno_reg_rtx[i], hard_regno);
630 FOR_EACH_BB (bb)
631 FOR_BB_INSNS (bb, insn)
632 if (INSN_P (insn))
634 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
635 bool insn_change_p = false;
637 for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
638 if (alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
640 lra_update_dup (id, i);
641 insn_change_p = true;
643 if (insn_change_p)
644 lra_update_operator_dups (id);