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[official-gcc.git] / gcc / lra-eliminations.c
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1 /* Code for RTL register eliminations.
2 Copyright (C) 2010, 2011, 2012
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Eliminable registers (like a soft argument or frame pointer) are
23 widely used in RTL. These eliminable registers should be replaced
24 by real hard registers (like the stack pointer or hard frame
25 pointer) plus some offset. The offsets usually change whenever the
26 stack is expanded. We know the final offsets only at the very end
27 of LRA.
29 Within LRA, we usually keep the RTL in such a state that the
30 eliminable registers can be replaced by just the corresponding hard
31 register (without any offset). To achieve this we should add the
32 initial elimination offset at the beginning of LRA and update the
33 offsets whenever the stack is expanded. We need to do this before
34 every constraint pass because the choice of offset often affects
35 whether a particular address or memory constraint is satisfied.
37 We keep RTL code at most time in such state that the virtual
38 registers can be changed by just the corresponding hard registers
39 (with zero offsets) and we have the right RTL code. To achieve this
40 we should add initial offset at the beginning of LRA work and update
41 offsets after each stack expanding. But actually we update virtual
42 registers to the same virtual registers + corresponding offsets
43 before every constraint pass because it affects constraint
44 satisfaction (e.g. an address displacement became too big for some
45 target).
47 The final change of eliminable registers to the corresponding hard
48 registers are done at the very end of LRA when there were no change
49 in offsets anymore:
51 fp + 42 => sp + 42
55 #include "config.h"
56 #include "system.h"
57 #include "coretypes.h"
58 #include "tm.h"
59 #include "hard-reg-set.h"
60 #include "rtl.h"
61 #include "tm_p.h"
62 #include "regs.h"
63 #include "insn-config.h"
64 #include "insn-codes.h"
65 #include "recog.h"
66 #include "output.h"
67 #include "addresses.h"
68 #include "target.h"
69 #include "function.h"
70 #include "expr.h"
71 #include "basic-block.h"
72 #include "except.h"
73 #include "optabs.h"
74 #include "df.h"
75 #include "ira.h"
76 #include "rtl-error.h"
77 #include "lra-int.h"
79 /* This structure is used to record information about hard register
80 eliminations. */
81 struct elim_table
83 /* Hard register number to be eliminated. */
84 int from;
85 /* Hard register number used as replacement. */
86 int to;
87 /* Difference between values of the two hard registers above on
88 previous iteration. */
89 HOST_WIDE_INT previous_offset;
90 /* Difference between the values on the current iteration. */
91 HOST_WIDE_INT offset;
92 /* Nonzero if this elimination can be done. */
93 bool can_eliminate;
94 /* CAN_ELIMINATE since the last check. */
95 bool prev_can_eliminate;
96 /* REG rtx for the register to be eliminated. We cannot simply
97 compare the number since we might then spuriously replace a hard
98 register corresponding to a pseudo assigned to the reg to be
99 eliminated. */
100 rtx from_rtx;
101 /* REG rtx for the replacement. */
102 rtx to_rtx;
105 /* The elimination table. Each array entry describes one possible way
106 of eliminating a register in favor of another. If there is more
107 than one way of eliminating a particular register, the most
108 preferred should be specified first. */
109 static struct elim_table *reg_eliminate = 0;
111 /* This is an intermediate structure to initialize the table. It has
112 exactly the members provided by ELIMINABLE_REGS. */
113 static const struct elim_table_1
115 const int from;
116 const int to;
117 } reg_eliminate_1[] =
119 /* If a set of eliminable hard registers was specified, define the
120 table from it. Otherwise, default to the normal case of the frame
121 pointer being replaced by the stack pointer. */
123 #ifdef ELIMINABLE_REGS
124 ELIMINABLE_REGS;
125 #else
126 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
127 #endif
129 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
131 /* Print info about elimination table to file F. */
132 static void
133 print_elim_table (FILE *f)
135 struct elim_table *ep;
137 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
138 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
139 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
140 ep->can_eliminate ? "Can" : "Can't",
141 ep->from, ep->to, ep->offset, ep->previous_offset);
144 /* Print info about elimination table to stderr. */
145 void
146 lra_debug_elim_table (void)
148 print_elim_table (stderr);
151 /* Setup possibility of elimination in elimination table element EP to
152 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
153 pointer to stack pointer is not possible anymore. */
154 static void
155 setup_can_eliminate (struct elim_table *ep, bool value)
157 ep->can_eliminate = ep->prev_can_eliminate = value;
158 if (! value
159 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
160 frame_pointer_needed = 1;
163 /* Map: eliminable "from" register -> its current elimination,
164 or NULL if none. The elimination table may contain more than
165 one elimination for the same hard register, but this map specifies
166 the one that we are currently using. */
167 static struct elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
169 /* When an eliminable hard register becomes not eliminable, we use the
170 following special structure to restore original offsets for the
171 register. */
172 static struct elim_table self_elim_table;
174 /* Offsets should be used to restore original offsets for eliminable
175 hard register which just became not eliminable. Zero,
176 otherwise. */
177 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
179 /* Map: hard regno -> RTL presentation. RTL presentations of all
180 potentially eliminable hard registers are stored in the map. */
181 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
183 /* Set up ELIMINATION_MAP of the currently used eliminations. */
184 static void
185 setup_elimination_map (void)
187 int i;
188 struct elim_table *ep;
190 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
191 elimination_map[i] = NULL;
192 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
193 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
194 elimination_map[ep->from] = ep;
199 /* Compute the sum of X and Y, making canonicalizations assumed in an
200 address, namely: sum constant integers, surround the sum of two
201 constants with a CONST, put the constant as the second operand, and
202 group the constant on the outermost sum.
204 This routine assumes both inputs are already in canonical form. */
205 static rtx
206 form_sum (rtx x, rtx y)
208 rtx tem;
209 enum machine_mode mode = GET_MODE (x);
211 if (mode == VOIDmode)
212 mode = GET_MODE (y);
214 if (mode == VOIDmode)
215 mode = Pmode;
217 if (CONST_INT_P (x))
218 return plus_constant (mode, y, INTVAL (x));
219 else if (CONST_INT_P (y))
220 return plus_constant (mode, x, INTVAL (y));
221 else if (CONSTANT_P (x))
222 tem = x, x = y, y = tem;
224 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
225 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
227 /* Note that if the operands of Y are specified in the opposite
228 order in the recursive calls below, infinite recursion will
229 occur. */
230 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
231 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
233 /* If both constant, encapsulate sum. Otherwise, just form sum. A
234 constant will have been placed second. */
235 if (CONSTANT_P (x) && CONSTANT_P (y))
237 if (GET_CODE (x) == CONST)
238 x = XEXP (x, 0);
239 if (GET_CODE (y) == CONST)
240 y = XEXP (y, 0);
242 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
245 return gen_rtx_PLUS (mode, x, y);
248 /* Return the current substitution hard register of the elimination of
249 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
251 lra_get_elimination_hard_regno (int hard_regno)
253 struct elim_table *ep;
255 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
256 return hard_regno;
257 if ((ep = elimination_map[hard_regno]) == NULL)
258 return hard_regno;
259 return ep->to;
262 /* Return elimination which will be used for hard reg REG, NULL
263 otherwise. */
264 static struct elim_table *
265 get_elimination (rtx reg)
267 int hard_regno;
268 struct elim_table *ep;
269 HOST_WIDE_INT offset;
271 lra_assert (REG_P (reg));
272 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
273 return NULL;
274 if ((ep = elimination_map[hard_regno]) != NULL)
275 return ep->from_rtx != reg ? NULL : ep;
276 if ((offset = self_elim_offsets[hard_regno]) == 0)
277 return NULL;
278 /* This is an iteration to restore offsets just after HARD_REGNO
279 stopped to be eliminable. */
280 self_elim_table.from = self_elim_table.to = hard_regno;
281 self_elim_table.from_rtx
282 = self_elim_table.to_rtx
283 = eliminable_reg_rtx[hard_regno];
284 lra_assert (self_elim_table.from_rtx != NULL);
285 self_elim_table.offset = offset;
286 return &self_elim_table;
289 /* Scan X and replace any eliminable registers (such as fp) with a
290 replacement (such as sp) if SUBST_P, plus an offset. The offset is
291 a change in the offset between the eliminable register and its
292 substitution if UPDATE_P, or the full offset if FULL_P, or
293 otherwise zero.
295 MEM_MODE is the mode of an enclosing MEM. We need this to know how
296 much to adjust a register for, e.g., PRE_DEC. Also, if we are
297 inside a MEM, we are allowed to replace a sum of a hard register
298 and the constant zero with the hard register, which we cannot do
299 outside a MEM. In addition, we need to record the fact that a
300 hard register is referenced outside a MEM.
302 Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
303 That's used when we eliminate in expressions stored in notes. */
305 lra_eliminate_regs_1 (rtx x, enum machine_mode mem_mode,
306 bool subst_p, bool update_p, bool full_p)
308 enum rtx_code code = GET_CODE (x);
309 struct elim_table *ep;
310 rtx new_rtx;
311 int i, j;
312 const char *fmt;
313 int copied = 0;
315 if (! current_function_decl)
316 return x;
318 switch (code)
320 CASE_CONST_ANY:
321 case CONST:
322 case SYMBOL_REF:
323 case CODE_LABEL:
324 case PC:
325 case CC0:
326 case ASM_INPUT:
327 case ADDR_VEC:
328 case ADDR_DIFF_VEC:
329 case RETURN:
330 return x;
332 case REG:
333 /* First handle the case where we encounter a bare hard register
334 that is eliminable. Replace it with a PLUS. */
335 if ((ep = get_elimination (x)) != NULL)
337 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
339 if (update_p)
340 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
341 else if (full_p)
342 return plus_constant (Pmode, to, ep->offset);
343 else
344 return to;
346 return x;
348 case PLUS:
349 /* If this is the sum of an eliminable register and a constant, rework
350 the sum. */
351 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
353 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
355 HOST_WIDE_INT offset;
356 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
358 if (! update_p && ! full_p)
359 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
361 offset = (update_p
362 ? ep->offset - ep->previous_offset : ep->offset);
363 if (CONST_INT_P (XEXP (x, 1))
364 && INTVAL (XEXP (x, 1)) == -offset)
365 return to;
366 else
367 return gen_rtx_PLUS (Pmode, to,
368 plus_constant (Pmode,
369 XEXP (x, 1), offset));
372 /* If the hard register is not eliminable, we are done since
373 the other operand is a constant. */
374 return x;
377 /* If this is part of an address, we want to bring any constant
378 to the outermost PLUS. We will do this by doing hard
379 register replacement in our operands and seeing if a constant
380 shows up in one of them.
382 Note that there is no risk of modifying the structure of the
383 insn, since we only get called for its operands, thus we are
384 either modifying the address inside a MEM, or something like
385 an address operand of a load-address insn. */
388 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
389 subst_p, update_p, full_p);
390 rtx new1 = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
391 subst_p, update_p, full_p);
393 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
394 return form_sum (new0, new1);
396 return x;
398 case MULT:
399 /* If this is the product of an eliminable hard register and a
400 constant, apply the distribute law and move the constant out
401 so that we have (plus (mult ..) ..). This is needed in order
402 to keep load-address insns valid. This case is pathological.
403 We ignore the possibility of overflow here. */
404 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
405 && (ep = get_elimination (XEXP (x, 0))) != NULL)
407 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
409 if (update_p)
410 return
411 plus_constant (Pmode,
412 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
413 (ep->offset - ep->previous_offset)
414 * INTVAL (XEXP (x, 1)));
415 else if (full_p)
416 return
417 plus_constant (Pmode,
418 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
419 ep->offset * INTVAL (XEXP (x, 1)));
420 else
421 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
424 /* ... fall through ... */
426 case CALL:
427 case COMPARE:
428 /* See comments before PLUS about handling MINUS. */
429 case MINUS:
430 case DIV: case UDIV:
431 case MOD: case UMOD:
432 case AND: case IOR: case XOR:
433 case ROTATERT: case ROTATE:
434 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
435 case NE: case EQ:
436 case GE: case GT: case GEU: case GTU:
437 case LE: case LT: case LEU: case LTU:
439 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
440 subst_p, update_p, full_p);
441 rtx new1 = XEXP (x, 1)
442 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
443 subst_p, update_p, full_p) : 0;
445 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
446 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
448 return x;
450 case EXPR_LIST:
451 /* If we have something in XEXP (x, 0), the usual case,
452 eliminate it. */
453 if (XEXP (x, 0))
455 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
456 subst_p, update_p, full_p);
457 if (new_rtx != XEXP (x, 0))
459 /* If this is a REG_DEAD note, it is not valid anymore.
460 Using the eliminated version could result in creating a
461 REG_DEAD note for the stack or frame pointer. */
462 if (REG_NOTE_KIND (x) == REG_DEAD)
463 return (XEXP (x, 1)
464 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
465 subst_p, update_p, full_p)
466 : NULL_RTX);
468 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
472 /* ... fall through ... */
474 case INSN_LIST:
475 /* Now do eliminations in the rest of the chain. If this was
476 an EXPR_LIST, this might result in allocating more memory than is
477 strictly needed, but it simplifies the code. */
478 if (XEXP (x, 1))
480 new_rtx = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
481 subst_p, update_p, full_p);
482 if (new_rtx != XEXP (x, 1))
483 return
484 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
485 XEXP (x, 0), new_rtx);
487 return x;
489 case PRE_INC:
490 case POST_INC:
491 case PRE_DEC:
492 case POST_DEC:
493 /* We do not support elimination of a register that is modified.
494 elimination_effects has already make sure that this does not
495 happen. */
496 return x;
498 case PRE_MODIFY:
499 case POST_MODIFY:
500 /* We do not support elimination of a hard register that is
501 modified. LRA has already make sure that this does not
502 happen. The only remaining case we need to consider here is
503 that the increment value may be an eliminable register. */
504 if (GET_CODE (XEXP (x, 1)) == PLUS
505 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
507 rtx new_rtx = lra_eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
508 subst_p, update_p, full_p);
510 if (new_rtx != XEXP (XEXP (x, 1), 1))
511 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
512 gen_rtx_PLUS (GET_MODE (x),
513 XEXP (x, 0), new_rtx));
515 return x;
517 case STRICT_LOW_PART:
518 case NEG: case NOT:
519 case SIGN_EXTEND: case ZERO_EXTEND:
520 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
521 case FLOAT: case FIX:
522 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
523 case ABS:
524 case SQRT:
525 case FFS:
526 case CLZ:
527 case CTZ:
528 case POPCOUNT:
529 case PARITY:
530 case BSWAP:
531 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
532 subst_p, update_p, full_p);
533 if (new_rtx != XEXP (x, 0))
534 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
535 return x;
537 case SUBREG:
538 new_rtx = lra_eliminate_regs_1 (SUBREG_REG (x), mem_mode,
539 subst_p, update_p, full_p);
541 if (new_rtx != SUBREG_REG (x))
543 int x_size = GET_MODE_SIZE (GET_MODE (x));
544 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
546 if (MEM_P (new_rtx) && x_size <= new_size)
548 SUBREG_REG (x) = new_rtx;
549 alter_subreg (&x, false);
550 return x;
552 else
553 return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));
556 return x;
558 case MEM:
559 /* Our only special processing is to pass the mode of the MEM to our
560 recursive call and copy the flags. While we are here, handle this
561 case more efficiently. */
562 return
563 replace_equiv_address_nv
565 lra_eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
566 subst_p, update_p, full_p));
568 case USE:
569 /* Handle insn_list USE that a call to a pure function may generate. */
570 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), VOIDmode,
571 subst_p, update_p, full_p);
572 if (new_rtx != XEXP (x, 0))
573 return gen_rtx_USE (GET_MODE (x), new_rtx);
574 return x;
576 case CLOBBER:
577 case SET:
578 gcc_unreachable ();
580 default:
581 break;
584 /* Process each of our operands recursively. If any have changed, make a
585 copy of the rtx. */
586 fmt = GET_RTX_FORMAT (code);
587 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
589 if (*fmt == 'e')
591 new_rtx = lra_eliminate_regs_1 (XEXP (x, i), mem_mode,
592 subst_p, update_p, full_p);
593 if (new_rtx != XEXP (x, i) && ! copied)
595 x = shallow_copy_rtx (x);
596 copied = 1;
598 XEXP (x, i) = new_rtx;
600 else if (*fmt == 'E')
602 int copied_vec = 0;
603 for (j = 0; j < XVECLEN (x, i); j++)
605 new_rtx = lra_eliminate_regs_1 (XVECEXP (x, i, j), mem_mode,
606 subst_p, update_p, full_p);
607 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
609 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
610 XVEC (x, i)->elem);
611 if (! copied)
613 x = shallow_copy_rtx (x);
614 copied = 1;
616 XVEC (x, i) = new_v;
617 copied_vec = 1;
619 XVECEXP (x, i, j) = new_rtx;
624 return x;
627 /* This function is used externally in subsequent passes of GCC. It
628 always does a full elimination of X. */
630 lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
631 rtx insn ATTRIBUTE_UNUSED)
633 return lra_eliminate_regs_1 (x, mem_mode, true, false, true);
636 /* Scan rtx X for references to elimination source or target registers
637 in contexts that would prevent the elimination from happening.
638 Update the table of eliminables to reflect the changed state.
639 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
640 within a MEM. */
641 static void
642 mark_not_eliminable (rtx x)
644 enum rtx_code code = GET_CODE (x);
645 struct elim_table *ep;
646 int i, j;
647 const char *fmt;
649 switch (code)
651 case PRE_INC:
652 case POST_INC:
653 case PRE_DEC:
654 case POST_DEC:
655 case POST_MODIFY:
656 case PRE_MODIFY:
657 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
658 /* If we modify the source of an elimination rule, disable
659 it. Do the same if it is the source and not the hard frame
660 register. */
661 for (ep = reg_eliminate;
662 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
663 ep++)
664 if (ep->from_rtx == XEXP (x, 0)
665 || (ep->to_rtx == XEXP (x, 0)
666 && ep->to_rtx != hard_frame_pointer_rtx))
667 setup_can_eliminate (ep, false);
668 return;
670 case USE:
671 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
672 /* If using a hard register that is the source of an eliminate
673 we still think can be performed, note it cannot be
674 performed since we don't know how this hard register is
675 used. */
676 for (ep = reg_eliminate;
677 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
678 ep++)
679 if (ep->from_rtx == XEXP (x, 0)
680 && ep->to_rtx != hard_frame_pointer_rtx)
681 setup_can_eliminate (ep, false);
682 return;
684 case CLOBBER:
685 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
686 /* If clobbering a hard register that is the replacement
687 register for an elimination we still think can be
688 performed, note that it cannot be performed. Otherwise, we
689 need not be concerned about it. */
690 for (ep = reg_eliminate;
691 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
692 ep++)
693 if (ep->to_rtx == XEXP (x, 0)
694 && ep->to_rtx != hard_frame_pointer_rtx)
695 setup_can_eliminate (ep, false);
696 return;
698 case SET:
699 /* Check for setting a hard register that we know about. */
700 if (REG_P (SET_DEST (x)) && REGNO (SET_DEST (x)) < FIRST_PSEUDO_REGISTER)
702 /* See if this is setting the replacement hard register for
703 an elimination.
705 If DEST is the hard frame pointer, we do nothing because
706 we assume that all assignments to the frame pointer are
707 for non-local gotos and are being done at a time when
708 they are valid and do not disturb anything else. Some
709 machines want to eliminate a fake argument pointer (or
710 even a fake frame pointer) with either the real frame
711 pointer or the stack pointer. Assignments to the hard
712 frame pointer must not prevent this elimination. */
714 for (ep = reg_eliminate;
715 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
716 ep++)
717 if (ep->to_rtx == SET_DEST (x)
718 && SET_DEST (x) != hard_frame_pointer_rtx)
719 setup_can_eliminate (ep, false);
722 mark_not_eliminable (SET_DEST (x));
723 mark_not_eliminable (SET_SRC (x));
724 return;
726 default:
727 break;
730 fmt = GET_RTX_FORMAT (code);
731 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
733 if (*fmt == 'e')
734 mark_not_eliminable (XEXP (x, i));
735 else if (*fmt == 'E')
736 for (j = 0; j < XVECLEN (x, i); j++)
737 mark_not_eliminable (XVECEXP (x, i, j));
743 /* Scan INSN and eliminate all eliminable hard registers in it.
745 If REPLACE_P is true, do the replacement destructively. Also
746 delete the insn as dead it if it is setting an eliminable register.
748 If REPLACE_P is false, just update the offsets while keeping the
749 base register the same. */
751 static void
752 eliminate_regs_in_insn (rtx insn, bool replace_p)
754 int icode = recog_memoized (insn);
755 rtx old_set = single_set (insn);
756 bool validate_p;
757 int i;
758 rtx substed_operand[MAX_RECOG_OPERANDS];
759 rtx orig_operand[MAX_RECOG_OPERANDS];
760 struct elim_table *ep;
761 rtx plus_src, plus_cst_src;
762 lra_insn_recog_data_t id;
763 struct lra_static_insn_data *static_id;
765 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
767 lra_assert (GET_CODE (PATTERN (insn)) == USE
768 || GET_CODE (PATTERN (insn)) == CLOBBER
769 || GET_CODE (PATTERN (insn)) == ADDR_VEC
770 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
771 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
772 return;
775 /* Check for setting an eliminable register. */
776 if (old_set != 0 && REG_P (SET_DEST (old_set))
777 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
779 bool delete_p = replace_p;
781 #ifdef HARD_FRAME_POINTER_REGNUM
782 /* If this is setting the frame pointer register to the hardware
783 frame pointer register and this is an elimination that will
784 be done (tested above), this insn is really adjusting the
785 frame pointer downward to compensate for the adjustment done
786 before a nonlocal goto. */
787 if (ep->from == FRAME_POINTER_REGNUM
788 && ep->to == HARD_FRAME_POINTER_REGNUM)
790 if (replace_p)
792 SET_DEST (old_set) = ep->to_rtx;
793 lra_update_insn_recog_data (insn);
794 return;
796 else
798 rtx base = SET_SRC (old_set);
799 HOST_WIDE_INT offset = 0;
800 rtx base_insn = insn;
802 while (base != ep->to_rtx)
804 rtx prev_insn, prev_set;
806 if (GET_CODE (base) == PLUS && CONST_INT_P (XEXP (base, 1)))
808 offset += INTVAL (XEXP (base, 1));
809 base = XEXP (base, 0);
811 else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0
812 && (prev_set = single_set (prev_insn)) != 0
813 && rtx_equal_p (SET_DEST (prev_set), base))
815 base = SET_SRC (prev_set);
816 base_insn = prev_insn;
818 else
819 break;
822 if (base == ep->to_rtx)
824 rtx src;
826 offset -= (ep->offset - ep->previous_offset);
827 src = plus_constant (Pmode, ep->to_rtx, offset);
829 /* First see if this insn remains valid when we make
830 the change. If not, keep the INSN_CODE the same
831 and let the constraint pass fit it up. */
832 validate_change (insn, &SET_SRC (old_set), src, 1);
833 validate_change (insn, &SET_DEST (old_set),
834 ep->from_rtx, 1);
835 if (! apply_change_group ())
837 SET_SRC (old_set) = src;
838 SET_DEST (old_set) = ep->from_rtx;
840 lra_update_insn_recog_data (insn);
841 return;
846 /* We can't delete this insn, but needn't process it
847 since it won't be used unless something changes. */
848 delete_p = false;
850 #endif
852 /* This insn isn't serving a useful purpose. We delete it
853 when REPLACE is set. */
854 if (delete_p)
855 lra_delete_dead_insn (insn);
856 return;
859 /* We allow one special case which happens to work on all machines we
860 currently support: a single set with the source or a REG_EQUAL
861 note being a PLUS of an eliminable register and a constant. */
862 plus_src = plus_cst_src = 0;
863 if (old_set && REG_P (SET_DEST (old_set)))
865 if (GET_CODE (SET_SRC (old_set)) == PLUS)
866 plus_src = SET_SRC (old_set);
867 /* First see if the source is of the form (plus (...) CST). */
868 if (plus_src
869 && CONST_INT_P (XEXP (plus_src, 1)))
870 plus_cst_src = plus_src;
871 /* Check that the first operand of the PLUS is a hard reg or
872 the lowpart subreg of one. */
873 if (plus_cst_src)
875 rtx reg = XEXP (plus_cst_src, 0);
877 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
878 reg = SUBREG_REG (reg);
880 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
881 plus_cst_src = 0;
884 if (plus_cst_src)
886 rtx reg = XEXP (plus_cst_src, 0);
887 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
889 if (GET_CODE (reg) == SUBREG)
890 reg = SUBREG_REG (reg);
892 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
894 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
896 if (! replace_p)
898 offset += (ep->offset - ep->previous_offset);
899 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
902 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
903 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
904 /* If we have a nonzero offset, and the source is already a
905 simple REG, the following transformation would increase
906 the cost of the insn by replacing a simple REG with (plus
907 (reg sp) CST). So try only when we already had a PLUS
908 before. */
909 if (offset == 0 || plus_src)
911 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
913 old_set = single_set (insn);
915 /* First see if this insn remains valid when we make the
916 change. If not, try to replace the whole pattern
917 with a simple set (this may help if the original insn
918 was a PARALLEL that was only recognized as single_set
919 due to REG_UNUSED notes). If this isn't valid
920 either, keep the INSN_CODE the same and let the
921 constraint pass fix it up. */
922 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
924 rtx new_pat = gen_rtx_SET (VOIDmode,
925 SET_DEST (old_set), new_src);
927 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
928 SET_SRC (old_set) = new_src;
930 lra_update_insn_recog_data (insn);
931 /* This can't have an effect on elimination offsets, so skip
932 right to the end. */
933 return;
938 /* Eliminate all eliminable registers occurring in operands that
939 can be handled by the constraint pass. */
940 id = lra_get_insn_recog_data (insn);
941 static_id = id->insn_static_data;
942 validate_p = false;
943 for (i = 0; i < static_id->n_operands; i++)
945 orig_operand[i] = *id->operand_loc[i];
946 substed_operand[i] = *id->operand_loc[i];
948 /* For an asm statement, every operand is eliminable. */
949 if (icode < 0 || insn_data[icode].operand[i].eliminable)
951 /* Check for setting a hard register that we know about. */
952 if (static_id->operand[i].type != OP_IN
953 && REG_P (orig_operand[i]))
955 /* If we are assigning to a hard register that can be
956 eliminated, it must be as part of a PARALLEL, since
957 the code above handles single SETs. This reg can not
958 be longer eliminated -- it is forced by
959 mark_not_eliminable. */
960 for (ep = reg_eliminate;
961 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
962 ep++)
963 lra_assert (ep->from_rtx != orig_operand[i]
964 || ! ep->can_eliminate);
967 /* Companion to the above plus substitution, we can allow
968 invariants as the source of a plain move. */
969 substed_operand[i]
970 = lra_eliminate_regs_1 (*id->operand_loc[i], VOIDmode,
971 replace_p, ! replace_p, false);
972 if (substed_operand[i] != orig_operand[i])
973 validate_p = true;
977 /* Substitute the operands; the new values are in the substed_operand
978 array. */
979 for (i = 0; i < static_id->n_operands; i++)
980 *id->operand_loc[i] = substed_operand[i];
981 for (i = 0; i < static_id->n_dups; i++)
982 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
984 if (validate_p)
986 /* If we had a move insn but now we don't, re-recognize it.
987 This will cause spurious re-recognition if the old move had a
988 PARALLEL since the new one still will, but we can't call
989 single_set without having put new body into the insn and the
990 re-recognition won't hurt in this rare case. */
991 id = lra_update_insn_recog_data (insn);
992 static_id = id->insn_static_data;
996 /* Spill pseudos which are assigned to hard registers in SET. Add
997 affected insns for processing in the subsequent constraint
998 pass. */
999 static void
1000 spill_pseudos (HARD_REG_SET set)
1002 int i;
1003 bitmap_head to_process;
1004 rtx insn;
1006 if (hard_reg_set_empty_p (set))
1007 return;
1008 if (lra_dump_file != NULL)
1010 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1011 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1012 if (TEST_HARD_REG_BIT (set, i))
1013 fprintf (lra_dump_file, " %d", i);
1014 fprintf (lra_dump_file, "\n");
1016 bitmap_initialize (&to_process, &reg_obstack);
1017 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1018 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1019 && overlaps_hard_reg_set_p (set,
1020 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1022 if (lra_dump_file != NULL)
1023 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1024 i, reg_renumber[i]);
1025 reg_renumber[i] = -1;
1026 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1028 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1029 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1030 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1032 lra_push_insn (insn);
1033 lra_set_used_insn_alternative (insn, -1);
1035 bitmap_clear (&to_process);
1038 /* Update all offsets and possibility for elimination on eliminable
1039 registers. Spill pseudos assigned to registers which became
1040 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1041 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1042 registers whose offsets should be changed. */
1043 static void
1044 update_reg_eliminate (bitmap insns_with_changed_offsets)
1046 bool prev;
1047 struct elim_table *ep, *ep1;
1048 HARD_REG_SET temp_hard_reg_set;
1050 /* Clear self elimination offsets. */
1051 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1052 self_elim_offsets[ep->from] = 0;
1053 CLEAR_HARD_REG_SET (temp_hard_reg_set);
1054 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1056 /* If it is a currently used elimination: update the previous
1057 offset. */
1058 if (elimination_map[ep->from] == ep)
1059 ep->previous_offset = ep->offset;
1061 prev = ep->prev_can_eliminate;
1062 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1063 if (ep->can_eliminate && ! prev)
1065 /* It is possible that not eliminable register becomes
1066 eliminable because we took other reasons into account to
1067 set up eliminable regs in the initial set up. Just
1068 ignore new eliminable registers. */
1069 setup_can_eliminate (ep, false);
1070 continue;
1072 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1074 /* We cannot use this elimination anymore -- find another
1075 one. */
1076 if (lra_dump_file != NULL)
1077 fprintf (lra_dump_file,
1078 " Elimination %d to %d is not possible anymore\n",
1079 ep->from, ep->to);
1080 /* Mark that is not eliminable anymore. */
1081 elimination_map[ep->from] = NULL;
1082 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1083 if (ep1->can_eliminate && ep1->from == ep->from)
1084 break;
1085 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1087 if (lra_dump_file != NULL)
1088 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1089 ep1->from, ep1->to);
1090 /* Prevent the hard register into which we eliminate now
1091 from the usage for pseudos. */
1092 SET_HARD_REG_BIT (temp_hard_reg_set, ep1->to);
1093 lra_assert (ep1->previous_offset == 0);
1094 ep1->previous_offset = ep->offset;
1096 else
1098 /* There is no elimination anymore just use the hard
1099 register `from' itself. Setup self elimination
1100 offset to restore the original offset values. */
1101 if (lra_dump_file != NULL)
1102 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1103 ep->from);
1104 self_elim_offsets[ep->from] = -ep->offset;
1105 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1106 if (ep->offset != 0)
1107 bitmap_ior_into (insns_with_changed_offsets,
1108 &lra_reg_info[ep->from].insn_bitmap);
1112 #ifdef ELIMINABLE_REGS
1113 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1114 #else
1115 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1116 #endif
1118 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1119 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1120 spill_pseudos (temp_hard_reg_set);
1121 setup_elimination_map ();
1122 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1123 if (elimination_map[ep->from] == ep && ep->previous_offset != ep->offset)
1124 bitmap_ior_into (insns_with_changed_offsets,
1125 &lra_reg_info[ep->from].insn_bitmap);
1128 /* Initialize the table of hard registers to eliminate.
1129 Pre-condition: global flag frame_pointer_needed has been set before
1130 calling this function. */
1131 static void
1132 init_elim_table (void)
1134 bool value_p;
1135 struct elim_table *ep;
1136 #ifdef ELIMINABLE_REGS
1137 const struct elim_table_1 *ep1;
1138 #endif
1140 if (!reg_eliminate)
1141 reg_eliminate = XCNEWVEC (struct elim_table, NUM_ELIMINABLE_REGS);
1143 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1144 /* Initiate member values which will be never changed. */
1145 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1146 self_elim_table.previous_offset = 0;
1147 #ifdef ELIMINABLE_REGS
1148 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1149 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1151 ep->offset = ep->previous_offset = 0;
1152 ep->from = ep1->from;
1153 ep->to = ep1->to;
1154 value_p = (targetm.can_eliminate (ep->from, ep->to)
1155 && ! (ep->to == STACK_POINTER_REGNUM
1156 && frame_pointer_needed
1157 && (! SUPPORTS_STACK_ALIGNMENT
1158 || ! stack_realign_fp)));
1159 setup_can_eliminate (ep, value_p);
1161 #else
1162 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1163 reg_eliminate[0].from = reg_eliminate_1[0].from;
1164 reg_eliminate[0].to = reg_eliminate_1[0].to;
1165 setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
1166 #endif
1168 /* Count the number of eliminable registers and build the FROM and TO
1169 REG rtx's. Note that code in gen_rtx_REG will cause, e.g.,
1170 gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
1171 We depend on this. */
1172 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1174 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1175 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1176 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1180 /* Entry function for initialization of elimination once per
1181 function. */
1182 void
1183 lra_init_elimination (void)
1185 basic_block bb;
1186 rtx insn;
1188 init_elim_table ();
1189 FOR_EACH_BB (bb)
1190 FOR_BB_INSNS (bb, insn)
1191 if (NONDEBUG_INSN_P (insn))
1192 mark_not_eliminable (PATTERN (insn));
1193 setup_elimination_map ();
1196 /* Eliminate hard reg given by its location LOC. */
1197 void
1198 lra_eliminate_reg_if_possible (rtx *loc)
1200 int regno;
1201 struct elim_table *ep;
1203 lra_assert (REG_P (*loc));
1204 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1205 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1206 return;
1207 if ((ep = get_elimination (*loc)) != NULL)
1208 *loc = ep->to_rtx;
1211 /* Do (final if FINAL_P) elimination in INSN. Add the insn for
1212 subsequent processing in the constraint pass, update the insn info. */
1213 static void
1214 process_insn_for_elimination (rtx insn, bool final_p)
1216 eliminate_regs_in_insn (insn, final_p);
1217 if (! final_p)
1219 /* Check that insn changed its code. This is a case when a move
1220 insn becomes an add insn and we do not want to process the
1221 insn as a move anymore. */
1222 int icode = recog (PATTERN (insn), insn, 0);
1224 if (icode >= 0 && icode != INSN_CODE (insn))
1226 INSN_CODE (insn) = icode;
1227 lra_update_insn_recog_data (insn);
1229 lra_update_insn_regno_info (insn);
1230 lra_push_insn (insn);
1231 lra_set_used_insn_alternative (insn, -1);
1235 /* Entry function to do final elimination if FINAL_P or to update
1236 elimination register offsets. */
1237 void
1238 lra_eliminate (bool final_p)
1240 int i;
1241 unsigned int uid;
1242 rtx mem_loc, invariant;
1243 bitmap_head insns_with_changed_offsets;
1244 bitmap_iterator bi;
1245 struct elim_table *ep;
1246 int regs_num = max_reg_num ();
1248 timevar_push (TV_LRA_ELIMINATE);
1250 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1251 if (final_p)
1253 #ifdef ENABLE_CHECKING
1254 update_reg_eliminate (&insns_with_changed_offsets);
1255 if (! bitmap_empty_p (&insns_with_changed_offsets))
1256 gcc_unreachable ();
1257 #endif
1258 /* We change eliminable hard registers in insns so we should do
1259 this for all insns containing any eliminable hard
1260 register. */
1261 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1262 if (elimination_map[ep->from] != NULL)
1263 bitmap_ior_into (&insns_with_changed_offsets,
1264 &lra_reg_info[ep->from].insn_bitmap);
1266 else
1268 update_reg_eliminate (&insns_with_changed_offsets);
1269 if (bitmap_empty_p (&insns_with_changed_offsets))
1270 goto lra_eliminate_done;
1272 if (lra_dump_file != NULL)
1274 fprintf (lra_dump_file, "New elimination table:\n");
1275 print_elim_table (lra_dump_file);
1277 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
1278 if (lra_reg_info[i].nrefs != 0)
1280 mem_loc = ira_reg_equiv[i].memory;
1281 if (mem_loc != NULL_RTX)
1282 mem_loc = lra_eliminate_regs_1 (mem_loc, VOIDmode,
1283 final_p, ! final_p, false);
1284 ira_reg_equiv[i].memory = mem_loc;
1285 invariant = ira_reg_equiv[i].invariant;
1286 if (invariant != NULL_RTX)
1287 invariant = lra_eliminate_regs_1 (invariant, VOIDmode,
1288 final_p, ! final_p, false);
1289 ira_reg_equiv[i].invariant = invariant;
1290 if (lra_dump_file != NULL
1291 && (mem_loc != NULL_RTX || invariant != NULL))
1292 fprintf (lra_dump_file,
1293 "Updating elimination of equiv for reg %d\n", i);
1295 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1296 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, final_p);
1297 bitmap_clear (&insns_with_changed_offsets);
1299 lra_eliminate_done:
1300 timevar_pop (TV_LRA_ELIMINATE);