1 /* ACLE builtin definitions for ARM.
2 Copyright (C
) 2016-2017 Free Software Foundation
, Inc.
3 Contributed by ARM Ltd.
5 This file is part of GCC.
7 GCC is free software
; you can redistribute it and
/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation
; either version
3, or (at your
10 option
) any later version.
12 GCC is distributed in the hope that it will be useful
, but WITHOUT
13 ANY WARRANTY
; without even the implied warranty of MERCHANTABILITY
14 or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC
; see the file COPYING3. If not see
19 <http
://www.gnu.org
/licenses
/>.
*/
21 VAR1 (UBINOP
, crc32b
, si
)
22 VAR1 (UBINOP
, crc32h
, si
)
23 VAR1 (UBINOP
, crc32w
, si
)
24 VAR1 (UBINOP
, crc32cb
, si
)
25 VAR1 (UBINOP
, crc32ch
, si
)
26 VAR1 (UBINOP
, crc32cw
, si
)
28 VAR1 (CDP
, cdp2
, void
)
30 VAR1 (LDC
, ldc2
, void
)
31 VAR1 (LDC
, ldcl
, void
)
32 VAR1 (LDC
, ldc2l
, void
)
34 VAR1 (STC
, stc2
, void
)
35 VAR1 (STC
, stcl
, void
)
36 VAR1 (STC
, stc2l
, void
)
38 VAR1 (MCR
, mcr2
, void
)
41 VAR1 (MCRR
, mcrr
, void
)
42 VAR1 (MCRR
, mcrr2
, void
)
44 VAR1 (MRRC
, mrrc2
, di
)