* gcc.dg/arm-asm.c: Run this test on ARM chips, not SPARC. Use
[official-gcc.git] / gcc / regs.h
blob0b35f07dee0aab1949b98a220154c5cf08a81a91
1 /* Define per-register tables for data flow info and register allocation.
2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
23 #include "varray.h"
25 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
27 /* When you only have the mode of a pseudo register before it has a hard
28 register chosen for it, this reports the size of each hard register
29 a pseudo in such a mode would get allocated to. A target may
30 override this. */
32 #ifndef REGMODE_NATURAL_SIZE
33 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
34 #endif
36 #ifndef SMALL_REGISTER_CLASSES
37 #define SMALL_REGISTER_CLASSES 0
38 #endif
40 /* Maximum register number used in this function, plus one. */
42 extern int max_regno;
44 /* Register information indexed by register number */
45 typedef struct reg_info_def
46 { /* fields set by reg_scan */
47 int first_uid; /* UID of first insn to use (REG n) */
48 int last_uid; /* UID of last insn to use (REG n) */
49 int last_note_uid; /* UID of last note to use (REG n) */
51 /* fields set by reg_scan & flow_analysis */
52 int sets; /* # of times (REG n) is set */
54 /* fields set by flow_analysis */
55 int refs; /* # of times (REG n) is used or set */
56 int freq; /* # estimated frequency (REG n) is used or set */
57 int deaths; /* # of times (REG n) dies */
58 int live_length; /* # of instructions (REG n) is live */
59 int calls_crossed; /* # of calls (REG n) is live across */
60 int basic_block; /* # of basic blocks (REG n) is used in */
61 char changes_mode; /* whether (SUBREG (REG n)) exists and
62 is illegal. */
63 } reg_info;
65 extern varray_type reg_n_info;
67 /* Indexed by n, gives number of times (REG n) is used or set. */
69 #define REG_N_REFS(N) (VARRAY_REG (reg_n_info, N)->refs)
71 /* Estimate frequency of references to register N. */
73 #define REG_FREQ(N) (VARRAY_REG (reg_n_info, N)->freq)
75 /* The weights for each insn varries from 0 to REG_FREQ_BASE.
76 This constant does not need to be high, as in infrequently executed
77 regions we want to count instructions equivalently to optimize for
78 size instead of speed. */
79 #define REG_FREQ_MAX 1000
81 /* Compute register frequency from the BB frequency. When optimizing for size,
82 or profile driven feedback is available and the function is never executed,
83 frequency is always equivalent. Otherwise rescale the basic block
84 frequency. */
85 #define REG_FREQ_FROM_BB(bb) (optimize_size \
86 || (flag_branch_probabilities \
87 && !ENTRY_BLOCK_PTR->count) \
88 ? REG_FREQ_MAX \
89 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
90 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
91 : 1)
93 /* Indexed by n, gives number of times (REG n) is set.
94 ??? both regscan and flow allocate space for this. We should settle
95 on just copy. */
97 #define REG_N_SETS(N) (VARRAY_REG (reg_n_info, N)->sets)
99 /* Indexed by N, gives number of insns in which register N dies.
100 Note that if register N is live around loops, it can die
101 in transitions between basic blocks, and that is not counted here.
102 So this is only a reliable indicator of how many regions of life there are
103 for registers that are contained in one basic block. */
105 #define REG_N_DEATHS(N) (VARRAY_REG (reg_n_info, N)->deaths)
107 /* Indexed by N; says whether a pseudo register N was ever used
108 within a SUBREG that changes the mode of the reg in some way
109 that is illegal for a given class (usually floating-point)
110 of registers. */
112 #define REG_CHANGES_MODE(N) (VARRAY_REG (reg_n_info, N)->changes_mode)
114 /* Get the number of consecutive words required to hold pseudo-reg N. */
116 #define PSEUDO_REGNO_SIZE(N) \
117 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
118 / UNITS_PER_WORD)
120 /* Get the number of bytes required to hold pseudo-reg N. */
122 #define PSEUDO_REGNO_BYTES(N) \
123 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
125 /* Get the machine mode of pseudo-reg N. */
127 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
129 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
131 #define REG_N_CALLS_CROSSED(N) (VARRAY_REG (reg_n_info, N)->calls_crossed)
133 /* Total number of instructions at which (REG n) is live.
134 The larger this is, the less priority (REG n) gets for
135 allocation in a hard register (in global-alloc).
136 This is set in flow.c and remains valid for the rest of the compilation
137 of the function; it is used to control register allocation.
139 local-alloc.c may alter this number to change the priority.
141 Negative values are special.
142 -1 is used to mark a pseudo reg which has a constant or memory equivalent
143 and is used infrequently enough that it should not get a hard register.
144 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
145 is not required. global.c makes an allocno for this but does
146 not try to assign a hard register to it. */
148 #define REG_LIVE_LENGTH(N) (VARRAY_REG (reg_n_info, N)->live_length)
150 /* Vector of substitutions of register numbers,
151 used to map pseudo regs into hardware regs.
153 This can't be folded into reg_n_info without changing all of the
154 machine dependent directories, since the reload functions
155 in the machine dependent files access it. */
157 extern short *reg_renumber;
159 /* Vector indexed by hardware reg
160 saying whether that reg is ever used. */
162 extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
164 /* Vector indexed by hardware reg giving its name. */
166 extern const char * reg_names[FIRST_PSEUDO_REGISTER];
168 /* For each hard register, the widest mode object that it can contain.
169 This will be a MODE_INT mode if the register can hold integers. Otherwise
170 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
171 register. */
173 extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
175 /* Vector indexed by regno; gives uid of first insn using that reg.
176 This is computed by reg_scan for use by cse and loop.
177 It is sometimes adjusted for subsequent changes during loop,
178 but not adjusted by cse even if cse invalidates it. */
180 #define REGNO_FIRST_UID(N) (VARRAY_REG (reg_n_info, N)->first_uid)
182 /* Vector indexed by regno; gives uid of last insn using that reg.
183 This is computed by reg_scan for use by cse and loop.
184 It is sometimes adjusted for subsequent changes during loop,
185 but not adjusted by cse even if cse invalidates it.
186 This is harmless since cse won't scan through a loop end. */
188 #define REGNO_LAST_UID(N) (VARRAY_REG (reg_n_info, N)->last_uid)
190 /* Similar, but includes insns that mention the reg in their notes. */
192 #define REGNO_LAST_NOTE_UID(N) (VARRAY_REG (reg_n_info, N)->last_note_uid)
194 /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
195 that have to go in the same hard reg. */
196 extern rtx regs_may_share;
198 /* Flag set by local-alloc or global-alloc if they decide to allocate
199 something in a call-clobbered register. */
201 extern int caller_save_needed;
203 /* Predicate to decide whether to give a hard reg to a pseudo which
204 is referenced REFS times and would need to be saved and restored
205 around a call CALLS times. */
207 #ifndef CALLER_SAVE_PROFITABLE
208 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
209 #endif
211 /* On most machines a register class is likely to be spilled if it
212 only has one register. */
213 #ifndef CLASS_LIKELY_SPILLED_P
214 #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
215 #endif
217 /* Select a register mode required for caller save of hard regno REGNO. */
218 #ifndef HARD_REGNO_CALLER_SAVE_MODE
219 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
220 choose_hard_reg_mode (REGNO, NREGS)
221 #endif
223 /* Registers that get partially clobbered by a call in a given mode.
224 These must not be call used registers. */
225 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
226 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
227 #endif
229 /* Allocate reg_n_info tables */
230 extern void allocate_reg_info PARAMS ((size_t, int, int));