1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2024 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-iterator.h"
64 #include "gimple-fold.h"
65 #include "rtx-vector-builder.h"
66 #include "tree-pretty-print.h"
70 /* If this is nonzero, we do not bother generating VOLATILE
71 around volatile memory references, and we are willing to
72 output indirect addresses. If cse is to follow, we reject
73 indirect addresses so a useful potential cse is generated;
74 if it is used only once, instruction combination will produce
75 the same indirect address eventually. */
78 static bool block_move_libcall_safe_for_call_parm (void);
79 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
80 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
81 unsigned HOST_WIDE_INT
,
82 unsigned HOST_WIDE_INT
, bool);
83 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned, int);
84 static void emit_block_move_via_sized_loop (rtx
, rtx
, rtx
, unsigned, unsigned);
85 static void emit_block_move_via_oriented_loop (rtx
, rtx
, rtx
, unsigned, unsigned);
86 static rtx
emit_block_cmp_via_loop (rtx
, rtx
, rtx
, tree
, rtx
, bool,
88 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
89 static rtx_insn
*compress_float_constant (rtx
, rtx
);
90 static rtx
get_subtarget (rtx
);
91 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
92 machine_mode
, tree
, alias_set_type
, bool, bool);
94 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
96 static bool is_aligning_offset (const_tree
, const_tree
);
97 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
98 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
100 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
102 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
103 profile_probability
);
104 static rtx
const_vector_from_tree (tree
);
105 static tree
tree_expr_size (const_tree
);
106 static void convert_mode_scalar (rtx
, rtx
, int);
109 /* This is run to set up which modes can be used
110 directly in memory and to initialize the block move optab. It is run
111 at the beginning of compilation and when the target is reinitialized. */
114 init_expr_target (void)
121 /* Try indexing by frame ptr and try by stack ptr.
122 It is known that on the Convex the stack ptr isn't a valid index.
123 With luck, one or the other is valid on any machine. */
124 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
125 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
127 /* A scratch register we can modify in-place below to avoid
128 useless RTL allocations. */
129 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
131 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
132 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
133 PATTERN (insn
) = pat
;
135 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
136 mode
= (machine_mode
) ((int) mode
+ 1))
140 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
141 PUT_MODE (mem
, mode
);
142 PUT_MODE (mem1
, mode
);
144 /* See if there is some register that can be used in this mode and
145 directly loaded or stored from memory. */
147 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
148 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
149 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
152 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
155 set_mode_and_regno (reg
, mode
, regno
);
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
162 SET_SRC (pat
) = mem1
;
163 SET_DEST (pat
) = reg
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_load
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
173 SET_DEST (pat
) = mem1
;
174 if (recog (pat
, insn
, &num_clobbers
) >= 0)
175 direct_store
[(int) mode
] = 1;
179 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
181 opt_scalar_float_mode mode_iter
;
182 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
184 scalar_float_mode mode
= mode_iter
.require ();
185 scalar_float_mode srcmode
;
186 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
190 ic
= can_extend_p (mode
, srcmode
, 0);
191 if (ic
== CODE_FOR_nothing
)
194 PUT_MODE (mem
, srcmode
);
196 if (insn_operand_matches (ic
, 1, mem
))
197 float_extend_from_mem
[mode
][srcmode
] = true;
202 /* This is run at the start of compiling a function. */
207 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
210 /* Copy data from FROM to TO, where the machine modes are not the same.
211 Both modes may be integer, or both may be floating, or both may be
213 UNSIGNEDP should be nonzero if FROM is an unsigned type.
214 This causes zero-extension instead of sign-extension. */
217 convert_move (rtx to
, rtx from
, int unsignedp
)
219 machine_mode to_mode
= GET_MODE (to
);
220 machine_mode from_mode
= GET_MODE (from
);
222 gcc_assert (to_mode
!= BLKmode
);
223 gcc_assert (from_mode
!= BLKmode
);
225 /* If the source and destination are already the same, then there's
230 /* If FROM is a SUBREG that indicates that we have already done at least
231 the required extension, strip it. We don't handle such SUBREGs as
234 scalar_int_mode to_int_mode
;
235 if (GET_CODE (from
) == SUBREG
236 && SUBREG_PROMOTED_VAR_P (from
)
237 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
238 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
239 >= GET_MODE_PRECISION (to_int_mode
))
240 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
242 scalar_int_mode int_orig_mode
;
243 scalar_int_mode int_inner_mode
;
244 machine_mode orig_mode
= GET_MODE (from
);
246 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
247 from_mode
= to_int_mode
;
249 /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
250 the original mode, but narrower than the inner mode. */
251 if (GET_CODE (from
) == SUBREG
252 && is_a
<scalar_int_mode
> (orig_mode
, &int_orig_mode
)
253 && GET_MODE_PRECISION (to_int_mode
)
254 > GET_MODE_PRECISION (int_orig_mode
)
255 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (from
)),
257 && GET_MODE_PRECISION (int_inner_mode
)
258 > GET_MODE_PRECISION (to_int_mode
))
260 SUBREG_PROMOTED_VAR_P (from
) = 1;
261 SUBREG_PROMOTED_SET (from
, unsignedp
);
265 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
267 if (to_mode
== from_mode
268 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
270 emit_move_insn (to
, from
);
274 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
276 if (GET_MODE_UNIT_PRECISION (to_mode
)
277 > GET_MODE_UNIT_PRECISION (from_mode
))
279 optab op
= unsignedp
? zext_optab
: sext_optab
;
280 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
281 if (icode
!= CODE_FOR_nothing
)
283 emit_unop_insn (icode
, to
, from
,
284 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
289 if (GET_MODE_UNIT_PRECISION (to_mode
)
290 < GET_MODE_UNIT_PRECISION (from_mode
))
292 insn_code icode
= convert_optab_handler (trunc_optab
,
294 if (icode
!= CODE_FOR_nothing
)
296 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
301 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
302 GET_MODE_BITSIZE (to_mode
)));
304 if (VECTOR_MODE_P (to_mode
))
305 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
307 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
309 emit_move_insn (to
, from
);
313 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
315 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
316 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
320 convert_mode_scalar (to
, from
, unsignedp
);
323 /* Like convert_move, but deals only with scalar modes. */
326 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
328 /* Both modes should be scalar types. */
329 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
330 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
331 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
332 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
336 gcc_assert (to_real
== from_real
);
338 /* rtx code for making an equivalent value. */
339 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
340 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
348 gcc_assert ((GET_MODE_PRECISION (from_mode
)
349 != GET_MODE_PRECISION (to_mode
))
350 || (DECIMAL_FLOAT_MODE_P (from_mode
)
351 != DECIMAL_FLOAT_MODE_P (to_mode
))
352 || (REAL_MODE_FORMAT (from_mode
) == &arm_bfloat_half_format
353 && REAL_MODE_FORMAT (to_mode
) == &ieee_half_format
)
354 || (REAL_MODE_FORMAT (to_mode
) == &arm_bfloat_half_format
355 && REAL_MODE_FORMAT (from_mode
) == &ieee_half_format
));
357 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
358 /* Conversion between decimal float and binary float, same size. */
359 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
360 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
365 /* Try converting directly if the insn is supported. */
367 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
368 if (code
!= CODE_FOR_nothing
)
370 emit_unop_insn (code
, to
, from
,
371 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
376 if (REAL_MODE_FORMAT (from_mode
) == &arm_bfloat_half_format
377 && REAL_MODE_FORMAT (SFmode
) == &ieee_single_format
)
379 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (SFmode
))
381 /* To cut down on libgcc size, implement
382 BFmode -> {DF,XF,TF}mode conversions by
383 BFmode -> SFmode -> {DF,XF,TF}mode conversions. */
384 rtx temp
= gen_reg_rtx (SFmode
);
385 convert_mode_scalar (temp
, from
, unsignedp
);
386 convert_mode_scalar (to
, temp
, unsignedp
);
389 if (REAL_MODE_FORMAT (to_mode
) == &ieee_half_format
)
391 /* Similarly, implement BFmode -> HFmode as
392 BFmode -> SFmode -> HFmode conversion where SFmode
393 has superset of BFmode values. We don't need
394 to handle sNaNs by raising exception and turning
395 into into qNaN though, as that can be done in the
396 SFmode -> HFmode conversion too. */
397 rtx temp
= gen_reg_rtx (SFmode
);
398 int save_flag_finite_math_only
= flag_finite_math_only
;
399 flag_finite_math_only
= true;
400 convert_mode_scalar (temp
, from
, unsignedp
);
401 flag_finite_math_only
= save_flag_finite_math_only
;
402 convert_mode_scalar (to
, temp
, unsignedp
);
405 if (to_mode
== SFmode
406 && !HONOR_NANS (from_mode
)
407 && !HONOR_NANS (to_mode
)
408 && optimize_insn_for_speed_p ())
410 /* If we don't expect sNaNs, for BFmode -> SFmode we can just
411 shift the bits up. */
412 machine_mode fromi_mode
, toi_mode
;
413 if (int_mode_for_size (GET_MODE_BITSIZE (from_mode
),
414 0).exists (&fromi_mode
)
415 && int_mode_for_size (GET_MODE_BITSIZE (to_mode
),
416 0).exists (&toi_mode
))
419 rtx fromi
= lowpart_subreg (fromi_mode
, from
, from_mode
);
424 if (GET_MODE (fromi
) == VOIDmode
)
425 toi
= simplify_unary_operation (ZERO_EXTEND
, toi_mode
,
429 toi
= gen_reg_rtx (toi_mode
);
430 convert_mode_scalar (toi
, fromi
, 1);
433 = maybe_expand_shift (LSHIFT_EXPR
, toi_mode
, toi
,
434 GET_MODE_PRECISION (to_mode
)
435 - GET_MODE_PRECISION (from_mode
),
439 tof
= lowpart_subreg (to_mode
, toi
, toi_mode
);
441 emit_move_insn (to
, tof
);
444 insns
= get_insns ();
454 if (REAL_MODE_FORMAT (from_mode
) == &ieee_single_format
455 && REAL_MODE_FORMAT (to_mode
) == &arm_bfloat_half_format
456 && !HONOR_NANS (from_mode
)
457 && !HONOR_NANS (to_mode
)
458 && !flag_rounding_math
459 && optimize_insn_for_speed_p ())
461 /* If we don't expect qNaNs nor sNaNs and can assume rounding
462 to nearest, we can expand the conversion inline as
463 (fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16. */
464 machine_mode fromi_mode
, toi_mode
;
465 if (int_mode_for_size (GET_MODE_BITSIZE (from_mode
),
466 0).exists (&fromi_mode
)
467 && int_mode_for_size (GET_MODE_BITSIZE (to_mode
),
468 0).exists (&toi_mode
))
471 rtx fromi
= lowpart_subreg (fromi_mode
, from
, from_mode
);
477 int shift
= (GET_MODE_PRECISION (from_mode
)
478 - GET_MODE_PRECISION (to_mode
));
480 = maybe_expand_shift (RSHIFT_EXPR
, fromi_mode
, fromi
,
485 = expand_binop (fromi_mode
, and_optab
, temp1
, const1_rtx
,
486 NULL_RTX
, 1, OPTAB_DIRECT
);
490 = expand_binop (fromi_mode
, add_optab
, fromi
,
491 gen_int_mode ((HOST_WIDE_INT_1U
493 fromi_mode
), NULL_RTX
,
498 = expand_binop (fromi_mode
, add_optab
, temp3
, temp2
,
499 NULL_RTX
, 1, OPTAB_DIRECT
);
502 rtx temp5
= maybe_expand_shift (RSHIFT_EXPR
, fromi_mode
,
503 temp4
, shift
, NULL_RTX
, 1);
506 rtx temp6
= lowpart_subreg (toi_mode
, temp5
, fromi_mode
);
509 tof
= lowpart_subreg (to_mode
, force_reg (toi_mode
, temp6
),
512 emit_move_insn (to
, tof
);
515 insns
= get_insns ();
526 /* Otherwise use a libcall. */
527 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
529 /* Is this conversion implemented yet? */
530 gcc_assert (libcall
);
533 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
535 insns
= get_insns ();
537 emit_libcall_block (insns
, to
, value
,
538 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
540 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
544 /* Handle pointer conversion. */ /* SPEE 900220. */
545 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
549 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
556 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
559 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
565 /* Targets are expected to provide conversion insns between PxImode and
566 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
567 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
569 scalar_int_mode full_mode
570 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
572 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
573 != CODE_FOR_nothing
);
575 if (full_mode
!= from_mode
)
576 from
= convert_to_mode (full_mode
, from
, unsignedp
);
577 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
581 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
584 scalar_int_mode full_mode
585 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
586 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
587 enum insn_code icode
;
589 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
590 gcc_assert (icode
!= CODE_FOR_nothing
);
592 if (to_mode
== full_mode
)
594 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
598 new_from
= gen_reg_rtx (full_mode
);
599 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
601 /* else proceed to integer conversions below. */
602 from_mode
= full_mode
;
606 /* Make sure both are fixed-point modes or both are not. */
607 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
608 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
609 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
611 /* If we widen from_mode to to_mode and they are in the same class,
612 we won't saturate the result.
613 Otherwise, always saturate the result to play safe. */
614 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
615 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
616 expand_fixed_convert (to
, from
, 0, 0);
618 expand_fixed_convert (to
, from
, 0, 1);
622 /* Now both modes are integers. */
624 /* Handle expanding beyond a word. */
625 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
626 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
633 scalar_mode lowpart_mode
;
634 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
636 /* Try converting directly if the insn is supported. */
637 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
640 /* If FROM is a SUBREG, put it into a register. Do this
641 so that we always generate the same set of insns for
642 better cse'ing; if an intermediate assignment occurred,
643 we won't be doing the operation directly on the SUBREG. */
644 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
645 from
= force_reg (from_mode
, from
);
646 emit_unop_insn (code
, to
, from
, equiv_code
);
649 /* Next, try converting via full word. */
650 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
651 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
652 != CODE_FOR_nothing
))
654 rtx word_to
= gen_reg_rtx (word_mode
);
657 if (reg_overlap_mentioned_p (to
, from
))
658 from
= force_reg (from_mode
, from
);
661 convert_move (word_to
, from
, unsignedp
);
662 emit_unop_insn (code
, to
, word_to
, equiv_code
);
666 /* No special multiword conversion insn; do it by hand. */
669 /* Since we will turn this into a no conflict block, we must ensure
670 the source does not overlap the target so force it into an isolated
671 register when maybe so. Likewise for any MEM input, since the
672 conversion sequence might require several references to it and we
673 must ensure we're getting the same value every time. */
675 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
676 from
= force_reg (from_mode
, from
);
678 /* Get a copy of FROM widened to a word, if necessary. */
679 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
680 lowpart_mode
= word_mode
;
682 lowpart_mode
= from_mode
;
684 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
686 lowpart
= gen_lowpart (lowpart_mode
, to
);
687 emit_move_insn (lowpart
, lowfrom
);
689 /* Compute the value to put in each remaining word. */
691 fill_value
= const0_rtx
;
693 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
694 LT
, lowfrom
, const0_rtx
,
695 lowpart_mode
, 0, -1);
697 /* Fill the remaining words. */
698 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
700 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
701 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
703 gcc_assert (subword
);
705 if (fill_value
!= subword
)
706 emit_move_insn (subword
, fill_value
);
709 insns
= get_insns ();
716 /* Truncating multi-word to a word or less. */
717 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
718 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
721 && ! MEM_VOLATILE_P (from
)
722 && direct_load
[(int) to_mode
]
723 && ! mode_dependent_address_p (XEXP (from
, 0),
724 MEM_ADDR_SPACE (from
)))
726 || GET_CODE (from
) == SUBREG
))
727 from
= force_reg (from_mode
, from
);
728 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
732 /* Now follow all the conversions between integers
733 no more than a word long. */
735 /* For truncation, usually we can just refer to FROM in a narrower mode. */
736 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
737 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
740 && ! MEM_VOLATILE_P (from
)
741 && direct_load
[(int) to_mode
]
742 && ! mode_dependent_address_p (XEXP (from
, 0),
743 MEM_ADDR_SPACE (from
)))
745 || GET_CODE (from
) == SUBREG
))
746 from
= force_reg (from_mode
, from
);
747 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
748 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
749 from
= copy_to_reg (from
);
750 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
754 /* Handle extension. */
755 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
757 /* Convert directly if that works. */
758 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
761 emit_unop_insn (code
, to
, from
, equiv_code
);
769 /* Search for a mode to convert via. */
770 opt_scalar_mode intermediate_iter
;
771 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
773 scalar_mode intermediate
= intermediate_iter
.require ();
774 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
776 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
777 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
779 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
780 != CODE_FOR_nothing
))
782 convert_move (to
, convert_to_mode (intermediate
, from
,
783 unsignedp
), unsignedp
);
788 /* No suitable intermediate mode.
789 Generate what we need with shifts. */
790 shift_amount
= (GET_MODE_PRECISION (to_mode
)
791 - GET_MODE_PRECISION (from_mode
));
792 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
793 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
795 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
798 emit_move_insn (to
, tmp
);
803 /* Support special truncate insns for certain modes. */
804 if (convert_optab_handler (trunc_optab
, to_mode
,
805 from_mode
) != CODE_FOR_nothing
)
807 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
812 /* Handle truncation of volatile memrefs, and so on;
813 the things that couldn't be truncated directly,
814 and for which there was no special instruction.
816 ??? Code above formerly short-circuited this, for most integer
817 mode pairs, with a force_reg in from_mode followed by a recursive
818 call to this routine. Appears always to have been wrong. */
819 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
821 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
822 emit_move_insn (to
, temp
);
826 /* Mode combination is not recognized. */
830 /* Return an rtx for a value that would result
831 from converting X to mode MODE.
832 Both X and MODE may be floating, or both integer.
833 UNSIGNEDP is nonzero if X is an unsigned value.
834 This can be done by referring to a part of X in place
835 or by copying to a new temporary with conversion. */
838 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
840 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
843 /* Return an rtx for a value that would result
844 from converting X from mode OLDMODE to mode MODE.
845 Both modes may be floating, or both integer.
846 UNSIGNEDP is nonzero if X is an unsigned value.
848 This can be done by referring to a part of X in place
849 or by copying to a new temporary with conversion.
851 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
854 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
857 scalar_int_mode int_mode
;
859 /* If FROM is a SUBREG that indicates that we have already done at least
860 the required extension, strip it. */
862 if (GET_CODE (x
) == SUBREG
863 && SUBREG_PROMOTED_VAR_P (x
)
864 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
865 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
866 >= GET_MODE_PRECISION (int_mode
))
867 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
869 scalar_int_mode int_orig_mode
;
870 scalar_int_mode int_inner_mode
;
871 machine_mode orig_mode
= GET_MODE (x
);
872 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
874 /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
875 the original mode, but narrower than the inner mode. */
876 if (GET_CODE (x
) == SUBREG
877 && is_a
<scalar_int_mode
> (orig_mode
, &int_orig_mode
)
878 && GET_MODE_PRECISION (int_mode
)
879 > GET_MODE_PRECISION (int_orig_mode
)
880 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (x
)),
882 && GET_MODE_PRECISION (int_inner_mode
)
883 > GET_MODE_PRECISION (int_mode
))
885 SUBREG_PROMOTED_VAR_P (x
) = 1;
886 SUBREG_PROMOTED_SET (x
, unsignedp
);
890 if (GET_MODE (x
) != VOIDmode
)
891 oldmode
= GET_MODE (x
);
896 if (CONST_SCALAR_INT_P (x
)
897 && is_a
<scalar_int_mode
> (mode
, &int_mode
))
899 /* If the caller did not tell us the old mode, then there is not
900 much to do with respect to canonicalization. We have to
901 assume that all the bits are significant. */
902 if (!is_a
<scalar_int_mode
> (oldmode
))
903 oldmode
= MAX_MODE_INT
;
904 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
905 GET_MODE_PRECISION (int_mode
),
906 unsignedp
? UNSIGNED
: SIGNED
);
907 return immed_wide_int_const (w
, int_mode
);
910 /* We can do this with a gen_lowpart if both desired and current modes
911 are integer, and this is either a constant integer, a register, or a
913 scalar_int_mode int_oldmode
;
914 if (is_int_mode (mode
, &int_mode
)
915 && is_int_mode (oldmode
, &int_oldmode
)
916 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
917 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
918 || CONST_POLY_INT_P (x
)
920 && (!HARD_REGISTER_P (x
)
921 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
922 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
923 return gen_lowpart (int_mode
, x
);
925 /* Converting from integer constant into mode is always equivalent to an
927 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
929 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
930 GET_MODE_BITSIZE (oldmode
)));
931 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
934 temp
= gen_reg_rtx (mode
);
935 convert_move (temp
, x
, unsignedp
);
939 /* Variant of convert_modes for ABI parameter passing/return.
940 Return an rtx for a value that would result from converting X from
941 a floating point mode FMODE to wider integer mode MODE. */
944 convert_float_to_wider_int (machine_mode mode
, machine_mode fmode
, rtx x
)
946 gcc_assert (SCALAR_INT_MODE_P (mode
) && SCALAR_FLOAT_MODE_P (fmode
));
947 scalar_int_mode tmp_mode
= int_mode_for_mode (fmode
).require ();
948 rtx tmp
= force_reg (tmp_mode
, gen_lowpart (tmp_mode
, x
));
949 return convert_modes (mode
, tmp_mode
, tmp
, 1);
952 /* Variant of convert_modes for ABI parameter passing/return.
953 Return an rtx for a value that would result from converting X from
954 an integer mode IMODE to a narrower floating point mode MODE. */
957 convert_wider_int_to_float (machine_mode mode
, machine_mode imode
, rtx x
)
959 gcc_assert (SCALAR_FLOAT_MODE_P (mode
) && SCALAR_INT_MODE_P (imode
));
960 scalar_int_mode tmp_mode
= int_mode_for_mode (mode
).require ();
961 rtx tmp
= force_reg (tmp_mode
, gen_lowpart (tmp_mode
, x
));
962 return gen_lowpart_SUBREG (mode
, tmp
);
965 /* Return the largest alignment we can use for doing a move (or store)
966 of MAX_PIECES. ALIGN is the largest alignment we could use. */
969 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
971 scalar_int_mode tmode
972 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 0).require ();
974 if (align
>= GET_MODE_ALIGNMENT (tmode
))
975 align
= GET_MODE_ALIGNMENT (tmode
);
978 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
979 opt_scalar_int_mode mode_iter
;
980 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
982 tmode
= mode_iter
.require ();
983 if (GET_MODE_SIZE (tmode
) > max_pieces
984 || targetm
.slow_unaligned_access (tmode
, align
))
989 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
995 /* Return true if we know how to implement OP using vectors of bytes. */
997 can_use_qi_vectors (by_pieces_operation op
)
999 return (op
== COMPARE_BY_PIECES
1000 || op
== SET_BY_PIECES
1001 || op
== CLEAR_BY_PIECES
);
1004 /* Return true if optabs exists for the mode and certain by pieces
1007 by_pieces_mode_supported_p (fixed_size_mode mode
, by_pieces_operation op
)
1009 if (optab_handler (mov_optab
, mode
) == CODE_FOR_nothing
)
1012 if ((op
== SET_BY_PIECES
|| op
== CLEAR_BY_PIECES
)
1013 && VECTOR_MODE_P (mode
)
1014 && optab_handler (vec_duplicate_optab
, mode
) == CODE_FOR_nothing
)
1017 if (op
== COMPARE_BY_PIECES
1018 && !can_compare_p (EQ
, mode
, ccp_jump
))
1024 /* Return the widest mode that can be used to perform part of an
1025 operation OP on SIZE bytes. Try to use QI vector modes where
1027 static fixed_size_mode
1028 widest_fixed_size_mode_for_size (unsigned int size
, by_pieces_operation op
)
1030 fixed_size_mode result
= NARROWEST_INT_MODE
;
1032 gcc_checking_assert (size
> 1);
1034 /* Use QI vector only if size is wider than a WORD. */
1035 if (can_use_qi_vectors (op
) && size
> UNITS_PER_WORD
)
1038 fixed_size_mode candidate
;
1039 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_INT
)
1040 if (is_a
<fixed_size_mode
> (mode
, &candidate
)
1041 && GET_MODE_INNER (candidate
) == QImode
)
1043 if (GET_MODE_SIZE (candidate
) >= size
)
1045 if (by_pieces_mode_supported_p (candidate
, op
))
1049 if (result
!= NARROWEST_INT_MODE
)
1053 opt_scalar_int_mode tmode
;
1054 scalar_int_mode mode
;
1055 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
1057 mode
= tmode
.require ();
1058 if (GET_MODE_SIZE (mode
) < size
1059 && by_pieces_mode_supported_p (mode
, op
))
1066 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
1067 and should be performed piecewise. */
1070 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
1071 enum by_pieces_operation op
)
1073 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
1074 optimize_insn_for_speed_p ());
1077 /* Determine whether the LEN bytes can be moved by using several move
1078 instructions. Return nonzero if a call to move_by_pieces should
1082 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
1084 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
1087 /* Return number of insns required to perform operation OP by pieces
1088 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
1090 unsigned HOST_WIDE_INT
1091 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
1092 unsigned int max_size
, by_pieces_operation op
)
1094 unsigned HOST_WIDE_INT n_insns
= 0;
1095 fixed_size_mode mode
;
1097 if (targetm
.overlap_op_by_pieces_p ())
1099 /* NB: Round up L and ALIGN to the widest integer mode for
1101 mode
= widest_fixed_size_mode_for_size (max_size
, op
);
1102 gcc_assert (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
);
1103 unsigned HOST_WIDE_INT up
= ROUND_UP (l
, GET_MODE_SIZE (mode
));
1106 align
= GET_MODE_ALIGNMENT (mode
);
1109 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1111 while (max_size
> 1 && l
> 0)
1113 mode
= widest_fixed_size_mode_for_size (max_size
, op
);
1114 gcc_assert (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
);
1116 unsigned int modesize
= GET_MODE_SIZE (mode
);
1118 if (align
>= GET_MODE_ALIGNMENT (mode
))
1120 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
1125 n_insns
+= n_pieces
;
1128 case COMPARE_BY_PIECES
:
1129 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1130 int batch_ops
= 4 * batch
- 1;
1131 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
1132 n_insns
+= full
* batch_ops
;
1133 if (n_pieces
% batch
!= 0)
1139 max_size
= modesize
;
1146 /* Used when performing piecewise block operations, holds information
1147 about one of the memory objects involved. The member functions
1148 can be used to generate code for loading from the object and
1149 updating the address when iterating. */
1153 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
1156 /* The address of the object. Can differ from that seen in the
1157 MEM rtx if we copied the address to a register. */
1159 /* Nonzero if the address on the object has an autoincrement already,
1160 signifies whether that was an increment or decrement. */
1161 signed char m_addr_inc
;
1162 /* Nonzero if we intend to use autoinc without the address already
1163 having autoinc form. We will insert add insns around each memory
1164 reference, expecting later passes to form autoinc addressing modes.
1165 The only supported options are predecrement and postincrement. */
1166 signed char m_explicit_inc
;
1167 /* True if we have either of the two possible cases of using
1170 /* True if this is an address to be used for load operations rather
1174 /* Optionally, a function to obtain constants for any given offset into
1175 the objects, and data associated with it. */
1176 by_pieces_constfn m_constfn
;
1179 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
1180 rtx
adjust (fixed_size_mode
, HOST_WIDE_INT
, by_pieces_prev
* = nullptr);
1181 void increment_address (HOST_WIDE_INT
);
1182 void maybe_predec (HOST_WIDE_INT
);
1183 void maybe_postinc (HOST_WIDE_INT
);
1184 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
1191 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
1192 true if the operation to be performed on this object is a load
1193 rather than a store. For stores, OBJ can be NULL, in which case we
1194 assume the operation is a stack push. For loads, the optional
1195 CONSTFN and its associated CFNDATA can be used in place of the
1198 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
1200 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
1206 rtx addr
= XEXP (obj
, 0);
1207 rtx_code code
= GET_CODE (addr
);
1209 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
1210 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
1211 m_auto
= inc
|| dec
;
1213 m_addr_inc
= dec
? -1 : 1;
1215 /* While we have always looked for these codes here, the code
1216 implementing the memory operation has never handled them.
1217 Support could be added later if necessary or beneficial. */
1218 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
1226 if (STACK_GROWS_DOWNWARD
)
1232 gcc_assert (constfn
!= NULL
);
1236 gcc_assert (is_load
);
1239 /* Decide whether to use autoinc for an address involved in a memory op.
1240 MODE is the mode of the accesses, REVERSE is true if we've decided to
1241 perform the operation starting from the end, and LEN is the length of
1242 the operation. Don't override an earlier decision to set m_auto. */
1245 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
1248 if (m_auto
|| m_obj
== NULL_RTX
)
1251 bool use_predec
= (m_is_load
1252 ? USE_LOAD_PRE_DECREMENT (mode
)
1253 : USE_STORE_PRE_DECREMENT (mode
));
1254 bool use_postinc
= (m_is_load
1255 ? USE_LOAD_POST_INCREMENT (mode
)
1256 : USE_STORE_POST_INCREMENT (mode
));
1257 machine_mode addr_mode
= get_address_mode (m_obj
);
1259 if (use_predec
&& reverse
)
1261 m_addr
= copy_to_mode_reg (addr_mode
,
1262 plus_constant (addr_mode
,
1265 m_explicit_inc
= -1;
1267 else if (use_postinc
&& !reverse
)
1269 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
1273 else if (CONSTANT_P (m_addr
))
1274 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
1277 /* Adjust the address to refer to the data at OFFSET in MODE. If we
1278 are using autoincrement for this address, we don't add the offset,
1279 but we still modify the MEM's properties. */
1282 pieces_addr::adjust (fixed_size_mode mode
, HOST_WIDE_INT offset
,
1283 by_pieces_prev
*prev
)
1286 /* Pass the previous data to m_constfn. */
1287 return m_constfn (m_cfndata
, prev
, offset
, mode
);
1288 if (m_obj
== NULL_RTX
)
1291 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1293 return adjust_address (m_obj
, mode
, offset
);
1296 /* Emit an add instruction to increment the address by SIZE. */
1299 pieces_addr::increment_address (HOST_WIDE_INT size
)
1301 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1302 emit_insn (gen_add2_insn (m_addr
, amount
));
1305 /* If we are supposed to decrement the address after each access, emit code
1306 to do so now. Increment by SIZE (which has should have the correct sign
1310 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1312 if (m_explicit_inc
>= 0)
1314 gcc_assert (HAVE_PRE_DECREMENT
);
1315 increment_address (size
);
1318 /* If we are supposed to decrement the address after each access, emit code
1319 to do so now. Increment by SIZE. */
1322 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1324 if (m_explicit_inc
<= 0)
1326 gcc_assert (HAVE_POST_INCREMENT
);
1327 increment_address (size
);
1330 /* This structure is used by do_op_by_pieces to describe the operation
1333 class op_by_pieces_d
1336 fixed_size_mode
get_usable_mode (fixed_size_mode
, unsigned int);
1337 fixed_size_mode
smallest_fixed_size_mode_for_size (unsigned int);
1340 pieces_addr m_to
, m_from
;
1341 /* Make m_len read-only so that smallest_fixed_size_mode_for_size can
1342 use it to check the valid mode size. */
1343 const unsigned HOST_WIDE_INT m_len
;
1344 HOST_WIDE_INT m_offset
;
1345 unsigned int m_align
;
1346 unsigned int m_max_size
;
1348 /* True if this is a stack push. */
1350 /* True if targetm.overlap_op_by_pieces_p () returns true. */
1351 bool m_overlap_op_by_pieces
;
1352 /* The type of operation that we're performing. */
1353 by_pieces_operation m_op
;
1355 /* Virtual functions, overriden by derived classes for the specific
1357 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1358 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1359 virtual void finish_mode (machine_mode
)
1364 op_by_pieces_d (unsigned int, rtx
, bool, rtx
, bool, by_pieces_constfn
,
1365 void *, unsigned HOST_WIDE_INT
, unsigned int, bool,
1366 by_pieces_operation
);
1370 /* The constructor for an op_by_pieces_d structure. We require two
1371 objects named TO and FROM, which are identified as loads or stores
1372 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1373 and its associated FROM_CFN_DATA can be used to replace loads with
1374 constant values. MAX_PIECES describes the maximum number of bytes
1375 at a time which can be moved efficiently. LEN describes the length
1376 of the operation. */
1378 op_by_pieces_d::op_by_pieces_d (unsigned int max_pieces
, rtx to
,
1379 bool to_load
, rtx from
, bool from_load
,
1380 by_pieces_constfn from_cfn
,
1381 void *from_cfn_data
,
1382 unsigned HOST_WIDE_INT len
,
1383 unsigned int align
, bool push
,
1384 by_pieces_operation op
)
1385 : m_to (to
, to_load
, NULL
, NULL
),
1386 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1387 m_len (len
), m_max_size (max_pieces
+ 1),
1388 m_push (push
), m_op (op
)
1390 int toi
= m_to
.get_addr_inc ();
1391 int fromi
= m_from
.get_addr_inc ();
1392 if (toi
>= 0 && fromi
>= 0)
1394 else if (toi
<= 0 && fromi
<= 0)
1399 m_offset
= m_reverse
? len
: 0;
1400 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1401 from
? MEM_ALIGN (from
) : align
);
1403 /* If copying requires more than two move insns,
1404 copy addresses to registers (to make displacements shorter)
1405 and use post-increment if available. */
1406 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1408 /* Find the mode of the largest comparison. */
1409 fixed_size_mode mode
1410 = widest_fixed_size_mode_for_size (m_max_size
, m_op
);
1412 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1413 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1416 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1419 m_overlap_op_by_pieces
= targetm
.overlap_op_by_pieces_p ();
1422 /* This function returns the largest usable integer mode for LEN bytes
1423 whose size is no bigger than size of MODE. */
1426 op_by_pieces_d::get_usable_mode (fixed_size_mode mode
, unsigned int len
)
1431 size
= GET_MODE_SIZE (mode
);
1432 if (len
>= size
&& prepare_mode (mode
, m_align
))
1434 /* widest_fixed_size_mode_for_size checks SIZE > 1. */
1435 mode
= widest_fixed_size_mode_for_size (size
, m_op
);
1441 /* Return the smallest integer or QI vector mode that is not narrower
1445 op_by_pieces_d::smallest_fixed_size_mode_for_size (unsigned int size
)
1447 /* Use QI vector only for > size of WORD. */
1448 if (can_use_qi_vectors (m_op
) && size
> UNITS_PER_WORD
)
1451 fixed_size_mode candidate
;
1452 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_INT
)
1453 if (is_a
<fixed_size_mode
> (mode
, &candidate
)
1454 && GET_MODE_INNER (candidate
) == QImode
)
1456 /* Don't return a mode wider than M_LEN. */
1457 if (GET_MODE_SIZE (candidate
) > m_len
)
1460 if (GET_MODE_SIZE (candidate
) >= size
1461 && by_pieces_mode_supported_p (candidate
, m_op
))
1466 return smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
1469 /* This function contains the main loop used for expanding a block
1470 operation. First move what we can in the largest integer mode,
1471 then go to successively smaller modes. For every access, call
1472 GENFUN with the two operands and the EXTRA_DATA. */
1475 op_by_pieces_d::run ()
1480 unsigned HOST_WIDE_INT length
= m_len
;
1482 /* widest_fixed_size_mode_for_size checks M_MAX_SIZE > 1. */
1483 fixed_size_mode mode
1484 = widest_fixed_size_mode_for_size (m_max_size
, m_op
);
1485 mode
= get_usable_mode (mode
, length
);
1487 by_pieces_prev to_prev
= { nullptr, mode
};
1488 by_pieces_prev from_prev
= { nullptr, mode
};
1492 unsigned int size
= GET_MODE_SIZE (mode
);
1493 rtx to1
= NULL_RTX
, from1
;
1495 while (length
>= size
)
1500 to1
= m_to
.adjust (mode
, m_offset
, &to_prev
);
1502 to_prev
.mode
= mode
;
1503 from1
= m_from
.adjust (mode
, m_offset
, &from_prev
);
1504 from_prev
.data
= from1
;
1505 from_prev
.mode
= mode
;
1507 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1508 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1510 generate (to1
, from1
, mode
);
1512 m_to
.maybe_postinc (size
);
1513 m_from
.maybe_postinc (size
);
1526 if (!m_push
&& m_overlap_op_by_pieces
)
1528 /* NB: Generate overlapping operations if it is not a stack
1529 push since stack push must not overlap. Get the smallest
1530 fixed size mode for M_LEN bytes. */
1531 mode
= smallest_fixed_size_mode_for_size (length
);
1532 mode
= get_usable_mode (mode
, GET_MODE_SIZE (mode
));
1533 int gap
= GET_MODE_SIZE (mode
) - length
;
1536 /* If size of MODE > M_LEN, generate the last operation
1537 in MODE for the remaining bytes with ovelapping memory
1538 from the previois operation. */
1548 /* widest_fixed_size_mode_for_size checks SIZE > 1. */
1549 mode
= widest_fixed_size_mode_for_size (size
, m_op
);
1550 mode
= get_usable_mode (mode
, length
);
1556 /* Derived class from op_by_pieces_d, providing support for block move
1559 #ifdef PUSH_ROUNDING
1560 #define PUSHG_P(to) ((to) == nullptr)
1562 #define PUSHG_P(to) false
1565 class move_by_pieces_d
: public op_by_pieces_d
1567 insn_gen_fn m_gen_fun
;
1568 void generate (rtx
, rtx
, machine_mode
) final override
;
1569 bool prepare_mode (machine_mode
, unsigned int) final override
;
1572 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1574 : op_by_pieces_d (MOVE_MAX_PIECES
, to
, false, from
, true, NULL
,
1575 NULL
, len
, align
, PUSHG_P (to
), MOVE_BY_PIECES
)
1578 rtx
finish_retmode (memop_ret
);
1581 /* Return true if MODE can be used for a set of copies, given an
1582 alignment ALIGN. Prepare whatever data is necessary for later
1583 calls to generate. */
1586 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1588 insn_code icode
= optab_handler (mov_optab
, mode
);
1589 m_gen_fun
= GEN_FCN (icode
);
1590 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1593 /* A callback used when iterating for a compare_by_pieces_operation.
1594 OP0 and OP1 are the values that have been loaded and should be
1595 compared in MODE. If OP0 is NULL, this means we should generate a
1596 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1597 gen function that should be used to generate the mode. */
1600 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1601 machine_mode mode ATTRIBUTE_UNUSED
)
1603 #ifdef PUSH_ROUNDING
1604 if (op0
== NULL_RTX
)
1606 emit_single_push_insn (mode
, op1
, NULL
);
1610 emit_insn (m_gen_fun (op0
, op1
));
1613 /* Perform the final adjustment at the end of a string to obtain the
1614 correct return value for the block operation.
1615 Return value is based on RETMODE argument. */
1618 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1620 gcc_assert (!m_reverse
);
1621 if (retmode
== RETURN_END_MINUS_ONE
)
1623 m_to
.maybe_postinc (-1);
1626 return m_to
.adjust (QImode
, m_offset
);
1629 /* Generate several move instructions to copy LEN bytes from block FROM to
1630 block TO. (These are MEM rtx's with BLKmode).
1632 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1633 used to push FROM to the stack.
1635 ALIGN is maximum stack alignment we can assume.
1637 Return value is based on RETMODE argument. */
1640 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1641 unsigned int align
, memop_ret retmode
)
1643 #ifndef PUSH_ROUNDING
1648 move_by_pieces_d
data (to
, from
, len
, align
);
1652 if (retmode
!= RETURN_BEGIN
)
1653 return data
.finish_retmode (retmode
);
1658 /* Derived class from op_by_pieces_d, providing support for block move
1661 class store_by_pieces_d
: public op_by_pieces_d
1663 insn_gen_fn m_gen_fun
;
1665 void generate (rtx
, rtx
, machine_mode
) final override
;
1666 bool prepare_mode (machine_mode
, unsigned int) final override
;
1669 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1670 unsigned HOST_WIDE_INT len
, unsigned int align
,
1671 by_pieces_operation op
)
1672 : op_by_pieces_d (STORE_MAX_PIECES
, to
, false, NULL_RTX
, true, cfn
,
1673 cfn_data
, len
, align
, false, op
)
1676 rtx
finish_retmode (memop_ret
);
1679 /* Return true if MODE can be used for a set of stores, given an
1680 alignment ALIGN. Prepare whatever data is necessary for later
1681 calls to generate. */
1684 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1686 insn_code icode
= optab_handler (mov_optab
, mode
);
1687 m_gen_fun
= GEN_FCN (icode
);
1688 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1691 /* A callback used when iterating for a store_by_pieces_operation.
1692 OP0 and OP1 are the values that have been loaded and should be
1693 compared in MODE. If OP0 is NULL, this means we should generate a
1694 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1695 gen function that should be used to generate the mode. */
1698 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1700 emit_insn (m_gen_fun (op0
, op1
));
1703 /* Perform the final adjustment at the end of a string to obtain the
1704 correct return value for the block operation.
1705 Return value is based on RETMODE argument. */
1708 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1710 gcc_assert (!m_reverse
);
1711 if (retmode
== RETURN_END_MINUS_ONE
)
1713 m_to
.maybe_postinc (-1);
1716 return m_to
.adjust (QImode
, m_offset
);
1719 /* Determine whether the LEN bytes generated by CONSTFUN can be
1720 stored to memory using several move instructions. CONSTFUNDATA is
1721 a pointer which will be passed as argument in every CONSTFUN call.
1722 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1723 a memset operation and false if it's a copy of a constant string.
1724 Return true if a call to store_by_pieces should succeed. */
1727 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1728 by_pieces_constfn constfun
,
1729 void *constfundata
, unsigned int align
, bool memsetp
)
1731 unsigned HOST_WIDE_INT l
;
1732 unsigned int max_size
;
1733 HOST_WIDE_INT offset
= 0;
1734 enum insn_code icode
;
1736 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1737 rtx cst ATTRIBUTE_UNUSED
;
1742 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1746 optimize_insn_for_speed_p ()))
1749 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1751 /* We would first store what we can in the largest integer mode, then go to
1752 successively smaller modes. */
1755 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1759 max_size
= STORE_MAX_PIECES
+ 1;
1760 while (max_size
> 1 && l
> 0)
1762 auto op
= memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
;
1763 auto mode
= widest_fixed_size_mode_for_size (max_size
, op
);
1765 icode
= optab_handler (mov_optab
, mode
);
1766 if (icode
!= CODE_FOR_nothing
1767 && align
>= GET_MODE_ALIGNMENT (mode
))
1769 unsigned int size
= GET_MODE_SIZE (mode
);
1776 cst
= (*constfun
) (constfundata
, nullptr, offset
, mode
);
1777 /* All CONST_VECTORs can be loaded for memset since
1778 vec_duplicate_optab is a precondition to pick a
1779 vector mode for the memset expander. */
1780 if (!((memsetp
&& VECTOR_MODE_P (mode
))
1781 || targetm
.legitimate_constant_p (mode
, cst
)))
1791 max_size
= GET_MODE_SIZE (mode
);
1794 /* The code above should have handled everything. */
1801 /* Generate several move instructions to store LEN bytes generated by
1802 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1803 pointer which will be passed as argument in every CONSTFUN call.
1804 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1805 a memset operation and false if it's a copy of a constant string.
1806 Return value is based on RETMODE argument. */
1809 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1810 by_pieces_constfn constfun
,
1811 void *constfundata
, unsigned int align
, bool memsetp
,
1816 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1820 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1822 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1823 optimize_insn_for_speed_p ()));
1825 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
,
1826 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
);
1829 if (retmode
!= RETURN_BEGIN
)
1830 return data
.finish_retmode (retmode
);
1835 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1836 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1839 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1844 /* Use builtin_memset_read_str to support vector mode broadcast. */
1846 store_by_pieces_d
data (to
, builtin_memset_read_str
, &c
, len
, align
,
1851 /* Context used by compare_by_pieces_genfn. It stores the fail label
1852 to jump to in case of miscomparison, and for branch ratios greater than 1,
1853 it stores an accumulator and the current and maximum counts before
1854 emitting another branch. */
1856 class compare_by_pieces_d
: public op_by_pieces_d
1858 rtx_code_label
*m_fail_label
;
1860 int m_count
, m_batch
;
1862 void generate (rtx
, rtx
, machine_mode
) final override
;
1863 bool prepare_mode (machine_mode
, unsigned int) final override
;
1864 void finish_mode (machine_mode
) final override
;
1867 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1868 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1869 rtx_code_label
*fail_label
)
1870 : op_by_pieces_d (COMPARE_MAX_PIECES
, op0
, true, op1
, true, op1_cfn
,
1871 op1_cfn_data
, len
, align
, false, COMPARE_BY_PIECES
)
1873 m_fail_label
= fail_label
;
1877 /* A callback used when iterating for a compare_by_pieces_operation.
1878 OP0 and OP1 are the values that have been loaded and should be
1879 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1880 context structure. */
1883 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1887 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1888 true, OPTAB_LIB_WIDEN
);
1890 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1891 true, OPTAB_LIB_WIDEN
);
1892 m_accumulator
= temp
;
1894 if (++m_count
< m_batch
)
1898 op0
= m_accumulator
;
1900 m_accumulator
= NULL_RTX
;
1902 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1903 m_fail_label
, profile_probability::uninitialized ());
1906 /* Return true if MODE can be used for a set of moves and comparisons,
1907 given an alignment ALIGN. Prepare whatever data is necessary for
1908 later calls to generate. */
1911 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1913 insn_code icode
= optab_handler (mov_optab
, mode
);
1914 if (icode
== CODE_FOR_nothing
1915 || align
< GET_MODE_ALIGNMENT (mode
)
1916 || !can_compare_p (EQ
, mode
, ccp_jump
))
1918 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1921 m_accumulator
= NULL_RTX
;
1926 /* Called after expanding a series of comparisons in MODE. If we have
1927 accumulated results for which we haven't emitted a branch yet, do
1931 compare_by_pieces_d::finish_mode (machine_mode mode
)
1933 if (m_accumulator
!= NULL_RTX
)
1934 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1935 NULL_RTX
, NULL
, m_fail_label
,
1936 profile_probability::uninitialized ());
1939 /* Generate several move instructions to compare LEN bytes from blocks
1940 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1942 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1943 used to push FROM to the stack.
1945 ALIGN is maximum stack alignment we can assume.
1947 Optionally, the caller can pass a constfn and associated data in A1_CFN
1948 and A1_CFN_DATA. describing that the second operand being compared is a
1949 known constant and how to obtain its data. */
1952 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1953 rtx target
, unsigned int align
,
1954 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1956 rtx_code_label
*fail_label
= gen_label_rtx ();
1957 rtx_code_label
*end_label
= gen_label_rtx ();
1959 if (target
== NULL_RTX
1960 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1961 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1963 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1968 emit_move_insn (target
, const0_rtx
);
1969 emit_jump (end_label
);
1971 emit_label (fail_label
);
1972 emit_move_insn (target
, const1_rtx
);
1973 emit_label (end_label
);
1978 /* Emit code to move a block Y to a block X. This may be done with
1979 string-move instructions, with multiple scalar move instructions,
1980 or with a library call.
1982 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1983 SIZE is an rtx that says how long they are.
1984 ALIGN is the maximum alignment we can assume they have.
1985 METHOD describes what kind of copy this is, and what mechanisms may be used.
1986 MIN_SIZE is the minimal size of block to move
1987 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1988 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1989 CTZ_SIZE is the trailing-zeros count of SIZE; even a nonconstant SIZE is
1990 known to be a multiple of 1<<CTZ_SIZE.
1992 Return the address of the new block, if memcpy is called and returns it,
1996 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1997 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1998 unsigned HOST_WIDE_INT min_size
,
1999 unsigned HOST_WIDE_INT max_size
,
2000 unsigned HOST_WIDE_INT probable_max_size
,
2001 bool bail_out_libcall
, bool *is_move_done
,
2002 bool might_overlap
, unsigned ctz_size
)
2009 *is_move_done
= true;
2012 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
2017 case BLOCK_OP_NORMAL
:
2018 case BLOCK_OP_TAILCALL
:
2022 case BLOCK_OP_CALL_PARM
:
2023 may_use_call
= block_move_libcall_safe_for_call_parm ();
2025 /* Make inhibit_defer_pop nonzero around the library call
2026 to force it to pop the arguments right away. */
2030 case BLOCK_OP_NO_LIBCALL
:
2034 case BLOCK_OP_NO_LIBCALL_RET
:
2042 gcc_assert (MEM_P (x
) && MEM_P (y
));
2043 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2044 gcc_assert (align
>= BITS_PER_UNIT
);
2046 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
2047 block copy is more efficient for other large modes, e.g. DCmode. */
2048 x
= adjust_address (x
, BLKmode
, 0);
2049 y
= adjust_address (y
, BLKmode
, 0);
2051 /* If source and destination are the same, no need to copy anything. */
2052 if (rtx_equal_p (x
, y
)
2053 && !MEM_VOLATILE_P (x
)
2054 && !MEM_VOLATILE_P (y
))
2057 /* Set MEM_SIZE as appropriate for this block copy. The main place this
2058 can be incorrect is coming from __builtin_memcpy. */
2059 poly_int64 const_size
;
2060 if (poly_int_rtx_p (size
, &const_size
))
2062 x
= shallow_copy_rtx (x
);
2063 y
= shallow_copy_rtx (y
);
2064 set_mem_size (x
, const_size
);
2065 set_mem_size (y
, const_size
);
2068 bool pieces_ok
= CONST_INT_P (size
)
2069 && can_move_by_pieces (INTVAL (size
), align
);
2070 bool pattern_ok
= false;
2072 if (!pieces_ok
|| might_overlap
)
2075 = emit_block_move_via_pattern (x
, y
, size
, align
,
2076 expected_align
, expected_size
,
2077 min_size
, max_size
, probable_max_size
,
2079 if (!pattern_ok
&& might_overlap
)
2081 /* Do not try any of the other methods below as they are not safe
2082 for overlapping moves. */
2083 *is_move_done
= false;
2088 bool dynamic_direction
= false;
2089 if (!pattern_ok
&& !pieces_ok
&& may_use_call
2090 && (flag_inline_stringops
& (might_overlap
? ILSOP_MEMMOVE
: ILSOP_MEMCPY
)))
2093 dynamic_direction
= might_overlap
;
2099 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
2100 else if (may_use_call
&& !might_overlap
2101 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
2102 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
2104 if (bail_out_libcall
)
2107 *is_move_done
= false;
2111 if (may_use_call
< 0)
2114 retval
= emit_block_copy_via_libcall (x
, y
, size
,
2115 method
== BLOCK_OP_TAILCALL
);
2117 else if (dynamic_direction
)
2118 emit_block_move_via_oriented_loop (x
, y
, size
, align
, ctz_size
);
2119 else if (might_overlap
)
2120 *is_move_done
= false;
2122 emit_block_move_via_sized_loop (x
, y
, size
, align
, ctz_size
);
2124 if (method
== BLOCK_OP_CALL_PARM
)
2131 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
2132 unsigned int ctz_size
)
2134 unsigned HOST_WIDE_INT max
, min
= 0;
2135 if (GET_CODE (size
) == CONST_INT
)
2136 min
= max
= UINTVAL (size
);
2138 max
= GET_MODE_MASK (GET_MODE (size
));
2139 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
2141 false, NULL
, false, ctz_size
);
2144 /* A subroutine of emit_block_move. Returns true if calling the
2145 block move libcall will not clobber any parameters which may have
2146 already been placed on the stack. */
2149 block_move_libcall_safe_for_call_parm (void)
2153 /* If arguments are pushed on the stack, then they're safe. */
2154 if (targetm
.calls
.push_argument (0))
2157 /* If registers go on the stack anyway, any argument is sure to clobber
2158 an outgoing argument. */
2159 #if defined (REG_PARM_STACK_SPACE)
2160 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
2161 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
2162 depend on its argument. */
2164 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
2165 && REG_PARM_STACK_SPACE (fn
) != 0)
2169 /* If any argument goes in memory, then it might clobber an outgoing
2172 CUMULATIVE_ARGS args_so_far_v
;
2173 cumulative_args_t args_so_far
;
2176 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
2177 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
2178 args_so_far
= pack_cumulative_args (&args_so_far_v
);
2180 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
2181 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
2183 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
2184 function_arg_info
arg_info (mode
, /*named=*/true);
2185 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
2186 if (!tmp
|| !REG_P (tmp
))
2188 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
2190 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
2196 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
2197 return true if successful.
2199 X is the destination of the copy or move.
2200 Y is the source of the copy or move.
2201 SIZE is the size of the block to be moved.
2203 MIGHT_OVERLAP indicates this originated with expansion of a
2204 builtin_memmove() and the source and destination blocks may
2209 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
2210 unsigned int expected_align
,
2211 HOST_WIDE_INT expected_size
,
2212 unsigned HOST_WIDE_INT min_size
,
2213 unsigned HOST_WIDE_INT max_size
,
2214 unsigned HOST_WIDE_INT probable_max_size
,
2217 if (expected_align
< align
)
2218 expected_align
= align
;
2219 if (expected_size
!= -1)
2221 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
2222 expected_size
= probable_max_size
;
2223 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
2224 expected_size
= min_size
;
2227 /* Since this is a move insn, we don't care about volatility. */
2228 temporary_volatile_ok
v (true);
2230 /* Try the most limited insn first, because there's no point
2231 including more than one in the machine description unless
2232 the more limited one has some advantage. */
2234 opt_scalar_int_mode mode_iter
;
2235 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2237 scalar_int_mode mode
= mode_iter
.require ();
2238 enum insn_code code
;
2240 code
= direct_optab_handler (movmem_optab
, mode
);
2242 code
= direct_optab_handler (cpymem_optab
, mode
);
2244 if (code
!= CODE_FOR_nothing
2245 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2246 here because if SIZE is less than the mode mask, as it is
2247 returned by the macro, it will definitely be less than the
2248 actual mode mask. Since SIZE is within the Pmode address
2249 space, we limit MODE to Pmode. */
2250 && ((CONST_INT_P (size
)
2251 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
2252 <= (GET_MODE_MASK (mode
) >> 1)))
2253 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
2254 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
2256 class expand_operand ops
[9];
2259 /* ??? When called via emit_block_move_for_call, it'd be
2260 nice if there were some way to inform the backend, so
2261 that it doesn't fail the expansion because it thinks
2262 emitting the libcall would be more efficient. */
2263 nops
= insn_data
[(int) code
].n_generator_args
;
2264 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
2266 create_fixed_operand (&ops
[0], x
);
2267 create_fixed_operand (&ops
[1], y
);
2268 /* The check above guarantees that this size conversion is valid. */
2269 create_convert_operand_to (&ops
[2], size
, mode
, true);
2270 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
2273 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
2274 create_integer_operand (&ops
[5], expected_size
);
2278 create_integer_operand (&ops
[6], min_size
);
2279 /* If we cannot represent the maximal size,
2280 make parameter NULL. */
2281 if ((HOST_WIDE_INT
) max_size
!= -1)
2282 create_integer_operand (&ops
[7], max_size
);
2284 create_fixed_operand (&ops
[7], NULL
);
2288 /* If we cannot represent the maximal size,
2289 make parameter NULL. */
2290 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
2291 create_integer_operand (&ops
[8], probable_max_size
);
2293 create_fixed_operand (&ops
[8], NULL
);
2295 if (maybe_expand_insn (code
, nops
, ops
))
2303 /* Like emit_block_move_via_loop, but choose a suitable INCR based on
2304 ALIGN and CTZ_SIZE. */
2307 emit_block_move_via_sized_loop (rtx x
, rtx y
, rtx size
,
2309 unsigned int ctz_size
)
2311 int incr
= align
/ BITS_PER_UNIT
;
2313 if (CONST_INT_P (size
))
2314 ctz_size
= MAX (ctz_size
, (unsigned) wi::ctz (UINTVAL (size
)));
2316 if (HOST_WIDE_INT_1U
<< ctz_size
< (unsigned HOST_WIDE_INT
) incr
)
2317 incr
= HOST_WIDE_INT_1U
<< ctz_size
;
2319 while (incr
> 1 && !can_move_by_pieces (incr
, align
))
2322 gcc_checking_assert (incr
);
2324 return emit_block_move_via_loop (x
, y
, size
, align
, incr
);
2327 /* Like emit_block_move_via_sized_loop, but besides choosing INCR so
2328 as to ensure safe moves even in case of overlap, output dynamic
2329 tests to choose between two loops, one moving downwards, another
2333 emit_block_move_via_oriented_loop (rtx x
, rtx y
, rtx size
,
2335 unsigned int ctz_size
)
2337 int incr
= align
/ BITS_PER_UNIT
;
2339 if (CONST_INT_P (size
))
2340 ctz_size
= MAX (ctz_size
, (unsigned) wi::ctz (UINTVAL (size
)));
2342 if (HOST_WIDE_INT_1U
<< ctz_size
< (unsigned HOST_WIDE_INT
) incr
)
2343 incr
= HOST_WIDE_INT_1U
<< ctz_size
;
2345 while (incr
> 1 && !int_mode_for_size (incr
, 0).exists ())
2348 gcc_checking_assert (incr
);
2350 rtx_code_label
*upw_label
, *end_label
;
2351 upw_label
= gen_label_rtx ();
2352 end_label
= gen_label_rtx ();
2354 rtx x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
2355 rtx y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
2356 do_pending_stack_adjust ();
2358 machine_mode mode
= GET_MODE (x_addr
);
2359 if (mode
!= GET_MODE (y_addr
))
2361 scalar_int_mode xmode
2362 = smallest_int_mode_for_size (GET_MODE_BITSIZE (mode
));
2363 scalar_int_mode ymode
2364 = smallest_int_mode_for_size (GET_MODE_BITSIZE
2365 (GET_MODE (y_addr
)));
2366 if (GET_MODE_BITSIZE (xmode
) < GET_MODE_BITSIZE (ymode
))
2371 #ifndef POINTERS_EXTEND_UNSIGNED
2372 const int POINTERS_EXTEND_UNSIGNED
= 1;
2374 x_addr
= convert_modes (mode
, GET_MODE (x_addr
), x_addr
,
2375 POINTERS_EXTEND_UNSIGNED
);
2376 y_addr
= convert_modes (mode
, GET_MODE (y_addr
), y_addr
,
2377 POINTERS_EXTEND_UNSIGNED
);
2380 /* Test for overlap: if (x >= y || x + size <= y) goto upw_label. */
2381 emit_cmp_and_jump_insns (x_addr
, y_addr
, GEU
, NULL_RTX
, mode
,
2383 profile_probability::guessed_always ()
2384 .apply_scale (5, 10));
2385 rtx tmp
= convert_modes (GET_MODE (x_addr
), GET_MODE (size
), size
, true);
2386 tmp
= simplify_gen_binary (PLUS
, GET_MODE (x_addr
), x_addr
, tmp
);
2388 emit_cmp_and_jump_insns (tmp
, y_addr
, LEU
, NULL_RTX
, mode
,
2390 profile_probability::guessed_always ()
2391 .apply_scale (8, 10));
2393 emit_block_move_via_loop (x
, y
, size
, align
, -incr
);
2395 emit_jump (end_label
);
2396 emit_label (upw_label
);
2398 emit_block_move_via_loop (x
, y
, size
, align
, incr
);
2400 emit_label (end_label
);
2403 /* A subroutine of emit_block_move. Copy the data via an explicit
2404 loop. This is used only when libcalls are forbidden, or when
2405 inlining is required. INCR is the block size to be copied in each
2406 loop iteration. If it is negative, the absolute value is used, and
2407 the block is copied backwards. INCR must be a power of two, an
2408 exact divisor for SIZE and ALIGN, and imply a mode that can be
2409 safely copied per iteration assuming no overlap. */
2412 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
2413 unsigned int align
, int incr
)
2415 rtx_code_label
*cmp_label
, *top_label
;
2416 rtx iter
, x_addr
, y_addr
, tmp
;
2417 machine_mode x_addr_mode
= get_address_mode (x
);
2418 machine_mode y_addr_mode
= get_address_mode (y
);
2419 machine_mode iter_mode
;
2421 iter_mode
= GET_MODE (size
);
2422 if (iter_mode
== VOIDmode
)
2423 iter_mode
= word_mode
;
2425 top_label
= gen_label_rtx ();
2426 cmp_label
= gen_label_rtx ();
2427 iter
= gen_reg_rtx (iter_mode
);
2429 bool downwards
= incr
< 0;
2434 machine_mode move_mode
;
2440 iter_limit
= const0_rtx
;
2441 iter_incr
= GEN_INT (incr
);
2445 iter_init
= const0_rtx
;
2448 iter_incr
= GEN_INT (incr
);
2450 emit_move_insn (iter
, iter_init
);
2452 opt_scalar_int_mode int_move_mode
2453 = int_mode_for_size (incr
* BITS_PER_UNIT
, 1);
2454 if (!int_move_mode
.exists (&move_mode
)
2455 || GET_MODE_BITSIZE (int_move_mode
.require ()) != incr
* BITS_PER_UNIT
)
2457 move_mode
= BLKmode
;
2458 gcc_checking_assert (can_move_by_pieces (incr
, align
));
2461 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
2462 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
2463 do_pending_stack_adjust ();
2465 emit_jump (cmp_label
);
2466 emit_label (top_label
);
2468 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
2469 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
2471 if (x_addr_mode
!= y_addr_mode
)
2472 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
2473 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
2475 x
= change_address (x
, move_mode
, x_addr
);
2476 y
= change_address (y
, move_mode
, y_addr
);
2478 if (move_mode
== BLKmode
)
2481 emit_block_move_hints (x
, y
, iter_incr
, BLOCK_OP_NO_LIBCALL
,
2482 align
, incr
, incr
, incr
, incr
,
2483 false, &done
, false);
2484 gcc_checking_assert (done
);
2487 emit_move_insn (x
, y
);
2490 emit_label (cmp_label
);
2492 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, iter_incr
, iter
,
2493 true, OPTAB_LIB_WIDEN
);
2495 emit_move_insn (iter
, tmp
);
2498 emit_label (cmp_label
);
2500 emit_cmp_and_jump_insns (iter
, iter_limit
, iter_cond
, NULL_RTX
, iter_mode
,
2502 profile_probability::guessed_always ()
2503 .apply_scale (9, 10));
2506 /* Expand a call to memcpy or memmove or memcmp, and return the result.
2507 TAILCALL is true if this is a tail call. */
2510 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
2511 rtx size
, bool tailcall
)
2513 rtx dst_addr
, src_addr
;
2514 tree call_expr
, dst_tree
, src_tree
, size_tree
;
2515 machine_mode size_mode
;
2517 /* Since dst and src are passed to a libcall, mark the corresponding
2518 tree EXPR as addressable. */
2519 tree dst_expr
= MEM_EXPR (dst
);
2520 tree src_expr
= MEM_EXPR (src
);
2522 mark_addressable (dst_expr
);
2524 mark_addressable (src_expr
);
2526 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
2527 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
2528 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
2530 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
2531 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
2532 src_tree
= make_tree (ptr_type_node
, src_addr
);
2534 size_mode
= TYPE_MODE (sizetype
);
2535 size
= convert_to_mode (size_mode
, size
, 1);
2536 size
= copy_to_mode_reg (size_mode
, size
);
2537 size_tree
= make_tree (sizetype
, size
);
2539 /* It is incorrect to use the libcall calling conventions for calls to
2540 memcpy/memmove/memcmp because they can be provided by the user. */
2541 tree fn
= builtin_decl_implicit (fncode
);
2542 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
2543 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
2545 return expand_call (call_expr
, NULL_RTX
, false);
2548 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
2549 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
2550 otherwise return null. */
2553 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
2554 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
2555 HOST_WIDE_INT align
)
2557 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
2559 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
2562 class expand_operand ops
[5];
2563 create_output_operand (&ops
[0], target
, insn_mode
);
2564 create_fixed_operand (&ops
[1], arg1_rtx
);
2565 create_fixed_operand (&ops
[2], arg2_rtx
);
2566 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
2567 TYPE_UNSIGNED (arg3_type
));
2568 create_integer_operand (&ops
[4], align
);
2569 if (maybe_expand_insn (icode
, 5, ops
))
2570 return ops
[0].value
;
2574 /* Expand a block compare between X and Y with length LEN using the
2575 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2576 of the expression that was used to calculate the length. ALIGN
2577 gives the known minimum common alignment. */
2580 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2583 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2584 implementing memcmp because it will stop if it encounters two
2586 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2588 if (icode
== CODE_FOR_nothing
)
2591 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2594 /* Emit code to compare a block Y to a block X. This may be done with
2595 string-compare instructions, with multiple scalar instructions,
2596 or with a library call.
2598 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2599 they are. LEN_TYPE is the type of the expression that was used to
2600 calculate it, and CTZ_LEN is the known trailing-zeros count of LEN,
2601 so LEN must be a multiple of 1<<CTZ_LEN even if it's not constant.
2603 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2604 value of a normal memcmp call, instead we can just compare for equality.
2605 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2608 Optionally, the caller can pass a constfn and associated data in Y_CFN
2609 and Y_CFN_DATA. describing that the second operand being compared is a
2610 known constant and how to obtain its data.
2611 Return the result of the comparison, or NULL_RTX if we failed to
2612 perform the operation. */
2615 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2616 bool equality_only
, by_pieces_constfn y_cfn
,
2617 void *y_cfndata
, unsigned ctz_len
)
2621 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2624 gcc_assert (MEM_P (x
) && MEM_P (y
));
2625 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2626 gcc_assert (align
>= BITS_PER_UNIT
);
2628 x
= adjust_address (x
, BLKmode
, 0);
2629 y
= adjust_address (y
, BLKmode
, 0);
2632 && CONST_INT_P (len
)
2633 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2634 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2637 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2639 if (!result
&& (flag_inline_stringops
& ILSOP_MEMCMP
))
2640 result
= emit_block_cmp_via_loop (x
, y
, len
, len_type
,
2641 target
, equality_only
,
2647 /* Like emit_block_cmp_hints, but with known alignment and no support
2648 for constats. Always expand to a loop with iterations that compare
2649 blocks of the largest compare-by-pieces size that divides both len
2650 and align, and then, if !EQUALITY_ONLY, identify the word and then
2651 the unit that first differs to return the result. */
2654 emit_block_cmp_via_loop (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2655 bool equality_only
, unsigned align
, unsigned ctz_len
)
2657 unsigned incr
= align
/ BITS_PER_UNIT
;
2659 if (CONST_INT_P (len
))
2660 ctz_len
= MAX (ctz_len
, (unsigned) wi::ctz (UINTVAL (len
)));
2662 if (HOST_WIDE_INT_1U
<< ctz_len
< (unsigned HOST_WIDE_INT
) incr
)
2663 incr
= HOST_WIDE_INT_1U
<< ctz_len
;
2666 && !can_do_by_pieces (incr
, align
, COMPARE_BY_PIECES
))
2669 rtx_code_label
*cmp_label
, *top_label
, *ne_label
, *res_label
;
2670 rtx iter
, x_addr
, y_addr
, tmp
;
2671 machine_mode x_addr_mode
= get_address_mode (x
);
2672 machine_mode y_addr_mode
= get_address_mode (y
);
2673 machine_mode iter_mode
;
2675 iter_mode
= GET_MODE (len
);
2676 if (iter_mode
== VOIDmode
)
2677 iter_mode
= word_mode
;
2679 rtx iter_init
= const0_rtx
;
2680 rtx_code iter_cond
= LTU
;
2681 rtx_code entry_cond
= GEU
;
2682 rtx iter_limit
= len
;
2683 rtx iter_incr
= GEN_INT (incr
);
2684 machine_mode cmp_mode
;
2686 /* We can drop the loop back edge if we know there's exactly one
2688 top_label
= (!rtx_equal_p (len
, iter_incr
)
2691 /* We need not test before entering the loop if len is known
2692 nonzero. ??? This could be even stricter, testing whether a
2693 nonconstant LEN could possibly be zero. */
2694 cmp_label
= (!CONSTANT_P (len
) || rtx_equal_p (len
, iter_init
)
2697 ne_label
= gen_label_rtx ();
2698 res_label
= gen_label_rtx ();
2700 iter
= gen_reg_rtx (iter_mode
);
2701 emit_move_insn (iter
, iter_init
);
2703 opt_scalar_int_mode int_cmp_mode
2704 = int_mode_for_size (incr
* BITS_PER_UNIT
, 1);
2705 if (!int_cmp_mode
.exists (&cmp_mode
)
2706 || GET_MODE_BITSIZE (int_cmp_mode
.require ()) != incr
* BITS_PER_UNIT
2707 || !can_compare_p (NE
, cmp_mode
, ccp_jump
))
2710 gcc_checking_assert (incr
!= 1);
2713 /* Save the base addresses. */
2714 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
2715 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
2716 do_pending_stack_adjust ();
2721 emit_jump (cmp_label
);
2723 emit_cmp_and_jump_insns (iter
, iter_limit
, entry_cond
,
2724 NULL_RTX
, iter_mode
,
2726 profile_probability::guessed_always ()
2727 .apply_scale (1, 10));
2730 emit_label (top_label
);
2732 /* Offset the base addresses by ITER. */
2733 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
2734 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
2736 if (x_addr_mode
!= y_addr_mode
)
2737 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
2738 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
2740 x
= change_address (x
, cmp_mode
, x_addr
);
2741 y
= change_address (y
, cmp_mode
, y_addr
);
2743 /* Compare one block. */
2745 if (cmp_mode
== BLKmode
)
2746 part_res
= compare_by_pieces (x
, y
, incr
, target
, align
, 0, 0);
2748 part_res
= expand_binop (cmp_mode
, sub_optab
, x
, y
, NULL_RTX
,
2749 true, OPTAB_LIB_WIDEN
);
2751 /* Stop if we found a difference. */
2752 emit_cmp_and_jump_insns (part_res
, GEN_INT (0), NE
, NULL_RTX
,
2753 GET_MODE (part_res
), true, ne_label
,
2754 profile_probability::guessed_always ()
2755 .apply_scale (1, 10));
2757 /* Increment ITER. */
2758 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, iter_incr
, iter
,
2759 true, OPTAB_LIB_WIDEN
);
2761 emit_move_insn (iter
, tmp
);
2764 emit_label (cmp_label
);
2765 /* Loop until we reach the limit. */
2768 emit_cmp_and_jump_insns (iter
, iter_limit
, iter_cond
, NULL_RTX
, iter_mode
,
2770 profile_probability::guessed_always ()
2771 .apply_scale (9, 10));
2773 /* We got to the end without differences, so the result is zero. */
2774 if (target
== NULL_RTX
2775 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
2776 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
2778 emit_move_insn (target
, const0_rtx
);
2779 emit_jump (res_label
);
2781 emit_label (ne_label
);
2783 /* Return nonzero, or pinpoint the difference to return the expected
2784 result for non-equality tests. */
2786 emit_move_insn (target
, const1_rtx
);
2789 if (incr
> UNITS_PER_WORD
)
2790 /* ??? Re-compare the block found to be different one word at a
2792 part_res
= emit_block_cmp_via_loop (x
, y
, GEN_INT (incr
), len_type
,
2793 target
, equality_only
,
2796 /* ??? Re-compare the block found to be different one byte at a
2797 time. We could do better using part_res, and being careful
2798 about endianness. */
2799 part_res
= emit_block_cmp_via_loop (x
, y
, GEN_INT (incr
), len_type
,
2800 target
, equality_only
,
2802 else if (known_gt (GET_MODE_BITSIZE (GET_MODE (target
)),
2803 GET_MODE_BITSIZE (cmp_mode
)))
2804 part_res
= expand_binop (GET_MODE (target
), sub_optab
, x
, y
, target
,
2805 true, OPTAB_LIB_WIDEN
);
2808 /* In the odd chance target is QImode, we can't count on
2809 widening subtract to capture the result of the unsigned
2811 rtx_code_label
*ltu_label
;
2812 ltu_label
= gen_label_rtx ();
2813 emit_cmp_and_jump_insns (x
, y
, LTU
, NULL_RTX
,
2814 cmp_mode
, true, ltu_label
,
2815 profile_probability::guessed_always ()
2816 .apply_scale (5, 10));
2818 emit_move_insn (target
, const1_rtx
);
2819 emit_jump (res_label
);
2821 emit_label (ltu_label
);
2822 emit_move_insn (target
, constm1_rtx
);
2826 if (target
!= part_res
)
2827 convert_move (target
, part_res
, false);
2830 emit_label (res_label
);
2836 /* Copy all or part of a value X into registers starting at REGNO.
2837 The number of registers to be filled is NREGS. */
2840 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2845 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2846 x
= validize_mem (force_const_mem (mode
, x
));
2848 /* See if the machine can do this with a load multiple insn. */
2849 if (targetm
.have_load_multiple ())
2851 rtx_insn
*last
= get_last_insn ();
2852 rtx first
= gen_rtx_REG (word_mode
, regno
);
2853 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2860 delete_insns_since (last
);
2863 for (int i
= 0; i
< nregs
; i
++)
2864 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2865 operand_subword_force (x
, i
, mode
));
2868 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2869 The number of registers to be filled is NREGS. */
2872 move_block_from_reg (int regno
, rtx x
, int nregs
)
2877 /* See if the machine can do this with a store multiple insn. */
2878 if (targetm
.have_store_multiple ())
2880 rtx_insn
*last
= get_last_insn ();
2881 rtx first
= gen_rtx_REG (word_mode
, regno
);
2882 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2889 delete_insns_since (last
);
2892 for (int i
= 0; i
< nregs
; i
++)
2894 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2898 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2902 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2903 ORIG, where ORIG is a non-consecutive group of registers represented by
2904 a PARALLEL. The clone is identical to the original except in that the
2905 original set of registers is replaced by a new set of pseudo registers.
2906 The new set has the same modes as the original set. */
2909 gen_group_rtx (rtx orig
)
2914 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2916 length
= XVECLEN (orig
, 0);
2917 tmps
= XALLOCAVEC (rtx
, length
);
2919 /* Skip a NULL entry in first slot. */
2920 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2925 for (; i
< length
; i
++)
2927 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2928 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2930 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2933 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2936 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2937 except that values are placed in TMPS[i], and must later be moved
2938 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2941 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2946 machine_mode m
= GET_MODE (orig_src
);
2948 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2951 && !SCALAR_INT_MODE_P (m
)
2952 && !MEM_P (orig_src
)
2953 && GET_CODE (orig_src
) != CONCAT
)
2955 scalar_int_mode imode
;
2956 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2958 src
= gen_reg_rtx (imode
);
2959 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2963 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2964 emit_move_insn (src
, orig_src
);
2966 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2970 /* Check for a NULL entry, used to indicate that the parameter goes
2971 both on the stack and in registers. */
2972 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2977 /* Process the pieces. */
2978 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2980 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2981 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2982 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2983 poly_int64 shift
= 0;
2985 /* Handle trailing fragments that run over the size of the struct.
2986 It's the target's responsibility to make sure that the fragment
2987 cannot be strictly smaller in some cases and strictly larger
2989 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2990 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2992 /* Arrange to shift the fragment to where it belongs.
2993 extract_bit_field loads to the lsb of the reg. */
2995 #ifdef BLOCK_REG_PADDING
2996 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2997 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
3002 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
3003 bytelen
= ssize
- bytepos
;
3004 gcc_assert (maybe_gt (bytelen
, 0));
3007 /* If we won't be loading directly from memory, protect the real source
3008 from strange tricks we might play; but make sure that the source can
3009 be loaded directly into the destination. */
3011 if (!MEM_P (orig_src
)
3012 && (!REG_P (orig_src
) || HARD_REGISTER_P (orig_src
))
3013 && !CONSTANT_P (orig_src
))
3015 gcc_assert (GET_MODE (orig_src
) != VOIDmode
);
3016 src
= force_reg (GET_MODE (orig_src
), orig_src
);
3019 /* Optimize the access just a bit. */
3021 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
3022 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
3023 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
3024 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
3026 tmps
[i
] = gen_reg_rtx (mode
);
3027 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
3029 else if (COMPLEX_MODE_P (mode
)
3030 && GET_MODE (src
) == mode
3031 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
3032 /* Let emit_move_complex do the bulk of the work. */
3034 else if (GET_CODE (src
) == CONCAT
)
3036 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
3037 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
3041 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
3042 && known_le (subpos
+ bytelen
, slen0
))
3044 /* The following assumes that the concatenated objects all
3045 have the same size. In this case, a simple calculation
3046 can be used to determine the object and the bit field
3048 tmps
[i
] = XEXP (src
, elt
);
3049 if (maybe_ne (subpos
, 0)
3050 || maybe_ne (subpos
+ bytelen
, slen0
)
3051 || (!CONSTANT_P (tmps
[i
])
3052 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
3053 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
3054 subpos
* BITS_PER_UNIT
,
3055 1, NULL_RTX
, mode
, mode
, false,
3062 gcc_assert (known_eq (bytepos
, 0));
3063 mem
= assign_stack_temp (GET_MODE (src
), slen
);
3064 emit_move_insn (mem
, src
);
3065 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
3066 0, 1, NULL_RTX
, mode
, mode
, false,
3070 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
3071 && XVECLEN (dst
, 0) > 1)
3072 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
3073 else if (CONSTANT_P (src
))
3075 if (known_eq (bytelen
, ssize
))
3081 /* TODO: const_wide_int can have sizes other than this... */
3082 gcc_assert (known_eq (2 * bytelen
, ssize
));
3083 split_double (src
, &first
, &second
);
3090 else if (REG_P (src
) && GET_MODE (src
) == mode
)
3093 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
3094 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
3095 mode
, mode
, false, NULL
);
3097 if (maybe_ne (shift
, 0))
3098 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
3103 /* Emit code to move a block SRC of type TYPE to a block DST,
3104 where DST is non-consecutive registers represented by a PARALLEL.
3105 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
3109 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
3114 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
3115 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
3117 /* Copy the extracted pieces into the proper (probable) hard regs. */
3118 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
3120 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
3123 emit_move_insn (d
, tmps
[i
]);
3127 /* Similar, but load SRC into new pseudos in a format that looks like
3128 PARALLEL. This can later be fed to emit_group_move to get things
3129 in the right place. */
3132 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
3137 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
3138 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
3140 /* Convert the vector to look just like the original PARALLEL, except
3141 with the computed values. */
3142 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
3144 rtx e
= XVECEXP (parallel
, 0, i
);
3145 rtx d
= XEXP (e
, 0);
3149 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
3150 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
3152 RTVEC_ELT (vec
, i
) = e
;
3155 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
3158 /* Emit code to move a block SRC to block DST, where SRC and DST are
3159 non-consecutive groups of registers, each represented by a PARALLEL. */
3162 emit_group_move (rtx dst
, rtx src
)
3166 gcc_assert (GET_CODE (src
) == PARALLEL
3167 && GET_CODE (dst
) == PARALLEL
3168 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
3170 /* Skip first entry if NULL. */
3171 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
3172 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
3173 XEXP (XVECEXP (src
, 0, i
), 0));
3176 /* Move a group of registers represented by a PARALLEL into pseudos. */
3179 emit_group_move_into_temps (rtx src
)
3181 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
3184 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
3186 rtx e
= XVECEXP (src
, 0, i
);
3187 rtx d
= XEXP (e
, 0);
3190 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
3191 RTVEC_ELT (vec
, i
) = e
;
3194 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
3197 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
3198 where SRC is non-consecutive registers represented by a PARALLEL.
3199 SSIZE represents the total size of block ORIG_DST, or -1 if not
3203 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
3207 int start
, finish
, i
;
3208 machine_mode m
= GET_MODE (orig_dst
);
3210 gcc_assert (GET_CODE (src
) == PARALLEL
);
3212 if (!SCALAR_INT_MODE_P (m
)
3213 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
3215 scalar_int_mode imode
;
3216 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
3218 dst
= gen_reg_rtx (imode
);
3219 emit_group_store (dst
, src
, type
, ssize
);
3220 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
3224 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
3225 emit_group_store (dst
, src
, type
, ssize
);
3227 emit_move_insn (orig_dst
, dst
);
3231 /* Check for a NULL entry, used to indicate that the parameter goes
3232 both on the stack and in registers. */
3233 if (XEXP (XVECEXP (src
, 0, 0), 0))
3237 finish
= XVECLEN (src
, 0);
3239 tmps
= XALLOCAVEC (rtx
, finish
);
3241 /* Copy the (probable) hard regs into pseudos. */
3242 for (i
= start
; i
< finish
; i
++)
3244 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
3245 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
3247 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
3248 emit_move_insn (tmps
[i
], reg
);
3254 /* If we won't be storing directly into memory, protect the real destination
3255 from strange tricks we might play. */
3257 if (GET_CODE (dst
) == PARALLEL
)
3261 /* We can get a PARALLEL dst if there is a conditional expression in
3262 a return statement. In that case, the dst and src are the same,
3263 so no action is necessary. */
3264 if (rtx_equal_p (dst
, src
))
3267 /* It is unclear if we can ever reach here, but we may as well handle
3268 it. Allocate a temporary, and split this into a store/load to/from
3270 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
3271 emit_group_store (temp
, src
, type
, ssize
);
3272 emit_group_load (dst
, temp
, type
, ssize
);
3275 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
3277 machine_mode outer
= GET_MODE (dst
);
3283 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
3284 dst
= gen_reg_rtx (outer
);
3286 /* Make life a bit easier for combine: if the first element of the
3287 vector is the low part of the destination mode, use a paradoxical
3288 subreg to initialize the destination. */
3291 inner
= GET_MODE (tmps
[start
]);
3292 bytepos
= subreg_lowpart_offset (inner
, outer
);
3293 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
3296 temp
= simplify_gen_subreg (outer
, tmps
[start
], inner
, 0);
3299 emit_move_insn (dst
, temp
);
3306 /* If the first element wasn't the low part, try the last. */
3308 && start
< finish
- 1)
3310 inner
= GET_MODE (tmps
[finish
- 1]);
3311 bytepos
= subreg_lowpart_offset (inner
, outer
);
3312 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
3316 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1], inner
, 0);
3319 emit_move_insn (dst
, temp
);
3326 /* Otherwise, simply initialize the result to zero. */
3328 emit_move_insn (dst
, CONST0_RTX (outer
));
3331 /* Process the pieces. */
3332 for (i
= start
; i
< finish
; i
++)
3334 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
3335 machine_mode mode
= GET_MODE (tmps
[i
]);
3336 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
3337 poly_uint64 adj_bytelen
;
3340 /* Handle trailing fragments that run over the size of the struct.
3341 It's the target's responsibility to make sure that the fragment
3342 cannot be strictly smaller in some cases and strictly larger
3344 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
3345 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
3346 adj_bytelen
= ssize
- bytepos
;
3348 adj_bytelen
= bytelen
;
3350 /* Deal with destination CONCATs by either storing into one of the parts
3351 or doing a copy after storing into a register or stack temporary. */
3352 if (GET_CODE (dst
) == CONCAT
)
3354 if (known_le (bytepos
+ adj_bytelen
,
3355 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
3356 dest
= XEXP (dst
, 0);
3358 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
3360 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
3361 dest
= XEXP (dst
, 1);
3366 machine_mode dest_mode
= GET_MODE (dest
);
3367 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
3368 scalar_int_mode dest_imode
;
3370 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
3372 /* If the source is a single scalar integer register, and the
3373 destination has a complex mode for which a same-sized integer
3374 mode exists, then we can take the left-justified part of the
3375 source in the complex mode. */
3376 if (finish
== start
+ 1
3378 && SCALAR_INT_MODE_P (tmp_mode
)
3379 && COMPLEX_MODE_P (dest_mode
)
3380 && int_mode_for_mode (dest_mode
).exists (&dest_imode
))
3382 const scalar_int_mode tmp_imode
3383 = as_a
<scalar_int_mode
> (tmp_mode
);
3385 if (GET_MODE_BITSIZE (dest_imode
)
3386 < GET_MODE_BITSIZE (tmp_imode
))
3388 dest
= gen_reg_rtx (dest_imode
);
3389 if (BYTES_BIG_ENDIAN
)
3390 tmps
[i
] = expand_shift (RSHIFT_EXPR
, tmp_mode
, tmps
[i
],
3391 GET_MODE_BITSIZE (tmp_imode
)
3392 - GET_MODE_BITSIZE (dest_imode
),
3394 emit_move_insn (dest
, gen_lowpart (dest_imode
, tmps
[i
]));
3395 dst
= gen_lowpart (dest_mode
, dest
);
3398 dst
= gen_lowpart (dest_mode
, tmps
[i
]);
3401 /* Otherwise spill the source onto the stack using the more
3402 aligned of the two modes. */
3403 else if (GET_MODE_ALIGNMENT (dest_mode
)
3404 >= GET_MODE_ALIGNMENT (tmp_mode
))
3406 dest
= assign_stack_temp (dest_mode
,
3407 GET_MODE_SIZE (dest_mode
));
3408 emit_move_insn (adjust_address (dest
, tmp_mode
, bytepos
),
3415 dest
= assign_stack_temp (tmp_mode
,
3416 GET_MODE_SIZE (tmp_mode
));
3417 emit_move_insn (dest
, tmps
[i
]);
3418 dst
= adjust_address (dest
, dest_mode
, bytepos
);
3425 /* Handle trailing fragments that run over the size of the struct. */
3426 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
3428 /* store_bit_field always takes its value from the lsb.
3429 Move the fragment to the lsb if it's not already there. */
3431 #ifdef BLOCK_REG_PADDING
3432 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
3433 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
3439 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
3440 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
3444 /* Make sure not to write past the end of the struct. */
3445 store_bit_field (dest
,
3446 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
3447 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
3448 VOIDmode
, tmps
[i
], false, false);
3451 /* Optimize the access just a bit. */
3452 else if (MEM_P (dest
)
3453 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
3454 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
3455 && multiple_p (bytepos
* BITS_PER_UNIT
,
3456 GET_MODE_ALIGNMENT (mode
))
3457 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
3458 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
3461 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
3462 0, 0, mode
, tmps
[i
], false, false);
3465 /* Copy from the pseudo into the (probable) hard reg. */
3466 if (orig_dst
!= dst
)
3467 emit_move_insn (orig_dst
, dst
);
3470 /* Return a form of X that does not use a PARALLEL. TYPE is the type
3471 of the value stored in X. */
3474 maybe_emit_group_store (rtx x
, tree type
)
3476 machine_mode mode
= TYPE_MODE (type
);
3477 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
3478 if (GET_CODE (x
) == PARALLEL
)
3480 rtx result
= gen_reg_rtx (mode
);
3481 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
3487 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
3489 This is used on targets that return BLKmode values in registers. */
3492 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
3494 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
3495 rtx src
= NULL
, dst
= NULL
;
3496 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
3497 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
3498 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
3499 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
3500 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
3501 fixed_size_mode copy_mode
;
3503 /* BLKmode registers created in the back-end shouldn't have survived. */
3504 gcc_assert (mode
!= BLKmode
);
3506 /* If the structure doesn't take up a whole number of words, see whether
3507 SRCREG is padded on the left or on the right. If it's on the left,
3508 set PADDING_CORRECTION to the number of bits to skip.
3510 In most ABIs, the structure will be returned at the least end of
3511 the register, which translates to right padding on little-endian
3512 targets and left padding on big-endian targets. The opposite
3513 holds if the structure is returned at the most significant
3514 end of the register. */
3515 if (bytes
% UNITS_PER_WORD
!= 0
3516 && (targetm
.calls
.return_in_msb (type
)
3518 : BYTES_BIG_ENDIAN
))
3520 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
3522 /* We can use a single move if we have an exact mode for the size. */
3523 else if (MEM_P (target
)
3524 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
3525 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
3526 && bytes
== GET_MODE_SIZE (mode
))
3528 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
3532 /* And if we additionally have the same mode for a register. */
3533 else if (REG_P (target
)
3534 && GET_MODE (target
) == mode
3535 && bytes
== GET_MODE_SIZE (mode
))
3537 emit_move_insn (target
, srcreg
);
3541 /* This code assumes srcreg is at least a full word. If it isn't, copy it
3542 into a new pseudo which is a full word. */
3543 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
3545 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
3549 /* Copy the structure BITSIZE bits at a time. If the target lives in
3550 memory, take care of not reading/writing past its end by selecting
3551 a copy mode suited to BITSIZE. This should always be possible given
3554 If the target lives in register, make sure not to select a copy mode
3555 larger than the mode of the register.
3557 We could probably emit more efficient code for machines which do not use
3558 strict alignment, but it doesn't seem worth the effort at the current
3561 copy_mode
= word_mode
;
3564 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
3565 if (mem_mode
.exists ())
3566 copy_mode
= mem_mode
.require ();
3568 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
3571 for (bitpos
= 0, xbitpos
= padding_correction
;
3572 bitpos
< bytes
* BITS_PER_UNIT
;
3573 bitpos
+= bitsize
, xbitpos
+= bitsize
)
3575 /* We need a new source operand each time xbitpos is on a
3576 word boundary and when xbitpos == padding_correction
3577 (the first time through). */
3578 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
3579 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
3581 /* We need a new destination operand each time bitpos is on
3583 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
3585 else if (bitpos
% BITS_PER_WORD
== 0)
3586 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
3588 /* Use xbitpos for the source extraction (right justified) and
3589 bitpos for the destination store (left justified). */
3590 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
3591 extract_bit_field (src
, bitsize
,
3592 xbitpos
% BITS_PER_WORD
, 1,
3593 NULL_RTX
, copy_mode
, copy_mode
,
3599 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
3600 register if it contains any data, otherwise return null.
3602 This is used on targets that return BLKmode values in registers. */
3605 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
3608 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
3609 unsigned int bitsize
;
3610 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
3611 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
3612 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
3613 fixed_size_mode dst_mode
;
3614 scalar_int_mode min_mode
;
3616 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
3618 x
= expand_normal (src
);
3620 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
3624 /* If the structure doesn't take up a whole number of words, see
3625 whether the register value should be padded on the left or on
3626 the right. Set PADDING_CORRECTION to the number of padding
3627 bits needed on the left side.
3629 In most ABIs, the structure will be returned at the least end of
3630 the register, which translates to right padding on little-endian
3631 targets and left padding on big-endian targets. The opposite
3632 holds if the structure is returned at the most significant
3633 end of the register. */
3634 if (bytes
% UNITS_PER_WORD
!= 0
3635 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
3637 : BYTES_BIG_ENDIAN
))
3638 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
3641 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
3642 dst_words
= XALLOCAVEC (rtx
, n_regs
);
3643 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
3644 min_mode
= smallest_int_mode_for_size (bitsize
);
3646 /* Copy the structure BITSIZE bits at a time. */
3647 for (bitpos
= 0, xbitpos
= padding_correction
;
3648 bitpos
< bytes
* BITS_PER_UNIT
;
3649 bitpos
+= bitsize
, xbitpos
+= bitsize
)
3651 /* We need a new destination pseudo each time xbitpos is
3652 on a word boundary and when xbitpos == padding_correction
3653 (the first time through). */
3654 if (xbitpos
% BITS_PER_WORD
== 0
3655 || xbitpos
== padding_correction
)
3657 /* Generate an appropriate register. */
3658 dst_word
= gen_reg_rtx (word_mode
);
3659 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
3661 /* Clear the destination before we move anything into it. */
3662 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
3665 /* Find the largest integer mode that can be used to copy all or as
3666 many bits as possible of the structure if the target supports larger
3667 copies. There are too many corner cases here w.r.t to alignments on
3668 the read/writes. So if there is any padding just use single byte
3670 opt_scalar_int_mode mode_iter
;
3671 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
3673 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
3675 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
3676 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
3677 && msize
<= BITS_PER_WORD
)
3684 /* We need a new source operand each time bitpos is on a word
3686 if (bitpos
% BITS_PER_WORD
== 0)
3687 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
3689 /* Use bitpos for the source extraction (left justified) and
3690 xbitpos for the destination store (right justified). */
3691 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
3693 extract_bit_field (src_word
, bitsize
,
3694 bitpos
% BITS_PER_WORD
, 1,
3695 NULL_RTX
, word_mode
, word_mode
,
3700 if (mode
== BLKmode
)
3702 /* Find the smallest integer mode large enough to hold the
3703 entire structure. */
3704 opt_scalar_int_mode mode_iter
;
3705 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3706 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
3709 /* A suitable mode should have been found. */
3710 mode
= mode_iter
.require ();
3713 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
3714 dst_mode
= word_mode
;
3717 dst
= gen_reg_rtx (dst_mode
);
3719 for (i
= 0; i
< n_regs
; i
++)
3720 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
3722 if (mode
!= dst_mode
)
3723 dst
= gen_lowpart (mode
, dst
);
3728 /* Add a USE expression for REG to the (possibly empty) list pointed
3729 to by CALL_FUSAGE. REG must denote a hard register. */
3732 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
3734 gcc_assert (REG_P (reg
));
3736 if (!HARD_REGISTER_P (reg
))
3740 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
3743 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
3744 to by CALL_FUSAGE. REG must denote a hard register. */
3747 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
3749 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
3752 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
3755 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
3756 starting at REGNO. All of these registers must be hard registers. */
3759 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
3763 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
3765 for (i
= 0; i
< nregs
; i
++)
3766 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
3769 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
3770 PARALLEL REGS. This is for calls that pass values in multiple
3771 non-contiguous locations. The Irix 6 ABI has examples of this. */
3774 use_group_regs (rtx
*call_fusage
, rtx regs
)
3778 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
3780 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
3782 /* A NULL entry means the parameter goes both on the stack and in
3783 registers. This can also be a MEM for targets that pass values
3784 partially on the stack and partially in registers. */
3785 if (reg
!= 0 && REG_P (reg
))
3786 use_reg (call_fusage
, reg
);
3790 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3791 assigment and the code of the expresion on the RHS is CODE. Return
3795 get_def_for_expr (tree name
, enum tree_code code
)
3799 if (TREE_CODE (name
) != SSA_NAME
)
3802 def_stmt
= get_gimple_for_ssa_name (name
);
3804 || gimple_assign_rhs_code (def_stmt
) != code
)
3810 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3811 assigment and the class of the expresion on the RHS is CLASS. Return
3815 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3819 if (TREE_CODE (name
) != SSA_NAME
)
3822 def_stmt
= get_gimple_for_ssa_name (name
);
3824 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3830 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3831 its length in bytes. */
3834 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3835 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3836 unsigned HOST_WIDE_INT min_size
,
3837 unsigned HOST_WIDE_INT max_size
,
3838 unsigned HOST_WIDE_INT probable_max_size
,
3841 machine_mode mode
= GET_MODE (object
);
3844 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3846 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3847 just move a zero. Otherwise, do this a piece at a time. */
3848 poly_int64 size_val
;
3850 && poly_int_rtx_p (size
, &size_val
)
3851 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3853 rtx zero
= CONST0_RTX (mode
);
3856 emit_move_insn (object
, zero
);
3860 if (COMPLEX_MODE_P (mode
))
3862 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3865 write_complex_part (object
, zero
, 0, true);
3866 write_complex_part (object
, zero
, 1, false);
3872 if (size
== const0_rtx
)
3875 align
= MEM_ALIGN (object
);
3877 if (CONST_INT_P (size
)
3878 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3880 optimize_insn_for_speed_p ()))
3881 clear_by_pieces (object
, INTVAL (size
), align
);
3882 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3883 expected_align
, expected_size
,
3884 min_size
, max_size
, probable_max_size
))
3886 else if (try_store_by_multiple_pieces (object
, size
, ctz_size
,
3888 NULL_RTX
, 0, align
))
3890 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3891 return set_storage_via_libcall (object
, size
, const0_rtx
,
3892 method
== BLOCK_OP_TAILCALL
);
3900 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3902 unsigned HOST_WIDE_INT max
, min
= 0;
3903 if (GET_CODE (size
) == CONST_INT
)
3904 min
= max
= UINTVAL (size
);
3906 max
= GET_MODE_MASK (GET_MODE (size
));
3907 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
, 0);
3911 /* A subroutine of clear_storage. Expand a call to memset.
3912 Return the return value of memset, 0 otherwise. */
3915 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3917 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3918 machine_mode size_mode
;
3920 object
= copy_addr_to_reg (XEXP (object
, 0));
3921 object_tree
= make_tree (ptr_type_node
, object
);
3923 if (!CONST_INT_P (val
))
3924 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3925 val_tree
= make_tree (integer_type_node
, val
);
3927 size_mode
= TYPE_MODE (sizetype
);
3928 size
= convert_to_mode (size_mode
, size
, 1);
3929 size
= copy_to_mode_reg (size_mode
, size
);
3930 size_tree
= make_tree (sizetype
, size
);
3932 /* It is incorrect to use the libcall calling conventions for calls to
3933 memset because it can be provided by the user. */
3934 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3935 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3936 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3938 return expand_call (call_expr
, NULL_RTX
, false);
3941 /* Expand a setmem pattern; return true if successful. */
3944 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3945 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3946 unsigned HOST_WIDE_INT min_size
,
3947 unsigned HOST_WIDE_INT max_size
,
3948 unsigned HOST_WIDE_INT probable_max_size
)
3950 /* Try the most limited insn first, because there's no point
3951 including more than one in the machine description unless
3952 the more limited one has some advantage. */
3954 if (expected_align
< align
)
3955 expected_align
= align
;
3956 if (expected_size
!= -1)
3958 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3959 expected_size
= max_size
;
3960 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3961 expected_size
= min_size
;
3964 opt_scalar_int_mode mode_iter
;
3965 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3967 scalar_int_mode mode
= mode_iter
.require ();
3968 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3970 if (code
!= CODE_FOR_nothing
3971 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3972 here because if SIZE is less than the mode mask, as it is
3973 returned by the macro, it will definitely be less than the
3974 actual mode mask. Since SIZE is within the Pmode address
3975 space, we limit MODE to Pmode. */
3976 && ((CONST_INT_P (size
)
3977 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3978 <= (GET_MODE_MASK (mode
) >> 1)))
3979 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3980 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3982 class expand_operand ops
[9];
3985 nops
= insn_data
[(int) code
].n_generator_args
;
3986 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3988 create_fixed_operand (&ops
[0], object
);
3989 /* The check above guarantees that this size conversion is valid. */
3990 create_convert_operand_to (&ops
[1], size
, mode
, true);
3991 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3992 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3995 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3996 create_integer_operand (&ops
[5], expected_size
);
4000 create_integer_operand (&ops
[6], min_size
);
4001 /* If we cannot represent the maximal size,
4002 make parameter NULL. */
4003 if ((HOST_WIDE_INT
) max_size
!= -1)
4004 create_integer_operand (&ops
[7], max_size
);
4006 create_fixed_operand (&ops
[7], NULL
);
4010 /* If we cannot represent the maximal size,
4011 make parameter NULL. */
4012 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
4013 create_integer_operand (&ops
[8], probable_max_size
);
4015 create_fixed_operand (&ops
[8], NULL
);
4017 if (maybe_expand_insn (code
, nops
, ops
))
4026 /* Write to one of the components of the complex value CPLX. Write VAL to
4027 the real part if IMAG_P is false, and the imaginary part if its true.
4028 If UNDEFINED_P then the value in CPLX is currently undefined. */
4031 write_complex_part (rtx cplx
, rtx val
, bool imag_p
, bool undefined_p
)
4037 if (GET_CODE (cplx
) == CONCAT
)
4039 emit_move_insn (XEXP (cplx
, imag_p
), val
);
4043 cmode
= GET_MODE (cplx
);
4044 imode
= GET_MODE_INNER (cmode
);
4045 ibitsize
= GET_MODE_BITSIZE (imode
);
4047 /* For MEMs simplify_gen_subreg may generate an invalid new address
4048 because, e.g., the original address is considered mode-dependent
4049 by the target, which restricts simplify_subreg from invoking
4050 adjust_address_nv. Instead of preparing fallback support for an
4051 invalid address, we call adjust_address_nv directly. */
4054 emit_move_insn (adjust_address_nv (cplx
, imode
,
4055 imag_p
? GET_MODE_SIZE (imode
) : 0),
4060 /* If the sub-object is at least word sized, then we know that subregging
4061 will work. This special case is important, since store_bit_field
4062 wants to operate on integer modes, and there's rarely an OImode to
4063 correspond to TCmode. */
4064 if (ibitsize
>= BITS_PER_WORD
4065 /* For hard regs we have exact predicates. Assume we can split
4066 the original object if it spans an even number of hard regs.
4067 This special case is important for SCmode on 64-bit platforms
4068 where the natural size of floating-point regs is 32-bit. */
4070 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
4071 && REG_NREGS (cplx
) % 2 == 0))
4073 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
4074 imag_p
? GET_MODE_SIZE (imode
) : 0);
4077 emit_move_insn (part
, val
);
4081 /* simplify_gen_subreg may fail for sub-word MEMs. */
4082 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
4085 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
4086 false, undefined_p
);
4089 /* Extract one of the components of the complex value CPLX. Extract the
4090 real part if IMAG_P is false, and the imaginary part if it's true. */
4093 read_complex_part (rtx cplx
, bool imag_p
)
4099 if (GET_CODE (cplx
) == CONCAT
)
4100 return XEXP (cplx
, imag_p
);
4102 cmode
= GET_MODE (cplx
);
4103 imode
= GET_MODE_INNER (cmode
);
4104 ibitsize
= GET_MODE_BITSIZE (imode
);
4106 /* Special case reads from complex constants that got spilled to memory. */
4107 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
4109 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
4110 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
4112 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
4113 if (CONSTANT_CLASS_P (part
))
4114 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
4118 /* For MEMs simplify_gen_subreg may generate an invalid new address
4119 because, e.g., the original address is considered mode-dependent
4120 by the target, which restricts simplify_subreg from invoking
4121 adjust_address_nv. Instead of preparing fallback support for an
4122 invalid address, we call adjust_address_nv directly. */
4124 return adjust_address_nv (cplx
, imode
,
4125 imag_p
? GET_MODE_SIZE (imode
) : 0);
4127 /* If the sub-object is at least word sized, then we know that subregging
4128 will work. This special case is important, since extract_bit_field
4129 wants to operate on integer modes, and there's rarely an OImode to
4130 correspond to TCmode. */
4131 if (ibitsize
>= BITS_PER_WORD
4132 /* For hard regs we have exact predicates. Assume we can split
4133 the original object if it spans an even number of hard regs.
4134 This special case is important for SCmode on 64-bit platforms
4135 where the natural size of floating-point regs is 32-bit. */
4137 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
4138 && REG_NREGS (cplx
) % 2 == 0))
4140 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
4141 imag_p
? GET_MODE_SIZE (imode
) : 0);
4145 /* simplify_gen_subreg may fail for sub-word MEMs. */
4146 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
4149 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
4150 true, NULL_RTX
, imode
, imode
, false, NULL
);
4153 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
4154 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
4155 represented in NEW_MODE. If FORCE is true, this will never happen, as
4156 we'll force-create a SUBREG if needed. */
4159 emit_move_change_mode (machine_mode new_mode
,
4160 machine_mode old_mode
, rtx x
, bool force
)
4164 if (push_operand (x
, GET_MODE (x
)))
4166 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
4167 MEM_COPY_ATTRIBUTES (ret
, x
);
4171 /* We don't have to worry about changing the address since the
4172 size in bytes is supposed to be the same. */
4173 if (reload_in_progress
)
4175 /* Copy the MEM to change the mode and move any
4176 substitutions from the old MEM to the new one. */
4177 ret
= adjust_address_nv (x
, new_mode
, 0);
4178 copy_replacements (x
, ret
);
4181 ret
= adjust_address (x
, new_mode
, 0);
4185 /* Note that we do want simplify_subreg's behavior of validating
4186 that the new mode is ok for a hard register. If we were to use
4187 simplify_gen_subreg, we would create the subreg, but would
4188 probably run into the target not being able to implement it. */
4189 /* Except, of course, when FORCE is true, when this is exactly what
4190 we want. Which is needed for CCmodes on some targets. */
4192 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
4194 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
4200 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
4201 an integer mode of the same size as MODE. Returns the instruction
4202 emitted, or NULL if such a move could not be generated. */
4205 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
4207 scalar_int_mode imode
;
4208 enum insn_code code
;
4210 /* There must exist a mode of the exact size we require. */
4211 if (!int_mode_for_mode (mode
).exists (&imode
))
4214 /* The target must support moves in this mode. */
4215 code
= optab_handler (mov_optab
, imode
);
4216 if (code
== CODE_FOR_nothing
)
4219 x
= emit_move_change_mode (imode
, mode
, x
, force
);
4222 y
= emit_move_change_mode (imode
, mode
, y
, force
);
4225 return emit_insn (GEN_FCN (code
) (x
, y
));
4228 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
4229 Return an equivalent MEM that does not use an auto-increment. */
4232 emit_move_resolve_push (machine_mode mode
, rtx x
)
4234 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
4237 poly_int64 adjust
= GET_MODE_SIZE (mode
);
4238 #ifdef PUSH_ROUNDING
4239 adjust
= PUSH_ROUNDING (adjust
);
4241 if (code
== PRE_DEC
|| code
== POST_DEC
)
4243 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
4245 rtx expr
= XEXP (XEXP (x
, 0), 1);
4247 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
4248 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
4249 if (GET_CODE (expr
) == MINUS
)
4251 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
4255 /* Do not use anti_adjust_stack, since we don't want to update
4256 stack_pointer_delta. */
4257 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
4258 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
4259 0, OPTAB_LIB_WIDEN
);
4260 if (temp
!= stack_pointer_rtx
)
4261 emit_move_insn (stack_pointer_rtx
, temp
);
4268 temp
= stack_pointer_rtx
;
4273 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
4279 return replace_equiv_address (x
, temp
);
4282 /* A subroutine of emit_move_complex. Generate a move from Y into X.
4283 X is known to satisfy push_operand, and MODE is known to be complex.
4284 Returns the last instruction emitted. */
4287 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
4289 scalar_mode submode
= GET_MODE_INNER (mode
);
4292 #ifdef PUSH_ROUNDING
4293 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
4295 /* In case we output to the stack, but the size is smaller than the
4296 machine can push exactly, we need to use move instructions. */
4297 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
4299 x
= emit_move_resolve_push (mode
, x
);
4300 return emit_move_insn (x
, y
);
4304 /* Note that the real part always precedes the imag part in memory
4305 regardless of machine's endianness. */
4306 switch (GET_CODE (XEXP (x
, 0)))
4320 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
4321 read_complex_part (y
, imag_first
));
4322 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
4323 read_complex_part (y
, !imag_first
));
4326 /* A subroutine of emit_move_complex. Perform the move from Y to X
4327 via two moves of the parts. Returns the last instruction emitted. */
4330 emit_move_complex_parts (rtx x
, rtx y
)
4332 /* Show the output dies here. This is necessary for SUBREGs
4333 of pseudos since we cannot track their lifetimes correctly;
4334 hard regs shouldn't appear here except as return values. */
4335 if (!reload_completed
&& !reload_in_progress
4336 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
4339 write_complex_part (x
, read_complex_part (y
, false), false, true);
4340 write_complex_part (x
, read_complex_part (y
, true), true, false);
4342 return get_last_insn ();
4345 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
4346 MODE is known to be complex. Returns the last instruction emitted. */
4349 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
4353 /* Need to take special care for pushes, to maintain proper ordering
4354 of the data, and possibly extra padding. */
4355 if (push_operand (x
, mode
))
4356 return emit_move_complex_push (mode
, x
, y
);
4358 /* See if we can coerce the target into moving both values at once, except
4359 for floating point where we favor moving as parts if this is easy. */
4360 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
4361 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
4363 && HARD_REGISTER_P (x
)
4364 && REG_NREGS (x
) == 1)
4366 && HARD_REGISTER_P (y
)
4367 && REG_NREGS (y
) == 1))
4369 /* Not possible if the values are inherently not adjacent. */
4370 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
4372 /* Is possible if both are registers (or subregs of registers). */
4373 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
4375 /* If one of the operands is a memory, and alignment constraints
4376 are friendly enough, we may be able to do combined memory operations.
4377 We do not attempt this if Y is a constant because that combination is
4378 usually better with the by-parts thing below. */
4379 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
4380 && (!STRICT_ALIGNMENT
4381 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
4390 /* For memory to memory moves, optimal behavior can be had with the
4391 existing block move logic. But use normal expansion if optimizing
4393 if (MEM_P (x
) && MEM_P (y
))
4395 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
4396 (optimize_insn_for_speed_p()
4397 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
4398 return get_last_insn ();
4401 ret
= emit_move_via_integer (mode
, x
, y
, true);
4406 return emit_move_complex_parts (x
, y
);
4409 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
4410 MODE is known to be MODE_CC. Returns the last instruction emitted. */
4413 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
4417 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
4420 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
4421 if (code
!= CODE_FOR_nothing
)
4423 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
4424 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
4425 return emit_insn (GEN_FCN (code
) (x
, y
));
4429 /* Otherwise, find the MODE_INT mode of the same width. */
4430 ret
= emit_move_via_integer (mode
, x
, y
, false);
4431 gcc_assert (ret
!= NULL
);
4435 /* Return true if word I of OP lies entirely in the
4436 undefined bits of a paradoxical subreg. */
4439 undefined_operand_subword_p (const_rtx op
, int i
)
4441 if (GET_CODE (op
) != SUBREG
)
4443 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
4444 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
4445 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
4446 || known_le (offset
, -UNITS_PER_WORD
));
4449 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
4450 MODE is any multi-word or full-word mode that lacks a move_insn
4451 pattern. Note that you will get better code if you define such
4452 patterns, even if they must turn into multiple assembler instructions. */
4455 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
4457 rtx_insn
*last_insn
= 0;
4463 /* This function can only handle cases where the number of words is
4464 known at compile time. */
4465 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
4466 gcc_assert (mode_size
>= UNITS_PER_WORD
);
4468 /* If X is a push on the stack, do the push now and replace
4469 X with a reference to the stack pointer. */
4470 if (push_operand (x
, mode
))
4471 x
= emit_move_resolve_push (mode
, x
);
4473 /* If we are in reload, see if either operand is a MEM whose address
4474 is scheduled for replacement. */
4475 if (reload_in_progress
&& MEM_P (x
)
4476 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
4477 x
= replace_equiv_address_nv (x
, inner
);
4478 if (reload_in_progress
&& MEM_P (y
)
4479 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
4480 y
= replace_equiv_address_nv (y
, inner
);
4484 need_clobber
= false;
4485 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
4487 /* Do not generate code for a move if it would go entirely
4488 to the non-existing bits of a paradoxical subreg. */
4489 if (undefined_operand_subword_p (x
, i
))
4492 rtx xpart
= operand_subword (x
, i
, 1, mode
);
4495 /* Do not generate code for a move if it would come entirely
4496 from the undefined bits of a paradoxical subreg. */
4497 if (undefined_operand_subword_p (y
, i
))
4500 ypart
= operand_subword (y
, i
, 1, mode
);
4502 /* If we can't get a part of Y, put Y into memory if it is a
4503 constant. Otherwise, force it into a register. Then we must
4504 be able to get a part of Y. */
4505 if (ypart
== 0 && CONSTANT_P (y
))
4507 y
= use_anchored_address (force_const_mem (mode
, y
));
4508 ypart
= operand_subword (y
, i
, 1, mode
);
4510 else if (ypart
== 0)
4511 ypart
= operand_subword_force (y
, i
, mode
);
4513 gcc_assert (xpart
&& ypart
);
4515 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
4517 last_insn
= emit_move_insn (xpart
, ypart
);
4523 /* Show the output dies here. This is necessary for SUBREGs
4524 of pseudos since we cannot track their lifetimes correctly;
4525 hard regs shouldn't appear here except as return values.
4526 We never want to emit such a clobber after reload. */
4528 && ! (reload_in_progress
|| reload_completed
)
4529 && need_clobber
!= 0)
4537 /* Low level part of emit_move_insn.
4538 Called just like emit_move_insn, but assumes X and Y
4539 are basically valid. */
4542 emit_move_insn_1 (rtx x
, rtx y
)
4544 machine_mode mode
= GET_MODE (x
);
4545 enum insn_code code
;
4547 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
4549 code
= optab_handler (mov_optab
, mode
);
4550 if (code
!= CODE_FOR_nothing
)
4551 return emit_insn (GEN_FCN (code
) (x
, y
));
4553 /* Expand complex moves by moving real part and imag part. */
4554 if (COMPLEX_MODE_P (mode
))
4555 return emit_move_complex (mode
, x
, y
);
4557 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
4558 || ALL_FIXED_POINT_MODE_P (mode
))
4560 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
4562 /* If we can't find an integer mode, use multi words. */
4566 return emit_move_multi_word (mode
, x
, y
);
4569 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4570 return emit_move_ccmode (mode
, x
, y
);
4572 /* Try using a move pattern for the corresponding integer mode. This is
4573 only safe when simplify_subreg can convert MODE constants into integer
4574 constants. At present, it can only do this reliably if the value
4575 fits within a HOST_WIDE_INT. */
4577 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
4579 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
4583 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
4588 return emit_move_multi_word (mode
, x
, y
);
4591 /* Generate code to copy Y into X.
4592 Both Y and X must have the same mode, except that
4593 Y can be a constant with VOIDmode.
4594 This mode cannot be BLKmode; use emit_block_move for that.
4596 Return the last instruction emitted. */
4599 emit_move_insn (rtx x
, rtx y
)
4601 machine_mode mode
= GET_MODE (x
);
4602 rtx y_cst
= NULL_RTX
;
4603 rtx_insn
*last_insn
;
4606 gcc_assert (mode
!= BLKmode
4607 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
4609 /* If we have a copy that looks like one of the following patterns:
4610 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
4611 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
4612 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
4613 (set (subreg:M1 (reg:M2 ...)) (constant C))
4614 where mode M1 is equal in size to M2, try to detect whether the
4615 mode change involves an implicit round trip through memory.
4616 If so, see if we can avoid that by removing the subregs and
4617 doing the move in mode M2 instead. */
4619 rtx x_inner
= NULL_RTX
;
4620 rtx y_inner
= NULL_RTX
;
4622 auto candidate_subreg_p
= [&](rtx subreg
) {
4623 return (REG_P (SUBREG_REG (subreg
))
4624 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
4625 GET_MODE_SIZE (GET_MODE (subreg
)))
4626 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
4627 != CODE_FOR_nothing
);
4630 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
4631 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
4632 && !push_operand (mem
, GET_MODE (mem
))
4633 /* Not a candiate if innermode requires too much alignment. */
4634 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
4635 || targetm
.slow_unaligned_access (GET_MODE (mem
),
4637 || !targetm
.slow_unaligned_access (innermode
,
4641 if (SUBREG_P (x
) && candidate_subreg_p (x
))
4642 x_inner
= SUBREG_REG (x
);
4644 if (SUBREG_P (y
) && candidate_subreg_p (y
))
4645 y_inner
= SUBREG_REG (y
);
4647 if (x_inner
!= NULL_RTX
4648 && y_inner
!= NULL_RTX
4649 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
4650 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
4654 mode
= GET_MODE (x_inner
);
4656 else if (x_inner
!= NULL_RTX
4658 && candidate_mem_p (GET_MODE (x_inner
), y
))
4661 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
4662 mode
= GET_MODE (x_inner
);
4664 else if (y_inner
!= NULL_RTX
4666 && candidate_mem_p (GET_MODE (y_inner
), x
))
4668 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
4670 mode
= GET_MODE (y_inner
);
4672 else if (x_inner
!= NULL_RTX
4674 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
4676 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
4680 mode
= GET_MODE (x_inner
);
4686 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
4687 && (last_insn
= compress_float_constant (x
, y
)))
4692 if (!targetm
.legitimate_constant_p (mode
, y
))
4694 y
= force_const_mem (mode
, y
);
4696 /* If the target's cannot_force_const_mem prevented the spill,
4697 assume that the target's move expanders will also take care
4698 of the non-legitimate constant. */
4702 y
= use_anchored_address (y
);
4706 /* If X or Y are memory references, verify that their addresses are valid
4709 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
4711 && ! push_operand (x
, GET_MODE (x
))))
4712 x
= validize_mem (x
);
4715 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
4716 MEM_ADDR_SPACE (y
)))
4717 y
= validize_mem (y
);
4719 gcc_assert (mode
!= BLKmode
);
4721 last_insn
= emit_move_insn_1 (x
, y
);
4723 if (y_cst
&& REG_P (x
)
4724 && (set
= single_set (last_insn
)) != NULL_RTX
4725 && SET_DEST (set
) == x
4726 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
4727 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
4732 /* Generate the body of an instruction to copy Y into X.
4733 It may be a list of insns, if one insn isn't enough. */
4736 gen_move_insn (rtx x
, rtx y
)
4741 emit_move_insn_1 (x
, y
);
4747 /* If Y is representable exactly in a narrower mode, and the target can
4748 perform the extension directly from constant or memory, then emit the
4749 move as an extension. */
4752 compress_float_constant (rtx x
, rtx y
)
4754 machine_mode dstmode
= GET_MODE (x
);
4755 machine_mode orig_srcmode
= GET_MODE (y
);
4756 machine_mode srcmode
;
4757 const REAL_VALUE_TYPE
*r
;
4758 int oldcost
, newcost
;
4759 bool speed
= optimize_insn_for_speed_p ();
4761 r
= CONST_DOUBLE_REAL_VALUE (y
);
4763 if (targetm
.legitimate_constant_p (dstmode
, y
))
4764 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
4766 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
4768 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
4772 rtx_insn
*last_insn
;
4774 /* Skip if the target can't extend this way. */
4775 ic
= can_extend_p (dstmode
, srcmode
, 0);
4776 if (ic
== CODE_FOR_nothing
)
4779 /* Skip if the narrowed value isn't exact. */
4780 if (! exact_real_truncate (srcmode
, r
))
4783 trunc_y
= const_double_from_real_value (*r
, srcmode
);
4785 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
4787 /* Skip if the target needs extra instructions to perform
4789 if (!insn_operand_matches (ic
, 1, trunc_y
))
4791 /* This is valid, but may not be cheaper than the original. */
4792 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4794 if (oldcost
< newcost
)
4797 else if (float_extend_from_mem
[dstmode
][srcmode
])
4799 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4800 /* This is valid, but may not be cheaper than the original. */
4801 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4803 if (oldcost
< newcost
)
4805 trunc_y
= validize_mem (trunc_y
);
4810 /* For CSE's benefit, force the compressed constant pool entry
4811 into a new pseudo. This constant may be used in different modes,
4812 and if not, combine will put things back together for us. */
4813 trunc_y
= force_reg (srcmode
, trunc_y
);
4815 /* If x is a hard register, perform the extension into a pseudo,
4816 so that e.g. stack realignment code is aware of it. */
4818 if (REG_P (x
) && HARD_REGISTER_P (x
))
4819 target
= gen_reg_rtx (dstmode
);
4821 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4822 last_insn
= get_last_insn ();
4825 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4828 return emit_move_insn (x
, target
);
4835 /* Pushing data onto the stack. */
4837 /* Push a block of length SIZE (perhaps variable)
4838 and return an rtx to address the beginning of the block.
4839 The value may be virtual_outgoing_args_rtx.
4841 EXTRA is the number of bytes of padding to push in addition to SIZE.
4842 BELOW nonzero means this padding comes at low addresses;
4843 otherwise, the padding comes at high addresses. */
4846 push_block (rtx size
, poly_int64 extra
, int below
)
4850 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4851 if (CONSTANT_P (size
))
4852 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4853 else if (REG_P (size
) && known_eq (extra
, 0))
4854 anti_adjust_stack (size
);
4857 temp
= copy_to_mode_reg (Pmode
, size
);
4858 if (maybe_ne (extra
, 0))
4859 temp
= expand_binop (Pmode
, add_optab
, temp
,
4860 gen_int_mode (extra
, Pmode
),
4861 temp
, 0, OPTAB_LIB_WIDEN
);
4862 anti_adjust_stack (temp
);
4865 if (STACK_GROWS_DOWNWARD
)
4867 temp
= virtual_outgoing_args_rtx
;
4868 if (maybe_ne (extra
, 0) && below
)
4869 temp
= plus_constant (Pmode
, temp
, extra
);
4874 if (poly_int_rtx_p (size
, &csize
))
4875 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4876 -csize
- (below
? 0 : extra
));
4877 else if (maybe_ne (extra
, 0) && !below
)
4878 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4879 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4882 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4883 negate_rtx (Pmode
, size
));
4886 return memory_address (NARROWEST_INT_MODE
, temp
);
4889 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4892 mem_autoinc_base (rtx mem
)
4896 rtx addr
= XEXP (mem
, 0);
4897 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4898 return XEXP (addr
, 0);
4903 /* A utility routine used here, in reload, and in try_split. The insns
4904 after PREV up to and including LAST are known to adjust the stack,
4905 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4906 placing notes as appropriate. PREV may be NULL, indicating the
4907 entire insn sequence prior to LAST should be scanned.
4909 The set of allowed stack pointer modifications is small:
4910 (1) One or more auto-inc style memory references (aka pushes),
4911 (2) One or more addition/subtraction with the SP as destination,
4912 (3) A single move insn with the SP as destination,
4913 (4) A call_pop insn,
4914 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4916 Insns in the sequence that do not modify the SP are ignored,
4917 except for noreturn calls.
4919 The return value is the amount of adjustment that can be trivially
4920 verified, via immediate operand or auto-inc. If the adjustment
4921 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4924 find_args_size_adjust (rtx_insn
*insn
)
4929 pat
= PATTERN (insn
);
4932 /* Look for a call_pop pattern. */
4935 /* We have to allow non-call_pop patterns for the case
4936 of emit_single_push_insn of a TLS address. */
4937 if (GET_CODE (pat
) != PARALLEL
)
4940 /* All call_pop have a stack pointer adjust in the parallel.
4941 The call itself is always first, and the stack adjust is
4942 usually last, so search from the end. */
4943 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4945 set
= XVECEXP (pat
, 0, i
);
4946 if (GET_CODE (set
) != SET
)
4948 dest
= SET_DEST (set
);
4949 if (dest
== stack_pointer_rtx
)
4952 /* We'd better have found the stack pointer adjust. */
4955 /* Fall through to process the extracted SET and DEST
4956 as if it was a standalone insn. */
4958 else if (GET_CODE (pat
) == SET
)
4960 else if ((set
= single_set (insn
)) != NULL
)
4962 else if (GET_CODE (pat
) == PARALLEL
)
4964 /* ??? Some older ports use a parallel with a stack adjust
4965 and a store for a PUSH_ROUNDING pattern, rather than a
4966 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4967 /* ??? See h8300 and m68k, pushqi1. */
4968 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4970 set
= XVECEXP (pat
, 0, i
);
4971 if (GET_CODE (set
) != SET
)
4973 dest
= SET_DEST (set
);
4974 if (dest
== stack_pointer_rtx
)
4977 /* We do not expect an auto-inc of the sp in the parallel. */
4978 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4979 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4980 != stack_pointer_rtx
);
4988 dest
= SET_DEST (set
);
4990 /* Look for direct modifications of the stack pointer. */
4991 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4993 /* Look for a trivial adjustment, otherwise assume nothing. */
4994 /* Note that the SPU restore_stack_block pattern refers to
4995 the stack pointer in V4SImode. Consider that non-trivial. */
4997 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4998 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
5000 /* ??? Reload can generate no-op moves, which will be cleaned
5001 up later. Recognize it and continue searching. */
5002 else if (rtx_equal_p (dest
, SET_SRC (set
)))
5005 return HOST_WIDE_INT_MIN
;
5011 /* Otherwise only think about autoinc patterns. */
5012 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
5015 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
5016 != stack_pointer_rtx
);
5018 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
5019 mem
= SET_SRC (set
);
5023 addr
= XEXP (mem
, 0);
5024 switch (GET_CODE (addr
))
5028 return GET_MODE_SIZE (GET_MODE (mem
));
5031 return -GET_MODE_SIZE (GET_MODE (mem
));
5034 addr
= XEXP (addr
, 1);
5035 gcc_assert (GET_CODE (addr
) == PLUS
);
5036 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
5037 return rtx_to_poly_int64 (XEXP (addr
, 1));
5045 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
5046 poly_int64 end_args_size
)
5048 poly_int64 args_size
= end_args_size
;
5049 bool saw_unknown
= false;
5052 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
5054 if (!NONDEBUG_INSN_P (insn
))
5057 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
5058 a call argument containing a TLS address that itself requires
5059 a call to __tls_get_addr. The handling of stack_pointer_delta
5060 in emit_single_push_insn is supposed to ensure that any such
5061 notes are already correct. */
5062 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
5063 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
5065 poly_int64 this_delta
= find_args_size_adjust (insn
);
5066 if (known_eq (this_delta
, 0))
5069 || ACCUMULATE_OUTGOING_ARGS
5070 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
5074 gcc_assert (!saw_unknown
);
5075 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
5079 add_args_size_note (insn
, args_size
);
5080 if (STACK_GROWS_DOWNWARD
)
5081 this_delta
= -poly_uint64 (this_delta
);
5084 args_size
= HOST_WIDE_INT_MIN
;
5086 args_size
-= this_delta
;
5092 #ifdef PUSH_ROUNDING
5093 /* Emit single push insn. */
5096 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
5099 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
5101 enum insn_code icode
;
5103 /* If there is push pattern, use it. Otherwise try old way of throwing
5104 MEM representing push operation to move expander. */
5105 icode
= optab_handler (push_optab
, mode
);
5106 if (icode
!= CODE_FOR_nothing
)
5108 class expand_operand ops
[1];
5110 create_input_operand (&ops
[0], x
, mode
);
5111 if (maybe_expand_insn (icode
, 1, ops
))
5114 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
5115 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
5116 /* If we are to pad downward, adjust the stack pointer first and
5117 then store X into the stack location using an offset. This is
5118 because emit_move_insn does not know how to pad; it does not have
5120 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
5122 emit_move_insn (stack_pointer_rtx
,
5123 expand_binop (Pmode
,
5124 STACK_GROWS_DOWNWARD
? sub_optab
5127 gen_int_mode (rounded_size
, Pmode
),
5128 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
5130 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
5131 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
5132 /* We have already decremented the stack pointer, so get the
5134 offset
+= rounded_size
;
5136 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
5137 /* We have already incremented the stack pointer, so get the
5139 offset
-= rounded_size
;
5141 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
5145 if (STACK_GROWS_DOWNWARD
)
5146 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
5147 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
5149 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
5150 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
5152 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
5155 dest
= gen_rtx_MEM (mode
, dest_addr
);
5159 set_mem_attributes (dest
, type
, 1);
5161 if (cfun
->tail_call_marked
)
5162 /* Function incoming arguments may overlap with sibling call
5163 outgoing arguments and we cannot allow reordering of reads
5164 from function arguments with stores to outgoing arguments
5165 of sibling calls. */
5166 set_mem_alias_set (dest
, 0);
5168 emit_move_insn (dest
, x
);
5171 /* Emit and annotate a single push insn. */
5174 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
5176 poly_int64 delta
, old_delta
= stack_pointer_delta
;
5177 rtx_insn
*prev
= get_last_insn ();
5180 emit_single_push_insn_1 (mode
, x
, type
);
5182 /* Adjust stack_pointer_delta to describe the situation after the push
5183 we just performed. Note that we must do this after the push rather
5184 than before the push in case calculating X needs pushes and pops of
5185 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
5186 for such pushes and pops must not include the effect of the future
5188 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
5190 last
= get_last_insn ();
5192 /* Notice the common case where we emitted exactly one insn. */
5193 if (PREV_INSN (last
) == prev
)
5195 add_args_size_note (last
, stack_pointer_delta
);
5199 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
5200 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
5201 || known_eq (delta
, old_delta
));
5205 /* If reading SIZE bytes from X will end up reading from
5206 Y return the number of bytes that overlap. Return -1
5207 if there is no overlap or -2 if we can't determine
5208 (for example when X and Y have different base registers). */
5211 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
5213 rtx tmp
= plus_constant (Pmode
, x
, size
);
5214 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
5216 if (!CONST_INT_P (sub
))
5219 HOST_WIDE_INT val
= INTVAL (sub
);
5221 return IN_RANGE (val
, 1, size
) ? val
: -1;
5224 /* Generate code to push X onto the stack, assuming it has mode MODE and
5226 MODE is redundant except when X is a CONST_INT (since they don't
5228 SIZE is an rtx for the size of data to be copied (in bytes),
5229 needed only if X is BLKmode.
5230 Return true if successful. May return false if asked to push a
5231 partial argument during a sibcall optimization (as specified by
5232 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
5235 ALIGN (in bits) is maximum alignment we can assume.
5237 If PARTIAL and REG are both nonzero, then copy that many of the first
5238 bytes of X into registers starting with REG, and push the rest of X.
5239 The amount of space pushed is decreased by PARTIAL bytes.
5240 REG must be a hard register in this case.
5241 If REG is zero but PARTIAL is not, take any all others actions for an
5242 argument partially in registers, but do not actually load any
5245 EXTRA is the amount in bytes of extra space to leave next to this arg.
5246 This is ignored if an argument block has already been allocated.
5248 On a machine that lacks real push insns, ARGS_ADDR is the address of
5249 the bottom of the argument block for this call. We use indexing off there
5250 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
5251 argument block has not been preallocated.
5253 ARGS_SO_FAR is the size of args previously pushed for this call.
5255 REG_PARM_STACK_SPACE is nonzero if functions require stack space
5256 for arguments passed in registers. If nonzero, it will be the number
5257 of bytes required. */
5260 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
5261 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
5262 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
5263 rtx alignment_pad
, bool sibcall_p
)
5266 pad_direction stack_direction
5267 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
5269 /* Decide where to pad the argument: PAD_DOWNWARD for below,
5270 PAD_UPWARD for above, or PAD_NONE for don't pad it.
5271 Default is below for small data on big-endian machines; else above. */
5272 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
5274 /* Invert direction if stack is post-decrement.
5276 if (STACK_PUSH_CODE
== POST_DEC
)
5277 if (where_pad
!= PAD_NONE
)
5278 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
5282 int nregs
= partial
/ UNITS_PER_WORD
;
5283 rtx
*tmp_regs
= NULL
;
5284 int overlapping
= 0;
5287 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
5289 /* Copy a block into the stack, entirely or partially. */
5296 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
5297 used
= partial
- offset
;
5299 if (mode
!= BLKmode
)
5301 /* A value is to be stored in an insufficiently aligned
5302 stack slot; copy via a suitably aligned slot if
5304 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
5305 if (!MEM_P (xinner
))
5307 temp
= assign_temp (type
, 1, 1);
5308 emit_move_insn (temp
, xinner
);
5315 /* USED is now the # of bytes we need not copy to the stack
5316 because registers will take care of them. */
5319 xinner
= adjust_address (xinner
, BLKmode
, used
);
5321 /* If the partial register-part of the arg counts in its stack size,
5322 skip the part of stack space corresponding to the registers.
5323 Otherwise, start copying to the beginning of the stack space,
5324 by setting SKIP to 0. */
5325 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
5327 #ifdef PUSH_ROUNDING
5328 /* NB: Let the backend known the number of bytes to push and
5329 decide if push insns should be generated. */
5330 unsigned int push_size
;
5331 if (CONST_INT_P (size
))
5332 push_size
= INTVAL (size
);
5336 /* Do it with several push insns if that doesn't take lots of insns
5337 and if there is no difficulty with push insns that skip bytes
5338 on the stack for alignment purposes. */
5340 && targetm
.calls
.push_argument (push_size
)
5341 && CONST_INT_P (size
)
5343 && MEM_ALIGN (xinner
) >= align
5344 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
5345 /* Here we avoid the case of a structure whose weak alignment
5346 forces many pushes of a small amount of data,
5347 and such small pushes do rounding that causes trouble. */
5348 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
5349 || align
>= BIGGEST_ALIGNMENT
5350 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
5351 align
/ BITS_PER_UNIT
))
5352 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
5354 /* Push padding now if padding above and stack grows down,
5355 or if padding below and stack grows up.
5356 But if space already allocated, this has already been done. */
5357 if (maybe_ne (extra
, 0)
5359 && where_pad
!= PAD_NONE
5360 && where_pad
!= stack_direction
)
5361 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5363 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
5367 #endif /* PUSH_ROUNDING */
5371 /* Otherwise make space on the stack and copy the data
5372 to the address of that space. */
5374 /* Deduct words put into registers from the size we must copy. */
5377 if (CONST_INT_P (size
))
5378 size
= GEN_INT (INTVAL (size
) - used
);
5380 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
5381 gen_int_mode (used
, GET_MODE (size
)),
5382 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5385 /* Get the address of the stack space.
5386 In this case, we do not deal with EXTRA separately.
5387 A single stack adjust will do. */
5388 poly_int64 const_args_so_far
;
5391 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
5394 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
5395 temp
= memory_address (BLKmode
,
5396 plus_constant (Pmode
, args_addr
,
5397 skip
+ const_args_so_far
));
5399 temp
= memory_address (BLKmode
,
5400 plus_constant (Pmode
,
5401 gen_rtx_PLUS (Pmode
,
5406 if (!ACCUMULATE_OUTGOING_ARGS
)
5408 /* If the source is referenced relative to the stack pointer,
5409 copy it to another register to stabilize it. We do not need
5410 to do this if we know that we won't be changing sp. */
5412 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
5413 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
5414 temp
= copy_to_reg (temp
);
5417 target
= gen_rtx_MEM (BLKmode
, temp
);
5419 /* We do *not* set_mem_attributes here, because incoming arguments
5420 may overlap with sibling call outgoing arguments and we cannot
5421 allow reordering of reads from function arguments with stores
5422 to outgoing arguments of sibling calls. We do, however, want
5423 to record the alignment of the stack slot. */
5424 /* ALIGN may well be better aligned than TYPE, e.g. due to
5425 PARM_BOUNDARY. Assume the caller isn't lying. */
5426 set_mem_align (target
, align
);
5428 /* If part should go in registers and pushing to that part would
5429 overwrite some of the values that need to go into regs, load the
5430 overlapping values into temporary pseudos to be moved into the hard
5431 regs at the end after the stack pushing has completed.
5432 We cannot load them directly into the hard regs here because
5433 they can be clobbered by the block move expansions.
5436 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
5437 && GET_CODE (reg
) != PARALLEL
)
5439 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
5440 if (overlapping
> 0)
5442 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
5443 overlapping
/= UNITS_PER_WORD
;
5445 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
5447 for (int i
= 0; i
< overlapping
; i
++)
5448 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
5450 for (int i
= 0; i
< overlapping
; i
++)
5451 emit_move_insn (tmp_regs
[i
],
5452 operand_subword_force (target
, i
, mode
));
5454 else if (overlapping
== -1)
5456 /* Could not determine whether there is overlap.
5457 Fail the sibcall. */
5466 /* If source is a constant VAR_DECL with a simple constructor,
5467 store the constructor to the stack instead of moving it. */
5471 && SYMBOL_REF_P (XEXP (xinner
, 0))
5472 && (decl
= SYMBOL_REF_DECL (XEXP (xinner
, 0))) != NULL_TREE
5474 && TREE_READONLY (decl
)
5475 && !TREE_SIDE_EFFECTS (decl
)
5476 && immediate_const_ctor_p (DECL_INITIAL (decl
), 2))
5477 store_constructor (DECL_INITIAL (decl
), target
, 0,
5478 int_expr_size (DECL_INITIAL (decl
)), false);
5480 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
5483 else if (partial
> 0)
5485 /* Scalar partly in registers. This case is only supported
5486 for fixed-wdth modes. */
5487 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
5488 num_words
/= UNITS_PER_WORD
;
5491 /* # bytes of start of argument
5492 that we must make space for but need not store. */
5493 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
5494 int args_offset
= INTVAL (args_so_far
);
5497 /* Push padding now if padding above and stack grows down,
5498 or if padding below and stack grows up.
5499 But if space already allocated, this has already been done. */
5500 if (maybe_ne (extra
, 0)
5502 && where_pad
!= PAD_NONE
5503 && where_pad
!= stack_direction
)
5504 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5506 /* If we make space by pushing it, we might as well push
5507 the real data. Otherwise, we can leave OFFSET nonzero
5508 and leave the space uninitialized. */
5512 /* Now NOT_STACK gets the number of words that we don't need to
5513 allocate on the stack. Convert OFFSET to words too. */
5514 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
5515 offset
/= UNITS_PER_WORD
;
5517 /* If the partial register-part of the arg counts in its stack size,
5518 skip the part of stack space corresponding to the registers.
5519 Otherwise, start copying to the beginning of the stack space,
5520 by setting SKIP to 0. */
5521 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
5523 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
5524 x
= validize_mem (force_const_mem (mode
, x
));
5526 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
5527 SUBREGs of such registers are not allowed. */
5528 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
5529 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
5530 x
= copy_to_reg (x
);
5532 /* Loop over all the words allocated on the stack for this arg. */
5533 /* We can do it by words, because any scalar bigger than a word
5534 has a size a multiple of a word. */
5535 for (i
= num_words
- 1; i
>= not_stack
; i
--)
5536 if (i
>= not_stack
+ offset
)
5537 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
5538 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
5540 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
5542 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
5550 /* Push padding now if padding above and stack grows down,
5551 or if padding below and stack grows up.
5552 But if space already allocated, this has already been done. */
5553 if (maybe_ne (extra
, 0)
5555 && where_pad
!= PAD_NONE
5556 && where_pad
!= stack_direction
)
5557 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5559 #ifdef PUSH_ROUNDING
5560 if (args_addr
== 0 && targetm
.calls
.push_argument (0))
5561 emit_single_push_insn (mode
, x
, type
);
5565 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
5566 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
5568 /* We do *not* set_mem_attributes here, because incoming arguments
5569 may overlap with sibling call outgoing arguments and we cannot
5570 allow reordering of reads from function arguments with stores
5571 to outgoing arguments of sibling calls. We do, however, want
5572 to record the alignment of the stack slot. */
5573 /* ALIGN may well be better aligned than TYPE, e.g. due to
5574 PARM_BOUNDARY. Assume the caller isn't lying. */
5575 set_mem_align (dest
, align
);
5577 emit_move_insn (dest
, x
);
5581 /* Move the partial arguments into the registers and any overlapping
5582 values that we moved into the pseudos in tmp_regs. */
5583 if (partial
> 0 && reg
!= 0)
5585 /* Handle calls that pass values in multiple non-contiguous locations.
5586 The Irix 6 ABI has examples of this. */
5587 if (GET_CODE (reg
) == PARALLEL
)
5588 emit_group_load (reg
, x
, type
, -1);
5591 gcc_assert (partial
% UNITS_PER_WORD
== 0);
5592 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
5594 for (int i
= 0; i
< overlapping
; i
++)
5595 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
5596 + nregs
- overlapping
+ i
),
5602 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
5603 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
5605 if (alignment_pad
&& args_addr
== 0)
5606 anti_adjust_stack (alignment_pad
);
5611 /* Return X if X can be used as a subtarget in a sequence of arithmetic
5615 get_subtarget (rtx x
)
5619 /* Only registers can be subtargets. */
5621 /* Don't use hard regs to avoid extending their life. */
5622 || REGNO (x
) < FIRST_PSEUDO_REGISTER
5626 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
5627 FIELD is a bitfield. Returns true if the optimization was successful,
5628 and there's nothing else to do. */
5631 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
5632 poly_uint64 pbitpos
,
5633 poly_uint64 pbitregion_start
,
5634 poly_uint64 pbitregion_end
,
5635 machine_mode mode1
, rtx str_rtx
,
5636 tree to
, tree src
, bool reverse
)
5638 /* str_mode is not guaranteed to be a scalar type. */
5639 machine_mode str_mode
= GET_MODE (str_rtx
);
5640 unsigned int str_bitsize
;
5645 enum tree_code code
;
5647 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
5648 if (mode1
!= VOIDmode
5649 || !pbitsize
.is_constant (&bitsize
)
5650 || !pbitpos
.is_constant (&bitpos
)
5651 || !pbitregion_start
.is_constant (&bitregion_start
)
5652 || !pbitregion_end
.is_constant (&bitregion_end
)
5653 || bitsize
>= BITS_PER_WORD
5654 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
5655 || str_bitsize
> BITS_PER_WORD
5656 || TREE_SIDE_EFFECTS (to
)
5657 || TREE_THIS_VOLATILE (to
))
5661 if (TREE_CODE (src
) != SSA_NAME
)
5663 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
5666 srcstmt
= get_gimple_for_ssa_name (src
);
5668 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
5671 code
= gimple_assign_rhs_code (srcstmt
);
5673 op0
= gimple_assign_rhs1 (srcstmt
);
5675 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
5676 to find its initialization. Hopefully the initialization will
5677 be from a bitfield load. */
5678 if (TREE_CODE (op0
) == SSA_NAME
)
5680 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
5682 /* We want to eventually have OP0 be the same as TO, which
5683 should be a bitfield. */
5685 || !is_gimple_assign (op0stmt
)
5686 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
5688 op0
= gimple_assign_rhs1 (op0stmt
);
5691 op1
= gimple_assign_rhs2 (srcstmt
);
5693 if (!operand_equal_p (to
, op0
, 0))
5696 if (MEM_P (str_rtx
))
5698 unsigned HOST_WIDE_INT offset1
;
5700 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
5701 str_bitsize
= BITS_PER_WORD
;
5703 scalar_int_mode best_mode
;
5704 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
5705 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
5707 str_mode
= best_mode
;
5708 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
5711 bitpos
%= str_bitsize
;
5712 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
5713 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
5715 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
5718 /* If the bit field covers the whole REG/MEM, store_field
5719 will likely generate better code. */
5720 if (bitsize
>= str_bitsize
)
5723 /* We can't handle fields split across multiple entities. */
5724 if (bitpos
+ bitsize
> str_bitsize
)
5727 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
5728 bitpos
= str_bitsize
- bitpos
- bitsize
;
5734 /* For now, just optimize the case of the topmost bitfield
5735 where we don't need to do any masking and also
5736 1 bit bitfields where xor can be used.
5737 We might win by one instruction for the other bitfields
5738 too if insv/extv instructions aren't used, so that
5739 can be added later. */
5740 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
5741 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
5744 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
5745 value
= convert_modes (str_mode
,
5746 TYPE_MODE (TREE_TYPE (op1
)), value
,
5747 TYPE_UNSIGNED (TREE_TYPE (op1
)));
5749 /* We may be accessing data outside the field, which means
5750 we can alias adjacent data. */
5751 if (MEM_P (str_rtx
))
5753 str_rtx
= shallow_copy_rtx (str_rtx
);
5754 set_mem_alias_set (str_rtx
, 0);
5755 set_mem_expr (str_rtx
, 0);
5758 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
5760 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
5764 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
5766 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
5768 value
= flip_storage_order (str_mode
, value
);
5769 result
= expand_binop (str_mode
, binop
, str_rtx
,
5770 value
, str_rtx
, 1, OPTAB_WIDEN
);
5771 if (result
!= str_rtx
)
5772 emit_move_insn (str_rtx
, result
);
5777 if (TREE_CODE (op1
) != INTEGER_CST
)
5779 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
5780 value
= convert_modes (str_mode
,
5781 TYPE_MODE (TREE_TYPE (op1
)), value
,
5782 TYPE_UNSIGNED (TREE_TYPE (op1
)));
5784 /* We may be accessing data outside the field, which means
5785 we can alias adjacent data. */
5786 if (MEM_P (str_rtx
))
5788 str_rtx
= shallow_copy_rtx (str_rtx
);
5789 set_mem_alias_set (str_rtx
, 0);
5790 set_mem_expr (str_rtx
, 0);
5793 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
5794 if (bitpos
+ bitsize
!= str_bitsize
)
5796 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
5798 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
5800 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
5802 value
= flip_storage_order (str_mode
, value
);
5803 result
= expand_binop (str_mode
, binop
, str_rtx
,
5804 value
, str_rtx
, 1, OPTAB_WIDEN
);
5805 if (result
!= str_rtx
)
5806 emit_move_insn (str_rtx
, result
);
5816 /* In the C++ memory model, consecutive bit fields in a structure are
5817 considered one memory location.
5819 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5820 returns the bit range of consecutive bits in which this COMPONENT_REF
5821 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5822 and *OFFSET may be adjusted in the process.
5824 If the access does not need to be restricted, 0 is returned in both
5825 *BITSTART and *BITEND. */
5828 get_bit_range (poly_uint64
*bitstart
, poly_uint64
*bitend
, tree exp
,
5829 poly_int64
*bitpos
, tree
*offset
)
5831 poly_int64 bitoffset
;
5834 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5836 field
= TREE_OPERAND (exp
, 1);
5837 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5838 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5839 need to limit the range we can access. */
5842 *bitstart
= *bitend
= 0;
5846 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5847 part of a larger bit field, then the representative does not serve any
5848 useful purpose. This can occur in Ada. */
5849 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5852 poly_int64 rbitsize
, rbitpos
;
5854 int unsignedp
, reversep
, volatilep
= 0;
5855 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5856 &roffset
, &rmode
, &unsignedp
, &reversep
,
5858 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5860 *bitstart
= *bitend
= 0;
5865 /* Compute the adjustment to bitpos from the offset of the field
5866 relative to the representative. DECL_FIELD_OFFSET of field and
5867 repr are the same by construction if they are not constants,
5868 see finish_bitfield_layout. */
5869 poly_uint64 field_offset
, repr_offset
;
5870 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5871 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5872 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5875 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5876 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5878 /* If the adjustment is larger than bitpos, we would have a negative bit
5879 position for the lower bound and this may wreak havoc later. Adjust
5880 offset and bitpos to make the lower bound non-negative in that case. */
5881 if (maybe_gt (bitoffset
, *bitpos
))
5883 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5884 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5886 *bitpos
+= adjust_bits
;
5887 if (*offset
== NULL_TREE
)
5888 *offset
= size_int (-adjust_bytes
);
5890 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5894 *bitstart
= *bitpos
- bitoffset
;
5896 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5899 /* Returns true if BASE is a DECL that does not reside in memory and
5900 has non-BLKmode. DECL_RTL must not be a MEM; if
5901 DECL_RTL was not set yet, return false. */
5904 non_mem_decl_p (tree base
)
5907 || TREE_ADDRESSABLE (base
)
5908 || DECL_MODE (base
) == BLKmode
)
5911 if (!DECL_RTL_SET_P (base
))
5914 return (!MEM_P (DECL_RTL (base
)));
5917 /* Returns true if REF refers to an object that does not
5918 reside in memory and has non-BLKmode. */
5921 mem_ref_refers_to_non_mem_p (tree ref
)
5925 if (TREE_CODE (ref
) == MEM_REF
5926 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5928 tree addr
= TREE_OPERAND (ref
, 0);
5930 if (TREE_CODE (addr
) != ADDR_EXPR
)
5933 base
= TREE_OPERAND (addr
, 0);
5938 return non_mem_decl_p (base
);
5941 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5942 is true, try generating a nontemporal store. */
5945 expand_assignment (tree to
, tree from
, bool nontemporal
)
5951 enum insn_code icode
;
5953 /* Don't crash if the lhs of the assignment was erroneous. */
5954 if (TREE_CODE (to
) == ERROR_MARK
)
5956 expand_normal (from
);
5960 /* Optimize away no-op moves without side-effects. */
5961 if (operand_equal_p (to
, from
, 0))
5964 /* Handle misaligned stores. */
5965 mode
= TYPE_MODE (TREE_TYPE (to
));
5966 if ((TREE_CODE (to
) == MEM_REF
5967 || TREE_CODE (to
) == TARGET_MEM_REF
5970 && !mem_ref_refers_to_non_mem_p (to
)
5971 && ((align
= get_object_alignment (to
))
5972 < GET_MODE_ALIGNMENT (mode
))
5973 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5974 != CODE_FOR_nothing
)
5975 || targetm
.slow_unaligned_access (mode
, align
)))
5979 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5980 /* Handle PARALLEL. */
5981 reg
= maybe_emit_group_store (reg
, TREE_TYPE (from
));
5982 reg
= force_not_mem (reg
);
5983 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5984 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5985 reg
= flip_storage_order (mode
, reg
);
5987 if (icode
!= CODE_FOR_nothing
)
5989 class expand_operand ops
[2];
5991 create_fixed_operand (&ops
[0], mem
);
5992 create_input_operand (&ops
[1], reg
, mode
);
5993 /* The movmisalign<mode> pattern cannot fail, else the assignment
5994 would silently be omitted. */
5995 expand_insn (icode
, 2, ops
);
5998 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
6003 /* Assignment of a structure component needs special treatment
6004 if the structure component's rtx is not simply a MEM.
6005 Assignment of an array element at a constant index, and assignment of
6006 an array element in an unaligned packed structure field, has the same
6007 problem. Same for (partially) storing into a non-memory object. */
6008 if (handled_component_p (to
)
6009 || (TREE_CODE (to
) == MEM_REF
6010 && (REF_REVERSE_STORAGE_ORDER (to
)
6011 || mem_ref_refers_to_non_mem_p (to
)))
6012 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
6015 poly_int64 bitsize
, bitpos
;
6016 poly_uint64 bitregion_start
= 0;
6017 poly_uint64 bitregion_end
= 0;
6019 int unsignedp
, reversep
, volatilep
= 0;
6023 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
6024 &unsignedp
, &reversep
, &volatilep
);
6026 /* Make sure bitpos is not negative, it can wreak havoc later. */
6027 if (maybe_lt (bitpos
, 0))
6029 gcc_assert (offset
== NULL_TREE
);
6030 offset
= size_int (bits_to_bytes_round_down (bitpos
));
6031 bitpos
= num_trailing_bits (bitpos
);
6034 if (TREE_CODE (to
) == COMPONENT_REF
6035 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
6036 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
6037 /* The C++ memory model naturally applies to byte-aligned fields.
6038 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
6039 BITSIZE are not byte-aligned, there is no need to limit the range
6040 we can access. This can occur with packed structures in Ada. */
6041 else if (maybe_gt (bitsize
, 0)
6042 && multiple_p (bitsize
, BITS_PER_UNIT
)
6043 && multiple_p (bitpos
, BITS_PER_UNIT
))
6045 bitregion_start
= bitpos
;
6046 bitregion_end
= bitpos
+ bitsize
- 1;
6049 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
6051 /* If the field has a mode, we want to access it in the
6052 field's mode, not the computed mode.
6053 If a MEM has VOIDmode (external with incomplete type),
6054 use BLKmode for it instead. */
6057 if (mode1
!= VOIDmode
)
6058 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
6059 else if (GET_MODE (to_rtx
) == VOIDmode
)
6060 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
6065 machine_mode address_mode
;
6068 if (!MEM_P (to_rtx
))
6070 /* We can get constant negative offsets into arrays with broken
6071 user code. Translate this to a trap instead of ICEing. */
6072 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
6073 expand_builtin_trap ();
6074 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
6077 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
6078 address_mode
= get_address_mode (to_rtx
);
6079 if (GET_MODE (offset_rtx
) != address_mode
)
6081 /* We cannot be sure that the RTL in offset_rtx is valid outside
6082 of a memory address context, so force it into a register
6083 before attempting to convert it to the desired mode. */
6084 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
6085 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
6088 /* If we have an expression in OFFSET_RTX and a non-zero
6089 byte offset in BITPOS, adding the byte offset before the
6090 OFFSET_RTX results in better intermediate code, which makes
6091 later rtl optimization passes perform better.
6093 We prefer intermediate code like this:
6095 r124:DI=r123:DI+0x18
6100 r124:DI=r123:DI+0x10
6101 [r124:DI+0x8]=r121:DI
6103 This is only done for aligned data values, as these can
6104 be expected to result in single move instructions. */
6106 if (mode1
!= VOIDmode
6107 && maybe_ne (bitpos
, 0)
6108 && maybe_gt (bitsize
, 0)
6109 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6110 && multiple_p (bitpos
, bitsize
)
6111 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
6112 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
6114 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
6115 bitregion_start
= 0;
6116 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
6117 bitregion_end
-= bitpos
;
6121 to_rtx
= offset_address (to_rtx
, offset_rtx
,
6122 highest_pow2_factor_for_target (to
,
6126 /* No action is needed if the target is not a memory and the field
6127 lies completely outside that target. This can occur if the source
6128 code contains an out-of-bounds access to a small array. */
6130 && GET_MODE (to_rtx
) != BLKmode
6131 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
6133 expand_normal (from
);
6136 /* Handle expand_expr of a complex value returning a CONCAT. */
6137 else if (GET_CODE (to_rtx
) == CONCAT
)
6139 machine_mode to_mode
= GET_MODE (to_rtx
);
6140 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
6141 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
6142 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
6143 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
6144 && known_eq (bitpos
, 0)
6145 && known_eq (bitsize
, mode_bitsize
))
6146 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
6147 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
6148 && known_eq (bitsize
, inner_bitsize
)
6149 && (known_eq (bitpos
, 0)
6150 || known_eq (bitpos
, inner_bitsize
)))
6151 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
6152 false, nontemporal
, reversep
);
6153 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
6154 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
6155 bitregion_start
, bitregion_end
,
6156 mode1
, from
, get_alias_set (to
),
6157 nontemporal
, reversep
);
6158 else if (known_ge (bitpos
, inner_bitsize
))
6159 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
6160 bitpos
- inner_bitsize
,
6161 bitregion_start
, bitregion_end
,
6162 mode1
, from
, get_alias_set (to
),
6163 nontemporal
, reversep
);
6164 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
6166 result
= expand_normal (from
);
6167 if (GET_CODE (result
) == CONCAT
)
6169 to_mode
= GET_MODE_INNER (to_mode
);
6170 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
6172 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
6175 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
6177 if (!from_real
|| !from_imag
)
6178 goto concat_store_slow
;
6179 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
6180 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
6184 machine_mode from_mode
6185 = GET_MODE (result
) == VOIDmode
6186 ? TYPE_MODE (TREE_TYPE (from
))
6187 : GET_MODE (result
);
6190 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
6193 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
6196 emit_move_insn (XEXP (to_rtx
, 0),
6197 read_complex_part (from_rtx
, false));
6198 emit_move_insn (XEXP (to_rtx
, 1),
6199 read_complex_part (from_rtx
, true));
6203 to_mode
= GET_MODE_INNER (to_mode
);
6205 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
6207 = simplify_gen_subreg (to_mode
, result
, from_mode
,
6208 GET_MODE_SIZE (to_mode
));
6209 if (!from_real
|| !from_imag
)
6210 goto concat_store_slow
;
6211 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
6212 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
6219 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
6220 GET_MODE_SIZE (GET_MODE (to_rtx
)));
6221 write_complex_part (temp
, XEXP (to_rtx
, 0), false, true);
6222 write_complex_part (temp
, XEXP (to_rtx
, 1), true, false);
6223 result
= store_field (temp
, bitsize
, bitpos
,
6224 bitregion_start
, bitregion_end
,
6225 mode1
, from
, get_alias_set (to
),
6226 nontemporal
, reversep
);
6227 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
6228 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
6231 /* For calls to functions returning variable length structures, if TO_RTX
6232 is not a MEM, go through a MEM because we must not create temporaries
6234 else if (!MEM_P (to_rtx
)
6235 && TREE_CODE (from
) == CALL_EXPR
6236 && COMPLETE_TYPE_P (TREE_TYPE (from
))
6237 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
6239 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
6240 GET_MODE_SIZE (GET_MODE (to_rtx
)));
6241 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
6242 bitregion_end
, mode1
, from
, get_alias_set (to
),
6243 nontemporal
, reversep
);
6244 emit_move_insn (to_rtx
, temp
);
6250 /* If the field is at offset zero, we could have been given the
6251 DECL_RTX of the parent struct. Don't munge it. */
6252 to_rtx
= shallow_copy_rtx (to_rtx
);
6253 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
6255 MEM_VOLATILE_P (to_rtx
) = 1;
6258 gcc_checking_assert (known_ge (bitpos
, 0));
6259 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
6260 bitregion_start
, bitregion_end
,
6261 mode1
, to_rtx
, to
, from
,
6264 else if (SUBREG_P (to_rtx
)
6265 && SUBREG_PROMOTED_VAR_P (to_rtx
))
6267 /* If to_rtx is a promoted subreg, we need to zero or sign
6268 extend the value afterwards. */
6269 if (TREE_CODE (to
) == MEM_REF
6270 && TYPE_MODE (TREE_TYPE (from
)) != BLKmode
6271 && !REF_REVERSE_STORAGE_ORDER (to
)
6272 && known_eq (bitpos
, 0)
6273 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (to_rtx
))))
6274 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
6275 /* Check if the field overlaps the MSB, requiring extension. */
6276 else if (maybe_eq (bitpos
+ bitsize
,
6277 GET_MODE_BITSIZE (GET_MODE (to_rtx
))))
6279 scalar_int_mode imode
= subreg_unpromoted_mode (to_rtx
);
6280 scalar_int_mode omode
= subreg_promoted_mode (to_rtx
);
6281 rtx to_rtx1
= lowpart_subreg (imode
, SUBREG_REG (to_rtx
),
6283 result
= store_field (to_rtx1
, bitsize
, bitpos
,
6284 bitregion_start
, bitregion_end
,
6285 mode1
, from
, get_alias_set (to
),
6286 nontemporal
, reversep
);
6287 /* If the target usually keeps IMODE appropriately
6288 extended in OMODE it's unsafe to refer to it using
6289 a SUBREG whilst this invariant doesn't hold. */
6290 if (targetm
.mode_rep_extended (imode
, omode
) != UNKNOWN
)
6291 to_rtx1
= simplify_gen_unary (TRUNCATE
, imode
,
6292 SUBREG_REG (to_rtx
), omode
);
6293 convert_move (SUBREG_REG (to_rtx
), to_rtx1
,
6294 SUBREG_PROMOTED_SIGN (to_rtx
));
6297 result
= store_field (to_rtx
, bitsize
, bitpos
,
6298 bitregion_start
, bitregion_end
,
6299 mode1
, from
, get_alias_set (to
),
6300 nontemporal
, reversep
);
6303 result
= store_field (to_rtx
, bitsize
, bitpos
,
6304 bitregion_start
, bitregion_end
,
6305 mode1
, from
, get_alias_set (to
),
6306 nontemporal
, reversep
);
6310 preserve_temp_slots (result
);
6315 /* If the rhs is a function call and its value is not an aggregate,
6316 call the function before we start to compute the lhs.
6317 This is needed for correct code for cases such as
6318 val = setjmp (buf) on machines where reference to val
6319 requires loading up part of an address in a separate insn.
6321 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
6322 since it might be a promoted variable where the zero- or sign- extension
6323 needs to be done. Handling this in the normal way is safe because no
6324 computation is done before the call. The same is true for SSA names. */
6325 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
6326 && COMPLETE_TYPE_P (TREE_TYPE (from
))
6327 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
6329 || TREE_CODE (to
) == PARM_DECL
6330 || TREE_CODE (to
) == RESULT_DECL
)
6331 && REG_P (DECL_RTL (to
)))
6332 || TREE_CODE (to
) == SSA_NAME
))
6337 value
= expand_normal (from
);
6340 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
6342 /* Handle calls that return values in multiple non-contiguous locations.
6343 The Irix 6 ABI has examples of this. */
6344 if (GET_CODE (to_rtx
) == PARALLEL
)
6346 if (GET_CODE (value
) == PARALLEL
)
6347 emit_group_move (to_rtx
, value
);
6349 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
6350 int_size_in_bytes (TREE_TYPE (from
)));
6352 else if (GET_CODE (value
) == PARALLEL
)
6353 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
6354 int_size_in_bytes (TREE_TYPE (from
)));
6355 else if (GET_MODE (to_rtx
) == BLKmode
)
6357 /* Handle calls that return BLKmode values in registers. */
6359 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
6361 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
6365 if (POINTER_TYPE_P (TREE_TYPE (to
)))
6366 value
= convert_memory_address_addr_space
6367 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
6368 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
6370 emit_move_insn (to_rtx
, value
);
6373 preserve_temp_slots (to_rtx
);
6378 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
6379 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
6381 /* Don't move directly into a return register. */
6382 if (TREE_CODE (to
) == RESULT_DECL
6383 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
6389 /* If the source is itself a return value, it still is in a pseudo at
6390 this point so we can move it back to the return register directly. */
6392 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
6393 && TREE_CODE (from
) != CALL_EXPR
)
6394 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
6396 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
6398 /* Handle calls that return values in multiple non-contiguous locations.
6399 The Irix 6 ABI has examples of this. */
6400 if (GET_CODE (to_rtx
) == PARALLEL
)
6402 if (GET_CODE (temp
) == PARALLEL
)
6403 emit_group_move (to_rtx
, temp
);
6405 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
6406 int_size_in_bytes (TREE_TYPE (from
)));
6409 emit_move_insn (to_rtx
, temp
);
6411 preserve_temp_slots (to_rtx
);
6416 /* In case we are returning the contents of an object which overlaps
6417 the place the value is being stored, use a safe function when copying
6418 a value through a pointer into a structure value return block. */
6419 if (TREE_CODE (to
) == RESULT_DECL
6420 && TREE_CODE (from
) == INDIRECT_REF
6421 && ADDR_SPACE_GENERIC_P
6422 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
6423 && refs_may_alias_p (to
, from
)
6424 && cfun
->returns_struct
6425 && !cfun
->returns_pcc_struct
)
6430 size
= expr_size (from
);
6431 from_rtx
= expand_normal (from
);
6433 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
6435 preserve_temp_slots (to_rtx
);
6440 /* Compute FROM and store the value in the rtx we got. */
6443 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
6444 preserve_temp_slots (result
);
6449 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
6450 succeeded, false otherwise. */
6453 emit_storent_insn (rtx to
, rtx from
)
6455 class expand_operand ops
[2];
6456 machine_mode mode
= GET_MODE (to
);
6457 enum insn_code code
= optab_handler (storent_optab
, mode
);
6459 if (code
== CODE_FOR_nothing
)
6462 create_fixed_operand (&ops
[0], to
);
6463 create_input_operand (&ops
[1], from
, mode
);
6464 return maybe_expand_insn (code
, 2, ops
);
6467 /* Helper function for store_expr storing of STRING_CST. */
6470 string_cst_read_str (void *data
, void *, HOST_WIDE_INT offset
,
6471 fixed_size_mode mode
)
6473 tree str
= (tree
) data
;
6475 gcc_assert (offset
>= 0);
6476 if (offset
>= TREE_STRING_LENGTH (str
))
6479 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
6480 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
6482 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
6483 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
6484 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
6485 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
6486 return c_readstr (p
, mode
, false);
6489 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
6492 /* Generate code for computing expression EXP,
6493 and storing the value into TARGET.
6495 If the mode is BLKmode then we may return TARGET itself.
6496 It turns out that in BLKmode it doesn't cause a problem.
6497 because C has no operators that could combine two different
6498 assignments into the same BLKmode object with different values
6499 with no sequence point. Will other languages need this to
6502 If CALL_PARAM_P is nonzero, this is a store into a call param on the
6503 stack, and block moves may need to be treated specially.
6505 If NONTEMPORAL is true, try using a nontemporal store instruction.
6507 If REVERSE is true, the store is to be done in reverse order. */
6510 store_expr (tree exp
, rtx target
, int call_param_p
,
6511 bool nontemporal
, bool reverse
)
6514 rtx alt_rtl
= NULL_RTX
;
6515 location_t loc
= curr_insn_location ();
6516 bool shortened_string_cst
= false;
6518 if (VOID_TYPE_P (TREE_TYPE (exp
)))
6520 /* C++ can generate ?: expressions with a throw expression in one
6521 branch and an rvalue in the other. Here, we resolve attempts to
6522 store the throw expression's nonexistent result. */
6523 gcc_assert (!call_param_p
);
6524 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6527 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
6529 /* Perform first part of compound expression, then assign from second
6531 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
6532 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
6533 return store_expr (TREE_OPERAND (exp
, 1), target
,
6534 call_param_p
, nontemporal
, reverse
);
6536 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
6538 /* For conditional expression, get safe form of the target. Then
6539 test the condition, doing the appropriate assignment on either
6540 side. This avoids the creation of unnecessary temporaries.
6541 For non-BLKmode, it is more efficient not to do this. */
6543 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
6545 do_pending_stack_adjust ();
6547 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
6548 profile_probability::uninitialized ());
6549 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
6550 nontemporal
, reverse
);
6551 emit_jump_insn (targetm
.gen_jump (lab2
));
6554 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
6555 nontemporal
, reverse
);
6561 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
6562 /* If this is a scalar in a register that is stored in a wider mode
6563 than the declared mode, compute the result into its declared mode
6564 and then convert to the wider mode. Our value is the computed
6567 rtx inner_target
= 0;
6568 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
6569 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
6571 /* We can do the conversion inside EXP, which will often result
6572 in some optimizations. Do the conversion in two steps: first
6573 change the signedness, if needed, then the extend. But don't
6574 do this if the type of EXP is a subtype of something else
6575 since then the conversion might involve more than just
6576 converting modes. */
6577 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
6578 && TREE_TYPE (TREE_TYPE (exp
)) == 0
6579 && GET_MODE_PRECISION (outer_mode
)
6580 == TYPE_PRECISION (TREE_TYPE (exp
)))
6582 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
6583 TYPE_UNSIGNED (TREE_TYPE (exp
))))
6585 /* Some types, e.g. Fortran's logical*4, won't have a signed
6586 version, so use the mode instead. */
6588 = (signed_or_unsigned_type_for
6589 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
6591 ntype
= lang_hooks
.types
.type_for_mode
6592 (TYPE_MODE (TREE_TYPE (exp
)),
6593 SUBREG_PROMOTED_SIGN (target
));
6595 exp
= fold_convert_loc (loc
, ntype
, exp
);
6598 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
6599 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
6602 inner_target
= SUBREG_REG (target
);
6605 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
6606 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
6609 /* If TEMP is a VOIDmode constant, use convert_modes to make
6610 sure that we properly convert it. */
6611 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
6613 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
6614 temp
, SUBREG_PROMOTED_SIGN (target
));
6615 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
6616 SUBREG_PROMOTED_SIGN (target
));
6618 else if (!SCALAR_INT_MODE_P (GET_MODE (temp
)))
6619 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
6620 temp
, SUBREG_PROMOTED_SIGN (target
));
6622 convert_move (SUBREG_REG (target
), temp
,
6623 SUBREG_PROMOTED_SIGN (target
));
6627 else if ((TREE_CODE (exp
) == STRING_CST
6628 || (TREE_CODE (exp
) == MEM_REF
6629 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6630 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6632 && integer_zerop (TREE_OPERAND (exp
, 1))))
6633 && !nontemporal
&& !call_param_p
6636 /* Optimize initialization of an array with a STRING_CST. */
6637 HOST_WIDE_INT exp_len
, str_copy_len
;
6639 tree str
= TREE_CODE (exp
) == STRING_CST
6640 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
6642 exp_len
= int_expr_size (exp
);
6646 if (TREE_STRING_LENGTH (str
) <= 0)
6649 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
6650 MEM_ALIGN (target
), false))
6652 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
6653 MEM_ALIGN (target
), false, RETURN_BEGIN
);
6657 str_copy_len
= TREE_STRING_LENGTH (str
);
6659 /* Trailing NUL bytes in EXP will be handled by the call to
6660 clear_storage, which is more efficient than copying them from
6661 the STRING_CST, so trim those from STR_COPY_LEN. */
6662 while (str_copy_len
)
6664 if (TREE_STRING_POINTER (str
)[str_copy_len
- 1])
6669 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
6671 str_copy_len
+= STORE_MAX_PIECES
- 1;
6672 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
6674 if (str_copy_len
>= exp_len
)
6677 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
6678 (void *) str
, MEM_ALIGN (target
), false))
6681 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
6682 (void *) str
, MEM_ALIGN (target
), false,
6684 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
6685 exp_len
- str_copy_len
),
6686 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
6694 /* If we want to use a nontemporal or a reverse order store, force the
6695 value into a register first. */
6696 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
6698 if (TREE_CODE (exp
) == STRING_CST
6699 && tmp_target
== target
6700 && GET_MODE (target
) == BLKmode
6701 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
6703 rtx size
= expr_size (exp
);
6704 if (CONST_INT_P (size
)
6705 && size
!= const0_rtx
6707 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
6709 /* If the STRING_CST has much larger array type than
6710 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
6711 it into the rodata section as the code later on will use
6712 memset zero for the remainder anyway. See PR95052. */
6713 tmp_target
= NULL_RTX
;
6714 rexp
= copy_node (exp
);
6716 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
6717 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
6719 shortened_string_cst
= true;
6722 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
6724 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
6726 if (shortened_string_cst
)
6728 gcc_assert (MEM_P (temp
));
6729 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
6733 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
6734 the same as that of TARGET, adjust the constant. This is needed, for
6735 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
6736 only a word-sized value. */
6737 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
6738 && TREE_CODE (exp
) != ERROR_MARK
6739 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
6741 gcc_assert (!shortened_string_cst
);
6742 if (GET_MODE_CLASS (GET_MODE (target
))
6743 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
6744 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
6745 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
6747 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
6748 TYPE_MODE (TREE_TYPE (exp
)), 0);
6752 if (GET_MODE (temp
) == VOIDmode
)
6753 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
6754 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
6757 /* If value was not generated in the target, store it there.
6758 Convert the value to TARGET's type first if necessary and emit the
6759 pending incrementations that have been queued when expanding EXP.
6760 Note that we cannot emit the whole queue blindly because this will
6761 effectively disable the POST_INC optimization later.
6763 If TEMP and TARGET compare equal according to rtx_equal_p, but
6764 one or both of them are volatile memory refs, we have to distinguish
6766 - expand_expr has used TARGET. In this case, we must not generate
6767 another copy. This can be detected by TARGET being equal according
6769 - expand_expr has not used TARGET - that means that the source just
6770 happens to have the same RTX form. Since temp will have been created
6771 by expand_expr, it will compare unequal according to == .
6772 We must generate a copy in this case, to reach the correct number
6773 of volatile memory references. */
6775 if ((! rtx_equal_p (temp
, target
)
6776 || (temp
!= target
&& (side_effects_p (temp
)
6777 || side_effects_p (target
)
6779 && !mems_same_for_tbaa_p (temp
, target
)))))
6780 && TREE_CODE (exp
) != ERROR_MARK
6781 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
6782 but TARGET is not valid memory reference, TEMP will differ
6783 from TARGET although it is really the same location. */
6785 && rtx_equal_p (alt_rtl
, target
)
6786 && !side_effects_p (alt_rtl
)
6787 && !side_effects_p (target
))
6788 /* If there's nothing to copy, don't bother. Don't call
6789 expr_size unless necessary, because some front-ends (C++)
6790 expr_size-hook must not be given objects that are not
6791 supposed to be bit-copied or bit-initialized. */
6792 && expr_size (exp
) != const0_rtx
)
6794 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
6796 gcc_assert (!shortened_string_cst
);
6797 if (GET_MODE (target
) == BLKmode
)
6799 /* Handle calls that return BLKmode values in registers. */
6800 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6801 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
6803 store_bit_field (target
,
6804 rtx_to_poly_int64 (expr_size (exp
))
6806 0, 0, 0, GET_MODE (temp
), temp
, reverse
,
6810 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
6813 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
6815 /* Handle copying a string constant into an array. The string
6816 constant may be shorter than the array. So copy just the string's
6817 actual length, and clear the rest. First get the size of the data
6818 type of the string, which is actually the size of the target. */
6819 rtx size
= expr_size (exp
);
6821 if (CONST_INT_P (size
)
6822 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
6823 emit_block_move (target
, temp
, size
,
6825 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6828 machine_mode pointer_mode
6829 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
6830 machine_mode address_mode
= get_address_mode (target
);
6832 /* Compute the size of the data to copy from the string. */
6834 = size_binop_loc (loc
, MIN_EXPR
,
6835 make_tree (sizetype
, size
),
6836 size_int (TREE_STRING_LENGTH (exp
)));
6838 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
6840 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
6841 rtx_code_label
*label
= 0;
6843 /* Copy that much. */
6844 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
6845 TYPE_UNSIGNED (sizetype
));
6846 emit_block_move (target
, temp
, copy_size_rtx
,
6848 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6850 /* Figure out how much is left in TARGET that we have to clear.
6851 Do all calculations in pointer_mode. */
6852 poly_int64 const_copy_size
;
6853 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
6855 size
= plus_constant (address_mode
, size
, -const_copy_size
);
6856 target
= adjust_address (target
, BLKmode
, const_copy_size
);
6860 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
6861 copy_size_rtx
, NULL_RTX
, 0,
6864 if (GET_MODE (copy_size_rtx
) != address_mode
)
6865 copy_size_rtx
= convert_to_mode (address_mode
,
6867 TYPE_UNSIGNED (sizetype
));
6869 target
= offset_address (target
, copy_size_rtx
,
6870 highest_pow2_factor (copy_size
));
6871 label
= gen_label_rtx ();
6872 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6873 GET_MODE (size
), 0, label
);
6876 if (size
!= const0_rtx
)
6877 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6883 else if (shortened_string_cst
)
6885 /* Handle calls that return values in multiple non-contiguous locations.
6886 The Irix 6 ABI has examples of this. */
6887 else if (GET_CODE (target
) == PARALLEL
)
6889 if (GET_CODE (temp
) == PARALLEL
)
6890 emit_group_move (target
, temp
);
6892 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6893 int_size_in_bytes (TREE_TYPE (exp
)));
6895 else if (GET_CODE (temp
) == PARALLEL
)
6896 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6897 int_size_in_bytes (TREE_TYPE (exp
)));
6898 else if (GET_MODE (temp
) == BLKmode
)
6899 emit_block_move (target
, temp
, expr_size (exp
),
6901 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6902 /* If we emit a nontemporal store, there is nothing else to do. */
6903 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6908 temp
= flip_storage_order (GET_MODE (target
), temp
);
6909 temp
= force_operand (temp
, target
);
6911 emit_move_insn (target
, temp
);
6915 gcc_assert (!shortened_string_cst
);
6920 /* Return true if field F of structure TYPE is a flexible array. */
6923 flexible_array_member_p (const_tree f
, const_tree type
)
6928 return (DECL_CHAIN (f
) == NULL
6929 && TREE_CODE (tf
) == ARRAY_TYPE
6931 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6932 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6933 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6934 && int_size_in_bytes (type
) >= 0);
6937 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6938 must have in order for it to completely initialize a value of type TYPE.
6939 Return -1 if the number isn't known.
6941 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6943 static HOST_WIDE_INT
6944 count_type_elements (const_tree type
, bool for_ctor_p
)
6946 switch (TREE_CODE (type
))
6952 nelts
= array_type_nelts (type
);
6953 if (nelts
&& tree_fits_uhwi_p (nelts
))
6955 unsigned HOST_WIDE_INT n
;
6957 n
= tree_to_uhwi (nelts
) + 1;
6958 if (n
== 0 || for_ctor_p
)
6961 return n
* count_type_elements (TREE_TYPE (type
), false);
6963 return for_ctor_p
? -1 : 1;
6968 unsigned HOST_WIDE_INT n
;
6972 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6973 if (TREE_CODE (f
) == FIELD_DECL
)
6976 n
+= count_type_elements (TREE_TYPE (f
), false);
6977 else if (!flexible_array_member_p (f
, type
))
6978 /* Don't count flexible arrays, which are not supposed
6979 to be initialized. */
6987 case QUAL_UNION_TYPE
:
6992 gcc_assert (!for_ctor_p
);
6993 /* Estimate the number of scalars in each field and pick the
6994 maximum. Other estimates would do instead; the idea is simply
6995 to make sure that the estimate is not sensitive to the ordering
6998 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6999 if (TREE_CODE (f
) == FIELD_DECL
)
7001 m
= count_type_elements (TREE_TYPE (f
), false);
7002 /* If the field doesn't span the whole union, add an extra
7003 scalar for the rest. */
7004 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
7005 TYPE_SIZE (type
)) != 1)
7018 unsigned HOST_WIDE_INT nelts
;
7019 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
7027 case FIXED_POINT_TYPE
:
7032 case REFERENCE_TYPE
:
7050 /* Helper for categorize_ctor_elements. Identical interface. */
7053 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
7054 HOST_WIDE_INT
*p_unique_nz_elts
,
7055 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
7057 unsigned HOST_WIDE_INT idx
;
7058 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
7059 tree value
, purpose
, elt_type
;
7061 /* Whether CTOR is a valid constant initializer, in accordance with what
7062 initializer_constant_valid_p does. If inferred from the constructor
7063 elements, true until proven otherwise. */
7064 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
7065 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
7071 elt_type
= NULL_TREE
;
7073 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
7075 HOST_WIDE_INT mult
= 1;
7077 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
7079 tree lo_index
= TREE_OPERAND (purpose
, 0);
7080 tree hi_index
= TREE_OPERAND (purpose
, 1);
7082 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
7083 mult
= (tree_to_uhwi (hi_index
)
7084 - tree_to_uhwi (lo_index
) + 1);
7087 elt_type
= TREE_TYPE (value
);
7089 switch (TREE_CODE (value
))
7093 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
7095 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
7098 nz_elts
+= mult
* nz
;
7099 unique_nz_elts
+= unz
;
7100 init_elts
+= mult
* ic
;
7102 if (const_from_elts_p
&& const_p
)
7103 const_p
= const_elt_p
;
7110 if (!initializer_zerop (value
))
7119 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
7120 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
7121 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
7125 if (!initializer_zerop (TREE_REALPART (value
)))
7130 if (!initializer_zerop (TREE_IMAGPART (value
)))
7135 init_elts
+= 2 * mult
;
7140 /* We can only construct constant-length vectors using
7142 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
7143 for (unsigned int i
= 0; i
< nunits
; ++i
)
7145 tree v
= VECTOR_CST_ELT (value
, i
);
7146 if (!initializer_zerop (v
))
7158 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
7159 nz_elts
+= mult
* tc
;
7160 unique_nz_elts
+= tc
;
7161 init_elts
+= mult
* tc
;
7163 if (const_from_elts_p
&& const_p
)
7165 = initializer_constant_valid_p (value
,
7167 TYPE_REVERSE_STORAGE_ORDER
7175 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
7176 num_fields
, elt_type
))
7177 *p_complete
= false;
7179 *p_nz_elts
+= nz_elts
;
7180 *p_unique_nz_elts
+= unique_nz_elts
;
7181 *p_init_elts
+= init_elts
;
7186 /* Examine CTOR to discover:
7187 * how many scalar fields are set to nonzero values,
7188 and place it in *P_NZ_ELTS;
7189 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
7190 high - low + 1 (this can be useful for callers to determine ctors
7191 that could be cheaply initialized with - perhaps nested - loops
7192 compared to copied from huge read-only data),
7193 and place it in *P_UNIQUE_NZ_ELTS;
7194 * how many scalar fields in total are in CTOR,
7195 and place it in *P_ELT_COUNT.
7196 * whether the constructor is complete -- in the sense that every
7197 meaningful byte is explicitly given a value --
7198 and place it in *P_COMPLETE.
7200 Return whether or not CTOR is a valid static constant initializer, the same
7201 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
7204 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
7205 HOST_WIDE_INT
*p_unique_nz_elts
,
7206 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
7209 *p_unique_nz_elts
= 0;
7213 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
7214 p_init_elts
, p_complete
);
7217 /* Return true if constructor CTOR is simple enough to be materialized
7218 in an integer mode register. Limit the size to WORDS words, which
7222 immediate_const_ctor_p (const_tree ctor
, unsigned int words
)
7224 /* Allow function to be called with a VAR_DECL's DECL_INITIAL. */
7225 if (!ctor
|| TREE_CODE (ctor
) != CONSTRUCTOR
)
7228 return TREE_CONSTANT (ctor
)
7229 && !TREE_ADDRESSABLE (ctor
)
7230 && CONSTRUCTOR_NELTS (ctor
)
7231 && TREE_CODE (TREE_TYPE (ctor
)) != ARRAY_TYPE
7232 && int_expr_size (ctor
) <= words
* UNITS_PER_WORD
7233 && initializer_constant_valid_for_bitfield_p (ctor
);
7236 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
7237 of which had type LAST_TYPE. Each element was itself a complete
7238 initializer, in the sense that every meaningful byte was explicitly
7239 given a value. Return true if the same is true for the constructor
7243 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
7244 const_tree last_type
)
7246 if (TREE_CODE (type
) == UNION_TYPE
7247 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
7252 gcc_assert (num_elts
== 1 && last_type
);
7254 /* ??? We could look at each element of the union, and find the
7255 largest element. Which would avoid comparing the size of the
7256 initialized element against any tail padding in the union.
7257 Doesn't seem worth the effort... */
7258 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
7261 return count_type_elements (type
, true) == num_elts
;
7264 /* Return true if EXP contains mostly (3/4) zeros. */
7267 mostly_zeros_p (const_tree exp
)
7269 if (TREE_CODE (exp
) == CONSTRUCTOR
)
7271 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
7274 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
7276 return !complete_p
|| nz_elts
< init_elts
/ 4;
7279 return initializer_zerop (exp
);
7282 /* Return true if EXP contains all zeros. */
7285 all_zeros_p (const_tree exp
)
7287 if (TREE_CODE (exp
) == CONSTRUCTOR
)
7289 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
7292 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
7294 return nz_elts
== 0;
7297 return initializer_zerop (exp
);
7300 /* Helper function for store_constructor.
7301 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
7302 CLEARED is as for store_constructor.
7303 ALIAS_SET is the alias set to use for any stores.
7304 If REVERSE is true, the store is to be done in reverse order.
7306 This provides a recursive shortcut back to store_constructor when it isn't
7307 necessary to go through store_field. This is so that we can pass through
7308 the cleared field to let store_constructor know that we may not have to
7309 clear a substructure if the outer structure has already been cleared. */
7312 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
7313 poly_uint64 bitregion_start
,
7314 poly_uint64 bitregion_end
,
7316 tree exp
, int cleared
,
7317 alias_set_type alias_set
, bool reverse
)
7320 poly_uint64 bytesize
;
7321 if (TREE_CODE (exp
) == CONSTRUCTOR
7322 /* We can only call store_constructor recursively if the size and
7323 bit position are on a byte boundary. */
7324 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
7325 && maybe_ne (bitsize
, 0U)
7326 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
7327 /* If we have a nonzero bitpos for a register target, then we just
7328 let store_field do the bitfield handling. This is unlikely to
7329 generate unnecessary clear instructions anyways. */
7330 && (known_eq (bitpos
, 0) || MEM_P (target
)))
7334 machine_mode target_mode
= GET_MODE (target
);
7335 if (target_mode
!= BLKmode
7336 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
7337 target_mode
= BLKmode
;
7338 target
= adjust_address (target
, target_mode
, bytepos
);
7342 /* Update the alias set, if required. */
7343 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
7344 && MEM_ALIAS_SET (target
) != 0)
7346 target
= copy_rtx (target
);
7347 set_mem_alias_set (target
, alias_set
);
7350 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
7353 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
7354 exp
, alias_set
, false, reverse
);
7358 /* Returns the number of FIELD_DECLs in TYPE. */
7361 fields_length (const_tree type
)
7363 tree t
= TYPE_FIELDS (type
);
7366 for (; t
; t
= DECL_CHAIN (t
))
7367 if (TREE_CODE (t
) == FIELD_DECL
)
7374 /* Store the value of constructor EXP into the rtx TARGET.
7375 TARGET is either a REG or a MEM; we know it cannot conflict, since
7376 safe_from_p has been called.
7377 CLEARED is true if TARGET is known to have been zero'd.
7378 SIZE is the number of bytes of TARGET we are allowed to modify: this
7379 may not be the same as the size of EXP if we are assigning to a field
7380 which has been packed to exclude padding bits.
7381 If REVERSE is true, the store is to be done in reverse order. */
7384 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
7387 tree type
= TREE_TYPE (exp
);
7388 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
7389 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
7391 switch (TREE_CODE (type
))
7395 case QUAL_UNION_TYPE
:
7397 unsigned HOST_WIDE_INT idx
;
7400 /* The storage order is specified for every aggregate type. */
7401 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
7403 /* If size is zero or the target is already cleared, do nothing. */
7404 if (known_eq (size
, 0) || cleared
)
7406 /* We either clear the aggregate or indicate the value is dead. */
7407 else if ((TREE_CODE (type
) == UNION_TYPE
7408 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
7409 && ! CONSTRUCTOR_ELTS (exp
))
7410 /* If the constructor is empty, clear the union. */
7412 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7416 /* If we are building a static constructor into a register,
7417 set the initial value as zero so we can fold the value into
7418 a constant. But if more than one register is involved,
7419 this probably loses. */
7420 else if (REG_P (target
) && TREE_STATIC (exp
)
7421 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
7422 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
7424 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
7428 /* If the constructor has fewer fields than the structure or
7429 if we are initializing the structure to mostly zeros, clear
7430 the whole structure first. Don't do this if TARGET is a
7431 register whose mode size isn't equal to SIZE since
7432 clear_storage can't handle this case. */
7433 else if (known_size_p (size
)
7434 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
7435 || mostly_zeros_p (exp
))
7437 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
7439 clear_storage (target
, gen_int_mode (size
, Pmode
),
7444 if (REG_P (target
) && !cleared
)
7445 emit_clobber (target
);
7447 /* Store each element of the constructor into the
7448 corresponding field of TARGET. */
7449 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
7452 HOST_WIDE_INT bitsize
;
7453 HOST_WIDE_INT bitpos
= 0;
7455 rtx to_rtx
= target
;
7457 /* Just ignore missing fields. We cleared the whole
7458 structure, above, if any fields are missing. */
7462 if (cleared
&& initializer_zerop (value
))
7465 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
7466 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
7470 mode
= DECL_MODE (field
);
7471 if (DECL_BIT_FIELD (field
))
7474 offset
= DECL_FIELD_OFFSET (field
);
7475 if (tree_fits_shwi_p (offset
)
7476 && tree_fits_shwi_p (bit_position (field
)))
7478 bitpos
= int_bit_position (field
);
7484 /* If this initializes a field that is smaller than a
7485 word, at the start of a word, try to widen it to a full
7486 word. This special case allows us to output C++ member
7487 function initializations in a form that the optimizers
7489 if (WORD_REGISTER_OPERATIONS
7491 && bitsize
< BITS_PER_WORD
7492 && bitpos
% BITS_PER_WORD
== 0
7493 && GET_MODE_CLASS (mode
) == MODE_INT
7494 && TREE_CODE (value
) == INTEGER_CST
7496 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
7498 type
= TREE_TYPE (value
);
7500 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
7502 type
= lang_hooks
.types
.type_for_mode
7503 (word_mode
, TYPE_UNSIGNED (type
));
7504 value
= fold_convert (type
, value
);
7505 /* Make sure the bits beyond the original bitsize are zero
7506 so that we can correctly avoid extra zeroing stores in
7507 later constructor elements. */
7509 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
7511 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
7514 if (BYTES_BIG_ENDIAN
)
7516 = fold_build2 (LSHIFT_EXPR
, type
, value
,
7517 build_int_cst (type
,
7518 BITS_PER_WORD
- bitsize
));
7519 bitsize
= BITS_PER_WORD
;
7523 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
7524 && DECL_NONADDRESSABLE_P (field
))
7526 to_rtx
= copy_rtx (to_rtx
);
7527 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
7530 store_constructor_field (to_rtx
, bitsize
, bitpos
,
7531 0, bitregion_end
, mode
,
7533 get_alias_set (TREE_TYPE (field
)),
7541 unsigned HOST_WIDE_INT i
;
7544 tree elttype
= TREE_TYPE (type
);
7545 bool const_bounds_p
;
7546 HOST_WIDE_INT minelt
= 0;
7547 HOST_WIDE_INT maxelt
= 0;
7549 /* The storage order is specified for every aggregate type. */
7550 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
7552 domain
= TYPE_DOMAIN (type
);
7553 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
7554 && TYPE_MAX_VALUE (domain
)
7555 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
7556 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
7558 /* If we have constant bounds for the range of the type, get them. */
7561 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
7562 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
7565 /* If the constructor has fewer elements than the array, clear
7566 the whole array first. Similarly if this is static
7567 constructor of a non-BLKmode object. */
7569 need_to_clear
= false;
7570 else if (REG_P (target
) && TREE_STATIC (exp
))
7571 need_to_clear
= true;
7574 unsigned HOST_WIDE_INT idx
;
7575 HOST_WIDE_INT count
= 0, zero_count
= 0;
7576 need_to_clear
= ! const_bounds_p
;
7578 /* This loop is a more accurate version of the loop in
7579 mostly_zeros_p (it handles RANGE_EXPR in an index). It
7580 is also needed to check for missing elements. */
7581 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
7583 HOST_WIDE_INT this_node_count
;
7588 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
7590 tree lo_index
= TREE_OPERAND (index
, 0);
7591 tree hi_index
= TREE_OPERAND (index
, 1);
7593 if (! tree_fits_uhwi_p (lo_index
)
7594 || ! tree_fits_uhwi_p (hi_index
))
7596 need_to_clear
= true;
7600 this_node_count
= (tree_to_uhwi (hi_index
)
7601 - tree_to_uhwi (lo_index
) + 1);
7604 this_node_count
= 1;
7606 count
+= this_node_count
;
7607 if (mostly_zeros_p (value
))
7608 zero_count
+= this_node_count
;
7611 /* Clear the entire array first if there are any missing
7612 elements, or if the incidence of zero elements is >=
7615 && (count
< maxelt
- minelt
+ 1
7616 || 4 * zero_count
>= 3 * count
))
7617 need_to_clear
= true;
7620 if (need_to_clear
&& maybe_gt (size
, 0))
7623 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
7625 clear_storage (target
, gen_int_mode (size
, Pmode
),
7630 if (!cleared
&& REG_P (target
))
7631 /* Inform later passes that the old value is dead. */
7632 emit_clobber (target
);
7634 /* Store each element of the constructor into the
7635 corresponding element of TARGET, determined by counting the
7637 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
7641 HOST_WIDE_INT bitpos
;
7642 rtx xtarget
= target
;
7644 if (cleared
&& initializer_zerop (value
))
7647 mode
= TYPE_MODE (elttype
);
7648 if (mode
!= BLKmode
)
7649 bitsize
= GET_MODE_BITSIZE (mode
);
7650 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
7653 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
7655 tree lo_index
= TREE_OPERAND (index
, 0);
7656 tree hi_index
= TREE_OPERAND (index
, 1);
7657 rtx index_r
, pos_rtx
;
7658 HOST_WIDE_INT lo
, hi
, count
;
7661 /* If the range is constant and "small", unroll the loop. */
7663 && tree_fits_shwi_p (lo_index
)
7664 && tree_fits_shwi_p (hi_index
)
7665 && (lo
= tree_to_shwi (lo_index
),
7666 hi
= tree_to_shwi (hi_index
),
7667 count
= hi
- lo
+ 1,
7670 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
7671 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
7674 lo
-= minelt
; hi
-= minelt
;
7675 for (; lo
<= hi
; lo
++)
7677 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
7680 && !MEM_KEEP_ALIAS_SET_P (target
)
7681 && TREE_CODE (type
) == ARRAY_TYPE
7682 && TYPE_NONALIASED_COMPONENT (type
))
7684 target
= copy_rtx (target
);
7685 MEM_KEEP_ALIAS_SET_P (target
) = 1;
7688 store_constructor_field
7689 (target
, bitsize
, bitpos
, 0, bitregion_end
,
7690 mode
, value
, cleared
,
7691 get_alias_set (elttype
), reverse
);
7696 rtx_code_label
*loop_start
= gen_label_rtx ();
7697 rtx_code_label
*loop_end
= gen_label_rtx ();
7700 expand_normal (hi_index
);
7702 index
= build_decl (EXPR_LOCATION (exp
),
7703 VAR_DECL
, NULL_TREE
, domain
);
7704 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
7705 SET_DECL_RTL (index
, index_r
);
7706 store_expr (lo_index
, index_r
, 0, false, reverse
);
7708 /* Build the head of the loop. */
7709 do_pending_stack_adjust ();
7710 emit_label (loop_start
);
7712 /* Assign value to element index. */
7714 fold_convert (ssizetype
,
7715 fold_build2 (MINUS_EXPR
,
7718 TYPE_MIN_VALUE (domain
)));
7721 size_binop (MULT_EXPR
, position
,
7722 fold_convert (ssizetype
,
7723 TYPE_SIZE_UNIT (elttype
)));
7725 pos_rtx
= expand_normal (position
);
7726 xtarget
= offset_address (target
, pos_rtx
,
7727 highest_pow2_factor (position
));
7728 xtarget
= adjust_address (xtarget
, mode
, 0);
7729 if (TREE_CODE (value
) == CONSTRUCTOR
)
7730 store_constructor (value
, xtarget
, cleared
,
7731 exact_div (bitsize
, BITS_PER_UNIT
),
7734 store_expr (value
, xtarget
, 0, false, reverse
);
7736 /* Generate a conditional jump to exit the loop. */
7737 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
7739 jumpif (exit_cond
, loop_end
,
7740 profile_probability::uninitialized ());
7742 /* Update the loop counter, and jump to the head of
7744 expand_assignment (index
,
7745 build2 (PLUS_EXPR
, TREE_TYPE (index
),
7746 index
, integer_one_node
),
7749 emit_jump (loop_start
);
7751 /* Build the end of the loop. */
7752 emit_label (loop_end
);
7755 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
7756 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
7761 index
= ssize_int (1);
7764 index
= fold_convert (ssizetype
,
7765 fold_build2 (MINUS_EXPR
,
7768 TYPE_MIN_VALUE (domain
)));
7771 size_binop (MULT_EXPR
, index
,
7772 fold_convert (ssizetype
,
7773 TYPE_SIZE_UNIT (elttype
)));
7774 xtarget
= offset_address (target
,
7775 expand_normal (position
),
7776 highest_pow2_factor (position
));
7777 xtarget
= adjust_address (xtarget
, mode
, 0);
7778 store_expr (value
, xtarget
, 0, false, reverse
);
7783 bitpos
= ((tree_to_shwi (index
) - minelt
)
7784 * tree_to_uhwi (TYPE_SIZE (elttype
)));
7786 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
7788 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
7789 && TREE_CODE (type
) == ARRAY_TYPE
7790 && TYPE_NONALIASED_COMPONENT (type
))
7792 target
= copy_rtx (target
);
7793 MEM_KEEP_ALIAS_SET_P (target
) = 1;
7795 store_constructor_field (target
, bitsize
, bitpos
, 0,
7796 bitregion_end
, mode
, value
,
7797 cleared
, get_alias_set (elttype
),
7806 unsigned HOST_WIDE_INT idx
;
7807 constructor_elt
*ce
;
7810 insn_code icode
= CODE_FOR_nothing
;
7812 tree elttype
= TREE_TYPE (type
);
7813 int elt_size
= vector_element_bits (type
);
7814 machine_mode eltmode
= TYPE_MODE (elttype
);
7815 HOST_WIDE_INT bitsize
;
7816 HOST_WIDE_INT bitpos
;
7817 rtvec vector
= NULL
;
7819 unsigned HOST_WIDE_INT const_n_elts
;
7820 alias_set_type alias
;
7821 bool vec_vec_init_p
= false;
7822 machine_mode mode
= GET_MODE (target
);
7824 gcc_assert (eltmode
!= BLKmode
);
7826 /* Try using vec_duplicate_optab for uniform vectors. */
7827 if (!TREE_SIDE_EFFECTS (exp
)
7828 && VECTOR_MODE_P (mode
)
7829 && eltmode
== GET_MODE_INNER (mode
)
7830 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
7831 != CODE_FOR_nothing
)
7832 && (elt
= uniform_vector_p (exp
))
7833 && !VECTOR_TYPE_P (TREE_TYPE (elt
)))
7835 class expand_operand ops
[2];
7836 create_output_operand (&ops
[0], target
, mode
);
7837 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
7838 expand_insn (icode
, 2, ops
);
7839 if (!rtx_equal_p (target
, ops
[0].value
))
7840 emit_move_insn (target
, ops
[0].value
);
7843 /* Use sign-extension for uniform boolean vectors with
7844 integer modes. Effectively "vec_duplicate" for bitmasks. */
7845 if (!TREE_SIDE_EFFECTS (exp
)
7846 && VECTOR_BOOLEAN_TYPE_P (type
)
7847 && SCALAR_INT_MODE_P (mode
)
7848 && (elt
= uniform_vector_p (exp
))
7849 && !VECTOR_TYPE_P (TREE_TYPE (elt
)))
7851 rtx op0
= force_reg (TYPE_MODE (TREE_TYPE (elt
)),
7852 expand_normal (elt
));
7853 rtx tmp
= gen_reg_rtx (mode
);
7854 convert_move (tmp
, op0
, 0);
7856 /* Ensure no excess bits are set.
7857 GCN needs this for nunits < 64.
7858 x86 needs this for nunits < 8. */
7859 auto nunits
= TYPE_VECTOR_SUBPARTS (type
).to_constant ();
7860 if (maybe_ne (GET_MODE_PRECISION (mode
), nunits
))
7861 tmp
= expand_binop (mode
, and_optab
, tmp
,
7862 GEN_INT ((1 << nunits
) - 1), target
,
7865 emit_move_insn (target
, tmp
);
7869 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
7871 && VECTOR_MODE_P (mode
)
7872 && n_elts
.is_constant (&const_n_elts
))
7874 machine_mode emode
= eltmode
;
7875 bool vector_typed_elts_p
= false;
7877 if (CONSTRUCTOR_NELTS (exp
)
7878 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
7881 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
7882 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
7883 * TYPE_VECTOR_SUBPARTS (etype
),
7885 emode
= TYPE_MODE (etype
);
7886 vector_typed_elts_p
= true;
7888 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
7889 if (icode
!= CODE_FOR_nothing
)
7891 unsigned int n
= const_n_elts
;
7893 if (vector_typed_elts_p
)
7895 n
= CONSTRUCTOR_NELTS (exp
);
7896 vec_vec_init_p
= true;
7898 vector
= rtvec_alloc (n
);
7899 for (unsigned int k
= 0; k
< n
; k
++)
7900 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
7904 /* Compute the size of the elements in the CTOR. It differs
7905 from the size of the vector type elements only when the
7906 CTOR elements are vectors themselves. */
7907 tree val_type
= (CONSTRUCTOR_NELTS (exp
) != 0
7908 ? TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
)
7910 if (VECTOR_TYPE_P (val_type
))
7911 bitsize
= tree_to_uhwi (TYPE_SIZE (val_type
));
7915 /* If the constructor has fewer elements than the vector,
7916 clear the whole array first. Similarly if this is static
7917 constructor of a non-BLKmode object. */
7919 need_to_clear
= false;
7920 else if (REG_P (target
) && TREE_STATIC (exp
))
7921 need_to_clear
= true;
7924 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
7927 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
7929 int n_elts_here
= bitsize
/ elt_size
;
7930 count
+= n_elts_here
;
7931 if (mostly_zeros_p (value
))
7932 zero_count
+= n_elts_here
;
7935 /* Clear the entire vector first if there are any missing elements,
7936 or if the incidence of zero elements is >= 75%. */
7937 need_to_clear
= (maybe_lt (count
, n_elts
)
7938 || 4 * zero_count
>= 3 * count
);
7941 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7944 emit_move_insn (target
, CONST0_RTX (mode
));
7946 clear_storage (target
, gen_int_mode (size
, Pmode
),
7951 /* Inform later passes that the old value is dead. */
7952 if (!cleared
&& !vector
&& REG_P (target
) && maybe_gt (n_elts
, 1u))
7954 emit_move_insn (target
, CONST0_RTX (mode
));
7959 alias
= MEM_ALIAS_SET (target
);
7961 alias
= get_alias_set (elttype
);
7963 /* Store each element of the constructor into the corresponding
7964 element of TARGET, determined by counting the elements. */
7965 for (idx
= 0, i
= 0;
7966 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7967 idx
++, i
+= bitsize
/ elt_size
)
7969 HOST_WIDE_INT eltpos
;
7970 tree value
= ce
->value
;
7972 if (cleared
&& initializer_zerop (value
))
7976 eltpos
= tree_to_uhwi (ce
->index
);
7984 gcc_assert (ce
->index
== NULL_TREE
);
7985 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7989 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7990 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7994 machine_mode value_mode
7995 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7996 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7997 bitpos
= eltpos
* elt_size
;
7998 store_constructor_field (target
, bitsize
, bitpos
, 0,
7999 bitregion_end
, value_mode
,
8000 value
, cleared
, alias
, reverse
);
8005 emit_insn (GEN_FCN (icode
) (target
,
8006 gen_rtx_PARALLEL (mode
, vector
)));
8015 /* Store the value of EXP (an expression tree)
8016 into a subfield of TARGET which has mode MODE and occupies
8017 BITSIZE bits, starting BITPOS bits from the start of TARGET.
8018 If MODE is VOIDmode, it means that we are storing into a bit-field.
8020 BITREGION_START is bitpos of the first bitfield in this region.
8021 BITREGION_END is the bitpos of the ending bitfield in this region.
8022 These two fields are 0, if the C++ memory model does not apply,
8023 or we are not interested in keeping track of bitfield regions.
8025 Always return const0_rtx unless we have something particular to
8028 ALIAS_SET is the alias set for the destination. This value will
8029 (in general) be different from that for TARGET, since TARGET is a
8030 reference to the containing structure.
8032 If NONTEMPORAL is true, try generating a nontemporal store.
8034 If REVERSE is true, the store is to be done in reverse order. */
8037 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
8038 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
8039 machine_mode mode
, tree exp
,
8040 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
8042 if (TREE_CODE (exp
) == ERROR_MARK
)
8045 /* If we have nothing to store, do nothing unless the expression has
8046 side-effects. Don't do that for zero sized addressable lhs of
8048 if (known_eq (bitsize
, 0)
8049 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
8050 || TREE_CODE (exp
) != CALL_EXPR
))
8051 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
8053 if (GET_CODE (target
) == CONCAT
)
8055 /* We're storing into a struct containing a single __complex. */
8057 gcc_assert (known_eq (bitpos
, 0));
8058 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
8061 /* If the structure is in a register or if the component
8062 is a bit field, we cannot use addressing to access it.
8063 Use bit-field techniques or SUBREG to store in it. */
8065 poly_int64 decl_bitsize
;
8066 if (mode
== VOIDmode
8067 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
8068 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8069 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
8071 || GET_CODE (target
) == SUBREG
8072 /* If the field isn't aligned enough to store as an ordinary memref,
8073 store it as a bit field. */
8075 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
8076 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
8077 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
8078 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
8079 || (known_size_p (bitsize
)
8081 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
8082 /* If the RHS and field are a constant size and the size of the
8083 RHS isn't the same size as the bitfield, we must use bitfield
8085 || (known_size_p (bitsize
)
8086 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
8087 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
8089 /* Except for initialization of full bytes from a CONSTRUCTOR, which
8090 we will handle specially below. */
8091 && !(TREE_CODE (exp
) == CONSTRUCTOR
8092 && multiple_p (bitsize
, BITS_PER_UNIT
))
8093 /* And except for bitwise copying of TREE_ADDRESSABLE types,
8094 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
8095 includes some extra padding. store_expr / expand_expr will in
8096 that case call get_inner_reference that will have the bitsize
8097 we check here and thus the block move will not clobber the
8098 padding that shouldn't be clobbered. In the future we could
8099 replace the TREE_ADDRESSABLE check with a check that
8100 get_base_address needs to live in memory. */
8101 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
8102 || TREE_CODE (exp
) != COMPONENT_REF
8103 || !multiple_p (bitsize
, BITS_PER_UNIT
)
8104 || !multiple_p (bitpos
, BITS_PER_UNIT
)
8105 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
8107 || maybe_ne (decl_bitsize
, bitsize
))
8108 /* A call with an addressable return type and return-slot
8109 optimization must not need bitfield operations but we must
8110 pass down the original target. */
8111 && (TREE_CODE (exp
) != CALL_EXPR
8112 || !TREE_ADDRESSABLE (TREE_TYPE (exp
))
8113 || !CALL_EXPR_RETURN_SLOT_OPT (exp
)))
8114 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
8115 decl we must use bitfield operations. */
8116 || (known_size_p (bitsize
)
8117 && TREE_CODE (exp
) == MEM_REF
8118 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
8119 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
8120 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
8121 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
8126 /* If EXP is a NOP_EXPR of precision less than its mode, then that
8127 implies a mask operation. If the precision is the same size as
8128 the field we're storing into, that mask is redundant. This is
8129 particularly common with bit field assignments generated by the
8131 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
8134 tree type
= TREE_TYPE (exp
);
8135 if (INTEGRAL_TYPE_P (type
)
8136 && maybe_ne (TYPE_PRECISION (type
),
8137 GET_MODE_BITSIZE (TYPE_MODE (type
)))
8138 && known_eq (bitsize
, TYPE_PRECISION (type
)))
8140 tree op
= gimple_assign_rhs1 (nop_def
);
8141 type
= TREE_TYPE (op
);
8142 if (INTEGRAL_TYPE_P (type
)
8143 && known_ge (TYPE_PRECISION (type
), bitsize
))
8148 temp
= expand_normal (exp
);
8150 /* We don't support variable-sized BLKmode bitfields, since our
8151 handling of BLKmode is bound up with the ability to break
8152 things into words. */
8153 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
8155 /* Handle calls that return values in multiple non-contiguous locations.
8156 The Irix 6 ABI has examples of this. */
8157 if (GET_CODE (temp
) == PARALLEL
)
8159 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
8160 machine_mode temp_mode
= GET_MODE (temp
);
8161 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
8162 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
8163 rtx temp_target
= gen_reg_rtx (temp_mode
);
8164 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
8168 /* Handle calls that return BLKmode values in registers. */
8169 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
8171 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
8172 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
8176 /* If the value has aggregate type and an integral mode then, if BITSIZE
8177 is narrower than this mode and this is for big-endian data, we first
8178 need to put the value into the low-order bits for store_bit_field,
8179 except when MODE is BLKmode and BITSIZE larger than the word size
8180 (see the handling of fields larger than a word in store_bit_field).
8181 Moreover, the field may be not aligned on a byte boundary; in this
8182 case, if it has reverse storage order, it needs to be accessed as a
8183 scalar field with reverse storage order and we must first put the
8184 value into target order. */
8185 scalar_int_mode temp_mode
;
8186 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
8187 && is_int_mode (GET_MODE (temp
), &temp_mode
))
8189 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
8191 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
8194 temp
= flip_storage_order (temp_mode
, temp
);
8196 gcc_checking_assert (known_le (bitsize
, size
));
8197 if (maybe_lt (bitsize
, size
)
8198 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
8199 /* Use of to_constant for BLKmode was checked above. */
8200 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
8201 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
8202 size
- bitsize
, NULL_RTX
, 1);
8205 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
8206 if (mode
!= VOIDmode
&& mode
!= BLKmode
8207 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
8208 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
8210 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
8211 and BITPOS must be aligned on a byte boundary. If so, we simply do
8212 a block copy. Likewise for a BLKmode-like TARGET. */
8213 if (GET_MODE (temp
) == BLKmode
8214 && (GET_MODE (target
) == BLKmode
8216 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
8217 && multiple_p (bitpos
, BITS_PER_UNIT
)
8218 && multiple_p (bitsize
, BITS_PER_UNIT
))))
8220 gcc_assert (MEM_P (target
) && MEM_P (temp
));
8221 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8222 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
8224 target
= adjust_address (target
, VOIDmode
, bytepos
);
8225 emit_block_move (target
, temp
,
8226 gen_int_mode (bytesize
, Pmode
),
8232 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
8233 word size, we need to load the value (see again store_bit_field). */
8234 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
8236 temp_mode
= smallest_int_mode_for_size (bitsize
);
8237 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
8238 temp_mode
, false, NULL
);
8241 /* Store the value in the bitfield. */
8242 gcc_checking_assert (known_ge (bitpos
, 0));
8243 store_bit_field (target
, bitsize
, bitpos
,
8244 bitregion_start
, bitregion_end
,
8245 mode
, temp
, reverse
, false);
8251 /* Now build a reference to just the desired component. */
8252 rtx to_rtx
= adjust_address (target
, mode
,
8253 exact_div (bitpos
, BITS_PER_UNIT
));
8255 if (to_rtx
== target
)
8256 to_rtx
= copy_rtx (to_rtx
);
8258 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
8259 set_mem_alias_set (to_rtx
, alias_set
);
8261 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
8262 into a target smaller than its type; handle that case now. */
8263 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
8265 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
8266 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
8270 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
8274 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
8275 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
8276 codes and find the ultimate containing object, which we return.
8278 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
8279 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
8280 storage order of the field.
8281 If the position of the field is variable, we store a tree
8282 giving the variable offset (in units) in *POFFSET.
8283 This offset is in addition to the bit position.
8284 If the position is not variable, we store 0 in *POFFSET.
8286 If any of the extraction expressions is volatile,
8287 we store 1 in *PVOLATILEP. Otherwise we don't change that.
8289 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
8290 Otherwise, it is a mode that can be used to access the field.
8292 If the field describes a variable-sized object, *PMODE is set to
8293 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
8294 this case, but the address of the object can be found. */
8297 get_inner_reference (tree exp
, poly_int64
*pbitsize
,
8298 poly_int64
*pbitpos
, tree
*poffset
,
8299 machine_mode
*pmode
, int *punsignedp
,
8300 int *preversep
, int *pvolatilep
)
8303 machine_mode mode
= VOIDmode
;
8304 bool blkmode_bitfield
= false;
8305 tree offset
= size_zero_node
;
8306 poly_offset_int bit_offset
= 0;
8308 /* First get the mode, signedness, storage order and size. We do this from
8309 just the outermost expression. */
8311 if (TREE_CODE (exp
) == COMPONENT_REF
)
8313 tree field
= TREE_OPERAND (exp
, 1);
8314 size_tree
= DECL_SIZE (field
);
8315 if (flag_strict_volatile_bitfields
> 0
8316 && TREE_THIS_VOLATILE (exp
)
8317 && DECL_BIT_FIELD_TYPE (field
)
8318 && DECL_MODE (field
) != BLKmode
)
8319 /* Volatile bitfields should be accessed in the mode of the
8320 field's type, not the mode computed based on the bit
8322 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
8323 else if (!DECL_BIT_FIELD (field
))
8325 mode
= DECL_MODE (field
);
8326 /* For vector fields re-check the target flags, as DECL_MODE
8327 could have been set with different target flags than
8328 the current function has. */
8329 if (VECTOR_TYPE_P (TREE_TYPE (field
))
8330 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
8331 mode
= TYPE_MODE (TREE_TYPE (field
));
8333 else if (DECL_MODE (field
) == BLKmode
)
8334 blkmode_bitfield
= true;
8336 *punsignedp
= DECL_UNSIGNED (field
);
8338 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
8340 size_tree
= TREE_OPERAND (exp
, 1);
8341 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
8342 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
8344 /* For vector element types with the correct size of access or for
8345 vector typed accesses use the mode of the access type. */
8346 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
8347 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
8348 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
8349 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
8350 mode
= TYPE_MODE (TREE_TYPE (exp
));
8354 mode
= TYPE_MODE (TREE_TYPE (exp
));
8355 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
8357 if (mode
== BLKmode
)
8358 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
8360 *pbitsize
= GET_MODE_BITSIZE (mode
);
8365 if (! tree_fits_uhwi_p (size_tree
))
8366 mode
= BLKmode
, *pbitsize
= -1;
8368 *pbitsize
= tree_to_uhwi (size_tree
);
8371 *preversep
= reverse_storage_order_for_component_p (exp
);
8373 /* Compute cumulative bit-offset for nested component-refs and array-refs,
8374 and find the ultimate containing object. */
8377 switch (TREE_CODE (exp
))
8380 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
8385 tree field
= TREE_OPERAND (exp
, 1);
8386 tree this_offset
= component_ref_field_offset (exp
);
8388 /* If this field hasn't been filled in yet, don't go past it.
8389 This should only happen when folding expressions made during
8390 type construction. */
8391 if (this_offset
== 0)
8394 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
8395 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
8397 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
8402 case ARRAY_RANGE_REF
:
8404 tree index
= TREE_OPERAND (exp
, 1);
8405 tree low_bound
= array_ref_low_bound (exp
);
8406 tree unit_size
= array_ref_element_size (exp
);
8408 /* We assume all arrays have sizes that are a multiple of a byte.
8409 First subtract the lower bound, if any, in the type of the
8410 index, then convert to sizetype and multiply by the size of
8411 the array element. */
8412 if (! integer_zerop (low_bound
))
8413 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
8416 offset
= size_binop (PLUS_EXPR
, offset
,
8417 size_binop (MULT_EXPR
,
8418 fold_convert (sizetype
, index
),
8427 bit_offset
+= *pbitsize
;
8430 case VIEW_CONVERT_EXPR
:
8434 /* Hand back the decl for MEM[&decl, off]. */
8435 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
8437 tree off
= TREE_OPERAND (exp
, 1);
8438 if (!integer_zerop (off
))
8440 poly_offset_int boff
= mem_ref_offset (exp
);
8441 boff
<<= LOG2_BITS_PER_UNIT
;
8444 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
8452 /* If any reference in the chain is volatile, the effect is volatile. */
8453 if (TREE_THIS_VOLATILE (exp
))
8456 exp
= TREE_OPERAND (exp
, 0);
8460 /* If OFFSET is constant, see if we can return the whole thing as a
8461 constant bit position. Make sure to handle overflow during
8463 if (poly_int_tree_p (offset
))
8465 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
8466 TYPE_PRECISION (sizetype
));
8467 tem
<<= LOG2_BITS_PER_UNIT
;
8469 if (tem
.to_shwi (pbitpos
))
8470 *poffset
= offset
= NULL_TREE
;
8473 /* Otherwise, split it up. */
8476 /* Avoid returning a negative bitpos as this may wreak havoc later. */
8477 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
8479 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
8480 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
8481 offset
= size_binop (PLUS_EXPR
, offset
,
8482 build_int_cst (sizetype
, bytes
.force_shwi ()));
8488 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
8489 if (mode
== VOIDmode
8491 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
8492 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
8500 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
8502 static unsigned HOST_WIDE_INT
8503 target_align (const_tree target
)
8505 /* We might have a chain of nested references with intermediate misaligning
8506 bitfields components, so need to recurse to find out. */
8508 unsigned HOST_WIDE_INT this_align
, outer_align
;
8510 switch (TREE_CODE (target
))
8516 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
8517 outer_align
= target_align (TREE_OPERAND (target
, 0));
8518 return MIN (this_align
, outer_align
);
8521 case ARRAY_RANGE_REF
:
8522 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
8523 outer_align
= target_align (TREE_OPERAND (target
, 0));
8524 return MIN (this_align
, outer_align
);
8527 case NON_LVALUE_EXPR
:
8528 case VIEW_CONVERT_EXPR
:
8529 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
8530 outer_align
= target_align (TREE_OPERAND (target
, 0));
8531 return MAX (this_align
, outer_align
);
8534 return TYPE_ALIGN (TREE_TYPE (target
));
8539 /* Given an rtx VALUE that may contain additions and multiplications, return
8540 an equivalent value that just refers to a register, memory, or constant.
8541 This is done by generating instructions to perform the arithmetic and
8542 returning a pseudo-register containing the value.
8544 The returned value may be a REG, SUBREG, MEM or constant. */
8547 force_operand (rtx value
, rtx target
)
8550 /* Use subtarget as the target for operand 0 of a binary operation. */
8551 rtx subtarget
= get_subtarget (target
);
8552 enum rtx_code code
= GET_CODE (value
);
8554 /* Check for subreg applied to an expression produced by loop optimizer. */
8556 && !REG_P (SUBREG_REG (value
))
8557 && !MEM_P (SUBREG_REG (value
)))
8560 = simplify_gen_subreg (GET_MODE (value
),
8561 force_reg (GET_MODE (SUBREG_REG (value
)),
8562 force_operand (SUBREG_REG (value
),
8564 GET_MODE (SUBREG_REG (value
)),
8565 SUBREG_BYTE (value
));
8566 code
= GET_CODE (value
);
8569 /* Check for a PIC address load. */
8570 if ((code
== PLUS
|| code
== MINUS
)
8571 && XEXP (value
, 0) == pic_offset_table_rtx
8572 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
8573 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
8574 || GET_CODE (XEXP (value
, 1)) == CONST
))
8577 subtarget
= gen_reg_rtx (GET_MODE (value
));
8578 emit_move_insn (subtarget
, value
);
8582 if (ARITHMETIC_P (value
))
8584 op2
= XEXP (value
, 1);
8585 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
8587 if (code
== MINUS
&& CONST_INT_P (op2
))
8590 op2
= negate_rtx (GET_MODE (value
), op2
);
8593 /* Check for an addition with OP2 a constant integer and our first
8594 operand a PLUS of a virtual register and something else. In that
8595 case, we want to emit the sum of the virtual register and the
8596 constant first and then add the other value. This allows virtual
8597 register instantiation to simply modify the constant rather than
8598 creating another one around this addition. */
8599 if (code
== PLUS
&& CONST_INT_P (op2
)
8600 && GET_CODE (XEXP (value
, 0)) == PLUS
8601 && REG_P (XEXP (XEXP (value
, 0), 0))
8602 && VIRTUAL_REGISTER_P (XEXP (XEXP (value
, 0), 0)))
8604 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
8605 XEXP (XEXP (value
, 0), 0), op2
,
8606 subtarget
, 0, OPTAB_LIB_WIDEN
);
8607 return expand_simple_binop (GET_MODE (value
), code
, temp
,
8608 force_operand (XEXP (XEXP (value
,
8610 target
, 0, OPTAB_LIB_WIDEN
);
8613 op1
= force_operand (XEXP (value
, 0), subtarget
);
8614 op2
= force_operand (op2
, NULL_RTX
);
8618 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
8620 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
8621 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8622 target
, 1, OPTAB_LIB_WIDEN
);
8624 return expand_divmod (0,
8625 FLOAT_MODE_P (GET_MODE (value
))
8626 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
8627 GET_MODE (value
), op1
, op2
, target
, 0);
8629 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
8632 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
8635 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
8638 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8639 target
, 0, OPTAB_LIB_WIDEN
);
8641 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
8642 target
, 1, OPTAB_LIB_WIDEN
);
8645 if (UNARY_P (value
))
8648 target
= gen_reg_rtx (GET_MODE (value
));
8649 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
8656 case FLOAT_TRUNCATE
:
8657 convert_move (target
, op1
, code
== ZERO_EXTEND
);
8662 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
8666 case UNSIGNED_FLOAT
:
8667 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
8671 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
8675 #ifdef INSN_SCHEDULING
8676 /* On machines that have insn scheduling, we want all memory reference to be
8677 explicit, so we need to deal with such paradoxical SUBREGs. */
8678 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
8680 = simplify_gen_subreg (GET_MODE (value
),
8681 force_reg (GET_MODE (SUBREG_REG (value
)),
8682 force_operand (SUBREG_REG (value
),
8684 GET_MODE (SUBREG_REG (value
)),
8685 SUBREG_BYTE (value
));
8691 /* Subroutine of expand_expr: return true iff there is no way that
8692 EXP can reference X, which is being modified. TOP_P is nonzero if this
8693 call is going to be used to determine whether we need a temporary
8694 for EXP, as opposed to a recursive call to this function.
8696 It is always safe for this routine to return false since it merely
8697 searches for optimization opportunities. */
8700 safe_from_p (const_rtx x
, tree exp
, int top_p
)
8706 /* If EXP has varying size, we MUST use a target since we currently
8707 have no way of allocating temporaries of variable size
8708 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
8709 So we assume here that something at a higher level has prevented a
8710 clash. This is somewhat bogus, but the best we can do. Only
8711 do this when X is BLKmode and when we are at the top level. */
8712 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
8713 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
8714 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
8715 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
8716 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
8718 && GET_MODE (x
) == BLKmode
)
8719 /* If X is in the outgoing argument area, it is always safe. */
8721 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
8722 || (GET_CODE (XEXP (x
, 0)) == PLUS
8723 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
8726 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
8727 find the underlying pseudo. */
8728 if (GET_CODE (x
) == SUBREG
)
8731 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
8735 /* Now look at our tree code and possibly recurse. */
8736 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
8738 case tcc_declaration
:
8739 exp_rtl
= DECL_RTL_IF_SET (exp
);
8745 case tcc_exceptional
:
8746 if (TREE_CODE (exp
) == TREE_LIST
)
8750 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
8752 exp
= TREE_CHAIN (exp
);
8755 if (TREE_CODE (exp
) != TREE_LIST
)
8756 return safe_from_p (x
, exp
, 0);
8759 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
8761 constructor_elt
*ce
;
8762 unsigned HOST_WIDE_INT idx
;
8764 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
8765 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
8766 || !safe_from_p (x
, ce
->value
, 0))
8770 else if (TREE_CODE (exp
) == ERROR_MARK
)
8771 return true; /* An already-visited SAVE_EXPR? */
8776 /* The only case we look at here is the DECL_INITIAL inside a
8778 return (TREE_CODE (exp
) != DECL_EXPR
8779 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
8780 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
8781 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
8784 case tcc_comparison
:
8785 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
8790 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
8792 case tcc_expression
:
8795 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
8796 the expression. If it is set, we conflict iff we are that rtx or
8797 both are in memory. Otherwise, we check all operands of the
8798 expression recursively. */
8800 switch (TREE_CODE (exp
))
8803 /* If the operand is static or we are static, we can't conflict.
8804 Likewise if we don't conflict with the operand at all. */
8805 if (staticp (TREE_OPERAND (exp
, 0))
8806 || TREE_STATIC (exp
)
8807 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
8810 /* Otherwise, the only way this can conflict is if we are taking
8811 the address of a DECL a that address if part of X, which is
8813 exp
= TREE_OPERAND (exp
, 0);
8816 if (!DECL_RTL_SET_P (exp
)
8817 || !MEM_P (DECL_RTL (exp
)))
8820 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
8826 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
8827 get_alias_set (exp
)))
8832 /* Assume that the call will clobber all hard registers and
8834 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
8839 case WITH_CLEANUP_EXPR
:
8840 case CLEANUP_POINT_EXPR
:
8841 /* Lowered by gimplify.cc. */
8845 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
8851 /* If we have an rtx, we do not need to scan our operands. */
8855 nops
= TREE_OPERAND_LENGTH (exp
);
8856 for (i
= 0; i
< nops
; i
++)
8857 if (TREE_OPERAND (exp
, i
) != 0
8858 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
8864 /* Should never get a type here. */
8868 /* If we have an rtl, find any enclosed object. Then see if we conflict
8872 if (GET_CODE (exp_rtl
) == SUBREG
)
8874 exp_rtl
= SUBREG_REG (exp_rtl
);
8876 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
8880 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
8881 are memory and they conflict. */
8882 return ! (rtx_equal_p (x
, exp_rtl
)
8883 || (MEM_P (x
) && MEM_P (exp_rtl
)
8884 && true_dependence (exp_rtl
, VOIDmode
, x
)));
8887 /* If we reach here, it is safe. */
8892 /* Return the highest power of two that EXP is known to be a multiple of.
8893 This is used in updating alignment of MEMs in array references. */
8895 unsigned HOST_WIDE_INT
8896 highest_pow2_factor (const_tree exp
)
8898 unsigned HOST_WIDE_INT ret
;
8899 int trailing_zeros
= tree_ctz (exp
);
8900 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
8901 return BIGGEST_ALIGNMENT
;
8902 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
8903 if (ret
> BIGGEST_ALIGNMENT
)
8904 return BIGGEST_ALIGNMENT
;
8908 /* Similar, except that the alignment requirements of TARGET are
8909 taken into account. Assume it is at least as aligned as its
8910 type, unless it is a COMPONENT_REF in which case the layout of
8911 the structure gives the alignment. */
8913 static unsigned HOST_WIDE_INT
8914 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
8916 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
8917 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
8919 return MAX (factor
, talign
);
8922 /* Convert the tree comparison code TCODE to the rtl one where the
8923 signedness is UNSIGNEDP. */
8925 static enum rtx_code
8926 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8938 code
= unsignedp
? LTU
: LT
;
8941 code
= unsignedp
? LEU
: LE
;
8944 code
= unsignedp
? GTU
: GT
;
8947 code
= unsignedp
? GEU
: GE
;
8949 case UNORDERED_EXPR
:
8980 /* Subroutine of expand_expr. Expand the two operands of a binary
8981 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8982 The value may be stored in TARGET if TARGET is nonzero. The
8983 MODIFIER argument is as documented by expand_expr. */
8986 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8987 enum expand_modifier modifier
)
8989 if (! safe_from_p (target
, exp1
, 1))
8991 if (operand_equal_p (exp0
, exp1
, 0))
8993 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8994 *op1
= copy_rtx (*op0
);
8998 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8999 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
9004 /* Return a MEM that contains constant EXP. DEFER is as for
9005 output_constant_def and MODIFIER is as for expand_expr. */
9008 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
9012 mem
= output_constant_def (exp
, defer
);
9013 if (modifier
!= EXPAND_INITIALIZER
)
9014 mem
= use_anchored_address (mem
);
9018 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
9019 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
9022 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
9023 enum expand_modifier modifier
, addr_space_t as
)
9025 rtx result
, subtarget
;
9027 poly_int64 bitsize
, bitpos
;
9028 int unsignedp
, reversep
, volatilep
= 0;
9031 /* If we are taking the address of a constant and are at the top level,
9032 we have to use output_constant_def since we can't call force_const_mem
9034 /* ??? This should be considered a front-end bug. We should not be
9035 generating ADDR_EXPR of something that isn't an LVALUE. The only
9036 exception here is STRING_CST. */
9037 if (CONSTANT_CLASS_P (exp
))
9039 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
9040 if (modifier
< EXPAND_SUM
)
9041 result
= force_operand (result
, target
);
9045 /* Everything must be something allowed by is_gimple_addressable. */
9046 switch (TREE_CODE (exp
))
9049 /* This case will happen via recursion for &a->b. */
9050 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
9054 tree tem
= TREE_OPERAND (exp
, 0);
9055 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
9056 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
9057 return expand_expr (tem
, target
, tmode
, modifier
);
9060 case TARGET_MEM_REF
:
9061 return addr_for_mem_ref (exp
, as
, true);
9064 /* Expand the initializer like constants above. */
9065 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
9067 if (modifier
< EXPAND_SUM
)
9068 result
= force_operand (result
, target
);
9072 /* The real part of the complex number is always first, therefore
9073 the address is the same as the address of the parent object. */
9076 inner
= TREE_OPERAND (exp
, 0);
9080 /* The imaginary part of the complex number is always second.
9081 The expression is therefore always offset by the size of the
9084 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
9085 inner
= TREE_OPERAND (exp
, 0);
9088 case COMPOUND_LITERAL_EXPR
:
9089 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
9090 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
9091 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
9092 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
9093 the initializers aren't gimplified. */
9094 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
9095 && is_global_var (COMPOUND_LITERAL_EXPR_DECL (exp
)))
9096 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
9097 target
, tmode
, modifier
, as
);
9100 /* If the object is a DECL, then expand it for its rtl. Don't bypass
9101 expand_expr, as that can have various side effects; LABEL_DECLs for
9102 example, may not have their DECL_RTL set yet. Expand the rtl of
9103 CONSTRUCTORs too, which should yield a memory reference for the
9104 constructor's contents. Assume language specific tree nodes can
9105 be expanded in some interesting way. */
9106 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
9108 || TREE_CODE (exp
) == CONSTRUCTOR
9109 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
9111 result
= expand_expr (exp
, target
, tmode
,
9112 modifier
== EXPAND_INITIALIZER
9113 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
9115 /* If the DECL isn't in memory, then the DECL wasn't properly
9116 marked TREE_ADDRESSABLE, which will be either a front-end
9117 or a tree optimizer bug. */
9119 gcc_assert (MEM_P (result
));
9120 result
= XEXP (result
, 0);
9122 /* ??? Is this needed anymore? */
9124 TREE_USED (exp
) = 1;
9126 if (modifier
!= EXPAND_INITIALIZER
9127 && modifier
!= EXPAND_CONST_ADDRESS
9128 && modifier
!= EXPAND_SUM
)
9129 result
= force_operand (result
, target
);
9133 /* Pass FALSE as the last argument to get_inner_reference although
9134 we are expanding to RTL. The rationale is that we know how to
9135 handle "aligning nodes" here: we can just bypass them because
9136 they won't change the final object whose address will be returned
9137 (they actually exist only for that purpose). */
9138 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
9139 &unsignedp
, &reversep
, &volatilep
);
9143 /* We must have made progress. */
9144 gcc_assert (inner
!= exp
);
9146 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
9147 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
9148 inner alignment, force the inner to be sufficiently aligned. */
9149 if (CONSTANT_CLASS_P (inner
)
9150 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
9152 inner
= copy_node (inner
);
9153 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
9154 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
9155 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
9157 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
9163 if (modifier
!= EXPAND_NORMAL
)
9164 result
= force_operand (result
, NULL
);
9165 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
9166 modifier
== EXPAND_INITIALIZER
9167 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
9169 /* expand_expr is allowed to return an object in a mode other
9170 than TMODE. If it did, we need to convert. */
9171 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
9172 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
9173 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
9174 result
= convert_memory_address_addr_space (tmode
, result
, as
);
9175 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
9177 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9178 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
9181 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
9182 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
9183 1, OPTAB_LIB_WIDEN
);
9187 if (maybe_ne (bitpos
, 0))
9189 /* Someone beforehand should have rejected taking the address
9190 of an object that isn't byte-aligned. */
9191 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
9192 result
= convert_memory_address_addr_space (tmode
, result
, as
);
9193 result
= plus_constant (tmode
, result
, bytepos
);
9194 if (modifier
< EXPAND_SUM
)
9195 result
= force_operand (result
, target
);
9201 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
9202 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
9205 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
9206 enum expand_modifier modifier
)
9208 addr_space_t as
= ADDR_SPACE_GENERIC
;
9209 scalar_int_mode address_mode
= Pmode
;
9210 scalar_int_mode pointer_mode
= ptr_mode
;
9214 /* Target mode of VOIDmode says "whatever's natural". */
9215 if (tmode
== VOIDmode
)
9216 tmode
= TYPE_MODE (TREE_TYPE (exp
));
9218 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
9220 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
9221 address_mode
= targetm
.addr_space
.address_mode (as
);
9222 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
9225 /* We can get called with some Weird Things if the user does silliness
9226 like "(short) &a". In that case, convert_memory_address won't do
9227 the right thing, so ignore the given target mode. */
9228 scalar_int_mode new_tmode
= (tmode
== pointer_mode
9232 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
9233 new_tmode
, modifier
, as
);
9235 /* Despite expand_expr claims concerning ignoring TMODE when not
9236 strictly convenient, stuff breaks if we don't honor it. Note
9237 that combined with the above, we only do this for pointer modes. */
9238 rmode
= GET_MODE (result
);
9239 if (rmode
== VOIDmode
)
9241 if (rmode
!= new_tmode
)
9242 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
9247 /* Generate code for computing CONSTRUCTOR EXP.
9248 An rtx for the computed value is returned. If AVOID_TEMP_MEM
9249 is TRUE, instead of creating a temporary variable in memory
9250 NULL is returned and the caller needs to handle it differently. */
9253 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
9254 bool avoid_temp_mem
)
9256 tree type
= TREE_TYPE (exp
);
9257 machine_mode mode
= TYPE_MODE (type
);
9259 /* Try to avoid creating a temporary at all. This is possible
9260 if all of the initializer is zero.
9261 FIXME: try to handle all [0..255] initializers we can handle
9263 if (TREE_STATIC (exp
)
9264 && !TREE_ADDRESSABLE (exp
)
9265 && target
!= 0 && mode
== BLKmode
9266 && all_zeros_p (exp
))
9268 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
9272 /* All elts simple constants => refer to a constant in memory. But
9273 if this is a non-BLKmode mode, let it store a field at a time
9274 since that should make a CONST_INT, CONST_WIDE_INT or
9275 CONST_DOUBLE when we fold. Likewise, if we have a target we can
9276 use, it is best to store directly into the target unless the type
9277 is large enough that memcpy will be used. If we are making an
9278 initializer and all operands are constant, put it in memory as
9281 FIXME: Avoid trying to fill vector constructors piece-meal.
9282 Output them with output_constant_def below unless we're sure
9283 they're zeros. This should go away when vector initializers
9284 are treated like VECTOR_CST instead of arrays. */
9285 if ((TREE_STATIC (exp
)
9286 && ((mode
== BLKmode
9287 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
9288 || TREE_ADDRESSABLE (exp
)
9289 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
9290 && (! can_move_by_pieces
9291 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
9293 && ! mostly_zeros_p (exp
))))
9294 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
9295 && TREE_CONSTANT (exp
)))
9302 constructor
= expand_expr_constant (exp
, 1, modifier
);
9304 if (modifier
!= EXPAND_CONST_ADDRESS
9305 && modifier
!= EXPAND_INITIALIZER
9306 && modifier
!= EXPAND_SUM
)
9307 constructor
= validize_mem (constructor
);
9312 /* If the CTOR is available in static storage and not mostly
9313 zeros and we can move it by pieces prefer to do so since
9314 that's usually more efficient than performing a series of
9315 stores from immediates. */
9317 && TREE_STATIC (exp
)
9318 && TREE_CONSTANT (exp
)
9319 && tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
9320 && can_move_by_pieces (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
9322 && ! mostly_zeros_p (exp
))
9325 /* Handle calls that pass values in multiple non-contiguous
9326 locations. The Irix 6 ABI has examples of this. */
9327 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
9328 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
9329 /* Also make a temporary if the store is to volatile memory, to
9330 avoid individual accesses to aggregate members. */
9331 || (GET_CODE (target
) == MEM
9332 && MEM_VOLATILE_P (target
)
9333 && !TREE_ADDRESSABLE (TREE_TYPE (exp
))))
9338 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
9341 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
9346 /* expand_expr: generate code for computing expression EXP.
9347 An rtx for the computed value is returned. The value is never null.
9348 In the case of a void EXP, const0_rtx is returned.
9350 The value may be stored in TARGET if TARGET is nonzero.
9351 TARGET is just a suggestion; callers must assume that
9352 the rtx returned may not be the same as TARGET.
9354 If TARGET is CONST0_RTX, it means that the value will be ignored.
9356 If TMODE is not VOIDmode, it suggests generating the
9357 result in mode TMODE. But this is done only when convenient.
9358 Otherwise, TMODE is ignored and the value generated in its natural mode.
9359 TMODE is just a suggestion; callers must assume that
9360 the rtx returned may not have mode TMODE.
9362 Note that TARGET may have neither TMODE nor MODE. In that case, it
9363 probably will not be used.
9365 If MODIFIER is EXPAND_SUM then when EXP is an addition
9366 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
9367 or a nest of (PLUS ...) and (MINUS ...) where the terms are
9368 products as above, or REG or MEM, or constant.
9369 Ordinarily in such cases we would output mul or add instructions
9370 and then return a pseudo reg containing the sum.
9372 EXPAND_INITIALIZER is much like EXPAND_SUM except that
9373 it also marks a label as absolutely required (it can't be dead).
9374 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
9375 This is used for outputting expressions used in initializers.
9377 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
9378 with a constant address even if that address is not normally legitimate.
9379 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
9381 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
9382 a call parameter. Such targets require special care as we haven't yet
9383 marked TARGET so that it's safe from being trashed by libcalls. We
9384 don't want to use TARGET for anything but the final result;
9385 Intermediate values must go elsewhere. Additionally, calls to
9386 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
9388 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
9389 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
9390 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
9391 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
9393 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
9394 then *ALT_RTL is set to TARGET (before legitimziation).
9396 If INNER_REFERENCE_P is true, we are expanding an inner reference.
9397 In this case, we don't adjust a returned MEM rtx that wouldn't be
9398 sufficiently aligned for its mode; instead, it's up to the caller
9399 to deal with it afterwards. This is used to make sure that unaligned
9400 base objects for which out-of-bounds accesses are supported, for
9401 example record types with trailing arrays, aren't realigned behind
9402 the back of the caller.
9403 The normal operating mode is to pass FALSE for this parameter. */
9406 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
9407 enum expand_modifier modifier
, rtx
*alt_rtl
,
9408 bool inner_reference_p
)
9412 /* Handle ERROR_MARK before anybody tries to access its type. */
9413 if (TREE_CODE (exp
) == ERROR_MARK
9414 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
9416 ret
= CONST0_RTX (tmode
);
9417 return ret
? ret
: const0_rtx
;
9420 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
9425 /* Try to expand the conditional expression which is represented by
9426 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
9427 return the rtl reg which represents the result. Otherwise return
9431 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
9432 tree treeop1 ATTRIBUTE_UNUSED
,
9433 tree treeop2 ATTRIBUTE_UNUSED
)
9436 rtx op00
, op01
, op1
, op2
;
9437 enum rtx_code comparison_code
;
9438 machine_mode comparison_mode
;
9441 tree type
= TREE_TYPE (treeop1
);
9442 int unsignedp
= TYPE_UNSIGNED (type
);
9443 machine_mode mode
= TYPE_MODE (type
);
9444 machine_mode orig_mode
= mode
;
9445 static bool expanding_cond_expr_using_cmove
= false;
9447 /* Conditional move expansion can end up TERing two operands which,
9448 when recursively hitting conditional expressions can result in
9449 exponential behavior if the cmove expansion ultimatively fails.
9450 It's hardly profitable to TER a cmove into a cmove so avoid doing
9451 that by failing early if we end up recursing. */
9452 if (expanding_cond_expr_using_cmove
)
9455 /* If we cannot do a conditional move on the mode, try doing it
9456 with the promoted mode. */
9457 if (!can_conditionally_move_p (mode
))
9459 mode
= promote_mode (type
, mode
, &unsignedp
);
9460 if (!can_conditionally_move_p (mode
))
9462 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
9465 temp
= assign_temp (type
, 0, 1);
9467 expanding_cond_expr_using_cmove
= true;
9469 expand_operands (treeop1
, treeop2
,
9470 mode
== orig_mode
? temp
: NULL_RTX
, &op1
, &op2
,
9473 if (TREE_CODE (treeop0
) == SSA_NAME
9474 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
9476 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
9477 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
9478 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
9479 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
9480 comparison_mode
= TYPE_MODE (type
);
9481 unsignedp
= TYPE_UNSIGNED (type
);
9482 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
9484 else if (COMPARISON_CLASS_P (treeop0
))
9486 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
9487 enum tree_code cmpcode
= TREE_CODE (treeop0
);
9488 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
9489 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
9490 unsignedp
= TYPE_UNSIGNED (type
);
9491 comparison_mode
= TYPE_MODE (type
);
9492 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
9496 op00
= expand_normal (treeop0
);
9498 comparison_code
= NE
;
9499 comparison_mode
= GET_MODE (op00
);
9500 if (comparison_mode
== VOIDmode
)
9501 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9503 expanding_cond_expr_using_cmove
= false;
9505 if (GET_MODE (op1
) != mode
)
9506 op1
= gen_lowpart (mode
, op1
);
9508 if (GET_MODE (op2
) != mode
)
9509 op2
= gen_lowpart (mode
, op2
);
9511 /* Try to emit the conditional move. */
9512 insn
= emit_conditional_move (temp
,
9513 { comparison_code
, op00
, op01
,
9518 /* If we could do the conditional move, emit the sequence,
9522 rtx_insn
*seq
= get_insns ();
9525 return convert_modes (orig_mode
, mode
, temp
, 0);
9528 /* Otherwise discard the sequence and fall back to code with
9534 /* A helper function for expand_expr_real_2 to be used with a
9535 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
9536 is nonzero, with alignment ALIGN in bits.
9537 Store the value at TARGET if possible (if TARGET is nonzero).
9538 Regardless of TARGET, we return the rtx for where the value is placed.
9539 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
9540 then *ALT_RTL is set to TARGET (before legitimziation). */
9543 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
9544 unsigned int align
, rtx target
, rtx
*alt_rtl
)
9546 enum insn_code icode
;
9548 if ((icode
= optab_handler (movmisalign_optab
, mode
))
9549 != CODE_FOR_nothing
)
9551 class expand_operand ops
[2];
9553 /* We've already validated the memory, and we're creating a
9554 new pseudo destination. The predicates really can't fail,
9555 nor can the generator. */
9556 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9557 create_fixed_operand (&ops
[1], temp
);
9558 expand_insn (icode
, 2, ops
);
9559 temp
= ops
[0].value
;
9561 else if (targetm
.slow_unaligned_access (mode
, align
))
9562 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
9563 0, unsignedp
, target
,
9564 mode
, mode
, false, alt_rtl
);
9568 /* Helper function of expand_expr_2, expand a division or modulo.
9569 op0 and op1 should be already expanded treeop0 and treeop1, using
9573 expand_expr_divmod (tree_code code
, machine_mode mode
, tree treeop0
,
9574 tree treeop1
, rtx op0
, rtx op1
, rtx target
, int unsignedp
)
9576 bool mod_p
= (code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9577 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
);
9578 if (SCALAR_INT_MODE_P (mode
)
9580 && get_range_pos_neg (treeop0
) == 1
9581 && get_range_pos_neg (treeop1
) == 1)
9583 /* If both arguments are known to be positive when interpreted
9584 as signed, we can expand it as both signed and unsigned
9585 division or modulo. Choose the cheaper sequence in that case. */
9586 bool speed_p
= optimize_insn_for_speed_p ();
9587 do_pending_stack_adjust ();
9589 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9590 rtx_insn
*uns_insns
= get_insns ();
9593 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9594 rtx_insn
*sgn_insns
= get_insns ();
9596 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9597 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9599 /* If costs are the same then use as tie breaker the other other
9601 if (uns_cost
== sgn_cost
)
9603 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9604 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9607 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9609 emit_insn (uns_insns
);
9612 emit_insn (sgn_insns
);
9615 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9619 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
9620 enum expand_modifier modifier
)
9622 rtx op0
, op1
, op2
, temp
;
9623 rtx_code_label
*lab
;
9627 scalar_int_mode int_mode
;
9628 enum tree_code code
= ops
->code
;
9630 rtx subtarget
, original_target
;
9632 bool reduce_bit_field
;
9633 location_t loc
= ops
->location
;
9634 tree treeop0
, treeop1
, treeop2
;
9635 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
9636 ? reduce_to_bit_field_precision ((expr), \
9642 mode
= TYPE_MODE (type
);
9643 unsignedp
= TYPE_UNSIGNED (type
);
9649 /* We should be called only on simple (binary or unary) expressions,
9650 exactly those that are valid in gimple expressions that aren't
9651 GIMPLE_SINGLE_RHS (or invalid). */
9652 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
9653 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
9654 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
9656 ignore
= (target
== const0_rtx
9657 || ((CONVERT_EXPR_CODE_P (code
)
9658 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9659 && TREE_CODE (type
) == VOID_TYPE
));
9661 /* We should be called only if we need the result. */
9662 gcc_assert (!ignore
);
9664 /* An operation in what may be a bit-field type needs the
9665 result to be reduced to the precision of the bit-field type,
9666 which is narrower than that of the type's mode. */
9667 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
9668 && !type_has_mode_precision_p (type
));
9670 if (reduce_bit_field
9671 && (modifier
== EXPAND_STACK_PARM
9672 || (target
&& GET_MODE (target
) != mode
)))
9675 /* Use subtarget as the target for operand 0 of a binary operation. */
9676 subtarget
= get_subtarget (target
);
9677 original_target
= target
;
9681 case NON_LVALUE_EXPR
:
9684 if (treeop0
== error_mark_node
)
9687 if (TREE_CODE (type
) == UNION_TYPE
)
9689 tree valtype
= TREE_TYPE (treeop0
);
9691 /* If both input and output are BLKmode, this conversion isn't doing
9692 anything except possibly changing memory attribute. */
9693 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
9695 rtx result
= expand_expr (treeop0
, target
, tmode
,
9698 result
= copy_rtx (result
);
9699 set_mem_attributes (result
, type
, 0);
9705 if (TYPE_MODE (type
) != BLKmode
)
9706 target
= gen_reg_rtx (TYPE_MODE (type
));
9708 target
= assign_temp (type
, 1, 1);
9712 /* Store data into beginning of memory target. */
9713 store_expr (treeop0
,
9714 adjust_address (target
, TYPE_MODE (valtype
), 0),
9715 modifier
== EXPAND_STACK_PARM
,
9716 false, TYPE_REVERSE_STORAGE_ORDER (type
));
9720 gcc_assert (REG_P (target
)
9721 && !TYPE_REVERSE_STORAGE_ORDER (type
));
9723 /* Store this field into a union of the proper type. */
9724 poly_uint64 op0_size
9725 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
9726 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
9727 store_field (target
,
9728 /* The conversion must be constructed so that
9729 we know at compile time how many bits
9731 ordered_min (op0_size
, union_size
),
9732 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
9736 /* Return the entire union. */
9740 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
9742 op0
= expand_expr (treeop0
, target
, VOIDmode
,
9745 return REDUCE_BIT_FIELD (op0
);
9748 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
9749 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
9750 if (GET_MODE (op0
) == mode
)
9753 /* If OP0 is a constant, just convert it into the proper mode. */
9754 else if (CONSTANT_P (op0
))
9756 tree inner_type
= TREE_TYPE (treeop0
);
9757 machine_mode inner_mode
= GET_MODE (op0
);
9759 if (inner_mode
== VOIDmode
)
9760 inner_mode
= TYPE_MODE (inner_type
);
9762 if (modifier
== EXPAND_INITIALIZER
)
9763 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
9765 op0
= convert_modes (mode
, inner_mode
, op0
,
9766 TYPE_UNSIGNED (inner_type
));
9769 else if (modifier
== EXPAND_INITIALIZER
)
9770 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9771 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
9773 else if (target
== 0)
9774 op0
= convert_to_mode (mode
, op0
,
9775 TYPE_UNSIGNED (TREE_TYPE
9779 convert_move (target
, op0
,
9780 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9784 return REDUCE_BIT_FIELD (op0
);
9786 case ADDR_SPACE_CONVERT_EXPR
:
9788 tree treeop0_type
= TREE_TYPE (treeop0
);
9790 gcc_assert (POINTER_TYPE_P (type
));
9791 gcc_assert (POINTER_TYPE_P (treeop0_type
));
9793 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
9794 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
9796 /* Conversions between pointers to the same address space should
9797 have been implemented via CONVERT_EXPR / NOP_EXPR. */
9798 gcc_assert (as_to
!= as_from
);
9800 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9802 /* Ask target code to handle conversion between pointers
9803 to overlapping address spaces. */
9804 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
9805 || targetm
.addr_space
.subset_p (as_from
, as_to
))
9807 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
9811 /* For disjoint address spaces, converting anything but a null
9812 pointer invokes undefined behavior. We truncate or extend the
9813 value as if we'd converted via integers, which handles 0 as
9814 required, and all others as the programmer likely expects. */
9815 #ifndef POINTERS_EXTEND_UNSIGNED
9816 const int POINTERS_EXTEND_UNSIGNED
= 1;
9818 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
9819 op0
, POINTERS_EXTEND_UNSIGNED
);
9825 case POINTER_PLUS_EXPR
:
9826 /* Even though the sizetype mode and the pointer's mode can be different
9827 expand is able to handle this correctly and get the correct result out
9828 of the PLUS_EXPR code. */
9829 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
9830 if sizetype precision is smaller than pointer precision. */
9831 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
9832 treeop1
= fold_convert_loc (loc
, type
,
9833 fold_convert_loc (loc
, ssizetype
,
9835 /* If sizetype precision is larger than pointer precision, truncate the
9836 offset to have matching modes. */
9837 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
9838 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
9842 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
9843 something else, make sure we add the register to the constant and
9844 then to the other thing. This case can occur during strength
9845 reduction and doing it this way will produce better code if the
9846 frame pointer or argument pointer is eliminated.
9848 fold-const.cc will ensure that the constant is always in the inner
9849 PLUS_EXPR, so the only case we need to do anything about is if
9850 sp, ap, or fp is our second argument, in which case we must swap
9851 the innermost first argument and our second argument. */
9853 if (TREE_CODE (treeop0
) == PLUS_EXPR
9854 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
9856 && (DECL_RTL (treeop1
) == frame_pointer_rtx
9857 || DECL_RTL (treeop1
) == stack_pointer_rtx
9858 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
9863 /* If the result is to be ptr_mode and we are adding an integer to
9864 something, we might be forming a constant. So try to use
9865 plus_constant. If it produces a sum and we can't accept it,
9866 use force_operand. This allows P = &ARR[const] to generate
9867 efficient code on machines where a SYMBOL_REF is not a valid
9870 If this is an EXPAND_SUM call, always return the sum. */
9871 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
9872 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
9874 if (modifier
== EXPAND_STACK_PARM
)
9876 if (TREE_CODE (treeop0
) == INTEGER_CST
9877 && HWI_COMPUTABLE_MODE_P (mode
)
9878 && TREE_CONSTANT (treeop1
))
9882 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
9884 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
9886 /* Use wi::shwi to ensure that the constant is
9887 truncated according to the mode of OP1, then sign extended
9888 to a HOST_WIDE_INT. Using the constant directly can result
9889 in non-canonical RTL in a 64x32 cross compile. */
9890 wc
= TREE_INT_CST_LOW (treeop0
);
9892 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
9893 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
9894 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
9895 op1
= force_operand (op1
, target
);
9896 return REDUCE_BIT_FIELD (op1
);
9899 else if (TREE_CODE (treeop1
) == INTEGER_CST
9900 && HWI_COMPUTABLE_MODE_P (mode
)
9901 && TREE_CONSTANT (treeop0
))
9905 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
9907 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9908 (modifier
== EXPAND_INITIALIZER
9909 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
9910 if (! CONSTANT_P (op0
))
9912 op1
= expand_expr (treeop1
, NULL_RTX
,
9913 VOIDmode
, modifier
);
9914 /* Return a PLUS if modifier says it's OK. */
9915 if (modifier
== EXPAND_SUM
9916 || modifier
== EXPAND_INITIALIZER
)
9917 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
9920 /* Use wi::shwi to ensure that the constant is
9921 truncated according to the mode of OP1, then sign extended
9922 to a HOST_WIDE_INT. Using the constant directly can result
9923 in non-canonical RTL in a 64x32 cross compile. */
9924 wc
= TREE_INT_CST_LOW (treeop1
);
9926 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
9927 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
9928 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
9929 op0
= force_operand (op0
, target
);
9930 return REDUCE_BIT_FIELD (op0
);
9934 /* Use TER to expand pointer addition of a negated value
9935 as pointer subtraction. */
9936 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
9937 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
9938 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
9939 && TREE_CODE (treeop1
) == SSA_NAME
9940 && TYPE_MODE (TREE_TYPE (treeop0
))
9941 == TYPE_MODE (TREE_TYPE (treeop1
)))
9943 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
9946 treeop1
= gimple_assign_rhs1 (def
);
9952 /* No sense saving up arithmetic to be done
9953 if it's all in the wrong mode to form part of an address.
9954 And force_operand won't know whether to sign-extend or
9956 if (modifier
!= EXPAND_INITIALIZER
9957 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9959 expand_operands (treeop0
, treeop1
,
9960 subtarget
, &op0
, &op1
, modifier
);
9961 if (op0
== const0_rtx
)
9963 if (op1
== const0_rtx
)
9968 expand_operands (treeop0
, treeop1
,
9969 subtarget
, &op0
, &op1
, modifier
);
9970 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9973 case POINTER_DIFF_EXPR
:
9975 /* For initializers, we are allowed to return a MINUS of two
9976 symbolic constants. Here we handle all cases when both operands
9978 /* Handle difference of two symbolic constants,
9979 for the sake of an initializer. */
9980 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9981 && really_constant_p (treeop0
)
9982 && really_constant_p (treeop1
))
9984 expand_operands (treeop0
, treeop1
,
9985 NULL_RTX
, &op0
, &op1
, modifier
);
9986 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
9989 /* No sense saving up arithmetic to be done
9990 if it's all in the wrong mode to form part of an address.
9991 And force_operand won't know whether to sign-extend or
9993 if (modifier
!= EXPAND_INITIALIZER
9994 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9997 expand_operands (treeop0
, treeop1
,
9998 subtarget
, &op0
, &op1
, modifier
);
10000 /* Convert A - const to A + (-const). */
10001 if (CONST_INT_P (op1
))
10003 op1
= negate_rtx (mode
, op1
);
10004 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
10009 case WIDEN_MULT_PLUS_EXPR
:
10010 case WIDEN_MULT_MINUS_EXPR
:
10011 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10012 op2
= expand_normal (treeop2
);
10013 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
10014 target
, unsignedp
);
10017 case WIDEN_MULT_EXPR
:
10018 /* If first operand is constant, swap them.
10019 Thus the following special case checks need only
10020 check the second operand. */
10021 if (TREE_CODE (treeop0
) == INTEGER_CST
)
10022 std::swap (treeop0
, treeop1
);
10024 /* First, check if we have a multiplication of one signed and one
10025 unsigned operand. */
10026 if (TREE_CODE (treeop1
) != INTEGER_CST
10027 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
10028 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
10030 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
10031 this_optab
= usmul_widen_optab
;
10032 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
10033 != CODE_FOR_nothing
)
10035 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
10036 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
10039 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
10041 /* op0 and op1 might still be constant, despite the above
10042 != INTEGER_CST check. Handle it. */
10043 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
10045 op0
= convert_modes (mode
, innermode
, op0
, true);
10046 op1
= convert_modes (mode
, innermode
, op1
, false);
10047 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
10048 target
, unsignedp
));
10053 /* Check for a multiplication with matching signedness. */
10054 else if ((TREE_CODE (treeop1
) == INTEGER_CST
10055 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
10056 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
10057 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
10059 tree op0type
= TREE_TYPE (treeop0
);
10060 machine_mode innermode
= TYPE_MODE (op0type
);
10061 bool zextend_p
= TYPE_UNSIGNED (op0type
);
10062 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
10063 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
10065 if (TREE_CODE (treeop0
) != INTEGER_CST
)
10067 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
10068 != CODE_FOR_nothing
)
10070 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
10072 /* op0 and op1 might still be constant, despite the above
10073 != INTEGER_CST check. Handle it. */
10074 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
10077 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
10079 = convert_modes (mode
, innermode
, op1
,
10080 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
10081 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
10085 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
10086 unsignedp
, this_optab
);
10087 return REDUCE_BIT_FIELD (temp
);
10089 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
10090 != CODE_FOR_nothing
10091 && innermode
== word_mode
)
10094 op0
= expand_normal (treeop0
);
10095 op1
= expand_normal (treeop1
);
10096 /* op0 and op1 might be constants, despite the above
10097 != INTEGER_CST check. Handle it. */
10098 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
10099 goto widen_mult_const
;
10100 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
10101 unsignedp
, OPTAB_LIB_WIDEN
);
10102 hipart
= gen_highpart (word_mode
, temp
);
10103 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
10106 if (htem
!= hipart
)
10107 emit_move_insn (hipart
, htem
);
10108 return REDUCE_BIT_FIELD (temp
);
10112 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
10113 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
10114 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10115 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
10118 /* If this is a fixed-point operation, then we cannot use the code
10119 below because "expand_mult" doesn't support sat/no-sat fixed-point
10120 multiplications. */
10121 if (ALL_FIXED_POINT_MODE_P (mode
))
10124 /* If first operand is constant, swap them.
10125 Thus the following special case checks need only
10126 check the second operand. */
10127 if (TREE_CODE (treeop0
) == INTEGER_CST
)
10128 std::swap (treeop0
, treeop1
);
10130 /* Attempt to return something suitable for generating an
10131 indexed address, for machines that support that. */
10133 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
10134 && tree_fits_shwi_p (treeop1
))
10136 tree exp1
= treeop1
;
10138 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
10142 op0
= force_operand (op0
, NULL_RTX
);
10144 op0
= copy_to_mode_reg (mode
, op0
);
10146 op1
= gen_int_mode (tree_to_shwi (exp1
),
10147 TYPE_MODE (TREE_TYPE (exp1
)));
10148 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
, op1
));
10151 if (modifier
== EXPAND_STACK_PARM
)
10154 if (SCALAR_INT_MODE_P (mode
) && optimize
>= 2)
10156 gimple
*def_stmt0
= get_def_for_expr (treeop0
, TRUNC_DIV_EXPR
);
10157 gimple
*def_stmt1
= get_def_for_expr (treeop1
, TRUNC_DIV_EXPR
);
10159 && !operand_equal_p (treeop1
, gimple_assign_rhs2 (def_stmt0
), 0))
10162 && !operand_equal_p (treeop0
, gimple_assign_rhs2 (def_stmt1
), 0))
10165 if (def_stmt0
|| def_stmt1
)
10167 /* X / Y * Y can be expanded as X - X % Y too.
10168 Choose the cheaper sequence of those two. */
10170 treeop0
= gimple_assign_rhs1 (def_stmt0
);
10174 treeop0
= gimple_assign_rhs1 (def_stmt1
);
10176 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
,
10178 bool speed_p
= optimize_insn_for_speed_p ();
10179 do_pending_stack_adjust ();
10182 = expand_expr_divmod (TRUNC_DIV_EXPR
, mode
, treeop0
, treeop1
,
10183 op0
, op1
, NULL_RTX
, unsignedp
);
10184 divmul_ret
= expand_mult (mode
, divmul_ret
, op1
, target
,
10186 rtx_insn
*divmul_insns
= get_insns ();
10190 = expand_expr_divmod (TRUNC_MOD_EXPR
, mode
, treeop0
, treeop1
,
10191 op0
, op1
, NULL_RTX
, unsignedp
);
10192 this_optab
= optab_for_tree_code (MINUS_EXPR
, type
,
10194 modsub_ret
= expand_binop (mode
, this_optab
, op0
, modsub_ret
,
10195 target
, unsignedp
, OPTAB_LIB_WIDEN
);
10196 rtx_insn
*modsub_insns
= get_insns ();
10198 unsigned divmul_cost
= seq_cost (divmul_insns
, speed_p
);
10199 unsigned modsub_cost
= seq_cost (modsub_insns
, speed_p
);
10200 /* If costs are the same then use as tie breaker the other other
10202 if (divmul_cost
== modsub_cost
)
10204 divmul_cost
= seq_cost (divmul_insns
, !speed_p
);
10205 modsub_cost
= seq_cost (modsub_insns
, !speed_p
);
10208 if (divmul_cost
<= modsub_cost
)
10210 emit_insn (divmul_insns
);
10211 return REDUCE_BIT_FIELD (divmul_ret
);
10213 emit_insn (modsub_insns
);
10214 return REDUCE_BIT_FIELD (modsub_ret
);
10218 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10220 /* Expand X*Y as X&-Y when Y must be zero or one. */
10221 if (SCALAR_INT_MODE_P (mode
))
10223 bool gimple_zero_one_valued_p (tree
, tree (*)(tree
));
10224 bool bit0_p
= gimple_zero_one_valued_p (treeop0
, nullptr);
10225 bool bit1_p
= gimple_zero_one_valued_p (treeop1
, nullptr);
10227 /* Expand X*Y as X&Y when both X and Y must be zero or one. */
10228 if (bit0_p
&& bit1_p
)
10229 return REDUCE_BIT_FIELD (expand_and (mode
, op0
, op1
, target
));
10231 if (bit0_p
|| bit1_p
)
10233 bool speed
= optimize_insn_for_speed_p ();
10234 int cost
= add_cost (speed
, mode
) + neg_cost (speed
, mode
);
10235 struct algorithm algorithm
;
10236 enum mult_variant variant
;
10237 if (CONST_INT_P (op1
)
10238 ? !choose_mult_variant (mode
, INTVAL (op1
),
10239 &algorithm
, &variant
, cost
)
10240 : cost
< mul_cost (speed
, mode
))
10242 target
= bit0_p
? expand_and (mode
, negate_rtx (mode
, op0
),
10244 : expand_and (mode
, op0
,
10245 negate_rtx (mode
, op1
),
10247 return REDUCE_BIT_FIELD (target
);
10252 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
10254 case TRUNC_MOD_EXPR
:
10255 case FLOOR_MOD_EXPR
:
10256 case CEIL_MOD_EXPR
:
10257 case ROUND_MOD_EXPR
:
10259 case TRUNC_DIV_EXPR
:
10260 case FLOOR_DIV_EXPR
:
10261 case CEIL_DIV_EXPR
:
10262 case ROUND_DIV_EXPR
:
10263 case EXACT_DIV_EXPR
:
10264 /* If this is a fixed-point operation, then we cannot use the code
10265 below because "expand_divmod" doesn't support sat/no-sat fixed-point
10267 if (ALL_FIXED_POINT_MODE_P (mode
))
10270 if (modifier
== EXPAND_STACK_PARM
)
10272 /* Possible optimization: compute the dividend with EXPAND_SUM
10273 then if the divisor is constant can optimize the case
10274 where some terms of the dividend have coeffs divisible by it. */
10275 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10276 return expand_expr_divmod (code
, mode
, treeop0
, treeop1
, op0
, op1
,
10277 target
, unsignedp
);
10282 case MULT_HIGHPART_EXPR
:
10283 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10284 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
10288 case FIXED_CONVERT_EXPR
:
10289 op0
= expand_normal (treeop0
);
10290 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
10291 target
= gen_reg_rtx (mode
);
10293 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
10294 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
10295 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
10296 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
10298 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
10301 case FIX_TRUNC_EXPR
:
10302 op0
= expand_normal (treeop0
);
10303 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
10304 target
= gen_reg_rtx (mode
);
10305 expand_fix (target
, op0
, unsignedp
);
10309 op0
= expand_normal (treeop0
);
10310 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
10311 target
= gen_reg_rtx (mode
);
10312 /* expand_float can't figure out what to do if FROM has VOIDmode.
10313 So give it the correct mode. With -O, cse will optimize this. */
10314 if (GET_MODE (op0
) == VOIDmode
)
10315 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
10317 expand_float (target
, op0
,
10318 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10322 op0
= expand_expr (treeop0
, subtarget
,
10323 VOIDmode
, EXPAND_NORMAL
);
10324 if (modifier
== EXPAND_STACK_PARM
)
10326 temp
= expand_unop (mode
,
10327 optab_for_tree_code (NEGATE_EXPR
, type
,
10331 return REDUCE_BIT_FIELD (temp
);
10335 op0
= expand_expr (treeop0
, subtarget
,
10336 VOIDmode
, EXPAND_NORMAL
);
10337 if (modifier
== EXPAND_STACK_PARM
)
10340 /* ABS_EXPR is not valid for complex arguments. */
10341 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10342 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
10344 /* Unsigned abs is simply the operand. Testing here means we don't
10345 risk generating incorrect code below. */
10346 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
10349 return expand_abs (mode
, op0
, target
, unsignedp
,
10350 safe_from_p (target
, treeop0
, 1));
10354 target
= original_target
;
10356 || modifier
== EXPAND_STACK_PARM
10357 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
10358 || GET_MODE (target
) != mode
10360 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
10361 target
= gen_reg_rtx (mode
);
10362 expand_operands (treeop0
, treeop1
,
10363 target
, &op0
, &op1
, EXPAND_NORMAL
);
10365 /* First try to do it with a special MIN or MAX instruction.
10366 If that does not win, use a conditional jump to select the proper
10368 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
10369 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
10374 if (VECTOR_TYPE_P (type
))
10375 gcc_unreachable ();
10377 /* At this point, a MEM target is no longer useful; we will get better
10378 code without it. */
10380 if (! REG_P (target
))
10381 target
= gen_reg_rtx (mode
);
10383 /* If op1 was placed in target, swap op0 and op1. */
10384 if (target
!= op0
&& target
== op1
)
10385 std::swap (op0
, op1
);
10387 /* We generate better code and avoid problems with op1 mentioning
10388 target by forcing op1 into a pseudo if it isn't a constant. */
10389 if (! CONSTANT_P (op1
))
10390 op1
= force_reg (mode
, op1
);
10393 enum rtx_code comparison_code
;
10396 if (code
== MAX_EXPR
)
10397 comparison_code
= unsignedp
? GEU
: GE
;
10399 comparison_code
= unsignedp
? LEU
: LE
;
10401 /* Canonicalize to comparisons against 0. */
10402 if (op1
== const1_rtx
)
10404 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
10405 or (a != 0 ? a : 1) for unsigned.
10406 For MIN we are safe converting (a <= 1 ? a : 1)
10407 into (a <= 0 ? a : 1) */
10408 cmpop1
= const0_rtx
;
10409 if (code
== MAX_EXPR
)
10410 comparison_code
= unsignedp
? NE
: GT
;
10412 if (op1
== constm1_rtx
&& !unsignedp
)
10414 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
10415 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
10416 cmpop1
= const0_rtx
;
10417 if (code
== MIN_EXPR
)
10418 comparison_code
= LT
;
10421 /* Use a conditional move if possible. */
10422 if (can_conditionally_move_p (mode
))
10428 /* Try to emit the conditional move. */
10429 insn
= emit_conditional_move (target
,
10431 op0
, cmpop1
, mode
},
10435 /* If we could do the conditional move, emit the sequence,
10439 rtx_insn
*seq
= get_insns ();
10445 /* Otherwise discard the sequence and fall back to code with
10451 emit_move_insn (target
, op0
);
10453 lab
= gen_label_rtx ();
10454 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
10455 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
10456 profile_probability::uninitialized ());
10458 emit_move_insn (target
, op1
);
10463 op0
= expand_expr (treeop0
, subtarget
,
10464 VOIDmode
, EXPAND_NORMAL
);
10465 if (modifier
== EXPAND_STACK_PARM
)
10467 /* In case we have to reduce the result to bitfield precision
10468 for unsigned bitfield expand this as XOR with a proper constant
10470 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
10472 int_mode
= SCALAR_INT_TYPE_MODE (type
);
10473 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
10474 false, GET_MODE_PRECISION (int_mode
));
10476 temp
= expand_binop (int_mode
, xor_optab
, op0
,
10477 immed_wide_int_const (mask
, int_mode
),
10478 target
, 1, OPTAB_LIB_WIDEN
);
10481 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
10485 /* ??? Can optimize bitwise operations with one arg constant.
10486 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
10487 and (a bitwise1 b) bitwise2 b (etc)
10488 but that is probably not worth while. */
10497 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
10498 || type_has_mode_precision_p (type
));
10504 /* If this is a fixed-point operation, then we cannot use the code
10505 below because "expand_shift" doesn't support sat/no-sat fixed-point
10507 if (ALL_FIXED_POINT_MODE_P (mode
))
10510 if (! safe_from_p (subtarget
, treeop1
, 1))
10512 if (modifier
== EXPAND_STACK_PARM
)
10514 op0
= expand_expr (treeop0
, subtarget
,
10515 VOIDmode
, EXPAND_NORMAL
);
10517 /* Left shift optimization when shifting across word_size boundary.
10519 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
10520 there isn't native instruction to support this wide mode
10521 left shift. Given below scenario:
10523 Type A = (Type) B << C
10526 | dest_high | dest_low |
10530 If the shift amount C caused we shift B to across the word
10531 size boundary, i.e part of B shifted into high half of
10532 destination register, and part of B remains in the low
10533 half, then GCC will use the following left shift expand
10536 1. Initialize dest_low to B.
10537 2. Initialize every bit of dest_high to the sign bit of B.
10538 3. Logic left shift dest_low by C bit to finalize dest_low.
10539 The value of dest_low before this shift is kept in a temp D.
10540 4. Logic left shift dest_high by C.
10541 5. Logic right shift D by (word_size - C).
10542 6. Or the result of 4 and 5 to finalize dest_high.
10544 While, by checking gimple statements, if operand B is
10545 coming from signed extension, then we can simplify above
10548 1. dest_high = src_low >> (word_size - C).
10549 2. dest_low = src_low << C.
10551 We can use one arithmetic right shift to finish all the
10552 purpose of steps 2, 4, 5, 6, thus we reduce the steps
10553 needed from 6 into 2.
10555 The case is similar for zero extension, except that we
10556 initialize dest_high to zero rather than copies of the sign
10557 bit from B. Furthermore, we need to use a logical right shift
10560 The choice of sign-extension versus zero-extension is
10561 determined entirely by whether or not B is signed and is
10562 independent of the current setting of unsignedp. */
10565 if (code
== LSHIFT_EXPR
10568 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
10569 && mode
== int_mode
10570 && TREE_CONSTANT (treeop1
)
10571 && TREE_CODE (treeop0
) == SSA_NAME
)
10573 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
10574 if (is_gimple_assign (def
)
10575 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
10577 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
10578 (TREE_TYPE (gimple_assign_rhs1 (def
)));
10580 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
10581 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
10582 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
10583 >= GET_MODE_BITSIZE (word_mode
)))
10585 rtx_insn
*seq
, *seq_old
;
10586 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
10588 bool extend_unsigned
10589 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
10590 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
10591 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
10592 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
10593 int_mode
, high_off
);
10594 HOST_WIDE_INT ramount
= (BITS_PER_WORD
10595 - TREE_INT_CST_LOW (treeop1
));
10596 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
10599 /* dest_high = src_low >> (word_size - C). */
10600 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
10603 if (temp
!= dest_high
)
10604 emit_move_insn (dest_high
, temp
);
10606 /* dest_low = src_low << C. */
10607 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
10608 treeop1
, dest_low
, unsignedp
);
10609 if (temp
!= dest_low
)
10610 emit_move_insn (dest_low
, temp
);
10612 seq
= get_insns ();
10616 if (have_insn_for (ASHIFT
, int_mode
))
10618 bool speed_p
= optimize_insn_for_speed_p ();
10620 rtx ret_old
= expand_variable_shift (code
, int_mode
,
10625 seq_old
= get_insns ();
10627 if (seq_cost (seq
, speed_p
)
10628 >= seq_cost (seq_old
, speed_p
))
10639 if (temp
== NULL_RTX
)
10640 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
10642 if (code
== LSHIFT_EXPR
)
10643 temp
= REDUCE_BIT_FIELD (temp
);
10647 /* Could determine the answer when only additive constants differ. Also,
10648 the addition of one can be handled by changing the condition. */
10655 case UNORDERED_EXPR
:
10664 temp
= do_store_flag (ops
,
10665 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
10666 tmode
!= VOIDmode
? tmode
: mode
);
10670 /* Use a compare and a jump for BLKmode comparisons, or for function
10671 type comparisons is have_canonicalize_funcptr_for_compare. */
10674 || modifier
== EXPAND_STACK_PARM
10675 || ! safe_from_p (target
, treeop0
, 1)
10676 || ! safe_from_p (target
, treeop1
, 1)
10677 /* Make sure we don't have a hard reg (such as function's return
10678 value) live across basic blocks, if not optimizing. */
10679 || (!optimize
&& REG_P (target
)
10680 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
10681 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10683 emit_move_insn (target
, const0_rtx
);
10685 rtx_code_label
*lab1
= gen_label_rtx ();
10686 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
10687 profile_probability::uninitialized ());
10689 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
10690 emit_move_insn (target
, constm1_rtx
);
10692 emit_move_insn (target
, const1_rtx
);
10698 /* Get the rtx code of the operands. */
10699 op0
= expand_normal (treeop0
);
10700 op1
= expand_normal (treeop1
);
10703 target
= gen_reg_rtx (TYPE_MODE (type
));
10705 /* If target overlaps with op1, then either we need to force
10706 op1 into a pseudo (if target also overlaps with op0),
10707 or write the complex parts in reverse order. */
10708 switch (GET_CODE (target
))
10711 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
10713 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
10715 complex_expr_force_op1
:
10716 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
10717 emit_move_insn (temp
, op1
);
10721 complex_expr_swap_order
:
10722 /* Move the imaginary (op1) and real (op0) parts to their
10724 write_complex_part (target
, op1
, true, true);
10725 write_complex_part (target
, op0
, false, false);
10731 temp
= adjust_address_nv (target
,
10732 GET_MODE_INNER (GET_MODE (target
)), 0);
10733 if (reg_overlap_mentioned_p (temp
, op1
))
10735 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
10736 temp
= adjust_address_nv (target
, imode
,
10737 GET_MODE_SIZE (imode
));
10738 if (reg_overlap_mentioned_p (temp
, op0
))
10739 goto complex_expr_force_op1
;
10740 goto complex_expr_swap_order
;
10744 if (reg_overlap_mentioned_p (target
, op1
))
10746 if (reg_overlap_mentioned_p (target
, op0
))
10747 goto complex_expr_force_op1
;
10748 goto complex_expr_swap_order
;
10753 /* Move the real (op0) and imaginary (op1) parts to their location. */
10754 write_complex_part (target
, op0
, false, true);
10755 write_complex_part (target
, op1
, true, false);
10759 case WIDEN_SUM_EXPR
:
10761 tree oprnd0
= treeop0
;
10762 tree oprnd1
= treeop1
;
10764 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10765 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
10766 target
, unsignedp
);
10770 case VEC_UNPACK_HI_EXPR
:
10771 case VEC_UNPACK_LO_EXPR
:
10772 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
10773 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
10775 op0
= expand_normal (treeop0
);
10776 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
10777 target
, unsignedp
);
10782 case VEC_UNPACK_FLOAT_HI_EXPR
:
10783 case VEC_UNPACK_FLOAT_LO_EXPR
:
10785 op0
= expand_normal (treeop0
);
10786 /* The signedness is determined from input operand. */
10787 temp
= expand_widen_pattern_expr
10788 (ops
, op0
, NULL_RTX
, NULL_RTX
,
10789 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10795 case VEC_WIDEN_MULT_HI_EXPR
:
10796 case VEC_WIDEN_MULT_LO_EXPR
:
10797 case VEC_WIDEN_MULT_EVEN_EXPR
:
10798 case VEC_WIDEN_MULT_ODD_EXPR
:
10799 case VEC_WIDEN_LSHIFT_HI_EXPR
:
10800 case VEC_WIDEN_LSHIFT_LO_EXPR
:
10801 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10802 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
10803 target
, unsignedp
);
10804 gcc_assert (target
);
10807 case VEC_PACK_SAT_EXPR
:
10808 case VEC_PACK_FIX_TRUNC_EXPR
:
10809 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10810 subtarget
= NULL_RTX
;
10813 case VEC_PACK_TRUNC_EXPR
:
10814 if (VECTOR_BOOLEAN_TYPE_P (type
)
10815 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
10816 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
10817 && SCALAR_INT_MODE_P (mode
))
10819 class expand_operand eops
[4];
10820 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
10821 expand_operands (treeop0
, treeop1
,
10822 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10823 this_optab
= vec_pack_sbool_trunc_optab
;
10824 enum insn_code icode
= optab_handler (this_optab
, imode
);
10825 create_output_operand (&eops
[0], target
, mode
);
10826 create_convert_operand_from (&eops
[1], op0
, imode
, false);
10827 create_convert_operand_from (&eops
[2], op1
, imode
, false);
10828 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
10829 create_input_operand (&eops
[3], temp
, imode
);
10830 expand_insn (icode
, 4, eops
);
10831 return eops
[0].value
;
10833 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10834 subtarget
= NULL_RTX
;
10837 case VEC_PACK_FLOAT_EXPR
:
10838 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
10839 expand_operands (treeop0
, treeop1
,
10840 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10841 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
10843 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
10844 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
10846 gcc_assert (target
);
10849 case VEC_PERM_EXPR
:
10851 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
10852 vec_perm_builder sel
;
10853 if (TREE_CODE (treeop2
) == VECTOR_CST
10854 && tree_to_vec_perm_builder (&sel
, treeop2
))
10856 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
10857 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
10862 op2
= expand_normal (treeop2
);
10863 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
10869 case DOT_PROD_EXPR
:
10871 tree oprnd0
= treeop0
;
10872 tree oprnd1
= treeop1
;
10873 tree oprnd2
= treeop2
;
10875 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10876 op2
= expand_normal (oprnd2
);
10877 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
10878 target
, unsignedp
);
10884 tree oprnd0
= treeop0
;
10885 tree oprnd1
= treeop1
;
10886 tree oprnd2
= treeop2
;
10888 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10889 op2
= expand_normal (oprnd2
);
10890 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
10891 target
, unsignedp
);
10895 case REALIGN_LOAD_EXPR
:
10897 tree oprnd0
= treeop0
;
10898 tree oprnd1
= treeop1
;
10899 tree oprnd2
= treeop2
;
10901 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
10902 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
10903 op2
= expand_normal (oprnd2
);
10904 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
10905 target
, unsignedp
);
10912 /* A COND_EXPR with its type being VOID_TYPE represents a
10913 conditional jump and is handled in
10914 expand_gimple_cond_expr. */
10915 gcc_assert (!VOID_TYPE_P (type
));
10917 /* Note that COND_EXPRs whose type is a structure or union
10918 are required to be constructed to contain assignments of
10919 a temporary variable, so that we can evaluate them here
10920 for side effect only. If type is void, we must do likewise. */
10922 gcc_assert (!TREE_ADDRESSABLE (type
)
10924 && TREE_TYPE (treeop1
) != void_type_node
10925 && TREE_TYPE (treeop2
) != void_type_node
);
10927 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
10931 /* If we are not to produce a result, we have no target. Otherwise,
10932 if a target was specified use it; it will not be used as an
10933 intermediate target unless it is safe. If no target, use a
10936 if (modifier
!= EXPAND_STACK_PARM
10938 && safe_from_p (original_target
, treeop0
, 1)
10939 && GET_MODE (original_target
) == mode
10940 && !MEM_P (original_target
))
10941 temp
= original_target
;
10943 temp
= assign_temp (type
, 0, 1);
10945 do_pending_stack_adjust ();
10947 rtx_code_label
*lab0
= gen_label_rtx ();
10948 rtx_code_label
*lab1
= gen_label_rtx ();
10949 jumpifnot (treeop0
, lab0
,
10950 profile_probability::uninitialized ());
10951 store_expr (treeop1
, temp
,
10952 modifier
== EXPAND_STACK_PARM
,
10955 emit_jump_insn (targetm
.gen_jump (lab1
));
10958 store_expr (treeop2
, temp
,
10959 modifier
== EXPAND_STACK_PARM
,
10967 case VEC_DUPLICATE_EXPR
:
10968 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
10969 target
= expand_vector_broadcast (mode
, op0
);
10970 gcc_assert (target
);
10973 case VEC_SERIES_EXPR
:
10974 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
10975 return expand_vec_series_expr (mode
, op0
, op1
, target
);
10977 case BIT_INSERT_EXPR
:
10979 unsigned bitpos
= tree_to_uhwi (treeop2
);
10981 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
10982 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
10984 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
10985 op0
= expand_normal (treeop0
);
10986 op1
= expand_normal (treeop1
);
10987 rtx dst
= gen_reg_rtx (mode
);
10988 emit_move_insn (dst
, op0
);
10989 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
10990 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false, false);
10995 gcc_unreachable ();
10998 /* Here to do an ordinary binary operator. */
11000 expand_operands (treeop0
, treeop1
,
11001 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11003 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
11005 if (modifier
== EXPAND_STACK_PARM
)
11007 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
11008 unsignedp
, OPTAB_LIB_WIDEN
);
11010 /* Bitwise operations do not need bitfield reduction as we expect their
11011 operands being properly truncated. */
11012 if (code
== BIT_XOR_EXPR
11013 || code
== BIT_AND_EXPR
11014 || code
== BIT_IOR_EXPR
)
11016 return REDUCE_BIT_FIELD (temp
);
11018 #undef REDUCE_BIT_FIELD
11021 /* Return TRUE if expression STMT is suitable for replacement.
11022 Never consider memory loads as replaceable, because those don't ever lead
11023 into constant expressions. */
11026 stmt_is_replaceable_p (gimple
*stmt
)
11028 if (ssa_is_replaceable_p (stmt
))
11030 /* Don't move around loads. */
11031 if (!gimple_assign_single_p (stmt
)
11032 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
11039 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
11040 enum expand_modifier modifier
, rtx
*alt_rtl
,
11041 bool inner_reference_p
)
11043 rtx op0
, op1
, temp
, decl_rtl
;
11046 machine_mode mode
, dmode
;
11047 enum tree_code code
= TREE_CODE (exp
);
11048 rtx subtarget
, original_target
;
11050 bool reduce_bit_field
;
11051 location_t loc
= EXPR_LOCATION (exp
);
11052 struct separate_ops ops
;
11053 tree treeop0
, treeop1
, treeop2
;
11054 tree ssa_name
= NULL_TREE
;
11057 /* Some ABIs define padding bits in _BitInt uninitialized. Normally, RTL
11058 expansion sign/zero extends integral types with less than mode precision
11059 when reading from bit-fields and after arithmetic operations (see
11060 REDUCE_BIT_FIELD in expand_expr_real_2) and on subsequent loads relies
11061 on those extensions to have been already performed, but because of the
11062 above for _BitInt they need to be sign/zero extended when reading from
11063 locations that could be exposed to ABI boundaries (when loading from
11064 objects in memory, or function arguments, return value). Because we
11065 internally extend after arithmetic operations, we can avoid doing that
11066 when reading from SSA_NAMEs of vars. */
11067 #define EXTEND_BITINT(expr) \
11068 ((TREE_CODE (type) == BITINT_TYPE \
11069 && reduce_bit_field \
11070 && mode != BLKmode \
11071 && modifier != EXPAND_MEMORY \
11072 && modifier != EXPAND_WRITE \
11073 && modifier != EXPAND_INITIALIZER \
11074 && modifier != EXPAND_CONST_ADDRESS) \
11075 ? reduce_to_bit_field_precision ((expr), NULL_RTX, type) : (expr))
11077 type
= TREE_TYPE (exp
);
11078 mode
= TYPE_MODE (type
);
11079 unsignedp
= TYPE_UNSIGNED (type
);
11081 treeop0
= treeop1
= treeop2
= NULL_TREE
;
11082 if (!VL_EXP_CLASS_P (exp
))
11083 switch (TREE_CODE_LENGTH (code
))
11086 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
11087 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
11088 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
11096 ops
.location
= loc
;
11098 ignore
= (target
== const0_rtx
11099 || ((CONVERT_EXPR_CODE_P (code
)
11100 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
11101 && TREE_CODE (type
) == VOID_TYPE
));
11103 /* An operation in what may be a bit-field type needs the
11104 result to be reduced to the precision of the bit-field type,
11105 which is narrower than that of the type's mode. */
11106 reduce_bit_field
= (!ignore
11107 && INTEGRAL_TYPE_P (type
)
11108 && !type_has_mode_precision_p (type
));
11110 /* If we are going to ignore this result, we need only do something
11111 if there is a side-effect somewhere in the expression. If there
11112 is, short-circuit the most common cases here. Note that we must
11113 not call expand_expr with anything but const0_rtx in case this
11114 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
11118 if (! TREE_SIDE_EFFECTS (exp
))
11121 /* Ensure we reference a volatile object even if value is ignored, but
11122 don't do this if all we are doing is taking its address. */
11123 if (TREE_THIS_VOLATILE (exp
)
11124 && TREE_CODE (exp
) != FUNCTION_DECL
11125 && mode
!= VOIDmode
&& mode
!= BLKmode
11126 && modifier
!= EXPAND_CONST_ADDRESS
)
11128 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
11130 copy_to_reg (temp
);
11134 if (TREE_CODE_CLASS (code
) == tcc_unary
11135 || code
== BIT_FIELD_REF
11136 || code
== COMPONENT_REF
11137 || code
== INDIRECT_REF
)
11138 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
11141 else if (TREE_CODE_CLASS (code
) == tcc_binary
11142 || TREE_CODE_CLASS (code
) == tcc_comparison
11143 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
11145 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
11146 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
11153 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
11156 /* Use subtarget as the target for operand 0 of a binary operation. */
11157 subtarget
= get_subtarget (target
);
11158 original_target
= target
;
11164 tree function
= decl_function_context (exp
);
11166 temp
= label_rtx (exp
);
11167 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
11169 if (function
!= current_function_decl
11171 LABEL_REF_NONLOCAL_P (temp
) = 1;
11173 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
11178 /* ??? ivopts calls expander, without any preparation from
11179 out-of-ssa. So fake instructions as if this was an access to the
11180 base variable. This unnecessarily allocates a pseudo, see how we can
11181 reuse it, if partition base vars have it set already. */
11182 if (!currently_expanding_to_rtl
)
11184 tree var
= SSA_NAME_VAR (exp
);
11185 if (var
&& DECL_RTL_SET_P (var
))
11186 return DECL_RTL (var
);
11187 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
11188 LAST_VIRTUAL_REGISTER
+ 1);
11191 g
= get_gimple_for_ssa_name (exp
);
11192 /* For EXPAND_INITIALIZER try harder to get something simpler. */
11194 && modifier
== EXPAND_INITIALIZER
11195 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
11196 && (optimize
|| !SSA_NAME_VAR (exp
)
11197 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
11198 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
11199 g
= SSA_NAME_DEF_STMT (exp
);
11203 location_t saved_loc
= curr_insn_location ();
11204 loc
= gimple_location (g
);
11205 if (loc
!= UNKNOWN_LOCATION
)
11206 set_curr_insn_location (loc
);
11207 ops
.code
= gimple_assign_rhs_code (g
);
11208 switch (get_gimple_rhs_class (ops
.code
))
11210 case GIMPLE_TERNARY_RHS
:
11211 ops
.op2
= gimple_assign_rhs3 (g
);
11213 case GIMPLE_BINARY_RHS
:
11214 ops
.op1
= gimple_assign_rhs2 (g
);
11216 /* Try to expand conditonal compare. */
11217 if (targetm
.gen_ccmp_first
)
11219 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
11220 r
= expand_ccmp_expr (g
, mode
);
11225 case GIMPLE_UNARY_RHS
:
11226 ops
.op0
= gimple_assign_rhs1 (g
);
11227 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
11228 ops
.location
= loc
;
11229 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11231 case GIMPLE_SINGLE_RHS
:
11233 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
11234 tmode
, modifier
, alt_rtl
,
11235 inner_reference_p
);
11239 gcc_unreachable ();
11241 set_curr_insn_location (saved_loc
);
11242 if (REG_P (r
) && !REG_EXPR (r
))
11243 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
11248 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
11249 exp
= SSA_NAME_VAR (ssa_name
);
11250 /* Optimize and avoid to EXTEND_BITINIT doing anything if it is an
11251 SSA_NAME computed within the current function. In such case the
11252 value have been already extended before. While if it is a function
11253 parameter, result or some memory location, we need to be prepared
11254 for some other compiler leaving the bits uninitialized. */
11255 if (!exp
|| VAR_P (exp
))
11256 reduce_bit_field
= false;
11257 goto expand_decl_rtl
;
11260 /* Allow accel compiler to handle variables that require special
11261 treatment, e.g. if they have been modified in some way earlier in
11262 compilation by the adjust_private_decl OpenACC hook. */
11263 if (flag_openacc
&& targetm
.goacc
.expand_var_decl
)
11265 temp
= targetm
.goacc
.expand_var_decl (exp
);
11269 /* Expand const VAR_DECLs with CONSTRUCTOR initializers that
11270 have scalar integer modes to a reg via store_constructor. */
11271 if (TREE_READONLY (exp
)
11272 && !TREE_SIDE_EFFECTS (exp
)
11273 && (modifier
== EXPAND_NORMAL
|| modifier
== EXPAND_STACK_PARM
)
11274 && immediate_const_ctor_p (DECL_INITIAL (exp
))
11275 && SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (exp
)))
11276 && crtl
->emit
.regno_pointer_align_length
11279 target
= gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp
)));
11280 store_constructor (DECL_INITIAL (exp
), target
, 0,
11281 int_expr_size (DECL_INITIAL (exp
)), false);
11284 /* ... fall through ... */
11287 /* If a static var's type was incomplete when the decl was written,
11288 but the type is complete now, lay out the decl now. */
11289 if (DECL_SIZE (exp
) == 0
11290 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
11291 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
11292 layout_decl (exp
, 0);
11296 case FUNCTION_DECL
:
11298 decl_rtl
= DECL_RTL (exp
);
11300 gcc_assert (decl_rtl
);
11302 /* DECL_MODE might change when TYPE_MODE depends on attribute target
11303 settings for VECTOR_TYPE_P that might switch for the function. */
11304 if (currently_expanding_to_rtl
11305 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
11306 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
11307 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
11309 decl_rtl
= copy_rtx (decl_rtl
);
11311 /* Record writes to register variables. */
11312 if (modifier
== EXPAND_WRITE
11313 && REG_P (decl_rtl
)
11314 && HARD_REGISTER_P (decl_rtl
))
11315 add_to_hard_reg_set (&crtl
->asm_clobbers
,
11316 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
11318 /* Ensure variable marked as used even if it doesn't go through
11319 a parser. If it hasn't be used yet, write out an external
11322 TREE_USED (exp
) = 1;
11324 /* Show we haven't gotten RTL for this yet. */
11327 /* Variables inherited from containing functions should have
11328 been lowered by this point. */
11331 tree context
= decl_function_context (exp
);
11332 gcc_assert (SCOPE_FILE_SCOPE_P (context
)
11333 || context
== current_function_decl
11334 || TREE_STATIC (exp
)
11335 || DECL_EXTERNAL (exp
)
11336 /* ??? C++ creates functions that are not
11338 || TREE_CODE (exp
) == FUNCTION_DECL
);
11341 /* This is the case of an array whose size is to be determined
11342 from its initializer, while the initializer is still being parsed.
11343 ??? We aren't parsing while expanding anymore. */
11345 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
11346 temp
= validize_mem (decl_rtl
);
11348 /* If DECL_RTL is memory, we are in the normal case and the
11349 address is not valid, get the address into a register. */
11351 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
11354 *alt_rtl
= decl_rtl
;
11355 decl_rtl
= use_anchored_address (decl_rtl
);
11356 if (modifier
!= EXPAND_CONST_ADDRESS
11357 && modifier
!= EXPAND_SUM
11358 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
11359 : GET_MODE (decl_rtl
),
11360 XEXP (decl_rtl
, 0),
11361 MEM_ADDR_SPACE (decl_rtl
)))
11362 temp
= replace_equiv_address (decl_rtl
,
11363 copy_rtx (XEXP (decl_rtl
, 0)));
11366 /* If we got something, return it. But first, set the alignment
11367 if the address is a register. */
11370 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
11371 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
11373 else if (MEM_P (decl_rtl
))
11379 && modifier
!= EXPAND_WRITE
11380 && modifier
!= EXPAND_MEMORY
11381 && modifier
!= EXPAND_INITIALIZER
11382 && modifier
!= EXPAND_CONST_ADDRESS
11383 && modifier
!= EXPAND_SUM
11384 && !inner_reference_p
11386 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
11387 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
11388 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
11390 return EXTEND_BITINT (temp
);
11394 dmode
= DECL_MODE (exp
);
11396 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
11398 /* If the mode of DECL_RTL does not match that of the decl,
11399 there are two cases: we are dealing with a BLKmode value
11400 that is returned in a register, or we are dealing with
11401 a promoted value. In the latter case, return a SUBREG
11402 of the wanted mode, but mark it so that we know that it
11403 was already extended. */
11404 if (REG_P (decl_rtl
)
11405 && dmode
!= BLKmode
11406 && GET_MODE (decl_rtl
) != dmode
)
11408 machine_mode pmode
;
11410 /* Get the signedness to be used for this variable. Ensure we get
11411 the same mode we got when the variable was declared. */
11412 if (code
!= SSA_NAME
)
11413 pmode
= promote_decl_mode (exp
, &unsignedp
);
11414 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
11415 && gimple_code (g
) == GIMPLE_CALL
11416 && !gimple_call_internal_p (g
))
11417 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
11418 gimple_call_fntype (g
),
11421 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
11422 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
11424 /* Some ABIs require scalar floating point modes to be passed
11425 in a wider scalar integer mode. We need to explicitly
11426 truncate to an integer mode of the correct precision before
11427 using a SUBREG to reinterpret as a floating point value. */
11428 if (SCALAR_FLOAT_MODE_P (mode
)
11429 && SCALAR_INT_MODE_P (pmode
)
11430 && known_lt (GET_MODE_SIZE (mode
), GET_MODE_SIZE (pmode
)))
11431 return convert_wider_int_to_float (mode
, pmode
, decl_rtl
);
11433 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
11434 SUBREG_PROMOTED_VAR_P (temp
) = 1;
11435 SUBREG_PROMOTED_SET (temp
, unsignedp
);
11436 return EXTEND_BITINT (temp
);
11439 return EXTEND_BITINT (decl_rtl
);
11443 if (TREE_CODE (type
) == BITINT_TYPE
)
11445 unsigned int prec
= TYPE_PRECISION (type
);
11446 struct bitint_info info
;
11447 bool ok
= targetm
.c
.bitint_type_info (prec
, &info
);
11449 scalar_int_mode limb_mode
11450 = as_a
<scalar_int_mode
> (info
.limb_mode
);
11451 unsigned int limb_prec
= GET_MODE_PRECISION (limb_mode
);
11452 if (prec
> limb_prec
&& prec
> MAX_FIXED_MODE_SIZE
)
11454 /* Emit large/huge _BitInt INTEGER_CSTs into memory. */
11455 exp
= tree_output_constant_def (exp
);
11456 return expand_expr (exp
, target
, VOIDmode
, modifier
);
11460 /* Given that TYPE_PRECISION (type) is not always equal to
11461 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
11462 the former to the latter according to the signedness of the
11464 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
11465 temp
= immed_wide_int_const
11466 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
11472 tree tmp
= NULL_TREE
;
11473 if (VECTOR_MODE_P (mode
))
11474 return const_vector_from_tree (exp
);
11475 scalar_int_mode int_mode
;
11476 if (is_int_mode (mode
, &int_mode
))
11478 tree type_for_mode
= lang_hooks
.types
.type_for_mode (int_mode
, 1);
11480 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
11481 type_for_mode
, exp
);
11485 vec
<constructor_elt
, va_gc
> *v
;
11486 /* Constructors need to be fixed-length. FIXME. */
11487 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11488 vec_alloc (v
, nunits
);
11489 for (unsigned int i
= 0; i
< nunits
; ++i
)
11490 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
11491 tmp
= build_constructor (type
, v
);
11493 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
11498 if (modifier
== EXPAND_WRITE
)
11500 /* Writing into CONST_DECL is always invalid, but handle it
11502 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
11503 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
11504 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
11505 EXPAND_NORMAL
, as
);
11506 op0
= memory_address_addr_space (mode
, op0
, as
);
11507 temp
= gen_rtx_MEM (mode
, op0
);
11508 set_mem_addr_space (temp
, as
);
11511 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
11514 /* If optimized, generate immediate CONST_DOUBLE
11515 which will be turned into memory by reload if necessary.
11517 We used to force a register so that loop.c could see it. But
11518 this does not allow gen_* patterns to perform optimizations with
11519 the constants. It also produces two insns in cases like "x = 1.0;".
11520 On most machines, floating-point constants are not permitted in
11521 many insns, so we'd end up copying it to a register in any case.
11523 Now, we do the copying in expand_binop, if appropriate. */
11524 return const_double_from_real_value (TREE_REAL_CST (exp
),
11525 TYPE_MODE (TREE_TYPE (exp
)));
11528 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
11529 TYPE_MODE (TREE_TYPE (exp
)));
11532 /* Handle evaluating a complex constant in a CONCAT target. */
11533 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
11537 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
11538 rtarg
= XEXP (original_target
, 0);
11539 itarg
= XEXP (original_target
, 1);
11541 /* Move the real and imaginary parts separately. */
11542 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
11543 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
11546 emit_move_insn (rtarg
, op0
);
11548 emit_move_insn (itarg
, op1
);
11550 return original_target
;
11556 temp
= expand_expr_constant (exp
, 1, modifier
);
11558 /* temp contains a constant address.
11559 On RISC machines where a constant address isn't valid,
11560 make some insns to get that address into a register. */
11561 if (modifier
!= EXPAND_CONST_ADDRESS
11562 && modifier
!= EXPAND_INITIALIZER
11563 && modifier
!= EXPAND_SUM
11564 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
11565 MEM_ADDR_SPACE (temp
)))
11566 return replace_equiv_address (temp
,
11567 copy_rtx (XEXP (temp
, 0)));
11571 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
11575 tree val
= treeop0
;
11576 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
11577 inner_reference_p
);
11579 if (!SAVE_EXPR_RESOLVED_P (exp
))
11581 /* We can indeed still hit this case, typically via builtin
11582 expanders calling save_expr immediately before expanding
11583 something. Assume this means that we only have to deal
11584 with non-BLKmode values. */
11585 gcc_assert (GET_MODE (ret
) != BLKmode
);
11587 val
= build_decl (curr_insn_location (),
11588 VAR_DECL
, NULL
, TREE_TYPE (exp
));
11589 DECL_ARTIFICIAL (val
) = 1;
11590 DECL_IGNORED_P (val
) = 1;
11592 TREE_OPERAND (exp
, 0) = treeop0
;
11593 SAVE_EXPR_RESOLVED_P (exp
) = 1;
11595 if (!CONSTANT_P (ret
))
11596 ret
= copy_to_reg (ret
);
11597 SET_DECL_RTL (val
, ret
);
11605 /* If we don't need the result, just ensure we evaluate any
11609 unsigned HOST_WIDE_INT idx
;
11612 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
11613 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
11618 return expand_constructor (exp
, target
, modifier
, false);
11620 case TARGET_MEM_REF
:
11623 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
11624 unsigned int align
;
11626 op0
= addr_for_mem_ref (exp
, as
, true);
11627 op0
= memory_address_addr_space (mode
, op0
, as
);
11628 temp
= gen_rtx_MEM (mode
, op0
);
11629 set_mem_attributes (temp
, exp
, 0);
11630 set_mem_addr_space (temp
, as
);
11631 align
= get_object_alignment (exp
);
11632 if (modifier
!= EXPAND_WRITE
11633 && modifier
!= EXPAND_MEMORY
11635 && align
< GET_MODE_ALIGNMENT (mode
))
11636 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
11637 align
, NULL_RTX
, NULL
);
11638 return EXTEND_BITINT (temp
);
11643 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
11645 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
11646 machine_mode address_mode
;
11647 tree base
= TREE_OPERAND (exp
, 0);
11650 /* Handle expansion of non-aliased memory with non-BLKmode. That
11651 might end up in a register. */
11652 if (mem_ref_refers_to_non_mem_p (exp
))
11654 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
11655 base
= TREE_OPERAND (base
, 0);
11656 poly_uint64 type_size
;
11657 if (known_eq (offset
, 0)
11659 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
11660 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
11661 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
11662 target
, tmode
, modifier
);
11663 if (TYPE_MODE (type
) == BLKmode
)
11665 temp
= assign_stack_temp (DECL_MODE (base
),
11666 GET_MODE_SIZE (DECL_MODE (base
)));
11667 store_expr (base
, temp
, 0, false, false);
11668 temp
= adjust_address (temp
, BLKmode
, offset
);
11669 set_mem_size (temp
, int_size_in_bytes (type
));
11672 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
11673 bitsize_int (offset
* BITS_PER_UNIT
));
11674 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
11675 return expand_expr (exp
, target
, tmode
, modifier
);
11677 address_mode
= targetm
.addr_space
.address_mode (as
);
11678 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
11680 tree mask
= gimple_assign_rhs2 (def_stmt
);
11681 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
11682 gimple_assign_rhs1 (def_stmt
), mask
);
11683 TREE_OPERAND (exp
, 0) = base
;
11685 align
= get_object_alignment (exp
);
11686 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
11687 op0
= memory_address_addr_space (mode
, op0
, as
);
11688 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
11690 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
11691 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
11692 op0
= memory_address_addr_space (mode
, op0
, as
);
11694 temp
= gen_rtx_MEM (mode
, op0
);
11695 set_mem_attributes (temp
, exp
, 0);
11696 set_mem_addr_space (temp
, as
);
11697 if (TREE_THIS_VOLATILE (exp
))
11698 MEM_VOLATILE_P (temp
) = 1;
11699 if (modifier
== EXPAND_WRITE
|| modifier
== EXPAND_MEMORY
)
11701 if (!inner_reference_p
11703 && align
< GET_MODE_ALIGNMENT (mode
))
11704 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
11705 modifier
== EXPAND_STACK_PARM
11706 ? NULL_RTX
: target
, alt_rtl
);
11708 temp
= flip_storage_order (mode
, temp
);
11709 return EXTEND_BITINT (temp
);
11715 tree array
= treeop0
;
11716 tree index
= treeop1
;
11719 /* Fold an expression like: "foo"[2].
11720 This is not done in fold so it won't happen inside &.
11721 Don't fold if this is for wide characters since it's too
11722 difficult to do correctly and this is a very rare case. */
11724 if (modifier
!= EXPAND_CONST_ADDRESS
11725 && modifier
!= EXPAND_INITIALIZER
11726 && modifier
!= EXPAND_MEMORY
)
11728 tree t
= fold_read_from_constant_string (exp
);
11731 return expand_expr (t
, target
, tmode
, modifier
);
11734 /* If this is a constant index into a constant array,
11735 just get the value from the array. Handle both the cases when
11736 we have an explicit constructor and when our operand is a variable
11737 that was declared const. */
11739 if (modifier
!= EXPAND_CONST_ADDRESS
11740 && modifier
!= EXPAND_INITIALIZER
11741 && modifier
!= EXPAND_MEMORY
11742 && TREE_CODE (array
) == CONSTRUCTOR
11743 && ! TREE_SIDE_EFFECTS (array
)
11744 && TREE_CODE (index
) == INTEGER_CST
)
11746 unsigned HOST_WIDE_INT ix
;
11749 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
11751 if (tree_int_cst_equal (field
, index
))
11753 if (!TREE_SIDE_EFFECTS (value
))
11754 return expand_expr (fold (value
), target
, tmode
, modifier
);
11759 else if (optimize
>= 1
11760 && modifier
!= EXPAND_CONST_ADDRESS
11761 && modifier
!= EXPAND_INITIALIZER
11762 && modifier
!= EXPAND_MEMORY
11763 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
11764 && TREE_CODE (index
) == INTEGER_CST
11765 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11766 && (init
= ctor_for_folding (array
)) != error_mark_node
)
11768 if (init
== NULL_TREE
)
11770 tree value
= build_zero_cst (type
);
11771 if (TREE_CODE (value
) == CONSTRUCTOR
)
11773 /* If VALUE is a CONSTRUCTOR, this optimization is only
11774 useful if this doesn't store the CONSTRUCTOR into
11775 memory. If it does, it is more efficient to just
11776 load the data from the array directly. */
11777 rtx ret
= expand_constructor (value
, target
,
11779 if (ret
== NULL_RTX
)
11784 return expand_expr (value
, target
, tmode
, modifier
);
11786 else if (TREE_CODE (init
) == CONSTRUCTOR
)
11788 unsigned HOST_WIDE_INT ix
;
11791 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
11793 if (tree_int_cst_equal (field
, index
))
11795 if (TREE_SIDE_EFFECTS (value
))
11798 if (TREE_CODE (value
) == CONSTRUCTOR
)
11800 /* If VALUE is a CONSTRUCTOR, this
11801 optimization is only useful if
11802 this doesn't store the CONSTRUCTOR
11803 into memory. If it does, it is more
11804 efficient to just load the data from
11805 the array directly. */
11806 rtx ret
= expand_constructor (value
, target
,
11808 if (ret
== NULL_RTX
)
11813 expand_expr (fold (value
), target
, tmode
, modifier
);
11816 else if (TREE_CODE (init
) == STRING_CST
)
11818 tree low_bound
= array_ref_low_bound (exp
);
11819 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
11821 /* Optimize the special case of a zero lower bound.
11823 We convert the lower bound to sizetype to avoid problems
11824 with constant folding. E.g. suppose the lower bound is
11825 1 and its mode is QI. Without the conversion
11826 (ARRAY + (INDEX - (unsigned char)1))
11828 (ARRAY + (-(unsigned char)1) + INDEX)
11830 (ARRAY + 255 + INDEX). Oops! */
11831 if (!integer_zerop (low_bound
))
11832 index1
= size_diffop_loc (loc
, index1
,
11833 fold_convert_loc (loc
, sizetype
,
11836 if (tree_fits_uhwi_p (index1
)
11837 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
11839 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
11840 scalar_int_mode char_mode
;
11842 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
11843 && GET_MODE_SIZE (char_mode
) == 1)
11844 return gen_int_mode (TREE_STRING_POINTER (init
)
11845 [TREE_INT_CST_LOW (index1
)],
11851 goto normal_inner_ref
;
11853 case COMPONENT_REF
:
11854 gcc_assert (TREE_CODE (treeop0
) != CONSTRUCTOR
);
11855 /* Fall through. */
11856 case BIT_FIELD_REF
:
11857 case ARRAY_RANGE_REF
:
11860 machine_mode mode1
, mode2
;
11861 poly_int64 bitsize
, bitpos
, bytepos
;
11863 int reversep
, volatilep
= 0;
11865 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
11866 &unsignedp
, &reversep
, &volatilep
);
11867 rtx orig_op0
, memloc
;
11868 bool clear_mem_expr
= false;
11869 bool must_force_mem
;
11871 /* If we got back the original object, something is wrong. Perhaps
11872 we are evaluating an expression too early. In any event, don't
11873 infinitely recurse. */
11874 gcc_assert (tem
!= exp
);
11876 /* Make sure bitpos is not negative, this can wreak havoc later. */
11877 if (maybe_lt (bitpos
, 0))
11879 gcc_checking_assert (offset
== NULL_TREE
);
11880 offset
= size_int (bits_to_bytes_round_down (bitpos
));
11881 bitpos
= num_trailing_bits (bitpos
);
11884 /* If we have either an offset, a BLKmode result, or a reference
11885 outside the underlying object, we must force it to memory.
11886 Such a case can occur in Ada if we have unchecked conversion
11887 of an expression from a scalar type to an aggregate type or
11888 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
11889 passed a partially uninitialized object or a view-conversion
11890 to a larger size. */
11891 must_force_mem
= offset
!= NULL_TREE
11892 || mode1
== BLKmode
11893 || (mode
== BLKmode
11894 && !int_mode_for_size (bitsize
, 1).exists ());
11896 const enum expand_modifier tem_modifier
11899 : modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
;
11901 /* If TEM's type is a union of variable size, pass TARGET to the inner
11902 computation, since it will need a temporary and TARGET is known
11903 to have to do. This occurs in unchecked conversion in Ada. */
11904 const rtx tem_target
11905 = TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11906 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
11907 && TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
))) != INTEGER_CST
11908 && modifier
!= EXPAND_STACK_PARM
11913 = expand_expr_real (tem
, tem_target
, VOIDmode
, tem_modifier
, NULL
,
11916 /* If the field has a mode, we want to access it in the
11917 field's mode, not the computed mode.
11918 If a MEM has VOIDmode (external with incomplete type),
11919 use BLKmode for it instead. */
11922 if (mode1
!= VOIDmode
)
11923 op0
= adjust_address (op0
, mode1
, 0);
11924 else if (GET_MODE (op0
) == VOIDmode
)
11925 op0
= adjust_address (op0
, BLKmode
, 0);
11929 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
11931 /* See above for the rationale. */
11932 if (maybe_gt (bitpos
+ bitsize
, GET_MODE_BITSIZE (mode2
)))
11933 must_force_mem
= true;
11935 /* Handle CONCAT first. */
11936 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
11938 if (known_eq (bitpos
, 0)
11939 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
11940 && COMPLEX_MODE_P (mode1
)
11941 && COMPLEX_MODE_P (GET_MODE (op0
))
11942 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
11943 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
11946 op0
= flip_storage_order (GET_MODE (op0
), op0
);
11947 if (mode1
!= GET_MODE (op0
))
11950 for (int i
= 0; i
< 2; i
++)
11952 rtx op
= read_complex_part (op0
, i
!= 0);
11953 if (GET_CODE (op
) == SUBREG
)
11954 op
= force_reg (GET_MODE (op
), op
);
11955 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
11960 if (!REG_P (op
) && !MEM_P (op
))
11961 op
= force_reg (GET_MODE (op
), op
);
11962 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
11966 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
11970 if (known_eq (bitpos
, 0)
11971 && known_eq (bitsize
,
11972 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
11973 && maybe_ne (bitsize
, 0))
11975 op0
= XEXP (op0
, 0);
11976 mode2
= GET_MODE (op0
);
11978 else if (known_eq (bitpos
,
11979 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
11980 && known_eq (bitsize
,
11981 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
11982 && maybe_ne (bitpos
, 0)
11983 && maybe_ne (bitsize
, 0))
11985 op0
= XEXP (op0
, 1);
11987 mode2
= GET_MODE (op0
);
11990 /* Otherwise force into memory. */
11991 must_force_mem
= true;
11994 /* If this is a constant, put it in a register if it is a legitimate
11995 constant and we don't need a memory reference. */
11996 if (CONSTANT_P (op0
)
11997 && mode2
!= BLKmode
11998 && targetm
.legitimate_constant_p (mode2
, op0
)
11999 && !must_force_mem
)
12000 op0
= force_reg (mode2
, op0
);
12002 /* Otherwise, if this is a constant, try to force it to the constant
12003 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
12004 is a legitimate constant. */
12005 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
12006 op0
= validize_mem (memloc
);
12008 /* Otherwise, if this is a constant or the object is not in memory
12009 and need be, put it there. */
12010 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
12012 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
12013 emit_move_insn (memloc
, op0
);
12015 clear_mem_expr
= true;
12020 machine_mode address_mode
;
12021 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
12024 gcc_assert (MEM_P (op0
));
12026 address_mode
= get_address_mode (op0
);
12027 if (GET_MODE (offset_rtx
) != address_mode
)
12029 /* We cannot be sure that the RTL in offset_rtx is valid outside
12030 of a memory address context, so force it into a register
12031 before attempting to convert it to the desired mode. */
12032 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
12033 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
12036 /* See the comment in expand_assignment for the rationale. */
12037 if (mode1
!= VOIDmode
12038 && maybe_ne (bitpos
, 0)
12039 && maybe_gt (bitsize
, 0)
12040 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
12041 && multiple_p (bitpos
, bitsize
)
12042 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
12043 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
12045 op0
= adjust_address (op0
, mode1
, bytepos
);
12049 op0
= offset_address (op0
, offset_rtx
,
12050 highest_pow2_factor (offset
));
12053 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
12054 record its alignment as BIGGEST_ALIGNMENT. */
12056 && known_eq (bitpos
, 0)
12058 && is_aligning_offset (offset
, tem
))
12059 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
12061 /* Don't forget about volatility even if this is a bitfield. */
12062 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
12064 if (op0
== orig_op0
)
12065 op0
= copy_rtx (op0
);
12067 MEM_VOLATILE_P (op0
) = 1;
12070 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
12072 if (op0
== orig_op0
)
12073 op0
= copy_rtx (op0
);
12075 set_mem_align (op0
, BITS_PER_UNIT
);
12078 /* In cases where an aligned union has an unaligned object
12079 as a field, we might be extracting a BLKmode value from
12080 an integer-mode (e.g., SImode) object. Handle this case
12081 by doing the extract into an object as wide as the field
12082 (which we know to be the width of a basic mode), then
12083 storing into memory, and changing the mode to BLKmode. */
12084 if (mode1
== VOIDmode
12085 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
12086 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
12087 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
12088 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
12089 && modifier
!= EXPAND_CONST_ADDRESS
12090 && modifier
!= EXPAND_INITIALIZER
12091 && modifier
!= EXPAND_MEMORY
)
12092 /* If the bitfield is volatile and the bitsize
12093 is narrower than the access size of the bitfield,
12094 we need to extract bitfields from the access. */
12095 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
12096 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
12097 && mode1
!= BLKmode
12098 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
12099 /* If the field isn't aligned enough to fetch as a memref,
12100 fetch it as a bit field. */
12101 || (mode1
!= BLKmode
12103 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
12104 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
12105 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
12106 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
12107 && modifier
!= EXPAND_MEMORY
12108 && ((modifier
== EXPAND_CONST_ADDRESS
12109 || modifier
== EXPAND_INITIALIZER
)
12111 : targetm
.slow_unaligned_access (mode1
,
12113 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
12114 /* If the type and the field are a constant size and the
12115 size of the type isn't the same size as the bitfield,
12116 we must use bitfield operations. */
12117 || (known_size_p (bitsize
)
12118 && TYPE_SIZE (TREE_TYPE (exp
))
12119 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
12120 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
12123 machine_mode ext_mode
= mode
;
12125 if (ext_mode
== BLKmode
12126 && ! (target
!= 0 && MEM_P (op0
)
12128 && multiple_p (bitpos
, BITS_PER_UNIT
)))
12129 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
12131 if (ext_mode
== BLKmode
)
12134 target
= assign_temp (type
, 1, 1);
12136 /* ??? Unlike the similar test a few lines below, this one is
12137 very likely obsolete. */
12138 if (known_eq (bitsize
, 0))
12141 /* In this case, BITPOS must start at a byte boundary and
12142 TARGET, if specified, must be a MEM. */
12143 gcc_assert (MEM_P (op0
)
12144 && (!target
|| MEM_P (target
)));
12146 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
12147 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
12148 emit_block_move (target
,
12149 adjust_address (op0
, VOIDmode
, bytepos
),
12150 gen_int_mode (bytesize
, Pmode
),
12151 (modifier
== EXPAND_STACK_PARM
12152 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
12157 /* If we have nothing to extract, the result will be 0 for targets
12158 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
12159 return 0 for the sake of consistency, as reading a zero-sized
12160 bitfield is valid in Ada and the value is fully specified. */
12161 if (known_eq (bitsize
, 0))
12164 op0
= validize_mem (op0
);
12166 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
12167 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
12169 /* If the result has aggregate type and the extraction is done in
12170 an integral mode, then the field may be not aligned on a byte
12171 boundary; in this case, if it has reverse storage order, it
12172 needs to be extracted as a scalar field with reverse storage
12173 order and put back into memory order afterwards. */
12174 if (AGGREGATE_TYPE_P (type
)
12175 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
12176 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
12178 gcc_checking_assert (known_ge (bitpos
, 0));
12179 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
12180 (modifier
== EXPAND_STACK_PARM
12181 ? NULL_RTX
: target
),
12182 ext_mode
, ext_mode
, reversep
, alt_rtl
);
12184 /* If the result has aggregate type and the mode of OP0 is an
12185 integral mode then, if BITSIZE is narrower than this mode
12186 and this is for big-endian data, we must put the field
12187 into the high-order bits. And we must also put it back
12188 into memory order if it has been previously reversed. */
12189 scalar_int_mode op0_mode
;
12190 if (AGGREGATE_TYPE_P (type
)
12191 && is_int_mode (GET_MODE (op0
), &op0_mode
))
12193 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
12195 gcc_checking_assert (known_le (bitsize
, size
));
12196 if (maybe_lt (bitsize
, size
)
12197 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
12198 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
12199 size
- bitsize
, op0
, 1);
12202 op0
= flip_storage_order (op0_mode
, op0
);
12205 /* If the result type is BLKmode, store the data into a temporary
12206 of the appropriate type, but with the mode corresponding to the
12207 mode for the data we have (op0's mode). */
12208 if (mode
== BLKmode
)
12211 = assign_stack_temp_for_type (ext_mode
,
12212 GET_MODE_BITSIZE (ext_mode
),
12214 emit_move_insn (new_rtx
, op0
);
12215 op0
= copy_rtx (new_rtx
);
12216 PUT_MODE (op0
, BLKmode
);
12222 /* If the result is BLKmode, use that to access the object
12224 if (mode
== BLKmode
)
12227 /* Get a reference to just this component. */
12228 bytepos
= bits_to_bytes_round_down (bitpos
);
12229 if (modifier
== EXPAND_CONST_ADDRESS
12230 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
12231 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
12233 op0
= adjust_address (op0
, mode1
, bytepos
);
12235 if (op0
== orig_op0
)
12236 op0
= copy_rtx (op0
);
12238 /* Don't set memory attributes if the base expression is
12239 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
12240 we should just honor its original memory attributes. */
12241 if (!(TREE_CODE (tem
) == SSA_NAME
12242 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
12243 set_mem_attributes (op0
, exp
, 0);
12245 if (REG_P (XEXP (op0
, 0)))
12246 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
12248 /* If op0 is a temporary because the original expressions was forced
12249 to memory, clear MEM_EXPR so that the original expression cannot
12250 be marked as addressable through MEM_EXPR of the temporary. */
12251 if (clear_mem_expr
)
12252 set_mem_expr (op0
, NULL_TREE
);
12254 MEM_VOLATILE_P (op0
) |= volatilep
;
12257 && modifier
!= EXPAND_MEMORY
12258 && modifier
!= EXPAND_WRITE
)
12259 op0
= flip_storage_order (mode1
, op0
);
12261 op0
= EXTEND_BITINT (op0
);
12263 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
12264 || modifier
== EXPAND_CONST_ADDRESS
12265 || modifier
== EXPAND_INITIALIZER
)
12269 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
12271 convert_move (target
, op0
, unsignedp
);
12276 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
12279 /* All valid uses of __builtin_va_arg_pack () are removed during
12281 if (CALL_EXPR_VA_ARG_PACK (exp
))
12282 error ("invalid use of %<__builtin_va_arg_pack ()%>");
12284 tree fndecl
= get_callee_fndecl (exp
), attr
;
12287 /* Don't diagnose the error attribute in thunks, those are
12288 artificially created. */
12289 && !CALL_FROM_THUNK_P (exp
)
12290 && (attr
= lookup_attribute ("error",
12291 DECL_ATTRIBUTES (fndecl
))) != NULL
)
12293 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
12294 error ("call to %qs declared with attribute error: %s",
12295 identifier_to_locale (ident
),
12296 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
12299 /* Don't diagnose the warning attribute in thunks, those are
12300 artificially created. */
12301 && !CALL_FROM_THUNK_P (exp
)
12302 && (attr
= lookup_attribute ("warning",
12303 DECL_ATTRIBUTES (fndecl
))) != NULL
)
12305 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
12306 warning_at (EXPR_LOCATION (exp
),
12307 OPT_Wattribute_warning
,
12308 "call to %qs declared with attribute warning: %s",
12309 identifier_to_locale (ident
),
12310 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
12313 /* Check for a built-in function. */
12314 if (fndecl
&& fndecl_built_in_p (fndecl
))
12316 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
12317 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
12320 return expand_call (exp
, target
, ignore
);
12322 case VIEW_CONVERT_EXPR
:
12325 /* If we are converting to BLKmode, try to avoid an intermediate
12326 temporary by fetching an inner memory reference. */
12327 if (mode
== BLKmode
12328 && poly_int_tree_p (TYPE_SIZE (type
))
12329 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
12330 && handled_component_p (treeop0
))
12332 machine_mode mode1
;
12333 poly_int64 bitsize
, bitpos
, bytepos
;
12335 int reversep
, volatilep
= 0;
12337 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
12338 &unsignedp
, &reversep
, &volatilep
);
12340 /* ??? We should work harder and deal with non-zero offsets. */
12342 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
12344 && known_size_p (bitsize
)
12345 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
12347 /* See the normal_inner_ref case for the rationale. */
12349 = expand_expr_real (tem
,
12350 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
12351 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
12353 && modifier
!= EXPAND_STACK_PARM
12354 ? target
: NULL_RTX
),
12356 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
12359 if (MEM_P (orig_op0
))
12363 /* Get a reference to just this component. */
12364 if (modifier
== EXPAND_CONST_ADDRESS
12365 || modifier
== EXPAND_SUM
12366 || modifier
== EXPAND_INITIALIZER
)
12367 op0
= adjust_address_nv (op0
, mode
, bytepos
);
12369 op0
= adjust_address (op0
, mode
, bytepos
);
12371 if (op0
== orig_op0
)
12372 op0
= copy_rtx (op0
);
12374 set_mem_attributes (op0
, treeop0
, 0);
12375 if (REG_P (XEXP (op0
, 0)))
12376 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
12378 MEM_VOLATILE_P (op0
) |= volatilep
;
12384 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
12385 NULL
, inner_reference_p
);
12387 /* If the input and output modes are both the same, we are done. */
12388 if (mode
== GET_MODE (op0
))
12390 /* If neither mode is BLKmode, and both modes are the same size
12391 then we can use gen_lowpart. */
12392 else if (mode
!= BLKmode
12393 && GET_MODE (op0
) != BLKmode
12394 && known_eq (GET_MODE_PRECISION (mode
),
12395 GET_MODE_PRECISION (GET_MODE (op0
)))
12396 && !COMPLEX_MODE_P (GET_MODE (op0
)))
12398 if (GET_CODE (op0
) == SUBREG
)
12399 op0
= force_reg (GET_MODE (op0
), op0
);
12400 temp
= gen_lowpart_common (mode
, op0
);
12405 if (!REG_P (op0
) && !MEM_P (op0
))
12406 op0
= force_reg (GET_MODE (op0
), op0
);
12407 op0
= gen_lowpart (mode
, op0
);
12410 /* If both types are integral, convert from one mode to the other. */
12411 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
12412 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
12413 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
12414 /* If the output type is a bit-field type, do an extraction. */
12415 else if (reduce_bit_field
)
12416 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
12417 TYPE_UNSIGNED (type
), NULL_RTX
,
12418 mode
, mode
, false, NULL
);
12419 /* As a last resort, spill op0 to memory, and reload it in a
12421 else if (!MEM_P (op0
))
12423 /* If the operand is not a MEM, force it into memory. Since we
12424 are going to be changing the mode of the MEM, don't call
12425 force_const_mem for constants because we don't allow pool
12426 constants to change mode. */
12427 tree inner_type
= TREE_TYPE (treeop0
);
12429 gcc_assert (!TREE_ADDRESSABLE (exp
));
12431 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
12433 = assign_stack_temp_for_type
12434 (TYPE_MODE (inner_type
),
12435 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
12437 emit_move_insn (target
, op0
);
12441 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
12442 output type is such that the operand is known to be aligned, indicate
12443 that it is. Otherwise, we need only be concerned about alignment for
12444 non-BLKmode results. */
12447 enum insn_code icode
;
12449 if (modifier
!= EXPAND_WRITE
12450 && modifier
!= EXPAND_MEMORY
12451 && !inner_reference_p
12453 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
12455 /* If the target does have special handling for unaligned
12456 loads of mode then use them. */
12457 if ((icode
= optab_handler (movmisalign_optab
, mode
))
12458 != CODE_FOR_nothing
)
12462 op0
= adjust_address (op0
, mode
, 0);
12463 /* We've already validated the memory, and we're creating a
12464 new pseudo destination. The predicates really can't
12466 reg
= gen_reg_rtx (mode
);
12468 /* Nor can the insn generator. */
12469 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
12473 else if (STRICT_ALIGNMENT
)
12475 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
12476 poly_uint64 temp_size
= mode_size
;
12477 if (GET_MODE (op0
) != BLKmode
)
12478 temp_size
= upper_bound (temp_size
,
12479 GET_MODE_SIZE (GET_MODE (op0
)));
12481 = assign_stack_temp_for_type (mode
, temp_size
, type
);
12482 rtx new_with_op0_mode
12483 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
12485 gcc_assert (!TREE_ADDRESSABLE (exp
));
12487 if (GET_MODE (op0
) == BLKmode
)
12489 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
12490 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
12491 (modifier
== EXPAND_STACK_PARM
12492 ? BLOCK_OP_CALL_PARM
12493 : BLOCK_OP_NORMAL
));
12496 emit_move_insn (new_with_op0_mode
, op0
);
12502 op0
= adjust_address (op0
, mode
, 0);
12509 tree lhs
= treeop0
;
12510 tree rhs
= treeop1
;
12511 gcc_assert (ignore
);
12513 /* Check for |= or &= of a bitfield of size one into another bitfield
12514 of size 1. In this case, (unless we need the result of the
12515 assignment) we can do this more efficiently with a
12516 test followed by an assignment, if necessary.
12518 ??? At this point, we can't get a BIT_FIELD_REF here. But if
12519 things change so we do, this code should be enhanced to
12521 if (TREE_CODE (lhs
) == COMPONENT_REF
12522 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
12523 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
12524 && TREE_OPERAND (rhs
, 0) == lhs
12525 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
12526 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
12527 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
12529 rtx_code_label
*label
= gen_label_rtx ();
12530 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
12531 profile_probability prob
= profile_probability::uninitialized ();
12533 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
12535 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
12536 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
12538 do_pending_stack_adjust ();
12539 emit_label (label
);
12543 expand_assignment (lhs
, rhs
, false);
12548 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
12550 case REALPART_EXPR
:
12551 op0
= expand_normal (treeop0
);
12552 return read_complex_part (op0
, false);
12554 case IMAGPART_EXPR
:
12555 op0
= expand_normal (treeop0
);
12556 return read_complex_part (op0
, true);
12563 /* Expanded in cfgexpand.cc. */
12564 gcc_unreachable ();
12566 case TRY_CATCH_EXPR
:
12568 case EH_FILTER_EXPR
:
12569 case TRY_FINALLY_EXPR
:
12571 /* Lowered by tree-eh.cc. */
12572 gcc_unreachable ();
12574 case WITH_CLEANUP_EXPR
:
12575 case CLEANUP_POINT_EXPR
:
12577 case CASE_LABEL_EXPR
:
12582 case COMPOUND_EXPR
:
12583 case PREINCREMENT_EXPR
:
12584 case PREDECREMENT_EXPR
:
12585 case POSTINCREMENT_EXPR
:
12586 case POSTDECREMENT_EXPR
:
12589 case COMPOUND_LITERAL_EXPR
:
12590 /* Lowered by gimplify.cc. */
12591 gcc_unreachable ();
12594 /* Function descriptors are not valid except for as
12595 initialization constants, and should not be expanded. */
12596 gcc_unreachable ();
12598 case WITH_SIZE_EXPR
:
12599 /* WITH_SIZE_EXPR expands to its first argument. The caller should
12600 have pulled out the size to use in whatever context it needed. */
12601 return expand_expr_real (treeop0
, original_target
, tmode
,
12602 modifier
, alt_rtl
, inner_reference_p
);
12605 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
12608 #undef EXTEND_BITINT
12610 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
12611 signedness of TYPE), possibly returning the result in TARGET.
12612 TYPE is known to be a partial integer type. */
12614 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
12616 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
12617 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
12618 gcc_assert ((GET_MODE (exp
) == VOIDmode
|| GET_MODE (exp
) == mode
)
12619 && (!target
|| GET_MODE (target
) == mode
));
12621 /* For constant values, reduce using wide_int_to_tree. */
12622 if (poly_int_rtx_p (exp
))
12624 auto value
= wi::to_poly_wide (exp
, mode
);
12625 tree t
= wide_int_to_tree (type
, value
);
12626 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
12628 else if (TYPE_UNSIGNED (type
))
12630 rtx mask
= immed_wide_int_const
12631 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
12632 return expand_and (mode
, exp
, mask
, target
);
12636 int count
= GET_MODE_PRECISION (mode
) - prec
;
12637 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
12638 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
12642 /* Subroutine of above: returns true if OFFSET corresponds to an offset that
12643 when applied to the address of EXP produces an address known to be
12644 aligned more than BIGGEST_ALIGNMENT. */
12647 is_aligning_offset (const_tree offset
, const_tree exp
)
12649 /* Strip off any conversions. */
12650 while (CONVERT_EXPR_P (offset
))
12651 offset
= TREE_OPERAND (offset
, 0);
12653 /* We must now have a BIT_AND_EXPR with a constant that is one less than
12654 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
12655 if (TREE_CODE (offset
) != BIT_AND_EXPR
12656 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
12657 || compare_tree_int (TREE_OPERAND (offset
, 1),
12658 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
12659 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
12662 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
12663 It must be NEGATE_EXPR. Then strip any more conversions. */
12664 offset
= TREE_OPERAND (offset
, 0);
12665 while (CONVERT_EXPR_P (offset
))
12666 offset
= TREE_OPERAND (offset
, 0);
12668 if (TREE_CODE (offset
) != NEGATE_EXPR
)
12671 offset
= TREE_OPERAND (offset
, 0);
12672 while (CONVERT_EXPR_P (offset
))
12673 offset
= TREE_OPERAND (offset
, 0);
12675 /* This must now be the address of EXP. */
12676 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
12679 /* Return a STRING_CST corresponding to ARG's constant initializer either
12680 if it's a string constant, or, when VALREP is set, any other constant,
12682 On success, set *PTR_OFFSET to the (possibly non-constant) byte offset
12683 within the byte string that ARG is references. If nonnull set *MEM_SIZE
12684 to the size of the byte string. If nonnull, set *DECL to the constant
12685 declaration ARG refers to. */
12688 constant_byte_string (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
,
12689 bool valrep
= false)
12691 tree dummy
= NULL_TREE
;
12695 /* Store the type of the original expression before conversions
12696 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
12698 tree argtype
= TREE_TYPE (arg
);
12703 /* Non-constant index into the character array in an ARRAY_REF
12704 expression or null. */
12705 tree varidx
= NULL_TREE
;
12707 poly_int64 base_off
= 0;
12709 if (TREE_CODE (arg
) == ADDR_EXPR
)
12711 arg
= TREE_OPERAND (arg
, 0);
12713 if (TREE_CODE (arg
) == ARRAY_REF
)
12715 tree idx
= TREE_OPERAND (arg
, 1);
12716 if (TREE_CODE (idx
) != INTEGER_CST
)
12718 /* From a pointer (but not array) argument extract the variable
12719 index to prevent get_addr_base_and_unit_offset() from failing
12720 due to it. Use it later to compute the non-constant offset
12721 into the string and return it to the caller. */
12723 ref
= TREE_OPERAND (arg
, 0);
12725 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
12728 if (!integer_zerop (array_ref_low_bound (arg
)))
12731 if (!integer_onep (array_ref_element_size (arg
)))
12735 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
12737 || (TREE_CODE (array
) != VAR_DECL
12738 && TREE_CODE (array
) != CONST_DECL
12739 && TREE_CODE (array
) != STRING_CST
))
12742 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
12744 tree arg0
= TREE_OPERAND (arg
, 0);
12745 tree arg1
= TREE_OPERAND (arg
, 1);
12748 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
12751 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
12757 /* Avoid pointers to arrays (see bug 86622). */
12758 if (POINTER_TYPE_P (TREE_TYPE (arg
))
12759 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
12760 && !(decl
&& !*decl
)
12761 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
12762 && tree_fits_uhwi_p (*mem_size
)
12763 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
12766 tree type
= TREE_TYPE (offset
);
12767 arg1
= fold_convert (type
, arg1
);
12768 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
12773 else if (TREE_CODE (arg
) == SSA_NAME
)
12775 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
12776 if (!is_gimple_assign (stmt
))
12779 tree rhs1
= gimple_assign_rhs1 (stmt
);
12780 tree_code code
= gimple_assign_rhs_code (stmt
);
12781 if (code
== ADDR_EXPR
)
12782 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
12783 else if (code
!= POINTER_PLUS_EXPR
)
12787 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
12789 /* Avoid pointers to arrays (see bug 86622). */
12790 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
12791 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
12792 && !(decl
&& !*decl
)
12793 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
12794 && tree_fits_uhwi_p (*mem_size
)
12795 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
12798 tree rhs2
= gimple_assign_rhs2 (stmt
);
12799 tree type
= TREE_TYPE (offset
);
12800 rhs2
= fold_convert (type
, rhs2
);
12801 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
12806 else if (DECL_P (arg
))
12811 tree offset
= wide_int_to_tree (sizetype
, base_off
);
12814 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
12817 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
12818 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
12819 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
12822 offset
= fold_convert (sizetype
, varidx
);
12825 if (TREE_CODE (array
) == STRING_CST
)
12827 *ptr_offset
= fold_convert (sizetype
, offset
);
12828 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
12831 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
12832 >= TREE_STRING_LENGTH (array
));
12836 tree init
= ctor_for_folding (array
);
12837 if (!init
|| init
== error_mark_node
)
12842 HOST_WIDE_INT cstoff
;
12843 if (!base_off
.is_constant (&cstoff
))
12846 /* Check that the host and target are sane. */
12847 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
12850 HOST_WIDE_INT typesz
= int_size_in_bytes (TREE_TYPE (init
));
12851 if (typesz
<= 0 || (int) typesz
!= typesz
)
12854 HOST_WIDE_INT size
= typesz
;
12856 && DECL_SIZE_UNIT (array
)
12857 && tree_fits_shwi_p (DECL_SIZE_UNIT (array
)))
12859 size
= tree_to_shwi (DECL_SIZE_UNIT (array
));
12860 gcc_checking_assert (size
>= typesz
);
12863 /* If value representation was requested convert the initializer
12864 for the whole array or object into a string of bytes forming
12865 its value representation and return it. */
12866 unsigned char *bytes
= XNEWVEC (unsigned char, size
);
12867 int r
= native_encode_initializer (init
, bytes
, size
);
12870 XDELETEVEC (bytes
);
12875 memset (bytes
+ r
, '\0', size
- r
);
12877 const char *p
= reinterpret_cast<const char *>(bytes
);
12878 init
= build_string_literal (size
, p
, char_type_node
);
12879 init
= TREE_OPERAND (init
, 0);
12880 init
= TREE_OPERAND (init
, 0);
12883 *mem_size
= size_int (TREE_STRING_LENGTH (init
));
12884 *ptr_offset
= wide_int_to_tree (ssizetype
, base_off
);
12892 if (TREE_CODE (init
) == CONSTRUCTOR
)
12894 /* Convert the 64-bit constant offset to a wider type to avoid
12895 overflow and use it to obtain the initializer for the subobject
12898 if (!base_off
.is_constant (&wioff
))
12901 wioff
*= BITS_PER_UNIT
;
12902 if (!wi::fits_uhwi_p (wioff
))
12905 base_off
= wioff
.to_uhwi ();
12906 unsigned HOST_WIDE_INT fieldoff
= 0;
12907 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
12909 if (!init
|| init
== error_mark_node
)
12912 HOST_WIDE_INT cstoff
;
12913 if (!base_off
.is_constant (&cstoff
))
12916 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
12917 tree off
= build_int_cst (sizetype
, cstoff
);
12919 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
12924 *ptr_offset
= offset
;
12926 tree inittype
= TREE_TYPE (init
);
12928 if (TREE_CODE (init
) == INTEGER_CST
12929 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
12930 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
12932 /* Check that the host and target are sane. */
12933 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
12936 /* For a reference to (address of) a single constant character,
12937 store the native representation of the character in CHARBUF.
12938 If the reference is to an element of an array or a member
12939 of a struct, only consider narrow characters until ctors
12940 for wide character arrays are transformed to STRING_CSTs
12941 like those for narrow arrays. */
12942 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
12943 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
12946 /* Construct a string literal with elements of INITTYPE and
12947 the representation above. Then strip
12948 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
12949 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
12950 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
12954 tree initsize
= TYPE_SIZE_UNIT (inittype
);
12956 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
12958 /* Fold an empty/zero constructor for an implicitly initialized
12959 object or subobject into the empty string. */
12961 /* Determine the character type from that of the original
12963 tree chartype
= argtype
;
12964 if (POINTER_TYPE_P (chartype
))
12965 chartype
= TREE_TYPE (chartype
);
12966 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
12967 chartype
= TREE_TYPE (chartype
);
12969 if (INTEGRAL_TYPE_P (chartype
)
12970 && TYPE_PRECISION (chartype
) == TYPE_PRECISION (char_type_node
))
12972 /* Convert a char array to an empty STRING_CST having an array
12973 of the expected type and size. */
12975 initsize
= integer_zero_node
;
12977 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
12978 if (size
> (unsigned HOST_WIDE_INT
) INT_MAX
)
12981 init
= build_string_literal (size
, NULL
, chartype
, size
);
12982 init
= TREE_OPERAND (init
, 0);
12983 init
= TREE_OPERAND (init
, 0);
12985 *ptr_offset
= integer_zero_node
;
12992 if (TREE_CODE (init
) != STRING_CST
)
12995 *mem_size
= initsize
;
12997 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
13002 /* Return STRING_CST if an ARG corresponds to a string constant or zero
13003 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
13004 non-constant) offset in bytes within the string that ARG is accessing.
13005 If MEM_SIZE is non-zero the storage size of the memory is returned.
13006 If DECL is non-zero the constant declaration is returned if available. */
13009 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
13011 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, false);
13014 /* Similar to string_constant, return a STRING_CST corresponding
13015 to the value representation of the first argument if it's
13019 byte_representation (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
13021 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, true);
13024 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
13025 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
13026 for C2 > 0 to x & C3 == C2
13027 for C2 < 0 to x & C3 == (C2 & C3). */
13029 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
13031 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
13032 tree treeop0
= gimple_assign_rhs1 (stmt
);
13033 tree treeop1
= gimple_assign_rhs2 (stmt
);
13034 tree type
= TREE_TYPE (*arg0
);
13035 scalar_int_mode mode
;
13036 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
13038 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
13039 || TYPE_PRECISION (type
) <= 1
13040 || TYPE_UNSIGNED (type
)
13041 /* Signed x % c == 0 should have been optimized into unsigned modulo
13043 || integer_zerop (*arg1
)
13044 /* If c is known to be non-negative, modulo will be expanded as unsigned
13046 || get_range_pos_neg (treeop0
) == 1)
13049 /* x % c == d where d < 0 && d <= -c should be always false. */
13050 if (tree_int_cst_sgn (*arg1
) == -1
13051 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
13054 int prec
= TYPE_PRECISION (type
);
13055 wide_int w
= wi::to_wide (treeop1
) - 1;
13056 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
13057 tree c3
= wide_int_to_tree (type
, w
);
13059 if (tree_int_cst_sgn (*arg1
) == -1)
13060 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
13062 rtx op0
= expand_normal (treeop0
);
13063 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
13065 bool speed_p
= optimize_insn_for_speed_p ();
13067 do_pending_stack_adjust ();
13069 location_t loc
= gimple_location (stmt
);
13070 struct separate_ops ops
;
13071 ops
.code
= TRUNC_MOD_EXPR
;
13072 ops
.location
= loc
;
13073 ops
.type
= TREE_TYPE (treeop0
);
13076 ops
.op2
= NULL_TREE
;
13078 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
13080 rtx_insn
*moinsns
= get_insns ();
13083 unsigned mocost
= seq_cost (moinsns
, speed_p
);
13084 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
13085 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
13087 ops
.code
= BIT_AND_EXPR
;
13088 ops
.location
= loc
;
13089 ops
.type
= TREE_TYPE (treeop0
);
13092 ops
.op2
= NULL_TREE
;
13094 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
13096 rtx_insn
*muinsns
= get_insns ();
13099 unsigned mucost
= seq_cost (muinsns
, speed_p
);
13100 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
13101 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
13103 if (mocost
<= mucost
)
13105 emit_insn (moinsns
);
13106 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
13110 emit_insn (muinsns
);
13111 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
13116 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
13118 (X - C2) * C3 <= C4 (or >), where
13119 C3 is modular multiplicative inverse of C1 and 1<<prec and
13120 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
13121 if C2 > ((1<<prec) - 1) % C1).
13122 If C1 is even, S = ctz (C1) and C2 is 0, use
13123 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
13124 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
13126 For signed (X % C1) == 0 if C1 is odd to (all operations in it
13128 (X * C3) + C4 <= 2 * C4, where
13129 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
13130 C4 is ((1<<(prec - 1) - 1) / C1).
13131 If C1 is even, S = ctz(C1), use
13132 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
13133 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
13134 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
13136 See the Hacker's Delight book, section 10-17. */
13138 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
13140 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
13141 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
13146 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
13150 tree treeop0
= gimple_assign_rhs1 (stmt
);
13151 tree treeop1
= gimple_assign_rhs2 (stmt
);
13152 if (TREE_CODE (treeop0
) != SSA_NAME
13153 || TREE_CODE (treeop1
) != INTEGER_CST
13154 /* Don't optimize the undefined behavior case x % 0;
13155 x % 1 should have been optimized into zero, punt if
13156 it makes it here for whatever reason;
13157 x % -c should have been optimized into x % c. */
13158 || compare_tree_int (treeop1
, 2) <= 0
13159 /* Likewise x % c == d where d >= c should be always false. */
13160 || tree_int_cst_le (treeop1
, *arg1
))
13163 /* Unsigned x % pow2 is handled right already, for signed
13164 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
13165 if (integer_pow2p (treeop1
))
13166 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
13168 tree type
= TREE_TYPE (*arg0
);
13169 scalar_int_mode mode
;
13170 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
13172 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
13173 || TYPE_PRECISION (type
) <= 1)
13176 signop sgn
= UNSIGNED
;
13177 /* If both operands are known to have the sign bit clear, handle
13178 even the signed modulo case as unsigned. treeop1 is always
13179 positive >= 2, checked above. */
13180 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
13183 if (!TYPE_UNSIGNED (type
))
13185 if (tree_int_cst_sgn (*arg1
) == -1)
13187 type
= unsigned_type_for (type
);
13188 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
13192 int prec
= TYPE_PRECISION (type
);
13193 wide_int w
= wi::to_wide (treeop1
);
13194 int shift
= wi::ctz (w
);
13195 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
13196 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
13197 If C1 is odd, we can handle all cases by subtracting
13198 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
13199 e.g. by testing for overflow on the subtraction, punt on that for now
13201 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
13205 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
13206 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
13210 imm_use_iterator imm_iter
;
13211 use_operand_p use_p
;
13212 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
13214 gimple
*use_stmt
= USE_STMT (use_p
);
13215 /* Punt if treeop0 is used in the same bb in a division
13216 or another modulo with the same divisor. We should expect
13217 the division and modulo combined together. */
13218 if (use_stmt
== stmt
13219 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
13221 if (!is_gimple_assign (use_stmt
)
13222 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
13223 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
13225 if (gimple_assign_rhs1 (use_stmt
) != treeop0
13226 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
13231 w
= wi::lrshift (w
, shift
);
13232 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
13233 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
13234 wide_int m
= wide_int::from (wi::mod_inv (a
, b
), prec
, UNSIGNED
);
13235 tree c3
= wide_int_to_tree (type
, m
);
13236 tree c5
= NULL_TREE
;
13238 if (sgn
== UNSIGNED
)
13240 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
13241 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
13242 otherwise use < or subtract one from C4. E.g. for
13243 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
13244 x % 3U == 1 already needs to be
13245 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
13246 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
13249 d
= wi::lrshift (d
, shift
);
13253 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
13255 d
= wi::lshift (e
, 1);
13258 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
13259 d
= wi::lrshift (e
, shift
- 1);
13261 c5
= wide_int_to_tree (type
, e
);
13263 tree c4
= wide_int_to_tree (type
, d
);
13265 rtx op0
= expand_normal (treeop0
);
13266 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
13268 bool speed_p
= optimize_insn_for_speed_p ();
13270 do_pending_stack_adjust ();
13272 location_t loc
= gimple_location (stmt
);
13273 struct separate_ops ops
;
13274 ops
.code
= TRUNC_MOD_EXPR
;
13275 ops
.location
= loc
;
13276 ops
.type
= TREE_TYPE (treeop0
);
13279 ops
.op2
= NULL_TREE
;
13281 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
13283 rtx_insn
*moinsns
= get_insns ();
13286 unsigned mocost
= seq_cost (moinsns
, speed_p
);
13287 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
13288 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
13290 tree t
= fold_convert_loc (loc
, type
, treeop0
);
13291 if (!integer_zerop (*arg1
))
13292 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
13293 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
13295 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
13298 tree s
= build_int_cst (NULL_TREE
, shift
);
13299 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
13303 rtx mur
= expand_normal (t
);
13304 rtx_insn
*muinsns
= get_insns ();
13307 unsigned mucost
= seq_cost (muinsns
, speed_p
);
13308 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
13309 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
13311 if (mocost
<= mucost
)
13313 emit_insn (moinsns
);
13314 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
13318 emit_insn (muinsns
);
13319 *arg0
= make_tree (type
, mur
);
13321 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
13324 /* Optimize x - y < 0 into x < 0 if x - y has undefined overflow. */
13327 maybe_optimize_sub_cmp_0 (enum tree_code code
, tree
*arg0
, tree
*arg1
)
13329 gcc_checking_assert (code
== GT_EXPR
|| code
== GE_EXPR
13330 || code
== LT_EXPR
|| code
== LE_EXPR
);
13331 gcc_checking_assert (integer_zerop (*arg1
));
13336 gimple
*stmt
= get_def_for_expr (*arg0
, MINUS_EXPR
);
13340 tree treeop0
= gimple_assign_rhs1 (stmt
);
13341 tree treeop1
= gimple_assign_rhs2 (stmt
);
13342 if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (treeop0
)))
13345 if (issue_strict_overflow_warning (WARN_STRICT_OVERFLOW_COMPARISON
))
13346 warning_at (gimple_location (stmt
), OPT_Wstrict_overflow
,
13347 "assuming signed overflow does not occur when "
13348 "simplifying %<X - Y %s 0%> to %<X %s Y%>",
13349 op_symbol_code (code
), op_symbol_code (code
));
13356 /* Expand CODE with arguments INNER & (1<<BITNUM) and 0 that represents
13357 a single bit equality/inequality test, returns where the result is located. */
13360 expand_single_bit_test (location_t loc
, enum tree_code code
,
13361 tree inner
, int bitnum
,
13362 tree result_type
, rtx target
,
13365 gcc_assert (code
== NE_EXPR
|| code
== EQ_EXPR
);
13367 tree type
= TREE_TYPE (inner
);
13368 scalar_int_mode operand_mode
= SCALAR_INT_TYPE_MODE (type
);
13370 tree signed_type
, unsigned_type
, intermediate_type
;
13373 /* First, see if we can fold the single bit test into a sign-bit
13375 if (bitnum
== TYPE_PRECISION (type
) - 1
13376 && type_has_mode_precision_p (type
))
13378 tree stype
= signed_type_for (type
);
13379 tree tmp
= fold_build2_loc (loc
, code
== EQ_EXPR
? GE_EXPR
: LT_EXPR
,
13381 fold_convert_loc (loc
, stype
, inner
),
13382 build_int_cst (stype
, 0));
13383 return expand_expr (tmp
, target
, VOIDmode
, EXPAND_NORMAL
);
13386 /* Otherwise we have (A & C) != 0 where C is a single bit,
13387 convert that into ((A >> C2) & 1). Where C2 = log2(C).
13388 Similarly for (A & C) == 0. */
13390 /* If INNER is a right shift of a constant and it plus BITNUM does
13391 not overflow, adjust BITNUM and INNER. */
13392 if ((inner_def
= get_def_for_expr (inner
, RSHIFT_EXPR
))
13393 && TREE_CODE (gimple_assign_rhs2 (inner_def
)) == INTEGER_CST
13394 && bitnum
< TYPE_PRECISION (type
)
13395 && wi::ltu_p (wi::to_wide (gimple_assign_rhs2 (inner_def
)),
13396 TYPE_PRECISION (type
) - bitnum
))
13398 bitnum
+= tree_to_uhwi (gimple_assign_rhs2 (inner_def
));
13399 inner
= gimple_assign_rhs1 (inner_def
);
13402 /* If we are going to be able to omit the AND below, we must do our
13403 operations as unsigned. If we must use the AND, we have a choice.
13404 Normally unsigned is faster, but for some machines signed is. */
13405 ops_unsigned
= (load_extend_op (operand_mode
) == SIGN_EXTEND
13406 && !flag_syntax_only
) ? 0 : 1;
13408 signed_type
= lang_hooks
.types
.type_for_mode (operand_mode
, 0);
13409 unsigned_type
= lang_hooks
.types
.type_for_mode (operand_mode
, 1);
13410 intermediate_type
= ops_unsigned
? unsigned_type
: signed_type
;
13411 inner
= fold_convert_loc (loc
, intermediate_type
, inner
);
13413 rtx inner0
= expand_expr (inner
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
13415 if (CONST_SCALAR_INT_P (inner0
))
13417 wide_int t
= rtx_mode_t (inner0
, operand_mode
);
13418 bool setp
= (wi::lrshift (t
, bitnum
) & 1) != 0;
13419 return (setp
^ (code
== EQ_EXPR
)) ? const1_rtx
: const0_rtx
;
13421 int bitpos
= bitnum
;
13423 if (BYTES_BIG_ENDIAN
)
13424 bitpos
= GET_MODE_BITSIZE (operand_mode
) - 1 - bitpos
;
13426 inner0
= extract_bit_field (inner0
, 1, bitpos
, 1, target
,
13427 operand_mode
, mode
, 0, NULL
);
13429 if (code
== EQ_EXPR
)
13430 inner0
= expand_binop (GET_MODE (inner0
), xor_optab
, inner0
, const1_rtx
,
13431 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
13432 if (GET_MODE (inner0
) != mode
)
13434 rtx t
= gen_reg_rtx (mode
);
13435 convert_move (t
, inner0
, 0);
13441 /* Generate code to calculate OPS, and exploded expression
13442 using a store-flag instruction and return an rtx for the result.
13443 OPS reflects a comparison.
13445 If TARGET is nonzero, store the result there if convenient.
13447 Return zero if there is no suitable set-flag instruction
13448 available on this machine.
13450 Once expand_expr has been called on the arguments of the comparison,
13451 we are committed to doing the store flag, since it is not safe to
13452 re-evaluate the expression. We emit the store-flag insn by calling
13453 emit_store_flag, but only expand the arguments if we have a reason
13454 to believe that emit_store_flag will be successful. If we think that
13455 it will, but it isn't, we have to simulate the store-flag with a
13456 set/jump/set sequence. */
13459 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
13461 enum rtx_code code
;
13462 tree arg0
, arg1
, type
;
13463 machine_mode operand_mode
;
13466 rtx subtarget
= target
;
13467 location_t loc
= ops
->location
;
13472 /* Don't crash if the comparison was erroneous. */
13473 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
13476 type
= TREE_TYPE (arg0
);
13477 operand_mode
= TYPE_MODE (type
);
13478 unsignedp
= TYPE_UNSIGNED (type
);
13480 /* We won't bother with BLKmode store-flag operations because it would mean
13481 passing a lot of information to emit_store_flag. */
13482 if (operand_mode
== BLKmode
)
13485 /* We won't bother with store-flag operations involving function pointers
13486 when function pointers must be canonicalized before comparisons. */
13487 if (targetm
.have_canonicalize_funcptr_for_compare ()
13488 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
13489 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
13490 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
13491 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
13497 /* For vector typed comparisons emit code to generate the desired
13498 all-ones or all-zeros mask. */
13499 if (VECTOR_TYPE_P (ops
->type
))
13501 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
13502 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
13503 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
13504 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
13506 gcc_unreachable ();
13509 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
13510 into (x - C2) * C3 < C4. */
13511 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
13512 && TREE_CODE (arg0
) == SSA_NAME
13513 && TREE_CODE (arg1
) == INTEGER_CST
)
13515 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
13517 if (new_code
!= ops
->code
)
13519 struct separate_ops nops
= *ops
;
13520 nops
.code
= ops
->code
= new_code
;
13523 nops
.type
= TREE_TYPE (arg0
);
13524 return do_store_flag (&nops
, target
, mode
);
13528 /* Optimize (x - y) < 0 into x < y if x - y has undefined overflow. */
13530 && (ops
->code
== LT_EXPR
|| ops
->code
== LE_EXPR
13531 || ops
->code
== GT_EXPR
|| ops
->code
== GE_EXPR
)
13532 && integer_zerop (arg1
)
13533 && TREE_CODE (arg0
) == SSA_NAME
)
13534 maybe_optimize_sub_cmp_0 (ops
->code
, &arg0
, &arg1
);
13536 /* Get the rtx comparison code to use. We know that EXP is a comparison
13537 operation of some type. Some comparisons against 1 and -1 can be
13538 converted to comparisons with zero. Do so here so that the tests
13539 below will be aware that we have a comparison with zero. These
13540 tests will not catch constants in the first operand, but constants
13541 are rarely passed as the first operand. */
13552 if (integer_onep (arg1
))
13553 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
13555 code
= unsignedp
? LTU
: LT
;
13558 if (! unsignedp
&& integer_all_onesp (arg1
))
13559 arg1
= integer_zero_node
, code
= LT
;
13561 code
= unsignedp
? LEU
: LE
;
13564 if (! unsignedp
&& integer_all_onesp (arg1
))
13565 arg1
= integer_zero_node
, code
= GE
;
13567 code
= unsignedp
? GTU
: GT
;
13570 if (integer_onep (arg1
))
13571 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
13573 code
= unsignedp
? GEU
: GE
;
13576 case UNORDERED_EXPR
:
13602 gcc_unreachable ();
13605 /* Put a constant second. */
13606 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
13607 || TREE_CODE (arg0
) == FIXED_CST
)
13609 std::swap (arg0
, arg1
);
13610 code
= swap_condition (code
);
13613 /* If this is an equality or inequality test of a single bit, we can
13614 do this by shifting the bit being tested to the low-order bit and
13615 masking the result with the constant 1. If the condition was EQ,
13616 we xor it with 1. This does not require an scc insn and is faster
13617 than an scc insn even if we have it. */
13619 if ((code
== NE
|| code
== EQ
)
13620 && (integer_zerop (arg1
)
13621 || integer_pow2p (arg1
))
13622 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
13625 wide_int nz
= tree_nonzero_bits (narg0
);
13626 gimple
*srcstmt
= get_def_for_expr (narg0
, BIT_AND_EXPR
);
13627 /* If the defining statement was (x & POW2), then use that instead of
13628 the non-zero bits. */
13629 if (srcstmt
&& integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
13631 nz
= wi::to_wide (gimple_assign_rhs2 (srcstmt
));
13632 narg0
= gimple_assign_rhs1 (srcstmt
);
13635 if (wi::popcount (nz
) == 1
13636 && (integer_zerop (arg1
)
13637 || wi::to_wide (arg1
) == nz
))
13639 int bitnum
= wi::exact_log2 (nz
);
13640 enum tree_code tcode
= EQ_EXPR
;
13641 if ((code
== NE
) ^ !integer_zerop (arg1
))
13644 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
13645 return expand_single_bit_test (loc
, tcode
,
13647 bitnum
, type
, target
, mode
);
13652 if (! get_subtarget (target
)
13653 || GET_MODE (subtarget
) != operand_mode
)
13656 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
13659 target
= gen_reg_rtx (mode
);
13661 /* Try a cstore if possible. */
13662 return emit_store_flag_force (target
, code
, op0
, op1
,
13663 operand_mode
, unsignedp
,
13664 (TYPE_PRECISION (ops
->type
) == 1
13665 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
13668 /* Attempt to generate a casesi instruction. Returns true if successful,
13669 false otherwise (i.e. if there is no casesi instruction).
13671 DEFAULT_PROBABILITY is the probability of jumping to the default
13674 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
13675 rtx table_label
, rtx default_label
, rtx fallback_label
,
13676 profile_probability default_probability
)
13678 class expand_operand ops
[5];
13679 scalar_int_mode index_mode
= SImode
;
13680 rtx op1
, op2
, index
;
13682 if (! targetm
.have_casesi ())
13685 /* The index must be some form of integer. Convert it to SImode. */
13686 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
13687 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
13689 rtx rangertx
= expand_normal (range
);
13691 /* We must handle the endpoints in the original mode. */
13692 index_expr
= build2 (MINUS_EXPR
, index_type
,
13693 index_expr
, minval
);
13694 minval
= integer_zero_node
;
13695 index
= expand_normal (index_expr
);
13697 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
13698 omode
, 1, default_label
,
13699 default_probability
);
13700 /* Now we can safely truncate. */
13701 index
= convert_to_mode (index_mode
, index
, 0);
13705 if (omode
!= index_mode
)
13707 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
13708 index_expr
= fold_convert (index_type
, index_expr
);
13711 index
= expand_normal (index_expr
);
13714 do_pending_stack_adjust ();
13716 op1
= expand_normal (minval
);
13717 op2
= expand_normal (range
);
13719 create_input_operand (&ops
[0], index
, index_mode
);
13720 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
13721 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
13722 create_fixed_operand (&ops
[3], table_label
);
13723 create_fixed_operand (&ops
[4], (default_label
13725 : fallback_label
));
13726 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
13730 /* Attempt to generate a tablejump instruction; same concept. */
13731 /* Subroutine of the next function.
13733 INDEX is the value being switched on, with the lowest value
13734 in the table already subtracted.
13735 MODE is its expected mode (needed if INDEX is constant).
13736 RANGE is the length of the jump table.
13737 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
13739 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
13740 index value is out of range.
13741 DEFAULT_PROBABILITY is the probability of jumping to
13742 the default label. */
13745 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
13746 rtx default_label
, profile_probability default_probability
)
13750 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
13751 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
13753 /* Do an unsigned comparison (in the proper mode) between the index
13754 expression and the value which represents the length of the range.
13755 Since we just finished subtracting the lower bound of the range
13756 from the index expression, this comparison allows us to simultaneously
13757 check that the original index expression value is both greater than
13758 or equal to the minimum value of the range and less than or equal to
13759 the maximum value of the range. */
13762 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
13763 default_label
, default_probability
);
13765 /* If index is in range, it must fit in Pmode.
13766 Convert to Pmode so we can index with it. */
13769 unsigned int width
;
13771 /* We know the value of INDEX is between 0 and RANGE. If we have a
13772 sign-extended subreg, and RANGE does not have the sign bit set, then
13773 we have a value that is valid for both sign and zero extension. In
13774 this case, we get better code if we sign extend. */
13775 if (GET_CODE (index
) == SUBREG
13776 && SUBREG_PROMOTED_VAR_P (index
)
13777 && SUBREG_PROMOTED_SIGNED_P (index
)
13778 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
13779 <= HOST_BITS_PER_WIDE_INT
)
13780 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
13781 index
= convert_to_mode (Pmode
, index
, 0);
13783 index
= convert_to_mode (Pmode
, index
, 1);
13786 /* Don't let a MEM slip through, because then INDEX that comes
13787 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
13788 and break_out_memory_refs will go to work on it and mess it up. */
13789 #ifdef PIC_CASE_VECTOR_ADDRESS
13790 if (flag_pic
&& !REG_P (index
))
13791 index
= copy_to_mode_reg (Pmode
, index
);
13794 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
13795 GET_MODE_SIZE, because this indicates how large insns are. The other
13796 uses should all be Pmode, because they are addresses. This code
13797 could fail if addresses and insns are not the same size. */
13798 index
= simplify_gen_binary (MULT
, Pmode
, index
,
13799 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
13801 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
13802 gen_rtx_LABEL_REF (Pmode
, table_label
));
13804 #ifdef PIC_CASE_VECTOR_ADDRESS
13806 index
= PIC_CASE_VECTOR_ADDRESS (index
);
13809 index
= memory_address (CASE_VECTOR_MODE
, index
);
13810 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
13811 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
13812 convert_move (temp
, vector
, 0);
13814 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
13816 /* If we are generating PIC code or if the table is PC-relative, the
13817 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
13818 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
13823 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
13824 rtx table_label
, rtx default_label
,
13825 profile_probability default_probability
)
13829 if (! targetm
.have_tablejump ())
13832 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
13833 fold_convert (index_type
, index_expr
),
13834 fold_convert (index_type
, minval
));
13835 index
= expand_normal (index_expr
);
13836 do_pending_stack_adjust ();
13838 do_tablejump (index
, TYPE_MODE (index_type
),
13839 convert_modes (TYPE_MODE (index_type
),
13840 TYPE_MODE (TREE_TYPE (range
)),
13841 expand_normal (range
),
13842 TYPE_UNSIGNED (TREE_TYPE (range
))),
13843 table_label
, default_label
, default_probability
);
13847 /* Return a CONST_VECTOR rtx representing vector mask for
13848 a VECTOR_CST of booleans. */
13850 const_vector_mask_from_tree (tree exp
)
13852 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
13853 machine_mode inner
= GET_MODE_INNER (mode
);
13855 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
13856 VECTOR_CST_NELTS_PER_PATTERN (exp
));
13857 unsigned int count
= builder
.encoded_nelts ();
13858 for (unsigned int i
= 0; i
< count
; ++i
)
13860 tree elt
= VECTOR_CST_ELT (exp
, i
);
13861 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
13862 if (integer_zerop (elt
))
13863 builder
.quick_push (CONST0_RTX (inner
));
13864 else if (integer_onep (elt
)
13865 || integer_minus_onep (elt
))
13866 builder
.quick_push (CONSTM1_RTX (inner
));
13868 gcc_unreachable ();
13870 return builder
.build ();
13873 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
13875 const_vector_from_tree (tree exp
)
13877 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
13879 if (initializer_zerop (exp
))
13880 return CONST0_RTX (mode
);
13882 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
13883 return const_vector_mask_from_tree (exp
);
13885 machine_mode inner
= GET_MODE_INNER (mode
);
13887 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
13888 VECTOR_CST_NELTS_PER_PATTERN (exp
));
13889 unsigned int count
= builder
.encoded_nelts ();
13890 for (unsigned int i
= 0; i
< count
; ++i
)
13892 tree elt
= VECTOR_CST_ELT (exp
, i
);
13893 if (TREE_CODE (elt
) == REAL_CST
)
13894 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
13896 else if (TREE_CODE (elt
) == FIXED_CST
)
13897 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
13900 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
13903 return builder
.build ();
13906 /* Build a decl for a personality function given a language prefix. */
13909 build_personality_function (const char *lang
)
13911 const char *unwind_and_version
;
13915 switch (targetm_common
.except_unwind_info (&global_options
))
13920 unwind_and_version
= "_sj0";
13924 unwind_and_version
= "_v0";
13927 unwind_and_version
= "_seh0";
13930 gcc_unreachable ();
13933 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
13935 type
= build_function_type_list (unsigned_type_node
,
13936 integer_type_node
, integer_type_node
,
13937 long_long_unsigned_type_node
,
13938 ptr_type_node
, ptr_type_node
, NULL_TREE
);
13939 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
13940 get_identifier (name
), type
);
13941 DECL_ARTIFICIAL (decl
) = 1;
13942 DECL_EXTERNAL (decl
) = 1;
13943 TREE_PUBLIC (decl
) = 1;
13945 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
13946 are the flags assigned by targetm.encode_section_info. */
13947 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
13952 /* Extracts the personality function of DECL and returns the corresponding
13956 get_personality_function (tree decl
)
13958 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
13959 enum eh_personality_kind pk
;
13961 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
13962 if (pk
== eh_personality_none
)
13966 && pk
== eh_personality_any
)
13967 personality
= lang_hooks
.eh_personality ();
13969 if (pk
== eh_personality_lang
)
13970 gcc_assert (personality
!= NULL_TREE
);
13972 return XEXP (DECL_RTL (personality
), 0);
13975 /* Returns a tree for the size of EXP in bytes. */
13978 tree_expr_size (const_tree exp
)
13981 && DECL_SIZE_UNIT (exp
) != 0)
13982 return DECL_SIZE_UNIT (exp
);
13984 return size_in_bytes (TREE_TYPE (exp
));
13987 /* Return an rtx for the size in bytes of the value of EXP. */
13990 expr_size (tree exp
)
13994 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
13995 size
= TREE_OPERAND (exp
, 1);
13998 size
= tree_expr_size (exp
);
14000 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
14003 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
14006 /* Return a wide integer for the size in bytes of the value of EXP, or -1
14007 if the size can vary or is larger than an integer. */
14010 int_expr_size (const_tree exp
)
14014 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
14015 size
= TREE_OPERAND (exp
, 1);
14018 size
= tree_expr_size (exp
);
14022 if (size
== 0 || !tree_fits_shwi_p (size
))
14025 return tree_to_shwi (size
);