1 2023-12-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4 * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Tweak LMUL estimation.
5 (has_unexpected_spills_p): Ditto.
6 (costs::record_potential_unexpected_spills): Ditto.
8 2023-12-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10 * config/riscv/riscv-vector-costs.cc (compute_estimated_lmul): Allow
12 (preferred_new_lmul_p): Move RVV V_REGS liveness computation into analyze_loop_vinfo.
13 (has_unexpected_spills_p): New function.
14 (costs::record_potential_unexpected_spills): Ditto.
15 (costs::better_main_loop_than_p): Move RVV V_REGS liveness computation into
17 * config/riscv/riscv-vector-costs.h: New functions and variables.
19 2023-12-25 Tamar Christina <tamar.christina@arm.com>
22 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize vec_stmts;
24 2023-12-25 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
25 Peter Bergner <bergner@linux.ibm.com>
28 * config/rs6000/rs6000.cc (rs6000_conditional_register_usage): Change
29 GPR2 to volatile and non-fixed register for PCREL.
30 * config/rs6000/rs6000.h (FIXED_REGISTERS): Modify GPR2 to not fixed.
32 2023-12-25 Andrew Pinski <quic_apinski@quicinc.com>
34 PR tree-optimization/19832
35 * match.pd (`(a != b) ? (a + b) : (2 * a)`): Add `:c`
38 2023-12-24 Tamar Christina <tamar.christina@arm.com>
40 * doc/sourcebuild.texi (check_effective_target_vect_early_break_hw,
41 check_effective_target_vect_early_break): Document.
43 2023-12-24 Tamar Christina <tamar.christina@arm.com>
45 * config/aarch64/aarch64-simd.md (cbranch<mode>4): New.
47 2023-12-24 Tamar Christina <tamar.christina@arm.com>
49 * tree-if-conv.cc (idx_within_array_bound): Expose.
50 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): New.
51 (vect_analyze_data_ref_dependences): Use it.
52 * tree-vect-loop-manip.cc (vect_iv_increment_position): New.
53 (vect_set_loop_controls_directly,
54 vect_set_loop_condition_partial_vectors,
55 vect_set_loop_condition_partial_vectors_avx512,
56 vect_set_loop_condition_normal): Support multiple exits.
57 (slpeel_tree_duplicate_loop_to_edge_cfg): Support LCSAA peeling for
59 (slpeel_can_duplicate_loop_p): Change vectorizer from looking at BB
60 count and instead look at loop shape.
61 (vect_update_ivs_after_vectorizer): Drop asserts.
62 (vect_gen_vector_loop_niters_mult_vf): Support peeled vector iterations.
63 (vect_do_peeling): Support multiple exits.
64 (vect_loop_versioning): Likewise.
65 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialise
67 (vect_analyze_loop_form): Support loop flows with more than single BB
69 (vect_create_loop_vinfo): Support niters analysis for multiple exits.
70 (vect_analyze_loop): Likewise.
71 (vect_get_vect_def): New.
72 (vect_create_epilog_for_reduction): Support early exit reductions.
73 (vectorizable_live_operation_1): New.
74 (find_connected_edge): New.
75 (vectorizable_live_operation): Support early exit live operations.
76 (move_early_exit_stmts): New.
77 (vect_transform_loop): Use it.
78 * tree-vect-patterns.cc (vect_init_pattern_stmt): Support gcond.
79 (vect_recog_bitfield_ref_pattern): Support gconds and bools.
80 (vect_recog_gcond_pattern): New.
81 (possible_vector_mask_operation_p): Support gcond masks.
82 (vect_determine_mask_precision): Likewise.
83 (vect_mark_pattern_stmts): Set gcond def type.
84 (can_vectorize_live_stmts): Force early break inductions to be live.
85 * tree-vect-stmts.cc (vect_stmt_relevant_p): Add relevancy analysis for
87 (vect_mark_stmts_to_be_vectorized): Process gcond usage.
88 (perm_mask_for_reverse): Expose.
89 (vectorizable_comparison_1): New.
90 (vectorizable_early_exit): New.
91 (vect_analyze_stmt): Support early break and gcond.
92 (vect_transform_stmt): Likewise.
93 (vect_is_simple_use): Likewise.
94 (vect_get_vector_types_for_stmt): Likewise.
95 * tree-vectorizer.cc (pass_vectorize::execute): Update exits for value
97 * tree-vectorizer.h (enum vect_def_type): Add vect_condition_def.
98 (LOOP_VINFO_EARLY_BREAKS, LOOP_VINFO_EARLY_BRK_STORES,
99 LOOP_VINFO_EARLY_BREAKS_VECT_PEELED, LOOP_VINFO_EARLY_BRK_DEST_BB,
100 LOOP_VINFO_EARLY_BRK_VUSES): New.
101 (is_loop_header_bb_p): Drop assert.
102 (class loop): Add early_breaks, early_break_stores, early_break_dest_bb,
104 (vect_iv_increment_position, perm_mask_for_reverse,
105 ref_within_array_bound): New.
106 (slpeel_tree_duplicate_loop_to_edge_cfg): Update for early breaks.
108 2023-12-24 Tamar Christina <tamar.christina@arm.com>
110 * tree-ssa-loop-im.cc (determine_max_movement): Import insn-codes.h
111 and optabs-tree.h and check for vector compare motion out of gcond.
113 2023-12-24 Hans-Peter Nilsson <hp@axis.com>
116 * config/cris/cris.cc (cris_eh_return_handler_rtx): New function.
117 * config/cris/cris-protos.h (cris_eh_return_handler_rtx): Prototype.
118 * config/cris/cris.h (EH_RETURN_HANDLER_RTX): Redefine to call
119 cris_eh_return_handler_rtx.
121 2023-12-23 Xi Ruoyao <xry111@xry111.site>
123 * config/loongarch/loongarch.md (rotrsi3_extend): New
126 2023-12-23 Xi Ruoyao <xry111@xry111.site>
128 * config/loongarch/loongarch-tune.h
129 (loongarch_rtx_cost_data::movcf2gr): New field.
130 (loongarch_rtx_cost_data::movcf2gr_): New method.
131 (loongarch_rtx_cost_data::use_movcf2gr): New method.
132 * config/loongarch/loongarch-def.cc
133 (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Set movcf2gr
134 to COSTS_N_INSNS (7) and movgr2cf to COSTS_N_INSNS (15), based
136 (loongarch_cpu_rtx_cost_data): Set movcf2gr and movgr2cf to
137 COSTS_N_INSNS (1) for LA664.
138 (loongarch_rtx_cost_optimize_size): Set movcf2gr and movgr2cf to
139 COSTS_N_INSNS (1) + 1.
140 * config/loongarch/predicates.md (loongarch_fcmp_operator): New
142 * config/loongarch/loongarch.md (movfcc): Change to
144 (movfcc_internal): New define_insn.
145 (fcc_to_<X:mode>): New define_insn.
146 (cstore<ANYF:mode>4): New define_expand.
147 * config/loongarch/loongarch.cc
148 (loongarch_hard_regno_mode_ok_uncached): Allow FCCmode in GPRs
150 (loongarch_secondary_reload): Reload FCCmode via FPR and/or GPR.
151 (loongarch_emit_float_compare): Call gen_reg_rtx instead of
152 loongarch_allocate_fcc.
153 (loongarch_allocate_fcc): Remove.
154 (loongarch_move_to_gpr_cost): Handle FCC_REGS -> GR_REGS.
155 (loongarch_move_from_gpr_cost): Handle GR_REGS -> FCC_REGS.
156 (loongarch_register_move_cost): Handle FCC_REGS -> FCC_REGS,
157 FCC_REGS -> FP_REGS, and FP_REGS -> FCC_REGS.
159 2023-12-23 YunQiang Su <syq@gcc.gnu.org>
161 * config/mips/driver-native.cc (host_detect_local_cpu):
162 don't add nan2008 option for -mtune=native.
164 2023-12-23 YunQiang Su <syq@gcc.gnu.org>
167 * config/mips/driver-native.cc (host_detect_local_cpu):
168 Put the ret to the end of args of reconcat.
170 2023-12-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
173 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Refine dump information.
174 (preferred_new_lmul_p): Make PHI initial value into live regs calculation.
176 2023-12-22 Sandra Loosemore <sandra@codesourcery.com>
178 * omp-general.cc (omp_context_name_list_prop): Remove static qualifer.
179 * omp-general.h (omp_context_name_list_prop): Declare.
180 * tree-cfg.cc (dump_function_to_file): Intercept
181 "omp declare variant base" attribute for special handling.
182 * tree-pretty-print.cc: Include omp-general.h.
183 (dump_omp_context_selector): New.
184 (print_omp_context_selector): New.
185 * tree-pretty-print.h (print_omp_context_selector): Declare.
187 2023-12-22 Jakub Jelinek <jakub@redhat.com>
189 PR rtl-optimization/112758
190 * combine.cc (make_compopund_operation_int): Optimize AND of a SUBREG
191 based on nonzero_bits of SUBREG_REG and constant mask on
192 WORD_REGISTER_OPERATIONS targets only if it is a zero extending
195 2023-12-22 Jakub Jelinek <jakub@redhat.com>
197 PR tree-optimization/112941
198 * symtab-thunks.cc (expand_thunk): Check aggregate_value_p regardless
199 of whether is_gimple_reg_type (restype) or not.
201 2023-12-22 Jakub Jelinek <jakub@redhat.com>
203 PR tree-optimization/113102
204 * gimple-lower-bitint.cc (gimple_lower_bitint): Handle unreleased
205 large/huge _BitInt SSA_NAMEs.
207 2023-12-22 Jakub Jelinek <jakub@redhat.com>
209 PR tree-optimization/113102
210 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Only
211 use m_data[save_data_cnt] if it is non-NULL.
213 2023-12-22 Christophe Lyon <christophe.lyon@linaro.org>
215 * Makefile.in: Allow overriding EXEPCT.
217 2023-12-22 chenxiaolong <chenxiaolong@loongson.cn>
219 * doc/extend.texi:Add modifiers to the vector of asm in the doc.
220 * doc/md.texi:Refine the description of the modifier 'f' in the doc.
222 2023-12-21 Andrew Pinski <quic_apinski@quicinc.com>
225 * doc/md.texi (cond_copysign): Document.
226 (cond_len_copysign): Likewise.
227 * optabs.def: Reorder cond_copysign to be before
228 cond_fmin. Likewise for cond_len_copysign.
230 2023-12-21 Andre Vieira (lists) <andre.simoesdiasvieira@arm.com>
233 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Add multiple
234 vector arguments where simdlen is larger than veclen.
236 2023-12-21 Uros Bizjak <ubizjak@gmail.com>
239 * config/i386/i386.md (*ashlqi_ext<mode>_1): Move from the
240 high register of the input operand.
241 (*<insn>qi_ext<mode>_1): Ditto.
243 2023-12-21 Vladimir N. Makarov <vmakarov@redhat.com>
246 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com>
248 PR rtl-optimization/112918
249 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
250 (in_class_p): Restrict condition for narrowing class in case of
251 allow_all_reload_class_changes_p.
252 (process_alt_operands): Pass true for
253 allow_all_reload_class_changes_p in calls of in_class_p.
254 (curr_insn_transform): Ditto for reg operand win.
256 2023-12-21 Julian Brown <julian@codesourcery.com>
258 * gimplify.cc (omp_segregate_mapping_groups): Handle "present" groups.
259 (gimplify_scan_omp_clauses): Use mapping group functionality to
260 iterate through mapping nodes. Remove most gimplification of
261 OMP_CLAUSE_MAP nodes from here, but still populate ctx->variables
263 (gimplify_adjust_omp_clauses): Move most gimplification of
264 OMP_CLAUSE_MAP nodes here.
266 2023-12-21 Alex Coplan <alex.coplan@arm.com>
269 * config/aarch64/aarch64-ldp-fusion.cc (latest_hazard_before):
270 If the insn is throwing, record the previous insn as a hazard to
271 prevent moving it from the end of the BB.
273 2023-12-21 Jakub Jelinek <jakub@redhat.com>
275 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd):
276 Use unsigned char buffers for lhs1 and lhs2 instead of allocating
277 them through XALLOCA.
278 * collect2.cc (maybe_run_lto_and_relink): Swap xcalloc arguments.
280 2023-12-21 Richard Sandiford <richard.sandiford@arm.com>
283 * config/aarch64/aarch64-early-ra.cc (apply_allocation): Stub
284 out instructions that are going to be deleted before iterating
287 2023-12-21 Richard Sandiford <richard.sandiford@arm.com>
290 * config/aarch64/aarch64-early-ra.cc (find_strided_accesses): Fix
293 2023-12-21 Jakub Jelinek <jakub@redhat.com>
295 PR tree-optimization/112941
296 * gimple-lower-bitint.cc (gimple_lower_bitint): Disallow merging
297 a cast with multiplication, division or conversion to floating point
298 if rhs1 of the cast is result of another single use cast in the same
301 2023-12-21 chenxiaolong <chenxiaolong@loongson.cn>
303 * doc/extend.texi:According to the documents submitted earlier,
304 Two problems with function return types and using the actual types
305 of parameters instead of variable names were found and fixed.
307 2023-12-21 Jiajie Chen <c@jia.je>
309 * doc/extend.texi(__lsx_vabsd_di): remove extra `i' in name.
310 (__lsx_vfrintrm_d, __lsx_vfrintrm_s, __lsx_vfrintrne_d,
311 __lsx_vfrintrne_s, __lsx_vfrintrp_d, __lsx_vfrintrp_s, __lsx_vfrintrz_d,
312 __lsx_vfrintrz_s): fix return types.
313 (__lsx_vld, __lsx_vldi, __lsx_vldrepl_b, __lsx_vldrepl_d,
314 __lsx_vldrepl_h, __lsx_vldrepl_w, __lsx_vmaxi_b, __lsx_vmaxi_d,
315 __lsx_vmaxi_h, __lsx_vmaxi_w, __lsx_vmini_b, __lsx_vmini_d,
316 __lsx_vmini_h, __lsx_vmini_w, __lsx_vsrani_d_q, __lsx_vsrarni_d_q,
317 __lsx_vsrlni_d_q, __lsx_vsrlrni_d_q, __lsx_vssrani_d_q,
318 __lsx_vssrarni_d_q, __lsx_vssrarni_du_q, __lsx_vssrlni_d_q,
319 __lsx_vssrlrni_du_q, __lsx_vst, __lsx_vstx, __lsx_vssrani_du_q,
320 __lsx_vssrlni_du_q, __lsx_vssrlrni_d_q): add missing semicolon.
321 (__lsx_vpickve2gr_bu, __lsx_vpickve2gr_hu): fix typo in return
323 (__lsx_vstelm_b, __lsx_vstelm_d, __lsx_vstelm_h,
324 __lsx_vstelm_w): use imm type for the last argument.
325 (__lsx_vsigncov_b, __lsx_vsigncov_h, __lsx_vsigncov_w,
326 __lsx_vsigncov_d): remove duplicate definitions.
328 2023-12-21 Jiahao Xu <xujiahao@loongson.cn>
330 * config/loongarch/lasx.md: Use zero expansion instruction.
331 * config/loongarch/lsx.md: Ditto.
333 2023-12-21 Alexandre Oliva <oliva@adacore.com>
336 * builtins.cc (try_store_by_multiple_pieces): Drop obsolete
339 2023-12-21 Kewen Lin <linkw@linux.ibm.com>
341 PR rtl-optimization/112995
342 * sel-sched.cc (try_replace_dest_reg): Check the validity of the
343 replaced insn before actually replacing dest in expr.
345 2023-12-21 Kewen Lin <linkw@linux.ibm.com>
347 * dbgcnt.def (sched_block): Remove.
348 * sched-rgn.cc (schedule_region): Remove the support of debug count
351 2023-12-21 Jason Merrill <jason@redhat.com>
354 * doc/extend.texi: Document that computed goto does not
357 2023-12-21 Jason Merrill <jason@redhat.com>
360 * opts-common.cc (control_warning_option): Call
361 handle_generated_option for all cl_var_types.
363 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
366 * config/riscv/riscv-v.cc (expand_select_vl): Optimize SELECT_VL.
368 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
371 * config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use.
373 2023-12-20 Rimvydas Jasinskas <rimvydas.jas@gmail.com>
375 * doc/invoke.texi: Document the new file extensions
377 2023-12-20 Richard Sandiford <richard.sandiford@arm.com>
379 PR rtl-optimization/111702
380 * cse.cc (set::mode): Move earlier.
381 (set::src_in_memory, set::src_volatile): Convert to bitfields.
382 (set::is_fake_set): New member variable.
383 (add_to_set): Add an is_fake_set parameter.
384 (find_sets_in_insn): Update calls accordingly.
385 (cse_insn): Do not apply REG_EQUAL notes to fake sets. Do not
386 try to optimize them either, or validate changes to them.
388 2023-12-20 Kuan-Lin Chen <rufus@andestech.com>
390 * config/riscv/predicates.md (move_operand): Reject symbolic operands
391 with a type SYMBOL_FORCE_TO_MEM.
392 (call_insn_operand): Support for CM_Large.
393 (pcrel_symbol_operand): New.
394 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add builtin_define
395 "__riscv_cmodel_large".
396 * config/riscv/riscv-opts.h (riscv_code_model): Add CM_LARGE.
397 * config/riscv/riscv-protos.h (riscv_symbol_type): Add
399 * config/riscv/riscv.cc (riscv_classify_symbol) Support CM_LARGE model.
400 (riscv_symbol_insns) Add SYMBOL_FORCE_TO_MEM.
401 (riscv_cannot_force_const_mem): Ditto.
402 (riscv_split_symbol): Ditto.
403 (riscv_force_address): Check pseudo reg available before force_reg.
404 (riscv_size_ok_for_small_data_p): Disable in CM_LARGE model.
405 (riscv_can_use_per_function_literal_pools_p): New.
406 (riscv_elf_select_rtx_section): Handle per-function literal pools.
407 (riscv_output_mi_thunk): Add riscv_in_thunk_func.
408 (riscv_option_override): Support CM_LARGE model.
409 (riscv_function_ok_for_sibcall): Disable sibcalls in CM_LARGE model.
410 (riscv_in_thunk_func): New static.
411 * config/riscv/riscv.md (unspec): Define UNSPEC_FORCE_FOR_MEM.
412 (*large_load_address): New.
413 * config/riscv/riscv.opt (code_model): New.
415 2023-12-20 Wang Pengcheng <wangpengcheng.pp@bytedance.com>
417 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition.
419 2023-12-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
422 * tree-vect-generic.cc (type_for_widest_vector_mode): Change function to
423 use original vector type and check widest vector mode has at most the
424 same number of elements.
425 (get_compute_type): Pass original vector type rather than the element
426 type to type_for_widest_vector_mode and remove now obsolete check for
427 the number of elements.
429 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
431 * tree-object-size.cc (object_size_info): Remove UNKNOWNS.
432 Drop all references to it.
433 (object_sizes_set): Move unknowns propagation code to...
434 (gimplify_size_expressions): ... here. Also free reexamine
436 (propagate_unknowns): New parameter UNKNOWNS. Update callers.
438 2023-12-20 Thomas Schwinge <thomas@codesourcery.com>
440 * config/gcn/gcn.h (LIBSTDCXX): Define to "gcc".
442 2023-12-20 Richard Biener <rguenther@suse.de>
444 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Also handle
445 CTOR and VIEW_CONVERT up to the load when performing chain DCE.
447 2023-12-20 Xi Ruoyao <xry111@xry111.site>
449 * config/loongarch/loongarch.cc
450 (loongarch_expand_vector_init_same): Remove "temp2" and reuse
452 (loongarch_expand_vector_init): Use gcc_unreachable () instead
453 of gcc_assert (0), and fix the comment for it.
455 2023-12-20 Xi Ruoyao <xry111@xry111.site>
458 * config/loongarch/loongarch.cc
459 (loongarch_expand_vector_init_same): Replace gen_reg_rtx +
460 emit_move_insn with force_reg.
461 (loongarch_expand_vector_init): Likewise.
463 2023-12-20 Xi Ruoyao <xry111@xry111.site>
466 * config/loongarch/lasx.md (UNSPEC_LASX_XVFCMP_*): Remove.
467 (lasx_xvfcmp_caf_<flasxfmt>): Remove.
468 (lasx_xvfcmp_cune_<FLASX:flasxfmt>): Remove.
469 (FSC256_UNS): Remove.
471 (lasx_xvfcmp_<vfcond:fcc>_<FLASX:flasxfmt>): Remove.
472 (lasx_xvfcmp_<fsc256>_<FLASX:flasxfmt>): Remove.
473 * config/loongarch/lsx.md (UNSPEC_LSX_XVFCMP_*): Remove.
474 (lsx_vfcmp_caf_<flsxfmt>): Remove.
475 (lsx_vfcmp_cune_<FLSX:flsxfmt>): Remove.
480 (lsx_vfcmp_<vfcond:fcc>_<FLSX:flsxfmt>): Remove.
481 (lsx_vfcmp_<fsc>_<FLSX:flsxfmt>): Remove.
482 * config/loongarch/simd.md
483 (fcond_simd): New define_code_iterator.
484 (<simd_isa>_<x>vfcmp_<fcond:fcond_simd>_<simdfmt>):
486 (fcond_simd_rev): New define_code_iterator.
487 (fcond_rev_asm): New define_code_attr.
488 (<simd_isa>_<x>vfcmp_<fcond:fcond_simd_rev>_<simdfmt>):
490 (fcond_inv): New define_code_iterator.
491 (fcond_inv_rev): New define_code_iterator.
492 (fcond_inv_rev_asm): New define_code_attr.
493 (<simd_isa>_<x>vfcmp_<fcond_inv>_<simdfmt>): New define_insn.
494 (<simd_isa>_<x>vfcmp_<fcond_inv:fcond_inv_rev>_<simdfmt>):
496 (UNSPEC_SIMD_FCMP_CAF, UNSPEC_SIMD_FCMP_SAF,
497 UNSPEC_SIMD_FCMP_SEQ, UNSPEC_SIMD_FCMP_SUN,
498 UNSPEC_SIMD_FCMP_SUEQ, UNSPEC_SIMD_FCMP_CNE,
499 UNSPEC_SIMD_FCMP_SOR, UNSPEC_SIMD_FCMP_SUNE): New unspecs.
500 (SIMD_FCMP): New define_int_iterator.
501 (fcond_unspec): New define_int_attr.
502 (<simd_isa>_<x>vfcmp_<fcond_unspec>_<simdfmt>): New define_insn.
503 * config/loongarch/loongarch.cc (loongarch_expand_lsx_cmp):
504 Remove unneeded special cases.
506 2023-12-20 demin.han <demin.han@starfivetech.com>
508 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix
510 (preferred_new_lmul_p): Ditto
512 2023-12-20 Jakub Jelinek <jakub@redhat.com>
515 * config/i386/i386-builtins.cc (ix86_builtins): Increase by one
517 (def_builtin): If not -fnon-call-exceptions, set TREE_NOTHROW on
518 the builtin FUNCTION_DECL. Add leaf attribute to DECL_ATTRIBUTES.
519 (ix86_add_new_builtins): Likewise.
521 2023-12-20 Jakub Jelinek <jakub@redhat.com>
523 PR tree-optimization/112941
524 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): If
525 save_cast_conditional, instead of adding assignment of t4 to
526 m_data[save_data_cnt + 1] before m_gsi, add phi nodes such that
527 t4 propagates to m_bb loop. For constant idx, use
528 m_data[save_data_cnt] rather than m_data[save_data_cnt + 1] if inside
530 (bitint_large_huge::lower_mergeable_stmt): Clear m_bb when no longer
531 expanding inside of that loop.
532 (bitint_large_huge::lower_comparison_stmt): Likewise.
533 (bitint_large_huge::lower_addsub_overflow): Likewise.
534 (bitint_large_huge::lower_mul_overflow): Likewise.
535 (bitint_large_huge::lower_bit_query): Likewise.
537 2023-12-20 Jakub Jelinek <jakub@redhat.com>
539 * doc/invoke.texi (-Walloc-size): Add to the list of
540 warning options, remove unnecessary line-break.
541 (-Wcalloc-transposed-args): Document new warning.
543 2023-12-20 Alex Coplan <alex.coplan@arm.com>
546 * config/aarch64/aarch64-ldp-fusion.cc
547 (ldp_bb_info::track_access): Punt on accesses with invalid
548 register operands, move definition of mem_size closer to its
551 2023-12-20 Pan Li <pan2.li@intel.com>
553 * config/riscv/riscv-v.cc (rvv_builder::npatterns_vid_diff_repeated_p):
554 New function to predicate the diff to vid is repeated or not.
555 (expand_const_vector): Add restriction
556 for the vid-diff code gen and implement general one.
558 2023-12-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
560 * config/riscv/riscv.cc (riscv_legitimize_move): Fix ICE.
562 2023-12-20 Alexandre Oliva <oliva@adacore.com>
565 * builtins.cc (expand_bultin_stack_address): Add
566 STACK_POINTER_OFFSET.
567 * doc/extend.texi (__builtin_stack_address): Adjust.
569 2023-12-20 Alexandre Oliva <oliva@adacore.com>
571 PR rtl-optimization/113002
572 * cfgrtl.cc (commit_one_edge_insertion): Tolerate jumps in the
573 inserted sequence during expand.
575 2023-12-20 Alexandre Oliva <oliva@adacore.com>
577 * builtins.cc (delta_type): New template class.
578 (set_apply_args_size, get_apply_args_size): Replace with...
579 (saved_apply_args_size): ... this.
580 (set_apply_result_size, get_apply_result_size): Replace with...
581 (saved_apply_result_size): ... this.
582 (apply_args_size, apply_result_size): Adjust.
584 2023-12-20 Jeff Law <jlaw@ventanamicro.com>
586 * config/mcore/mcore.h (CC1_SPEC): Do not set -funsigned-bitfields.
588 2023-12-20 Haochen Jiang <haochen.jiang@intel.com>
590 * config/i386/avx512bwintrin.h: Allow 64 bit mask intrin usage
592 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA2_EVEX512
593 for 64 bit mask builtins.
594 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Allow 64 bit
595 mask register for -mno-evex512.
596 * config/i386/i386.md (SWI1248_AVX512BWDQ_64): Remove
598 (*zero_extendsidi2): Change isa attribute to avx512bw.
601 (*andn<mode>_1): Remove TARGET_EVEX512.
602 (*one_cmplsi2_1_zext): Change isa attribute to avx512bw.
603 (*ashl<mode>3_1): Ditto.
604 (*lshr<mode>3_1): Ditto.
605 * config/i386/sse.md (SWI1248_AVX512BWDQ): Remove TARGET_EVEX512.
606 (SWI1248_AVX512BW): Ditto.
607 (SWI1248_AVX512BWDQ2): Ditto.
608 (*knotsi_1_zext): Ditto.
610 (SWI24_MASK): Removed.
611 (vec_pack_trunc_<mode>): Change iterator from SWI24_MASK to SWI24.
612 (vec_unpacks_lo_di): Remove TARGET_EVEX512.
613 (SWI48x_MASK): Removed.
614 (vec_unpacks_hi_<mode>): Change iterator from SWI48x_MASK to SWI48x.
616 2023-12-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
618 PR tree-optimization/113012
619 * tree-object-size.cc (compute_builtin_object_size): Expand
620 comment for dynamic object sizes.
621 (collect_object_sizes_for): Always set COMPUTED bitmap for
622 dynamic object sizes.
624 2023-12-20 Alexandre Oliva <oliva@adacore.com>
626 * ipa-strub.cc (gsi_insert_finally_seq_after_call): Likewise.
627 (pass_ipa_strub::adjust_at_calls_call): Likewise.
629 2023-12-20 Alexandre Oliva <oliva@adacore.com>
631 * gcc.cc (process_command): Use LD_PIE_SPEC only if defined.
633 2023-12-19 Marek Polacek <polacek@redhat.com>
635 PR tree-optimization/113069
636 * gimple-ssa-sccopy.cc (scc_discovery): Remove unused member.
638 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
640 * omp-general.cc (vendor_properties): Add "hpe".
641 (atomic_default_mem_order_properties): Add "acquire" and "release".
642 (omp_context_selector_matches): Handle "acquire" and "release".
644 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
646 * omp-selectors.h: New file.
647 * omp-general.h: Include omp-selectors.h.
648 (OMP_TSS_CODE, OMP_TSS_NAME): New.
649 (OMP_TS_CODE, OMP_TS_NAME): New.
650 (make_trait_set_selector, make_trait_selector): Adjust declarations.
651 (omp_construct_traits_to_codes): Likewise.
652 (omp_context_selector_set_compare): Likewise.
653 (omp_get_context_selector): Likewise.
654 (omp_get_context_selector_list): New.
655 * omp-general.cc (omp_construct_traits_to_codes): Pass length in
656 as argument instead of returning it. Make it table-driven.
658 (kind_properties, vendor_properties, extension_properties): New.
659 (atomic_default_mem_order_properties): New.
661 (omp_check_context_selector): Simplify lookup and dispatch logic.
662 (omp_mark_declare_variant): Ignore variants with unknown construct
663 selectors. Adjust for new representation.
664 (make_trait_set_selector, make_trait_selector): Adjust for new
666 (omp_context_selector_matches): Simplify dispatch logic. Avoid
667 fixed-sized buffers and adjust call to omp_construct_traits_to_codes.
668 (omp_context_selector_props_compare): Adjust for new representations
669 and simplify dispatch logic.
670 (omp_context_selector_set_compare): Likewise.
671 (omp_context_selector_compare): Likewise.
672 (omp_get_context_selector): Adjust for new representations, and split
674 (omp_get_context_selector_list): New function.
675 (omp_lookup_tss_code): New.
676 (omp_lookup_ts_code): New.
677 (omp_context_compute_score): Adjust for new representations. Avoid
678 fixed-sized buffers and magic numbers. Adjust call to
679 omp_construct_traits_to_codes.
680 * gimplify.cc (omp_construct_selector_matches): Avoid use of
681 fixed-size buffer. Adjust call to omp_construct_traits_to_codes.
683 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
685 * omp-general.h (OMP_TP_NAMELIST_NODE): New.
686 * omp-general.cc (omp_context_name_list_prop): Move earlier
687 in the file, and adjust for new representation.
688 (omp_check_context_selector): Adjust this too.
689 (omp_context_selector_props_compare): Likewise.
691 2023-12-19 Sandra Loosemore <sandra@codesourcery.com>
693 * omp-general.h (OMP_TS_SCORE_NODE): New.
694 (OMP_TSS_ID, OMP_TSS_TRAIT_SELECTORS): New.
695 (OMP_TS_ID, OMP_TS_SCORE, OMP_TS_PROPERTIES): New.
696 (OMP_TP_NAME, OMP_TP_VALUE): New.
697 (make_trait_set_selector): Declare.
698 (make_trait_selector): Declare.
699 (make_trait_property): Declare.
700 (omp_constructor_traits_to_codes): Rename to
701 omp_construct_traits_to_codes.
702 * omp-general.cc (omp_constructor_traits_to_codes): Rename
703 to omp_construct_traits_to_codes. Use new accessors.
704 (omp_check_context_selector): Use new accessors.
705 (make_trait_set_selector): New.
706 (make_trait_selector): New.
707 (make_trait_property): New.
708 (omp_context_name_list_prop): Use new accessors.
709 (omp_context_selector_matches): Use new accessors.
710 (omp_context_selector_props_compare): Use new accessors.
711 (omp_context_selector_set_compare): Use new accessors.
712 (omp_get_context_selector): Use new accessors.
713 (omp_context_compute_score): Use new accessors.
714 * gimplify.cc (omp_construct_selector_matches): Adjust for renaming
715 of omp_constructor_traits_to_codes.
717 2023-12-19 David Faust <david.faust@oracle.com>
720 * btfout.cc (btf_fwd_to_enum_p): New.
721 (btf_asm_type_ref): Special case references to enum forwards.
722 (btf_asm_type): Special case enum forwards. Rename btf_size_type to
723 btf_size, and change chained ifs switching on btf_kind into else ifs.
725 2023-12-19 Richard Biener <rguenther@suse.de>
727 PR tree-optimization/113080
728 * tree-scalar-evolution.cc (expression_expensive_p): Allow
729 a tiny bit of growth due to expansion of shared trees.
730 (final_value_replacement_loop): Add comment.
732 2023-12-19 Richard Biener <rguenther@suse.de>
734 PR tree-optimization/113073
735 * tree-vect-stmts.cc (vectorizable_load): Properly ensure
736 to exempt only vector-size aligned overreads.
738 2023-12-19 Roger Sayle <roger@nextmovesoftware.com>
740 * config/i386/i386-expand.cc
741 (ix86_convert_const_wide_int_to_broadcast): Remove static.
742 (ix86_expand_move): Don't attempt to convert wide constants
743 to SSE using ix86_convert_const_wide_int_to_broadcast here.
744 (ix86_split_long_move): Always un-cprop multi-word constants.
745 * config/i386/i386-expand.h
746 (ix86_convert_const_wide_int_to_broadcast): Prototype here.
747 * config/i386/i386-features.cc: Include i386-expand.h.
748 (timode_scalar_chain::convert_insn): When converting TImode to
749 V1TImode, try ix86_convert_const_wide_int_to_broadcast.
751 2023-12-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
753 * config/riscv/riscv-v.cc (expand_const_vector): Use builder.inner_mode ().
755 2023-12-19 Jakub Jelinek <jakub@redhat.com>
758 * config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1]
761 2023-12-19 Alex Coplan <alex.coplan@arm.com>
764 * config/aarch64/predicates.md (aarch64_stp_reg_operand): Fix
765 parentheses to match intent.
767 2023-12-19 Jiufu Guo <guojiufu@linux.ibm.com>
769 PR rtl-optimization/112525
771 * dse.cc (get_group_info): Add arg_pointer_rtx as frame_related.
772 (check_mem_read_rtx): Add parameter to indicate if it is checking mem
774 (scan_insn): Add mem checking on call usage.
776 2023-12-19 Feng Wang <wangfeng@eswincomputing.com>
778 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
779 Add new macro for match function.
780 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
781 Add one more parameter for macro expanding.
782 (handle_pragma_vector): Add match function calls.
783 * config/riscv/riscv-vector-builtins.h (enum required_ext):
784 Add enum defination for required extension.
785 (struct function_group_info): Add one more parameter for checking required-ext.
787 2023-12-18 Vladimir N. Makarov <vmakarov@redhat.com>
789 PR rtl-optimization/112918
790 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
791 (in_class_p): Restrict condition for narrowing class in case of
792 allow_all_reload_class_changes_p.
793 (process_alt_operands): Pass true for
794 allow_all_reload_class_changes_p in calls of in_class_p.
795 (curr_insn_transform): Ditto for reg operand win.
797 2023-12-18 Uros Bizjak <ubizjak@gmail.com>
799 * config/i386/i386.md (redundant compare peephole2):
800 New peephole2 pattern.
802 2023-12-18 Andreas Krebbel <krebbel@linux.ibm.com>
804 * config/s390/s390.cc (s390_encode_section_info): Replace
805 SYMBOL_REF_LOCAL_P with decl_binds_to_current_def_p.
807 2023-12-18 Andrew Pinski <quic_apinski@quicinc.com>
809 PR tree-optimization/113054
810 * gimple-ssa-sccopy.cc: Wrap the local types
811 with an anonymous namespace.
813 2023-12-18 Richard Biener <rguenther@suse.de>
816 * tree-pretty-print.cc (dump_generic_node): Dump
817 sizetype as __SIZETYPE__ with TDF_GIMPLE.
818 Dump unnamed vector types as T [[gnu::vector_size(n)]] with
820 * tree-ssa-address.cc (create_mem_ref_raw): Never generate
821 a NULL STEP when INDEX is specified.
823 2023-12-18 Gerald Pfeifer <gerald@pfeifer.com>
826 * doc/install.texi (Specific) <hppa*-hp-hpux10>: Remove section.
827 (Specific) <hppa*-hp-hpux11>: Remove references to GCC 2.95 and
828 3.0. Also libffi has been ported now.
830 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
833 * config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0.
834 (none,W21,W42,W84,W43,W86,W87,W0): Ditto.
835 * config/riscv/vector.md: Ditto.
837 2023-12-18 Richard Biener <rguenther@suse.de>
840 * tree-pretty-print.cc (dump_mem_ref): Use TDF_GIMPLE path
841 also for TARGET_MEM_REF and amend it.
843 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
845 * config/riscv/riscv.cc (riscv_regmode_natural_size): Fix ICE for
846 FIXED-VLMAX of -march=rv32gc_zve32f.
848 2023-12-18 Jakub Jelinek <jakub@redhat.com>
850 PR tree-optimization/113013
851 * tree-object-size.cc (alloc_object_size): Return size_unknown if
852 corresponding argument(s) don't have integral type or have integral
853 type with higher precision than sizetype. Don't check arg1 >= 0
854 uselessly. Compare argument indexes against gimple_call_num_args
855 in unsigned type rather than int. Formatting fixes.
857 2023-12-18 Pan Li <pan2.li@intel.com>
859 * config/riscv/riscv-v.cc (expand_const_vector): Take step2
860 instead of step1 for second series.
862 2023-12-18 liushuyu <liushuyu011@gmail.com>
864 * config.gcc: Add loongarch-d.o to d_target_objs for LoongArch
866 * config/loongarch/t-loongarch: Add object target for loongarch-d.cc.
867 * config/loongarch/loongarch-d.cc
868 (loongarch_d_target_versions): add interface function to define builtin
869 D versions for LoongArch architecture.
870 (loongarch_d_handle_target_float_abi): add interface function to define
871 builtin D traits for LoongArch architecture.
872 (loongarch_d_register_target_info): add interface function to register
873 loongarch_d_handle_target_float_abi function.
874 * config/loongarch/loongarch-d.h
875 (loongarch_d_target_versions): add function prototype.
876 (loongarch_d_register_target_info): Likewise.
878 2023-12-18 xuli <xuli1@eswincomputing.com>
880 * config/riscv/vector.md: Add viota avl_type attribute.
882 2023-12-18 Pan Li <pan2.li@intel.com>
884 * config/riscv/riscv.cc (riscv_expand_mult_with_const_int):
885 Change int into HOST_WIDE_INT.
886 (riscv_legitimize_poly_move): Ditto.
888 2023-12-17 Xi Ruoyao <xry111@xry111.site>
890 * config/loongarch/loongarch.md (alslsi3_extend): New
893 2023-12-17 Xi Ruoyao <xry111@xry111.site>
896 * config/loongarch/loongarch-def.cc
897 (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update
898 instruction costs per micro-benchmark results.
899 (loongarch_rtx_cost_optimize_size): Set all instruction costs
900 to (COSTS_N_INSNS (1) + 1).
901 * config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove
902 special case for multiplication when optimizing for size.
903 Adjust division cost when TARGET_64BIT && !TARGET_DIV32.
904 Account the extra cost when TARGET_CHECK_ZERO_DIV and
905 optimizing for speed.
907 2023-12-17 Xi Ruoyao <xry111@xry111.site>
909 * config/loongarch/loongarch-def.cc (rtl.h): Include.
910 (COSTS_N_INSNS): Remove the macro definition.
912 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com>
915 * doc/install.texi (Specific) <hppa*-hp-hpux*>: Remove a note on
917 Remove details on how the HP assembler, which we document as not
919 <hppa*-hp-hpux11>: Note that only the HP linker is supported.
921 2023-12-17 Gerald Pfeifer <gerald@pfeifer.com>
924 * doc/install.texi (Installing GCC): Remove reference to
927 (Final install): Remove section on submitting information for
928 buildstat.html. Adjust the request for feedback.
930 2023-12-16 David Malcolm <dmalcolm@redhat.com>
932 * json.cc (print_escaped_json_string): New, taken from
934 (object::print): Use it for printing keys.
935 (string::print): Move implementation to
936 print_escaped_json_string.
937 (selftest::test_writing_objects): Add a key containing
938 quote, backslash, and control characters.
940 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
942 * config/aarch64/aarch64-feature-deps.h (fmv_deps_<FEAT_NAME>):
943 Define aarch64_feature_flags mask foreach FMV feature.
944 * config/aarch64/aarch64-option-extensions.def: Use new macros
945 to define FMV feature extensions.
946 * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p):
947 Check for target_version attribute after processing target
949 (aarch64_fmv_feature_data): New.
950 (aarch64_parse_fmv_features): New.
951 (aarch64_process_target_version_attr): New.
952 (aarch64_option_valid_version_attribute_p): New.
953 (get_feature_mask_for_version): New.
954 (compare_feature_masks): New.
955 (aarch64_compare_version_priority): New.
956 (build_ifunc_arg_type): New.
957 (make_resolver_func): New.
958 (add_condition_to_bb): New.
959 (dispatch_function_versions): New.
960 (aarch64_generate_version_dispatcher_body): New.
961 (aarch64_get_function_versions_dispatcher): New.
962 (aarch64_common_function_versions): New.
963 (aarch64_mangle_decl_assembler_name): New.
964 (TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P): New implementation.
965 (TARGET_OPTION_EXPANDED_CLONES_ATTRIBUTE): New implementation.
966 (TARGET_OPTION_FUNCTION_VERSIONS): New implementation.
967 (TARGET_COMPARE_VERSION_PRIORITY): New implementation.
968 (TARGET_GENERATE_VERSION_DISPATCHER_BODY): New implementation.
969 (TARGET_GET_FUNCTION_VERSIONS_DISPATCHER): New implementation.
970 (TARGET_MANGLE_DECL_ASSEMBLER_NAME): New implementation.
971 * config/aarch64/aarch64.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE):
973 * config/arm/aarch-common.h (enum aarch_parse_opt_result): Add
974 new value to report duplicate FMV feature.
975 * common/config/aarch64/cpuinfo.h: New file.
977 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
979 * attribs.cc (decl_attributes): Pass attribute name to target.
980 (is_function_default_version): Update comment to specify
981 incompatibility with target_version attributes.
982 * cgraphclones.cc (cgraph_node::create_version_clone_with_body):
983 Call valid_version_attribute_p for target_version attributes.
984 * defaults.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): New macro.
985 * target.def (valid_version_attribute_p): New hook.
986 * doc/tm.texi.in: Add new hook.
987 * doc/tm.texi: Regenerate.
988 * multiple_target.cc (create_dispatcher_calls): Remove redundant
989 is_function_default_version check.
990 (expand_target_clones): Use target macro to pick attribute name.
991 * targhooks.cc (default_target_option_valid_version_attribute_p):
993 * targhooks.h (default_target_option_valid_version_attribute_p):
995 * tree.h (DECL_FUNCTION_VERSIONED): Update comment to include
996 target_version attributes.
998 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
1000 * common/config/aarch64/aarch64-common.cc
1001 (struct aarch64_option_extension): Remove unused field.
1002 (all_extensions): Ditto.
1003 (aarch64_get_extension_string_for_isa_flags): Remove filtering
1004 of features without native detection.
1005 * config/aarch64/driver-aarch64.cc (host_detect_local_cpu):
1006 Explicitly add expected features that lack cpuinfo detection.
1008 2023-12-16 Andrew Carlotti <andrew.carlotti@arm.com>
1010 * common/config/aarch64/aarch64-common.cc
1011 (aarch64_get_extension_string_for_isa_flags): Fix generation of
1012 the "+nocrypto" extension.
1013 * config/aarch64/aarch64.h (AARCH64_ISA_CRYPTO): Remove.
1014 (TARGET_CRYPTO): Remove.
1015 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
1016 Don't use TARGET_CRYPTO.
1018 2023-12-15 Mary Bennett <mary.bennett@embecosm.com>
1020 * config/riscv/constraints.md: CVP2 -> CV_alu_pow2.
1021 * config/riscv/corev.md: Likewise.
1023 2023-12-15 Mary Bennett <mary.bennett@embecosm.com>
1025 * common/config/riscv/riscv-common.cc: Add XCVelw.
1026 * config/riscv/corev.def: Likewise.
1027 * config/riscv/corev.md: Likewise.
1028 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
1029 * config/riscv/riscv-ftypes.def: Likewise.
1030 * config/riscv/riscv.opt: Likewise.
1031 * doc/extend.texi: Add XCVelw builtin documentation.
1032 * doc/sourcebuild.texi: Likewise.
1034 2023-12-15 Jeff Law <jlaw@ventanamicro.com>
1037 * config/riscv/constraints.md (D03, DsA): Remove unused constraints.
1038 * config/riscv/predicates.md (const_0_3_operand): New predicate.
1039 (const_0_10_operand): Likewise.
1040 * config/riscv/crypto.md (riscv_aes32dsi): Use new predicate. Drop
1041 unnecessary constraint.
1042 (riscv_aes32dsmi, riscv_aes64im, riscv_aes32esi): Likewise.
1043 (riscv_aes32esmi, *riscv_<sm4_op>_si): Likewise.
1044 (riscv_<sm4_op>_di_extend, riscv_<sm4_op>_si): Likewise.
1046 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1048 * config.gcc: Add aarch64-ldp-fusion.o to extra_objs for aarch64.
1049 * config/aarch64/aarch64-passes.def: Add copies of pass_ldp_fusion
1050 before and after RA.
1051 * config/aarch64/aarch64-protos.h (make_pass_ldp_fusion): Declare.
1052 * config/aarch64/aarch64.opt (-mearly-ldp-fusion): New.
1053 (-mlate-ldp-fusion): New.
1054 (--param=aarch64-ldp-alias-check-limit): New.
1055 (--param=aarch64-ldp-writeback): New.
1056 * config/aarch64/t-aarch64: Add rule for aarch64-ldp-fusion.o.
1057 * config/aarch64/aarch64-ldp-fusion.cc: New file.
1058 * doc/invoke.texi (AArch64 Options): Document new
1059 -m{early,late}-ldp-fusion options.
1061 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1063 * config/aarch64/aarch64-ldpstp.md: Abstract ldp/stp
1064 representation from peepholes, allowing use of new form.
1065 * config/aarch64/aarch64-modes.def (V2x4QImode): Define.
1066 * config/aarch64/aarch64-protos.h
1067 (aarch64_finish_ldpstp_peephole): Declare.
1068 (aarch64_swap_ldrstr_operands): Delete declaration.
1069 (aarch64_gen_load_pair): Adjust parameters.
1070 (aarch64_gen_store_pair): Likewise.
1071 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>):
1073 (vec_store_pair<DREG:mode><DREG2:mode>): Delete.
1074 (load_pair<VQ:mode><VQ2:mode>): Delete.
1075 (vec_store_pair<VQ:mode><VQ2:mode>): Delete.
1076 * config/aarch64/aarch64.cc (aarch64_pair_mode_for_mode): New.
1077 (aarch64_gen_store_pair): Adjust to use new unspec form of stp.
1078 Drop second mem from parameters.
1079 (aarch64_gen_load_pair): Likewise.
1080 (aarch64_pair_mem_from_base): New.
1081 (aarch64_save_callee_saves): Emit REG_CFA_OFFSET notes for
1082 frame-related saves. Adjust call to aarch64_gen_store_pair
1083 (aarch64_restore_callee_saves): Adjust calls to
1084 aarch64_gen_load_pair to account for change in interface.
1085 (aarch64_process_components): Likewise.
1086 (aarch64_classify_address): Handle 32-byte pair mems in
1088 (aarch64_print_operand): Likewise.
1089 (aarch64_copy_one_block_and_progress_pointers): Adjust calls to
1090 account for change in aarch64_gen_{load,store}_pair interface.
1091 (aarch64_set_one_block_and_progress_pointer): Likewise.
1092 (aarch64_finish_ldpstp_peephole): New.
1093 (aarch64_gen_adjusted_ldpstp): Adjust to use generation helper.
1094 * config/aarch64/aarch64.md (ldpstp): New attribute.
1095 (load_pair_sw_<SX:mode><SX2:mode>): Delete.
1096 (load_pair_dw_<DX:mode><DX2:mode>): Delete.
1097 (load_pair_dw_<TX:mode><TX2:mode>): Delete.
1098 (*load_pair_<ldst_sz>): New.
1099 (*load_pair_16): New.
1100 (store_pair_sw_<SX:mode><SX2:mode>): Delete.
1101 (store_pair_dw_<DX:mode><DX2:mode>): Delete.
1102 (store_pair_dw_<TX:mode><TX2:mode>): Delete.
1103 (*store_pair_<ldst_sz>): New.
1104 (*store_pair_16): New.
1105 (*load_pair_extendsidi2_aarch64): Adjust to use new form.
1106 (*zero_extendsidi2_aarch64): Likewise.
1107 * config/aarch64/iterators.md (VPAIR): New.
1108 * config/aarch64/predicates.md (aarch64_mem_pair_operand): Change to
1109 a special predicate derived from aarch64_mem_pair_operator.
1111 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1113 * config/aarch64/aarch64-protos.h (aarch64_ldpstp_operand_mode_p): Declare.
1114 * config/aarch64/aarch64.cc (aarch64_gen_storewb_pair): Build RTL
1115 directly instead of invoking named pattern.
1116 (aarch64_gen_loadwb_pair): Likewise.
1117 (aarch64_ldpstp_operand_mode_p): New.
1118 * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Replace with
1120 (*loadwb_post_pair_<ldst_sz>): ... this. Generalize as described
1122 (loadwb_pair<GPF:mode>_<P:mode>): Delete (superseded by the
1124 (*loadwb_post_pair_16): New.
1125 (*loadwb_pre_pair_<ldst_sz>): New.
1126 (loadwb_pair<TX:mode>_<P:mode>): Delete.
1127 (*loadwb_pre_pair_16): New.
1128 (storewb_pair<GPI:mode>_<P:mode>): Replace with ...
1129 (*storewb_pre_pair_<ldst_sz>): ... this. Generalize as
1130 described in cover letter.
1131 (*storewb_pre_pair_16): New.
1132 (storewb_pair<GPF:mode>_<P:mode>): Delete.
1133 (*storewb_post_pair_<ldst_sz>): New.
1134 (storewb_pair<TX:mode>_<P:mode>): Delete.
1135 (*storewb_post_pair_16): New.
1136 * config/aarch64/predicates.md (aarch64_mem_pair_operator): New.
1137 (pmode_plus_operator): New.
1138 (aarch64_ldp_reg_operand): New.
1139 (aarch64_stp_reg_operand): New.
1141 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1143 * config/aarch64/aarch64.cc (aarch64_print_address_internal): Handle SVE
1144 modes when printing ldp/stp addresses.
1146 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1148 * config/aarch64/aarch64-protos.h (aarch64_const_zero_rtx_p): New.
1149 * config/aarch64/aarch64.cc (aarch64_const_zero_rtx_p): New.
1151 (aarch64_print_operand): ... here. Recognize CONST0_RTXes in
1152 modes other than VOIDmode.
1154 2023-12-15 Xiao Zeng <zengxiao@eswincomputing.com>
1156 * common/config/riscv/riscv-common.cc:
1157 (riscv_implied_info): Add zvfbfmin item.
1158 (riscv_ext_version_table): Ditto.
1159 (riscv_ext_flag_table): Ditto.
1160 * config/riscv/riscv.opt:
1161 (MASK_ZVFBFMIN): New macro.
1162 (MASK_VECTOR_ELEN_BF_16): Ditto.
1163 (TARGET_ZVFBFMIN): Ditto.
1165 2023-12-15 Wilco Dijkstra <wilco.dijkstra@arm.com>
1167 * config/aarch64/aarch64.opt (aarch64_mops_memmove_size_threshold):
1169 * config/aarch64/aarch64.md (cpymemdi): Add a parameter.
1170 (movmemdi): Call aarch64_expand_cpymem.
1171 * config/aarch64/aarch64.cc (aarch64_copy_one_block): Rename function,
1172 simplify, support storing generated loads/stores.
1173 (aarch64_expand_cpymem): Support expansion of memmove.
1174 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem): Add bool arg.
1176 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1178 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Fix bug.
1180 2023-12-15 Jakub Jelinek <jakub@redhat.com>
1182 * target.h (struct bitint_info): Add abi_limb_mode member, adjust
1184 * target.def (bitint_type_info): Mention abi_limb_mode instead of
1186 * varasm.cc (output_constant): Use abi_limb_mode rather than
1188 * stor-layout.cc (finish_bitfield_representative): Likewise. Assert
1189 that if precision is smaller or equal to abi_limb_mode precision or
1190 if info.big_endian is different from WORDS_BIG_ENDIAN, info.limb_mode
1191 must be the same as info.abi_limb_mode.
1192 (layout_type): Use abi_limb_mode rather than limb_mode.
1193 * gimple-fold.cc (clear_padding_bitint_needs_padding_p): Likewise.
1194 (clear_padding_type): Likewise.
1195 * config/i386/i386.cc (ix86_bitint_type_info): Also set
1196 info->abi_limb_mode.
1197 * doc/tm.texi: Regenerated.
1199 2023-12-15 Julian Brown <julian@codesourcery.com>
1201 * gimplify.cc (extract_base_bit_offset): Add VARIABLE_OFFSET parameter.
1202 (omp_get_attachment, omp_group_last, omp_group_base,
1203 omp_directive_maps_explicitly): Add GOMP_MAP_STRUCT_UNORD support.
1204 (omp_accumulate_sibling_list): Update calls to extract_base_bit_offset.
1205 Support GOMP_MAP_STRUCT_UNORD.
1206 (omp_build_struct_sibling_lists, gimplify_scan_omp_clauses,
1207 gimplify_adjust_omp_clauses, gimplify_omp_target_update): Add
1208 GOMP_MAP_STRUCT_UNORD support.
1209 * omp-low.cc (lower_omp_target): Add GOMP_MAP_STRUCT_UNORD support.
1210 * tree-pretty-print.cc (dump_omp_clause): Likewise.
1212 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1215 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
1216 Use force_reload_address to reload addresses that aren't suitable for
1217 ld1rq in the pre-RA splitter.
1219 2023-12-15 Alex Coplan <alex.coplan@arm.com>
1222 * emit-rtl.cc (address_reload_context::emit_autoinc): New.
1223 (force_reload_address): New.
1224 * emit-rtl.h (struct address_reload_context): Declare.
1225 (force_reload_address): Declare.
1226 * lra-constraints.cc (class lra_autoinc_reload_context): New.
1227 (emit_inc): Drop IN parameter, invoke
1228 code moved to emit-rtl.cc:address_reload_context::emit_autoinc.
1229 (curr_insn_transform): Drop redundant IN parameter in call to
1231 * recog.h (class recog_data_saver): New.
1233 2023-12-15 Jakub Jelinek <jakub@redhat.com>
1235 PR tree-optimization/113024
1236 * match.pd (two conversions in a row): Simplify scalar integer
1237 sign-extension followed by truncation.
1239 2023-12-15 Jakub Jelinek <jakub@redhat.com>
1241 PR tree-optimization/113003
1242 * gimple-lower-bitint.cc (arith_overflow_arg_kind): New function.
1243 (gimple_lower_bitint): Use it to catch .{ADD,SUB,MUL}_OVERFLOW
1244 calls with large/huge INTEGER_CST arguments.
1246 2023-12-15 Gerald Pfeifer <gerald@pfeifer.com>
1248 * doc/install.texi (Specific) <nvptx-*-none>: Update nvptx-tools
1251 2023-12-15 Hongyu Wang <hongyu.wang@intel.com>
1254 * config/i386/i386-options.cc (ix86_option_override_internal):
1255 Sync ix86_move_max/ix86_store_max with prefer_vector_width when
1256 it is explicitly set.
1258 2023-12-15 Haochen Jiang <haochen.jiang@intel.com>
1260 * config/i386/driver-i386.cc (host_detect_local_cpu): Do not
1261 set Grand Ridge depending on RAO-INT.
1262 * config/i386/i386.h: Remove PTA_RAOINT from PTA_GRANDRIDGE.
1263 * doc/invoke.texi: Adjust documentation.
1265 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1268 * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.
1270 2023-12-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1273 * tree-vect-loop.cc (vect_estimate_min_profitable_iters):
1274 Remove address cost for select_vl/decrement IV.
1276 2023-12-14 Andrew Pinski <quic_apinski@quicinc.com>
1278 PR middle-end/111260
1279 * optabs.cc (emit_conditional_move): Change the modes to be
1280 equal before forcing the constant to a register.
1282 2023-12-14 Di Zhao <dizhao@os.amperecomputing.com>
1284 PR tree-optimization/110279
1285 * doc/invoke.texi: New parameter fully-pipelined-fma.
1286 * params.opt: New parameter fully-pipelined-fma.
1287 * tree-ssa-reassoc.cc (get_mult_latency_consider_fma): Return
1288 the latency of MULT_EXPRs that can't be hidden by the FMAs.
1289 (get_reassociation_width): Search for a smaller width
1290 considering the benefit of fully pipelined FMA.
1291 (rank_ops_for_fma): Return the number of MULT_EXPRs.
1292 (reassociate_bb): Pass the number of MULT_EXPRs to
1293 get_reassociation_width; avoid calling
1294 get_reassociation_width twice.
1296 2023-12-14 Robin Dapp <rdapp@ventanamicro.com>
1299 * expmed.cc (extract_bit_field_1): Ensure better mode
1300 has fitting unit_precision.
1302 2023-12-14 Robin Dapp <rdapp@ventanamicro.com>
1305 * config/riscv/autovec.md (vec_extract<mode>bi): New expander
1306 calling vec_extract<mode>qi.
1307 * config/riscv/riscv-protos.h (riscv_legitimize_poly_move):
1309 (emit_vec_extract): Change argument from poly_int64 to rtx.
1310 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns):
1312 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Export.
1313 (riscv_legitimize_move): Use rtx instead of poly_int64.
1314 * expmed.cc (store_bit_field_1): Change BITSIZE to PRECISION.
1315 (extract_bit_field_1): Change BITSIZE to PRECISION and use
1316 return mode from insn_data as target mode.
1318 2023-12-14 Alex Coplan <alex.coplan@arm.com>
1320 * doc/extend.texi: Document AArch64 Operand Modifiers.
1322 2023-12-14 Richard Biener <rguenther@suse.de>
1324 PR tree-optimization/113018
1325 * tree-vect-slp.cc (vect_slp_check_for_roots): Only start
1326 SLP discovery from stmts with a LHS.
1328 2023-12-14 Richard Biener <rguenther@suse.de>
1330 PR tree-optimization/112793
1331 * tree-vect-slp.cc (vect_schedule_slp_node): Already
1332 code-generated constant/external nodes are OK.
1334 2023-12-14 Richard Sandiford <richard.sandiford@arm.com>
1336 * config/aarch64/aarch64-early-ra.cc (allocno_info::is_equiv): New
1338 (allocno_info::equiv_allocno): Replace with...
1339 (allocno_info::related_allocno): ...this member variable.
1340 (allocno_info::chain_prev): Put into an enum with...
1341 (allocno_info::last_use_point): ...this new member variable.
1342 (color_info::num_fpr_preferences): New member variable.
1343 (early_ra::m_shared_allocnos): Likewise.
1344 (allocno_info::is_shared): New member function.
1345 (allocno_info::is_equiv_to): Likewise.
1346 (early_ra::dump_allocnos): Dump sharing information. Tweak column
1348 (early_ra::fpr_preference): Check ALLOWS_NONFPR before returning -2.
1349 (early_ra::start_new_region): Handle m_shared_allocnos.
1350 (early_ra::create_allocno_group): Set related_allocno rather than
1352 (early_ra::record_allocno_use): Likewise. Detect multiple calls
1353 for the same program point. Update last_use_point and is_equiv.
1354 Clear is_strong_copy_src rather than is_strong_copy_dest.
1355 (early_ra::record_allocno_def): Use related_allocno rather than
1356 equiv_allocno. Update last_use_point.
1357 (early_ra::valid_equivalence_p): Replace with...
1358 (early_ra::find_related_start): ...this new function.
1359 (early_ra::record_copy): Look for cases where a destination copy chain
1360 can be shared with the source allocno.
1361 (early_ra::find_strided_accesses): Update for equiv_allocno->
1362 related_allocno change. Only call consider_strong_copy_src_chain
1363 at the head of a copy chain.
1364 (early_ra::is_chain_candidate): Skip shared allocnos. Update for
1365 new representation of equivalent allocnos.
1366 (early_ra::chain_allocnos): Update for new representation of
1367 equivalent allocnos.
1368 (early_ra::try_to_chain_allocnos): Likewise.
1369 (early_ra::merge_fpr_info): New function, split out from...
1370 (early_ra::set_single_color_rep): ...here.
1371 (early_ra::form_chains): Handle shared allocnos.
1372 (early_ra::process_copies): Count the number of FPR preferences.
1373 (early_ra::cmp_decreasing_size): Rename to...
1374 (early_ra::cmp_allocation_order): ...this. Sort equal-sized groups
1375 by the number of FPR preferences.
1376 (early_ra::finalize_allocation): Handle shared allocnos.
1377 (early_ra::process_region): Reset chain_prev as well as chain_next.
1379 2023-12-14 Alexandre Oliva <oliva@adacore.com>
1381 PR middle-end/112938
1382 * ipa-strub.cc (pass_ipa_strub::execute): Pass volatile args
1383 by reference to internal strub wrapped bodies.
1385 2023-12-14 Alexandre Oliva <oliva@adacore.com>
1387 PR middle-end/112938
1388 * ipa-strub.cc (pass_ipa_strub::execute): Handle promoted
1389 volatile args in internal strub. Simplify.
1391 2023-12-14 Thomas Schwinge <thomas@codesourcery.com>
1393 * gimple-ssa-sccopy.cc: '#define INCLUDE_ALGORITHM' instead of
1394 '#include <algorithm>'.
1396 2023-12-14 Feng Wang <wangfeng@eswincomputing.com>
1399 2023-12-12 Feng Wang <wangfeng@eswincomputing.com>
1401 * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION):
1403 (read_vl): Using AVAIL argument default value.
1509 (vfrsub_frm): Ditto.
1512 (vfwadd_frm): Ditto.
1513 (vfwsub_frm): Ditto.
1519 (vfrdiv_frm): Ditto.
1521 (vfwmul_frm): Ditto.
1530 (vfmacc_frm): Ditto.
1531 (vfnmacc_frm): Ditto.
1532 (vfmsac_frm): Ditto.
1533 (vfnmsac_frm): Ditto.
1534 (vfmadd_frm): Ditto.
1535 (vfnmadd_frm): Ditto.
1536 (vfmsub_frm): Ditto.
1537 (vfnmsub_frm): Ditto.
1542 (vfwmacc_frm): Ditto.
1543 (vfwnmacc_frm): Ditto.
1544 (vfwmsac_frm): Ditto.
1545 (vfwnmsac_frm): Ditto.
1547 (vfsqrt_frm): Ditto.
1550 (vfrec7_frm): Ditto.
1569 (vfcvt_rtz_x): Ditto.
1570 (vfcvt_rtz_xu): Ditto.
1572 (vfcvt_x_frm): Ditto.
1573 (vfcvt_xu_frm): Ditto.
1574 (vfcvt_f_frm): Ditto.
1577 (vfwcvt_rtz_x): Ditto.
1578 (vfwcvt_rtz_xu) Ditto.:
1580 (vfwcvt_x_frm): Ditto.
1581 (vfwcvt_xu_frm) Ditto.:
1584 (vfncvt_rtz_x): Ditto.
1585 (vfncvt_rtz_xu): Ditto.
1587 (vfncvt_rod_f): Ditto.
1588 (vfncvt_x_frm): Ditto.
1589 (vfncvt_xu_frm): Ditto.
1590 (vfncvt_f_frm): Ditto.
1605 (vfredusum_frm): Ditto.
1606 (vfredosum_frm): Ditto.
1607 (vfwredosum): Ditto.
1608 (vfwredusum): Ditto.
1609 (vfwredosum_frm): Ditto.
1610 (vfwredusum_frm): Ditto.
1635 (vslidedown): Ditto.
1637 (vslide1down): Ditto.
1638 (vfslide1up): Ditto.
1639 (vfslide1down): Ditto.
1641 (vrgatherei16): Ditto.
1643 (vundefined): Ditto.
1644 (vreinterpret): Ditto.
1646 (vlmul_trunc): Ditto.
1659 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro.
1660 * config/riscv/riscv-vector-builtins.h (struct function_group_info):
1661 Add avail function interface into struct.
1662 * config/riscv/t-riscv: Add dependency
1663 * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco.
1665 2023-12-14 Jakub Jelinek <jakub@redhat.com>
1667 PR tree-optimization/112994
1668 * match.pd ((t * u) / (t * v) -> (u / v)): New simplification.
1670 2023-12-14 Jakub Jelinek <jakub@redhat.com>
1672 PR tree-optimization/112994
1673 * match.pd ((t * 2) / 2 -> t): Adjust comment to use u instead of 2.
1674 Punt without range checks if TYPE_OVERFLOW_SANITIZED.
1675 ((t * u) / v -> t * (u / v)): New simplification.
1677 2023-12-14 Filip Kastl <fkastl@suse.cz>
1679 * Makefile.in: Added sccopy pass.
1680 * passes.def: Added sccopy pass before LTO streaming and before
1682 * tree-pass.h (make_pass_sccopy): Added sccopy pass.
1683 * gimple-ssa-sccopy.cc: New file.
1685 2023-12-14 Martin Jambor <mjambor@suse.cz>
1687 PR tree-optimization/111807
1688 * tree-sra.cc (build_ref_for_model): Allow offset smaller than
1689 model->offset when gsi is non-NULL. Adjust function comment.
1691 2023-12-14 liuhongt <hongtao.liu@intel.com>
1694 * config/i386/i386-expand.cc
1695 (ix86_convert_const_wide_int_to_broadcast): Don't convert to
1696 broadcast for vec_dup{v4di,v8si} when TARGET_AVX2 is not
1698 (ix86_broadcast_from_constant): Allow broadcast for V4DI/V8SI
1699 when !TARGET_AVX2 since it will be forced to memory later.
1700 (ix86_expand_vector_move): Force constant to mem for
1701 vec_dup{vssi,v4di} when TARGET_AVX2 is not available.
1703 2023-12-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1706 * config/riscv/riscv-protos.h (struct common_vector_cost): New struct.
1707 (struct scalable_vector_cost): Ditto.
1708 (struct cpu_vector_cost): Ditto.
1709 * config/riscv/riscv-vector-costs.cc (costs::add_stmt_cost): Add RVV
1710 builtin vectorization cost
1711 * config/riscv/riscv.cc (struct riscv_tune_param): Ditto.
1712 (get_common_costs): New function.
1713 (riscv_builtin_vectorization_cost): Ditto.
1714 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New targethook.
1716 2023-12-13 Richard Ball <richard.ball@arm.com>
1718 * config.gcc: Adds new header to config.
1719 * config/aarch64/aarch64-builtins.cc (enum aarch64_type_qualifiers):
1720 Moved to header file.
1722 (enum aarch64_simd_type): Likewise.
1723 (struct aarch64_simd_type_info): Remove static.
1725 * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64):
1726 Defines pragma for arm_neon_sve_bridge.h.
1727 * config/aarch64/aarch64-protos.h:
1728 Add handle_arm_neon_sve_bridge_h
1729 * config/aarch64/aarch64-sve-builtins-base.h: New intrinsics.
1730 * config/aarch64/aarch64-sve-builtins-base.cc
1731 (class svget_neonq_impl): New intrinsic implementation.
1732 (class svset_neonq_impl): Likewise.
1733 (class svdup_neonq_impl): Likewise.
1734 (NEON_SVE_BRIDGE_FUNCTION): New intrinsics.
1735 * config/aarch64/aarch64-sve-builtins-functions.h
1736 (NEON_SVE_BRIDGE_FUNCTION): Defines macro for NEON_SVE_BRIDGE
1738 * config/aarch64/aarch64-sve-builtins-shapes.h: New shapes.
1739 * config/aarch64/aarch64-sve-builtins-shapes.cc
1740 (parse_element_type): Add NEON element types.
1741 (parse_type): Likewise.
1742 (struct get_neonq_def): Defines function shape for get_neonq.
1743 (struct set_neonq_def): Defines function shape for set_neonq.
1744 (struct dup_neonq_def): Defines function shape for dup_neonq.
1745 * config/aarch64/aarch64-sve-builtins.cc
1746 (DEF_SVE_TYPE_SUFFIX): Changed to be called through
1748 (DEF_SVE_NEON_TYPE_SUFFIX): Defines
1749 macro for NEON_SVE_BRIDGE type suffixes.
1750 (DEF_NEON_SVE_FUNCTION): Defines
1751 macro for NEON_SVE_BRIDGE functions.
1752 (function_resolver::infer_neon128_vector_type): Infers type suffix
1753 for overloaded functions.
1754 (handle_arm_neon_sve_bridge_h): Handles #pragma arm_neon_sve_bridge.h.
1755 * config/aarch64/aarch64-sve-builtins.def
1756 (DEF_SVE_NEON_TYPE_SUFFIX): Macro for handling neon_sve type suffixes.
1757 (bf16): Replace entry with neon-sve entry.
1769 * config/aarch64/aarch64-sve-builtins.h
1770 (GCC_AARCH64_SVE_BUILTINS_H): Include aarch64-builtins.h.
1771 (ENTRY): Add aarch64_simd_type definiton.
1772 (enum aarch64_simd_type): Add neon information to type_suffix_info.
1773 (struct type_suffix_info): New function.
1774 * config/aarch64/aarch64-sve.md
1775 (@aarch64_sve_get_neonq_<mode>): New intrinsic insn for big endian.
1776 (@aarch64_sve_set_neonq_<mode>): Likewise.
1777 * config/aarch64/iterators.md: Add UNSPEC_SET_NEONQ.
1778 * config/aarch64/aarch64-builtins.h: New file.
1779 * config/aarch64/aarch64-neon-sve-bridge-builtins.def: New file.
1780 * config/aarch64/arm_neon_sve_bridge.h: New file.
1782 2023-12-13 Patrick Palka <ppalka@redhat.com>
1784 * doc/invoke.texi (C++ Dialect Options): Document
1785 -fdiagnostics-all-candidates.
1787 2023-12-13 Julian Brown <julian@codesourcery.com>
1789 * gimplify.cc (omp_map_clause_descriptor_p): New function.
1790 (build_omp_struct_comp_nodes, omp_get_attachment, omp_group_base): Use
1792 (omp_tsort_mapping_groups): Process nodes that have
1793 OMP_CLAUSE_MAP_RUNTIME_IMPLICIT_P set after those that don't. Add
1794 enter_exit_data parameter.
1795 (omp_resolve_clause_dependencies): Remove GOMP_MAP_TO_PSET mappings if
1796 we're mapping the whole containing derived-type variable.
1797 (omp_accumulate_sibling_list): Adjust GOMP_MAP_TO_PSET handling.
1798 Remove GOMP_MAP_ALWAYS_POINTER handling.
1799 (gimplify_scan_omp_clauses): Pass enter_exit argument to
1800 omp_tsort_mapping_groups. Don't adjust/remove GOMP_MAP_TO_PSET
1801 mappings for derived-type components here.
1802 * tree.h (OMP_CLAUSE_RELEASE_DESCRIPTOR): New macro.
1803 * tree-pretty-print.cc (dump_omp_clause): Show
1804 OMP_CLAUSE_RELEASE_DESCRIPTOR in dump output (with
1805 GOMP_MAP_TO_PSET-like syntax).
1807 2023-12-13 Julian Brown <julian@codesourcery.com>
1809 * gimplify.cc (build_struct_comp_nodes): Don't process
1810 GOMP_MAP_ATTACH_DETACH "middle" nodes here.
1811 (omp_mapping_group): Add REPROCESS_STRUCT and FRAGILE booleans for
1812 nested struct handling.
1813 (omp_strip_components_and_deref, omp_strip_indirections): Remove
1815 (omp_get_attachment): Handle GOMP_MAP_DETACH here.
1816 (omp_group_last): Handle GOMP_MAP_*, GOMP_MAP_DETACH,
1817 GOMP_MAP_ATTACH_DETACH groups for "exit data" of reference-to-pointer
1818 component array sections.
1819 (omp_gather_mapping_groups_1): Initialise reprocess_struct and fragile
1821 (omp_group_base): Handle GOMP_MAP_ATTACH_DETACH after GOMP_MAP_STRUCT.
1822 (omp_index_mapping_groups_1): Skip reprocess_struct groups.
1823 (omp_get_nonfirstprivate_group, omp_directive_maps_explicitly,
1824 omp_resolve_clause_dependencies, omp_first_chained_access_token): New
1826 (omp_check_mapping_compatibility): Adjust accepted node combinations
1827 for "from" clauses using release instead of alloc.
1828 (omp_accumulate_sibling_list): Add GROUP_MAP, ADDR_TOKENS, FRAGILE_P,
1829 REPROCESSING_STRUCT, ADDED_TAIL parameters. Use OMP address tokenizer
1830 to analyze addresses. Reimplement nested struct handling, and
1831 implement "fragile groups".
1832 (omp_build_struct_sibling_lists): Adjust for changes to
1833 omp_accumulate_sibling_list. Recalculate bias for ATTACH_DETACH nodes
1834 after GOMP_MAP_STRUCT nodes.
1835 (gimplify_scan_omp_clauses): Call omp_resolve_clause_dependencies. Use
1836 OMP address tokenizer.
1837 (gimplify_adjust_omp_clauses_1): Use build_fold_indirect_ref_loc
1838 instead of build_simple_mem_ref_loc.
1839 * omp-general.cc (omp-general.h, tree-pretty-print.h): Include.
1840 (omp_addr_tokenizer): New namespace.
1841 (omp_addr_tokenizer::omp_addr_token): New.
1842 (omp_addr_tokenizer::omp_parse_component_selector,
1843 omp_addr_tokenizer::omp_parse_ref,
1844 omp_addr_tokenizer::omp_parse_pointer,
1845 omp_addr_tokenizer::omp_parse_access_method,
1846 omp_addr_tokenizer::omp_parse_access_methods,
1847 omp_addr_tokenizer::omp_parse_structure_base,
1848 omp_addr_tokenizer::omp_parse_structured_expr,
1849 omp_addr_tokenizer::omp_parse_array_expr,
1850 omp_addr_tokenizer::omp_access_chain_p,
1851 omp_addr_tokenizer::omp_accessed_addr): New functions.
1852 (omp_parse_expr, debug_omp_tokenized_addr): New functions.
1853 * omp-general.h (omp_addr_tokenizer::access_method_kinds,
1854 omp_addr_tokenizer::structure_base_kinds,
1855 omp_addr_tokenizer::token_type,
1856 omp_addr_tokenizer::omp_addr_token,
1857 omp_addr_tokenizer::omp_access_chain_p,
1858 omp_addr_tokenizer::omp_accessed_addr): New.
1859 (omp_addr_token, omp_parse_expr): New.
1860 * omp-low.cc (scan_sharing_clauses): Skip error check for references
1862 * tree.h (OMP_CLAUSE_ATTACHMENT_MAPPING_ERASED): New macro.
1864 2023-12-13 Andrew Stubbs <ams@codesourcery.com>
1866 * config/gcn/gcn-hsa.h (NO_XNACK): Change the defaults.
1867 * config/gcn/gcn-opts.h (enum hsaco_attr_type): Add HSACO_ATTR_DEFAULT.
1868 * config/gcn/gcn.cc (gcn_option_override): Set the default flag_xnack.
1869 * config/gcn/gcn.opt: Add -mxnack=default.
1870 * doc/invoke.texi: Document the -mxnack default.
1872 2023-12-13 Andrew Stubbs <ams@codesourcery.com>
1874 * config/gcn/gcn-hsa.h (NO_XNACK): Ignore missing -march.
1875 (XNACKOPT): Match on/off; ignore any.
1876 * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>):
1877 Add xnack compatible alternatives.
1878 (gather<mode>_insn_2offsets<exec>): Likewise.
1879 * config/gcn/gcn.cc (gcn_option_override): Permit -mxnack for devices
1880 other than Fiji and gfx1030.
1881 (gcn_expand_epilogue): Remove early-clobber problems.
1882 (gcn_hsa_declare_function_name): Obey -mxnack setting.
1883 * config/gcn/gcn.md (xnack): New attribute.
1884 (enabled): Rework to include "xnack" attribute.
1885 (*movbi): Add xnack compatible alternatives.
1886 (*mov<mode>_insn): Likewise.
1887 (*mov<mode>_insn): Likewise.
1888 (*mov<mode>_insn): Likewise.
1889 (*movti_insn): Likewise.
1890 * config/gcn/gcn.opt (-mxnack): Change the default to "any".
1891 * doc/invoke.texi: Remove placeholder notice for -mxnack.
1893 2023-12-13 Andrew Carlotti <andrew.carlotti@arm.com>
1895 * config/aarch64/x-aarch64: Add missing dependencies.
1897 2023-12-13 Roger Sayle <roger@nextmovesoftware.com>
1898 Jeff Law <jlaw@ventanamicro.com>
1900 * config/arc/arc.md (*extvsi_n_0): New define_insn_and_split to
1901 implement SImode sign extract using a AND, XOR and MINUS sequence.
1903 2023-12-13 Feng Wang <wangfeng@eswincomputing.com>
1905 * common/config/riscv/riscv-common.cc: Modify implied ISA info.
1906 * config/riscv/arch-canonicalize: Add crypto vector implied info.
1908 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1912 * config/riscv/riscv-vsetvl.cc
1913 (pre_vsetvl::compute_lcm_local_properties): Remove full available.
1914 (pre_vsetvl::pre_global_vsetvl_info): Add full available optimization.
1916 2023-12-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1919 * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Adjust for COST for decrement IV.
1921 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1923 PR tree-optimization/112940
1924 * gimple-lower-bitint.cc (struct bitint_large_huge): Add another
1925 argument to prepare_data_in_out method defaulted to NULL_TREE.
1926 (bitint_large_huge::handle_operand): Pass another argument to
1927 prepare_data_in_out instead of emitting an assignment to set it.
1928 (bitint_large_huge::prepare_data_in_out): Add VAL_OUT argument.
1929 If non-NULL, use it as PHI argument instead of creating a new
1931 (bitint_large_huge::handle_cast): Pass rext as another argument
1932 to 2 prepare_data_in_out calls instead of emitting assignments
1935 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1937 PR middle-end/112953
1938 * attribs.cc (free_attr_data): Use delete x rather than delete[] x.
1940 2023-12-13 Jakub Jelinek <jakub@redhat.com>
1943 * config/i386/i386.cc (ix86_gimple_fold_builtin): For shifts
1944 and abs without lhs replace with nop.
1946 2023-12-13 Richard Biener <rguenther@suse.de>
1948 * emit-rtl.cc (set_mem_attributes_minus_bitpos): Preserve
1949 the offset when rewriting an exising MEM_REF base for
1952 2023-12-13 Richard Biener <rguenther@suse.de>
1954 PR tree-optimization/112991
1955 PR tree-optimization/112961
1956 * tree-ssa-sccvn.h (do_rpo_vn): Add skip_entry_phis argument.
1957 * tree-ssa-sccvn.cc (do_rpo_vn): Likewise.
1958 (do_rpo_vn_1): Likewise, merge with auto-processing.
1959 (run_rpo_vn): Adjust.
1960 (pass_fre::execute): Likewise.
1961 * tree-if-conv.cc (tree_if_conversion): Revert last change.
1962 Value-number latch block but disable value-numbering of
1964 * tree-ssa-uninit.cc (execute_early_warn_uninitialized): Adjust.
1966 2023-12-13 Richard Biener <rguenther@suse.de>
1968 PR tree-optimization/112990
1969 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..):
1970 Restrict to vector modes after lowering.
1972 2023-12-13 Richard Biener <rguenther@suse.de>
1974 PR middle-end/111591
1975 * cfgexpand.cc (update_alias_info_with_stack_vars): Document
1976 why not adjusting TBAA info on accesses is OK.
1978 2023-12-13 Alexandre Oliva <oliva@adacore.com>
1980 * doc/invoke.texi (multiflags): Drop extraneous period, use
1983 2023-12-13 Victor Do Nascimento <victor.donascimento@arm.com>
1985 * config/aarch64/aarch64-builtins.cc:
1986 (AARCH64_PLD): New enum aarch64_builtins entry.
1987 (AARCH64_PLDX): Likewise.
1988 (AARCH64_PLI): Likewise.
1989 (AARCH64_PLIX): Likewise.
1990 (aarch64_init_prefetch_builtin): New.
1991 (aarch64_general_init_builtins): Call prefetch init function.
1992 (aarch64_expand_prefetch_builtin): New.
1993 (aarch64_general_expand_builtin): Add prefetch expansion.
1994 (require_const_argument): New.
1995 * config/aarch64/aarch64.md (UNSPEC_PLDX): New.
1996 (aarch64_pldx): Likewise.
1997 * config/aarch64/arm_acle.h (__pld): Likewise.
2002 2023-12-13 Kewen Lin <linkw@linux.ibm.com>
2004 PR tree-optimization/112788
2005 * value-range.h (range_compatible_p): Workaround same type mode but
2006 different type precision issue for rs6000 scalar float types
2007 _Float128 and long double.
2009 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com>
2011 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add code to use
2012 pli for 34bit constant.
2014 2023-12-13 Jiufu Guo <guojiufu@linux.ibm.com>
2016 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add new
2017 parameter to record number of instructions to build the constant.
2018 (num_insns_constant_gpr): Call rs6000_emit_set_long_const to compute
2021 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2023 * config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo): New function.
2024 (costs::record_potential_vls_unrolling): Ditto.
2025 (costs::prefer_unrolled_loop): Ditto.
2026 (costs::better_main_loop_than_p): Ditto.
2027 (costs::add_stmt_cost): Ditto.
2028 * config/riscv/riscv-vector-costs.h (enum cost_type_enum): New enum.
2029 * config/riscv/t-riscv: Add new include files.
2031 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2033 * config/riscv/riscv-vector-costs.cc (get_current_lmul): Remove it.
2034 (compute_estimated_lmul): New function.
2035 (costs::costs): Refactor.
2036 (costs::preferred_new_lmul_p): Ditto.
2037 (preferred_new_lmul_p): Ditto.
2038 (costs::better_main_loop_than_p): Ditto.
2039 * config/riscv/riscv-vector-costs.h (struct autovec_info): Remove it.
2041 2023-12-12 Martin Jambor <mjambor@suse.cz>
2043 PR tree-optimization/112822
2044 * tree-sra.cc (load_assign_lhs_subreplacements): Invoke
2045 force_gimple_operand_gsi also when LHS has partial stores and RHS is a
2048 2023-12-12 Jason Merrill <jason@redhat.com>
2049 Nathaniel Shead <nathanieloshead@gmail.com>
2051 * tree-core.h (enum clobber_kind): Rename CLOBBER_EOL to
2052 CLOBBER_STORAGE_END. Add CLOBBER_STORAGE_BEGIN,
2053 CLOBBER_OBJECT_BEGIN, CLOBBER_OBJECT_END.
2054 * gimple-lower-bitint.cc
2055 * gimple-ssa-warn-access.cc
2058 * tree-ssa-ccp.cc: Adjust for rename.
2059 * tree-pretty-print.cc: And handle new values.
2061 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com>
2063 * config/aarch64/aarch64.cc (aarch64_override_options): Update.
2064 (aarch64_handle_attr_branch_protection): Update.
2065 * config/arm/aarch-common-protos.h (aarch_parse_branch_protection):
2067 (aarch_validate_mbranch_protection): Add new argument.
2068 * config/arm/aarch-common.cc (aarch_handle_no_branch_protection):
2070 (aarch_handle_standard_branch_protection): Update.
2071 (aarch_handle_pac_ret_protection): Update.
2072 (aarch_handle_pac_ret_leaf): Update.
2073 (aarch_handle_pac_ret_b_key): Update.
2074 (aarch_handle_bti_protection): Update.
2075 (aarch_parse_branch_protection): Remove.
2077 (aarch_validate_mbranch_protection): Rewrite.
2078 * config/arm/aarch-common.h (struct aarch_branch_protect_type):
2080 * config/arm/arm.cc (arm_configure_build_target): Update.
2082 2023-12-12 Szabolcs Nagy <szabolcs.nagy@arm.com>
2084 * config/aarch64/aarch64.cc (aarch64_override_options_after_change_1):
2085 Do not override branch_protection options.
2086 (aarch64_override_options): Remove accepted_branch_protection_string.
2087 * config/arm/aarch-common.cc (BRANCH_PROTECT_STR_MAX): Remove.
2088 (aarch_parse_branch_protection): Remove
2089 accepted_branch_protection_string.
2090 * config/arm/arm.cc: Likewise.
2092 2023-12-12 Richard Biener <rguenther@suse.de>
2094 PR tree-optimization/112736
2095 * tree-vect-stmts.cc (vectorizable_load): Extend optimization
2096 to avoid peeling for gaps to handle single-element non-groups
2097 we now allow with SLP.
2099 2023-12-12 Richard Biener <rguenther@suse.de>
2102 * ipa-icf.cc (sem_item_optimizer::merge_classes): Check
2103 both source and alias for the no_icf attribute.
2104 * doc/extend.texi (no_icf): Document variable attribute.
2106 2023-12-12 Richard Biener <rguenther@suse.de>
2108 PR tree-optimization/112961
2109 * tree-if-conv.cc (tree_if_conversion): Instead of excluding
2110 the latch block from VN, add a fake entry edge.
2112 2023-12-12 Xi Ruoyao <xry111@xry111.site>
2114 PR middle-end/107723
2115 * convert.cc (convert_to_integer_1) [case BUILT_IN_TRUNC]: Break
2116 early if !flag_fp_int_builtin_inexact and flag_trapping_math.
2118 2023-12-12 Pan Li <pan2.li@intel.com>
2120 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p):
2121 Disable the avl propogation for the vcompress.
2123 2023-12-12 Xi Ruoyao <xry111@xry111.site>
2125 * config/loongarch/loongarch-opts.h (la_target): Move into #if
2126 for loongarch-def.h.
2127 (loongarch_init_target): Likewise.
2128 (loongarch_config_target): Likewise.
2129 (loongarch_update_gcc_opt_status): Likewise.
2131 2023-12-12 Xi Ruoyao <xry111@xry111.site>
2133 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
2134 Return true for SYMBOL_PCREL64. Return true for SYMBOL_GOT_DISP
2135 if TARGET_CMODEL_EXTREME.
2136 (loongarch_split_symbol): Check for la_opt_explicit_relocs !=
2137 EXPLICIT_RELOCS_NONE instead of TARGET_EXPLICIT_RELOCS.
2138 (loongarch_print_operand_reloc): Likewise.
2139 (loongarch_option_override_internal): Likewise.
2140 (loongarch_handle_model_attribute): Likewise.
2141 * doc/invoke.texi (-mcmodel=extreme): Update the compatibility
2142 between it and -mexplicit-relocs=.
2144 2023-12-12 Richard Biener <rguenther@suse.de>
2146 PR tree-optimization/112939
2147 * tree-ssa-sccvn.cc (visit_phi): When all args are undefined
2148 make sure we end up with a value that was visited, otherwise
2149 fall back to .VN_TOP.
2151 2023-12-12 liuhongt <hongtao.liu@intel.com>
2154 * config/i386/i386.cc (ix86_avx_u128_mode_after): Return
2155 AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to
2156 align with ix86_avx_u128_mode_needed.
2157 (ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for
2160 2023-12-12 Alexandre Oliva <oliva@adacore.com>
2163 * builtins.h (target_builtins): Add fields for apply_args_size
2164 and apply_result_size.
2165 * builtins.cc (apply_args_size, apply_result_size): Cache
2166 results in fields rather than in static variables.
2167 (get_apply_args_size, set_apply_args_size): New.
2168 (get_apply_result_size, set_apply_result_size): New.
2170 2023-12-12 Hongyu Wang <hongyu.wang@intel.com>
2173 * config/i386/i386.md (ashl<mode>3): Add TARGET_APX_NDD to
2174 ix86_expand_binary_operator call.
2175 (<insn><mode>3): Likewise for rshift.
2176 (<insn>di3): Likewise for DImode rotate.
2177 (<insn><mode>3): Likewise for SWI124 rotate.
2179 2023-12-12 Feng Wang <wangfeng@eswincomputing.com>
2181 * config/riscv/riscv-vector-builtins-functions.def (DEF_RVV_FUNCTION):
2183 (read_vl): Using AVAIL argument default value.
2289 (vfrsub_frm): Ditto.
2292 (vfwadd_frm): Ditto.
2293 (vfwsub_frm): Ditto.
2299 (vfrdiv_frm): Ditto.
2301 (vfwmul_frm): Ditto.
2310 (vfmacc_frm): Ditto.
2311 (vfnmacc_frm): Ditto.
2312 (vfmsac_frm): Ditto.
2313 (vfnmsac_frm): Ditto.
2314 (vfmadd_frm): Ditto.
2315 (vfnmadd_frm): Ditto.
2316 (vfmsub_frm): Ditto.
2317 (vfnmsub_frm): Ditto.
2322 (vfwmacc_frm): Ditto.
2323 (vfwnmacc_frm): Ditto.
2324 (vfwmsac_frm): Ditto.
2325 (vfwnmsac_frm): Ditto.
2327 (vfsqrt_frm): Ditto.
2330 (vfrec7_frm): Ditto.
2349 (vfcvt_rtz_x): Ditto.
2350 (vfcvt_rtz_xu): Ditto.
2352 (vfcvt_x_frm): Ditto.
2353 (vfcvt_xu_frm): Ditto.
2354 (vfcvt_f_frm): Ditto.
2357 (vfwcvt_rtz_x): Ditto.
2358 (vfwcvt_rtz_xu) Ditto.:
2360 (vfwcvt_x_frm): Ditto.
2361 (vfwcvt_xu_frm) Ditto.:
2364 (vfncvt_rtz_x): Ditto.
2365 (vfncvt_rtz_xu): Ditto.
2367 (vfncvt_rod_f): Ditto.
2368 (vfncvt_x_frm): Ditto.
2369 (vfncvt_xu_frm): Ditto.
2370 (vfncvt_f_frm): Ditto.
2385 (vfredusum_frm): Ditto.
2386 (vfredosum_frm): Ditto.
2387 (vfwredosum): Ditto.
2388 (vfwredusum): Ditto.
2389 (vfwredosum_frm): Ditto.
2390 (vfwredusum_frm): Ditto.
2415 (vslidedown): Ditto.
2417 (vslide1down): Ditto.
2418 (vfslide1up): Ditto.
2419 (vfslide1down): Ditto.
2421 (vrgatherei16): Ditto.
2423 (vundefined): Ditto.
2424 (vreinterpret): Ditto.
2426 (vlmul_trunc): Ditto.
2439 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Using variadic macro.
2440 * config/riscv/riscv-vector-builtins.h (struct function_group_info):
2441 Add avail function interface into struct.
2442 * config/riscv/t-riscv: Add dependency
2443 * config/riscv/riscv-vector-builtins-avail.h: New file.The definition of AVAIL marco.
2445 2023-12-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2447 * config/riscv/riscv-protos.h (estimated_poly_value): New function.
2448 * config/riscv/riscv-v.cc (estimated_poly_value): Ditto.
2449 * config/riscv/riscv.cc (riscv_estimated_poly_value): Move RVV POLY
2450 VALUE estimation to riscv-v.cc
2452 2023-12-12 Yang Yujie <yangyujie@loongson.cn>
2454 * config/loongarch/loongarch.cc: Do not restore the saved eh_return
2455 data registers ($r4-$r7) for a normal return of a function that calls
2456 __builtin_eh_return elsewhere.
2457 * config/loongarch/loongarch-protos.h: Same.
2458 * config/loongarch/loongarch.md: Same.
2460 2023-12-11 Richard Sandiford <richard.sandiford@arm.com>
2462 * recog.cc (constrain_operands): Pass VOIDmode to
2463 strict_memory_address_p for 'p' constraints in asms.
2464 * rtl-ssa/changes.cc (recog_level2): Skip redundant constrain_operands
2467 2023-12-11 Jason Merrill <jason@redhat.com>
2469 * common.opt: Add comment.
2471 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2473 PR middle-end/112784
2474 * expr.cc (emit_block_move_via_loop): Call int_mode_for_size
2475 for maybe-too-wide sizes.
2476 (emit_block_cmp_via_loop): Likewise.
2478 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2481 * builtins.cc (can_store_by_multiple_pieces): New.
2482 (try_store_by_multiple_pieces): Call it.
2484 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2487 * builtins.cc (try_store_by_multiple_pieces): Use ptr's mode
2490 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2492 * doc/invoke.texi (multiflags): Add period after @xref to
2495 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2497 * config/rl78/rl78.cc (TARGET_HAVE_STRUB_SUPPORT_FOR): Disable.
2499 2023-12-11 Alexandre Oliva <oliva@adacore.com>
2501 * ipa-strub.cc (pass_ipa_strub::execute): Check that we don't
2502 add indirection to pointer parameters, and document attribute
2503 access non-interactions.
2505 2023-12-11 Roger Sayle <roger@nextmovesoftware.com>
2507 PR rtl-optimization/112380
2508 * combine.cc (expand_field_assignment): Check if gen_lowpart
2509 returned a CLOBBER, and avoid calling gen_simplify_binary with
2512 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2515 * config/aarch64/aarch64.cc (aarch64_float_const_representable_p): For BFmode,
2518 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2520 PR tree-optimization/111972
2521 PR tree-optimization/110637
2522 * match.pd (`(convert)(zeroone !=/== CST)`): Match
2523 and simplify to ((convert)zeroone){,^1}.
2524 * fold-const.cc (fold_binary_loc): Remove
2525 transformation of `(~a) & 1` and `(a ^ 1) & 1`
2526 into `(convert)(a == 0)`.
2528 2023-12-11 Andrew Pinski <quic_apinski@quicinc.com>
2530 PR middle-end/112935
2531 * expr.cc (expand_expr_real_2): Use
2532 gimple_zero_one_valued_p instead of tree_nonzero_bits
2533 to find boolean defined expressions.
2535 2023-12-11 Mikael Pettersson <mikpelinux@gmail.com>
2538 * config/m68k/linux.h (ASM_RETURN_CASE_JUMP): For
2539 TARGET_LONG_JUMP_TABLE_OFFSETS, reference the jump table
2541 * config/m68k/m68kelf.h (ASM_RETURN_CASE_JUMP): Likewise.
2542 * config/m68k/netbsd-elf.h (ASM_RETURN_CASE_JUMP): Likewise.
2544 2023-12-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
2546 * config/aarch64/aarch64.cc (lane_size): New function.
2547 (aarch64_simd_clone_compute_vecsize_and_simdlen): Determine simdlen according to NDS rule
2548 and reject combination of simdlen and types that lead to vectors larger than 128bits.
2550 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2552 * rtl-ssa/insns.cc (function_info::record_use): Add !ordered_p case.
2554 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2556 * config/riscv/riscv-v.cc (get_gather_index_mode): New function.
2557 (shuffle_series_patterns): Robostify shuffle index.
2558 (shuffle_generic_patterns): Ditto.
2560 2023-12-11 Victor Do Nascimento <victor.donascimento@arm.com>
2562 * config/aarch64/arm_neon.h (vldap1_lane_u64): Add
2563 `const' to `__builtin_aarch64_simd_di *' cast.
2564 (vldap1q_lane_u64): Likewise.
2565 (vldap1_lane_s64): Cast __src to `const __builtin_aarch64_simd_di *'.
2566 (vldap1q_lane_s64): Likewise.
2567 (vldap1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2568 (vldap1q_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2569 (vldap1_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
2570 (vldap1q_lane_p64): Add `const' to `__builtin_aarch64_simd_di *' cast.
2571 (vstl1_lane_u64): remove stray `const'.
2572 (vstl1_lane_s64): Cast __src to `__builtin_aarch64_simd_di *'.
2573 (vstl1q_lane_s64): Likewise.
2574 (vstl1_lane_f64): Cast __src to `const __builtin_aarch64_simd_df *'.
2575 (vstl1q_lane_f64): Likewise.
2577 2023-12-11 Robin Dapp <rdapp@ventanamicro.com>
2580 * config/riscv/riscv-v.cc (expand_const_vector): Fix step
2582 (modulo_sel_indices): Also perform modulo for variable-length
2584 (shuffle_series): Recognize series permutations.
2585 (expand_vec_perm_const_1): Add shuffle_series.
2587 2023-12-11 liuhongt <hongtao.liu@intel.com>
2589 * match.pd (VCE (a cmp b ? -1 : 0) < 0) ? c : d ---> (VCE ((a
2590 cmp b) ? (VCE:c) : (VCE:d))): New gimple simplication.
2592 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2595 * config/riscv/vector.md: Support highest overlap for wv instructions.
2597 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2599 * config/riscv/riscv-vsetvl.cc (extract_single_source): Fix ICE.
2601 2023-12-11 Jakub Jelinek <jakub@redhat.com>
2603 * doc/extend.texi (__sync_fetch_and_add, __sync_fetch_and_sub,
2604 __sync_fetch_and_or, __sync_fetch_and_and, __sync_fetch_and_xor,
2605 __sync_fetch_and_nand, __sync_add_and_fetch, __sync_sub_and_fetch,
2606 __sync_or_and_fetch, __sync_and_and_fetch, __sync_xor_and_fetch,
2607 __sync_nand_and_fetch, __sync_bool_compare_and_swap,
2608 __sync_val_compare_and_swap, __sync_lock_test_and_set,
2609 __sync_lock_release, __atomic_load_n, __atomic_load, __atomic_store_n,
2610 __atomic_store, __atomic_exchange_n, __atomic_exchange,
2611 __atomic_compare_exchange_n, __atomic_compare_exchange,
2612 __atomic_add_fetch, __atomic_sub_fetch, __atomic_and_fetch,
2613 __atomic_xor_fetch, __atomic_or_fetch, __atomic_nand_fetch,
2614 __atomic_fetch_add, __atomic_fetch_sub, __atomic_fetch_and,
2615 __atomic_fetch_xor, __atomic_fetch_or, __atomic_fetch_nand,
2616 __atomic_test_and_set, __atomic_clear, __atomic_thread_fence,
2617 __atomic_signal_fence, __atomic_always_lock_free,
2618 __atomic_is_lock_free, __builtin_add_overflow,
2619 __builtin_sadd_overflow, __builtin_saddl_overflow,
2620 __builtin_saddll_overflow, __builtin_uadd_overflow,
2621 __builtin_uaddl_overflow, __builtin_uaddll_overflow,
2622 __builtin_sub_overflow, __builtin_ssub_overflow,
2623 __builtin_ssubl_overflow, __builtin_ssubll_overflow,
2624 __builtin_usub_overflow, __builtin_usubl_overflow,
2625 __builtin_usubll_overflow, __builtin_mul_overflow,
2626 __builtin_smul_overflow, __builtin_smull_overflow,
2627 __builtin_smulll_overflow, __builtin_umul_overflow,
2628 __builtin_umull_overflow, __builtin_umulll_overflow,
2629 __builtin_add_overflow_p, __builtin_sub_overflow_p,
2630 __builtin_mul_overflow_p, __builtin_addc, __builtin_addcl,
2631 __builtin_addcll, __builtin_subc, __builtin_subcl, __builtin_subcll,
2632 __builtin_alloca, __builtin_alloca_with_align,
2633 __builtin_alloca_with_align_and_max, __builtin_speculation_safe_value,
2634 __builtin_nan, __builtin_nand32, __builtin_nand64, __builtin_nand128,
2635 __builtin_nanf, __builtin_nanl, __builtin_nanf@var{n},
2636 __builtin_nanf@var{n}x, __builtin_nans, __builtin_nansd32,
2637 __builtin_nansd64, __builtin_nansd128, __builtin_nansf,
2638 __builtin_nansl, __builtin_nansf@var{n}, __builtin_nansf@var{n}x,
2639 __builtin_ffs, __builtin_clz, __builtin_ctz, __builtin_clrsb,
2640 __builtin_popcount, __builtin_parity, __builtin_bswap16,
2641 __builtin_bswap32, __builtin_bswap64, __builtin_bswap128,
2642 __builtin_extend_pointer, __builtin_goacc_parlevel_id,
2643 __builtin_goacc_parlevel_size, vec_clrl, vec_clrr, vec_mulh, vec_mul,
2644 vec_div, vec_dive, vec_mod, __builtin_rx_mvtc): Use @var{...} around
2646 (vec_rl, vec_sl, vec_sr, vec_sra): Likewise. Use @var{...} also
2647 around A, B and R in description.
2649 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2651 * config/riscv/riscv-selftests.cc (riscv_run_selftests):
2652 Remove poly self test when FIXED-VLMAX.
2654 2023-12-11 Fei Gao <gaofei@eswincomputing.com>
2655 Xiao Zeng <zengxiao@eswincomputing.com>
2657 * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for AND.
2658 (noce_bbs_ok_for_cond_zero_arith): Likewise.
2659 (noce_try_cond_zero_arith): Likewise.
2661 2023-12-11 liuhongt <hongtao.liu@intel.com>
2664 * config/i386/mmx.md (*xop_pcmov_<mode>): New define_insn.
2666 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org>
2669 * config/rs6000/rs6000.h (TARGET_FCTID): Define.
2670 * config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID.
2671 * (lround<mode>di2): Replace TARGET_FPRND with TARGET_FCTID.
2673 2023-12-11 Haochen Gui <guihaoc@gcc.gnu.org>
2676 * config/rs6000/rs6000.md (expand lrint<mode>si2): New.
2677 (insn lrint<mode>si2): Rename to...
2678 (*lrint<mode>si): ...this.
2679 (lrint<mode>si_di): New.
2681 2023-12-10 Fei Gao <gaofei@eswincomputing.com>
2682 Xiao Zeng <zengxiao@eswincomputing.com>
2684 * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for shift
2687 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
2691 * config/aarch64/aarch64-protos.h (aarch64_sve_reinterpret): Declare.
2692 * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): New function.
2693 * config/aarch64/aarch64-sve-builtins-sme.cc (svread_za_impl::expand)
2694 (svwrite_za_impl::expand): Use it to cast the SVE register to the
2697 2023-12-10 Richard Sandiford <richard.sandiford@arm.com>
2700 * config/aarch64/aarch64.cc (aarch64_sme_mode_switch_regs::add_reg):
2701 Force specific SVE modes for single registers as well as structures.
2703 2023-12-10 Jason Merrill <jason@redhat.com>
2705 * doc/invoke.texi (-fpermissive): Mention ObjC++ for -Wnarrowing.
2707 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2709 * config/h8300/addsub.md (uaddv<mode>4, usubv<mode>4): New expanders.
2710 (uaddv): New define_insn_and_split plus post-reload pattern.
2712 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2714 * config/h8300/h8300-protos.h (use_extvsi): Prototype.
2715 * config/h8300/combiner.md: Two new define_insn_and_split patterns
2716 to implement signed bitfield extractions.
2717 * config/h8300/h8300.cc (use_extvsi): New function.
2719 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2721 * config/h8300/combiner.md (single bit signed bitfield extraction): Fix
2722 length computation when the bit we want is in the low half word.
2724 2023-12-10 Jeff Law <jlaw@ventanamicro.com>
2726 * config/h8300/h8300.cc (compute_a_shift_length): Fix computation
2727 of logical shifts on the H8/SX.
2729 2023-12-09 Jakub Jelinek <jakub@redhat.com>
2731 PR tree-optimization/112887
2732 * tree-ssa-phiopt.cc (hoist_adjacent_loads): Change type of
2733 param_align, param_align_bits, offset1, offset2, size2 and align1
2734 variables from int or unsigned int to unsigned HOST_WIDE_INT.
2736 2023-12-09 Costas Argyris <costas.argyris@gmail.com>
2737 Jakub Jelinek <jakub@redhat.com>
2740 * gcc.cc (driver::finalize): Call XDELETEVEC on mdswitches before
2743 2023-12-09 Jakub Jelinek <jakub@redhat.com>
2745 * attribs.h (any_nonignored_attribute_p): Declare.
2746 * attribs.cc (any_nonignored_attribute_p): New function.
2748 2023-12-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2751 * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs.
2753 2023-12-09 Alexandre Oliva <oliva@adacore.com>
2755 * tree-emutls.cc: Include diagnostic-core.h.
2756 (pass_ipa_lower_emutls::gate): Skip if errors were seen.
2758 2023-12-08 Vladimir N. Makarov <vmakarov@redhat.com>
2760 PR rtl-optimization/112875
2761 * lra-eliminations.cc (lra_eliminate_regs_1): Change an assert.
2762 Add ASM_OPERANDS case.
2764 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
2767 * config/riscv/riscv-protos.h (expand_strcmp): Declare.
2768 * config/riscv/riscv-string.cc (riscv_expand_strcmp): Add
2769 strategy handling and delegation to scalar and vector expanders.
2770 (expand_strcmp): Vectorized implementation.
2771 * config/riscv/riscv.md: Add TARGET_VECTOR to strcmp and strncmp
2774 2023-12-08 Robin Dapp <rdapp@ventanamicro.com>
2777 * config/riscv/riscv-protos.h (expand_rawmemchr): Add strlen
2779 * config/riscv/riscv-string.cc (riscv_expand_strlen): Call
2781 (expand_rawmemchr): Add strlen handling.
2782 * config/riscv/riscv.md: Add TARGET_VECTOR to strlen expander.
2784 2023-12-08 Richard Sandiford <richard.sandiford@arm.com>
2786 * config/aarch64/aarch64-early-ra.cc (allocno_info::chain_next):
2787 Put into an enum with...
2788 (allocno_info::last_def_point): ...new member variable.
2789 (allocno_info::m_current_bb_point): New member variable.
2790 (likely_operand_match_p): Switch based on get_constraint_type,
2791 rather than based on rtx code. Handle relaxed and special memory
2793 (early_ra::record_copy): Allow the source of an equivalence to be
2794 assigned to more than once.
2795 (early_ra::record_allocno_use): Invalidate any previous equivalence.
2796 Initialize last_def_point.
2797 (early_ra::record_allocno_def): Set last_def_point.
2798 (early_ra::valid_equivalence_p): New function, split out from...
2799 (early_ra::record_copy): ...here. Use last_def_point to handle
2800 source registers that have a later definition.
2801 (make_pass_aarch64_early_ra): Fix comment.
2803 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2806 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2808 * config/arm/arm_neon.h
2809 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
2810 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
2811 (vld1q_f16_x2, vld1q_f32_x2): New.
2812 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
2813 (vld1q_bf16_x2): New.
2814 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
2815 * config/arm/neon.md (vld1_x2<mode>): New.
2817 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2820 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2822 * config/arm/arm_neon.h
2823 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
2824 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
2825 (vld1q_f16_x3, vld1q_f32_x3): New.
2826 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
2827 (vld1q_bf16_x3): New.
2828 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
2829 * config/arm/neon.md (vld1_x3<mode>): New.
2831 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2834 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2836 * config/arm/arm_neon.h
2837 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
2838 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
2839 (vld1q_f16_x4, vld1q_f32_x4): New.
2840 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
2841 (vld1q_bf16_x4): New.
2842 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
2843 * config/arm/neon.md (vld1_x4<mode>): New.
2845 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2848 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2850 * config/arm/arm_neon.h
2851 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
2852 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
2853 (vst1_f16_x2, vst1_f32_x2): New.
2854 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
2855 (vst1_bf16_x2): New.
2856 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
2857 * config/arm/neon.md (vst1_x2<mode>): New.
2859 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2862 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2864 * config/arm/arm_neon.h
2865 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
2866 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
2867 (vst1_f16_x3, vst1_f32_x3): New.
2868 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
2869 (vst1_bf16_x3): New.
2870 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
2871 * config/arm/neon.md (vst1_x3<mode>): New.
2873 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2876 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2878 * config/arm/arm_neon.h
2879 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
2880 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
2881 (vst1_f16_x4, vst1_f32_x4): New.
2882 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
2883 (vst1_bf16_x4): New.
2884 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
2885 * config/arm/neon.md (vst1_x4<mode>): New.
2887 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2890 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2892 * config/arm/arm_neon.h
2893 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
2894 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
2895 (vst1q_f16_x2, vst1q_f32_x2): New.
2896 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
2897 (vst1q_bf16_x2): New.
2898 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
2899 * config/arm/neon.md
2900 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
2902 * config/arm/iterators.md (VMEMX2): New mode iterator.
2903 (VMEMX2_q): New mode attribute.
2905 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2908 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2910 * config/arm/arm_neon.h
2911 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
2912 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
2913 (vst1q_f16_x3, vst1q_f32_x3): New.
2914 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
2915 (vst1q_bf16_x3): New.
2916 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
2917 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
2919 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2922 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2924 * config/arm/arm_neon.h
2925 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
2926 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
2927 (vst1q_f16_x4, vst1q_f32_x4): New.
2928 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
2929 (vst1q_bf16_x4): New.
2930 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
2931 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
2933 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2936 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2938 * config/arm/arm_neon.h
2939 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
2940 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
2941 (vld1_f16_x2, vld1_f32_x2): New.
2942 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
2943 (vld1_bf16_x2): New.
2944 (vld1q_types_x2): Updated to use vld1q_x2 from
2945 arm_neon_builtins.def
2946 * config/arm/arm_neon_builtins.def
2947 (vld1_x2): Updated entries.
2948 (vld1q_x2): New entries, but comes from the old vld1_x2
2949 * config/arm/neon.md
2950 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
2951 from neon_vld1_x2<mode>.
2953 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2956 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2958 * config/arm/arm_neon.h
2959 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
2960 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
2961 (vld1_f16_x3, vld1_f32_x3): New.
2962 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
2963 (vld1_bf16_x3): New.
2964 (vld1q_types_x3): Updated to use vld1q_x3 from
2965 arm_neon_builtins.def
2966 * config/arm/arm_neon_builtins.def
2967 (vld1_x3): Updated entries.
2968 (vld1q_x3): New entries, but comes from the old vld1_x2
2969 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
2972 2023-12-08 Richard Earnshaw <rearnsha@arm.com>
2975 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
2977 * config/arm/arm_neon.h
2978 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
2979 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
2980 (vld1_f16_x4, vld1_f32_x4): New.
2981 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
2982 (vld1_bf16_x4): New.
2983 (vld1q_types_x4): Updated to use vld1q_x4
2984 from arm_neon_builtins.def
2985 * config/arm/arm_neon_builtins.def
2986 (vld1_x4): Updated entries.
2987 (vld1q_x4): New entries, but comes from the old vld1_x2
2988 * config/arm/neon.md (neon_vld1q_x4<mode>):
2989 Updated from neon_vld1_x4<mode>.
2991 2023-12-08 Tobias Burnus <tobias@codesourcery.com>
2993 * builtin-types.def (BT_FN_PTR_PTR_SIZE_PTRMODE_PTRMODE): New.
2994 * omp-builtins.def (BUILT_IN_GOMP_REALLOC): New.
2995 * builtins.cc (builtin_fnspec): Handle it.
2996 * gimple-ssa-warn-access.cc (fndecl_alloc_p,
2997 matching_alloc_calls_p): Likewise.
2998 * gimple.cc (nonfreeing_call_p): Likewise.
2999 * predict.cc (expr_expected_value_1): Likewise.
3000 * tree-ssa-ccp.cc (evaluate_stmt): Likewise.
3001 * tree.cc (fndecl_dealloc_argno): Likewise.
3003 2023-12-08 Richard Biener <rguenther@suse.de>
3005 PR tree-optimization/112909
3006 * tree-ssa-uninit.cc (find_uninit_use): Look through a
3007 single level of SSA name copies with single use.
3009 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3011 * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Use
3012 simplify_gen_subreg instead of gen_rtx_SUBREG.
3013 (loongarch_expand_vec_perm_const_2): Ditto.
3014 (loongarch_expand_vec_cond_expr): Ditto.
3016 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3018 * config/loongarch/loongarch.cc (loongarch_vector_costs::determine_suggested_unroll_factor):
3019 If m_has_recip is true, uf return 1.
3020 (loongarch_vector_costs::add_stmt_cost): Detect the use of approximate instruction sequence.
3022 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3024 * config/loongarch/genopts/loongarch.opt.in (recip_mask): New variable.
3025 (-mrecip, -mrecip): New options.
3026 * config/loongarch/lasx.md (div<mode>3): New expander.
3027 (*div<mode>3): Rename.
3028 (sqrt<mode>2): New expander.
3029 (*sqrt<mode>2): Rename.
3030 (rsqrt<mode>2): New expander.
3031 * config/loongarch/loongarch-protos.h (loongarch_emit_swrsqrtsf): New prototype.
3032 (loongarch_emit_swdivsf): Ditto.
3033 * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set
3034 recip_mask for -mrecip and -mrecip= options.
3035 (loongarch_emit_swrsqrtsf): New function.
3036 (loongarch_emit_swdivsf): Ditto.
3037 * config/loongarch/loongarch.h (RECIP_MASK_NONE, RECIP_MASK_DIV, RECIP_MASK_SQRT
3038 RECIP_MASK_RSQRT, RECIP_MASK_VEC_DIV, RECIP_MASK_VEC_SQRT, RECIP_MASK_VEC_RSQRT
3039 RECIP_MASK_ALL): New bitmasks.
3040 (TARGET_RECIP_DIV, TARGET_RECIP_SQRT, TARGET_RECIP_RSQRT, TARGET_RECIP_VEC_DIV
3041 TARGET_RECIP_VEC_SQRT, TARGET_RECIP_VEC_RSQRT): New tests.
3042 * config/loongarch/loongarch.md (sqrt<mode>2): New expander.
3043 (*sqrt<mode>2): Rename.
3044 (rsqrt<mode>2): New expander.
3045 * config/loongarch/loongarch.opt (recip_mask): New variable.
3046 (-mrecip, -mrecip): New options.
3047 * config/loongarch/lsx.md (div<mode>3): New expander.
3048 (*div<mode>3): Rename.
3049 (sqrt<mode>2): New expander.
3050 (*sqrt<mode>2): Rename.
3051 (rsqrt<mode>2): New expander.
3052 * config/loongarch/predicates.md (reg_or_vecotr_1_operand): New predicate.
3053 * doc/invoke.texi (LoongArch Options): Document new options.
3055 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3057 * config/loongarch/lasx.md (lasx_xvfrecip_<flasxfmt>): Renamed to ..
3058 (recip<mode>3): .. this.
3059 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vfrecip_d): Redefine
3060 to new pattern name.
3061 (CODE_FOR_lsx_vfrecip_s): Ditto.
3062 (CODE_FOR_lasx_xvfrecip_d): Ditto.
3063 (CODE_FOR_lasx_xvfrecip_s): Ditto.
3064 (loongarch_expand_builtin_direct): For the vector recip instructions, construct a
3065 temporary parameter const1_vector.
3066 * config/loongarch/lsx.md (lsx_vfrecip_<flsxfmt>): Renamed to ..
3067 (recip<mode>3): .. this.
3068 * config/loongarch/predicates.md (const_vector_1_operand): New predicate.
3070 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3072 * config/loongarch/lasx.md (lasx_xvfrsqrt_<flasxfmt>): Renamed to ..
3073 (rsqrt<mode>2): .. this.
3074 * config/loongarch/loongarch-builtins.cc
3075 (CODE_FOR_lsx_vfrsqrt_d): Redefine to standard pattern name.
3076 (CODE_FOR_lsx_vfrsqrt_s): Ditto.
3077 (CODE_FOR_lasx_xvfrsqrt_d): Ditto.
3078 (CODE_FOR_lasx_xvfrsqrt_s): Ditto.
3079 * config/loongarch/loongarch.cc (use_rsqrt_p): New function.
3080 (loongarch_optab_supported_p): Ditto.
3081 (TARGET_OPTAB_SUPPORTED_P): New hook.
3082 * config/loongarch/loongarch.md (*rsqrt<mode>a): Remove.
3083 (*rsqrt<mode>2): New insn pattern.
3084 (*rsqrt<mode>b): Remove.
3085 * config/loongarch/lsx.md (lsx_vfrsqrt_<flsxfmt>): Renamed to ..
3086 (rsqrt<mode>2): .. this.
3088 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3090 * config/loongarch/genopts/isa-evolution.in (fecipe): Add.
3091 * config/loongarch/larchintrin.h (__frecipe_s): New intrinsic.
3092 (__frecipe_d): Ditto.
3093 (__frsqrte_s): Ditto.
3094 (__frsqrte_d): Ditto.
3095 * config/loongarch/lasx.md (lasx_xvfrecipe_<flasxfmt>): New insn pattern.
3096 (lasx_xvfrsqrte_<flasxfmt>): Ditto.
3097 * config/loongarch/lasxintrin.h (__lasx_xvfrecipe_s): New intrinsic.
3098 (__lasx_xvfrecipe_d): Ditto.
3099 (__lasx_xvfrsqrte_s): Ditto.
3100 (__lasx_xvfrsqrte_d): Ditto.
3101 * config/loongarch/loongarch-builtins.cc (AVAIL_ALL): Add predicates.
3102 (LSX_EXT_BUILTIN): New macro.
3103 (LASX_EXT_BUILTIN): Ditto.
3104 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
3105 * config/loongarch/loongarch-c.cc: Add builtin macro "__loongarch_frecipe".
3106 * config/loongarch/loongarch-def.cc: Regenerate.
3107 * config/loongarch/loongarch-str.h (OPTSTR_FRECIPE): Regenerate.
3108 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump status for TARGET_FRECIPE.
3109 * config/loongarch/loongarch.md (loongarch_frecipe_<fmt>): New insn pattern.
3110 (loongarch_frsqrte_<fmt>): Ditto.
3111 * config/loongarch/loongarch.opt: Regenerate.
3112 * config/loongarch/lsx.md (lsx_vfrecipe_<flsxfmt>): New insn pattern.
3113 (lsx_vfrsqrte_<flsxfmt>): Ditto.
3114 * config/loongarch/lsxintrin.h (__lsx_vfrecipe_s): New intrinsic.
3115 (__lsx_vfrecipe_d): Ditto.
3116 (__lsx_vfrsqrte_s): Ditto.
3117 (__lsx_vfrsqrte_d): Ditto.
3118 * doc/extend.texi: Add documentation for LoongArch new builtins and intrinsics.
3120 2023-12-08 Richard Biener <rguenther@suse.de>
3122 * tree-outof-ssa.cc (rewrite_out_of_ssa): Dump GIMPLE once only,
3123 after final IL adjustments.
3125 2023-12-08 Pan Li <pan2.li@intel.com>
3127 * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF
3128 for mode attr V_F2DI_CONVERT_BRIDGE.
3130 2023-12-08 Jiahao Xu <xujiahao@loongson.cn>
3132 * config/loongarch/lasx.md (xorsign<mode>3): New expander.
3133 * config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow
3134 conversion between LSX vector mode and scalar fp mode.
3135 * config/loongarch/loongarch.md (@xorsign<mode>3): New expander.
3136 * config/loongarch/lsx.md (@xorsign<mode>3): Ditto.
3138 2023-12-08 Jakub Jelinek <jakub@redhat.com>
3140 PR tree-optimization/112902
3141 * gimple-lower-bitint.cc (gimple_lower_bitint): For a narrowing
3142 or same precision cast don't set SSA_NAME_VERSION in m_names only
3143 if use_stmt is mergeable_op or fall through into the check that
3144 use is a store or rhs1 is not mergeable or other reasons prevent
3147 2023-12-08 Jakub Jelinek <jakub@redhat.com>
3149 PR tree-optimization/112901
3151 (simplify_using_ranges::simplify_float_conversion_using_ranges):
3152 Return false if rhs1 has BITINT_TYPE type with BLKmode TYPE_MODE.
3154 2023-12-08 Jakub Jelinek <jakub@redhat.com>
3156 PR middle-end/112411
3157 * haifa-sched.cc (extend_h_i_d): Use 3U instead of 3 in
3158 3 * get_max_uid () / 2 calculation.
3160 2023-12-08 Lulu Cheng <chenglulu@loongson.cn>
3162 * config/loongarch/genopts/loongarch-strings: Delete STR_ISA_BASE_LA64V110.
3163 * config/loongarch/genopts/loongarch.opt.in: Likewise.
3164 * config/loongarch/loongarch-cpu.cc (ISA_BASE_LA64V110_FEATURES): Delete macro.
3165 (fill_native_cpu_config): Define a new variable hw_isa_evolution record the
3166 extended instruction set support read from cpucfg.
3167 * config/loongarch/loongarch-def.cc: Set evolution at initialization.
3168 * config/loongarch/loongarch-def.h (ISA_BASE_LA64V100): Delete.
3169 (ISA_BASE_LA64V110): Likewise.
3170 (N_ISA_BASE_TYPES): Likewise.
3171 (defined): Likewise.
3172 * config/loongarch/loongarch-opts.cc: Likewise.
3173 * config/loongarch/loongarch-opts.h (TARGET_64BIT): Likewise.
3174 (ISA_BASE_IS_LA64V110): Likewise.
3175 * config/loongarch/loongarch-str.h (STR_ISA_BASE_LA64V110): Likewise.
3176 * config/loongarch/loongarch.opt: Regenerate.
3178 2023-12-08 Xi Ruoyao <xry111@xry111.site>
3180 * config/loongarch/loongarch-def.h: Remove extern "C".
3181 (loongarch_isa_base_strings): Declare as loongarch_def_array
3182 instead of plain array.
3183 (loongarch_isa_ext_strings): Likewise.
3184 (loongarch_abi_base_strings): Likewise.
3185 (loongarch_abi_ext_strings): Likewise.
3186 (loongarch_cmodel_strings): Likewise.
3187 (loongarch_cpu_strings): Likewise.
3188 (loongarch_cpu_default_isa): Likewise.
3189 (loongarch_cpu_issue_rate): Likewise.
3190 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
3191 (loongarch_cpu_cache): Likewise.
3192 (loongarch_cpu_align): Likewise.
3193 (loongarch_cpu_rtx_cost_data): Likewise.
3194 (loongarch_isa): Add a constructor and field setter functions.
3195 * config/loongarch/loongarch-opts.h (loongarch-defs.h): Do not
3196 include for target libraries.
3197 * config/loongarch/loongarch-opts.cc: Comment code that doesn't
3198 run and causes compilation errors.
3199 * config/loongarch/loongarch-tune.h (LOONGARCH_TUNE_H): Likewise.
3200 (struct loongarch_rtx_cost_data): Likewise.
3201 (struct loongarch_cache): Likewise.
3202 (struct loongarch_align): Likewise.
3203 * config/loongarch/t-loongarch: Compile loongarch-def.cc with the
3205 * config/loongarch/loongarch-def-array.h: New file for a
3206 std:array like data structure with position setter function.
3207 * config/loongarch/loongarch-def.c: Rename to ...
3208 * config/loongarch/loongarch-def.cc: ... here.
3209 (loongarch_cpu_strings): Define as loongarch_def_array instead
3211 (loongarch_cpu_default_isa): Likewise.
3212 (loongarch_cpu_cache): Likewise.
3213 (loongarch_cpu_align): Likewise.
3214 (loongarch_cpu_rtx_cost_data): Likewise.
3215 (loongarch_cpu_issue_rate): Likewise.
3216 (loongarch_cpu_multipass_dfa_lookahead): Likewise.
3217 (loongarch_isa_base_strings): Likewise.
3218 (loongarch_isa_ext_strings): Likewise.
3219 (loongarch_abi_base_strings): Likewise.
3220 (loongarch_abi_ext_strings): Likewise.
3221 (loongarch_cmodel_strings): Likewise.
3222 (abi_minimal_isa): Likewise.
3223 (loongarch_rtx_cost_optimize_size): Use field setter functions
3224 instead of designated initializers.
3225 (loongarch_rtx_cost_data): Implement default constructor.
3227 2023-12-08 Jakub Jelinek <jakub@redhat.com>
3229 PR middle-end/112411
3230 * params.opt (-param=min-nondebug-insn-uid=): Add
3231 IntegerRange(0, 1073741824).
3232 * lra.cc (check_and_expand_insn_recog_data): Use 3U rather than 3
3233 in * 3 / 2 computation and if the result is smaller or equal to
3234 index, use index + 1.
3236 2023-12-08 Haochen Jiang <haochen.jiang@intel.com>
3238 * config/i386/driver-i386.cc (host_detect_local_cpu):
3239 Do not append "-mno-" for Xeon Phi ISAs.
3240 * config/i386/i386-options.cc (ix86_option_override_internal):
3241 Emit a warning for KNL/KNM targets.
3242 * config/i386/i386.opt: Emit a warning for Xeon Phi ISAs.
3244 2023-12-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3246 * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p):
3247 Remove redundant check.
3249 2023-12-08 Hao Liu <hliu@os.amperecomputing.com>
3251 PR tree-optimization/112774
3252 * tree-pretty-print.cc: if nonwrapping flag is set, chrec will be
3253 printed with additional <nw> info.
3254 * tree-scalar-evolution.cc: add record_nonwrapping_chrec and
3255 nonwrapping_chrec_p to set and check the new flag respectively.
3256 * tree-scalar-evolution.h: Likewise.
3257 * tree-ssa-loop-niter.cc (idx_infer_loop_bounds,
3258 infer_loop_bounds_from_pointer_arith, infer_loop_bounds_from_signedness,
3259 scev_probably_wraps_p): call record_nonwrapping_chrec before
3260 record_nonwrapping_iv, call nonwrapping_chrec_p to check the flag is
3261 set and return false from scev_probably_wraps_p.
3262 * tree-vect-loop.cc (vect_analyze_loop): call
3263 free_numbers_of_iterations_estimates explicitly.
3264 * tree-core.h: document the nothrow_flag usage in CHREC_NOWRAP
3265 * tree.h: add CHREC_NOWRAP(NODE), base.nothrow_flag is used to
3266 represent the nonwrapping info.
3268 2023-12-08 Fei Gao <gaofei@eswincomputing.com>
3270 * ifcvt.cc (noce_try_cond_zero_arith): New function.
3271 (noce_emit_czero, get_base_reg): Likewise.
3272 (noce_cond_zero_binary_op_supported): Likewise.
3273 (noce_bbs_ok_for_cond_zero_arith): Likewise.
3274 (noce_process_if_block): Use noce_try_cond_zero_arith.
3275 Co-authored-by: Xiao Zeng<zengxiao@eswincomputing.com>
3277 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3279 * config/riscv/riscv-protos.h (expand_vec_series): Adapt function.
3280 * config/riscv/riscv-v.cc (rvv_builder::double_steps_npatterns_p): New function.
3281 (expand_vec_series): Adapt function.
3282 (expand_const_vector): Support new interleave vector with different step.
3284 2023-12-07 Richard Sandiford <richard.sandiford@arm.com>
3286 PR rtl-optimization/106694
3287 PR rtl-optimization/109078
3288 PR rtl-optimization/109391
3289 * config.gcc: Add aarch64-early-ra.o for AArch64 targets.
3290 * config/aarch64/t-aarch64 (aarch64-early-ra.o): New rule.
3291 * config/aarch64/aarch64-opts.h (aarch64_early_ra_scope): New enum.
3292 * config/aarch64/aarch64.opt (mearly_ra): New option.
3293 * doc/invoke.texi: Document it.
3294 * common/config/aarch64/aarch64-common.cc
3295 (aarch_option_optimization_table): Use -mearly-ra=strided by
3296 default for -O2 and above.
3297 * config/aarch64/aarch64-passes.def (pass_aarch64_early_ra): New pass.
3298 * config/aarch64/aarch64-protos.h (aarch64_strided_registers_p)
3299 (make_pass_aarch64_early_ra): Declare.
3300 * config/aarch64/aarch64-sme.md (@aarch64_sme_lut<LUTI_BITS><mode>):
3301 Add a stride_type attribute.
3302 (@aarch64_sme_lut<LUTI_BITS><mode>_strided2): New pattern.
3303 (@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise.
3304 * config/aarch64/aarch64-sve-builtins-base.cc (svld1_impl::expand)
3305 (svldnt1_impl::expand, svst1_impl::expand, svstn1_impl::expand): Handle
3306 new way of defining multi-register loads and stores.
3307 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
3308 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
3309 (@aarch64_stnt1<SVE_FULLx24:mode>): Delete.
3310 * config/aarch64/aarch64-sve2.md (@aarch64_<LD1_COUNT:optab><mode>)
3311 (@aarch64_<LD1_COUNT:optab><mode>_strided2): New patterns.
3312 (@aarch64_<LD1_COUNT:optab><mode>_strided4): Likewise.
3313 (@aarch64_<ST1_COUNT:optab><mode>): Likewise.
3314 (@aarch64_<ST1_COUNT:optab><mode>_strided2): Likewise.
3315 (@aarch64_<ST1_COUNT:optab><mode>_strided4): Likewise.
3316 * config/aarch64/aarch64.cc (aarch64_strided_registers_p): New
3318 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): Delete.
3319 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
3320 (UNSPEC_STNT1_SVE_COUNT): Likewise.
3321 (stride_type): New attribute.
3322 * config/aarch64/constraints.md (Uwd, Uwt): New constraints.
3323 * config/aarch64/iterators.md (UNSPEC_LD1_COUNT, UNSPEC_LDNT1_COUNT)
3324 (UNSPEC_ST1_COUNT, UNSPEC_STNT1_COUNT): New unspecs.
3325 (optab): Handle them.
3326 (LD1_COUNT, ST1_COUNT): New iterators.
3327 * config/aarch64/aarch64-early-ra.cc: New file.
3329 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3331 * config/arm/arm_neon.h
3332 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
3333 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
3334 (vld1_f16_x4, vld1_f32_x4): New.
3335 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
3336 (vld1_bf16_x4): New.
3337 (vld1q_types_x4): Updated to use vld1q_x4
3338 from arm_neon_builtins.def
3339 * config/arm/arm_neon_builtins.def
3340 (vld1_x4): Updated entries.
3341 (vld1q_x4): New entries, but comes from the old vld1_x2
3342 * config/arm/neon.md (neon_vld1q_x4<mode>):
3343 Updated from neon_vld1_x4<mode>.
3345 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3347 * config/arm/arm_neon.h
3348 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New
3349 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
3350 (vld1_f16_x3, vld1_f32_x3): New.
3351 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
3352 (vld1_bf16_x3): New.
3353 (vld1q_types_x3): Updated to use vld1q_x3 from
3354 arm_neon_builtins.def
3355 * config/arm/arm_neon_builtins.def
3356 (vld1_x3): Updated entries.
3357 (vld1q_x3): New entries, but comes from the old vld1_x2
3358 * config/arm/neon.md (neon_vld1q_x3<mode>): Updated from
3361 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3363 * config/arm/arm_neon.h
3364 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New
3365 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
3366 (vld1_f16_x2, vld1_f32_x2): New.
3367 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
3368 (vld1_bf16_x2): New.
3369 (vld1q_types_x2): Updated to use vld1q_x2 from
3370 arm_neon_builtins.def
3371 * config/arm/arm_neon_builtins.def
3372 (vld1_x2): Updated entries.
3373 (vld1q_x2): New entries, but comes from the old vld1_x2
3374 * config/arm/neon.md
3375 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated
3376 from neon_vld1_x2<mode>.
3378 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3380 * config/arm/arm_neon.h
3381 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
3382 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
3383 (vst1q_f16_x4, vst1q_f32_x4): New.
3384 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
3385 (vst1q_bf16_x4): New.
3386 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
3387 * config/arm/neon.md (neon_vst1q_x4<mode>): New.
3389 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3391 * config/arm/arm_neon.h
3392 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
3393 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
3394 (vst1q_f16_x3, vst1q_f32_x3): New.
3395 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
3396 (vst1q_bf16_x3): New.
3397 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
3398 * config/arm/neon.md (neon_vst1q_x3<mode>): New.
3400 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3402 * config/arm/arm_neon.h
3403 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
3404 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
3405 (vst1q_f16_x2, vst1q_f32_x2): New.
3406 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
3407 (vst1q_bf16_x2): New.
3408 * config/arm/arm_neon_builtins.def (vst1q_x2): New entries.
3409 * config/arm/neon.md
3410 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
3412 * config/arm/iterators.md (VMEMX2): New mode iterator.
3413 (VMEMX2_q): New mode attribute.
3415 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3417 * config/arm/arm_neon.h
3418 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
3419 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
3420 (vst1_f16_x4, vst1_f32_x4): New.
3421 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
3422 (vst1_bf16_x4): New.
3423 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
3424 * config/arm/neon.md (vst1_x4<mode>): New.
3426 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3428 * config/arm/arm_neon.h
3429 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
3430 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
3431 (vst1_f16_x3, vst1_f32_x3): New.
3432 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
3433 (vst1_bf16_x3): New.
3434 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
3435 * config/arm/neon.md (vst1_x3<mode>): New.
3437 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3439 * config/arm/arm_neon.h
3440 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
3441 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
3442 (vst1_f16_x2, vst1_f32_x2): New.
3443 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
3444 (vst1_bf16_x2): New.
3445 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
3446 * config/arm/neon.md (vst1_x2<mode>): New.
3448 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3450 * config/arm/arm_neon.h
3451 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
3452 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
3453 (vld1q_f16_x4, vld1q_f32_x4): New.
3454 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
3455 (vld1q_bf16_x4): New.
3456 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
3457 * config/arm/neon.md (vld1_x4<mode>): New.
3459 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3461 * config/arm/arm_neon.h
3462 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
3463 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
3464 (vld1q_f16_x3, vld1q_f32_x3): New.
3465 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
3466 (vld1q_bf16_x3): New.
3467 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
3468 * config/arm/neon.md (vld1_x3<mode>): New.
3470 2023-12-07 Ezra Sitorus <ezra.sitorus@arm.com>
3472 * config/arm/arm_neon.h
3473 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
3474 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
3475 (vld1q_f16_x2, vld1q_f32_x2): New.
3476 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
3477 (vld1q_bf16_x2): New.
3478 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
3479 * config/arm/neon.md (vld1_x2<mode>): New.
3481 2023-12-07 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3483 * config/s390/vecintrin.h (vec_step): Expand vec_step to
3484 __builtin_s390_vec_step.
3486 2023-12-07 Alexandre Oliva <oliva@adacore.com>
3488 * target.def (have_strub_support_for): New hook.
3489 * doc/tm.texi.in: Document it.
3490 * doc/tm.texi: Rebuild.
3491 * ipa-strub.cc: Include target.h.
3492 (strub_target_support_p): New.
3493 (can_strub_p): Call it. Test for no flag_split_stack.
3494 (pass_ipa_strub::adjust_at_calls_call): Check for target
3496 * config/nvptx/nvptx.cc (TARGET_HAVE_STRUB_SUPPORT_FOR):
3498 * doc/sourcebuild.texi (strub): Document new effective
3501 2023-12-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3503 * config/riscv/riscv-avlprop.cc (simplify_replace_avl): New function.
3504 (simplify_replace_vlmax_avl): Fix bug.
3505 * config/riscv/t-riscv: Add a new include file.
3507 2023-12-07 Christoph Müllner <christoph.muellner@vrull.eu>
3509 * config/riscv/thead.cc (th_memidx_classify_address_index):
3510 Require TARGET_XTHEADMEMIDX for FP modes.
3511 * config/riscv/thead.md: Require TARGET_XTHEADMEMIDX for all
3512 XTheadFMemIdx pattern.
3514 2023-12-07 Jakub Jelinek <jakub@redhat.com>
3516 PR middle-end/112881
3517 * expr.cc (count_type_elements): Handle BITINT_TYPE like INTEGER_TYPE.
3519 2023-12-07 Jakub Jelinek <jakub@redhat.com>
3521 PR tree-optimization/112880
3522 * tree-ssa-dce.cc (maybe_optimize_arith_overflow): Use
3523 unsigned_type_for instead of conditionally calling
3524 build_nonstandard_integer_type.
3526 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3528 * config/aarch64/arm_neon.h (vldap1_lane_u64): New.
3529 (vldap1q_lane_u64): Likewise.
3530 (vldap1_lane_s64): Likewise.
3531 (vldap1q_lane_s64): Likewise.
3532 (vldap1_lane_f64): Likewise.
3533 (vldap1q_lane_f64): Likewise.
3534 (vldap1_lane_p64): Likewise.
3535 (vldap1q_lane_p64): Likewise.
3536 (vstl1_lane_u64): Likewise.
3537 (vstl1q_lane_u64): Likewise.
3538 (vstl1_lane_s64): Likewise.
3539 (vstl1q_lane_s64): Likewise.
3540 (vstl1_lane_f64): Likewise.
3541 (vstl1q_lane_f64): Likewise.
3542 (vstl1_lane_p64): Likewise.
3543 (vstl1q_lane_p64): Likewise.
3545 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3547 * config/aarch64/aarch64-simd-builtins.def
3548 (vec_ldap1_lane): New.
3549 (vec_stl1_lane): Likewise.
3550 * config/aarch64/aarch64-simd.md
3551 (aarch64_vec_stl1_lanes<mode>_lane<Vel>): New.
3552 (aarch64_vec_stl1_lane<mode>): Likewise.
3553 (aarch64_vec_ldap1_lanes<mode>_lane<Vel>): Likewise.
3554 (aarch64_vec_ldap1_lane<mode>): Likewise.
3555 * config/aarch64/aarch64.md (UNSPEC_LDAP1_LANE): New.
3556 (UNSPEC_STL1_LANE): Likewise.
3558 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3560 * config/aarch64/iterators.md (V12DIF): New.
3562 (VEL): Add support for all V12DIF-associated modes.
3563 (Vetype): Add support for V1DI and V1DF.
3566 2023-12-07 Victor Do Nascimento <victor.donascimento@arm.com>
3568 * config/aarch64/aarch64-option-extensions.def (rcpc3): New.
3569 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC3): Likewise.
3570 (TARGET_RCPC3): Likewise.
3571 * doc/invoke.texi (rcpc3): Document feature in AArch64 Options.
3573 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3575 * config/i386/i386-expand.cc (ix86_split_ashl_ndd): New
3576 function to split NDD form lshift.
3577 (ix86_split_rshift_ndd): Likewise for l/ashiftrt.
3578 * config/i386/i386-protos.h (ix86_split_ashl_ndd): New
3580 (ix86_split_rshift_ndd): Likewise.
3581 * config/i386/i386.md (ashl<mode>3_doubleword): Add NDD
3582 alternative, call ndd split function when operands[0]
3583 not equal to operands[1].
3584 (define_split for doubleword lshift): Likewise.
3585 (define_peephole for doubleword lshift): Likewise.
3586 (<insn><mode>3_doubleword): Likewise for l/ashiftrt.
3587 (define_split for doubleword l/ashiftrt): Likewise.
3588 (define_peephole for doubleword l/ashiftrt): Likewise.
3590 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3592 * config/i386/i386.md (*mov<mode>cc_noc): Extend with new constraints
3594 (*movsicc_noc_zext): Likewise.
3595 (*movsicc_noc_zext_1): Likewise.
3596 (*movqicc_noc): Likewise.
3598 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3600 * config/i386/i386.md (x86_64_shld_ndd): New define_insn.
3601 (x86_64_shld_ndd_1): Likewise.
3602 (*x86_64_shld_ndd_2): Likewise.
3603 (x86_shld_ndd): Likewise.
3604 (x86_shld_ndd_1): Likewise.
3605 (*x86_shld_ndd_2): Likewise.
3606 (x86_64_shrd_ndd): Likewise.
3607 (x86_64_shrd_ndd_1): Likewise.
3608 (*x86_64_shrd_ndd_2): Likewise.
3609 (x86_shrd_ndd): Likewise.
3610 (x86_shrd_ndd_1): Likewise.
3611 (*x86_shrd_ndd_2): Likewise.
3612 (*x86_64_shld_shrd_1_nozext): Adjust codegen under TARGET_APX_NDD.
3613 (*x86_shld_shrd_1_nozext): Likewise.
3614 (*x86_64_shrd_shld_1_nozext): Likewise.
3615 (*x86_shrd_shld_1_nozext): Likewise.
3617 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3619 * config/i386/i386.md (*<insn><mode>3_1): Extend with a new
3620 alternative to support NDD for SI/DI rotate, and adjust output
3622 (*<insn>si3_1_zext): Likewise.
3623 (*<insn><mode>3_1): Likewise for QI/HI modes.
3624 (rcrsi2): Likewise, and use nonimmediate_operand for operands[1]
3625 to accept memory input for NDD alternative.
3628 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3630 * config/i386/i386.md (ashr<mode>3_cvt): Extend with new
3631 alternatives to support NDD, and adjust output templates.
3632 (*ashr<mode>3_1): Likewise for SI/DI mode.
3633 (*lshr<mode>3_1): Likewise.
3634 (*<insn>si3_1_zext): Likewise.
3635 (*ashr<mode>3_1): Likewise for QI/HI mode.
3636 (*lshrqi3_1): Likewise.
3637 (*lshrhi3_1): Likewise.
3638 (<insn><mode>3_cmp): Likewise.
3639 (*<insn><mode>3_cconly): Likewise.
3640 (*ashrsi3_cvt_zext): Likewise, and use nonimmediate_operand for
3641 operands[1] to accept memory input for NDD alternative.
3642 (*highpartdisi2): Likewise.
3643 (*<insn>si3_cmp_zext): Likewise.
3644 (<insn><mode>3_carry): Likewise.
3646 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3648 * config/i386/i386.md (*ashl<mode>3_1): Extend with new
3649 alternatives to support NDD, limit the new alternative to
3650 generate sal only, and adjust output template for NDD.
3651 (*ashlsi3_1_zext): Likewise.
3652 (*ashlhi3_1): Likewise.
3653 (*ashlqi3_1): Likewise.
3654 (*ashl<mode>3_cmp): Likewise.
3655 (*ashlsi3_cmp_zext): Likewise, and use nonimmediate_operand for
3656 operands[1] to accept memory input for NDD alternative.
3657 (*ashl<mode>3_cconly): Likewise.
3658 (*ashl<dwi>3_doubleword_highpart): Adjust codegen for NDD.
3660 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3662 * config/i386/i386.md (<code><mode>3): Add new alternative for NDD
3663 and adjust output templates.
3664 (*<code><mode>_1): Likewise.
3665 (*<code>qi_1): Likewise.
3666 (*notxor<mode>_1): Likewise.
3667 (*<code>si_1_zext): Likewise.
3668 (*notxorqi_1): Likewise.
3669 (*<code><mode>_2): Likewise.
3670 (*<code>si_2_zext): Likewise.
3671 (*<code>si_2_zext_imm): Likewise.
3672 (*<code>si_1_zext_imm): Likewise, and use nonimmediate_operand for
3673 operands[1] to accept memory input for NDD alternative.
3674 (*one_cmplsi2_2_zext): Likewise.
3675 (define_split for *one_cmplsi2_2_zext): Use nonimmediate_operand for
3677 (*<code><dwi>3_doubleword): Add NDD constraints, adopt '&' to NDD dest
3678 and emit move for optimized case if operands[0] != operands[1] or
3679 operands[4] != operands[5].
3680 (define_split for QI highpart OR/XOR): Prohibit splitter to split NDD
3681 form OR/XOR insn to <any_logic:code>qi_ext<mode>_3.
3682 (define_split for QI strict_lowpart optimization): Prohibit splitter to
3683 split NDD form AND insn to *<code><mode>3_1_slp.
3685 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3687 * config/i386/i386.md (and<mode>3): Add NDD alternatives and adjust
3689 (*anddi_1): Likewise.
3690 (*and<mode>_1): Likewise.
3691 (*andqi_1): Likewise.
3692 (*andsi_1_zext): Likewise.
3693 (*anddi_2): Likewise.
3694 (*andsi_2_zext): Likewise.
3695 (*andqi_2_maybe_si): Likewise.
3696 (*and<mode>_2): Likewise.
3697 (*and<dwi>3_doubleword): Add NDD alternative, adopt '&' to NDD dest and
3698 emit move for optimized case if operands[0] not equal to operands[1].
3699 (define_split for QI highpart AND): Prohibit splitter to split NDD
3700 form AND insn to <any_logic:code>qi_ext<mode>_3.
3701 (define_split for QI strict_lowpart optimization): Prohibit splitter to
3702 split NDD form AND insn to *<code><mode>3_1_slp.
3703 (define_split for zero_extend and optimization): Prohibit splitter to
3704 split NDD form AND insn to zero_extend insn.
3706 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3708 * config/i386/i386.md (one_cmpl<mode>2): Add new constraints for NDD
3709 and adjust output template.
3710 (*one_cmpl<mode>2_1): Likewise.
3711 (*one_cmplqi2_1): Likewise.
3712 (*one_cmpl<dwi>2_doubleword): Likewise, and adopt '&' to NDD dest.
3713 (*one_cmpl<mode>2_2): Likewise.
3714 (*one_cmplsi2_1_zext): Likewise, and use nonimmediate_operand for
3715 operands[1] to accept memory input for NDD alternative.
3717 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3719 * config/i386/i386-expand.cc (ix86_expand_unary_operator): Add use_ndd
3720 parameter and adjust for NDD.
3721 * config/i386/i386-protos.h: Add use_ndd parameter for
3722 ix86_unary_operator_ok and ix86_expand_unary_operator.
3723 * config/i386/i386.cc (ix86_unary_operator_ok): Add use_ndd parameter
3725 * config/i386/i386.md (neg<mode>2): Add new constraint for NDD and
3726 adjust output template.
3727 (*neg<mode>_1): Likewise.
3728 (*neg<dwi>2_doubleword): Likewise and adopt '&' to NDD dest.
3729 (*neg<mode>_2): Likewise.
3730 (*neg<mode>_ccc_1): Likewise.
3731 (*neg<mode>_ccc_2): Likewise.
3732 (*negsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
3733 to accept memory input for NDD alternatives.
3734 (*negsi_2_zext): Likewise.
3736 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3738 * config/i386/i386.md (*sub<dwi>3_doubleword): Add new alternative for
3739 NDD, adopt '&' modifier to NDD dest and emit move when operands[0] not
3740 equal to operands[1].
3741 (*sub<dwi>3_doubleword_zext): Likewise.
3742 (*subv<dwi>4_doubleword): Likewise.
3743 (*subv<dwi>4_doubleword_1): Likewise.
3744 (*subv<mode>4_overflow_1): Add NDD alternatives and adjust output
3746 (*subv<mode>4_overflow_2): Likewise.
3747 (@sub<mode>3_carry): Likewise.
3748 (*addsi3_carry_zext_0r): Likewise, and use nonimmediate_operand for
3749 operands[1] to accept memory input for NDD alternative.
3750 (*subsi3_carry_zext): Likewise.
3751 (subborrow<mode>): Parse TARGET_APX_NDD to ix86_binary_operator_ok.
3752 (subborrow<mode>_0): Likewise.
3753 (*sub<mode>3_eq): Likewise.
3754 (*sub<mode>3_ne): Likewise.
3755 (*sub<mode>3_eq_1): Likewise.
3757 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3759 * config/i386/i386-expand.cc (ix86_fixup_binary_operands_no_copy):
3760 Add use_ndd parameter and parse it.
3761 * config/i386/i386-protos.h (ix86_fixup_binary_operands_no_copy):
3763 * config/i386/i386.md (sub<mode>3): Add new alternatives for NDD
3764 and adjust output templates.
3765 (*sub<mode>_1): Likewise.
3766 (*sub<mode>_2): Likewise.
3767 (subv<mode>4): Likewise.
3768 (*subv<mode>4): Likewise.
3769 (subv<mode>4_1): Likewise.
3770 (usubv<mode>4): Likewise.
3771 (*sub<mode>_3): Likewise.
3772 (*subsi_1_zext): Likewise, and use nonimmediate_operand for operands[1]
3773 to accept memory input for NDD alternatives.
3774 (*subsi_2_zext): Likewise.
3775 (*subsi_3_zext): Likewise.
3777 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3779 * config/i386/i386.md (*add<dwi>3_doubleword): Add ndd alternatives,
3780 adopt '&' to ndd dest and move operands[1] to operands[0] when they are
3782 (*add<dwi>3_doubleword_cc_overflow_1): Likewise.
3783 (*addv<dwi>4_doubleword): Likewise.
3784 (*addv<dwi>4_doubleword_1): Likewise.
3785 (*add<dwi>3_doubleword_zext): Likewise.
3786 (addv<mode>4_overflow_1): Add ndd alternatives.
3787 (*addv<mode>4_overflow_2): Likewise.
3788 (@add<mode>3_carry): Likewise.
3789 (*add<mode>3_carry_0): Likewise.
3790 (*addsi3_carry_zext): Likewise.
3791 (addcarry<mode>): Likewise.
3792 (addcarry<mode>_0): Likewise.
3793 (*addcarry<mode>_1): Likewise.
3794 (*add<mode>3_eq): Likewise.
3795 (*add<mode>3_ne): Likewise.
3796 (*addsi3_carry_zext_0): Likewise, and use nonimmediate_operand for
3797 operands[1] to accept memory input for NDD alternative.
3799 2023-12-07 Hongyu Wang <hongyu.wang@intel.com>
3801 * config/i386/constraints.md (je): New constraint.
3802 * config/i386/i386-protos.h (x86_poff_operand_p): New function to
3803 check any *POFF constant in operand.
3804 * config/i386/i386.cc (x86_poff_operand_p): New prototype.
3805 * config/i386/i386.md (*add<mode>_1): Split out je alternative for add.
3807 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3809 * config/i386/i386.md: (addsi_1_zext): Add new alternatives for
3810 NDD and adjust output templates.
3811 (*add<mode>_2): Likewise.
3812 (*addsi_2_zext): Likewise.
3813 (*add<mode>_3): Likewise.
3814 (*addsi_3_zext): Likewise.
3815 (*adddi_4): Likewise.
3816 (*add<mode>_4): Likewise.
3817 (*add<mode>_5): Likewise.
3818 (*addv<mode>4): Likewise.
3819 (*addv<mode>4_1): Likewise.
3820 (*add<mode>3_cconly_overflow_1): Likewise.
3821 (*add<mode>3_cc_overflow_1): Likewise.
3822 (*addsi3_zext_cc_overflow_1): Likewise.
3823 (*add<mode>3_cconly_overflow_2): Likewise.
3824 (*add<mode>3_cc_overflow_2): Likewise.
3825 (*addsi3_zext_cc_overflow_2): Likewise.
3827 2023-12-07 Kong Lingling <lingling.kong@intel.com>
3829 * config/i386/i386-expand.cc (ix86_fixup_binary_operands): Add
3830 new use_ndd flag to check whether ndd can be used for this binop
3831 and adjust operand emit.
3832 (ix86_binary_operator_ok): Likewise.
3833 (ix86_expand_binary_operator): Likewise, and void postreload
3834 expand generate lea pattern when use_ndd is explicit parsed.
3835 * config/i386/i386-options.cc (ix86_option_override_internal):
3836 Prohibit apx subfeatures when not in 64bit mode.
3837 * config/i386/i386-protos.h (ix86_binary_operator_ok):
3839 (ix86_fixup_binary_operand): Likewise.
3840 (ix86_expand_binary_operand): Likewise.
3841 * config/i386/i386.md (*add<mode>_1): Extend with new alternatives
3842 to support NDD, and adjust output template.
3843 (*addhi_1): Likewise.
3844 (*addqi_1): Likewise.
3846 2023-12-07 David Malcolm <dmalcolm@redhat.com>
3850 * doc/invoke.texi: Add -Wanalyzer-symbol-too-complex.
3852 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3854 * config/riscv/riscv-vsetvl.cc (extract_single_source): new function.
3855 (pre_vsetvl::compute_lcm_local_properties): Fix ICE.
3857 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3859 * config/aarch64/aarch64-builtins.cc (AARCH64_RSR128): New
3860 `enum aarch64_builtins' value.
3861 (AARCH64_WSR128): Likewise.
3862 (aarch64_init_rwsr_builtins): Init `__builtin_aarch64_rsr128'
3863 and `__builtin_aarch64_wsr128' builtins.
3864 (aarch64_expand_rwsr_builtin): Extend function to handle
3865 `__builtin_aarch64_{rsr|wsr}128'.
3866 * config/aarch64/aarch64-protos.h (aarch64_retrieve_sysreg):
3867 Update function signature.
3868 * config/aarch64/aarch64.cc (F_REG_128): New.
3869 (aarch64_retrieve_sysreg): Add 128-bit register mode check.
3870 * config/aarch64/aarch64.md (UNSPEC_SYSREG_RTI): New.
3871 (UNSPEC_SYSREG_WTI): Likewise.
3872 (aarch64_read_sysregti): Likewise.
3873 (aarch64_write_sysregti): Likewise.
3874 * config/aarch64/arm_acle.h (__arm_rsr128): New.
3875 (__arm_wsr128): Likewise.
3877 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3879 * config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
3881 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3883 * config/aarch64/aarch64-option-extensions.def (gcs): New.
3884 * config/aarch64/aarch64.h (AARCH64_ISA_GCS): New.
3885 (TARGET_THE): Likewise.
3886 * doc/invoke.texi (AArch64 Options): Describe GCS.
3888 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
3890 * config/aarch64/aarch64-c.cc (__ARM_FEATURE_SYSREG128): New.
3891 * config/aarch64/aarch64-arches.def (armv8.9-a): New.
3892 (armv9.4-a): Likewise.
3893 * config/aarch64/aarch64-option-extensions.def (d128): Likewise.
3895 * config/aarch64/aarch64.h (AARCH64_ISA_V9_4A): Likewise.
3896 (AARCH64_ISA_V8_9A): Likewise.
3897 (TARGET_ARMV9_4): Likewise.
3898 (AARCH64_ISA_D128): Likewise.
3899 (AARCH64_ISA_THE): Likewise.
3900 (TARGET_D128): Likewise.
3901 * doc/invoke.texi (AArch64 Options): Document new -march flags
3904 2023-12-06 Eric Gallager <egallager@gcc.gnu.org>
3906 * Makefile.in: Remove qmtest-related targets.
3908 2023-12-06 David Malcolm <dmalcolm@redhat.com>
3910 * common.opt (fdiagnostics-json-formatting): New.
3911 * diagnostic-format-json.cc: Add "formatted" boolean
3912 to json_output_format and subclasses, and to the
3913 diagnostic_output_format_init_json_* functions. Use it when
3915 * diagnostic-format-sarif.cc: Likewise for sarif_builder,
3916 sarif_output_format, and the various
3917 diagnostic_output_format_init_sarif_* functions.
3918 * diagnostic.cc (diagnostic_output_format_init): Add
3919 "json_formatting" boolean and pass on to the various cases.
3920 * diagnostic.h (diagnostic_output_format_init): Add
3921 "json_formatted" param.
3922 (diagnostic_output_format_init_json_stderr): Add "formatted" param
3923 (diagnostic_output_format_init_json_file): Likewise.
3924 (diagnostic_output_format_init_sarif_stderr): Likewise.
3925 (diagnostic_output_format_init_sarif_file): Likewise.
3926 (diagnostic_output_format_init_sarif_stream): Likewise.
3927 * doc/invoke.texi (-fdiagnostics-format=json): Remove discussion
3928 about JSON output needing formatting.
3929 (-fno-diagnostics-json-formatting): Add.
3930 * gcc.cc (driver_handle_option): Use
3931 opts->x_flag_diagnostics_json_formatting.
3932 * gcov.cc (generate_results): Pass "false" for new formatting
3933 option when printing json.
3934 * json.cc (value::dump): Add new "formatted" param.
3935 (object::print): Likewise, using it to add whitespace to format
3937 (array::print): Likewise.
3938 (float_number::print): Add new "formatted" param.
3939 (integer_number::print): Likewise.
3940 (string::print): Likewise.
3941 (literal::print): Likewise.
3942 (selftest::assert_print_eq): Add "formatted" param.
3943 (ASSERT_PRINT_EQ): Add "FORMATTED" param.
3944 (selftest::test_writing_objects): Test both formatted and
3945 unformatted printing.
3946 (selftest::test_writing_arrays): Likewise.
3947 (selftest::test_writing_float_numbers): Update for new param of
3949 (selftest::test_writing_integer_numbers): Likewise.
3950 (selftest::test_writing_strings): Likewise.
3951 (selftest::test_writing_literals): Likewise.
3952 (selftest::test_formatting): New.
3953 (selftest::json_cc_tests): Call it.
3954 * json.h (value::print): Add "formatted" param.
3955 (value::dump): Likewise.
3956 (object::print): Likewise.
3957 (array::print): Likewise.
3958 (float_number::print): Likewise.
3959 (integer_number::print): Likewise.
3960 (string::print): Likewise.
3961 (literal::print): Likewise.
3962 * optinfo-emit-json.cc (optrecord_json_writer::write): Pass
3963 "false" for new formatting option when printing json.
3964 (selftest::test_building_json_from_dump_calls): Likewise.
3965 * opts.cc (common_handle_option): Use
3966 opts->x_flag_diagnostics_json_formatting.
3968 2023-12-06 David Malcolm <dmalcolm@redhat.com>
3970 * diagnostic-format-json.cc (on_begin_diagnostic): Convert param
3972 (on_end_diagnostic): Likewise.
3973 (json_output_format::on_end_diagnostic): Likewise.
3974 * diagnostic-format-sarif.cc
3975 (sarif_invocation::add_notification_for_ice): Likewise.
3976 (sarif_result::on_nested_diagnostic): Likewise.
3977 (sarif_ice_notification::sarif_ice_notification): Likewise.
3978 (sarif_builder::end_diagnostic): Likewise.
3979 (sarif_builder::make_result_object): Likewise.
3980 (make_reporting_descriptor_object_for_warning): Likewise.
3981 (sarif_builder::make_locations_arr): Likewise.
3982 (sarif_output_format::on_begin_diagnostic): Likewise.
3983 (sarif_output_format::on_end_diagnostic): Likewise.
3984 * diagnostic.cc (default_diagnostic_starter): Make diagnostic_info
3986 (default_diagnostic_finalizer): Likewise.
3987 (diagnostic_context::report_diagnostic): Pass diagnostic by
3988 reference to on_{begin,end}_diagnostic.
3989 (diagnostic_text_output_format::on_begin_diagnostic): Convert
3990 param to const reference.
3991 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
3992 * diagnostic.h (diagnostic_starter_fn): Make diagnostic_info param
3994 (diagnostic_finalizer_fn): Likeewise.
3995 (diagnostic_output_format::on_begin_diagnostic): Convert param to
3997 (diagnostic_output_format::on_end_diagnostic): Likewise.
3998 (diagnostic_text_output_format::on_begin_diagnostic): Likewise.
3999 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
4000 (default_diagnostic_starter): Make diagnostic_info param const.
4001 (default_diagnostic_finalizer): Likewise.
4002 * langhooks-def.h (lhd_print_error_function): Make diagnostic_info
4004 * langhooks.cc (lhd_print_error_function): Likewise.
4005 * langhooks.h (lang_hooks::print_error_function): Likewise.
4006 * tree-diagnostic.cc (diagnostic_report_current_function):
4008 (default_tree_diagnostic_starter): Likewise.
4009 (virt_loc_aware_diagnostic_finalizer): Likewise.
4010 * tree-diagnostic.h (diagnostic_report_current_function):
4012 (virt_loc_aware_diagnostic_finalizer): Likewise.
4014 2023-12-06 Andrew Stubbs <ams@codesourcery.com>
4016 * config/gcn/gcn-builtins.def (DISPATCH_PTR): New built-in.
4017 * config/gcn/gcn.cc (gcn_init_machine_status): Disable global
4019 (gcn_expand_builtin_1): Implement GCN_BUILTIN_DISPATCH_PTR.
4021 2023-12-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4024 * config/riscv/riscv-vsetvl.cc
4025 (pre_vsetvl::compute_lcm_local_properties): Fix transparant LCM data.
4026 (pre_vsetvl::earliest_fuse_vsetvl_info): Disable earliest fusion for unrelated edge.
4028 2023-12-06 Marek Polacek <polacek@redhat.com>
4031 * config/linux.h: Redefine TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL for
4034 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4036 * config/aarch64/aarch64.cc
4037 (aarch64_test_sysreg_encoding_clashes): New.
4038 (aarch64_run_selftests): add call to
4039 aarch64_test_sysreg_encoding_clashes selftest.
4041 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4043 * config/aarch64/aarch64-builtins.cc (aarch64_general_check_builtin_call):
4045 * config/aarch64/aarch64-c.cc (aarch64_check_builtin_call):
4046 Add `aarch64_general_check_builtin_call' call.
4047 * config/aarch64/aarch64-protos.h (aarch64_general_check_builtin_call):
4050 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4052 * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins):
4053 Add enums for new builtins.
4054 (aarch64_init_rwsr_builtins): New.
4055 (aarch64_general_init_builtins): Call aarch64_init_rwsr_builtins.
4056 (aarch64_expand_rwsr_builtin): New.
4057 (aarch64_general_expand_builtin): Call aarch64_general_expand_builtin.
4058 * config/aarch64/aarch64.md (read_sysregdi): New insn_and_split.
4059 (write_sysregdi): Likewise.
4060 * config/aarch64/arm_acle.h (__arm_rsr): New.
4061 (__arm_rsrp): Likewise.
4062 (__arm_rsr64): Likewise.
4063 (__arm_rsrf): Likewise.
4064 (__arm_rsrf64): Likewise.
4065 (__arm_wsr): Likewise.
4066 (__arm_wsrp): Likewise.
4067 (__arm_wsr64): Likewise.
4068 (__arm_wsrf): Likewise.
4069 (__arm_wsrf64): Likewise.
4071 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4073 * config/aarch64/aarch64-protos.h (aarch64_valid_sysreg_name_p): New.
4074 (aarch64_retrieve_sysreg): Likewise.
4075 * config/aarch64/aarch64.cc (is_implem_def_reg): Likewise.
4076 (aarch64_valid_sysreg_name_p): Likewise.
4077 (aarch64_retrieve_sysreg): Likewise.
4078 (aarch64_register_sysreg): Likewise.
4079 (aarch64_init_sysregs): Likewise.
4080 (aarch64_lookup_sysreg_map): Likewise.
4081 * config/aarch64/predicates.md (aarch64_sysreg_string): New.
4083 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4085 * config/aarch64/aarch64.cc (sysreg_t): New.
4086 (aarch64_sysregs): Likewise.
4087 (AARCH64_FEATURE): Likewise.
4088 (AARCH64_FEATURES): Likewise.
4089 (AARCH64_NO_FEATURES): Likewise.
4090 * config/aarch64/aarch64.h (AARCH64_ISA_V8A): Add missing
4092 (AARCH64_ISA_V8_1A): Likewise.
4093 (AARCH64_ISA_V8_7A): Likewise.
4094 (AARCH64_ISA_V8_8A): Likewise.
4095 (AARCH64_NO_FEATURES): Likewise.
4096 (AARCH64_FL_RAS): New ISA flag alias.
4097 (AARCH64_FL_LOR): Likewise.
4098 (AARCH64_FL_PAN): Likewise.
4099 (AARCH64_FL_AMU): Likewise.
4100 (AARCH64_FL_SCXTNUM): Likewise.
4101 (AARCH64_FL_ID_PFR2): Likewise.
4102 (F_DEPRECATED): New.
4103 (F_REG_READ): Likewise.
4104 (F_REG_WRITE): Likewise.
4105 (F_ARCHEXT): Likewise.
4106 (F_REG_ALIAS): Likewise.
4108 2023-12-06 Victor Do Nascimento <victor.donascimento@arm.com>
4110 * config/aarch64/aarch64-sys-regs.def: New.
4112 2023-12-06 Robin Dapp <rdapp@ventanamicro.com>
4116 * config/riscv/autovec.md (vec_init<mode>qi): New expander.
4118 2023-12-06 Jakub Jelinek <jakub@redhat.com>
4120 PR rtl-optimization/112760
4121 * config/i386/i386-passes.def (pass_insert_vzeroupper): Insert
4122 after pass_postreload_cse rather than pass_reload.
4123 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
4124 Adjust comment for it.
4126 2023-12-06 Jakub Jelinek <jakub@redhat.com>
4128 PR tree-optimization/112809
4129 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt): For
4130 separate_ext in kind == bitint_prec_huge mode if rem == 0, create for
4131 i == cnt - 1 the loop rather than using size_int (end).
4133 2023-12-06 Jakub Jelinek <jakub@redhat.com>
4135 * gcc.cc (driver_handle_option): Add /* FALLTHROUGH */ comment
4136 between OPT_pie and OPT_r cases.
4138 2023-12-06 Tobias Burnus <tobias@codesourcery.com>
4140 * tsystem.h (calloc, realloc): Declare when inhibit_libc.
4142 2023-12-06 Richard Biener <rguenther@suse.de>
4144 PR tree-optimization/112843
4145 * tree-ssa-operands.cc (update_stmt_operands): Do not call
4146 update_stmt from ranger.
4147 * value-query.h (range_query::update_stmt): Remove.
4148 * gimple-range.h (gimple_ranger::update_stmt): Likewise.
4149 * gimple-range.cc (gimple_ranger::update_stmt): Likewise.
4151 2023-12-06 xuli <xuli1@eswincomputing.com>
4153 * config/riscv/riscv.md: Remove.
4155 2023-12-06 Alexandre Oliva <oliva@adacore.com>
4157 * Makefile.in (OBJS): Add ipa-strub.o.
4158 (GTFILES): Add ipa-strub.cc.
4159 * builtins.def (BUILT_IN_STACK_ADDRESS): New.
4160 (BUILT_IN___STRUB_ENTER): New.
4161 (BUILT_IN___STRUB_UPDATE): New.
4162 (BUILT_IN___STRUB_LEAVE): New.
4163 * builtins.cc: Include ipa-strub.h.
4164 (STACK_STOPS, STACK_UNSIGNED): Define.
4165 (expand_builtin_stack_address): New.
4166 (expand_builtin_strub_enter): New.
4167 (expand_builtin_strub_update): New.
4168 (expand_builtin_strub_leave): New.
4169 (expand_builtin): Call them.
4170 * common.opt (fstrub=*): New options.
4171 * doc/extend.texi (strub): New type attribute.
4172 (__builtin_stack_address): New function.
4173 (Stack Scrubbing): New section.
4174 * doc/invoke.texi (-fstrub=*): New options.
4175 (-fdump-ipa-*): New passes.
4176 * gengtype-lex.l: Ignore multi-line pp-directives.
4177 * ipa-inline.cc: Include ipa-strub.h.
4178 (can_inline_edge_p): Test strub_inlinable_to_p.
4179 * ipa-split.cc: Include ipa-strub.h.
4180 (execute_split_functions): Test strub_splittable_p.
4181 * ipa-strub.cc, ipa-strub.h: New.
4182 * passes.def: Add strub_mode and strub passes.
4183 * tree-cfg.cc (gimple_verify_flow_info): Note on debug stmts.
4184 * tree-pass.h (make_pass_ipa_strub_mode): Declare.
4185 (make_pass_ipa_strub): Declare.
4186 (make_pass_ipa_function_and_variable_visibility): Fix
4188 * tree-ssa-ccp.cc (optimize_stack_restore): Keep restores
4190 * attribs.cc: Include ipa-strub.h.
4191 (decl_attributes): Support applying attributes to function
4192 type, rather than pointer type, at handler's request.
4193 (comp_type_attributes): Combine strub_comptypes and target
4195 * doc/tm.texi.in (TARGET_STRUB_USE_DYNAMIC_ARRAY): New.
4196 (TARGET_STRUB_MAY_USE_MEMSET): New.
4197 * doc/tm.texi: Rebuilt.
4198 * cgraph.h (symtab_node::reset): Add preserve_comdat_group
4199 param, with a default.
4200 * cgraphunit.cc (symtab_node::reset): Use it.
4202 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4206 * config/riscv/riscv-v.cc (vls_mode_valid_p): Block VLSmodes according
4207 TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR.
4209 2023-12-05 David Faust <david.faust@oracle.com>
4212 * btfout.cc (btf_collect_datasec): Avoid incorrectly creating an
4213 entry in a BTF_KIND_DATASEC record for extern variable decls without
4216 2023-12-05 Jakub Jelinek <jakub@redhat.com>
4219 * config/rs6000/rs6000.md (copysign<mode>3): Change predicate
4220 of the last argument from gpc_reg_operand to any_operand. If
4221 operands[2] is CONST_DOUBLE, emit abs or neg abs depending on
4222 its sign, otherwise if it doesn't satisfy gpc_reg_operand,
4223 force it to REG using copy_to_mode_reg.
4225 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4227 * attribs.cc (handle_ignored_attributes_option): Add extra
4228 braces to work around PR 16333 in older compilers.
4229 * config/aarch64/aarch64.cc (aarch64_gnu_attribute_table): Likewise.
4230 (aarch64_arm_attribute_table): Likewise.
4231 * config/arm/arm.cc (arm_gnu_attribute_table): Likewise.
4232 * config/i386/i386-options.cc (ix86_gnu_attribute_table): Likewise.
4233 * config/ia64/ia64.cc (ia64_gnu_attribute_table): Likewise.
4234 * config/rs6000/rs6000.cc (rs6000_gnu_attribute_table): Likewise.
4235 * target-def.h (TARGET_GNU_ATTRIBUTES): Likewise.
4236 * genhooks.cc (emit_init_macros): Likewise, when emitting the
4237 instantiation of TARGET_ATTRIBUTE_TABLE.
4238 * langhooks-def.h (LANG_HOOKS_INITIALIZER): Likewise, when
4239 instantiating LANG_HOOKS_ATTRIBUTE_TABLE.
4240 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to be empty by default.
4241 * target.def (attribute_table): Likewise.
4243 2023-12-05 Richard Biener <rguenther@suse.de>
4245 PR middle-end/112860
4246 * passes.cc (should_skip_pass_p): Do not skip ISEL.
4248 2023-12-05 Richard Biener <rguenther@suse.de>
4251 * asan.cc (asan_protect_global): Do not protect globals
4252 in non-generic address-space.
4254 2023-12-05 Richard Biener <rguenther@suse.de>
4257 * ipa-icf.cc (sem_variable::equals_wpa): Compare address-spaces.
4259 2023-12-05 Richard Biener <rguenther@suse.de>
4261 PR middle-end/112830
4262 * gimplify.cc (gimplify_modify_expr): Avoid turning aggregate
4263 copy of non-generic address-spaces to memcpy.
4264 (gimplify_modify_expr_to_memcpy): Assert we are dealing with
4265 a copy inside the generic address-space.
4266 (gimplify_modify_expr_to_memset): Likewise.
4267 * tree-cfg.cc (verify_gimple_assign_single): Allow
4268 WITH_SIZE_EXPR as part of the RHS of an assignment.
4269 * builtins.cc (get_memory_address): Assert we are dealing
4270 with the generic address-space.
4271 * tree-ssa-dce.cc (ref_may_be_aliased): Handle WITH_SIZE_EXPR.
4273 2023-12-05 Richard Biener <rguenther@suse.de>
4275 PR tree-optimization/109689
4276 PR tree-optimization/112856
4277 * cfgloopmanip.h (unloop_loops): Adjust API.
4278 * tree-ssa-loop-ivcanon.cc (unloop_loops): Take edges_to_remove
4280 (canonicalize_induction_variables): Adjust.
4281 (tree_unroll_loops_completely): Likewise.
4282 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Rewrite into
4283 LC SSA if we unlooped some loops and we are in LC SSA.
4285 2023-12-05 Jakub Jelinek <jakub@redhat.com>
4288 * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
4289 if the new immediate is ix86_endbr_immediate_operand.
4291 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4293 * config/aarch64/aarch64.h (TARGET_STREAMING_SME2): New macro.
4294 (P_ALIASES): Likewise.
4295 (REGISTER_NAMES): Add pn aliases of the predicate registers.
4296 (W8_W11_REGNUM_P): New macro.
4297 (W8_W11_REGS): New register class.
4298 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
4299 * config/aarch64/aarch64.cc (aarch64_print_operand): Add support
4300 for %K, which prints a predicate as a counter. Handle tuples of
4302 (aarch64_regno_regclass): Handle W8_W11_REGS.
4303 (aarch64_class_max_nregs): Likewise.
4304 * config/aarch64/constraints.md (Uci, Uw2, Uw4): New constraints.
4305 (x, y): Move further up file.
4306 (Uph): Redefine as the high predicate registers, renaming the old
4309 * config/aarch64/predicates.md (const_0_to_7_operand): New predicate.
4310 (const_0_to_4_step_4_operand, const_0_to_6_step_2_operand): Likewise.
4311 (const_0_to_12_step_4_operand, const_0_to_14_step_2_operand): Likewise.
4312 (aarch64_simd_shift_imm_qi): Use const_0_to_7_operand.
4313 * config/aarch64/iterators.md (VNx16SI_ONLY, VNx8SI_ONLY)
4314 (VNx8DI_ONLY, SVE_FULL_BHSIx2, SVE_FULL_HF, SVE_FULL_SIx2_SDIx4)
4315 (SVE_FULL_BHS, SVE_FULLx24, SVE_DIx24, SVE_BHSx24, SVE_Ix24)
4316 (SVE_Fx24, SVE_SFx24, SME_ZA_BIx24, SME_ZA_BHIx124, SME_ZA_BHIx24)
4317 (SME_ZA_HFx124, SME_ZA_HFx24, SME_ZA_HIx124, SME_ZA_HIx24)
4318 (SME_ZA_SDIx24, SME_ZA_SDFx24): New mode iterators.
4319 (UNSPEC_REVD, UNSPEC_CNTP_C, UNSPEC_PEXT, UNSPEC_PEXTx2): New unspecs.
4320 (UNSPEC_PSEL, UNSPEC_PTRUE_C, UNSPEC_SQRSHR, UNSPEC_SQRSHRN)
4321 (UNSPEC_SQRSHRU, UNSPEC_SQRSHRUN, UNSPEC_UQRSHR, UNSPEC_UQRSHRN)
4322 (UNSPEC_UZP, UNSPEC_UZPQ, UNSPEC_ZIP, UNSPEC_ZIPQ, UNSPEC_BFMLSLB)
4323 (UNSPEC_BFMLSLT, UNSPEC_FCVTN, UNSPEC_FDOT, UNSPEC_SQCVT): Likewise.
4324 (UNSPEC_SQCVTN, UNSPEC_SQCVTU, UNSPEC_SQCVTUN, UNSPEC_UQCVT): Likewise.
4325 (UNSPEC_SME_ADD, UNSPEC_SME_ADD_WRITE, UNSPEC_SME_BMOPA): Likewise.
4326 (UNSPEC_SME_BMOPS, UNSPEC_SME_FADD, UNSPEC_SME_FDOT, UNSPEC_SME_FVDOT)
4327 (UNSPEC_SME_FMLA, UNSPEC_SME_FMLS, UNSPEC_SME_FSUB, UNSPEC_SME_READ)
4328 (UNSPEC_SME_SDOT, UNSPEC_SME_SVDOT, UNSPEC_SME_SMLA, UNSPEC_SME_SMLS)
4329 (UNSPEC_SME_SUB, UNSPEC_SME_SUB_WRITE, UNSPEC_SME_SUDOT): Likewise.
4330 (UNSPEC_SME_SUVDOT, UNSPEC_SME_UDOT, UNSPEC_SME_UVDOT): Likewise.
4331 (UNSPEC_SME_UMLA, UNSPEC_SME_UMLS, UNSPEC_SME_USDOT): Likewise.
4332 (UNSPEC_SME_USVDOT, UNSPEC_SME_WRITE): Likewise.
4333 (Vetype, VNARROW, V2XWIDE, Ventype, V_INT_EQUIV, v_int_equiv)
4334 (VSINGLE, vsingle, b): Add tuple modes.
4335 (v2xwide, za32_offset_range, za64_offset_range, za32_long)
4336 (za32_last_offset, vg_modifier, z_suffix, aligned_operand)
4337 (aligned_fpr): New mode attributes.
4338 (SVE_INT_BINARY_MULTI, SVE_INT_BINARY_SINGLE, SVE_INT_BINARY_MULTI)
4339 (SVE_FP_BINARY_MULTI): New int iterators.
4340 (SVE_BFLOAT_TERNARY_LONG): Add UNSPEC_BFMLSLB and UNSPEC_BFMLSLT.
4341 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
4342 (SVE_WHILE_ORDER, SVE2_INT_SHIFT_IMM_NARROWxN, SVE_QCVTxN)
4343 (SVE2_SFx24_UNARY, SVE2_x24_PERMUTE, SVE2_x24_PERMUTEQ)
4344 (UNSPEC_REVD_ONLY, SME2_INT_MOP, SME2_BMOP, SME_BINARY_SLICE_SDI)
4345 (SME_BINARY_SLICE_SDF, SME_BINARY_WRITE_SLICE_SDI, SME_INT_DOTPROD)
4346 (SME_INT_DOTPROD_LANE, SME_FP_DOTPROD, SME_FP_DOTPROD_LANE)
4347 (SME_INT_TERNARY_SLICE, SME_FP_TERNARY_SLICE, BHSD_BITS)
4348 (LUTI_BITS): New int iterators.
4349 (optab, sve_int_op): Handle the new unspecs.
4350 (sme_int_op, has_16bit_form): New int attributes.
4351 (bits_etype): Handle 64.
4352 * config/aarch64/aarch64.md (UNSPEC_LD1_SVE_COUNT): New unspec.
4353 (UNSPEC_ST1_SVE_COUNT, UNSPEC_LDNT1_SVE_COUNT): Likewise.
4354 (UNSPEC_STNT1_SVE_COUNT): Likewise.
4355 * config/aarch64/atomics.md (cas_short_expected_imm): Use Uhi
4356 rather than Uph for HImode immediates.
4357 * config/aarch64/aarch64-sve.md (@aarch64_ld1<SVE_FULLx24:mode>)
4358 (@aarch64_ldnt1<SVE_FULLx24:mode>, @aarch64_st1<SVE_FULLx24:mode>)
4359 (@aarch64_stnt1<SVE_FULLx24:mode>): New patterns.
4360 (@aarch64_<sur>dot_prod_lane<vsi2qi>): Extend to...
4361 (@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>)
4362 (@aarch64_<sur>dot_prod_lane<VNx4SI_ONLY:mode><VNx16QI_ONLY:mode>):
4363 ...these new patterns.
4364 (SVE_WHILE_B, SVE_WHILE_B_X2, SVE_WHILE_C): New constants. Add
4365 SVE_WHILE_B to existing while patterns.
4366 * config/aarch64/aarch64-sve2.md (@aarch64_sve_ptrue_c<BHSD_BITS>)
4367 (@aarch64_sve_pext<BHSD_BITS>, @aarch64_sve_pext<BHSD_BITS>x2)
4368 (@aarch64_sve_psel<BHSD_BITS>, *aarch64_sve_psel<BHSD_BITS>_plus)
4369 (@aarch64_sve_cntp_c<BHSD_BITS>, <frint_pattern><mode>2)
4370 (<optab><mode>3, *<optab><mode>3, @aarch64_sve_single_<optab><mode>)
4371 (@aarch64_sve_<sve_int_op><mode>): New patterns.
4372 (@aarch64_sve_single_<sve_int_op><mode>, @aarch64_sve_<su>clamp<mode>)
4373 (*aarch64_sve_<su>clamp<mode>_x, @aarch64_sve_<su>clamp_single<mode>)
4374 (@aarch64_sve_fclamp<mode>, *aarch64_sve_fclamp<mode>_x)
4375 (@aarch64_sve_fclamp_single<mode>, <optab><mode><v2xwide>2)
4376 (@aarch64_sve_<sur>dotvnx4sivnx8hi): New patterns.
4377 (@aarch64_sve_<maxmin_uns_op><mode>): Likewise.
4378 (*aarch64_sve_<maxmin_uns_op><mode>): Likewise.
4379 (@aarch64_sve_single_<maxmin_uns_op><mode>): Likewise.
4380 (aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
4381 (aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
4382 (@aarch64_sve_<optab><VNx16QI_ONLY:mode><VNx16SI_ONLY:mode>): Likewise.
4383 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Likewise.
4384 (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8DI_ONLY:mode>): Likewise.
4385 (truncvnx8sf<mode>2, @aarch64_sve_cvtn<mode>): Likewise.
4386 (<optab><v_int_equiv><mode>2, <optab><mode><v_int_equiv>2): Likewise.
4387 (@aarch64_sve_sel<mode>): Likewise.
4388 (@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
4389 (@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
4390 (@aarch64_pred_<optab><mode>, @cond_<optab><mode>): Likewise.
4391 (@aarch64_sve_<optab><mode>): Likewise.
4392 * config/aarch64/aarch64-sme.md (@aarch64_sme_<optab><mode><mode>)
4393 (*aarch64_sme_<optab><mode><mode>_plus, @aarch64_sme_read<mode>)
4394 (*aarch64_sme_read<mode>_plus, @aarch64_sme_write<mode>): New patterns.
4395 (*aarch64_sme_write<mode>_plus aarch64_sme_zero_zt0): Likewise.
4396 (@aarch64_sme_<optab><mode>, *aarch64_sme_<optab><mode>_plus)
4397 (@aarch64_sme_single_<optab><mode>): Likewise.
4398 (*aarch64_sme_single_<optab><mode>_plus): Likewise.
4399 (@aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4400 (*aarch64_sme_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4401 (@aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4402 (*aarch64_sme_single_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4403 (@aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>)
4404 (*aarch64_sme_single_sudot<VNx4SI_ONLY:mode><SME_ZA_BIx24:mode>_plus)
4405 (@aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>)
4406 (*aarch64_sme_lane_<optab><SME_ZA_SDI:mode><SME_ZA_BHIx24:mode>_plus)
4407 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>)
4408 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_BHI:mode>_plus)
4409 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
4410 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
4411 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>)
4412 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx24:mode>_plus)
4413 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
4414 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_BHIx124:mode>)
4415 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>)
4416 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><VNx8HI_ONLY:mode>_plus)
4417 (@aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
4418 (*aarch64_sme_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
4419 (@aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>)
4420 (*aarch64_sme_single_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx24:mode>_plus)
4421 (@aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
4422 (*aarch64_sme_lane_<optab><VNx2DI_ONLY:mode><SME_ZA_HIx124:mode>)
4423 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx8HI_ONLY:mode>)
4424 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx4SI_ONLY:mode>)
4425 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4426 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4427 (@aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4428 (*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4429 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>)
4430 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx24:mode>_plus)
4431 (@aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4432 (*aarch64_sme_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
4433 (@aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4434 (*aarch64_sme_single_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>_plus)
4435 (@aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4436 (*aarch64_sme_lane_<optab><SME_ZA_SDF_I:mode><SME_ZA_SDFx24:mode>)
4437 (@aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>)
4438 (*aarch64_sme_<optab><VNx4SI_ONLY:mode><SVE_FULL_HF:mode>_plus)
4439 (@aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
4440 (*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_HFx124:mode>)
4441 (@aarch64_sme_lut<LUTI_BITS><mode>): Likewise.
4442 (UNSPEC_SME_LUTI): New unspec.
4443 * config/aarch64/aarch64-sve-builtins.def (single): New mode suffix.
4444 (c8, c16, c32, c64): New type suffixes.
4445 (vg1x2, vg1x4, vg2, vg2x1, vg2x2, vg2x4, vg4, vg4x1, vg4x2)
4446 (vg4x4): New group suffixes.
4447 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZT0)
4448 (CP_WRITE_ZT0): New constants.
4449 (get_svbool_t): Delete.
4450 (function_resolver::report_mismatched_num_vectors): New member
4452 (function_resolver::resolve_conversion): Likewise.
4453 (function_resolver::infer_predicate_type): Likewise.
4454 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
4455 (function_resolver::require_matching_predicate_type): Likewise.
4456 (function_resolver::require_nonscalar_type): Likewise.
4457 (function_resolver::finish_opt_single_resolution): Likewise.
4458 (function_resolver::require_derived_vector_type): Add an
4459 expected_num_vectors parameter.
4460 (function_expander::map_to_rtx_codes): Add an extra parameter
4461 for unconditional FP unspecs.
4462 (function_instance::gp_type_index): New member function.
4463 (function_instance::gp_type): Likewise.
4464 (function_instance::gp_mode): Handle multi-vector operations.
4465 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_count)
4466 (TYPES_all_pred_count, TYPES_c, TYPES_bhs_data, TYPES_bhs_widen)
4467 (TYPES_hs_data, TYPES_cvt_h_s_float, TYPES_cvt_s_s, TYPES_qcvt_x2)
4468 (TYPES_qcvt_x4, TYPES_qrshr_x2, TYPES_qrshru_x2, TYPES_qrshr_x4)
4469 (TYPES_qrshru_x4, TYPES_while_x, TYPES_while_x_c, TYPES_s_narrow_fsu)
4470 (TYPES_za_s_b_signed, TYPES_za_s_b_unsigned, TYPES_za_s_b_integer)
4471 (TYPES_za_s_h_integer, TYPES_za_s_h_data, TYPES_za_s_unsigned)
4472 (TYPES_za_s_float, TYPES_za_s_data, TYPES_za_d_h_integer): New type
4474 (groups_x2, groups_x12, groups_x4, groups_x24, groups_x124)
4475 (groups_vg1x2, groups_vg1x4, groups_vg1x24, groups_vg2, groups_vg4)
4476 (groups_vg24): New group arrays.
4477 (function_instance::reads_global_state_p): Handle CP_READ_ZT0.
4478 (function_instance::modifies_global_state_p): Handle CP_WRITE_ZT0.
4479 (add_shared_state_attribute): Handle zt0 state.
4480 (function_builder::add_overloaded_functions): Skip MODE_single
4481 for non-tuple groups.
4482 (function_resolver::report_mismatched_num_vectors): New function.
4483 (function_resolver::resolve_to): Add a fallback error message for
4484 the general two-type case.
4485 (function_resolver::resolve_conversion): New function.
4486 (function_resolver::infer_predicate_type): Likewise.
4487 (function_resolver::infer_64bit_scalar_integer_pair): Likewise.
4488 (function_resolver::require_matching_predicate_type): Likewise.
4489 (function_resolver::require_matching_vector_type): Specifically
4490 diagnose mismatched vector counts.
4491 (function_resolver::require_derived_vector_type): Add an
4492 expected_num_vectors parameter. Extend to handle cases where
4493 tuples are expected.
4494 (function_resolver::require_nonscalar_type): New function.
4495 (function_resolver::check_gp_argument): Use gp_type_index rather
4496 than hard-coding VECTOR_TYPE_svbool_t.
4497 (function_resolver::finish_opt_single_resolution): New function.
4498 (function_checker::require_immediate_either_or): Remove hard-coded
4500 (function_expander::direct_optab_handler): New function.
4501 (function_expander::use_pred_x_insn): Only add a strictness flag
4502 is the insn has an operand for it.
4503 (function_expander::map_to_rtx_codes): Take an unconditional
4504 FP unspec as an extra parameter. Handle tuples and MODE_single.
4505 (function_expander::map_to_unspecs): Handle tuples and MODE_single.
4506 * config/aarch64/aarch64-sve-builtins-functions.h (read_zt0)
4507 (write_zt0): New typedefs.
4508 (full_width_access::memory_vector): Use the function's
4510 (rtx_code_function_base): Add an optional unconditional FP unspec.
4511 (rtx_code_function::expand): Update accordingly.
4512 (rtx_code_function_rotated::expand): Likewise.
4513 (unspec_based_function_exact_insn::expand): Use tuple_mode instead
4515 (unspec_based_uncond_function): New typedef.
4516 (cond_or_uncond_unspec_function): New class.
4517 (sme_1mode_function::expand): Handle single forms.
4518 (sme_2mode_function_t): Likewise, adding a template parameter for them.
4519 (sme_2mode_function): Update accordingly.
4520 (sme_2mode_lane_function): New typedef.
4521 (multireg_permute): New class.
4522 (class integer_conversion): Likewise.
4523 (while_comparison::expand): Handle svcount_t and svboolx2_t results.
4524 * config/aarch64/aarch64-sve-builtins-shapes.h
4525 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
4526 (binary_za_slice_lane, binary_za_slice_int_opt_single)
4527 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
4528 (binaryx, clamp, compare_scalar_count, count_pred_c)
4529 (dot_za_slice_int_lane, dot_za_slice_lane, dot_za_slice_uint_lane)
4530 (extract_pred, inherent_zt, ldr_zt, read_za, read_za_slice)
4531 (select_pred, shift_right_imm_narrowxn, storexn, str_zt)
4532 (unary_convertxn, unary_za_slice, unaryxn, write_za)
4533 (write_za_slice): Declare.
4534 * config/aarch64/aarch64-sve-builtins-shapes.cc
4535 (za_group_is_pure_overload): New function.
4536 (apply_predication): Use the function's gp_type for the predicate,
4537 instead of hard-coding the use of svbool_t.
4538 (parse_element_type): Add support for "c" (svcount_t).
4539 (parse_type): Add support for "c0" and "c1" (conversion destination
4541 (binary_za_slice_lane_base): New class.
4542 (binary_za_slice_opt_single_base): Likewise.
4543 (load_contiguous_base::resolve): Pass the group suffix to r.resolve.
4544 (luti_lane_zt_base): New class.
4545 (binary_int_opt_single_n, binary_opt_single_n, binary_single)
4546 (binary_za_slice_lane, binary_za_slice_int_opt_single)
4547 (binary_za_slice_opt_single, binary_za_slice_uint_opt_single)
4548 (binaryx, clamp): New shapes.
4549 (compare_scalar_def::build): Allow the return type to be a tuple.
4550 (compare_scalar_def::expand): Pass the group suffix to r.resolve.
4551 (compare_scalar_count, count_pred_c, dot_za_slice_int_lane)
4552 (dot_za_slice_lane, dot_za_slice_uint_lane, extract_pred, inherent_zt)
4553 (ldr_zt, read_za, read_za_slice, select_pred, shift_right_imm_narrowxn)
4554 (storexn, str_zt): New shapes.
4555 (ternary_qq_lane_def, ternary_qq_opt_n_def): Replace with...
4556 (ternary_qq_or_011_lane_def, ternary_qq_opt_n_or_011_def): ...these
4557 new classes. Allow a second suffix that specifies the type of the
4558 second vector argument, and that is used to derive the third.
4559 (unary_def::build): Extend to handle tuple types.
4560 (unary_convert_def::build): Use the new c0 and c1 format specifiers.
4561 (unary_convertxn, unary_za_slice, unaryxn, write_za): New shapes.
4562 (write_za_slice): Likewise.
4563 * config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand)
4564 (svext_bhw_impl::expand): Update call to map_to_rtx_costs.
4565 (svcntp_impl::expand): Handle svcount_t variants.
4566 (svcvt_impl::expand): Handle unpredicated conversions separately,
4567 dealing with tuples.
4568 (svdot_impl::expand): Handle 2-way dot products.
4569 (svdotprod_lane_impl::expand): Likewise.
4570 (svld1_impl::fold): Punt on tuple loads.
4571 (svld1_impl::expand): Handle tuple loads.
4572 (svldnt1_impl::expand): Likewise.
4573 (svpfalse_impl::fold): Punt on svcount_t forms.
4574 (svptrue_impl::fold): Likewise.
4575 (svptrue_impl::expand): Handle svcount_t forms.
4576 (svrint_impl): New class.
4577 (svsel_impl::fold): Punt on tuple forms.
4578 (svsel_impl::expand): Handle tuple forms.
4579 (svst1_impl::fold): Punt on tuple loads.
4580 (svst1_impl::expand): Handle tuple loads.
4581 (svstnt1_impl::expand): Likewise.
4582 (svwhilelx_impl::fold): Punt on tuple forms.
4583 (svdot_lane): Use UNSPEC_FDOT.
4584 (svmax, svmaxnm, svmin, svminmm): Add unconditional FP unspecs.
4585 (rinta, rinti, rintm, rintn, rintp, rintx, rintz): Use svrint_impl.
4586 * config/aarch64/aarch64-sve-builtins-base.def (svcreate2, svget2)
4587 (svset2, svundef2): Add _b variants.
4588 (svcvt): Use unary_convertxn.
4589 (svdot): Use ternary_qq_opt_n_or_011.
4590 (svdot_lane): Use ternary_qq_or_011_lane.
4591 (svmax, svmaxnm, svmin, svminnm): Use binary_opt_single_n.
4592 (svpfalse): Add a form that returns svcount_t results.
4593 (svrinta, svrintm, svrintn, svrintp): Use unaryxn.
4594 (svsel): Use binaryxn.
4595 (svst1, svstnt1): Use storexn.
4596 * config/aarch64/aarch64-sve-builtins-sme.h
4597 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
4598 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
4599 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
4600 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
4601 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
4602 (svvdot_lane_za, svwrite_za, svzero_zt): Declare.
4603 * config/aarch64/aarch64-sve-builtins-sme.cc (load_store_za_base):
4605 (load_store_za_zt0_base): ...this and extend to tuples.
4606 (load_za_base, store_za_base): Update accordingly.
4607 (expand_ldr_str_zt0): New function.
4608 (svldr_zt_impl, svluti_lane_zt_impl, svread_za_impl, svstr_zt_impl)
4609 (svsudot_za_impl, svwrite_za_impl, svzero_zt_impl): New classes.
4610 (svadd_za, svadd_write_za, svbmopa_za, svbmops_za, svdot_za)
4611 (svdot_lane_za, svldr_zt, svluti2_lane_zt, svluti4_lane_zt)
4612 (svmla_za, svmla_lane_za, svmls_za, svmls_lane_za, svread_za)
4613 (svstr_zt, svsub_za, svsub_write_za, svsudot_za, svsudot_lane_za)
4614 (svsuvdot_lane_za, svusdot_za, svusdot_lane_za, svusvdot_lane_za)
4615 (svvdot_lane_za, svwrite_za, svzero_zt): New functions.
4616 * config/aarch64/aarch64-sve-builtins-sme.def: Add SME2 intrinsics.
4617 * config/aarch64/aarch64-sve-builtins-sve2.h
4618 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
4619 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
4620 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
4622 * config/aarch64/aarch64-sve-builtins-sve2.cc (svclamp_impl)
4623 (svcvtn_impl, svpext_impl, svpsel_impl): New classes.
4624 (svqrshl_impl::fold): Update for change to svrshl shape.
4625 (svrshl_impl::fold): Punt on tuple forms.
4626 (svsqadd_impl::expand): Update call to map_to_rtx_codes.
4627 (svunpk_impl): New class.
4628 (svbfmlslb, svbfmlslb_lane, svbfmlslt, svbfmlslt_lane, svclamp)
4629 (svcvtn, svpext, svpsel, svqcvt, svqcvtn, svqrshr, svqrshrn)
4630 (svqrshru, svqrshrun, svrevd, svunpk, svuzp, svuzpq, svzip)
4631 (svzipq): New functions.
4632 * config/aarch64/aarch64-sve-builtins-sve2.def: Add SME2 intrinsics.
4633 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
4634 or undefine __ARM_FEATURE_SME2.
4636 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4638 * config/aarch64/aarch64.md (ZT0_REGNUM): New constant.
4639 (LAST_FAKE_REGNUM): Bump to include it.
4640 * config/aarch64/aarch64.h (FIXED_REGISTERS): Add an entry for ZT0.
4641 (CALL_REALLY_USED_REGISTERS, REGISTER_NAMES): Likewise.
4642 (REG_CLASS_CONTENTS): Likewise.
4643 (machine_function): Add zt0_save_buffer.
4644 (CUMULATIVE_ARGS): Add shared_zt0_flags;
4645 * config/aarch64/aarch64.cc (aarch64_check_state_string): Handle zt0.
4646 (aarch64_fntype_pstate_za, aarch64_fndecl_pstate_za): Likewise.
4647 (aarch64_function_arg): Add the shared ZT0 flags as an extra
4648 limb of the parallel.
4649 (aarch64_init_cumulative_args): Initialize shared_zt0_flags.
4650 (aarch64_extra_live_on_entry): Handle ZT0_REGNUM.
4651 (aarch64_epilogue_uses): Likewise.
4652 (aarch64_get_zt0_save_buffer, aarch64_save_zt0): New functions.
4653 (aarch64_restore_zt0): Likewise.
4654 (aarch64_start_call_args): Reject calls to functions that share
4655 ZT0 from functions that have no ZT0 state. Save ZT0 around shared-ZA
4656 calls that do not share ZT0.
4657 (aarch64_expand_call): Handle ZT0. Reject calls to functions that
4658 share ZT0 but not ZA from functions with ZA state.
4659 (aarch64_end_call_args): Restore ZT0 after calls to shared-ZA functions
4660 that do not share ZT0.
4661 (aarch64_set_current_function): Require +sme2 for functions that
4663 (aarch64_function_attribute_inlinable_p): Don't allow functions to
4664 be inlined if they have local zt0 state.
4665 (AARCH64_IPA_CLOBBERS_ZT0): New constant.
4666 (aarch64_update_ipa_fn_target_info): Record asms that clobber ZT0.
4667 (aarch64_can_inline_p): Don't inline callees that clobber ZT0
4668 into functions that have ZT0 state.
4669 (aarch64_comp_type_attributes): Check for compatible ZT0 sharing.
4670 (aarch64_optimize_mode_switching): Use mode switching if the
4671 function has ZT0 state.
4672 (aarch64_mode_emit_local_sme_state): Save and restore ZT0 around
4673 calls to private-ZA functions.
4674 (aarch64_mode_needed_local_sme_state): Require ZA to be active
4675 for instructions that access ZT0.
4676 (aarch64_mode_entry): Mark ZA as dead on entry if the function
4677 only shares state other than "za" itself.
4678 (aarch64_mode_exit): Likewise mark ZA as dead on return.
4679 (aarch64_md_asm_adjust): Extend handling of ZA clobbers to ZT0.
4680 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
4681 Define __ARM_STATE_ZT0.
4682 * config/aarch64/aarch64-sme.md (UNSPECV_ASM_UPDATE_ZT0): New unspecv.
4683 (aarch64_asm_update_zt0): New insn.
4684 (UNSPEC_RESTORE_ZT0): New unspec.
4685 (aarch64_sme_ldr_zt0, aarch64_restore_zt0): New insns.
4686 (aarch64_sme_str_zt0): Likewise.
4688 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4690 * config/aarch64/aarch64-modes.def (VNx32BI): New mode.
4691 * config/aarch64/aarch64-protos.h (aarch64_split_double_move): Declare.
4692 * config/aarch64/aarch64-sve-builtins.cc
4693 (register_tuple_type): Handle tuples of predicates.
4694 (handle_arm_sve_h): Define svboolx2_t as a pair of two svbool_ts.
4695 * config/aarch64/aarch64-sve.md (movvnx32bi): New insn.
4696 * config/aarch64/aarch64.cc
4697 (pure_scalable_type_info::piece::get_rtx): Use VNx32BI for pairs
4699 (pure_scalable_type_info::add_piece): Don't try to form pairs of
4701 (VEC_STRUCT): Generalize comment.
4702 (aarch64_classify_vector_mode): Handle VNx32BI.
4703 (aarch64_array_mode): Likewise. Return BLKmode for arrays of
4704 predicates that have no associated mode, rather than allowing
4705 an integer mode to be chosen.
4706 (aarch64_hard_regno_nregs): Handle VNx32BI.
4707 (aarch64_hard_regno_mode_ok): Likewise.
4708 (aarch64_split_double_move): New function, split out from...
4709 (aarch64_split_128bit_move): ...here.
4710 (aarch64_ptrue_reg): Tighten assert to aarch64_sve_pred_mode_p.
4711 (aarch64_pfalse_reg): Likewise.
4712 (aarch64_sve_same_pred_for_ptest_p): Likewise.
4713 (aarch64_sme_mode_switch_regs::add_reg): Handle VNx32BI.
4714 (aarch64_expand_mov_immediate): Restrict handling of boolean vector
4715 constants to single-predicate modes.
4716 (aarch64_classify_address): Handle VNx32BI, ensuring that both halves
4718 (aarch64_class_max_nregs): Handle VNx32BI.
4719 (aarch64_member_type_forces_blk): Don't for BLKmode for svboolx2_t.
4720 (aarch64_simd_valid_immediate): Allow all-zeros and all-ones for
4722 (aarch64_mov_operand_p): Restrict predicate constant canonicalization
4723 to single-predicate modes.
4724 (aarch64_evpc_ext): Generalize exclusion to all predicate modes.
4725 (aarch64_evpc_rev_local, aarch64_evpc_dup): Likewise.
4726 * config/aarch64/constraints.md (PR_REGS): New predicate.
4728 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4730 * config/aarch64/aarch64-sve-builtins-base.cc
4731 (svreinterpret_impl::fold): Handle reinterprets between svbool_t
4733 (svreinterpret_impl::expand): Likewise.
4734 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret): Add
4736 * config/aarch64/aarch64-sve-builtins.cc (TYPES_reinterpret_b): New
4738 (wrap_type_in_struct, register_type_decl): New functions, split out
4740 (register_tuple_type): ...here.
4741 (register_builtin_types): Handle svcount_t.
4742 (handle_arm_sve_h): Don't create tuples of svcount_t.
4743 * config/aarch64/aarch64-sve-builtins.def (svcount_t): New type.
4744 (c): New type suffix.
4745 * config/aarch64/aarch64-sve-builtins.h (TYPE_count): New type class.
4747 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4749 * doc/invoke.texi: Document +sme2.
4750 * doc/sourcebuild.texi: Document aarch64_sme2.
4751 * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
4753 * config/aarch64/aarch64.h (AARCH64_ISA_SME2, TARGET_SME2): New macros.
4755 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4757 * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall):
4758 Enforce PSTATE.SM and PSTATE.ZA restrictions.
4759 (aarch64_expand_epilogue): Save and restore the arguments
4760 to a sibcall around any change to PSTATE.SM.
4762 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4764 * config/aarch64/aarch64.cc: Include symbol-summary.h, ipa-prop.h,
4766 (aarch64_function_attribute_inlinable_p): New function.
4767 (AARCH64_IPA_SM_FIXED, AARCH64_IPA_CLOBBERS_ZA): New constants.
4768 (aarch64_need_ipa_fn_target_info): New function.
4769 (aarch64_update_ipa_fn_target_info): Likewise.
4770 (aarch64_can_inline_p): Restrict the previous ISA flag checks
4771 to non-modal features. Prevent callees that require a particular
4772 PSTATE.SM state from being inlined into callers that can't guarantee
4773 that state. Also prevent callees that have ZA state from being
4774 inlined into callers that don't. Finally, prevent callees that
4775 clobber ZA from being inlined into callers that have ZA state.
4776 (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define.
4777 (TARGET_NEED_IPA_FN_TARGET_INFO): Likewise.
4778 (TARGET_UPDATE_IPA_FN_TARGET_INFO): Likewise.
4780 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4782 * config/aarch64/aarch64.cc: Include except.h
4783 (aarch64_sme_mode_switch_regs::add_call_preserved_reg): New function.
4784 (aarch64_sme_mode_switch_regs::add_call_preserved_regs): Likewise.
4785 (aarch64_need_old_pstate_sm): Return true if the function has
4786 a nonlocal-goto or exception receiver.
4787 (aarch64_switch_pstate_sm_for_landing_pad): New function.
4788 (aarch64_switch_pstate_sm_for_jump): Likewise.
4789 (pass_switch_pstate_sm::gate): Enable the pass for all
4790 streaming and streaming-compatible functions.
4791 (pass_switch_pstate_sm::execute): Handle non-local gotos and their
4792 receivers. Handle exception handler entry points.
4794 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4796 * config/aarch64/aarch64.cc (aarch64_arm_attribute_table): Add
4797 arm::locally_streaming.
4798 (aarch64_fndecl_is_locally_streaming): New function.
4799 (aarch64_fndecl_sm_state): Handle locally-streaming functions.
4800 (aarch64_cfun_enables_pstate_sm): New function.
4801 (aarch64_add_offset): Add an argument that specifies whether
4802 the streaming vector length should be used instead of the
4804 (aarch64_split_add_offset, aarch64_add_sp, aarch64_sub_sp): Likewise.
4805 (aarch64_allocate_and_probe_stack_space): Likewise.
4806 (aarch64_expand_mov_immediate): Update calls accordingly.
4807 (aarch64_need_old_pstate_sm): Return true for locally-streaming
4808 streaming-compatible functions.
4809 (aarch64_layout_frame): Force all call-preserved Z and P registers
4810 to be saved and restored if the function switches PSTATE.SM in the
4812 (aarch64_get_separate_components): Disable shrink-wrapping of
4813 such Z and P saves and restores.
4814 (aarch64_use_late_prologue_epilogue): New function.
4815 (aarch64_expand_prologue): Measure SVE lengths in the streaming
4816 vector length for locally-streaming functions, then emit code
4817 to enable streaming mode.
4818 (aarch64_expand_epilogue): Likewise in reverse.
4819 (TARGET_USE_LATE_PROLOGUE_EPILOGUE): Define.
4820 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
4821 Define __arm_locally_streaming.
4823 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4825 * doc/invoke.texi: Document +sme-i16i64 and +sme-f64f64.
4826 * config.gcc (aarch64*-*-*): Add arm_sme.h to the list of headers
4827 to install and aarch64-sve-builtins-sme.o to the list of objects
4829 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
4830 or undefine TARGET_SME, TARGET_SME_I16I64 and TARGET_SME_F64F64.
4831 (aarch64_pragma_aarch64): Handle arm_sme.h.
4832 * config/aarch64/aarch64-option-extensions.def (sme-i16i64)
4833 (sme-f64f64): New extensions.
4834 * config/aarch64/aarch64-protos.h (aarch64_sme_vq_immediate)
4835 (aarch64_addsvl_addspl_immediate_p, aarch64_output_addsvl_addspl)
4836 (aarch64_output_sme_zero_za): Declare.
4837 (aarch64_output_move_struct): Delete.
4838 (aarch64_sme_ldr_vnum_offset): Declare.
4839 (aarch64_sve::handle_arm_sme_h): Likewise.
4840 * config/aarch64/aarch64.h (AARCH64_ISA_SM_ON): New macro.
4841 (AARCH64_ISA_SME_I16I64, AARCH64_ISA_SME_F64F64): Likewise.
4842 (TARGET_STREAMING, TARGET_STREAMING_SME): Likewise.
4843 (TARGET_SME_I16I64, TARGET_SME_F64F64): Likewise.
4844 * config/aarch64/aarch64.cc (aarch64_sve_rdvl_factor_p): Rename to...
4845 (aarch64_sve_rdvl_addvl_factor_p): ...this.
4846 (aarch64_sve_rdvl_immediate_p): Update accordingly.
4847 (aarch64_rdsvl_immediate_p, aarch64_add_offset): Likewise.
4848 (aarch64_sme_vq_immediate): Likewise. Make public.
4849 (aarch64_sve_addpl_factor_p): New function.
4850 (aarch64_sve_addvl_addpl_immediate_p): Use
4851 aarch64_sve_rdvl_addvl_factor_p and aarch64_sve_addpl_factor_p.
4852 (aarch64_addsvl_addspl_immediate_p): New function.
4853 (aarch64_output_addsvl_addspl): Likewise.
4854 (aarch64_cannot_force_const_mem): Return true for RDSVL immediates.
4855 (aarch64_classify_index): Handle .Q scaling for VNx1TImode.
4856 (aarch64_classify_address): Likewise for vnum offsets.
4857 (aarch64_output_sme_zero_za): New function.
4858 (aarch64_sme_ldr_vnum_offset_p): Likewise.
4859 * config/aarch64/predicates.md (aarch64_addsvl_addspl_immediate):
4861 (aarch64_pluslong_operand): Include it for SME.
4862 * config/aarch64/constraints.md (Ucj, Uav): New constraints.
4863 * config/aarch64/iterators.md (VNx1TI_ONLY): New mode iterator.
4864 (SME_ZA_I, SME_ZA_SDI, SME_ZA_SDF_I, SME_MOP_BHI): Likewise.
4865 (SME_MOP_HSDF): Likewise.
4866 (UNSPEC_SME_ADDHA, UNSPEC_SME_ADDVA, UNSPEC_SME_FMOPA)
4867 (UNSPEC_SME_FMOPS, UNSPEC_SME_LD1_HOR, UNSPEC_SME_LD1_VER)
4868 (UNSPEC_SME_READ_HOR, UNSPEC_SME_READ_VER, UNSPEC_SME_SMOPA)
4869 (UNSPEC_SME_SMOPS, UNSPEC_SME_ST1_HOR, UNSPEC_SME_ST1_VER)
4870 (UNSPEC_SME_SUMOPA, UNSPEC_SME_SUMOPS, UNSPEC_SME_UMOPA)
4871 (UNSPEC_SME_UMOPS, UNSPEC_SME_USMOPA, UNSPEC_SME_USMOPS)
4872 (UNSPEC_SME_WRITE_HOR, UNSPEC_SME_WRITE_VER): New unspecs.
4873 (elem_bits): Handle x2 and x4 structure modes, plus VNx1TI.
4874 (Vetype, Vesize, VPRED): Handle VNx1TI.
4875 (b): New mode attribute.
4876 (SME_LD1, SME_READ, SME_ST1, SME_WRITE, SME_BINARY_SDI, SME_INT_MOP)
4877 (SME_FP_MOP): New int iterators.
4878 (optab): Handle SME unspecs.
4879 (hv): New int attribute.
4880 * config/aarch64/aarch64.md (*add<mode>3_aarch64): Handle ADDSVL
4882 * config/aarch64/aarch64-sme.md (UNSPEC_SME_LDR): New unspec.
4883 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
4884 (aarch64_sme_ldr0, @aarch64_sme_ldrn<mode>): New patterns.
4885 (UNSPEC_SME_STR): New unspec.
4886 (@aarch64_sme_<optab><mode>, @aarch64_sme_<optab><mode>_plus)
4887 (aarch64_sme_str0, @aarch64_sme_strn<mode>): New patterns.
4888 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
4889 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
4890 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
4891 (@aarch64_sme_<optab><v_int_container><mode>): Likewise.
4892 (*aarch64_sme_<optab><v_int_container><mode>_plus): Likewise.
4893 (@aarch64_sme_<optab><VNx1TI_ONLY:mode><SVE_FULL:mode>): Likewise.
4894 (UNSPEC_SME_ZERO): New unspec.
4895 (aarch64_sme_zero): New pattern.
4896 (@aarch64_sme_<SME_BINARY_SDI:optab><mode>): Likewise.
4897 (@aarch64_sme_<SME_INT_MOP:optab><mode>): Likewise.
4898 (@aarch64_sme_<SME_FP_MOP:optab><mode>): Likewise.
4899 * config/aarch64/aarch64-sve-builtins.def: Add ZA type suffixes.
4900 Include aarch64-sve-builtins-sme.def.
4901 (DEF_SME_ZA_FUNCTION): New macro.
4902 * config/aarch64/aarch64-sve-builtins.h (CP_READ_ZA): New call
4904 (CP_WRITE_ZA): Likewise.
4905 (PRED_za_m): New predication type.
4906 (type_suffix_index): Handle DEF_SME_ZA_SUFFIX.
4907 (type_suffix_info): Add vector_p and za_p fields.
4908 (function_instance::num_za_tiles): New member function.
4909 (function_builder::get_attributes): Add an aarch64_feature_flags
4911 (function_expander::get_contiguous_base): Take a base argument
4912 number, a vnum argument number, and an argument that indicates
4913 whether the vnum parameter is a factor of the SME vector length
4914 or the prevailing vector length.
4915 (function_expander::add_integer_operand): Take a poly_int64.
4916 (sve_switcher::sve_switcher): Take a base set of flags.
4917 (sme_switcher): New class.
4918 (scalar_types): Add a null entry for NUM_VECTOR_TYPES.
4919 * config/aarch64/aarch64-sve-builtins.cc: Include
4920 aarch64-sve-builtins-sme.h.
4921 (pred_suffixes): Add an entry for PRED_za_m.
4922 (type_suffixes): Initialize vector_p and za_p. Handle ZA suffixes.
4923 (TYPES_all_za, TYPES_d_za, TYPES_za_bhsd_data, TYPES_za_all_data)
4924 (TYPES_za_s_integer, TYPES_za_d_integer, TYPES_mop_base)
4925 (TYPES_mop_base_signed, TYPES_mop_base_unsigned, TYPES_mop_i16i64)
4926 (TYPES_mop_i16i64_signed, TYPES_mop_i16i64_unsigned, TYPES_za): New
4928 (preds_m, preds_za_m): New predication lists.
4929 (function_groups): Handle DEF_SME_ZA_FUNCTION.
4930 (scalar_types): Add an entry for NUM_VECTOR_TYPES.
4931 (find_type_suffix_for_scalar_type): Check positively for vectors
4932 rather than negatively for predicates.
4933 (check_required_extensions): Handle PSTATE.SM and PSTATE.ZA
4935 (report_out_of_range): Handle the case where the minimum and
4936 maximum are the same.
4937 (function_instance::reads_global_state_p): Return true for functions
4939 (function_instance::modifies_global_state_p): Return true for functions
4941 (sve_switcher::sve_switcher): Add a base flags argument.
4942 (function_builder::get_name): Handle "__arm_" prefixes.
4943 (add_attribute): Add an overload that takes a namespaces.
4944 (add_shared_state_attribute): New function.
4945 (function_builder::get_attributes): Take the required feature flags
4946 as argument. Add streaming and ZA attributes where appropriate.
4947 (function_builder::add_unique_function): Update calls accordingly.
4948 (function_resolver::check_gp_argument): Assert that the predication
4949 isn't ZA _m predication.
4950 (function_checker::function_checker): Don't bias the argument
4951 number for ZA _m predication.
4952 (function_expander::get_contiguous_base): Add arguments that
4953 specify the base argument number, the vnum argument number,
4954 and an argument that indicates whether the vnum parameter is
4955 a factor of the SME vector length or the prevailing vector length.
4956 Handle the SME case.
4957 (function_expander::add_input_operand): Handle pmode_register_operand.
4958 (function_expander::add_integer_operand): Take a poly_int64.
4959 (init_builtins): Call handle_arm_sme_h for LTO.
4960 (handle_arm_sve_h): Skip SME intrinsics.
4961 (handle_arm_sme_h): New function.
4962 * config/aarch64/aarch64-sve-builtins-functions.h
4963 (read_write_za, write_za): New classes.
4964 (unspec_based_sme_function, za_arith_function): New using aliases.
4965 (quiet_za_arith_function): Likewise.
4966 * config/aarch64/aarch64-sve-builtins-shapes.h
4967 (binary_za_int_m, binary_za_m, binary_za_uint_m, bool_inherent)
4968 (inherent_za, inherent_mask_za, ldr_za, load_za, read_za_m, store_za)
4969 (str_za, unary_za_m, write_za_m): Declare.
4970 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
4971 Expect za_m functions to have an existing governing predicate.
4972 (binary_za_m_base, binary_za_int_m_def, binary_za_m_def): New classes.
4973 (binary_za_uint_m_def, bool_inherent_def, inherent_za_def): Likewise.
4974 (inherent_mask_za_def, ldr_za_def, load_za_def, read_za_m_def)
4975 (store_za_def, str_za_def, unary_za_m_def, write_za_m_def): Likewise.
4976 * config/aarch64/arm_sme.h: New file.
4977 * config/aarch64/aarch64-sve-builtins-sme.h: Likewise.
4978 * config/aarch64/aarch64-sve-builtins-sme.cc: Likewise.
4979 * config/aarch64/aarch64-sve-builtins-sme.def: Likewise.
4980 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
4981 aarch64-sve-builtins-sme.def and aarch64-sve-builtins-sme.h.
4982 (aarch64-sve-builtins-sme.o): New rule.
4984 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4986 * config/aarch64/aarch64-sve-builtins.h
4987 (function_shape::has_merge_argument_p): New member function.
4988 * config/aarch64/aarch64-sve-builtins.cc:
4989 (function_resolver::check_gp_argument): Use it.
4990 (function_expander::get_fallback_value): Likewise.
4991 * config/aarch64/aarch64-sve-builtins-shapes.cc
4992 (apply_predication): Likewise.
4993 (unary_convert_narrowt_def::has_merge_argument_p): New function.
4995 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
4997 * config/aarch64/aarch64-sve-builtins-functions.h
4998 (unspec_based_function_base): Allow type suffix 1 to determine
4999 the mode of the operation.
5000 (unspec_based_function): Update accordingly.
5001 (unspec_based_fused_function): Likewise.
5002 (unspec_based_fused_lane_function): Likewise.
5004 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5006 * config/aarch64/aarch64-modes.def: Add VNx1TI.
5008 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5010 * config/aarch64/aarch64.h (W12_W15_REGNUM_P): New macro.
5011 (W12_W15_REGS): New register class.
5012 (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add entries for it.
5013 * config/aarch64/aarch64.cc (aarch64_regno_regclass)
5014 (aarch64_class_max_nregs, aarch64_register_move_cost): Handle
5017 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5019 * config/aarch64/aarch64-isa-modes.def (ZA_ON): New ISA mode.
5020 * config/aarch64/aarch64-protos.h (aarch64_rdsvl_immediate_p)
5021 (aarch64_output_rdsvl, aarch64_optimize_mode_switching)
5022 (aarch64_restore_za): Declare.
5023 * config/aarch64/constraints.md (UsR): New constraint.
5024 * config/aarch64/aarch64.md (LOWERING_REGNUM, TPIDR_BLOCK_REGNUM)
5025 (SME_STATE_REGNUM, TPIDR2_SETUP_REGNUM, ZA_FREE_REGNUM)
5026 (ZA_SAVED_REGNUM, ZA_REGNUM, FIRST_FAKE_REGNUM): New constants.
5027 (LAST_FAKE_REGNUM): Likewise.
5028 (UNSPEC_SAVE_NZCV, UNSPEC_RESTORE_NZCV, UNSPEC_SME_VQ): New unspecs.
5030 (arch_enabled): Handle it.
5031 (*cb<optab><mode>1): Rename to...
5032 (aarch64_cb<optab><mode>1): ...this.
5033 (*movsi_aarch64): Add an alternative for RDSVL.
5034 (*movdi_aarch64): Likewise.
5035 (aarch64_save_nzcv, aarch64_restore_nzcv): New insns.
5036 * config/aarch64/aarch64-sme.md (UNSPEC_SMSTOP_ZA)
5037 (UNSPEC_INITIAL_ZERO_ZA, UNSPEC_TPIDR2_SAVE, UNSPEC_TPIDR2_RESTORE)
5038 (UNSPEC_READ_TPIDR2, UNSPEC_WRITE_TPIDR2, UNSPEC_SETUP_LOCAL_TPIDR2)
5039 (UNSPEC_RESTORE_ZA, UNSPEC_START_PRIVATE_ZA_CALL): New unspecs.
5040 (UNSPEC_END_PRIVATE_ZA_CALL, UNSPEC_COMMIT_LAZY_SAVE): Likewise.
5041 (UNSPECV_ASM_UPDATE_ZA): New unspecv.
5042 (aarch64_tpidr2_save, aarch64_smstart_za, aarch64_smstop_za)
5043 (aarch64_initial_zero_za, aarch64_setup_local_tpidr2)
5044 (aarch64_clear_tpidr2, aarch64_write_tpidr2, aarch64_read_tpidr2)
5045 (aarch64_tpidr2_restore, aarch64_restore_za, aarch64_asm_update_za)
5046 (aarch64_start_private_za_call, aarch64_end_private_za_call)
5047 (aarch64_commit_lazy_save): New patterns.
5048 * config/aarch64/aarch64.h (AARCH64_ISA_ZA_ON, TARGET_ZA): New macros.
5049 (FIXED_REGISTERS, REGISTER_NAMES): Add the new fake ZA registers.
5050 (CALL_USED_REGISTERS): Replace with...
5051 (CALL_REALLY_USED_REGISTERS): ...this and add the fake ZA registers.
5052 (FIRST_PSEUDO_REGISTER): Bump to include the fake ZA registers.
5053 (FAKE_REGS): New register class.
5054 (REG_CLASS_NAMES): Update accordingly.
5055 (REG_CLASS_CONTENTS): Likewise.
5056 (machine_function::tpidr2_block): New member variable.
5057 (machine_function::tpidr2_block_ptr): Likewise.
5058 (machine_function::za_save_buffer): Likewise.
5059 (machine_function::next_asm_update_za_id): Likewise.
5060 (CUMULATIVE_ARGS::shared_za_flags): Likewise.
5061 (aarch64_mode_entity, aarch64_local_sme_state): New enums.
5062 (aarch64_tristate_mode): Likewise.
5063 (OPTIMIZE_MODE_SWITCHING, NUM_MODES_FOR_MODE_SWITCHING): Define.
5064 * config/aarch64/aarch64.cc (AARCH64_STATE_SHARED, AARCH64_STATE_IN)
5065 (AARCH64_STATE_OUT): New constants.
5066 (aarch64_attribute_shared_state_flags): New function.
5067 (aarch64_lookup_shared_state_flags, aarch64_fndecl_has_new_state)
5068 (aarch64_check_state_string, cmp_string_csts): Likewise.
5069 (aarch64_merge_string_arguments, aarch64_check_arm_new_against_type)
5070 (handle_arm_new, handle_arm_shared): Likewise.
5071 (handle_arm_new_za_attribute): New
5072 (aarch64_arm_attribute_table): Add new, preserves, in, out, and inout.
5073 (aarch64_hard_regno_nregs): Handle FAKE_REGS.
5074 (aarch64_hard_regno_mode_ok): Likewise.
5075 (aarch64_fntype_shared_flags, aarch64_fntype_pstate_za): New functions.
5076 (aarch64_fntype_isa_mode): Include aarch64_fntype_pstate_za.
5077 (aarch64_fndecl_has_state, aarch64_fndecl_pstate_za): New functions.
5078 (aarch64_fndecl_isa_mode): Include aarch64_fndecl_pstate_za.
5079 (aarch64_cfun_incoming_pstate_za, aarch64_cfun_shared_flags)
5080 (aarch64_cfun_has_new_state, aarch64_cfun_has_state): New functions.
5081 (aarch64_sme_vq_immediate, aarch64_sme_vq_unspec_p): Likewise.
5082 (aarch64_rdsvl_immediate_p, aarch64_output_rdsvl): Likewise.
5083 (aarch64_expand_mov_immediate): Handle RDSVL immediates.
5084 (aarch64_function_arg): Add the ZA sharing flags as a third limb
5086 (aarch64_init_cumulative_args): Record the ZA sharing flags.
5087 (aarch64_extra_live_on_entry): New function. Handle the new
5088 ZA-related fake registers.
5089 (aarch64_epilogue_uses): Handle the new ZA-related fake registers.
5090 (aarch64_cannot_force_const_mem): Handle UNSPEC_SME_VQ constants.
5091 (aarch64_get_tpidr2_block, aarch64_get_tpidr2_ptr): New functions.
5092 (aarch64_init_tpidr2_block, aarch64_restore_za): Likewise.
5093 (aarch64_layout_frame): Check whether the current function creates
5094 new ZA state. Record that it clobbers LR if so.
5095 (aarch64_expand_prologue): Handle functions that create new ZA state.
5096 (aarch64_expand_epilogue): Likewise.
5097 (aarch64_create_tpidr2_block): New function.
5098 (aarch64_restore_za): Likewise.
5099 (aarch64_start_call_args): Disallow calls to shared-ZA functions
5100 from functions that have no ZA state. Emit a marker instruction
5101 before calls to private-ZA functions from functions that have
5103 (aarch64_expand_call): Add return registers for state that is
5104 managed via attributes. Record the use and clobber information
5105 for the ZA registers.
5106 (aarch64_end_call_args): New function.
5107 (aarch64_regno_regclass): Handle FAKE_REGS.
5108 (aarch64_class_max_nregs): Likewise.
5109 (aarch64_override_options_internal): Require TARGET_SME for
5110 functions that have ZA state.
5111 (aarch64_conditional_register_usage): Handle FAKE_REGS.
5112 (aarch64_mov_operand_p): Handle RDSVL immediates.
5113 (aarch64_comp_type_attributes): Check that the ZA sharing flags
5115 (aarch64_merge_decl_attributes): New function.
5116 (aarch64_optimize_mode_switching, aarch64_mode_emit_za_save_buffer)
5117 (aarch64_mode_emit_local_sme_state, aarch64_mode_emit): Likewise.
5118 (aarch64_insn_references_sme_state_p): Likewise.
5119 (aarch64_mode_needed_local_sme_state): Likewise.
5120 (aarch64_mode_needed_za_save_buffer, aarch64_mode_needed): Likewise.
5121 (aarch64_mode_after_local_sme_state, aarch64_mode_after): Likewise.
5122 (aarch64_local_sme_confluence, aarch64_mode_confluence): Likewise.
5123 (aarch64_one_shot_backprop, aarch64_local_sme_backprop): Likewise.
5124 (aarch64_mode_backprop, aarch64_mode_entry): Likewise.
5125 (aarch64_mode_exit, aarch64_mode_eh_handler): Likewise.
5126 (aarch64_mode_priority, aarch64_md_asm_adjust): Likewise.
5127 (TARGET_END_CALL_ARGS, TARGET_MERGE_DECL_ATTRIBUTES): Define.
5128 (TARGET_MODE_EMIT, TARGET_MODE_NEEDED, TARGET_MODE_AFTER): Likewise.
5129 (TARGET_MODE_CONFLUENCE, TARGET_MODE_BACKPROP): Likewise.
5130 (TARGET_MODE_ENTRY, TARGET_MODE_EXIT): Likewise.
5131 (TARGET_MODE_EH_HANDLER, TARGET_MODE_PRIORITY): Likewise.
5132 (TARGET_EXTRA_LIVE_ON_ENTRY): Likewise.
5133 (TARGET_MD_ASM_ADJUST): Use aarch64_md_asm_adjust.
5134 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
5135 Define __arm_new, __arm_preserves,__arm_in, __arm_out, and __arm_inout.
5137 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5139 * config/aarch64/aarch64-passes.def
5140 (pass_late_thread_prologue_and_epilogue): New pass.
5141 * config/aarch64/aarch64-sme.md: New file.
5142 * config/aarch64/aarch64.md: Include it.
5143 (*tb<optab><mode>1): Rename to...
5144 (@aarch64_tb<optab><mode>): ...this.
5145 (call, call_value, sibcall, sibcall_value): Don't require operand 2
5147 * config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Return
5149 (make_pass_switch_sm_state): Declare.
5150 * config/aarch64/aarch64.h (TARGET_STREAMING_COMPATIBLE): New macro.
5151 (CALL_USED_REGISTER): Mark VG as call-preserved.
5152 (aarch64_frame::old_svcr_offset): New member variable.
5153 (machine_function::call_switches_sm_state): Likewise.
5154 (CUMULATIVE_ARGS::num_sme_mode_switch_args): Likewise.
5155 (CUMULATIVE_ARGS::sme_mode_switch_args): Likewise.
5156 * config/aarch64/aarch64.cc: Include tree-pass.h and cfgbuild.h.
5157 (aarch64_cfun_incoming_pstate_sm): New function.
5158 (aarch64_call_switches_pstate_sm): Likewise.
5159 (aarch64_reg_save_mode): Return DImode for VG_REGNUM.
5160 (aarch64_callee_isa_mode): New function.
5161 (aarch64_insn_callee_isa_mode): Likewise.
5162 (aarch64_guard_switch_pstate_sm): Likewise.
5163 (aarch64_switch_pstate_sm): Likewise.
5164 (aarch64_sme_mode_switch_regs): New class.
5165 (aarch64_record_sme_mode_switch_args): New function.
5166 (aarch64_finish_sme_mode_switch_args): Likewise.
5167 (aarch64_function_arg): Handle the end marker by returning a
5168 PARALLEL that contains the ABI cookie that we used previously
5169 alongside the result of aarch64_finish_sme_mode_switch_args.
5170 (aarch64_init_cumulative_args): Initialize num_sme_mode_switch_args.
5171 (aarch64_function_arg_advance): If a call would switch SM state,
5172 record all argument registers that would need to be saved around
5174 (aarch64_need_old_pstate_sm): New function.
5175 (aarch64_layout_frame): Decide whether the frame needs to store the
5176 incoming value of PSTATE.SM and allocate a save slot for it if so.
5177 If a function switches SME state, arrange to save the old value
5178 of the DWARF VG register. Handle the case where this is the only
5179 register save slot above the FP.
5180 (aarch64_save_callee_saves): Handles saves of the DWARF VG register.
5181 (aarch64_get_separate_components): Prevent such saves from being
5183 (aarch64_old_svcr_mem): New function.
5184 (aarch64_read_old_svcr): Likewise.
5185 (aarch64_guard_switch_pstate_sm): Likewise.
5186 (aarch64_expand_prologue): Handle saves of the DWARF VG register.
5187 Initialize any SVCR save slot.
5188 (aarch64_expand_call): Allow the cookie to be PARALLEL that contains
5189 both the UNSPEC_CALLEE_ABI value and a list of registers that need
5190 to be preserved across a change to PSTATE.SM. If the call does
5191 involve such a change to PSTATE.SM, record the registers that
5192 would be clobbered by this process. Also emit an instruction
5193 to mark the temporary change in VG. Update call_switches_pstate_sm.
5194 (aarch64_emit_call_insn): Return the emitted instruction.
5195 (aarch64_frame_pointer_required): New function.
5196 (aarch64_conditional_register_usage): Prevent VG_REGNUM from being
5197 treated as a register operand.
5198 (aarch64_switch_pstate_sm_for_call): New function.
5199 (pass_data_switch_pstate_sm): New pass variable.
5200 (pass_switch_pstate_sm): New pass class.
5201 (make_pass_switch_pstate_sm): New function.
5202 (TARGET_FRAME_POINTER_REQUIRED): Define.
5203 * config/aarch64/t-aarch64 (s-check-sve-md): Add aarch64-sme.md.
5205 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5207 * config/aarch64/aarch64.h (TARGET_NON_STREAMING): New macro.
5208 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Use it.
5209 (TARGET_SVE2_SHA3, TARGET_SVE2_SM4): Likewise.
5210 * config/aarch64/aarch64-sve-builtins-base.def: Separate out
5211 the functions that require PSTATE.SM to be 0 and guard them
5212 with AARCH64_FL_SM_OFF.
5213 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
5214 * config/aarch64/aarch64-sve-builtins.cc (check_required_extensions):
5215 Enforce AARCH64_FL_SM_OFF requirements.
5216 * config/aarch64/aarch64-sve.md (aarch64_wrffr): Require
5217 TARGET_NON_STREAMING
5218 (aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest): Likewise.
5219 (*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
5220 (@aarch64_ld<fn>f1<mode>): Likewise.
5221 (@aarch64_ld<fn>f1_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>)
5222 (gather_load<mode><v_int_container>): Likewise
5223 (mask_gather_load<mode><v_int_container>): Likewise.
5224 (mask_gather_load<mode><v_int_container>): Likewise.
5225 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
5226 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
5227 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
5228 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>)
5229 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5230 <SVE_2BHSI:mode>): Likewise.
5231 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5232 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked)
5233 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5234 <SVE_2BHSI:mode>_sxtw): Likewise.
5235 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
5236 <SVE_2BHSI:mode>_uxtw): Likewise.
5237 (@aarch64_ldff1_gather<mode>, @aarch64_ldff1_gather<mode>): Likewise.
5238 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
5239 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
5240 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
5241 <VNx4_NARROW:mode>): Likewise.
5242 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5243 <VNx2_NARROW:mode>): Likewise.
5244 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5245 <VNx2_NARROW:mode>_sxtw): Likewise.
5246 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
5247 <VNx2_NARROW:mode>_uxtw): Likewise.
5248 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx4SI_ONLY:mode>)
5249 (@aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>)
5250 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_sxtw)
5251 (*aarch64_sve_gather_prefetch<SVE_FULL_I:mode><VNx2DI_ONLY:mode>_uxtw)
5252 (scatter_store<mode><v_int_container>): Likewise.
5253 (mask_scatter_store<mode><v_int_container>): Likewise.
5254 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
5255 (*mask_scatter_store<mode><v_int_container>_sxtw): Likewise.
5256 (*mask_scatter_store<mode><v_int_container>_uxtw): Likewise.
5257 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
5258 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
5259 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
5260 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
5261 (@aarch64_sve_ld1ro<mode>, @aarch64_adr<mode>): Likewise.
5262 (*aarch64_adr_sxtw, *aarch64_adr_uxtw_unspec): Likewise.
5263 (*aarch64_adr_uxtw_and, @aarch64_adr<mode>_shift): Likewise.
5264 (*aarch64_adr<mode>_shift, *aarch64_adr_shift_sxtw): Likewise.
5265 (*aarch64_adr_shift_uxtw, @aarch64_sve_add_<optab><vsi2qi>): Likewise.
5266 (@aarch64_sve_<sve_fp_op><mode>, fold_left_plus_<mode>): Likewise.
5267 (mask_fold_left_plus_<mode>, @aarch64_sve_compact<mode>): Likewise.
5268 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>)
5269 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
5270 <SVE_PARTIAL_I:mode>): Likewise.
5271 (@aarch64_sve2_histcnt<mode>, @aarch64_sve2_histseg<mode>): Likewise.
5272 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
5273 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
5274 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
5275 * config/aarch64/iterators.md (SVE_FP_UNARY_INT): Make FEXPA
5276 depend on TARGET_NON_STREAMING.
5277 (SVE_BFLOAT_TERNARY_LONG): Likewise BFMMLA.
5279 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5281 * config/aarch64/aarch64.h (TARGET_BASE_SIMD): New macro.
5282 (TARGET_SIMD): Require PSTATE.SM to be 0.
5283 (AARCH64_ISA_SM_OFF): New macro.
5284 * config/aarch64/aarch64.cc (aarch64_array_mode_supported_p):
5285 Allow Advanced SIMD structure modes for TARGET_BASE_SIMD.
5286 (aarch64_print_operand): Support '%Z'.
5287 (aarch64_secondary_reload): Expect SVE moves to be used for
5288 Advanced SIMD modes if SVE is enabled and non-streaming
5289 Advanced SIMD isn't.
5290 (aarch64_register_move_cost): Likewise.
5291 (aarch64_simd_container_mode): Extend Advanced SIMD mode
5292 handling to TARGET_BASE_SIMD.
5293 (aarch64_expand_cpymem): Expand commentary.
5294 * config/aarch64/aarch64.md (arches): Add base_simd and nobase_simd.
5295 (arch_enabled): Handle it.
5296 (*mov<mode>_aarch64): Extend UMOV alternative to TARGET_BASE_SIMD.
5297 (*movti_aarch64): Use an SVE move instruction if non-streaming
5298 SIMD isn't available.
5299 (*mov<TFD:mode>_aarch64): Likewise.
5300 (load_pair_dw_tftf): Extend to TARGET_BASE_SIMD.
5301 (store_pair_dw_tftf): Likewise.
5302 (loadwb_pair<TX:mode>_<P:mode>): Likewise.
5303 (storewb_pair<TX:mode>_<P:mode>): Likewise.
5304 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
5305 Allow UMOV in streaming mode.
5306 (*aarch64_simd_mov<VQMOV:mode>): Use an SVE move instruction
5307 if non-streaming SIMD isn't available.
5308 (aarch64_store_lane0<mode>): Depend on TARGET_FLOAT rather than
5310 (aarch64_simd_mov_from_<mode>low): Likewise. Use fmov if
5311 Advanced SIMD is completely disabled.
5312 (aarch64_simd_mov_from_<mode>high): Use SVE EXT instructions if
5313 non-streaming SIMD isn't available.
5315 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5317 * doc/invoke.texi: Document SME.
5318 * doc/sourcebuild.texi: Document aarch64_sve.
5319 * config/aarch64/aarch64-option-extensions.def (sme): Define.
5320 * config/aarch64/aarch64.h (AARCH64_ISA_SME): New macro.
5321 (TARGET_SME): Likewise.
5322 * config/aarch64/aarch64.cc (aarch64_override_options_internal):
5323 Ensure that SME is present when compiling streaming code.
5325 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5327 * config/aarch64/aarch64-isa-modes.def: New file.
5328 * config/aarch64/aarch64.h: Include it in the feature enumerations.
5329 (AARCH64_FL_SM_STATE, AARCH64_FL_ISA_MODES): New constants.
5330 (AARCH64_FL_DEFAULT_ISA_MODE): Likewise.
5331 (AARCH64_ISA_MODE): New macro.
5332 (CUMULATIVE_ARGS): Add an isa_mode field.
5333 * config/aarch64/aarch64-protos.h (aarch64_gen_callee_cookie): Declare.
5334 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
5335 * config/aarch64/aarch64.cc (attr_streaming_exclusions)
5336 (aarch64_gnu_attributes, aarch64_gnu_attribute_table)
5337 (aarch64_arm_attributes, aarch64_arm_attribute_table): New tables.
5338 (aarch64_attribute_table): Redefine to include the gnu and arm
5340 (aarch64_fntype_pstate_sm, aarch64_fntype_isa_mode): New functions.
5341 (aarch64_fndecl_pstate_sm, aarch64_fndecl_isa_mode): Likewise.
5342 (aarch64_gen_callee_cookie, aarch64_callee_abi): Likewise.
5343 (aarch64_insn_callee_cookie, aarch64_insn_callee_abi): Use them.
5344 (aarch64_function_arg, aarch64_output_mi_thunk): Likewise.
5345 (aarch64_init_cumulative_args): Initialize the isa_mode field.
5346 (aarch64_output_mi_thunk): Use aarch64_gen_callee_cookie to get
5348 (aarch64_override_options): Add the ISA mode to the feature set.
5349 (aarch64_temporary_target::copy_from_fndecl): Likewise.
5350 (aarch64_fndecl_options, aarch64_handle_attr_arch): Likewise.
5351 (aarch64_set_current_function): Maintain the correct ISA mode.
5352 (aarch64_tlsdesc_abi_id): Return an arm_pcs.
5353 (aarch64_comp_type_attributes): Handle arm::streaming and
5354 arm::streaming_compatible.
5355 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
5356 Define __arm_streaming and __arm_streaming_compatible.
5357 * config/aarch64/aarch64.md (tlsdesc_small_<mode>): Use
5358 aarch64_gen_callee_cookie to get the ABI cookie.
5359 * config/aarch64/t-aarch64 (TM_H): Add all feature-related .def files.
5361 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5363 * config/aarch64/aarch64-sve-builtins-base.cc
5364 (svreinterpret_impl::fold): Punt on tuple forms.
5365 (svreinterpret_impl::expand): Use tuple_mode instead of vector_mode.
5366 * config/aarch64/aarch64-sve-builtins-base.def (svreinterpret):
5367 Extend to x1234 groups.
5368 * config/aarch64/aarch64-sve-builtins-functions.h
5369 (multi_vector_function::vectors_per_tuple): If the function has
5370 a group suffix, get the number of vectors from there.
5371 * config/aarch64/aarch64-sve-builtins-shapes.h (reinterpret): Declare.
5372 * config/aarch64/aarch64-sve-builtins-shapes.cc (reinterpret_def)
5373 (reinterpret): New function shape.
5374 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Handle
5375 DEF_SVE_FUNCTION_GS.
5376 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_FUNCTION_GS): New
5378 (DEF_SVE_FUNCTION): Forward to DEF_SVE_FUNCTION_GS by default.
5379 * config/aarch64/aarch64-sve-builtins.h
5380 (function_instance::tuple_mode): New member function.
5381 (function_base::vectors_per_tuple): Take the function instance
5382 as argument and get the number from the group suffix.
5383 (function_instance::vectors_per_tuple): Update accordingly.
5384 * config/aarch64/iterators.md (SVE_FULLx2, SVE_FULLx3, SVE_FULLx4)
5385 (SVE_ALL_STRUCT): New mode iterators.
5386 (SVE_STRUCT): Redefine in terms of SVE_FULL*.
5387 * config/aarch64/aarch64-sve.md (@aarch64_sve_reinterpret<mode>)
5388 (*aarch64_sve_reinterpret<mode>): Extend to SVE structure modes.
5390 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5392 * config/aarch64/aarch64-sve-builtins.cc
5393 (function_resolver::require_derived_vector_type): Add a specific
5394 error message for the case in which the caller wants a single
5395 vector whose element type matches a previous tuyple argument.
5397 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5399 * config/aarch64/aarch64-sve-builtins.h
5400 (function_resolver::lookup_form): Add an overload that takes
5401 an sve_type rather than type and group suffixes.
5402 (function_resolver::resolve_to): Likewise.
5403 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
5404 (function_resolver::infer_tuple_type): Likewise.
5405 (function_resolver::require_matching_vector_type): Take an sve_type
5406 rather than a type_suffix_index.
5407 (function_resolver::require_derived_vector_type): Likewise.
5408 * config/aarch64/aarch64-sve-builtins.cc (num_vectors_to_group):
5410 (function_resolver::lookup_form): Add an overload that takes
5411 an sve_type rather than type and group suffixes.
5412 (function_resolver::resolve_to): Likewise.
5413 (function_resolver::infer_vector_or_tuple_type): Return an sve_type.
5414 (function_resolver::infer_tuple_type): Likewise.
5415 (function_resolver::infer_vector_type): Update accordingly.
5416 (function_resolver::require_matching_vector_type): Take an sve_type
5417 rather than a type_suffix_index.
5418 (function_resolver::require_derived_vector_type): Likewise.
5419 * config/aarch64/aarch64-sve-builtins-shapes.cc (get_def::resolve)
5420 (set_def::resolve, store_def::resolve, tbl_tuple_def::resolve): Update
5423 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5425 * config/aarch64/aarch64-sve-builtins.h
5426 (function_resolver::require_matching_vector_type): Add a parameter
5427 that specifies the number of the earlier argument that is being
5429 * config/aarch64/aarch64-sve-builtins.cc
5430 (function_resolver::require_matching_vector_type): Likewise.
5431 (require_derived_vector_type): Update calls accordingly.
5432 (function_resolver::resolve_unary): Likewise.
5433 (function_resolver::resolve_uniform): Likewise.
5434 (function_resolver::resolve_uniform_opt_n): Likewise.
5435 * config/aarch64/aarch64-sve-builtins-shapes.cc
5436 (binary_long_lane_def::resolve): Likewise.
5437 (clast_def::resolve, ternary_uint_def::resolve): Likewise.
5439 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5441 * config/aarch64/aarch64-sve-builtins.h
5442 (function_resolver::infer_sve_type): New member function.
5443 (function_resolver::report_incorrect_num_vectors): Likewise.
5444 * config/aarch64/aarch64-sve-builtins.cc
5445 (function_resolver::infer_sve_type): New function,.
5446 (function_resolver::report_incorrect_num_vectors): New function,
5448 (function_resolver::infer_vector_or_tuple_type): ...here. Use
5451 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5453 * config/aarch64/aarch64-sve-builtins.h (sve_type): New struct.
5454 (sve_type::operator==): New function.
5455 (function_resolver::get_vector_type): Delete.
5456 (function_resolver::report_no_such_form): Take an sve_type rather
5457 than a type_suffix_index.
5458 * config/aarch64/aarch64-sve-builtins.cc (get_vector_type): New
5460 (function_resolver::get_vector_type): Delete.
5461 (function_resolver::report_no_such_form): Take an sve_type rather
5462 than a type_suffix_index.
5463 (find_sve_type): New function, split out from...
5464 (function_resolver::infer_vector_or_tuple_type): ...here.
5466 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5468 * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Take
5469 a group suffix index parameter.
5470 (build_32_64, build_all): Update accordingly. Iterate over all
5472 * config/aarch64/aarch64-sve-builtins-sve2.cc (svqrshl_impl::fold)
5473 (svqshl_impl::fold, svrshl_impl::fold): Update function_instance
5475 * config/aarch64/aarch64-sve-builtins.cc (group_suffixes): New array.
5476 (groups_none): New constant.
5477 (function_groups): Initialize the groups field.
5478 (function_instance::hash): Hash the group index.
5479 (function_builder::get_name): Add the group suffix.
5480 (function_builder::add_overloaded_functions): Iterate over all
5482 (function_resolver::lookup_form): Take a group suffix parameter.
5483 (function_resolver::resolve_to): Likewise.
5484 * config/aarch64/aarch64-sve-builtins.def (DEF_SVE_GROUP_SUFFIX): New
5486 (x2, x3, x4): New group suffixes.
5487 * config/aarch64/aarch64-sve-builtins.h (group_suffix_index): New enum.
5488 (group_suffix_info): New structure.
5489 (function_group_info::groups): New member variable.
5490 (function_instance::group_suffix_id): Likewise.
5491 (group_suffixes): New array.
5492 (function_instance::operator==): Compare the group suffixes.
5493 (function_instance::group_suffix): New function.
5495 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5497 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Remove
5498 implied requirement on SVE.
5499 * config/aarch64/aarch64-sve-builtins-base.def: Explicitly require SVE.
5500 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
5502 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5504 * config/aarch64/aarch64-protos.h (aarch64_sve_rdvl_immediate_p)
5505 (aarch64_output_sve_rdvl): Declare.
5506 * config/aarch64/aarch64.cc (aarch64_sve_cnt_factor_p): New
5507 function, split out from...
5508 (aarch64_sve_cnt_immediate_p): ...here.
5509 (aarch64_sve_rdvl_factor_p): New function.
5510 (aarch64_sve_rdvl_immediate_p): Likewise.
5511 (aarch64_output_sve_rdvl): Likewise.
5512 (aarch64_offset_temporaries): Rewrite the SVE handling to use RDVL
5514 (aarch64_expand_mov_immediate): Handle RDVL immediates.
5515 (aarch64_mov_operand_p): Likewise.
5516 * config/aarch64/constraints.md (Usr): New constraint.
5517 * config/aarch64/aarch64.md (*mov<SHORT:mode>_aarch64): Add an RDVL
5519 (*movsi_aarch64, *movdi_aarch64): Likewise.
5521 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5523 * config/aarch64/aarch64-sve-builtins.h:
5524 (function_checker::require_immediate_lane_index): Add an argument
5525 for the index of the indexed vector argument.
5526 * config/aarch64/aarch64-sve-builtins.cc
5527 (function_checker::require_immediate_lane_index): Likewise.
5528 * config/aarch64/aarch64-sve-builtins-shapes.cc
5529 (ternary_bfloat_lane_base::check): Update accordingly.
5530 (ternary_qq_lane_base::check): Likewise.
5531 (binary_lane_def::check): Likewise.
5532 (binary_long_lane_def::check): Likewise.
5533 (ternary_lane_def::check): Likewise.
5534 (ternary_lane_rotate_def::check): Likewise.
5535 (ternary_long_lane_def::check): Likewise.
5536 (ternary_qq_lane_rotate_def::check): Likewise.
5538 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5540 * target.def (md_asm_adjust): Add a uses parameter.
5541 * doc/tm.texi: Regenerate.
5542 * cfgexpand.cc (expand_asm_loc): Update call to md_asm_adjust.
5543 Handle any USEs created by the target.
5544 (expand_asm_stmt): Likewise.
5545 * recog.cc (asm_noperands): Handle asms with USEs.
5546 (decode_asm_operands): Likewise.
5547 * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add uses
5549 * config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise.
5550 * config/arm/arm.cc (thumb1_md_asm_adjust): Likewise.
5551 * config/avr/avr.cc (avr_md_asm_adjust): Likewise.
5552 * config/cris/cris.cc (cris_md_asm_adjust): Likewise.
5553 * config/i386/i386.cc (ix86_md_asm_adjust): Likewise.
5554 * config/mn10300/mn10300.cc (mn10300_md_asm_adjust): Likewise.
5555 * config/nds32/nds32.cc (nds32_md_asm_adjust): Likewise.
5556 * config/pdp11/pdp11.cc (pdp11_md_asm_adjust): Likewise.
5557 * config/rs6000/rs6000.cc (rs6000_md_asm_adjust): Likewise.
5558 * config/s390/s390.cc (s390_md_asm_adjust): Likewise.
5559 * config/vax/vax.cc (vax_md_asm_adjust): Likewise.
5560 * config/visium/visium.cc (visium_md_asm_adjust): Likewise.
5562 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5564 * doc/tm.texi.in: Add TARGET_START_CALL_ARGS.
5565 * doc/tm.texi: Regenerate.
5566 * target.def (start_call_args): New hook.
5567 (call_args, end_call_args): Add a parameter for the cumulative
5568 argument information.
5569 * hooks.h (hook_void_rtx_tree): Delete.
5570 * hooks.cc (hook_void_rtx_tree): Likewise.
5571 * targhooks.h (hook_void_CUMULATIVE_ARGS): Declare.
5572 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
5573 * targhooks.cc (hook_void_CUMULATIVE_ARGS): New function.
5574 (hook_void_CUMULATIVE_ARGS_rtx_tree): Likewise.
5575 * calls.cc (expand_call): Call start_call_args before computing
5576 and storing stack parameters. Pass the cumulative argument
5577 information to call_args and end_call_args.
5578 (emit_library_call_value_1): Likewise.
5579 * config/nvptx/nvptx.cc (nvptx_call_args): Add a cumulative
5581 (nvptx_end_call_args): Likewise.
5583 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5585 * doc/tm.texi.in: Add TARGET_EMIT_EPILOGUE_FOR_SIBCALL.
5586 * doc/tm.texi: Regenerate.
5587 * target.def (emit_epilogue_for_sibcall): New hook.
5588 * calls.cc (can_implement_as_sibling_call_p): Use it.
5589 * function.cc (thread_prologue_and_epilogue_insns): Likewise.
5590 (reposition_prologue_and_epilogue_notes): Likewise.
5591 * config/aarch64/aarch64-protos.h (aarch64_expand_epilogue): Take
5592 an rtx_call_insn * rather than a bool.
5593 * config/aarch64/aarch64.cc (aarch64_expand_epilogue): Likewise.
5594 (TARGET_EMIT_EPILOGUE_FOR_SIBCALL): Define.
5595 * config/aarch64/aarch64.md (epilogue): Update call.
5596 (sibcall_epilogue): Delete.
5598 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5600 * target.def (use_late_prologue_epilogue): New hook.
5601 * doc/tm.texi.in: Add TARGET_USE_LATE_PROLOGUE_EPILOGUE.
5602 * doc/tm.texi: Regenerate.
5603 * passes.def (pass_late_thread_prologue_and_epilogue): New pass.
5604 * tree-pass.h (make_pass_late_thread_prologue_and_epilogue): Declare.
5605 * function.cc (pass_thread_prologue_and_epilogue::gate): New function.
5606 (pass_data_late_thread_prologue_and_epilogue): New pass variable.
5607 (pass_late_thread_prologue_and_epilogue): New pass class.
5608 (make_pass_late_thread_prologue_and_epilogue): New function.
5610 2023-12-05 Kito Cheng <kito.cheng@sifive.com>
5612 * common/config/riscv/riscv-common.cc
5613 (riscv_subset_list::check_conflict_ext): Check zcd conflicts
5616 2023-12-05 Richard Sandiford <richard.sandiford@arm.com>
5618 PR rtl-optimization/112278
5619 * lra-int.h (lra_update_biggest_mode): New function.
5620 * lra-coalesce.cc (merge_pseudos): Use it.
5621 * lra-lives.cc (process_bb_lives): Likewise.
5622 * lra.cc (new_insn_reg): Likewise.
5624 2023-12-05 Jakub Jelinek <jakub@redhat.com>
5626 PR tree-optimization/112843
5627 * gimple-lower-bitint.cc (gimple_lower_bitint): Change lhs of stmt
5628 to lhs2 before building and inserting lhs = (cast) lhs2; assignment.
5629 Adjust stmt operands before adjusting lhs.
5631 2023-12-05 xuli <xuli1@eswincomputing.com>
5633 * config/riscv/riscv-v.cc (sew64_scalar_helper): Bugfix.
5635 2023-12-05 Jakub Jelinek <jakub@redhat.com>
5638 * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New
5639 splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31.
5641 2023-12-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5643 * config/riscv/autovec.md: Add blocker.
5644 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_p): New function.
5645 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_p): Ditto.
5647 2023-12-05 Richard Biener <rguenther@suse.de>
5649 PR tree-optimization/112827
5650 PR tree-optimization/112848
5651 * tree-scalar-evolution.cc (final_value_replacement_loop):
5652 Compute the insert location for each insert.
5654 2023-12-05 liuhongt <hongtao.liu@intel.com>
5656 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
5657 Count sse_reg/gpr_regs for components not loaded from memory.
5658 (ix86_vector_costs:ix86_vector_costs): New constructor.
5659 (ix86_vector_costs::m_num_gpr_needed[3]): New private memeber.
5660 (ix86_vector_costs::m_num_sse_needed[3]): Ditto.
5661 (ix86_vector_costs::finish_cost): Estimate overall register
5663 (ix86_vector_costs::ix86_vect_estimate_reg_pressure): New
5666 2023-12-05 liuhongt <hongtao.liu@intel.com>
5668 * config/i386/sse.md (udot_prodv64qi): New expander.
5669 (udot_prod<mode>): Emulates with VEC_UNPACKU_EXPR +
5670 DOT_PROD (short, int).
5672 2023-12-05 Marek Polacek <polacek@redhat.com>
5676 * doc/invoke.texi: Document -fno-immediate-escalation.
5678 2023-12-04 Andrew Pinski <quic_apinski@quicinc.com>
5680 * match.pd (zero_one_valued_p): For convert
5681 make sure type is not a signed 1-bit integer.
5683 2023-12-04 Jeff Law <jlaw@ventanamicro.com>
5685 * config/microblaze/microblaze.md (movhi): Use %i for half-word
5686 loads to properly select between lhu/lhui.
5688 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
5690 * config/riscv/riscv-string.cc (expand_rawmemchr): Increment
5691 source address by vl * element_size.
5693 2023-12-04 Robin Dapp <rdapp@ventanamicro.com>
5695 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum):
5697 (enum stringop_strategy_enum): ... to this.
5698 * config/riscv/riscv-string.cc (riscv_expand_block_move): New
5699 wrapper expander handling the strategies and delegation.
5700 (riscv_expand_block_move_scalar): Rename function and make
5702 (expand_block_move): Remove strategy handling.
5703 * config/riscv/riscv.md: Call expander wrapper.
5704 * config/riscv/riscv.opt: Rename.
5706 2023-12-04 Richard Biener <rguenther@suse.de>
5708 PR middle-end/112785
5709 * function.h (get_new_clique): New inline function handling
5710 last_clique overflow.
5711 * cfgrtl.cc (duplicate_insn_chain): Use it.
5712 * tree-cfg.cc (gimple_duplicate_bb): Likewise.
5713 * tree-inline.cc (remap_dependence_clique): Likewise.
5715 2023-12-04 Christoph Müllner <christoph.muellner@vrull.eu>
5718 * doc/invoke.texi: Document riscv-strcmp-inline-limit.
5720 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5723 * config/riscv/vector.md: Fix incorrect overlap in v0.
5725 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5728 * config/riscv/vector.md: Add highest-number overlap support.
5730 2023-12-04 Richard Biener <rguenther@suse.de>
5732 PR tree-optimization/112818
5733 * tree-vect-stmts.cc (vectorizable_bswap): Check input and
5734 output vector types have the same size.
5736 2023-12-04 Richard Biener <rguenther@suse.de>
5738 PR tree-optimization/112827
5739 * tree-scalar-evolution.cc (final_value_replacement_loop):
5740 Do not release SSA name but keep a dead initialization around.
5742 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5745 * config/riscv/vector.md: Remove earlyclobber from widen reduction.
5747 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
5750 * btfout.cc (btf_asm_type): Fixup ctti_name for all
5751 BTF types of kind BTF_KIND_FUNC_PROTO.
5753 2023-12-04 Indu Bhagat <indu.bhagat@oracle.com>
5756 * btfout.cc (get_btf_type_name): New definition.
5757 (btf_collect_datasec): Update dtd_name to the original type name
5759 (btf_asm_type_ref): Use the new get_btf_type_name function
5761 (btf_asm_type): Likewise.
5762 (btf_asm_func_type): Likewise.
5764 2023-12-04 Jakub Jelinek <jakub@redhat.com>
5767 * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking
5768 for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and
5769 SET_DEST macros instead of XEXP, rename vec variable to set.
5771 2023-12-04 Jakub Jelinek <jakub@redhat.com>
5774 * config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG.
5776 2023-12-04 Feng Wang <wangfeng@eswincomputing.com>
5778 * common/config/riscv/riscv-common.cc: Add zvkb ISA info.
5779 * config/riscv/riscv.opt: Add Mask(ZVKB)
5781 2023-12-04 Fei Gao <gaofei@eswincomputing.com>
5782 Xiao Zeng <zengxiao@eswincomputing.com>
5784 * config/riscv/riscv.md (*mov<GPR:mode><X:mode>cc):move to sfb.md
5785 * config/riscv/sfb.md: New file.
5787 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5789 * config/riscv/riscv-cores.def: Add sifive-x280.
5790 * doc/invoke.texi (RISC-V Options): Add sifive-x280
5792 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5794 * common/config/riscv/riscv-common.cc (riscv_implied_predicator_t): New.
5795 (riscv_implied_info_t::riscv_implied_info_t): New.
5796 (riscv_implied_info_t::match): New.
5797 (riscv_implied_info): New entry for zcf.
5798 (riscv_subset_list::handle_implied_ext): Use
5799 riscv_implied_info_t::match.
5800 (riscv_subset_list::check_implied_ext): Ditto.
5801 (riscv_subset_list::handle_combine_ext): Ditto.
5802 (riscv_subset_list::parse): Move zcf implication handling to
5803 riscv_implied_infos.
5805 2023-12-04 Kito Cheng <kito.cheng@sifive.com>
5807 * common/config/riscv/riscv-common.cc
5808 (riscv_subset_list::check_conflict_ext): New.
5809 (riscv_subset_list::parse): Move checking conflict ext. to
5811 * config/riscv/riscv-subset.h:
5812 Add riscv_subset_list::check_conflict_ext.
5814 2023-12-04 Hu, Lin1 <lin1.hu@intel.com>
5816 * common/config/i386/cpuinfo.h (get_available_features): Move USER_MSR
5817 to the correct location.
5819 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5821 * config/riscv/riscv.md: Rostify the constraints.
5823 2023-12-04 chenxiaolong <chenxiaolong@loongson.cn>
5825 * doc/extend.texi: Add information about the intrinsic function of the vector
5828 2023-12-03 Jakub Jelinek <jakub@redhat.com>
5830 PR middle-end/112807
5831 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
5832 When choosing type0 and type1 types, if prec3 has small/middle bitint
5833 kind, use maximum of type0 and type1's precision instead of prec3.
5835 2023-12-03 Jeff Law <jlaw@ventanamicro.com>
5837 * config/frv/frv.h (TRANSFER_FROM_TRAMPOLINE): Add prototype for exit.
5839 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5841 * attribs.cc (comp_type_attributes): Pass the full TREE_PURPOSE
5842 to lookup_attribute_spec, rather than just the name.
5843 (remove_attributes_matching): Likewise.
5845 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5847 * attribs.cc (find_same_attribute): New function.
5848 (decl_attributes, comp_type_attributes): Use it when looking
5849 up one list's attributes in another list.
5851 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5853 * Makefile.in (GTFILES): Add attribs.cc.
5854 * attribs.cc (gnu_namespace_cache): New variable.
5855 (get_gnu_namespace): New function.
5856 (lookup_attribute_spec): Use it instead of get_identifier ("gnu").
5857 (get_attribute_namespace, attribs_cc_tests): Likewise.
5859 2023-12-02 Richard Sandiford <richard.sandiford@arm.com>
5861 * attribs.h (scoped_attribute_specs): New structure.
5862 (register_scoped_attributes): Take a reference to a
5863 scoped_attribute_specs instead of separate namespace and array
5865 * plugin.h (register_scoped_attributes): Likewise.
5866 * attribs.cc (register_scoped_attributes): Likewise.
5867 (attribute_tables): Change into an array of scoped_attribute_specs
5868 pointers. Reduce to 1 element for frontends and 1 element for targets.
5869 (empty_attribute_table): Delete.
5870 (check_attribute_tables): Update for changes to attribute_tables.
5871 Use a hash_set to identify duplicates.
5872 (handle_ignored_attributes_option): Update for above changes.
5873 (init_attributes): Likewise.
5874 (excl_pair): Delete.
5875 (test_attribute_exclusions): Update for above changes. Don't
5876 enforce symmetry for standard attributes in the top-level namespace.
5877 * langhooks-def.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
5878 (LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Likewise.
5879 (LANG_HOOKS_INITIALIZER): Update accordingly.
5880 (LANG_HOOKS_ATTRIBUTE_TABLE): Define to an empty constructor.
5881 * langhooks.h (lang_hooks::common_attribute_table): Delete.
5882 (lang_hooks::format_attribute_table): Likewise.
5883 (lang_hooks::attribute_table): Redefine to an array of
5884 scoped_attribute_specs pointers.
5885 * target-def.h (TARGET_GNU_ATTRIBUTES): New macro.
5886 * target.def (attribute_spec): Redefine to return an array of
5887 scoped_attribute_specs pointers.
5888 * tree-inline.cc (function_attribute_inlinable_p): Update accordingly.
5889 * doc/tm.texi: Regenerate.
5890 * config/aarch64/aarch64.cc (aarch64_attribute_table): Define using
5891 TARGET_GNU_ATTRIBUTES.
5892 * config/alpha/alpha.cc (vms_attribute_table): Likewise.
5893 * config/avr/avr.cc (avr_attribute_table): Likewise.
5894 * config/bfin/bfin.cc (bfin_attribute_table): Likewise.
5895 * config/bpf/bpf.cc (bpf_attribute_table): Likewise.
5896 * config/csky/csky.cc (csky_attribute_table): Likewise.
5897 * config/epiphany/epiphany.cc (epiphany_attribute_table): Likewise.
5898 * config/gcn/gcn.cc (gcn_attribute_table): Likewise.
5899 * config/h8300/h8300.cc (h8300_attribute_table): Likewise.
5900 * config/loongarch/loongarch.cc (loongarch_attribute_table): Likewise.
5901 * config/m32c/m32c.cc (m32c_attribute_table): Likewise.
5902 * config/m32r/m32r.cc (m32r_attribute_table): Likewise.
5903 * config/m68k/m68k.cc (m68k_attribute_table): Likewise.
5904 * config/mcore/mcore.cc (mcore_attribute_table): Likewise.
5905 * config/microblaze/microblaze.cc (microblaze_attribute_table):
5907 * config/mips/mips.cc (mips_attribute_table): Likewise.
5908 * config/msp430/msp430.cc (msp430_attribute_table): Likewise.
5909 * config/nds32/nds32.cc (nds32_attribute_table): Likewise.
5910 * config/nvptx/nvptx.cc (nvptx_attribute_table): Likewise.
5911 * config/riscv/riscv.cc (riscv_attribute_table): Likewise.
5912 * config/rl78/rl78.cc (rl78_attribute_table): Likewise.
5913 * config/rx/rx.cc (rx_attribute_table): Likewise.
5914 * config/s390/s390.cc (s390_attribute_table): Likewise.
5915 * config/sh/sh.cc (sh_attribute_table): Likewise.
5916 * config/sparc/sparc.cc (sparc_attribute_table): Likewise.
5917 * config/stormy16/stormy16.cc (xstormy16_attribute_table): Likewise.
5918 * config/v850/v850.cc (v850_attribute_table): Likewise.
5919 * config/visium/visium.cc (visium_attribute_table): Likewise.
5920 * config/arc/arc.cc (arc_attribute_table): Likewise. Move further
5922 * config/arm/arm.cc (arm_attribute_table): Update for above changes,
5924 (arm_gnu_attributes, arm_gnu_attribute_table): ...these new globals.
5925 * config/i386/i386-options.h (ix86_attribute_table): Delete.
5926 (ix86_gnu_attribute_table): Declare.
5927 * config/i386/i386-options.cc (ix86_attribute_table): Replace with...
5928 (ix86_gnu_attributes, ix86_gnu_attribute_table): ...these two globals.
5929 * config/i386/i386.cc (ix86_attribute_table): Define as an array of
5930 scoped_attribute_specs pointers.
5931 * config/ia64/ia64.cc (ia64_attribute_table): Update for above changes,
5933 (ia64_gnu_attributes, ia64_gnu_attribute_table): ...these new globals.
5934 * config/rs6000/rs6000.cc (rs6000_attribute_table): Update for above
5936 (rs6000_gnu_attributes, rs6000_gnu_attribute_table): ...these new
5939 2023-12-02 Roger Sayle <roger@nextmovesoftware.com>
5941 * config/riscv/riscv-vsetvl.cc (csetvl_info::parse_insn): Rename
5942 local variable from demand_flags to dflags, to avoid conflicting
5943 with (enumeration) type of the same name.
5945 2023-12-02 Li Wei <liwei@loongson.cn>
5947 * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
5948 Supplementary function prototype.
5949 (loongarch_is_even_extraction): Adjust.
5950 (loongarch_try_expand_lsx_vshuf_const): Adjust.
5951 (loongarch_is_extraction_permutation): Adjust.
5952 (loongarch_expand_vec_perm_const_2): Adjust.
5954 2023-12-02 Li Wei <liwei@loongson.cn>
5956 * config/loongarch/loongarch.md (v2di): Used to simplify the
5957 following templates.
5958 (popcount<mode>2): New.
5960 2023-12-02 Li Wei <liwei@loongson.cn>
5962 * config/loongarch/loongarch.h (CTZ_DEFINED_VALUE_AT_ZERO): Add
5964 (CLZ_DEFINED_VALUE_AT_ZERO): Remove duplicate definition.
5966 2023-12-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5969 * config/riscv/vector.md: Add !TARGET_64BIT.
5971 2023-12-02 Pan Li <pan2.li@intel.com>
5974 * config/riscv/riscv.cc (riscv_legitimize_move): Take the
5975 exist (U *mode) and handle DFmode like DImode when EEW is
5978 2023-12-01 Andrew MacLeod <amacleod@redhat.com>
5980 * gimple-range-fold.h (range_compatible_p): Relocate.
5981 * value-range.h (range_compatible_p): Here.
5982 * range-op-mixed.h (operand_equal::operand_check_p): Call
5983 range_compatible_p rather than comparing precision.
5984 (operand_not_equal::operand_check_p): Ditto.
5985 (operand_not_lt::operand_check_p): Ditto.
5986 (operand_not_le::operand_check_p): Ditto.
5987 (operand_not_gt::operand_check_p): Ditto.
5988 (operand_not_ge::operand_check_p): Ditto.
5989 (operand_plus::operand_check_p): Ditto.
5990 (operand_abs::operand_check_p): Ditto.
5991 (operand_minus::operand_check_p): Ditto.
5992 (operand_negate::operand_check_p): Ditto.
5993 (operand_mult::operand_check_p): Ditto.
5994 (operand_bitwise_not::operand_check_p): Ditto.
5995 (operand_bitwise_xor::operand_check_p): Ditto.
5996 (operand_bitwise_and::operand_check_p): Ditto.
5997 (operand_bitwise_or::operand_check_p): Ditto.
5998 (operand_min::operand_check_p): Ditto.
5999 (operand_max::operand_check_p): Ditto.
6000 * range-op.cc (operand_lshift::operand_check_p): Ditto.
6001 (operand_rshift::operand_check_p): Ditto.
6002 (operand_logical_and::operand_check_p): Ditto.
6003 (operand_logical_or::operand_check_p): Ditto.
6004 (operand_logical_not::operand_check_p): Ditto.
6006 2023-12-01 Vladimir N. Makarov <vmakarov@redhat.com>
6009 * lra.h (lra): Add one more arg.
6010 * lra-int.h (lra_verbose, lra_dump_insns): New externals.
6011 (lra_dump_insns_if_possible): Ditto.
6012 * lra.cc (lra_dump_insns): Dump all insns.
6013 (lra_dump_insns_if_possible): Dump all insns for lra_verbose >= 7.
6014 (lra_verbose): New global.
6015 (lra): Add new arg. Setup lra_verbose from its value.
6016 * lra-assigns.cc (lra_split_hard_reg_for): Dump insns if rtl
6018 * lra-remat.cc (lra_remat): Dump insns if rtl was changed.
6019 * lra-constraints.cc (lra_inheritance): Dump insns.
6020 (lra_constraints, lra_undo_inheritance): Dump insns if rtl
6022 (remove_inheritance_pseudos): Use restore reg if it is set up.
6023 * ira.cc: (lra): Pass internal_flag_ira_verbose.
6025 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6027 * doc/extend.texi (__builtin_addc, __builtin_addcl, __builtin_addcll,
6028 __builtin_subc, __builtin_subcl, __builtin_subcll,
6029 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
6030 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
6031 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
6032 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
6033 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
6034 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros,
6035 __builtin_nvptx_brev, __builtin_nvptx_brevll, __builtin_darn,
6036 __builtin_darn_raw, __builtin_ia32_vec_ext_v2di,
6037 __builtin_ia32_crc32qi, __builtin_ia32_crc32hi,
6038 __builtin_ia32_crc32si, __builtin_ia32_crc32di): Put {}s around
6039 return type with spaces in it.
6040 (__builtin_rx_mvfachi, __builtin_rx_mvfacmi): Remove superfluous
6043 2023-12-01 David Malcolm <dmalcolm@redhat.com>
6045 * diagnostic-core.h (emit_diagnostic_valist): New overload decl.
6046 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
6047 When we have metadata, call its maybe_add_sarif_properties vfunc.
6048 * diagnostic-metadata.h (class sarif_object): Forward decl.
6049 (diagnostic_metadata::~diagnostic_metadata): New.
6050 (diagnostic_metadata::maybe_add_sarif_properties): New vfunc.
6051 * diagnostic.cc (emit_diagnostic_valist): New overload.
6053 2023-12-01 David Malcolm <dmalcolm@redhat.com>
6056 * doc/extend.texi: Remove stray reference to
6057 -fanalyzer-checker=taint.
6059 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6062 * config/riscv/vector.md: Support highpart overlap for vx/vf.
6064 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6067 * config/riscv/vector.md: Support highpart overlap for indexed load.
6069 2023-12-01 Richard Biener <rguenther@suse.de>
6071 * tree-vectorizer.h (vect_get_vec_defs): Re-order arguments.
6072 * tree-vect-stmts.cc (vect_get_vec_defs): Likewise.
6073 (vectorizable_condition): Update caller.
6074 (vectorizable_comparison_1): Likewise.
6075 (vectorizable_conversion): Specify the vector type to be
6076 used for invariant/external defs.
6077 * tree-vect-loop.cc (vect_transform_reduction): Update caller.
6079 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6081 PR middle-end/112770
6082 * gimple-lower-bitint.cc (gimple_lower_bitint): When adjusting
6083 lhs of middle _BitInt setter which ends bb, insert cast on
6084 the fallthru edge rather than after stmt.
6086 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6088 PR middle-end/112771
6089 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
6090 Use mp = 1 if it is zero.
6092 2023-12-01 Jose E. Marchesi <jose.marchesi@oracle.com>
6094 * config/bpf/bpf.cc (bpf_asm_named_section): New function.
6095 (TARGET_ASM_NAMED_SECTION): Set to bpf_asm_named_section.
6097 2023-12-01 Di Zhao <dizhao@os.amperecomputing.com>
6099 * config/aarch64/aarch64-tuning-flags.def
6100 (AARCH64_EXTRA_TUNING_OPTION): New tuning option to avoid
6102 * config/aarch64/aarch64.cc
6103 (aarch64_override_options_internal): Set
6104 param_avoid_fma_max_bits according to tuning option.
6105 * config/aarch64/tuning_models/ampere1.h (ampere1_tunings):
6106 Modify tunings related with FMA.
6107 * config/aarch64/tuning_models/ampere1a.h (ampere1a_tunings):
6109 * config/aarch64/tuning_models/ampere1b.h (ampere1b_tunings):
6112 2023-12-01 Richard Sandiford <richard.sandiford@arm.com>
6114 * config/aarch64/aarch64-sve-builtins.h
6115 (function_expander::result_mode): New member function.
6116 * config/aarch64/aarch64-sve-builtins-base.cc
6117 (svld234_impl::expand): Use it.
6118 * config/aarch64/aarch64-sve-builtins.cc
6119 (function_expander::get_reg_target): Likewise.
6121 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6123 * gimple-lower-bitint.cc (range_to_prec): Don't return -1 for
6125 (bitint_large_huge::lower_addsub_overflow): Fix up computation of
6127 (bitint_large_huge::lower_mul_overflow): Likewise.
6129 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6131 * gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
6132 When replacing use_stmt which is gsi_stmt (m_gsi), update m_gsi to
6135 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6137 PR middle-end/112750
6138 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
6139 Use NE_EXPR rather than EQ_EXPR for g2 if !single_comparison and
6140 adjust probabilities.
6142 2023-12-01 Xi Ruoyao <xry111@xry111.site>
6144 * doc/install.texi: Deem srcdir == objdir broken, but objdir
6145 as a subdirectory of srcdir fine.
6147 2023-12-01 Juergen Christ <jchrist@linux.ibm.com>
6150 * config/s390/s390.cc (s390_md_asm_adjust): Return after dealing
6151 with the outputs, if no further processing of long doubles is
6154 2023-12-01 Jakub Jelinek <jakub@redhat.com>
6157 * config/s390/s390.cc (s390_invalid_arg_for_unprototyped_fn): Return
6158 NULL for __builtin_classify_type calls with vector arguments.
6160 2023-12-01 Florian Weimer <fweimer@redhat.com>
6162 * doc/invoke.texi (Warning Options): Document
6163 -Wdeclaration-missing-parameter-type.
6165 2023-12-01 Florian Weimer <fweimer@redhat.com>
6167 * doc/invoke.texi (Warning Options): Document changes.
6169 2023-12-01 Florian Weimer <fweimer@redhat.com>
6171 * doc/invoke.texi (Warning Options): Document that
6172 -Wreturn-mismatch is a permerror in C99 and later.
6174 2023-12-01 Florian Weimer <fweimer@redhat.com>
6178 * doc/invoke.texi (Warning Options): Document changes.
6180 2023-12-01 Florian Weimer <fweimer@redhat.com>
6182 * doc/invoke.texi (Warning Options): Document changes.
6184 2023-12-01 Florian Weimer <fweimer@redhat.com>
6186 * doc/invoke.texi (Warning Options): Document changes.
6188 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6191 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio.
6193 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
6196 * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
6197 For 128-bit store the loaded value and loop if needed.
6199 2023-11-30 Wilco Dijkstra <wilco.dijkstra@arm.com>
6202 * config/aarch64/aarch64.md (cpymemdi): Remove pattern condition.
6203 (setmemdi): Likewise.
6204 * config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support
6205 strict-align. Cleanup condition for using MOPS.
6206 (aarch64_expand_setmem): Likewise.
6208 2023-11-30 Richard Biener <rguenther@suse.de>
6210 PR tree-optimization/112767
6211 * tree-scalar-evolution.cc (final_value_replacement_loop):
6212 Propagate constants to immediate uses immediately.
6214 2023-11-30 Richard Biener <rguenther@suse.de>
6216 PR tree-optimization/112766
6217 * gimple-predicate-analysis.cc (find_var_cmp_const):
6218 Support continuing the iteration and report every candidate.
6219 (uninit_analysis::overlap): Iterate over all flag var
6222 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6225 * config/riscv/vector.md: Add widening overlap of vf2/vf4.
6227 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6230 * config/riscv/vector.md: Remove earlyclobber for wx/wf instructions.
6232 2023-11-30 Jakub Jelinek <jakub@redhat.com>
6234 PR middle-end/112733
6235 * wide-int.cc (wi::mul_internal): Don't allocate twice as much
6236 space for u, v and r as needed.
6237 (divmod_internal_2): Change return type from void to int, for n == 1
6238 return 1, otherwise before writing b_dividend into b_remainder set
6239 n to MIN (n, m) and at the end return it.
6240 (wi::divmod_internal): Don't allocate 4 times as much space for
6241 b_quotient, b_remainder, b_dividend and b_divisor. Set n to
6242 result of divmod_internal_2.
6243 (wide_int_cc_tests): Add test for unsigned widest_int
6244 wi::multiple_of_p of 1 and -128.
6246 2023-11-30 liuhongt <hongtao.liu@intel.com>
6248 * config/i386/sse.md (sdot_prodv64qi): New expander.
6249 (sseunpackmodelower): New mode attr.
6250 (sdot_prod<mode>): Emulate sdot_prodv*qi with sodt_prov*hi
6251 when TARGET_VNNIINT8 is not available.
6253 2023-11-30 liuhongt <hongtao.liu@intel.com>
6255 * config/i386/sse.md: (reduc_plus_scal_<mode>): Use
6256 vec_extract_lo instead of subreg.
6257 (reduc_<code>_scal_<mode>): Ditto.
6258 (reduc_<code>_scal_<mode>): Ditto.
6259 (reduc_<code>_scal_<mode>): Ditto.
6260 (reduc_<code>_scal_<mode>): Ditto.
6262 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6265 * config/riscv/vector.md: Add widenning overlap.
6267 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6269 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
6270 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
6272 (none,W21,W42,W84,W43,W86,W87): Ditto.
6273 * config/riscv/vector.md: Ditto.
6275 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6277 * config/riscv/vector.md: Support highpart overlap for vext.vf2
6279 2023-11-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
6281 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add ampere-1b
6282 * config/aarch64/aarch64-cost-tables.h: Add ampere1b_extra_costs
6283 * config/aarch64/aarch64-tune.md: Regenerate
6284 * config/aarch64/aarch64.cc: Include ampere1b tuning model
6285 * doc/invoke.texi: Document -mcpu=ampere1b
6286 * config/aarch64/tuning_models/ampere1b.h: New file.
6288 2023-11-29 David Faust <david.faust@oracle.com>
6290 * config/bpf/bpf.h (ASM_COMMENT_START): Change from ';' to '#'.
6292 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6295 * config/rs6000/rs6000.cc (invalid_arg_for_unprototyped_fn): Return
6296 NULL for __builtin_classify_type calls with vector arguments.
6298 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
6300 PR tree-optimization/111922
6301 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Check the
6302 operands are valid before calling fold_range.
6304 2023-11-29 Andrew MacLeod <amacleod@redhat.com>
6306 * range-op-mixed.h (operator_equal::operand_check_p): New.
6307 (operator_not_equal::operand_check_p): New.
6308 (operator_lt::operand_check_p): New.
6309 (operator_le::operand_check_p): New.
6310 (operator_gt::operand_check_p): New.
6311 (operator_ge::operand_check_p): New.
6312 (operator_plus::operand_check_p): New.
6313 (operator_abs::operand_check_p): New.
6314 (operator_minus::operand_check_p): New.
6315 (operator_negate::operand_check_p): New.
6316 (operator_mult::operand_check_p): New.
6317 (operator_bitwise_not::operand_check_p): New.
6318 (operator_bitwise_xor::operand_check_p): New.
6319 (operator_bitwise_and::operand_check_p): New.
6320 (operator_bitwise_or::operand_check_p): New.
6321 (operator_min::operand_check_p): New.
6322 (operator_max::operand_check_p): New.
6323 * range-op.cc (range_op_handler::fold_range): Check operand
6325 (range_op_handler::op1_range): Ditto.
6326 (range_op_handler::op2_range): Ditto.
6327 (range_op_handler::operand_check_p): New.
6328 (range_operator::operand_check_p): New.
6329 (operator_lshift::operand_check_p): New.
6330 (operator_rshift::operand_check_p): New.
6331 (operator_logical_and::operand_check_p): New.
6332 (operator_logical_or::operand_check_p): New.
6333 (operator_logical_not::operand_check_p): New.
6334 * range-op.h (range_operator::operand_check_p): New.
6335 (range_op_handler::operand_check_p): New.
6337 2023-11-29 Martin Jambor <mjambor@suse.cz>
6339 PR tree-optimization/112711
6340 PR tree-optimization/112721
6341 * tree-sra.cc (build_access_from_call_arg): New parameter
6342 CAN_BE_RETURNED, disqualify any candidate passed by reference if it is
6343 true. Adjust leading comment.
6344 (scan_function): Pass appropriate value to CAN_BE_RETURNED of
6345 build_access_from_call_arg.
6347 2023-11-29 Thomas Schwinge <thomas@codesourcery.com>
6349 * doc/sourcebuild.texi (Final Actions): Document
6350 'only_for_offload_target' wrapper.
6352 2023-11-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6355 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
6356 attributes): Document cfi.
6358 2023-11-29 Richard Biener <rguenther@suse.de>
6360 PR middle-end/110237
6361 * internal-fn.cc (expand_partial_load_optab_fn): Clear
6362 MEM_EXPR and MEM_OFFSET.
6363 (expand_partial_store_optab_fn): Likewise.
6365 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6367 PR middle-end/112733
6368 * fold-const.cc (multiple_of_p): Pass SIGNED rather than
6369 UNSIGNED for wi::multiple_of_p on widest_int arguments.
6371 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6372 kito-cheng <kito.cheng@sifive.com>
6373 kito-cheng <kito.cheng@gmail.com>
6376 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
6377 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
6379 * config/riscv/vector.md: Support highpart register overlap for vwcvt.
6381 2023-11-29 xuli <xuli1@eswincomputing.com>
6383 * config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
6385 2023-11-29 Jakub Jelinek <jakub@redhat.com>
6388 * fold-mem-offsets.cc (get_uses): Ignore DEBUG_INSN uses. Otherwise,
6389 punt if use is in a different basic block from INSN or appears before
6390 INSN in the same basic block. Formatting fixes.
6391 (get_single_def_in_bb): Formatting fixes.
6392 (fold_offsets_1, pass_fold_mem_offsets::execute): Comment formatting
6395 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6397 * config/loongarch/simd.md (LSX_SCALAR_FRINT): New int iterator.
6398 (VLSX_FOR_FMODE): New mode attribute.
6399 (<simd_for_scalar_frint_pattern><mode>2): New expander,
6400 expanding to vreplvei.{w/d} + frint{rp/rz/rm/rne}.{s.d}.
6402 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6404 * config/loongarch/loongarch.md (lrint_allow_inexact): Remove.
6405 (<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT>
6406 == UNSPEC_FTINT instead of <lrint_allow_inexact>.
6408 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6410 * config/loongarch/lsx.md (bitimm): Move to ...
6411 (UNSPEC_LSX_VROTR): Remove.
6412 (lsx_vrotr_<lsxfmt>): Remove.
6413 (lsx_vrotri_<lsxfmt>): Remove.
6414 * config/loongarch/lasx.md (UNSPEC_LASX_XVROTR): Remove.
6415 (lsx_vrotr_<lsxfmt>): Remove.
6416 (lsx_vrotri_<lsxfmt>): Remove.
6417 * config/loongarch/simd.md (bitimm): ... here. Expand it to
6419 (vrotr<mode>3): New define_insn.
6420 (vrotri<mode>3): New define_insn.
6421 * config/loongarch/loongarch-builtins.cc:
6422 (CODE_FOR_lsx_vrotr_b): Use standard pattern name.
6423 (CODE_FOR_lsx_vrotr_h): Likewise.
6424 (CODE_FOR_lsx_vrotr_w): Likewise.
6425 (CODE_FOR_lsx_vrotr_d): Likewise.
6426 (CODE_FOR_lasx_xvrotr_b): Likewise.
6427 (CODE_FOR_lasx_xvrotr_h): Likewise.
6428 (CODE_FOR_lasx_xvrotr_w): Likewise.
6429 (CODE_FOR_lasx_xvrotr_d): Likewise.
6430 (CODE_FOR_lsx_vrotri_b): Define to standard pattern name.
6431 (CODE_FOR_lsx_vrotri_h): Likewise.
6432 (CODE_FOR_lsx_vrotri_w): Likewise.
6433 (CODE_FOR_lsx_vrotri_d): Likewise.
6434 (CODE_FOR_lasx_xvrotri_b): Likewise.
6435 (CODE_FOR_lasx_xvrotri_h): Likewise.
6436 (CODE_FOR_lasx_xvrotri_w): Likewise.
6437 (CODE_FOR_lasx_xvrotri_d): Likewise.
6439 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6441 * config/loongarch/simd.md (muh): New code attribute mapping
6442 any_extend to smul_highpart or umul_highpart.
6443 (<su>mul<mode>3_highpart): New define_insn.
6444 * config/loongarch/lsx.md (UNSPEC_LSX_VMUH_S): Remove.
6445 (UNSPEC_LSX_VMUH_U): Remove.
6446 (lsx_vmuh_s_<lsxfmt>): Remove.
6447 (lsx_vmuh_u_<lsxfmt>): Remove.
6448 * config/loongarch/lasx.md (UNSPEC_LASX_XVMUH_S): Remove.
6449 (UNSPEC_LASX_XVMUH_U): Remove.
6450 (lasx_xvmuh_s_<lasxfmt>): Remove.
6451 (lasx_xvmuh_u_<lasxfmt>): Remove.
6452 * config/loongarch/loongarch-builtins.cc (CODE_FOR_lsx_vmuh_b):
6453 Redefine to standard pattern name.
6454 (CODE_FOR_lsx_vmuh_h): Likewise.
6455 (CODE_FOR_lsx_vmuh_w): Likewise.
6456 (CODE_FOR_lsx_vmuh_d): Likewise.
6457 (CODE_FOR_lsx_vmuh_bu): Likewise.
6458 (CODE_FOR_lsx_vmuh_hu): Likewise.
6459 (CODE_FOR_lsx_vmuh_wu): Likewise.
6460 (CODE_FOR_lsx_vmuh_du): Likewise.
6461 (CODE_FOR_lasx_xvmuh_b): Likewise.
6462 (CODE_FOR_lasx_xvmuh_h): Likewise.
6463 (CODE_FOR_lasx_xvmuh_w): Likewise.
6464 (CODE_FOR_lasx_xvmuh_d): Likewise.
6465 (CODE_FOR_lasx_xvmuh_bu): Likewise.
6466 (CODE_FOR_lasx_xvmuh_hu): Likewise.
6467 (CODE_FOR_lasx_xvmuh_wu): Likewise.
6468 (CODE_FOR_lasx_xvmuh_du): Likewise.
6470 2023-11-29 Xi Ruoyao <xry111@xry111.site>
6473 * config/loongarch/lsx.md (UNSPEC_LSX_VFTINT_S,
6474 UNSPEC_LSX_VFTINTRNE, UNSPEC_LSX_VFTINTRP,
6475 UNSPEC_LSX_VFTINTRM, UNSPEC_LSX_VFRINTRNE_S,
6476 UNSPEC_LSX_VFRINTRNE_D, UNSPEC_LSX_VFRINTRZ_S,
6477 UNSPEC_LSX_VFRINTRZ_D, UNSPEC_LSX_VFRINTRP_S,
6478 UNSPEC_LSX_VFRINTRP_D, UNSPEC_LSX_VFRINTRM_S,
6479 UNSPEC_LSX_VFRINTRM_D): Remove.
6480 (ILSX, FLSX): Move into ...
6481 (VIMODE): Move into ...
6482 (FRINT_S, FRINT_D): Remove.
6483 (frint_pattern_s, frint_pattern_d, frint_suffix): Remove.
6484 (lsx_vfrint_<flsxfmt>, lsx_vftint_s_<ilsxfmt>_<flsxfmt>,
6485 lsx_vftintrne_w_s, lsx_vftintrne_l_d, lsx_vftintrp_w_s,
6486 lsx_vftintrp_l_d, lsx_vftintrm_w_s, lsx_vftintrm_l_d,
6487 lsx_vfrintrne_s, lsx_vfrintrne_d, lsx_vfrintrz_s,
6488 lsx_vfrintrz_d, lsx_vfrintrp_s, lsx_vfrintrp_d,
6489 lsx_vfrintrm_s, lsx_vfrintrm_d,
6490 <FRINT_S:frint_pattern_s>v4sf2,
6491 <FRINT_D:frint_pattern_d>v2df2, round<mode>2,
6492 fix_trunc<mode>2): Remove.
6493 * config/loongarch/lasx.md: Likewise.
6494 * config/loongarch/simd.md: New file.
6495 (ILSX, ILASX, FLSX, FLASX, VIMODE): ... here.
6496 (IVEC, FVEC): New mode iterators.
6497 (VIMODE): ... here. Extend it to work for all LSX/LASX vector
6499 (x, wu, simd_isa, WVEC, vimode, simdfmt, simdifmt_for_f,
6500 elebits): New mode attributes.
6501 (UNSPEC_SIMD_FRINTRP, UNSPEC_SIMD_FRINTRZ, UNSPEC_SIMD_FRINT,
6502 UNSPEC_SIMD_FRINTRM, UNSPEC_SIMD_FRINTRNE): New unspecs.
6503 (SIMD_FRINT): New int iterator.
6504 (simd_frint_rounding, simd_frint_pattern): New int attributes.
6505 (<simd_isa>_<x>vfrint<simd_frint_rounding>_<simdfmt>): New
6506 define_insn template for frint instructions.
6507 (<simd_isa>_<x>vftint<simd_frint_rounding>_<simdifmt_for_f>_<simdfmt>):
6508 Likewise, but for ftint instructions.
6509 (<simd_frint_pattern><mode>2): New define_expand with
6510 flag_fp_int_builtin_inexact checked.
6511 (l<simd_frint_pattern><mode><vimode>2): Likewise.
6512 (ftrunc<mode>2): New define_expand. It does not require
6513 flag_fp_int_builtin_inexact.
6514 (fix_trunc<mode><vimode>2): New define_insn_and_split. It does
6515 not require flag_fp_int_builtin_inexact.
6516 (include): Add lsx.md and lasx.md.
6517 * config/loongarch/loongarch.md (include): Include simd.md,
6518 instead of including lsx.md and lasx.md directly.
6519 * config/loongarch/loongarch-builtins.cc
6520 (CODE_FOR_lsx_vftint_w_s, CODE_FOR_lsx_vftint_l_d,
6521 CODE_FOR_lasx_xvftint_w_s, CODE_FOR_lasx_xvftint_l_d):
6524 2023-11-29 Alexandre Oliva <oliva@adacore.com>
6526 * doc/extend.texi (hardbool): New type attribute.
6527 * doc/invoke.texi (-ftrivial-auto-var-init): Document
6528 representation vs values.
6530 2023-11-29 Alexandre Oliva <oliva@adacore.com>
6532 * expr.cc (emit_block_move_hints): Take ctz of len. Obey
6533 -finline-stringops. Use oriented or sized loop.
6534 (emit_block_move): Take ctz of len, and pass it on.
6535 (emit_block_move_via_sized_loop): New.
6536 (emit_block_move_via_oriented_loop): New.
6537 (emit_block_move_via_loop): Take incr. Move an incr-sized
6538 block per iteration.
6539 (emit_block_cmp_via_cmpmem): Take ctz of len. Obey
6541 (emit_block_cmp_via_loop): New.
6542 * expr.h (emit_block_move): Add ctz of len defaulting to zero.
6543 (emit_block_move_hints): Likewise.
6544 (emit_block_cmp_hints): Likewise.
6545 * builtins.cc (expand_builtin_memory_copy_args): Pass ctz of
6546 len to emit_block_move_hints.
6547 (try_store_by_multiple_pieces): Support starting with a loop.
6548 (expand_builtin_memcmp): Pass ctz of len to
6549 emit_block_cmp_hints.
6550 (expand_builtin): Allow inline expansion of memset, memcpy,
6551 memmove and memcmp if requested.
6552 * common.opt (finline-stringops): New.
6553 (ilsop_fn): New enum.
6554 * flag-types.h (enum ilsop_fn): New.
6555 * doc/invoke.texi (-finline-stringops): Add.
6557 2023-11-29 Pan Li <pan2.li@intel.com>
6560 * config/riscv/riscv-string.cc (expand_block_move): Add
6561 precondition check for exact_div.
6563 2023-11-28 Roger Sayle <roger@nextmovesoftware.com>
6565 * config/arc/arc.md: Make output template whitespace consistent.
6567 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6569 * varasm.cc (assemble_external_libcall): Refer in assert only ifdef
6570 ASM_OUTPUT_EXTERNAL.
6572 2023-11-28 Andrew Pinski <quic_apinski@quicinc.com>
6574 PR tree-optimization/112738
6575 * match.pd (`(nop_convert)-(convert)a`): Reject
6576 when the outer type is boolean.
6578 2023-11-28 Richard Biener <rguenther@suse.de>
6580 PR middle-end/112732
6581 * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET
6582 of the newly built type.
6584 2023-11-28 Uros Bizjak <ubizjak@gmail.com>
6587 * config/i386/i386.md (cmpstrnqi_1): Set FLAGS_REG to its previous
6588 value when operand 2 equals zero.
6589 (*cmpstrnqi_1): Ditto.
6590 (*cmpstrnqi_1 peephole2): Ditto.
6592 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6595 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6597 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
6598 function call is for a builtin.
6599 (bpf_external_libcall): Added target hook to detect and report
6600 error when other external calls that are not builtins.
6602 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6605 * varasm.cc (pending_libcall_symbols): New variable.
6606 (process_pending_assemble_externals): Process
6607 pending_libcall_symbols.
6608 (assemble_external_libcall): Defer emitting external libcall
6609 symbols to process_pending_assemble_externals.
6611 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6613 * btfout.cc (btf_calc_num_vbytes): Fixed logic for enum64.
6614 (btf_asm_enum_const): Corrected logic for enum64 and smaller
6615 than 4 bytes values.
6617 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6619 * config/bpf/bpf.cc (bpf_output_call): Report error in case the
6620 function call is for a builtin.
6621 (bpf_external_libcall): Added target hook to detect and report
6622 error when other external calls that are not builtins.
6624 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6626 * config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added
6627 function to bypass default behaviour.
6628 * config/bpf/bpf.h (COMPARE_MAX_PIECES): Defined to 1024 bytes.
6630 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6632 * config/bpf/core-builtins.cc (core_mark_as_access_index):
6635 2023-11-28 Cupertino Miranda <cupertino.miranda@oracle.com>
6637 * config/bpf/core-builtins.cc
6638 (bpf_resolve_overloaded_core_builtin): Removed call.
6639 (execute_lower_bpf_core): Added all to remove_parser_plugin.
6641 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6644 * config/riscv/riscv-v.cc (expand_vec_perm_const): Disallow poly size (1, 1) VLA SLP.
6646 2023-11-28 Jakub Jelinek <jakub@redhat.com>
6648 PR tree-optimization/112719
6649 * match.pd (parity(X)^parity(Y) -> parity(X^Y)): Handle case of
6651 * gimple-match-exports.cc (build_call_internal): Add special-case for
6652 bit query ifns on large/huge BITINT_TYPE before bitint lowering.
6654 2023-11-28 Jakub Jelinek <jakub@redhat.com>
6656 PR tree-optimization/112719
6657 * match.pd (popcount (X) + popcount (Y) -> POPCOUNT (X | Y)): Deal
6658 with argument types with different precisions.
6660 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6663 * Makefile.in (PLUGIN_HEADERS): Add analyzer headers.
6664 (install-plugin): Keep the directory structure for files in
6667 2023-11-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6670 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix regression.
6672 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6674 * diagnostic-show-locus.cc (layout::maybe_add_location_range):
6675 Don't print annotation lines for ranges when there's no column
6677 (selftest::test_one_liner_no_column): New.
6678 (selftest::test_diagnostic_show_locus_one_liner): Call it.
6680 2023-11-28 David Malcolm <dmalcolm@redhat.com>
6682 * diagnostic.cc (diagnostic_get_location_text): Convert to...
6683 (diagnostic_context::get_location_text): ...this, and convert
6684 return type from char * to label_text.
6685 (diagnostic_build_prefix): Update for above change.
6686 (default_diagnostic_start_span_fn): Likewise.
6687 (selftest::assert_location_text): Likewise.
6688 * diagnostic.h (diagnostic_context::get_location_text): New decl.
6690 2023-11-27 Andrew Pinski <quic_apinski@quicinc.com>
6692 * config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
6693 Handle csinv/csinc case of 1/-1.
6695 2023-11-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6696 Richard Sandiford <richard.sandiford@arm.com>
6698 PR middle-end/111754
6699 * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's
6700 encoding, and set res_nelts_per_pattern to 2 if sel contains stepped
6701 sequence but input vectors do not.
6702 (test_nunits_min_2): New test Case 8.
6703 (test_nunits_min_4): New tests Case 8 and Case 9.
6705 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6707 * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not
6708 force frame chain for eh_return.
6710 2023-11-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
6712 * config/aarch64/aarch64-protos.h (aarch64_eh_return_handler_rtx):
6714 * config/aarch64/aarch64.cc (aarch64_return_address_signing_enabled):
6715 Sign return address even in functions with eh_return.
6716 (aarch64_expand_epilogue): Conditionally return with br or ret.
6717 (aarch64_eh_return_handler_rtx): Remove.
6718 * config/aarch64/aarch64.h (EH_RETURN_TAKEN_RTX): Define.
6719 (EH_RETURN_STACKADJ_RTX): Change to R5.
6720 (EH_RETURN_HANDLER_RTX): Change to R6.
6721 * df-scan.cc: Handle EH_RETURN_TAKEN_RTX.
6722 * doc/tm.texi: Regenerate.
6723 * doc/tm.texi.in: Document EH_RETURN_TAKEN_RTX.
6724 * except.cc (expand_eh_return): Handle EH_RETURN_TAKEN_RTX.
6726 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
6728 * config.gcc <amdgcn-*-amdhsa> (extra_gcc_objs): Don't set.
6729 * config/gcn/driver-gcn.cc: Remove.
6730 * config/gcn/gcn-hsa.h (ASM_SPEC, EXTRA_SPEC_FUNCTIONS): Remove
6731 'last_arg' spec function.
6732 * config/gcn/t-gcn-hsa (driver-gcn.o): Remove.
6734 2023-11-27 Thomas Schwinge <thomas@codesourcery.com>
6737 * config/gcn/gcn.opt (march=, mtune=): Tag as 'Negative' of
6740 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
6742 * config/i386/gnu.h: Use PIE_SPEC, add static-pie case.
6743 * config/i386/gnu64.h: Use PIE_SPEC, add static-pie case.
6745 2023-11-27 Samuel Thibault <samuel.thibault@gnu.org>
6747 * config/i386/t-gnu64: New file.
6748 * config.gcc [x86_64-*-gnu*]: Add i386/t-gnu64 to
6751 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6754 * config/aarch64/aarch64-sve-builtins.h (is_ptrue): Declare.
6755 * config/aarch64/aarch64-sve-builtins.cc (is_ptrue): New function.
6756 (gimple_folder::redirect_pred_x): Likewise.
6757 (gimple_folder::fold): Use it.
6759 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6761 * config/aarch64/aarch64-sve-builtins.h (vector_cst_all_same): Declare.
6762 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): New
6763 function, a generalized replacement of...
6764 * config/aarch64/aarch64-sve-builtins-base.cc
6765 (svlast_impl::vect_all_same): ...this.
6766 (svlast_impl::fold): Update accordingly.
6768 2023-11-27 Richard Biener <rguenther@suse.de>
6770 PR tree-optimization/112653
6771 * gimple-ssa.h (gimple_df): Add escaped_return solution.
6772 * tree-ssa.cc (init_tree_ssa): Reset it.
6773 (delete_tree_ssa): Likewise.
6774 * tree-ssa-structalias.cc (escaped_return_id): New.
6775 (find_func_aliases): Handle non-IPA return stmts by
6776 adding to ESCAPED_RETURN.
6777 (set_uids_in_ptset): Adjust HEAP escaping to also cover
6778 escapes through return.
6779 (init_base_vars): Initialize ESCAPED_RETURN.
6780 (compute_points_to_sets): Replace ESCAPED post-processing
6781 with recording the ESCAPED_RETURN solution.
6782 * tree-ssa-alias.cc (ref_may_alias_global_p_1): Check
6783 the ESCAPED_RETUNR solution.
6784 (dump_alias_info): Dump it.
6785 * cfgexpand.cc (update_alias_info_with_stack_vars): Update it.
6786 * ipa-icf.cc (sem_item_optimizer::fixup_points_to_sets):
6788 * tree-inline.cc (expand_call_inline): Reset it.
6789 * tree-parloops.cc (parallelize_loops): Likewise.
6790 * tree-sra.cc (maybe_add_sra_candidate): Check it.
6792 2023-11-27 Richard Biener <rguenther@suse.de>
6793 Richard Sandiford <richard.sandiford@arm.com>
6795 PR tree-optimization/112661
6796 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Defer duplicate-and-
6797 interleave test to...
6798 (vect_build_slp_tree_2): ...here, once we have all the operands.
6799 Skip the test for uniform vectors.
6800 (vect_create_constant_vectors): Detect uniform vectors. Avoid
6801 redundant conversions in that case. Use gimple_build_vector_from_val
6802 to build the vector.
6804 2023-11-27 Richard Sandiford <richard.sandiford@arm.com>
6806 * attribs.cc (excl_hash_traits): Delete.
6807 (test_attribute_exclusions): Use pair_hash and nofree_string_hash
6810 2023-11-27 Andrew Stubbs <ams@codesourcery.com>
6812 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Disallow TImode.
6814 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6816 * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT):
6817 Add missing builtin type.
6819 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6821 * config/s390/s390-builtin-types.def: Remove types.
6822 * config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support.
6823 Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates.
6824 * config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit
6827 2023-11-27 Alex Coplan <alex.coplan@arm.com>
6828 Iain Sandoe <iain@sandoe.co.uk>
6831 * doc/cpp.texi: Document __has_{feature,extension}.
6833 2023-11-27 Richard Biener <rguenther@suse.de>
6835 PR tree-optimization/112706
6836 * match.pd (ptr + o ==/!=/- ptr + o'): New patterns.
6838 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6840 * config/s390/s390-builtin-types.def: Add/remove types.
6841 * config/s390/s390-builtins.def
6842 (s390_vclfnhs,s390_vclfnls,s390_vcrnfs,s390_vcfn,s390_vcnf):
6843 Replace type V8HI with UV8HI.
6845 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6847 * config/s390/s390-builtins.def
6848 (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s390_vcfeb,s390_vcgdb,
6849 s390_vclfeb,s390_vclgdb): Remove flags for non-existing operands
6852 2023-11-27 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6854 * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make
6855 use of constraint n instead of D and chop of high bits in the
6858 2023-11-27 Jakub Jelinek <jakub@redhat.com>
6861 * config.gcc (mips*-sde-elf*): Append to tm_defines rather than
6864 2023-11-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6866 * config/riscv/autovec.md
6867 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>):
6868 Remove gather_scatter_valid_offset_mode_p.
6869 (mask_len_gather_load<mode><mode>): Ditto.
6870 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6871 (mask_len_scatter_store<mode><mode>): Ditto.
6872 * config/riscv/predicates.md (const_1_or_8_operand): New predicate.
6873 (vector_gs_scale_operand_64): Remove.
6874 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): Remove.
6875 * config/riscv/riscv-v.cc (expand_gather_scatter): Refine code.
6876 (gather_scatter_valid_offset_mode_p): Remove.
6877 * config/riscv/vector-iterators.md: Fix iterator bugs.
6879 2023-11-27 Tsukasa OI <research_trasio@irq.a4lg.com>
6881 * common/config/riscv/riscv-common.cc
6882 (riscv_ext_version_table): Set version to ratified 2.0.
6883 (riscv_subset_list::parse_std_ext): Allow RV64E.
6884 * config.gcc: Parse base ISA 'rv64e' and ABI 'lp64e'.
6885 * config/riscv/arch-canonicalize: Parse base ISA 'rv64e'.
6886 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
6887 Define different macro per XLEN. Add handling for ABI_LP64E.
6888 * config/riscv/riscv-d.cc (riscv_d_handle_target_float_abi):
6889 Add handling for ABI_LP64E.
6890 * config/riscv/riscv-opts.h (enum riscv_abi_type): Add ABI_LP64E.
6891 * config/riscv/riscv.cc (riscv_option_override): Enhance error
6892 handling to support RV64E and LP64E.
6893 (riscv_conditional_register_usage): Change "RV32E" in a comment
6895 * config/riscv/riscv.h
6896 (UNITS_PER_FP_ARG): Add handling for ABI_LP64E.
6897 (STACK_BOUNDARY): Ditto.
6898 (ABI_STACK_BOUNDARY): Ditto.
6899 (MAX_ARGS_IN_REGISTERS): Ditto.
6900 (ABI_SPEC): Add support for "lp64e".
6901 * config/riscv/riscv.opt: Parse -mabi=lp64e as ABI_LP64E.
6902 * doc/invoke.texi: Add documentation of the LP64E ABI.
6904 2023-11-27 Jose E. Marchesi <jose.marchesi@oracle.com>
6906 * config/bpf/bpf-helpers.h: Remove.
6907 * config.gcc: Adapt accordingly.
6909 2023-11-27 Guo Jie <guojie@loongson.cn>
6911 * config/loongarch/loongarch.cc (loongarch_split_plus_constant):
6912 avoid left shift of negative value -0x8000.
6914 2023-11-27 Guo Jie <guojie@loongson.cn>
6916 * config/loongarch/loongarch.cc
6917 (enum loongarch_load_imm_method): Add new method.
6918 (loongarch_build_integer): Add relevant implementations for
6920 (loongarch_move_integer): Ditto.
6922 2023-11-26 Alexander Monakov <amonakov@ispras.ru>
6924 * sort.cc: Use 'sorting networks' in comments.
6926 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6929 * config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Add slidedown.
6930 (vlmax_ta_p): Ditto.
6931 (pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
6933 2023-11-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6935 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): Fix typo.
6936 (avl_can_be_propagated_p): Ditto.
6937 (vlmax_ta_p): Ditto.
6939 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6942 * doc/install.texi (Downloading the source): Sort the list of
6943 front ends and add D, Go, and Modula-2.
6945 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6948 * doc/install.texi (Specific) <*-*-freebsd*>: Remove older
6949 contents referencing GCC 4.x.
6951 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
6953 * doc/standards.texi (Standards): Update ISO C++ reference.
6955 2023-11-25 Jakub Jelinek <jakub@redhat.com>
6958 * config/i386/i386.md (*jcc_bt<mode>_mask,
6959 *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected
6960 second operand of bt_comparison_operator.
6962 2023-11-25 Andrew Pinski <pinskia@gmail.com>
6963 Jakub Jelinek <jakub@redhat.com>
6966 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore>
6967 rather than %<vw> for alternative with r constraint on input operand.
6969 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
6971 * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm;
6972 change 'in the future' to 'in LLVM 18'.
6974 2023-11-24 John David Anglin <danglin@gcc.gnu.org>
6976 * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT
6977 in a couple of places.
6979 2023-11-24 Martin Jambor <mjambor@suse.cz>
6981 PR middle-end/109849
6982 * tree-sra.cc (passed_by_ref_in_call): New.
6983 (sra_initialize): Allocate passed_by_ref_in_call.
6984 (sra_deinitialize): Free passed_by_ref_in_call.
6985 (create_access): Add decl pool candidates only if they are not
6987 (build_access_from_expr_1): Bail out on ADDR_EXPRs.
6988 (build_access_from_call_arg): New function.
6989 (asm_visit_addr): Rename to scan_visit_addr, change the
6990 disqualification dump message.
6991 (scan_function): Check taken addresses for all non-call statements,
6992 including phi nodes. Process all call arguments, including the static
6993 chain, build_access_from_call_arg.
6994 (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow
6995 non-escaped local variables.
6996 (sort_and_splice_var_accesses): Disallow smaller-than-precision
6997 replacements for aggregates passed by reference to functions.
6998 (sra_modify_expr): Use a separate stmt iterator for adding satements
6999 before the processed statement and after it.
7000 (enum out_edge_check): New type.
7001 (abnormal_edge_after_stmt_p): New function.
7002 (sra_modify_call_arg): New function.
7003 (sra_modify_assign): Adjust calls to sra_modify_expr.
7004 (sra_modify_function_body): Likewise, use sra_modify_call_arg to
7005 process call arguments, including the static chain.
7007 2023-11-24 Uros Bizjak <ubizjak@gmail.com>
7010 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load
7011 function address to a register for ix86_cmodel == CM_LARGE.
7013 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
7015 * doc/invoke.texi (-Wopenmp): Add.
7016 * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at.
7017 * omp-expand.cc (expand_omp_ordered_sink): Likewise.
7018 * omp-general.cc (omp_check_context_selector): Likewise.
7019 * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions,
7020 lower_omp_ordered_clauses): Likewise.
7021 * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise.
7023 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7026 * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors.
7028 2023-11-24 Alexander Monakov <amonakov@ispras.ru>
7030 * config.in: Regenerate.
7031 * configure: Regenerate.
7032 * configure.ac: Delete manual checks for old Valgrind headers.
7033 * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete.
7034 (VALGRIND_MAKE_MEM_DEFINED): Delete.
7035 (VALGRIND_MAKE_MEM_UNDEFINED): Delete.
7036 (VALGRIND_MALLOCLIKE_BLOCK): Delete.
7037 (VALGRIND_FREELIKE_BLOCK): Delete.
7039 2023-11-24 Jakub Jelinek <jakub@redhat.com>
7042 * config/i386/i386-expand.cc (ix86_expand_branch): Use
7043 ix86_expand_vector_logical_operator to expand vector XOR rather than
7044 gen_rtx_SET on gen_rtx_XOR.
7046 2023-11-24 Alex Coplan <alex.coplan@arm.com>
7048 * rtl-ssa/access-utils.h (filter_accesses): New.
7049 (remove_regno_access): New.
7050 (check_remove_regno_access): New.
7051 * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use
7052 new filter_accesses helper.
7054 2023-11-24 Alex Coplan <alex.coplan@arm.com>
7056 * rtl-ssa/accesses.cc (function_info::create_set): New.
7057 * rtl-ssa/accesses.h (access_info::is_temporary): New.
7058 * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns.
7059 (function_info::finalize_new_accesses): Handle new/temporary
7060 user-created accesses.
7061 (function_info::apply_changes_to_insn): Ensure m_is_temp flag
7062 on new insns gets cleared.
7063 (function_info::change_insns): Handle new/temporary insns.
7064 (function_info::create_insn): New.
7065 * rtl-ssa/changes.h (class insn_change): Make function_info a
7067 * rtl-ssa/functions.h (function_info): Declare new entry points:
7068 create_set, create_insn. Declare new change_alloc helper.
7069 * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in
7071 * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying
7072 is_temporary accessor.
7073 * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to
7075 * rtl-ssa/member-fns.inl (function_info::change_alloc): New.
7076 * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add
7077 handling for temporary defs.
7079 2023-11-24 Jakub Jelinek <jakub@redhat.com>
7081 PR tree-optimization/112673
7082 * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify
7083 if either @0 doesn't have scalar integral type or if it has mode
7086 2023-11-24 Jakub Jelinek <jakub@redhat.com>
7088 PR middle-end/112679
7089 * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on
7090 floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE
7091 INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large
7092 or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind.
7094 2023-11-24 Richard Biener <rguenther@suse.de>
7096 PR tree-optimization/112677
7097 * tree-vect-loop.cc (vectorizable_reduction): Use alloca
7098 to allocate vectype_op.
7100 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org>
7102 * expr.cc (by_pieces_ninsns): Include by pieces compare when
7103 do the adjustment for overlap operations. Replace mov_optab
7104 checks with gcc assertion.
7106 2023-11-24 Jakub Jelinek <jakub@redhat.com>
7108 PR middle-end/112668
7109 * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions.
7110 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After
7111 temporarily adding statements after m_init_gsi, update m_init_gsi
7112 such that later additions after it will be after the added statements.
7113 (bitint_large_huge::handle_load): Likewise. When splitting
7114 gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed
7115 and update saved m_gsi as well if needed.
7116 (bitint_large_huge::lower_mergeable_stmt,
7117 bitint_large_huge::lower_comparison_stmt,
7118 bitint_large_huge::lower_mul_overflow,
7119 bitint_large_huge::lower_bit_query): Use gsi_end_bb.
7121 2023-11-24 Jakub Jelinek <jakub@redhat.com>
7124 * tree.cc (try_catch_may_fallthru): If second operand of
7125 TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a
7126 STATEMENT_LIST containing a single statement.
7128 2023-11-24 Richard Biener <rguenther@suse.de>
7130 PR tree-optimization/112344
7131 * tree-chrec.cc (chrec_apply): Only use an unsigned add
7132 when the overall increment doesn't fit the signed type.
7134 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7137 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function.
7138 (expand_vec_perm_const_1): Add new optimization.
7140 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7142 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
7144 2023-11-24 Haochen Jiang <haochen.jiang@intel.com>
7147 * config/i386/driver-i386.cc (check_avx10_avx512_features):
7149 (check_avx512_features): this and remove avx10 check.
7150 (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
7151 avoid emitting warnings when building GCC with native arch.
7152 * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
7153 128/256 bit builtin for AVX512VP2INTERSECT.
7154 * config/i386/i386-options.cc (ix86_option_override_internal):
7155 Also check whether the AVX512 flags is set when trying to reset.
7156 * config/i386/i386.h
7157 (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
7158 (PTA_ZNVER4): Ditto.
7160 2023-11-23 Georg-Johann Lay <avr@gjlay.de>
7163 * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define
7164 to speculation_safe_value_not_needed.
7166 2023-11-23 Marek Polacek <polacek@redhat.com>
7168 * common.opt (Whardened, fhardened): New options.
7169 * config.in: Regenerate.
7170 * config/bpf/bpf.cc: Include "opts.h".
7171 (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do
7172 not inform that -fstack-protector does not work.
7173 * config/i386/i386-options.cc (ix86_option_override_internal): When
7174 -fhardened, maybe enable -fcf-protection=full.
7175 * config/linux-protos.h (linux_fortify_source_default_level): Declare.
7176 * config/linux.cc (linux_fortify_source_default_level): New.
7177 * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine.
7178 * configure: Regenerate.
7179 * configure.ac: Check if the linker supports '-z now' and '-z relro'.
7180 Check if -fhardened is supported on $target_os.
7181 * doc/invoke.texi: Document -fhardened and -Whardened.
7182 * doc/tm.texi: Regenerate.
7183 * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add.
7184 * gcc.cc (driver_handle_option): Remember if any link options or -static
7185 were specified on the command line.
7186 (process_command): When -fhardened, maybe enable -pie and
7187 -Wl,-z,relro,-z,now.
7188 * opts.cc (flag_stack_protector_set_by_fhardened_p): New global.
7189 (finish_options): When -fhardened, enable
7190 -ftrivial-auto-var-init=zero and -fstack-protector-strong.
7191 (print_help_hardened): New.
7192 (print_help): Call it.
7193 * opts.h (flag_stack_protector_set_by_fhardened_p): Declare.
7194 * target.def (fortify_source_default_level): New target hook.
7195 * targhooks.cc (default_fortify_source_default_level): New.
7196 * targhooks.h (default_fortify_source_default_level): Declare.
7197 * toplev.cc (process_options): When -fhardened, enable
7198 -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p,
7199 do not warn that -fstack-protector not supported for this target.
7200 Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT.
7202 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org>
7204 * config/arm/arm-mve-builtins-functions.h
7205 (full_width_access::memory_vector_mode): Add default clause.
7207 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
7210 * config/i386/i386.md (parityhi2):
7211 Use temporary register in the call to gen_parityhi2_cmp.
7213 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
7216 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain
7217 scratch regno when flag_force_indirect_call is set. On 64-bit
7218 targets, call __morestack_large_model when flag_force_indirect_call
7219 is set and on 32-bit targets with -fpic, manually expand PIC sequence
7220 to call __morestack. Move the function address to an indirect
7221 call scratch register.
7223 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
7225 PR tree-optimization/112678
7226 * tree-profile.cc (tree_profiling): Do not use atomic operations
7227 for -fprofile-update=single.
7229 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7231 * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define
7232 __GCC_ASM_FLAG_OUTPUTS__.
7233 * config/s390/s390.cc (s390_canonicalize_comparison): More
7234 UNSPEC_CC_TO_INT cases.
7235 (s390_md_asm_adjust): Implement flags output.
7236 * config/s390/s390.md (ccstore4): Allow mask operands.
7237 * doc/extend.texi: Document flags output.
7239 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7241 * config/s390/s390.md: Split TImode loads.
7243 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
7245 * config/s390/vector.md: (*vec_extract) Fix.
7247 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com>
7249 * tree-ssa-reassoc.cc (get_reassociation_width): check
7250 for loop dependent FMAs.
7251 (reassociate_bb): For 3 ops, refine the condition to call
7252 swap_ops_for_binary_stmt.
7254 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7256 * config/riscv/riscv-protos.h (emit_vec_extract): New function.
7257 * config/riscv/riscv-v.cc (emit_vec_extract): Ditto.
7258 * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes.
7260 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7264 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function.
7265 (vlmax_ta_p): Disable vrgather AVL propagation.
7267 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7269 PR middle-end/112336
7270 * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
7271 if modifier is EXPAND_INITIALIZER.
7273 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7275 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes.
7276 (emit_vlmax_masked_gather_mu_insn): Ditto.
7277 (modulo_sel_indices): Ditto.
7278 (expand_vec_perm): Ditto.
7279 (shuffle_generic_patterns): Ditto.
7281 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7283 * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor,
7284 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
7285 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
7286 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
7287 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
7288 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
7289 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document.
7291 2023-11-23 Richard Biener <rguenther@suse.de>
7294 * doc/md.texi (cpymem): Document that exact overlap of source
7295 and destination needs to work.
7296 * doc/standards.texi (ffreestanding): Mention memcpy is required
7297 to handle the exact overlap case.
7299 2023-11-23 Jakub Jelinek <jakub@redhat.com>
7302 * doc/invoke.texi (-Wno-c++26-extensions): Document.
7304 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu>
7306 * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code.
7308 2023-11-23 Pan Li <pan2.li@intel.com>
7311 * dse.cc (get_stored_val): Allow vector mode if read size is
7312 less than or equal to stored size.
7314 2023-11-23 Costas Argyris <costas.argyris@gmail.com>
7316 * configure.ac: Handle new --enable-win32-utf8-manifest
7318 * config.host: allow win32 utf8 manifest to be disabled
7320 * configure: Regenerate.
7322 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
7325 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
7327 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
7330 * config/pa/predicates.md (integer_store_memory_operand): Return
7331 true for REG+D addresses when reload_in_progress is true.
7333 2023-11-22 Richard Biener <rguenther@suse.de>
7335 PR tree-optimization/112344
7336 * tree-chrec.cc (chrec_apply): Perform the overall increment
7337 calculation and increment in an unsigned type.
7339 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
7341 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
7344 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
7346 PR rtl-optimization/112610
7347 * ira-costs.cc: (find_costs_and_classes): Remove arg.
7348 Use ira_dump_file for printing.
7349 (print_allocno_costs, print_pseudo_costs): Ditto.
7350 (ira_costs): Adjust call of find_costs_and_classes.
7351 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
7353 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7356 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
7358 2023-11-22 Tamar Christina <tamar.christina@arm.com>
7360 * config/aarch64/aarch64-simd.md
7361 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
7362 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
7363 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
7364 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
7365 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
7366 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
7368 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
7370 * config/arm/arm-mve-builtins.cc
7371 (function_resolver::infer_pointer_type): Remove spurious line.
7373 2023-11-22 Xi Ruoyao <xry111@xry111.site>
7375 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
7377 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
7378 Use the mode of the selector (instead of the shuffled vector)
7379 for truncating it. Operate on subregs in the selector mode if
7380 the shuffled vector has a different mode (i. e. it's a
7381 floating-point vector).
7383 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
7385 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
7387 (pop2_di): Likewise.
7388 (push2p_di): Likewise.
7389 (pop2p_di): Likewise.
7391 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7394 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
7395 (shuffle_generic_patterns): Fix permutation indice bug.
7396 * config/riscv/vector-iterators.md: Fix VEI16 bug.
7398 2023-11-22 liuhongt <hongtao.liu@intel.com>
7400 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
7403 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7406 * config/vax/vax.cc (index_term_p): Only accept the index scaler
7407 as the RHS operand to ASHIFT.
7409 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7411 * config/riscv/predicates.md (order_operator): Remove predicate.
7412 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
7413 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
7414 (cstore<mode>4): Likewise.
7416 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7418 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
7419 `invert_ptr' parameter.
7420 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
7422 (riscv_expand_float_scc): Pass `invert_ptr' through to
7423 `riscv_emit_float_compare'.
7424 (riscv_expand_conditional_move): Pass `&invert' to
7425 `riscv_expand_float_scc'.
7426 * config/riscv/riscv.md (add<mode>cc): Likewise.
7428 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7430 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
7432 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
7433 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
7434 than going through a temporary register for word-mode targets.
7435 (riscv_expand_conditional_branch): Canonicalize the comparison
7436 if not against constant zero.
7438 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7440 * config/riscv/predicates.md (ne_operator): New predicate.
7441 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
7442 floating-point condition.
7443 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
7444 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
7445 `riscv_expand_conditional_branch' for `!signed_order_operator'
7446 operators, otherwise let it through.
7447 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
7450 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7452 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
7453 bail out in floating-point conditions.
7455 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7457 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
7458 use of SUBREG if the conditional-set target is word-mode.
7460 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7462 * config/riscv/riscv.md (add<mode>cc): New expander.
7464 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7466 * config/riscv/predicates.md (movcc_operand): New predicate.
7467 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
7469 * config/riscv/riscv.md (mov<mode>cc): Likewise.
7470 * config/riscv/riscv.opt (mmovcc): New option.
7471 * doc/invoke.texi (Option Summary): Document it.
7473 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7475 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
7476 * config/riscv/riscv.cc (riscv_emit_unary): New function.
7478 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7480 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
7481 conditional-move handling across all the relevant targets.
7483 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7485 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7486 accept constants for T-Head data input operands.
7488 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7490 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7491 accept constants for T-Head comparison operands.
7493 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7495 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
7496 the check for operand 1 being constant 0 in the Ventana/Zicond
7497 case for equality comparisons.
7499 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7501 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
7502 invert the condition for GEU and LEU.
7504 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7506 * config/riscv/riscv.cc (riscv_insn_cost): New function.
7507 (riscv_max_noce_ifcvt_seq_cost): Likewise.
7508 (riscv_noce_conversion_profitable_p): Likewise.
7509 (TARGET_INSN_COST): New macro.
7510 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
7511 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
7513 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7515 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
7516 extraneous variable for EQ vs NE operation selection.
7518 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7520 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7521 `nullptr' rather than 0 to initialize a pointer.
7523 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7525 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7526 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
7528 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7530 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
7531 `mode' for `GET_MODE (dest)' throughout.
7533 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7535 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
7536 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
7538 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
7540 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
7542 (*mov<GPR:mode><X:mode>cc): ... here.
7544 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
7546 PR middle-end/112406
7547 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
7548 reduction index != 1.
7549 (vect_transform_reduction): Handle reduction index != 1.
7551 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7553 * common.md (aligned_register_operand): New predicate.
7555 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7557 * ira-int.h (ira_allocno): Add a register_filters field.
7558 (ALLOCNO_REGISTER_FILTERS): New macro.
7559 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
7560 * ira-build.cc (ira_create_allocno): Initialize register_filters.
7561 (create_cap_allocno): Propagate register_filters.
7562 (propagate_allocno_info): Likewise.
7563 (propagate_some_info_from_allocno): Likewise.
7564 * ira-lives.cc (process_register_constraint_filters): New function.
7565 (process_bb_node_lives): Use it to record register filter
7567 * ira-color.cc (assign_hard_reg): Check register filters.
7568 (improve_allocation, fast_allocation): Likewise.
7570 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7572 * lra-constraints.cc (process_alt_operands): Check register filters.
7574 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7576 * recog.h (operand_alternative): Add a register_filters field.
7577 (alternative_register_filters): New function.
7578 * recog.cc (preprocess_constraints): Calculate the filters field.
7579 (constrain_operands): Check register filters.
7581 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
7583 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
7585 * doc/md.texi (define_register_constraint): Document it.
7586 * doc/tm.texi.in: Reference it in discussion about aligned registers.
7587 * doc/tm.texi: Regenerate.
7588 * gensupport.h (register_filters, get_register_filter_id): Declare.
7589 * gensupport.cc (register_filter_map, register_filters): New variables.
7590 (get_register_filter_id): New function.
7591 (process_define_register_constraint): Likewise.
7592 (process_rtx): Pass define_register_constraints to
7593 process_define_register_constraint.
7594 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
7595 * genpreds.cc (constraint_data): Add a filter field.
7596 (add_constraint): Update accordingly.
7597 (process_define_register_constraint): Pass the filter operand.
7598 (write_init_reg_class_start_regs): New function.
7599 (write_get_register_filter): Likewise.
7600 (write_get_register_filter_id): Likewise.
7601 (write_tm_preds_h): Write a definition of target_constraints,
7602 plus helpers to test its contents. Write the get_register_filter*
7604 (write_insn_preds_c): Write init_reg_class_start_regs.
7605 * reginfo.cc (init_reg_class_start_regs): Declare.
7606 (init_reg_sets): Call it.
7607 * target-globals.h (this_target_constraints): Declare.
7608 (target_globals): Add a constraints field.
7609 (restore_target_globals): Update accordingly.
7610 * target-globals.cc: Include tm_p.h.
7611 (default_target_globals): Initialize the constraints field.
7612 (save_target_globals): Handle the constraints field.
7613 (target_globals::~target_globals): Likewise.
7615 2023-11-21 Richard Biener <rguenther@suse.de>
7617 PR tree-optimization/112623
7618 * tree-ssa-forwprop.cc (simplify_vector_constructor):
7619 Check the source mode of the insn for vector pack/unpacks.
7621 2023-11-21 Richard Biener <rguenther@suse.de>
7623 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
7624 of VF against max_vf until VF is final.
7626 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7629 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
7631 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7633 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
7635 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7638 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
7639 armv9.3-a): Update to generic-armv9-a.
7640 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
7641 * config/aarch64/aarch64-tune.md: Regenerate.
7642 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
7643 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
7645 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7648 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
7649 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
7650 armv8.8-a): Update to generic_armv8_a.
7651 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
7652 * config/aarch64/aarch64-tune.md: Regenerate.
7653 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
7654 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
7655 TARGET_CPU_generic_armv8_a.
7656 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
7658 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7661 * config/aarch64/aarch64-cores.def: Add generic.
7662 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
7663 * config/aarch64/aarch64-tune.md: Regenerate
7664 * config/aarch64/aarch64.cc (all_cores): Remove generic
7665 * config/aarch64/aarch64.h (enum target_cpus): Remove
7668 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7671 * config/aarch64/aarch64.cc (generic_addrcost_table,
7672 exynosm1_addrcost_table,
7673 xgene1_addrcost_table,
7674 thunderx2t99_addrcost_table,
7675 thunderx3t110_addrcost_table,
7676 tsv110_addrcost_table,
7677 qdf24xx_addrcost_table,
7678 a64fx_addrcost_table,
7679 neoversev1_addrcost_table,
7680 neoversen2_addrcost_table,
7681 neoversev2_addrcost_table,
7682 generic_regmove_cost,
7683 cortexa57_regmove_cost,
7684 cortexa53_regmove_cost,
7685 exynosm1_regmove_cost,
7686 thunderx_regmove_cost,
7687 xgene1_regmove_cost,
7688 qdf24xx_regmove_cost,
7689 thunderx2t99_regmove_cost,
7690 thunderx3t110_regmove_cost,
7691 tsv110_regmove_cost,
7693 neoversen2_regmove_cost,
7694 neoversev1_regmove_cost,
7695 neoversev2_regmove_cost,
7696 generic_vector_cost,
7698 qdf24xx_vector_cost,
7699 thunderx_vector_cost,
7701 cortexa57_vector_cost,
7702 exynosm1_vector_cost,
7704 thunderx2t99_vector_cost,
7705 thunderx3t110_vector_cost,
7706 ampere1_vector_cost,
7707 generic_branch_cost,
7715 thunderxt88_tunings,
7722 thunderx2t99_tunings,
7723 thunderx3t110_tunings,
7727 neoversev1_vector_cost,
7729 neoverse512tvb_vector_cost,
7730 neoverse512tvb_tunings,
7731 neoversen2_vector_cost,
7733 neoversev2_vector_cost,
7735 a64fx_tunings): Split into own files.
7736 * config/aarch64/tuning_models/a64fx.h: New file.
7737 * config/aarch64/tuning_models/ampere1.h: New file.
7738 * config/aarch64/tuning_models/ampere1a.h: New file.
7739 * config/aarch64/tuning_models/cortexa35.h: New file.
7740 * config/aarch64/tuning_models/cortexa53.h: New file.
7741 * config/aarch64/tuning_models/cortexa57.h: New file.
7742 * config/aarch64/tuning_models/cortexa72.h: New file.
7743 * config/aarch64/tuning_models/cortexa73.h: New file.
7744 * config/aarch64/tuning_models/emag.h: New file.
7745 * config/aarch64/tuning_models/exynosm1.h: New file.
7746 * config/aarch64/tuning_models/generic.h: New file.
7747 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
7748 * config/aarch64/tuning_models/neoversen1.h: New file.
7749 * config/aarch64/tuning_models/neoversen2.h: New file.
7750 * config/aarch64/tuning_models/neoversev1.h: New file.
7751 * config/aarch64/tuning_models/neoversev2.h: New file.
7752 * config/aarch64/tuning_models/qdf24xx.h: New file.
7753 * config/aarch64/tuning_models/saphira.h: New file.
7754 * config/aarch64/tuning_models/thunderx.h: New file.
7755 * config/aarch64/tuning_models/thunderx2t99.h: New file.
7756 * config/aarch64/tuning_models/thunderx3t110.h: New file.
7757 * config/aarch64/tuning_models/thunderxt88.h: New file.
7758 * config/aarch64/tuning_models/tsv110.h: New file.
7759 * config/aarch64/tuning_models/xgene1.h: New file.
7761 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7763 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
7764 vec_unpack<su>_lo_<mode): Split into...
7765 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
7766 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
7767 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
7768 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
7769 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
7770 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
7772 2023-11-21 Tamar Christina <tamar.christina@arm.com>
7774 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
7775 (aarch64_vector_costs::count_ops): Likewise.
7777 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
7779 PR middle-end/112634
7780 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
7781 __atomic_add_fetch() to the signed counter type.
7782 (gen_counter_update): Fix formatting.
7784 2023-11-21 Jakub Jelinek <jakub@redhat.com>
7786 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
7789 2023-11-21 Jakub Jelinek <jakub@redhat.com>
7791 PR middle-end/112639
7792 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
7793 is specified but cleared, call save_expr on arg0.
7795 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
7797 * config/i386/i386-expand.h (gen_push): Add default bool
7799 (gen_pop): Likewise.
7800 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
7802 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
7803 ppx_p parameter for function declaration.
7804 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
7805 (gen_push): Likewise.
7806 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
7807 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
7808 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
7809 and adjust cfi when ppx_p is ture.
7810 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
7812 (ix86_emit_restore_regs_using_pop2): Likewise.
7813 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
7814 ix86_emit_restore_reg_using_pop.
7815 * config/i386/i386.h (TARGET_APX_PPX): New.
7816 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
7817 (pushp_di): New define_insn.
7818 (popp_di): Likewise.
7819 (push2p_di): Likewise.
7820 (pop2p_di): Likewise.
7821 * config/i386/i386.opt: Add apx_ppx enum.
7823 2023-11-21 Richard Biener <rguenther@suse.de>
7825 PR tree-optimization/111970
7826 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
7827 for SLP gather load.
7828 (vectorizable_store): Likewise for SLP scatter store.
7830 2023-11-21 Xi Ruoyao <xry111@xry111.site>
7832 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
7833 exclude it for target libraries.
7834 (loongarch_isa_base_features): Likewise.
7835 (loongarch_isa): Likewise.
7836 (loongarch_abi): Likewise.
7837 (loongarch_target): Likewise.
7838 (loongarch_cpu_default_isa): Likewise.
7840 2023-11-21 liuhongt <hongtao.liu@intel.com>
7843 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
7845 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
7846 (reduc_<code>_scal_v4qi): Ditto.
7848 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
7850 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
7851 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
7852 (nvptx_declare_function_name): Likewise.
7853 (nvptx_call_args): Likewise.
7854 (nvptx_expand_call): Likewise.
7856 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
7858 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
7859 counter expression in the second gimple_build_assign().
7861 2023-11-20 Jan Hubicka <jh@suse.cz>
7863 * cgraph.cc (add_detected_attribute_1): New function.
7864 (cgraph_node::add_detected_attribute): Likewise.
7865 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
7866 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
7867 * doc/invoke.texi: Document new flag.
7868 * gimple-range-fold.cc (fold_using_range::range_of_call):
7869 Use known reutrn value ranges.
7870 * ipa-prop.cc (struct ipa_return_value_summary): New type.
7871 (class ipa_return_value_sum_t): New type.
7872 (ipa_return_value_sum): New summary.
7873 (ipa_record_return_value_range): New function.
7874 (ipa_return_value_range): New function.
7875 * ipa-prop.h (ipa_return_value_range): Declare.
7876 (ipa_record_return_value_range): Declare.
7877 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
7878 * ipa-utils.h (warn_function_returns_nonnull): Declare.
7879 * symbol-summary.h: Fix comment.
7880 * tree-vrp.cc (execute_ranger_vrp): Record return values.
7882 2023-11-20 Richard Biener <rguenther@suse.de>
7884 PR tree-optimization/112618
7885 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
7886 relevant and unused .MASK_CALL make sure we remove the
7889 2023-11-20 Richard Biener <rguenther@suse.de>
7891 PR tree-optimization/112281
7892 * tree-loop-distribution.cc
7893 (loop_distribution::pg_add_dependence_edges): For = in the
7894 innermost common loop record a partition conflict.
7896 2023-11-20 Richard Biener <rguenther@suse.de>
7898 PR middle-end/112622
7899 * convert.cc (convert_to_real_1): Use element_precision
7900 where a vector type might appear. Provide specific
7901 diagnostic for unexpected vector argument.
7903 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7906 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
7907 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
7909 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
7911 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
7912 Add check for XLEN == 32.
7913 * config/riscv/vector-iterators.md: Change VLS part of the
7914 demote iterator to 2x elements modes
7915 * config/riscv/vector.md: Adjust iterators and insn conditions.
7917 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7919 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
7920 (vst1_impl, vst1q): New.
7921 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
7922 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
7923 * config/arm/arm_mve.h
7927 (vld1q_s32): Delete.
7928 (vld1q_s16): Delete.
7930 (vld1q_u32): Delete.
7931 (vld1q_u16): Delete.
7932 (vld1q_f32): Delete.
7933 (vld1q_f16): Delete.
7934 (vst1q_f32): Delete.
7935 (vst1q_f16): Delete.
7937 (vst1q_s32): Delete.
7938 (vst1q_s16): Delete.
7940 (vst1q_u32): Delete.
7941 (vst1q_u16): Delete.
7942 (__arm_vld1q_s8): Delete.
7943 (__arm_vld1q_s32): Delete.
7944 (__arm_vld1q_s16): Delete.
7945 (__arm_vld1q_u8): Delete.
7946 (__arm_vld1q_u32): Delete.
7947 (__arm_vld1q_u16): Delete.
7948 (__arm_vst1q_s8): Delete.
7949 (__arm_vst1q_s32): Delete.
7950 (__arm_vst1q_s16): Delete.
7951 (__arm_vst1q_u8): Delete.
7952 (__arm_vst1q_u32): Delete.
7953 (__arm_vst1q_u16): Delete.
7954 (__arm_vld1q_f32): Delete.
7955 (__arm_vld1q_f16): Delete.
7956 (__arm_vst1q_f32): Delete.
7957 (__arm_vst1q_f16): Delete.
7958 (__arm_vld1q): Delete.
7959 (__arm_vst1q): Delete.
7960 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
7961 (@mve_vld1q_f<mode>): ... this.
7962 (mve_vld1q_<supf><mode>): Rename into ...
7963 (@mve_vld1q_<supf><mode>) ... this.
7964 (mve_vst1q_f<mode>): Rename into ...
7965 (@mve_vst1q_f<mode>): ... this.
7966 (mve_vst1q_<supf><mode>): Rename into ...
7967 (@mve_vst1q_<supf><mode>) ... this.
7969 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7971 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
7972 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
7974 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7976 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
7977 (full_width_access): New classes.
7978 * config/arm/arm-mve-builtins.cc
7979 (find_type_suffix_for_scalar_type, infer_pointer_type)
7980 (require_pointer_type, get_contiguous_base, add_mem_operand)
7981 (add_fixed_operand, use_contiguous_load_insn)
7982 (use_contiguous_store_insn): New.
7983 * config/arm/arm-mve-builtins.h (memory_vector_mode)
7984 (infer_pointer_type, require_pointer_type, get_contiguous_base)
7986 (add_fixed_operand, use_contiguous_load_insn)
7987 (use_contiguous_store_insn): New.
7989 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
7991 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
7993 (parse_type): Add support for '_', 'al' and 'as'.
7994 * config/arm/arm-mve-builtins.h (function_instance): Add
7996 (function_base): Likewise.
7998 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
8000 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
8001 initialization of arm_simd_types[].eltype.
8002 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
8005 2023-11-20 Jakub Jelinek <jakub@redhat.com>
8007 * typeclass.h (enum type_class): Add vector_type_class.
8008 * builtins.cc (type_to_class): Return vector_type_class for
8010 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
8011 integer types and vector types.
8013 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
8015 PR middle-end/112406
8016 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
8017 Convert masks for conditional operations as well.
8019 2023-11-20 Jakub Jelinek <jakub@redhat.com>
8021 PR tree-optimization/90693
8022 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
8023 result only used in equality comparison against 1 with direct optab
8024 support as .POPCOUNT call with 2 arguments.
8025 * internal-fn.h (expand_POPCOUNT): Declare.
8026 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
8027 undefine at the end.
8028 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
8029 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
8030 inclusion to define expanders.
8031 (expand_POPCOUNT): New function.
8033 2023-11-20 Jakub Jelinek <jakub@redhat.com>
8035 PR tree-optimization/90693
8036 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
8037 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
8038 and NE_EXPR assignments and GIMPLE_CONDs.
8040 2023-11-20 Jakub Jelinek <jakub@redhat.com>
8042 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
8043 they are all undefined at the end.
8044 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
8045 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
8046 macros after inclusion of internal-fn.def.
8048 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
8050 * common/config/i386/cpuinfo.h (get_available_features):
8051 Add avx10_set and version and detect avx10.1.
8052 (cpu_indicator_init): Handle avx10.1-512.
8053 * common/config/i386/i386-common.cc
8054 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
8055 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
8056 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
8057 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
8058 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
8059 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
8060 Add indicator for explicit no-avx512 and no-avx10.1 options.
8061 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8062 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
8063 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8064 AVX10_1_256 and AVX10_1_512.
8065 * config/i386/cpuid.h (bit_AVX10): New.
8066 (bit_AVX10_256): Ditto.
8067 (bit_AVX10_512): Ditto.
8068 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
8069 (host_detect_local_cpu): Do not append "-mno-" options under
8070 specific scenarios to avoid emitting a warning.
8071 * config/i386/i386-isa.def
8072 (EVEX512): Add DEF_PTA(EVEX512).
8073 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
8074 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
8075 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
8077 (ix86_function_specific_save): Save explicit no indicator.
8078 (ix86_function_specific_restore): Restore explicit no indicator.
8079 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
8081 (ix86_valid_target_attribute_tree): Handle avx512 function
8082 attributes with avx10.1 command line option.
8083 (ix86_option_override_internal): Handle AVX10.1 options.
8084 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
8086 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
8087 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
8089 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
8090 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
8091 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
8094 2023-11-20 liuhongt <hongtao.liu@intel.com>
8097 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
8098 (REDUC_ANY_LOGIC_MODE): New iterator.
8099 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
8100 (REDUC_SSE_PLUS_MODE): Ditto.
8102 2023-11-20 xuli <xuli1@eswincomputing.com>
8105 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
8106 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
8107 (expand_block_move): Ditto.
8108 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
8110 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
8112 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
8114 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8116 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
8118 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
8120 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
8121 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
8122 (riscv_tune_param): Add fusible_ops field.
8123 (riscv_tune_param_rocket_tune_info): Initialize new field.
8124 (riscv_tune_param_sifive_7_tune_info): Likewise.
8125 (thead_c906_tune_info): Likewise.
8126 (generic_oo_tune_info): Likewise.
8127 (optimize_size_tune_info): Likewise.
8128 (riscv_macro_fusion_p): New function.
8129 (riscv_fusion_enabled_p): Likewise.
8130 (riscv_macro_fusion_pair_p): Likewise.
8131 (TARGET_SCHED_MACRO_FUSION_P): Define.
8132 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
8133 (extract_base_offset_in_addr): Moved into riscv.cc from...
8134 * config/riscv/thead.cc: Here.
8135 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
8136 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8138 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
8140 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
8141 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
8142 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
8143 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
8144 (@split_stack_cond_call<mode>): Likewise.
8145 * config/sh/sh.md (sp_switch_1): Likewise.
8147 2023-11-19 David Malcolm <dmalcolm@redhat.com>
8149 * diagnostic.h: Include "rich-location.h".
8150 * edit-context.h (class fixit_hint): New forward decl.
8151 * gcc-rich-location.h: Include "rich-location.h".
8152 * genmatch.cc: Likewise.
8153 * pretty-print.h: Likewise.
8155 2023-11-19 David Malcolm <dmalcolm@redhat.com>
8157 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
8158 * coretypes.h (class rich_location): New forward decl.
8160 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8162 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
8164 2023-11-19 David Malcolm <dmalcolm@redhat.com>
8167 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
8169 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8171 * config/loongarch/predicates.md (const_call_insn_operand):
8172 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
8173 "true" to make the coding style consistent.
8175 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8177 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
8179 * config/loongarch/loongarch-str.h: Regenerate.
8180 * config/loongarch/loongarch.opt: Regenerate.
8181 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
8182 * config/loongarch/loongarch-cpu.cc
8183 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
8184 and OPTION_MASK_ISA_LAMCAS.
8185 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
8186 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
8187 lines from assembly output.
8188 (atomic_exchange<mode>_short): Likewise.
8189 (atomic_exchange<mode:SHORT>): Likewise.
8190 (atomic_fetch_add<mode>_short): Likewise.
8191 (atomic_fetch_add<mode:SHORT>): Likewise.
8192 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
8193 of ISA_BASE_IS_LA64V110.
8194 (atomic_compare_and_swap<mode>): Likewise.
8195 (atomic_compare_and_swap<mode:GPR>): Likewise.
8196 (atomic_compare_and_swap<mode:SHORT>): Likewise.
8197 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
8198 status if -mlam-bh and -mlamcas if -fverbose-asm.
8200 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8202 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
8203 print dbar 0x700 if TARGET_LD_SEQ_SA.
8204 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
8206 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8208 * config/loongarch/loongarch.md (DIV): New mode iterator.
8209 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
8210 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
8211 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
8212 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
8214 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8216 * config/loongarch/loongarch-def.h:
8217 (loongarch_isa_base_features): Declare. Define it in ...
8218 * config/loongarch/loongarch-cpu.cc
8219 (loongarch_isa_base_features): ... here.
8220 (fill_native_cpu_config): If we know the base ISA of the CPU
8221 model from PRID, use it instead of la64 (v1.0). Check if all
8222 expected features of this base ISA is available, emit a warning
8224 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
8225 the features implied by the base ISA if not -march=native.
8227 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8229 * config/loongarch/genopts/isa-evolution.in: New data file.
8230 * config/loongarch/genopts/genstr.sh: Translate info in
8231 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
8232 and loongarch-cpucfg-map.h.
8233 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
8235 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
8237 (loongarch-str.h): Depend on isa-evolution.in.
8238 (loongarch.opt): Depend on isa-evolution.in.
8239 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
8240 * config/loongarch/loongarch-str.h: Regenerate.
8241 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
8242 for evolution features. Add helper function to enable features
8244 Probe native CPU capability and save the corresponding options
8246 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
8247 Probe native CPU capability and save the corresponding options
8249 (cache_cpucfg): Simplify with C++11-style for loop.
8250 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
8251 * config/loongarch/loongarch.cc
8252 (loongarch_option_override_internal): Enable the ISA evolution
8253 feature options implied by -march and not explicitly disabled.
8254 (loongarch_asm_code_end): New function, print ISA information as
8255 comments in the assembly if -fverbose-asm. It makes easier to
8256 debug things like -march=native.
8257 (TARGET_ASM_CODE_END): Define.
8258 * config/loongarch/loongarch.opt: Regenerate.
8259 * config/loongarch/loongarch-cpucfg-map.h: Generate.
8260 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
8262 2023-11-18 Xi Ruoyao <xry111@xry111.site>
8264 * config/loongarch/genopts/loongarch-strings:
8265 (STR_ISA_BASE_LA64V110): Add.
8266 * config/loongarch/genopts/loongarch.opt.in:
8267 (ISA_BASE_LA64V110): Add.
8268 * config/loongarch/loongarch-def.c
8269 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
8270 to STR_ISA_BASE_LA64V110.
8271 * config/loongarch/loongarch.opt: Regenerate.
8272 * config/loongarch/loongarch-str.h: Regenerate.
8274 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8276 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
8277 the atomic method behaviour.
8278 * tree-profile.cc (enum counter_update_method): New.
8279 (counter_update): Likewise.
8280 (gen_counter_update): Use counter_update_method. Split the
8281 atomic counter update in two 32-bit atomic operations if
8283 (tree_profiling): Select counter_update_method.
8285 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8287 * tree-profile.cc (gen_assign_counter_update): New.
8288 (gen_counter_update): Likewise.
8289 (gimple_gen_edge_profiler): Use gen_counter_update().
8290 (gimple_gen_time_profiler): Likewise.
8292 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8294 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
8295 * doc/tm.texi: Regenerate.
8296 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
8297 * target.def (have_libatomic): New.
8299 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8302 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
8304 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
8305 * config/sparc/sparc.c (sparc_gcov_type_size): New.
8306 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
8307 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
8308 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
8309 * doc/tm.texi.in: Regenerate.
8310 * target.def (gcov_type_size): New target hook.
8311 * targhooks.c (default_gcov_type_size): New.
8312 * targhooks.h (default_gcov_type_size): Declare.
8313 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
8315 (gimple_gen_time_profiler): Likewise.
8317 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
8319 * config/riscv/riscv-target-attr.cc
8320 (riscv_target_attr_parser::parse_arch): Use char[] for
8321 std::unique_ptr to prevent mismatched new delete issue.
8322 (riscv_process_one_target_attr): Ditto.
8323 (riscv_process_target_attr): Ditto.
8325 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8327 * config/riscv/vector-iterators.md: Refactor iterators.
8329 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8331 * config/loongarch/sync.md (atomic_load<mode>): New template.
8333 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8335 * config/loongarch/loongarch-def.h: Add comments.
8336 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
8337 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
8338 Remove redundant code implementations.
8339 * config/loongarch/sync.md (d): Added QI, HI support.
8340 (atomic_add<mode>): New template.
8341 (atomic_exchange<mode>_short): Likewise.
8342 (atomic_cas_value_strong<mode>_amcas): Likewise..
8343 (atomic_fetch_add<mode>_short): Likewise.
8345 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8347 * config.gcc: Support LA664.
8348 * config/loongarch/genopts/loongarch-strings: Likewise.
8349 * config/loongarch/genopts/loongarch.opt.in: Likewise.
8350 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
8351 * config/loongarch/loongarch-def.c: Likewise.
8352 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
8353 (ISA_BASE_LA64V110): Define macro.
8354 (N_ARCH_TYPES): Update value.
8355 (N_TUNE_TYPES): Update value.
8356 (CPU_LA664): New macro.
8357 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
8358 (isa_base_compat_p): Likewise.
8359 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
8360 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
8361 (TARGET_uARCH_LA664): Define macro.
8362 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
8363 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
8365 * config/loongarch/loongarch.opt: Regenerate.
8367 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
8368 Xi Ruoyao <xry111@xry111.site>
8370 * config.in: Regenerate.
8371 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
8372 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
8373 If binutils supports call36, the function call is not split over expand.
8374 * config/loongarch/loongarch.md: Add call36 generation code.
8375 * config/loongarch/predicates.md: Likewise.
8376 * configure: Regenerate.
8377 * configure.ac: Check whether binutils supports call36.
8379 2023-11-18 David Malcolm <dmalcolm@redhat.com>
8382 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
8383 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
8384 -Wanalyzer-infinite-loop. Add missing CWE link for
8385 -Wanalyzer-infinite-recursion.
8386 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
8388 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
8390 PR middle-end/112406
8391 PR middle-end/112552
8392 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
8393 vectype for mask operand.
8395 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8398 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
8399 gsi_remove, change the way of passing fallthrough stmt at the end
8400 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
8401 with GF_CALL_NOTHROW flag.
8402 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
8403 don't test wi.callback_result, instead check whether first
8404 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
8406 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
8407 after the flag has been used.
8408 * internal-fn.def (FALLTHROUGH): Mention in comment the special
8409 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
8411 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8413 PR tree-optimization/112566
8414 PR tree-optimization/83171
8415 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
8416 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
8418 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
8419 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
8421 2023-11-17 Jakub Jelinek <jakub@redhat.com>
8423 PR tree-optimization/112374
8424 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
8425 special case only if op_use_stmt == use_stmt, use as_a rather than
8426 dyn_cast in that case.
8428 2023-11-17 Richard Biener <rguenther@suse.de>
8431 2023-11-14 Richard Biener <rguenther@suse.de>
8433 PR tree-optimization/112281
8434 * tree-loop-distribution.cc (pg_add_dependence_edges):
8435 Preserve stmt order when the innermost loop has exact
8438 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
8441 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
8442 Only return some .progmem*.data section if the user did not
8443 specify a section attribute.
8444 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
8445 in returned section flags.
8447 2023-11-17 Xi Ruoyao <xry111@xry111.site>
8449 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
8450 be an reg_or_vector_same_val_operand. If it's a const vector
8451 with same negative elements, expand the copysign with a bitset
8452 instruction. Otherwise, force it into an register.
8453 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
8455 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
8458 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
8460 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
8463 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
8464 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
8465 insn sequence for V16QImode equality compare.
8466 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
8467 (STORE_MAX_PIECES): Define.
8469 2023-11-17 Li Wei <liwei@loongson.cn>
8471 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
8473 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
8475 2023-11-17 Richard Biener <rguenther@suse.de>
8477 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
8478 a self-ref DW_AT_abstract_origin or DW_AT_specification.
8480 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
8482 * config/loongarch/loongarch.cc
8483 (loongarch_builtin_vectorization_cost): Adjust.
8485 2023-11-16 Andrew Pinski <pinskia@gmail.com>
8487 PR rtl-optimization/112483
8488 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
8489 Call simplify_unary_operation for NEG instead of
8492 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
8495 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
8497 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
8500 * config/i386/i386.md (*addqi_ext2<mode>_0):
8501 New define_insn_and_split pattern.
8502 (*subqi_ext2<mode>_0): Ditto.
8503 (*<code>qi_ext2<mode>_0): Ditto.
8505 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
8507 PR rtl-optimization/112415
8508 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
8509 displacements before reload. Simplify logic flow. Revise
8511 * config/pa/pa.h (TARGET_ELF64): New define.
8512 (INT14_OK_STRICT): Update define and comment.
8513 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
8514 * config/pa/predicates.md (base14_operand): Don't check
8515 alignment of short displacements.
8516 (integer_store_memory_operand): Don't return true when
8517 reload_in_progress is true. Remove INT_5_BITS check.
8518 (floating_point_store_memory_operand): Don't return true when
8519 reload_in_progress is true. Use INT14_OK_STRICT to check
8520 whether long displacements are always okay.
8522 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
8525 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
8526 Fix generation of invalid RTX in split pattern.
8528 2023-11-16 David Malcolm <dmalcolm@redhat.com>
8530 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
8532 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
8533 move of m_lang_mask.
8534 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
8535 (diagnostic_context::get_lang_mask): New.
8536 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
8537 thus making private.
8538 * lto-wrapper.cc (main): Update for new lang_mask param of
8540 * toplev.cc (init_asm_output): Use get_lang_mask.
8541 (general_init): Move initialization of global_dc's lang_mask to
8542 new lang_mask param of set_option_hooks.
8544 2023-11-16 Tamar Christina <tamar.christina@arm.com>
8546 PR tree-optimization/111878
8547 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
8550 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
8552 * config.gcc (riscv): Add riscv-target-attr.o.
8553 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
8554 (riscv_option_valid_attribute_p): New.
8555 (riscv_override_options_internal): New.
8556 (struct riscv_tune_info): New.
8557 (riscv_parse_tune): New.
8558 * config/riscv/riscv-target-attr.cc
8559 (class riscv_target_attr_parser): New.
8560 (struct riscv_attribute_info): New.
8561 (riscv_attributes): New.
8562 (riscv_target_attr_parser::parse_arch): New.
8563 (riscv_target_attr_parser::handle_arch): New.
8564 (riscv_target_attr_parser::handle_cpu): New.
8565 (riscv_target_attr_parser::handle_tune): New.
8566 (riscv_target_attr_parser::update_settings): New.
8567 (riscv_process_one_target_attr): New.
8568 (num_occurences_in_str): New.
8569 (riscv_process_target_attr): New.
8570 (riscv_option_valid_attribute_p): New.
8571 * config/riscv/riscv.cc: Include target-globals.h and
8573 (struct riscv_tune_info): Move to riscv-protos.h.
8574 (get_tune_str): New.
8575 (riscv_parse_tune): New parameter null_p.
8576 (riscv_declare_function_size): New.
8577 (riscv_option_override): Build target_option_default_node and
8578 target_option_current_node.
8579 (riscv_save_restore_target_globals): New.
8580 (riscv_option_restore): New.
8581 (riscv_previous_fndecl): New.
8582 (riscv_set_current_function): Apply the target attribute.
8583 (TARGET_OPTION_RESTORE): Define.
8584 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
8585 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
8586 (ASM_DECLARE_FUNCTION_SIZE) Define.
8587 * config/riscv/riscv.opt (mtune=): Add Save attribute.
8590 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
8591 * doc/extend.texi: Add doc for target attribute.
8593 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
8596 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
8599 2023-11-16 liuhongt <hongtao.liu@intel.com>
8602 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
8605 2023-11-16 Jakub Jelinek <jakub@redhat.com>
8608 * config/i386/i386.md
8609 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
8610 Verify in define_peephole2 that operands[2] dies or is overwritten
8611 at the end of multiplication.
8613 2023-11-16 Jakub Jelinek <jakub@redhat.com>
8615 PR tree-optimization/112536
8616 * tree-vect-slp.cc (arg0_map): New variable.
8617 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
8619 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8621 PR middle-end/112554
8622 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
8623 Clear SELECT_VL_P for non-partial vectorization.
8625 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
8627 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
8628 alternative with attr addr gpr16 and "jm" constraint.
8629 (vec_extract_hi_<mode>): Likewise for SF vector modes.
8630 (@vec_extract_hi_<mode>): Likewise.
8631 (*vec_extractv2ti): Likewise.
8632 (vec_set_hi_<mode><mask_name>): Likewise.
8633 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
8636 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8639 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
8640 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
8641 (*subqi_ext<mode>_2_slp): Ditto.
8642 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
8644 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
8646 * common/config/riscv/riscv-common.cc
8647 (riscv_subset_list::parse_std_ext): Emit an error and skip to
8648 the next extension when a non-canonical ordering is detected.
8650 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
8652 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
8653 Revert using the macro CAN_HAVE_LOCATION_P.
8655 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8658 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
8659 local vsetvl info before LCM suggested one.
8660 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
8661 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
8663 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
8665 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
8666 * (riscv_extend_comparands): Call New function on operands.
8668 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8670 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8671 Add "&& " before "reload_completed" in split condition.
8672 (*subqi_ext<mode>_1_slp): Ditto.
8673 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8675 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
8678 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8679 Correct operand numbers in split pattern. Replace !Q constraint
8680 of operand 1 with !qm. Add insn constrain.
8681 (*subqi_ext<mode>_1_slp): Ditto.
8682 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8684 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
8686 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
8687 copy'n'paste-o in '__builtin_nvptx_brev' description.
8689 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
8690 Thomas Schwinge <thomas@codesourcery.com>
8692 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
8693 (bitrev<mode>2): Represent using bitreverse.
8695 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
8696 Andrew Jenner <andrew@codesourcery.com>
8698 * config/gcn/constraints.md: Add "a" AVGPR constraint.
8699 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
8700 (*mov<mode>_4reg): Likewise.
8701 (@mov<mode>_sgprbase): Likewise.
8702 (gather<mode>_insn_1offset<exec>): Likewise.
8703 (gather<mode>_insn_1offset_ds<exec>): Likewise.
8704 (gather<mode>_insn_2offsets<exec>): Likewise.
8705 (scatter<mode>_expr<exec_scatter>): Likewise.
8706 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
8707 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
8708 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
8709 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
8710 (gcn_hard_regno_mode_ok): Likewise.
8711 (gcn_regno_reg_class): Likewise.
8712 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
8713 (gcn_sgpr_move_p): Handle AVGPRs.
8714 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
8715 (gcn_conditional_register_usage): Handle AVGPRs.
8716 (gcn_vgpr_equivalent_register_operand): New function.
8717 (gcn_valid_move_p): Check for validity of AVGPR moves.
8718 (gcn_compute_frame_offsets): Handle AVGPRs.
8719 (gcn_memory_move_cost): Likewise.
8720 (gcn_register_move_cost): Likewise.
8721 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
8722 (gcn_md_reorg): Handle AVGPRs.
8723 (gcn_hsa_declare_function_name): Likewise.
8724 (print_reg): Likewise.
8725 (gcn_dwarf_register_number): Likewise.
8726 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
8727 (AVGPR_REGNO): Define.
8728 (LAST_AVGPR_REG): Define.
8729 (SOFT_ARG_REG): Update.
8730 (FRAME_POINTER_REGNUM): Update.
8731 (DWARF_LINK_REGISTER): Update.
8732 (FIRST_PSEUDO_REGISTER): Update.
8733 (AVGPR_REGNO_P): Define.
8734 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
8735 (REG_CLASS_CONTENTS): Add new register classes and add entries for
8736 AVGPRs to all classes.
8737 (REGISTER_NAMES): Add AVGPRs.
8738 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
8739 (AP_REGNUM, FP_REGNUM): Update.
8740 (define_attr "type"): Add vop3p_mai.
8741 (define_attr "unit"): Handle vop3p_mai.
8742 (define_attr "gcn_version"): Add "cdna2".
8743 (define_attr "enabled"): Handle cdna2.
8744 (*mov<mode>_insn): Add AVGPR alternatives.
8745 (*movti_insn): Likewise.
8746 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
8747 (process_asm): Process avgpr_count.
8748 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
8749 (gcn_avgpr_hard_register_operand): New.
8750 * doc/md.texi: Document the "a" constraint.
8752 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
8754 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
8755 (reload_in<mode>): Delete.
8756 (reload_out<mode>): Delete.
8757 * config/gcn/gcn.cc (CODE_FOR): Delete.
8758 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
8759 (CODE_FOR_OP): Delete.
8760 (get_code_for_##PREFIX): Delete.
8761 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
8763 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8765 * config/s390/t-s390: Generate s390-gen-builtins.h without
8768 2023-11-15 Richard Biener <rguenther@suse.de>
8770 PR tree-optimization/112282
8771 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
8774 2023-11-15 Richard Biener <rguenther@suse.de>
8776 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
8777 we skipped an instance due to -fdbg-cnt.
8779 2023-11-15 Xi Ruoyao <xry111@xry111.site>
8781 * config/loongarch/loongarch.cc
8782 (loongarch_memmodel_needs_release_fence): Remove.
8783 (loongarch_cas_failure_memorder_needs_acquire): New static
8785 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
8787 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
8788 Remove the redundant barrier before the LL instruction, and
8789 emit an acquire barrier on failure if needed by
8791 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
8792 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
8793 before the LL instruction.
8794 (atomic_cas_value_sub_7_<mode>): Likewise.
8795 (atomic_cas_value_and_7_<mode>): Likewise.
8796 (atomic_cas_value_xor_7_<mode>): Likewise.
8797 (atomic_cas_value_or_7_<mode>): Likewise.
8798 (atomic_cas_value_nand_7_<mode>): Likewise.
8799 (atomic_cas_value_exchange_7_<mode>): Likewise.
8801 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8803 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
8804 (expand_vec_init): Add trailing optimization.
8806 2023-11-15 Pan Li <pan2.li@intel.com>
8808 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
8809 Add inner_mode mask arg for mask int mode.
8810 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
8811 to get the good enough vector int mode on precision.
8812 (expand_vector_init_merge_repeating_sequence): Pass required args
8815 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8818 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
8820 2023-11-15 David Malcolm <dmalcolm@redhat.com>
8822 * json.cc (selftest::assert_print_eq): Add "loc" param and use
8824 (ASSERT_PRINT_EQ): New macro.
8825 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
8826 source location of assertion.
8827 (selftest::test_writing_arrays): Likewise.
8828 (selftest::test_writing_float_numbers): Likewise.
8829 (selftest::test_writing_integer_numbers): Likewise.
8830 (selftest::test_writing_strings): Likewise.
8831 (selftest::test_writing_literals): Likewise.
8833 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8836 * doc/invoke.texi (Static Analyzer Options): Add the six
8837 -Wanalyzer-tainted-* warnings. Update documentation of each
8838 warning to reflect removed requirement to use
8839 -fanalyzer-checker=taint. Remove discussion of
8840 -fanalyzer-checker=taint.
8842 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8844 * diagnostic-format-json.cc
8845 (json_output_format::on_end_diagnostic): Update calls to m_context
8846 callbacks to use member functions; tighten up scopes.
8847 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
8849 (sarif_builder::make_reporting_descriptor_object_for_warning):
8851 * diagnostic.cc (diagnostic_context::initialize): Update for
8852 callbacks being moved into m_option_callbacks and being renamed.
8853 (diagnostic_context::set_option_hooks): New.
8854 (diagnostic_option_classifier::classify_diagnostic): Update call
8855 to global_dc->m_option_enabled to use option_enabled_p.
8856 (diagnostic_context::print_option_information): Update calls to
8857 m_context callbacks to use member functions; tighten up scopes.
8858 (diagnostic_context::diagnostic_enabled): Likewise.
8859 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
8860 (diagnostic_make_option_name_cb): New typedef.
8861 (diagnostic_make_option_url_cb): New typedef.
8862 (diagnostic_context::option_enabled_p): New.
8863 (diagnostic_context::make_option_name): New.
8864 (diagnostic_context::make_option_url): New.
8865 (diagnostic_context::set_option_hooks): New decl.
8866 (diagnostic_context::m_option_enabled): Rename to
8867 m_option_enabled_cb and move within m_option_callbacks, using
8869 (diagnostic_context::m_option_state): Move within
8871 (diagnostic_context::m_option_name): Rename to
8872 m_make_option_name_cb and move within m_option_callbacks, using
8874 (diagnostic_context::m_get_option_url): Likewise, renaming to
8875 m_make_option_url_cb.
8876 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
8877 callback to use member function.
8878 (main): Use diagnostic_context::set_option_hooks.
8879 * opts-diagnostic.h (option_name): Make context param const.
8880 (get_option_url): Likewise.
8881 * opts.cc (option_name): Likewise.
8882 (get_option_url): Likewise.
8883 * toplev.cc (general_init): Use
8884 diagnostic_context::set_option_hooks.
8886 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8888 * selftest-diagnostic.cc
8889 (test_diagnostic_context::test_diagnostic_context): Use
8890 diagnostic_start_span.
8891 * tree-diagnostic-path.cc (struct event_range): Likewise.
8893 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8895 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
8896 Update for renaming of text callbacks fields.
8897 * diagnostic.cc (diagnostic_context::initialize): Likewise.
8898 * diagnostic.h (class diagnostic_context): Add "friend" for
8899 accessors to m_text_callbacks.
8900 (diagnostic_context::m_text_callbacks): Make private, and add an
8901 "m_" prefix to field names.
8902 (diagnostic_starter): Convert from macro to inline function.
8903 (diagnostic_start_span): New.
8904 (diagnostic_finalizer): Convert from macro to inline function.
8906 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8908 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
8911 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
8914 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
8915 New define_insn_and_split pattern.
8916 (*subqi_ext<mode>_1_slp): Ditto.
8917 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
8919 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
8922 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
8924 2023-11-14 David Malcolm <dmalcolm@redhat.com>
8926 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
8927 Use m_context's file_cache.
8928 (sarif_builder::maybe_make_artifact_content_object): Likewise.
8929 (sarif_builder::get_source_lines): Likewise.
8930 * diagnostic-show-locus.cc
8931 (exploc_with_display_col::exploc_with_display_col): Add file_cache
8933 (layout::m_file_cache): New field.
8934 (make_range): Add file_cache param.
8935 (selftest::test_layout_range_for_single_point): Create and use a
8936 temporary file_cache.
8937 (selftest::test_layout_range_for_single_line): Likewise.
8938 (selftest::test_layout_range_for_multiple_lines): Likewise.
8939 (layout::layout): Initialize m_file_cache from the context and use it.
8940 (layout::maybe_add_location_range): Use m_file_cache.
8941 (layout::calculate_x_offset_display): Likewise.
8942 (get_affected_range): Add file_cache param.
8943 (get_printed_columns): Likewise.
8944 (line_corrections::line_corrections): Likewwise.
8945 (line_corrections::m_file_cache): New field.
8946 (source_line::source_line): Add file_cache param.
8947 (line_corrections::add_hint): Use m_file_cache.
8948 (layout::print_trailing_fixits): Likewise.
8949 (layout::print_line): Likewise.
8950 (selftest::test_layout_x_offset_display_utf8): Create and use a
8951 temporary file_cache.
8952 (selftest::test_layout_x_offset_display_tab): Likewise.
8953 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
8954 (selftest::test_add_location_if_nearby): Pass global_dc's
8955 file_cache to temp_source_file ctor.
8956 (selftest::test_overlapped_fixit_printing): Create and use a
8957 temporary file_cache.
8958 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
8959 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
8960 * diagnostic.cc (diagnostic_context::initialize): Always create a
8962 (diagnostic_context::initialize_input_context): Assume
8963 m_file_cache has already been created.
8964 (diagnostic_context::create_edit_context): Pass m_file_cache to
8966 (convert_column_unit): Add file_cache param.
8967 (diagnostic_context::converted_column): Use context's file_cache.
8968 (print_parseable_fixits): Add file_cache param.
8969 (diagnostic_context::report_diagnostic): Use context's file_cache.
8970 (selftest::test_print_parseable_fixits_none): Create and use a
8971 temporary file_cache.
8972 (selftest::test_print_parseable_fixits_insert): Likewise.
8973 (selftest::test_print_parseable_fixits_remove): Likewise.
8974 (selftest::test_print_parseable_fixits_replace): Likewise.
8975 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
8977 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
8978 (diagnostic_context::get_file_cache): Convert return type from
8979 pointer to reference.
8980 * edit-context.cc (edited_file::get_file_cache): New.
8981 (edited_file::m_edit_context): New.
8982 (edit_context::edit_context): Add file_cache param.
8983 (edit_context::get_or_insert_file): Pass this to edited_file's
8985 (edited_file::edited_file): Add edit_context param.
8986 (edited_file::print_content): Use get_file_cache.
8987 (edited_file::print_diff_hunk): Likewise.
8988 (edited_file::print_run_of_changed_lines): Likewise.
8989 (edited_file::get_or_insert_line): Likewise.
8990 (edited_file::get_num_lines): Likewise.
8991 (edited_line::edited_line): Pass in file_cache and use it.
8992 (selftest::test_get_content): Create and use a
8993 temporary file_cache.
8994 (selftest::test_applying_fixits_insert_before): Likewise.
8995 (selftest::test_applying_fixits_insert_after): Likewise.
8996 (selftest::test_applying_fixits_insert_after_at_line_end):
8998 (selftest::test_applying_fixits_insert_after_failure): Likewise.
8999 (selftest::test_applying_fixits_insert_containing_newline):
9001 (selftest::test_applying_fixits_growing_replace): Likewise.
9002 (selftest::test_applying_fixits_shrinking_replace): Likewise.
9003 (selftest::test_applying_fixits_replace_containing_newline):
9005 (selftest::test_applying_fixits_remove): Likewise.
9006 (selftest::test_applying_fixits_multiple): Likewise.
9007 (selftest::test_applying_fixits_multiple_lines): Likewise.
9008 (selftest::test_applying_fixits_modernize_named_init): Likewise.
9009 (selftest::test_applying_fixits_modernize_named_init): Likewise.
9010 (selftest::test_applying_fixits_unreadable_file): Likewise.
9011 (selftest::test_applying_fixits_line_out_of_range): Likewise.
9012 (selftest::test_applying_fixits_column_validation): Likewise.
9013 (selftest::test_applying_fixits_column_validation): Likewise.
9014 (selftest::test_applying_fixits_column_validation): Likewise.
9015 (selftest::test_applying_fixits_column_validation): Likewise.
9016 * edit-context.h (edit_context::edit_context): Add file_cache
9018 (edit_context::get_file_cache): New.
9019 (edit_context::m_file_cache): New.
9020 * final.cc: Include "diagnostic.h".
9021 (asm_show_source): Use global_dc's file_cache.
9022 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
9024 (use_new_line): Likewise.
9025 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
9027 * input.cc (diagnostic_file_cache_init): Delete.
9028 (diagnostic_context::file_cache_init): Delete.
9029 (diagnostics_file_cache_forcibly_evict_file): Delete.
9030 (file_cache::missing_trailing_newline_p): New.
9031 (file_cache::evicted_cache_tab_entry): Don't call
9032 diagnostic_file_cache_init.
9033 (location_get_source_line): Delete.
9034 (get_source_text_between): Add file_cache param.
9035 (get_source_file_content): Delete.
9036 (location_missing_trailing_newline): Delete.
9037 (location_compute_display_column): Add file_cache param.
9038 (dump_location_info): Create and use temporary file_cache.
9039 (get_substring_ranges_for_loc): Add file_cache param.
9040 (get_location_within_string): Likewise.
9041 (get_source_range_for_char): Likewise.
9042 (get_num_source_ranges_for_substring): Likewise.
9043 (selftest::test_reading_source_line): Create and use temporary
9045 (selftest::lexer_test::m_file_cache): New field.
9046 (selftest::assert_char_at_range): Use test.m_file_cache.
9047 (selftest::assert_num_substring_ranges): Likewise.
9048 (selftest::assert_has_no_substring_ranges): Likewise.
9049 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
9050 * input.h (class file_cache): New forward decl.
9051 (location_compute_display_column): Add file_cache param.
9052 (location_get_source_line): Delete.
9053 (get_source_text_between): Add file_cache param.
9054 (get_source_file_content): Delete.
9055 (location_missing_trailing_newline): Delete.
9056 (file_cache::missing_trailing_newline_p): New decl.
9057 (diagnostics_file_cache_forcibly_evict_file): Delete.
9058 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
9060 (named_temp_file::~named_temp_file): Optionally evict the file
9061 from the given file_cache.
9062 (temp_source_file::temp_source_file): Add file_cache param.
9063 * selftest.h (class file_cache): New forward decl.
9064 (named_temp_file::named_temp_file): Add file_cache param.
9065 (named_temp_file::m_file_cache): New field.
9066 (temp_source_file::temp_source_file): Add file_cache param.
9067 * substring-locations.h (get_location_within_string): Add
9070 2023-11-14 David Malcolm <dmalcolm@redhat.com>
9072 * diagnostic-format-json.cc: Use type-specific "set_*" functions
9073 of json::object to avoid naked new of json value subclasses.
9074 * diagnostic-format-sarif.cc: Likewise.
9075 * gcov.cc: Likewise.
9076 * json.cc (object::set_string): New.
9077 (object::set_integer): New.
9078 (object::set_float): New.
9079 (object::set_bool): New.
9080 (selftest::test_writing_objects): Use object::set_string.
9081 * json.h (object::set_string): New decl.
9082 (object::set_integer): New decl.
9083 (object::set_float): New decl.
9084 (object::set_bool): New decl.
9085 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
9086 json::object to avoid naked new of json value subclasses.
9087 * timevar.cc: Likewise.
9088 * tree-diagnostic-path.cc: Likewise.
9090 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
9092 PR tree-optimization/112509
9093 * tree-vrp.cc (find_case_label_range): Create range from case labels.
9095 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9097 * config/s390/s390-builtin-types.def: Add/remove types.
9098 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
9099 The type for the offset should be UV4SI instead of V4SF.
9101 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
9104 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
9107 2023-11-14 Richard Biener <rguenther@suse.de>
9109 PR tree-optimization/111233
9110 PR tree-optimization/111652
9111 PR tree-optimization/111727
9112 PR tree-optimization/111838
9113 PR tree-optimization/112113
9114 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
9115 guard code instead of the old guard stmt.
9116 (split_loop): Adjust.
9118 2023-11-14 Richard Biener <rguenther@suse.de>
9120 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
9121 Consider all loops in the nest when looking for
9122 lambda_vector_zerop.
9124 2023-11-14 Richard Biener <rguenther@suse.de>
9126 PR tree-optimization/112281
9127 * tree-loop-distribution.cc (pg_add_dependence_edges):
9128 Preserve stmt order when the innermost loop has exact
9131 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9135 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
9136 operands[1] aka low part of input rather than operands[3] aka high
9137 part of input to output if not the same register.
9139 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
9141 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
9142 * config/s390/s390-builtins.h (s390_builtin_types)
9143 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
9144 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
9145 Add build rule for s390-gen-builtins.h.
9147 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
9149 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
9150 for error_mark_node.
9152 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9155 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
9156 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
9158 * builtins.cc (fold_builtin_bit_query): New function.
9159 (fold_builtin_1): Use it for
9160 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
9161 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
9162 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
9163 (fold_const_call_ss): Handle
9164 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
9165 (fold_const_call_sss): New function.
9166 (fold_const_call_1): Call it for 2 argument functions returning
9167 scalar when passed 2 INTEGER_CSTs.
9168 * genmatch.cc (cmp_operand): For function calls also compare
9169 number of arguments.
9170 (fns_cmp): New function.
9171 (dt_node::gen_kids): Sort fns and generic_fns.
9172 (dt_node::gen_kids_1): Handle fns with the same id but different
9173 number of arguments.
9174 * match.pd (CLZ simplifications): Drop checks for defined behavior
9175 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
9176 (CTZ simplifications): Drop checks for defined behavior at zero,
9177 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
9178 simplifications for IFN_CTZ with 2 arguments.
9179 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
9180 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
9181 one argument. Add variant for matching CLZ with 2 arguments.
9182 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
9183 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
9185 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
9186 and IFN_{PARITY,POPCOUNT} calls.
9187 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
9188 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
9189 assume defined value at zero if the call has 2 arguments and use
9190 second argument value for that case.
9191 (cfn_ctz::fold_range): Similarly.
9192 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
9193 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
9194 set m_op2 in that case.
9195 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
9196 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
9197 use second argument of calls if present, otherwise assume UB at zero,
9198 create 2 argument .CLZ/.CTZ calls if needed.
9199 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
9201 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
9202 .CLZ/.CTZ calls if needed.
9203 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
9204 argument .CTZ calls if needed.
9205 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
9206 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
9208 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
9209 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
9211 2023-11-14 Xi Ruoyao <xry111@xry111.site>
9214 * config/loongarch/genopts/loongarch.opt.in: Add
9215 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
9216 account conditional branch relaxation support status.
9217 * config/loongarch/loongarch.opt: Regenerate.
9218 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
9219 the assembler supports conditional branch relaxation.
9220 * configure: Regenerate.
9221 * config.in: Regenerate. Note that there are some unrelated
9222 changes introduced by r14-5424 (which does not contain a
9223 config.in regeneration).
9224 * config/loongarch/loongarch-opts.h
9225 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
9226 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
9228 (ASM_MRELAX_SPEC): Define.
9229 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
9230 * config/loongarch/loongarch.cc: Take the setting of
9231 -m[no-]relax into account when determining the default of
9233 * doc/invoke.texi: Document -m[no-]relax and
9234 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
9235 value of -mexplicit-relocs=.
9237 2023-11-14 liuhongt <hongtao.liu@intel.com>
9239 PR tree-optimization/112496
9240 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
9241 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
9242 TREE_TYPE (init_expr)).
9244 2023-11-14 Xi Ruoyao <xry111@xry111.site>
9246 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
9248 (mem_thread_fence_1): Emit finer-grained DBAR hints for
9249 different memory models, instead of 0.
9251 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9253 PR middle-end/112511
9254 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
9257 2023-11-14 Jakub Jelinek <jakub@redhat.com>
9258 Hu, Lin1 <lin1.hu@intel.com>
9261 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
9262 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
9263 alternative with just x instead of v constraints and xjm instead of
9264 vm and use vblendps as optimization only with that alternative.
9266 2023-11-14 liuhongt <hongtao.liu@intel.com>
9268 PR tree-optimization/105735
9269 PR tree-optimization/111972
9270 * tree-scalar-evolution.cc
9271 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
9274 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
9276 * configure: Regenerate.
9277 * aclocal.m4: Regenerate.
9278 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
9280 * doc/install.texi: Document new (notable) flags added by the
9281 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
9282 with gettext dependency.
9284 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
9286 * config/i386/i386-expand.h (gen_pushfl): New prototype.
9288 * config/i386/i386-expand.cc (ix86_expand_builtin)
9289 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
9290 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
9291 * config/i386/i386.cc (gen_pushfl): New function.
9293 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
9294 (@pushfl<mode>2): Rename from *pushfl<mode>2.
9295 Rewrite as unspec using UNSPEC_PUSHFL.
9296 (@popfl<mode>1): Rename from *popfl<mode>1.
9297 Rewrite as unspec using UNSPEC_POPFL.
9299 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
9302 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
9304 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
9306 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
9307 equality for REG_EQUAL.
9309 2023-11-13 Richard Biener <rguenther@suse.de>
9311 PR tree-optimization/112495
9312 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
9313 between different address spaces.
9315 2023-11-13 Richard Biener <rguenther@suse.de>
9317 PR middle-end/112487
9318 * tree-inline.cc (setup_one_parameter): When the parameter
9319 is unused only insert a debug bind when there's not a gross
9320 mismatch in value and declared parameter type. Do not assert
9321 there effectively isn't.
9323 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9325 * config/riscv/riscv-v.cc
9326 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
9327 (expand_vector_init_merge_combine_sequence): Ditto.
9328 (expand_vec_init): Adapt for new optimization.
9330 2023-11-13 liuhongt <hongtao.liu@intel.com>
9332 * config/i386/i386-expand.cc
9333 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
9335 (ix86_expand_vector_init_one_nonzero): Ditto.
9336 (ix86_expand_vector_init_one_var): Ditto.
9337 (ix86_expand_vector_init_general): Ditto.
9338 (ix86_expand_vector_set_var): Ditto.
9339 (ix86_expand_vector_set): Ditto.
9340 (ix86_expand_vector_extract): Ditto.
9341 * config/i386/mmx.md
9342 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
9343 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
9344 x, x), add a new define_split after the pattern.
9345 (*mmx_pextrw<mode>): New define_insn.
9346 (mmx_pshufw_1): Rename to ..
9347 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
9348 (*mmx_pblendw64): Extend to V4FI_64.
9349 (*vec_dup<mode>): New define_insn.
9350 (vec_setv4hi): Rename to ..
9351 (vec_set<mode>): .. this, and extend to V4FI_64
9352 (vec_extractv4hihi): Rename to ..
9353 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
9355 (vec_init<mode><mmxscalarmodelower>): New define_insn.
9356 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
9357 x, x), and add a new define_split after it.
9358 (*pextrw<mode>): New define_insn.
9359 (vec_setv2hi): Rename to ..
9360 (vec_set<mode>): .. this, extend to V2FI_32.
9361 (vec_extractv2hihi): Rename to ..
9362 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
9364 (*punpckwd): Extend to V2FI_32.
9365 (*pshufw_1): Rename to ..
9366 (*pshufw<mode>_1): .. this, extend to V2FI_32.
9367 (vec_initv2hihi): Rename to ..
9368 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
9370 (*vec_dup<mode>): New define_insn.
9371 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
9374 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9376 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
9377 represents the carry flag being set if the operand is non-zero.
9378 (adc_f): New define_insn representing adc with updated flags.
9379 (ashrdi3): New define_expand that only handles shifts by 1.
9380 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
9381 (lshrdi3): New define_expand that only handles shifts by 1.
9382 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
9383 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
9384 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
9385 (rotldi3): New define_expand that only handles rotates by 1.
9386 (rotldi3_cnt1): New pre-reload define_insn_and_split.
9387 (rotrdi3): New define_expand that only handles rotates by 1.
9388 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
9389 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
9390 (ashrsi3_cnt1_carry): New define_insn for asr.f.
9391 (btst_0_carry): New define_insn for asr.f without result.
9393 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9395 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
9397 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
9398 into a rotate. Evaluate ARC_BUILTIN_NORM and
9399 ARC_BUILTIN_NORMW of constant arguments.
9400 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
9401 (normw): Make output template/assembler whitespace consistent.
9402 (swap): Remove define_insn, only use of SWAP UNSPEC.
9403 * config/arc/builtins.def: Tweak indentation.
9404 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
9406 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
9408 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
9409 define_insn_and_split to optimize register usage of doubleword
9410 right shifts followed by truncation.
9412 2023-11-13 Jakub Jelinek <jakub@redhat.com>
9414 * config/i386/constraints.md: Remove j constraint letter from list of
9417 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9419 PR rtl-optimization/112483
9420 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
9421 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
9423 2023-11-13 Jakub Jelinek <jakub@redhat.com>
9425 PR tree-optimization/111967
9426 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
9427 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
9428 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
9429 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
9430 m_ssa_ranges.length () rather than num_ssa_names.
9432 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9434 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
9436 (ST_ANY): New mode iterator.
9437 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
9438 ST_ANY instead of QHWD for applicable patterns.
9440 2023-11-13 Xi Ruoyao <xry111@xry111.site>
9443 * config/loongarch/loongarch.cc
9444 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
9445 instead of gen_rtx_SUBREG.
9447 2023-11-13 Pan Li <pan2.li@intel.com>
9449 * config/riscv/autovec.md: Add bridge mode to lrint and lround
9451 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
9452 bridge machine mode.
9453 (expand_vec_lround): Ditto.
9454 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
9455 func impl to emit vfwcvt.f.f.
9456 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
9457 with the bridge mode.
9458 (expand_vec_lrint): Reorder the args.
9459 (expand_vec_lround): Ditto.
9460 (expand_vec_lceil): Ditto.
9461 (expand_vec_lfloor): Ditto.
9462 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
9463 mode for converting to DI.
9465 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
9468 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
9470 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
9471 (prune_ready_list): USE or CLOBBER should delay execution
9472 if it starts a new live range.
9474 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
9476 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
9477 Remove alternative 0.
9479 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
9481 * ipa-cp.cc (print_ipcp_constant_value): Move to...
9482 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
9484 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
9485 (ipa_print_node_jump_functions_for_edge): Call the function
9486 ipa_print_constant_value to print IPA_JF_CONST elements.
9488 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
9490 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
9491 (prune_ready_list): USE or CLOBBER should delay execution
9492 if it starts a new live range.
9494 2023-11-11 Jakub Jelinek <jakub@redhat.com>
9496 PR middle-end/112430
9497 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
9498 order they were pushed rather than in reverse order. Call
9499 release_defs after gsi_remove.
9501 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9503 * target.def (mode_switching.backprop): New hook.
9504 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
9505 * doc/tm.texi: Regenerate.
9506 * mode-switching.cc (struct bb_info): Add single_succ.
9507 (confluence_info): Add transp field.
9508 (single_succ_confluence_n, single_succ_transfer): New functions.
9509 (backprop_confluence_n, backprop_transfer): Likewise.
9510 (optimize_mode_switching): Use them. Push mode transitions onto
9511 a block's incoming edges, if the backprop hook requires it.
9513 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9515 * target.def (mode_switching.confluence): New hook.
9516 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
9517 * doc/tm.texi.in: Regenerate.
9518 * mode-switching.cc (confluence_info): New variable.
9519 (mode_confluence, forward_confluence_n, forward_transfer): New
9521 (optimize_mode_switching): Use them to calculate mode_in when
9522 TARGET_MODE_CONFLUENCE is defined.
9524 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9526 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
9528 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9530 * target.def (mode_switching.after): Add a regs_live parameter.
9531 * doc/tm.texi: Regenerate.
9532 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
9534 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
9535 (epiphany_mode_after): Likewise.
9536 * config/i386/i386.cc (ix86_mode_after): Likewise.
9537 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
9538 * config/sh/sh.cc (sh_mode_after): Likewise.
9539 * mode-switching.cc (optimize_mode_switching): Likewise.
9541 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9543 * target.def (mode_switching.needed): Add a regs_live parameter.
9544 * doc/tm.texi: Regenerate.
9545 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
9547 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
9548 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
9549 * config/i386/i386.cc (ix86_mode_needed): Likewise.
9550 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
9551 * config/sh/sh.cc (sh_mode_needed): Likewise.
9552 * mode-switching.cc (optimize_mode_switching): Likewise.
9553 (create_pre_exit): Likewise, using the DF simulate functions
9554 to calculate the required information.
9556 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9558 * target.def (mode_switching.eh_handler): New hook.
9559 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
9560 * doc/tm.texi: Regenerate.
9561 * mode-switching.cc (optimize_mode_switching): Use eh_handler
9562 to get the mode on entry to an exception handler.
9564 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9566 * mode-switching.cc (optimize_mode_switching): Mark the exit
9567 block as nontransparent if it requires a specific mode.
9568 Handle the entry and exit mode as sibling rather than nested
9569 concepts. Remove outdated comment.
9571 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9573 * mode-switching.cc (optimize_mode_switching): Initially
9574 compute transparency in a bit-per-block bitmap.
9576 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9578 * mode-switching.cc (seginfo): Add a prev_mode field.
9579 (new_seginfo): Take and initialize the prev_mode.
9580 (optimize_mode_switching): Update calls accordingly.
9581 Use the recorded modes during the emit phase, rather than
9582 computing one on the fly.
9584 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9586 * mode-switching.cc (add_seginfo): Replace head pointer with
9587 a pointer to the tail pointer.
9588 (optimize_mode_switching): Update calls accordingly.
9590 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9592 * mode-switching.cc (optimize_mode_switching): Call
9593 df_note_add_problem.
9595 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
9597 * target.def: Tweak documentation of mode-switching hooks.
9598 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
9599 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
9600 * doc/tm.texi: Regenerate.
9602 2023-11-11 Martin Uecker <uecker@tugraz.at>
9606 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
9607 remove warning for parameters declared with `static`.
9609 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
9611 * doc/sourcebuild.texi (Scan the assembly output): Document change.
9613 2023-11-10 Mao <sray@live.com>
9615 PR middle-end/110983
9616 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
9618 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
9620 * config/riscv/riscv.md (length): Fix indentation for branch and
9621 jump length calculation expressions.
9623 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
9625 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
9626 Deal with nonempty constant CONSTRUCTORs.
9627 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
9628 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
9630 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
9633 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
9634 (equiv_can_be_consumed_p): Use it.
9636 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
9638 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
9639 include other iterators.
9640 * doc/md.texi: Document the change.
9641 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
9642 the iterator that is being duplicated, rather than reproducing it.
9643 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
9644 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
9645 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
9646 the individual D and Q iterators.
9648 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
9650 * config/i386/i386.md (stack_protect_set_1 peephole2):
9651 Explicitly check operand 2 for word_mode.
9652 (stack_protect_set_1 peephole2 #2): Ditto.
9653 (stack_protect_set_2 peephole2): Ditto.
9654 (stack_protect_set_3 peephole2): Ditto.
9655 (*stack_protect_set_4z_<mode>_di): New insn patter.
9656 (*stack_protect_set_4s_<mode>_di): Ditto.
9657 (stack_protect_set_4 peephole2): New peephole2 pattern to
9658 substitute stack protector scratch register clear with unrelated
9659 register initialization involving zero/sign-extend instruction.
9661 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
9663 * config/i386/i386.md (shift): Use SAL insted of SLL
9664 for ashift insn mnemonic.
9666 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9668 PR tree-optimization/112438
9669 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
9670 LOOP_VINFO_USING_SELECT_VL_P.
9672 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9674 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9675 * config/riscv/riscv-v.cc
9676 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
9677 (expand_vector_init_slideup_combine_sequence): Ditto.
9678 (expand_vec_init): Add slideup combine optimization.
9680 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
9682 PR tree-optimization/112464
9683 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
9684 vect_orig_stmt on scalar_dest_def_info.
9686 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
9688 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
9689 operation before the XTheadMemPair.
9691 2023-11-10 Richard Biener <rguenther@suse.de>
9693 PR tree-optimization/110221
9694 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
9695 masking / len is applied make sure to not schedule
9696 intenal defs outside of the loop.
9698 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9700 * expr.cc (store_constructor): Add "and" operation to uniform mask
9703 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9706 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
9707 and switch to the new format.
9708 (add<mode>3_dup<exec_clobber>): Likewise.
9709 (add<mode>3_vcc<exec_vcc>): Likewise.
9710 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
9711 (add<mode>3_vcc_zext_dup): Likewise.
9712 (add<mode>3_vcc_zext_dup_exec): Likewise.
9713 (add<mode>3_vcc_zext_dup2): Likewise.
9714 (add<mode>3_vcc_zext_dup2_exec): Likewise.
9716 2023-11-10 Richard Biener <rguenther@suse.de>
9718 PR middle-end/112469
9719 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
9720 missing view_converts.
9722 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
9724 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
9725 min/max instructions.
9727 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
9729 * config/loongarch/lsx.md: Fix instruction name typo in
9730 lsx_vreplgr2vr_<lsxfmt_f> template.
9732 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9734 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
9736 2023-11-10 Pan Li <pan2.li@intel.com>
9739 2023-11-10 Pan Li <pan2.li@intel.com>
9740 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
9741 New fun impl to expand the insn when trailing same elements.
9742 (expand_vec_init): Try trailing same elements when vec_init.
9744 2023-11-10 Pan Li <pan2.li@intel.com>
9746 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
9747 New fun impl to expand the insn when trailing same elements.
9748 (expand_vec_init): Try trailing same elements when vec_init.
9750 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9752 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
9753 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
9755 2023-11-10 Pan Li <pan2.li@intel.com>
9758 * internal-fn.def (LRINT): Add FLOATN support.
9763 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
9765 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
9766 added patterns for H8/SX.
9767 (single bit zero_extract): New patterns.
9769 2023-11-10 liuhongt <hongtao.liu@intel.com>
9772 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
9773 from LT to GT since there's not in the pattern.
9774 (*avx2_pcmp<mode>3_5): Ditto.
9776 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
9778 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
9779 to force emitting register names using the wN form.
9780 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
9781 always use wN written form in pseudo-C assembly syntax.
9783 2023-11-09 David Malcolm <dmalcolm@redhat.com>
9785 * diagnostic-show-locus.cc (layout::m_line_table): New field.
9786 (compatible_locations_p): Convert to...
9787 (layout::compatible_locations_p): ...this, replacing uses of
9788 line_table global with m_line_table.
9789 (layout::layout): Convert "richloc" param from a pointer to a
9790 const reference. Initialize m_line_table member.
9791 (layout::maybe_add_location_range): Replace uses of line_table
9792 global with m_line_table. Pass the latter to
9793 linemap_client_expand_location_to_spelling_point.
9794 (layout::print_leading_fixits): Pass m_line_table to
9796 (layout::print_trailing_fixits): Likewise.
9797 (gcc_rich_location::add_location_if_nearby): Update for change
9798 to layout ctor params.
9799 (diagnostic_show_locus): Convert to...
9800 (diagnostic_context::maybe_show_locus): ...this, converting
9801 richloc param from a pointer to a const reference. Make "loc"
9802 const. Split out printing part of function to...
9803 (diagnostic_context::show_locus): ...this.
9804 (selftest::test_offset_impl): Update for change to layout ctor
9806 (selftest::test_layout_x_offset_display_utf8): Likewise.
9807 (selftest::test_layout_x_offset_display_tab): Likewise.
9808 (selftest::test_tab_expansion): Likewise.
9809 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
9810 (diagnostic_context::show_locus): New decl.
9811 (diagnostic_show_locus): Convert from a decl to an inline function.
9812 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
9813 on diagnostic_show_locus to one on
9814 diagnostic_context::maybe_show_locus.
9815 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
9816 Add "set" param and use it in place of line_table global.
9817 * input.cc (expand_location_1): Likewise.
9818 (expand_location): Update for new param of expand_location_1.
9819 (expand_location_to_spelling_point): Likewise.
9820 (linemap_client_expand_location_to_spelling_point): Add "set"
9821 param and use it in place of line_table global.
9822 * tree-diagnostic-path.cc (event_range::print): Pass line_table
9823 for new param of linemap_client_expand_location_to_spelling_point.
9825 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
9827 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
9828 Use W mode iterator instead of SWI48. Output MOV instead of XOR
9829 for TARGET_USE_MOV0.
9830 (stack_protect_set_1 peephole2): Use integer modes with
9831 mode size <= word mode size for operand 3.
9832 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
9833 substitute stack protector scratch register clear with unrelated
9834 register initialization, originally in front of stack
9836 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
9837 (stack_protect_set_1 peephole2): New peephole2 pattern to
9838 substitute stack protector scratch register clear with unrelated
9839 register initialization involving LEA instruction.
9841 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
9843 PR rtl-optimization/110215
9844 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
9846 (process_bb_node_lives): Use it.
9848 2023-11-09 Alexandre Oliva <oliva@adacore.com>
9850 * config/i386/i386.cc (symbolic_base_address_p,
9851 base_address_p): New, factored out from...
9852 (extract_base_offset_in_addr): ... here and extended to
9853 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
9854 and sse2-store-multi.c with PIE enabled by default.
9856 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9858 PR tree-optimization/109154
9859 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
9861 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9863 PR tree-optimization/109154
9864 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
9866 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
9867 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
9869 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9871 PR tree-optimization/109154
9872 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
9873 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
9874 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
9876 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9878 PR tree-optimization/109154
9879 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
9880 *movdi_aarch64): Add new w -> Z case.
9881 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
9883 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9885 PR tree-optimization/109154
9886 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
9887 aarch64_maybe_generate_simd_constant): New.
9888 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
9889 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
9890 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
9892 (aarch64_simd_special_constant_p,
9893 aarch64_maybe_generate_simd_constant): New.
9894 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
9896 * config/aarch64/constraints.md (Dx): new.
9898 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9900 PR tree-optimization/109154
9901 * internal-fn.def (COPYSIGN): New.
9902 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
9904 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
9906 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9908 PR tree-optimization/109154
9909 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
9911 2023-11-09 Tamar Christina <tamar.christina@arm.com>
9913 PR tree-optimization/109154
9914 * match.pd: expand existing copysign optimizations.
9916 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
9919 * collect2.cc (main): Do not prepend target triple to
9922 2023-11-09 Richard Biener <rguenther@suse.de>
9924 PR tree-optimization/111133
9925 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
9926 Remove and refactor to ...
9927 (vect_build_one_scatter_store_call): ... this new function.
9928 (vectorizable_store): Use vect_check_scalar_mask to record
9929 the SLP node for the mask operand. Code generate scatters
9930 with builtin decls from the main scatter vectorization
9931 path and prepare that for SLP.
9932 * tree-vect-slp.cc (vect_get_operand_map): Do not look
9933 at the VDEF to decide between scatter or gather since that
9934 doesn't work for patterns. Use the LHS being an SSA_NAME
9937 2023-11-09 Pan Li <pan2.li@intel.com>
9939 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
9940 perform once emit when at least one succ edge is abnormal.
9942 2023-11-09 Richard Biener <rguenther@suse.de>
9944 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
9945 Check we have integer mode masks as required by
9948 2023-11-09 Richard Biener <rguenther@suse.de>
9950 PR tree-optimization/112444
9951 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
9952 defs as undefined vals.
9954 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
9956 * config/mips/mips.cc(mips_option_override): Set mips_abs to
9957 2008, if mips_abs is default and mips_nan is 2008.
9959 2023-11-09 Florian Weimer <fweimer@redhat.com>
9961 * doc/invoke.texi (Warning Options): Document
9962 -Wreturn-mismatch. Update -Wreturn-type documentation.
9964 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9966 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
9967 * config/s390/vector.md (eltswapv16qi): New expander.
9968 (*eltswapv16qi): New insn and splitter.
9969 (eltswapv8hi): New insn and splitter.
9970 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
9972 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
9973 (*eltswapv16qi): Remove.
9974 (*eltswap<mode>): Remove.
9975 (*eltswap<mode>_emu): Remove.
9977 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9979 * config/s390/s390.cc (expand_perm_with_rot): Remove.
9980 (expand_perm_reverse_elements): New.
9981 (expand_perm_with_vster): Remove.
9982 (expand_perm_with_vstbrq): Remove.
9983 (vectorize_vec_perm_const_1): Replace removed functions with new
9986 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9988 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
9989 where vmr{l,h} are still applicable if the operands are swapped.
9990 (expand_perm_with_vpdi): Likewise for vpdi.
9992 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9994 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
9995 (gf): Add float mappings.
9996 (TOINT, toint): New attribute.
9997 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
9999 (*fixuns_trunc<mode><toint>2_z13): Add.
10000 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
10002 (*fix_trunc<mode><toint>2_bfp_z13): Add.
10003 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
10004 (*floatuns<toint><mode>2_z13): Add.
10005 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
10006 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
10007 (float<tointvec><mode>2): Add.
10008 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
10009 (floatuns<tointvec><mode>2): Add.
10010 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
10012 (fix_trunc<mode><tointvec>2): Add.
10013 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
10015 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
10017 2023-11-09 Jakub Jelinek <jakub@redhat.com>
10020 * attribs.cc (attribute_ignored_p): Only return true for
10021 attr_namespace_ignored_p if as is NULL.
10022 (decl_attributes): Never add ignored attributes.
10024 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
10026 * config/riscv/bitmanip.md: Avoid the conflict between
10027 zbb and xtheadmemidx in patterns.
10029 2023-11-09 Richard Biener <rguenther@suse.de>
10031 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
10032 to the correct simd_clone_info.
10034 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10036 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
10038 2023-11-09 Alexandre Oliva <oliva@adacore.com>
10040 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
10042 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
10045 * config/i386/i386.md (*add<mode>_1_slp):
10046 Split insn only for unmatched operand 0.
10047 (*sub<mode>_1_slp): Ditto.
10048 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
10049 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
10050 Split insn only for unmatched operand 0.
10051 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
10052 (*one_cmpl<mode>_1_slp): Ditto.
10053 (*ashl<mode>3_1_slp): Ditto.
10054 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
10055 (*<any_rotate:insn><mode>_1_slp): Ditto.
10056 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
10057 alternative 1 and split insn after reload for unmatched operand 0.
10058 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
10059 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
10060 iterator. Redefine as define_insn_and_split. Add alternative 1
10061 and split insn after reload for unmatched operand 0.
10062 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
10063 alternative 1 and split insn after reload for unmatched operand 0.
10064 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
10065 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
10066 any_logic code iterator.
10067 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
10068 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
10069 any_logic code iterator. Redefine as define_insn_and_split. Add
10070 alternative 1 and split insn after reload for unmatched operand 0.
10071 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
10072 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
10073 code iterator. Redefine as define_insn_and_split. Add alternative 1
10074 and split insn after reload for unmatched operand 0.
10075 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
10076 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
10077 any_logic code iterator. Redefine as define_insn_and_split. Add
10078 alternative 1 and split insn after reload for unmatched operand 0.
10079 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
10080 Add alternative 1 and split insn after reload for unmatched operand 0.
10081 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
10082 alternative 1 and split insn after reload for unmatched operand 0.
10083 (*one_cmplqi_ext<mode>_1): Ditto.
10084 (*ashlqi_ext<mode>_1): Ditto.
10085 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
10087 2023-11-08 Richard Biener <rguenther@suse.de>
10089 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
10090 vector gathering for SLP of emulated gathers.
10092 2023-11-08 Richard Biener <rguenther@suse.de>
10094 * tree-vectorizer.h (vect_slp_child_index_for_operand):
10095 Add gatherscatter_p argument.
10096 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
10098 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
10099 argument into an output, also output the SLP node associated
10101 (vectorizable_simd_clone_call): Adjust.
10102 (vectorizable_store): Likewise.
10103 (vectorizable_load): Likewise.
10105 2023-11-08 Richard Biener <rguenther@suse.de>
10107 * tree-vect-stmts.cc (vectorizable_load): Use the correct
10108 vectorized mask operand.
10110 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
10112 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
10113 New combine pattern.
10115 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10117 * config/riscv/riscv-vsetvl.cc: Fix ICE.
10119 2023-11-08 xuli <xuli1@eswincomputing.com>
10121 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
10123 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
10126 * config/i386/constraints.md (jc): New constraint that prohibits
10128 * config/i386/i386.md (*movdi_internal): Change r constraint
10130 (*movti_internal): Likewise.
10132 2023-11-08 Florian Weimer <fweimer@redhat.com>
10134 * doc/invoke.texi (Warning Options): Mention C diagnostics
10137 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10140 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
10142 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
10145 * config/i386/i386.md (avx_noavx512vl): New definition for isa
10147 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
10148 avx_noavx512f to avx_noavx512vl.
10150 2023-11-07 Pan Li <pan2.li@intel.com>
10152 * config/riscv/autovec.md: Remove the size check of lfloor.
10153 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
10154 emit_vec_rounding_to_integer for floor.
10156 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
10158 PR tree-optimization/112361
10160 PR middle-end/112406
10161 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
10162 loop was versioned and only then create COND_OPs.
10163 (predicate_scalar_phi): Do not create COND_OP when not
10165 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
10167 (vectorize_fold_left_reduction): Pass mask to
10168 vect_expand_fold_left.
10170 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
10172 * config/i386/predicates.md ("flags_reg_operand"):
10173 Make predicate special to avoid automatic mode checks.
10175 2023-11-07 Martin Jambor <mjambor@suse.cz>
10177 * configure: Regenerate.
10179 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
10181 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
10183 (output_offload_tables): Write indirect functions.
10184 (input_offload_tables): read indirect functions.
10185 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
10186 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
10187 * omp-offload.cc (offload_ind_funcs): New.
10188 (omp_discover_implicit_declare_target): Add functions marked with
10189 'omp declare target indirect' to indirect functions list.
10190 (omp_finish_file): Add indirect functions to section for offload
10191 indirect functions.
10192 (execute_omp_device_lower): Redirect indirect calls on target by
10193 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
10194 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
10195 indirect functions are present on an accelerator device.
10196 * omp-offload.h (offload_ind_funcs): New.
10197 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
10198 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
10199 (omp_clause_code_name): Likewise.
10200 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
10201 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
10202 section. Count number of indirect functions.
10203 (process_obj): Emit number of indirect functions.
10204 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
10205 (process): Emit offload_ind_func_table in PTX code. Emit indirect
10206 function names and count in image.
10207 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
10208 indirect functions in PTX code with IND_FUNC_MAP.
10210 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
10212 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
10213 attribute syntax supported also in C.
10215 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
10217 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
10218 modifier for SVE registers.
10220 2023-11-07 Joseph Myers <joseph@codesourcery.com>
10222 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
10223 use flag_isoc23 and function_c23_misc.
10224 * config/rl78/rl78.cc (rl78_option_override): Compare
10225 lang_hooks.name with "GNU C23" not "GNU C2X".
10226 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
10227 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
10229 * doc/extend.texi: Likewise.
10230 * doc/invoke.texi: Likewise.
10231 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
10232 against and return "GNU C23" language string instead of "GNU C2X".
10233 * ginclude/float.h: Refer to C23 instead of C2X in comments.
10234 * ginclude/stdint-gcc.h: Likewise.
10235 * glimits.h: Likewise.
10236 * tree.h: Likewise.
10238 2023-11-07 Alexandre Oliva <oliva@adacore.com>
10240 * doc/sourcebuild.texi (opt_mstrict_align): New target.
10242 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
10244 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
10245 New combine pattern.
10246 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
10247 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
10248 (*cond_len_extend<v_double_trunc><mode>): Ditto.
10249 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
10251 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10254 * config/riscv/riscv-avlprop.cc
10255 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
10256 * config/riscv/t-riscv: Add new include.
10258 2023-11-07 Pan Li <pan2.li@intel.com>
10260 * config/riscv/autovec.md: Remove the size check of lceil.l
10261 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
10262 emit_vec_rounding_to_integer for ceil.
10264 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
10266 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
10268 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
10270 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
10272 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10274 * diagnostic-show-locus.cc (class colorizer): Take just a
10275 pretty_printer rather than a diagnostic_context.
10276 (layout::layout): Make context param a const reference,
10277 and pretty_printer param non-optional.
10278 (layout::m_context): Drop field.
10279 (layout::m_options): New field.
10280 (layout::m_colorize_source_p): Drop field.
10281 (layout::m_show_labels_p): Drop field.
10282 (layout::m_show_line_numbers_p): Drop field.
10283 (layout::print_gap_in_line_numbering): Use m_options.
10284 (layout::calculate_line_spans): Likewise.
10285 (layout::calculate_linenum_width): Likewise.
10286 (layout::calculate_x_offset_display): Likewise.
10287 (layout::print_source_line): Likewise.
10288 (layout::start_annotation_line): Likewise.
10289 (layout::print_annotation_line): Likewise.
10290 (layout::print_line): Likewise.
10291 (gcc_rich_location::add_location_if_nearby): Update for changes to
10293 (diagnostic_show_locus): Likewise.
10294 (selftest::test_offset_impl): Likewise.
10295 (selftest::test_layout_x_offset_display_utf8): Likewise.
10296 (selftest::test_layout_x_offset_display_tab): Likewise.
10297 (selftest::test_tab_expansion): Likewise.
10298 * diagnostic.h (diagnostic_context::m_source_printing): Move
10299 declaration of struct outside diagnostic_context as...
10300 (struct diagnostic_source_printing_options)... this.
10302 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10304 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
10306 (diagnostic_option_classifier::push): ...this.
10307 (diagnostic_context::pop_diagnostics): Convert to...
10308 (diagnostic_option_classifier::pop): ...this.
10309 (diagnostic_context::initialize): Move code to...
10310 (diagnostic_option_classifier::init): ...this new function.
10311 (diagnostic_context::finish): Move code to...
10312 (diagnostic_option_classifier::fini): ...this new function.
10313 (diagnostic_context::classify_diagnostic): Convert to...
10314 (diagnostic_option_classifier::classify_diagnostic): ...this.
10315 (diagnostic_context::update_effective_level_from_pragmas): Convert
10317 (diagnostic_option_classifier::update_effective_level_from_pragmas):
10319 (diagnostic_context::diagnostic_enabled): Update for refactoring.
10320 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
10321 (class diagnostic_option_classifier): ...this new class.
10322 (diagnostic_context::option_unspecified_p): Update for move of
10323 fields into m_option_classifier.
10324 (diagnostic_context::classify_diagnostic): Likewise.
10325 (diagnostic_context::push_diagnostics): Likewise.
10326 (diagnostic_context::pop_diagnostics): Likewise.
10327 (diagnostic_context::update_effective_level_from_pragmas): Delete.
10328 (diagnostic_context::m_classify_diagnostic): Move into class
10329 diagnostic_option_classifier.
10330 (diagnostic_context::m_option_classifier): Likewise.
10331 (diagnostic_context::m_classification_history): Likewise.
10332 (diagnostic_context::m_n_classification_history): Likewise.
10333 (diagnostic_context::m_push_list): Likewise.
10334 (diagnostic_context::m_n_push): Likewise.
10335 (diagnostic_context::m_option_classifier): New.
10337 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10339 * diagnostic.cc (diagnostic_context::set_urlifier): New.
10340 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
10341 (diagnostic_context::m_urlifier): Make private.
10342 * gcc.cc (driver::global_initializations): Use set_urlifier rather
10343 than directly setting field.
10344 * toplev.cc (general_init): Likewise.
10346 2023-11-06 David Malcolm <dmalcolm@redhat.com>
10348 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
10349 uses of diagnostic_kind_count with simple field acesss.
10350 (diagnostic_context::report_diagnostic): Likewise.
10351 (diagnostic_text_output_format::~diagnostic_text_output_format):
10352 Replace use of diagnostic_kind_count with
10353 diagnostic_context::diagnostic_count.
10354 * diagnostic.h (diagnostic_kind_count): Delete.
10355 (errorcount): Replace use of diagnostic_kind_count with
10356 diagnostic_context::diagnostic_count.
10357 (warningcount): Likewise.
10358 (werrorcount): Likewise.
10359 (sorrycount): Likewise.
10361 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
10363 * doc/sourcebuild.texi (Other attributes): Document thread_fence
10366 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
10368 * config/i386/constraints.md (Bc): Remove constraint.
10369 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
10370 * config/i386/i386.cc (ix86_memory_address_reg_class):
10371 Do not limit processing to TARGET_APX_EGPR. Exit early for
10372 NULL insn. Do not check recog_data.insn before calling
10373 extract_insn_cached.
10374 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
10375 (ix86_regno_ok_for_insn_base_p): Ditto.
10376 (ix86_insn_index_reg_class): Ditto.
10377 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
10378 Remove insn pattern and corresponding peephole2 pattern.
10379 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
10380 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
10381 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
10382 and corresponding peephole2 pattern.
10383 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
10384 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
10385 (*extzvqi_mem_rex64): Remove insn pattern and
10386 corresponding peephole2 pattern.
10387 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
10388 alternative to (Q,QnBn). Add "addr" attribute.
10389 (*insvqi_1_mem_rex64): Remove insn pattern and
10390 corresponding peephole2 pattern.
10391 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
10392 alternative to (Q,QnBn). Add "addr" attribute.
10393 (@insv<mode>_1): Ditto.
10394 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
10395 alternative to (QBn,0,Q). Add "addr" attribute.
10396 (*subqi_ext<mode>_0): Ditto.
10397 (*andqi_ext<mode>_0): Ditto.
10398 (*<any_or:code>qi_ext<mode>_0): Ditto.
10399 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
10400 alternative to (Q,0,QnBn). Add "addr" attribute.
10401 (*andqi_ext<mode>_1): Ditto.
10402 (*andqi_ext<mode>_1_cc): Ditto.
10403 (*<any_or:code>qi_ext<mode>_1): Ditto.
10404 (*xorqi_ext<mode>_1_cc): Ditto.
10405 * config/i386/predicates.md (nonimm_x64constmem_operand):
10407 (general_x64constmem_operand): Ditto.
10408 (norex_memory_operand): Ditto.
10410 2023-11-06 Joseph Myers <joseph@codesourcery.com>
10413 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
10414 -std=gnu23 instead of -std=c2x and -std=gnu2x.
10415 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
10416 instead of C2x and -std=c2x.
10417 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
10418 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
10419 -std=gnu2x as deprecated aliases. Update descriptions of C23.
10420 * doc/standards.texi (Standards): Describe C23 with C2X as an old
10423 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
10425 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
10427 2023-11-06 Richard Biener <rguenther@suse.de>
10429 PR tree-optimization/112405
10430 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
10431 Properly handle invariant and/or loop mask passing.
10433 2023-11-06 Pan Li <pan2.li@intel.com>
10435 * config/riscv/autovec.md: Remove the size check of lround.
10436 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
10437 emit_vec_rounding_to_integer for round.
10439 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10441 * config/riscv/predicates.md: Adapt predicate.
10442 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
10443 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
10444 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
10445 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
10447 2023-11-06 Richard Biener <rguenther@suse.de>
10449 PR tree-optimization/111950
10450 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
10452 (find_guard_arg): Likewise.
10453 (slpeel_update_phi_nodes_for_guard2): Likewise.
10454 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
10455 slpeel_duplicate_current_defs_from_edges, do not elide
10456 LC-PHIs for invariant values.
10457 (vect_do_peeling): Materialize PHI arguments for the edge
10458 around the epilog from the PHI defs of the main loop exit.
10460 2023-11-06 Richard Biener <rguenther@suse.de>
10462 PR tree-optimization/112404
10463 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
10464 overload with SLP node argument.
10465 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
10466 (vect_check_scalar_mask): Use it.
10467 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
10468 loads also for nodes with children, like .MASK_LOAD.
10469 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
10470 representative for load nodes and check whether it is a grouped
10471 access before looking for load-lanes support.
10473 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
10475 PR tree-optimization/111760
10476 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
10478 * config/riscv/riscv-protos.h (enum insn_type): Add.
10479 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
10480 * doc/md.texi: Add vcond_mask_len.
10481 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
10482 Create VCOND_MASK_LEN when length masking.
10483 * gimple-match.h (gimple_match_op::gimple_match_op): Always
10484 initialize len and bias.
10485 * internal-fn.cc (vec_cond_mask_len_direct): Add.
10486 (direct_vec_cond_mask_len_optab_supported_p): Add.
10487 (internal_fn_len_index): Add VCOND_MASK_LEN.
10488 (internal_fn_mask_index): Ditto.
10489 * internal-fn.def (VCOND_MASK_LEN): New internal function.
10490 * match.pd: Combine unconditional unary, binary and ternary
10491 operations into the respective COND_LEN operations.
10492 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
10494 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
10496 * explow.cc (align_dynamic_address): Do nothing if the required
10497 alignment is a byte.
10499 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
10501 * function.h (get_stack_dynamic_offset): Declare.
10502 * function.cc (get_stack_dynamic_offset): New function,
10504 (get_stack_dynamic_offset): ...here.
10505 * explow.cc (allocate_dynamic_stack_space): Handle calls made
10506 after virtual registers have been instantiated.
10508 2023-11-06 liuhongt <hongtao.liu@intel.com>
10511 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
10512 Avoid generating RTL code when d->testing_p.
10514 2023-11-06 Richard Biener <rguenther@suse.de>
10516 PR tree-optimization/112369
10517 * tree.cc (strip_float_extensions): Use element_precision.
10519 2023-11-06 Richard Biener <rguenther@suse.de>
10521 PR middle-end/112296
10522 * doc/extend.texi (__builtin_constant_p): Clarify that
10523 side-effects are discarded.
10525 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
10528 * config.in: Regenerate.
10529 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
10530 inline asm handling under !HAVE_AS_POWER10_HTM.
10531 * configure: Regenerate.
10532 * configure.ac: Detect assembler support for HTM insns at power10.
10534 2023-11-06 xuli <xuli1@eswincomputing.com>
10535 Pan Li <pan2.li@intel.com>
10537 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
10538 (riscv_register_pragmas): Register the hook.
10539 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
10540 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
10541 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
10542 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
10544 (function_builder::add_function): Add overloaded arg.
10545 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
10546 (function_builder::add_overloaded_function): New API impl.
10547 (registered_function::overloaded_hash): Calculate hash value.
10548 (has_vxrm_or_frm_p): New function impl.
10549 (non_overloaded_registered_function_hasher::hash): Ditto.
10550 (non_overloaded_registered_function_hasher::equal): Ditto.
10551 (handle_pragma_vector): Allocate space for hash table.
10552 (resolve_overloaded_builtin): New function impl.
10553 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
10554 (function_base::may_require_vxrm_p): Ditto.
10556 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10559 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
10560 * config/i386/avx512bf16vlintrin.h: Ditto.
10561 * config/i386/avx512bitalgvlintrin.h: Ditto.
10562 * config/i386/avx512bwintrin.h: Ditto.
10563 * config/i386/avx512dqintrin.h: Ditto.
10564 * config/i386/avx512fintrin.h: Ditto.
10565 * config/i386/avx512fp16intrin.h: Ditto.
10566 * config/i386/avx512fp16vlintrin.h: Ditto.
10567 * config/i386/avx512ifmavlintrin.h: Ditto.
10568 * config/i386/avx512vbmi2vlintrin.h: Ditto.
10569 * config/i386/avx512vbmivlintrin.h: Ditto.
10570 * config/i386/avx512vlbwintrin.h: Ditto.
10571 * config/i386/avx512vldqintrin.h: Ditto.
10572 * config/i386/avx512vlintrin.h: Ditto.
10573 * config/i386/avx512vnnivlintrin.h: Ditto.
10574 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
10575 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
10577 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10579 * config/i386/avx512bf16vlintrin.h
10580 (_mm_avx512_castsi128_ps): New.
10581 (_mm256_avx512_castsi256_ps): Ditto.
10582 (_mm_avx512_slli_epi32): Ditto.
10583 (_mm256_avx512_slli_epi32): Ditto.
10584 (_mm_avx512_cvtepi16_epi32): Ditto.
10585 (_mm256_avx512_cvtepi16_epi32): Ditto.
10586 (__attribute__): Change intrin call.
10587 * config/i386/avx512bwintrin.h
10588 (_mm_avx512_set_epi32): New.
10589 (_mm_avx512_set_epi16): Ditto.
10590 (_mm_avx512_set_epi8): Ditto.
10591 (__attribute__): Change intrin call.
10592 * config/i386/avx512fp16intrin.h: Ditto.
10593 * config/i386/avx512fp16vlintrin.h
10594 (_mm_avx512_set1_ps): New.
10595 (_mm256_avx512_set1_ps): Ditto.
10596 (_mm_avx512_and_si128): Ditto.
10597 (_mm256_avx512_and_si256): Ditto.
10598 (__attribute__): Change intrin call.
10599 * config/i386/avx512vlbwintrin.h
10600 (_mm_avx512_set1_epi32): New.
10601 (_mm_avx512_set1_epi16): Ditto.
10602 (_mm_avx512_set1_epi8): Ditto.
10603 (_mm256_avx512_set_epi16): Ditto.
10604 (_mm256_avx512_set_epi8): Ditto.
10605 (_mm256_avx512_set1_epi16): Ditto.
10606 (_mm256_avx512_set1_epi32): Ditto.
10607 (_mm256_avx512_set1_epi8): Ditto.
10608 (_mm_avx512_max_epi16): Ditto.
10609 (_mm_avx512_min_epi16): Ditto.
10610 (_mm_avx512_max_epu16): Ditto.
10611 (_mm_avx512_min_epu16): Ditto.
10612 (_mm_avx512_max_epi8): Ditto.
10613 (_mm_avx512_min_epi8): Ditto.
10614 (_mm_avx512_max_epu8): Ditto.
10615 (_mm_avx512_min_epu8): Ditto.
10616 (_mm256_avx512_max_epi16): Ditto.
10617 (_mm256_avx512_min_epi16): Ditto.
10618 (_mm256_avx512_max_epu16): Ditto.
10619 (_mm256_avx512_min_epu16): Ditto.
10620 (_mm256_avx512_insertf128_ps): Ditto.
10621 (_mm256_avx512_extractf128_pd): Ditto.
10622 (_mm256_avx512_extracti128_si256): Ditto.
10623 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
10624 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
10625 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
10626 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
10627 (__attribute__): Change intrin call.
10629 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10631 * config/i386/avx512bf16vlintrin.h: Change intrin call.
10632 * config/i386/avx512fintrin.h
10633 (_mm_avx512_undefined_ps): New.
10634 (_mm_avx512_undefined_pd): Ditto.
10635 (__attribute__): Change intrin call.
10636 * config/i386/avx512vbmivlintrin.h: Ditto.
10637 * config/i386/avx512vlbwintrin.h: Ditto.
10638 * config/i386/avx512vldqintrin.h: Ditto.
10639 * config/i386/avx512vlintrin.h
10640 (_mm_avx512_undefined_si128): New.
10641 (_mm256_avx512_undefined_ps): Ditto.
10642 (_mm256_avx512_undefined_pd): Ditto.
10643 (_mm256_avx512_undefined_si256): Ditto.
10644 (__attribute__): Change intrin call.
10646 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
10648 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
10649 * config/i386/avx512dqintrin.h: Ditto.
10650 * config/i386/avx512fintrin.h:
10651 (_mm_avx512_setzero_ps): New.
10652 (_mm_avx512_setzero_pd): Ditto.
10653 (__attribute__): Change intrin call.
10654 * config/i386/avx512fp16intrin.h: Ditto.
10655 * config/i386/avx512fp16vlintrin.h: Ditto.
10656 * config/i386/avx512vbmi2vlintrin.h: Ditto.
10657 * config/i386/avx512vbmivlintrin.h: Ditto.
10658 * config/i386/avx512vlbwintrin.h: Ditto.
10659 * config/i386/avx512vldqintrin.h: Ditto.
10660 * config/i386/avx512vlintrin.h
10661 (_mm_avx512_setzero_si128): New.
10662 (_mm256_avx512_setzero_pd): Ditto.
10663 (_mm256_avx512_setzero_ps): Ditto.
10664 (_mm256_avx512_setzero_si256): Ditto.
10665 (__attribute__): Change intrin call.
10666 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
10667 * config/i386/gfniintrin.h: Ditto.
10669 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
10671 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
10672 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
10673 (REG_CLASS_NAMES): Ditto.
10674 (REG_CLASS_CONTENTS): Ditto.
10675 * config/i386/constraints.md ("R"): Update for rename.
10677 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10679 * mode-switching.cc: Remove unused forward references.
10680 (seginfo): Remove bbnum.
10681 (new_seginfo): Remove associated argument.
10682 (optimize_mode_switching): Update calls accordingly.
10684 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10686 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
10687 invalid [...] operands.
10689 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
10692 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
10693 function, with the core logic extracted from...
10694 (aarch64_can_change_mode_class): ...here. Extend the previous rules
10695 to allow changes between partial SVE modes and other modes if
10696 the other mode is no bigger than an element, and if no other rule
10697 prevents it. Use the aarch64_modes_tieable_p handling of
10698 partial Advanced SIMD structure modes.
10699 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
10700 Allow all vector mode ties that it allows.
10702 2023-11-05 Pan Li <pan2.li@intel.com>
10704 * config/riscv/autovec.md: Remove the size check of lrint.
10705 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
10707 (emit_vec_widden_cvt_x_f): New help emit func impl.
10708 (emit_vec_rounding_to_integer): New func impl to emit the
10709 rounding from FP to integer.
10710 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
10711 * config/riscv/vector.md: Take V_VLSF for vfncvt.
10713 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10715 * config/riscv/vector.md: Fix bug.
10717 2023-11-04 Sergei Trofimovich <siarheit@google.com>
10719 PR bootstrap/112379
10720 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
10723 2023-11-04 Pan Li <pan2.li@intel.com>
10725 * config/riscv/vector-iterators.md: Remove HF modes.
10727 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10729 * diagnostic.cc: Include "pretty-print-urlifier.h".
10730 (diagnostic_context::initialize): Initialize m_urlifier.
10731 (diagnostic_context::finish): Clean up m_urlifier
10732 (diagnostic_report::diagnostic): m_urlifier to pp_format.
10733 * diagnostic.h (diagnostic_context::m_urlifier): New field.
10734 * gcc-urlifier.cc: New file.
10735 * gcc-urlifier.def: New file.
10736 * gcc-urlifier.h: New file.
10737 * gcc.cc: Include "gcc-urlifier.h".
10738 (driver::global_initializations): Initialize global_dc->m_urlifier.
10739 * pretty-print-urlifier.h: New file.
10740 * pretty-print.cc: Include "pretty-print-urlifier.h".
10741 (obstack_append_string): New.
10742 (urlify_quoted_string): New.
10743 (pp_format): Add "urlifier" param and use it to implement optional
10744 urlification of quoted text strings.
10745 (pp_output_formatted_text): Make buffer a const pointer.
10746 (selftest::pp_printf_with_urlifier): New.
10747 (selftest::test_urlification): New.
10748 (selftest::pretty_print_cc_tests): Call it.
10749 * pretty-print.h (class urlifier): New forward declaration.
10750 (pp_format): Add optional urlifier param.
10751 * selftest-run-tests.cc (selftest::run_tests): Call
10752 selftest::gcc_urlifier_cc_tests .
10753 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
10754 * toplev.cc: Include "gcc-urlifier.h".
10755 (general_init): Initialize global_dc->m_urlifier.
10757 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10759 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
10762 2023-11-04 David Malcolm <dmalcolm@redhat.com>
10764 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
10765 to diagnostic-text-art.h.
10766 * coretypes.h (struct diagnostic_context): Replace forward decl
10768 (class diagnostic_context): ...this.
10769 * diagnostic-format-json.cc: Update for changes to
10770 diagnostic_context.
10771 * diagnostic-format-sarif.cc: Likewise.
10772 * diagnostic-show-locus.cc: Likewise.
10773 * diagnostic-text-art.h: Deleted file, moving content...
10774 (enum diagnostic_text_art_charset): ...to diagnostic.h,
10775 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
10776 (diagnostics_text_art_charset_init): ...deleting in favor of
10777 diagnostic_context::set_text_art_charset.
10778 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
10779 (pedantic_warning_kind): Update for field renaming.
10780 (permissive_error_kind): Likewise.
10781 (permissive_error_option): Likewise.
10782 (diagnostic_initialize): Convert to...
10783 (diagnostic_context::initialize): ...this, updating for field
10785 (diagnostic_color_init): Convert to...
10786 (diagnostic_context::color_init): ...this.
10787 (diagnostic_urls_init): Convert to...
10788 (diagnostic_context::urls_init): ...this.
10789 (diagnostic_initialize_input_context): Convert to...
10790 (diagnostic_context::initialize_input_context): ...this.
10791 (diagnostic_finish): Convert to...
10792 (diagnostic_context::finish): ...this, updating for field
10794 (diagnostic_context::set_output_format): New.
10795 (diagnostic_context::set_client_data_hooks): New.
10796 (diagnostic_context::create_edit_context): New.
10797 (diagnostic_converted_column): Convert to...
10798 (diagnostic_context::converted_column): ...this.
10799 (diagnostic_get_location_text): Update for field renaming.
10800 (diagnostic_check_max_errors): Convert to...
10801 (diagnostic_context::check_max_errors): ...this, updating for
10803 (diagnostic_action_after_output): Convert to...
10804 (diagnostic_context::action_after_output): ...this, updating for
10806 (last_module_changed_p): Delete.
10807 (set_last_module): Delete.
10808 (includes_seen): Convert to...
10809 (diagnostic_context::includes_seen_p): ...this, updating for field
10811 (diagnostic_report_current_module): Convert to...
10812 (diagnostic_context::report_current_module): ...this, updating for
10813 field renamings, and replacing uses of last_module_changed_p and
10814 set_last_module to simple field accesses.
10815 (diagnostic_show_any_path): Convert to...
10816 (diagnostic_context::show_any_path): ...this.
10817 (diagnostic_classify_diagnostic): Convert to...
10818 (diagnostic_context::classify_diagnostic): ...this, updating for
10820 (diagnostic_push_diagnostics): Convert to...
10821 (diagnostic_context::push_diagnostics): ...this, updating for field
10823 (diagnostic_pop_diagnostics): Convert to...
10824 (diagnostic_context::pop_diagnostics): ...this, updating for field
10826 (get_any_inlining_info): Convert to...
10827 (diagnostic_context::get_any_inlining_info): ...this, updating for
10829 (update_effective_level_from_pragmas): Convert to...
10830 (diagnostic_context::update_effective_level_from_pragmas):
10831 ...this, updating for field renamings.
10832 (print_any_cwe): Convert to...
10833 (diagnostic_context::print_any_cwe): ...this.
10834 (print_any_rules): Convert to...
10835 (diagnostic_context::print_any_rules): ...this.
10836 (print_option_information): Convert to...
10837 (diagnostic_context::print_option_information): ...this, updating
10838 for field renamings.
10839 (diagnostic_enabled): Convert to...
10840 (diagnostic_context::diagnostic_enabled): ...this, updating for
10842 (warning_enabled_at): Convert to...
10843 (diagnostic_context::warning_enabled_at): ...this.
10844 (diagnostic_report_diagnostic): Convert to...
10845 (diagnostic_context::report_diagnostic): ...this, updating for
10846 field renamings and conversions to member functions.
10847 (diagnostic_append_note): Update for field renaming.
10848 (diagnostic_impl): Use diagnostic_context::report_diagnostic
10850 (diagnostic_n_impl): Likewise.
10851 (diagnostic_emit_diagram): Convert to...
10852 (diagnostic_context::emit_diagram): ...this, updating for field
10854 (error_recursion): Convert to...
10855 (diagnostic_context::error_recursion): ...this.
10856 (diagnostic_text_output_format::~diagnostic_text_output_format):
10858 (diagnostics_text_art_charset_init): Convert to...
10859 (diagnostic_context::set_text_art_charset): ...this.
10860 (assert_location_text): Update for field renamings.
10861 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
10862 diagnostic-text-art.h.
10863 (struct diagnostic_context): Convert to...
10864 (class diagnostic_context): ...this.
10865 (diagnostic_context::ice_handler_callback_t): New typedef.
10866 (diagnostic_context::set_locations_callback_t): New typedef.
10867 (diagnostic_context::initialize): New decl.
10868 (diagnostic_context::color_init): New decl.
10869 (diagnostic_context::urls_init): New decl.
10870 (diagnostic_context::file_cache_init): New decl.
10871 (diagnostic_context::finish): New decl.
10872 (diagnostic_context::set_set_locations_callback): New.
10873 (diagnostic_context::initialize_input_context): New decl.
10874 (diagnostic_context::warning_enabled_at): New decl.
10875 (diagnostic_context::option_unspecified_p): New.
10876 (diagnostic_context::report_diagnostic): New decl.
10877 (diagnostic_context::report_current_module): New decl.
10878 (diagnostic_context::check_max_errors): New decl.
10879 (diagnostic_context::action_after_output): New decl.
10880 (diagnostic_context::classify_diagnostic): New decl.
10881 (diagnostic_context::push_diagnostics): New decl.
10882 (diagnostic_context::pop_diagnostics): New decl.
10883 (diagnostic_context::emit_diagram): New decl.
10884 (diagnostic_context::set_output_format): New decl.
10885 (diagnostic_context::set_text_art_charset): New decl.
10886 (diagnostic_context::set_client_data_hooks): New decl.
10887 (diagnostic_context::create_edit_context): New decl.
10888 (diagnostic_context::set_warning_as_error_requested): New.
10889 (diagnostic_context::set_report_bug): New.
10890 (diagnostic_context::set_extra_output_kind): New.
10891 (diagnostic_context::set_show_cwe): New.
10892 (diagnostic_context::set_show_rules): New.
10893 (diagnostic_context::set_path_format): New.
10894 (diagnostic_context::set_show_path_depths): New.
10895 (diagnostic_context::set_show_option_requested): New.
10896 (diagnostic_context::set_max_errors): New.
10897 (diagnostic_context::set_escape_format): New.
10898 (diagnostic_context::set_ice_handler_callback): New.
10899 (diagnostic_context::warning_as_error_requested_p): New.
10900 (diagnostic_context::show_path_depths_p): New.
10901 (diagnostic_context::get_path_format): New.
10902 (diagnostic_context::get_escape_format): New.
10903 (diagnostic_context::get_file_cache): New.
10904 (diagnostic_context::get_edit_context): New.
10905 (diagnostic_context::get_client_data_hooks): New.
10906 (diagnostic_context::get_diagram_theme): New.
10907 (diagnostic_context::converted_column): New decl.
10908 (diagnostic_context::diagnostic_count): New.
10909 (diagnostic_context::includes_seen_p): New decl.
10910 (diagnostic_context::print_any_cwe): New decl.
10911 (diagnostic_context::print_any_rules): New decl.
10912 (diagnostic_context::print_option_information): New decl.
10913 (diagnostic_context::show_any_path): New decl.
10914 (diagnostic_context::error_recursion): New decl.
10915 (diagnostic_context::diagnostic_enabled): New decl.
10916 (diagnostic_context::get_any_inlining_info): New decl.
10917 (diagnostic_context::update_effective_level_from_pragmas): New
10919 (diagnostic_context::m_file_cache): Make private.
10920 (diagnostic_context::diagnostic_count): Rename to...
10921 (diagnostic_context::m_diagnostic_count): ...this and make
10923 (diagnostic_context::warning_as_error_requested): Rename to...
10924 (diagnostic_context::m_warning_as_error_requested): ...this and
10926 (diagnostic_context::n_opts): Rename to...
10927 (diagnostic_context::m_n_opts): ...this and make private.
10928 (diagnostic_context::classify_diagnostic): Rename to...
10929 (diagnostic_context::m_classify_diagnostic): ...this and make
10931 (diagnostic_context::classification_history): Rename to...
10932 (diagnostic_context::m_classification_history): ...this and make
10934 (diagnostic_context::n_classification_history): Rename to...
10935 (diagnostic_context::m_n_classification_history): ...this and make
10937 (diagnostic_context::push_list): Rename to...
10938 (diagnostic_context::m_push_list): ...this and make private.
10939 (diagnostic_context::n_push): Rename to...
10940 (diagnostic_context::m_n_push): ...this and make private.
10941 (diagnostic_context::show_cwe): Rename to...
10942 (diagnostic_context::m_show_cwe): ...this and make private.
10943 (diagnostic_context::show_rules): Rename to...
10944 (diagnostic_context::m_show_rules): ...this and make private.
10945 (diagnostic_context::path_format): Rename to...
10946 (diagnostic_context::m_path_format): ...this and make private.
10947 (diagnostic_context::show_path_depths): Rename to...
10948 (diagnostic_context::m_show_path_depths): ...this and make
10950 (diagnostic_context::show_option_requested): Rename to...
10951 (diagnostic_context::m_show_option_requested): ...this and make
10953 (diagnostic_context::abort_on_error): Rename to...
10954 (diagnostic_context::m_abort_on_error): ...this.
10955 (diagnostic_context::show_column): Rename to...
10956 (diagnostic_context::m_show_column): ...this.
10957 (diagnostic_context::pedantic_errors): Rename to...
10958 (diagnostic_context::m_pedantic_errors): ...this.
10959 (diagnostic_context::permissive): Rename to...
10960 (diagnostic_context::m_permissive): ...this.
10961 (diagnostic_context::opt_permissive): Rename to...
10962 (diagnostic_context::m_opt_permissive): ...this.
10963 (diagnostic_context::fatal_errors): Rename to...
10964 (diagnostic_context::m_fatal_errors): ...this.
10965 (diagnostic_context::dc_inhibit_warnings): Rename to...
10966 (diagnostic_context::m_inhibit_warnings): ...this.
10967 (diagnostic_context::dc_warn_system_headers): Rename to...
10968 (diagnostic_context::m_warn_system_headers): ...this.
10969 (diagnostic_context::max_errors): Rename to...
10970 (diagnostic_context::m_max_errors): ...this and make private.
10971 (diagnostic_context::internal_error): Rename to...
10972 (diagnostic_context::m_internal_error): ...this.
10973 (diagnostic_context::option_enabled): Rename to...
10974 (diagnostic_context::m_option_enabled): ...this.
10975 (diagnostic_context::option_state): Rename to...
10976 (diagnostic_context::m_option_state): ...this.
10977 (diagnostic_context::option_name): Rename to...
10978 (diagnostic_context::m_option_name): ...this.
10979 (diagnostic_context::get_option_url): Rename to...
10980 (diagnostic_context::m_get_option_url): ...this.
10981 (diagnostic_context::print_path): Rename to...
10982 (diagnostic_context::m_print_path): ...this.
10983 (diagnostic_context::make_json_for_path): Rename to...
10984 (diagnostic_context::m_make_json_for_path): ...this.
10985 (diagnostic_context::x_data): Rename to...
10986 (diagnostic_context::m_client_aux_data): ...this.
10987 (diagnostic_context::last_location): Rename to...
10988 (diagnostic_context::m_last_location): ...this.
10989 (diagnostic_context::last_module): Rename to...
10990 (diagnostic_context::m_last_module): ...this and make private.
10991 (diagnostic_context::lock): Rename to...
10992 (diagnostic_context::m_lock): ...this and make private.
10993 (diagnostic_context::lang_mask): Rename to...
10994 (diagnostic_context::m_lang_mask): ...this.
10995 (diagnostic_context::inhibit_notes_p): Rename to...
10996 (diagnostic_context::m_inhibit_notes_p): ...this.
10997 (diagnostic_context::report_bug): Rename to...
10998 (diagnostic_context::m_report_bug): ...this and make private.
10999 (diagnostic_context::extra_output_kind): Rename to...
11000 (diagnostic_context::m_extra_output_kind): ...this and make
11002 (diagnostic_context::column_unit): Rename to...
11003 (diagnostic_context::m_column_unit): ...this and make private.
11004 (diagnostic_context::column_origin): Rename to...
11005 (diagnostic_context::m_column_origin): ...this and make private.
11006 (diagnostic_context::tabstop): Rename to...
11007 (diagnostic_context::m_tabstop): ...this and make private.
11008 (diagnostic_context::escape_format): Rename to...
11009 (diagnostic_context::m_escape_format): ...this and make private.
11010 (diagnostic_context::edit_context_ptr): Rename to...
11011 (diagnostic_context::m_edit_context_ptr): ...this and make
11013 (diagnostic_context::set_locations_cb): Rename to...
11014 (diagnostic_context::m_set_locations_cb): ...this and make
11016 (diagnostic_context::ice_handler_cb): Rename to...
11017 (diagnostic_context::m_ice_handler_cb): ...this and make private.
11018 (diagnostic_context::includes_seen): Rename to...
11019 (diagnostic_context::m_includes_seen): ...this and make private.
11020 (diagnostic_inhibit_notes): Update for field renaming.
11021 (diagnostic_context_auxiliary_data): Likewise.
11022 (diagnostic_abort_on_error): Convert from macro to inline function
11023 and update for field renaming.
11024 (diagnostic_kind_count): Convert from macro to inline function and
11025 use diagnostic_count accessor.
11026 (diagnostic_report_warnings_p): Update for field renaming.
11027 (diagnostic_initialize): Convert decl to inline function calling
11028 into diagnostic_context.
11029 (diagnostic_color_init): Likewise.
11030 (diagnostic_urls_init): Likewise.
11031 (diagnostic_urls_init): Likewise.
11032 (diagnostic_finish): Likewise.
11033 (diagnostic_report_current_module): Likewise.
11034 (diagnostic_show_any_path): Delete decl.
11035 (diagnostic_initialize_input_context): Convert decl to inline
11036 function calling into diagnostic_context.
11037 (diagnostic_classify_diagnostic): Likewise.
11038 (diagnostic_push_diagnostics): Likewise.
11039 (diagnostic_pop_diagnostics): Likewise.
11040 (diagnostic_report_diagnostic): Likewise.
11041 (diagnostic_action_after_output): Likewise.
11042 (diagnostic_check_max_errors): Likewise.
11043 (diagnostic_file_cache_fini): Delete decl.
11044 (diagnostic_converted_column): Delete decl.
11045 (warning_enabled_at): Convert decl to inline function calling into
11046 diagnostic_context.
11047 (option_unspecified_p): New.
11048 (diagnostic_emit_diagram): Delete decl.
11049 * gcc.cc: Remove include of "diagnostic-text-art.h".
11050 Update for changes to diagnostic_context.
11051 * input.cc (diagnostic_file_cache_init): Move implementation
11053 (diagnostic_context::file_cache_init): ...this new member
11055 (diagnostic_file_cache_fini): Delete.
11056 (diagnostics_file_cache_forcibly_evict_file): Update for
11057 m_file_cache becoming private.
11058 (location_get_source_line): Likewise.
11059 (get_source_file_content): Likewise.
11060 (location_missing_trailing_newline): Likewise.
11061 * input.h (diagnostics_file_cache_fini): Delete.
11062 * langhooks.cc: Update for changes to diagnostic_context.
11063 * lto-wrapper.cc: Likewise.
11064 * opts.cc: Remove include of "diagnostic-text-art.h".
11065 Update for changes to diagnostic_context.
11066 * selftest-diagnostic.cc: Update for changes to
11067 diagnostic_context.
11068 * toplev.cc: Likewise.
11069 * tree-diagnostic-path.cc: Likewise.
11070 * tree-diagnostic.cc: Likewise.
11072 2023-11-03 Martin Uecker <uecker@tugraz.at>
11075 * gimple-ssa-warn-access.cc
11076 (pass_waccess::maybe_check_access_sizes): For VLA bounds
11077 in parameters, only warn about null pointers with 'static'.
11079 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
11081 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
11082 calls to use masked simdclones.
11084 2023-11-03 David Malcolm <dmalcolm@redhat.com>
11086 * diagnostic.cc (diagnostic_initialize): Update for consolidation
11087 of group-based fields.
11088 (diagnostic_report_diagnostic): Likewise.
11089 (diagnostic_context::begin_group): New, based on body of
11090 auto_diagnostic_group's ctor.
11091 (diagnostic_context::end_group): New, based on body of
11092 auto_diagnostic_group's dtor.
11093 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
11095 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
11097 * diagnostic.h (diagnostic_context::begin_group): New decl.
11098 (diagnostic_context::end_group): New decl.
11099 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
11100 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
11102 (diagnostic_context::diagnostic_group_emission_count): Rename
11104 (diagnostic_context::m_diagnostic_groups::m_emission_count):
11107 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
11109 PR tree-optimization/111766
11110 * range-op.cc (operator_equal::fold_range): Check constants
11111 against the bitmask.
11112 (operator_not_equal::fold_range): Ditto.
11113 * value-range.h (irange_bitmask::member_p): New.
11115 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
11117 * value-range.cc (irange_bitmask::adjust_range): New.
11118 (irange::intersect_bitmask): Call adjust_range.
11119 * value-range.h (irange_bitmask::adjust_range): New prototype.
11121 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
11123 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
11125 (ix86_memory_address_reg_class): ... this. Generalize address
11126 register class handling to allow multiple address register classes.
11127 Return maximal class for unrecognized instructions. Improve comments.
11128 (ix86_insn_base_reg_class): Rewrite to handle
11129 multiple address register classes.
11130 (ix86_regno_ok_for_insn_base_p): Ditto.
11131 (ix86_insn_index_reg_class): Ditto.
11132 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
11133 and substitute its values with "0" -> "gpr16", "1" -> "*".
11134 (addr): New attribute to limit allowed address register set.
11136 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
11137 and substitute its values with "0" -> "gpr16", "1" -> "*".
11138 * config/i386/sse.md: Ditto.
11140 2023-11-03 Richard Biener <rguenther@suse.de>
11142 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
11143 LC PHI replacement.
11145 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
11147 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
11148 (adddi3): Change define_expand to generate a *adddi3.
11149 (*adddi3): New define_insn_and_split to lower DImode additions
11150 during the split1 pass (after combine and before reload).
11151 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
11152 for DImode left shifts by a single bit.
11153 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
11154 left shifts by one bit to an *adddi3.
11156 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
11158 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
11159 can_create_pseudo_p condition.
11161 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11163 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
11164 * tree-vect-stmts.cc (vectorizable_load): Ditto.
11166 2023-11-03 Richard Biener <rguenther@suse.de>
11168 PR tree-optimization/112366
11169 * tree-vect-loop.cc (vectorizable_live_operation): Remove
11172 2023-11-03 Richard Biener <rguenther@suse.de>
11174 PR tree-optimization/112310
11175 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
11176 of expressions, validate dependences are contained within
11177 the hoistable set before hoisting.
11179 2023-11-03 Pan Li <pan2.li@intel.com>
11181 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
11182 (lround<mode><v_i_l_ll_convert>2): Ditto.
11183 (lceil<mode><v_i_l_ll_convert>2): Ditto.
11184 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
11185 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
11187 (lround<mode><v_f2si_convert>2): Ditto.
11188 (lceil<mode><v_f2si_convert>2): Ditto.
11189 (lfloor<mode><v_f2si_convert>2): Ditto.
11190 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
11192 (lround<mode><v_f2di_convert>2): Ditto.
11193 (lceil<mode><v_f2di_convert>2): Ditto.
11194 (lfloor<mode><v_f2di_convert>2): Ditto.
11195 * config/riscv/vector-iterators.md: Renew iterators for both
11198 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11201 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
11202 (simplify_replace_vlmax_avl): Ditto.
11203 (pass_avlprop::execute): Add immediate AVL simplification.
11204 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
11205 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
11206 (imm_avl_p): Ditto.
11207 (emit_vlmax_insn): Adapt for new interface name.
11208 * config/riscv/vector.md (mode_idx): New attribute.
11210 2023-11-03 Pan Li <pan2.li@intel.com>
11213 2023-11-02 Pan Li <pan2.li@intel.com>
11215 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
11216 (lround<mode><v_i_l_ll_convert>2): Ditto.
11217 (lceil<mode><v_i_l_ll_convert>2): Ditto.
11218 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
11219 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
11221 (lround<mode><v_f2si_convert>2): Ditto.
11222 (lceil<mode><v_f2si_convert>2): Ditto.
11223 (lfloor<mode><v_f2si_convert>2): Ditto.
11224 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
11226 (lround<mode><v_f2di_convert>2): Ditto.
11227 (lceil<mode><v_f2di_convert>2): Ditto.
11228 (lfloor<mode><v_f2di_convert>2): Ditto.
11229 * config/riscv/vector-iterators.md: Renew iterators for both
11232 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
11234 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
11236 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
11238 * config/h8300/combiner.md: Add new patterns for single bit
11241 2023-11-02 Pan Li <pan2.li@intel.com>
11243 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
11244 (lround<mode><v_i_l_ll_convert>2): Ditto.
11245 (lceil<mode><v_i_l_ll_convert>2): Ditto.
11246 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
11247 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
11249 (lround<mode><v_f2si_convert>2): Ditto.
11250 (lceil<mode><v_f2si_convert>2): Ditto.
11251 (lfloor<mode><v_f2si_convert>2): Ditto.
11252 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
11254 (lround<mode><v_f2di_convert>2): Ditto.
11255 (lceil<mode><v_f2di_convert>2): Ditto.
11256 (lfloor<mode><v_f2di_convert>2): Ditto.
11257 * config/riscv/vector-iterators.md: Renew iterators for both
11260 2023-11-02 Sam James <sam@gentoo.org>
11262 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
11263 as this has become the standard term for what we're doing here.
11265 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11267 * config/riscv/riscv-avlprop.cc
11268 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
11269 non-real insn AVL propation.
11271 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
11273 PR middle-end/111401
11274 * internal-fn.cc (internal_fn_else_index): New function.
11275 * internal-fn.h (internal_fn_else_index): Define.
11276 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
11278 (predicate_scalar_phi): Add whitespace.
11279 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
11280 (neutral_op_for_reduction): Return -0 for PLUS.
11281 (check_reduction_path): Don't count else operand in COND_OP.
11282 (vect_is_simple_reduction): Ditto.
11283 (vect_create_epilog_for_reduction): Fix whitespace.
11284 (vectorize_fold_left_reduction): Add COND_OP handling.
11285 (vectorizable_reduction): Don't count else operand in COND_OP.
11286 (vect_transform_reduction): Add COND_OP handling.
11287 * tree-vectorizer.h (neutral_op_for_reduction): Add default
11290 2023-11-02 Richard Biener <rguenther@suse.de>
11292 PR tree-optimization/112320
11293 * gimple-fold.h (rewrite_to_defined_overflow): New overload
11294 for in-place operation.
11295 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
11296 iterator argument to worker, define separate API for
11297 in-place and not in-place operation.
11298 * tree-if-conv.cc (predicate_statements): Simplify.
11299 * tree-scalar-evolution.cc (final_value_replacement_loop):
11301 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
11302 * tree-ssa-reassoc.cc (update_range_test): Likewise.
11304 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
11306 * config/i386/i386.md: Move stack protector patterns
11307 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
11309 2023-11-02 liuhongt <hongtao.liu@intel.com>
11311 * config/i386/mmx.md (cmlav4hf4): New expander.
11312 (cmla_conjv4hf4): Ditto.
11313 (cmulv4hf3): Ditto.
11314 (cmul_conjv4hf3): Ditto.
11316 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11318 * config/riscv/vector.md: Fix redundant codes in attributes.
11320 2023-11-02 xuli <xuli1@eswincomputing.com>
11322 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
11323 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
11324 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
11325 * config/riscv/riscv-vector-builtins.cc: Add arg types.
11327 2023-11-02 Pan Li <pan2.li@intel.com>
11329 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
11330 size check for vectype_out doesn't participating for optab query.
11331 (vectorizable_call): Remove the type size check.
11333 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11336 * config/riscv/vector.md: Add '0'.
11338 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
11341 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
11342 as operands[2] with predicate register_operand must be !MEM_P.
11343 (peephole2): Optimize a mulx followed by a register-to-register
11344 move, to place result in the correct destination if possible.
11346 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
11348 * config/riscv/sync.md: Use riscv_subword_address function to
11349 calculate the address and shift in atomic_test_and_set.
11351 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
11353 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
11354 returned for libcall case.
11356 2023-11-01 Martin Uecker <uecker@tugraz.at>
11359 * doc/invoke.texi: Document -Walloc-size option.
11361 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
11363 * genautomata.cc (write_automata): move endif
11365 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
11367 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
11368 create return array and don't return new type.
11369 (simd_clone_adjust_argument_types): Hoist out code that creates
11370 ipa_param_body_adjustments and don't return them.
11371 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
11372 argument types have been vectorized, create adjustments and return array
11374 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
11375 argument types have been vectorized.
11377 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
11380 * config/i386/i386.md (stack_protexct_set_2 peephole2):
11381 Use general_gr_operand as operand 4 predicate.
11383 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
11385 * config/i386/i386.md (stack_protect_set): Explicitly
11386 generate scratch register in word mode.
11387 (@stack_protect_set_1_<mode>): Rename to ...
11388 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
11389 Use SWI48 mode iterator to match scratch register.
11390 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
11391 iterators to match peephole sequence. Use general_operand
11392 predicate for operand 4. Allow different operand 2 and operand 3
11393 registers and use peep2_reg_dead_p to ensure new scratch
11394 register is dead before peephole seqeunce. Use peep2_reg_dead_p
11395 to ensure old scratch register is dead after peephole sequence.
11396 (*stack_protect_set_2_<mode>): Rename to ...
11397 (*stack_protect_set_2_<mode>_si): .. this.
11398 (*stack_protect_set_3): Rename to ...
11399 (*stack_protect_set_2_<mode>_di): ... this.
11400 Use PTR mode iterator to match stack protector memory move.
11401 Use earlyclobber for all alternatives of operand 1.
11402 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
11403 iterators to match peephole sequence. Use general_operand
11404 predicate for operand 4. Allow different operand 2 and operand 3
11405 registers and use peep2_reg_dead_p to ensure new scratch
11406 register is dead before peephole seqeunce. Use peep2_reg_dead_p
11407 to ensure old scratch register is dead after peephole sequence.
11409 2023-11-01 xuli <xuli1@eswincomputing.com>
11411 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
11412 intrinsics for tuple types.
11413 * config/riscv/riscv-vector-builtins.cc: Ditto.
11414 * config/riscv/vector.md (@vundefined<mode>): Ditto.
11416 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11418 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
11420 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11422 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
11424 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11426 * input.cc (dump_location_info): Update for removal of
11427 MACRO_MAP_EXPANSION_POINT_LOCATION.
11428 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
11431 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11433 * opts.cc (get_option_url): Update comment; the requirement to
11434 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
11435 r10-8065-ge33a1eae25b8a8.
11437 2023-10-31 David Malcolm <dmalcolm@redhat.com>
11439 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
11440 m_skipping_null_url.
11441 (pp_begin_url): Handle URL being null.
11442 (pp_end_url): Likewise.
11443 (selftest::test_null_urls): New.
11444 (selftest::pretty_print_cc_tests): Call it.
11445 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
11447 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11449 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
11450 (vect_build_slp_tree_1): Ditto.
11451 (vect_build_slp_tree_2): Ditto.
11453 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
11455 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
11456 * config/bpf/bpf-protos.h: Added prototype for new pass.
11457 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
11458 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
11460 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
11462 (is_attr_preserve_access): Improved check.
11463 (core_field_info): Make use of root_for_core_field_info
11465 (process_field_expr): Adapted to new functions.
11466 (pack_type): Small improvement.
11467 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
11468 (bpf_init_core_builtins): Changed to new function names.
11469 (construct_builtin_core_reloc): Improved implementation.
11470 (bpf_resolve_overloaded_core_builtin): Changed how
11471 __builtin_preserve_access_index is converted.
11472 (compute_field_expr): Corrected implementation. Added
11473 access_node argument.
11474 (bpf_core_get_index): Added valid argument.
11475 (root_for_core_field_info, pack_field_expr)
11476 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
11477 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
11478 (core_access_clean, core_is_access_index, core_mark_as_access_index)
11479 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
11480 (make_pass_lower_bpf_core): Added functions.
11481 (pass_data_lower_bpf_core): New pass struct.
11482 (pass_lower_bpf_core): New gimple_opt_pass class.
11483 (pack_field_expr_for_preserve_field)
11484 (bpf_replace_core_move_operands): Removed function.
11485 (bpf_enum_value_kind): Added GTY(()).
11486 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
11487 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
11488 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
11490 2023-10-31 Neal Frager <neal.frager@amd.com>
11492 * config/microblaze/microblaze.cc: Fix mcpu version check.
11494 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
11496 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
11497 TARGET_ATOMIC constraint
11498 (atomic_store_rvwmo<mode>): Ditto.
11499 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
11500 (atomic_store_ztso<mode>): Ditto.
11501 * config/riscv/sync.md (atomic_load<mode>): Ditto.
11502 (atomic_store<mode>): Ditto.
11504 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
11506 * config/riscv/riscv.cc (riscv_index_reg_class):
11507 Return GR_REGS for XTheadFMemIdx.
11508 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
11509 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
11510 * config/riscv/thead.cc (is_fmemidx_mode): New function.
11511 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
11512 (th_fmemidx_output_index): New function.
11513 (th_output_move): Add support for XTheadFMemIdx.
11514 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
11515 (TH_M_NOEXTF): Likewise.
11516 (*th_fmemidx_movsf_hardfloat): New INSN.
11517 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
11518 (*th_fmemidx_I_a): Likewise.
11519 (*th_fmemidx_I_c): Likewise.
11520 (*th_fmemidx_US_a): Likewise.
11521 (*th_fmemidx_US_c): Likewise.
11522 (*th_fmemidx_UZ_a): Likewise.
11523 (*th_fmemidx_UZ_c): Likewise.
11525 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
11527 * config/riscv/constraints.md (th_m_mia): New constraint.
11528 (th_m_mib): Likewise.
11529 (th_m_mir): Likewise.
11530 (th_m_miu): Likewise.
11531 * config/riscv/riscv-protos.h (enum riscv_address_type):
11532 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
11533 and ADDRESS_REG_WB and their documentation.
11534 (struct riscv_address_info): Add new field 'shift' and
11535 document the field usage for the new address types.
11536 (riscv_valid_base_register_p): New prototype.
11537 (th_memidx_legitimate_modify_p): Likewise.
11538 (th_memidx_legitimate_index_p): Likewise.
11539 (th_classify_address): Likewise.
11540 (th_output_move): Likewise.
11541 (th_print_operand_address): Likewise.
11542 * config/riscv/riscv.cc (riscv_index_reg_class):
11543 Return GR_REGS for XTheadMemIdx.
11544 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
11545 (riscv_classify_address): Call th_classify_address() on top.
11546 (riscv_output_move): Call th_output_move() on top.
11547 (riscv_print_operand_address): Call th_print_operand_address()
11549 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
11550 (HAVE_PRE_MODIFY_DISP): Likewise.
11551 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
11553 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
11554 create INSN with same name and disable it for XTheadMemIdx.
11555 (extendsidi2): Likewise.
11556 (*extendsidi2_internal): Disable for XTheadMemIdx.
11557 * config/riscv/thead.cc (valid_signed_immediate): New helper
11559 (th_memidx_classify_address_modify): New function.
11560 (th_memidx_legitimate_modify_p): Likewise.
11561 (th_memidx_output_modify): Likewise.
11562 (is_memidx_mode): Likewise.
11563 (th_memidx_classify_address_index): Likewise.
11564 (th_memidx_legitimate_index_p): Likewise.
11565 (th_memidx_output_index): Likewise.
11566 (th_classify_address): Likewise.
11567 (th_output_move): Likewise.
11568 (th_print_operand_address): Likewise.
11569 * config/riscv/thead.md (*th_memidx_operand): New splitter.
11570 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
11571 (*th_memidx_extendsidi2): Likewise.
11572 (*th_memidx_zero_extendsidi2): Likewise.
11573 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
11574 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
11575 (*th_memidx_bb_zero_extendsidi2): Likewise.
11576 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
11577 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
11578 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
11579 (TH_M_ANYI): New mode iterator.
11580 (TH_M_NOEXTI): Likewise.
11581 (*th_memidx_I_a): New combiner optimization.
11582 (*th_memidx_I_b): Likewise.
11583 (*th_memidx_I_c): Likewise.
11584 (*th_memidx_US_a): Likewise.
11585 (*th_memidx_US_b): Likewise.
11586 (*th_memidx_US_c): Likewise.
11587 (*th_memidx_UZ_a): Likewise.
11588 (*th_memidx_UZ_b): Likewise.
11589 (*th_memidx_UZ_c): Likewise.
11591 2023-10-31 Carl Love <cel@us.ibm.com>
11593 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
11594 documentation for the builti-ins.
11596 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
11598 PR rtl-optimization/111971
11599 * lra-constraints.cc: (process_alt_operands): Don't check start
11600 hard regs for regs originated from register variables.
11602 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
11604 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
11606 (cond_<ieee_fmaxmin_op><mode>): Ditto.
11607 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
11608 (reduc_fmax_scal_<mode>): Ditto.
11609 (reduc_fmin_scal_<mode>): Ditto.
11610 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
11611 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
11612 (UNSPEC_VFMIN): Ditto.
11613 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
11614 UNSPEC insn patterns.
11615 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
11617 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
11621 * Makefile.in: Handle split insn-emit.cc.
11622 * configure: Regenerate.
11623 * configure.ac: Add --with-insnemit-partitions.
11624 * genemit.cc (output_peephole2_scratches): Print to file instead
11626 (print_code): Ditto.
11627 (gen_rtx_scratch): Ditto.
11629 (gen_emit_seq): Ditto.
11630 (emit_c_code): Ditto.
11632 (gen_expand): Ditto.
11633 (gen_split): Ditto.
11634 (output_add_clobbers): Ditto.
11635 (output_added_clobbers_hard_reg_p): Ditto.
11636 (print_overload_arguments): Ditto.
11637 (print_overload_test): Ditto.
11638 (handle_overloaded_code_for): Ditto.
11639 (handle_overloaded_gen): Ditto.
11640 (print_header): New function.
11641 (handle_arg): New function.
11642 (main): Split output into 10 files.
11643 * gensupport.cc (count_patterns): New function.
11644 * gensupport.h (count_patterns): Define.
11645 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
11646 * read-md.h (class md_reader): Change definition.
11648 2023-10-31 Alexandre Oliva <oliva@adacore.com>
11650 PR tree-optimization/111943
11651 * gimple-harden-control-flow.cc: Adjust copyright year.
11652 (rt_bb_visited): Add vfalse and vtrue data members.
11653 Zero-initialize them in the ctor.
11654 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
11655 abnormal edges, insert initializers for vfalse and vtrue on
11656 entry, and insert the check sequence guarded by a conditional
11659 2023-10-31 Richard Biener <rguenther@suse.de>
11661 PR tree-optimization/112305
11662 * tree-scalar-evolution.h (expression_expensive): Adjust.
11663 * tree-scalar-evolution.cc (expression_expensive): Record
11664 when we see a COND_EXPR.
11665 (final_value_replacement_loop): When the replacement contains
11666 a COND_EXPR, rewrite it to defined overflow.
11667 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
11669 2023-10-31 Xi Ruoyao <xry111@xry111.site>
11672 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
11673 if not defined yet.
11675 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
11677 * gimple-match.h (gimple_match_op::gimple_match_op):
11678 Add interfaces for more arguments.
11679 (gimple_match_op::set_op): Add interfaces for more arguments.
11680 * match.pd: Add support of combining cond_len_op + vec_cond
11682 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
11684 * config/i386/avx512cdintrin.h (target): Push evex512 for
11686 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
11688 * config/i386/i386-builtin.def (BDESC): Do not check evex512
11689 for builtins not needed.
11691 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
11693 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
11694 Change to define_expand.
11696 2023-10-31 liuhongt <hongtao.liu@intel.com>
11699 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
11700 define_split to define_insn_and_split to handle
11701 immediate_operand for comparison.
11702 (*mmx_pblendvb_v8qi_2): Ditto.
11703 (*mmx_pblendvb_<mode>_1): Ditto.
11704 (*mmx_pblendvb_v4qi_2): Ditto.
11705 (<code><mode>3): Remove define_split after it.
11706 (<code>v8qi3): Ditto.
11707 (<code><mode>3): Ditto.
11708 (<ode>v2hi3): Ditto.
11710 2023-10-31 Andrew Pinski <pinskia@gmail.com>
11712 * match.pd (`a == 1 ? b : a OP b`): New pattern.
11713 (`a == -1 ? b : a & b`): New pattern.
11715 2023-10-31 Andrew Pinski <pinskia@gmail.com>
11717 * match.pd: (`a == 0 ? b : b + a`,
11718 `a == 0 ? b : b - a`): New patterns.
11720 2023-10-31 Neal Frager <neal.frager@amd.com>
11722 * config/microblaze/microblaze.cc: Fix mcpu version check.
11724 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
11726 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
11727 * common/config/i386/i386-common.cc: Add yongfeng.
11728 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
11729 Add ZHAOXIN_FAM7H_YONGFENG.
11730 * config.gcc: Add yongfeng.
11731 * config/i386/driver-i386.cc (host_detect_local_cpu):
11732 Let -march=native recognize yongfeng processors.
11733 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
11734 * config/i386/i386-options.cc (m_YONGFENG): New definition.
11735 (m_ZHAOXIN): Ditto.
11736 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
11737 * config/i386/i386.md: Add yongfeng.
11738 * config/i386/lujiazui.md: Fix typo.
11739 * config/i386/x86-tune-costs.h (struct processor_costs):
11740 Add yongfeng costs.
11741 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
11742 (ix86_adjust_cost): Ditto.
11743 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
11744 m_LUJIAZUI with m_ZHAOXIN.
11745 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
11746 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
11747 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
11748 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
11749 (X86_TUNE_MOVX): Ditto.
11750 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
11751 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
11752 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
11753 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
11754 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
11755 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
11756 (X86_TUNE_USE_LEAVE): Ditto.
11757 (X86_TUNE_PUSH_MEMORY): Ditto.
11758 (X86_TUNE_LCP_STALL): Ditto.
11759 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
11760 (X86_TUNE_OPT_AGU): Ditto.
11761 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
11762 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
11763 (X86_TUNE_USE_SAHF): Ditto.
11764 (X86_TUNE_USE_BT): Ditto.
11765 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
11766 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
11767 (X86_TUNE_AVOID_MFENCE): Ditto.
11768 (X86_TUNE_EXPAND_ABS): Ditto.
11769 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
11770 (X86_TUNE_USE_FFREEP): Ditto.
11771 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
11772 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
11773 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
11774 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
11775 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
11776 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
11777 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
11778 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
11779 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
11780 * doc/extend.texi: Add details about yongfeng.
11781 * doc/invoke.texi: Ditto.
11782 * config/i386/yongfeng.md: New file to describe yongfeng processor.
11784 2023-10-30 Martin Jambor <mjambor@suse.cz>
11787 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
11788 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
11789 (update_signature): Mark any any IPA-CP aggregate constants at
11790 positions known to be killed as killed. Move check that there is
11791 clone_info after this pruning.
11792 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
11793 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
11794 (push_agg_values_from_plats): Likewise.
11795 (ipa_push_agg_values_from_jfunc): Likewise.
11796 (estimate_local_effects): Likewise.
11797 (push_agg_values_for_index_from_edge): Likewise.
11798 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
11800 (read_ipcp_transformation_info): Likewise.
11801 (ipcp_get_aggregate_const): Update comment, assert that encountered
11802 record does not have killed flag set.
11803 (ipcp_transform_function): Prune all aggregate constants with killed
11806 2023-10-30 Martin Jambor <mjambor@suse.cz>
11809 * ipa-prop.h (ipcp_transformation): New member function template
11811 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
11812 filter aggreagate constants.
11814 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11816 PR middle-end/101955
11817 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
11818 to convert sign extract of the least significant bit into an
11819 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
11821 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11823 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
11824 Provide reasonable values for SHIFTS and ROTATES by constant
11825 bit counts depending upon TARGET_BARREL_SHIFTER.
11826 (arc_insn_cost): Use insn attributes if the instruction is
11827 recognized. Avoid calling get_attr_length for type "multi",
11828 i.e. define_insn_and_split patterns without explicit type.
11829 Fall-back to set_rtx_cost for single_set and pattern_cost
11831 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
11832 (BRANCH_COST): Improve/correct definition.
11833 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
11835 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
11837 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
11838 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
11839 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
11840 (arc_split_rotl): Use swap on TARGET_SWAP.
11841 (arc_split_rotr): Likewise.
11842 * config/arc/arc.md (ANY_ROTATE): New code iterator.
11843 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
11844 swap instruction on TARGET_SWAP.
11845 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
11846 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
11847 (*ashlsi2_cnt16): See above.
11849 2023-10-30 Richard Ball <richard.ball@arm.com>
11851 * config/arm/aout.h: Change to use the Lrtx label.
11852 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
11853 from (!target_pure_code) condition.
11854 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
11855 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
11856 .Lrtx label and remove adr instructions.
11857 * config/arm/arm.md
11858 (arm_casesi_internal): Use force_reg to generate ldr instructions that
11859 would otherwise be out of range, and change rtl to accommodate force reg.
11860 Additionally remove unnecessary register temp.
11861 (casesi): Remove pure code check for Arm.
11862 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
11863 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
11865 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11868 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
11869 xor to an equality and fix comment indentation.
11871 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11873 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
11874 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
11875 * config/riscv/vector.md: Ditto.
11877 2023-10-30 liuhongt <hongtao.liu@intel.com>
11880 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
11881 512-bit vector with vpcmpeq + kortest.
11882 * config/i386/i386.md (cbranchxi4): New expander.
11883 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
11886 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
11889 * expr.cc (qi_vector_mode_supported_p): Rename to...
11890 (by_pieces_mode_supported_p): ...this, and extends it to do
11891 the checking for both scalar and vector mode.
11892 (widest_fixed_size_mode_for_size): Call
11893 by_pieces_mode_supported_p to examine the mode.
11894 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
11896 2023-10-29 Martin Uecker <uecker@tugraz.at>
11898 PR tree-optimization/109334
11899 * tree-object-size.cc (parm_object_size): Allow size
11900 computation for implicit access attributes.
11902 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
11904 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
11905 260000 (which corresponds to RF-2014.0) to 270000 (which
11906 corresponds to RG-2015.0, the release where salt/saltu opcodes
11909 2023-10-29 Pan Li <pan2.li@intel.com>
11911 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
11912 reference type to prevent copying.
11914 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
11916 PR rtl-optimization/112107
11917 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
11920 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
11923 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
11926 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
11928 * config/gcn/gcn-valu.md
11929 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
11930 condition to silence the warnings.
11931 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
11932 * config/gcn/gcn.md (*movti_insn): Likewise.
11934 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
11936 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
11939 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
11941 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
11942 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
11944 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
11946 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
11947 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
11949 (expand_rawmemchr): Define.
11950 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
11952 (expand_block_move): Move from here...
11953 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
11954 (expand_rawmemchr): Add vectorized expander.
11955 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
11957 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
11959 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
11960 Process reg equivalence invariants.
11962 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
11964 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
11965 i386: Fiy typo in "partial_memory_read_stall" tune option.
11967 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
11969 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
11970 support for CONST_STRING.
11972 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
11975 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
11976 2 take "regiser_operand" and "nonimmediate_operand" respectively.
11977 (<u>mulqihi3): Likewise.
11978 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
11979 matching the %d constraint. Use umul_highpart RTX to represent
11980 the highpart multiplication.
11981 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
11982 predicate, and "a" rather than "0" as operands 0 and 2 have
11984 (define_split): For mul to mulx conversion, use the new
11985 umul_highpart RTX representation.
11986 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
11987 and the constraint %a as operands 0 and 1 have different modes.
11988 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
11990 (define_peephole2): Providing widening multiplication variants
11991 of the peephole2s that tweak highpart multiplication register
11994 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
11996 PR preprocessor/87299
11997 * toplev.cc (no_backend): New static global.
11998 (finalize): Remove argument no_backend, which is now a
12000 (process_options): Likewise.
12001 (do_compile): Likewise.
12002 (target_reinit): Don't do anything in preprocess-only mode.
12003 (toplev::main): Adapt to no_backend change.
12004 (toplev::finalize): Likewise.
12006 2023-10-27 Andrew Pinski <apinski@marvell.com>
12008 PR tree-optimization/101590
12009 PR tree-optimization/94884
12010 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
12012 2023-10-27 liuhongt <hongtao.liu@intel.com>
12015 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
12016 V2HF/V2BF/V4HF/V4BFmode.
12017 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
12018 data_mode is V4HF/V2HFmode.
12019 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
12020 (vcond_mask_<mode>v4hi): Ditto.
12021 (vcond_mask_<mode>qi): Ditto.
12022 (vec_cmpv2hfqi): Ditto.
12023 (vcond_mask_<mode>v2hi): Ditto.
12024 (mmx_plendvb_<mode>): Add 2 combine splitters after the
12026 (mmx_pblendvb_v8qi): Ditto.
12027 (<code>v2hi3): Add a combine splitter after the pattern.
12028 (<code><mode>3): Ditto.
12029 (<code>v8qi3): Ditto.
12030 (<code><mode>3): Ditto.
12031 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
12032 (vcond<sseintvecmodelower><mode>): .. this into ..
12033 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
12034 and extend to V8BF/V16BF/V32BFmode.
12036 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12038 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
12039 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
12040 (autovectorize_vector_modes): Ditto.
12041 (can_find_related_mode_p): Ditto.
12043 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12047 * config.gcc: Add AVL propagation pass.
12048 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
12049 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
12050 * config/riscv/t-riscv: Ditto.
12051 * config/riscv/riscv-avlprop.cc: New file.
12053 2023-10-26 David Malcolm <dmalcolm@redhat.com>
12055 * doc/extend.texi (Common Function Attributes): Add
12056 null_terminated_string_arg.
12058 2023-10-26 Andrew Pinski <pinskia@gmail.com>
12060 PR tree-optimization/111957
12061 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
12063 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
12065 * range-op-float.cc (range_operator::fold_range): Delete unused
12068 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
12070 * range-op-float.cc (range_operator::fold_range): Remove
12072 (range_operator::rv_fold): Remove unneeded arguments.
12073 (operator_plus::rv_fold): Same.
12074 (operator_minus::rv_fold): Same.
12075 (operator_mult::rv_fold): Same.
12076 (operator_div::rv_fold): Same.
12077 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
12079 * range-op.h: Same.
12081 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
12083 * range-op-float.cc (range_operator::fold_range): Pass frange
12084 argument to rv_fold.
12085 (range_operator::rv_fold): Add frange argument.
12086 (operator_plus::rv_fold): Same.
12087 (operator_minus::rv_fold): Same.
12088 (operator_mult::rv_fold): Same.
12089 (operator_div::rv_fold): Same.
12090 * range-op-mixed.h: Add frange argument to rv_fold methods.
12091 * range-op.h: Same.
12093 2023-10-26 Richard Ball <richard.ball@arm.com>
12095 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
12096 for different machine modes for arm.
12097 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
12098 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
12099 ASM_OUTPUT_ADDR_DIFF_ELT.
12100 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
12102 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
12104 * config/arm/arm.cc (arm_output_casesi): New function.
12105 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
12107 for arm to use new function arm_output_casesi.
12109 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
12112 (darwin_label_is_anonymous_local_objc_name): Make metadata names
12113 linker-visibile for GNU objective C.
12115 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
12117 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
12119 * ira-costs.cc: Include regset.h.
12120 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
12122 (find_costs_and_classes): Call calculate_equiv_gains and redefine
12123 mem_cost of pseudos with equivs when LRA is used.
12124 * var-tracking.cc: Include ira.h and lra.h.
12125 (vt_initialize): Use lra_eliminate_regs when LRA is used.
12127 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12129 * doc/md.texi: Adapt COND_LEN pseudo code.
12131 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
12132 Richard Biener <rguenther@suse.de>
12134 PR rtl-optimization/91865
12135 * combine.cc (make_compound_operation): Avoid creating a
12136 ZERO_EXTEND of a ZERO_EXTEND.
12138 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
12140 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
12141 (vcond_mask_<mode><mode256_i>): this.
12142 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
12143 (vcond_mask_<mode><mode_i>): this.
12145 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
12147 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
12148 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
12150 * ipa-visibility.cc (function_and_variable_visibility): Change
12151 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
12152 * varasm.cc (output_constant_pool_contents)
12153 [#ifdef ASM_OUTPUT_DEF]:
12154 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
12155 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
12156 'if (!TARGET_SUPPORTS_ALIASES)',
12157 'gcc_checking_assert (seen_error ());'.
12158 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
12159 'if (!TARGET_SUPPORTS_ALIASES)'.
12160 (default_asm_output_anchor):
12161 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
12163 2023-10-26 Alexandre Oliva <oliva@adacore.com>
12165 PR tree-optimization/111520
12166 * gimple-harden-conditionals.cc
12167 (pass_harden_compares::execute): Set EH edge probability and
12168 EH block execution count.
12170 2023-10-26 Alexandre Oliva <oliva@adacore.com>
12172 * tree-eh.h (make_eh_edges): Rename to...
12173 (make_eh_edge): ... this.
12174 * tree-eh.cc: Likewise. Adjust all callers...
12175 * gimple-harden-conditionals.cc: ... here, ...
12176 * gimple-harden-control-flow.cc: ... here, ...
12177 * tree-cfg.cc: ... here, ...
12178 * tree-inline.cc: ... and here.
12180 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
12182 * config/darwin.cc (darwin_override_options): Handle fPIE.
12184 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
12186 * config.gcc: Use -E to to sed to indicate that we are using
12189 2023-10-25 Jason Merrill <jason@redhat.com>
12191 * tree-core.h (struct tree_base): Update address_space comment.
12193 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
12195 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
12196 Add support for immediates using MOV/EOR bitmask.
12198 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
12201 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
12203 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
12204 * config/i386/i386.md: New peephole pattern to narrow test
12205 instructions with immediate operands that test memory locations
12208 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
12210 * value-range.cc (irange::union_append): New.
12211 (irange::union_): Call union_append when appropriate.
12212 * value-range.h (irange::union_append): New prototype.
12214 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
12216 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
12217 (__lasx_xvfrintrne_s): Ditto.
12218 (__lasx_xvfrintrne_d): Ditto.
12219 (__lasx_xvfrintrz_s): Ditto.
12220 (__lasx_xvfrintrz_d): Ditto.
12221 (__lasx_xvfrintrp_s): Ditto.
12222 (__lasx_xvfrintrp_d): Ditto.
12223 (__lasx_xvfrintrm_s): Ditto.
12224 (__lasx_xvfrintrm_d): Ditto.
12225 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
12226 (__lsx_vfrintrne_s): Ditto.
12227 (__lsx_vfrintrne_d): Ditto.
12228 (__lsx_vfrintrz_s): Ditto.
12229 (__lsx_vfrintrz_d): Ditto.
12230 (__lsx_vfrintrp_s): Ditto.
12231 (__lsx_vfrintrp_d): Ditto.
12232 (__lsx_vfrintrm_s): Ditto.
12233 (__lsx_vfrintrm_d): Ditto.
12235 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
12237 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
12238 instruction template corresponding to the __builtin_thread_pointer
12240 * doc/extend.texi:Add the __builtin_thread_pointer function support
12241 description to the documentation.
12243 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12245 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
12246 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
12247 (single_set_info): New functions.
12248 (remove_uses_of_def, accesses_reference_same_resource): Declare.
12249 (insn_clobbers_resources): Likewise.
12250 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
12251 (rtl_ssa::accesses_reference_same_resource): Likewise.
12252 (rtl_ssa::insn_clobbers_resources): Likewise.
12253 * rtl-ssa/movement.h (can_move_insn_p): Declare.
12254 * rtl-ssa/movement.cc: New file.
12256 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12258 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
12259 New member function.
12260 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
12262 (function_info::make_use_available): Avoid false negatives for
12263 queries within an EBB.
12265 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12267 * rtl-ssa/changes.cc: Include sreal.h.
12268 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
12269 scale the cost of each instruction by its execution frequency.
12271 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12273 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
12274 (is_single_dominating_def, remains_available_on_exit): Replace with...
12275 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
12276 (function_info::remains_available_on_exit): ...these new member
12278 (function_info::m_clobbered_by_calls): New member variable.
12279 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
12280 initialize m_clobbered_by_calls.
12281 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
12282 m_clobbered_by_calls for each call-clobber note.
12283 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
12284 New function. Check for call clobbers.
12285 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
12288 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12290 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
12292 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
12293 (bb_walker::bb_walker): Use it, moving the computation of the
12295 (function_info::process_all_blocks): ...here.
12296 (function_info::place_phis): Add dominance frontiers for the
12299 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12301 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
12302 New member function.
12303 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
12305 (function_info::change_insns): Use it.
12307 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12309 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
12310 If a change describes a set of memory, ensure that that set
12311 is kept, regardless of the insn pattern.
12313 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12315 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
12316 call to add_reg_unused_notes and instead...
12317 (function_info::change_insns): ...use a separate loop here.
12319 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
12321 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
12322 global registers to be live on exit. Handle any block with zero
12323 successors like an exit block.
12325 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
12327 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
12328 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
12329 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
12330 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
12332 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
12334 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
12336 * tree-pretty-print.cc (dump_omp_clause): Adjust.
12337 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
12338 * tree.h: Likewise.
12340 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12342 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
12343 (tail_agnostic_p): Ditto.
12344 (validate_change_or_fail): Ditto.
12345 (nonvlmax_avl_type_p): Ditto.
12346 (vlmax_avl_p): Ditto.
12348 (enum vlmul_type): Ditto.
12349 (count_regno_occurrences): Ditto.
12350 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
12351 (get_default_ta): Ditto.
12352 (tail_agnostic_p): Ditto.
12353 (validate_change_or_fail): Ditto.
12354 (nonvlmax_avl_type_p): Ditto.
12355 (vlmax_avl_p): Ditto.
12357 (enum vlmul_type): Ditto.
12358 (get_vlmul): Ditto.
12359 (count_regno_occurrences): Ditto.
12360 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
12361 (has_vl_op): Ditto.
12363 (get_vlmul): Ditto.
12364 (get_default_ta): Ditto.
12365 (tail_agnostic_p): Ditto.
12366 (count_regno_occurrences): Ditto.
12367 (validate_change_or_fail): Ditto.
12369 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
12371 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
12372 (gimplify_adjust_omp_clauses): Likewise.
12373 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
12374 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
12375 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
12376 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
12378 (convert_local_omp_clauses): Likewise.
12379 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
12380 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
12381 (omp_clause_code_name): Likewise.
12382 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
12384 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12386 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
12387 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
12388 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
12389 * config/riscv/vector.md: Change avl_type into avl_type_idx.
12391 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12393 * recog.cc (constrain_operands): Remove UNARY_P handling.
12394 * reload.cc (find_reloads): Likewise.
12396 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12398 * gcov-io.h: Fix record length encoding in comment.
12400 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
12402 * config/i386/i386-features.cc (compute_convert_gain): Provide
12403 more accurate values (sizes) for inter-unit moves with -Os.
12405 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
12406 Claudiu Zissulescu <claziss@gmail.com>
12408 * config/arc/arc-protos.h (output_shift): Rename to...
12409 (output_shift_loop): Tweak API to take an explicit rtx_code.
12410 (arc_split_ashl): Prototype new function here.
12411 (arc_split_ashr): Likewise.
12412 (arc_split_lshr): Likewise.
12413 (arc_split_rotl): Likewise.
12414 (arc_split_rotr): Likewise.
12415 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
12416 (output_shift_loop): New function replacing output_shift to output
12417 a zero overheap loop for SImode shifts and rotates on ARC targets
12418 without barrel shifter (i.e. no hardware support for these insns).
12419 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
12420 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
12421 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
12422 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
12423 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
12424 (arc_print_operand): Correct whitespace.
12425 (arc_rtx_costs): Likewise.
12426 (hwloop_optimize): Likewise.
12427 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
12428 (define_code_attr insn): New code attribute to map to pattern name.
12429 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
12430 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
12431 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
12432 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
12433 We now call arc_split_<insn> in arc.cc to implement each split.
12434 (shift_si3): Delete define_insn, all shifts/rotates are now split.
12435 (shift_si3_loop): Rename to...
12436 (<insn>si3_loop): define_insn to handle loop implementations of
12437 SImode shifts and rotates, calling ouput_shift_loop for template.
12438 (rotrsi3): Rename to...
12439 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
12440 (*rotlsi3): New define_insn_and_split to transform left rotates
12441 into right rotates before reload.
12442 (rotlsi3_cnt1): New define_insn_and_split to implement a left
12443 rotate by one bit using an add.f followed by an adc.
12444 * config/arc/predicates.md (shiftr4_operator): Delete.
12446 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
12448 * config/arc/arc.md (mulsi3_700): Update pattern.
12449 (mulsi3_v2): Likewise.
12450 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
12452 2023-10-24 Andrew Pinski <pinskia@gmail.com>
12454 PR tree-optimization/104376
12455 PR tree-optimization/101541
12456 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
12457 Allow nop conversions even if it is defined by a statement
12458 inside the conditional.
12460 2023-10-24 Andrew Pinski <pinskia@gmail.com>
12462 PR tree-optimization/111913
12463 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
12466 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12468 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
12469 whether the requested phi already exists.
12471 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12473 * rtl-ssa.h: Include cfgbuild.h.
12474 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
12475 more comprehensive control_flow_insn_p.
12477 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12479 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
12480 whether an insn has been replaced by a note.
12482 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12484 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
12487 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12489 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
12490 destination to be wider than the sources. Take the mode from the
12492 (ix86_expand_sse_extend): Pass the destination directly to
12493 ix86_split_mmx_punpck, rather than using a fresh register that
12496 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12498 * config/i386/predicates.md (aeswidekl_operation): Protect
12499 REGNO check with REG_P.
12501 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12503 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
12504 (TARGET_INSN_COST): Define.
12506 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
12508 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
12511 2023-10-24 xuli <xuli1@eswincomputing.com>
12514 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
12516 2023-10-24 Mark Harmstone <mark@harmstone.com>
12518 * opts.cc (debug_type_names): Remove stabs and xcoff.
12519 (df_set_names): Adjust.
12521 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12524 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
12526 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
12528 PR preprocessor/36887
12529 * toplev.h (ident_hash_extra): Declare...
12530 * stringpool.cc (ident_hash_extra): ...this new global variable.
12531 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
12532 (ggc_mark_stringpool): Likewise.
12533 (ggc_purge_stringpool): Likewise.
12534 (struct string_pool_data_extra): New struct.
12535 (spd2): New GC root variable.
12536 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
12537 analogous to how spd is used to handle ident_hash.
12538 (gt_pch_restore_stringpool): Likewise.
12540 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
12542 PR tree-optimization/111794
12543 * tree-vect-stmts.cc (vectorizable_assignment): Add
12544 same-precision exception for dest and source.
12546 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
12548 * config/riscv/autovec.md (popcount<mode>2): New expander.
12549 * config/riscv/riscv-protos.h (expand_popcount): Define.
12550 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
12551 with the WWG algorithm.
12553 2023-10-23 Richard Biener <rguenther@suse.de>
12555 PR tree-optimization/111916
12556 * tree-sra.cc (sra_modify_assign): Do not lower all
12557 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
12559 2023-10-23 Richard Biener <rguenther@suse.de>
12561 PR tree-optimization/111915
12562 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
12563 accesses are either grouped or not.
12565 2023-10-23 Richard Biener <rguenther@suse.de>
12568 * tree-inline.cc (setup_one_parameter): Move code emitting
12569 a dummy load when not optimizing ...
12570 (initialize_inlined_parameters): ... here to after when
12571 we remapped the parameter type.
12573 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
12576 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
12577 Skip over nop move insns.
12579 2023-10-23 Tamar Christina <tamar.christina@arm.com>
12581 PR tree-optimization/111860
12582 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
12583 Drop .MEM nodes only.
12585 2023-10-23 Andrew Pinski <apinski@marvell.com>
12587 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
12590 2023-10-23 Andrew Pinski <pinskia@gmail.com>
12592 * convert.cc (convert_to_pointer_1): Return error_mark_node
12594 (convert_to_real_1): Likewise.
12595 (convert_to_integer_1): Likewise.
12596 (convert_to_complex_1): Likewise.
12598 2023-10-23 Andrew Pinski <pinskia@gmail.com>
12601 * convert.cc (convert_to_complex_1): Return
12602 error_mark_node if either convert was an error
12603 when converting from a scalar.
12605 2023-10-23 Richard Biener <rguenther@suse.de>
12607 PR tree-optimization/111917
12608 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
12609 new conditional after last stmt.
12611 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12614 * config/riscv/riscv-vsetvl.cc: Fix bug.
12616 2023-10-23 Pan Li <pan2.li@intel.com>
12618 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
12620 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
12622 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12624 * doc/invoke.texi (-mexplicit-relocs=style): Document.
12625 (-mexplicit-relocs): Document as an alias of
12626 -mexplicit-relocs=always.
12627 (-mno-explicit-relocs): Document as an alias of
12628 -mexplicit-relocs=none.
12629 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
12632 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12634 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
12636 * config/loongarch/loongarch.md (define_peephole2): Optimize
12637 la.local + ld/st to pcalau12i + ld/st if the address is only used
12638 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
12640 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12642 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
12643 Return true for TLS symbol types if -mexplicit-relocs=auto.
12644 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
12645 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
12646 (loongarch_legitimize_tls_address): Likewise.
12647 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
12648 TARGET_EXPLICIT_RELOCS from insn condition.
12650 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12652 * config/loongarch/loongarch-protos.h
12653 (loongarch_explicit_relocs_p): Declare new function.
12654 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
12656 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
12657 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
12658 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
12659 deciding if return early, instead of using
12660 TARGET_EXPLICIT_RELOCS.
12661 (loongarch_output_move): CAll loongarch_explicit_relocs_p
12662 instead of using TARGET_EXPLICIT_RELOCS.
12663 * config/loongarch/loongarch.md (*low<mode>): Remove
12664 TARGET_EXPLICIT_RELOCS from insn condition.
12665 (@ld_from_got<mode>): Likewise.
12666 * config/loongarch/predicates.md (move_operand): Call
12667 loongarch_explicit_relocs_p instead of using
12668 TARGET_EXPLICIT_RELOCS.
12670 2023-10-23 Xi Ruoyao <xry111@xry111.site>
12672 * config/loongarch/genopts/loongarch-strings: Add strings for
12673 -mexplicit-relocs={auto,none,always}.
12674 * config/loongarch/genopts/loongarch.opt.in: Add options for
12675 -mexplicit-relocs={auto,none,always}.
12676 * config/loongarch/loongarch-str.h: Regenerate.
12677 * config/loongarch/loongarch.opt: Regenerate.
12678 * config/loongarch/loongarch-def.h
12679 (EXPLICIT_RELOCS_AUTO): Define.
12680 (EXPLICIT_RELOCS_NONE): Define.
12681 (EXPLICIT_RELOCS_ALWAYS): Define.
12682 (N_EXPLICIT_RELOCS_TYPES): Define.
12683 * config/loongarch/loongarch.cc
12684 (loongarch_option_override_internal): Error out if the old-style
12685 -m[no-]explicit-relocs option is used with
12686 -mexplicit-relocs={auto,none,always} together. Map
12687 -mno-explicit-relocs to -mexplicit-relocs=none and
12688 -mexplicit-relocs to -mexplicit-relocs=always for backward
12689 compatibility. Set a proper default for -mexplicit-relocs=
12690 based on configure-time probed linker capability. Update a
12691 diagnostic message to mention -mexplicit-relocs=always instead
12692 of the old-style -mexplicit-relocs.
12693 (loongarch_handle_model_attribute): Update a diagnostic message
12694 to mention -mexplicit-relocs=always instead of the old-style
12696 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
12698 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12700 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
12701 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
12703 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12705 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
12707 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
12709 PR tree-optimization/111784
12710 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
12711 adjacent vector stores, by costing them with the total number
12712 rather than costing them one by one.
12713 (vectorizable_load): Adjust costing way for adjacent vector
12714 loads, by costing them with the total number rather than costing
12717 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
12720 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
12721 Do not split to xmm16+ when !TARGET_AVX512VL.
12723 2023-10-23 Pan Li <pan2.li@intel.com>
12725 * config/riscv/riscv-protos.h (enum insn_type): Add new type
12727 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
12729 (expand_vec_ceil): Take MA instead of MU for tmp register.
12730 (expand_vec_floor): Ditto.
12731 (expand_vec_nearbyint): Ditto.
12732 (expand_vec_rint): Ditto.
12733 (expand_vec_round): Ditto.
12734 (expand_vec_roundeven): Ditto.
12736 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
12738 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
12740 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
12743 * expr.cc (can_use_qi_vectors): New function to return true if
12744 we know how to implement OP using vectors of bytes.
12745 (qi_vector_mode_supported_p): New function to check if optabs
12746 exists for the mode and certain by pieces operations.
12747 (widest_fixed_size_mode_for_size): Replace the second argument
12748 with the type of by pieces operations. Call can_use_qi_vectors
12749 and qi_vector_mode_supported_p to do the check. Call
12750 scalar_mode_supported_p to check if the scalar mode is supported.
12751 (by_pieces_ninsns): Pass the type of by pieces operation to
12752 widest_fixed_size_mode_for_size.
12753 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
12754 record the type of by pieces operations.
12755 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
12756 type of by pieces operations, initialize m_op with it. Pass
12757 m_op to function widest_fixed_size_mode_for_size.
12758 (op_by_pieces_d::get_usable_mode): Pass m_op to function
12759 widest_fixed_size_mode_for_size.
12760 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
12761 can_use_qi_vectors and qi_vector_mode_supported_p to do the
12763 (op_by_pieces_d::run): Pass m_op to function
12764 widest_fixed_size_mode_for_size.
12765 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
12766 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
12767 (can_store_by_pieces): Pass the type of by pieces operations to
12768 widest_fixed_size_mode_for_size.
12769 (clear_by_pieces): Initialize class store_by_pieces_d with
12771 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
12774 2023-10-23 liuhongt <hongtao.liu@intel.com>
12776 PR tree-optimization/111820
12777 PR tree-optimization/111833
12778 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
12779 up vectorization for nonlinear iv vect_step_op_mul when
12780 step_expr is not exact_log2 and niters is greater than
12781 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
12782 for nagative niters_skip which will be used by fully masked
12784 (vect_can_advance_ivs_p): Pass whole phi_info to
12785 vect_can_peel_nonlinear_iv_p.
12786 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
12787 init_expr * pow (step_expr, skipn) to init_expr
12788 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
12790 2023-10-23 liuhongt <hongtao.liu@intel.com>
12792 * config/i386/mmx.md (mmx_pinsrw): Remove.
12794 2023-10-22 Andrew Pinski <pinskia@gmail.com>
12797 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
12798 (*cmov_uxtw_insn_insv): Likewise.
12800 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12802 * doc/invoke.texi: Document the new -nodefaultrpaths option.
12803 * doc/install.texi: Document the new --with-darwin-extra-rpath
12806 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12808 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
12810 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12812 * configure.ac: Add --with-darwin-extra-rpath option.
12813 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
12814 * config.in: Regenerate.
12815 * configure: Regenerate.
12817 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12819 * aclocal.m4: Regenerate.
12820 * configure: Regenerate.
12821 * configure.ac: Handle Darwin rpaths.
12822 * config/darwin.h: Handle Darwin rpaths.
12823 * config/darwin.opt: Handle Darwin rpaths.
12824 * Makefile.in: Handle Darwin rpaths.
12826 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
12828 * gcc.cc (RUNPATH_OPTION): New.
12829 (do_spec_1): Provide '%P' as a spec to insert rpaths for
12830 each compiler startfile path.
12832 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
12833 Maxim Blinov <maxim.blinov@embecosm.com>
12834 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12835 Iain Sandoe <iain@sandoe.co.uk>
12837 * config.gcc: Default to heap trampolines on macOS 11 and above.
12838 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
12839 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
12840 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
12842 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
12843 Maxim Blinov <maxim.blinov@embecosm.com>
12844 Iain Sandoe <iain@sandoe.co.uk>
12845 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12847 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
12848 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
12849 * common.opt (ftrampoline-impl): Add option to control
12850 generation of trampoline instantiation (heap or stack).
12851 * coretypes.h: Define enum trampoline_impl.
12852 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
12853 __builtin_adjust_trampoline for heap trampolines.
12854 (finalize_nesting_tree_1): Emit calls to
12855 __builtin_nested_...{created,deleted} if we're generating with
12856 -ftrampoline-impl=heap.
12857 * tree.cc (build_common_builtin_nodes): Build
12858 __builtin_nested_...{created,deleted}.
12859 * doc/invoke.texi (-ftrampoline-impl): Document.
12861 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
12863 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
12864 Prohibit 'E' and 'H' combinations.
12866 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
12868 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
12869 Change version number of the 'Zfa' extension to 1.0.
12871 2023-10-21 Pan Li <pan2.li@intel.com>
12874 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
12875 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
12876 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
12877 macro reference to func.
12878 (vls_mode_valid_p): New func impl for vls mode valid or not.
12879 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
12880 macro reference to func.
12881 * config/riscv/vector-iterators.md: Ditto.
12883 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
12884 Uros Bizjak <ubizjak@gmail.com>
12886 PR middle-end/101955
12887 PR tree-optimization/106245
12888 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
12890 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
12892 * gimple-harden-control-flow.cc: Include memmodel.h.
12894 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
12896 * gimple-harden-control-flow.cc: Include tm_p.h.
12898 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12900 PR tree-optimization/111882
12901 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
12902 with non-constant offsets.
12904 2023-10-20 Tamar Christina <tamar.christina@arm.com>
12906 PR tree-optimization/111866
12907 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
12908 vect_set_loop_condition during prolog peeling.
12910 2023-10-20 Richard Biener <rguenther@suse.de>
12912 PR tree-optimization/111445
12913 * tree-scalar-evolution.cc (simple_iv_with_niters):
12914 Add missing check for a sign-conversion.
12916 2023-10-20 Richard Biener <rguenther@suse.de>
12918 PR tree-optimization/110243
12919 PR tree-optimization/111336
12920 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
12921 operations with undefined behavior on overflow to
12922 unsigned arithmetic.
12924 2023-10-20 Richard Biener <rguenther@suse.de>
12926 PR tree-optimization/111891
12927 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
12930 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
12932 * config.gcc: Allow --with-arch=gfx1030.
12933 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
12934 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
12935 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
12936 (TARGET_GFX1030): New.
12937 (TARGET_RDNA2): New.
12938 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
12939 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
12940 (subc<mode>3<exec_vcc>): Likewise.
12941 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
12942 (vec_cmp<mode>di): Likewise.
12943 (vec_cmp<u><mode>di): Likewise.
12944 (vec_cmp<mode>di_exec): Likewise.
12945 (vec_cmp<u><mode>di_exec): Likewise.
12946 (vec_cmp<mode>di_dup): Likewise.
12947 (vec_cmp<mode>di_dup_exec): Likewise.
12948 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
12949 (*<reduc_op>_dpp_shr_<mode>): Likewise.
12950 (*plus_carry_dpp_shr_<mode>): Likewise.
12951 (*plus_carry_in_dpp_shr_<mode>): Likewise.
12952 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
12953 (gcn_global_address_p): RDNA2 only allows smaller offsets.
12954 (gcn_addr_space_legitimate_address_p): Likewise.
12955 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
12956 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
12957 (output_file_start): Configure gfx1030.
12958 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
12959 (ASSEMBLER_DIALECT): New.
12960 * config/gcn/gcn.md (rdna): New define_attr.
12961 (enabled): Use "rdna" attribute.
12962 (gcn_return): Remove s_dcache_wb.
12963 (addcsi3_scalar): Add RDNA2 syntax variant.
12964 (addcsi3_scalar_zero): Likewise.
12965 (addptrdi3): Likewise.
12966 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
12967 (*memory_barrier): Add RDNA2 syntax variant.
12968 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
12969 scalar atomics for RDNA2.
12970 (atomic_store<mode>): Likewise.
12971 (atomic_exchange<mode>): Likewise.
12972 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
12973 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
12974 (main): Recognise -march=gfx1030.
12975 * config/gcn/t-omp-device: Add gfx1030 isa.
12977 2023-10-20 Richard Biener <rguenther@suse.de>
12979 PR tree-optimization/111000
12980 * stor-layout.h (element_precision): Move ..
12981 * tree.h (element_precision): .. here.
12982 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
12983 motion of shifts and rotates.
12985 2023-10-20 Alexandre Oliva <oliva@adacore.com>
12987 * tree-core.h (ECF_XTHROW): New macro.
12988 * tree.cc (set_call_expr): Add expected_throw attribute when
12990 (build_common_builtin_node): Add ECF_XTHROW to
12991 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
12992 * calls.cc (flags_from_decl_or_type): Check for expected_throw
12993 attribute to set ECF_XTHROW.
12994 * gimple.cc (gimple_build_call_from_tree): Propagate
12995 ECF_XTHROW from decl flags to gimple call...
12996 (gimple_call_flags): ... and back.
12997 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
12998 (gimple_call_set_expected_throw): New.
12999 (gimple_call_expected_throw_p): New.
13000 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
13001 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
13002 * common.opt (fharden-control-flow-redundancy): New.
13003 (-fhardcfr-check-returning-calls): New.
13004 (-fhardcfr-check-exceptions): New.
13005 (-fhardcfr-check-noreturn-calls=*): New.
13006 (Enum hardcfr_check_noreturn_calls): New.
13007 (fhardcfr-skip-leaf): New.
13008 * doc/invoke.texi: Document them.
13009 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
13010 * flag-types.h (enum hardcfr_noret): New.
13011 * gimple-harden-control-flow.cc: New.
13012 * params.opt (-param=hardcfr-max-blocks=): New.
13013 (-param=hradcfr-max-inline-blocks=): New.
13014 * passes.def (pass_harden_control_flow_redundancy): Add.
13015 * tree-pass.h (make_pass_harden_control_flow_redundancy):
13017 * doc/extend.texi: Document expected_throw attribute.
13019 2023-10-20 Alex Coplan <alex.coplan@arm.com>
13021 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
13022 ::remove_insn on deleted insns.
13024 2023-10-20 Richard Biener <rguenther@suse.de>
13026 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
13028 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
13031 * config/sh/sh.md (unnamed split pattern): Fix comparison of
13032 find_regno_note result.
13034 2023-10-20 Richard Biener <rguenther@suse.de>
13036 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
13037 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
13040 2023-10-20 Richard Biener <rguenther@suse.de>
13042 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
13043 off_arg3_arg2_map): New.
13044 (vect_get_operand_map): Get flag whether the stmt was
13045 recognized as gather or scatter and use the above
13047 (vect_get_and_check_slp_defs): Adjust.
13048 (vect_build_slp_tree_2): Likewise.
13050 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13052 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
13053 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
13054 (pre_vsetvl::emit_vsetvl): Ditto.
13056 2023-10-20 Tamar Christina <tamar.christina@arm.com>
13057 Andre Vieira <andre.simoesdiasvieira@arm.com>
13059 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
13060 (get_loop_body_if_conv_order): ... to here.
13061 (if_convertible_loop_p): Remove single_exit check.
13062 (tree_if_conversion): Move single_exit check to if-conversion part and
13063 support multiple exits.
13065 2023-10-20 Tamar Christina <tamar.christina@arm.com>
13066 Andre Vieira <andre.simoesdiasvieira@arm.com>
13068 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
13069 from original statement.
13070 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
13072 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13075 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
13076 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
13078 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
13083 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
13085 (compute_reaching_defintion): New.
13086 (enum vsetvl_type): Moved.
13087 (vlmax_avl_p): Moved.
13088 (enum emit_type): Moved.
13089 (vlmul_to_str): Moved.
13090 (vlmax_avl_insn_p): Removed.
13091 (policy_to_str): Moved.
13092 (loop_basic_block_p): Removed.
13093 (valid_sew_p): Removed.
13094 (vsetvl_insn_p): Moved.
13095 (vsetvl_vtype_change_only_p): Removed.
13096 (after_or_same_p): Removed.
13097 (before_p): Removed.
13098 (anticipatable_occurrence_p): Removed.
13099 (available_occurrence_p): Removed.
13100 (insn_should_be_added_p): Removed.
13101 (get_all_sets): Moved.
13102 (get_same_bb_set): Moved.
13103 (gen_vsetvl_pat): Removed.
13104 (calculate_vlmul): Moved.
13105 (get_max_int_sew): New.
13106 (emit_vsetvl_insn): Removed.
13107 (get_max_float_sew): New.
13108 (eliminate_insn): Removed.
13109 (insert_vsetvl): Removed.
13110 (count_regno_occurrences): Moved.
13111 (get_vl_vtype_info): Removed.
13112 (enum def_type): Moved.
13113 (validate_change_or_fail): Moved.
13114 (change_insn): Removed.
13115 (get_all_real_uses): Moved.
13116 (get_forward_read_vl_insn): Removed.
13117 (get_backward_fault_first_load_insn): Removed.
13118 (change_vsetvl_insn): Removed.
13119 (avl_source_has_vsetvl_p): Removed.
13120 (source_equal_p): Moved.
13121 (calculate_sew): Removed.
13122 (same_equiv_note_p): Moved.
13123 (get_expr_id): New.
13124 (incompatible_avl_p): Removed.
13126 (different_sew_p): Removed.
13127 (get_bb_index): New.
13128 (different_lmul_p): Removed.
13129 (has_no_uses): Moved.
13130 (different_ratio_p): Removed.
13131 (different_tail_policy_p): Removed.
13132 (different_mask_policy_p): Removed.
13133 (possible_zero_avl_p): Removed.
13134 (enum demand_flags): New.
13135 (second_ratio_invalid_for_first_sew_p): Removed.
13136 (second_ratio_invalid_for_first_lmul_p): Removed.
13138 (float_insn_valid_sew_p): Removed.
13139 (second_sew_less_than_first_sew_p): Removed.
13140 (first_sew_less_than_second_sew_p): Removed.
13141 (class vsetvl_info): New.
13142 (compare_lmul): Removed.
13143 (second_lmul_less_than_first_lmul_p): Removed.
13144 (second_ratio_less_than_first_ratio_p): Removed.
13145 (DEF_INCOMPATIBLE_COND): Removed.
13146 (greatest_sew): Removed.
13147 (first_sew): Removed.
13148 (second_sew): Removed.
13149 (first_vlmul): Removed.
13150 (second_vlmul): Removed.
13151 (first_ratio): Removed.
13152 (second_ratio): Removed.
13153 (vlmul_for_first_sew_second_ratio): Removed.
13154 (vlmul_for_greatest_sew_second_ratio): Removed.
13155 (ratio_for_second_sew_first_vlmul): Removed.
13156 (class vsetvl_block_info): New.
13157 (DEF_SEW_LMUL_FUSE_RULE): New.
13158 (always_unavailable): Removed.
13159 (avl_unavailable_p): Removed.
13160 (class demand_system): New.
13161 (sew_unavailable_p): Removed.
13162 (lmul_unavailable_p): Removed.
13163 (ge_sew_unavailable_p): Removed.
13164 (ge_sew_lmul_unavailable_p): Removed.
13165 (ge_sew_ratio_unavailable_p): Removed.
13166 (DEF_UNAVAILABLE_COND): Removed.
13167 (same_sew_lmul_demand_p): Removed.
13168 (propagate_avl_across_demands_p): Removed.
13169 (reg_available_p): Removed.
13170 (support_relaxed_compatible_p): Removed.
13171 (demands_can_be_fused_p): Removed.
13172 (earliest_pred_can_be_fused_p): Removed.
13173 (vsetvl_dominated_by_p): Removed.
13174 (avl_info::avl_info): Removed.
13175 (avl_info::single_source_equal_p): Removed.
13176 (avl_info::multiple_source_equal_p): Removed.
13177 (DEF_SEW_LMUL_RULE): New.
13178 (avl_info::operator=): Removed.
13179 (avl_info::operator==): Removed.
13180 (DEF_POLICY_RULE): New.
13181 (avl_info::operator!=): Removed.
13182 (avl_info::has_non_zero_avl): Removed.
13183 (vl_vtype_info::vl_vtype_info): Removed.
13184 (vl_vtype_info::operator==): Removed.
13185 (DEF_AVL_RULE): New.
13186 (vl_vtype_info::operator!=): Removed.
13187 (vl_vtype_info::same_avl_p): Removed.
13188 (vl_vtype_info::same_vtype_p): Removed.
13189 (vl_vtype_info::same_vlmax_p): Removed.
13190 (vector_insn_info::operator>=): Removed.
13191 (vector_insn_info::operator==): Removed.
13192 (class pre_vsetvl): New.
13193 (vector_insn_info::parse_insn): Removed.
13194 (vector_insn_info::compatible_p): Removed.
13195 (vector_insn_info::skip_avl_compatible_p): Removed.
13196 (vector_insn_info::compatible_avl_p): Removed.
13197 (vector_insn_info::compatible_vtype_p): Removed.
13198 (vector_insn_info::available_p): Removed.
13199 (vector_insn_info::fuse_avl): Removed.
13200 (vector_insn_info::fuse_sew_lmul): Removed.
13201 (vector_insn_info::fuse_tail_policy): Removed.
13202 (vector_insn_info::fuse_mask_policy): Removed.
13203 (vector_insn_info::local_merge): Removed.
13204 (vector_insn_info::global_merge): Removed.
13205 (vector_insn_info::get_avl_or_vl_reg): Removed.
13206 (vector_insn_info::update_fault_first_load_avl): Removed.
13207 (vector_insn_info::dump): Removed.
13208 (vector_infos_manager::vector_infos_manager): Removed.
13209 (vector_infos_manager::create_expr): Removed.
13210 (vector_infos_manager::get_expr_id): Removed.
13211 (vector_infos_manager::all_same_ratio_p): Removed.
13212 (vector_infos_manager::all_avail_in_compatible_p): Removed.
13213 (vector_infos_manager::all_same_avl_p): Removed.
13214 (vector_infos_manager::expr_set_num): Removed.
13215 (vector_infos_manager::release): Removed.
13216 (vector_infos_manager::create_bitmap_vectors): Removed.
13217 (vector_infos_manager::free_bitmap_vectors): Removed.
13218 (vector_infos_manager::dump): Removed.
13219 (class pass_vsetvl): Adjust.
13220 (pass_vsetvl::get_vector_info): Removed.
13221 (pass_vsetvl::get_block_info): Removed.
13222 (pass_vsetvl::update_vector_info): Removed.
13223 (pass_vsetvl::update_block_info): Removed.
13224 (pre_vsetvl::compute_avl_def_data): New.
13225 (pass_vsetvl::simple_vsetvl): Removed.
13226 (pass_vsetvl::compute_local_backward_infos): Removed.
13227 (pass_vsetvl::need_vsetvl): Removed.
13228 (pass_vsetvl::transfer_before): Removed.
13229 (pass_vsetvl::transfer_after): Removed.
13230 (pre_vsetvl::compute_vsetvl_def_data): New.
13231 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
13232 (pass_vsetvl::prune_expressions): Removed.
13233 (pass_vsetvl::compute_local_properties): Removed.
13234 (pre_vsetvl::compute_lcm_local_properties): New.
13235 (pass_vsetvl::earliest_fusion): Removed.
13236 (pre_vsetvl::fuse_local_vsetvl_info): New.
13237 (pass_vsetvl::vsetvl_fusion): Removed.
13238 (pass_vsetvl::can_refine_vsetvl_p): Removed.
13239 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
13240 (pass_vsetvl::refine_vsetvls): Removed.
13241 (pass_vsetvl::cleanup_vsetvls): Removed.
13242 (pass_vsetvl::commit_vsetvls): Removed.
13243 (pass_vsetvl::pre_vsetvl): Removed.
13244 (pass_vsetvl::get_vsetvl_at_end): Removed.
13245 (local_avl_compatible_p): Removed.
13246 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
13247 (pre_vsetvl::pre_global_vsetvl_info): New.
13248 (get_first_vsetvl_before_rvv_insns): Removed.
13249 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
13250 (pre_vsetvl::emit_vsetvl): New.
13251 (pass_vsetvl::ssa_post_optimization): Removed.
13252 (pre_vsetvl::cleaup): New.
13253 (pre_vsetvl::remove_avl_operand): New.
13254 (pass_vsetvl::df_post_optimization): Removed.
13255 (pre_vsetvl::remove_unused_dest_operand): New.
13256 (pass_vsetvl::init): Removed.
13257 (pass_vsetvl::done): Removed.
13258 (pass_vsetvl::compute_probabilities): Removed.
13259 (pass_vsetvl::lazy_vsetvl): Adjust.
13260 (pass_vsetvl::execute): Adjust.
13261 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
13262 (DEF_SEW_LMUL_RULE): New.
13263 (DEF_SEW_LMUL_FUSE_RULE): Removed.
13264 (DEF_POLICY_RULE): New.
13265 (DEF_UNAVAILABLE_COND): Removed
13266 (DEF_AVL_RULE): New demand type.
13267 (sew_lmul): New demand type.
13268 (ratio_only): New demand type.
13269 (sew_only): New demand type.
13270 (ge_sew): New demand type.
13271 (ratio_and_ge_sew): New demand type.
13272 (tail_mask_policy): New demand type.
13273 (tail_policy_only): New demand type.
13274 (mask_policy_only): New demand type.
13275 (ignore_policy): New demand type.
13276 (avl): New demand type.
13277 (non_zero_avl): New demand type.
13278 (ignore_avl): New demand type.
13279 * config/riscv/t-riscv: Removed riscv-vsetvl.h
13280 * config/riscv/riscv-vsetvl.h: Removed.
13282 2023-10-20 Alexandre Oliva <oliva@adacore.com>
13284 * tree-eh.cc (make_eh_edges): Return the new edge.
13285 * tree-eh.h (make_eh_edges): Likewise.
13287 2023-10-19 Marek Polacek <polacek@redhat.com>
13289 * doc/contrib.texi: Add entry for Patrick Palka.
13291 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13293 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
13294 compatible with mask parameters in clone.
13295 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
13297 (vectorizable_simd_clone_call): Enable the use of masked clones in
13298 fully masked loops.
13300 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13302 PR tree-optimization/110485
13303 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
13304 vectors usage if a notinbranch simdclone has been selected.
13306 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13308 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
13309 simd clone calls and only use types that are mapped to vectors.
13310 (simd_clone_call_p): New helper function.
13312 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13314 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
13315 poly NIT and ALT_BOUND.
13317 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13319 * tree-parloops.cc (create_loop_fn): Copy specific target and
13320 optimization options to clone.
13322 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
13324 * omp-simd-clone.cc (simd_clone_subparts): Remove.
13325 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
13326 TYPE_VECTOR_SUBPARTS.
13327 (ipa_simd_modify_function_body): Likewise.
13328 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
13329 (simd_clone_subparts): Remove.
13331 2023-10-19 Jason Merrill <jason@redhat.com>
13333 * ABOUT-GCC-NLS: Add usage guidance.
13335 2023-10-19 Jason Merrill <jason@redhat.com>
13337 * diagnostic-core.h (permerror): Rename new overloads...
13338 (permerror_opt): To this.
13339 * diagnostic.cc: Likewise.
13341 2023-10-19 Tamar Christina <tamar.christina@arm.com>
13343 PR tree-optimization/111860
13344 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
13345 Remove PHI nodes that dominate loop.
13347 2023-10-19 Richard Biener <rguenther@suse.de>
13349 PR tree-optimization/111131
13350 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
13351 sure to update all gather/scatter stmt DRs, not only those
13352 that eventually got VMAT_GATHER_SCATTER set.
13353 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
13354 (vect_get_and_check_slp_defs): Handle gathers/scatters,
13355 adding the offset as SLP operand and comparing base and scale.
13356 (vect_build_slp_tree_1): Handle gathers.
13357 (vect_build_slp_tree_2): Likewise.
13359 2023-10-19 Richard Biener <rguenther@suse.de>
13361 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
13363 (vect_build_one_gather_load_call): ... this. Refactor,
13364 inline widening/narrowing support ...
13365 (vectorizable_load): ... here, do gather vectorization
13366 with builtin decls along other gather vectorization.
13368 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13370 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
13371 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
13372 (store_pair_dw_tftf): Rename to ...
13373 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
13374 * config/aarch64/iterators.md (TX2): New.
13376 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13378 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
13379 parameter to give final insn position, infer use of mem if it isn't
13380 specified explicitly.
13381 (function_info::change_insns): Pass down final insn position to
13382 finalize_new_accesses.
13383 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
13385 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13387 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
13388 * rtl-ssa/functions.h (function_info): Declare new member
13389 function reparent_use.
13391 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13393 * rtl-ssa/access-utils.h (drop_memory_access): New.
13395 2023-10-19 Alex Coplan <alex.coplan@arm.com>
13397 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
13398 update the prev pointer on the following nondebug insn in the
13399 case that !insn->is_debug_insn () && next->is_debug_insn ().
13401 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
13403 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
13404 Also make Clearwater Forest depends on Sierra Forest.
13405 * config/i386/i386-options.cc: Revise the order of the macro
13406 definition to avoid confusion.
13407 * doc/extend.texi: Revise documentation.
13408 * doc/invoke.texi: Correct documentation.
13410 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
13412 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
13413 Implement support for --with-multilib-list.
13414 * config/gcn/t-gcn-hsa: Likewise.
13415 * doc/install.texi: Likewise.
13416 * doc/invoke.texi: Mark Fiji deprecated.
13418 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13420 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
13421 vector_costs. Add a constructor.
13422 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
13423 adjust the cost for inner loops.
13424 (loongarch_vector_costs::count_operations): New function.
13425 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
13426 (loongarch_vector_costs::finish_cost): Ditto.
13427 (loongarch_builtin_vectorization_cost): Adjust.
13428 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
13429 (loongarcg-vect-issue-info): Ditto.
13430 (mmemvec-cost): Delete.
13431 * config/loongarch/genopts/loongarch.opt.in
13432 (loongarch-vect-unroll-limit): Ditto.
13433 (loongarcg-vect-issue-info): Ditto.
13434 (mmemvec-cost): Delete.
13435 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
13437 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13439 * config/loongarch/lasx.md
13440 (vec_widen_<su>mult_even_v8si): New patterns.
13441 (vec_widen_<su>add_hi_<mode>): Ditto.
13442 (vec_widen_<su>add_lo_<mode>): Ditto.
13443 (vec_widen_<su>sub_hi_<mode>): Ditto.
13444 (vec_widen_<su>sub_lo_<mode>): Ditto.
13445 (vec_widen_<su>mult_hi_<mode>): Ditto.
13446 (vec_widen_<su>mult_lo_<mode>): Ditto.
13447 * config/loongarch/loongarch.md (u_bool): New iterator.
13448 * config/loongarch/loongarch-protos.h
13449 (loongarch_expand_vec_widen_hilo): New prototype.
13450 * config/loongarch/loongarch.cc
13451 (loongarch_expand_vec_interleave): New function.
13452 (loongarch_expand_vec_widen_hilo): New function.
13454 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
13456 * config/loongarch/lasx.md
13457 (avg<mode>3_ceil): New patterns.
13458 (uavg<mode>3_ceil): Ditto.
13459 (avg<mode>3_floor): Ditto.
13460 (uavg<mode>3_floor): Ditto.
13461 (usadv32qi): Ditto.
13462 (ssadv32qi): Ditto.
13463 * config/loongarch/lsx.md
13464 (avg<mode>3_ceil): New patterns.
13465 (uavg<mode>3_ceil): Ditto.
13466 (avg<mode>3_floor): Ditto.
13467 (uavg<mode>3_floor): Ditto.
13468 (usadv16qi): Ditto.
13469 (ssadv16qi): Ditto.
13471 2023-10-18 Andrew Pinski <pinskia@gmail.com>
13473 PR middle-end/111863
13474 * expr.cc (do_store_flag): Don't over write arg0
13475 when stripping off `& POW2`.
13477 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13479 PR tree-optimization/111648
13480 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
13481 chooses base element from arg, ensure that it's a natural stepped
13483 (build_vec_cst_rand): New param natural_stepped and use it to
13484 construct a naturally stepped sequence.
13485 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
13487 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
13489 * config/pru/pru.cc (pru_insn_cost): New function.
13490 (TARGET_INSN_COST): Define for PRU.
13492 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
13494 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
13495 Test <= instead of testing < twice.
13497 2023-10-18 Jakub Jelinek <jakub@redhat.com>
13499 PR bootstrap/111852
13500 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
13501 using rtx_def type for memory_extend_buf, use unsigned char
13502 arrayy with size of rtx_def and its alignment.
13504 2023-10-18 Jason Merrill <jason@redhat.com>
13506 * doc/invoke.texi: Move -fpermissive to Warning Options.
13507 * diagnostic.cc (update_effective_level_from_pragmas): Remove
13508 redundant system header check.
13509 (diagnostic_report_diagnostic): Move down syshdr/-w check.
13510 (diagnostic_impl): Handle DK_PERMERROR with an option number.
13511 (permerror): Add new overloads.
13512 * diagnostic-core.h (permerror): Declare them.
13514 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
13516 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
13517 to avoid that auxillary statement list reaches LTO.
13519 2023-10-18 Jakub Jelinek <jakub@redhat.com>
13521 PR tree-optimization/111845
13522 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
13523 statements for the 4 operand addition or subtraction of 3 operands
13524 from 1 operand cases and remove them when successful. Look for
13525 nested additions even from rhs[2], not just rhs[1].
13527 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
13530 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
13531 instead of an assert ICE when no -march= has been specified.
13533 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
13535 * config.in: Regenerate.
13536 * config/darwin.cc (darwin_file_start): Add assembler directives
13537 for the target OS version, where these are supported by the
13539 (darwin_override_options): Check for building >= macOS 10.14.
13540 * configure: Regenerate.
13541 * configure.ac: Check for assembler support of .build_version
13544 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13546 PR tree-optimization/109154
13547 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
13548 (typedef struct ifcvt_arg_entry): New.
13549 (cmp_arg_entry): New.
13550 (gen_phi_arg_condition, gen_phi_nest_statement,
13551 predicate_scalar_phi): Use them.
13553 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13555 PR tree-optimization/109154
13556 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
13557 Rewrite to new syntax.
13558 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
13561 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13563 PR tree-optimization/109154
13564 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
13566 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13568 PR tree-optimization/109154
13569 * match.pd: Add new cond_op rule.
13571 2023-10-18 Xi Ruoyao <xry111@xry111.site>
13573 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
13576 2023-10-18 Richard Biener <rguenther@suse.de>
13578 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
13579 Relax check to again allow passing integer mode masks
13580 as traditional vectors.
13582 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13584 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
13585 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
13587 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
13588 (find_guard_arg): Look value up through explicit edge and original defs.
13589 (vect_do_peeling): Use it.
13590 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
13591 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
13593 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
13594 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
13595 optional param to turn off LCSSA mode.
13597 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13599 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
13600 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
13602 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
13603 (vec_init_loop_exit_info): Extend analysis when multiple exits.
13604 (vect_analyze_loop_form): Record conds and determine main cond.
13605 (vect_create_loop_vinfo): Extend bookkeeping of conds.
13606 (vect_analyze_loop): Release conds.
13607 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
13608 LOOP_VINFO_LOOP_IV_COND): New.
13609 (struct vect_loop_form_info): Add conds, alt_loop_conds;
13610 (struct loop_vec_info): Add conds, loop_iv_cond.
13612 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13614 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
13615 (loop_distribution::distribute_loop): Bail out of not single exit.
13616 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
13617 * tree-scalar-evolution.h (get_loop_exit_condition): New.
13618 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
13620 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
13621 vect_set_loop_condition_partial_vectors_avx512,
13622 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
13624 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
13625 return new peeled corresponding peeled exit.
13626 (slpeel_can_duplicate_loop_p): Explicitly take exit.
13627 (find_loop_location): Handle not knowing an explicit exit.
13628 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
13629 find_guard_arg, slpeel_update_phi_nodes_for_loops,
13630 slpeel_update_phi_nodes_for_guard2): Use new exits.
13631 (vect_do_peeling): Update bookkeeping to keep track of exits.
13632 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
13634 (vec_init_loop_exit_info): New.
13635 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
13636 vec_epilogue_loop_iv, scalar_loop_iv.
13637 (vect_analyze_loop_form): Initialize exits.
13638 (vect_create_loop_vinfo): Set main exit.
13639 (vect_create_epilog_for_reduction, vectorizable_live_operation,
13640 vect_transform_loop): Use it.
13641 (scale_profile_for_vect_loop): Explicitly take exit to scale.
13642 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
13643 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
13644 LOOP_VINFO_SCALAR_IV_EXIT): New.
13645 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
13647 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
13648 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
13649 (vec_init_loop_exit_info): New.
13650 (struct vect_loop_form_info): Add loop_exit.
13652 2023-10-18 Tamar Christina <tamar.christina@arm.com>
13654 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
13656 (vectorizable_comparison_1): ...This.
13658 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13660 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
13661 (expand_vec_perm_const_1): Add consecutive pattern recognition.
13663 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13665 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
13667 * common/config/i386/i386-common.cc (processor_name):
13669 (processor_alias_table): Ditto.
13670 * common/config/i386/i386-cpuinfo.h (enum processor_types):
13671 Add INTEL_PANTHERLAKE.
13672 * config.gcc: Add -march=pantherlake.
13673 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
13674 the if clause. Handle pantherlake.
13675 * config/i386/i386-c.cc (ix86_target_macros_internal):
13676 Handle pantherlake.
13677 * config/i386/i386-options.cc (processor_cost_table): Ditto.
13678 (m_PANTHERLAKE): New.
13679 (m_CORE_HYBRID): Add pantherlake.
13680 * config/i386/i386.h (enum processor_type): Ditto.
13681 * doc/extend.texi: Ditto.
13682 * doc/invoke.texi: Ditto.
13684 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13686 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
13687 * config/i386/x86-tune.def: Replace hybrid client tune to
13690 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
13692 * common/config/i386/cpuinfo.h
13693 (get_intel_cpu): Handle Clearwater Forest.
13694 * common/config/i386/i386-common.cc (processor_name):
13695 Add Clearwater Forest.
13696 (processor_alias_table): Ditto.
13697 * common/config/i386/i386-cpuinfo.h (enum processor_types):
13698 Add INTEL_CLEARWATERFOREST.
13699 * config.gcc: Add -march=clearwaterforest.
13700 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
13702 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
13703 * config/i386/i386-options.cc (processor_cost_table): Ditto.
13704 (m_CLEARWATERFOREST): New.
13705 (m_CORE_ATOM): Add clearwaterforest.
13706 * config/i386/i386.h (enum processor_type): Ditto.
13707 * doc/extend.texi: Ditto.
13708 * doc/invoke.texi: Ditto.
13710 2023-10-18 liuhongt <hongtao.liu@intel.com>
13712 * config/i386/mmx.md (fma<mode>4): New expander.
13713 (fms<mode>4): Ditto.
13714 (fnma<mode>4): Ditto.
13715 (fnms<mode>4): Ditto.
13716 (vec_fmaddsubv4hf4): Ditto.
13717 (vec_fmsubaddv4hf4): Ditto.
13719 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13722 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
13724 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13726 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
13727 the position of the LR save slot dependent on stack clash
13728 protection unless shadow call stacks are enabled.
13730 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13732 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
13733 store the list saved GPRs, FPRs and predicate registers.
13734 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
13735 the lists of saved registers. Use them to choose push candidates.
13736 Invalidate pop candidates if we're not going to do a pop.
13737 (aarch64_next_callee_save): Delete.
13738 (aarch64_save_callee_saves): Take a list of registers,
13739 rather than a range. Make !skip_wb select only write-back
13741 (aarch64_expand_prologue): Update calls accordingly.
13742 (aarch64_restore_callee_saves): Take a list of registers,
13743 rather than a range. Always skip pop candidates. Also skip
13744 LR if shadow call stacks are enabled.
13745 (aarch64_expand_epilogue): Update calls accordingly.
13747 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
13749 * cfgbuild.h (find_sub_basic_blocks): Declare.
13750 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
13752 (find_many_sub_basic_blocks): ...here.
13753 (find_sub_basic_blocks): New function.
13754 * function.cc (thread_prologue_and_epilogue_insns): Handle
13755 epilogues that contain jumps.
13757 2023-10-17 Andrew Pinski <apinski@marvell.com>
13759 PR tree-optimization/110817
13760 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
13761 check for boolean type as they don't have "[0,1]" range.
13763 2023-10-17 Andrew Pinski <pinskia@gmail.com>
13765 PR tree-optimization/111432
13766 * match.pd (`a & (x | CST)`): New pattern.
13768 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13770 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
13773 2023-10-17 Richard Biener <rguenther@suse.de>
13775 PR tree-optimization/111846
13776 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
13777 (SLP_TREE_SIMD_CLONE_INFO): New.
13778 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
13779 SLP_TREE_SIMD_CLONE_INFO.
13780 (_slp_tree::~_slp_tree): Release it.
13781 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
13782 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
13783 dependent on if we're doing SLP.
13785 2023-10-17 Jakub Jelinek <jakub@redhat.com>
13787 * wide-int-print.h (print_dec_buf_size): For length, divide number
13788 of bits by 3 and add 3 instead of division by 4 and adding 4.
13789 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
13790 print_hex, instead call print_decu on either negated value after
13791 printing - or on wi itself.
13792 (print_decu): Don't call print_hex, instead print even large numbers
13794 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
13795 even if it returns false.
13796 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
13797 pp_wide_int_large should be used.
13798 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
13799 to compute needed buffer size.
13801 2023-10-17 Richard Biener <rguenther@suse.de>
13803 PR middle-end/111818
13804 * tree-ssa.cc (maybe_optimize_var): When clearing
13805 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
13807 2023-10-17 Richard Biener <rguenther@suse.de>
13809 PR tree-optimization/111807
13810 * tree-sra.cc (build_ref_for_model): Only call
13811 build_reconstructed_reference when the offsets are the same.
13813 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
13816 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
13818 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
13820 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
13821 fix impl related to vec_initv32qiv16qi template to avoid ICE.
13823 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
13824 Chenghua Xu <xuchenghua@loongson.cn>
13826 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
13829 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13831 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
13832 (get_store_value): New function.
13834 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
13836 * explow.cc (probe_stack_range): Handle case when expand_binop
13837 does not construct its result in the expected location.
13839 2023-10-16 David Malcolm <dmalcolm@redhat.com>
13841 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
13842 default for -fdiagnostics-text-art-charset from emoji to ascii.
13843 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
13845 2023-10-16 David Malcolm <dmalcolm@redhat.com>
13847 * diagnostic.cc (diagnostic_initialize): Ensure
13848 context->extra_output_kind is initialized.
13850 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
13852 * config/i386/i386.cc (ix86_can_inline_p):
13853 Handle CM_LARGE and CM_LARGE_PIC.
13854 (x86_elf_aligned_decl_common): Ditto.
13855 (x86_output_aligned_bss): Ditto.
13856 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
13857 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
13859 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
13861 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
13862 prototype. Improve comment.
13863 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
13864 into riscv-string.cc.
13865 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
13866 (riscv_expand_block_move): Likewise.
13867 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
13869 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
13870 (riscv_expand_block_move): Likewise.
13872 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
13874 * Makefile.in: Add fold-mem-offsets.o.
13875 * passes.def: Schedule a new pass.
13876 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
13877 * common.opt: New options.
13878 * doc/invoke.texi: Document new option.
13879 * fold-mem-offsets.cc: New file.
13881 2023-10-16 Andrew Pinski <pinskia@gmail.com>
13883 PR tree-optimization/101541
13884 * match.pd (A CMP 0 ? A : -A): Improve
13885 using bitwise_equal_p.
13887 2023-10-16 Andrew Pinski <pinskia@gmail.com>
13889 PR tree-optimization/31531
13890 * match.pd (~X op ~Y): Allow for an optional nop convert.
13891 (~X op C): Likewise.
13893 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
13895 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
13896 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
13898 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13900 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
13901 unsigned vector element.
13903 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13905 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
13907 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
13909 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
13910 by get_range_query.
13911 * gimple-fold.cc (size_must_be_zero_p): Likewise.
13912 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
13913 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
13914 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
13916 2023-10-16 liuhongt <hongtao.liu@intel.com>
13918 * config/i386/mmx.md (V2FI_32): New mode iterator
13919 (movd_v2hf_to_sse): Rename to ..
13920 (movd_<mode>_to_sse): .. this.
13921 (movd_v2hf_to_sse_reg): Rename to ..
13922 (movd_<mode>_to_sse_reg): .. this.
13923 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
13925 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
13926 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
13927 (float<floatunssuffix>v2siv2hf2): Ditto.
13928 (extendv2hfv2sf2): Ditto.
13929 (truncv2sfv2hf2): Ditto.
13930 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
13931 (*vec_concat<mode>_movss): .. this.
13933 2023-10-16 liuhongt <hongtao.liu@intel.com>
13935 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
13937 (ix86_expand_round_sse4): Ditto.
13938 * config/i386/i386.md (roundhf2): New expander.
13939 (lroundhf<mode>2): Ditto.
13940 (lrinthf<mode>2): Ditto.
13941 (l<rounding_insn>hf<mode>2): Ditto.
13942 * config/i386/mmx.md (sqrt<mode>2): Ditto.
13943 (btrunc<mode>2): Ditto.
13944 (nearbyint<mode>2): Ditto.
13945 (rint<mode>2): Ditto.
13946 (lrint<mode><mmxintvecmodelower>2): Ditto.
13947 (floor<mode>2): Ditto.
13948 (lfloor<mode><mmxintvecmodelower>2): Ditto.
13949 (ceil<mode>2): Ditto.
13950 (lceil<mode><mmxintvecmodelower>2): Ditto.
13951 (round<mode>2): Ditto.
13952 (lround<mode><mmxintvecmodelower>2): Ditto.
13953 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
13954 (lfloor<mode><sseintvecmodelower>2): Ditto.
13955 (lceil<mode><sseintvecmodelower>2): Ditto.
13956 (lround<mode><sseintvecmodelower>2): Ditto.
13957 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
13958 (round<mode>2): Extend to V8HF/V16HF/V32HF.
13960 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
13962 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
13963 @code; document more completely the supported Fortran sentinels.
13965 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
13967 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
13968 instead of expand_binop. Optimize cases (i.e. avoid generating
13969 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
13970 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
13972 2023-10-15 Jakub Jelinek <jakub@redhat.com>
13974 PR tree-optimization/111800
13975 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
13976 print_decu_buf_size, print_hex_buf_size): New inline functions.
13977 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
13978 (assert_hexeq): Use print_hex_buf_size.
13979 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
13980 (print_decu): Use print_decu_buf_size.
13981 (print_hex): Use print_hex_buf_size.
13982 (pp_wide_int_large): Use print_dec_buf_size.
13983 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
13984 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
13986 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
13987 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
13989 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13991 * combine.cc (simplify_compare_const): Fix handling of unsigned
13994 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13996 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
13998 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
14000 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
14001 'omp allocate' for stack variables.
14003 2023-10-14 Jakub Jelinek <jakub@redhat.com>
14006 * tree-core.h (struct tree_base): Remove int_length.offset
14007 member, change type of int_length.unextended and int_length.extended
14008 from unsigned char to unsigned short.
14009 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
14010 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
14011 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
14012 TREE_INT_CST_NUNITS.
14013 * tree.cc (wide_int_to_tree_1): Don't assert
14014 TREE_INT_CST_OFFSET_NUNITS value.
14015 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
14016 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
14017 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
14018 (trailing_wide_int_storage): Change m_len type from unsigned char *
14019 to unsigned short *.
14020 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
14021 argument from unsigned char * to unsigned short *.
14022 (trailing_wide_ints): Change m_max_len type from unsigned char to
14023 unsigned short. Change m_len element type from
14024 struct{unsigned char len;} to unsigned short.
14025 (trailing_wide_ints <N>::operator []): Remove .len from m_len
14027 * value-range-storage.h (irange_storage::lengths_address): Change
14028 return type from const unsigned char * to const unsigned short *.
14029 (irange_storage::write_lengths_address): Change return type from
14030 unsigned char * to unsigned short *.
14031 * value-range-storage.cc (irange_storage::write_lengths_address):
14033 (irange_storage::lengths_address): Change return type from
14034 const unsigned char * to const unsigned short *.
14035 (write_wide_int): Change len argument type from unsigned char *&
14036 to unsigned short *&.
14037 (irange_storage::set_irange): Change len variable type from
14038 unsigned char * to unsigned short *.
14039 (read_wide_int): Change len argument type from unsigned char to
14040 unsigned short. Use trailing_wide_int_storage <unsigned short>
14041 instead of trailing_wide_int_storage and
14042 trailing_wide_int <unsigned short> instead of trailing_wide_int.
14043 (irange_storage::get_irange): Change len variable type from
14044 unsigned char * to unsigned short *.
14045 (irange_storage::size): Multiply n by sizeof (unsigned short)
14046 in len_size variable initialization.
14047 (irange_storage::dump): Change len variable type from
14048 unsigned char * to unsigned short *.
14050 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14052 * config/riscv/vector-iterators.md: Remove redundant iterators.
14054 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
14056 PR tree-optimization/111622
14057 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
14058 register a partial equivalence if an operand has no uses.
14060 2023-10-13 Richard Biener <rguenther@suse.de>
14062 PR tree-optimization/111795
14063 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
14064 integer mode mask arguments.
14066 2023-10-13 Richard Biener <rguenther@suse.de>
14068 * tree-vect-slp.cc (mask_call_maps): New.
14069 (vect_get_operand_map): Handle IFN_MASK_CALL.
14070 (vect_build_slp_tree_1): Likewise.
14071 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
14074 2023-10-13 Richard Biener <rguenther@suse.de>
14076 PR tree-optimization/111779
14077 * tree-sra.cc (sra_handled_bf_read_p): New function.
14078 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
14079 (sra_modify_expr): Likewise.
14080 (make_fancy_name_1): Skip over BIT_FIELD_REF.
14082 2023-10-13 Richard Biener <rguenther@suse.de>
14084 PR tree-optimization/111773
14085 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
14086 not elide noreturn calls that are reflected to the IL.
14088 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
14090 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
14092 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
14094 2023-10-13 Pan Li <pan2.li@intel.com>
14096 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
14097 pattern for lfloor/lfloorf.
14098 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
14099 (expand_vec_lfloor): New func decl for expanding lfloor.
14100 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
14101 for expanding lfloor.
14103 2023-10-13 Pan Li <pan2.li@intel.com>
14105 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
14106 pattern] for lceil/lceilf.
14107 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
14108 (expand_vec_lceil): New func decl for expanding lceil.
14109 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
14110 for expanding lceil.
14112 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
14115 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
14116 code from shifts that are undefined.
14117 (can_be_built_by_li_lis_and_rldicr): Likewise.
14118 (can_be_built_by_li_and_rldic): Protect code from shifts that
14119 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
14121 2023-10-12 Alex Coplan <alex.coplan@arm.com>
14123 * reg-notes.def (NOALIAS): Correct comment.
14125 2023-10-12 Jakub Jelinek <jakub@redhat.com>
14127 PR bootstrap/111787
14128 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
14129 static data member.
14130 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
14131 (wi::ints_for): Provide separate partial specializations for
14132 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
14133 and CONST_PRECISION, rather than using
14134 int_traits <extended_tree <N> >::precision_type as the second template
14136 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
14137 static data member.
14138 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
14141 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
14143 PR middle-end/111777
14144 * doc/extend.texi: Change subsubsection to subsection for
14147 2023-10-12 Tamar Christina <tamar.christina@arm.com>
14149 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
14151 2023-10-12 Jakub Jelinek <jakub@redhat.com>
14153 * wide-int.h (widest_int_storage <N>::write_val): If l is small
14154 and there is space in u.val array, store a canary value at the
14156 (widest_int_storage <N>::set_len): Check the canary hasn't been
14159 2023-10-12 Jakub Jelinek <jakub@redhat.com>
14162 * wide-int.h: Adjust file comment.
14163 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
14164 (WIDE_INT_MAX_INL_PRECISION): Define.
14165 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
14166 is smaller than WIDE_INT_MAX_ELTS.
14167 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
14168 WIDEST_INT_MAX_PRECISION): Define.
14169 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
14170 to pass 0 as a new argument.
14171 (class widest_int_storage): Likewise.
14172 (widest_int, widest2_int): Change typedefs to use widest_int_storage
14173 rather than fixed_wide_int_storage.
14174 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
14175 (struct binary_traits): Add partial specializations for
14176 INL_CONST_PRECISION.
14177 (generic_wide_int): Add needs_write_val_arg static data member.
14178 (int_traits): Likewise.
14179 (wide_int_storage): Replace val non-static data member with a union
14180 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
14181 assignment operator and destructor. Add unsigned int argument to
14183 (wide_int_storage::wide_int_storage): Initialize precision to 0
14184 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
14185 Assert in non-default ctor T's precision_type is not
14186 INL_CONST_PRECISION and allocate u.valp for large precision. Add
14188 (wide_int_storage::~wide_int_storage): New.
14189 (wide_int_storage::operator=): Add copy assignment operator. In
14190 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
14191 assert ctor T's precision_type is not INL_CONST_PRECISION and
14192 if precision changes, deallocate and/or allocate u.valp.
14193 (wide_int_storage::get_val): Return u.valp rather than u.val for
14195 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
14197 (wide_int_storage::set_len): Use write_val instead of writing val
14199 (wide_int_storage::from, wide_int_storage::from_array): Adjust
14201 (wide_int_storage::create): Allocate u.valp for large precisions.
14202 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
14203 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
14205 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
14206 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
14207 Adjust write_val callers.
14208 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
14209 (WIDEST_INT): Define.
14210 (widest_int_storage): New template class.
14211 (wi::int_traits <widest_int_storage>): New.
14212 (trailing_wide_int_storage::write_val): Add unused unsigned int
14214 (wi::get_binary_precision): Use
14215 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
14216 rather than get_precision on get_binary_result.
14217 (wi::copy): Adjust write_val callers. Don't call set_len if
14218 needs_write_val_arg.
14219 (wi::bit_not): If result.needs_write_val_arg, call write_val
14220 again with upper bound estimate of len.
14221 (wi::sext, wi::zext, wi::set_bit): Likewise.
14222 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
14223 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
14224 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
14225 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
14226 wi::lshift, wi::lrshift, wi::arshift): Likewise.
14227 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
14229 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
14230 generic_wide_int, instead add functions and templates for each
14231 storage of generic_wide_int. Make functions for
14232 generic_wide_int <wide_int_storage> and templates for
14233 generic_wide_int <widest_int_storage <N>> deleted.
14234 (wi::mask, wi::shifted_mask): Adjust write_val calls.
14235 * wide-int.cc (zeros): Decrease array size to 1.
14236 (BLOCKS_NEEDED): Use CEIL.
14237 (canonize): Use HOST_WIDE_INT_M1.
14238 (wi::from_buffer): Pass 0 to write_val.
14239 (wi::to_mpz): Use CEIL.
14240 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
14241 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
14242 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
14243 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
14244 above WIDE_INT_MAX_INL_PRECISION estimate precision from
14245 lengths of operands. Use XALLOCAVEC allocated buffers for
14246 prec above WIDE_INT_MAX_INL_PRECISION.
14247 (wi::divmod_internal): Likewise.
14248 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
14249 it from xlen and skip.
14250 (rshift_large_common): Remove xprecision argument, add len
14251 argument with len computed in caller. Don't return anything.
14252 (wi::lrshift_large, wi::arshift_large): Compute len here
14253 and pass it to rshift_large_common, for lengths above
14254 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
14255 (assert_deceq, assert_hexeq): For lengths above
14256 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
14257 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
14258 WIDE_INT_MAX_PRECISION.
14259 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
14260 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
14261 * wide-int-print.cc (print_decs, print_decu, print_hex): For
14262 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
14263 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
14264 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
14265 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
14266 WIDE_INT_MAX_PRECISION.
14267 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
14268 instead of hard coded CONST_PRECISION.
14269 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
14270 WIDE_INT_MAX_PRECISION.
14271 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
14272 than WIDE_INT_MAX_PRECISION.
14273 (wi::ints_for::zero): Use
14274 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
14275 wi::CONST_PRECISION.
14276 * tree.cc (build_replicated_int_cst): Formatting fix. Use
14277 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
14278 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
14279 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
14280 * double-int.h (wi::int_traits <double_int>::precision_type): Change
14281 to INL_CONST_PRECISION from CONST_PRECISION.
14282 * poly-int.h (struct poly_coeff_traits): Add partial specialization
14283 for wi::INL_CONST_PRECISION.
14284 * cfgloop.h (bound_wide_int): New typedef.
14285 (struct nb_iter_bound): Change bound type from widest_int to
14287 (struct loop): Change nb_iterations_upper_bound,
14288 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
14289 widest_int to bound_wide_int.
14290 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
14291 of i_bound is too large for bound_wide_int. Adjustments for the
14292 widest_int to bound_wide_int type change in non-static data members.
14293 (get_estimated_loop_iterations, get_max_loop_iterations,
14294 get_likely_max_loop_iterations): Adjustments for the widest_int to
14295 bound_wide_int type change in non-static data members.
14296 * tree-vect-loop.cc (vect_transform_loop): Likewise.
14297 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
14298 XALLOCAVEC allocated buffer for i_bound len above
14299 WIDE_INT_MAX_INL_ELTS.
14300 (record_estimate): Return early if wi::min_precision of i_bound is too
14301 large for bound_wide_int. Adjustments for the widest_int to
14302 bound_wide_int type change in non-static data members.
14303 (wide_int_cmp): Use bound_wide_int instead of widest_int.
14304 (bound_index): Use bound_wide_int instead of widest_int.
14305 (discover_iteration_bound_by_body_walk): Likewise. Use
14306 widest_int::from to convert it to widest_int when passed to
14307 record_niter_bound.
14308 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
14309 widest_int when passed to record_niter_bound.
14310 (estimate_numbers_of_iteration): Don't record upper bound if
14311 loop->nb_iterations has too large precision for bound_wide_int.
14312 (n_of_executions_at_most): Use widest_int::from.
14313 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
14314 the widest_int to bound_wide_int changes.
14315 * match.pd (fold_sign_changed_comparison simplification): Use
14316 wide_int::from on wi::to_wide instead of wi::to_widest.
14317 * value-range.h (irange::maybe_resize): Avoid using memcpy on
14318 non-trivially copyable elements.
14319 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
14320 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
14321 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
14322 Use wide_int::from on wi::to_wide instead of wi::to_widest.
14323 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
14324 before calling wi::udiv_trunc.
14325 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
14326 bound_wide_int type change in non-static data members.
14327 * lto-streamer-in.cc (input_cfg): Likewise.
14328 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
14329 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
14330 XALLOCAVEC allocated buffer. Formatting fix.
14331 * data-streamer-in.cc (streamer_read_wide_int,
14332 streamer_read_widest_int): Likewise.
14333 * tree-affine.cc (aff_combination_expand): Use placement new to
14334 construct name_expansion.
14335 (free_name_expansion): Destruct name_expansion.
14336 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
14337 index type from widest_int to offset_int.
14338 (class incr_info_d): Change incr type from widest_int to offset_int.
14339 (alloc_cand_and_find_basis, backtrace_base_for_ref,
14340 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
14341 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
14342 slsr_process_add, cand_abs_increment, replace_mult_candidate,
14343 replace_unconditional_candidate, incr_vec_index,
14344 create_add_on_incoming_edge, create_phi_basis_1,
14345 replace_conditional_candidate, record_increment,
14346 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
14347 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
14348 nearest_common_dominator_for_cands, insert_initializers,
14349 all_phi_incrs_profitable_1, replace_one_candidate,
14350 replace_profitable_candidates): Use offset_int rather than widest_int
14351 and wi::to_offset rather than wi::to_widest.
14352 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
14353 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
14355 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
14356 to construct tree_niter_desc and destruct it on failure.
14357 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
14358 * gengtype.cc (main): Remove widest_int handling.
14359 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
14360 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
14361 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
14362 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
14363 assert get_len () fits into it.
14364 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
14365 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
14367 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
14368 wide_int::from on wi::to_wide instead of wi::to_widest.
14369 * omp-general.cc (score_wide_int): New typedef.
14370 (omp_context_compute_score): Use score_wide_int instead of widest_int
14371 and adjust for those changes.
14372 (struct omp_declare_variant_entry): Change score and
14373 score_in_declare_simd_clone non-static data member type from widest_int
14375 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
14376 score_wide_int instead of widest_int and adjust for those changes.
14377 (omp_lto_output_declare_variant_alt): Likewise.
14378 (omp_lto_input_declare_variant_alt): Likewise.
14379 * godump.cc (go_output_typedef): Assert get_len () is smaller than
14380 WIDE_INT_MAX_INL_ELTS.
14382 2023-10-12 Pan Li <pan2.li@intel.com>
14384 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
14385 pattern for lround/lroundf.
14386 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
14387 (expand_vec_lround): New func decl for expanding lround.
14388 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
14389 for expanding lround.
14391 2023-10-12 Jakub Jelinek <jakub@redhat.com>
14393 * dwarf2out.h (wide_int_ptr): Remove.
14394 (dw_wide_int_ptr): New typedef.
14395 (struct dw_val_node): Change type of val_wide from wide_int_ptr
14396 to dw_wide_int_ptr.
14397 (struct dw_wide_int): New type.
14398 (dw_wide_int::elt): New method.
14399 (dw_wide_int::operator ==): Likewise.
14400 * dwarf2out.cc (get_full_len): Change argument type to
14401 const dw_wide_int & from const wide_int &. Use CEIL. Call
14402 get_precision method instead of calling wi::get_precision.
14403 (alloc_dw_wide_int): New function.
14404 (add_AT_wide): Change w argument type to const wide_int_ref &
14405 from const wide_int &. Use alloc_dw_wide_int.
14406 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
14407 (insert_wide_int): Change val argument type to const wide_int_ref &
14408 from const wide_int &.
14409 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
14410 add_AT_wide instead of using a temporary variable.
14412 2023-10-12 Richard Biener <rguenther@suse.de>
14414 PR tree-optimization/111764
14415 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
14416 to allow x + x via special-casing of assigns.
14418 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
14420 * common/config/i386/cpuinfo.h (get_available_features):
14422 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
14423 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
14424 (ix86_handle_option): Handle -musermsr.
14425 * common/config/i386/i386-cpuinfo.h (enum processor_features):
14426 Add FEATURE_USER_MSR.
14427 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
14428 * config.gcc: Add usermsrintrin.h
14429 * config/i386/cpuid.h (bit_USER_MSR): New.
14430 * config/i386/i386-builtin-types.def:
14431 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
14432 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
14433 Add __builtin_urdmsr and __builtin_uwrmsr.
14434 * config/i386/i386-builtins.h (ix86_builtins):
14435 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
14436 * config/i386/i386-c.cc (ix86_target_macros_internal):
14437 Define __USER_MSR__.
14438 * config/i386/i386-expand.cc (ix86_expand_builtin):
14439 Handle new builtins.
14440 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
14441 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
14443 * config/i386/i386.md (urdmsr): New define_insn.
14445 * config/i386/i386.opt: Add option -musermsr.
14446 * config/i386/x86gprintrin.h: Include usermsrintrin.h
14447 * doc/extend.texi: Document usermsr.
14448 * doc/invoke.texi: Document -musermsr.
14449 * doc/sourcebuild.texi: Document target usermsr.
14450 * config/i386/usermsrintrin.h: New file.
14452 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
14454 * config.gcc: Add loongarch-driver.h to tm_files.
14455 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
14456 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
14457 instead of $(TM_H) for building generator programs.
14459 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14462 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
14463 instruction emission and incorporate to stack_protect_set<mode>.
14464 (stack_protect_setdi): Rename to ...
14465 (stack_protect_set<mode>): ... this, adjust constraint.
14466 (stack_protect_testsi): Support prefixed instruction emission and
14467 incorporate to stack_protect_test<mode>.
14468 (stack_protect_testdi): Rename to ...
14469 (stack_protect_test<mode>): ... this, adjust constraint.
14471 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14473 * tree-vect-stmts.cc (vectorizable_store): Consider generated
14474 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
14477 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14479 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
14480 (vectorizable_store): Adjust the costing for the remaining memory
14481 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
14483 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14485 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
14486 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
14488 (vectorizable_store): Adjust the cost handling on
14489 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
14491 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14493 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
14494 get VMAT_LOAD_STORE_LANES.
14495 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
14496 without calling vect_model_store_cost. Factor out new lambda function
14497 update_prologue_cost.
14499 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14501 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
14502 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
14504 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
14505 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
14507 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14509 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
14510 vectorizable_scan_store without calling vect_model_store_cost
14513 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14515 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
14516 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
14517 handlings and the related parameter gs_info.
14518 (vect_build_scatter_store_calls): Add the handlings on costing with
14519 one more argument cost_vec.
14520 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
14521 without calling vect_model_store_cost any more.
14523 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14525 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
14526 to vect_model_store_cost down to some different transform paths
14527 according to the handlings of different vect_memory_access_types
14528 or some special handling need.
14530 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
14532 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
14533 vector store for some case of VMAT_ELEMENTWISE is supported.
14535 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
14536 Hu Lin1 <lin1.hu@intel.com>
14537 Hongyu Wang <hongyu.wang@intel.com>
14539 * config/i386/i386.cc (gen_push2): New function to emit push2
14540 and adjust cfa offset.
14541 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
14542 determine whether push2/pop2 can be used.
14543 (ix86_compute_frame_layout): Adjust preferred stack boundary
14544 and stack alignment needed for push2/pop2.
14545 (ix86_emit_save_regs): Emit push2 when available.
14546 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
14547 and adjust cfa info.
14548 (ix86_emit_restore_regs_using_pop2): New function to loop
14549 through the saved regs and call above.
14550 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
14551 when push2pop2 available.
14552 * config/i386/i386.md (push2_di): New pattern for push2.
14553 (pop2_di): Likewise for pop2.
14555 2023-10-12 Pan Li <pan2.li@intel.com>
14557 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
14558 (lrint<mode><v_i_l_ll_convert>2): Rename to.
14559 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
14561 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14563 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
14565 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
14567 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
14568 pseudo op instead of a "call" pseudo op.
14570 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14572 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
14574 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
14575 (riscv_subset_list::clone): Ditto.
14576 (riscv_subset_list::parse_single_ext): Ditto.
14577 (riscv_subset_list::set_loc): Ditto.
14578 (riscv_set_arch_by_subset_list): Ditto.
14579 * common/config/riscv/riscv-common.cc
14580 (riscv_subset_list::parse_single_std_ext): New.
14581 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
14582 (riscv_subset_list::clone): Ditto.
14583 (riscv_subset_list::parse_single_ext): Ditto.
14584 (riscv_subset_list::set_loc): Ditto.
14585 (riscv_set_arch_by_subset_list): Ditto.
14587 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14589 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
14590 from argument rather than get setting from global setting.
14591 (riscv_override_options_internal): New, splited from
14592 riscv_override_options, also take a gcc_options argument.
14593 (riscv_option_override): Splited most part to
14594 riscv_override_options_internal.
14596 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
14598 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
14599 TARGET_<NAME>_OPTS_P.
14600 (InverseMask): Ditto.
14601 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
14602 TARGET_<NAME>_OPTS_P macro.
14603 (InverseMask): Ditto.
14605 2023-10-11 Andrew Pinski <pinskia@gmail.com>
14607 PR tree-optimization/111282
14608 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
14609 `a & ((~a) ^ b)`): New patterns.
14611 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
14613 * common/config/riscv/riscv-common.cc: Add the XCValu
14615 * config/riscv/constraints.md: Add builtins for the XCValu
14617 * config/riscv/predicates.md (immediate_register_operand):
14619 * config/riscv/corev.def: Likewise.
14620 * config/riscv/corev.md: Likewise.
14621 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
14622 (RISCV_ATYPE_UHI): Likewise.
14623 * config/riscv/riscv-ftypes.def: Likewise.
14624 * config/riscv/riscv.opt: Likewise.
14625 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
14626 * doc/extend.texi: Add XCValu documentation.
14627 * doc/sourcebuild.texi: Likewise.
14629 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
14631 * common/config/riscv/riscv-common.cc: Add XCVmac.
14632 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
14633 * config/riscv/riscv-builtins.cc: Likewise.
14634 * config/riscv/riscv.md: Likewise.
14635 * config/riscv/riscv.opt: Likewise.
14636 * doc/extend.texi: Add XCVmac builtin documentation.
14637 * doc/sourcebuild.texi: Likewise.
14638 * config/riscv/corev.def: New file.
14639 * config/riscv/corev.md: New file.
14641 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14643 * config/riscv/autovec.md: Fix index bug.
14644 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
14645 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
14646 (gather_scatter_valid_offset_mode_p): New function.
14648 2023-10-11 Pan Li <pan2.li@intel.com>
14650 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
14652 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
14653 for expanding lint.
14654 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
14656 (expand_vec_lrint): New function impl for expanding lint.
14657 * config/riscv/vector-iterators.md: New mode attr and iterator.
14659 2023-10-11 Richard Biener <rguenther@suse.de>
14660 Jakub Jelinek <jakub@redhat.com>
14662 PR tree-optimization/111519
14663 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
14664 argument and pass it through to recursive calls and
14665 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
14666 change stmt for gimple_assign_single_p statements for which we don't
14668 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
14669 it through to recursive calls and count_nonzero_bytes calls. Don't
14670 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
14671 shadow the stmt argument.
14673 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
14675 PR middle-end/101955
14676 PR tree-optimization/106245
14677 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
14678 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
14680 2023-10-11 liuhongt <hongtao.liu@intel.com>
14683 * config/i386/mmx.md (divv4hf3): Refine predicate of
14684 operands[2] with register_operand.
14686 2023-10-10 Andrew Waterman <andrew@sifive.com>
14687 Philipp Tomsich <philipp.tomsich@vrull.eu>
14688 Jeff Law <jlaw@ventanamicro.com>
14690 * config/riscv/riscv.cc (struct machine_function): Track if a
14691 far-branch/jump is used within a function (and $ra needs to be
14693 (riscv_print_operand): Implement 'N' (inverse integer branch).
14694 (riscv_far_jump_used_p): Implement.
14695 (riscv_save_return_addr_reg_p): New function.
14696 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
14697 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
14698 (CALL_USED_REGISTERS): Update $ra.
14699 * config/riscv/riscv.md: Add new types "ret" and "jalr".
14700 (length attribute): Handle long conditional and unconditional
14702 (conditional branch pattern): Handle case where jump can not
14703 reach the intended target.
14704 (indirect_jump, tablejump): Use new "jalr" type.
14705 (simple_return): Use new "ret" type.
14706 (simple_return_internal, eh_return_internal): Likewise.
14707 (gpr_restore_return, riscv_mret): Likewise.
14708 (riscv_uret, riscv_sret): Likewise.
14709 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
14711 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
14713 2023-10-10 Andrew Pinski <pinskia@gmail.com>
14715 PR tree-optimization/111679
14716 * match.pd (`a | ((~a) ^ b)`): New pattern.
14718 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14721 * config/riscv/autovec.md: Add VLS BOOL modes.
14723 2023-10-10 Richard Biener <rguenther@suse.de>
14725 PR tree-optimization/111751
14726 * fold-const.cc (fold_view_convert_expr): Up the buffer size
14728 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
14729 constants, giving up when re-interpretation to the target type
14732 2023-10-10 Richard Biener <rguenther@suse.de>
14734 PR tree-optimization/111751
14735 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
14736 BLKmode result from the padding bits check.
14738 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
14740 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
14742 * config/arc/arc.md (addsi_compare): Make pattern canonical.
14743 (addsi_compare_2): Fix identation, constraint letters.
14744 (addsi_compare_3): Likewise.
14746 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
14748 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
14749 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
14750 when scaling loop profile
14752 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
14754 PR tree-optimization/111694
14755 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
14757 * value-relation.cc (adjust_equivalence_range): New.
14758 * value-relation.h (adjust_equivalence_range): New prototype.
14760 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
14762 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
14763 not call get_identity_relation.
14764 (gori_compute::compute_operand2_range): Ditto.
14765 * value-relation.cc (get_identity_relation): Remove.
14766 * value-relation.h (get_identity_relation): Remove protyotype.
14768 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
14770 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
14771 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
14773 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
14775 (TARGET_SCHED_ADJUST_COST): Define.
14776 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
14777 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
14778 * config/riscv/generic-ooo.md: New file.
14779 * config/riscv/vector.md: Add vsetvl_pre.
14781 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14783 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
14784 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
14785 * config/riscv/vector.md (movmisalign<mode>): New pattern.
14787 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
14789 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
14790 directives for store-pair instruction.
14792 2023-10-09 Richard Biener <rguenther@suse.de>
14794 PR tree-optimization/111715
14795 * alias.cc (reference_alias_ptr_type_1): When we have
14796 a type-punning ref at the base search for the access
14797 path part that's still semantically valid.
14799 2023-10-09 Pan Li <pan2.li@intel.com>
14801 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
14803 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
14805 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
14807 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
14808 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
14810 (ix86_split_lshr): Likewise, split shifts by one bit into
14811 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
14812 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
14813 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
14814 (rcrdi2): New define_insn for rcrq.
14815 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
14816 set the carry flag from the least significant bit, modelled using
14818 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
14819 controlling use of rcr 1 vs. shrd, which is significantly faster on
14822 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14824 * config/i386/i386.opt: Allow -mno-evex512.
14826 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14827 Hu, Lin1 <lin1.hu@intel.com>
14829 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
14832 (VFH_AVX512VL): Ditto.
14834 (VHF_AVX512VL): Ditto.
14835 (VI2H_AVX512VL): Ditto.
14836 (VI2F_256_512): Ditto.
14837 (VF48_I1248): Remove unused iterator.
14838 (VF48H_AVX512VL): Add TARGET_EVEX512.
14839 (VF_AVX512): Remove unused iterator.
14840 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
14841 (REDUC_SMINMAX_MODE): Ditto.
14843 (VFH_SF_AVX512VL): Ditto.
14844 (VEC_PERM_AVX2): Ditto.
14846 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14847 Hu, Lin1 <lin1.hu@intel.com>
14849 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
14851 (VI1_AVX512F): Ditto.
14852 (VI1_AVX512VNNI): Ditto.
14853 (VI1_AVX512VL_F): Ditto.
14854 (VI12_VI48F_AVX512VL): Ditto.
14855 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
14856 (sdot_prod<mode>): Ditto.
14857 (VEC_PERM_AVX2): Ditto.
14860 (vpmadd52<vpmadd52type>v8di): Ditto.
14861 (usdot_prod<mode>): Ditto.
14862 (vpdpbusd_v16si): Ditto.
14863 (vpdpbusds_v16si): Ditto.
14864 (vpdpwssd_v16si): Ditto.
14865 (vpdpwssds_v16si): Ditto.
14866 (VI48_AVX512VP2VL): Ditto.
14867 (avx512vp2intersect_2intersectv16si): Ditto.
14868 (VF_AVX512BF16VL): Ditto.
14869 (VF1_AVX512_256): Ditto.
14871 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14873 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
14874 Make sure there is EVEX512 enabled.
14875 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
14876 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
14877 when !TARGET_EVEX512.
14878 * config/i386/i386.md (avx512bw_512): New.
14879 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
14880 (*zero_extendsidi2): Change isa to avx512bw_512.
14883 (*andn<mode>_1): Change isa to kmov_isa.
14884 (*<code><mode>_1): Ditto.
14885 (*notxor<mode>_1): Ditto.
14886 (*one_cmpl<mode>2_1): Ditto.
14887 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
14888 (*ashl<mode>3_1): Change isa to kmov_isa.
14889 (*lshr<mode>3_1): Ditto.
14890 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
14891 (VI1248_AVX512VLBW): Ditto.
14892 (VHFBF_AVX512VL): Ditto.
14896 (VI1_AVX512): Ditto.
14897 (VI12_256_512_AVX512VL): Ditto.
14898 (VI2_AVX2_AVX512BW): Ditto.
14899 (VI2_AVX512VNNIBW): Ditto.
14900 (VI2_AVX512VL): Ditto.
14901 (VI2HFBF_AVX512VL): Ditto.
14902 (VI8_AVX2_AVX512BW): Ditto.
14903 (VIMAX_AVX2_AVX512BW): Ditto.
14904 (VIMAX_AVX512VL): Ditto.
14905 (VI12_AVX2_AVX512BW): Ditto.
14906 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
14907 (VI248_AVX512VL): Ditto.
14908 (VI248_AVX512VLBW): Ditto.
14909 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
14910 (VI248_AVX512BW): Ditto.
14911 (VI248_AVX512BW_AVX512VL): Ditto.
14912 (VI248_512): Ditto.
14913 (VI124_256_AVX512F_AVX512BW): Ditto.
14914 (VI_AVX512BW): Ditto.
14915 (VIHFBF_AVX512BW): Ditto.
14916 (SWI1248_AVX512BWDQ): Ditto.
14917 (SWI1248_AVX512BW): Ditto.
14918 (SWI1248_AVX512BWDQ2): Ditto.
14919 (*knotsi_1_zext): Ditto.
14920 (define_split for zero_extend + not): Ditto.
14922 (REDUC_SMINMAX_MODE): Ditto.
14923 (VEC_EXTRACT_MODE): Ditto.
14924 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
14925 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
14926 (truncv32hiv32qi2): Ditto.
14927 (avx512bw_<code>v32hiv32qi2): Ditto.
14928 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
14929 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
14930 (usadv64qi): Ditto.
14931 (VEC_PERM_AVX2): Ditto.
14932 (AVX512ZEXTMASK): Ditto.
14934 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
14935 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
14936 (avx512bw_packssdw<mask_name>): Ditto.
14937 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
14938 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
14939 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
14940 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
14941 (vec_unpacks_lo_di): Ditto.
14942 (SWI48x_MASK): New.
14943 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
14944 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
14945 (VI1248_AVX512VL_AVX512BW): Ditto.
14946 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
14947 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
14948 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
14949 (<insn>v32qiv32hi2): Ditto.
14950 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
14951 (VPERMI2): Add TARGET_EVEX512.
14954 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14956 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
14957 Add TARGET_EVEX512 for 512 bit usage.
14958 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
14959 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
14960 (VF1_128_256VL): Ditto.
14961 (VF2_AVX512VL): Ditto.
14962 (VI8_256_512): Ditto.
14963 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
14965 (AVX512_VEC): Ditto.
14966 (AVX512_VEC_2): Ditto.
14967 (VI4F_BRCST32x2): Ditto.
14968 (VI8F_BRCST64x2): Ditto.
14970 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
14972 * config/i386/i386-builtins.cc
14973 (ix86_vectorize_builtin_gather): Disable 512 bit gather
14974 when !TARGET_EVEX512.
14975 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
14976 Add TARGET_EVEX512.
14977 (ix86_expand_int_sse_cmp): Ditto.
14978 (ix86_expand_vector_init_one_nonzero): Disable subroutine
14979 when !TARGET_EVEX512.
14980 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
14981 (ix86_vectorize_vec_perm_const): Disable subroutine when
14983 * config/i386/i386.cc
14984 (standard_sse_constant_p): Add TARGET_EVEX512.
14985 (standard_sse_constant_opcode): Ditto.
14986 (ix86_get_ssemov): Ditto.
14987 (ix86_legitimate_constant_p): Ditto.
14988 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
14989 when !TARGET_EVEX512.
14990 * config/i386/i386.md (avx512f_512): New.
14991 (movxi): Add TARGET_EVEX512.
14992 (*movxi_internal_avx512f): Ditto.
14993 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
14994 for alternative 13.
14995 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
14997 (*movhi_internal): Change alternative 11 to *Yv.
14998 (*movdf_internal): Change alternative 12 to Yv.
14999 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
15000 alternative 5 and 6.
15001 (*mov<mode>_internal): Change alternative 4 to Yv.
15002 (define_split for convert SF to DF): Add TARGET_EVEX512.
15003 (extendbfsf2_1): Ditto.
15004 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
15005 for 512 bit when !TARGET_EVEX512.
15006 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
15007 (V48_AVX512VL): Ditto.
15008 (V48_256_512_AVX512VL): Ditto.
15009 (V48H_AVX512VL): Ditto.
15010 (VI12_AVX512VL): Ditto.
15013 (V_256_512): Ditto.
15015 (VF1_VF2_AVX512DQ): Ditto.
15022 (VF2_512_256): Ditto.
15023 (VF2_512_256VL): Ditto.
15026 (VI48_AVX512VL): Ditto.
15027 (VI1248_AVX512VLBW): Ditto.
15028 (VF_AVX512VL): Ditto.
15029 (VFH_AVX512VL): Ditto.
15030 (VF1_AVX512VL): Ditto.
15035 (VI8_AVX512VL): Ditto.
15036 (VI2_AVX512F): Ditto.
15037 (VI4_AVX512F): Ditto.
15038 (VI4_AVX512VL): Ditto.
15039 (VI48_AVX512F_AVX512VL): Ditto.
15040 (VI8_AVX2_AVX512F): Ditto.
15041 (VI8_AVX_AVX512F): Ditto.
15044 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
15045 (VI248_AVX512VLBW): Ditto.
15046 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
15047 (VI248_AVX512BW): Ditto.
15048 (VI248_AVX512BW_AVX512VL): Ditto.
15049 (VI48_AVX512F): Ditto.
15050 (VI48_AVX_AVX512F): Ditto.
15051 (VI12_AVX_AVX512F): Ditto.
15052 (VI148_512): Ditto.
15053 (VI124_256_AVX512F_AVX512BW): Ditto.
15055 (VI_AVX512BW): Ditto.
15056 (VIHFBF_AVX512BW): Ditto.
15057 (VI4F_256_512): Ditto.
15058 (VI48F_256_512): Ditto.
15060 (VI12_VI48F_AVX512VL): Ditto.
15062 (AVX512MODE2P): Ditto.
15063 (STORENT_MODE): Ditto.
15064 (REDUC_PLUS_MODE): Ditto.
15065 (REDUC_SMINMAX_MODE): Ditto.
15066 (*andnot<mode>3): Change isa attribute to avx512f_512.
15067 (*andnot<mode>3): Ditto.
15068 (<code><mode>3): Ditto.
15069 (<code>tf3): Ditto.
15070 (FMAMODEM): Add TARGET_EVEX512.
15071 (FMAMODE_AVX512): Ditto.
15072 (VFH_SF_AVX512VL): Ditto.
15073 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
15074 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
15076 (avx512f_cvtdq2pd512_2): Ditto.
15077 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
15078 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
15080 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
15081 (vec_unpacks_lo_v16sf): Ditto.
15082 (vec_unpacks_hi_v16sf): Ditto.
15083 (vec_unpacks_float_hi_v16si): Ditto.
15084 (vec_unpacks_float_lo_v16si): Ditto.
15085 (vec_unpacku_float_hi_v16si): Ditto.
15086 (vec_unpacku_float_lo_v16si): Ditto.
15087 (vec_pack_sfix_trunc_v8df): Ditto.
15088 (avx512f_vec_pack_sfix_v8df): Ditto.
15089 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
15090 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
15091 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
15092 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
15093 (AVX512_VEC): Ditto.
15094 (AVX512_VEC_2): Ditto.
15095 (vec_extract_lo_v64qi): Ditto.
15096 (vec_extract_hi_v64qi): Ditto.
15097 (VEC_EXTRACT_MODE): Ditto.
15098 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
15099 (avx512f_movddup512<mask_name>): Ditto.
15100 (avx512f_unpcklpd512<mask_name>): Ditto.
15101 (*<avx512>_vternlog<mode>_all): Ditto.
15102 (*<avx512>_vpternlog<mode>_1): Ditto.
15103 (*<avx512>_vpternlog<mode>_2): Ditto.
15104 (*<avx512>_vpternlog<mode>_3): Ditto.
15105 (avx512f_shufps512_mask): Ditto.
15106 (avx512f_shufps512_1<mask_name>): Ditto.
15107 (avx512f_shufpd512_mask): Ditto.
15108 (avx512f_shufpd512_1<mask_name>): Ditto.
15109 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
15110 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
15111 (vec_dupv2df<mask_name>): Ditto.
15112 (trunc<pmov_src_lower><mode>2): Ditto.
15113 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
15114 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
15115 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
15116 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
15117 (truncv8div8qi2): Ditto.
15118 (avx512f_<code>v8div16qi2): Ditto.
15119 (*avx512f_<code>v8div16qi2_store_1): Ditto.
15120 (*avx512f_<code>v8div16qi2_store_2): Ditto.
15121 (avx512f_<code>v8div16qi2_mask): Ditto.
15122 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
15123 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
15124 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
15125 (vec_widen_umult_even_v16si<mask_name>): Ditto.
15126 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
15127 (vec_widen_smult_even_v16si<mask_name>): Ditto.
15128 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
15129 (VEC_PERM_AVX2): Ditto.
15130 (one_cmpl<mode>2): Ditto.
15131 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
15132 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
15133 (define_split to xor): Ditto.
15134 (*andnot<mode>3): Ditto.
15135 (define_split for ior): Ditto.
15136 (*iornot<mode>3): Ditto.
15137 (*xnor<mode>3): Ditto.
15138 (*<nlogic><mode>3): Ditto.
15139 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
15140 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
15141 (avx512f_pshufdv3_mask): Ditto.
15142 (avx512f_pshufd_1<mask_name>): Ditto.
15143 (*vec_extractv4ti): Ditto.
15144 (VEXTRACTI128_MODE): Ditto.
15145 (define_split to vec_extract): Ditto.
15146 (VI1248_AVX512VL_AVX512BW): Ditto.
15147 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
15148 (<insn>v16qiv16si2): Ditto.
15149 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
15150 (<insn>v16hiv16si2): Ditto.
15151 (avx512f_zero_extendv16hiv16si2_1): Ditto.
15152 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
15153 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
15154 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
15155 (<insn>v8qiv8di2): Ditto.
15156 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
15157 (<insn>v8hiv8di2): Ditto.
15158 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
15159 (*avx512f_zero_extendv8siv8di2_1): Ditto.
15160 (*avx512f_zero_extendv8siv8di2_2): Ditto.
15161 (<insn>v8siv8di2): Ditto.
15162 (avx512f_roundps512_sfix): Ditto.
15163 (vashrv8di3): Ditto.
15164 (vashrv16si3): Ditto.
15165 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
15166 (vec_dupv4sf): Add TARGET_EVEX512.
15167 (*vec_dupv4si): Ditto.
15168 (*vec_dupv2di): Ditto.
15169 (vec_dup<mode>): Change isa attribute to avx512f_512.
15170 (VPERMI2): Add TARGET_EVEX512.
15172 (VEC_INIT_MODE): Ditto.
15173 (VEC_INIT_HALF_MODE): Ditto.
15174 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
15176 (avx512f_vcvtps2ph512_mask_sae): Ditto.
15177 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
15179 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
15180 (INT_BROADCAST_MODE): Ditto.
15182 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15184 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
15185 Disable zmm broadcast for !TARGET_EVEX512.
15186 * config/i386/i386-options.cc (ix86_option_override_internal):
15187 Do not use PVW_512 when no-evex512.
15188 (ix86_simd_clone_adjust): Add evex512 target into string.
15189 * config/i386/i386.cc (type_natural_mode): Report ABI warning
15190 when using zmm register w/o evex512.
15191 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
15192 (ix86_hard_regno_mode_ok): Ditto.
15193 (ix86_set_reg_reg_cost): Ditto.
15194 (ix86_rtx_costs): Ditto.
15195 (ix86_vector_mode_supported_p): Ditto.
15196 (ix86_preferred_simd_mode): Ditto.
15197 (ix86_get_mask_mode): Ditto.
15198 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
15199 libmvec call when !TARGET_EVEX512.
15200 (ix86_simd_clone_usable): Ditto.
15201 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
15202 when !TARGET_EVEX512
15203 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
15204 (STORE_MAX_PIECES): Ditto.
15206 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15208 * config/i386/i386-builtin.def (BDESC): Add
15209 OPTION_MASK_ISA2_EVEX512.
15211 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15213 * config/i386/i386-builtin.def (BDESC): Add
15214 OPTION_MASK_ISA2_EVEX512.
15216 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15218 * config/i386/i386-builtin.def (BDESC): Add
15219 OPTION_MASK_ISA2_EVEX512.
15221 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15223 * config/i386/i386-builtin.def (BDESC): Add
15224 OPTION_MASK_ISA2_EVEX512.
15226 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15228 * config/i386/i386-builtin.def (BDESC): Add
15229 OPTION_MASK_ISA2_EVEX512.
15230 * config/i386/i386-builtins.cc
15231 (ix86_init_mmx_sse_builtins): Ditto.
15233 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15234 Hu, Lin1 <lin1.hu@intel.com>
15236 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
15239 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15241 * config.gcc: Add avx512bitalgvlintrin.h.
15242 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
15244 * config/i386/avx5124vnniwintrin.h: Ditto.
15245 * config/i386/avx512bf16intrin.h: Ditto.
15246 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
15247 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
15248 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
15250 * config/i386/avx512ifmaintrin.h: Ditto
15251 * config/i386/avx512pfintrin.h: Ditto
15252 * config/i386/avx512vbmi2intrin.h: Ditto.
15253 * config/i386/avx512vbmiintrin.h: Ditto.
15254 * config/i386/avx512vnniintrin.h: Ditto.
15255 * config/i386/avx512vp2intersectintrin.h: Ditto.
15256 * config/i386/avx512vpopcntdqintrin.h: Ditto.
15257 * config/i386/gfniintrin.h: Ditto.
15258 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
15259 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
15260 * config/i386/vpclmulqdqintrin.h: Ditto.
15261 * config/i386/avx512bitalgvlintrin.h: New.
15263 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15265 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
15268 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15270 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
15273 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15275 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
15277 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
15279 * common/config/i386/i386-common.cc
15280 (OPTION_MASK_ISA2_EVEX512_SET): New.
15281 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
15282 (ix86_handle_option): Handle EVEX512.
15283 * config/i386/i386-c.cc
15284 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
15285 when AVX512VL is set.
15286 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
15287 (ix86_valid_target_attribute_inner_p): Ditto.
15288 (ix86_option_override_internal): Set EVEX512 target if it is not
15289 explicitly set when AVX512 is enabled. Disable
15290 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
15291 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
15293 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
15296 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
15297 from insn condition.
15298 (lrint<mode>si2): New insn pattern for 32bit lrint.
15300 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
15303 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
15304 Enable SImode on FP registers for P7.
15305 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
15306 move between FP registers. Set attribute isa of stfiwx to "*"
15307 and attribute of stxsiwx to "p7".
15309 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
15311 * config/s390/s390.md: Make use of new copysign RTL.
15313 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
15315 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
15316 with "jm" for alternative 0 and 1 of operand 2.
15317 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
15318 "ja" for alternative 0 and 1 of operand2.
15320 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15323 * text-art/table.cc (table::maybe_set_cell_span): New.
15324 (table::add_other_table): New.
15325 * text-art/table.h (class table::cell_placement): Add class table
15327 (table::add_rows): New.
15328 (table::add_row): Reimplement in terms of add_rows.
15329 (table::maybe_set_cell_span): New decl.
15330 (table::add_other_table): New decl.
15331 * text-art/types.h (operator+): New operator for rect + coord.
15333 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15335 * genmatch.cc (main): Update for "m_" prefix of some fields of
15337 * input.cc (make_location): Update for removal of
15338 COMBINE_LOCATION_DATA.
15339 (dump_line_table_statistics): Update for "m_" prefix of some
15340 fields of line_maps.
15341 (location_with_discriminator): Update for removal of
15342 COMBINE_LOCATION_DATA.
15343 (line_table_test::line_table_test): Update for "m_" prefix of some
15344 fields of line_maps.
15345 * toplev.cc (general_init): Likewise.
15346 * tree.cc (set_block): Update for removal of
15347 COMBINE_LOCATION_DATA.
15348 (set_source_range): Likewise.
15350 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15352 * input.cc (make_location): Move implementation to
15353 line_maps::make_location.
15355 2023-10-08 David Malcolm <dmalcolm@redhat.com>
15358 * input.cc (file_cache::add_file): Update leading comment to
15359 clarify that it can fail.
15360 (file_cache::lookup_or_add_file): Likewise.
15361 (file_cache::get_source_file_content): Gracefully handle
15362 lookup_or_add_file failing.
15364 2023-10-08 liuhongt <hongtao.liu@intel.com>
15366 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
15368 (ix86_build_signbit_mask): Ditto.
15369 * config/i386/mmx.md (mmxintvecmode): Ditto.
15370 (<code><mode>2): New define_expand.
15371 (*mmx_<code><mode>): New define_insn_and_split.
15372 (*mmx_nabs<mode>2): Ditto.
15373 (*mmx_andnot<mode>3): New define_insn.
15374 (<code><mode>3): Ditto.
15375 (copysign<mode>3): New define_expand.
15376 (xorsign<mode>3): Ditto.
15377 (signbit<mode>2): Ditto.
15379 2023-10-08 liuhongt <hongtao.liu@intel.com>
15381 * config/i386/mmx.md (VHF_32_64): New mode iterator.
15382 (<insn><mode>3): New define_expand, merged from ..
15383 (<insn>v4hf3): .. this and
15384 (<insn>v2hf3): .. this.
15385 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
15386 (movd_v2hf_to_sse): .. this.
15387 (<code><mode>3): New define_expand.
15389 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15391 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
15392 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
15394 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15396 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
15398 (can_be_built_by_li_lis_and_rldicr): New function.
15399 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
15400 can_be_built_by_li_lis_and_rldicl.
15402 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15404 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
15406 (can_be_built_by_li_and_rotldi): Rename to ...
15407 (can_be_built_by_li_lis_and_rotldi): ... this function.
15408 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
15410 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
15412 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
15413 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
15415 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
15417 * config/riscv/linux.h: Pass the static-pie specific options to
15420 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
15422 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
15424 * config/aarch64/aarch64-tune.md: Regenerated.
15425 * doc/invoke.texi: Add command-line option for cortex-x4 core.
15427 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15428 Hongyu Wang <hongyu.wang@intel.com>
15429 Hongtao Liu <hongtao.liu@intel.com>
15431 * config/i386/constraints.md (jb): New constraint for vsib memory
15432 that does not allow gpr32.
15433 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
15434 alternative and set attr_gpr32 to 0.
15435 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
15437 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
15438 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
15439 (*rsqrtsf2_sse): Likewise.
15440 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
15441 avx/noavx and assign jr/r constraint to dest.
15442 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
15443 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
15444 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
15445 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
15446 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
15447 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
15448 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
15449 (<sse2_avx2>_pmovmskb): Likewise.
15450 (*<sse2_avx2>_pmovmskb_zext): Likewise.
15451 (*sse2_pmovmskb_ext): Likewise.
15452 (*<sse2_avx2>_pmovmskb_lt): Likewise.
15453 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
15454 (*sse2_pmovmskb_ext_lt): Likewise.
15455 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
15456 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
15457 (sse_vmrcpv4sf2): Likewise.
15458 (*sse_vmrcpv4sf2): Likewise.
15459 (rsqrt<mode>2): Likewise.
15460 (sse_vmrsqrtv4sf2): Likewise.
15461 (*sse_vmrsqrtv4sf2): Likewise.
15462 (avx_h<insn>v4df3): Likewise.
15463 (sse3_hsubv2df3): Likewise.
15464 (avx_h<insn>v8sf3): Likewise.
15465 (sse3_h<insn>v4sf3): Likewise.
15466 (<sse3>_lddqu<avxsizesuffix>): Likewise.
15467 (avx_cmp<mode>3): Likewise.
15468 (avx_vmcmp<mode>3): Likewise.
15469 (*sse2_gt<mode>3): Likewise.
15470 (sse_ldmxcsr): Likewise.
15471 (sse_stmxcsr): Likewise.
15472 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
15473 avx alternative and set attr_gpr32 to 0.
15474 (avx2_permv2ti): Likewise.
15475 (*avx_vperm2f128<mode>_full): Likewise.
15476 (*avx_vperm2f128<mode>_nozero): Likewise.
15477 (vec_set_lo_v32qi): Likewise.
15478 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
15479 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
15480 (avx_cmp<mode>3): Likewise.
15481 (avx_vmcmp<mode>3): Likewise.
15482 (*<sse>_maskcmp<mode>3_comm): Likewise.
15483 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
15485 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
15486 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
15487 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
15488 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
15489 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
15490 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
15491 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
15492 (vec_set_lo_<mode><mask_name>): Likewise.
15493 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
15494 (vec_set_hi_<mode><mask_name>): Likewise.
15495 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
15496 (vec_set_hi_<mode>): Likewise.
15497 (vec_set_lo_<mode>): Likewise.
15498 (avx2_set_hi_v32qi): Likewise.
15500 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15501 Hongyu Wang <hongyu.wang@intel.com>
15502 Hongtao Liu <hongtao.liu@intel.com>
15504 * config/i386/i386.md (*movhi_internal): Split out non-gpr
15505 supported pextrw with mem constraint to avx/noavx alternatives,
15506 set jm and attr gpr32 0 to the noavx alternative.
15507 (*mov<mode>_internal): Likewise.
15508 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
15509 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
15510 (mmx_pshufbv4qi3): Likewise.
15511 (*mmx_pinsrd): Likewise.
15512 (*mmx_pinsrb): Likewise.
15513 (*pinsrb): Likewise.
15514 (mmx_pshufbv8qi3): Likewise.
15515 (mmx_pshufbv4qi3): Likewise.
15516 (@sse4_1_insertps_<mode>): Likewise.
15517 (*mmx_pextrw): Split altrenatives and map non-EGPR
15518 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
15519 (*movv2qi_internal): Likewise.
15520 (*pextrw): Likewise.
15521 (*mmx_pextrb): Likewise.
15522 (*mmx_pextrb_zext): Likewise.
15523 (*pextrb): Likewise.
15524 (*pextrb_zext): Likewise.
15525 (vec_extractv2si_1): Likewise.
15526 (vec_extractv2si_1_zext): Likewise.
15527 * config/i386/sse.md: (vi128_h_r): New mode attr for
15528 pinsr{bw}/pextr{bw} with reg operand.
15529 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
15530 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
15531 (*vec_extract<mode>): Likewise.
15532 (*vec_extract<mode>): Likewise for HFBF pattern.
15533 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
15534 (*vec_extractv4si_1): Likewise.
15535 (*vec_extractv4si_zext): Likewise.
15536 (*vec_extractv2di_1): Likewise.
15537 (*vec_concatv2si_sse4_1): Likewise.
15538 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
15539 (vec_concatv2di): Likewise.
15540 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
15541 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
15542 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
15543 %v for avx/noavx alternatives if necessary.
15544 (*vec_concatv2sf_sse4_1): Likewise.
15545 (*sse4_1_extractps): Likewise.
15546 (vec_set<mode>_0): Likewise for VI4F_128.
15547 (*vec_setv4sf_sse4_1): Likewise.
15548 (@sse4_1_insertps<mode>): Likewise.
15549 (ssse3_pmaddubsw128): Likewise.
15550 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
15551 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
15552 (<ssse3_avx2>_palignr<mode>): Likewise.
15553 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
15554 (<sse4_1_avx2>_mpsadbw): Likewise.
15555 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
15556 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
15557 (*sse4_1_<code><mode>3<mask_name>): Likewise.
15558 (*<code>v8hi3): Likewise.
15559 (*<code>v16qi3): Likewise.
15560 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
15561 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
15562 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
15563 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
15564 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
15565 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
15566 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
15567 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
15568 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
15569 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
15570 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
15571 (aesdec): Likewise.
15572 (aesdeclast): Likewise.
15573 (aesenc): Likewise.
15574 (aesenclast): Likewise.
15575 (pclmulqdq): Likewise.
15576 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
15577 (vgf2p8affineqb_<mode><mask_name>): Likewise.
15578 (vgf2p8mulb_<mode><mask_name>): Likewise.
15580 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15581 Hongyu Wang <hongyu.wang@intel.com>
15582 Hongtao Liu <hongtao.liu@intel.com>
15584 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
15586 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
15588 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
15589 and constraint jm to all non-evex alternatives, adjust
15590 alternative outputs if evex reg is mentioned.
15591 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
15592 and constraint jm/ja to all non-evex alternatives.
15593 (ptesttf2): Likewise.
15594 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
15595 (sse4_1_round<ssescalarmodesuffix>): Likewise.
15596 (sse4_2_pcmpestri): Likewise.
15597 (sse4_2_pcmpestrm): Likewise.
15598 (sse4_2_pcmpestr_cconly): Likewise.
15599 (sse4_2_pcmpistr): Likewise.
15600 (sse4_2_pcmpistri): Likewise.
15601 (sse4_2_pcmpistrm): Likewise.
15602 (sse4_2_pcmpistr_cconly): Likewise.
15603 (aesimc): Likewise.
15604 (aeskeygenassist): Likewise.
15606 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15607 Hongyu Wang <hongyu.wang@intel.com>
15608 Hongtao Liu <hongtao.liu@intel.com>
15610 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
15611 attr gpr32 0 and constraint jm/ja to all mem alternatives.
15612 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
15613 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
15614 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
15615 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
15616 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
15617 (<ssse3_avx2>_psign<mode>3): Likewise.
15618 (ssse3_psign<mode>3): Likewise.
15619 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
15620 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
15621 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
15622 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
15623 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
15624 (<sse4_1_avx2>_mpsadbw): Likewise.
15625 (<sse4_1_avx2>_pblendvb): Likewise.
15626 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
15627 (sse4_1_pblend<ssemodesuffix>): Likewise.
15628 (*avx2_pblend<ssemodesuffix>): Likewise.
15629 (avx2_permv2ti): Likewise.
15630 (*avx_vperm2f128<mode>_nozero): Likewise.
15631 (*avx2_eq<mode>3): Likewise.
15632 (*sse4_1_eqv2di3): Likewise.
15633 (sse4_2_gtv2di3): Likewise.
15634 (avx2_gt<mode>3): Likewise.
15636 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15637 Hongyu Wang <hongyu.wang@intel.com>
15638 Hongtao Liu <hongtao.liu@intel.com>
15640 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
15642 (<xsave>_rex64): Likewise.
15643 (<xrstor>_rex64): Likewise.
15644 (<xrstor>64): Likewise.
15645 (fxsave64): Likewise.
15646 (fxstore64): Likewise.
15648 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
15649 Kong Lingling <lingling.kong@intel.com>
15650 Hongtao Liu <hongtao.liu@intel.com>
15652 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
15653 adjust mnemonic for vmovduq/vmovdqa.
15654 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
15655 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
15656 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
15659 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15660 Hongyu Wang <hongyu.wang@intel.com>
15661 Hongtao Liu <hongtao.liu@intel.com>
15663 * config/i386/i386.cc (map_egpr_constraints): New funciton to
15664 map common constraints to EGPR prohibited constraints.
15665 (ix86_md_asm_adjust): Calls map_egpr_constraints.
15666 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
15668 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15669 Hongyu Wang <hongyu.wang@intel.com>
15670 Hongtao Liu <hongtao.liu@intel.com>
15672 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
15674 (ix86_regno_ok_for_insn_base_p): Likewise.
15675 (ix86_insn_index_reg_class): Likewise.
15676 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
15677 New helper function to scan the insn.
15678 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
15679 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
15680 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
15681 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
15682 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
15683 (INSN_INDEX_REG_CLASS): Likewise.
15684 (enum reg_class): Add INDEX_GPR16.
15685 (GENERAL_GPR16_REGNO_P): Define.
15686 * config/i386/i386.md (gpr32): New attribute.
15688 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15689 Hongyu Wang <hongyu.wang@intel.com>
15690 Hongtao Liu <hongtao.liu@intel.com>
15692 * config/i386/constraints.md (jr): New register constraint
15693 that prohibits EGPR.
15694 (jR): Constraint that force usage of EGPR.
15695 (jm): New memory constraint that prohibits EGPR.
15696 (ja): Likewise for Bm constraint.
15697 (jb): Likewise for Tv constraint.
15698 (j<): New auto-dec memory constraint that prohibits EGPR.
15699 (j>): Likewise for ">" constraint.
15700 (jo): Likewise for "o" constraint.
15701 (jv): Likewise for "V" constraint.
15702 (jp): Likewise for "p" constraint.
15703 * config/i386/i386.h (enum reg_class): Add new reg class
15706 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15707 Hongyu Wang <hongyu.wang@intel.com>
15708 Hongtao Liu <hongtao.liu@intel.com>
15710 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
15711 New function prototype.
15712 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
15714 (debugger64_register_map): Likewise.
15715 (ix86_conditional_register_usage): Clear REX2 register when APX
15717 (ix86_code_end): Add handling for REX2 reg.
15718 (print_reg): Likewise.
15719 (ix86_output_jmp_thunk_or_indirect): Likewise.
15720 (ix86_output_indirect_branch_via_reg): Likewise.
15721 (ix86_attr_length_vex_default): Likewise.
15722 (ix86_emit_save_regs): Adjust to allow saving r31.
15723 (ix86_register_priority): Set REX2 reg priority same as REX.
15724 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
15725 (x86_extended_rex2reg_mentioned_p): New function.
15726 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
15728 (REG_ALLOC_ORDER): Likewise.
15729 (FIRST_REX2_INT_REG): Define.
15730 (LAST_REX2_INT_REG): Ditto.
15731 (GENERAL_REGS): Add 16 new registers.
15732 (INT_SSE_REGS): Likewise.
15733 (FLOAT_INT_REGS): Likewise.
15734 (FLOAT_INT_SSE_REGS): Likewise.
15735 (INT_MASK_REGS): Likewise.
15736 (ALL_REGS):Likewise.
15737 (REX2_INT_REG_P): Define.
15738 (REX2_INT_REGNO_P): Ditto.
15739 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
15740 (REGNO_OK_FOR_INDEX_P): Ditto.
15741 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
15742 * config/i386/i386.md: Add 16 new integer general
15745 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15746 Hongyu Wang <hongyu.wang@intel.com>
15747 Hongtao Liu <hongtao.liu@intel.com>
15749 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
15750 (XCR_APX_F_ENABLED_MASK): Likewise.
15751 (get_available_features): Detect APX_F under
15752 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
15753 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
15754 (ix86_handle_option): Handle -mapxf.
15755 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
15756 * common/config/i386/i386-isas.h: Add entry for APX_F.
15757 * config/i386/cpuid.h (bit_APX_F): New.
15758 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
15759 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
15760 * config/i386/i386-opts.h (enum apx_features): New enum.
15761 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
15762 * config/i386/i386-options.cc (ix86_function_specific_save):
15763 Save ix86_apx_features.
15764 (ix86_function_specific_restore): Restore it.
15765 (ix86_valid_target_attribute_inner_p): Add mapxf.
15766 (ix86_option_override_internal): Set ix86_apx_features for PTA
15767 and TARGET_APX_F. Also reports error when APX_F is set but not
15768 having TARGET_64BIT.
15769 * config/i386/i386.opt: (-mapxf): New ISA flag option.
15770 (-mapx=): New enumeration option.
15771 (apx_features): New enum type.
15772 (apx_none): New enum value.
15773 (apx_egpr): Likewise.
15774 (apx_push2pop2): Likewise.
15775 (apx_ndd): Likewise.
15776 (apx_all): Likewise.
15777 * doc/invoke.texi: Document mapxf.
15779 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
15780 Kong Lingling <lingling.kong@intel.com>
15781 Hongtao Liu <hongtao.liu@intel.com>
15783 * addresses.h (index_reg_class): New wrapper function like
15785 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
15786 * doc/tm.texi.in: Ditto.
15787 * lra-constraints.cc (index_part_to_reg): Pass index_class.
15788 (process_address_1): Calls index_reg_class with curr_insn and
15789 replace INDEX_REG_CLASS with its return value index_cl.
15790 * reload.cc (find_reloads_address): Likewise.
15791 (find_reloads_address_1): Likewise.
15793 2023-10-07 Kong Lingling <lingling.kong@intel.com>
15794 Hongyu Wang <hongyu.wang@intel.com>
15795 Hongtao Liu <hongtao.liu@intel.com>
15797 * addresses.h (base_reg_class): Add insn argument and new macro
15798 INSN_BASE_REG_CLASS.
15799 (regno_ok_for_base_p_1): Add insn argument and new macro
15800 REGNO_OK_FOR_INSN_BASE_P.
15801 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
15802 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
15803 REGNO_OK_FOR_INSN_BASE_P.
15804 * doc/tm.texi.in: Ditto.
15805 * lra-constraints.cc (process_address_1): Pass insn to
15807 (curr_insn_transform): Ditto.
15808 * reload.cc (find_reloads): Ditto.
15809 (find_reloads_address): Ditto.
15810 (find_reloads_address_1): Ditto.
15811 (find_reloads_subreg_address): Ditto.
15812 * reload1.cc (maybe_fix_stack_asms): Ditto.
15814 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
15817 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
15820 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
15823 * config/rs6000/predicates.md (lowpart_subreg_operator): New
15825 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
15826 (movsf_from_si2): Rename to ...
15827 (movsf_from_si2_<code>): ... this.
15829 2023-10-07 Pan Li <pan2.li@intel.com>
15832 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
15833 object is a REG before extracting its' REGNO.
15835 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
15837 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
15838 one into add3_cc_overflow_1 followed by add3_carry.
15839 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
15840 "*add<mode>3_cc_overflow_1" to provide generator function.
15842 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
15843 Uros Bizjak <ubizjak@gmail.com>
15845 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
15846 to perform left shifts into shorter instructions with -Oz.
15848 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
15850 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
15852 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
15854 * doc/extend.texi (Function Attributes): Mention standard attribute
15856 (Variable Attributes): Likewise.
15857 (Type Attributes): Likewise.
15858 (Attribute Syntax): Likewise.
15860 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
15862 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
15863 (mov<mode>_exec): Likewise.
15864 (mov<mode>_sgprbase): Likewise.
15865 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
15866 (*movti_insn): Likewise.
15868 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
15870 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
15872 2023-10-06 Andrew Pinski <pinskia@gmail.com>
15874 PR middle-end/111699
15875 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
15876 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
15878 2023-10-06 Jakub Jelinek <jakub@redhat.com>
15880 * ipa-prop.h (ipa_bits): Remove.
15881 (struct ipa_jump_func): Remove bits member.
15882 (struct ipcp_transformation): Remove bits member, adjust
15884 (ipa_get_ipa_bits_for_value): Remove.
15885 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
15886 (ipa_bits_hash_table): Remove.
15887 (ipa_print_node_jump_functions_for_edge): Don't print bits.
15888 (ipa_get_ipa_bits_for_value): Remove.
15889 (ipa_set_jfunc_bits): Remove.
15890 (ipa_compute_jump_functions_for_edge): For pointers query
15891 pointer alignment before ipa_set_jfunc_vr and update_bitmask
15892 in there. For integral types, just rely on bitmask already
15893 being handled in value ranges.
15894 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
15895 (ipcp_transformation_initialize): Neither here.
15896 (ipcp_transformation_t::duplicate): Don't copy bits vector.
15897 (ipa_write_jump_function): Don't stream bits here.
15898 (ipa_read_jump_function): Neither here.
15899 (useful_ipcp_transformation_info_p): Don't test bits vec.
15900 (write_ipcp_transformation_info): Don't stream bits here.
15901 (read_ipcp_transformation_info): Neither here.
15902 (ipcp_get_parm_bits): Get mask and value from m_vr rather
15904 (ipcp_update_bits): Remove.
15905 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
15906 bitmask stored in value range.
15907 (ipcp_transform_function): Don't test bits vector, don't call
15909 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
15910 jfunc->bits, instead get mask and value from jfunc->m_vr.
15911 (ipcp_store_bits_results): Remove.
15912 (ipcp_store_vr_results): Incorporate parts of
15913 ipcp_store_bits_results here, merge the bitmasks with value
15914 range if both are supplied.
15915 (ipcp_driver): Don't call ipcp_store_bits_results.
15916 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
15919 2023-10-06 Pan Li <pan2.li@intel.com>
15921 * config/riscv/autovec.md: Update comments.
15923 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
15925 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
15927 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15929 * timevar.def (TV_TREE_FAST_VRP): New.
15930 * tree-pass.h (make_pass_fast_vrp): New prototype.
15931 * tree-vrp.cc (class fvrp_folder): New.
15932 (fvrp_folder::fvrp_folder): New.
15933 (fvrp_folder::~fvrp_folder): New.
15934 (fvrp_folder::value_of_expr): New.
15935 (fvrp_folder::value_on_edge): New.
15936 (fvrp_folder::value_of_stmt): New.
15937 (fvrp_folder::pre_fold_bb): New.
15938 (fvrp_folder::post_fold_bb): New.
15939 (fvrp_folder::pre_fold_stmt): New.
15940 (fvrp_folder::fold_stmt): New.
15941 (execute_fast_vrp): New.
15942 (pass_data_fast_vrp): New.
15943 (pass_vrp:execute): Check for fast VRP pass.
15944 (make_pass_fast_vrp): New.
15946 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15948 * gimple-range.cc (dom_ranger::dom_ranger): New.
15949 (dom_ranger::~dom_ranger): New.
15950 (dom_ranger::range_of_expr): New.
15951 (dom_ranger::edge_range): New.
15952 (dom_ranger::range_on_edge): New.
15953 (dom_ranger::range_in_bb): New.
15954 (dom_ranger::range_of_stmt): New.
15955 (dom_ranger::maybe_push_edge): New.
15956 (dom_ranger::pre_bb): New.
15957 (dom_ranger::post_bb): New.
15958 * gimple-range.h (class dom_ranger): New.
15960 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
15962 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
15963 (gori_calc_operands): New.
15964 (gori_on_edge): New.
15965 (gori_name_helper): New.
15966 (gori_name_on_edge): New.
15967 * gimple-range-gori.h (gori_on_edge): New prototype.
15968 (gori_name_on_edge): New prototype.
15970 2023-10-05 Sergei Trofimovich <siarheit@google.com>
15973 PR gcov-profile/111559
15974 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
15975 uninitialized probabilities when merging counters with zero
15978 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
15981 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
15982 strategy for non-default address spaces.
15983 (decide_alg): Use loop strategy as a fallback strategy for
15984 non-default address spaces.
15986 2023-10-05 Jakub Jelinek <jakub@redhat.com>
15988 * sreal.cc (verify_aritmetics): Rename to ...
15989 (verify_arithmetics): ... this.
15990 (sreal_verify_arithmetics): Adjust caller.
15992 2023-10-05 Martin Jambor <mjambor@suse.cz>
15995 2023-10-03 Martin Jambor <mjambor@suse.cz>
15998 * cgraph.h (cgraph_edge): Add a parameter to
15999 redirect_call_stmt_to_callee.
16000 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
16001 parameter to modify_call.
16002 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
16003 parameter killed_ssas, pass it to padjs->modify_call.
16004 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
16005 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
16006 Instead of substituting uses, invoke purge_transitive_uses. If
16007 hash of killed SSAs has not been provided, create a temporary one
16008 and release SSAs that have been added to it.
16009 * tree-inline.cc (redirect_all_calls): Create
16010 id->killed_new_ssa_names earlier, pass it to edge redirection,
16012 (copy_body): Release SSAs in id->killed_new_ssa_names.
16014 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16016 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
16017 (vec_series<mode>): Ditto.
16018 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
16019 (shuffle_decompress_patterns): Ditto.
16021 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
16023 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
16024 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
16025 (arc_ccfsm_record_branch_deleted): Likewise.
16026 (arc_ccfsm_cond_exec_p): Likewise.
16027 (arc_ccfsm): Likewise.
16028 (arc_ccfsm_record_condition): Likewise.
16029 (make_pass_arc_ifcvt): Likewise.
16030 * config/arc/arc.cc (arc_ccfsm): Remove.
16031 (arc_ccfsm_current): Likewise.
16032 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
16033 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
16034 (ARC_CCFSM_COND_EXEC_P): Likewise.
16035 (CCFSM_ISCOMPACT): Likewise.
16036 (CCFSM_DBR_ISCOMPACT): Likewise.
16037 (machine_function): Remove ccfsm related fields.
16038 (arc_ifcvt): Remove pass.
16039 (arc_print_operand): Remove `#` punct operand and other ccfsm
16041 (arc_ccfsm_advance): Remove.
16042 (arc_ccfsm_at_label): Likewise.
16043 (arc_ccfsm_record_condition): Likewise.
16044 (arc_ccfsm_post_advance): Likewise.
16045 (arc_ccfsm_branch_deleted_p): Likewise.
16046 (arc_ccfsm_record_branch_deleted): Likewise.
16047 (arc_ccfsm_cond_exec_p): Likewise.
16048 (arc_get_ccfsm_cond): Likewise.
16049 (arc_final_prescan_insn): Remove ccfsm references.
16050 (arc_internal_label): Likewise.
16051 (arc_reorg): Likewise.
16052 (arc_output_libcall): Likewise.
16053 * config/arc/arc.md: Remove ccfsm references and update related
16054 instruction patterns.
16056 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
16058 * config/arc/arc.cc (arc_init): Remove '^' punct char.
16059 (arc_print_operand): Remove related code.
16060 * config/arc/arc.md: Update patterns which uses '%&'.
16062 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
16064 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
16065 (arc_toggle_unalign): Likewise.
16066 * config/arc/arc.cc (machine_function) Remove unalign.
16067 (arc_init): Remove `&` punct character.
16068 (arc_print_operand): Remove `&` related functions.
16069 (arc_verify_short): Update function's number of parameters.
16070 (output_short_suffix): Update function.
16071 (arc_short_long): Likewise.
16072 (arc_clear_unalign): Remove.
16073 (arc_toggle_unalign): Likewise.
16074 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
16075 (ASM_OUTPUT_ALIGN): Update.
16076 * config/arc/arc.md: Remove all `%&` references.
16077 * config/arc/arc.opt (mannotate-align): Ignore option.
16078 * doc/invoke.texi (mannotate-align): Update description.
16080 2023-10-05 Richard Biener <rguenther@suse.de>
16082 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
16083 ask for internal_fn_p (CFN_LAST).
16085 2023-10-05 Richard Biener <rguenther@suse.de>
16087 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
16088 visited value numbers are available itself.
16090 2023-10-05 Richard Biener <rguenther@suse.de>
16093 * doc/extend.texi (attribute flatten): Clarify.
16095 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
16097 * config/arc/arc-protos.h (emit_shift): Delete prototype.
16098 (arc_pre_reload_split): New function prototype.
16099 * config/arc/arc.cc (emit_shift): Delete function.
16100 (arc_pre_reload_split): New predicate function, copied from i386,
16101 to schedule define_insn_and_split splitters to the split1 pass.
16102 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
16103 (ashrsi3): Likewise.
16104 (lshrsi3): Likewise.
16105 (shift_si3): Move after other shift patterns, and disable when
16106 operands[2] is one (which is handled by its own define_insn).
16107 Use shiftr4_operator, instead of shift4_operator, as this is no
16108 longer used for left shifts.
16109 (shift_si3_loop): Likewise. Additionally remove match_scratch.
16110 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
16111 (*ashrsi3_nobs): Likewise.
16112 (*lshrsi3_nobs): Likewise.
16113 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
16114 (add_shift): Rename define_insn from *add_shift.
16115 * config/arc/predicates.md (shiftl4_operator): Delete.
16116 (shift4_operator): Delete.
16118 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
16120 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
16121 Change type attribute to "unary", as this doesn't have operands[2].
16122 Change length attribute to "*,4" to allow compact representation.
16123 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
16124 insn type attribute to "unary", as this doesn't have operands[2].
16125 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
16126 insn type attribute to "unary", as this doesn't have operands[2].
16128 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
16130 PR rtl-optimization/110701
16131 * combine.cc (record_dead_and_set_regs_1): Split comment into
16132 pieces placed before the relevant clauses. When the SET_DEST
16133 is a partial_subreg_p, mark the bits outside of the updated
16134 portion of the destination as undefined.
16136 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
16138 PR bootstrap/111664
16139 * opt-read.awk: Drop multidimensional arrays.
16140 * opth-gen.awk: Ditto.
16142 2023-10-04 Xi Ruoyao <xry111@xry111.site>
16144 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
16145 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
16147 2023-10-04 Jakub Jelinek <jakub@redhat.com>
16149 PR middle-end/111369
16150 * match.pd (x == cstN ? cst4 : cst3): Use
16151 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
16152 Fix comment typo. Formatting fix.
16153 (a?~t:t -> (-(a))^t): Always convert to type rather
16154 than using build_nonstandard_integer_type. Perform negation
16155 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
16157 2023-10-04 Jakub Jelinek <jakub@redhat.com>
16159 PR tree-optimization/111668
16160 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
16161 a ? 0 : -1 cases before the powerof2cst cases and differentiate
16162 between 1-bit precision types, larger precision boolean types
16163 and other integral types. Fix comment pastos and formatting.
16165 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
16167 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
16168 pointers rather than range_info_get_range.
16170 2023-10-03 Martin Jambor <mjambor@suse.cz>
16172 * ipa-modref.h (modref_summary::dump): Make const.
16173 * ipa-modref.cc (modref_summary::dump): Likewise.
16174 (dump_lto_records): Dump to out instead of dump_file.
16176 2023-10-03 Martin Jambor <mjambor@suse.cz>
16179 * ipa-param-manipulation.cc
16180 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
16181 return uses of PARAM will be removed.
16182 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
16183 * ipa-sra.cc (isra_param_desc): New fields
16184 remove_only_when_retval_removed and split_only_when_retval_removed.
16185 (struct gensum_param_desc): Likewise. Fix comment long line.
16186 (ipa_sra_function_summaries::duplicate): Copy the new flags.
16187 (dump_gensum_param_descriptor): Dump the new flags.
16188 (dump_isra_param_descriptor): Likewise.
16189 (isra_track_scalar_value_uses): New parameter desc. Set its flag
16190 remove_only_when_retval_removed when encountering a simple return.
16191 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
16192 with desc. Pass it to isra_track_scalar_value_uses and set its
16194 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
16195 parameter. If there is a direct return use, mark any..
16196 (create_parameter_descriptors): Pass the whole parameter descriptor to
16197 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
16198 (process_scan_results): Copy the new flags.
16199 (isra_write_node_summary): Stream the new flags.
16200 (isra_read_node_info): Likewise.
16201 (adjust_parameter_descriptions): Check that transformations
16202 requring return removal only happen when return value is removed.
16203 Restructure main loop. Adjust dump message.
16205 2023-10-03 Martin Jambor <mjambor@suse.cz>
16208 * cgraph.h (cgraph_edge): Add a parameter to
16209 redirect_call_stmt_to_callee.
16210 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
16211 parameter to modify_call.
16212 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
16213 parameter killed_ssas, pass it to padjs->modify_call.
16214 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
16215 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
16216 Instead of substituting uses, invoke purge_transitive_uses. If
16217 hash of killed SSAs has not been provided, create a temporary one
16218 and release SSAs that have been added to it.
16219 * tree-inline.cc (redirect_all_calls): Create
16220 id->killed_new_ssa_names earlier, pass it to edge redirection,
16222 (copy_body): Release SSAs in id->killed_new_ssa_names.
16224 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
16226 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
16227 * tree-vrp.cc (vrp_pass_num): Remove.
16228 (pass_vrp::my_pass): Remove.
16229 (pass_vrp::pass_vrp): Add warn_p as a parameter.
16230 (pass_vrp::final_p): New.
16231 (pass_vrp::set_pass_param): Set final_p param.
16232 (pass_vrp::execute): Call execute_range_vrp with no conditions.
16233 (make_pass_vrp): Pass additional parameter.
16234 (make_pass_early_vrp): Ditto.
16236 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
16238 * tree-ssanames.cc (set_range_info): Return true only if the
16239 current value changes.
16241 2023-10-03 David Malcolm <dmalcolm@redhat.com>
16243 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
16244 prefixes to text_info fields.
16245 (diagnostic_report_diagnostic): Likewise.
16246 (verbatim): Use text_info ctor.
16247 (simple_diagnostic_path::add_event): Likewise.
16248 (simple_diagnostic_path::add_thread_event): Likewise.
16249 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
16250 "m_" prefixes to text_info fields.
16251 (dump_context::dump_printf_va): Use text_info ctor.
16252 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
16253 (graphviz_out::print): Likewise.
16254 * opt-problem.cc (opt_problem::opt_problem): Likewise.
16255 * pretty-print.cc (pp_format): Update for "m_" prefixes to
16257 (pp_printf): Use text_info ctor.
16258 (pp_verbatim): Likewise.
16259 (assert_pp_format_va): Likewise.
16260 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
16262 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
16264 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
16265 prefixes to text_info fields.
16266 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
16268 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
16270 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
16271 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
16272 (*scc_insn): Don't split to a conditional move sequence for LTU.
16274 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
16276 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
16277 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
16278 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
16279 (load_pair_dw_<DX:mode><DX2:mode>)
16280 (store_pair_sw_<SX:mode><SX2:mode>)
16281 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
16282 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
16283 (*extend<SHORT:mode><GPI:mode>2_aarch64)
16284 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
16285 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
16286 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
16287 (add<mode>3_compare0, *addsi3_compare0_uxtw)
16288 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
16289 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
16290 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
16291 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
16292 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
16293 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
16294 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
16295 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
16296 (*aarch64_ashl_sisd_or_int_<mode>3)
16297 (*aarch64_lshr_sisd_or_int_<mode>3)
16298 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
16299 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
16300 (<optab><fcvt_target><GPF:mode>2)
16301 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
16302 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
16303 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
16305 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
16306 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
16307 (*aarch64_mul_unpredicated_<mode>)
16308 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
16309 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
16310 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
16311 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
16312 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
16313 (@aarch64_sve_<sve_int_op>_lane_<mode>)
16314 (@aarch64_sve_add_mul_lane_<mode>)
16315 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
16316 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
16317 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
16318 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
16319 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
16320 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
16321 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
16322 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
16323 (@aarch64_sve_qadd_<sve_int_op><mode>)
16324 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
16325 (@aarch64_sve_sub_<sve_int_op><mode>)
16326 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
16327 (@aarch64_sve_qsub_<sve_int_op><mode>)
16328 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
16329 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
16330 (@aarch64_pred_<sve_int_op><mode>)
16331 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
16332 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
16333 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
16334 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
16335 (*cond_<sve_fp_op><mode>_any_relaxed)
16336 (*cond_<sve_fp_op><mode>_any_strict)
16337 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
16338 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
16339 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
16340 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
16341 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
16342 (*aarch64_sve_mov<mode>, aarch64_wrffr)
16343 (mask_scatter_store<mode><v_int_container>)
16344 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
16345 (*mask_scatter_store<mode><v_int_container>_sxtw)
16346 (*mask_scatter_store<mode><v_int_container>_uxtw)
16347 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
16348 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
16349 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
16350 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
16351 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
16352 (vec_series<mode>, @extract_<last_op>_<mode>)
16353 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
16354 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
16355 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
16356 (@cond_<optab><mode>)
16357 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
16358 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
16359 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
16360 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
16361 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
16362 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
16363 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
16364 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
16365 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
16366 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
16367 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
16368 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
16369 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
16370 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
16371 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
16372 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
16373 (*cond_bic<mode>_2, *cond_bic<mode>_any)
16374 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
16375 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
16376 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
16377 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
16378 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
16379 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
16380 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
16381 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16382 (*cond_<optab><mode>_2_const_relaxed)
16383 (*cond_<optab><mode>_2_const_strict)
16384 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
16385 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16386 (*cond_<optab><mode>_any_const_relaxed)
16387 (*cond_<optab><mode>_any_const_strict)
16388 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
16389 (*cond_add<mode>_2_const_strict)
16390 (*cond_add<mode>_any_const_relaxed)
16391 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
16392 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16393 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16394 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
16395 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
16396 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
16397 (*aarch64_pred_abd<mode>_strict)
16398 (*aarch64_cond_abd<mode>_2_relaxed)
16399 (*aarch64_cond_abd<mode>_2_strict)
16400 (*aarch64_cond_abd<mode>_3_relaxed)
16401 (*aarch64_cond_abd<mode>_3_strict)
16402 (*aarch64_cond_abd<mode>_any_relaxed)
16403 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
16404 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
16405 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
16406 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
16407 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
16408 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
16409 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
16410 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
16411 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
16412 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16413 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
16414 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
16415 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
16416 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
16417 (@aarch64_sve_<sve_fp_op>vnx4sf)
16418 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
16419 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
16420 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
16421 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
16422 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
16423 (@aarch64_fold_extract_vector_<last_op>_<mode>)
16424 (@aarch64_sve_splice<mode>)
16425 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
16426 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
16427 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
16428 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
16429 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
16430 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
16431 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
16432 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
16433 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
16434 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
16435 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
16436 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
16437 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16438 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16439 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
16440 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
16441 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
16443 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
16444 (load_pair<DREG:mode><DREG2:mode>)
16445 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
16446 (aarch64_simd_mov_from_<mode>low)
16447 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
16448 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
16449 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
16450 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
16451 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
16452 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
16453 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
16454 (*aarch64_combinez_be<mode>)
16455 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
16456 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
16457 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
16459 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
16461 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
16462 in new compact pattern syntax.
16464 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
16466 * gensupport.cc (convert_syntax): Updated to support unordered
16467 constraints in compact syntax.
16469 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
16471 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
16472 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
16473 (copysign<mode>3_hard): Likewise.
16474 (copysign<mode>3_soft): Likewise.
16475 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
16477 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
16480 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16482 * diagnostic-format-json.cc (toplevel_array): Remove global in
16483 favor of json_output_format::m_top_level_array.
16484 (cur_group): Likewise, for json_output_format::m_cur_group.
16485 (cur_children_array): Likewise, for
16486 json_output_format::m_cur_children_array.
16487 (class json_output_format): New.
16488 (json_begin_diagnostic): Remove, in favor of
16489 json_output_format::on_begin_diagnostic.
16490 (json_end_diagnostic): Convert to...
16491 (json_output_format::on_end_diagnostic): ...this.
16492 (json_begin_group): Remove, in favor of
16493 json_output_format::on_begin_group.
16494 (json_end_group): Remove, in favor of
16495 json_output_format::on_end_group.
16496 (json_flush_to_file): Remove, in favor of
16497 json_output_format::flush_to_file.
16498 (json_stderr_final_cb): Remove, in favor of json_output_format
16500 (json_output_base_file_name): Remove global.
16501 (class json_stderr_output_format): New.
16502 (json_file_final_cb): Remove.
16503 (class json_file_output_format): New.
16504 (json_emit_diagram): Remove.
16505 (diagnostic_output_format_init_json): Update.
16506 (diagnostic_output_format_init_json_file): Update.
16507 * diagnostic-format-sarif.cc (the_builder): Remove this global,
16508 moving to a field of the sarif_output_format.
16509 (sarif_builder::maybe_make_artifact_content_object): Use the
16510 context's m_file_cache.
16511 (get_source_lines): Convert to...
16512 (sarif_builder::get_source_lines): ...this, using context's
16514 (sarif_begin_diagnostic): Remove, in favor of
16515 sarif_output_format::on_begin_diagnostic.
16516 (sarif_end_diagnostic): Remove, in favor of
16517 sarif_output_format::on_end_diagnostic.
16518 (sarif_begin_group): Remove, in favor of
16519 sarif_output_format::on_begin_group.
16520 (sarif_end_group): Remove, in favor of
16521 sarif_output_format::on_end_group.
16522 (sarif_flush_to_file): Delete.
16523 (sarif_stderr_final_cb): Delete.
16524 (sarif_output_base_file_name): Delete.
16525 (sarif_file_final_cb): Delete.
16526 (class sarif_output_format): New.
16527 (sarif_emit_diagram): Delete.
16528 (class sarif_stream_output_format): New.
16529 (class sarif_file_output_format): New.
16530 (diagnostic_output_format_init_sarif): Update.
16531 (diagnostic_output_format_init_sarif_stderr): Update.
16532 (diagnostic_output_format_init_sarif_file): Update.
16533 (diagnostic_output_format_init_sarif_stream): Update.
16534 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
16535 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
16536 diagnostic_text_output_format's dtor.
16537 (diagnostic_initialize): Update, making a new instance of
16538 diagnostic_text_output_format.
16539 (diagnostic_finish): Delete m_output_format, rather than calling
16541 (diagnostic_report_diagnostic): Assert that m_output_format is
16542 non-NULL. Replace call to begin_group_cb with call to
16543 m_output_format->on_begin_group. Replace call to
16544 diagnostic_starter with call to
16545 m_output_format->on_begin_diagnostic. Replace call to
16546 diagnostic_finalizer with call to
16547 m_output_format->on_end_diagnostic.
16548 (diagnostic_emit_diagram): Replace both optional call to
16549 m_diagrams.m_emission_cb and default implementation with call to
16550 m_output_format->on_diagram. Move default implementation to
16551 diagnostic_text_output_format::on_diagram.
16552 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
16553 end_group_cb with call to m_output_format->on_end_group.
16554 (diagnostic_text_output_format::~diagnostic_text_output_format):
16555 New, based on default_diagnostic_final_cb.
16556 (diagnostic_text_output_format::on_begin_diagnostic): New, based
16557 on code from diagnostic_report_diagnostic.
16558 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
16559 (diagnostic_text_output_format::on_diagram): New, based on code
16560 from diagnostic_emit_diagram.
16561 * diagnostic.h (class diagnostic_output_format): New.
16562 (class diagnostic_text_output_format): New.
16563 (diagnostic_context::begin_diagnostic): Move to...
16564 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
16565 (diagnostic_context::start_span): Move to...
16566 (diagnostic_context::m_text_callbacks::start_span): ...here.
16567 (diagnostic_context::end_diagnostic): Move to...
16568 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
16569 (diagnostic_context::begin_group_cb): Remove, in favor of
16570 m_output_format->on_begin_group.
16571 (diagnostic_context::end_group_cb): Remove, in favor of
16572 m_output_format->on_end_group.
16573 (diagnostic_context::final_cb): Remove, in favor of
16574 m_output_format's dtor.
16575 (diagnostic_context::m_output_format): New field.
16576 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
16577 of m_output_format->on_diagram.
16578 (diagnostic_starter): Update.
16579 (diagnostic_finalizer): Update.
16580 (diagnostic_output_format_init_sarif_stream): New.
16581 * input.cc (location_get_source_line): Move implementation apart from
16582 call to diagnostic_file_cache_init to...
16583 (file_cache::get_source_line): ...this new function...
16584 (location_get_source_line): ...and reintroduce, rewritten in terms of
16585 file_cache::get_source_line.
16586 (get_source_file_content): Likewise, refactor into...
16587 (file_cache::get_source_file_content): ...this new function.
16588 * input.h (file_cache::get_source_line): New decl.
16589 (file_cache::get_source_file_content): New decl.
16590 * selftest-diagnostic.cc
16591 (test_diagnostic_context::test_diagnostic_context): Update.
16592 * tree-diagnostic-path.cc (event_range::print): Update for
16593 change to diagnostic_context's start_span callback.
16595 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16597 * diagnostic-show-locus.cc: Update for reorganization of
16598 source-printing fields of diagnostic_context.
16599 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
16600 (diagnostic_initialize): Likewise.
16601 * diagnostic.h (diagnostic_context::show_caret): Move to...
16602 (diagnostic_context::m_source_printing::enabled): ...here.
16603 (diagnostic_context::caret_max_width): Move to...
16604 (diagnostic_context::m_source_printing::max_width): ...here.
16605 (diagnostic_context::caret_chars): Move to...
16606 (diagnostic_context::m_source_printing::caret_chars): ...here.
16607 (diagnostic_context::colorize_source_p): Move to...
16608 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
16609 (diagnostic_context::show_labels_p): Move to...
16610 (diagnostic_context::m_source_printing::show_labels_p): ...here.
16611 (diagnostic_context::show_line_numbers_p): Move to...
16612 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
16613 (diagnostic_context::min_margin_width): Move to...
16614 (diagnostic_context::m_source_printing::min_margin_width): ...here.
16615 (diagnostic_context::show_ruler_p): Move to...
16616 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
16617 (diagnostic_same_line): Update for above changes.
16618 * opts.cc (common_handle_option): Update for reorganization of
16619 source-printing fields of diagnostic_context.
16620 * selftest-diagnostic.cc
16621 (test_diagnostic_context::test_diagnostic_context): Likewise.
16622 * toplev.cc (general_init): Likewise.
16623 * tree-diagnostic-path.cc (struct event_range): Likewise.
16625 2023-10-02 David Malcolm <dmalcolm@redhat.com>
16627 * diagnostic.cc (diagnostic_initialize): Initialize
16628 set_locations_cb to nullptr.
16630 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
16633 * config/arm/constraints.md: Remove Pf constraint.
16634 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
16635 (arm_atomic_load_acquire<mode>): Likewise.
16636 (arm_atomic_store<mode>): Likewise.
16637 (arm_atomic_store_release<mode>): Likewise.
16638 (atomic_load<mode>): Switch patterns to define_expand.
16639 (atomic_store<mode>): Likewise.
16640 (arm_atomic_loaddi2_ldrd): Remove predication.
16641 (arm_load_exclusive<mode>): Likewise.
16642 (arm_load_acquire_exclusive<mode>): Likewise.
16643 (arm_load_exclusivesi): Likewise.
16644 (arm_load_acquire_exclusivesi): Likewise.
16645 (arm_load_exclusivedi): Likewise.
16646 (arm_load_acquire_exclusivedi): Likewise.
16647 (arm_store_exclusive<mode>): Likewise.
16648 (arm_store_release_exclusivedi): Likewise.
16649 (arm_store_release_exclusive<mode>): Likewise.
16650 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
16652 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16655 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16657 PR tree-optimization/109154
16658 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
16659 (cmp_arg_entry): New.
16660 (predicate_scalar_phi): Use it.
16662 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16664 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
16665 (@xorsign<mode>3): ...This.
16666 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
16667 (@xorsign<mode>3): ..This and emit vectors directly
16668 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
16670 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16672 * emit-rtl.cc (validate_subreg): Relax subreg rule.
16674 2023-10-02 Tamar Christina <tamar.christina@arm.com>
16676 PR tree-optimization/109154
16677 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
16678 (cmp_arg_entry): New.
16679 (predicate_scalar_phi): Use it.
16681 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
16683 PR bootstrap/111642
16684 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
16685 poly_int64 typedef.
16686 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
16688 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
16689 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16691 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
16693 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
16695 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
16697 (cpymem<P:mode>) .. this.
16699 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16701 * combine.cc (simplify_compare_const): Properly handle unsigned
16702 constants while narrowing comparison of memory and constants.
16704 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
16706 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
16707 (MASK_ZIFENCEI): Delete;
16708 (MASK_ZIHINTNTL): Ditto.
16709 (MASK_ZIHINTPAUSE): Ditto.
16710 (TARGET_ZICSR): Ditto.
16711 (TARGET_ZIFENCEI): Ditto.
16712 (TARGET_ZIHINTNTL): Ditto.
16713 (TARGET_ZIHINTPAUSE): Ditto.
16714 (MASK_ZAWRS): Ditto.
16715 (TARGET_ZAWRS): Ditto.
16720 (TARGET_ZBA): Ditto.
16721 (TARGET_ZBB): Ditto.
16722 (TARGET_ZBC): Ditto.
16723 (TARGET_ZBS): Ditto.
16724 (MASK_ZFINX): Ditto.
16725 (MASK_ZDINX): Ditto.
16726 (MASK_ZHINX): Ditto.
16727 (MASK_ZHINXMIN): Ditto.
16728 (TARGET_ZFINX): Ditto.
16729 (TARGET_ZDINX): Ditto.
16730 (TARGET_ZHINX): Ditto.
16731 (TARGET_ZHINXMIN): Ditto.
16732 (MASK_ZBKB): Ditto.
16733 (MASK_ZBKC): Ditto.
16734 (MASK_ZBKX): Ditto.
16735 (MASK_ZKNE): Ditto.
16736 (MASK_ZKND): Ditto.
16737 (MASK_ZKNH): Ditto.
16739 (MASK_ZKSED): Ditto.
16740 (MASK_ZKSH): Ditto.
16742 (TARGET_ZBKB): Ditto.
16743 (TARGET_ZBKC): Ditto.
16744 (TARGET_ZBKX): Ditto.
16745 (TARGET_ZKNE): Ditto.
16746 (TARGET_ZKND): Ditto.
16747 (TARGET_ZKNH): Ditto.
16748 (TARGET_ZKR): Ditto.
16749 (TARGET_ZKSED): Ditto.
16750 (TARGET_ZKSH): Ditto.
16751 (TARGET_ZKT): Ditto.
16752 (MASK_ZTSO): Ditto.
16753 (TARGET_ZTSO): Ditto.
16754 (MASK_VECTOR_ELEN_32): Ditto.
16755 (MASK_VECTOR_ELEN_64): Ditto.
16756 (MASK_VECTOR_ELEN_FP_32): Ditto.
16757 (MASK_VECTOR_ELEN_FP_64): Ditto.
16758 (MASK_VECTOR_ELEN_FP_16): Ditto.
16759 (TARGET_VECTOR_ELEN_32): Ditto.
16760 (TARGET_VECTOR_ELEN_64): Ditto.
16761 (TARGET_VECTOR_ELEN_FP_32): Ditto.
16762 (TARGET_VECTOR_ELEN_FP_64): Ditto.
16763 (TARGET_VECTOR_ELEN_FP_16): Ditto.
16764 (MASK_ZVBB): Ditto.
16765 (MASK_ZVBC): Ditto.
16766 (TARGET_ZVBB): Ditto.
16767 (TARGET_ZVBC): Ditto.
16768 (MASK_ZVKG): Ditto.
16769 (MASK_ZVKNED): Ditto.
16770 (MASK_ZVKNHA): Ditto.
16771 (MASK_ZVKNHB): Ditto.
16772 (MASK_ZVKSED): Ditto.
16773 (MASK_ZVKSH): Ditto.
16774 (MASK_ZVKN): Ditto.
16775 (MASK_ZVKNC): Ditto.
16776 (MASK_ZVKNG): Ditto.
16777 (MASK_ZVKS): Ditto.
16778 (MASK_ZVKSC): Ditto.
16779 (MASK_ZVKSG): Ditto.
16780 (MASK_ZVKT): Ditto.
16781 (TARGET_ZVKG): Ditto.
16782 (TARGET_ZVKNED): Ditto.
16783 (TARGET_ZVKNHA): Ditto.
16784 (TARGET_ZVKNHB): Ditto.
16785 (TARGET_ZVKSED): Ditto.
16786 (TARGET_ZVKSH): Ditto.
16787 (TARGET_ZVKN): Ditto.
16788 (TARGET_ZVKNC): Ditto.
16789 (TARGET_ZVKNG): Ditto.
16790 (TARGET_ZVKS): Ditto.
16791 (TARGET_ZVKSC): Ditto.
16792 (TARGET_ZVKSG): Ditto.
16793 (TARGET_ZVKT): Ditto.
16794 (MASK_ZVL32B): Ditto.
16795 (MASK_ZVL64B): Ditto.
16796 (MASK_ZVL128B): Ditto.
16797 (MASK_ZVL256B): Ditto.
16798 (MASK_ZVL512B): Ditto.
16799 (MASK_ZVL1024B): Ditto.
16800 (MASK_ZVL2048B): Ditto.
16801 (MASK_ZVL4096B): Ditto.
16802 (MASK_ZVL8192B): Ditto.
16803 (MASK_ZVL16384B): Ditto.
16804 (MASK_ZVL32768B): Ditto.
16805 (MASK_ZVL65536B): Ditto.
16806 (TARGET_ZVL32B): Ditto.
16807 (TARGET_ZVL64B): Ditto.
16808 (TARGET_ZVL128B): Ditto.
16809 (TARGET_ZVL256B): Ditto.
16810 (TARGET_ZVL512B): Ditto.
16811 (TARGET_ZVL1024B): Ditto.
16812 (TARGET_ZVL2048B): Ditto.
16813 (TARGET_ZVL4096B): Ditto.
16814 (TARGET_ZVL8192B): Ditto.
16815 (TARGET_ZVL16384B): Ditto.
16816 (TARGET_ZVL32768B): Ditto.
16817 (TARGET_ZVL65536B): Ditto.
16818 (MASK_ZICBOZ): Ditto.
16819 (MASK_ZICBOM): Ditto.
16820 (MASK_ZICBOP): Ditto.
16821 (TARGET_ZICBOZ): Ditto.
16822 (TARGET_ZICBOM): Ditto.
16823 (TARGET_ZICBOP): Ditto.
16824 (MASK_ZICOND): Ditto.
16825 (TARGET_ZICOND): Ditto.
16827 (TARGET_ZFA): Ditto.
16828 (MASK_ZFHMIN): Ditto.
16830 (MASK_ZVFHMIN): Ditto.
16831 (MASK_ZVFH): Ditto.
16832 (TARGET_ZFHMIN): Ditto.
16833 (TARGET_ZFH): Ditto.
16834 (TARGET_ZVFHMIN): Ditto.
16835 (TARGET_ZVFH): Ditto.
16836 (MASK_ZMMUL): Ditto.
16837 (TARGET_ZMMUL): Ditto.
16843 (MASK_ZCMP): Ditto.
16844 (MASK_ZCMT): Ditto.
16845 (TARGET_ZCA): Ditto.
16846 (TARGET_ZCB): Ditto.
16847 (TARGET_ZCE): Ditto.
16848 (TARGET_ZCF): Ditto.
16849 (TARGET_ZCD): Ditto.
16850 (TARGET_ZCMP): Ditto.
16851 (TARGET_ZCMT): Ditto.
16852 (MASK_SVINVAL): Ditto.
16853 (MASK_SVNAPOT): Ditto.
16854 (TARGET_SVINVAL): Ditto.
16855 (TARGET_SVNAPOT): Ditto.
16856 (MASK_XTHEADBA): Ditto.
16857 (MASK_XTHEADBB): Ditto.
16858 (MASK_XTHEADBS): Ditto.
16859 (MASK_XTHEADCMO): Ditto.
16860 (MASK_XTHEADCONDMOV): Ditto.
16861 (MASK_XTHEADFMEMIDX): Ditto.
16862 (MASK_XTHEADFMV): Ditto.
16863 (MASK_XTHEADINT): Ditto.
16864 (MASK_XTHEADMAC): Ditto.
16865 (MASK_XTHEADMEMIDX): Ditto.
16866 (MASK_XTHEADMEMPAIR): Ditto.
16867 (MASK_XTHEADSYNC): Ditto.
16868 (TARGET_XTHEADBA): Ditto.
16869 (TARGET_XTHEADBB): Ditto.
16870 (TARGET_XTHEADBS): Ditto.
16871 (TARGET_XTHEADCMO): Ditto.
16872 (TARGET_XTHEADCONDMOV): Ditto.
16873 (TARGET_XTHEADFMEMIDX): Ditto.
16874 (TARGET_XTHEADFMV): Ditto.
16875 (TARGET_XTHEADINT): Ditto.
16876 (TARGET_XTHEADMAC): Ditto.
16877 (TARGET_XTHEADMEMIDX): Ditto.
16878 (TARGET_XTHEADMEMPAIR): Ditto.
16879 (TARGET_XTHEADSYNC): Ditto.
16880 (MASK_XVENTANACONDOPS): Ditto.
16881 (TARGET_XVENTANACONDOPS): Ditto.
16882 * config/riscv/riscv.opt: Add new Mask defination.
16883 * doc/options.texi: Add explanation for this new usage.
16884 * opt-functions.awk: Add new function to find the index
16885 of target variable from extra_target_vars.
16886 * opt-read.awk: Add new function to store the Mask flags.
16887 * opth-gen.awk: Add new function to output the defination of
16888 Mask Macro and Target Macro.
16890 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
16891 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16892 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16895 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
16896 Change second parameter to rtx *.
16897 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
16898 * config/riscv/vector.md: Changed callers of
16899 riscv_vector::legitimize_move.
16900 (*mov<mode>_mem_to_mem): Remove.
16902 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16905 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
16906 Replace safe_grow with safe_grow_cleared.
16908 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16910 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
16911 in function comment.
16913 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16915 PR middle-end/111625
16916 PR middle-end/111637
16917 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
16919 (bitint_large_huge::handle_operand_addr): For uninitialized operands
16920 use limb_prec or -limb_prec precision.
16922 2023-09-30 Jakub Jelinek <jakub@redhat.com>
16924 * vec.h (quick_grow): Uncomment static_assert.
16926 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16928 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
16930 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
16932 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
16933 SETs when the outer code is INSN.
16935 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16937 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
16940 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
16942 * poly-int.h (poly_int_pod): Delete.
16943 (poly_coeff_traits::init_cast): New type.
16944 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
16945 (poly_int): Replace constructors that take 1 and 2 coefficients with
16946 a general one that takes an arbitrary number of coefficients.
16947 Delegate initialization to two new private constructors, one of
16948 which uses the coefficients as-is and one of which adds an extra
16949 zero of the appropriate type (and precision, where applicable).
16950 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
16951 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
16952 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
16953 * gengtype.cc (main): Don't register poly_int64_pod.
16954 * calls.cc (initialize_argument_information): Use poly_int rather
16956 (combine_pending_stack_adjustment_and_call): Likewise.
16957 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
16958 * data-streamer.h (bp_unpack_poly_value): Likewise.
16959 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
16960 (struct queued_reg_save): Likewise.
16961 * dwarf2out.h (struct dw_cfa_location): Likewise.
16962 * emit-rtl.h (struct incoming_args): Likewise.
16963 (struct rtl_data): Likewise.
16964 * expr.cc (get_bit_range): Likewise.
16965 (get_inner_reference): Likewise.
16966 * expr.h (get_bit_range): Likewise.
16967 * fold-const.cc (split_address_to_core_and_offset): Likewise.
16968 (ptr_difference_const): Likewise.
16969 * fold-const.h (ptr_difference_const): Likewise.
16970 * function.cc (try_fit_stack_local): Likewise.
16971 (instantiate_new_reg): Likewise.
16972 * function.h (struct expr_status): Likewise.
16973 (struct args_size): Likewise.
16974 * genmodes.cc (ZERO_COEFFS): Likewise.
16975 (mode_size_inline): Likewise.
16976 (mode_nunits_inline): Likewise.
16977 (emit_mode_precision): Likewise.
16978 (emit_mode_size): Likewise.
16979 (emit_mode_nunits): Likewise.
16980 * gimple-fold.cc (get_base_constructor): Likewise.
16981 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
16982 * inchash.h (class hash): Likewise.
16983 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
16984 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
16986 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
16987 * lra-eliminations.cc (self_elim_offsets): Likewise.
16988 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
16989 * omp-low.cc (omplow_simd_context): Likewise.
16990 * pretty-print.cc (pp_wide_integer): Likewise.
16991 * pretty-print.h (pp_wide_integer): Likewise.
16992 * reload.cc (struct decomposition): Likewise.
16993 * reload.h (struct reload): Likewise.
16994 * reload1.cc (spill_stack_slot_width): Likewise.
16995 (struct elim_table): Likewise.
16996 (offsets_at): Likewise.
16997 (init_eliminable_invariants): Likewise.
16998 * rtl.h (union rtunion): Likewise.
16999 (poly_int_rtx_p): Likewise.
17000 (strip_offset): Likewise.
17001 (strip_offset_and_add): Likewise.
17002 * rtlanal.cc (strip_offset): Likewise.
17003 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
17004 (get_addr_base_and_unit_offset_1): Likewise.
17005 (get_addr_base_and_unit_offset): Likewise.
17006 * tree-dfa.h (get_ref_base_and_extent): Likewise.
17007 (get_addr_base_and_unit_offset_1): Likewise.
17008 (get_addr_base_and_unit_offset): Likewise.
17009 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
17010 (strip_offset): Likewise.
17011 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
17012 * tree.cc (ptrdiff_tree_p): Likewise.
17013 * tree.h (poly_int_tree_p): Likewise.
17014 (ptrdiff_tree_p): Likewise.
17015 (get_inner_reference): Likewise.
17017 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
17019 * config/pa/pa.md (memory_barrier): Revise comment.
17020 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
17021 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
17023 2023-09-29 Jakub Jelinek <jakub@redhat.com>
17025 * vec.h (quick_insert, ordered_remove, unordered_remove,
17026 block_remove, qsort, sort, stablesort, quick_grow): Guard
17027 std::is_trivially_{copyable,default_constructible} and
17028 vec_detail::is_trivially_copyable_or_pair static assertions
17029 with GCC_VERSION >= 5000.
17030 (vec_detail::is_trivially_copyable_or_pair): Guard definition
17031 with GCC_VERSION >= 5000.
17033 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
17035 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
17036 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
17037 and aarch64_stp_policy to aarch64_ldp_stp_policy.
17038 (enum aarch64_stp_policy): Removed.
17039 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
17040 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
17041 and left only the definitions to the aarch64-opts one.
17042 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
17043 (aarch64_parse_stp_policy): Removed.
17044 (aarch64_override_options_internal): Removed calls to parsing
17045 functions and added obvious direct assignments.
17046 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
17047 code quality based on the new changes.
17048 * config/aarch64/aarch64.opt: Use single enum type
17049 aarch64_ldp_stp_policy for both ldp and stp options.
17051 2023-09-29 Richard Biener <rguenther@suse.de>
17053 PR tree-optimization/111583
17054 * tree-loop-distribution.cc (find_single_drs): Ensure the
17055 load/store are always executed.
17057 2023-09-29 Jakub Jelinek <jakub@redhat.com>
17059 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
17060 quick_grow_cleared method on unprom rather than quick_grow.
17062 2023-09-29 Sergei Trofimovich <siarheit@google.com>
17064 PR middle-end/111505
17065 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
17066 Add new helper. Use helper instead of memset() to wipe out pointers.
17068 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
17070 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
17072 * builtins.cc (c_readstr): Likewise. Build a local array of
17073 bytes and use native_decode_rtx to get the rtx image.
17074 (builtin_memcpy_read_str): Simplify accordingly.
17075 (builtin_strncpy_read_str): Likewise.
17076 (builtin_memset_read_str): Likewise.
17077 (builtin_memset_gen_str): Likewise.
17078 * expr.cc (string_cst_read_str): Likewise.
17080 2023-09-29 Jakub Jelinek <jakub@redhat.com>
17082 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
17083 instead of quick_grow on vec<bitmap_head> members.
17084 * cfganal.cc (control_dependences::control_dependences): Likewise.
17085 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
17086 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
17087 on auto_vec<bitmap_head> vars.
17088 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
17089 of quick_grow on vec<bitmap_head> var.
17091 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
17094 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
17096 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
17099 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
17102 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
17103 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
17104 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
17106 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
17109 2023-09-28 Pan Li <pan2.li@intel.com>
17112 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
17114 * config/riscv/vector-iterators.md: New iterator.
17116 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
17118 * rtl.h (lra_in_progress): Change type to bool.
17119 (ira_in_progress): Add new extern.
17120 * ira.cc (ira_in_progress): New global.
17121 (pass_ira::execute): Set up ira_in_progress.
17122 * lra.cc: (lra_in_progress): Change type to bool and initialize.
17123 (lra): Use bool values for lra_in_progress.
17124 * lra-eliminations.cc (init_elim_table): Ditto.
17126 2023-09-28 Richard Biener <rguenther@suse.de>
17129 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
17130 Use a heap allocated worklist for CFG traversal instead of
17133 2023-09-28 Jakub Jelinek <jakub@redhat.com>
17134 Jonathan Wakely <jwakely@redhat.com>
17136 * vec.h: Mention in file comment limited support for non-POD types
17137 in some operations.
17138 (vec_destruct): New function template.
17139 (release): Use it for non-trivially destructible T.
17140 (truncate): Likewise.
17141 (quick_push): Perform a placement new into slot
17142 instead of assignment.
17143 (pop): For non-trivially destructible T return void
17144 rather than T & and destruct the popped element.
17145 (quick_insert, ordered_remove): Note that they aren't suitable
17146 for non-trivially copyable types. Add static_asserts for that.
17147 (block_remove): Assert T is trivially copyable.
17148 (vec_detail::is_trivially_copyable_or_pair): New trait.
17149 (qsort, sort, stablesort): Assert T is trivially copyable or
17150 std::pair with both trivally copyable types.
17151 (quick_grow): Add assert T is trivially default constructible,
17152 for now commented out.
17153 (quick_grow_cleared): Don't call quick_grow, instead inline it
17154 by hand except for the new static_assert.
17155 (gt_ggc_mx): Assert T is trivially destructable.
17156 (auto_vec::operator=): Formatting fixes.
17157 (auto_vec::auto_vec): Likewise.
17158 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
17159 it manually and call quick_grow_cleared method rather than quick_grow.
17160 (safe_grow_cleared): Likewise.
17161 * edit-context.cc (class line_event): Move definition earlier.
17162 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
17164 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
17165 safe_grow_cleared instead of safe_grow followed by placement new
17166 constructing the elements.
17168 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
17170 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
17171 * tree-affine.cc (expr_to_aff_combination): Likewise.
17173 2023-09-28 Richard Biener <rguenther@suse.de>
17175 PR tree-optimization/111614
17176 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
17177 convert the first vector when required.
17179 2023-09-28 xuli <xuli1@eswincomputing.com>
17182 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
17183 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
17185 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
17187 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
17189 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
17192 * configure: Regenerate.
17193 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
17195 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
17196 Philipp Tomsich <philipp.tomsich@vrull.eu>
17197 Manolis Tsamis <manolis.tsamis@vrull.eu>
17199 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
17201 (enum aarch64_stp_policy): New enum type.
17202 * config/aarch64/aarch64-protos.h (struct tune_params): Add
17203 appropriate enums for the policies.
17204 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
17205 * config/aarch64/aarch64-tuning-flags.def
17206 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
17208 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
17209 function to parse ldp-policy parameter.
17210 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
17211 (aarch64_override_options_internal): Call parsing functions.
17212 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
17213 (aarch64_operands_ok_for_ldpstp): Add call to
17214 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
17215 check and alignment check and remove superseded ones.
17216 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
17217 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
17218 check and alignment check and remove superseded ones.
17219 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
17220 (aarch64-stp-policy): New param.
17221 * doc/invoke.texi: Document the parameters accordingly.
17223 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
17225 * tree-data-ref.cc (include calls.h): Add new include.
17226 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
17228 2023-09-27 Richard Biener <rguenther@suse.de>
17230 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
17232 2023-09-27 Jakub Jelinek <jakub@redhat.com>
17235 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
17236 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
17238 * function.cc (assign_parm_find_data_types): Likewise.
17240 2023-09-27 Pan Li <pan2.li@intel.com>
17242 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
17243 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17244 (enum insn_type): Ditto.
17245 (expand_vec_roundeven): New func decl.
17246 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
17248 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17251 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
17253 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17255 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
17257 2023-09-27 Pan Li <pan2.li@intel.com>
17259 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
17260 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
17261 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
17262 (expand_vec_trunc): Ditto.
17264 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
17268 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
17269 Handle failure from expand_builtin_atomic_test_and_set.
17270 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
17271 generate atomic code through target support, return NULL
17272 instead of emitting non-atomic code. Also, for code handling
17273 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
17274 from calling emit_store_flag_force instead of returning NULL.
17276 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
17278 PR tree-optimization/111599
17279 * value-relation.cc (relation_oracle::valid_equivs): Ensure
17282 2023-09-26 Andrew Pinski <apinski@marvell.com>
17284 PR tree-optimization/106164
17285 PR tree-optimization/111456
17286 * match.pd (`(A ==/!= B) & (A CMP C)`):
17287 Support an optional cast on the second A.
17288 (`(A ==/!= B) | (A CMP C)`): Likewise.
17290 2023-09-26 Andrew Pinski <apinski@marvell.com>
17292 PR tree-optimization/111469
17293 * tree-ssa-phiopt.cc (minmax_replacement): Fix
17294 the assumption for the `non-diamond` handling cases
17297 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17299 * match.pd: Optimize COND_ADD reduction pattern.
17301 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17303 PR tree-optimization/111594
17304 PR tree-optimization/110660
17305 * match.pd: Optimize COND_LEN_ADD reduction.
17307 2023-09-26 Pan Li <pan2.li@intel.com>
17309 * config/riscv/autovec.md (round<mode>2): New pattern.
17310 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17311 (enum insn_type): Ditto.
17312 (expand_vec_round): New function decl.
17313 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
17315 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
17317 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
17319 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
17321 PR middle-end/111547
17322 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
17323 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
17325 2023-09-26 Pan Li <pan2.li@intel.com>
17327 * config/riscv/autovec.md (rint<mode>2): New pattern.
17328 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
17329 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
17331 2023-09-26 Pan Li <pan2.li@intel.com>
17333 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
17334 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17335 (expand_vec_nearbyint): New function decl.
17336 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
17338 2023-09-26 Pan Li <pan2.li@intel.com>
17340 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
17341 (get_fp_rounding_coefficient): Rename.
17342 (gen_floor_const_fp): Remove.
17343 (expand_vec_ceil): Take renamed func.
17344 (expand_vec_floor): Ditto.
17346 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
17348 PR middle-end/111497
17349 * lra-constraints.cc (lra_constraints): Copy substituted
17351 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
17353 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
17355 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
17356 return statement in the varying case.
17358 2023-09-25 Xi Ruoyao <xry111@xry111.site>
17360 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
17362 2023-09-25 Andrew Pinski <apinski@marvell.com>
17364 PR tree-optimization/110386
17365 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
17367 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17370 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
17372 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
17375 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
17378 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
17381 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
17382 target_option_default_node when the callee has no option
17383 attributes, also simplify the existing code accordingly.
17385 2023-09-25 Guo Jie <guojie@loongson.cn>
17387 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
17388 pattern for vector construction.
17389 (vec_set<mode>_internal): Ditto.
17390 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
17391 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
17392 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
17393 Optimized the implementation of vector construction.
17394 (loongarch_expand_vector_init_same): New function.
17395 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
17396 pattern for vector construction.
17397 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
17399 (vec_concatv2df): Ditto.
17400 (vec_concatv4sf): Ditto.
17402 2023-09-24 Pan Li <pan2.li@intel.com>
17405 * config/riscv/riscv-v.cc
17406 (expand_vector_init_merge_repeating_sequence): Bugfix
17408 2023-09-24 Andrew Pinski <apinski@marvell.com>
17410 PR tree-optimization/111543
17411 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
17413 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17415 * config/riscv/autovec-opt.md: Extend VLS modes
17416 * config/riscv/vector-iterators.md: Ditto.
17418 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17420 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
17422 2023-09-23 Pan Li <pan2.li@intel.com>
17424 * config/riscv/autovec.md (floor<mode>2): New pattern.
17425 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17426 (enum insn_type): Ditto.
17427 (expand_vec_floor): New function decl.
17428 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
17429 (expand_vec_floor): Ditto.
17431 2023-09-22 Pan Li <pan2.li@intel.com>
17433 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
17434 (emit_vec_float_cmp_mask): Rename.
17435 (expand_vec_copysign): Ditto.
17436 (emit_vec_copysign): Ditto.
17437 (emit_vec_abs): New function impl.
17438 (emit_vec_cvt_x_f): Ditto.
17439 (emit_vec_cvt_f_x): Ditto.
17440 (expand_vec_ceil): Ditto.
17442 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17444 * config/riscv/vector-iterators.md: Extend VLS modes.
17446 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17448 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
17449 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
17450 (vec_duplicate<mode>): Ditto.
17452 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17454 * config/riscv/autovec.md: Add VLS conditional patterns.
17455 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
17456 (expand_cond_binop): Ditto.
17457 (expand_cond_ternop): Ditto.
17458 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
17459 (expand_cond_binop): Ditto.
17460 (expand_cond_ternop): Ditto.
17462 2023-09-22 xuli <xuli1@eswincomputing.com>
17465 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
17466 into vrgatherei16.vv.
17468 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
17470 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
17471 New combine patterns.
17472 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
17474 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
17476 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
17477 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
17479 2023-09-22 Pan Li <pan2.li@intel.com>
17481 * config/riscv/autovec.md (ceil<mode>2): New pattern.
17482 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
17483 (enum insn_type): Ditto.
17484 (expand_vec_ceil): New function decl.
17485 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
17486 (expand_vec_float_cmp_mask): Ditto.
17487 (expand_vec_copysign): Ditto.
17488 (expand_vec_ceil): Ditto.
17489 * config/riscv/vector.md: Add VLS mode support.
17491 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17493 * config/riscv/autovec.md: Extend VLS modes.
17495 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17497 * config/riscv/vector-iterators.md: Extend VLS modes.
17499 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
17500 Robin Dapp <rdapp.gcc@gmail.com>
17502 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
17503 (emit_nonvlmax_insn): Adjust comments.
17504 (emit_vlmax_insn_lra): Adjust comments.
17506 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17508 * config.gcc (*linux*): Set rust target_objs, and
17509 target_has_targetrustm,
17510 * config/t-linux (linux-rust.o): New rule.
17511 * config/linux-rust.cc: New file.
17513 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17515 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
17516 rust_target_objs and target_has_targetrustm.
17517 * config/t-winnt (winnt-rust.o): New rule.
17518 * config/winnt-rust.cc: New file.
17520 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17522 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
17523 and target_has_targetrustm.
17524 * config/fuchsia-rust.cc: New file.
17525 * config/t-fuchsia: New file.
17527 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17529 * config.gcc (*-*-vxworks*): Set rust_target_objs and
17530 target_has_targetrustm.
17531 * config/t-vxworks (vxworks-rust.o): New rule.
17532 * config/vxworks-rust.cc: New file.
17534 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17536 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
17537 target_has_targetrustm.
17538 * config/t-dragonfly (dragonfly-rust.o): New rule.
17539 * config/dragonfly-rust.cc: New file.
17541 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17543 * config.gcc (*-*-solaris2*): Set rust_target_objs and
17544 target_has_targetrustm.
17545 * config/t-sol2 (sol2-rust.o): New rule.
17546 * config/sol2-rust.cc: New file.
17548 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17550 * config.gcc (*-*-openbsd*): Set rust_target_objs and
17551 target_has_targetrustm.
17552 * config/t-openbsd (openbsd-rust.o): New rule.
17553 * config/openbsd-rust.cc: New file.
17555 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17557 * config.gcc (*-*-netbsd*): Set rust_target_objs and
17558 target_has_targetrustm.
17559 * config/t-netbsd (netbsd-rust.o): New rule.
17560 * config/netbsd-rust.cc: New file.
17562 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17564 * config.gcc (*-*-freebsd*): Set rust_target_objs and
17565 target_has_targetrustm.
17566 * config/t-freebsd (freebsd-rust.o): New rule.
17567 * config/freebsd-rust.cc: New file.
17569 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17571 * config.gcc (*-*-darwin*): Set rust_target_objs and
17572 target_has_targetrustm.
17573 * config/t-darwin (darwin-rust.o): New rule.
17574 * config/darwin-rust.cc: New file.
17576 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17578 * config/i386/t-i386 (i386-rust.o): New rule.
17579 * config/i386/i386-rust.cc: New file.
17580 * config/i386/i386-rust.h: New file.
17582 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17584 * doc/tm.texi: Regenerate.
17585 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
17587 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17589 * doc/tm.texi: Regenerate.
17590 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
17591 TARGET_RUST_CPU_INFO.
17593 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
17595 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
17596 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
17597 (tm_rust.h, cs-tm_rust.h, default-rust.o,
17598 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
17599 (s-tm-texi): Also check timestamp on rust-target.def.
17600 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
17601 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
17602 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
17604 * configure: Regenerate.
17605 * configure.ac (tm_rust_file_list, tm_rust_include_list,
17606 rust_target_objs): Add substitutes.
17607 * doc/tm.texi: Regenerate.
17608 * doc/tm.texi.in (targetrustm): Document.
17609 (target_has_targetrustm): Document.
17610 * genhooks.cc: Include rust/rust-target.def.
17611 * config/default-rust.cc: New file.
17613 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17616 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
17617 * config/riscv/predicates.md (autovec_else_operand): New predicate.
17618 * config/riscv/riscv-v.cc (get_else_operand): New function.
17619 (expand_cond_len_unop): Adapt ELSE value.
17620 (expand_cond_len_binop): Ditto.
17621 (expand_cond_len_ternop): Ditto.
17622 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
17623 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
17625 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17628 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
17630 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
17632 PR tree-optimization/111355
17633 * match.pd ((X + C) / N): Update pattern.
17635 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
17637 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
17639 2023-09-21 xuli <xuli1@eswincomputing.com>
17642 * config/riscv/constraints.md (c01): const_int 1.
17643 (c02): const_int 2.
17644 (c04): const_int 4.
17645 (c08): const_int 8.
17646 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
17647 (vector_eew16_stride_operand): Ditto.
17648 (vector_eew32_stride_operand): Ditto.
17649 (vector_eew64_stride_operand): Ditto.
17650 * config/riscv/vector-iterators.md: New iterator for stride operand.
17651 * config/riscv/vector.md: Add stride = element width constraint.
17653 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
17655 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
17656 (const_1_or_4_operand): Ditto.
17657 (vector_gs_scale_operand_16): Ditto.
17658 (vector_gs_scale_operand_32): Ditto.
17659 * config/riscv/vector-iterators.md: Adjust.
17661 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17663 * config/riscv/autovec.md: Extend VLS modes.
17664 * config/riscv/vector-iterators.md: Ditto.
17665 * config/riscv/vector.md: Ditto.
17667 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
17669 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
17670 of the return value.
17671 (ssa_cache::dump): Don't print GLOBAL RANGE header.
17672 (ssa_lazy_cache::merge_range): Adjust return value meaning.
17673 (ranger_cache::dump): Print GLOBAL RANGE header.
17675 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
17677 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
17679 (foperator_unordered_gt::fold_range): Same.
17680 (foperator_unordered_lt::fold_range): Same.
17681 (foperator_unordered_le::fold_range): Same.
17683 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17685 * builtins.h (type_to_class): Declare.
17686 * builtins.cc (type_to_class): No longer static. Return
17687 int rather than enum.
17688 * doc/extend.texi (__builtin_classify_type): Document.
17690 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17693 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
17694 * optabs.cc (maybe_legitimize_operand): Ditto.
17695 (can_reuse_operands_p): Ditto.
17696 * optabs.h (enum expand_operand_type): Ditto.
17697 (create_undefined_input_operand): Ditto.
17699 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
17701 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
17702 'omp allocate' variables; move stack cleanup after other
17704 (omp_notice_variable): Process original decl when decl
17705 of the value-expression for a 'omp allocate' variable is passed.
17706 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
17708 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
17710 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17711 support simplifying vector int not only scalar int.
17713 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17715 * config/riscv/vector-iterators.md: Extend VLS floating-point.
17717 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17719 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
17721 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
17724 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
17725 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
17727 2023-09-20 Richard Biener <rguenther@suse.de>
17729 PR tree-optimization/111489
17730 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
17732 2023-09-20 Richard Biener <rguenther@suse.de>
17734 PR tree-optimization/111489
17735 * doc/invoke.texi (--param uninit-max-chain-len): Document.
17736 (--param uninit-max-num-chains): Likewise.
17737 * params.opt (-param=uninit-max-chain-len=): New.
17738 (-param=uninit-max-num-chains=): Likewise.
17739 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
17740 param_uninit_max_num_chains.
17741 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
17742 (uninit_analysis::init_use_preds): Avoid VLA.
17743 (uninit_analysis::init_from_phi_def): Likewise.
17744 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
17745 template parameter.
17747 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17749 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
17750 GET_MODE_PRECISION of TImode or DImode depending on whether
17751 TImode is supported scalar mode.
17752 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
17753 * expr.cc (expand_expr_real_1): Likewise.
17754 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
17755 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
17757 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
17759 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
17760 (*n<optab><mode>): Ditto.
17761 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
17762 (*<any_shiftrt:optab>trunc<mode>): Ditto.
17763 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
17764 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
17765 (*single_widen_mult<any_extend:su><mode>): Ditto.
17766 (*single_widen_mul<any_extend:su><mode>): Ditto.
17767 (*single_widen_mult<mode>): Ditto.
17768 (*single_widen_mul<mode>): Ditto.
17769 (*dual_widen_fma<mode>): Ditto.
17770 (*dual_widen_fma<su><mode>): Ditto.
17771 (*single_widen_fma<mode>): Ditto.
17772 (*single_widen_fma<su><mode>): Ditto.
17773 (*dual_fma<mode>): Ditto.
17774 (*single_fma<mode>): Ditto.
17775 (*dual_fnma<mode>): Ditto.
17776 (*dual_widen_fnma<mode>): Ditto.
17777 (*single_fnma<mode>): Ditto.
17778 (*single_widen_fnma<mode>): Ditto.
17779 (*dual_fms<mode>): Ditto.
17780 (*dual_widen_fms<mode>): Ditto.
17781 (*single_fms<mode>): Ditto.
17782 (*single_widen_fms<mode>): Ditto.
17783 (*dual_fnms<mode>): Ditto.
17784 (*dual_widen_fnms<mode>): Ditto.
17785 (*single_fnms<mode>): Ditto.
17786 (*single_widen_fnms<mode>): Ditto.
17788 2023-09-20 Jakub Jelinek <jakub@redhat.com>
17791 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
17792 on vars or function decls if -fopenmp or -fopenmp-simd.
17794 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
17797 * config/riscv/autovec-opt.md: Add missed operand.
17799 2023-09-20 Omar Sandoval <osandov@osandov.com>
17802 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
17803 dwarf_split_debug_info.
17805 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17807 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
17808 (vectorize_related_mode): Add VLS related modes.
17809 * config/riscv/vector-iterators.md: Extend VLS modes.
17811 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
17813 PR rtl-optimization/110071
17814 * ira-color.cc (improve_allocation): Consider cost of callee
17817 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
17818 Xi Ruoyao <xry111@xry111.site>
17820 * configure: Regenerate.
17821 * configure.ac: Checking assembler for -mno-relax support.
17822 Disable relaxation when probing leb128 support.
17824 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
17826 * config.in: Regenerate.
17827 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
17828 mrelax. And set the initial value of explicit-relocs according to the
17830 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
17831 --no-relax option to the linker.
17832 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
17833 -mno-relax, pass the -mno-relax option to the assembler.
17834 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
17835 * config/loongarch/loongarch.opt: Regenerate.
17836 * configure: Regenerate.
17837 * configure.ac: Add detection of support for binutils relax function.
17839 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
17841 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
17842 -fdeps-target= flags.
17843 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
17844 only -fdeps-format= is specified.
17845 * json.h: Add a TODO item to refactor out to share with
17846 `libcpp/mkdeps.cc`.
17848 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
17849 Jason Merrill <jason@redhat.com>
17851 * gcc.cc (join_spec_func): Add a spec function to join all
17854 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
17856 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
17857 src_op_0 var to avoid rtl check error.
17859 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17861 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
17863 (operator_not_equal::fold_range): Handle VREL_EQ.
17864 (operator_lt::fold_range): Remove special casing for VREL_EQ.
17865 (operator_gt::fold_range): Same.
17866 (foperator_unordered_equal::fold_range): Same.
17868 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
17870 * doc/extend.texi: Document attributes hot, cold on C++ types.
17872 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
17874 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
17875 modulo instruction is disabled.
17876 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
17877 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
17878 (define_expand umod<mode>3): New.
17879 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
17880 instruction is disabled.
17881 (umodti3, modti3): Check if the modulo instruction is disabled.
17883 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
17885 * doc/gm2.texi (fdebug-builtins): Correct description.
17887 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
17889 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
17890 * config/iq2000/iq2000.md (rotrsi3): Use it.
17892 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17894 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
17895 (operator_lt::op2_range): Same.
17896 (operator_le::op1_range): Same.
17897 (operator_le::op2_range): Same.
17898 (operator_gt::op1_range): Same.
17899 (operator_gt::op2_range): Same.
17900 (operator_ge::op1_range): Same.
17901 (operator_ge::op2_range): Same.
17902 (foperator_unordered_lt::op1_range): Same.
17903 (foperator_unordered_lt::op2_range): Same.
17904 (foperator_unordered_le::op1_range): Same.
17905 (foperator_unordered_le::op2_range): Same.
17906 (foperator_unordered_gt::op1_range): Same.
17907 (foperator_unordered_gt::op2_range): Same.
17908 (foperator_unordered_ge::op1_range): Same.
17909 (foperator_unordered_ge::op2_range): Same.
17911 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17913 * value-range.h (frange::update_nan): New.
17915 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
17917 * range-op-float.cc (operator_not_equal::op2_range): New.
17918 * range-op-mixed.h: Add operator_not_equal::op2_range.
17920 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
17922 PR tree-optimization/110080
17923 PR tree-optimization/110249
17924 * tree-vrp.cc (remove_unreachable::final_p): New.
17925 (remove_unreachable::maybe_register): Rename from
17926 maybe_register_block and call early or final routine.
17927 (fully_replaceable): New.
17928 (remove_unreachable::handle_early): New.
17929 (remove_unreachable::remove_and_update_globals): Remove
17930 non-final processing.
17931 (rvrp_folder::rvrp_folder): Add final flag to constructor.
17932 (rvrp_folder::post_fold_bb): Remove unreachable registration.
17933 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
17934 (execute_ranger_vrp): Adjust some call parameters.
17936 2023-09-19 Richard Biener <rguenther@suse.de>
17939 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
17941 * tree-pretty-print.cc (op_symbol): Likewise.
17942 (op_symbol_code): Print TDF_GIMPLE variant if requested.
17943 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
17945 (dump_gimple_cond): Likewise.
17947 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
17948 Pan Li <pan2.li@intel.com>
17950 * tree-streamer.h (bp_unpack_machine_mode): If
17951 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
17953 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17955 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
17957 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17959 * config/riscv/autovec.md: Extend VLS modes.
17960 * config/riscv/vector.md: Ditto.
17962 2023-09-19 Richard Biener <rguenther@suse.de>
17964 PR tree-optimization/111465
17965 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
17966 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
17968 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17970 * config/riscv/autovec.md: Extend VLS floating-point modes.
17971 * config/riscv/vector.md: Ditto.
17973 2023-09-19 Jakub Jelinek <jakub@redhat.com>
17975 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
17976 nor check type_has_mode_precision_p for width larger than [TD]Imode
17978 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
17979 to type. Use boolean_true_node instead of
17980 constant_boolean_node (true, boolean_type_node). Formatting fixes.
17982 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17984 * config/riscv/autovec.md: Add VLS modes.
17985 * config/riscv/vector.md: Ditto.
17987 2023-09-19 Jakub Jelinek <jakub@redhat.com>
17989 * tree.cc (build_bitint_type): Assert precision is not 0, or
17990 for signed types 1.
17991 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
17992 of unsigned _BitInt(1).
17994 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
17996 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
17997 Removed old combine patterns.
17998 (*single_<optab>mult_plus<mode>): Ditto.
17999 (*double_<optab>mult_plus<mode>): Ditto.
18000 (*sign_zero_extend_fma): Ditto.
18001 (*zero_sign_extend_fma): Ditto.
18002 (*double_widen_fma<mode>): Ditto.
18003 (*single_widen_fma<mode>): Ditto.
18004 (*double_widen_fnma<mode>): Ditto.
18005 (*single_widen_fnma<mode>): Ditto.
18006 (*double_widen_fms<mode>): Ditto.
18007 (*single_widen_fms<mode>): Ditto.
18008 (*double_widen_fnms<mode>): Ditto.
18009 (*single_widen_fnms<mode>): Ditto.
18010 (*reduc_plus_scal_<mode>): Adjust name.
18011 (*widen_reduc_plus_scal_<mode>): Adjust name.
18012 (*dual_widen_fma<mode>): New combine pattern.
18013 (*dual_widen_fmasu<mode>): Ditto.
18014 (*dual_widen_fmaus<mode>): Ditto.
18015 (*dual_fma<mode>): Ditto.
18016 (*single_fma<mode>): Ditto.
18017 (*dual_fnma<mode>): Ditto.
18018 (*single_fnma<mode>): Ditto.
18019 (*dual_fms<mode>): Ditto.
18020 (*single_fms<mode>): Ditto.
18021 (*dual_fnms<mode>): Ditto.
18022 (*single_fnms<mode>): Ditto.
18023 * config/riscv/autovec.md (fma<mode>4):
18024 Reafctor fma pattern.
18025 (*fma<VI:mode><P:mode>): Removed.
18026 (fnma<mode>4): Reafctor.
18027 (*fnma<VI:mode><P:mode>): Removed.
18028 (*fma<VF:mode><P:mode>): Removed.
18029 (*fnma<VF:mode><P:mode>): Removed.
18030 (fms<mode>4): Reafctor.
18031 (*fms<VF:mode><P:mode>): Removed.
18032 (fnms<mode>4): Reafctor.
18033 (*fnms<VF:mode><P:mode>): Removed.
18034 * config/riscv/riscv-protos.h (prepare_ternary_operands):
18036 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
18037 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
18038 (*pred_mul_plus<mode>): Removed.
18039 (*pred_mul_plus<mode>_scalar): Removed.
18040 (*pred_mul_plus<mode>_extended_scalar): Removed.
18041 (*pred_minus_mul<mode>_undef): New pattern.
18042 (*pred_minus_mul<mode>): Removed.
18043 (*pred_minus_mul<mode>_scalar): Removed.
18044 (*pred_minus_mul<mode>_extended_scalar): Removed.
18045 (*pred_mul_<optab><mode>_undef): New pattern.
18046 (*pred_mul_<optab><mode>): Removed.
18047 (*pred_mul_<optab><mode>_scalar): Removed.
18048 (*pred_mul_neg_<optab><mode>_undef): New pattern.
18049 (*pred_mul_neg_<optab><mode>): Removed.
18050 (*pred_mul_neg_<optab><mode>_scalar): Removed.
18052 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
18054 * config/riscv/riscv-vector-builtins.cc
18055 (builtin_decl, expand_builtin): Replace SVE with RVV.
18057 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
18059 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
18060 riscv-cmo.def and riscv-scalar-crypto.def.
18062 2023-09-18 Pan Li <pan2.li@intel.com>
18064 * config/riscv/autovec.md: Extend to vls mode.
18066 2023-09-18 Pan Li <pan2.li@intel.com>
18068 * config/riscv/autovec.md: Bugfix.
18069 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
18071 2023-09-18 Andrew Pinski <apinski@marvell.com>
18073 PR tree-optimization/111442
18074 * match.pd (zero_one_valued_p): Have the bit_and match not be
18077 2023-09-18 Andrew Pinski <apinski@marvell.com>
18079 PR tree-optimization/111435
18080 * match.pd (zero_one_valued_p): Don't do recursion
18083 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
18085 * config/darwin-protos.h (enum darwin_external_toolchain): New.
18086 * config/darwin.cc (DSYMUTIL_VERSION): New.
18087 (darwin_override_options): Choose the default debug DWARF version
18088 depending on the configured dsymutil version.
18090 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
18092 * configure: Regenerate.
18093 * configure.ac: Handle explict disable of stdlib option, set
18094 defaults for Darwin.
18096 2023-09-18 Andrew Pinski <apinski@marvell.com>
18098 PR tree-optimization/111431
18099 * match.pd (`(a == CST) & a`): New pattern.
18101 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18103 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
18104 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
18106 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
18109 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
18110 Add support for immediates using shifted ORR/BIC.
18111 (aarch64_split_dimode_const_store): Apply if we save one instruction.
18112 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
18113 Make pattern global.
18115 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
18117 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
18118 (neoverse-v1): Place before zeus.
18119 (neoverse-v2): Place before demeter.
18120 * config/aarch64/aarch64-tune.md: Regenerate.
18122 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18124 * config/riscv/autovec.md: Add VLS modes.
18125 * config/riscv/vector-iterators.md: Ditto.
18126 * config/riscv/vector.md: Ditto.
18128 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18130 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
18131 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
18133 2023-09-18 Richard Biener <rguenther@suse.de>
18135 PR tree-optimization/111294
18136 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
18138 (back_threader::find_paths_to_names): Adjust.
18139 (back_threader::maybe_thread_block): Likewise.
18140 (back_threader_profitability::possibly_profitable_path_p): Remove
18141 code applying extra costs to copies PHIs.
18143 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18145 * config/riscv/autovec.md: Extend VLS modes.
18146 * config/riscv/vector.md: Ditto.
18148 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18150 * config/riscv/vector.md (mov<mode>): New pattern.
18151 (*mov<mode>_mem_to_mem): Ditto.
18152 (*mov<mode>): Ditto.
18153 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
18154 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
18155 (*mov<mode>_vls): Ditto.
18156 (movmisalign<mode>): Ditto.
18157 (@vec_duplicate<mode>): Ditto.
18158 * config/riscv/autovec-vls.md: Removed.
18160 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18163 * config/riscv/autovec.md: Add VLS modes.
18165 2023-09-18 Jason Merrill <jason@redhat.com>
18167 * doc/gty.texi: Add discussion of cache vs. deletable.
18169 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18171 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
18172 (copysign<mode>3): Ditto.
18173 (xorsign<mode>3): Ditto.
18174 (<optab><mode>2): Ditto.
18175 * config/riscv/autovec.md: Extend VLS modes.
18177 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
18179 PR middle-end/111303
18180 * match.pd ((t * 2) / 2): Update pattern.
18182 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
18184 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
18186 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18189 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
18190 (vec_extract<mode><vel>): Ditto.
18191 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
18192 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
18193 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
18195 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
18197 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
18198 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
18199 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
18200 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
18201 new insn/expansions.
18202 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
18203 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
18204 (*riscv_<sha256_op>_si): New raw instruction for RV32.
18205 (*riscv_<sm3_op>_si): Ditto.
18206 (*riscv_<sm4_op>_si): Ditto.
18207 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
18208 (riscv_<sm3_op>_di_extended): Ditto.
18209 (riscv_<sm4_op>_di_extended): Ditto.
18210 (riscv_<sha256_op>_si): New common instruction expansion.
18211 (riscv_<sm3_op>_si): Ditto.
18212 (riscv_<sm4_op>_si): Ditto.
18213 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
18214 "crypto_zksh" and "crypto_zksed". Remove availability
18215 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
18216 * config/riscv/riscv-ftypes.def: Remove unused function type.
18217 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
18218 intrinsics to operate on uint32_t.
18220 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
18222 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
18223 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
18224 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
18225 Removed as no longer used.
18226 (RISCV_ATYPE_UDI): New for uint64_t.
18227 * config/riscv/riscv-cmo.def: Make types unsigned for not working
18228 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
18229 argument/return types.
18230 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
18231 number and shift amount types unsigned.
18232 * config/riscv/riscv-scalar-crypto.def: Ditto.
18234 2023-09-16 Pan Li <pan2.li@intel.com>
18236 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
18238 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
18240 * config/riscv/predicates.md: Restrict predicate
18241 to allow 'reg' only.
18243 2023-09-15 Andrew Pinski <apinski@marvell.com>
18245 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
18246 Also match `a & zero_one_valued_p` too.
18248 2023-09-15 Andrew Pinski <apinski@marvell.com>
18250 PR tree-optimization/111414
18251 * match.pd (`(1 >> X) != 0`): Check to see if
18252 the integer_onep was an integral type (not a vector type).
18254 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
18256 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
18257 run phi analysis, and do it before loop analysis.
18259 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
18261 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
18264 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
18266 PR tree-optimization/111407
18267 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
18268 when one of the operands is subject to abnormal coalescing.
18270 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18272 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
18273 (enum insn_type): Ditto.
18274 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
18275 (emit_vlmax_insn): Adjust.
18276 (emit_nonvlmax_insn): Adjust.
18277 (emit_vlmax_insn_lra): Adjust.
18279 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18281 * config/riscv/autovec-opt.md: Adjust.
18282 * config/riscv/autovec.md: Ditto.
18283 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
18284 (expand_reduction): Adjust expand_reduction prototype.
18285 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
18286 (expand_reduction): Refactor expand_reduction.
18288 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
18291 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
18292 the lower memory access to a mem-pair operand.
18294 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
18296 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
18297 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
18298 before the driver canonicalization routines.
18299 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
18300 to loongarch-driver.h
18301 * config/loongarch/t-linux: Move multilib-related definitions to
18303 * config/loongarch/t-multilib: New file. Inject library build
18304 options obtained from --with-multilib-list.
18305 * config/loongarch/t-loongarch: Same.
18307 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
18310 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
18311 New combine pattern.
18312 (*fold_left_widen_plus_<mode>): Ditto.
18313 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
18314 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
18315 Change from define_expand to define_insn_and_split.
18316 (fold_left_plus_<mode>): Ditto.
18317 (mask_len_fold_left_plus_<mode>): Ditto.
18318 * config/riscv/riscv-v.cc (expand_reduction):
18319 Support widen reduction.
18320 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
18321 Add new iterators and attrs.
18323 2023-09-14 David Malcolm <dmalcolm@redhat.com>
18325 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
18326 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
18327 (sarif_thread_flow::sarif_thread_flow): New.
18328 (sarif_builder::make_code_flow_object): Reimplement, creating
18329 per-thread threadFlow objects, populating them with the relevant
18331 (sarif_builder::make_thread_flow_object): Delete, moving the
18332 code into sarif_builder::make_code_flow_object.
18333 (sarif_builder::make_thread_flow_location_object): Add
18334 "path_event_idx" param. Use it to set "executionOrder"
18336 * diagnostic-path.h (diagnostic_event::get_thread_id): New
18337 pure-virtual vfunc.
18338 (class diagnostic_thread): New.
18339 (diagnostic_path::num_threads): New pure-virtual vfunc.
18340 (diagnostic_path::get_thread): New pure-virtual vfunc.
18341 (diagnostic_path::multithreaded_p): New decl.
18342 (simple_diagnostic_event::simple_diagnostic_event): Add optional
18344 (simple_diagnostic_event::get_thread_id): New accessor.
18345 (simple_diagnostic_event::m_thread_id): New.
18346 (class simple_diagnostic_thread): New.
18347 (simple_diagnostic_path::simple_diagnostic_path): Move definition
18349 (simple_diagnostic_path::num_threads): New.
18350 (simple_diagnostic_path::get_thread): New.
18351 (simple_diagnostic_path::add_thread): New.
18352 (simple_diagnostic_path::add_thread_event): New.
18353 (simple_diagnostic_path::m_threads): New.
18354 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
18355 param for overriding the context's printer.
18356 (diagnostic_show_locus): Likwise.
18357 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
18358 Move here from diagnostic-path.h. Add main thread.
18359 (simple_diagnostic_path::num_threads): New.
18360 (simple_diagnostic_path::get_thread): New.
18361 (simple_diagnostic_path::add_thread): New.
18362 (simple_diagnostic_path::add_thread_event): New.
18363 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
18364 param and use it to initialize m_thread_id. Reformat.
18365 * diagnostic.h: Add pretty_printer param for overriding the
18367 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
18368 (can_consolidate_events): Compare thread ids.
18369 (class per_thread_summary): New.
18370 (event_range::event_range): Add per_thread_summary arg.
18371 (event_range::print): Add "pp" param and use it rather than dc's
18373 (event_range::m_thread_id): New field.
18374 (event_range::m_per_thread_summary): New field.
18375 (path_summary::multithreaded_p): New.
18376 (path_summary::get_events_for_thread_id): New.
18377 (path_summary::m_per_thread_summary): New field.
18378 (path_summary::m_thread_id_to_events): New field.
18379 (path_summary::get_or_create_events_for_thread_id): New.
18380 (path_summary::path_summary): Create per_thread_summary instances
18381 as needed and associate the event_range instances with them.
18382 (base_indent): Move here from print_path_summary_as_text.
18383 (per_frame_indent): Likewise.
18384 (class thread_event_printer): New, adapted from parts of
18385 print_path_summary_as_text.
18386 (print_path_summary_as_text): Make static. Reimplement to
18387 moving most of existing code to class thread_event_printer,
18388 capturing state as per-thread as appropriate.
18389 (default_tree_diagnostic_path_printer): Add missing 'break' on
18392 2023-09-14 David Malcolm <dmalcolm@redhat.com>
18394 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
18395 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
18396 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
18397 clearing the deletable gcc_root_tab_t.
18398 (ggc_common_finalize): New.
18399 * ggc.h (ggc_common_finalize): New decl.
18400 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
18401 ggc_common_finalize.
18403 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
18405 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
18406 unsigned comparisons.
18407 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
18408 generation of salt/saltu instructions.
18409 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
18410 * config/xtensa/xtensa.md (salt, saltu): New instruction
18413 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
18415 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
18418 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
18420 * config/riscv/autovec.md: Change rtx code to unspec.
18421 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
18422 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
18423 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
18425 (class widen_freducop): Removed.
18426 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
18427 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
18428 (@pred_<reduc_op><mode>): New name.
18429 (@pred_widen_reduc_plus<v_su><mode>): Change name.
18430 (@pred_reduc_plus<order><mode>): Change name.
18431 (@pred_widen_reduc_plus<order><mode>): Change name.
18433 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
18435 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
18436 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
18437 * config/riscv/vector-iterators.md: New iterators and attrs.
18438 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
18440 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
18441 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
18442 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
18443 (@pred_reduc_<reduc><mode>): Added.
18444 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
18445 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
18446 (@pred_widen_reduc_plus<v_su><mode>): Added.
18447 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
18448 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
18449 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
18450 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
18451 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
18452 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
18453 (@pred_reduc_plus<order><mode>): Added.
18454 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
18455 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
18456 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
18457 (@pred_widen_reduc_plus<order><mode>): Added.
18459 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
18461 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
18462 Move WHILELO handling to...
18463 (aarch64_vector_costs::finish_cost): ...here. Check whether the
18464 vectorizer has decided to use a predicated loop.
18466 2023-09-14 Andrew Pinski <apinski@marvell.com>
18468 PR tree-optimization/106164
18469 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
18470 Expand to support constants that are off by one.
18472 2023-09-14 Andrew Pinski <apinski@marvell.com>
18474 * genmatch.cc (parser::parse_result): For an else clause
18475 of an if statement inside a switch, error out explictly.
18477 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18479 * config/riscv/autovec-opt.md: Add VLS mask modes.
18480 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
18481 (vcond_mask_<mode><vm>): Add VLS mask modes.
18482 * config/riscv/vector.md: Ditto.
18484 2023-09-14 Richard Biener <rguenther@suse.de>
18486 PR tree-optimization/111294
18487 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
18488 operands that eventually become dead and use simple_dce_from_worklist
18489 to remove their definitions if they did so.
18491 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
18493 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
18494 Accept all nonimmediate_operands, but keep the existing constraints.
18495 If the instruction is split before RA, load invalid addresses into
18496 a temporary register.
18497 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
18499 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18502 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
18503 (vector_insn_info::global_merge): Ditto.
18504 (vector_insn_info::get_avl_or_vl_reg): Ditto.
18506 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18508 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
18510 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
18512 * config/loongarch/loongarch-def.c: Modify the default value of
18515 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18517 * config/xtensa/xtensa.cc (xtensa_expand_scc):
18518 Revert the changes from the last patch, as the work in the RTL
18519 expansion pass is too far to determine the physical registers.
18520 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
18521 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
18523 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
18526 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
18528 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18530 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
18531 (@vec_extract<mode><vel>): Ditto.
18532 * config/riscv/vector.md: Ditto
18534 2023-09-13 Andrew Pinski <apinski@marvell.com>
18536 * match.pd (`X <= MAX(X, Y)`):
18537 Move before `MIN (X, C1) < C2` pattern.
18539 2023-09-13 Andrew Pinski <apinski@marvell.com>
18541 PR tree-optimization/111364
18542 * match.pd (`MIN (X, Y) == X`): Extend
18543 to min/lt, min/ge, max/gt, max/le.
18545 2023-09-13 Andrew Pinski <apinski@marvell.com>
18547 PR tree-optimization/111345
18548 * match.pd (`Y > (X % Y)`): Merge
18550 (`(X % Y) < Y`): Pattern by adding `:c`
18553 2023-09-13 Richard Biener <rguenther@suse.de>
18555 PR tree-optimization/111387
18556 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
18557 EDGE_DFS_BACK when doing BB vectorization.
18558 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
18559 to compute RPO and mark backedges.
18561 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18563 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
18564 New combine pattern.
18565 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
18566 (<mulh_table><mode>3_highpart): Merged pattern.
18567 (umul<mode>3_highpart): Mrege smul and umul.
18568 * config/riscv/vector-iterators.md (umul): New iterators.
18569 (UNSPEC_VMULHU): New iterators.
18571 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18573 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
18574 New combine pattern.
18575 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
18577 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
18579 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
18580 (*cond_copysign<mode>): New combine pattern.
18581 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
18583 2023-09-13 Richard Biener <rguenther@suse.de>
18585 PR tree-optimization/111397
18586 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
18587 argument to specify whether the PHI destination doesn't flow in
18588 from an abnormal PHI.
18589 (propagate_value): Adjust.
18590 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
18592 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
18594 (process_bb): Likewise.
18596 2023-09-13 Pan Li <pan2.li@intel.com>
18599 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
18601 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
18603 PR tree-optimization/111303
18604 * match.pd ((X - N * M) / N): Add undefined_p checking.
18605 ((X + N * M) / N): Likewise.
18606 ((X + C) div_rshift N): Likewise.
18608 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18611 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
18613 2023-09-12 Martin Jambor <mjambor@suse.cz>
18615 * dbgcnt.def (form_fma): New.
18616 * tree-ssa-math-opts.cc: Include dbgcnt.h.
18617 (convert_mult_to_fma): Bail out if the debug counter say so.
18619 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
18621 * config/riscv/autovec-opt.md: Update type
18622 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
18624 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18626 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
18628 (aarch64_layout_frame): Use it to decide whether locals should
18629 go above or below the saved registers.
18630 (aarch64_expand_prologue): Update stack layout comment.
18631 Emit a stack tie after the final adjustment.
18633 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18635 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
18636 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
18637 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
18639 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18641 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
18642 (aarch64_frame::hard_fp_save_and_probe): New fields.
18643 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
18644 Rather than asserting that a leaf function saves LR, instead assert
18645 that a leaf function saves something.
18646 (aarch64_get_separate_components): Prevent the chosen probe
18647 registers from being individually shrink-wrapped.
18648 (aarch64_allocate_and_probe_stack_space): Remove workaround for
18649 probe registers that aren't at the bottom of the previous allocation.
18651 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18653 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
18654 Always probe the residual allocation at offset 1024, asserting
18655 that that is in range.
18657 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18659 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
18660 the LR save slot is in the first 16 bytes of the register save area.
18661 Only form STP/LDP push/pop candidates if both registers are valid.
18662 (aarch64_allocate_and_probe_stack_space): Remove workaround for
18663 when LR was not in the first 16 bytes.
18665 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18667 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
18668 Don't probe final allocations that are exactly 1KiB in size (after
18669 unprobed space above the final allocation has been deducted).
18671 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18673 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
18674 calculation of initial_adjust for frames in which all saves
18677 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18679 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
18680 the allocation of the top of the frame.
18682 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18684 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
18686 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
18687 from the bottom of the frame, rather than the bottom of the saved
18688 register area. Measure reg_offset from the bottom of the frame
18689 rather than the bottom of the saved register area.
18690 (aarch64_save_callee_saves): Update accordingly.
18691 (aarch64_restore_callee_saves): Likewise.
18692 (aarch64_get_separate_components): Likewise.
18693 (aarch64_process_components): Likewise.
18695 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18697 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
18699 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18701 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
18703 (aarch64_frame::bytes_above_hard_fp): ...this.
18704 * config/aarch64/aarch64.cc (aarch64_layout_frame)
18705 (aarch64_expand_prologue): Update accordingly.
18706 (aarch64_initial_elimination_offset): Likewise.
18708 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18710 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
18711 (aarch64_frame::bytes_above_locals): ...this.
18712 * config/aarch64/aarch64.cc (aarch64_layout_frame)
18713 (aarch64_initial_elimination_offset): Update accordingly.
18715 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18717 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
18718 calculation of chain_offset into the emit_frame_chain block.
18720 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18722 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
18723 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
18724 callee_offset handling.
18725 (aarch64_save_callee_saves): Replace the start_offset parameter
18726 with a bytes_below_sp parameter.
18727 (aarch64_restore_callee_saves): Likewise.
18728 (aarch64_expand_prologue): Update accordingly.
18729 (aarch64_expand_epilogue): Likewise.
18731 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18733 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
18735 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
18736 (aarch64_expand_epilogue): Use it instead of
18737 below_hard_fp_saved_regs_size.
18739 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18741 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
18743 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
18744 and use it instead of crtl->outgoing_args_size.
18745 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
18746 of outgoing_args_size.
18747 (aarch64_process_components): Likewise.
18749 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18751 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
18752 allocate the frame in one go if there are no saved registers.
18754 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18756 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
18757 chain_offset rather than callee_offset.
18759 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
18761 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
18762 a local shorthand for cfun->machine->frame.
18763 (aarch64_restore_callee_saves, aarch64_get_separate_components):
18764 (aarch64_process_components): Likewise.
18765 (aarch64_allocate_and_probe_stack_space): Likewise.
18766 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
18767 (aarch64_layout_frame): Use existing shorthand for one more case.
18769 2023-09-12 Andrew Pinski <apinski@marvell.com>
18771 PR tree-optimization/107881
18772 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
18773 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
18775 2023-09-12 Pan Li <pan2.li@intel.com>
18777 * config/riscv/riscv-vector-costs.h (struct range): Removed.
18779 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18781 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
18782 (compute_nregs_for_mode): Ditto.
18783 (live_range_conflict_p): Ditto.
18784 (max_number_of_live_regs): Ditto.
18785 (compute_lmul): Ditto.
18786 (costs::prefer_new_lmul_p): Ditto.
18787 (costs::better_main_loop_than_p): Ditto.
18788 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
18789 (struct var_live_range): Ditto.
18790 (struct autovec_info): Ditto.
18791 * config/riscv/t-riscv: Update makefile for COST model.
18793 2023-09-12 Jakub Jelinek <jakub@redhat.com>
18795 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
18798 2023-09-12 Jakub Jelinek <jakub@redhat.com>
18800 PR middle-end/111338
18801 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
18803 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
18804 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
18805 optimization if type's precision is too large for
18806 vn_walk_cb_data::bufsize.
18808 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
18810 * doc/gm2.texi (Compiler options): Document new option
18813 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18815 * doc/sourcebuild.texi (stack_size): Update.
18817 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
18819 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
18820 (<optab>_not<mode>3): Likewise.
18821 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
18823 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
18825 (GEN_EMIT_HELPER2): Likewise.
18826 (emit_strcmp_scalar_compare_byte): New function.
18827 (emit_strcmp_scalar_compare_subword): Likewise.
18828 (emit_strcmp_scalar_compare_word): Likewise.
18829 (emit_strcmp_scalar_load_and_compare): Likewise.
18830 (emit_strcmp_scalar_call_to_libc): Likewise.
18831 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
18832 (emit_strcmp_scalar_result_calculation): Likewise.
18833 (riscv_expand_strcmp_scalar): Likewise.
18834 (riscv_expand_strcmp): Likewise.
18835 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
18837 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
18838 (cmpstrnsi): Invoke expansion function for str(n)cmp.
18839 (cmpstrsi): Likewise.
18840 * config/riscv/riscv.opt: Add new parameter
18841 '-mstring-compare-inline-limit'.
18842 * doc/invoke.texi: Document new parameter
18843 '-mstring-compare-inline-limit'.
18845 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
18847 * config.gcc: Add new object riscv-string.o.
18849 * config/riscv/riscv-protos.h (riscv_expand_strlen):
18851 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
18852 * config/riscv/riscv.opt: New flag 'minline-strlen'.
18853 * config/riscv/t-riscv: Add new object riscv-string.o.
18854 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
18855 (th_rev<mode>2): Likewise.
18856 (th_tstnbz<mode>2): New INSN.
18857 * doc/invoke.texi: Document '-minline-strlen'.
18858 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
18859 (emit_unlikely_jump_insn): Likewise.
18860 * rtl.h (emit_likely_jump_insn): New prototype.
18861 (emit_unlikely_jump_insn): Likewise.
18862 * config/riscv/riscv-string.cc: New file.
18864 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18866 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
18867 (TARGET_SUPPORTS_ALIASES): Define.
18869 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
18871 * doc/sourcebuild.texi (check-function-bodies): Update.
18873 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
18875 * gimplify.cc (gimplify_bind_expr): Check for
18876 insertion after variable cleanup. Convert 'omp allocate'
18877 var-decl attribute to GOMP_alloc/GOMP_free calls.
18879 2023-09-12 xuli <xuli1@eswincomputing.com>
18881 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
18882 parameter e and replace NULL_RTX with gcc_unreachable.
18884 2023-09-12 xuli <xuli1@eswincomputing.com>
18886 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
18888 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
18889 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
18890 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
18892 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
18893 * config/riscv/riscv-vector-builtins.cc: Add args type.
18895 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
18897 * config/riscv/riscv.cc
18898 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
18899 riscv_avoid_shrink_wrapping_separate.
18900 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
18902 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
18904 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
18906 * shrink-wrap.cc (try_shrink_wrapping_separate):call
18907 use_shrink_wrapping_separate.
18908 (use_shrink_wrapping_separate): wrap the condition
18909 check in use_shrink_wrapping_separate.
18910 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
18912 2023-09-11 Andrew Pinski <apinski@marvell.com>
18914 PR tree-optimization/111348
18915 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
18916 the cmp part of the pattern.
18918 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
18921 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
18922 Call output_addr_const for CASE_CONST_SCALAR_INT.
18924 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18926 * config/riscv/thead.md: Update types
18928 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18930 * config/riscv/riscv.md: Update types
18932 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18934 * config/riscv/riscv.md: Add "zicond" type
18935 * config/riscv/zicond.md: Update types
18937 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18939 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
18940 * config/riscv/zc.md: Update types
18942 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
18944 * config/riscv/autovec-opt.md: Update types
18945 * config/riscv/autovec.md: likewise
18947 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18949 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
18951 (s390_vec_unsigned_flt): Ditto.
18952 (s390_vec_revb_flt): Ditto.
18953 (s390_vec_reve_flt): Ditto.
18954 (s390_vclfnhs): Fix operand flags.
18955 (s390_vclfnls): Ditto.
18956 (s390_vcrnfs): Ditto.
18957 (s390_vcfn): Ditto.
18958 (s390_vcnf): Ditto.
18960 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18962 * config/s390/s390-builtins.def (O_U64): New.
18967 (O_M12): Change bit position.
18978 (OB_DEF_VAR): Add operand constraints.
18980 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
18983 2023-09-11 Andrew Pinski <apinski@marvell.com>
18985 PR tree-optimization/111349
18986 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
18987 the cmp part of the pattern.
18989 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18992 * config/riscv/riscv.opt: Set default as scalable vectorization.
18994 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18996 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
18997 (get_all_successors): Ditto.
18998 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
18999 (get_all_successors): Ditto.
19001 2023-09-11 Jakub Jelinek <jakub@redhat.com>
19003 PR middle-end/111329
19004 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
19005 function. For printing values which don't fit into digit_buffer
19006 use out-of-line function.
19007 * wide-int-print.h (pp_wide_int_large): Declare.
19008 * wide-int-print.cc: Include pretty-print.h.
19009 (pp_wide_int_large): Define.
19011 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19013 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
19014 Use dominance analysis.
19015 (pass_vsetvl::init): Ditto.
19016 (pass_vsetvl::done): Ditto.
19018 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19021 * config/riscv/autovec.md: Add VLS modes.
19022 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
19023 (cmp_lmul_gt_one): Ditto.
19024 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
19025 (cmp_lmul_gt_one): Ditto.
19026 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
19027 (riscv_vectorize_vec_perm_const): Ditto.
19028 * config/riscv/vector-iterators.md: Ditto.
19029 * config/riscv/vector.md: Ditto.
19031 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19033 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
19034 * config/riscv/vector-iterators.md: New iterator
19036 2023-09-11 Andrew Pinski <apinski@marvell.com>
19038 PR tree-optimization/111346
19039 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
19042 2023-09-11 liuhongt <hongtao.liu@intel.com>
19046 * config/i386/sse.md (int_comm): New int_attr.
19047 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
19048 Remove % for Complex conjugate operations since they're not
19050 (fma_<complexpairopname>_<mode>_pair): Ditto.
19051 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
19052 (cmul<conj_op><mode>3): Ditto.
19054 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19056 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
19057 fixed-vlmax/vls vector permutation.
19059 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19061 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
19063 2023-09-10 Andrew Pinski <apinski@marvell.com>
19065 PR tree-optimization/111331
19066 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
19067 Fix the LE/GE comparison to the correct value.
19068 * tree-ssa-phiopt.cc (minmax_replacement):
19069 Fix the LE/GE comparison for the
19070 `(a CMP CST1) ? max<a,CST2> : a` optimization.
19072 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
19074 * config/darwin.cc (darwin_function_section): Place unlikely
19075 executed global init code into the standard cold section.
19077 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19080 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
19081 (pass_vsetvl::pre_vsetvl): Ditto.
19082 (pass_vsetvl::init): Ditto.
19083 (pass_vsetvl::lazy_vsetvl): Ditto.
19085 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
19087 * config/loongarch/loongarch.md (mulsidi3_64bit):
19088 Field unsigned extension support.
19089 (<u>muldi3_highpart): Modify template name.
19090 (<u>mulsi3_highpart): Likewise.
19091 (<u>mulsidi3_64bit): Field unsigned extension support.
19092 (<su>muldi3_highpart): Modify muldi3_highpart to
19094 (<su>mulsi3_highpart): Modify mulsi3_highpart to
19097 2023-09-09 Xi Ruoyao <xry111@xry111.site>
19099 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
19100 Check precondition (delta must be a power of 2) and use
19101 popcount_hwi instead of a homebrew loop.
19103 2023-09-09 Xi Ruoyao <xry111@xry111.site>
19105 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
19106 Define to the maximum amount of bytes able to be loaded or
19107 stored with one machine instruction.
19108 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
19109 New static function.
19110 (loongarch_block_move_straight): Call
19111 loongarch_mode_for_move_size for machine_mode to be moved.
19112 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
19113 instead of UNITS_PER_WORD.
19115 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19117 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
19119 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
19121 * fold-const.cc (can_min_p): New function.
19122 (poly_int_binop): Try fold MIN_EXPR.
19124 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
19126 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
19127 case VREL_EQ nor call frelop_early_resolve.
19129 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
19131 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
19132 Remove broken INSN.
19133 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
19134 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
19136 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
19138 * config/riscv/thead.md: Use more appropriate mode attributes
19141 2023-09-08 Guo Jie <guojie@loongson.cn>
19143 * common/config/loongarch/loongarch-common.cc:
19144 (default_options loongarch_option_optimization_table):
19145 Default to -fsched-pressure.
19147 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
19149 * config.gcc: remove non-POSIX syntax "<<<".
19151 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
19153 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
19154 Rename postfix to _bitmanip.
19155 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
19156 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
19158 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19160 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
19162 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19164 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
19166 2023-09-07 liuhongt <hongtao.liu@intel.com>
19168 * config/i386/sse.md
19169 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
19170 (VHFBF_AVX512VL): New mode iterator.
19171 (VI2HFBF_AVX512VL): New mode iterator.
19173 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
19175 * value-range.h (contains_zero_p): Return false for undefined ranges.
19176 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
19177 contains_zero_p change above.
19178 (operator_ge::op1_op2_relation): Same.
19179 (operator_equal::op1_op2_relation): Same.
19180 (operator_not_equal::op1_op2_relation): Same.
19181 (operator_lt::op1_op2_relation): Same.
19182 (operator_le::op1_op2_relation): Same.
19183 (operator_ge::op1_op2_relation): Same.
19184 * range-op.cc (operator_equal::op1_op2_relation): Same.
19185 (operator_not_equal::op1_op2_relation): Same.
19186 (operator_lt::op1_op2_relation): Same.
19187 (operator_le::op1_op2_relation): Same.
19188 (operator_cast::op1_range): Same.
19189 (set_nonzero_range_from_mask): Same.
19190 (operator_bitwise_xor::op1_range): Same.
19191 (operator_addr_expr::fold_range): Same.
19192 (operator_addr_expr::op1_range): Same.
19194 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
19196 PR tree-optimization/110875
19197 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
19198 cache-prefilling routine when the ssa-name has no global value.
19200 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
19203 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
19204 (process_alt_operands): Set up the flag. Clear flag for chosen
19205 alternative with special memory constraints.
19206 (process_alt_operands): Set up used insn alternative depending on the flag.
19208 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19210 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
19211 * config/riscv/riscv.md: Ditto.
19212 * config/riscv/vector-iterators.md: Ditto.
19213 * config/riscv/vector.md: Ditto.
19215 2023-09-07 David Malcolm <dmalcolm@redhat.com>
19217 * diagnostic-core.h (error_meta): New decl.
19218 * diagnostic.cc (error_meta): New.
19220 2023-09-07 Jakub Jelinek <jakub@redhat.com>
19223 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
19224 inside gcc_assert, as later code relies on it filling info variable.
19225 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
19226 clear_padding_type): Likewise.
19227 * varasm.cc (output_constant): Likewise.
19228 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
19229 * stor-layout.cc (finish_bitfield_representative, layout_type):
19231 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
19233 2023-09-07 Xi Ruoyao <xry111@xry111.site>
19236 * config/loongarch/loongarch-protos.h
19237 (loongarch_pre_reload_split): Declare new function.
19238 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
19239 * config/loongarch/loongarch.cc
19240 (loongarch_pre_reload_split): Implement.
19241 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
19242 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
19244 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
19245 New define_insn_and_split.
19246 (bstrins_<mode>_for_ior_mask): Likewise.
19247 (define_peephole2): Further optimize code sequence produced by
19248 bstrins_<mode>_for_ior_mask if possible.
19250 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
19252 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
19253 rather than gen_rtx_PLUS.
19255 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19258 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
19259 (pass_vsetvl::df_post_optimization): Remove incorrect function.
19261 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
19263 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
19264 Parse 'XVentanaCondOps' extension.
19265 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
19266 (TARGET_XVENTANACONDOPS): Ditto.
19267 (TARGET_ZICOND_LIKE): New to represent targets with conditional
19268 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
19269 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
19270 with TARGET_ZICOND_LIKE.
19271 (riscv_expand_conditional_move): Ditto.
19272 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
19273 TARGET_ZICOND_LIKE.
19274 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
19275 * config/riscv/zicond.md: Modify description.
19276 (eqz_ventana): New to match corresponding czero instructions.
19277 (nez_ventana): Ditto.
19278 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
19279 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
19280 (*czero.<eqz>.<GPR><X>): Ditto.
19281 (*czero.eqz.<GPR><X>.opt1): Ditto.
19282 (*czero.nez.<GPR><X>.opt2): Ditto.
19284 2023-09-06 Ian Lance Taylor <iant@golang.org>
19287 * godump.cc (go_format_type): Handle BITINT_TYPE.
19289 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19292 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
19295 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19298 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
19299 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
19300 rather than make_edge, initialize bb->count.
19302 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19305 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
19306 Document general rules for _BitInt support library functions
19307 and document __mulbitint3 and __divmodbitint4.
19308 (Conversion functions): Document __fix{s,d,x,t}fbitint,
19309 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
19310 __bid_floatbitint{s,d,t}d.
19312 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19315 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
19318 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19321 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
19322 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
19323 check if all padding bits up to mode precision are zeros or sign
19324 bit copies and if not, jump to DO_ERROR.
19325 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
19326 Adjust expand_ubsan_result_store callers.
19327 * ubsan.cc: Include target.h and langhooks.h.
19328 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
19329 size converted to pointer sized integer, pass BITINT_TYPE values
19330 which fit into TImode (if supported) or DImode as those integer types
19331 or otherwise for now punt (pass 0).
19332 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
19333 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
19334 TImode/DImode precision rather than TK_Unknown used otherwise for
19335 large/huge BITINT_TYPEs.
19336 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
19337 they don't have mode precision.
19338 * ubsan.h (enum ubsan_print_style): New enumerator.
19340 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19343 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
19344 (ix86_bitint_type_info): New function.
19345 (TARGET_C_BITINT_TYPE_INFO): Redefine.
19347 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19350 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
19351 * passes.def: Add pass_lower_bitint after pass_lower_complex and
19352 pass_lower_bitint_O0 after pass_lower_complex_O0.
19353 * tree-pass.h (PROP_gimple_lbitint): Define.
19354 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
19355 * gimple-lower-bitint.h: New file.
19356 * tree-ssa-live.h (struct _var_map): Add bitint member.
19357 (init_var_map): Adjust declaration.
19358 (region_contains_p): Handle map->bitint like map->outofssa_p.
19359 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
19360 map->bitint and set map->outofssa_p to false if it is non-NULL.
19361 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
19362 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
19364 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
19365 not in that bitmap, and allow res without default def.
19366 (compute_optimized_partition_bases): In map->bitint mode try hard to
19367 coalesce any SSA_NAMEs with the same size.
19368 (coalesce_bitint): New function.
19369 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
19370 used_in_copies and call coalesce_bitint.
19371 * gimple-lower-bitint.cc: New file.
19373 2023-09-06 Jakub Jelinek <jakub@redhat.com>
19376 * tree.def (BITINT_TYPE): New type.
19377 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
19378 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
19380 (BITINT_TYPE_P): Define.
19381 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
19382 they have BITINT_TYPE type.
19383 (tree_check6, tree_not_check6): New inline functions.
19384 (any_integral_type_check): Include BITINT_TYPE.
19385 (build_bitint_type): Declare.
19386 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
19387 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
19388 type_hash_canon): Handle BITINT_TYPE.
19389 (bitint_type_cache): New variable.
19390 (build_bitint_type): New function.
19391 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
19392 Handle BITINT_TYPE.
19393 (tree_cc_finalize): Free bitint_type_cache.
19394 * builtins.cc (type_to_class): Handle BITINT_TYPE.
19395 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
19396 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
19398 * convert.cc (convert_to_pointer_1, convert_to_real_1,
19399 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
19400 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
19401 GET_MODE_PRECISION (TYPE_MODE (type)).
19402 * doc/generic.texi (BITINT_TYPE): Document.
19403 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
19404 * doc/tm.texi: Regenerated.
19405 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
19406 gen_type_die_with_usage): Handle BITINT_TYPE.
19407 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
19408 handle those which fit into shwi.
19409 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
19410 to bitfield precision reads from BITINT_TYPE vars, parameters or
19411 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
19413 * fold-const.cc (fold_convert_loc, make_range_step): Handle
19415 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
19416 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
19417 (native_encode_int, native_interpret_int, native_interpret_expr):
19418 Handle BITINT_TYPE.
19419 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
19420 to some other integral type or vice versa conversions non-useless.
19421 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
19422 (clear_padding_unit): Mention in comment that _BitInt types don't need
19424 (clear_padding_bitint_needs_padding_p): New function.
19425 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
19426 (clear_padding_type): Likewise.
19427 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
19428 precision operands force pos_neg? to 1.
19429 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
19430 expand_BITINTTOFLOAT): New functions.
19431 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
19432 BITINTTOFLOAT): New internal functions.
19433 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
19434 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
19435 * match.pd (non-equality compare simplifications from fold_binary):
19436 Punt if TYPE_MODE (arg1_type) is BLKmode.
19437 * pretty-print.h (pp_wide_int): Handle printing of large precision
19438 wide_ints which would buffer overflow digit_buffer.
19439 * stor-layout.cc (finish_bitfield_representative): For bit-fields
19440 with BITINT_TYPE, prefer representatives with precisions in
19441 multiple of limb precision.
19442 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
19443 element type and assert it is BITINT_TYPE.
19444 * target.def (bitint_type_info): New C target hook.
19445 * target.h (struct bitint_info): New type.
19446 * targhooks.cc (default_bitint_type_info): New function.
19447 * targhooks.h (default_bitint_type_info): Declare.
19448 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
19449 Handle printing large wide_ints which would buffer overflow
19451 * tree-ssa-sccvn.cc: Include target.h.
19452 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
19454 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
19455 64-bit BITINT_TYPE subtract low bound from expression and cast to
19456 64-bit integer type both the controlling expression and case labels.
19457 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
19458 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
19459 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
19461 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
19462 unsigned_type_for rather than build_nonstandard_integer_type.
19464 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19467 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
19468 tieable for RVV modes.
19470 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19473 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
19475 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19477 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
19479 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19481 * config/xtensa/xtensa.cc (xtensa_expand_scc):
19482 Add code for particular constants (only 0 and INT_MIN for now)
19483 for EQ/NE boolean evaluation in SImode.
19484 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
19485 implementation has been integrated into the above.
19487 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19490 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
19492 (*pred_widen_mulsu<mode>): Delete.
19493 (*pred_single_widen_mul<mode>): Delete.
19494 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
19495 Add new combine patterns.
19496 (*single_widen_sub<any_extend:su><mode>): Ditto.
19497 (*single_widen_add<any_extend:su><mode>): Ditto.
19498 (*single_widen_mult<any_extend:su><mode>): Ditto.
19499 (*dual_widen_mulsu<mode>): Ditto.
19500 (*dual_widen_mulus<mode>): Ditto.
19501 (*dual_widen_<optab><mode>): Ditto.
19502 (*single_widen_add<mode>): Ditto.
19503 (*single_widen_sub<mode>): Ditto.
19504 (*single_widen_mult<mode>): Ditto.
19505 * config/riscv/autovec.md (<optab><mode>3):
19506 Change define_expand to define_insn_and_split.
19507 (<optab><mode>2): Ditto.
19508 (abs<mode>2): Ditto.
19509 (smul<mode>3_highpart): Ditto.
19510 (umul<mode>3_highpart): Ditto.
19512 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19514 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
19515 (riscv_asm_output_alias): Ditto.
19516 (riscv_asm_output_external): Ditto.
19517 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
19518 Output .variant_cc directive for vector function.
19519 (riscv_declare_function_name): Ditto.
19520 (riscv_asm_output_alias): Ditto.
19521 (riscv_asm_output_external): Ditto.
19522 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
19523 Implement ASM_DECLARE_FUNCTION_NAME.
19524 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
19525 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
19527 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19529 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
19530 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
19531 (riscv_frame_info::reset): Reset new fileds.
19532 (riscv_call_tls_get_addr): Pass riscv_cc.
19533 (riscv_function_arg): Return riscv_cc for call patterm.
19534 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
19535 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
19536 (riscv_save_reg_p): Add vector callee-saved check.
19537 (riscv_stack_align): Add vector save area comment.
19538 (riscv_compute_frame_info): Ditto.
19539 (riscv_restore_reg): Update for type change.
19540 (riscv_for_each_saved_v_reg): New function save vector registers.
19541 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
19542 (riscv_expand_prologue): Ditto.
19543 (riscv_expand_epilogue): Ditto.
19544 (riscv_output_mi_thunk): Pass riscv_cc.
19545 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
19546 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
19547 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
19549 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19551 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
19552 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
19553 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
19554 (riscv_init_cumulative_args): Setup variant_cc field.
19555 (riscv_vector_type_p): New function for checking vector type.
19556 (riscv_hard_regno_nregs): Hoist declare.
19557 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
19558 (riscv_get_arg_info): Support vector cc.
19559 (riscv_function_arg_advance): Update cum.
19560 (riscv_pass_by_reference): Handle vector args.
19561 (riscv_v_abi): New function return vector abi.
19562 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
19563 (riscv_arguments_is_vector_type_p): New function for check vector returns.
19564 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
19565 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
19566 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
19567 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
19568 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
19569 (V_ARG_FIRST): Ditto.
19570 (V_ARG_LAST): Ditto.
19571 (enum riscv_cc): Define all RISCV_CC variants.
19572 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
19574 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
19576 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
19577 Add sqrt + vcond_mask combine pattern.
19578 * config/riscv/autovec.md (<optab><mode>2):
19579 Change define_expand to define_insn_and_split.
19581 2023-09-06 Jason Merrill <jason@redhat.com>
19583 * common.opt: Update -fabi-version=19.
19585 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
19587 * config/riscv/zicond.md: Add closing parent to a comment.
19589 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
19591 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
19592 large constant cons/alt into a register.
19594 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
19596 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
19597 require one zero bit in the upper 32 bits for LI+RORI synthesis.
19599 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
19601 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
19603 2023-09-05 Andrew Pinski <apinski@marvell.com>
19605 PR tree-optimization/98710
19606 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
19607 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
19609 2023-09-05 Andrew Pinski <apinski@marvell.com>
19611 PR tree-optimization/103536
19612 * match.pd (`(x | y) & (x & z)`,
19613 `(x & y) | (x | z)`): New patterns.
19615 2023-09-05 Andrew Pinski <apinski@marvell.com>
19617 PR tree-optimization/107137
19618 * match.pd (`(nop_convert)-(convert)a`): New pattern.
19620 2023-09-05 Andrew Pinski <apinski@marvell.com>
19622 PR tree-optimization/96694
19623 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
19625 2023-09-05 Andrew Pinski <apinski@marvell.com>
19627 PR tree-optimization/105832
19628 * match.pd (`(1 >> X) != 0`): New pattern
19630 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
19632 * config/riscv/riscv.md: Update/Add types
19634 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
19636 * config/riscv/pic.md: Update types
19638 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
19640 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
19641 synthesis with rotate-right for XTheadBb.
19643 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
19645 * config/riscv/zicond.md: Fix op2 pattern.
19647 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
19649 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
19651 2023-09-05 Xi Ruoyao <xry111@xry111.site>
19653 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
19654 Define to 0 if not defined yet.
19656 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
19658 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
19659 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
19661 2023-09-05 Pan Li <pan2.li@intel.com>
19663 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
19664 * config/riscv/vector.md: Extend iterator for VLS.
19666 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
19668 * config.gcc: Export the header file lasxintrin.h.
19669 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
19670 Add Loongson ASX builtin functions support.
19671 (AVAIL_ALL): Ditto.
19672 (LASX_BUILTIN): Ditto.
19673 (LASX_NO_TARGET_BUILTIN): Ditto.
19674 (LASX_BUILTIN_TEST_BRANCH): Ditto.
19675 (CODE_FOR_lasx_xvsadd_b): Ditto.
19676 (CODE_FOR_lasx_xvsadd_h): Ditto.
19677 (CODE_FOR_lasx_xvsadd_w): Ditto.
19678 (CODE_FOR_lasx_xvsadd_d): Ditto.
19679 (CODE_FOR_lasx_xvsadd_bu): Ditto.
19680 (CODE_FOR_lasx_xvsadd_hu): Ditto.
19681 (CODE_FOR_lasx_xvsadd_wu): Ditto.
19682 (CODE_FOR_lasx_xvsadd_du): Ditto.
19683 (CODE_FOR_lasx_xvadd_b): Ditto.
19684 (CODE_FOR_lasx_xvadd_h): Ditto.
19685 (CODE_FOR_lasx_xvadd_w): Ditto.
19686 (CODE_FOR_lasx_xvadd_d): Ditto.
19687 (CODE_FOR_lasx_xvaddi_bu): Ditto.
19688 (CODE_FOR_lasx_xvaddi_hu): Ditto.
19689 (CODE_FOR_lasx_xvaddi_wu): Ditto.
19690 (CODE_FOR_lasx_xvaddi_du): Ditto.
19691 (CODE_FOR_lasx_xvand_v): Ditto.
19692 (CODE_FOR_lasx_xvandi_b): Ditto.
19693 (CODE_FOR_lasx_xvbitsel_v): Ditto.
19694 (CODE_FOR_lasx_xvseqi_b): Ditto.
19695 (CODE_FOR_lasx_xvseqi_h): Ditto.
19696 (CODE_FOR_lasx_xvseqi_w): Ditto.
19697 (CODE_FOR_lasx_xvseqi_d): Ditto.
19698 (CODE_FOR_lasx_xvslti_b): Ditto.
19699 (CODE_FOR_lasx_xvslti_h): Ditto.
19700 (CODE_FOR_lasx_xvslti_w): Ditto.
19701 (CODE_FOR_lasx_xvslti_d): Ditto.
19702 (CODE_FOR_lasx_xvslti_bu): Ditto.
19703 (CODE_FOR_lasx_xvslti_hu): Ditto.
19704 (CODE_FOR_lasx_xvslti_wu): Ditto.
19705 (CODE_FOR_lasx_xvslti_du): Ditto.
19706 (CODE_FOR_lasx_xvslei_b): Ditto.
19707 (CODE_FOR_lasx_xvslei_h): Ditto.
19708 (CODE_FOR_lasx_xvslei_w): Ditto.
19709 (CODE_FOR_lasx_xvslei_d): Ditto.
19710 (CODE_FOR_lasx_xvslei_bu): Ditto.
19711 (CODE_FOR_lasx_xvslei_hu): Ditto.
19712 (CODE_FOR_lasx_xvslei_wu): Ditto.
19713 (CODE_FOR_lasx_xvslei_du): Ditto.
19714 (CODE_FOR_lasx_xvdiv_b): Ditto.
19715 (CODE_FOR_lasx_xvdiv_h): Ditto.
19716 (CODE_FOR_lasx_xvdiv_w): Ditto.
19717 (CODE_FOR_lasx_xvdiv_d): Ditto.
19718 (CODE_FOR_lasx_xvdiv_bu): Ditto.
19719 (CODE_FOR_lasx_xvdiv_hu): Ditto.
19720 (CODE_FOR_lasx_xvdiv_wu): Ditto.
19721 (CODE_FOR_lasx_xvdiv_du): Ditto.
19722 (CODE_FOR_lasx_xvfadd_s): Ditto.
19723 (CODE_FOR_lasx_xvfadd_d): Ditto.
19724 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
19725 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
19726 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
19727 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
19728 (CODE_FOR_lasx_xvffint_s_w): Ditto.
19729 (CODE_FOR_lasx_xvffint_d_l): Ditto.
19730 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
19731 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
19732 (CODE_FOR_lasx_xvfsub_s): Ditto.
19733 (CODE_FOR_lasx_xvfsub_d): Ditto.
19734 (CODE_FOR_lasx_xvfmul_s): Ditto.
19735 (CODE_FOR_lasx_xvfmul_d): Ditto.
19736 (CODE_FOR_lasx_xvfdiv_s): Ditto.
19737 (CODE_FOR_lasx_xvfdiv_d): Ditto.
19738 (CODE_FOR_lasx_xvfmax_s): Ditto.
19739 (CODE_FOR_lasx_xvfmax_d): Ditto.
19740 (CODE_FOR_lasx_xvfmin_s): Ditto.
19741 (CODE_FOR_lasx_xvfmin_d): Ditto.
19742 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
19743 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
19744 (CODE_FOR_lasx_xvflogb_s): Ditto.
19745 (CODE_FOR_lasx_xvflogb_d): Ditto.
19746 (CODE_FOR_lasx_xvmax_b): Ditto.
19747 (CODE_FOR_lasx_xvmax_h): Ditto.
19748 (CODE_FOR_lasx_xvmax_w): Ditto.
19749 (CODE_FOR_lasx_xvmax_d): Ditto.
19750 (CODE_FOR_lasx_xvmaxi_b): Ditto.
19751 (CODE_FOR_lasx_xvmaxi_h): Ditto.
19752 (CODE_FOR_lasx_xvmaxi_w): Ditto.
19753 (CODE_FOR_lasx_xvmaxi_d): Ditto.
19754 (CODE_FOR_lasx_xvmax_bu): Ditto.
19755 (CODE_FOR_lasx_xvmax_hu): Ditto.
19756 (CODE_FOR_lasx_xvmax_wu): Ditto.
19757 (CODE_FOR_lasx_xvmax_du): Ditto.
19758 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
19759 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
19760 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
19761 (CODE_FOR_lasx_xvmaxi_du): Ditto.
19762 (CODE_FOR_lasx_xvmin_b): Ditto.
19763 (CODE_FOR_lasx_xvmin_h): Ditto.
19764 (CODE_FOR_lasx_xvmin_w): Ditto.
19765 (CODE_FOR_lasx_xvmin_d): Ditto.
19766 (CODE_FOR_lasx_xvmini_b): Ditto.
19767 (CODE_FOR_lasx_xvmini_h): Ditto.
19768 (CODE_FOR_lasx_xvmini_w): Ditto.
19769 (CODE_FOR_lasx_xvmini_d): Ditto.
19770 (CODE_FOR_lasx_xvmin_bu): Ditto.
19771 (CODE_FOR_lasx_xvmin_hu): Ditto.
19772 (CODE_FOR_lasx_xvmin_wu): Ditto.
19773 (CODE_FOR_lasx_xvmin_du): Ditto.
19774 (CODE_FOR_lasx_xvmini_bu): Ditto.
19775 (CODE_FOR_lasx_xvmini_hu): Ditto.
19776 (CODE_FOR_lasx_xvmini_wu): Ditto.
19777 (CODE_FOR_lasx_xvmini_du): Ditto.
19778 (CODE_FOR_lasx_xvmod_b): Ditto.
19779 (CODE_FOR_lasx_xvmod_h): Ditto.
19780 (CODE_FOR_lasx_xvmod_w): Ditto.
19781 (CODE_FOR_lasx_xvmod_d): Ditto.
19782 (CODE_FOR_lasx_xvmod_bu): Ditto.
19783 (CODE_FOR_lasx_xvmod_hu): Ditto.
19784 (CODE_FOR_lasx_xvmod_wu): Ditto.
19785 (CODE_FOR_lasx_xvmod_du): Ditto.
19786 (CODE_FOR_lasx_xvmul_b): Ditto.
19787 (CODE_FOR_lasx_xvmul_h): Ditto.
19788 (CODE_FOR_lasx_xvmul_w): Ditto.
19789 (CODE_FOR_lasx_xvmul_d): Ditto.
19790 (CODE_FOR_lasx_xvclz_b): Ditto.
19791 (CODE_FOR_lasx_xvclz_h): Ditto.
19792 (CODE_FOR_lasx_xvclz_w): Ditto.
19793 (CODE_FOR_lasx_xvclz_d): Ditto.
19794 (CODE_FOR_lasx_xvnor_v): Ditto.
19795 (CODE_FOR_lasx_xvor_v): Ditto.
19796 (CODE_FOR_lasx_xvori_b): Ditto.
19797 (CODE_FOR_lasx_xvnori_b): Ditto.
19798 (CODE_FOR_lasx_xvpcnt_b): Ditto.
19799 (CODE_FOR_lasx_xvpcnt_h): Ditto.
19800 (CODE_FOR_lasx_xvpcnt_w): Ditto.
19801 (CODE_FOR_lasx_xvpcnt_d): Ditto.
19802 (CODE_FOR_lasx_xvxor_v): Ditto.
19803 (CODE_FOR_lasx_xvxori_b): Ditto.
19804 (CODE_FOR_lasx_xvsll_b): Ditto.
19805 (CODE_FOR_lasx_xvsll_h): Ditto.
19806 (CODE_FOR_lasx_xvsll_w): Ditto.
19807 (CODE_FOR_lasx_xvsll_d): Ditto.
19808 (CODE_FOR_lasx_xvslli_b): Ditto.
19809 (CODE_FOR_lasx_xvslli_h): Ditto.
19810 (CODE_FOR_lasx_xvslli_w): Ditto.
19811 (CODE_FOR_lasx_xvslli_d): Ditto.
19812 (CODE_FOR_lasx_xvsra_b): Ditto.
19813 (CODE_FOR_lasx_xvsra_h): Ditto.
19814 (CODE_FOR_lasx_xvsra_w): Ditto.
19815 (CODE_FOR_lasx_xvsra_d): Ditto.
19816 (CODE_FOR_lasx_xvsrai_b): Ditto.
19817 (CODE_FOR_lasx_xvsrai_h): Ditto.
19818 (CODE_FOR_lasx_xvsrai_w): Ditto.
19819 (CODE_FOR_lasx_xvsrai_d): Ditto.
19820 (CODE_FOR_lasx_xvsrl_b): Ditto.
19821 (CODE_FOR_lasx_xvsrl_h): Ditto.
19822 (CODE_FOR_lasx_xvsrl_w): Ditto.
19823 (CODE_FOR_lasx_xvsrl_d): Ditto.
19824 (CODE_FOR_lasx_xvsrli_b): Ditto.
19825 (CODE_FOR_lasx_xvsrli_h): Ditto.
19826 (CODE_FOR_lasx_xvsrli_w): Ditto.
19827 (CODE_FOR_lasx_xvsrli_d): Ditto.
19828 (CODE_FOR_lasx_xvsub_b): Ditto.
19829 (CODE_FOR_lasx_xvsub_h): Ditto.
19830 (CODE_FOR_lasx_xvsub_w): Ditto.
19831 (CODE_FOR_lasx_xvsub_d): Ditto.
19832 (CODE_FOR_lasx_xvsubi_bu): Ditto.
19833 (CODE_FOR_lasx_xvsubi_hu): Ditto.
19834 (CODE_FOR_lasx_xvsubi_wu): Ditto.
19835 (CODE_FOR_lasx_xvsubi_du): Ditto.
19836 (CODE_FOR_lasx_xvpackod_d): Ditto.
19837 (CODE_FOR_lasx_xvpackev_d): Ditto.
19838 (CODE_FOR_lasx_xvpickod_d): Ditto.
19839 (CODE_FOR_lasx_xvpickev_d): Ditto.
19840 (CODE_FOR_lasx_xvrepli_b): Ditto.
19841 (CODE_FOR_lasx_xvrepli_h): Ditto.
19842 (CODE_FOR_lasx_xvrepli_w): Ditto.
19843 (CODE_FOR_lasx_xvrepli_d): Ditto.
19844 (CODE_FOR_lasx_xvandn_v): Ditto.
19845 (CODE_FOR_lasx_xvorn_v): Ditto.
19846 (CODE_FOR_lasx_xvneg_b): Ditto.
19847 (CODE_FOR_lasx_xvneg_h): Ditto.
19848 (CODE_FOR_lasx_xvneg_w): Ditto.
19849 (CODE_FOR_lasx_xvneg_d): Ditto.
19850 (CODE_FOR_lasx_xvbsrl_v): Ditto.
19851 (CODE_FOR_lasx_xvbsll_v): Ditto.
19852 (CODE_FOR_lasx_xvfmadd_s): Ditto.
19853 (CODE_FOR_lasx_xvfmadd_d): Ditto.
19854 (CODE_FOR_lasx_xvfmsub_s): Ditto.
19855 (CODE_FOR_lasx_xvfmsub_d): Ditto.
19856 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
19857 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
19858 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
19859 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
19860 (CODE_FOR_lasx_xvpermi_q): Ditto.
19861 (CODE_FOR_lasx_xvpermi_d): Ditto.
19862 (CODE_FOR_lasx_xbnz_v): Ditto.
19863 (CODE_FOR_lasx_xbz_v): Ditto.
19864 (CODE_FOR_lasx_xvssub_b): Ditto.
19865 (CODE_FOR_lasx_xvssub_h): Ditto.
19866 (CODE_FOR_lasx_xvssub_w): Ditto.
19867 (CODE_FOR_lasx_xvssub_d): Ditto.
19868 (CODE_FOR_lasx_xvssub_bu): Ditto.
19869 (CODE_FOR_lasx_xvssub_hu): Ditto.
19870 (CODE_FOR_lasx_xvssub_wu): Ditto.
19871 (CODE_FOR_lasx_xvssub_du): Ditto.
19872 (CODE_FOR_lasx_xvabsd_b): Ditto.
19873 (CODE_FOR_lasx_xvabsd_h): Ditto.
19874 (CODE_FOR_lasx_xvabsd_w): Ditto.
19875 (CODE_FOR_lasx_xvabsd_d): Ditto.
19876 (CODE_FOR_lasx_xvabsd_bu): Ditto.
19877 (CODE_FOR_lasx_xvabsd_hu): Ditto.
19878 (CODE_FOR_lasx_xvabsd_wu): Ditto.
19879 (CODE_FOR_lasx_xvabsd_du): Ditto.
19880 (CODE_FOR_lasx_xvavg_b): Ditto.
19881 (CODE_FOR_lasx_xvavg_h): Ditto.
19882 (CODE_FOR_lasx_xvavg_w): Ditto.
19883 (CODE_FOR_lasx_xvavg_d): Ditto.
19884 (CODE_FOR_lasx_xvavg_bu): Ditto.
19885 (CODE_FOR_lasx_xvavg_hu): Ditto.
19886 (CODE_FOR_lasx_xvavg_wu): Ditto.
19887 (CODE_FOR_lasx_xvavg_du): Ditto.
19888 (CODE_FOR_lasx_xvavgr_b): Ditto.
19889 (CODE_FOR_lasx_xvavgr_h): Ditto.
19890 (CODE_FOR_lasx_xvavgr_w): Ditto.
19891 (CODE_FOR_lasx_xvavgr_d): Ditto.
19892 (CODE_FOR_lasx_xvavgr_bu): Ditto.
19893 (CODE_FOR_lasx_xvavgr_hu): Ditto.
19894 (CODE_FOR_lasx_xvavgr_wu): Ditto.
19895 (CODE_FOR_lasx_xvavgr_du): Ditto.
19896 (CODE_FOR_lasx_xvmuh_b): Ditto.
19897 (CODE_FOR_lasx_xvmuh_h): Ditto.
19898 (CODE_FOR_lasx_xvmuh_w): Ditto.
19899 (CODE_FOR_lasx_xvmuh_d): Ditto.
19900 (CODE_FOR_lasx_xvmuh_bu): Ditto.
19901 (CODE_FOR_lasx_xvmuh_hu): Ditto.
19902 (CODE_FOR_lasx_xvmuh_wu): Ditto.
19903 (CODE_FOR_lasx_xvmuh_du): Ditto.
19904 (CODE_FOR_lasx_xvssran_b_h): Ditto.
19905 (CODE_FOR_lasx_xvssran_h_w): Ditto.
19906 (CODE_FOR_lasx_xvssran_w_d): Ditto.
19907 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
19908 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
19909 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
19910 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
19911 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
19912 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
19913 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
19914 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
19915 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
19916 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
19917 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
19918 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
19919 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
19920 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
19921 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
19922 (CODE_FOR_lasx_xvftint_w_s): Ditto.
19923 (CODE_FOR_lasx_xvftint_l_d): Ditto.
19924 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
19925 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
19926 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
19927 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
19928 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
19929 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
19930 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
19931 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
19932 (CODE_FOR_lasx_xvsat_b): Ditto.
19933 (CODE_FOR_lasx_xvsat_h): Ditto.
19934 (CODE_FOR_lasx_xvsat_w): Ditto.
19935 (CODE_FOR_lasx_xvsat_d): Ditto.
19936 (CODE_FOR_lasx_xvsat_bu): Ditto.
19937 (CODE_FOR_lasx_xvsat_hu): Ditto.
19938 (CODE_FOR_lasx_xvsat_wu): Ditto.
19939 (CODE_FOR_lasx_xvsat_du): Ditto.
19940 (loongarch_builtin_vectorized_function): Ditto.
19941 (loongarch_expand_builtin_insn): Ditto.
19942 (loongarch_expand_builtin): Ditto.
19943 * config/loongarch/loongarch-ftypes.def (1): Ditto.
19947 * config/loongarch/lasxintrin.h: New file.
19949 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
19951 * config/loongarch/loongarch-modes.def
19952 (VECTOR_MODES): Add Loongson ASX instruction support.
19953 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
19954 (loongarch_split_256bit_move_p): Ditto.
19955 (loongarch_expand_vector_group_init): Ditto.
19956 (loongarch_expand_vec_perm_1): Ditto.
19957 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
19958 (loongarch_valid_offset_p): Ditto.
19959 (loongarch_address_insns): Ditto.
19960 (loongarch_const_insns): Ditto.
19961 (loongarch_legitimize_move): Ditto.
19962 (loongarch_builtin_vectorization_cost): Ditto.
19963 (loongarch_split_move_p): Ditto.
19964 (loongarch_split_move): Ditto.
19965 (loongarch_output_move_index_float): Ditto.
19966 (loongarch_split_256bit_move_p): Ditto.
19967 (loongarch_split_256bit_move): Ditto.
19968 (loongarch_output_move): Ditto.
19969 (loongarch_print_operand_reloc): Ditto.
19970 (loongarch_print_operand): Ditto.
19971 (loongarch_hard_regno_mode_ok_uncached): Ditto.
19972 (loongarch_hard_regno_nregs): Ditto.
19973 (loongarch_class_max_nregs): Ditto.
19974 (loongarch_can_change_mode_class): Ditto.
19975 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
19976 (loongarch_vector_mode_supported_p): Ditto.
19977 (loongarch_preferred_simd_mode): Ditto.
19978 (loongarch_autovectorize_vector_modes): Ditto.
19979 (loongarch_lsx_output_division): Ditto.
19980 (loongarch_expand_lsx_shuffle): Ditto.
19981 (loongarch_expand_vec_perm): Ditto.
19982 (loongarch_expand_vec_perm_interleave): Ditto.
19983 (loongarch_try_expand_lsx_vshuf_const): Ditto.
19984 (loongarch_expand_vec_perm_even_odd_1): Ditto.
19985 (loongarch_expand_vec_perm_even_odd): Ditto.
19986 (loongarch_expand_vec_perm_1): Ditto.
19987 (loongarch_expand_vec_perm_const_2): Ditto.
19988 (loongarch_is_quad_duplicate): Ditto.
19989 (loongarch_is_double_duplicate): Ditto.
19990 (loongarch_is_odd_extraction): Ditto.
19991 (loongarch_is_even_extraction): Ditto.
19992 (loongarch_is_extraction_permutation): Ditto.
19993 (loongarch_is_center_extraction): Ditto.
19994 (loongarch_is_reversing_permutation): Ditto.
19995 (loongarch_is_di_misalign_extract): Ditto.
19996 (loongarch_is_si_misalign_extract): Ditto.
19997 (loongarch_is_lasx_lowpart_interleave): Ditto.
19998 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
19999 (COMPARE_SELECTOR): Ditto.
20000 (loongarch_is_lasx_lowpart_extract): Ditto.
20001 (loongarch_is_lasx_highpart_interleave): Ditto.
20002 (loongarch_is_lasx_highpart_interleave_2): Ditto.
20003 (loongarch_is_elem_duplicate): Ditto.
20004 (loongarch_is_op_reverse_perm): Ditto.
20005 (loongarch_is_single_op_perm): Ditto.
20006 (loongarch_is_divisible_perm): Ditto.
20007 (loongarch_is_triple_stride_extract): Ditto.
20008 (loongarch_vectorize_vec_perm_const): Ditto.
20009 (loongarch_cpu_sched_reassociation_width): Ditto.
20010 (loongarch_expand_vector_extract): Ditto.
20011 (emit_reduc_half): Ditto.
20012 (loongarch_expand_vec_unpack): Ditto.
20013 (loongarch_expand_vector_group_init): Ditto.
20014 (loongarch_expand_vector_init): Ditto.
20015 (loongarch_expand_lsx_cmp): Ditto.
20016 (loongarch_builtin_support_vector_misalignment): Ditto.
20017 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
20018 (BITS_PER_LASX_REG): Ditto.
20019 (STRUCTURE_SIZE_BOUNDARY): Ditto.
20020 (LASX_REG_FIRST): Ditto.
20021 (LASX_REG_LAST): Ditto.
20022 (LASX_REG_NUM): Ditto.
20023 (LASX_REG_P): Ditto.
20024 (LASX_REG_RTX_P): Ditto.
20025 (LASX_SUPPORTED_MODE_P): Ditto.
20026 * config/loongarch/loongarch.md: Ditto.
20027 * config/loongarch/lasx.md: New file.
20029 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
20031 * config.gcc: Export the header file lsxintrin.h.
20032 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
20033 (enum loongarch_builtin_type): Ditto.
20034 (AVAIL_ALL): Ditto.
20035 (LARCH_BUILTIN): Ditto.
20036 (LSX_BUILTIN): Ditto.
20037 (LSX_BUILTIN_TEST_BRANCH): Ditto.
20038 (LSX_NO_TARGET_BUILTIN): Ditto.
20039 (CODE_FOR_lsx_vsadd_b): Ditto.
20040 (CODE_FOR_lsx_vsadd_h): Ditto.
20041 (CODE_FOR_lsx_vsadd_w): Ditto.
20042 (CODE_FOR_lsx_vsadd_d): Ditto.
20043 (CODE_FOR_lsx_vsadd_bu): Ditto.
20044 (CODE_FOR_lsx_vsadd_hu): Ditto.
20045 (CODE_FOR_lsx_vsadd_wu): Ditto.
20046 (CODE_FOR_lsx_vsadd_du): Ditto.
20047 (CODE_FOR_lsx_vadd_b): Ditto.
20048 (CODE_FOR_lsx_vadd_h): Ditto.
20049 (CODE_FOR_lsx_vadd_w): Ditto.
20050 (CODE_FOR_lsx_vadd_d): Ditto.
20051 (CODE_FOR_lsx_vaddi_bu): Ditto.
20052 (CODE_FOR_lsx_vaddi_hu): Ditto.
20053 (CODE_FOR_lsx_vaddi_wu): Ditto.
20054 (CODE_FOR_lsx_vaddi_du): Ditto.
20055 (CODE_FOR_lsx_vand_v): Ditto.
20056 (CODE_FOR_lsx_vandi_b): Ditto.
20057 (CODE_FOR_lsx_bnz_v): Ditto.
20058 (CODE_FOR_lsx_bz_v): Ditto.
20059 (CODE_FOR_lsx_vbitsel_v): Ditto.
20060 (CODE_FOR_lsx_vseqi_b): Ditto.
20061 (CODE_FOR_lsx_vseqi_h): Ditto.
20062 (CODE_FOR_lsx_vseqi_w): Ditto.
20063 (CODE_FOR_lsx_vseqi_d): Ditto.
20064 (CODE_FOR_lsx_vslti_b): Ditto.
20065 (CODE_FOR_lsx_vslti_h): Ditto.
20066 (CODE_FOR_lsx_vslti_w): Ditto.
20067 (CODE_FOR_lsx_vslti_d): Ditto.
20068 (CODE_FOR_lsx_vslti_bu): Ditto.
20069 (CODE_FOR_lsx_vslti_hu): Ditto.
20070 (CODE_FOR_lsx_vslti_wu): Ditto.
20071 (CODE_FOR_lsx_vslti_du): Ditto.
20072 (CODE_FOR_lsx_vslei_b): Ditto.
20073 (CODE_FOR_lsx_vslei_h): Ditto.
20074 (CODE_FOR_lsx_vslei_w): Ditto.
20075 (CODE_FOR_lsx_vslei_d): Ditto.
20076 (CODE_FOR_lsx_vslei_bu): Ditto.
20077 (CODE_FOR_lsx_vslei_hu): Ditto.
20078 (CODE_FOR_lsx_vslei_wu): Ditto.
20079 (CODE_FOR_lsx_vslei_du): Ditto.
20080 (CODE_FOR_lsx_vdiv_b): Ditto.
20081 (CODE_FOR_lsx_vdiv_h): Ditto.
20082 (CODE_FOR_lsx_vdiv_w): Ditto.
20083 (CODE_FOR_lsx_vdiv_d): Ditto.
20084 (CODE_FOR_lsx_vdiv_bu): Ditto.
20085 (CODE_FOR_lsx_vdiv_hu): Ditto.
20086 (CODE_FOR_lsx_vdiv_wu): Ditto.
20087 (CODE_FOR_lsx_vdiv_du): Ditto.
20088 (CODE_FOR_lsx_vfadd_s): Ditto.
20089 (CODE_FOR_lsx_vfadd_d): Ditto.
20090 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
20091 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
20092 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
20093 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
20094 (CODE_FOR_lsx_vffint_s_w): Ditto.
20095 (CODE_FOR_lsx_vffint_d_l): Ditto.
20096 (CODE_FOR_lsx_vffint_s_wu): Ditto.
20097 (CODE_FOR_lsx_vffint_d_lu): Ditto.
20098 (CODE_FOR_lsx_vfsub_s): Ditto.
20099 (CODE_FOR_lsx_vfsub_d): Ditto.
20100 (CODE_FOR_lsx_vfmul_s): Ditto.
20101 (CODE_FOR_lsx_vfmul_d): Ditto.
20102 (CODE_FOR_lsx_vfdiv_s): Ditto.
20103 (CODE_FOR_lsx_vfdiv_d): Ditto.
20104 (CODE_FOR_lsx_vfmax_s): Ditto.
20105 (CODE_FOR_lsx_vfmax_d): Ditto.
20106 (CODE_FOR_lsx_vfmin_s): Ditto.
20107 (CODE_FOR_lsx_vfmin_d): Ditto.
20108 (CODE_FOR_lsx_vfsqrt_s): Ditto.
20109 (CODE_FOR_lsx_vfsqrt_d): Ditto.
20110 (CODE_FOR_lsx_vflogb_s): Ditto.
20111 (CODE_FOR_lsx_vflogb_d): Ditto.
20112 (CODE_FOR_lsx_vmax_b): Ditto.
20113 (CODE_FOR_lsx_vmax_h): Ditto.
20114 (CODE_FOR_lsx_vmax_w): Ditto.
20115 (CODE_FOR_lsx_vmax_d): Ditto.
20116 (CODE_FOR_lsx_vmaxi_b): Ditto.
20117 (CODE_FOR_lsx_vmaxi_h): Ditto.
20118 (CODE_FOR_lsx_vmaxi_w): Ditto.
20119 (CODE_FOR_lsx_vmaxi_d): Ditto.
20120 (CODE_FOR_lsx_vmax_bu): Ditto.
20121 (CODE_FOR_lsx_vmax_hu): Ditto.
20122 (CODE_FOR_lsx_vmax_wu): Ditto.
20123 (CODE_FOR_lsx_vmax_du): Ditto.
20124 (CODE_FOR_lsx_vmaxi_bu): Ditto.
20125 (CODE_FOR_lsx_vmaxi_hu): Ditto.
20126 (CODE_FOR_lsx_vmaxi_wu): Ditto.
20127 (CODE_FOR_lsx_vmaxi_du): Ditto.
20128 (CODE_FOR_lsx_vmin_b): Ditto.
20129 (CODE_FOR_lsx_vmin_h): Ditto.
20130 (CODE_FOR_lsx_vmin_w): Ditto.
20131 (CODE_FOR_lsx_vmin_d): Ditto.
20132 (CODE_FOR_lsx_vmini_b): Ditto.
20133 (CODE_FOR_lsx_vmini_h): Ditto.
20134 (CODE_FOR_lsx_vmini_w): Ditto.
20135 (CODE_FOR_lsx_vmini_d): Ditto.
20136 (CODE_FOR_lsx_vmin_bu): Ditto.
20137 (CODE_FOR_lsx_vmin_hu): Ditto.
20138 (CODE_FOR_lsx_vmin_wu): Ditto.
20139 (CODE_FOR_lsx_vmin_du): Ditto.
20140 (CODE_FOR_lsx_vmini_bu): Ditto.
20141 (CODE_FOR_lsx_vmini_hu): Ditto.
20142 (CODE_FOR_lsx_vmini_wu): Ditto.
20143 (CODE_FOR_lsx_vmini_du): Ditto.
20144 (CODE_FOR_lsx_vmod_b): Ditto.
20145 (CODE_FOR_lsx_vmod_h): Ditto.
20146 (CODE_FOR_lsx_vmod_w): Ditto.
20147 (CODE_FOR_lsx_vmod_d): Ditto.
20148 (CODE_FOR_lsx_vmod_bu): Ditto.
20149 (CODE_FOR_lsx_vmod_hu): Ditto.
20150 (CODE_FOR_lsx_vmod_wu): Ditto.
20151 (CODE_FOR_lsx_vmod_du): Ditto.
20152 (CODE_FOR_lsx_vmul_b): Ditto.
20153 (CODE_FOR_lsx_vmul_h): Ditto.
20154 (CODE_FOR_lsx_vmul_w): Ditto.
20155 (CODE_FOR_lsx_vmul_d): Ditto.
20156 (CODE_FOR_lsx_vclz_b): Ditto.
20157 (CODE_FOR_lsx_vclz_h): Ditto.
20158 (CODE_FOR_lsx_vclz_w): Ditto.
20159 (CODE_FOR_lsx_vclz_d): Ditto.
20160 (CODE_FOR_lsx_vnor_v): Ditto.
20161 (CODE_FOR_lsx_vor_v): Ditto.
20162 (CODE_FOR_lsx_vori_b): Ditto.
20163 (CODE_FOR_lsx_vnori_b): Ditto.
20164 (CODE_FOR_lsx_vpcnt_b): Ditto.
20165 (CODE_FOR_lsx_vpcnt_h): Ditto.
20166 (CODE_FOR_lsx_vpcnt_w): Ditto.
20167 (CODE_FOR_lsx_vpcnt_d): Ditto.
20168 (CODE_FOR_lsx_vxor_v): Ditto.
20169 (CODE_FOR_lsx_vxori_b): Ditto.
20170 (CODE_FOR_lsx_vsll_b): Ditto.
20171 (CODE_FOR_lsx_vsll_h): Ditto.
20172 (CODE_FOR_lsx_vsll_w): Ditto.
20173 (CODE_FOR_lsx_vsll_d): Ditto.
20174 (CODE_FOR_lsx_vslli_b): Ditto.
20175 (CODE_FOR_lsx_vslli_h): Ditto.
20176 (CODE_FOR_lsx_vslli_w): Ditto.
20177 (CODE_FOR_lsx_vslli_d): Ditto.
20178 (CODE_FOR_lsx_vsra_b): Ditto.
20179 (CODE_FOR_lsx_vsra_h): Ditto.
20180 (CODE_FOR_lsx_vsra_w): Ditto.
20181 (CODE_FOR_lsx_vsra_d): Ditto.
20182 (CODE_FOR_lsx_vsrai_b): Ditto.
20183 (CODE_FOR_lsx_vsrai_h): Ditto.
20184 (CODE_FOR_lsx_vsrai_w): Ditto.
20185 (CODE_FOR_lsx_vsrai_d): Ditto.
20186 (CODE_FOR_lsx_vsrl_b): Ditto.
20187 (CODE_FOR_lsx_vsrl_h): Ditto.
20188 (CODE_FOR_lsx_vsrl_w): Ditto.
20189 (CODE_FOR_lsx_vsrl_d): Ditto.
20190 (CODE_FOR_lsx_vsrli_b): Ditto.
20191 (CODE_FOR_lsx_vsrli_h): Ditto.
20192 (CODE_FOR_lsx_vsrli_w): Ditto.
20193 (CODE_FOR_lsx_vsrli_d): Ditto.
20194 (CODE_FOR_lsx_vsub_b): Ditto.
20195 (CODE_FOR_lsx_vsub_h): Ditto.
20196 (CODE_FOR_lsx_vsub_w): Ditto.
20197 (CODE_FOR_lsx_vsub_d): Ditto.
20198 (CODE_FOR_lsx_vsubi_bu): Ditto.
20199 (CODE_FOR_lsx_vsubi_hu): Ditto.
20200 (CODE_FOR_lsx_vsubi_wu): Ditto.
20201 (CODE_FOR_lsx_vsubi_du): Ditto.
20202 (CODE_FOR_lsx_vpackod_d): Ditto.
20203 (CODE_FOR_lsx_vpackev_d): Ditto.
20204 (CODE_FOR_lsx_vpickod_d): Ditto.
20205 (CODE_FOR_lsx_vpickev_d): Ditto.
20206 (CODE_FOR_lsx_vrepli_b): Ditto.
20207 (CODE_FOR_lsx_vrepli_h): Ditto.
20208 (CODE_FOR_lsx_vrepli_w): Ditto.
20209 (CODE_FOR_lsx_vrepli_d): Ditto.
20210 (CODE_FOR_lsx_vsat_b): Ditto.
20211 (CODE_FOR_lsx_vsat_h): Ditto.
20212 (CODE_FOR_lsx_vsat_w): Ditto.
20213 (CODE_FOR_lsx_vsat_d): Ditto.
20214 (CODE_FOR_lsx_vsat_bu): Ditto.
20215 (CODE_FOR_lsx_vsat_hu): Ditto.
20216 (CODE_FOR_lsx_vsat_wu): Ditto.
20217 (CODE_FOR_lsx_vsat_du): Ditto.
20218 (CODE_FOR_lsx_vavg_b): Ditto.
20219 (CODE_FOR_lsx_vavg_h): Ditto.
20220 (CODE_FOR_lsx_vavg_w): Ditto.
20221 (CODE_FOR_lsx_vavg_d): Ditto.
20222 (CODE_FOR_lsx_vavg_bu): Ditto.
20223 (CODE_FOR_lsx_vavg_hu): Ditto.
20224 (CODE_FOR_lsx_vavg_wu): Ditto.
20225 (CODE_FOR_lsx_vavg_du): Ditto.
20226 (CODE_FOR_lsx_vavgr_b): Ditto.
20227 (CODE_FOR_lsx_vavgr_h): Ditto.
20228 (CODE_FOR_lsx_vavgr_w): Ditto.
20229 (CODE_FOR_lsx_vavgr_d): Ditto.
20230 (CODE_FOR_lsx_vavgr_bu): Ditto.
20231 (CODE_FOR_lsx_vavgr_hu): Ditto.
20232 (CODE_FOR_lsx_vavgr_wu): Ditto.
20233 (CODE_FOR_lsx_vavgr_du): Ditto.
20234 (CODE_FOR_lsx_vssub_b): Ditto.
20235 (CODE_FOR_lsx_vssub_h): Ditto.
20236 (CODE_FOR_lsx_vssub_w): Ditto.
20237 (CODE_FOR_lsx_vssub_d): Ditto.
20238 (CODE_FOR_lsx_vssub_bu): Ditto.
20239 (CODE_FOR_lsx_vssub_hu): Ditto.
20240 (CODE_FOR_lsx_vssub_wu): Ditto.
20241 (CODE_FOR_lsx_vssub_du): Ditto.
20242 (CODE_FOR_lsx_vabsd_b): Ditto.
20243 (CODE_FOR_lsx_vabsd_h): Ditto.
20244 (CODE_FOR_lsx_vabsd_w): Ditto.
20245 (CODE_FOR_lsx_vabsd_d): Ditto.
20246 (CODE_FOR_lsx_vabsd_bu): Ditto.
20247 (CODE_FOR_lsx_vabsd_hu): Ditto.
20248 (CODE_FOR_lsx_vabsd_wu): Ditto.
20249 (CODE_FOR_lsx_vabsd_du): Ditto.
20250 (CODE_FOR_lsx_vftint_w_s): Ditto.
20251 (CODE_FOR_lsx_vftint_l_d): Ditto.
20252 (CODE_FOR_lsx_vftint_wu_s): Ditto.
20253 (CODE_FOR_lsx_vftint_lu_d): Ditto.
20254 (CODE_FOR_lsx_vandn_v): Ditto.
20255 (CODE_FOR_lsx_vorn_v): Ditto.
20256 (CODE_FOR_lsx_vneg_b): Ditto.
20257 (CODE_FOR_lsx_vneg_h): Ditto.
20258 (CODE_FOR_lsx_vneg_w): Ditto.
20259 (CODE_FOR_lsx_vneg_d): Ditto.
20260 (CODE_FOR_lsx_vshuf4i_d): Ditto.
20261 (CODE_FOR_lsx_vbsrl_v): Ditto.
20262 (CODE_FOR_lsx_vbsll_v): Ditto.
20263 (CODE_FOR_lsx_vfmadd_s): Ditto.
20264 (CODE_FOR_lsx_vfmadd_d): Ditto.
20265 (CODE_FOR_lsx_vfmsub_s): Ditto.
20266 (CODE_FOR_lsx_vfmsub_d): Ditto.
20267 (CODE_FOR_lsx_vfnmadd_s): Ditto.
20268 (CODE_FOR_lsx_vfnmadd_d): Ditto.
20269 (CODE_FOR_lsx_vfnmsub_s): Ditto.
20270 (CODE_FOR_lsx_vfnmsub_d): Ditto.
20271 (CODE_FOR_lsx_vmuh_b): Ditto.
20272 (CODE_FOR_lsx_vmuh_h): Ditto.
20273 (CODE_FOR_lsx_vmuh_w): Ditto.
20274 (CODE_FOR_lsx_vmuh_d): Ditto.
20275 (CODE_FOR_lsx_vmuh_bu): Ditto.
20276 (CODE_FOR_lsx_vmuh_hu): Ditto.
20277 (CODE_FOR_lsx_vmuh_wu): Ditto.
20278 (CODE_FOR_lsx_vmuh_du): Ditto.
20279 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
20280 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
20281 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
20282 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
20283 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
20284 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
20285 (CODE_FOR_lsx_vssran_b_h): Ditto.
20286 (CODE_FOR_lsx_vssran_h_w): Ditto.
20287 (CODE_FOR_lsx_vssran_w_d): Ditto.
20288 (CODE_FOR_lsx_vssran_bu_h): Ditto.
20289 (CODE_FOR_lsx_vssran_hu_w): Ditto.
20290 (CODE_FOR_lsx_vssran_wu_d): Ditto.
20291 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
20292 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
20293 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
20294 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
20295 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
20296 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
20297 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
20298 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
20299 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
20300 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
20301 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
20302 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
20303 (loongarch_builtin_vector_type): Ditto.
20304 (loongarch_build_cvpointer_type): Ditto.
20305 (LARCH_ATYPE_CVPOINTER): Ditto.
20306 (LARCH_ATYPE_BOOLEAN): Ditto.
20307 (LARCH_ATYPE_V2SF): Ditto.
20308 (LARCH_ATYPE_V2HI): Ditto.
20309 (LARCH_ATYPE_V2SI): Ditto.
20310 (LARCH_ATYPE_V4QI): Ditto.
20311 (LARCH_ATYPE_V4HI): Ditto.
20312 (LARCH_ATYPE_V8QI): Ditto.
20313 (LARCH_ATYPE_V2DI): Ditto.
20314 (LARCH_ATYPE_V4SI): Ditto.
20315 (LARCH_ATYPE_V8HI): Ditto.
20316 (LARCH_ATYPE_V16QI): Ditto.
20317 (LARCH_ATYPE_V2DF): Ditto.
20318 (LARCH_ATYPE_V4SF): Ditto.
20319 (LARCH_ATYPE_V4DI): Ditto.
20320 (LARCH_ATYPE_V8SI): Ditto.
20321 (LARCH_ATYPE_V16HI): Ditto.
20322 (LARCH_ATYPE_V32QI): Ditto.
20323 (LARCH_ATYPE_V4DF): Ditto.
20324 (LARCH_ATYPE_V8SF): Ditto.
20325 (LARCH_ATYPE_UV2DI): Ditto.
20326 (LARCH_ATYPE_UV4SI): Ditto.
20327 (LARCH_ATYPE_UV8HI): Ditto.
20328 (LARCH_ATYPE_UV16QI): Ditto.
20329 (LARCH_ATYPE_UV4DI): Ditto.
20330 (LARCH_ATYPE_UV8SI): Ditto.
20331 (LARCH_ATYPE_UV16HI): Ditto.
20332 (LARCH_ATYPE_UV32QI): Ditto.
20333 (LARCH_ATYPE_UV2SI): Ditto.
20334 (LARCH_ATYPE_UV4HI): Ditto.
20335 (LARCH_ATYPE_UV8QI): Ditto.
20336 (loongarch_builtin_vectorized_function): Ditto.
20337 (LARCH_GET_BUILTIN): Ditto.
20338 (loongarch_expand_builtin_insn): Ditto.
20339 (loongarch_expand_builtin_lsx_test_branch): Ditto.
20340 (loongarch_expand_builtin): Ditto.
20341 * config/loongarch/loongarch-ftypes.def (1): Ditto.
20345 * config/loongarch/lsxintrin.h: New file.
20347 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
20349 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
20369 * config/loongarch/genopts/loongarch.opt.in: Ditto.
20370 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
20371 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
20372 (VECTOR_MODE): Ditto.
20374 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
20375 (loongarch_split_move_insn): Ditto.
20376 (loongarch_split_128bit_move): Ditto.
20377 (loongarch_split_128bit_move_p): Ditto.
20378 (loongarch_split_lsx_copy_d): Ditto.
20379 (loongarch_split_lsx_insert_d): Ditto.
20380 (loongarch_split_lsx_fill_d): Ditto.
20381 (loongarch_expand_vec_cmp): Ditto.
20382 (loongarch_const_vector_same_val_p): Ditto.
20383 (loongarch_const_vector_same_bytes_p): Ditto.
20384 (loongarch_const_vector_same_int_p): Ditto.
20385 (loongarch_const_vector_shuffle_set_p): Ditto.
20386 (loongarch_const_vector_bitimm_set_p): Ditto.
20387 (loongarch_const_vector_bitimm_clr_p): Ditto.
20388 (loongarch_lsx_vec_parallel_const_half): Ditto.
20389 (loongarch_gen_const_int_vector): Ditto.
20390 (loongarch_lsx_output_division): Ditto.
20391 (loongarch_expand_vector_init): Ditto.
20392 (loongarch_expand_vec_unpack): Ditto.
20393 (loongarch_expand_vec_perm): Ditto.
20394 (loongarch_expand_vector_extract): Ditto.
20395 (loongarch_expand_vector_reduc): Ditto.
20396 (loongarch_ldst_scaled_shift): Ditto.
20397 (loongarch_expand_vec_cond_expr): Ditto.
20398 (loongarch_expand_vec_cond_mask_expr): Ditto.
20399 (loongarch_builtin_vectorized_function): Ditto.
20400 (loongarch_gen_const_int_vector_shuffle): Ditto.
20401 (loongarch_build_signbit_mask): Ditto.
20402 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
20403 (loongarch_setup_incoming_varargs): Ditto.
20404 (loongarch_emit_move): Ditto.
20405 (loongarch_const_vector_bitimm_set_p): Ditto.
20406 (loongarch_const_vector_bitimm_clr_p): Ditto.
20407 (loongarch_const_vector_same_val_p): Ditto.
20408 (loongarch_const_vector_same_bytes_p): Ditto.
20409 (loongarch_const_vector_same_int_p): Ditto.
20410 (loongarch_const_vector_shuffle_set_p): Ditto.
20411 (loongarch_symbol_insns): Ditto.
20412 (loongarch_cannot_force_const_mem): Ditto.
20413 (loongarch_valid_offset_p): Ditto.
20414 (loongarch_valid_index_p): Ditto.
20415 (loongarch_classify_address): Ditto.
20416 (loongarch_address_insns): Ditto.
20417 (loongarch_ldst_scaled_shift): Ditto.
20418 (loongarch_const_insns): Ditto.
20419 (loongarch_split_move_insn_p): Ditto.
20420 (loongarch_subword_at_byte): Ditto.
20421 (loongarch_legitimize_move): Ditto.
20422 (loongarch_builtin_vectorization_cost): Ditto.
20423 (loongarch_split_move_p): Ditto.
20424 (loongarch_split_move): Ditto.
20425 (loongarch_split_move_insn): Ditto.
20426 (loongarch_output_move_index_float): Ditto.
20427 (loongarch_split_128bit_move_p): Ditto.
20428 (loongarch_split_128bit_move): Ditto.
20429 (loongarch_split_lsx_copy_d): Ditto.
20430 (loongarch_split_lsx_insert_d): Ditto.
20431 (loongarch_split_lsx_fill_d): Ditto.
20432 (loongarch_output_move): Ditto.
20433 (loongarch_extend_comparands): Ditto.
20434 (loongarch_print_operand_reloc): Ditto.
20435 (loongarch_print_operand): Ditto.
20436 (loongarch_hard_regno_mode_ok_uncached): Ditto.
20437 (loongarch_hard_regno_call_part_clobbered): Ditto.
20438 (loongarch_hard_regno_nregs): Ditto.
20439 (loongarch_class_max_nregs): Ditto.
20440 (loongarch_can_change_mode_class): Ditto.
20441 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
20442 (loongarch_secondary_reload): Ditto.
20443 (loongarch_vector_mode_supported_p): Ditto.
20444 (loongarch_preferred_simd_mode): Ditto.
20445 (loongarch_autovectorize_vector_modes): Ditto.
20446 (loongarch_lsx_output_division): Ditto.
20447 (loongarch_option_override_internal): Ditto.
20448 (loongarch_hard_regno_caller_save_mode): Ditto.
20449 (MAX_VECT_LEN): Ditto.
20450 (loongarch_spill_class): Ditto.
20451 (struct expand_vec_perm_d): Ditto.
20452 (loongarch_promote_function_mode): Ditto.
20453 (loongarch_expand_vselect): Ditto.
20454 (loongarch_starting_frame_offset): Ditto.
20455 (loongarch_expand_vselect_vconcat): Ditto.
20456 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
20457 (TARGET_OPTION_OVERRIDE): Ditto.
20458 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
20459 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
20460 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
20461 (loongarch_expand_lsx_shuffle): Ditto.
20462 (TARGET_SCHED_INIT): Ditto.
20463 (TARGET_SCHED_REORDER): Ditto.
20464 (TARGET_SCHED_REORDER2): Ditto.
20465 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
20466 (TARGET_SCHED_ADJUST_COST): Ditto.
20467 (TARGET_SCHED_ISSUE_RATE): Ditto.
20468 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
20469 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
20470 (TARGET_VALID_POINTER_MODE): Ditto.
20471 (TARGET_REGISTER_MOVE_COST): Ditto.
20472 (TARGET_MEMORY_MOVE_COST): Ditto.
20473 (TARGET_RTX_COSTS): Ditto.
20474 (TARGET_ADDRESS_COST): Ditto.
20475 (TARGET_IN_SMALL_DATA_P): Ditto.
20476 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
20477 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
20478 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
20479 (loongarch_expand_vec_perm): Ditto.
20480 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
20481 (TARGET_RETURN_IN_MEMORY): Ditto.
20482 (TARGET_FUNCTION_VALUE): Ditto.
20483 (TARGET_LIBCALL_VALUE): Ditto.
20484 (loongarch_try_expand_lsx_vshuf_const): Ditto.
20485 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
20486 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
20487 (TARGET_PRINT_OPERAND): Ditto.
20488 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
20489 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
20490 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
20491 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
20492 (TARGET_MUST_PASS_IN_STACK): Ditto.
20493 (TARGET_PASS_BY_REFERENCE): Ditto.
20494 (TARGET_ARG_PARTIAL_BYTES): Ditto.
20495 (TARGET_FUNCTION_ARG): Ditto.
20496 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
20497 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
20498 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
20499 (TARGET_INIT_BUILTINS): Ditto.
20500 (loongarch_expand_vec_perm_const_1): Ditto.
20501 (loongarch_expand_vec_perm_const_2): Ditto.
20502 (loongarch_vectorize_vec_perm_const): Ditto.
20503 (loongarch_cpu_sched_reassociation_width): Ditto.
20504 (loongarch_sched_reassociation_width): Ditto.
20505 (loongarch_expand_vector_extract): Ditto.
20506 (emit_reduc_half): Ditto.
20507 (loongarch_expand_vector_reduc): Ditto.
20508 (loongarch_expand_vec_unpack): Ditto.
20509 (loongarch_lsx_vec_parallel_const_half): Ditto.
20510 (loongarch_constant_elt_p): Ditto.
20511 (loongarch_gen_const_int_vector_shuffle): Ditto.
20512 (loongarch_expand_vector_init): Ditto.
20513 (loongarch_expand_lsx_cmp): Ditto.
20514 (loongarch_expand_vec_cond_expr): Ditto.
20515 (loongarch_expand_vec_cond_mask_expr): Ditto.
20516 (loongarch_expand_vec_cmp): Ditto.
20517 (loongarch_case_values_threshold): Ditto.
20518 (loongarch_build_const_vector): Ditto.
20519 (loongarch_build_signbit_mask): Ditto.
20520 (loongarch_builtin_support_vector_misalignment): Ditto.
20521 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
20522 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
20523 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
20524 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
20525 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
20526 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
20527 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
20528 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
20529 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
20530 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
20531 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
20532 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
20533 (UNITS_PER_LSX_REG): Ditto.
20534 (BITS_PER_LSX_REG): Ditto.
20535 (BIGGEST_ALIGNMENT): Ditto.
20536 (LSX_REG_FIRST): Ditto.
20537 (LSX_REG_LAST): Ditto.
20538 (LSX_REG_NUM): Ditto.
20539 (LSX_REG_P): Ditto.
20540 (LSX_REG_RTX_P): Ditto.
20541 (IMM13_OPERAND): Ditto.
20542 (LSX_SUPPORTED_MODE_P): Ditto.
20543 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
20544 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
20545 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
20552 * config/loongarch/loongarch.opt: Ditto.
20553 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
20554 (const_uimm3_operand): Ditto.
20555 (const_8_to_11_operand): Ditto.
20556 (const_12_to_15_operand): Ditto.
20557 (const_uimm4_operand): Ditto.
20558 (const_uimm6_operand): Ditto.
20559 (const_uimm7_operand): Ditto.
20560 (const_uimm8_operand): Ditto.
20561 (const_imm5_operand): Ditto.
20562 (const_imm10_operand): Ditto.
20563 (const_imm13_operand): Ditto.
20564 (reg_imm10_operand): Ditto.
20565 (aq8b_operand): Ditto.
20566 (aq8h_operand): Ditto.
20567 (aq8w_operand): Ditto.
20568 (aq8d_operand): Ditto.
20569 (aq10b_operand): Ditto.
20570 (aq10h_operand): Ditto.
20571 (aq10w_operand): Ditto.
20572 (aq10d_operand): Ditto.
20573 (aq12b_operand): Ditto.
20574 (aq12h_operand): Ditto.
20575 (aq12w_operand): Ditto.
20576 (aq12d_operand): Ditto.
20577 (const_m1_operand): Ditto.
20578 (reg_or_m1_operand): Ditto.
20579 (const_exp_2_operand): Ditto.
20580 (const_exp_4_operand): Ditto.
20581 (const_exp_8_operand): Ditto.
20582 (const_exp_16_operand): Ditto.
20583 (const_exp_32_operand): Ditto.
20584 (const_0_or_1_operand): Ditto.
20585 (const_0_to_3_operand): Ditto.
20586 (const_0_to_7_operand): Ditto.
20587 (const_2_or_3_operand): Ditto.
20588 (const_4_to_7_operand): Ditto.
20589 (const_8_to_15_operand): Ditto.
20590 (const_16_to_31_operand): Ditto.
20591 (qi_mask_operand): Ditto.
20592 (hi_mask_operand): Ditto.
20593 (si_mask_operand): Ditto.
20594 (d_operand): Ditto.
20595 (db4_operand): Ditto.
20596 (db7_operand): Ditto.
20597 (db8_operand): Ditto.
20598 (ib3_operand): Ditto.
20599 (sb4_operand): Ditto.
20600 (sb5_operand): Ditto.
20601 (sb8_operand): Ditto.
20602 (sd8_operand): Ditto.
20603 (ub4_operand): Ditto.
20604 (ub8_operand): Ditto.
20605 (uh4_operand): Ditto.
20606 (uw4_operand): Ditto.
20607 (uw5_operand): Ditto.
20608 (uw6_operand): Ditto.
20609 (uw8_operand): Ditto.
20610 (addiur2_operand): Ditto.
20611 (addiusp_operand): Ditto.
20612 (andi16_operand): Ditto.
20613 (movep_src_register): Ditto.
20614 (movep_src_operand): Ditto.
20615 (fcc_reload_operand): Ditto.
20616 (muldiv_target_operand): Ditto.
20617 (const_vector_same_val_operand): Ditto.
20618 (const_vector_same_simm5_operand): Ditto.
20619 (const_vector_same_uimm5_operand): Ditto.
20620 (const_vector_same_ximm5_operand): Ditto.
20621 (const_vector_same_uimm6_operand): Ditto.
20622 (par_const_vector_shf_set_operand): Ditto.
20623 (reg_or_vector_same_val_operand): Ditto.
20624 (reg_or_vector_same_simm5_operand): Ditto.
20625 (reg_or_vector_same_uimm5_operand): Ditto.
20626 (reg_or_vector_same_ximm5_operand): Ditto.
20627 (reg_or_vector_same_uimm6_operand): Ditto.
20628 * doc/md.texi: Ditto.
20629 * config/loongarch/lsx.md: New file.
20631 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20633 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
20634 (get_all_predecessors): New function.
20635 (get_all_successors): Ditto.
20636 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
20637 (get_all_successors): Ditto.
20638 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
20639 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
20641 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
20643 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
20644 (split_addsi): Likewise.
20645 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
20646 'N', 'x', and 'J' code letters.
20647 (arc_output_addsi): Make it static.
20648 (split_addsi): Remove it.
20649 * config/arc/arc.h (UNSIGNED_INT*): New defines.
20650 (SINNED_INT*): Likewise.
20651 * config/arc/arc.md (type): Add add, sub, bxor types.
20652 (tst_movb): Change code letter from 's' to 'x'.
20653 (andsi3_i): Likewise.
20654 (addsi3_mixed): Refurbish the pattern.
20655 (call_i): Change code letter from 'S' to 'J'.
20656 * config/arc/arc700.md: Add newly introduced types.
20657 * config/arc/arcHS.md: Likewsie.
20658 * config/arc/arcHS4x.md: Likewise.
20659 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
20660 (CM4): Update description.
20661 (CP4, C6u, C6n, CIs, C4p): New constraint.
20663 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
20665 * common/config/arc/arc-common.cc (arc_option_optimization_table):
20666 Remove mbbit_peephole.
20667 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
20668 (store_direct): Likewise.
20669 (BBIT peephole2): Likewise.
20670 * config/arc/arc.opt (mbbit-peephole): Ignore option.
20671 * doc/invoke.texi (mbbit-peephole): Update document.
20673 2023-09-05 Jakub Jelinek <jakub@redhat.com>
20675 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
20676 avreage -> average.
20678 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20680 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
20681 options passed from driver to gnat1 as explicit for multilib.
20683 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20685 * config.gcc: add loongarch*-elf target.
20686 * config/loongarch/elf.h: New file.
20687 Link against newlib by default.
20689 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20691 * config.gcc: use -mstrict-align for building libraries
20692 if --with-strict-align-lib is given.
20693 * doc/install.texi: likewise.
20695 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20697 * config/loongarch/loongarch-c.cc: Export macros
20698 "__loongarch_{arch,tune}" in the preprocessor.
20700 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
20702 * config.gcc: Make --with-abi= obsolete, decide the default ABI
20703 with target triplet. Allow specifying multilib library build
20704 options with --with-multilib-list and --with-multilib-default.
20705 * config/loongarch/t-linux: Likewise.
20706 * config/loongarch/genopts/loongarch-strings: Likewise.
20707 * config/loongarch/loongarch-str.h: Likewise.
20708 * doc/install.texi: Likewise.
20709 * config/loongarch/genopts/loongarch.opt.in: Introduce
20710 -m[no-]l[a]sx options. Only process -m*-float and
20711 -m[no-]l[a]sx in the GCC driver.
20712 * config/loongarch/loongarch.opt: Likewise.
20713 * config/loongarch/la464.md: Likewise.
20714 * config/loongarch/loongarch-c.cc: Likewise.
20715 * config/loongarch/loongarch-cpu.cc: Likewise.
20716 * config/loongarch/loongarch-cpu.h: Likewise.
20717 * config/loongarch/loongarch-def.c: Likewise.
20718 * config/loongarch/loongarch-def.h: Likewise.
20719 * config/loongarch/loongarch-driver.cc: Likewise.
20720 * config/loongarch/loongarch-driver.h: Likewise.
20721 * config/loongarch/loongarch-opts.cc: Likewise.
20722 * config/loongarch/loongarch-opts.h: Likewise.
20723 * config/loongarch/loongarch.cc: Likewise.
20724 * doc/invoke.texi: Likewise.
20726 2023-09-05 liuhongt <hongtao.liu@intel.com>
20728 * config/i386/sse.md: (V8BFH_128): Renamed to ..
20729 (VHFBF_128): .. this.
20730 (V16BFH_256): Renamed to ..
20731 (VHFBF_256): .. this.
20732 (avx512f_mov<mode>): Extend to V_128.
20733 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
20734 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
20735 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
20736 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
20737 * config/i386/i386-expand.cc (expand_vec_perm_blend):
20738 Canonicalize vec_merge.
20740 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20742 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
20743 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
20744 (autovectorize_vector_modes): Ditto.
20745 (vectorize_related_mode): Ditto.
20747 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20749 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
20750 all 32b Darwin PowerPC cases.
20752 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20754 * config/darwin-sections.def (static_init_section): Add the
20755 __TEXT,__StaticInit section.
20756 * config/darwin.cc (darwin_function_section): Use the static init
20757 section for global initializers, to match other platform toolchains.
20759 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20761 * config/darwin-sections.def (darwin_exception_section): Move to
20762 the __TEXT segment.
20763 * config/darwin.cc (darwin_emit_except_table_label): Align before
20764 the exception table label.
20765 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
20766 relative 4byte relocs.
20768 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
20770 * config/darwin.cc (dump_machopic_symref_flags): New.
20771 (debug_machopic_symref_flags): New.
20773 2023-09-04 Pan Li <pan2.li@intel.com>
20775 * config/riscv/riscv-vector-builtins-types.def
20776 (vfloat16mf4_t): Add FP16 intrinsic def.
20777 (vfloat16mf2_t): Ditto.
20778 (vfloat16m1_t): Ditto.
20779 (vfloat16m2_t): Ditto.
20780 (vfloat16m4_t): Ditto.
20781 (vfloat16m8_t): Ditto.
20783 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
20785 PR tree-optimization/108757
20786 * match.pd ((X - N * M) / N): New pattern.
20787 ((X + N * M) / N): New pattern.
20788 ((X + C) div_rshift N): New pattern.
20790 2023-09-04 Guo Jie <guojie@loongson.cn>
20792 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
20793 movsf_hardfloat and movdf_hardfloat.
20795 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
20797 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
20798 In unsigned QImode test, check for sign extended subreg and/or
20799 constant operands, and do a sign extension in that case.
20800 * config/loongarch/loongarch.md (TARGET_64BIT): Define
20801 template cbranchqi4.
20803 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
20805 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
20806 from memory into floating-point registers.
20808 2023-09-03 Pan Li <pan2.li@intel.com>
20810 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
20812 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
20814 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
20816 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
20817 pointer before overwriting it.
20819 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
20821 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
20822 Associate the __float128 type to float128_type_node so that it can
20823 be recognized by the compiler.
20824 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
20825 Add the flag "FLOAT128_TYPE" to gcc and associate a function
20826 with the suffix "q" to "f128".
20827 * doc/extend.texi:Added support for 128-bit floating-point functions on
20828 the LoongArch architecture.
20830 2023-09-01 Jakub Jelinek <jakub@redhat.com>
20833 * common.opt (fabi-version=): Document version 19.
20834 * doc/invoke.texi (-fabi-version=): Likewise.
20836 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20838 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
20839 New combine pattern.
20840 (*cond_<float_cvt><vconvert><mode>): Ditto.
20841 (*cond_<optab><vnconvert><mode>): Ditto.
20842 (*cond_<float_cvt><vnconvert><mode>): Ditto.
20843 (*cond_<optab><mode><vnconvert>): Ditto.
20844 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
20845 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
20846 (<float_cvt><vconvert><mode>2): Adjust.
20847 (<optab><vnconvert><mode>2): Adjust.
20848 (<float_cvt><vnconvert><mode>2): Adjust.
20849 (<optab><mode><vnconvert>2): Adjust.
20850 (<float_cvt><mode><vnconvert>2): Adjust.
20851 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
20853 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20855 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
20856 New combine pattern.
20857 (*cond_trunc<mode><v_double_trunc>): Ditto.
20858 * config/riscv/autovec.md: Adjust.
20859 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
20861 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20863 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
20864 New combine pattern.
20865 (*cond_<optab><v_quad_trunc><mode>): Ditto.
20866 (*cond_<optab><v_oct_trunc><mode>): Ditto.
20867 (*cond_trunc<mode><v_double_trunc>): Ditto.
20868 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
20869 (<optab><v_oct_trunc><mode>2): Ditto.
20871 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
20873 * config/riscv/autovec.md: Adjust.
20874 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
20875 (expand_cond_len_binop): Ditto.
20876 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
20877 (expand_cond_len_op): Ditto.
20878 (expand_cond_len_unop): Ditto.
20879 (expand_cond_len_binop): Ditto.
20880 (expand_cond_len_ternop): Ditto.
20882 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20884 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
20885 VECT_COMPARE_COSTS by default.
20887 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
20889 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
20891 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20893 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
20895 * config/riscv/riscv.opt: Add dynamic compile option.
20897 2023-09-01 Pan Li <pan2.li@intel.com>
20899 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
20900 vls floating-point autovec.
20901 * config/riscv/vector-iterators.md: New iterator for
20902 floating-point V and VLS.
20903 * config/riscv/vector.md: Add VLS to floating-point binop.
20905 2023-09-01 Andrew Pinski <apinski@marvell.com>
20907 PR tree-optimization/19832
20908 * match.pd: Add pattern to optimize
20909 `(a != b) ? a OP b : c`.
20911 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
20912 Guo Jie <guojie@loongson.cn>
20915 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
20916 frame_pointer_needed to determine whether to use the $fp register.
20918 2023-08-31 Andrew Pinski <apinski@marvell.com>
20920 PR tree-optimization/110915
20921 * match.pd (min_value, max_value): Extend to vector constants.
20923 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
20925 * config.in: Regenerate.
20926 * config/darwin-c.cc: Change spelling to macOS.
20927 * config/darwin-driver.cc: Likewise.
20928 * config/darwin.h: Likewise.
20929 * configure.ac: Likewise.
20930 * doc/contrib.texi: Likewise.
20931 * doc/extend.texi: Likewise.
20932 * doc/invoke.texi: Likewise.
20933 * doc/plugins.texi: Likewise.
20934 * doc/tm.texi: Regenerate.
20935 * doc/tm.texi.in: Change spelling to macOS.
20936 * plugin.cc: Likewise.
20938 2023-08-31 Pan Li <pan2.li@intel.com>
20940 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
20941 * config/riscv/autovec.md: Ditto.
20943 2023-08-31 Pan Li <pan2.li@intel.com>
20945 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
20946 * config/riscv/autovec.md: Ditto.
20948 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
20950 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
20951 rather than a call. List each possible destination register
20952 in the call pattern.
20954 2023-08-31 Pan Li <pan2.li@intel.com>
20956 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
20957 * config/riscv/autovec.md: Ditto.
20959 2023-08-31 Pan Li <pan2.li@intel.com>
20960 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20962 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
20963 * config/riscv/autovec.md: Ditto.
20964 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
20966 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
20968 * config/riscv/autovec.md (shifts): Use
20969 vector_scalar_shift_operand.
20970 * config/riscv/predicates.md (vector_scalar_shift_operand): New
20973 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20975 * config.gcc: Add vector cost model framework for RVV.
20976 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
20977 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
20978 * config/riscv/t-riscv: Ditto.
20979 * config/riscv/riscv-vector-costs.cc: New file.
20980 * config/riscv/riscv-vector-costs.h: New file.
20982 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
20985 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
20986 AltiVec address operands.
20987 (define_insn_and_split movxo): Likewise.
20988 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
20989 redundant mode size check.
20991 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
20993 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
20994 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
20995 Change to default policy.
20996 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
20997 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
20998 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
21000 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
21002 * config/riscv/autovec-opt.md: Adjust.
21003 * config/riscv/autovec-vls.md: Ditto.
21004 * config/riscv/autovec.md: Ditto.
21005 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
21006 (enum insn_flags): Add insn flags.
21007 (emit_vlmax_insn): Adjust.
21008 (emit_vlmax_fp_insn): Delete.
21009 (emit_vlmax_ternary_insn): Delete.
21010 (emit_vlmax_fp_ternary_insn): Delete.
21011 (emit_nonvlmax_insn): Adjust.
21012 (emit_vlmax_slide_insn): Delete.
21013 (emit_nonvlmax_slide_tu_insn): Delete.
21014 (emit_vlmax_merge_insn): Delete.
21015 (emit_vlmax_cmp_insn): Delete.
21016 (emit_vlmax_cmp_mu_insn): Delete.
21017 (emit_vlmax_masked_mu_insn): Delete.
21018 (emit_scalar_move_insn): Delete.
21019 (emit_nonvlmax_integer_move_insn): Delete.
21020 (emit_vlmax_insn_lra): Add.
21021 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
21022 (emit_vlmax_insn): Adjust.
21023 (emit_nonvlmax_insn): Adjust.
21024 (emit_vlmax_insn_lra): Add.
21025 (emit_vlmax_fp_insn): Delete.
21026 (emit_vlmax_ternary_insn): Delete.
21027 (emit_vlmax_fp_ternary_insn): Delete.
21028 (emit_vlmax_slide_insn): Delete.
21029 (emit_nonvlmax_slide_tu_insn): Delete.
21030 (emit_nonvlmax_slide_insn): Delete.
21031 (emit_vlmax_merge_insn): Delete.
21032 (emit_vlmax_cmp_insn): Delete.
21033 (emit_vlmax_cmp_mu_insn): Delete.
21034 (emit_vlmax_masked_insn): Delete.
21035 (emit_nonvlmax_masked_insn): Delete.
21036 (emit_vlmax_masked_store_insn): Delete.
21037 (emit_nonvlmax_masked_store_insn): Delete.
21038 (emit_vlmax_masked_mu_insn): Delete.
21039 (emit_vlmax_masked_fp_mu_insn): Delete.
21040 (emit_nonvlmax_tu_insn): Delete.
21041 (emit_nonvlmax_fp_tu_insn): Delete.
21042 (emit_nonvlmax_tumu_insn): Delete.
21043 (emit_nonvlmax_fp_tumu_insn): Delete.
21044 (emit_scalar_move_insn): Delete.
21045 (emit_cpop_insn): Delete.
21046 (emit_vlmax_integer_move_insn): Delete.
21047 (emit_nonvlmax_integer_move_insn): Delete.
21048 (emit_vlmax_gather_insn): Delete.
21049 (emit_vlmax_masked_gather_mu_insn): Delete.
21050 (emit_vlmax_compress_insn): Delete.
21051 (emit_nonvlmax_compress_insn): Delete.
21052 (emit_vlmax_reduction_insn): Delete.
21053 (emit_vlmax_fp_reduction_insn): Delete.
21054 (emit_nonvlmax_fp_reduction_insn): Delete.
21055 (expand_vec_series): Adjust.
21056 (expand_const_vector): Adjust.
21057 (legitimize_move): Adjust.
21058 (sew64_scalar_helper): Adjust.
21059 (expand_tuple_move): Adjust.
21060 (expand_vector_init_insert_elems): Adjust.
21061 (expand_vector_init_merge_repeating_sequence): Adjust.
21062 (expand_vec_cmp): Adjust.
21063 (expand_vec_cmp_float): Adjust.
21064 (expand_vec_perm): Adjust.
21065 (shuffle_merge_patterns): Adjust.
21066 (shuffle_compress_patterns): Adjust.
21067 (shuffle_decompress_patterns): Adjust.
21068 (expand_load_store): Adjust.
21069 (expand_cond_len_op): Adjust.
21070 (expand_cond_len_unop): Adjust.
21071 (expand_cond_len_binop): Adjust.
21072 (expand_gather_scatter): Adjust.
21073 (expand_cond_len_ternop): Adjust.
21074 (expand_reduction): Adjust.
21075 (expand_lanes_load_store): Adjust.
21076 (expand_fold_extract_last): Adjust.
21077 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
21078 * config/riscv/vector.md: Adjust.
21080 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
21083 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
21084 load/store with length only on 64-bit Power10.
21086 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
21088 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
21089 SWAP option is enabled.
21090 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
21092 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
21094 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
21095 Use common insn for signed and unsigned front-end definitions.
21096 * config/arm/arm_mve_builtins.def
21097 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
21098 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
21099 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
21102 (mve_rot): Likewise.
21104 (VxCADDQ_M): Likewise.
21105 * config/arm/unspecs.md (unspec): Likewise.
21106 * config/arm/mve.md: Fix minor typo.
21108 2023-08-31 liuhongt <hongtao.liu@intel.com>
21110 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
21111 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
21112 (VF_AVX512HFBF16): Renamed to VHFBF.
21113 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
21114 (VF_AVX512FP16): Removed.
21115 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
21116 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
21117 (rsqrt<mode>2): Ditto.
21118 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
21119 (vcond<mode><code>): Ditto.
21120 (vcond<sseintvecmodelower><mode>): Ditto.
21121 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
21122 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
21123 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
21124 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
21125 (cmla<conj_op><mode>4): Ditto.
21126 (fma_<mode>_fadd_fmul): Ditto.
21127 (fma_<mode>_fadd_fcmul): Ditto.
21128 (fma_<complexopname>_<mode>_fma_zero): Ditto.
21129 (fma_<mode>_fmaddc_bcst): Ditto.
21130 (fma_<mode>_fcmaddc_bcst): Ditto.
21131 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
21132 (cmul<conj_op><mode>3): Ditto.
21133 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
21135 (vec_unpacks_lo_<mode>): Ditto.
21136 (vec_unpacks_hi_<mode>): Ditto.
21137 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
21138 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
21139 (*vec_extract<mode>_0): Ditto.
21140 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
21142 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
21145 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
21147 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
21149 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
21150 (operator_minus::overflow_free_p): New declare.
21151 (operator_mult::overflow_free_p): New declare.
21152 * range-op.cc (range_op_handler::overflow_free_p): New function.
21153 (range_operator::overflow_free_p): New default function.
21154 (operator_plus::overflow_free_p): New function.
21155 (operator_minus::overflow_free_p): New function.
21156 (operator_mult::overflow_free_p): New function.
21157 * range-op.h (range_op_handler::overflow_free_p): New declare.
21158 (range_operator::overflow_free_p): New declare.
21159 * value-range.cc (irange::nonnegative_p): New function.
21160 (irange::nonpositive_p): New function.
21161 * value-range.h (irange::nonnegative_p): New declare.
21162 (irange::nonpositive_p): New declare.
21164 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
21167 * config/pru/predicates.md (const_0_operand): New predicate.
21168 (pru_cstore_comparison_operator): Ditto.
21169 * config/pru/pru.md (cstore<mode>4): New pattern.
21170 (cstoredi4): Ditto.
21172 2023-08-30 Richard Biener <rguenther@suse.de>
21174 PR tree-optimization/111228
21175 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
21176 New simplifications.
21178 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21180 * config/riscv/autovec.md (movmisalign<mode>): Delete.
21182 2023-08-30 Die Li <lidie@eswincomputing.com>
21183 Fei Gao <gaofei@eswincomputing.com>
21185 * config/riscv/peephole.md: New pattern.
21186 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
21187 (zcmp_mv_sreg_operand): New predicate.
21188 * config/riscv/riscv.md: New predicate.
21189 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
21190 (*mvsa01<X:mode>): New pattern.
21192 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
21194 * config/riscv/riscv.cc
21195 (riscv_zcmp_can_use_popretz): true if popretz can be used
21196 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
21197 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
21198 * config/riscv/riscv.md: define A0_REGNUM
21199 * config/riscv/zc.md
21200 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
21201 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
21202 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
21203 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
21204 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
21205 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
21206 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
21207 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
21208 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
21209 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
21210 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
21211 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
21213 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
21215 * config/riscv/iterators.md
21216 (slot0_offset): slot 0 offset in stack GPRs area in bytes
21217 (slot1_offset): slot 1 offset in stack GPRs area in bytes
21218 (slot2_offset): likewise
21219 (slot3_offset): likewise
21220 (slot4_offset): likewise
21221 (slot5_offset): likewise
21222 (slot6_offset): likewise
21223 (slot7_offset): likewise
21224 (slot8_offset): likewise
21225 (slot9_offset): likewise
21226 (slot10_offset): likewise
21227 (slot11_offset): likewise
21228 (slot12_offset): likewise
21229 * config/riscv/predicates.md
21230 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
21231 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
21232 (stack_push_up_to_s1_operand): likewise
21233 (stack_push_up_to_s2_operand): likewise
21234 (stack_push_up_to_s3_operand): likewise
21235 (stack_push_up_to_s4_operand): likewise
21236 (stack_push_up_to_s5_operand): likewise
21237 (stack_push_up_to_s6_operand): likewise
21238 (stack_push_up_to_s7_operand): likewise
21239 (stack_push_up_to_s8_operand): likewise
21240 (stack_push_up_to_s9_operand): likewise
21241 (stack_push_up_to_s11_operand): likewise
21242 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
21243 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
21244 (stack_pop_up_to_s1_operand): likewise
21245 (stack_pop_up_to_s2_operand): likewise
21246 (stack_pop_up_to_s3_operand): likewise
21247 (stack_pop_up_to_s4_operand): likewise
21248 (stack_pop_up_to_s5_operand): likewise
21249 (stack_pop_up_to_s6_operand): likewise
21250 (stack_pop_up_to_s7_operand): likewise
21251 (stack_pop_up_to_s8_operand): likewise
21252 (stack_pop_up_to_s9_operand): likewise
21253 (stack_pop_up_to_s11_operand): likewise
21254 * config/riscv/riscv-protos.h
21255 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
21256 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
21257 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
21258 (riscv_use_multi_push): true if multi push is used
21259 (riscv_multi_push_sregs_count): num of sregs in multi-push
21260 (riscv_multi_push_regs_count): num of regs in multi-push
21261 (riscv_16bytes_align): align to 16 bytes
21262 (riscv_stack_align): moved to a better place
21263 (riscv_save_libcall_count): no functional change
21264 (riscv_compute_frame_info): add zcmp frame info
21265 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
21266 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
21267 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
21268 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
21269 (riscv_expand_prologue): allocate stack by cm.push
21270 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
21271 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
21272 (zcmp_base_adj): calculate stack adjustment base size
21273 (zcmp_additional_adj): calculate stack adjustment additional size
21274 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
21275 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
21276 (S0_MASK): likewise
21277 (S1_MASK): likewise
21278 (S2_MASK): likewise
21279 (S3_MASK): likewise
21280 (S4_MASK): likewise
21281 (S5_MASK): likewise
21282 (S6_MASK): likewise
21283 (S7_MASK): likewise
21284 (S8_MASK): likewise
21285 (S9_MASK): likewise
21286 (S10_MASK): likewise
21287 (S11_MASK): likewise
21288 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
21289 (ZCMP_MAX_SPIMM): max spimm value
21290 (ZCMP_SP_INC_STEP): zcmp sp increment step
21291 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
21292 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
21293 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
21294 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
21295 * config/riscv/riscv.md: include zc.md
21296 * config/riscv/zc.md: New file. machine description for zcmp
21298 2023-08-30 Jakub Jelinek <jakub@redhat.com>
21300 PR tree-optimization/110914
21301 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
21302 adjust_last_stmt unless len is known constant.
21304 2023-08-30 Jakub Jelinek <jakub@redhat.com>
21306 PR tree-optimization/111015
21307 * gimple-ssa-store-merging.cc
21308 (imm_store_chain_info::output_merged_store): Use wi::mask and
21309 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
21310 build_int_cst to build BIT_AND_EXPR mask.
21312 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21314 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
21315 (call_may_clobber_ref_p_1): Ditto.
21316 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
21317 (get_alias_ptr_type_for_ptr_address): Ditto.
21319 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21321 * config/riscv/riscv-vsetvl.cc
21322 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
21324 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21326 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
21327 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
21330 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
21332 * config/riscv/zicond.md: New splitters to rewrite single bit
21333 sign extension as the condition to a czero in the desired form.
21335 2023-08-29 David Malcolm <dmalcolm@redhat.com>
21338 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
21340 2023-08-29 David Malcolm <dmalcolm@redhat.com>
21343 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
21345 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
21347 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
21348 zvfh can generate zfa extended instruction fli.h, just like zfh.
21350 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
21351 Vineet Gupta <vineetg@rivosinc.com>
21353 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
21354 __riscv_unaligned_avoid with value 1 or
21355 __riscv_unaligned_slow with value 1 or
21356 __riscv_unaligned_fast with value 1
21357 * config/riscv/riscv.cc (riscv_option_override): Define
21358 riscv_user_wants_strict_align. Set
21359 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
21360 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
21362 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
21364 * config/riscv/autovec-vls.md: Update types
21365 * config/riscv/riscv.md: Add vector placeholder type
21366 * config/riscv/vector.md: Update types
21368 2023-08-29 Carl Love <cel@us.ibm.com>
21370 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
21371 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
21372 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
21373 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
21374 New buit-in definitions.
21375 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
21376 overloaded definition.
21377 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
21379 2023-08-29 Pan Li <pan2.li@intel.com>
21380 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21382 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
21383 (riscv_legitimize_const_move): Handle ref plus const poly.
21385 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21387 * common/config/riscv/riscv-common.cc
21388 (riscv_implied_info): Add implications from unprivileged extensions.
21389 (riscv_ext_version_table): Add stub support for all unprivileged
21390 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
21392 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21394 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
21395 Add stub support for all vendor extensions supported by Binutils.
21397 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
21399 * common/config/riscv/riscv-common.cc
21400 (riscv_implied_info): Add implications from privileged extensions.
21401 (riscv_ext_version_table): Add stub support for all privileged
21402 extensions supported by Binutils.
21404 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
21406 * config/riscv/autovec.md: Adjust
21407 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
21408 (get_vlmax_rtx): Exported.
21409 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
21410 (emit_vlmax_masked_gather_mu_insn): Adjust.
21411 (get_vlmax_rtx): New func.
21412 (expand_load_store): Adjust.
21413 (expand_cond_len_unop): Call expand_cond_len_op.
21414 (expand_cond_len_op): New subroutine.
21415 (expand_cond_len_binop): Call expand_cond_len_op.
21416 (expand_cond_len_ternop): Call expand_cond_len_op.
21417 (expand_lanes_load_store): Adjust.
21419 2023-08-29 Jakub Jelinek <jakub@redhat.com>
21421 PR middle-end/79173
21422 PR middle-end/111209
21423 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
21424 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
21425 carry-out on higher limb. Don't match it though if it could be
21426 matched later on 4 argument addition/subtraction.
21428 2023-08-29 Andrew Pinski <apinski@marvell.com>
21430 PR tree-optimization/111147
21431 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
21432 instead of matching bit_not.
21434 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
21436 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
21439 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21441 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
21442 (pass_vsetvl::compute_local_properties): Fix bug.
21443 (pass_vsetvl::commit_vsetvls): Ditto.
21444 * config/riscv/riscv-vsetvl.h: New function.
21446 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
21449 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
21451 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
21452 force_reg mem target operand.
21453 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
21454 (*pred_mov<mode>): Remove imm -> reg pattern.
21455 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
21457 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
21459 * common/config/loongarch/loongarch-common.cc:
21460 Enable '-free' on O2 and above.
21461 * doc/invoke.texi: Modify the description information
21462 of the '-free' compilation option and add the LoongArch
21465 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
21467 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
21469 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
21471 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
21472 Implement the 'Zihintpause' extension, version 2.0.
21473 (riscv_ext_flag_table) Add 'Zihintpause' handling.
21474 * config/riscv/riscv-builtins.cc: Remove availability predicate
21475 "always" and add "hint_pause".
21476 (riscv_builtins) : Add "pause" extension.
21477 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
21478 * config/riscv/riscv.md (riscv_pause): Adjust output based on
21479 TARGET_ZIHINTPAUSE.
21481 2023-08-28 Andrew Pinski <apinski@marvell.com>
21483 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
21484 instead of specifically checking for ~X.
21486 2023-08-28 Andrew Pinski <apinski@marvell.com>
21488 PR tree-optimization/111146
21489 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
21492 2023-08-28 Andrew Pinski <apinski@marvell.com>
21494 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
21495 when resimplify returns true.
21496 (match_simplify_replacement): Print only if accepted the match-and-simplify
21497 result rather than the full sequence.
21499 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21501 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
21503 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
21505 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21507 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
21509 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21511 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
21512 (vmulltq_poly): New.
21513 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
21514 (vmulltq_poly): New.
21515 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
21516 (vmulltq_poly): New.
21517 * config/arm/arm_mve.h (vmulltq_poly): Remove.
21518 (vmullbq_poly): Remove.
21519 (vmullbq_poly_m): Remove.
21520 (vmulltq_poly_m): Remove.
21521 (vmullbq_poly_x): Remove.
21522 (vmulltq_poly_x): Remove.
21523 (vmulltq_poly_p8): Remove.
21524 (vmullbq_poly_p8): Remove.
21525 (vmulltq_poly_p16): Remove.
21526 (vmullbq_poly_p16): Remove.
21527 (vmullbq_poly_m_p8): Remove.
21528 (vmullbq_poly_m_p16): Remove.
21529 (vmulltq_poly_m_p8): Remove.
21530 (vmulltq_poly_m_p16): Remove.
21531 (vmullbq_poly_x_p8): Remove.
21532 (vmullbq_poly_x_p16): Remove.
21533 (vmulltq_poly_x_p8): Remove.
21534 (vmulltq_poly_x_p16): Remove.
21535 (__arm_vmulltq_poly_p8): Remove.
21536 (__arm_vmullbq_poly_p8): Remove.
21537 (__arm_vmulltq_poly_p16): Remove.
21538 (__arm_vmullbq_poly_p16): Remove.
21539 (__arm_vmullbq_poly_m_p8): Remove.
21540 (__arm_vmullbq_poly_m_p16): Remove.
21541 (__arm_vmulltq_poly_m_p8): Remove.
21542 (__arm_vmulltq_poly_m_p16): Remove.
21543 (__arm_vmullbq_poly_x_p8): Remove.
21544 (__arm_vmullbq_poly_x_p16): Remove.
21545 (__arm_vmulltq_poly_x_p8): Remove.
21546 (__arm_vmulltq_poly_x_p16): Remove.
21547 (__arm_vmulltq_poly): Remove.
21548 (__arm_vmullbq_poly): Remove.
21549 (__arm_vmullbq_poly_m): Remove.
21550 (__arm_vmulltq_poly_m): Remove.
21551 (__arm_vmullbq_poly_x): Remove.
21552 (__arm_vmulltq_poly_x): Remove.
21554 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21556 * config/arm/arm-mve-builtins-functions.h (class
21557 unspec_mve_function_exact_insn_vmull_poly): New.
21559 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21561 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
21562 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
21564 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21566 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
21567 support for 'U' and 'p' format specifiers.
21569 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21571 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
21573 (TYPES_poly_8_16): New.
21575 * config/arm/arm-mve-builtins.def (p8): New type suffix.
21577 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
21579 (struct type_suffix_info): Add poly_p field.
21581 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21583 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
21585 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
21587 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
21589 * config/arm/arm_mve.h (vmulltq_int): Remove.
21590 (vmullbq_int): Remove.
21591 (vmullbq_int_m): Remove.
21592 (vmulltq_int_m): Remove.
21593 (vmullbq_int_x): Remove.
21594 (vmulltq_int_x): Remove.
21595 (vmulltq_int_u8): Remove.
21596 (vmullbq_int_u8): Remove.
21597 (vmulltq_int_s8): Remove.
21598 (vmullbq_int_s8): Remove.
21599 (vmulltq_int_u16): Remove.
21600 (vmullbq_int_u16): Remove.
21601 (vmulltq_int_s16): Remove.
21602 (vmullbq_int_s16): Remove.
21603 (vmulltq_int_u32): Remove.
21604 (vmullbq_int_u32): Remove.
21605 (vmulltq_int_s32): Remove.
21606 (vmullbq_int_s32): Remove.
21607 (vmullbq_int_m_s8): Remove.
21608 (vmullbq_int_m_s32): Remove.
21609 (vmullbq_int_m_s16): Remove.
21610 (vmullbq_int_m_u8): Remove.
21611 (vmullbq_int_m_u32): Remove.
21612 (vmullbq_int_m_u16): Remove.
21613 (vmulltq_int_m_s8): Remove.
21614 (vmulltq_int_m_s32): Remove.
21615 (vmulltq_int_m_s16): Remove.
21616 (vmulltq_int_m_u8): Remove.
21617 (vmulltq_int_m_u32): Remove.
21618 (vmulltq_int_m_u16): Remove.
21619 (vmullbq_int_x_s8): Remove.
21620 (vmullbq_int_x_s16): Remove.
21621 (vmullbq_int_x_s32): Remove.
21622 (vmullbq_int_x_u8): Remove.
21623 (vmullbq_int_x_u16): Remove.
21624 (vmullbq_int_x_u32): Remove.
21625 (vmulltq_int_x_s8): Remove.
21626 (vmulltq_int_x_s16): Remove.
21627 (vmulltq_int_x_s32): Remove.
21628 (vmulltq_int_x_u8): Remove.
21629 (vmulltq_int_x_u16): Remove.
21630 (vmulltq_int_x_u32): Remove.
21631 (__arm_vmulltq_int_u8): Remove.
21632 (__arm_vmullbq_int_u8): Remove.
21633 (__arm_vmulltq_int_s8): Remove.
21634 (__arm_vmullbq_int_s8): Remove.
21635 (__arm_vmulltq_int_u16): Remove.
21636 (__arm_vmullbq_int_u16): Remove.
21637 (__arm_vmulltq_int_s16): Remove.
21638 (__arm_vmullbq_int_s16): Remove.
21639 (__arm_vmulltq_int_u32): Remove.
21640 (__arm_vmullbq_int_u32): Remove.
21641 (__arm_vmulltq_int_s32): Remove.
21642 (__arm_vmullbq_int_s32): Remove.
21643 (__arm_vmullbq_int_m_s8): Remove.
21644 (__arm_vmullbq_int_m_s32): Remove.
21645 (__arm_vmullbq_int_m_s16): Remove.
21646 (__arm_vmullbq_int_m_u8): Remove.
21647 (__arm_vmullbq_int_m_u32): Remove.
21648 (__arm_vmullbq_int_m_u16): Remove.
21649 (__arm_vmulltq_int_m_s8): Remove.
21650 (__arm_vmulltq_int_m_s32): Remove.
21651 (__arm_vmulltq_int_m_s16): Remove.
21652 (__arm_vmulltq_int_m_u8): Remove.
21653 (__arm_vmulltq_int_m_u32): Remove.
21654 (__arm_vmulltq_int_m_u16): Remove.
21655 (__arm_vmullbq_int_x_s8): Remove.
21656 (__arm_vmullbq_int_x_s16): Remove.
21657 (__arm_vmullbq_int_x_s32): Remove.
21658 (__arm_vmullbq_int_x_u8): Remove.
21659 (__arm_vmullbq_int_x_u16): Remove.
21660 (__arm_vmullbq_int_x_u32): Remove.
21661 (__arm_vmulltq_int_x_s8): Remove.
21662 (__arm_vmulltq_int_x_s16): Remove.
21663 (__arm_vmulltq_int_x_s32): Remove.
21664 (__arm_vmulltq_int_x_u8): Remove.
21665 (__arm_vmulltq_int_x_u16): Remove.
21666 (__arm_vmulltq_int_x_u32): Remove.
21667 (__arm_vmulltq_int): Remove.
21668 (__arm_vmullbq_int): Remove.
21669 (__arm_vmullbq_int_m): Remove.
21670 (__arm_vmulltq_int_m): Remove.
21671 (__arm_vmullbq_int_x): Remove.
21672 (__arm_vmulltq_int_x): Remove.
21674 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21676 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
21677 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
21679 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21681 * config/arm/arm-mve-builtins-functions.h (class
21682 unspec_mve_function_exact_insn_vmull): New.
21684 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21686 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
21687 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
21689 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
21691 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
21692 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
21693 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
21694 (mve_vmulltq_int_<supf><mode>): Merge into ...
21695 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
21696 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
21697 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
21698 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
21699 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
21700 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
21701 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
21703 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21705 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
21708 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
21710 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
21711 (binary_acca_int64): Likewise.
21713 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
21715 * range-op-float.cc (fold_range): Handle relations.
21717 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
21719 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
21720 Optimize the function implementation.
21722 2023-08-28 liuhongt <hongtao.liu@intel.com>
21725 * config/i386/sse.md (V48_AVX2): Rename to ..
21726 (V48_128_256): .. this.
21727 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
21728 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
21729 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
21730 integral modes when TARGET_AVX2 is not available.
21731 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
21732 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
21734 (maskstore<mode><sseintvecmodelower>): Ditto.
21736 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21738 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
21740 (after_or_same_p): Ditto.
21741 (find_reg_killed_by): Delete.
21742 (has_vsetvl_killed_avl_p): Ditto.
21743 (anticipatable_occurrence_p): Refactor.
21744 (any_set_in_bb_p): Delete.
21745 (count_regno_occurrences): Ditto.
21746 (backward_propagate_worthwhile_p): Ditto.
21747 (demands_can_be_fused_p): Ditto.
21748 (earliest_pred_can_be_fused_p): New function.
21749 (vsetvl_dominated_by_p): Ditto.
21750 (vector_insn_info::parse_insn): Refactor.
21751 (vector_insn_info::merge): Refactor.
21752 (vector_insn_info::dump): Refactor.
21753 (vector_infos_manager::vector_infos_manager): Refactor.
21754 (vector_infos_manager::all_empty_predecessor_p): Delete.
21755 (vector_infos_manager::all_same_avl_p): Ditto.
21756 (vector_infos_manager::create_bitmap_vectors): Refactor.
21757 (vector_infos_manager::free_bitmap_vectors): Refactor.
21758 (vector_infos_manager::dump): Refactor.
21759 (pass_vsetvl::update_block_info): New function.
21760 (enum fusion_type): Ditto.
21761 (pass_vsetvl::get_backward_fusion_type): Delete.
21762 (pass_vsetvl::hard_empty_block_p): Ditto.
21763 (pass_vsetvl::backward_demand_fusion): Ditto.
21764 (pass_vsetvl::forward_demand_fusion): Ditto.
21765 (pass_vsetvl::demand_fusion): Ditto.
21766 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
21767 (pass_vsetvl::compute_local_properties): Ditto.
21768 (pass_vsetvl::earliest_fusion): New function.
21769 (pass_vsetvl::vsetvl_fusion): Ditto.
21770 (pass_vsetvl::commit_vsetvls): Refactor.
21771 (get_first_vsetvl_before_rvv_insns): Ditto.
21772 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
21773 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
21774 (pass_vsetvl::df_post_optimization): Refactor.
21775 (pass_vsetvl::lazy_vsetvl): Ditto.
21776 * config/riscv/riscv-vsetvl.h: Ditto.
21778 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21780 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
21781 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21782 (expand_fold_extract_last): New function.
21783 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
21784 (emit_cpop_insn): Ditto.
21785 (emit_nonvlmax_compress_insn): Ditto.
21786 (expand_fold_extract_last): Ditto.
21787 * config/riscv/vector.md: Fix vcpop.m ratio demand.
21789 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
21791 * config/riscv/sync-rvwmo.md: updated types to "multi" or
21792 "atomic" based on number of assembly lines generated
21793 * config/riscv/sync-ztso.md: likewise
21794 * config/riscv/sync.md: likewise
21796 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
21798 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
21800 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
21801 instructions FLI.H/S/D can load.
21802 * config/riscv/iterators.md (ceil): New.
21803 * config/riscv/riscv-opts.h (MASK_ZFA): New.
21805 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
21806 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
21807 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
21809 (riscv_const_insns): Likewise.
21810 (riscv_legitimize_const_move): Likewise.
21811 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
21813 (riscv_split_doubleword_move): Likewise.
21814 (riscv_output_move): Output the mov instructions in zfa extension.
21815 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
21817 (riscv_secondary_memory_needed): Likewise.
21818 * config/riscv/riscv.md (fminm<mode>3): New.
21819 (fmaxm<mode>3): New.
21820 (movsidf2_low_rv32): New.
21821 (movsidf2_high_rv32): New.
21822 (movdfsisi3_rv32): New.
21823 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
21824 * config/riscv/riscv.opt: New.
21826 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
21829 * omp-general.cc (omp_runtime_api_procname): New.
21830 (omp_runtime_api_call): Moved here from omp-low.cc, and make
21832 * omp-general.h: Include omp-api.h.
21833 * omp-low.cc (omp_runtime_api_call): Delete this copy.
21835 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
21837 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
21838 * doc/gimple.texi (GIMPLE instruction set): Add
21839 GIMPLE_OMP_STRUCTURED_BLOCK.
21840 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
21841 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
21842 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
21843 GIMPLE_OMP_STRUCTURED_BLOCK.
21844 (pp_gimple_stmt_1): Likewise.
21845 * gimple-walk.cc (walk_gimple_stmt): Likewise.
21846 * gimple.cc (gimple_build_omp_structured_block): New.
21847 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
21848 * gimple.h (gimple_build_omp_structured_block): Declare.
21849 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
21850 (CASE_GIMPLE_OMP): Likewise.
21851 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
21852 (gimplify_expr): Likewise.
21853 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
21854 GIMPLE_OMP_STRUCTURED_BLOCK.
21855 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
21856 (lower_omp_1): Likewise.
21857 (diagnose_sb_1): Likewise.
21858 (diagnose_sb_2): Likewise.
21859 * tree-inline.cc (remap_gimple_stmt): Handle
21860 GIMPLE_OMP_STRUCTURED_BLOCK.
21861 (estimate_num_insns): Likewise.
21862 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
21863 (convert_local_reference_stmt): Likewise.
21864 (convert_gimple_call): Likewise.
21865 * tree-pretty-print.cc (dump_generic_node): Handle
21866 OMP_STRUCTURED_BLOCK.
21867 * tree.def (OMP_STRUCTURED_BLOCK): New.
21868 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
21870 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
21872 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
21873 cost. Add some comments about different constants handling.
21875 2023-08-25 Andrew Pinski <apinski@marvell.com>
21877 * match.pd (`a ? one_zero : one_zero`): Move
21878 below detection of minmax.
21880 2023-08-25 Andrew Pinski <apinski@marvell.com>
21882 * match.pd (`a | C -> C`): New pattern.
21884 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
21886 * caller-save.cc (new_saved_hard_reg):
21887 Rename TRUE/FALSE to true/false.
21888 (setup_save_areas): Ditto.
21889 * gcc.cc (set_collect_gcc_options): Ditto.
21890 (driver::build_multilib_strings): Ditto.
21891 (print_multilib_info): Ditto.
21892 * genautomata.cc (gen_cpu_unit): Ditto.
21893 (gen_query_cpu_unit): Ditto.
21894 (gen_bypass): Ditto.
21895 (gen_excl_set): Ditto.
21896 (gen_presence_absence_set): Ditto.
21897 (gen_presence_set): Ditto.
21898 (gen_final_presence_set): Ditto.
21899 (gen_absence_set): Ditto.
21900 (gen_final_absence_set): Ditto.
21901 (gen_automaton): Ditto.
21902 (gen_regexp_repeat): Ditto.
21903 (gen_regexp_allof): Ditto.
21904 (gen_regexp_oneof): Ditto.
21905 (gen_regexp_sequence): Ditto.
21906 (process_decls): Ditto.
21907 (reserv_sets_are_intersected): Ditto.
21908 (initiate_excl_sets): Ditto.
21909 (form_reserv_sets_list): Ditto.
21910 (check_presence_pattern_sets): Ditto.
21911 (check_absence_pattern_sets): Ditto.
21912 (check_regexp_units_distribution): Ditto.
21913 (check_unit_distributions_to_automata): Ditto.
21914 (create_ainsns): Ditto.
21915 (output_insn_code_cases): Ditto.
21916 (output_internal_dead_lock_func): Ditto.
21917 (form_important_insn_automata_lists): Ditto.
21918 * gengtype-state.cc (read_state_files_list): Ditto.
21919 * gengtype.cc (main): Ditto.
21920 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
21922 * gimple.cc (gimple_build_call_from_tree): Ditto.
21923 (preprocess_case_label_vec_for_gimple): Ditto.
21924 * gimplify.cc (gimplify_call_expr): Ditto.
21925 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
21927 2023-08-25 Richard Biener <rguenther@suse.de>
21929 PR tree-optimization/111137
21930 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
21931 Properly handle grouped stores from other SLP instances.
21933 2023-08-25 Richard Biener <rguenther@suse.de>
21935 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
21936 Split out from vect_slp_analyze_node_dependences, remove
21938 (vect_slp_analyze_load_dependences): Split out from
21939 vect_slp_analyze_node_dependences, adjust comments. Process
21940 queued stores before any disambiguation.
21941 (vect_slp_analyze_node_dependences): Remove.
21942 (vect_slp_analyze_instance_dependence): Adjust.
21944 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
21946 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
21948 (operator_not_equal::fold_range): Adjust for relations.
21949 (operator_lt::fold_range): Same.
21950 (operator_gt::fold_range): Same.
21951 (foperator_unordered_equal::fold_range): Same.
21952 (foperator_unordered_lt::fold_range): Same.
21953 (foperator_unordered_le::fold_range): Same.
21954 (foperator_unordered_gt::fold_range): Same.
21955 (foperator_unordered_ge::fold_range): Same.
21957 2023-08-25 Richard Biener <rguenther@suse.de>
21959 PR tree-optimization/111136
21960 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
21961 stores force STMT_VINFO_STRIDED_P and also duplicate that
21964 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21966 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
21967 Add early continue.
21969 2023-08-25 liuhongt <hongtao.liu@intel.com>
21971 * config/i386/sse.md (vec_set<mode>): Removed.
21972 (V_128H): Merge into ..
21974 (V_256H): Merge into ..
21976 (V_512): Add V32HF, V32BF.
21977 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
21979 (vcond<mode><sseintvecmodelower>): Removed
21980 (vcondu<mode><sseintvecmodelower>): Removed.
21981 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
21983 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
21986 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
21987 Adjust paramter order.
21989 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
21992 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
21994 2023-08-24 David Malcolm <dmalcolm@redhat.com>
21997 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
21998 list of functions known to the analyzer.
22000 2023-08-24 Richard Biener <rguenther@suse.de>
22002 PR tree-optimization/111123
22003 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
22004 remove indirect clobbers here ...
22005 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
22006 (remove_indirect_clobbers): New function.
22008 2023-08-24 Jan Hubicka <jh@suse.cz>
22010 * cfg.h (struct control_flow_graph): New field full_profile.
22011 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
22012 * cfg.cc (init_flow): Set full_profile to false.
22013 * graphite.cc (graphite_transform_loops): Set full_profile to false.
22014 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
22015 * predict.cc (pass_profile::execute): Set full_profile to true.
22016 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
22017 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
22018 if full_profile is set.
22019 * tree-inline.cc (initialize_cfun): Initialize full_profile.
22020 (expand_call_inline): Combine full_profile.
22022 2023-08-24 Richard Biener <rguenther@suse.de>
22024 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
22025 load_p to ldst_p, fix mistakes and rely on
22026 STMT_VINFO_DATA_REF.
22028 2023-08-24 Jan Hubicka <jh@suse.cz>
22030 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
22031 of newly build trap bb.
22033 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22035 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
22036 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
22037 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
22039 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
22041 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
22042 * config/riscv/riscv.cc (riscv_option_override): Set sched
22043 pressure algorithm.
22045 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
22047 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
22049 2023-08-24 Richard Biener <rguenther@suse.de>
22051 PR tree-optimization/111125
22052 * tree-vect-slp.cc (vect_slp_function): Split at novector
22053 loop entry, do not push blocks in novector loops.
22055 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
22057 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
22059 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22061 * genmatch.cc (decision_tree::gen): Support
22062 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
22063 * gimple-match-exports.cc (gimple_simplify): Ditto.
22064 (gimple_resimplify6): New function.
22065 (gimple_resimplify7): New function.
22066 (gimple_match_op::resimplify): Support
22067 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
22068 (convert_conditional_op): Ditto.
22069 (build_call_internal): Ditto.
22070 (try_conditional_simplification): Ditto.
22071 (gimple_extract): Ditto.
22072 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
22073 * internal-fn.cc (CASE): Ditto.
22075 2023-08-24 Richard Biener <rguenther@suse.de>
22077 PR tree-optimization/111115
22078 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
22079 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
22081 * tree-vect-slp.cc (arg3_arg2_map): New.
22082 (vect_get_operand_map): Handle IFN_MASK_STORE.
22083 (vect_slp_child_index_for_operand): New function.
22084 (vect_build_slp_tree_1): Handle statements with no LHS,
22086 (vect_remove_slp_scalar_calls): Likewise.
22087 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
22088 SLP child corresponding to the ifn value index.
22089 (vectorizable_store): Likewise for the mask index. Support
22091 (vectorizable_load): Lookup the SLP child corresponding to the
22094 2023-08-24 Richard Biener <rguenther@suse.de>
22096 PR tree-optimization/111125
22097 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
22098 for the remain_defs processing.
22100 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
22102 * config/aarch64/aarch64.cc: Include ssa.h.
22103 (aarch64_multiply_add_p): Require the second operand of an
22104 Advanced SIMD subtraction to be a multiplication. Assume that
22105 such an operation won't be fused if the second operand is used
22106 multiple times and if the first operand is also a multiplication.
22108 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22110 * tree-vect-loop.cc (vectorizable_reduction): Apply
22111 LEN_FOLD_EXTRACT_LAST.
22112 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
22114 2023-08-24 Richard Biener <rguenther@suse.de>
22116 PR tree-optimization/111128
22117 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
22118 Emit external shift operand inline if we promoted it with
22119 another pattern stmt.
22121 2023-08-24 Pan Li <pan2.li@intel.com>
22123 * config/riscv/autovec.md: Fix typo.
22125 2023-08-24 Pan Li <pan2.li@intel.com>
22127 * config/riscv/riscv-vector-builtins-bases.cc
22128 (class binop_frm): Removed.
22129 (class reverse_binop_frm): Ditto.
22130 (class widen_binop_frm): Ditto.
22131 (class vfmacc_frm): Ditto.
22132 (class vfnmacc_frm): Ditto.
22133 (class vfmsac_frm): Ditto.
22134 (class vfnmsac_frm): Ditto.
22135 (class vfmadd_frm): Ditto.
22136 (class vfnmadd_frm): Ditto.
22137 (class vfmsub_frm): Ditto.
22138 (class vfnmsub_frm): Ditto.
22139 (class vfwmacc_frm): Ditto.
22140 (class vfwnmacc_frm): Ditto.
22141 (class vfwmsac_frm): Ditto.
22142 (class vfwnmsac_frm): Ditto.
22143 (class unop_frm): Ditto.
22144 (class vfrec7_frm): Ditto.
22145 (class binop): Add frm_op_type template arg.
22146 (class unop): Ditto.
22147 (class widen_binop): Ditto.
22148 (class widen_binop_fp): Ditto.
22149 (class reverse_binop): Ditto.
22150 (class vfmacc): Ditto.
22151 (class vfnmsac): Ditto.
22152 (class vfmadd): Ditto.
22153 (class vfnmsub): Ditto.
22154 (class vfnmacc): Ditto.
22155 (class vfmsac): Ditto.
22156 (class vfnmadd): Ditto.
22157 (class vfmsub): Ditto.
22158 (class vfwmacc): Ditto.
22159 (class vfwnmacc): Ditto.
22160 (class vfwmsac): Ditto.
22161 (class vfwnmsac): Ditto.
22162 (class float_misc): Ditto.
22164 2023-08-24 Andrew Pinski <apinski@marvell.com>
22166 PR tree-optimization/111109
22167 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
22168 Add check to make sure cmp and icmp are inverse.
22170 2023-08-24 Andrew Pinski <apinski@marvell.com>
22172 PR tree-optimization/95929
22173 * match.pd (convert?(-a)): New pattern
22174 for 1bit integer types.
22176 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22179 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22181 * common/config/i386/cpuinfo.h (get_available_features):
22182 Add avx10_set and version and detect avx10.1.
22183 (cpu_indicator_init): Handle avx10.1-512.
22184 * common/config/i386/i386-common.cc
22185 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
22186 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
22187 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
22188 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
22189 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
22190 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
22192 * common/config/i386/i386-cpuinfo.h (enum processor_features):
22193 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
22194 FEATURE_AVX10_512BIT.
22195 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
22196 AVX10_512BIT, AVX10_1 and AVX10_1_512.
22197 * config/i386/constraints.md (Yk): Add AVX10_1.
22200 * config/i386/cpuid.h (bit_AVX10): New.
22201 (bit_AVX10_256): Ditto.
22202 (bit_AVX10_512): Ditto.
22203 * config/i386/i386-c.cc (ix86_target_macros_internal):
22204 Define AVX10_512BIT and AVX10_1.
22205 * config/i386/i386-isa.def
22206 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
22207 (AVX10_1): Add DEF_PTA(AVX10_1).
22208 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
22209 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
22211 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
22212 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
22213 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
22214 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
22215 (ix86_conditional_register_usage): Ditto.
22216 (ix86_hard_regno_mode_ok): Ditto.
22217 (ix86_rtx_costs): Ditto.
22218 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
22219 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
22221 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
22222 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
22223 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
22226 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22229 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22231 * common/config/i386/i386-common.cc
22232 (ix86_check_avx10): New function to check isa_flags and
22233 isa_flags_explicit to emit warning when AVX10 is enabled
22235 (ix86_check_avx512): New function to check isa_flags and
22236 isa_flags_explicit to emit warning when AVX512 is enabled
22238 (ix86_handle_option): Do not change the flags when warning
22240 * config/i386/driver-i386.cc (host_detect_local_cpu):
22241 Do not append -mno-avx10.1 for -march=native.
22243 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22246 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22248 * common/config/i386/i386-common.cc
22249 (ix86_check_avx10_vector_width): New function to check isa_flags
22250 to emit a warning when there is a conflict in AVX10 options for
22252 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
22253 * config/i386/driver-i386.cc (host_detect_local_cpu):
22254 Do not append -mno-avx10-max-512bit for -march=native.
22256 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22259 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22261 * config/i386/avx512vldqintrin.h: Remove target attribute.
22262 * config/i386/i386-builtin.def (BDESC):
22263 Add OPTION_MASK_ISA2_AVX10_1.
22264 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
22265 * config/i386/i386-expand.cc
22266 (ix86_check_builtin_isa_match): Ditto.
22267 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
22268 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
22269 and avx10_1_or_avx512vl.
22270 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
22271 (VF1_128_256VLDQ_AVX10_1): Ditto.
22272 (VI8_AVX512VLDQ_AVX10_1): Ditto.
22273 (<sse>_andnot<mode>3<mask_name>):
22274 Add TARGET_AVX10_1 and change isa attr from avx512dq to
22275 avx10_1_or_avx512dq.
22276 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
22277 avx512vl to avx10_1_or_avx512vl.
22278 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
22279 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22280 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22282 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
22284 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
22285 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22286 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
22287 Add TARGET_AVX10_1.
22288 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
22289 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
22290 Remove target check.
22291 (avx512dq_mul<mode>3<mask_name>): Ditto.
22292 (*avx512dq_mul<mode>3<mask_name>): Ditto.
22293 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22294 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
22295 Remove target check.
22296 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
22297 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
22298 Remove target check.
22299 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
22300 (mask_avx512vl_condition): Ditto.
22303 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22306 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22308 * config/i386/avx512vldqintrin.h: Remove target attribute.
22309 * config/i386/i386-builtin.def (BDESC):
22310 Add OPTION_MASK_ISA2_AVX10_1.
22311 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
22312 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
22313 (VI48_AVX512VLDQ_AVX10_1): Ditto.
22314 (VF2_AVX512VL): Remove.
22315 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
22316 Add TARGET_AVX10_1.
22317 (*<code><mode>3<mask_name>): Change isa attribute to
22318 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
22319 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
22320 to avx10_1_or_avx512vl.
22321 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
22322 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22323 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
22324 Add TARGET_AVX10_1.
22325 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
22326 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22327 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
22328 Add TARGET_AVX10_1.
22329 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
22330 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22331 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
22332 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22333 (float<floatunssuffix>v4div4sf2<mask_name>):
22334 Add TARGET_AVX10_1.
22335 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22336 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22337 (float<floatunssuffix>v2div2sf2): Ditto.
22338 (float<floatunssuffix>v2div2sf2_mask): Ditto.
22339 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
22340 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
22341 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
22342 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
22343 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
22344 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
22345 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
22346 Change when constraint is enabled.
22348 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22351 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22353 * config/i386/avx512vldqintrin.h: Remove target attribute.
22354 * config/i386/i386-builtin.def (BDESC):
22355 Add OPTION_MASK_ISA2_AVX10_1.
22356 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
22357 (VFH_AVX512VLDQ_AVX10_1): Ditto.
22358 (VF1_AVX512VLDQ_AVX10_1): Ditto.
22359 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
22360 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22361 (vec_pack<floatprefix>_float_<mode>): Change iterator to
22362 VI8_AVX512VLDQ_AVX10_1. Remove target check.
22363 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
22364 VF1_AVX512VLDQ_AVX10_1. Remove target check.
22365 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
22366 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
22367 (avx512vl_vextractf128<mode>): Change iterator to
22368 VI48F_256_DQVL_AVX10_1. Remove target check.
22369 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
22370 (vec_extract_hi_<mode>): Ditto.
22371 (avx512vl_vinsert<mode>): Ditto.
22372 (vec_set_lo_<mode><mask_name>): Ditto.
22373 (vec_set_hi_<mode><mask_name>): Ditto.
22374 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
22375 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
22376 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
22377 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22378 * config/i386/subst.md (mask_avx512dq_condition): Add
22380 (mask_scalar_merge): Ditto.
22382 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
22385 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
22388 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
22391 2023-08-24 Richard Biener <rguenther@suse.de>
22394 * dwarf2out.cc (prune_unused_types_walk): Handle
22395 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
22396 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
22397 and DW_TAG_dynamic_type as to only output them when referenced.
22399 2023-08-24 liuhongt <hongtao.liu@intel.com>
22401 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
22404 2023-08-24 liuhongt <hongtao.liu@intel.com>
22406 * common/config/i386/i386-common.cc (processor_names): Add new
22407 member graniterapids-s and arrowlake-s.
22408 * config/i386/i386-options.cc (processor_alias_table): Update
22409 table with PROCESSOR_ARROWLAKE_S and
22410 PROCESSOR_GRANITERAPIDS_D.
22411 (m_GRANITERAPID_D): New macro.
22412 (m_ARROWLAKE_S): Ditto.
22413 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
22414 (processor_cost_table): Add icelake_cost for
22415 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
22416 PROCESSOR_ARROWLAKE_S.
22417 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
22419 * config/i386/i386.h (enum processor_type): Add new member
22420 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
22421 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
22422 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
22424 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22426 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
22427 to help simplify code further.
22429 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
22431 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
22432 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
22433 Initialize using a range instead of value and edge.
22434 (phi_group::calculate_using_modifier): Use initializer value and
22435 process for relations after trying for iteration convergence.
22436 (phi_group::refine_using_relation): Use initializer range.
22437 (phi_group::dump): Rework the dump output.
22438 (phi_analyzer::process_phi): Allow multiple constant initilizers.
22439 Dump groups immediately as created.
22440 (phi_analyzer::dump): Tweak output.
22441 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
22442 (phi_group::initial_value): Delete.
22443 (phi_group::refine_using_relation): Adjust prototype.
22444 (phi_group::m_initial_value): Delete.
22445 (phi_group::m_initial_edge): Delete.
22446 (phi_group::m_vr): Use int_range_max.
22447 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
22449 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
22451 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
22452 no group was created.
22453 (phi_analyzer::process_phi): Do not create groups of one phi node.
22455 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
22457 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
22458 CODE, CMP_CODE and BIT_CODE arguments.
22459 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
22460 (aarch64_gen_ccmp_next): Likewise.
22461 * doc/tm.texi: Regenerated.
22463 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
22465 * coretypes.h (rtx_code): Add forward declaration.
22466 * rtl.h (rtx_code): Make compatible with forward declaration.
22468 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
22471 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
22472 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
22473 DWIH mode iterator. Disable (=&r,m,m) alternative for
22475 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
22476 alternative for 32-bit targets.
22478 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
22480 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
22481 appropriate type attribute.
22483 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
22485 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
22486 (*copysign<mode>_neg): Ditto.
22487 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
22488 (<optab><mode>2): Ditto.
22489 (cond_<optab><mode>): New.
22490 (cond_len_<optab><mode>): Ditto.
22491 * config/riscv/riscv-protos.h (enum insn_type): New.
22492 (expand_cond_len_unop): New helper func.
22493 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
22494 (expand_cond_len_unop): New helper func.
22496 2023-08-23 Jan Hubicka <jh@suse.cz>
22498 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
22499 (should_duplicate_loop_header_p): Fix return value for static exits.
22500 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
22502 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22504 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
22505 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
22506 and update the final nest accordingly.
22508 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22510 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
22511 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
22512 and update the final nest accordingly.
22514 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
22516 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
22517 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
22518 gvec_oprnds with auto_delete_vec.
22520 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22522 * config/riscv/riscv-vsetvl.cc
22523 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
22525 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22527 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
22529 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
22531 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22533 * config/riscv/vector.md: Add attribute.
22535 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22537 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
22538 (vector_infos_manager::all_same_ratio_p): Ditto.
22539 (vector_infos_manager::all_same_avl_p): Ditto.
22540 (pass_vsetvl::refine_vsetvls): Ditto.
22541 (pass_vsetvl::cleanup_vsetvls): Ditto.
22542 (pass_vsetvl::commit_vsetvls): Ditto.
22543 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
22544 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
22545 (pass_vsetvl::compute_probabilities): Ditto.
22547 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22549 * config/riscv/t-riscv: Add riscv-vsetvl.def
22551 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
22553 * config/riscv/riscv.opt: Add --param names
22554 riscv-autovec-preference and riscv-autovec-lmul
22556 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
22558 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
22560 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
22562 * tree-core.h (enum omp_clause_defaultmap_kind): Add
22563 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
22564 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
22565 * tree-pretty-print.cc (dump_omp_clause): Likewise.
22567 2023-08-22 Jakub Jelinek <jakub@redhat.com>
22570 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
22571 types aren't supported in C++.
22573 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22575 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
22576 * internal-fn.cc (fold_len_extract_direct): Ditto.
22577 (expand_fold_len_extract_optab_fn): Ditto.
22578 (direct_fold_len_extract_optab_supported_p): Ditto.
22579 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
22580 * optabs.def (OPTAB_D): Ditto.
22582 2023-08-22 Richard Biener <rguenther@suse.de>
22584 * tree-vect-stmts.cc (vectorizable_store): Do not bump
22585 DR_GROUP_STORE_COUNT here. Remove early out.
22586 (vect_transform_stmt): Only call vectorizable_store on
22587 the last element of an interleaving chain.
22589 2023-08-22 Richard Biener <rguenther@suse.de>
22591 PR tree-optimization/94864
22592 PR tree-optimization/94865
22593 PR tree-optimization/93080
22594 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
22595 for vector insertion from vector extraction.
22597 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22598 Kewen.Lin <linkw@linux.ibm.com>
22600 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
22601 (vectorizable_live_operation): Add live vectorization for length loop
22604 2023-08-22 David Malcolm <dmalcolm@redhat.com>
22607 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
22609 2023-08-22 Pan Li <pan2.li@intel.com>
22611 * config/riscv/riscv-vector-builtins-bases.cc
22612 (vfwredusum_frm_obj): New declaration.
22614 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22615 * config/riscv/riscv-vector-builtins-functions.def
22616 (vfwredusum_frm): New intrinsic function def.
22618 2023-08-21 David Faust <david.faust@oracle.com>
22620 * config/bpf/bpf.md (neg): Second operand must be a register.
22622 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
22624 * config/riscv/bitmanip.md: Added bitmanip type to insns
22625 that are missing types.
22627 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
22629 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
22632 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
22634 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
22635 Fix format specifier.
22637 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
22639 * value-range.cc (frange::union_nans): Return false if nothing
22641 (range_tests_floats): New test.
22643 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22645 PR tree-optimization/111048
22646 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
22648 (fold_vec_perm_cst): Remove workaround and again call
22649 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
22650 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
22652 2023-08-21 Richard Biener <rguenther@suse.de>
22654 PR tree-optimization/111082
22655 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
22656 pun operations that can overflow.
22658 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22660 * lcm.cc (compute_antinout_edge): Export as global use.
22661 (compute_earliest): Ditto.
22662 (compute_rev_insert_delete): Ditto.
22663 * lcm.h (compute_antinout_edge): Ditto.
22664 (compute_earliest): Ditto.
22666 2023-08-21 Richard Biener <rguenther@suse.de>
22668 PR tree-optimization/111070
22669 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
22670 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
22672 2023-08-21 Andrew Pinski <apinski@marvell.com>
22674 PR tree-optimization/111002
22675 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
22677 2023-08-21 liuhongt <hongtao.liu@intel.com>
22679 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
22681 * common/config/i386/i386-common.cc (alias_table): Support
22682 -march=gracemont as an alias of -march=alderlake.
22684 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
22686 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
22687 instead of src in the call to ix86_expand_sse_cmp.
22688 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
22689 force operands[1] to a register.
22690 (<any_extend:insn>v4hiv4si2): Ditto.
22691 (<any_extend:insn>v2siv2di2): Ditto.
22693 2023-08-20 Andrew Pinski <apinski@marvell.com>
22695 PR tree-optimization/111006
22696 PR tree-optimization/110986
22697 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
22699 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
22702 * Makefile.in: improve error message when /usr/include is
22705 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
22707 PR middle-end/111017
22708 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
22709 to expand_omp_build_cond for 'factor != 0' condition, resulting
22710 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
22712 2023-08-19 Guo Jie <guojie@loongson.cn>
22713 Lulu Cheng <chenglulu@loongson.cn>
22715 * config/loongarch/t-loongarch: Add loongarch-driver.h into
22716 TM_H. Add loongarch-def.h and loongarch-tune.h into
22719 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
22722 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
22723 Also handle V2QImode.
22724 (ix86_expand_sse_extend): New function.
22725 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
22726 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
22727 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
22728 (<any_extend:insn>v2hiv2si2): Ditto.
22729 (<any_extend:insn>v2qiv2hi2): Ditto.
22730 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
22731 (<any_extend:insn>v4hiv4si2): Ditto.
22732 (<any_extend:insn>v2siv2di2): Ditto.
22734 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
22737 * value-range.cc (irange::union_bitmask): Return FALSE if updated
22738 bitmask is semantically equivalent to the original mask.
22739 (irange::intersect_bitmask): Same.
22740 (irange::get_bitmask): Add comment.
22742 2023-08-18 Richard Biener <rguenther@suse.de>
22744 PR tree-optimization/111019
22745 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
22746 also scrap base and offset in case the ref is indirect.
22748 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
22750 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
22752 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22754 PR bootstrap/111021
22755 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
22757 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22759 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
22761 (vectorizable_store): ... here.
22763 2023-08-18 Richard Biener <rguenther@suse.de>
22765 PR tree-optimization/111048
22766 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
22769 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
22772 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
22775 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
22777 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
22778 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
22779 and update the final nest accordingly.
22781 2023-08-18 Andrew Pinski <apinski@marvell.com>
22783 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
22784 cond_len_neg and cond_len_one_cmpl.
22786 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22788 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
22789 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
22790 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
22791 (*local_pic_load_32d<ANYF:mode>): Ditto.
22792 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
22793 (*local_pic_store<ANYF:mode>): Ditto.
22794 (*local_pic_store<ANYLSF:mode>): Ditto.
22795 (*local_pic_store_32d<ANYF:mode>): Ditto.
22796 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
22798 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22799 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22801 * config/riscv/predicates.md (vector_const_0_operand): New.
22802 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
22804 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
22806 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
22809 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
22811 PR tree-optimization/111009
22812 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
22814 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
22816 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
22817 slots_num initialization from here ...
22818 (lra_spill): ... to here before the 1st call of
22819 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
22820 fp->sp elimination.
22822 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
22825 * doc/invoke.texi (Option Summary): Mention
22826 -Wcompare-distinct-pointer-types under `Warning Options'.
22827 (Warning Options): Document -Wcompare-distinct-pointer-types.
22829 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
22831 * recog.cc (memory_address_addr_space_p): Mark possibly unused
22832 argument as unused.
22834 2023-08-17 Richard Biener <rguenther@suse.de>
22836 PR tree-optimization/111039
22837 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
22838 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
22840 2023-08-17 Alex Coplan <alex.coplan@arm.com>
22842 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
22844 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
22847 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
22848 `naked' function attribute.
22849 (bpf_warn_func_return): New function.
22850 (TARGET_WARN_FUNC_RETURN): Define.
22851 (bpf_expand_prologue): Add preventive comment.
22852 (bpf_expand_epilogue): Likewise.
22853 * doc/extend.texi (BPF Function Attributes): Document the `naked'
22854 function attribute.
22856 2023-08-17 Richard Biener <rguenther@suse.de>
22858 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
22859 !needs_fold_left_reduction_p to decide whether we can
22860 handle the reduction with association.
22861 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
22862 reductions perform all arithmetic in an unsigned type.
22864 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
22866 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
22868 * configure: Regenerate.
22870 2023-08-17 Pan Li <pan2.li@intel.com>
22872 * config/riscv/riscv-vector-builtins-bases.cc
22873 (widen_freducop): Add frm_opt_type template arg.
22874 (vfwredosum_frm_obj): New declaration.
22876 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22877 * config/riscv/riscv-vector-builtins-functions.def
22878 (vfwredosum_frm): New intrinsic function def.
22880 2023-08-17 Pan Li <pan2.li@intel.com>
22882 * config/riscv/riscv-vector-builtins-bases.cc
22883 (vfredosum_frm_obj): New declaration.
22885 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22886 * config/riscv/riscv-vector-builtins-functions.def
22887 (vfredosum_frm): New intrinsic function def.
22889 2023-08-17 Pan Li <pan2.li@intel.com>
22891 * config/riscv/riscv-vector-builtins-bases.cc
22892 (class freducop): Add frm_op_type template arg.
22893 (vfredusum_frm_obj): New declaration.
22895 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22896 * config/riscv/riscv-vector-builtins-functions.def
22897 (vfredusum_frm): New intrinsic function def.
22898 * config/riscv/riscv-vector-builtins-shapes.cc
22899 (struct reduc_alu_frm_def): New class for frm shape.
22900 (SHAPE): New declaration.
22901 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
22903 2023-08-17 Pan Li <pan2.li@intel.com>
22905 * config/riscv/riscv-vector-builtins-bases.cc
22906 (class vfncvt_f): Add frm_op_type template arg.
22907 (vfncvt_f_frm_obj): New declaration.
22909 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22910 * config/riscv/riscv-vector-builtins-functions.def
22911 (vfncvt_f_frm): New intrinsic function def.
22913 2023-08-17 Pan Li <pan2.li@intel.com>
22915 * config/riscv/riscv-vector-builtins-bases.cc
22916 (vfncvt_xu_frm_obj): New declaration.
22918 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22919 * config/riscv/riscv-vector-builtins-functions.def
22920 (vfncvt_xu_frm): New intrinsic function def.
22922 2023-08-17 Pan Li <pan2.li@intel.com>
22924 * config/riscv/riscv-vector-builtins-bases.cc
22925 (class vfncvt_x): Add frm_op_type template arg.
22926 (BASE): New declaration.
22927 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
22928 * config/riscv/riscv-vector-builtins-functions.def
22929 (vfncvt_x_frm): New intrinsic function def.
22930 * config/riscv/riscv-vector-builtins-shapes.cc
22931 (struct narrow_alu_frm_def): New shape function for frm.
22932 (SHAPE): New declaration.
22933 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
22935 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22937 * config/i386/avx512vldqintrin.h: Remove target attribute.
22938 * config/i386/i386-builtin.def (BDESC):
22939 Add OPTION_MASK_ISA2_AVX10_1.
22940 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
22941 (VFH_AVX512VLDQ_AVX10_1): Ditto.
22942 (VF1_AVX512VLDQ_AVX10_1): Ditto.
22943 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
22944 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22945 (vec_pack<floatprefix>_float_<mode>): Change iterator to
22946 VI8_AVX512VLDQ_AVX10_1. Remove target check.
22947 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
22948 VF1_AVX512VLDQ_AVX10_1. Remove target check.
22949 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
22950 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
22951 (avx512vl_vextractf128<mode>): Change iterator to
22952 VI48F_256_DQVL_AVX10_1. Remove target check.
22953 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
22954 (vec_extract_hi_<mode>): Ditto.
22955 (avx512vl_vinsert<mode>): Ditto.
22956 (vec_set_lo_<mode><mask_name>): Ditto.
22957 (vec_set_hi_<mode><mask_name>): Ditto.
22958 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
22959 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
22960 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
22961 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
22962 * config/i386/subst.md (mask_avx512dq_condition): Add
22964 (mask_scalar_merge): Ditto.
22966 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
22968 * config/i386/avx512vldqintrin.h: Remove target attribute.
22969 * config/i386/i386-builtin.def (BDESC):
22970 Add OPTION_MASK_ISA2_AVX10_1.
22971 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
22972 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
22973 (VI48_AVX512VLDQ_AVX10_1): Ditto.
22974 (VF2_AVX512VL): Remove.
22975 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
22976 Add TARGET_AVX10_1.
22977 (*<code><mode>3<mask_name>): Change isa attribute to
22978 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
22979 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
22980 to avx10_1_or_avx512vl.
22981 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
22982 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22983 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
22984 Add TARGET_AVX10_1.
22985 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
22986 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
22987 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
22988 Add TARGET_AVX10_1.
22989 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
22990 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
22991 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
22992 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
22993 (float<floatunssuffix>v4div4sf2<mask_name>):
22994 Add TARGET_AVX10_1.
22995 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22996 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
22997 (float<floatunssuffix>v2div2sf2): Ditto.
22998 (float<floatunssuffix>v2div2sf2_mask): Ditto.
22999 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
23000 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
23001 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
23002 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
23003 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
23004 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
23005 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
23006 Change when constraint is enabled.
23008 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23011 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
23012 (second_sew_less_than_first_sew_p): Fix bug.
23013 (first_sew_less_than_second_sew_p): Ditto.
23015 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
23017 * config/i386/avx512vldqintrin.h: Remove target attribute.
23018 * config/i386/i386-builtin.def (BDESC):
23019 Add OPTION_MASK_ISA2_AVX10_1.
23020 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
23021 * config/i386/i386-expand.cc
23022 (ix86_check_builtin_isa_match): Ditto.
23023 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
23024 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
23025 and avx10_1_or_avx512vl.
23026 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
23027 (VF1_128_256VLDQ_AVX10_1): Ditto.
23028 (VI8_AVX512VLDQ_AVX10_1): Ditto.
23029 (<sse>_andnot<mode>3<mask_name>):
23030 Add TARGET_AVX10_1 and change isa attr from avx512dq to
23031 avx10_1_or_avx512dq.
23032 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
23033 avx512vl to avx10_1_or_avx512vl.
23034 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
23035 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
23036 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
23038 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
23040 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
23041 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
23042 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
23043 Add TARGET_AVX10_1.
23044 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
23045 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
23046 Remove target check.
23047 (avx512dq_mul<mode>3<mask_name>): Ditto.
23048 (*avx512dq_mul<mode>3<mask_name>): Ditto.
23049 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
23050 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
23051 Remove target check.
23052 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
23053 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
23054 Remove target check.
23055 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
23056 (mask_avx512vl_condition): Ditto.
23059 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
23061 * common/config/i386/i386-common.cc
23062 (ix86_check_avx10_vector_width): New function to check isa_flags
23063 to emit a warning when there is a conflict in AVX10 options for
23065 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
23066 * config/i386/driver-i386.cc (host_detect_local_cpu):
23067 Do not append -mno-avx10-max-512bit for -march=native.
23069 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
23071 * common/config/i386/i386-common.cc
23072 (ix86_check_avx10): New function to check isa_flags and
23073 isa_flags_explicit to emit warning when AVX10 is enabled
23075 (ix86_check_avx512): New function to check isa_flags and
23076 isa_flags_explicit to emit warning when AVX512 is enabled
23078 (ix86_handle_option): Do not change the flags when warning
23080 * config/i386/driver-i386.cc (host_detect_local_cpu):
23081 Do not append -mno-avx10.1 for -march=native.
23083 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
23085 * common/config/i386/cpuinfo.h (get_available_features):
23086 Add avx10_set and version and detect avx10.1.
23087 (cpu_indicator_init): Handle avx10.1-512.
23088 * common/config/i386/i386-common.cc
23089 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
23090 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
23091 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
23092 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
23093 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
23094 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
23096 * common/config/i386/i386-cpuinfo.h (enum processor_features):
23097 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
23098 FEATURE_AVX10_512BIT.
23099 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
23100 AVX10_512BIT, AVX10_1 and AVX10_1_512.
23101 * config/i386/constraints.md (Yk): Add AVX10_1.
23104 * config/i386/cpuid.h (bit_AVX10): New.
23105 (bit_AVX10_256): Ditto.
23106 (bit_AVX10_512): Ditto.
23107 * config/i386/i386-c.cc (ix86_target_macros_internal):
23108 Define AVX10_512BIT and AVX10_1.
23109 * config/i386/i386-isa.def
23110 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
23111 (AVX10_1): Add DEF_PTA(AVX10_1).
23112 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
23113 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
23115 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
23116 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
23117 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
23118 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
23119 (ix86_conditional_register_usage): Ditto.
23120 (ix86_hard_regno_mode_ok): Ditto.
23121 (ix86_rtx_costs): Ditto.
23122 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
23123 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
23125 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
23126 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
23127 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
23130 2023-08-17 Sergei Trofimovich <siarheit@google.com>
23132 * flag-types.h (vrp_mode): Remove unused.
23134 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
23136 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
23139 2023-08-17 Andrew Pinski <apinski@marvell.com>
23141 * internal-fn.def (COND_NOT): New internal function.
23142 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
23144 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
23145 into conditional not.
23146 * optabs.def (cond_one_cmpl): New optab.
23147 (cond_len_one_cmpl): Likewise.
23149 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
23151 PR rtl-optimization/110254
23152 * ira-color.cc (improve_allocation): Update array
23153 allocated_hard_reg_p.
23155 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
23157 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
23158 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
23159 (lra_update_fp2sp_elimination): Ditto.
23160 (update_reg_eliminate): Adjust spill_pseudos call.
23161 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
23162 in lra_update_fp2sp_elimination.
23164 2023-08-16 Richard Ball <richard.ball@arm.com>
23166 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
23167 * config/aarch64/aarch64-tune.md: Regenerate.
23168 * doc/invoke.texi: Document Cortex-A720 CPU.
23170 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
23172 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
23173 Implement expander.
23174 (<u>avg<v_double_trunc>3_ceil): Ditto.
23175 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
23178 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
23180 * internal-fn.cc (vec_extract_direct): Change type argument
23182 (expand_vec_extract_optab_fn): Call convert_optab_fn.
23183 (direct_vec_extract_optab_supported_p): Use
23184 convert_optab_supported_p.
23186 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23187 Richard Sandiford <richard.sandiford@arm.com>
23189 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
23190 (valid_mask_for_fold_vec_perm_cst_p): New function.
23191 (fold_vec_perm_cst): Likewise.
23192 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
23193 (test_fold_vec_perm_cst): New namespace.
23194 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
23195 (test_fold_vec_perm_cst::validate_res): Likewise.
23196 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
23197 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
23198 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
23199 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
23200 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
23201 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
23202 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
23203 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
23204 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
23205 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
23206 (test_fold_vec_perm_cst::test): Likewise.
23207 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
23209 2023-08-16 Pan Li <pan2.li@intel.com>
23211 * config/riscv/riscv-vector-builtins-bases.cc
23212 (BASE): New declaration.
23213 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23214 * config/riscv/riscv-vector-builtins-functions.def
23215 (vfwcvt_xu_frm): New intrinsic function def.
23217 2023-08-16 Pan Li <pan2.li@intel.com>
23219 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
23221 2023-08-16 Pan Li <pan2.li@intel.com>
23223 * config/riscv/riscv-vector-builtins-bases.cc
23224 (BASE): New declaration.
23225 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23226 * config/riscv/riscv-vector-builtins-functions.def
23227 (vfwcvt_x_frm): New intrinsic function def.
23229 2023-08-16 Pan Li <pan2.li@intel.com>
23231 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
23232 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23233 * config/riscv/riscv-vector-builtins-functions.def
23234 (vfcvt_f_frm): New intrinsic function def.
23236 2023-08-16 Pan Li <pan2.li@intel.com>
23238 * config/riscv/riscv-vector-builtins-bases.cc
23239 (BASE): New declaration.
23240 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23241 * config/riscv/riscv-vector-builtins-functions.def
23242 (vfcvt_xu_frm): New intrinsic function def..
23244 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
23247 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
23248 extract when the element is 7 on BE while 8 on LE for byte or 3 on
23249 BE while 4 on LE for halfword.
23251 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
23254 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
23255 for V8HI and V16QI.
23256 (vsx_extract_v4si): New expand for V4SI extraction.
23257 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
23258 word 1 from BE order.
23259 (*mfvsrwz): New insn pattern for mfvsrwz.
23260 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
23261 word 1 from BE order.
23262 (*vsx_extract_si): Remove.
23263 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
23266 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23268 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
23270 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
23271 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
23272 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
23273 (expand_lanes_load_store): New function.
23274 * config/riscv/vector-iterators.md: New iterator.
23276 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23278 * internal-fn.cc (internal_load_fn_p): Apply
23279 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
23280 (internal_store_fn_p): Ditto.
23281 (internal_fn_len_index): Ditto.
23282 (internal_fn_mask_index): Ditto.
23283 (internal_fn_stored_value_index): Ditto.
23284 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
23285 (vect_load_lanes_supported): Ditto.
23286 * tree-vect-loop.cc: Ditto.
23287 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
23288 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
23289 (get_group_load_store_type): Ditto.
23290 (vectorizable_store): Ditto.
23291 (vectorizable_load): Ditto.
23292 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
23293 (vect_load_lanes_supported): Ditto.
23295 2023-08-16 Pan Li <pan2.li@intel.com>
23297 * config/riscv/riscv-vector-builtins-bases.cc
23298 (enum frm_op_type): New type for frm.
23299 (BASE): New declaration.
23300 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23301 * config/riscv/riscv-vector-builtins-functions.def
23302 (vfcvt_x_frm): New intrinsic function def.
23304 2023-08-16 liuhongt <hongtao.liu@intel.com>
23306 * config/i386/i386-builtins.cc
23307 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
23308 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
23309 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
23310 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
23311 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
23312 for use_scatter_8parts
23313 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
23314 (TARGET_USE_GATHER_8PARTS): .. this.
23315 (TARGET_USE_SCATTER): Rename to ..
23316 (TARGET_USE_SCATTER_8PARTS): .. this.
23317 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
23318 (X86_TUNE_USE_GATHER_8PARTS): .. this.
23319 (X86_TUNE_USE_SCATTER): Rename to
23320 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
23321 * config/i386/i386.opt: Add new options mgather, mscatter.
23323 2023-08-16 liuhongt <hongtao.liu@intel.com>
23325 * config/i386/i386-options.cc (m_GDS): New macro.
23326 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
23328 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
23329 (X86_TUNE_USE_GATHER): Ditto.
23331 2023-08-16 liuhongt <hongtao.liu@intel.com>
23333 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
23334 vmovsd when moving DFmode between SSE_REGS.
23335 (movhi_internal): Generate vmovdqa instead of vmovsh when
23336 moving HImode between SSE_REGS.
23337 (mov<mode>_internal): Use vmovaps instead of vmovsh when
23338 moving HF/BFmode between SSE_REGS.
23340 2023-08-15 David Faust <david.faust@oracle.com>
23342 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
23344 2023-08-15 David Faust <david.faust@oracle.com>
23347 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
23348 for any mode 32-bits or smaller, not just SImode.
23350 2023-08-15 Martin Jambor <mjambor@suse.cz>
23354 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
23355 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
23356 (ipcp_transform_function): Do not deallocate transformation info.
23357 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
23359 (vn_reference_lookup_2): When hitting default-def vuse, query
23360 IPA-CP transformation info for any known constants.
23362 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
23363 Thomas Schwinge <thomas@codesourcery.com>
23365 * gimplify.cc (oacc_region_type_name): New function.
23366 (oacc_default_clause): If no 'default' clause appears on this
23367 compute construct, see if one appears on a lexically containing
23369 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
23370 ctx->oacc_default_clause_ctx to current context.
23372 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23375 * config/riscv/predicates.md: Fix predicate.
23377 2023-08-15 Richard Biener <rguenther@suse.de>
23379 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
23380 slp_inst_kind_ctor handling.
23381 (vect_analyze_slp): Simplify.
23382 (vect_build_slp_instance): Dump when we analyze a CTOR.
23383 (vect_slp_check_for_constructors): Rename to ...
23384 (vect_slp_check_for_roots): ... this. Register a
23385 slp_root for CONSTRUCTORs instead of shoving them to
23386 the set of grouped stores.
23387 (vect_slp_analyze_bb_1): Adjust.
23389 2023-08-15 Richard Biener <rguenther@suse.de>
23391 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
23393 (_slp_instance::remain_defs): ... this.
23394 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
23395 (SLP_INSTANCE_REMAIN_DEFS): ... this.
23396 (slp_root::remain): New.
23397 (slp_root::slp_root): Adjust.
23398 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
23399 (vect_build_slp_instance): Get extra remain parameter,
23400 adjust former handling of a cut off stmt.
23401 (vect_analyze_slp_instance): Adjust.
23402 (vect_analyze_slp): Likewise.
23403 (_bb_vec_info::~_bb_vec_info): Likewise.
23404 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
23405 (vect_slp_check_for_constructors): Handle non-internal
23406 defs as remain defs of a reduction.
23407 (vectorize_slp_instance_root_stmt): Adjust.
23409 2023-08-15 Richard Biener <rguenther@suse.de>
23411 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
23412 (canonicalize_loop_induction_variables): Use find_loop_location.
23414 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
23416 PR bootstrap/111021
23417 * config/cris/cris-protos.h: Revert recent change.
23418 * config/cris/cris.cc (cris_legitimate_address_p): Remove
23419 code_helper unused parameter.
23420 (cris_legitimate_address_p_hook): New wrapper function.
23421 (TARGET_LEGITIMATE_ADDRESS_P): Change to
23422 cris_legitimate_address_p_hook.
23424 2023-08-15 Richard Biener <rguenther@suse.de>
23426 PR tree-optimization/110963
23427 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
23428 a PHI node when the expression is available on all edges
23429 and we insert at most one copy from a constant.
23431 2023-08-15 Richard Biener <rguenther@suse.de>
23433 PR tree-optimization/110991
23434 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
23435 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
23436 that will end up constant.
23438 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23440 PR bootstrap/111021
23441 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
23443 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23445 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
23446 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
23447 and update the final nest accordingly.
23449 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
23451 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
23454 2023-08-15 Pan Li <pan2.li@intel.com>
23456 * mode-switching.cc (create_pre_exit): Add SET insn check.
23458 2023-08-15 Pan Li <pan2.li@intel.com>
23460 * config/riscv/riscv-vector-builtins-bases.cc
23461 (class vfrec7_frm): New class for frm.
23462 (vfrec7_frm_obj): New declaration.
23464 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23465 * config/riscv/riscv-vector-builtins-functions.def
23466 (vfrec7_frm): New intrinsic function definition.
23467 * config/riscv/vector-iterators.md
23468 (VFMISC): Remove VFREC7.
23470 (float_insn_type): Ditto.
23471 (VFMISC_FRM): New int iterator.
23472 (misc_frm_op): New op for frm.
23473 (float_frm_insn_type): New type for frm.
23474 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
23475 New pattern for misc frm.
23477 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
23479 * lra-constraints.cc (curr_insn_transform): Process output stack
23480 pointer reloads before emitting reload insns.
23482 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
23485 * doc/invoke.texi: Add documentation of
23486 fanalyzer-show-events-in-system-headers
23488 2023-08-14 Jan Hubicka <jh@suse.cz>
23490 PR gcov-profile/110988
23491 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
23493 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
23495 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
23496 Enable compressed builtins when ZC* extensions enabled.
23497 * config/riscv/riscv-shorten-memrefs.cc:
23498 Enable shorten_memrefs pass when ZC* extensions enabled.
23499 * config/riscv/riscv.cc (riscv_compressed_reg_p):
23500 Enable compressible registers when ZC* extensions enabled.
23501 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
23502 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
23503 (riscv_first_stack_step): Allow compression of the register saves
23504 without adding extra instructions.
23505 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
23506 to 16 bits when ZC* extensions enabled.
23508 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
23510 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
23511 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
23516 (MASK_ZCMP): Ditto.
23517 (MASK_ZCMT): Ditto.
23518 (TARGET_ZCA): New target.
23519 (TARGET_ZCB): Ditto.
23520 (TARGET_ZCE): Ditto.
23521 (TARGET_ZCF): Ditto.
23522 (TARGET_ZCD): Ditto.
23523 (TARGET_ZCMP): Ditto.
23524 (TARGET_ZCMT): Ditto.
23525 * config/riscv/riscv.opt: New target variable.
23527 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23530 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
23532 * genrecog.cc (print_nonbool_test): Fix type error of
23533 switch (SUBREG_BYTE (op))'.
23535 2023-08-14 Richard Biener <rguenther@suse.de>
23537 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
23539 2023-08-14 Pan Li <pan2.li@intel.com>
23541 * config/riscv/riscv-vector-builtins-bases.cc
23542 (class unop_frm): New class for frm.
23543 (vfsqrt_frm_obj): New declaration.
23545 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23546 * config/riscv/riscv-vector-builtins-functions.def
23547 (vfsqrt_frm): New intrinsic function definition.
23549 2023-08-14 Pan Li <pan2.li@intel.com>
23551 * config/riscv/riscv-vector-builtins-bases.cc
23552 (class vfwnmsac_frm): New class for frm.
23553 (vfwnmsac_frm_obj): New declaration.
23555 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23556 * config/riscv/riscv-vector-builtins-functions.def
23557 (vfwnmsac_frm): New intrinsic function definition.
23559 2023-08-14 Pan Li <pan2.li@intel.com>
23561 * config/riscv/riscv-vector-builtins-bases.cc
23562 (class vfwmsac_frm): New class for frm.
23563 (vfwmsac_frm_obj): New declaration.
23565 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23566 * config/riscv/riscv-vector-builtins-functions.def
23567 (vfwmsac_frm): New intrinsic function definition.
23569 2023-08-14 Pan Li <pan2.li@intel.com>
23571 * config/riscv/riscv-vector-builtins-bases.cc
23572 (class vfwnmacc_frm): New class for frm.
23573 (vfwnmacc_frm_obj): New declaration.
23575 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23576 * config/riscv/riscv-vector-builtins-functions.def
23577 (vfwnmacc_frm): New intrinsic function definition.
23579 2023-08-14 Cui, Lili <lili.cui@intel.com>
23581 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
23584 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23586 * config/mmix/predicates.md (mmix_address_operand): Use
23587 lra_in_progress, not reload_in_progress.
23589 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23591 * config/mmix/mmix.cc: Re-enable LRA.
23593 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23595 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
23596 when lra_in_progress.
23598 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
23600 * config/mmix/mmix.cc: Disable LRA for MMIX.
23602 2023-08-14 Pan Li <pan2.li@intel.com>
23604 * config/riscv/riscv-vector-builtins-bases.cc
23605 (class vfwmacc_frm): New class for vfwmacc frm.
23606 (vfwmacc_frm_obj): New declaration.
23608 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23609 * config/riscv/riscv-vector-builtins-functions.def
23610 (vfwmacc_frm): Function definition for vfwmacc.
23611 * config/riscv/riscv-vector-builtins.cc
23612 (function_expander::use_widen_ternop_insn): Add frm support.
23614 2023-08-14 Pan Li <pan2.li@intel.com>
23616 * config/riscv/riscv-vector-builtins-bases.cc
23617 (class vfnmsub_frm): New class for vfnmsub frm.
23618 (vfnmsub_frm): New declaration.
23620 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23621 * config/riscv/riscv-vector-builtins-functions.def
23622 (vfnmsub_frm): New function declaration.
23624 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
23626 * lra-constraints.cc (curr_insn_transform): Set done_p up and
23627 check it on true after processing output stack pointer reload.
23629 2023-08-12 Jakub Jelinek <jakub@redhat.com>
23631 * Makefile.in (USER_H): Add stdckdint.h.
23632 * ginclude/stdckdint.h: New file.
23634 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23637 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
23639 2023-08-12 Patrick Palka <ppalka@redhat.com>
23641 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
23642 Delimit output with braces.
23644 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23647 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
23649 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23651 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
23652 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
23653 * config/riscv/vector.md: Ditto.
23655 2023-08-11 David Malcolm <dmalcolm@redhat.com>
23658 * doc/analyzer.texi (__analyzer_get_strlen): New.
23659 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
23661 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
23663 * config/rx/rx.md (subdi3): Fix test for borrow.
23665 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23667 PR middle-end/110989
23668 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
23669 (vectorizable_load): Ditto.
23671 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
23673 * config/bpf/bpf.md (allocate_stack): Define.
23674 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
23675 stack pointer register.
23676 (FIXED_REGISTERS): Adjust accordingly.
23677 (CALL_USED_REGISTERS): Likewise.
23678 (REG_CLASS_CONTENTS): Likewise.
23679 (REGISTER_NAMES): Likewise.
23680 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
23681 space for callee-saved registers.
23682 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
23683 (bpf_expand_epilogue): Do not restore callee-saved registers in
23686 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
23688 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
23689 about too many arguments if function is always inlined.
23691 2023-08-11 Patrick Palka <ppalka@redhat.com>
23693 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
23694 Don't call component_ref_field_offset if the RHS isn't a decl.
23696 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
23698 PR bootstrap/110646
23699 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
23701 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
23703 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
23704 (process_alt_operands): Set the flag.
23705 (curr_insn_transform): Modify stack pointer offsets if output
23706 stack pointer reload is generated.
23708 2023-08-11 Joseph Myers <joseph@codesourcery.com>
23710 * configure: Regenerate.
23712 2023-08-11 Richard Biener <rguenther@suse.de>
23714 PR tree-optimization/110979
23715 * tree-vect-loop.cc (vectorizable_reduction): For
23716 FOLD_LEFT_REDUCTION without target support make sure
23717 we don't need to honor signed zeros and sign dependent rounding.
23719 2023-08-11 Richard Biener <rguenther@suse.de>
23721 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
23722 subgraph entries. Dump the used vector size based on the
23723 SLP subgraph entry root vector type.
23725 2023-08-11 Pan Li <pan2.li@intel.com>
23727 * config/riscv/riscv-vector-builtins-bases.cc
23728 (class vfmsub_frm): New class for vfmsub frm.
23729 (vfmsub_frm): New declaration.
23731 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23732 * config/riscv/riscv-vector-builtins-functions.def
23733 (vfmsub_frm): New function declaration.
23735 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23737 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
23738 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
23739 (expand_partial_store_optab_fn): Ditto.
23740 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
23741 (MASK_LEN_STORE_LANES): Ditto.
23742 * optabs.def (OPTAB_CD): Ditto.
23744 2023-08-11 Pan Li <pan2.li@intel.com>
23746 * config/riscv/riscv-vector-builtins-bases.cc
23747 (class vfnmadd_frm): New class for vfnmadd frm.
23748 (vfnmadd_frm): New declaration.
23750 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23751 * config/riscv/riscv-vector-builtins-functions.def
23752 (vfnmadd_frm): New function declaration.
23754 2023-08-11 Drew Ross <drross@redhat.com>
23755 Jakub Jelinek <jakub@redhat.com>
23757 PR tree-optimization/109938
23758 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
23760 2023-08-11 Pan Li <pan2.li@intel.com>
23762 * config/riscv/riscv-vector-builtins-bases.cc
23763 (class vfmadd_frm): New class for vfmadd frm.
23764 (vfmadd_frm_obj): New declaration.
23766 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23767 * config/riscv/riscv-vector-builtins-functions.def
23768 (vfmadd_frm): New function definition.
23770 2023-08-11 Pan Li <pan2.li@intel.com>
23772 * config/riscv/riscv-vector-builtins-bases.cc
23773 (class vfnmsac_frm): New class for vfnmsac frm.
23774 (vfnmsac_frm_obj): New declaration.
23776 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23777 * config/riscv/riscv-vector-builtins-functions.def
23778 (vfnmsac_frm): New function definition.
23780 2023-08-11 Jakub Jelinek <jakub@redhat.com>
23782 * doc/extend.texi (Typeof): Document typeof_unqual
23783 and __typeof_unqual__.
23785 2023-08-11 Andrew Pinski <apinski@marvell.com>
23787 PR tree-optimization/110954
23788 * generic-match-head.cc (bitwise_inverted_equal_p): Add
23789 wascmp argument and set it accordingly.
23790 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
23791 wascmp argument to the macro.
23792 (gimple_bitwise_inverted_equal_p): Add
23793 wascmp argument and set it accordingly.
23794 * match.pd (`a & ~a`, `a ^| ~a`): Update call
23795 to bitwise_inverted_equal_p and handle wascmp case.
23796 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
23797 call to bitwise_inverted_equal_p and check to see
23798 if was !wascmp or if precision was 1.
23800 2023-08-11 Martin Uecker <uecker@tugraz.at>
23803 * doc/invoke.texi: Update.
23805 2023-08-11 Pan Li <pan2.li@intel.com>
23807 * config/riscv/riscv-vector-builtins-bases.cc
23808 (class vfmsac_frm): New class for vfmsac frm.
23809 (vfmsac_frm_obj): New declaration.
23811 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23812 * config/riscv/riscv-vector-builtins-functions.def
23813 (vfmsac_frm): New function definition
23815 2023-08-10 Jan Hubicka <jh@suse.cz>
23817 PR middle-end/110923
23818 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
23820 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
23822 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
23823 dependent on 'a' extension.
23824 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
23825 (TARGET_ZTSO): New target.
23826 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
23828 (riscv_memmodel_needs_amo_release): Add Ztso case.
23829 (riscv_print_operand): Add Ztso case for LR/SC annotations.
23830 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
23831 * config/riscv/riscv.opt: Add Ztso target variable.
23832 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
23833 Ztso specific insn.
23834 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
23835 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
23836 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
23837 specific load/store/fence mappings.
23838 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
23839 specific load/store/fence mappings.
23841 2023-08-10 Jan Hubicka <jh@suse.cz>
23843 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
23846 2023-08-10 Jan Hubicka <jh@suse.cz>
23848 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
23850 2023-08-10 Jan Hubicka <jh@suse.cz>
23852 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
23853 handling of undefined values.
23855 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23858 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
23859 return virtual phis and return NULL if there is a virtual phi
23860 where the arguments from E0 and E1 edges aren't equal.
23862 2023-08-10 Richard Biener <rguenther@suse.de>
23864 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
23865 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
23867 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23870 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
23872 2023-08-10 Pan Li <pan2.li@intel.com>
23874 * config/riscv/riscv-vector-builtins-bases.cc
23875 (class vfnmacc_frm): New class for vfnmacc.
23876 (vfnmacc_frm_obj): New declaration.
23878 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23879 * config/riscv/riscv-vector-builtins-functions.def
23880 (vfnmacc_frm): New function definition.
23882 2023-08-10 Pan Li <pan2.li@intel.com>
23884 * config/riscv/riscv-vector-builtins-bases.cc
23885 (class vfmacc_frm): New class for vfmacc frm.
23886 (vfmacc_frm_obj): New declaration.
23888 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23889 * config/riscv/riscv-vector-builtins-functions.def
23890 (vfmacc_frm): New function definition.
23892 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23895 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
23897 2023-08-10 Richard Biener <rguenther@suse.de>
23899 * tree-vectorizer.h (vectorizable_live_operation): Remove
23900 gimple_stmt_iterator * argument.
23901 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
23902 Adjust plumbing around vect_get_loop_mask.
23903 (vect_analyze_loop_operations): Adjust.
23904 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
23905 (vect_bb_slp_mark_live_stmts): Likewise.
23906 (vect_schedule_slp_node): Likewise.
23907 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
23908 Remove gimple_stmt_iterator * argument.
23909 (vect_transform_stmt): Adjust.
23911 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23913 * config/riscv/vector-iterators.md: Add missing modes.
23915 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23918 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
23919 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
23921 2023-08-10 Jakub Jelinek <jakub@redhat.com>
23924 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
23925 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
23928 2023-08-10 liuhongt <hongtao.liu@intel.com>
23931 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
23932 sanitize upper part of V4HFmode register with
23933 -fno-trapping-math.
23934 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
23935 (<divv4hf3): Ditto.
23936 (<insn>v2hf3): Ditto.
23938 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
23939 register with -fno-trapping-math.
23941 2023-08-10 Pan Li <pan2.li@intel.com>
23942 Kito Cheng <kito.cheng@sifive.com>
23944 * config/riscv/riscv-protos.h
23945 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
23946 (get_frm_mode): New declaration.
23947 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
23948 * config/riscv/riscv-vector-builtins.cc
23949 (function_expander::use_ternop_insn): Take care of frm reg.
23950 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
23951 (riscv_emit_frm_mode_set): Ditto.
23952 (riscv_emit_mode_set): Ditto.
23953 (riscv_frm_adjust_mode_after_call): Ditto.
23954 (riscv_frm_mode_needed): Ditto.
23955 (riscv_frm_mode_after): Ditto.
23956 (riscv_mode_entry): Ditto.
23957 (riscv_mode_exit): Ditto.
23958 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
23959 * config/riscv/vector.md
23960 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
23961 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
23963 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23965 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
23966 incorrect anticipate info.
23968 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
23970 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
23971 Remove 'Zve32d' from the version list.
23973 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
23975 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
23976 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
23977 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
23978 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
23980 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
23982 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
23983 (mem_shadd_or_shadd_rtx_p): New function.
23985 2023-08-09 Andrew Pinski <apinski@marvell.com>
23987 PR tree-optimization/110937
23988 PR tree-optimization/100798
23989 * match.pd (`a ? ~b : b`): Handle this
23992 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
23994 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
23996 2023-08-09 Richard Ball <richard.ball@arm.com>
23998 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
23999 * config/aarch64/aarch64-tune.md: Regenerate.
24000 * doc/invoke.texi: Document Cortex-A520 CPU.
24002 2023-08-09 Carl Love <cel@us.ibm.com>
24004 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
24005 Move definitions to Altivec stanza.
24006 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
24009 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24012 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
24013 stepped vector support.
24015 2023-08-09 liuhongt <hongtao.liu@intel.com>
24017 * common/config/i386/cpuinfo.h (get_available_features):
24018 Rename local variable subleaf_level to max_subleaf_level.
24020 2023-08-09 Richard Biener <rguenther@suse.de>
24022 PR rtl-optimization/110587
24023 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
24025 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
24027 PR tree-optimization/110248
24028 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
24029 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
24030 legitimate when outer code is PLUS.
24032 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
24034 PR tree-optimization/110248
24035 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
24036 type code_helper and pass it to targetm.addr_space.legitimate_address_p
24037 instead of ERROR_MARK.
24038 (offsettable_address_addr_space_p): Update one function pointer with
24039 one more argument of type code_helper as its assignees
24040 memory_address_addr_space_p and strict_memory_address_addr_space_p
24041 have been adjusted, and adjust some call sites with ERROR_MARK.
24042 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
24043 (memory_address_addr_space_p): Adjust with one more unnamed argument
24044 of type code_helper with default ERROR_MARK.
24045 (strict_memory_address_addr_space_p): Likewise.
24046 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
24047 argument of type code_helper.
24048 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
24049 type code_helper and pass it to memory_address_addr_space_p.
24050 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
24051 one more unnamed argument of type code_helper with default value
24053 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
24054 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
24055 pass it to all valid_mem_ref_p calls.
24057 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
24059 PR tree-optimization/110248
24060 * coretypes.h (class code_helper): Add forward declaration.
24061 * doc/tm.texi: Regenerate.
24062 * lra-constraints.cc (valid_address_p): Call target hook
24063 targetm.addr_space.legitimate_address_p with an extra parameter
24064 ERROR_MARK as its prototype changes.
24065 * recog.cc (memory_address_addr_space_p): Likewise.
24066 * reload.cc (strict_memory_address_addr_space_p): Likewise.
24067 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
24068 Extend with one more argument of type code_helper, update the
24069 documentation accordingly.
24070 * targhooks.cc (default_legitimate_address_p): Adjust for the
24071 new code_helper argument.
24072 (default_addr_space_legitimate_address_p): Likewise.
24073 * targhooks.h (default_legitimate_address_p): Likewise.
24074 (default_addr_space_legitimate_address_p): Likewise.
24075 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
24076 with extra unnamed code_helper argument with default ERROR_MARK.
24077 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
24078 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
24079 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
24080 (tree.h): New include for tree_code ERROR_MARK.
24081 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
24082 unnamed code_helper argument with default ERROR_MARK.
24083 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
24084 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
24085 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
24086 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
24087 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
24088 (tree.h): New include for tree_code ERROR_MARK.
24089 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
24090 unnamed code_helper argument with default ERROR_MARK.
24091 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
24092 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
24094 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
24095 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
24096 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
24097 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
24098 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
24099 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
24100 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
24101 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
24102 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
24104 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
24105 (m32c_addr_space_legitimate_address_p): Likewise.
24106 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
24107 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
24108 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
24109 * config/microblaze/microblaze-protos.h (tree.h): New include for
24110 tree_code ERROR_MARK.
24111 (microblaze_legitimate_address_p): Adjust with extra unnamed
24112 code_helper argument with default ERROR_MARK.
24113 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
24115 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
24116 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
24117 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
24118 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
24119 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
24120 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
24121 argument with default ERROR_MARK and adjust the call to function
24122 msp430_legitimate_address_p.
24123 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
24124 unnamed code_helper argument with default ERROR_MARK.
24125 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
24126 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
24127 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
24128 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
24129 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
24130 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
24131 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
24132 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
24133 (tree.h): New include for tree_code ERROR_MARK.
24134 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
24135 extra unnamed code_helper argument with default ERROR_MARK.
24136 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
24137 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
24138 argument and adjust the call to function rs6000_legitimate_address_p.
24139 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
24140 unnamed code_helper argument with default ERROR_MARK.
24141 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
24142 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
24143 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
24144 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
24145 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
24146 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
24147 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
24148 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
24150 (tree.h): New include for tree_code ERROR_MARK.
24151 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
24152 Adjust with extra unnamed code_helper argument with default
24155 2023-08-09 liuhongt <hongtao.liu@intel.com>
24157 * common/config/i386/cpuinfo.h (get_available_features): Check
24158 EAX for valid subleaf before use CPUID.
24160 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
24162 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
24163 for the temporary when canonicalizing the condition.
24165 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
24167 * config/bpf/core-builtins.cc: Cleaned include headers.
24168 (struct cr_builtins): Added GTY.
24169 (cr_builtins_ref): Created.
24170 (builtins_data) Changed to GC root.
24171 (allocate_builtin_data): Changed.
24172 Included gt-core-builtins.h.
24173 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
24174 (bpf_core_extra_ref): Created.
24175 (bpf_comment_info): Changed to GC root.
24176 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
24178 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
24181 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
24182 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
24183 upper part of V2SFmode register with -fno-trapping-math.
24184 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
24186 (<smaxmin:code>v2sf3): Ditto.
24187 (sqrtv2sf2): Ditto.
24188 (*mmx_haddv2sf3_low): Ditto.
24189 (*mmx_hsubv2sf3_low): Ditto.
24190 (vec_addsubv2sf3): Ditto.
24191 (vec_cmpv2sfv2si): Ditto.
24192 (vcond<V2FI:mode>v2sf): Ditto.
24195 (fnmav2sf4): Ditto.
24196 (fnmsv2sf4): Ditto.
24197 (fix_truncv2sfv2si2): Ditto.
24198 (fixuns_truncv2sfv2si2): Ditto.
24199 (floatv2siv2sf2): Ditto.
24200 (floatunsv2siv2sf2): Ditto.
24201 (nearbyintv2sf2): Ditto.
24202 (rintv2sf2): Ditto.
24203 (lrintv2sfv2si2): Ditto.
24204 (ceilv2sf2): Ditto.
24205 (lceilv2sfv2si2): Ditto.
24206 (floorv2sf2): Ditto.
24207 (lfloorv2sfv2si2): Ditto.
24208 (btruncv2sf2): Ditto.
24209 (roundv2sf2): Ditto.
24210 (lroundv2sfv2si2): Ditto.
24211 * doc/invoke.texi (x86 Options): Document
24212 -mpartial-vector-fp-math option.
24214 2023-08-08 Andrew Pinski <apinski@marvell.com>
24216 PR tree-optimization/103281
24217 PR tree-optimization/28794
24218 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
24220 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
24221 (simplify_using_ranges::simplify_casted_cond): Rename to ...
24222 (simplify_using_ranges::simplify_casted_compare): This
24223 and change arguments to take op0 and op1.
24224 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
24225 (simplify_using_ranges::simplify): For tcc_comparison assignments call
24226 simplify_compare_assign_using_ranges_1.
24227 * vr-values.h (simplify_using_ranges): Add
24228 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
24229 Rename simplify_casted_cond and simplify_casted_compare and
24230 update argument types.
24232 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24234 * genmatch.cc: Log line numbers indirectly.
24236 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24238 * genmatch.cc: Make sinfo map ordered.
24239 * Makefile.in: Require the ordered map header for genmatch.o.
24241 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
24243 * ordered-hash-map.h: Add get_or_insert.
24244 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
24246 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24248 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
24249 (cond_len_<optab><mode>): Ditto.
24250 (cond_fma<mode>): Ditto.
24251 (cond_len_fma<mode>): Ditto.
24252 (cond_fnma<mode>): Ditto.
24253 (cond_len_fnma<mode>): Ditto.
24254 (cond_fms<mode>): Ditto.
24255 (cond_len_fms<mode>): Ditto.
24256 (cond_fnms<mode>): Ditto.
24257 (cond_len_fnms<mode>): Ditto.
24258 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
24260 (enum insn_type): Add new enum type.
24261 (prepare_ternary_operands): New function.
24262 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
24263 (emit_nonvlmax_tumu_insn): Ditto.
24264 (emit_nonvlmax_fp_tumu_insn): Ditto.
24265 (expand_cond_len_binop): Add condtional operations.
24266 (expand_cond_len_ternop): Ditto.
24267 (prepare_ternary_operands): New function.
24268 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
24269 riscv_get_v_regno_alignment as global scope.
24270 * config/riscv/vector.md: Fix ternary bugs.
24272 2023-08-08 Richard Biener <rguenther@suse.de>
24274 PR tree-optimization/49955
24275 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
24276 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
24277 * tree-vect-slp.cc (vect_free_slp_instance): Release
24278 SLP_INSTANCE_REMAIN_STMTS.
24279 (vect_build_slp_instance): Make the number of lanes of
24280 a BB reduction even.
24281 (vectorize_slp_instance_root_stmt): Handle unvectorized
24282 defs of a BB reduction.
24284 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24286 * internal-fn.cc (get_len_internal_fn): New function.
24287 (DEF_INTERNAL_COND_FN): Ditto.
24288 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
24289 * internal-fn.h (get_len_internal_fn): Ditto.
24290 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
24292 2023-08-08 Richard Biener <rguenther@suse.de>
24294 PR tree-optimization/110924
24295 * tree-ssa-live.h (virtual_operand_live): Update comment.
24296 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
24297 optimization, look at each predecessor.
24298 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
24300 2023-08-08 yulong <shiyulong@iscas.ac.cn>
24302 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
24304 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24306 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
24307 * config/riscv/vector.md: Ditto.
24309 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24311 * config/riscv/autovec.md: Add VLS shift.
24313 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24315 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
24316 * config/riscv/vector-iterators.md: Ditto.
24317 * config/riscv/vector.md: Ditto.
24319 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
24321 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
24323 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24325 * configure: Regenerate.
24327 2023-08-07 John Ericson <git@JohnEricson.me>
24329 * configure: Regenerate.
24331 2023-08-07 Alan Modra <amodra@gmail.com>
24333 * configure: Regenerate.
24335 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
24337 * configure: Regenerate.
24339 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24341 * configure: Regenerate.
24343 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
24345 * configure: Regenerate.
24347 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
24349 * configure: Regenerate.
24351 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
24353 * configure: Regenerate.
24355 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
24357 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
24358 VOIDmode operands to conditional before canonicalization.
24360 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
24362 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
24363 (find_oldest_value_reg): Inline stack_pointer_rtx check.
24364 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
24366 2023-08-07 Martin Jambor <mjambor@suse.cz>
24369 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
24370 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
24371 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
24372 (ptr_parm_has_nonarg_uses): Likewise.
24373 * ipa-param-manipulation.cc
24374 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
24375 (ipa_param_body_adjustments::mark_dead_statements): Move initial
24376 checks to get_ddef_if_exists_and_is_used.
24377 (ipa_param_body_adjustments::mark_clobbers_dead): New.
24378 (ipa_param_body_adjustments::common_initialization): Call
24379 mark_clobbers_dead when splitting.
24381 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
24383 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
24384 as an argument and pass it to riscv_emit_int_order_test.
24385 (riscv_expand_conditional_move): Handle cases where the condition
24386 is not EQ/NE or the second argument to the conditional is not
24388 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
24389 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24391 2023-08-07 Andrew Pinski <apinski@marvell.com>
24393 PR tree-optimization/109959
24394 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
24397 2023-08-07 Richard Biener <rguenther@suse.de>
24399 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
24400 calculate post-dominators. Calculate RPO on the inverted
24401 graph and process blocks in that order.
24403 2023-08-07 liuhongt <hongtao.liu@intel.com>
24406 * config/i386/i386-protos.h
24407 (vpternlog_redundant_operand_mask): Adjust parameter type.
24408 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
24409 INTVAL instead of XINT, also adjust parameter type from rtx*
24410 to rtx since the function only needs operands[4] in vpternlog
24412 (substitute_vpternlog_operands): Pass operands[4] instead of
24413 operands to vpternlog_redundant_operand_mask.
24414 * config/i386/sse.md: Ditto.
24416 2023-08-07 Richard Biener <rguenther@suse.de>
24418 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
24419 around dumping code.
24421 2023-08-07 liuhongt <hongtao.liu@intel.com>
24424 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
24425 to define_expand and break into ..
24426 (<insn>v4hf3): .. this.
24427 (divv4hf3): .. this.
24428 (<insn>v2hf3): .. this.
24429 (divv2hf3): .. this.
24430 (movd_v2hf_to_sse): New define_expand.
24431 (movq_<mode>_to_sse): Extend to V4HFmode.
24432 (mmxdoublevecmode): Ditto.
24433 (V2FI_V4HF): New mode iterator.
24434 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
24435 by using mode iterator V4SF_V8HF, renamed to ..
24436 (*vec_concat<mode>): .. this.
24437 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
24438 iterator V4SF_V8HF, renamed to ..
24439 (*vec_concat<mode>_0): .. this.
24440 (*vec_concatv8hf_movss): New define_insn.
24441 (V4SF_V8HF): New mode iterator.
24443 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24445 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
24447 2023-08-07 Jan Beulich <jbeulich@suse.com>
24449 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
24450 (*mmx_pinsrb): Likewise.
24451 (*mmx_pextrb): Likewise.
24452 (*mmx_pextrb_zext): Likewise.
24453 (mmx_pshufbv8qi3): Likewise.
24454 (mmx_pshufbv4qi3): Likewise.
24455 (mmx_pswapdv2si2): Likewise.
24456 (*pinsrb): Likewise.
24457 (*pextrb): Likewise.
24458 (*pextrb_zext): Likewise.
24459 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
24460 (*sse2_eq<mode>3): Likewise.
24461 (*sse2_gt<mode>3): Likewise.
24462 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
24463 (*vec_extract<mode>): Likewise.
24464 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
24465 (*vec_extractv16qi_zext): Likewise.
24466 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
24467 (ssse3_pmaddubsw128): Likewise.
24468 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
24469 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
24470 (<ssse3_avx2>_psign<mode>3): Likewise.
24471 (<ssse3_avx2>_palignr<mode>): Likewise.
24472 (*abs<mode>2): Likewise.
24473 (sse4_2_pcmpestr): Likewise.
24474 (sse4_2_pcmpestri): Likewise.
24475 (sse4_2_pcmpestrm): Likewise.
24476 (sse4_2_pcmpestr_cconly): Likewise.
24477 (sse4_2_pcmpistr): Likewise.
24478 (sse4_2_pcmpistri): Likewise.
24479 (sse4_2_pcmpistrm): Likewise.
24480 (sse4_2_pcmpistr_cconly): Likewise.
24481 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
24482 (vgf2p8affineqb_<mode><mask_name>): Likewise.
24483 (vgf2p8mulb_<mode><mask_name>): Likewise.
24484 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
24486 (*<code>v16qi3 [umaxmin]): Likewise.
24488 2023-08-07 Jan Beulich <jbeulich@suse.com>
24490 * config/i386/i386.md (sse4_1_round<mode>2): Make
24491 "length_immediate" uniformly 1.
24492 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
24493 (mmx_pblendvb_<mode>): Likewise.
24495 2023-08-07 Jan Beulich <jbeulich@suse.com>
24497 * config/i386/sse.md
24498 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
24499 "prefix" attribute.
24500 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
24503 2023-08-07 Jan Beulich <jbeulich@suse.com>
24505 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
24506 "prefix_extra", and "mode" attributes.
24507 (xop_phadd<u>bd): Likewise.
24508 (xop_phadd<u>bq): Likewise.
24509 (xop_phadd<u>wd): Likewise.
24510 (xop_phadd<u>wq): Likewise.
24511 (xop_phadd<u>dq): Likewise.
24512 (xop_phsubbw): Likewise.
24513 (xop_phsubwd): Likewise.
24514 (xop_phsubdq): Likewise.
24515 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
24516 (xop_rotr<mode>3): Likewise.
24517 (xop_frcz<mode>2): Likewise.
24518 (*xop_vmfrcz<mode>2): Likewise.
24519 (xop_vrotl<mode>3): Add "prefix" attribute. Change
24520 "prefix_extra" to 1.
24521 (xop_sha<mode>3): Likewise.
24522 (xop_shl<mode>3): Likewise.
24524 2023-08-07 Jan Beulich <jbeulich@suse.com>
24526 * config/i386/sse.md
24527 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
24529 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
24530 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
24531 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
24532 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
24533 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
24534 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
24535 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
24536 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
24537 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
24538 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
24539 (vec_extract_lo_v64qi): Likewise.
24540 (vec_extract_hi_v64qi): Likewise.
24541 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
24542 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
24543 (*avx512f_<code><mode>3<mask_name>): Likewise.
24544 (*vec_extractv4ti): Likewise.
24545 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
24546 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
24547 Add "length_immediate".
24549 2023-08-07 Jan Beulich <jbeulich@suse.com>
24551 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
24553 (@rdseed<mode>): Likewise.
24554 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
24555 Adjust "prefix_extra".
24556 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
24557 (*sse4_1_<code><mode>3<mask_name>): Likewise.
24558 (*avx2_eq<mode>3): Likewise.
24559 (avx2_gt<mode>3): Likewise.
24560 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
24561 (*vec_extract<mode>): Likewise.
24562 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
24564 2023-08-07 Jan Beulich <jbeulich@suse.com>
24566 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
24567 "prefix_rep". Drop "prefix_extra".
24568 (wr<fsgs>base<mode>): Likewise.
24569 (ptwrite<mode>): Likewise.
24571 2023-08-07 Jan Beulich <jbeulich@suse.com>
24573 * config/i386/i386.md (isa): Move up.
24574 (length_immediate): Handle "fma4".
24575 (prefix): Handle "ssemuladd".
24576 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
24577 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
24579 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
24580 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
24581 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
24583 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
24584 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
24585 (*fma_fnmadd_<mode>): Likewise.
24586 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
24588 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
24589 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
24590 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
24592 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
24593 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
24594 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
24596 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
24597 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
24598 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
24600 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
24601 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
24602 (*fmai_fmadd_<mode>): Likewise.
24603 (*fmai_fmsub_<mode>): Likewise.
24604 (*fmai_fnmadd_<mode><round_name>): Likewise.
24605 (*fmai_fnmsub_<mode><round_name>): Likewise.
24606 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
24607 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
24608 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
24609 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
24610 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
24611 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
24612 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
24613 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
24614 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
24615 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
24616 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
24617 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
24618 (*fma4i_vmfmadd_<mode>): Likewise.
24619 (*fma4i_vmfmsub_<mode>): Likewise.
24620 (*fma4i_vmfnmadd_<mode>): Likewise.
24621 (*fma4i_vmfnmsub_<mode>): Likewise.
24622 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
24623 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
24624 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
24626 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
24627 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
24628 (xop_p<macs>dql): Likewise.
24629 (xop_p<macs>dqh): Likewise.
24630 (xop_p<macs>wd): Likewise.
24631 (xop_p<madcs>wd): Likewise.
24632 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
24634 2023-08-07 Jan Beulich <jbeulich@suse.com>
24636 * config/i386/i386.md (length_immediate): Handle "sse4arg".
24637 (prefix): Likewise.
24638 (*xop_pcmov_<mode>): Add "mode" attribute.
24639 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
24640 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
24641 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
24642 (*xop_pcmov_<mode>): Add "mode" attribute.
24643 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
24645 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
24646 "prefix_extra", and "length_immediate" attributes.
24647 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
24648 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
24649 and "length_immediate" attributes. Switch "type" to "sse4arg".
24650 (xop_pcom_tf<mode>3): Likewise.
24651 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
24653 2023-08-07 Jan Beulich <jbeulich@suse.com>
24655 * config/i386/i386.md (prefix_extra): Correct comment. Fold
24656 cases yielding 2 into ones yielding 1.
24658 2023-08-07 Jan Hubicka <jh@suse.cz>
24660 PR tree-optimization/106293
24661 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
24662 * tree-vect-loop.cc (vect_transform_loop): Likewise.
24664 2023-08-07 Andrew Pinski <apinski@marvell.com>
24666 PR tree-optimization/96695
24667 * match.pd (min_value, max_value): Extend to
24670 2023-08-06 Jan Hubicka <jh@suse.cz>
24672 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
24673 __builtin_expect that CPU likely supports cpuid.
24675 2023-08-06 Jan Hubicka <jh@suse.cz>
24677 * tree-loop-distribution.cc (loop_distribution::execute): Disable
24678 distribution for loops with estimated iterations 0.
24680 2023-08-06 Jan Hubicka <jh@suse.cz>
24682 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
24684 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
24686 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
24687 more Zicond patterns. Fix whitespace typo.
24688 (riscv_rtx_costs): Remove accidental code duplication.
24689 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24691 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
24694 * config/i386/i386-protos.h
24695 (vpternlog_redundant_operand_mask): Declare.
24696 (substitute_vpternlog_operands): Declare.
24697 * config/i386/i386.cc
24698 (vpternlog_redundant_operand_mask): New helper.
24699 (substitute_vpternlog_operands): New function. Use them...
24700 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
24702 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
24704 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
24705 value of -1 is equivalent to don't care.
24706 (extract_integral_bit_field): Indicate that we don't require
24707 the most significant word to be zero extended, if we're about
24709 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
24710 of -1 is equivalent to don't care. Don't clear the most
24711 significant bits with AND mask when UNSIGNEDP is -1.
24713 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
24715 * config/i386/sse.md (define_split): Convert highpart:DF extract
24716 from V2DFmode register into a sse2_storehpd instruction.
24717 (define_split): Likewise, convert lowpart:DF extract from V2DF
24718 register into a sse2_storelpd instruction.
24720 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
24722 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
24725 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
24727 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
24728 against early clobber hard regs.
24730 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24732 * doc/extend.texi: Document it.
24734 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24737 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
24738 vec_widen_<sur>shiftl_hi_<mode>): Remove.
24739 (aarch64_<sur>shll<mode>_internal): Renamed to...
24740 (aarch64_<su>shll<mode>): .. This.
24741 (aarch64_<sur>shll2<mode>_internal): Renamed to...
24742 (aarch64_<su>shll2<mode>): .. This.
24743 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
24745 * config/aarch64/constraints.md (D2, DL): New.
24746 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
24748 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24750 * gensupport.cc (conlist): Support length 0 attribute.
24752 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24754 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
24755 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
24757 2023-08-04 Tamar Christina <tamar.christina@arm.com>
24759 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
24761 (aarch64_adjust_stmt_cost): Use it.
24762 (aarch64_vector_costs::count_ops): Likewise.
24763 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
24764 aarch64_adjust_stmt_cost.
24766 2023-08-04 Richard Biener <rguenther@suse.de>
24768 PR tree-optimization/110838
24769 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
24770 Fix right-shift value sanitizing. Properly emit external
24771 def mangling in the preheader rather than in the pattern
24772 def sequence where it will fail vectorizing.
24774 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
24776 PR middle-end/110316
24778 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
24779 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
24780 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
24781 (timer::validate_phases): Use integral arithmetic to check
24783 (timer::print_row, timer::print): Convert from integral
24784 nanoseconds to floating point seconds before printing.
24785 (timer::all_zero): Change limit to nanosec count instead of
24786 fractional count of seconds.
24787 (make_json_for_timevar_time_def): Convert from integral
24788 nanoseconds to floating point seconds before recording.
24789 * timevar.h (struct timevar_time_def): Update all measurements
24790 to use uint64_t nanoseconds rather than seconds stored in a
24793 2023-08-04 Richard Biener <rguenther@suse.de>
24795 PR tree-optimization/110838
24796 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
24797 the arithmetic right-shift case to non-negative operands.
24799 2023-08-04 Pan Li <pan2.li@intel.com>
24802 2023-08-04 Pan Li <pan2.li@intel.com>
24804 * config/riscv/riscv-vector-builtins-bases.cc
24805 (class vfmacc_frm): New class for vfmacc frm.
24806 (vfmacc_frm_obj): New declaration.
24808 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24809 * config/riscv/riscv-vector-builtins-functions.def
24810 (vfmacc_frm): New function definition.
24811 * config/riscv/riscv-vector-builtins.cc
24812 (function_expander::use_ternop_insn): Add frm operand support.
24813 * config/riscv/vector.md: Add vfmuladd to frm_mode.
24815 2023-08-04 Pan Li <pan2.li@intel.com>
24818 2023-08-04 Pan Li <pan2.li@intel.com>
24820 * config/riscv/riscv-vector-builtins-bases.cc
24821 (class vfnmacc_frm): New class for vfnmacc.
24822 (vfnmacc_frm_obj): New declaration.
24824 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24825 * config/riscv/riscv-vector-builtins-functions.def
24826 (vfnmacc_frm): New function definition.
24828 2023-08-04 Pan Li <pan2.li@intel.com>
24831 2023-08-04 Pan Li <pan2.li@intel.com>
24833 * config/riscv/riscv-vector-builtins-bases.cc
24834 (class vfmsac_frm): New class for vfmsac frm.
24835 (vfmsac_frm_obj): New declaration.
24837 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24838 * config/riscv/riscv-vector-builtins-functions.def
24839 (vfmsac_frm): New function definition.
24841 2023-08-04 Pan Li <pan2.li@intel.com>
24844 2023-08-04 Pan Li <pan2.li@intel.com>
24846 * config/riscv/riscv-vector-builtins-bases.cc
24847 (class vfnmsac_frm): New class for vfnmsac frm.
24848 (vfnmsac_frm_obj): New declaration.
24850 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24851 * config/riscv/riscv-vector-builtins-functions.def
24852 (vfnmsac_frm): New function definition.
24854 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
24856 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
24857 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
24858 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
24859 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
24860 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
24861 (attiny102, attiny104): New devices.
24862 * doc/avr-mmcu.texi: Regenerate.
24864 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
24866 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
24867 and PM_OFFSET entries.
24869 2023-08-04 Andrew Pinski <apinski@marvell.com>
24871 PR tree-optimization/110874
24872 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
24873 (gimple_maybe_cmp): Likewise.
24874 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
24875 and gimple_maybe_cmp instead of being recursive.
24876 * match.pd (bit_not_with_nop): New match pattern.
24877 (maybe_cmp): Likewise.
24879 2023-08-04 Drew Ross <drross@redhat.com>
24881 PR middle-end/101955
24882 * match.pd ((signed x << c) >> c): New canonicalization.
24884 2023-08-04 Pan Li <pan2.li@intel.com>
24886 * config/riscv/riscv-vector-builtins-bases.cc
24887 (class vfnmsac_frm): New class for vfnmsac frm.
24888 (vfnmsac_frm_obj): New declaration.
24890 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24891 * config/riscv/riscv-vector-builtins-functions.def
24892 (vfnmsac_frm): New function definition.
24894 2023-08-04 Pan Li <pan2.li@intel.com>
24896 * config/riscv/riscv-vector-builtins-bases.cc
24897 (class vfmsac_frm): New class for vfmsac frm.
24898 (vfmsac_frm_obj): New declaration.
24900 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24901 * config/riscv/riscv-vector-builtins-functions.def
24902 (vfmsac_frm): New function definition.
24904 2023-08-04 Pan Li <pan2.li@intel.com>
24906 * config/riscv/riscv-vector-builtins-bases.cc
24907 (class vfnmacc_frm): New class for vfnmacc.
24908 (vfnmacc_frm_obj): New declaration.
24910 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24911 * config/riscv/riscv-vector-builtins-functions.def
24912 (vfnmacc_frm): New function definition.
24914 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
24917 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
24918 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
24920 2023-08-04 Pan Li <pan2.li@intel.com>
24922 * config/riscv/riscv-vector-builtins-bases.cc
24923 (class vfmacc_frm): New class for vfmacc frm.
24924 (vfmacc_frm_obj): New declaration.
24926 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24927 * config/riscv/riscv-vector-builtins-functions.def
24928 (vfmacc_frm): New function definition.
24929 * config/riscv/riscv-vector-builtins.cc
24930 (function_expander::use_ternop_insn): Add frm operand support.
24931 * config/riscv/vector.md: Add vfmuladd to frm_mode.
24933 2023-08-04 Pan Li <pan2.li@intel.com>
24935 * config/riscv/riscv-vector-builtins-bases.cc
24936 (vfwmul_frm_obj): New declaration.
24937 (vfwmul_frm): Ditto.
24938 * config/riscv/riscv-vector-builtins-bases.h:
24939 (vfwmul_frm): Ditto.
24940 * config/riscv/riscv-vector-builtins-functions.def
24941 (vfwmul_frm): New function definition.
24942 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
24944 2023-08-04 Pan Li <pan2.li@intel.com>
24946 * config/riscv/riscv-vector-builtins-bases.cc
24947 (binop_frm): New declaration.
24948 (reverse_binop_frm): Likewise.
24950 * config/riscv/riscv-vector-builtins-bases.h:
24951 (vfdiv_frm): New extern declaration.
24952 (vfrdiv_frm): Likewise.
24953 * config/riscv/riscv-vector-builtins-functions.def
24954 (vfdiv_frm): New function definition.
24955 (vfrdiv_frm): Likewise.
24956 * config/riscv/vector.md: Add vfdiv to frm_mode.
24958 2023-08-03 Jan Hubicka <jh@suse.cz>
24960 * tree-cfg.cc (print_loop_info): Print entry count.
24962 2023-08-03 Jan Hubicka <jh@suse.cz>
24964 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
24966 2023-08-03 Jan Hubicka <jh@suse.cz>
24968 PR bootstrap/110857
24969 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
24970 unadjusted_exit_count.
24972 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
24974 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
24977 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
24979 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
24980 various Zicond patterns.
24981 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
24982 sfb_alu_operand for both arms of the conditional move.
24983 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
24985 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
24991 * config.gcc: Added core-builtins.cc and .o files.
24992 * config/bpf/bpf-passes.def: Removed file.
24993 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
24994 bpf_replace_core_move_operands): New prototypes.
24995 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
24996 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
24997 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
24998 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
24999 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
25001 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
25002 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
25003 (mov_reloc_core<mode>): Added.
25004 * config/bpf/core-builtins.cc (struct cr_builtin, enum
25005 cr_decision struct cr_local, struct cr_final, struct
25006 core_builtin_helpers, enum bpf_plugin_states): Added types.
25007 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
25009 (allocate_builtin_data, get_builtin-data, search_builtin_data,
25010 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
25011 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
25012 bpf_core_get_index, compute_field_expr,
25013 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
25014 process_field_expr, pack_enum_value, process_enum_value, pack_type,
25015 process_type, bpf_require_core_support, make_core_relo, read_kind,
25016 kind_access_index, kind_preserve_field_info, kind_enum_value,
25017 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
25018 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
25019 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
25020 bpf_expand_core_builtin, bpf_add_core_reloc,
25021 bpf_replace_core_move_operands): Added functions.
25022 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
25023 (bpf_init_core_builtins, bpf_expand_core_builtin,
25024 bpf_resolve_overloaded_core_builtin): Added functions.
25025 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
25026 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
25027 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
25028 * config/bpf/t-bpf: Added core-builtins.o.
25029 * doc/extend.texi: Added documentation for new BPF builtins.
25031 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
25033 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
25034 ranges to the call to relation_fold_and_or.
25035 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
25036 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
25037 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
25038 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
25039 a varying op1 and op2 to call.
25040 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
25041 (operator_equal::op1_op2_relation): New float version.
25042 (operator_not_equal::op1_op2_relation): Ditto.
25043 (operator_lt::op1_op2_relation): Ditto.
25044 (operator_le::op1_op2_relation): Ditto.
25045 (operator_gt::op1_op2_relation): Ditto.
25046 (operator_ge::op1_op2_relation) Ditto.
25047 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
25049 (operator_not_equal::op1_op2_relation): Ditto.
25050 (operator_lt::op1_op2_relation): Ditto.
25051 (operator_le::op1_op2_relation): Ditto.
25052 (operator_gt::op1_op2_relation): Ditto.
25053 (operator_ge::op1_op2_relation): Ditto.
25054 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
25056 (range_operator::op1_op2_relation): Add extra params.
25057 (operator_equal::op1_op2_relation): Ditto.
25058 (operator_not_equal::op1_op2_relation): Ditto.
25059 (operator_lt::op1_op2_relation): Ditto.
25060 (operator_le::op1_op2_relation): Ditto.
25061 (operator_gt::op1_op2_relation): Ditto.
25062 (operator_ge::op1_op2_relation): Ditto.
25063 * range-op.h (range_operator): New prototypes.
25064 (range_op_handler): Ditto.
25066 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
25068 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
25069 Use identity relation.
25070 (gori_compute::compute_operand2_range): Ditto.
25071 * value-relation.cc (get_identity_relation): New.
25072 * value-relation.h (get_identity_relation): New prototype.
25074 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
25076 * value-range.h (Value_Range::set_varying): Set the type.
25077 (Value_Range::set_zero): Ditto.
25078 (Value_Range::set_nonzero): Ditto.
25080 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
25082 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
25085 2023-08-03 Pan Li <pan2.li@intel.com>
25087 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
25089 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
25091 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
25093 2023-08-03 Richard Biener <rguenther@suse.de>
25095 PR tree-optimization/110838
25096 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
25097 Adjust the shift operand of RSHIFT_EXPRs.
25099 2023-08-03 Richard Biener <rguenther@suse.de>
25101 PR tree-optimization/110702
25102 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
25103 we created a NULL pointer based access rewrite that to
25106 2023-08-03 Richard Biener <rguenther@suse.de>
25108 * tree-ssa-sink.cc: Include tree-ssa-live.h.
25109 (pass_sink_code::execute): Instantiate virtual_operand_live
25111 (sink_code_in_bb): Pass down virtual_operand_live.
25112 (statement_sink_location): Get virtual_operand_live and
25113 verify we are not sinking loads across stores by looking up
25114 the live virtual operand at the sink location.
25116 2023-08-03 Richard Biener <rguenther@suse.de>
25118 * tree-ssa-live.h (class virtual_operand_live): New.
25119 * tree-ssa-live.cc (virtual_operand_live::init): New.
25120 (virtual_operand_live::get_live_in): Likewise.
25121 (virtual_operand_live::get_live_out): Likewise.
25123 2023-08-03 Richard Biener <rguenther@suse.de>
25125 * passes.def: Exchange loop splitting and final value
25126 replacement passes.
25128 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
25130 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
25131 New function which handles bswap patterns for vec_perm_const.
25132 (vectorize_vec_perm_const_1): Call new function.
25133 * config/s390/vector.md (*bswap<mode>): Fix operands in output
25135 (*vstbr<mode>): New insn.
25137 2023-08-03 Alexandre Oliva <oliva@adacore.com>
25139 * config/vxworks-smp.opt: New. Introduce -msmp.
25140 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
25141 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
25142 lib_smp when -msmp is present in the command line.
25143 * doc/invoke.texi: Document it.
25145 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
25147 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
25148 when enabling -mno-omit-leaf-frame-pointer
25149 (riscv_option_override): Override omit-frame-pointer.
25150 (riscv_frame_pointer_required): Save s0 for non-leaf function
25151 (TARGET_FRAME_POINTER_REQUIRED): Override defination
25152 * config/riscv/riscv.opt: Add option support.
25154 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
25157 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
25158 place operand in a register before gen_<insn>64ti2_doubleword.
25159 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
25160 operand in a register before gen_<insn>32di2_doubleword.
25161 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
25162 (<any_rotate>64ti2_doubleword): Likewise.
25164 2023-08-03 Pan Li <pan2.li@intel.com>
25166 * config/riscv/riscv-vector-builtins-bases.cc
25167 (vfmul_frm_obj): New declaration.
25169 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
25170 * config/riscv/riscv-vector-builtins-functions.def
25171 (vfmul_frm): New function definition.
25172 * config/riscv/vector.md: Add vfmul to frm_mode.
25174 2023-08-03 Andrew Pinski <apinski@marvell.com>
25176 * match.pd (`~X & X`): Check that the types match.
25177 (`~x | x`, `~x ^ x`): Likewise.
25179 2023-08-03 Pan Li <pan2.li@intel.com>
25181 * config/riscv/riscv-vector-builtins-bases.h: Remove
25182 redudant declaration.
25184 2023-08-03 Pan Li <pan2.li@intel.com>
25186 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
25188 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
25189 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
25190 Add vfwsub function definitions.
25192 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
25194 PR rtl-optimization/110867
25195 * combine.cc (simplify_compare_const): Try the optimization only
25196 in case the constant fits into the comparison mode.
25198 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
25200 * config/riscv/zicond.md: Remove incorrect zicond patterns and
25201 renumber/rename them.
25202 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
25204 2023-08-02 Richard Biener <rguenther@suse.de>
25206 * tree-phinodes.h (add_phi_node_to_bb): Remove.
25207 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
25209 2023-08-02 Jan Beulich <jbeulich@suse.com>
25211 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
25212 two of the alternatives.
25214 2023-08-02 Richard Biener <rguenther@suse.de>
25216 PR tree-optimization/92335
25217 * tree-ssa-sink.cc (select_best_block): Before loop
25218 optimizations avoid sinking unconditional loads/stores
25219 in innermost loops to conditional executed places.
25221 2023-08-02 Andrew Pinski <apinski@marvell.com>
25223 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
25224 the comparison operands before comparing them.
25226 2023-08-02 Andrew Pinski <apinski@marvell.com>
25228 * match.pd (`~X & X`, `~X | X`): Move over to
25229 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
25230 handles that already.
25231 Remove range test simplifications to true/false as they
25232 are now handled by these patterns.
25234 2023-08-02 Andrew Pinski <apinski@marvell.com>
25236 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
25237 statement's lhs and rhs to check if trivial dead.
25238 Rename inserted_exprs to exprs_maybe_dce; also move it so
25239 bitmap is not allocated if not needed.
25241 2023-08-02 Pan Li <pan2.li@intel.com>
25243 * config/riscv/riscv-vector-builtins-bases.cc
25244 (class widen_binop_frm): New class for binop frm.
25245 (BASE): Add vfwadd_frm.
25246 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
25247 * config/riscv/riscv-vector-builtins-functions.def
25248 (vfwadd_frm): New function definition.
25249 * config/riscv/riscv-vector-builtins-shapes.cc
25250 (BASE_NAME_MAX_LEN): New macro.
25251 (struct alu_frm_def): Leverage new base class.
25252 (struct build_frm_base): New build base for frm.
25253 (struct widen_alu_frm_def): New struct for widen alu frm.
25254 (SHAPE): Add widen_alu_frm shape.
25255 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
25256 * config/riscv/vector.md (frm_mode): Add vfwalu type.
25258 2023-08-02 Jan Hubicka <jh@suse.cz>
25260 * cfgloop.h (loop_count_in): Declare.
25261 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
25262 (loop_count_in): Move here from ...
25263 * cfgloopmanip.cc (loop_count_in): ... here.
25264 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
25266 2023-08-02 Jan Hubicka <jh@suse.cz>
25268 * cfg.cc (scale_strictly_dominated_blocks): New function.
25269 * cfg.h (scale_strictly_dominated_blocks): Declare.
25270 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
25272 2023-08-02 Richard Biener <rguenther@suse.de>
25274 PR rtl-optimization/110587
25275 * lra-spills.cc (return_regno_p): Remove.
25276 (regno_in_use_p): Likewise.
25277 (lra_final_code_change): Do not remove noop moves
25278 between hard registers.
25280 2023-08-02 liuhongt <hongtao.liu@intel.com>
25283 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
25284 HFmode, use mode iterator VFH instead.
25285 (vec_fmsubadd<mode>4): Ditto.
25286 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
25287 Remove scalar mode from iterator, use VFH_AVX512VL instead.
25288 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
25291 2023-08-02 liuhongt <hongtao.liu@intel.com>
25293 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
25294 pre_reload define_insn_and_split.
25296 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
25298 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
25299 using Zicond to implement some conditional moves.
25301 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
25303 * config/riscv/zicond.md: Use the X iterator instead of ANYI
25304 on the comparison input operands.
25306 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
25308 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
25310 (case SET): For INSNs that just set a REG, take the cost from the
25312 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
25314 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
25316 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
25317 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
25318 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
25319 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
25320 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
25321 (OPTION_MASK_ISA_ABM_SET):
25322 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
25324 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
25326 * config/s390/s390.cc (s390_encode_section_info): Assume external
25327 symbols without explicit alignment to be unaligned if
25328 -munaligned-symbols has been specified.
25329 * config/s390/s390.opt (-munaligned-symbols): New option.
25331 2023-08-01 Richard Ball <richard.ball@arm.com>
25333 * gimple-fold.cc (fold_ctor_reference):
25334 Add support for poly_int.
25336 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
25339 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
25340 LABEL_NUSES of new conditional branch instruction.
25342 2023-08-01 Jan Hubicka <jh@suse.cz>
25344 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
25345 constant prologue peeling.
25347 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
25349 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
25351 2023-08-01 Pan Li <pan2.li@intel.com>
25352 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25354 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
25355 (STATIC_FRM_P): Ditto.
25356 (struct mode_switching_info): New struct for mode switching.
25357 (struct machine_function): Add new field mode switching.
25358 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
25359 (riscv_frm_adjust_mode_after_call): New function for call mode.
25360 (riscv_frm_emit_after_call_in_bb_end): New function for emit
25361 insn when call as the end of bb.
25362 (riscv_frm_mode_needed): New function for frm mode needed.
25363 (frm_unknown_dynamic_p): Remove call check.
25364 (riscv_mode_needed): Extrac function for frm.
25365 (riscv_frm_mode_after): Add DYN_CALL after.
25366 (riscv_mode_entry): Remove backup rtl initialization.
25367 * config/riscv/vector.md (frm_mode): Add dyn_call.
25368 (fsrmsi_restore_exit): Rename to _volatile.
25369 (fsrmsi_restore_volatile): Likewise.
25371 2023-08-01 Pan Li <pan2.li@intel.com>
25373 * config/riscv/riscv-vector-builtins-bases.cc
25374 (class reverse_binop_frm): Add new template for reversed frm.
25375 (vfsub_frm_obj): New obj.
25376 (vfrsub_frm_obj): Likewise.
25377 * config/riscv/riscv-vector-builtins-bases.h:
25378 (vfsub_frm): New declaration.
25379 (vfrsub_frm): Likewise.
25380 * config/riscv/riscv-vector-builtins-functions.def
25381 (vfsub_frm): New function define.
25382 (vfrsub_frm): Likewise.
25384 2023-08-01 Andrew Pinski <apinski@marvell.com>
25386 PR tree-optimization/93044
25387 * match.pd (nested int casts): A truncation (to the same size or smaller)
25388 can always remove the inner cast.
25390 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
25393 * doc/invoke.texi (-Wmissing-variable-declarations): Document
25396 2023-07-31 Andrew Pinski <apinski@marvell.com>
25398 PR tree-optimization/106164
25399 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
25400 `a == b | a < b`, `a == b | a > b`): Handle these cases
25403 2023-07-31 Andrew Pinski <apinski@marvell.com>
25405 PR tree-optimization/106164
25406 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
25407 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
25409 2023-07-31 Andrew Pinski <apinski@marvell.com>
25411 PR tree-optimization/100864
25412 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
25413 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
25414 (gimple_bitwise_inverted_equal_p): New function.
25415 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
25416 instead of direct matching bit_not.
25418 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
25421 * gcc-ar.cc (main): Expand argv and use
25422 temporary response file to call ar if any
25423 expansions were made.
25425 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
25427 PR tree-optimization/110582
25428 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
25429 range vector for non-ssa names.
25431 2023-07-31 David Malcolm <dmalcolm@redhat.com>
25434 * diagnostic-client-data-hooks.h (class sarif_object): New forward
25436 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
25438 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
25439 (class sarif_invocation): Inherit from sarif_object rather than
25441 (class sarif_result): Likewise.
25442 (class sarif_ice_notification): Likewise.
25443 (sarif_object::get_or_create_properties): New.
25444 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
25445 to call the context's add_sarif_invocation_properties hook.
25446 (sarif_builder::flush_to_file): Pass m_context to
25447 sarif_invocation::prepare_to_flush.
25448 * diagnostic-format-sarif.h: New header.
25449 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
25450 writes to stderr. Document that if SARIF diagnostic output is
25451 requested then any timing information is written in JSON form as
25452 part of the SARIF output, rather than to stderr.
25453 * timevar.cc: Include "json.h".
25454 (timer::named_items::m_hash_map): Split out type into...
25455 (timer::named_items::hash_map_t): ...this new typedef.
25456 (timer::named_items::make_json): New function.
25457 (timevar_diff): New function.
25458 (make_json_for_timevar_time_def): New function.
25459 (timer::timevar_def::make_json): New function.
25460 (timer::make_json): New function.
25461 * timevar.h (class json::value): New forward decl.
25462 (timer::make_json): New decl.
25463 (timer::timevar_def::make_json): New decl.
25464 * tree-diagnostic-client-data-hooks.cc: Include
25465 "diagnostic-format-sarif.h" and "timevar.h".
25466 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
25469 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
25471 * combine.cc (simplify_compare_const): Narrow comparison of
25472 memory and constant.
25473 (try_combine): Adapt new function signature.
25474 (simplify_comparison): Adapt new function signature.
25476 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
25478 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
25480 (expand_vector_init_insert_elems): Ditto.
25482 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
25485 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
25486 single_defuse_cycle while counting reduction_latency.
25488 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25490 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
25491 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
25492 (COND_ADD): Remove.
25497 (COND_RDIV): Ditto.
25500 (COND_FMIN): Ditto.
25501 (COND_FMAX): Ditto.
25509 (COND_FNMA): Ditto.
25510 (COND_FNMS): Ditto.
25512 (COND_LEN_ADD): Ditto.
25513 (COND_LEN_SUB): Ditto.
25514 (COND_LEN_MUL): Ditto.
25515 (COND_LEN_DIV): Ditto.
25516 (COND_LEN_MOD): Ditto.
25517 (COND_LEN_RDIV): Ditto.
25518 (COND_LEN_MIN): Ditto.
25519 (COND_LEN_MAX): Ditto.
25520 (COND_LEN_FMIN): Ditto.
25521 (COND_LEN_FMAX): Ditto.
25522 (COND_LEN_AND): Ditto.
25523 (COND_LEN_IOR): Ditto.
25524 (COND_LEN_XOR): Ditto.
25525 (COND_LEN_SHL): Ditto.
25526 (COND_LEN_SHR): Ditto.
25527 (COND_LEN_FMA): Ditto.
25528 (COND_LEN_FMS): Ditto.
25529 (COND_LEN_FNMA): Ditto.
25530 (COND_LEN_FNMS): Ditto.
25531 (COND_LEN_NEG): Ditto.
25532 (ADD): New macro define.
25553 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
25556 * config/i386/i386-features.cc (compute_convert_gain): Check
25557 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
25558 and V4SImode rotates in STV.
25559 (general_scalar_chain::convert_rotate): Likewise.
25561 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
25563 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
25564 * config/riscv/riscv-protos.h (get_mask_mode): Update return
25566 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
25568 (emit_vlmax_insn): Ditto.
25569 (emit_vlmax_fp_insn): Ditto.
25570 (emit_vlmax_ternary_insn): Ditto.
25571 (emit_vlmax_fp_ternary_insn): Ditto.
25572 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
25573 (emit_nonvlmax_insn): Ditto.
25574 (emit_vlmax_slide_insn): Ditto.
25575 (emit_nonvlmax_slide_tu_insn): Ditto.
25576 (emit_vlmax_merge_insn): Ditto.
25577 (emit_vlmax_masked_insn): Ditto.
25578 (emit_nonvlmax_masked_insn): Ditto.
25579 (emit_vlmax_masked_store_insn): Ditto.
25580 (emit_nonvlmax_masked_store_insn): Ditto.
25581 (emit_vlmax_masked_mu_insn): Ditto.
25582 (emit_nonvlmax_tu_insn): Ditto.
25583 (emit_nonvlmax_fp_tu_insn): Ditto.
25584 (emit_scalar_move_insn): Ditto.
25585 (emit_vlmax_compress_insn): Ditto.
25586 (emit_vlmax_reduction_insn): Ditto.
25587 (emit_vlmax_fp_reduction_insn): Ditto.
25588 (emit_nonvlmax_fp_reduction_insn): Ditto.
25589 (expand_vec_series): Ditto.
25590 (expand_vector_init_merge_repeating_sequence): Ditto.
25591 (expand_vec_perm): Ditto.
25592 (shuffle_merge_patterns): Ditto.
25593 (shuffle_compress_patterns): Ditto.
25594 (shuffle_decompress_patterns): Ditto.
25595 (expand_reduction): Ditto.
25596 (get_mask_mode): Update return type.
25597 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
25598 is valid, and use new get_mask_mode interface.
25600 2023-07-31 Pan Li <pan2.li@intel.com>
25602 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
25603 Move rm suffix before mask.
25605 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25607 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
25608 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
25611 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
25614 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
25615 (extzv<mode>): Likewise.
25616 (insv<mode>): Likewise.
25617 (*testqi_ext_3): Likewise.
25618 (*btr<mode>_2): Likewise.
25619 (define_split): Likewise.
25620 (*btsq_imm): Likewise.
25621 (*btrq_imm): Likewise.
25622 (*btcq_imm): Likewise.
25623 (define_peephole2 x3): Likewise.
25624 (*bt<mode>): Likewise
25625 (*bt<mode>_mask): New define_insn_and_split.
25626 (*jcc_bt<mode>): Use QImode for offsets.
25627 (*jcc_bt<mode>_1): Delete obsolete pattern.
25628 (*jcc_bt<mode>_mask): Use QImode offsets.
25629 (*jcc_bt<mode>_mask_1): Likewise.
25630 (define_split): Likewise.
25631 (*bt<mode>_setcqi): Likewise.
25632 (*bt<mode>_setncqi): Likewise.
25633 (*bt<mode>_setnc<mode>): Likewise.
25634 (*bt<mode>_setncqi_2): Likewise.
25635 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
25636 (bmi2_bzhi_<mode>3): Use QImode offsets.
25637 (*bmi2_bzhi_<mode>3): Likewise.
25638 (*bmi2_bzhi_<mode>3_1): Likewise.
25639 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
25640 (@tbm_bextri_<mode>): Likewise.
25642 2023-07-29 Jan Hubicka <jh@suse.cz>
25644 * profile-count.cc (profile_probability::sqrt): New member function.
25645 (profile_probability::pow): Likewise.
25646 * profile-count.h: (profile_probability::sqrt): Declare
25647 (profile_probability::pow): Likewise.
25648 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
25650 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25652 * gimple-range-cache.cc (ssa_cache::merge_range): New.
25653 (ssa_lazy_cache::merge_range): New.
25654 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
25655 (class ssa_lazy_cache): Ditto.
25656 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
25658 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25660 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
25661 Move from value-query.cc.
25662 (substitute_and_fold_engine::value_of_stmt): Ditto.
25663 (substitute_and_fold_engine::range_of_expr): New.
25664 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
25665 range_query. New prototypes.
25666 * value-query.cc (value_query::value_on_edge): Relocate.
25667 (value_query::value_of_stmt): Ditto.
25668 * value-query.h (class value_query): Remove.
25669 (class range_query): Remove base class. Adjust prototypes.
25671 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
25673 PR tree-optimization/110205
25674 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
25675 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
25676 Add final override.
25677 * range-op.cc (operator_lshift): Add missing final overrides.
25678 (operator_rshift): Ditto.
25680 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
25682 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
25683 optimizations in BPF target.
25685 2023-07-28 Honza <jh@ryzen4.suse.cz>
25687 * cfgloopmanip.cc (loop_count_in): Break out from ...
25688 (loop_exit_for_scaling): Break out from ...
25689 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
25690 add more sanity check and debug info.
25691 (scale_loop_profile): ... here.
25692 (create_empty_loop_on_edge): Fix whitespac.
25693 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
25694 * loop-unroll.cc (unroll_loop_constant_iterations): Use
25695 update_loop_exit_probability_scale_dom_bbs.
25696 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
25697 (tree_transform_and_unroll_loop): Use
25698 update_loop_exit_probability_scale_dom_bbs.
25699 * tree-ssa-loop-split.cc (split_loop): Use
25700 update_loop_exit_probability_scale_dom_bbs.
25702 2023-07-28 Jan Hubicka <jh@suse.cz>
25704 PR middle-end/77689
25705 * tree-ssa-loop-split.cc: Include value-query.h.
25706 (split_at_bb_p): Analyze cases where EQ/NE can be turned
25707 into LT/LE/GT/GE; return updated guard code.
25708 (split_loop): Use guard code.
25710 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
25711 Richard Biener <rguenther@suse.de>
25713 PR middle-end/28071
25714 PR rtl-optimization/110587
25715 * expr.cc (emit_group_load_1): Simplify logic for calling
25716 force_reg on ORIG_SRC, to avoid making a copy if the source
25717 is already in a pseudo register.
25719 2023-07-28 Jan Hubicka <jh@suse.cz>
25721 PR middle-end/106923
25722 * tree-ssa-loop-split.cc (connect_loops): Change probability
25723 of the test preconditioning second loop to very_likely.
25724 (fix_loop_bb_probability): Handle correctly case where
25725 on of the arms of the conditional is empty.
25726 (split_loop): Fold the test guarding first condition to
25727 see if it is constant true; Set correct entry block
25728 probabilities of the split loops; determine correct loop
25729 eixt probabilities.
25731 2023-07-28 xuli <xuli1@eswincomputing.com>
25733 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
25734 vsadd[u] and vssub[u].
25735 * config/riscv/vector.md: Ditto.
25737 2023-07-28 Jan Hubicka <jh@suse.cz>
25739 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
25740 loops when IV test is not overflowing.
25742 2023-07-28 liuhongt <hongtao.liu@intel.com>
25745 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
25747 (avx512cd_maskw_vec_dup<mode>): Ditto.
25749 2023-07-27 David Faust <david.faust@oracle.com>
25753 * config/bpf/bpf.opt (msmov): New option.
25754 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
25755 * config/bpf/bpf.md (*extendsidi2): New.
25756 (extendhidi2): New.
25757 (extendqidi2): New.
25758 (extendsisi2): New.
25759 (extendhisi2): New.
25760 (extendqisi2): New.
25761 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
25762 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
25763 also enables -msmov.
25765 2023-07-27 David Faust <david.faust@oracle.com>
25767 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
25768 Add -mbswap and -msdiv eBPF options.
25769 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
25770 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
25773 2023-07-27 David Faust <david.faust@oracle.com>
25775 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
25776 in pseudo-C dialect output template.
25777 (sub<AM:mode>3): Likewise.
25779 2023-07-27 Jan Hubicka <jh@suse.cz>
25781 * tree-vect-loop.cc (optimize_mask_stores): Make store
25784 2023-07-27 Jan Hubicka <jh@suse.cz>
25786 * cfgloop.h (single_dom_exit): Declare.
25787 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
25788 * cfgrtl.cc (struct cfg_hooks): Fix comment.
25789 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
25790 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
25791 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
25793 (tree_transform_and_unroll_loop): ... here;
25795 2023-07-27 Jan Hubicka <jh@suse.cz>
25797 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
25798 tree-ssa-loop-manip.cc and avoid recursion.
25799 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
25800 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
25802 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
25803 (scale_dominated_blocks_in_loop): Declare.
25804 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
25805 (change_edge_frequency): Remove.
25806 * predict.h (change_edge_frequency): Remove.
25807 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
25809 (niter_for_unrolled_loop): Remove.
25810 (tree_transform_and_unroll_loop): Fix profile update.
25812 2023-07-27 Jan Hubicka <jh@suse.cz>
25814 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
25815 to guessed; fix count of new_bb.
25817 2023-07-27 Jan Hubicka <jh@suse.cz>
25819 * profile-count.h (profile_count::apply_probability): Fix
25820 handling of uninitialized probabilities, optimize scaling
25823 2023-07-27 Richard Biener <rguenther@suse.de>
25825 PR tree-optimization/91838
25826 * gimple-match-head.cc: Include attribs.h and asan.h.
25827 * generic-match-head.cc: Likewise.
25828 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
25830 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25832 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
25833 (ADJUST_ALIGNMENT): Ditto.
25834 (ADJUST_PRECISION): Ditto.
25835 (VLS_MODES): Ditto.
25836 (VECTOR_MODE_WITH_PREFIX): Ditto.
25837 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
25838 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
25839 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
25840 (legitimize_move): Enable basic VLS modes support.
25841 (get_vlmul): Ditto.
25842 (get_ratio): Ditto.
25843 (get_vector_mode): Ditto.
25844 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
25845 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
25846 (VLS_ENTRY): New macro.
25847 (riscv_v_ext_mode_p): Add vls modes.
25848 (riscv_get_v_regno_alignment): New function.
25849 (riscv_print_operand): Add vls modes.
25850 (riscv_hard_regno_nregs): Ditto.
25851 (riscv_hard_regno_mode_ok): Ditto.
25852 (riscv_regmode_natural_size): Ditto.
25853 (riscv_vectorize_preferred_vector_alignment): Ditto.
25854 * config/riscv/riscv.md: Ditto.
25855 * config/riscv/vector-iterators.md: Ditto.
25856 * config/riscv/vector.md: Ditto.
25857 * config/riscv/autovec-vls.md: New file.
25859 2023-07-27 Pan Li <pan2.li@intel.com>
25861 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
25862 (vread_csr): Ditto.
25863 (vwrite_csr): Ditto.
25865 2023-07-27 demin.han <demin.han@starfivetech.com>
25867 * config/riscv/autovec.md: Delete which_alternative use in split
25869 2023-07-27 Richard Biener <rguenther@suse.de>
25871 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
25873 (pass_sink_code::execute): ... in the caller.
25875 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
25876 Richard Biener <rguenther@suse.de>
25878 PR tree-optimization/110776
25879 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
25882 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
25884 * config/riscv/riscv.md: Include zicond.md
25885 * config/riscv/zicond.md: New file.
25887 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
25889 * common/config/riscv/riscv-common.cc: New extension.
25890 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
25891 (TARGET_ZICOND): New target.
25893 2023-07-26 Carl Love <cel@us.ibm.com>
25895 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
25896 specifies the number of built-in arguments to check.
25897 (altivec_resolve_overloaded_builtin): Update calls to find_instance
25898 to pass the number of built-in arguments to be checked.
25900 2023-07-26 David Faust <david.faust@oracle.com>
25902 * config/bpf/bpf.opt (mv3-atomics): New option.
25903 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
25904 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
25905 (REG_CLASS_NAMES): Likewise.
25906 (REG_CLASS_CONTENTS): Likewise.
25907 (REGNO_REG_CLASS): Handle R0.
25908 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
25909 (UNSPEC_AAND): New unspec.
25910 (UNSPEC_AOR): Likewise.
25911 (UNSPEC_AXOR): Likewise.
25912 (UNSPEC_AFADD): Likewise.
25913 (UNSPEC_AFAND): Likewise.
25914 (UNSPEC_AFOR): Likewise.
25915 (UNSPEC_AFXOR): Likewise.
25916 (UNSPEC_AXCHG): Likewise.
25917 (UNSPEC_ACMPX): Likewise.
25918 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
25920 * config/bpf/atomic.md: ...Here. New file.
25921 * config/bpf/constraints.md (t): New constraint for R0.
25922 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
25924 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
25926 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
25929 2023-07-26 Carl Love <cel@us.ibm.com>
25931 * config/rs6000/rs6000-builtins.def: Rename
25932 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
25933 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
25934 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
25935 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
25936 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
25937 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
25938 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
25939 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
25940 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
25941 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
25942 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
25943 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
25944 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
25945 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
25946 * config/rs6000/rs6000-c.cc (find_instance): Add case
25947 RS6000_OVLD_VEC_REPLACE_UN.
25948 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
25949 Fix first argument type. Rename VREPLACE_UN_UV4SI as
25950 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
25951 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
25952 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
25953 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
25954 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
25955 REPLACE_ELT_V for vector modes.
25956 (REPLACE_ELT): New scalar mode iterator.
25957 (REPLACE_ELT_char): Add scalar attributes.
25958 (vreplace_un_<mode>): Change iterator and mode attribute.
25960 2023-07-26 David Malcolm <dmalcolm@redhat.com>
25963 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
25965 2023-07-26 Richard Biener <rguenther@suse.de>
25967 PR tree-optimization/106081
25968 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
25969 Assign layout -1 to splats.
25971 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
25973 * range-op-mixed.h (class operator_cast): Add update_bitmask.
25974 * range-op.cc (operator_cast::update_bitmask): New.
25975 (operator_cast::fold_range): Call update_bitmask.
25977 2023-07-26 Li Xu <xuli1@eswincomputing.com>
25979 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
25980 scalar type to float16, eliminate warning.
25981 (vfloat16mf4x3_t): Ditto.
25982 (vfloat16mf4x4_t): Ditto.
25983 (vfloat16mf4x5_t): Ditto.
25984 (vfloat16mf4x6_t): Ditto.
25985 (vfloat16mf4x7_t): Ditto.
25986 (vfloat16mf4x8_t): Ditto.
25987 (vfloat16mf2x2_t): Ditto.
25988 (vfloat16mf2x3_t): Ditto.
25989 (vfloat16mf2x4_t): Ditto.
25990 (vfloat16mf2x5_t): Ditto.
25991 (vfloat16mf2x6_t): Ditto.
25992 (vfloat16mf2x7_t): Ditto.
25993 (vfloat16mf2x8_t): Ditto.
25994 (vfloat16m1x2_t): Ditto.
25995 (vfloat16m1x3_t): Ditto.
25996 (vfloat16m1x4_t): Ditto.
25997 (vfloat16m1x5_t): Ditto.
25998 (vfloat16m1x6_t): Ditto.
25999 (vfloat16m1x7_t): Ditto.
26000 (vfloat16m1x8_t): Ditto.
26001 (vfloat16m2x2_t): Ditto.
26002 (vfloat16m2x3_t): Ditto.
26003 (vfloat16m2x4_t): Ditto.
26004 (vfloat16m4x2_t): Ditto.
26005 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
26006 * config/riscv/vector.md: add tuple mode in attr sew.
26008 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
26011 * config/i386/i386.md (plusminusmult): New code iterator.
26012 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
26013 (movq_<mode>_to_sse): New expander.
26014 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
26015 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
26016 as a wrapper around V4SFmode operation.
26017 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
26018 nonimmediate_operand.
26019 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
26020 operand 2 predicates to nonimmediate_operand.
26021 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
26022 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
26023 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
26024 operand 2 predicates to nonimmediate_operand.
26025 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
26026 nonimmediate_operand.
26027 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
26028 operand 2 predicates to nonimmediate_operand.
26029 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
26030 (<smaxmin:code>v2sf3): Ditto.
26031 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
26032 predicates to nonimmediate_operand.
26033 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
26034 operand 1 and operand 2 predicates to nonimmediate_operand.
26035 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
26036 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
26037 (*mmx_haddv2sf3_low): Ditto.
26038 (*mmx_hsubv2sf3_low): Ditto.
26039 (vec_addsubv2sf3): Ditto.
26040 (*mmx_maskcmpv2sf3_comm): Remove.
26041 (*mmx_maskcmpv2sf3): Remove.
26042 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
26043 (vcond<V2FI:mode>v2sf): Ditto.
26046 (fnmav2sf4): Ditto.
26047 (fnmsv2sf4): Ditto.
26048 (fix_truncv2sfv2si2): Ditto.
26049 (fixuns_truncv2sfv2si2): Ditto.
26050 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
26051 Change operand 1 predicate to nonimmediate_operand.
26052 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
26053 (floatunsv2siv2sf2): Ditto.
26054 (mmx_floatv2siv2sf2): Remove SSE alternatives.
26055 Change operand 1 predicate to nonimmediate_operand.
26056 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
26057 (rintv2sf2): Ditto.
26058 (lrintv2sfv2si2): Ditto.
26059 (ceilv2sf2): Ditto.
26060 (lceilv2sfv2si2): Ditto.
26061 (floorv2sf2): Ditto.
26062 (lfloorv2sfv2si2): Ditto.
26063 (btruncv2sf2): Ditto.
26064 (roundv2sf2): Ditto.
26065 (lroundv2sfv2si2): Ditto.
26066 (*mmx_roundv2sf2): Remove.
26068 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
26070 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
26072 2023-07-26 Richard Biener <rguenther@suse.de>
26074 PR tree-optimization/110799
26075 * tree-ssa-pre.cc (compute_avail): More thoroughly match
26076 up TBAA behavior of redundant loads.
26078 2023-07-26 Jakub Jelinek <jakub@redhat.com>
26080 PR tree-optimization/110755
26081 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
26082 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
26083 it is exact op1 + (-op1) or op1 - op1.
26085 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
26088 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
26089 operands output with "x".
26091 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
26093 * range-op.cc (class operator_absu): Add update_bitmask.
26094 (operator_absu::update_bitmask): New.
26096 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
26098 * range-op-mixed.h (class operator_abs): Add update_bitmask.
26099 * range-op.cc (operator_abs::update_bitmask): New.
26101 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
26103 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
26104 * range-op.cc (operator_bitwise_not::update_bitmask): New.
26106 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
26108 * range-op.cc (update_known_bitmask): Handle unary operators.
26110 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
26112 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
26114 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
26116 * config/riscv/riscv.md: Likewise.
26118 2023-07-26 Jan Hubicka <jh@suse.cz>
26120 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
26121 if we divide by zero.
26123 2023-07-25 David Faust <david.faust@oracle.com>
26125 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
26126 enclosing parentheses for pseudo-C dialect.
26127 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
26128 operands of pseudo-C dialect output templates where needed.
26129 (zero_extendqidi2): Likewise.
26130 (zero_extendsidi2): Likewise.
26131 (*mov<MM:mode>): Likewise.
26133 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
26135 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
26136 (bit_value_mult_const): Same.
26137 (get_individual_bits): Same.
26139 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
26142 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
26143 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
26144 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
26145 (minmax_op): New int attribute.
26146 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
26147 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
26148 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
26149 pattern to fmaxdf3.
26150 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
26152 2023-07-24 David Faust <david.faust@oracle.com>
26154 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
26156 2023-07-24 Drew Ross <drross@redhat.com>
26157 Jakub Jelinek <jakub@redhat.com>
26159 PR middle-end/109986
26160 * generic-match-head.cc (bitwise_equal_p): New macro.
26161 * gimple-match-head.cc (bitwise_equal_p): New macro.
26162 (gimple_nop_convert): Declare.
26163 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
26164 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
26166 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
26168 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
26169 single quote rather than backquote in diagnostic.
26171 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
26174 * config/bpf/bpf.opt: New command-line option -msdiv.
26175 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
26176 * config/bpf/bpf.cc (bpf_option_override): Initialize
26178 * doc/invoke.texi (eBPF Options): Document -msdiv.
26180 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
26182 * config/riscv/riscv.cc (riscv_option_override): Spell out
26183 greater than and use cannot in diagnostic string.
26185 2023-07-24 Richard Biener <rguenther@suse.de>
26187 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
26188 (_slp_tree::vec_stmts): Remove.
26189 (SLP_TREE_VEC_STMTS): Remove.
26190 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
26191 (_slp_tree::_slp_tree): Adjust.
26192 (_slp_tree::~_slp_tree): Likewise.
26193 (vect_get_slp_vect_def): Simplify.
26194 (vect_get_slp_defs): Likewise.
26195 (vect_transform_slp_perm_load_1): Adjust.
26196 (vect_add_slp_permutation): Likewise.
26197 (vect_schedule_slp_node): Likewise.
26198 (vectorize_slp_instance_root_stmt): Likewise.
26199 (vect_schedule_scc): Likewise.
26200 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
26201 (vectorizable_call): Likewise.
26202 (vectorizable_call): Likewise.
26203 (vect_create_vectorized_demotion_stmts): Likewise.
26204 (vectorizable_conversion): Likewise.
26205 (vectorizable_assignment): Likewise.
26206 (vectorizable_shift): Likewise.
26207 (vectorizable_operation): Likewise.
26208 (vectorizable_load): Likewise.
26209 (vectorizable_condition): Likewise.
26210 (vectorizable_comparison): Likewise.
26211 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
26212 (vectorize_fold_left_reduction): Use push_vec_def.
26213 (vect_transform_reduction): Likewise.
26214 (vect_transform_cycle_phi): Likewise.
26215 (vectorizable_lc_phi): Likewise.
26216 (vectorizable_phi): Likewise.
26217 (vectorizable_recurr): Likewise.
26218 (vectorizable_induction): Likewise.
26219 (vectorizable_live_operation): Likewise.
26221 2023-07-24 Richard Biener <rguenther@suse.de>
26223 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
26225 2023-07-24 Richard Biener <rguenther@suse.de>
26227 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
26228 * config/i386/i386-expand.cc: Likewise.
26229 * config/i386/i386-features.cc: Likewise.
26230 * config/i386/i386-options.cc: Likewise.
26232 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
26234 * tree-vect-stmts.cc (vectorizable_conversion): Handle
26235 more demotion/promotion for modifier == NONE.
26237 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
26242 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
26243 (extzv<mode>): Likewise.
26244 (insv<mode>): Likewise.
26245 (*testqi_ext_3): Likewise.
26246 (*btr<mode>_2): Likewise.
26247 (define_split): Likewise.
26248 (*btsq_imm): Likewise.
26249 (*btrq_imm): Likewise.
26250 (*btcq_imm): Likewise.
26251 (define_peephole2 x3): Likewise.
26252 (*bt<mode>): Likewise
26253 (*bt<mode>_mask): New define_insn_and_split.
26254 (*jcc_bt<mode>): Use QImode for offsets.
26255 (*jcc_bt<mode>_1): Delete obsolete pattern.
26256 (*jcc_bt<mode>_mask): Use QImode offsets.
26257 (*jcc_bt<mode>_mask_1): Likewise.
26258 (define_split): Likewise.
26259 (*bt<mode>_setcqi): Likewise.
26260 (*bt<mode>_setncqi): Likewise.
26261 (*bt<mode>_setnc<mode>): Likewise.
26262 (*bt<mode>_setncqi_2): Likewise.
26263 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
26264 (bmi2_bzhi_<mode>3): Use QImode offsets.
26265 (*bmi2_bzhi_<mode>3): Likewise.
26266 (*bmi2_bzhi_<mode>3_1): Likewise.
26267 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
26268 (@tbm_bextri_<mode>): Likewise.
26270 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
26272 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
26273 * config/bpf/bpf.opt (mkernel): Remove option.
26274 * config/bpf/bpf.cc (bpf_target_macros): Do not define
26275 BPF_KERNEL_VERSION_CODE.
26277 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
26280 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
26281 (mbswap): New option.
26282 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
26283 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
26284 * config/bpf/bpf.md: Use bswap instructions if available for
26285 bswap* insn, and fix constraint.
26286 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
26288 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26290 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
26291 (mask_len_fold_left_plus_<mode>): Ditto.
26292 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26293 (enum reduction_type): Ditto.
26294 (expand_reduction): Add in-order reduction.
26295 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
26296 (expand_reduction): Add in-order reduction.
26298 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26300 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
26301 (vectorize_fold_left_reduction): Ditto.
26302 (vectorizable_reduction): Ditto.
26303 (vect_transform_reduction): Ditto.
26305 2023-07-24 Richard Biener <rguenther@suse.de>
26307 PR tree-optimization/110777
26308 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
26309 Avoid propagating abnormals.
26311 2023-07-24 Richard Biener <rguenther@suse.de>
26313 PR tree-optimization/110766
26314 * tree-scalar-evolution.cc
26315 (analyze_and_compute_bitwise_induction_effect): Check the PHI
26316 is defined in the loop header.
26318 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
26320 PR tree-optimization/110740
26321 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
26322 loop with a single scalar iteration.
26324 2023-07-24 Pan Li <pan2.li@intel.com>
26326 * config/riscv/riscv-vector-builtins-shapes.cc
26327 (struct alu_frm_def): Take range check.
26329 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
26332 * config/riscv/predicates.md (const_0_operand): Add back
26335 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
26337 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
26338 64-bit insertions into TImode optimizations with -O0, unless
26339 the function has the "naked" attribute (for PR target/110533).
26341 2023-07-22 Andrew Pinski <apinski@marvell.com>
26344 * rtl.h (extended_count): Change last argument type
26347 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
26349 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
26350 (extzv<mode>): Likewise.
26351 (insv<mode>): Likewise.
26352 (*testqi_ext_3): Likewise.
26353 (*btr<mode>_2): Likewise.
26354 (define_split): Likewise.
26355 (*btsq_imm): Likewise.
26356 (*btrq_imm): Likewise.
26357 (*btcq_imm): Likewise.
26358 (define_peephole2 x3): Likewise.
26359 (*bt<mode>): Likewise
26360 (*bt<mode>_mask): New define_insn_and_split.
26361 (*jcc_bt<mode>): Use QImode for offsets.
26362 (*jcc_bt<mode>_1): Delete obsolete pattern.
26363 (*jcc_bt<mode>_mask): Use QImode offsets.
26364 (*jcc_bt<mode>_mask_1): Likewise.
26365 (define_split): Likewise.
26366 (*bt<mode>_setcqi): Likewise.
26367 (*bt<mode>_setncqi): Likewise.
26368 (*bt<mode>_setnc<mode>): Likewise.
26369 (*bt<mode>_setncqi_2): Likewise.
26370 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
26371 (bmi2_bzhi_<mode>3): Use QImode offsets.
26372 (*bmi2_bzhi_<mode>3): Likewise.
26373 (*bmi2_bzhi_<mode>3_1): Likewise.
26374 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
26375 (@tbm_bextri_<mode>): Likewise.
26377 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
26379 * config/bfin/bfin.md (ones): Fix length computation.
26381 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
26383 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
26384 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
26385 instead of FRAME_POINTER_REGNUM to spill pseudos.
26387 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
26388 Richard Biener <rguenther@suse.de>
26391 * gimplify.cc (gimplify_compound_lval): If the array's type
26392 is error_mark_node then return GS_ERROR.
26394 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
26397 * config/bpf/bpf.opt: Added option -masm=<dialect>.
26398 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
26399 * config/bpf/bpf.cc (bpf_print_register): New function.
26400 (bpf_print_register): Support pseudo-c syntax for registers.
26401 (bpf_print_operand_address): Likewise.
26402 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
26403 (ASSEMBLER_DIALECT): Define.
26404 * config/bpf/bpf.md: Added pseudo-c templates.
26405 * doc/invoke.texi (-masm=): New eBPF option item.
26407 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
26409 * config/bpf/bpf.md: fixed template for neg instruction.
26411 2023-07-21 Jan Hubicka <jh@suse.cz>
26414 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
26415 profiles by vectorization factor.
26416 (vect_transform_loop): Check for flat profiles.
26418 2023-07-21 Jan Hubicka <jh@suse.cz>
26420 * cfgloop.h (maybe_flat_loop_profile): Declare
26421 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
26422 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
26424 2023-07-21 Jan Hubicka <jh@suse.cz>
26426 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
26427 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
26428 * predict.cc (estimate_bb_frequencies): Likewise.
26429 * profile.cc (branch_prob): Likewise.
26430 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
26432 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
26434 * config.in: Regenerate.
26435 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
26436 (LINK_COMMAND_SPEC_A): Add demangle handling.
26437 * configure: Regenerate.
26438 * configure.ac: Detect linker support for '-demangle'.
26440 2023-07-21 Jan Hubicka <jh@suse.cz>
26442 * sreal.cc (sreal::to_nearest_int): New.
26443 (sreal_verify_basics): Verify also to_nearest_int.
26444 (verify_aritmetics): Likewise.
26445 (sreal_verify_conversions): New.
26446 (sreal_cc_tests): Call sreal_verify_conversions.
26447 * sreal.h: (sreal::to_nearest_int): Declare
26449 2023-07-21 Jan Hubicka <jh@suse.cz>
26451 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
26452 (should_duplicate_loop_header_p): Return info on profitability.
26453 (do_while_loop_p): Watch for constant conditionals.
26454 (update_profile_after_ch): Do not sanity check that all
26455 static exits are taken.
26456 (ch_base::copy_headers): Run on all loops.
26457 (pass_ch::process_loop_p): Improve heuristics by handling also
26458 do_while loop and duplicating shortest sequence containing all
26461 2023-07-21 Jan Hubicka <jh@suse.cz>
26463 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
26464 tests first; update finite_p flag.
26466 2023-07-21 Jan Hubicka <jh@suse.cz>
26468 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
26469 * cfgloop.h (print_loop_info): Declare.
26470 * tree-cfg.cc (print_loop_info): Break out from ...; add
26471 printing of missing fields and profile
26472 (print_loop): ... here.
26474 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26476 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
26478 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26480 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
26481 (vectorizable_operation): Ditto.
26483 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26485 * config/riscv/autovec.md: Align order of mask and len.
26486 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
26487 (expand_gather_scatter): Ditto.
26488 * doc/md.texi: Ditto.
26489 * internal-fn.cc (add_len_and_mask_args): Ditto.
26490 (add_mask_and_len_args): Ditto.
26491 (expand_partial_load_optab_fn): Ditto.
26492 (expand_partial_store_optab_fn): Ditto.
26493 (expand_scatter_store_optab_fn): Ditto.
26494 (expand_gather_load_optab_fn): Ditto.
26495 (internal_fn_len_index): Ditto.
26496 (internal_fn_mask_index): Ditto.
26497 (internal_len_load_store_bias): Ditto.
26498 * tree-vect-stmts.cc (vectorizable_store): Ditto.
26499 (vectorizable_load): Ditto.
26501 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26503 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
26504 (mask_len_load<mode><vm>): Ditto.
26505 (len_maskstore<mode><vm>): Ditto.
26506 (mask_len_store<mode><vm>): Ditto.
26507 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
26508 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
26509 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
26510 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
26511 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
26512 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
26513 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
26514 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
26515 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
26516 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
26517 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
26518 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
26519 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
26520 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
26521 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
26522 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
26523 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
26524 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
26525 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
26526 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
26527 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
26528 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
26529 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
26530 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
26531 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
26532 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
26533 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
26534 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
26535 * doc/md.texi: Ditto.
26536 * genopinit.cc (main): Ditto.
26537 (CMP_NAME): Ditto. Ditto.
26538 * gimple-fold.cc (arith_overflowed_p): Ditto.
26539 (gimple_fold_partial_load_store_mem_ref): Ditto.
26540 (gimple_fold_call): Ditto.
26541 * internal-fn.cc (len_maskload_direct): Ditto.
26542 (mask_len_load_direct): Ditto.
26543 (len_maskstore_direct): Ditto.
26544 (mask_len_store_direct): Ditto.
26545 (expand_call_mem_ref): Ditto.
26546 (expand_len_maskload_optab_fn): Ditto.
26547 (expand_mask_len_load_optab_fn): Ditto.
26548 (expand_len_maskstore_optab_fn): Ditto.
26549 (expand_mask_len_store_optab_fn): Ditto.
26550 (direct_len_maskload_optab_supported_p): Ditto.
26551 (direct_mask_len_load_optab_supported_p): Ditto.
26552 (direct_len_maskstore_optab_supported_p): Ditto.
26553 (direct_mask_len_store_optab_supported_p): Ditto.
26554 (internal_load_fn_p): Ditto.
26555 (internal_store_fn_p): Ditto.
26556 (internal_gather_scatter_fn_p): Ditto.
26557 (internal_fn_len_index): Ditto.
26558 (internal_fn_mask_index): Ditto.
26559 (internal_fn_stored_value_index): Ditto.
26560 (internal_len_load_store_bias): Ditto.
26561 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
26562 (MASK_LEN_GATHER_LOAD): Ditto.
26563 (LEN_MASK_LOAD): Ditto.
26564 (MASK_LEN_LOAD): Ditto.
26565 (LEN_MASK_SCATTER_STORE): Ditto.
26566 (MASK_LEN_SCATTER_STORE): Ditto.
26567 (LEN_MASK_STORE): Ditto.
26568 (MASK_LEN_STORE): Ditto.
26569 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
26570 (supports_vec_scatter_store_p): Ditto.
26571 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
26572 (target_supports_len_load_store_p): Ditto.
26573 * optabs.def (OPTAB_CD): Ditto.
26574 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
26575 (call_may_clobber_ref_p_1): Ditto.
26576 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
26577 (dse_optimize_stmt): Ditto.
26578 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
26579 (get_alias_ptr_type_for_ptr_address): Ditto.
26580 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
26581 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
26582 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
26583 (vect_get_strided_load_store_ops): Ditto.
26584 (vectorizable_store): Ditto.
26585 (vectorizable_load): Ditto.
26587 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
26589 * config/i386/i386.opt: Fix a typo.
26591 2023-07-21 Richard Biener <rguenther@suse.de>
26593 PR tree-optimization/88540
26594 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
26595 with NaNs but handle the simple case by if-converting to a
26598 2023-07-21 Andrew Pinski <apinski@marvell.com>
26600 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
26603 2023-07-21 Richard Biener <rguenther@suse.de>
26605 PR tree-optimization/110742
26606 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
26607 Do not materialize an edge permutation in an external node with
26609 (vect_slp_analyze_node_operations_1): Guard purely internal
26612 2023-07-21 Jan Hubicka <jh@suse.cz>
26614 * cfgloop.cc: Include sreal.h.
26615 (flow_loop_dump): Dump sreal iteration exsitmate.
26616 (get_estimated_loop_iterations): Update.
26617 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
26618 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
26619 (expected_loop_iterations_unbounded): Use new API.
26620 * cfgloopmanip.cc (scale_loop_profile): Use
26621 expected_loop_iterations_by_profile
26622 * predict.cc (pass_profile::execute): Likewise.
26623 * profile.cc (branch_prob): Likewise.
26624 * tree-ssa-loop-niter.cc: Include sreal.h.
26625 (estimate_numbers_of_iterations): Likewise
26627 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
26629 PR tree-optimization/110744
26630 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
26631 operand for ifn IFN_LEN_STORE.
26633 2023-07-21 liuhongt <hongtao.liu@intel.com>
26636 * common.opt: (fcf-protection=): Add EnumSet attribute to
26637 support combination of params.
26639 2023-07-21 David Malcolm <dmalcolm@redhat.com>
26641 PR middle-end/110612
26642 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
26644 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
26645 (table_geometry::table_y_to_canvas_y): Likewise.
26646 * text-art/table.h (table_geometry::m_table): Drop unused field.
26647 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
26650 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
26653 * config/i386/i386-features.cc
26654 (general_scalar_chain::compute_convert_gain): Calculate gain
26655 for extend higpart case.
26656 (general_scalar_chain::convert_op): Handle
26657 ASHIFTRT/ASHIFT combined RTX.
26658 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
26659 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
26660 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
26661 New define_insn_and_split pattern.
26662 (*extendv2di2_highpart_stv): Ditto.
26664 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
26666 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
26669 2023-07-20 Andrew Pinski <apinski@marvell.com>
26671 * combine.cc (dump_combine_stats): Remove.
26672 (dump_combine_total_stats): Remove.
26673 (total_attempts, total_merges, total_extras,
26674 total_successes): Remove.
26675 (combine_instructions): Don't increment total stats
26676 instead use statistics_counter_event.
26677 * dumpfile.cc (print_combine_total_stats): Remove.
26678 * dumpfile.h (print_combine_total_stats): Remove.
26679 (dump_combine_total_stats): Remove.
26680 * passes.cc (finish_optimization_passes):
26681 Don't call print_combine_total_stats.
26682 * rtl.h (dump_combine_total_stats): Remove.
26683 (dump_combine_stats): Remove.
26685 2023-07-20 Jan Hubicka <jh@suse.cz>
26687 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
26690 2023-07-20 Martin Jambor <mjambor@suse.cz>
26692 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
26693 (analyzer-text-art-ideal-canvas-width): Likewise.
26694 (analyzer-text-art-string-ellipsis-head-len): Likewise.
26695 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
26697 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26699 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
26700 Refine code structure.
26702 2023-07-20 Jan Hubicka <jh@suse.cz>
26704 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
26705 (get_range_query): ... this one; do
26706 (static_loop_exit): Add query parametr, turn ranger to reference.
26707 (loop_static_stmt_p): New function.
26708 (loop_static_op_p): New function.
26709 (loop_iv_derived_p): Remove.
26710 (loop_combined_static_and_iv_p): New function.
26711 (should_duplicate_loop_header_p): Discover combined onditionals;
26712 do not track iv derived; improve dumps.
26713 (pass_ch::execute): Fix whitespace.
26715 2023-07-20 Richard Biener <rguenther@suse.de>
26717 PR tree-optimization/110204
26718 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
26719 Look through copies generated by PRE.
26721 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
26723 * tree-vect-stmts.cc (get_group_load_store_type): Account for
26724 `gap` when checking if need to peel twice.
26726 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
26728 PR middle-end/77928
26729 * doc/extend.texi: Document iseqsig builtin.
26730 * builtins.cc (fold_builtin_iseqsig): New function.
26731 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
26732 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
26733 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
26735 2023-07-20 Pan Li <pan2.li@intel.com>
26737 * config/riscv/vector.md: Fix incorrect match_operand.
26739 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
26741 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
26742 force_reg, to use SUBREG rather than create a new pseudo when
26743 inserting DFmode fields into TImode with insvti_{high,low}part.
26744 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
26745 define_insn_and_split...
26746 (*concatditi3_3): 64-bit implementation. Provide alternative
26747 that allows register allocation to use SSE registers that is
26748 split into vec_concatv2di after reload.
26749 (*concatsidi3_3): 32-bit implementation.
26751 2023-07-20 Richard Biener <rguenther@suse.de>
26753 PR middle-end/61747
26754 * internal-fn.cc (expand_vec_cond_optab_fn): When the
26755 value operands are equal to the original comparison operands
26756 preserve that equality by re-using the comparison expansion.
26757 * optabs.cc (emit_conditional_move): When the value operands
26758 are equal to the comparison operands and would be forced to
26759 a register by prepare_cmp_insn do so earlier, preserving the
26762 2023-07-20 Pan Li <pan2.li@intel.com>
26764 * config/riscv/vector.md: Align pattern format.
26766 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
26768 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
26769 Granite Rapids{, D} from documentation.
26771 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26773 * config/riscv/autovec.md
26774 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
26775 Refactor RVV machine modes.
26776 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26777 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26778 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26779 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26780 (len_mask_gather_load<mode><mode>): Ditto.
26781 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26782 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
26783 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26784 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26785 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26786 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26787 (len_mask_scatter_store<mode><mode>): Ditto.
26788 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26789 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
26790 (ADJUST_NUNITS): Ditto.
26791 (ADJUST_ALIGNMENT): Ditto.
26792 (ADJUST_BYTESIZE): Ditto.
26793 (ADJUST_PRECISION): Ditto.
26794 (RVV_MODES): Ditto.
26795 (RVV_WHOLE_MODES): Ditto.
26796 (RVV_FRACT_MODE): Ditto.
26797 (RVV_NF8_MODES): Ditto.
26798 (RVV_NF4_MODES): Ditto.
26799 (VECTOR_MODES_WITH_PREFIX): Ditto.
26800 (VECTOR_MODE_WITH_PREFIX): Ditto.
26801 (RVV_TUPLE_MODES): Ditto.
26802 (RVV_NF2_MODES): Ditto.
26803 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26804 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
26806 (TUPLE_ENTRY): Ditto.
26807 (get_vlmul): Ditto.
26809 (get_ratio): Ditto.
26810 (preferred_simd_mode): Ditto.
26811 (autovectorize_vector_modes): Ditto.
26812 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
26813 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
26814 (vbool64_t): Ditto.
26815 (vbool32_t): Ditto.
26816 (vbool16_t): Ditto.
26821 (vint8mf8_t): Ditto.
26822 (vuint8mf8_t): Ditto.
26823 (vint8mf4_t): Ditto.
26824 (vuint8mf4_t): Ditto.
26825 (vint8mf2_t): Ditto.
26826 (vuint8mf2_t): Ditto.
26827 (vint8m1_t): Ditto.
26828 (vuint8m1_t): Ditto.
26829 (vint8m2_t): Ditto.
26830 (vuint8m2_t): Ditto.
26831 (vint8m4_t): Ditto.
26832 (vuint8m4_t): Ditto.
26833 (vint8m8_t): Ditto.
26834 (vuint8m8_t): Ditto.
26835 (vint16mf4_t): Ditto.
26836 (vuint16mf4_t): Ditto.
26837 (vint16mf2_t): Ditto.
26838 (vuint16mf2_t): Ditto.
26839 (vint16m1_t): Ditto.
26840 (vuint16m1_t): Ditto.
26841 (vint16m2_t): Ditto.
26842 (vuint16m2_t): Ditto.
26843 (vint16m4_t): Ditto.
26844 (vuint16m4_t): Ditto.
26845 (vint16m8_t): Ditto.
26846 (vuint16m8_t): Ditto.
26847 (vint32mf2_t): Ditto.
26848 (vuint32mf2_t): Ditto.
26849 (vint32m1_t): Ditto.
26850 (vuint32m1_t): Ditto.
26851 (vint32m2_t): Ditto.
26852 (vuint32m2_t): Ditto.
26853 (vint32m4_t): Ditto.
26854 (vuint32m4_t): Ditto.
26855 (vint32m8_t): Ditto.
26856 (vuint32m8_t): Ditto.
26857 (vint64m1_t): Ditto.
26858 (vuint64m1_t): Ditto.
26859 (vint64m2_t): Ditto.
26860 (vuint64m2_t): Ditto.
26861 (vint64m4_t): Ditto.
26862 (vuint64m4_t): Ditto.
26863 (vint64m8_t): Ditto.
26864 (vuint64m8_t): Ditto.
26865 (vfloat16mf4_t): Ditto.
26866 (vfloat16mf2_t): Ditto.
26867 (vfloat16m1_t): Ditto.
26868 (vfloat16m2_t): Ditto.
26869 (vfloat16m4_t): Ditto.
26870 (vfloat16m8_t): Ditto.
26871 (vfloat32mf2_t): Ditto.
26872 (vfloat32m1_t): Ditto.
26873 (vfloat32m2_t): Ditto.
26874 (vfloat32m4_t): Ditto.
26875 (vfloat32m8_t): Ditto.
26876 (vfloat64m1_t): Ditto.
26877 (vfloat64m2_t): Ditto.
26878 (vfloat64m4_t): Ditto.
26879 (vfloat64m8_t): Ditto.
26880 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
26881 (TUPLE_ENTRY): Ditto.
26882 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
26883 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
26884 (riscv_v_adjust_nunits): Ditto.
26885 (riscv_v_adjust_bytesize): Ditto.
26886 (riscv_v_adjust_precision): Ditto.
26887 (riscv_convert_vector_bits): Ditto.
26888 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
26889 * config/riscv/riscv.md: Ditto.
26890 * config/riscv/vector-iterators.md: Ditto.
26891 * config/riscv/vector.md
26892 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
26893 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
26894 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
26895 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
26896 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
26897 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
26898 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
26899 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
26900 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
26901 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
26902 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
26903 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
26904 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
26905 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
26906 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
26907 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
26908 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
26909 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
26910 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
26911 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
26912 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
26913 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
26914 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
26915 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
26916 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
26917 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
26918 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
26919 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
26920 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
26921 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
26922 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
26923 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
26924 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
26926 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
26928 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
26929 (lra_asm_insn_error): New prototype.
26930 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
26932 (lra_spill): Call lra_update_fp2sp_elimination.
26933 * lra-eliminations.cc: Remove trailing spaces.
26934 (elimination_fp2sp_occured_p): New static flag.
26935 (lra_eliminate_regs_1): Set the flag up.
26936 (update_reg_eliminate): Modify the assert for stack to frame
26937 pointer elimination.
26938 (lra_update_fp2sp_elimination): New function.
26939 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
26941 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
26943 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
26945 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
26946 dependencies from target pragmas.
26947 * config/aarch64/arm_fp16.h (target): Likewise.
26948 * config/aarch64/arm_neon.h (target): Likewise.
26950 2023-07-19 Andrew Pinski <apinski@marvell.com>
26952 PR tree-optimization/110252
26953 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
26954 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
26955 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
26956 (match_simplify_replacement): Temporarily
26957 remove the flow sensitive info on the two statements that might
26960 2023-07-19 Andrew Pinski <apinski@marvell.com>
26962 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
26963 with flow_sensitive_info_storage.
26964 (follow_outer_ssa_edges): Update how to save off the flow
26966 (maybe_fold_comparisons_from_match_pd): Update restoring
26967 of flow sensitive info.
26968 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
26969 (flow_sensitive_info_storage::restore): New method.
26970 (flow_sensitive_info_storage::save_and_clear): New method.
26971 (flow_sensitive_info_storage::clear_storage): New method.
26972 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
26974 2023-07-19 Andrew Pinski <apinski@marvell.com>
26976 PR tree-optimization/110726
26977 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
26978 Add checks to make sure the type was one bit precision
26981 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26983 * doc/md.texi: Add mask_len_fold_left_plus.
26984 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
26985 (expand_mask_len_fold_left_optab_fn): Ditto.
26986 (direct_mask_len_fold_left_optab_supported_p): Ditto.
26987 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
26988 * optabs.def (OPTAB_D): Ditto.
26990 2023-07-19 Jakub Jelinek <jakub@redhat.com>
26992 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
26994 2023-07-19 Jakub Jelinek <jakub@redhat.com>
26996 PR tree-optimization/110731
26997 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
26998 divisor as UNSIGNED regardless of sgn.
27000 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
27002 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
27003 (standard_extensions_p): Add check.
27004 (riscv_subset_list::add): Just return NULL if it failed before.
27005 (riscv_subset_list::parse_std_ext): Continue parse when find a error
27006 (riscv_subset_list::parse): Just return NULL if it failed before.
27007 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
27009 2023-07-19 Jan Beulich <jbeulich@suse.com>
27011 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
27013 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
27014 gen_vec_extract_hi.
27015 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
27016 gen_vec_interleave_low. Rename local variable.
27018 2023-07-19 Jan Beulich <jbeulich@suse.com>
27020 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
27021 alternative. Move AVX512VL part of condition to new "enabled"
27024 2023-07-19 liuhongt <hongtao.liu@intel.com>
27027 * config/i386/i386-builtins.cc
27028 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
27029 (ix86_register_bf16_builtin_type): Ditto.
27030 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
27031 isn't available, undef the macros which are used to check the
27032 backend support of the _Float16/__bf16 types when building
27033 libstdc++ and libgcc.
27034 * config/i386/i386.cc (construct_container): Issue errors for
27035 HFmode/BFmode when TARGET_SSE2 is not available.
27036 (function_value_32): Ditto.
27037 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
27038 (ix86_libgcc_floating_mode_supported_p): Ditto.
27039 (ix86_emit_support_tinfos): Adjust codes.
27040 (ix86_invalid_conversion): Return diagnostic message string
27041 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
27042 (ix86_invalid_unary_op): New function.
27043 (ix86_invalid_binary_op): Ditto.
27044 (TARGET_INVALID_UNARY_OP): Define.
27045 (TARGET_INVALID_BINARY_OP): Define.
27046 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
27047 related instrinsics header files.
27048 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
27050 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
27052 * dwarf2asm.cc: Change FALSE to false.
27053 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
27054 * dwarf2out.cc (matches_main_base): Change return type from
27055 int to bool. Change "last_match" variable to bool.
27056 (dump_struct_debug): Change return type from int to bool.
27057 Change "matches" and "result" function arguments to bool.
27058 (is_pseudo_reg): Change return type from int to bool.
27059 (is_tagged_type): Ditto.
27060 (same_loc_p): Ditto.
27061 (same_dw_val_p): Change return type from int to bool and adjust
27062 function body accordingly.
27063 (same_attr_p): Ditto.
27064 (same_die_p): Ditto.
27065 (is_type_die): Ditto.
27066 (is_declaration_die): Ditto.
27067 (should_move_die_to_comdat): Ditto.
27068 (is_base_type): Ditto.
27069 (is_based_loc): Ditto.
27070 (local_scope_p): Ditto.
27071 (class_scope_p): Ditto.
27072 (class_or_namespace_scope_p): Ditto.
27073 (is_tagged_type): Ditto.
27074 (is_rust): Use void argument.
27075 (is_nested_in_subprogram): Change return type from int to bool.
27076 (contains_subprogram_definition): Ditto.
27077 (gen_struct_or_union_type_die): Change "nested", "complete"
27078 and "ns_decl" variables to bool.
27079 (is_naming_typedef_decl): Change FALSE to false.
27081 2023-07-18 Jan Hubicka <jh@suse.cz>
27083 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
27084 for queries not in headers.
27085 (static_loop_exit): Add basic blck parameter; update use of
27087 (should_duplicate_loop_header_p): Add ranger and static_exits
27088 parameter. Do not account statements that will be optimized
27089 out after duplicaiton in overall size. Add ranger query to
27091 (update_profile_after_ch): Take static_exits has set instead of
27092 single eliminated_edge.
27093 (ch_base::copy_headers): Do all analysis in the first pass;
27094 remember invariant_exits and static_exits.
27096 2023-07-18 Jason Merrill <jason@redhat.com>
27098 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
27100 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
27102 * doc/gm2.texi (Semantic checking): Change example testwithptr
27105 2023-07-18 Richard Biener <rguenther@suse.de>
27107 PR middle-end/105715
27108 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
27109 (pass_gimple_isel::execute): ... this. Duplicate
27110 comparison defs of COND_EXPRs.
27112 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27114 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
27115 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
27116 (riscv_convert_vector_bits): Ditto.
27118 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27120 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
27121 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
27123 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
27125 * config/s390/vx-builtins.md: New vsel pattern.
27127 2023-07-18 liuhongt <hongtao.liu@intel.com>
27130 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
27131 Remove # from assemble output.
27133 2023-07-18 liuhongt <hongtao.liu@intel.com>
27136 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
27137 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
27138 3 define_peephole2 after the pattern.
27140 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27142 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
27144 2023-07-18 Pan Li <pan2.li@intel.com>
27145 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27147 * config/riscv/riscv.cc (struct machine_function): Add new field.
27148 (riscv_static_frm_mode_p): New function.
27149 (riscv_emit_frm_mode_set): New function for emit FRM.
27150 (riscv_emit_mode_set): Extract function for FRM.
27151 (riscv_mode_needed): Fix the TODO.
27152 (riscv_mode_entry): Initial dynamic frm RTL.
27153 (riscv_mode_exit): Return DYN_EXIT.
27154 * config/riscv/riscv.md: Add rdfrm.
27155 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
27156 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
27158 (fsrmsi_backup): New pattern for swap.
27159 (fsrmsi_restore): New pattern for restore.
27160 (fsrmsi_restore_exit): New pattern for restore exit.
27161 (frrmsi): New pattern for backup.
27163 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
27165 * doc/extend.texi: Add @cindex on __auto_type.
27167 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
27169 * combine-stack-adj.cc (stack_memref_p): Change return type from
27170 int to bool and adjust function body accordingly.
27171 (rest_of_handle_stack_adjustments): Change return type to void.
27173 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
27175 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
27176 (cant_combine_insn_p): Change return type from int to bool and adjust
27177 function body accordingly.
27178 (can_combine_p): Ditto.
27179 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
27180 function arguments from int to bool.
27181 (contains_muldiv): Change return type from int to bool and adjust
27182 function body accordingly.
27183 (try_combine): Ditto. Change "new_direct_jump" pointer function
27184 argument from int to bool. Change "substed_i2", "substed_i1",
27185 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
27186 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
27187 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
27188 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
27189 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
27190 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
27192 (subst): Change "in_dest", "in_cond" and "unique_copy" function
27193 arguments from int to bool.
27194 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
27195 arguments from int to bool.
27196 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
27197 function argument from int to bool.
27198 (force_int_to_mode): Change "just_select" function argument
27199 from int to bool. Change "next_select" variable to bool.
27200 (rtx_equal_for_field_assignment_p): Change return type from
27201 int to bool and adjust function body accordingly.
27202 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
27203 argument from int to bool.
27204 (get_last_value_validate): Change return type from int to bool
27205 and adjust function body accordingly.
27206 (reg_dead_at_p): Ditto.
27207 (reg_bitfield_target_p): Ditto.
27208 (combine_instructions): Ditto. Change "new_direct_jump"
27210 (can_combine_p): Change return type from int to bool
27211 and adjust function body accordingly.
27212 (likely_spilled_retval_p): Ditto.
27213 (can_change_dest_mode): Change "added_sets" function argument
27215 (find_split_point): Change "unsignedp" variable to bool.
27216 (simplify_if_then_else): Change "comparison_p" and "swapped"
27218 (simplify_set): Change "other_changed" variable to bool.
27219 (expand_compound_operation): Change "unsignedp" variable to bool.
27220 (force_to_mode): Change "just_select" function argument
27221 from int to bool. Change "next_select" variable to bool.
27222 (extended_count): Change "unsignedp" function argument to bool.
27223 (simplify_shift_const_1): Change "complement_p" variable to bool.
27224 (simplify_comparison): Change "changed" variable to bool.
27225 (rest_of_handle_combine): Change return type to void.
27227 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
27230 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
27232 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
27234 * ira.cc (setup_reg_class_relations): Continue
27235 if regclass cl3 is hard_reg_set_empty_p.
27237 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27239 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
27241 2023-07-17 Martin Jambor <mjambor@suse.cz>
27243 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
27246 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27248 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
27250 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
27253 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
27254 recur add all implied extensions.
27255 (riscv_subset_list::check_implied_ext): Add new method.
27256 (riscv_subset_list::parse): Call checker check_implied_ext.
27257 * config/riscv/riscv-subset.h: Add new method.
27259 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27261 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
27262 (reduc_smax_scal_<mode>): Ditto.
27263 (reduc_umax_scal_<mode>): Ditto.
27264 (reduc_smin_scal_<mode>): Ditto.
27265 (reduc_umin_scal_<mode>): Ditto.
27266 (reduc_and_scal_<mode>): Ditto.
27267 (reduc_ior_scal_<mode>): Ditto.
27268 (reduc_xor_scal_<mode>): Ditto.
27269 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
27270 (expand_reduction): New function.
27271 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
27272 (emit_vlmax_fp_reduction_insn): Ditto.
27273 (get_m1_mode): Ditto.
27274 (expand_cond_len_binop): Fix name.
27275 (expand_reduction): New function
27276 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
27277 (validate_change_or_fail): New function.
27278 (change_insn): Fix VSETVL BUG.
27279 (change_vsetvl_insn): Ditto.
27280 (pass_vsetvl::backward_demand_fusion): Ditto.
27281 (pass_vsetvl::df_post_optimization): Ditto.
27283 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27285 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
27287 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
27289 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
27290 Remove parameter name from declaration of unused parameter.
27292 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
27294 PR tree-optimization/110652
27295 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
27298 2023-07-17 Richard Biener <rguenther@suse.de>
27300 PR tree-optimization/110669
27301 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
27302 Check we matched a header PHI.
27304 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27306 * tree-ssanames.cc (set_bitmask): New.
27307 * tree-ssanames.h (set_bitmask): New.
27309 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
27311 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
27313 * value-range.h (irange_bitmask::union_): Normalize beforehand.
27314 (irange_bitmask::intersect): Same.
27316 2023-07-17 Andrew Pinski <apinski@marvell.com>
27318 PR tree-optimization/95923
27319 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
27321 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
27323 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
27324 to the std::sort comparison lambda function const.
27326 2023-07-17 Andrew Pinski <apinski@marvell.com>
27328 PR tree-optimization/110666
27329 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
27331 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
27333 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
27334 Arrow Lake and Arrow Lake S.
27335 * common/config/i386/i386-common.cc:
27336 (processor_name): Add arrowlake.
27337 (processor_alias_table): Add arrow lake, arrow lake s and lunar
27339 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
27340 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
27341 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
27342 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
27344 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
27346 * config/i386/i386-options.cc (m_ARROWLAKE): New.
27347 (processor_cost_table): Add arrowlake.
27348 * config/i386/i386.h (enum processor_type):
27349 Add PROCESSOR_ARROWLAKE.
27350 * config/i386/x86-tune.def: Add m_ARROWLAKE.
27351 * doc/extend.texi: Add arrowlake and arrowlake-s.
27352 * doc/invoke.texi: Ditto.
27354 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27356 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
27357 have the same iterator. Also renaming all the occurence to
27359 (usdot_prod<mode>): New define_expand.
27360 (udot_prod<mode>): Ditto.
27362 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27364 * common/config/i386/cpuinfo.h (get_available_features):
27366 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
27367 OPTION_MASK_ISA2_SM4_UNSET): New.
27368 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
27369 (ix86_handle_option): Handle -msm4.
27370 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27372 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27374 * config.gcc: Add sm4intrin.h.
27375 * config/i386/cpuid.h (bit_SM4): New.
27376 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27377 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27379 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
27380 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
27381 (ix86_valid_target_attribute_inner_p): Handle sm4.
27382 * config/i386/i386.opt: Add option -msm4.
27383 * config/i386/immintrin.h: Include sm4intrin.h
27384 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
27385 (vsm4rnds4_<mode>): Ditto.
27386 * doc/extend.texi: Document sm4.
27387 * doc/invoke.texi: Document -msm4.
27388 * doc/sourcebuild.texi: Document target sm4.
27389 * config/i386/sm4intrin.h: New file.
27391 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27393 * common/config/i386/cpuinfo.h (get_available_features):
27395 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
27396 OPTION_MASK_ISA2_SHA512_UNSET): New.
27397 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
27398 (ix86_handle_option): Handle -msha512.
27399 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27400 Add FEATURE_SHA512.
27401 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27403 * config.gcc: Add sha512intrin.h.
27404 * config/i386/cpuid.h (bit_SHA512): New.
27405 * config/i386/i386-builtin-types.def:
27406 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
27407 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27408 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27410 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
27411 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
27412 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
27413 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
27414 (ix86_valid_target_attribute_inner_p): Handle sha512.
27415 * config/i386/i386.opt: Add option -msha512.
27416 * config/i386/immintrin.h: Include sha512intrin.h.
27417 * config/i386/sse.md (vsha512msg1): New define insn.
27418 (vsha512msg2): Ditto.
27419 (vsha512rnds2): Ditto.
27420 * doc/extend.texi: Document sha512.
27421 * doc/invoke.texi: Document -msha512.
27422 * doc/sourcebuild.texi: Document target sha512.
27423 * config/i386/sha512intrin.h: New file.
27425 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
27427 * common/config/i386/cpuinfo.h (get_available_features):
27429 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
27430 OPTION_MASK_ISA2_SM3_UNSET): New.
27431 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
27432 (ix86_handle_option): Handle -msm3.
27433 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27435 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27437 * config.gcc: Add sm3intrin.h
27438 * config/i386/cpuid.h (bit_SM3): New.
27439 * config/i386/i386-builtin-types.def:
27440 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
27441 * config/i386/i386-builtin.def (BDESC): Add new builtins.
27442 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27444 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
27445 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
27446 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
27447 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
27448 (ix86_valid_target_attribute_inner_p): Handle sm3.
27449 * config/i386/i386.opt: Add option -msm3.
27450 * config/i386/immintrin.h: Include sm3intrin.h.
27451 * config/i386/sse.md (vsm3msg1): New define insn.
27453 (vsm3rnds2): Ditto.
27454 * doc/extend.texi: Document sm3.
27455 * doc/invoke.texi: Document -msm3.
27456 * doc/sourcebuild.texi: Document target sm3.
27457 * config/i386/sm3intrin.h: New file.
27459 2023-07-17 Kong Lingling <lingling.kong@intel.com>
27460 Haochen Jiang <haochen.jiang@intel.com>
27462 * common/config/i386/cpuinfo.h (get_available_features): Detect
27464 * common/config/i386/i386-common.cc
27465 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
27466 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
27467 (ix86_handle_option): Handle -mavxvnniint16.
27468 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27469 Add FEATURE_AVXVNNIINT16.
27470 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27472 * config.gcc: Add avxvnniint16.h.
27473 * config/i386/avxvnniint16intrin.h: New file.
27474 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
27475 * config/i386/i386-builtin.def: Add new builtins.
27476 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27478 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
27479 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
27480 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
27481 * config/i386/i386.opt: Add option -mavxvnniint16.
27482 * config/i386/immintrin.h: Include avxvnniint16.h.
27483 * config/i386/sse.md
27484 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
27485 * doc/extend.texi: Document avxvnniint16.
27486 * doc/invoke.texi: Document -mavxvnniint16.
27487 * doc/sourcebuild.texi: Document target avxvnniint16.
27489 2023-07-16 Jan Hubicka <jh@suse.cz>
27491 PR middle-end/110649
27492 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
27493 (vect_transform_loop): Move scale_profile_for_vect_loop after
27494 upper bound updates.
27496 2023-07-16 Jan Hubicka <jh@suse.cz>
27498 PR tree-optimization/110649
27499 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
27500 probability of the if-then-else construct.
27502 2023-07-16 Jan Hubicka <jh@suse.cz>
27504 PR middle-end/110649
27505 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
27507 2023-07-15 Andrew Pinski <apinski@marvell.com>
27509 * doc/contrib.texi: Update my entry.
27511 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
27513 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
27515 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
27516 (tld_load): Likewise.
27517 (tgd_load_pic): Change to expander.
27518 (tld_load_pic, tld_offset_load, tp_load): Likewise.
27519 (tie_load_pic, tle_load): Likewise.
27520 (tgd_load_picsi, tgd_load_picdi): New.
27521 (tld_load_picsi, tld_load_picdi): New.
27522 (tld_offset_load<P:mode>): New.
27523 (tp_load<P:mode>): New.
27524 (tie_load_picsi, tie_load_picdi): New.
27525 (tle_load<P:mode>): New.
27527 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27529 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
27530 (vcmlaq_rot180, vcmlaq_rot270): New.
27531 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
27532 (vcmlaq_rot180, vcmlaq_rot270): New.
27533 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
27534 (vcmlaq_rot180, vcmlaq_rot270): New.
27535 * config/arm/arm-mve-builtins.cc
27536 (function_instance::has_inactive_argument): Handle vcmlaq,
27537 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
27538 * config/arm/arm_mve.h (vcmlaq): Delete.
27539 (vcmlaq_rot180): Delete.
27540 (vcmlaq_rot270): Delete.
27541 (vcmlaq_rot90): Delete.
27542 (vcmlaq_m): Delete.
27543 (vcmlaq_rot180_m): Delete.
27544 (vcmlaq_rot270_m): Delete.
27545 (vcmlaq_rot90_m): Delete.
27546 (vcmlaq_f16): Delete.
27547 (vcmlaq_rot180_f16): Delete.
27548 (vcmlaq_rot270_f16): Delete.
27549 (vcmlaq_rot90_f16): Delete.
27550 (vcmlaq_f32): Delete.
27551 (vcmlaq_rot180_f32): Delete.
27552 (vcmlaq_rot270_f32): Delete.
27553 (vcmlaq_rot90_f32): Delete.
27554 (vcmlaq_m_f32): Delete.
27555 (vcmlaq_m_f16): Delete.
27556 (vcmlaq_rot180_m_f32): Delete.
27557 (vcmlaq_rot180_m_f16): Delete.
27558 (vcmlaq_rot270_m_f32): Delete.
27559 (vcmlaq_rot270_m_f16): Delete.
27560 (vcmlaq_rot90_m_f32): Delete.
27561 (vcmlaq_rot90_m_f16): Delete.
27562 (__arm_vcmlaq_f16): Delete.
27563 (__arm_vcmlaq_rot180_f16): Delete.
27564 (__arm_vcmlaq_rot270_f16): Delete.
27565 (__arm_vcmlaq_rot90_f16): Delete.
27566 (__arm_vcmlaq_f32): Delete.
27567 (__arm_vcmlaq_rot180_f32): Delete.
27568 (__arm_vcmlaq_rot270_f32): Delete.
27569 (__arm_vcmlaq_rot90_f32): Delete.
27570 (__arm_vcmlaq_m_f32): Delete.
27571 (__arm_vcmlaq_m_f16): Delete.
27572 (__arm_vcmlaq_rot180_m_f32): Delete.
27573 (__arm_vcmlaq_rot180_m_f16): Delete.
27574 (__arm_vcmlaq_rot270_m_f32): Delete.
27575 (__arm_vcmlaq_rot270_m_f16): Delete.
27576 (__arm_vcmlaq_rot90_m_f32): Delete.
27577 (__arm_vcmlaq_rot90_m_f16): Delete.
27578 (__arm_vcmlaq): Delete.
27579 (__arm_vcmlaq_rot180): Delete.
27580 (__arm_vcmlaq_rot270): Delete.
27581 (__arm_vcmlaq_rot90): Delete.
27582 (__arm_vcmlaq_m): Delete.
27583 (__arm_vcmlaq_rot180_m): Delete.
27584 (__arm_vcmlaq_rot270_m): Delete.
27585 (__arm_vcmlaq_rot90_m): Delete.
27587 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27589 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
27590 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
27591 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
27592 (mve_insn): Add vcmla.
27593 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
27595 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
27597 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
27598 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
27599 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
27600 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
27602 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
27604 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27606 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
27607 (vcmulq_rot180, vcmulq_rot270): New.
27608 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
27609 (vcmulq_rot180, vcmulq_rot270): New.
27610 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
27611 (vcmulq_rot180, vcmulq_rot270): New.
27612 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
27613 (vcmulq_rot270): Delete.
27614 (vcmulq_rot180): Delete.
27616 (vcmulq_m): Delete.
27617 (vcmulq_rot180_m): Delete.
27618 (vcmulq_rot270_m): Delete.
27619 (vcmulq_rot90_m): Delete.
27620 (vcmulq_x): Delete.
27621 (vcmulq_rot90_x): Delete.
27622 (vcmulq_rot180_x): Delete.
27623 (vcmulq_rot270_x): Delete.
27624 (vcmulq_rot90_f16): Delete.
27625 (vcmulq_rot270_f16): Delete.
27626 (vcmulq_rot180_f16): Delete.
27627 (vcmulq_f16): Delete.
27628 (vcmulq_rot90_f32): Delete.
27629 (vcmulq_rot270_f32): Delete.
27630 (vcmulq_rot180_f32): Delete.
27631 (vcmulq_f32): Delete.
27632 (vcmulq_m_f32): Delete.
27633 (vcmulq_m_f16): Delete.
27634 (vcmulq_rot180_m_f32): Delete.
27635 (vcmulq_rot180_m_f16): Delete.
27636 (vcmulq_rot270_m_f32): Delete.
27637 (vcmulq_rot270_m_f16): Delete.
27638 (vcmulq_rot90_m_f32): Delete.
27639 (vcmulq_rot90_m_f16): Delete.
27640 (vcmulq_x_f16): Delete.
27641 (vcmulq_x_f32): Delete.
27642 (vcmulq_rot90_x_f16): Delete.
27643 (vcmulq_rot90_x_f32): Delete.
27644 (vcmulq_rot180_x_f16): Delete.
27645 (vcmulq_rot180_x_f32): Delete.
27646 (vcmulq_rot270_x_f16): Delete.
27647 (vcmulq_rot270_x_f32): Delete.
27648 (__arm_vcmulq_rot90_f16): Delete.
27649 (__arm_vcmulq_rot270_f16): Delete.
27650 (__arm_vcmulq_rot180_f16): Delete.
27651 (__arm_vcmulq_f16): Delete.
27652 (__arm_vcmulq_rot90_f32): Delete.
27653 (__arm_vcmulq_rot270_f32): Delete.
27654 (__arm_vcmulq_rot180_f32): Delete.
27655 (__arm_vcmulq_f32): Delete.
27656 (__arm_vcmulq_m_f32): Delete.
27657 (__arm_vcmulq_m_f16): Delete.
27658 (__arm_vcmulq_rot180_m_f32): Delete.
27659 (__arm_vcmulq_rot180_m_f16): Delete.
27660 (__arm_vcmulq_rot270_m_f32): Delete.
27661 (__arm_vcmulq_rot270_m_f16): Delete.
27662 (__arm_vcmulq_rot90_m_f32): Delete.
27663 (__arm_vcmulq_rot90_m_f16): Delete.
27664 (__arm_vcmulq_x_f16): Delete.
27665 (__arm_vcmulq_x_f32): Delete.
27666 (__arm_vcmulq_rot90_x_f16): Delete.
27667 (__arm_vcmulq_rot90_x_f32): Delete.
27668 (__arm_vcmulq_rot180_x_f16): Delete.
27669 (__arm_vcmulq_rot180_x_f32): Delete.
27670 (__arm_vcmulq_rot270_x_f16): Delete.
27671 (__arm_vcmulq_rot270_x_f32): Delete.
27672 (__arm_vcmulq_rot90): Delete.
27673 (__arm_vcmulq_rot270): Delete.
27674 (__arm_vcmulq_rot180): Delete.
27675 (__arm_vcmulq): Delete.
27676 (__arm_vcmulq_m): Delete.
27677 (__arm_vcmulq_rot180_m): Delete.
27678 (__arm_vcmulq_rot270_m): Delete.
27679 (__arm_vcmulq_rot90_m): Delete.
27680 (__arm_vcmulq_x): Delete.
27681 (__arm_vcmulq_rot90_x): Delete.
27682 (__arm_vcmulq_rot180_x): Delete.
27683 (__arm_vcmulq_rot270_x): Delete.
27685 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27687 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
27688 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
27689 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
27690 (MVE_VCADDQ_VCMULQ_M): New.
27691 (mve_insn): Add vcmul.
27692 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
27695 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
27697 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
27698 @mve_<mve_insn>q<mve_rot>_f<mode>.
27699 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
27700 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
27701 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
27703 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27705 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
27706 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27707 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
27708 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27709 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
27710 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
27711 * config/arm/arm-mve-builtins-functions.h (class
27712 unspec_mve_function_exact_insn_rot): New.
27713 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
27714 (vcaddq_rot270): Delete.
27715 (vhcaddq_rot90): Delete.
27716 (vhcaddq_rot270): Delete.
27717 (vcaddq_rot270_m): Delete.
27718 (vcaddq_rot90_m): Delete.
27719 (vhcaddq_rot270_m): Delete.
27720 (vhcaddq_rot90_m): Delete.
27721 (vcaddq_rot90_x): Delete.
27722 (vcaddq_rot270_x): Delete.
27723 (vhcaddq_rot90_x): Delete.
27724 (vhcaddq_rot270_x): Delete.
27725 (vcaddq_rot90_u8): Delete.
27726 (vcaddq_rot270_u8): Delete.
27727 (vhcaddq_rot90_s8): Delete.
27728 (vhcaddq_rot270_s8): Delete.
27729 (vcaddq_rot90_s8): Delete.
27730 (vcaddq_rot270_s8): Delete.
27731 (vcaddq_rot90_u16): Delete.
27732 (vcaddq_rot270_u16): Delete.
27733 (vhcaddq_rot90_s16): Delete.
27734 (vhcaddq_rot270_s16): Delete.
27735 (vcaddq_rot90_s16): Delete.
27736 (vcaddq_rot270_s16): Delete.
27737 (vcaddq_rot90_u32): Delete.
27738 (vcaddq_rot270_u32): Delete.
27739 (vhcaddq_rot90_s32): Delete.
27740 (vhcaddq_rot270_s32): Delete.
27741 (vcaddq_rot90_s32): Delete.
27742 (vcaddq_rot270_s32): Delete.
27743 (vcaddq_rot90_f16): Delete.
27744 (vcaddq_rot270_f16): Delete.
27745 (vcaddq_rot90_f32): Delete.
27746 (vcaddq_rot270_f32): Delete.
27747 (vcaddq_rot270_m_s8): Delete.
27748 (vcaddq_rot270_m_s32): Delete.
27749 (vcaddq_rot270_m_s16): Delete.
27750 (vcaddq_rot270_m_u8): Delete.
27751 (vcaddq_rot270_m_u32): Delete.
27752 (vcaddq_rot270_m_u16): Delete.
27753 (vcaddq_rot90_m_s8): Delete.
27754 (vcaddq_rot90_m_s32): Delete.
27755 (vcaddq_rot90_m_s16): Delete.
27756 (vcaddq_rot90_m_u8): Delete.
27757 (vcaddq_rot90_m_u32): Delete.
27758 (vcaddq_rot90_m_u16): Delete.
27759 (vhcaddq_rot270_m_s8): Delete.
27760 (vhcaddq_rot270_m_s32): Delete.
27761 (vhcaddq_rot270_m_s16): Delete.
27762 (vhcaddq_rot90_m_s8): Delete.
27763 (vhcaddq_rot90_m_s32): Delete.
27764 (vhcaddq_rot90_m_s16): Delete.
27765 (vcaddq_rot270_m_f32): Delete.
27766 (vcaddq_rot270_m_f16): Delete.
27767 (vcaddq_rot90_m_f32): Delete.
27768 (vcaddq_rot90_m_f16): Delete.
27769 (vcaddq_rot90_x_s8): Delete.
27770 (vcaddq_rot90_x_s16): Delete.
27771 (vcaddq_rot90_x_s32): Delete.
27772 (vcaddq_rot90_x_u8): Delete.
27773 (vcaddq_rot90_x_u16): Delete.
27774 (vcaddq_rot90_x_u32): Delete.
27775 (vcaddq_rot270_x_s8): Delete.
27776 (vcaddq_rot270_x_s16): Delete.
27777 (vcaddq_rot270_x_s32): Delete.
27778 (vcaddq_rot270_x_u8): Delete.
27779 (vcaddq_rot270_x_u16): Delete.
27780 (vcaddq_rot270_x_u32): Delete.
27781 (vhcaddq_rot90_x_s8): Delete.
27782 (vhcaddq_rot90_x_s16): Delete.
27783 (vhcaddq_rot90_x_s32): Delete.
27784 (vhcaddq_rot270_x_s8): Delete.
27785 (vhcaddq_rot270_x_s16): Delete.
27786 (vhcaddq_rot270_x_s32): Delete.
27787 (vcaddq_rot90_x_f16): Delete.
27788 (vcaddq_rot90_x_f32): Delete.
27789 (vcaddq_rot270_x_f16): Delete.
27790 (vcaddq_rot270_x_f32): Delete.
27791 (__arm_vcaddq_rot90_u8): Delete.
27792 (__arm_vcaddq_rot270_u8): Delete.
27793 (__arm_vhcaddq_rot90_s8): Delete.
27794 (__arm_vhcaddq_rot270_s8): Delete.
27795 (__arm_vcaddq_rot90_s8): Delete.
27796 (__arm_vcaddq_rot270_s8): Delete.
27797 (__arm_vcaddq_rot90_u16): Delete.
27798 (__arm_vcaddq_rot270_u16): Delete.
27799 (__arm_vhcaddq_rot90_s16): Delete.
27800 (__arm_vhcaddq_rot270_s16): Delete.
27801 (__arm_vcaddq_rot90_s16): Delete.
27802 (__arm_vcaddq_rot270_s16): Delete.
27803 (__arm_vcaddq_rot90_u32): Delete.
27804 (__arm_vcaddq_rot270_u32): Delete.
27805 (__arm_vhcaddq_rot90_s32): Delete.
27806 (__arm_vhcaddq_rot270_s32): Delete.
27807 (__arm_vcaddq_rot90_s32): Delete.
27808 (__arm_vcaddq_rot270_s32): Delete.
27809 (__arm_vcaddq_rot270_m_s8): Delete.
27810 (__arm_vcaddq_rot270_m_s32): Delete.
27811 (__arm_vcaddq_rot270_m_s16): Delete.
27812 (__arm_vcaddq_rot270_m_u8): Delete.
27813 (__arm_vcaddq_rot270_m_u32): Delete.
27814 (__arm_vcaddq_rot270_m_u16): Delete.
27815 (__arm_vcaddq_rot90_m_s8): Delete.
27816 (__arm_vcaddq_rot90_m_s32): Delete.
27817 (__arm_vcaddq_rot90_m_s16): Delete.
27818 (__arm_vcaddq_rot90_m_u8): Delete.
27819 (__arm_vcaddq_rot90_m_u32): Delete.
27820 (__arm_vcaddq_rot90_m_u16): Delete.
27821 (__arm_vhcaddq_rot270_m_s8): Delete.
27822 (__arm_vhcaddq_rot270_m_s32): Delete.
27823 (__arm_vhcaddq_rot270_m_s16): Delete.
27824 (__arm_vhcaddq_rot90_m_s8): Delete.
27825 (__arm_vhcaddq_rot90_m_s32): Delete.
27826 (__arm_vhcaddq_rot90_m_s16): Delete.
27827 (__arm_vcaddq_rot90_x_s8): Delete.
27828 (__arm_vcaddq_rot90_x_s16): Delete.
27829 (__arm_vcaddq_rot90_x_s32): Delete.
27830 (__arm_vcaddq_rot90_x_u8): Delete.
27831 (__arm_vcaddq_rot90_x_u16): Delete.
27832 (__arm_vcaddq_rot90_x_u32): Delete.
27833 (__arm_vcaddq_rot270_x_s8): Delete.
27834 (__arm_vcaddq_rot270_x_s16): Delete.
27835 (__arm_vcaddq_rot270_x_s32): Delete.
27836 (__arm_vcaddq_rot270_x_u8): Delete.
27837 (__arm_vcaddq_rot270_x_u16): Delete.
27838 (__arm_vcaddq_rot270_x_u32): Delete.
27839 (__arm_vhcaddq_rot90_x_s8): Delete.
27840 (__arm_vhcaddq_rot90_x_s16): Delete.
27841 (__arm_vhcaddq_rot90_x_s32): Delete.
27842 (__arm_vhcaddq_rot270_x_s8): Delete.
27843 (__arm_vhcaddq_rot270_x_s16): Delete.
27844 (__arm_vhcaddq_rot270_x_s32): Delete.
27845 (__arm_vcaddq_rot90_f16): Delete.
27846 (__arm_vcaddq_rot270_f16): Delete.
27847 (__arm_vcaddq_rot90_f32): Delete.
27848 (__arm_vcaddq_rot270_f32): Delete.
27849 (__arm_vcaddq_rot270_m_f32): Delete.
27850 (__arm_vcaddq_rot270_m_f16): Delete.
27851 (__arm_vcaddq_rot90_m_f32): Delete.
27852 (__arm_vcaddq_rot90_m_f16): Delete.
27853 (__arm_vcaddq_rot90_x_f16): Delete.
27854 (__arm_vcaddq_rot90_x_f32): Delete.
27855 (__arm_vcaddq_rot270_x_f16): Delete.
27856 (__arm_vcaddq_rot270_x_f32): Delete.
27857 (__arm_vcaddq_rot90): Delete.
27858 (__arm_vcaddq_rot270): Delete.
27859 (__arm_vhcaddq_rot90): Delete.
27860 (__arm_vhcaddq_rot270): Delete.
27861 (__arm_vcaddq_rot270_m): Delete.
27862 (__arm_vcaddq_rot90_m): Delete.
27863 (__arm_vhcaddq_rot270_m): Delete.
27864 (__arm_vhcaddq_rot90_m): Delete.
27865 (__arm_vcaddq_rot90_x): Delete.
27866 (__arm_vcaddq_rot270_x): Delete.
27867 (__arm_vhcaddq_rot90_x): Delete.
27868 (__arm_vhcaddq_rot270_x): Delete.
27870 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
27872 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
27873 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
27874 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
27875 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
27876 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
27877 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
27879 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
27880 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
27881 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
27882 VHCADDQ_ROT270_M_S.
27883 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
27884 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
27885 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
27886 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
27887 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
27888 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
27890 (VCADDQ_ROT270_M): Delete.
27891 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
27892 (VCADDQ_ROT90_M): Delete.
27893 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
27894 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
27896 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
27897 (mve_vcaddq<mve_rot><mode>): Rename into ...
27898 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
27899 (mve_vcaddq_rot270_m_<supf><mode>)
27900 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
27901 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
27902 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
27903 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
27905 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
27907 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
27910 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
27911 preparation statement over braces for a single statement.
27912 (*bt<mode>_setncqi): Likewise.
27913 (*bt<mode>_setncqi_2): New define_insn_and_split.
27915 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
27917 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
27918 case inserting of 64-bit values into a TImode register, to handle
27919 both DImode and DFmode using either *insvti_lowpart_1
27920 or *isnvti_highpart_1.
27922 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
27925 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
27926 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
27927 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
27928 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
27929 when the original source contains a paradoxical subreg.
27931 2023-07-14 Jan Hubicka <jh@suse.cz>
27933 * passes.cc (execute_function_todo): Remove
27934 TODO_rebuild_frequencies
27935 * passes.def: Add rebuild_frequencies pass.
27936 * predict.cc (estimate_bb_frequencies): Drop
27938 (tree_estimate_probability): Update call of
27939 estimate_bb_frequencies.
27940 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
27941 first and do not rebuild if not necessary.
27942 (class pass_rebuild_frequencies): New.
27943 (make_pass_rebuild_frequencies): New.
27944 * profile-count.h: Add profile_count::very_large_p.
27945 * tree-inline.cc (optimize_inline_calls): Do not return
27946 TODO_rebuild_frequencies
27947 * tree-pass.h (TODO_rebuild_frequencies): Remove.
27948 (make_pass_rebuild_frequencies): Declare.
27950 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27952 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
27953 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27954 (expand_cond_len_ternop): New function.
27955 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
27956 (expand_cond_len_ternop): Ditto.
27958 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
27961 * config/bpf/bpf.md: Enable instruction scheduling.
27963 2023-07-14 Tamar Christina <tamar.christina@arm.com>
27965 PR tree-optimization/109154
27966 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
27967 (struct bb_predicate): Add no_predicate_stmts.
27968 (set_bb_predicate): Increase predicate count.
27969 (set_bb_predicate_gimplified_stmts): Conditionally initialize
27970 no_predicate_stmts.
27971 (get_bb_num_predicate_stmts): New.
27972 (init_bb_predicate): Initialzie no_predicate_stmts.
27973 (release_bb_predicate): Cleanup no_predicate_stmts.
27974 (insert_gimplified_predicates): Preserve no_predicate_stmts.
27976 2023-07-14 Tamar Christina <tamar.christina@arm.com>
27978 PR tree-optimization/109154
27979 * tree-if-conv.cc (gen_simplified_condition,
27980 gen_phi_nest_statement): New.
27981 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
27983 2023-07-14 Richard Biener <rguenther@suse.de>
27985 * gimple.h (gimple_phi_arg): New const overload.
27986 (gimple_phi_arg_def): Make gimple arg const.
27987 (gimple_phi_arg_def_from_edge): New inline function.
27988 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
27990 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
27991 new inline function.
27992 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
27994 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
27996 * common/config/riscv/riscv-common.cc:
27997 (riscv_implied_info): Add zihintntl item.
27998 (riscv_ext_version_table): Ditto.
27999 (riscv_ext_flag_table): Ditto.
28000 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
28001 (TARGET_ZIHINTNTL): Ditto.
28003 2023-07-14 Die Li <lidie@eswincomputing.com>
28005 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
28007 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
28010 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
28011 used by the address of the following memory operand.
28013 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
28016 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
28017 deallocate alloca-only frame.
28019 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
28022 * config/darwin.h (DARWIN_PLATFORM_ID): New.
28023 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
28024 and SDK data to the static linker.
28026 2023-07-13 Carl Love <cel@us.ibm.com>
28028 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
28029 built-in definition return type.
28030 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
28031 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
28032 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
28033 argument to return FPSCR fields.
28034 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
28035 the return value. Add description for
28036 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
28038 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
28041 * config/alpha/alpha.cc (alpha_emit_set_long_const):
28042 Always use DImode when constructing long const.
28044 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
28046 * haifa-sched.cc: Change TRUE/FALSE to true/false.
28048 * lra-assigns.cc: Ditto.
28049 * lra-constraints.cc: Ditto.
28050 * sel-sched.cc: Ditto.
28052 2023-07-13 Andrew Pinski <apinski@marvell.com>
28054 PR tree-optimization/110293
28055 PR tree-optimization/110539
28056 * match.pd: Expand the `x != (typeof x)(x == 0)`
28057 pattern to handle where the inner and outer comparsions
28058 are either `!=` or `==` and handle other constants
28061 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
28063 PR middle-end/109520
28064 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
28065 (lra_asm_insn_error): New prototype.
28066 * lra.cc: Include rtl_error.h.
28067 (lra_set_insn_recog_data): Initialize asm_reloads_num.
28068 (lra_asm_insn_error): New func whose code is taken from ...
28069 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
28070 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
28072 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28074 * genmatch.cc (commutative_op): Add COND_LEN_*
28075 * internal-fn.cc (first_commutative_argument): Ditto.
28077 (get_unconditional_internal_fn): Ditto.
28078 (can_interpret_as_conditional_op_p): Ditto.
28079 (internal_fn_len_index): Ditto.
28080 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
28081 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
28082 (convert_mult_to_fma): Ditto.
28083 (math_opts_dom_walker::after_dom_children): Ditto.
28085 2023-07-13 Pan Li <pan2.li@intel.com>
28087 * config/riscv/riscv.cc (vxrm_rtx): New static var.
28089 (global_state_unknown_p): Removed.
28090 (riscv_entity_mode_after): Removed.
28091 (asm_insn_p): New function.
28092 (vxrm_unknown_p): New function for fixed-point.
28093 (riscv_vxrm_mode_after): Ditto.
28094 (frm_unknown_dynamic_p): New function for floating-point.
28095 (riscv_frm_mode_after): Ditto.
28096 (riscv_mode_after): Leverage new functions.
28098 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28100 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
28101 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
28102 calling vect_model_load_cost.
28104 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28106 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
28107 handle memory_access_type VMAT_CONTIGUOUS, remove some
28108 VMAT_CONTIGUOUS_PERMUTE related handlings.
28109 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
28110 without calling vect_model_load_cost.
28112 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28114 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
28115 VMAT_CONTIGUOUS_REVERSE any more.
28116 (vectorizable_load): Adjust the costing handling on
28117 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
28119 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28121 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
28122 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
28123 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
28124 assert it will never get VMAT_LOAD_STORE_LANES.
28126 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28128 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
28129 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
28130 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
28131 remove VMAT_GATHER_SCATTER related handlings and the related parameter
28134 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28136 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
28137 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
28138 vect_model_load_cost.
28139 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
28140 VMAT_STRIDED_SLP any more, and remove their related handlings.
28142 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28144 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
28145 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
28146 hoisting decision and without calling vect_model_load_cost.
28147 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
28148 and remove VMAT_INVARIANT related handlings.
28150 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28152 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
28153 on costing with one extra argument cost_vec.
28154 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
28155 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
28156 gs_info.decl set any more.
28158 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28160 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
28161 to vect_model_load_cost down to some different transform paths
28162 according to the handlings of different vect_memory_access_types.
28164 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
28166 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
28168 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28170 * config/riscv/autovec.md
28171 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
28172 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
28173 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
28174 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
28175 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
28176 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
28177 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
28178 (len_mask_gather_load<mode><mode>): Ditto.
28179 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
28180 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
28181 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
28182 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
28183 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
28184 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
28185 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
28186 (len_mask_scatter_store<mode><mode>): Ditto.
28187 * config/riscv/predicates.md (const_1_operand): New predicate.
28188 (vector_gs_scale_operand_16): Ditto.
28189 (vector_gs_scale_operand_32): Ditto.
28190 (vector_gs_scale_operand_64): Ditto.
28191 (vector_gs_extension_operand): Ditto.
28192 (vector_gs_scale_operand_16_rv32): Ditto.
28193 (vector_gs_scale_operand_32_rv32): Ditto.
28194 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
28195 (expand_gather_scatter): New function.
28196 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
28197 (emit_vlmax_masked_store_insn): New function.
28198 (emit_nonvlmax_masked_store_insn): Ditto.
28199 (modulo_sel_indices): Ditto.
28200 (expand_vec_perm): Fix SLP for gather/scatter.
28201 (prepare_gather_scatter): New function.
28202 (expand_gather_scatter): Ditto.
28203 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
28204 (subreg:SI (DI CONST_POLY_INT)).
28205 * config/riscv/vector-iterators.md: Add gather/scatter.
28206 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
28207 (@vec_duplicate<mode>): Ditto.
28208 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
28210 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
28212 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28214 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
28215 * config/riscv/riscv-protos.h (enum insn_type): New enum.
28216 (expand_cond_len_binop): New function.
28217 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
28218 (emit_nonvlmax_fp_tu_insn): Ditto.
28219 (need_fp_rounding_p): Ditto.
28220 (expand_cond_len_binop): Ditto.
28221 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
28222 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
28224 2023-07-12 Jan Hubicka <jh@suse.cz>
28226 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
28227 (gimple_duplicate_seme_region): ... this; break out profile updating
28229 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
28230 (ch_base::copy_headers): Update.
28231 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
28232 (gimple_duplicate_seme_region): ... this.
28234 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28236 PR tree-optimization/107043
28237 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
28239 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28241 PR tree-optimization/107053
28242 * gimple-range-op.cc (cfn_popcount): Use known set bits.
28244 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
28246 * ira.cc (equiv_init_varies_p): Change return type from int to bool
28247 and adjust function body accordingly.
28248 (equiv_init_movable_p): Ditto.
28249 (memref_used_between_p): Ditto.
28250 * lra-constraints.cc (valid_address_p): Ditto.
28252 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
28254 * range-op.cc (irange_to_masked_value): Remove.
28255 (update_known_bitmask): Update irange value/mask pair instead of
28256 only updating nonzero bits.
28258 2023-07-12 Jan Hubicka <jh@suse.cz>
28260 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
28261 parameter and rewrite profile updating code to handle edges elimination.
28262 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
28263 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
28264 (loop_iv_derived_p): New function.
28265 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
28266 of PHIs and propagation of IV derived variables.
28267 (ch_base::copy_headers): Pass around the invariant edges hash set.
28269 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
28271 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
28272 (last_active_insn): Change "skip_use_p" function argument to bool.
28273 (noce_operand_ok): Change return type from int to bool.
28274 (find_cond_trap): Ditto.
28275 (block_jumps_and_fallthru_p): Change "fallthru_p" and
28276 "jump_p" variables to bool.
28277 (noce_find_if_block): Change return type from int to bool.
28278 (cond_exec_find_if_block): Ditto.
28279 (find_if_case_1): Ditto.
28280 (find_if_case_2): Ditto.
28281 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
28282 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
28283 (cond_exec_process_insns): Change return type from int to bool.
28284 Change "mod_ok" function arg to bool.
28285 (cond_exec_process_if_block): Change return type from int to bool.
28286 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
28288 (noce_emit_store_flag): Change return type from int to bool.
28289 Change "reversep" function arg to bool. Change "cond_complex"
28291 (noce_try_move): Change return type from int to bool.
28292 (noce_try_ifelse_collapse): Ditto.
28293 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
28294 (noce_try_addcc): Change return type from int to bool. Change
28295 "subtract" variable to bool.
28296 (noce_try_store_flag_constants): Change return type from int to bool.
28297 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
28298 (noce_try_cmove): Change return type from int to bool.
28299 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
28300 (noce_try_minmax): Change return type from int to bool. Change
28301 "unsignedp" variable to bool.
28302 (noce_try_abs): Change return type from int to bool. Change
28303 "negate" variable to bool.
28304 (noce_try_sign_mask): Change return type from int to bool.
28305 (noce_try_move): Ditto.
28306 (noce_try_store_flag_constants): Ditto.
28307 (noce_try_cmove): Ditto.
28308 (noce_try_cmove_arith): Ditto.
28309 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
28310 (noce_try_bitop): Change return type from int to bool.
28311 (noce_operand_ok): Ditto.
28312 (noce_convert_multiple_sets): Ditto.
28313 (noce_convert_multiple_sets_1): Ditto.
28314 (noce_process_if_block): Ditto.
28315 (check_cond_move_block): Ditto.
28316 (cond_move_process_if_block): Ditto. Change "success_p"
28318 (rest_of_handle_if_conversion): Change return type to void.
28320 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28322 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
28324 (get_conditional_len_internal_fn): New function.
28325 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
28326 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
28329 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28332 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
28334 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28337 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
28338 define_insn_and_split derived from *add<dwi>3_doubleword_concat
28339 and *add<dwi>3_doubleword_zext.
28341 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28344 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
28345 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
28346 (peephole2): Simplify rega = 0; rega op= rega cases.
28348 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
28350 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
28351 testing a TImode SUBREG of a 128-bit vector register against
28352 zero, use a PTEST instruction instead of first moving it to
28353 a pair of scalar registers.
28355 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
28357 * genopinit.cc (main): Adjust maximal number of optabs and
28359 * gensupport.cc (find_optab): Shift optab by 20 and mode by
28361 * optabs-query.h (optab_handler): Ditto.
28362 (convert_optab_handler): Ditto.
28364 2023-07-12 Richard Biener <rguenther@suse.de>
28366 PR tree-optimization/110630
28367 * tree-vect-slp.cc (vect_add_slp_permutation): New
28368 offset parameter, honor that for the extract code generation.
28369 (vectorizable_slp_permutation_1): Handle offsetted identities.
28371 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28373 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
28374 (umul<mode>3_highpart): Ditto.
28376 2023-07-12 Jan Beulich <jbeulich@suse.com>
28378 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
28379 alternative. Adjust original last alternative's "prefix"
28380 attribute to maybe_evex.
28382 2023-07-12 Jan Beulich <jbeulich@suse.com>
28384 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
28385 vbroadcastss for AVX2. New AVX512F alternative.
28386 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
28387 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
28389 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28391 * config/riscv/peephole.md: Remove XThead* peephole passes.
28392 * config/riscv/thead.md: Include thead-peephole.md.
28393 * config/riscv/thead-peephole.md: New file.
28395 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28397 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
28399 (riscv_index_reg_class): Likewise.
28400 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
28401 (riscv_index_reg_class): New function.
28402 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
28403 riscv_index_reg_class().
28404 (REGNO_OK_FOR_INDEX_P): Call new function
28405 riscv_regno_ok_for_index_p().
28407 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28409 * config/riscv/riscv-protos.h (enum riscv_address_type):
28410 New location of type definition.
28411 (struct riscv_address_info): Likewise.
28412 * config/riscv/riscv.cc (enum riscv_address_type):
28413 Old location of type definition.
28414 (struct riscv_address_info): Likewise.
28416 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28418 * config/riscv/riscv.h (Xmode): New macro.
28420 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28422 * config/riscv/riscv.cc (riscv_print_operand_address): Use
28423 output_addr_const rather than riscv_print_operand.
28425 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28427 * config/riscv/thead.md: Adjust constraints of th_addsl.
28429 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28431 * config/riscv/thead.cc (th_mempair_operands_p):
28432 Fix documentation of th_mempair_order_operands().
28434 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28436 * config/riscv/thead.cc (th_mempair_save_regs):
28437 Emit REG_FRAME_RELATED_EXPR notes in prologue.
28439 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
28441 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
28442 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
28443 New XThead extension INSN.
28444 (*zero_extendsidi2_th_extu): New XThead extension INSN.
28445 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
28447 2023-07-12 liuhongt <hongtao.liu@intel.com>
28451 * config/i386/predicates.md
28452 (int_float_vector_all_ones_operand): New predicate.
28453 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
28455 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
28457 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
28459 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
28460 define_insn_and_split to avoid false dependence.
28461 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
28462 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
28463 of operands 1 to '0' to avoid false dependence.
28464 (*andnot<mode>3): Ditto.
28465 (iornot<mode>3): Ditto.
28466 (*<nlogic><mode>3): Ditto.
28468 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
28470 * common/config/i386/cpuinfo.h
28471 (get_intel_cpu): Handle Granite Rapids D.
28472 * common/config/i386/i386-common.cc:
28473 (processor_alias_table): Add graniterapids-d.
28474 * common/config/i386/i386-cpuinfo.h
28475 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
28476 * config.gcc: Add -march=graniterapids-d.
28477 * config/i386/driver-i386.cc (host_detect_local_cpu):
28478 Handle graniterapids-d.
28479 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
28480 * doc/extend.texi: Add graniterapids-d.
28481 * doc/invoke.texi: Ditto.
28483 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
28485 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
28486 Add OPTION_MASK_ISA_AVX512VL.
28487 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
28490 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28492 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
28493 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
28494 (shuffle_compress_patterns): Ditto.
28495 (expand_vec_perm_const_1): Ditto.
28497 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
28499 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
28500 * cfghooks.h (struct cfg_hooks): Change return type of
28501 verify_flow_info from integer to bool.
28502 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
28503 (can_delete_label_p): Ditto.
28504 (rtl_verify_flow_info): Change return type from int to bool
28505 and adjust function body accordingly. Change "err" variable to bool.
28506 (rtl_verify_flow_info_1): Ditto.
28507 (free_bb_for_insn): Change return type to void.
28508 (rtl_merge_blocks): Change "b_empty" variable to bool.
28509 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
28510 (verify_hot_cold_block_grouping): Change return type from int to bool.
28511 Change "err" variable to bool.
28512 (rtl_verify_edges): Ditto.
28513 (rtl_verify_bb_insns): Ditto.
28514 (rtl_verify_bb_pointers): Ditto.
28515 (rtl_verify_bb_insn_chain): Ditto.
28516 (rtl_verify_fallthru): Ditto.
28517 (rtl_verify_bb_layout): Ditto.
28518 (purge_all_dead_edges): Change "purged" variable to bool.
28519 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
28520 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
28521 (load_killed_in_block_p): Change return type from int to bool
28522 and adjust function body accordingly.
28523 (oprs_unchanged_p): Return true/false.
28524 (rest_of_handle_gcse2): Change return type to void.
28525 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
28526 int to bool. Change "err" variable to bool.
28528 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
28530 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
28532 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28534 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
28535 * internal-fn.cc (cond_len_unary_direct): Ditto.
28536 (cond_len_binary_direct): Ditto.
28537 (cond_len_ternary_direct): Ditto.
28538 (expand_cond_len_unary_optab_fn): Ditto.
28539 (expand_cond_len_binary_optab_fn): Ditto.
28540 (expand_cond_len_ternary_optab_fn): Ditto.
28541 (direct_cond_len_unary_optab_supported_p): Ditto.
28542 (direct_cond_len_binary_optab_supported_p): Ditto.
28543 (direct_cond_len_ternary_optab_supported_p): Ditto.
28544 * internal-fn.def (COND_LEN_ADD): Ditto.
28545 (COND_LEN_SUB): Ditto.
28546 (COND_LEN_MUL): Ditto.
28547 (COND_LEN_DIV): Ditto.
28548 (COND_LEN_MOD): Ditto.
28549 (COND_LEN_RDIV): Ditto.
28550 (COND_LEN_MIN): Ditto.
28551 (COND_LEN_MAX): Ditto.
28552 (COND_LEN_FMIN): Ditto.
28553 (COND_LEN_FMAX): Ditto.
28554 (COND_LEN_AND): Ditto.
28555 (COND_LEN_IOR): Ditto.
28556 (COND_LEN_XOR): Ditto.
28557 (COND_LEN_SHL): Ditto.
28558 (COND_LEN_SHR): Ditto.
28559 (COND_LEN_FMA): Ditto.
28560 (COND_LEN_FMS): Ditto.
28561 (COND_LEN_FNMA): Ditto.
28562 (COND_LEN_FNMS): Ditto.
28563 (COND_LEN_NEG): Ditto.
28564 * optabs.def (OPTAB_D): Ditto.
28566 2023-07-11 Richard Biener <rguenther@suse.de>
28568 PR tree-optimization/110614
28569 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
28570 SLP splats are not suitable for re-align ops.
28572 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
28574 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
28576 (vsx_quad_dform_memory_operand): Likewise.
28578 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
28580 * reorg.cc (stop_search_p): Change return type from int to bool
28581 and adjust function body accordingly.
28582 (resource_conflicts_p): Ditto.
28583 (insn_references_resource_p): Change return type from int to bool.
28584 (insn_sets_resource_p): Ditto.
28585 (redirect_with_delay_slots_safe_p): Ditto.
28586 (condition_dominates_p): Change return type from int to bool
28587 and adjust function body accordingly.
28588 (redirect_with_delay_list_safe_p): Ditto.
28589 (check_annul_list_true_false): Ditto. Change "annul_true_p"
28590 function argument to bool.
28591 (steal_delay_list_from_target): Change "pannul_p" function
28592 argument to bool pointer. Change "must_annul" and "used_annul"
28593 variables from int to bool.
28594 (steal_delay_list_from_fallthrough): Ditto.
28595 (own_thread_p): Change return type from int to bool and adjust
28596 function body accordingly. Change "allow_fallthrough" function
28598 (reorg_redirect_jump): Change return type from int to bool.
28599 (fill_simple_delay_slots): Change "non_jumps_p" function
28600 argument from int to bool. Change "maybe_never" varible to bool.
28601 (fill_slots_from_thread): Change "likely", "thread_if_true" and
28602 "own_thread" function arguments to bool. Change "lose" and
28603 "must_annul" variables to bool.
28604 (delete_from_delay_slot): Change "had_barrier" variable to bool.
28605 (try_merge_delay_insns): Change "annul_p" variable to bool.
28606 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
28608 (rest_of_handle_delay_slots): Change return type from int to void
28609 and adjust function body accordingly.
28611 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
28613 * doc/extend.texi (RISC-V Operand Modifiers): New.
28615 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28617 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
28618 (insert_insn_end_basic_block): Ditto.
28619 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
28620 * gcse.cc (insert_insn_end_basic_block): Export as global function.
28621 * gcse.h (insert_insn_end_basic_block): Ditto.
28623 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
28626 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
28627 (arm_builtin_decl): Hahndle MVE builtins.
28628 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
28629 (add_unique_function): Fix handling of
28630 __ARM_MVE_PRESERVE_USER_NAMESPACE.
28631 (add_overloaded_function): Likewise.
28632 * config/arm/arm-protos.h (builtin_decl): New declaration.
28634 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
28636 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
28638 2023-07-10 Xi Ruoyao <xry111@xry111.site>
28640 PR tree-optimization/110557
28641 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
28642 Ensure the output sign-extended if necessary.
28644 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
28646 * config/i386/i386.md (peephole2): Transform xchg insn with a
28647 REG_UNUSED note to a (simple) move.
28648 (*insvti_lowpart_1): New define_insn_and_split.
28649 (*insvdi_lowpart_1): Likewise.
28651 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
28653 * config/i386/i386-features.cc (compute_convert_gain): Tweak
28654 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
28655 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
28656 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
28658 2023-07-10 liuhongt <hongtao.liu@intel.com>
28661 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
28662 splitter to detect fp max pattern.
28663 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
28665 2023-07-09 Jan Hubicka <jh@suse.cz>
28667 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
28668 (dump_edge_info): Likewise.
28669 (dump_bb_info): Likewise.
28670 * profile-count.cc (profile_count::dump): Add comma between quality and
28673 2023-07-08 Jan Hubicka <jh@suse.cz>
28675 PR tree-optimization/110600
28676 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
28678 2023-07-08 Jan Hubicka <jh@suse.cz>
28680 PR middle-end/110590
28681 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
28682 inner loops and be more careful about inconsistent profiles.
28683 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
28684 exit is followed by other exit.
28686 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
28688 * cprop.cc (reg_available_p): Change return type from int to bool.
28689 (reg_not_set_p): Ditto.
28690 (try_replace_reg): Ditto. Change "success" variable to bool.
28691 (cprop_jump): Change return type from int to void
28692 and adjust function body accordingly.
28693 (constprop_register): Ditto.
28694 (cprop_insn): Ditto. Change "changed" variable to bool.
28695 (local_cprop_pass): Change return type from int to void
28696 and adjust function body accordingly.
28697 (bypass_block): Ditto. Change "change", "may_be_loop_header"
28698 and "removed_p" variables to bool.
28699 (bypass_conditional_jumps): Change return type from int to void
28700 and adjust function body accordingly. Change "changed"
28702 (one_cprop_pass): Ditto.
28704 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
28706 * gcse.cc (expr_equiv_p): Change return type from int to bool.
28707 (oprs_unchanged_p): Change return type from int to void
28708 and adjust function body accordingly.
28709 (oprs_anticipatable_p): Ditto.
28710 (oprs_available_p): Ditto.
28711 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
28712 arguments to bool. Change "found" variable to bool.
28713 (load_killed_in_block_p): Change return type from int to void and
28714 adjust function body accordingly. Change "avail_p" argument to bool.
28715 (pre_expr_reaches_here_p): Change return type from int to void
28716 and adjust function body accordingly.
28717 (pre_delete): Ditto. Change "changed" variable to bool.
28718 (pre_gcse): Change return type from int to void
28719 and adjust function body accordingly. Change "did_insert" and
28720 "changed" variables to bool.
28721 (one_pre_gcse_pass): Change return type from int to void
28722 and adjust function body accordingly. Change "changed" variable
28724 (should_hoist_expr_to_dom): Change return type from int to void
28725 and adjust function body accordingly. Change
28726 "visited_allocated_locally" variable to bool.
28727 (hoist_code): Change return type from int to void and adjust
28728 function body accordingly. Change "changed" variable to bool.
28729 (one_code_hoisting_pass): Ditto.
28730 (pre_edge_insert): Change return type from int to void and adjust
28731 function body accordingly. Change "did_insert" variable to bool.
28732 (pre_expr_reaches_here_p_work): Change return type from int to void
28733 and adjust function body accordingly.
28734 (simple_mem): Ditto.
28735 (want_to_gcse_p): Change return type from int to void
28736 and adjust function body accordingly.
28737 (can_assign_to_reg_without_clobbers_p): Update function body
28738 for bool return type.
28739 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
28740 (pre_insert_copies): Change "added_copy" variable to bool.
28742 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
28746 * doc/invoke.texi (Warning Options): Fix typos.
28748 2023-07-07 Jan Hubicka <jh@suse.cz>
28750 * profile-count.cc (profile_count::dump): Add FUN
28751 parameter; print relative frequency.
28752 (profile_count::debug): Update.
28753 * profile-count.h (profile_count::dump): Update
28756 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
28760 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
28761 TImode destinations from paradoxical SUBREGs (setting the lowpart)
28762 into explicit zero extensions. Use *insvti_highpart_1 instruction
28763 to set the highpart of a TImode destination.
28765 2023-07-07 Jan Hubicka <jh@suse.cz>
28767 * predict.cc (force_edge_cold): Use
28768 set_edge_probability_and_rescale_others; improve dumps.
28770 2023-07-07 Jan Hubicka <jh@suse.cz>
28772 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
28774 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
28777 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
28779 * config/s390/s390.cc (vec_init): Fix default case
28781 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
28783 * lra-assigns.cc (assign_by_spills): Add reload insns involving
28784 reload pseudos with non-refined class to be processed on the next
28786 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
28787 (in_class_p): Use it.
28788 (print_curr_insn_alt): New func.
28789 (process_alt_operands): Use it. Improve debug info.
28790 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
28791 pseudo class if it is not refined yet.
28793 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28795 * value-range.cc (irange::get_bitmask_from_range): Return all the
28796 known bits for a singleton.
28797 (irange::set_range_from_bitmask): Set a range of a singleton when
28798 all bits are known.
28800 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28802 * value-range.cc (irange::intersect): Leave normalization to
28805 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
28807 * data-streamer-in.cc (streamer_read_value_range): Adjust for
28809 * data-streamer-out.cc (streamer_write_vrange): Same.
28810 * range-op.cc (operator_cast::fold_range): Same.
28811 * value-range-pretty-print.cc
28812 (vrange_printer::print_irange_bitmasks): Same.
28813 * value-range-storage.cc (irange_storage::write_lengths_address):
28815 (irange_storage::set_irange): Same.
28816 (irange_storage::get_irange): Same.
28817 (irange_storage::size): Same.
28818 (irange_storage::dump): Same.
28819 * value-range-storage.h: Same.
28820 * value-range.cc (debug): New.
28821 (irange_bitmask::dump): New.
28822 (add_vrange): Adjust for value/mask.
28823 (irange::operator=): Same.
28824 (irange::set): Same.
28825 (irange::verify_range): Same.
28826 (irange::operator==): Same.
28827 (irange::contains_p): Same.
28828 (irange::irange_single_pair_union): Same.
28829 (irange::union_): Same.
28830 (irange::intersect): Same.
28831 (irange::invert): Same.
28832 (irange::get_nonzero_bits_from_range): Rename to...
28833 (irange::get_bitmask_from_range): ...this.
28834 (irange::set_range_from_nonzero_bits): Rename to...
28835 (irange::set_range_from_bitmask): ...this.
28836 (irange::set_nonzero_bits): Rename to...
28837 (irange::update_bitmask): ...this.
28838 (irange::get_nonzero_bits): Rename to...
28839 (irange::get_bitmask): ...this.
28840 (irange::intersect_nonzero_bits): Rename to...
28841 (irange::intersect_bitmask): ...this.
28842 (irange::union_nonzero_bits): Rename to...
28843 (irange::union_bitmask): ...this.
28844 (irange_bitmask::verify_mask): New.
28845 * value-range.h (class irange_bitmask): New.
28846 (irange_bitmask::set_unknown): New.
28847 (irange_bitmask::unknown_p): New.
28848 (irange_bitmask::irange_bitmask): New.
28849 (irange_bitmask::get_precision): New.
28850 (irange_bitmask::get_nonzero_bits): New.
28851 (irange_bitmask::set_nonzero_bits): New.
28852 (irange_bitmask::operator==): New.
28853 (irange_bitmask::union_): New.
28854 (irange_bitmask::intersect): New.
28855 (class irange): Friend vrange_printer.
28856 (irange::varying_compatible_p): Adjust for bitmask.
28857 (irange::set_varying): Same.
28858 (irange::set_nonzero): Same.
28860 2023-07-07 Jan Beulich <jbeulich@suse.com>
28862 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
28864 2023-07-07 Jan Beulich <jbeulich@suse.com>
28866 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
28867 alternative. Switch new last alternative's "isa" attribute to
28869 (vec_extract_hi_v32qi): Likewise.
28871 2023-07-07 Pan Li <pan2.li@intel.com>
28872 Robin Dapp <rdapp@ventanamicro.com>
28874 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
28876 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
28877 (riscv_mode_exit): Likewise for exit mode.
28878 (riscv_mode_needed): Likewise for needed mode.
28879 (riscv_mode_after): Likewise for after mode.
28881 2023-07-07 Pan Li <pan2.li@intel.com>
28883 * config/riscv/vector.md: Fix typo.
28885 2023-07-06 Jan Hubicka <jh@suse.cz>
28887 PR middle-end/25623
28888 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
28889 of iterations determined.
28890 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
28892 2023-07-06 Jan Hubicka <jh@suse.cz>
28894 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
28895 probability update to be safe on loops with subloops.
28896 Make bound parameter to be iteration bound.
28897 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
28898 of scale_loop_profile.
28899 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
28901 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
28903 PR tree-optimization/110449
28904 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
28905 vec_loop for the unrolled loop.
28907 2023-07-06 Jan Hubicka <jh@suse.cz>
28909 * cfg.cc (set_edge_probability_and_rescale_others): New function.
28910 (update_bb_profile_for_threading): Use it; simplify the rest.
28911 * cfg.h (set_edge_probability_and_rescale_others): Declare.
28912 * profile-count.h (profile_probability::apply_scale): New.
28914 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
28916 * doc/extend.texi (ARC Built-in Functions): Update documentation
28917 with missing builtins.
28919 2023-07-06 Richard Biener <rguenther@suse.de>
28921 PR tree-optimization/110556
28922 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
28923 assign code and all operands of non-stores.
28925 2023-07-06 Richard Biener <rguenther@suse.de>
28927 PR tree-optimization/110563
28928 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
28929 Remove second argument.
28930 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
28931 Remove for_epilogue_p argument. Merge assert ...
28932 (vect_analyze_loop_2): ... with check done before determining
28933 partial vectors by moving it after.
28934 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
28936 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28938 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
28939 few things re 'reorder' option and strings.
28940 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
28942 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28944 * gengtype-parse.cc: Clean up obsolete parametrized structs
28946 * gengtype.cc: Likewise.
28947 * gengtype.h: Likewise.
28949 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28951 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
28954 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28956 * gengtype-parse.cc (token_names): Add '"user"'.
28957 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
28958 'FIRST_TOKEN_WITH_VALUE'.
28960 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28962 * doc/gty.texi (GTY Options) <string_length>: Enhance.
28964 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28966 * gengtype.cc (write_root, write_roots): Explicitly reject
28967 'string_length' option.
28968 * doc/gty.texi (GTY Options) <string_length>: Document.
28970 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
28972 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
28973 (ggc_pch_write_object): Remove 'bool is_string' argument.
28974 * ggc-common.cc: Adjust.
28975 * ggc-page.cc: Likewise.
28977 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
28979 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
28981 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
28983 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
28984 and add description for inling of function with arch and tune
28987 2023-07-06 Richard Biener <rguenther@suse.de>
28989 PR tree-optimization/110515
28990 * tree-ssa-pre.cc (compute_avail): Make code dealing
28991 with hoisting loads with different alias-sets more
28994 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28996 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
28998 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
29000 * config/i386/i386.cc (ix86_can_inline_p): If callee has
29001 default arch=x86-64 and tune=generic, do not block the
29002 inlining to its caller. Also allow callee with different
29003 arch= to be inlined if it has always_inline attribute and
29004 it's ISA is subset of caller's.
29006 2023-07-06 liuhongt <hongtao.liu@intel.com>
29008 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
29009 DF/SFmode AND/IOR/XOR/ANDN operations.
29011 2023-07-06 Andrew Pinski <apinski@marvell.com>
29013 PR middle-end/110554
29014 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
29015 just build using boolean_type_node instead of the cond_type.
29016 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
29017 that will feed into the COND_EXPR.
29019 2023-07-06 liuhongt <hongtao.liu@intel.com>
29022 * config/i386/i386.md (movdf_internal): Disparage slightly for
29023 2 alternatives (r,v) and (v,r) by adding constraint modifier
29026 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
29029 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
29030 initialization of new_addr.
29032 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
29034 PR tree-optimization/110474
29035 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
29036 unroll factor while selecting the epilog vect loop VF.
29038 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
29040 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
29043 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
29045 * gimple-range-gori.cc (compute_operand_range): After calling
29046 compute_operand2_range, recursively call self if needed.
29047 (compute_operand2_range): Turn into a leaf function.
29048 (gori_compute::compute_operand1_and_operand2_range): Finish
29049 operand2 calculation.
29050 * gimple-range-gori.h (compute_operand2_range): Remove name param.
29052 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
29054 * gimple-range-gori.cc (compute_operand_range): After calling
29055 compute_operand1_range, recursively call self if needed.
29056 (compute_operand1_range): Turn into a leaf function.
29057 (gori_compute::compute_operand1_and_operand2_range): Finish
29058 operand1 calculation.
29059 * gimple-range-gori.h (compute_operand1_range): Remove name param.
29061 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
29063 * gimple-range-gori.cc (compute_operand_range): Check for
29064 operand interdependence when both op1 and op2 are computed.
29065 (compute_operand1_and_operand2_range): No checks required now.
29067 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
29069 * gimple-range-gori.cc (compute_operand_range): Check for
29070 a relation between op1 and op2 and use that instead.
29071 (compute_operand1_range): Don't look for a relation override.
29072 (compute_operand2_range): Ditto.
29074 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
29076 * doc/contrib.texi (Contributors): Update my entry.
29078 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
29080 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
29083 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
29085 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
29086 scehdule_more_p and contributes_to_priority indirect frunction
29087 type from int to bool.
29088 (no_real_insns_p): Change return type from int to bool.
29089 (contributes_to_priority): Ditto.
29090 * haifa-sched.cc (no_real_insns_p): Change return type from
29091 int to bool and adjust function body accordingly.
29092 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
29093 variable type from int to bool.
29094 (ps_insn_advance_column): Change return type from int to bool.
29095 (ps_has_conflicts): Ditto. Change "has_conflicts"
29096 variable type from int to bool.
29097 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
29098 (conditions_mutex_p): Ditto.
29099 * sched-ebb.cc (schedule_more_p): Ditto.
29100 (ebb_contributes_to_priority): Change return type from
29101 int to bool and adjust function body accordingly.
29102 * sched-rgn.cc (is_cfg_nonregular): Ditto.
29103 (check_live_1): Ditto.
29105 (find_conditional_protection): Ditto.
29106 (is_conditionally_protected): Ditto.
29107 (is_prisky): Ditto.
29108 (is_exception_free): Ditto.
29109 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
29110 variables from int to bool.
29111 (extend_rgns): Change "rescan" variable from int to bool.
29112 (check_live): Change return type from
29113 int to bool and adjust function body accordingly.
29114 (can_schedule_ready_p): Ditto.
29115 (schedule_more_p): Ditto.
29116 (contributes_to_priority): Ditto.
29118 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
29120 * doc/md.texi: Document that vec_set and vec_extract must not
29122 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
29123 (gimple_expand_vec_set_extract_expr): ...to this.
29124 (gimple_expand_vec_exprs): Call renamed function.
29125 * internal-fn.cc (vec_extract_direct): Add.
29126 (expand_vec_extract_optab_fn): New function to expand
29128 (direct_vec_extract_optab_supported_p): Add.
29129 * internal-fn.def (VEC_EXTRACT): Add.
29130 * optabs.cc (can_vec_extract_var_idx_p): New function.
29131 * optabs.h (can_vec_extract_var_idx_p): Declare.
29133 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
29135 * config/riscv/autovec.md: Add gen_lowpart.
29137 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
29139 * config/riscv/autovec.md: Allow register index operand.
29141 2023-07-05 Pan Li <pan2.li@intel.com>
29143 * config/riscv/riscv-vector-builtins.cc
29144 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
29146 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
29148 * config/riscv/autovec.md: Use float_truncate.
29150 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29152 * internal-fn.cc (internal_fn_len_index): Apply
29153 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
29154 (internal_fn_mask_index): Ditto.
29155 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
29156 (supports_vec_scatter_store_p): Ditto.
29157 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
29158 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
29159 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
29160 (vect_get_strided_load_store_ops): Ditto.
29161 (vectorizable_store): Ditto.
29162 (vectorizable_load): Ditto.
29164 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
29165 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29167 * simplify-rtx.cc (native_encode_rtx): Ditto.
29168 (native_decode_vector_rtx): Ditto.
29169 (simplify_const_vector_byte_offset): Ditto.
29170 (simplify_const_vector_subreg): Ditto.
29171 * tree.cc (build_truth_vector_type_for_mode): Ditto.
29172 * varasm.cc (output_constant_pool_2): Ditto.
29174 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
29176 * config/mips/mips.cc (mips_expand_block_move): don't expand for
29177 r6 with -mno-unaligned-access option if one or both of src and
29178 dest are unaligned. restruct: return directly if length is not const.
29179 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
29181 2023-07-05 Jan Beulich <jbeulich@suse.com>
29184 * config/i386/sse.md: New splitters to simplify
29185 not;vec_duplicate as a singular vpternlog.
29186 (one_cmpl<mode>2): Allow broadcast for operand 1.
29187 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
29189 2023-07-05 Jan Beulich <jbeulich@suse.com>
29192 * config/i386/sse.md: New splitters to simplify
29193 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
29195 2023-07-05 Jan Beulich <jbeulich@suse.com>
29198 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
29199 form of splitter for PR target/100711.
29201 2023-07-05 Richard Biener <rguenther@suse.de>
29203 PR middle-end/110541
29204 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
29207 2023-07-05 Jan Beulich <jbeulich@suse.com>
29210 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
29211 for memory form operand 1.
29213 2023-07-05 Jan Beulich <jbeulich@suse.com>
29216 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
29217 bitwise vector operations.
29218 * config/i386/sse.md (*iornot<mode>3): New insn.
29219 (*xnor<mode>3): Likewise.
29220 (*<nlogic><mode>3): Likewise.
29221 (andor): New code iterator.
29222 (nlogic): New code attribute.
29223 (ternlog_nlogic): Likewise.
29225 2023-07-05 Richard Biener <rguenther@suse.de>
29227 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
29229 2023-07-05 yulong <shiyulong@iscas.ac.cn>
29231 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
29233 2023-07-05 yulong <shiyulong@iscas.ac.cn>
29235 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
29236 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
29237 (ADJUST_ALIGNMENT): Ditto.
29238 (RVV_TUPLE_PARTIAL_MODES): Ditto.
29239 (ADJUST_NUNITS): Ditto.
29240 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
29242 (vfloat16mf4x3_t): Ditto.
29243 (vfloat16mf4x4_t): Ditto.
29244 (vfloat16mf4x5_t): Ditto.
29245 (vfloat16mf4x6_t): Ditto.
29246 (vfloat16mf4x7_t): Ditto.
29247 (vfloat16mf4x8_t): Ditto.
29248 (vfloat16mf2x2_t): Ditto.
29249 (vfloat16mf2x3_t): Ditto.
29250 (vfloat16mf2x4_t): Ditto.
29251 (vfloat16mf2x5_t): Ditto.
29252 (vfloat16mf2x6_t): Ditto.
29253 (vfloat16mf2x7_t): Ditto.
29254 (vfloat16mf2x8_t): Ditto.
29255 (vfloat16m1x2_t): Ditto.
29256 (vfloat16m1x3_t): Ditto.
29257 (vfloat16m1x4_t): Ditto.
29258 (vfloat16m1x5_t): Ditto.
29259 (vfloat16m1x6_t): Ditto.
29260 (vfloat16m1x7_t): Ditto.
29261 (vfloat16m1x8_t): Ditto.
29262 (vfloat16m2x2_t): Ditto.
29263 (vfloat16m2x3_t): Ditto.
29264 (vfloat16m2x4_t): Ditto.
29265 (vfloat16m4x2_t): Ditto.
29266 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
29267 (vfloat16mf4x3_t): Ditto.
29268 (vfloat16mf4x4_t): Ditto.
29269 (vfloat16mf4x5_t): Ditto.
29270 (vfloat16mf4x6_t): Ditto.
29271 (vfloat16mf4x7_t): Ditto.
29272 (vfloat16mf4x8_t): Ditto.
29273 (vfloat16mf2x2_t): Ditto.
29274 (vfloat16mf2x3_t): Ditto.
29275 (vfloat16mf2x4_t): Ditto.
29276 (vfloat16mf2x5_t): Ditto.
29277 (vfloat16mf2x6_t): Ditto.
29278 (vfloat16mf2x7_t): Ditto.
29279 (vfloat16mf2x8_t): Ditto.
29280 (vfloat16m1x2_t): Ditto.
29281 (vfloat16m1x3_t): Ditto.
29282 (vfloat16m1x4_t): Ditto.
29283 (vfloat16m1x5_t): Ditto.
29284 (vfloat16m1x6_t): Ditto.
29285 (vfloat16m1x7_t): Ditto.
29286 (vfloat16m1x8_t): Ditto.
29287 (vfloat16m2x2_t): Ditto.
29288 (vfloat16m2x3_t): Ditto.
29289 (vfloat16m2x4_t): Ditto.
29290 (vfloat16m4x2_t): Ditto.
29291 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
29292 * config/riscv/riscv.md: New.
29293 * config/riscv/vector-iterators.md: New.
29295 2023-07-04 Andrew Pinski <apinski@marvell.com>
29297 PR tree-optimization/110487
29298 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
29299 build a nonstandard integer and use that.
29301 2023-07-04 Andrew Pinski <apinski@marvell.com>
29303 * match.pd (a?-1:0): Cast type an integer type
29304 rather the type before the negative.
29305 (a?0:-1): Likewise.
29307 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29309 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
29310 Change to use HARD_REG_BIT and its macros.
29311 * config/xtensa/xtensa.md
29312 (peephole2: regmove elimination during DFmode input reload):
29315 2023-07-04 Richard Biener <rguenther@suse.de>
29317 PR tree-optimization/110491
29318 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
29319 whether the PHI args are possibly undefined before folding
29322 2023-07-04 Pan Li <pan2.li@intel.com>
29323 Thomas Schwinge <thomas@codesourcery.com>
29325 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
29326 bits for machine mode table.
29327 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
29328 HOST machine mode bits.
29329 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
29330 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
29332 * tree-streamer.h (streamer_mode_table): Ditto.
29333 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
29334 as the packing limit.
29335 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
29337 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
29339 * lto-streamer.h (class lto_input_block): Capture
29340 'lto_file_decl_data *file_data' instead of just
29341 'unsigned char *mode_table'.
29342 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
29343 * ipa-fnsummary.cc (inline_read_section): Likewise.
29344 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
29345 * ipa-modref.cc (read_section): Likewise.
29346 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
29348 * ipa-sra.cc (isra_read_summary_section): Likewise.
29349 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
29350 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
29351 * lto-streamer-in.cc (lto_read_body_or_constructor)
29352 (lto_input_toplevel_asms): Likewise.
29353 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
29355 2023-07-04 Richard Biener <rguenther@suse.de>
29357 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
29358 (empty_bb_or_one_feeding_into_p): Check for them.
29359 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
29360 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
29362 2023-07-04 Richard Biener <rguenther@suse.de>
29364 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
29365 check guarding scalar_niter underflow.
29367 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
29369 PR tree-optimization/110531
29370 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
29371 slp_done_for_suggested_uf to false.
29373 2023-07-04 Richard Biener <rguenther@suse.de>
29375 PR tree-optimization/110228
29376 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
29377 Mark SSA may-undefs.
29378 (bb_no_side_effects_p): Check stmt uses for undefs.
29380 2023-07-04 Richard Biener <rguenther@suse.de>
29382 PR tree-optimization/110436
29383 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
29384 force live but not relevant pattern stmts relevant.
29386 2023-07-04 Lili Cui <lili.cui@intel.com>
29388 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
29389 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
29391 2023-07-04 Richard Biener <rguenther@suse.de>
29393 PR middle-end/110495
29394 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
29395 since we do not set TREE_OVERFLOW on those since the
29396 introduction of VL vectors.
29397 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
29398 at TREE_OVERFLOW to determine validity of association.
29400 2023-07-04 Richard Biener <rguenther@suse.de>
29402 PR tree-optimization/110310
29403 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
29404 Move costing part ...
29405 (vect_analyze_loop_costing): ... here. Integrate better
29406 estimate for epilogues from ...
29407 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
29408 with actual epilogue status.
29409 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
29410 avoid cancelling epilogue vectorization.
29411 (vect_update_epilogue_niters): Remove. No longer update
29412 epilogue LOOP_VINFO_NITERS.
29414 2023-07-04 Pan Li <pan2.li@intel.com>
29417 2023-07-03 Pan Li <pan2.li@intel.com>
29419 * config/riscv/vector.md: Fix typo.
29421 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29423 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
29424 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
29425 (expand_gather_load_optab_fn): Ditto.
29426 (internal_load_fn_p): Ditto.
29427 (internal_store_fn_p): Ditto.
29428 (internal_gather_scatter_fn_p): Ditto.
29429 (internal_fn_len_index): Ditto.
29430 (internal_fn_mask_index): Ditto.
29431 (internal_fn_stored_value_index): Ditto.
29432 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
29433 (LEN_MASK_SCATTER_STORE): Ditto.
29434 * optabs.def (OPTAB_CD): Ditto.
29436 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29438 * config/riscv/riscv-vsetvl.cc
29439 (vector_insn_info::parse_insn): Add early break.
29441 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
29443 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
29444 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
29446 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
29448 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
29450 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
29452 * common/config/riscv/riscv-common.cc: Add support for zvbb,
29453 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
29454 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
29455 * config/riscv/arch-canonicalize: Add canonicalization info for
29456 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
29457 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
29458 (MASK_ZVBC): Likewise.
29459 (TARGET_ZVBB): Likewise.
29460 (TARGET_ZVBC): Likewise.
29461 (MASK_ZVKG): Likewise.
29462 (MASK_ZVKNED): Likewise.
29463 (MASK_ZVKNHA): Likewise.
29464 (MASK_ZVKNHB): Likewise.
29465 (MASK_ZVKSED): Likewise.
29466 (MASK_ZVKSH): Likewise.
29467 (MASK_ZVKN): Likewise.
29468 (MASK_ZVKNC): Likewise.
29469 (MASK_ZVKNG): Likewise.
29470 (MASK_ZVKS): Likewise.
29471 (MASK_ZVKSC): Likewise.
29472 (MASK_ZVKSG): Likewise.
29473 (MASK_ZVKT): Likewise.
29474 (TARGET_ZVKG): Likewise.
29475 (TARGET_ZVKNED): Likewise.
29476 (TARGET_ZVKNHA): Likewise.
29477 (TARGET_ZVKNHB): Likewise.
29478 (TARGET_ZVKSED): Likewise.
29479 (TARGET_ZVKSH): Likewise.
29480 (TARGET_ZVKN): Likewise.
29481 (TARGET_ZVKNC): Likewise.
29482 (TARGET_ZVKNG): Likewise.
29483 (TARGET_ZVKS): Likewise.
29484 (TARGET_ZVKSC): Likewise.
29485 (TARGET_ZVKSG): Likewise.
29486 (TARGET_ZVKT): Likewise.
29487 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
29489 2023-07-03 Andrew Pinski <apinski@marvell.com>
29491 PR middle-end/110510
29492 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
29494 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
29496 * config/darwin.h: Avoid duplicate multiply_defined specs on
29497 earlier Darwin versions with shared libgcc.
29499 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
29501 * tree.h (tree_int_cst_equal): Change return type from int to bool.
29502 (operand_equal_for_phi_arg_p): Ditto.
29503 (tree_map_base_marked_p): Ditto.
29504 * tree.cc (contains_placeholder_p): Update function body
29505 for bool return type.
29506 (type_cache_hasher::equal): Ditto.
29507 (tree_map_base_hash): Change return type
29508 from int to void and adjust function body accordingly.
29509 (tree_int_cst_equal): Ditto.
29510 (operand_equal_for_phi_arg_p): Ditto.
29511 (get_narrower): Change "first" variable to bool.
29512 (cl_option_hasher::equal): Update function body for bool return type.
29513 * ggc.h (ggc_set_mark): Change return type from int to bool.
29514 (ggc_marked_p): Ditto.
29515 * ggc-page.cc (gt_ggc_mx): Change return type
29516 from int to void and adjust function body accordingly.
29517 (ggc_set_mark): Ditto.
29519 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29521 * config/riscv/autovec.md: Change order of
29522 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29523 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
29524 * doc/md.texi: Ditto.
29525 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
29526 * internal-fn.cc (len_maskload_direct): Ditto.
29527 (len_maskstore_direct): Ditto.
29528 (add_len_and_mask_args): New function.
29529 (expand_partial_load_optab_fn): Change order of
29530 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29531 (expand_partial_store_optab_fn): Ditto.
29532 (internal_fn_len_index): New function.
29533 (internal_fn_mask_index): Change order of
29534 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29535 (internal_fn_stored_value_index): Ditto.
29536 (internal_len_load_store_bias): Ditto.
29537 * internal-fn.h (internal_fn_len_index): New function.
29538 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
29539 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
29540 * tree-vect-stmts.cc (vectorizable_store): Ditto.
29541 (vectorizable_load): Ditto.
29543 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
29546 * doc/gm2.texi (Semantic checking): Include examples using
29547 -Wuninit-variable-checking.
29549 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29551 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29552 (*single_widen_fnma<mode>): Ditto.
29553 (*double_widen_fms<mode>): Ditto.
29554 (*single_widen_fms<mode>): Ditto.
29555 (*double_widen_fnms<mode>): Ditto.
29556 (*single_widen_fnms<mode>): Ditto.
29558 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29560 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
29561 into "*" in pattern name which simplifies build files.
29562 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
29563 (*pred_single_widen_mul<mode>): New pattern.
29565 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
29567 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
29568 the index to be 0 or 1.
29570 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
29573 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29575 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29576 (*single_widen_fnma<mode>): Ditto.
29577 (*double_widen_fms<mode>): Ditto.
29578 (*single_widen_fms<mode>): Ditto.
29579 (*double_widen_fnms<mode>): Ditto.
29580 (*single_widen_fnms<mode>): Ditto.
29582 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29584 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
29585 (*single_widen_fnma<mode>): Ditto.
29586 (*double_widen_fms<mode>): Ditto.
29587 (*single_widen_fms<mode>): Ditto.
29588 (*double_widen_fnms<mode>): Ditto.
29589 (*single_widen_fnms<mode>): Ditto.
29591 2023-07-03 Pan Li <pan2.li@intel.com>
29593 * config/riscv/vector.md: Fix typo.
29595 2023-07-03 Richard Biener <rguenther@suse.de>
29597 PR tree-optimization/110506
29598 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
29599 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
29601 2023-07-03 Richard Biener <rguenther@suse.de>
29603 PR tree-optimization/110506
29604 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
29605 type before relying on TYPE_PRECISION to produce a nonzero mask.
29607 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29609 * config/mips/mips.md(*and<mode>3_mips16): Generates
29610 ZEB/ZEH instructions.
29612 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29614 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
29615 address register to M16_REGS for MIPS16.
29616 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
29617 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
29618 (AVAIL_NON_MIPS16 (cache..)): Update to
29619 AVAIL_MIPS16E2_OR_NON_MIPS16.
29620 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
29621 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
29623 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29625 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
29626 for ISA_HAS_MIPS16E2.
29627 (ISA_HAS_SYNC): Same as above.
29628 (ISA_HAS_LL_SC): Same as above.
29630 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29632 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
29633 Add logics for generating instruction.
29634 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
29635 * config/mips/mips.md(mov_<load>l): Generates instructions.
29636 (mov_<load>r): Same as above.
29637 (mov_<store>l): Adjusted for the conditions above.
29638 (mov_<store>r): Same as above.
29639 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
29640 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
29642 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29644 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
29645 (mips_const_insns): Same as above.
29646 (mips_output_move): Same as above.
29647 (mips_output_function_prologue): Same as above.
29648 * config/mips/mips.md: Same as above
29650 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29652 * config/mips/constraints.md(Yz): New constraints for mips16e2.
29653 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
29654 (mips_bit_clear_info): Same as above.
29655 * config/mips/mips.cc(mips_bit_clear_info): New function for
29656 generating instructions.
29657 (mips_bit_clear_p): Same as above.
29658 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
29659 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
29660 (*and<mode>3): Generates INS instruction.
29661 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
29662 (ior<mode>3): Add logics for ORI instruction.
29663 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
29664 (*ior<mode>3_mips16): Add logics for XORI instruction.
29665 (*xor<mode>3_mips16): Generates XORI instrucion.
29666 (*extzv<mode>): Add logics for EXT instruction.
29667 (*insv<mode>): Add logics for INS instruction.
29668 * config/mips/predicates.md(bit_clear_operand): New predicate for
29669 generating bitwise instructions.
29670 (and_reg_operand): Add logics for generating bitwise instructions.
29672 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29674 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
29675 that uses global pointer register.
29676 (mips16_unextended_reference_p): Same as above.
29677 (mips_pic_base_register): Same as above.
29678 (mips_init_relocs): Same as above.
29679 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
29680 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
29681 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
29682 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
29684 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29686 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
29687 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
29688 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
29689 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
29690 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
29691 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
29693 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
29695 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
29697 * config/mips/mips.h(__mips_mips16e2): Defined a new
29699 (ISA_HAS_MIPS16E2): Defined a new macro.
29700 (ASM_SPEC): Pass mmips16e2 to the assembler.
29701 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
29702 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
29703 * doc/invoke.texi: Add -m(no-)mips16e2 option..
29705 2023-07-02 Jakub Jelinek <jakub@redhat.com>
29707 PR tree-optimization/110508
29708 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
29709 REALPART_EXPR opf nlhs if re2 is non-NULL.
29711 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29713 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
29715 * config/xtensa/xtensa.md (*xtensa_clamps):
29716 Add TARGET_MINMAX to the condition.
29718 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29720 * config/xtensa/xtensa.md (*eqne_INT_MIN):
29721 Add missing ":SI" to the match_operator.
29723 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
29726 * config/darwin.opt: Add fconstant-cfstrings alias to
29727 mconstant-cfstrings.
29728 * doc/invoke.texi: Amend invocation descriptions to reflect
29729 that the fconstant-cfstrings is a target-option alias and to
29730 add the missing mconstant-cfstrings option description to the
29733 2023-07-01 Jan Hubicka <jh@suse.cz>
29735 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
29736 parmaeter; update profile.
29737 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
29738 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
29739 (static_loop_exit): ... this; return the edge to be elliminated.
29740 (ch_base::copy_headers): Handle profile updating for eliminated exits.
29742 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
29744 * config/i386/i386-features.cc (compute_convert_gain): Provide
29745 gains/costs for ROTATE and ROTATERT (by an integer constant).
29746 (general_scalar_chain::convert_rotate): New helper function to
29747 convert a DImode or SImode rotation by an integer constant into
29749 (general_scalar_chain::convert_insn): Call the new convert_rotate
29750 for ROTATE and ROTATERT.
29751 (general_scalar_to_vector_candidate_p): Consider ROTATE and
29752 ROTATERT to be candidates if the second operand is an integer
29753 constant, valid for a rotation (or shift) in the given mode.
29754 * config/i386/i386-features.h (general_scalar_chain): Add new
29755 helper method convert_rotate.
29757 2023-07-01 Jan Hubicka <jh@suse.cz>
29759 PR tree-optimization/103680
29760 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
29761 make message clearer.
29763 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
29765 PR tree-optimization/101832
29766 * tree-object-size.cc (addr_object_size): Handle structure/union type
29767 when it has flexible size.
29769 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
29771 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
29772 (fold_nonarray_ctor_reference): Likewise. Specifically deal
29773 with integral bit-fields.
29774 (fold_ctor_reference): Make sure that the constructor uses the
29775 native storage order.
29777 2023-06-30 Jan Hubicka <jh@suse.cz>
29779 PR middle-end/109849
29780 * predict.cc (estimate_bb_frequencies): Turn to static function.
29781 (expr_expected_value_1): Fix handling of binary expressions with
29783 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
29784 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
29786 * predict.h (estimate_bb_frequencies): No longer declare it.
29788 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
29790 * fold-const.h (multiple_of_p): Change return type from int to bool.
29791 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
29792 neg_conp_p and neg_var_p variables to bool.
29793 (const_binop): Change sat_p variable to bool.
29794 (merge_ranges): Change no_overlap variable to bool.
29795 (extract_muldiv_1): Change same_p variable to bool.
29796 (tree_swap_operands_p): Update function body for bool return type.
29797 (fold_truth_andor): Change commutative variable to bool.
29798 (multiple_of_p): Change return type
29799 from int to void and adjust function body accordingly.
29800 * optabs.h (expand_twoval_unop): Change return type from int to bool.
29801 (expand_twoval_binop): Ditto.
29802 (can_compare_p): Ditto.
29803 (have_add2_insn): Ditto.
29804 (have_addptr3_insn): Ditto.
29805 (have_sub2_insn): Ditto.
29806 (have_insn_for): Ditto.
29807 * optabs.cc (add_equal_note): Ditto.
29808 (widen_operand): Change no_extend argument from int to bool.
29809 (expand_binop): Ditto.
29810 (expand_twoval_unop): Change return type
29811 from int to void and adjust function body accordingly.
29812 (expand_twoval_binop): Ditto.
29813 (can_compare_p): Ditto.
29814 (have_add2_insn): Ditto.
29815 (have_addptr3_insn): Ditto.
29816 (have_sub2_insn): Ditto.
29817 (have_insn_for): Ditto.
29819 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29821 * config/aarch64/aarch64-simd.md
29822 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
29823 Expansions for abd vec widen optabs.
29824 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
29825 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
29826 that give the appropriate extend RTL for the max RTL.
29828 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
29830 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
29831 * optabs.def (vec_widen_sabd_optab,
29832 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
29833 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
29834 vec_widen_uabd_optab,
29835 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
29836 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
29838 * doc/md.texi: Document them.
29839 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
29840 to build a VEC_WIDEN_ABD call if the input precision is smaller
29841 than the precision of the output.
29842 (vect_recog_widen_abd_pattern): Should an ABD expression be
29843 found preceeding an extension, replace the two with a
29846 2023-06-30 Pan Li <pan2.li@intel.com>
29848 * config/riscv/vector.md: Refactor the common condition.
29850 2023-06-30 Richard Biener <rguenther@suse.de>
29852 PR tree-optimization/110496
29853 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
29854 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
29856 2023-06-30 Richard Biener <rguenther@suse.de>
29858 PR middle-end/110489
29859 * statistics.cc (curr_statistics_hash): Add argument
29860 indicating whether we should allocate the hash.
29861 (statistics_fini_pass): If the hash isn't allocated
29862 only print the summary header.
29864 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
29865 Thomas Schwinge <thomas@codesourcery.com>
29867 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
29869 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
29872 * config/mips/mips.cc (mips_function_arg_alignment): Returns
29873 the alignment of function argument. In case of typedef type,
29874 it returns the aligment of the aliased type.
29875 (mips_function_arg_boundary): Relocated calculation of the
29876 aligment of function arguments.
29878 2023-06-29 Jan Hubicka <jh@suse.cz>
29880 PR tree-optimization/109849
29881 * ipa-fnsummary.cc (decompose_param_expr): Skip
29882 functions returning its parameter.
29883 (set_cond_stmt_execution_predicate): Return early
29884 if predicate was constructed.
29886 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
29889 * doc/extend.texi: Document GCC extension on a structure containing
29890 a flexible array member to be a member of another structure.
29892 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
29894 * print-tree.cc (print_node): Print new bit type_include_flexarray.
29895 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
29896 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
29897 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
29898 in bit no_named_args_stdarg_p properly for its corresponding type.
29899 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
29900 out bit no_named_args_stdarg_p properly for its corresponding type.
29901 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
29903 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
29905 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
29906 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
29907 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
29909 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
29911 * value-range.cc (frange::set): Do not call verify_range.
29912 (frange::normalize_kind): Verify range.
29913 (frange::union_nans): Do not call verify_range.
29914 (frange::union_): Same.
29915 (frange::intersect): Same.
29916 (irange::irange_single_pair_union): Call normalize_kind if
29918 (irange::union_): Same.
29919 (irange::intersect): Same.
29920 (irange::set_range_from_nonzero_bits): Verify range.
29921 (irange::set_nonzero_bits): Call normalize_kind if necessary.
29922 (irange::get_nonzero_bits): Tweak comment.
29923 (irange::intersect_nonzero_bits): Call normalize_kind if
29925 (irange::union_nonzero_bits): Same.
29926 * value-range.h (irange::normalize_kind): Verify range.
29928 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
29930 * cselib.h (rtx_equal_for_cselib_1):
29931 Change return type from int to bool.
29932 (references_value_p): Ditto.
29933 (rtx_equal_for_cselib_p): Ditto.
29934 * expr.h (can_store_by_pieces): Ditto.
29935 (try_casesi): Ditto.
29936 (try_tablejump): Ditto.
29937 (safe_from_p): Ditto.
29938 * sbitmap.h (bitmap_equal_p): Ditto.
29939 * cselib.cc (references_value_p): Change return type
29940 from int to void and adjust function body accordingly.
29941 (rtx_equal_for_cselib_1): Ditto.
29942 * expr.cc (is_aligning_offset): Ditto.
29943 (can_store_by_pieces): Ditto.
29944 (mostly_zeros_p): Ditto.
29945 (all_zeros_p): Ditto.
29946 (safe_from_p): Ditto.
29947 (is_aligning_offset): Ditto.
29948 (try_casesi): Ditto.
29949 (try_tablejump): Ditto.
29950 (store_constructor): Change "need_to_clear" and
29951 "const_bounds_p" variables to bool.
29952 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
29954 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
29956 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
29959 2023-06-29 Richard Biener <rguenther@suse.de>
29961 PR tree-optimization/110460
29962 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
29963 Only allow integral, pointer and scalar float type scalar_type.
29965 2023-06-29 Lili Cui <lili.cui@intel.com>
29967 PR tree-optimization/110148
29968 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
29969 ops in this function.
29971 2023-06-29 Richard Biener <rguenther@suse.de>
29973 PR middle-end/110452
29974 * expr.cc (store_constructor): Handle uniform boolean
29975 vectors with integer mode specially.
29977 2023-06-29 Richard Biener <rguenther@suse.de>
29979 PR middle-end/110461
29980 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
29983 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
29985 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
29986 (array_slice): Relax va_gc constructor to handle all vectors
29987 with a vl_embed layout.
29989 2023-06-29 Pan Li <pan2.li@intel.com>
29991 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
29992 (riscv_mode_needed): Likewise.
29993 (riscv_entity_mode_after): Likewise.
29994 (riscv_mode_after): Likewise.
29995 (riscv_mode_entry): Likewise.
29996 (riscv_mode_exit): Likewise.
29997 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
29999 * config/riscv/riscv.md: Add FRM register.
30000 * config/riscv/vector-iterators.md: Add FRM type.
30001 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
30002 (fsrm): Define new insn for fsrm instruction.
30004 2023-06-29 Pan Li <pan2.li@intel.com>
30006 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
30007 Add macro for static frm min and max.
30008 * config/riscv/riscv-vector-builtins-bases.cc
30009 (class binop_frm): New class for floating-point with frm.
30010 (BASE): Add vfadd for frm.
30011 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
30012 * config/riscv/riscv-vector-builtins-functions.def
30013 (vfadd_frm): Likewise.
30014 * config/riscv/riscv-vector-builtins-shapes.cc
30015 (struct alu_frm_def): New struct for alu with frm.
30016 (SHAPE): Add alu with frm.
30017 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
30018 * config/riscv/riscv-vector-builtins.cc
30019 (function_checker::report_out_of_range_and_not): New function
30020 for report out of range and not val.
30021 (function_checker::require_immediate_range_or): New function
30022 for checking in range or one val.
30023 * config/riscv/riscv-vector-builtins.h: Add function decl.
30025 2023-06-29 Cui, Lili <lili.cui@intel.com>
30027 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
30028 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
30030 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
30033 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
30034 to insn before validating it.
30036 2023-06-28 Jan Hubicka <jh@suse.cz>
30038 PR middle-end/110334
30039 * ipa-fnsummary.h (ipa_fn_summary): Add
30040 safe_to_inline_to_always_inline.
30041 * ipa-inline.cc (can_early_inline_edge_p): ICE
30042 if SSA is not built; do cycle checking for
30043 always_inline functions.
30044 (inline_always_inline_functions): Be recrusive;
30045 watch for cycles; do not updat overall summary.
30046 (early_inliner): Do not give up on always_inlines.
30047 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
30050 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
30052 * output.h (leaf_function_p): Change return type from int to bool.
30053 (final_forward_branch_p): Ditto.
30054 (only_leaf_regs_used): Ditto.
30055 (maybe_assemble_visibility): Ditto.
30056 * varasm.h (supports_one_only): Ditto.
30057 * rtl.h (compute_alignments): Change return type from int to void.
30058 * final.cc (app_on): Change return type from int to bool.
30059 (compute_alignments): Change return type from int to void
30060 and adjust function body accordingly.
30061 (shorten_branches): Change "something_changed" variable
30062 type from int to bool.
30063 (leaf_function_p): Change return type from int to bool
30064 and adjust function body accordingly.
30065 (final_forward_branch_p): Ditto.
30066 (only_leaf_regs_used): Ditto.
30067 * varasm.cc (contains_pointers_p): Change return type from
30068 int to bool and adjust function body accordingly.
30069 (compare_constant): Ditto.
30070 (maybe_assemble_visibility): Ditto.
30071 (supports_one_only): Ditto.
30073 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
30076 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
30077 (maybe_copy_reg_attrs): New function.
30078 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
30079 (copyprop_hardreg_forward_1): Ditto.
30081 2023-06-28 Richard Biener <rguenther@suse.de>
30083 PR tree-optimization/110434
30084 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
30085 VAR we replace with <retval>.
30087 2023-06-28 Richard Biener <rguenther@suse.de>
30089 PR tree-optimization/110451
30090 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
30091 tcc_comparison are expensive.
30093 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
30095 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
30096 for TImode comparisons on 32-bit architectures.
30097 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
30098 SWIM1248x to exclude/avoid TImode being conditional on -m64.
30099 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
30100 and/or with TARGET_SSE4_1.
30101 * config/i386/predicates.md (ix86_timode_comparison_operator):
30102 New predicate that depends upon TARGET_64BIT.
30103 (ix86_timode_comparison_operand): Likewise.
30105 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
30108 * config/i386/i386-features.cc (compute_convert_gain): Provide
30109 more accurate gains for conversion of scalar comparisons to
30112 2023-06-28 Richard Biener <rguenther@suse.de>
30114 PR tree-optimization/110443
30115 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
30118 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
30120 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
30121 (peephole2 for move_and_compare): New.
30122 (mode_iterator WORD): New. Set the mode to SI/DImode by
30124 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
30125 (split pattern for compare_and_move): Likewise.
30127 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30129 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
30130 (*single_widen_fma<mode>): Ditto.
30132 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
30135 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
30137 (altivec_vupkhs<VU_char>_direct): ...this.
30138 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
30139 predicate to test if a constant can be loaded with vspltisw and
30141 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
30142 a vector constant can be synthesized with a vspltisw and a vupkhsw.
30143 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
30145 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
30146 function to return true if OP mode is V2DI and can be synthesized
30147 with vupkhsw and vspltisw.
30148 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
30149 constants with vspltisw and vupkhsw.
30151 2023-06-28 Jan Hubicka <jh@suse.cz>
30153 PR tree-optimization/110377
30154 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
30156 (ipa_analyze_node): Enable ranger.
30158 2023-06-28 Richard Biener <rguenther@suse.de>
30160 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
30161 (TYPE_PRECISION_RAW): Provide raw access to the precision
30163 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
30164 (gimple_canonical_types_compatible_p): Likewise.
30165 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
30166 Stream TYPE_PRECISION_RAW.
30167 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
30169 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
30171 2023-06-28 Alexandre Oliva <oliva@adacore.com>
30173 * doc/extend.texi (zero-call-used-regs): Document leafy and
30175 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
30176 LEAFY and variants.
30177 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
30178 functions in leafy mode.
30179 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
30181 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30183 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
30184 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
30186 (@pred_single_widen_add<mode>): New pattern.
30187 (@pred_single_widen_sub<mode>): New pattern.
30189 2023-06-28 liuhongt <hongtao.liu@intel.com>
30191 * config/i386/i386.cc (ix86_invalid_conversion): New function.
30192 (TARGET_INVALID_CONVERSION): Define as
30193 ix86_invalid_conversion.
30195 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30197 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
30199 (<float_cvt><vnconvert><mode>2): Ditto.
30200 (<optab><mode><vnconvert>2): Ditto.
30201 (<float_cvt><mode><vnconvert>2): Ditto.
30202 * config/riscv/vector-iterators.md: Add vnconvert.
30204 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30206 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
30208 (extend<v_quad_trunc><mode>2): Ditto.
30209 (trunc<mode><v_double_trunc>2): Ditto.
30210 (trunc<mode><v_quad_trunc>2): Ditto.
30211 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
30212 V_QUAD_TRUNC and v_quad_trunc.
30214 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30216 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
30219 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30221 * config/riscv/autovec.md (copysign<mode>3): Add expander.
30222 (xorsign<mode>3): Ditto.
30223 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
30225 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
30229 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
30230 (@pred_ncopysign<mode>_scalar): Ditto.
30232 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30234 * config/riscv/autovec.md: VF_AUTO -> VF.
30235 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
30236 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
30238 * config/riscv/vector.md: Use new iterators.
30240 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
30242 * match.pd: Use element_mode and check if target supports
30243 operation with new type.
30245 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30247 * config/aarch64/aarch64-sve-builtins-base.cc
30248 (svdupq_impl::fold_nonconst_dupq): New method.
30249 (svdupq_impl::fold): Call fold_nonconst_dupq.
30251 2023-06-27 Andrew Pinski <apinski@marvell.com>
30253 PR middle-end/110420
30254 PR middle-end/103979
30255 PR middle-end/98619
30256 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
30258 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30260 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
30261 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
30263 (set_switch_stmt_execution_predicate): Same.
30264 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
30266 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30268 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
30269 ipa_vr instead of value_range.
30272 (ipa_get_value_range): Same.
30273 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
30277 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
30279 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
30280 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
30281 (ipa_set_jfunc_vr): Take a range.
30282 (ipa_compute_jump_functions_for_edge): Pass range to
30284 (ipa_write_jump_function): Call streamer write helper.
30285 (ipa_read_jump_function): Call streamer read helper.
30286 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
30288 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
30290 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
30291 as a probable initializer rather than a probable complete statement.
30293 2023-06-27 Richard Biener <rguenther@suse.de>
30295 PR tree-optimization/96208
30296 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
30297 a non-grouped load if it is the same for all lanes.
30298 (vect_build_slp_tree_2): Handle not grouped loads.
30299 (vect_optimize_slp_pass::remove_redundant_permutations):
30301 (vect_transform_slp_perm_load_1): Likewise.
30302 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
30303 (get_group_load_store_type): Likewise. Handle
30304 invariant accesses.
30305 (vectorizable_load): Likewise.
30307 2023-06-27 liuhongt <hongtao.liu@intel.com>
30309 PR rtl-optimization/110237
30310 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
30312 (maskstore<mode><avx512fmaskmodelower): Ditto.
30313 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
30314 from original <avx512>_store<mode>_mask.
30316 2023-06-27 liuhongt <hongtao.liu@intel.com>
30318 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
30319 Move flag_expensive_optimizations && !optimize_size to ..
30320 * config/i386/i386-options.cc (ix86_option_override_internal):
30321 .. this, it makes -mvzeroupper independent of optimization
30322 level, but still keeps the behavior of architecture
30323 tuning(emit_vzeroupper) unchanged.
30325 2023-06-27 liuhongt <hongtao.liu@intel.com>
30328 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
30329 vzeroupper for vzeroupper call_insn.
30331 2023-06-27 Andrew Pinski <apinski@marvell.com>
30333 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
30336 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30338 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
30341 2023-06-26 Andrew Pinski <apinski@marvell.com>
30343 * doc/extend.texi (access attribute): Add
30345 (interrupt/interrupt_handler attribute):
30348 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30350 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
30351 Use <DWI> instead of <V2XWIDE>.
30352 (aarch64_sqrshrun_n<mode>): Likewise.
30354 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30356 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
30358 (aarch64_rnd_imm_p): ... This.
30359 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
30361 (aarch64_int_rnd_operand): ... This.
30362 (aarch64_simd_rshrn_imm_vec): Delete.
30363 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
30364 Adjust for the above.
30365 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
30366 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
30367 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
30368 (aarch64_sqrshrun_n<mode>_insn): Likewise.
30369 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
30370 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
30371 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
30372 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
30373 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
30375 (aarch64_rnd_imm_p): ... This.
30377 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
30379 * config/s390/s390.cc (s390_encode_section_info): Set
30380 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
30383 2023-06-26 Jan Hubicka <jh@suse.cz>
30385 PR tree-optimization/109849
30386 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
30387 count of newly constructed forwarder block.
30389 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
30391 * doc/optinfo.texi: Fix "steam" -> "stream".
30393 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30395 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
30397 (dse_optimize_stmt): Add LEN_MASK_STORE.
30399 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30401 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
30402 fold of LOAD/STORE with length.
30404 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
30406 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
30407 Check for interdependence between operands 1 and 2.
30409 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
30411 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
30412 into account when costing non-widening/truncating conversions.
30414 2023-06-26 Richard Biener <rguenther@suse.de>
30416 PR tree-optimization/110381
30417 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
30418 Materialize permutes before fold-left reductions.
30420 2023-06-26 Pan Li <pan2.li@intel.com>
30422 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
30424 2023-06-26 Richard Biener <rguenther@suse.de>
30426 * varasm.cc (initializer_constant_valid_p_1): Also
30427 constrain the type of value to be scalar integral
30428 before dispatching to narrowing_initializer_constant_valid_p.
30430 2023-06-26 Richard Biener <rguenther@suse.de>
30432 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
30433 Use element_precision.
30435 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30437 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
30439 (vcondu<V:mode><VI:mode>): Ditto.
30440 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
30441 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
30443 2023-06-26 Richard Biener <rguenther@suse.de>
30445 PR tree-optimization/110392
30446 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
30447 Do early exits on true/false predicate only after normalization.
30449 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30451 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
30454 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
30456 * config/i386/i386.md (peephole2): Simplify zeroing a register
30457 followed by an IOR, XOR or PLUS operation on it, into a move.
30458 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
30459 eliminate (and hide from reload) unnecessary word to doubleword
30460 extensions that are followed by left shifts by sufficiently large,
30461 but valid, bit counts.
30463 2023-06-26 liuhongt <hongtao.liu@intel.com>
30465 PR tree-optimization/110371
30466 PR tree-optimization/110018
30467 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
30468 save intermediate type operand instead of "subtle" vec_dest
30471 2023-06-26 liuhongt <hongtao.liu@intel.com>
30473 PR tree-optimization/110371
30474 PR tree-optimization/110018
30475 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
30476 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
30478 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
30480 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
30481 Override tune_string with arch_string if tune_string is not
30482 explicitly specified.
30484 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30486 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
30488 * config/riscv/riscv-vsetvl.h: New function.
30490 2023-06-25 Li Xu <xuli1@eswincomputing.com>
30492 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
30495 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30497 * config/riscv/autovec.md (len_load_<mode>): Remove.
30498 (len_maskload<mode><vm>): Remove.
30499 (len_store_<mode>): New pattern.
30500 (len_maskstore<mode><vm>): New pattern.
30501 * config/riscv/predicates.md (autovec_length_operand): New predicate.
30502 * config/riscv/riscv-protos.h (enum insn_type): New enum.
30503 (expand_load_store): New function.
30504 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
30505 (emit_nonvlmax_masked_insn): Ditto.
30506 (expand_load_store): Ditto.
30507 * config/riscv/riscv-vector-builtins.cc
30508 (function_expander::use_contiguous_store_insn): Add avl_type operand
30510 * config/riscv/vector.md: Ditto.
30512 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30514 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
30517 2023-06-25 Pan Li <pan2.li@intel.com>
30519 * config/riscv/vector.md: Revert.
30521 2023-06-25 Pan Li <pan2.li@intel.com>
30523 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
30524 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
30525 (ADJUST_ALIGNMENT): Ditto.
30526 (RVV_TUPLE_PARTIAL_MODES): Ditto.
30527 (ADJUST_NUNITS): Ditto.
30528 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
30529 (vfloat16mf4x3_t): Ditto.
30530 (vfloat16mf4x4_t): Ditto.
30531 (vfloat16mf4x5_t): Ditto.
30532 (vfloat16mf4x6_t): Ditto.
30533 (vfloat16mf4x7_t): Ditto.
30534 (vfloat16mf4x8_t): Ditto.
30535 (vfloat16mf2x2_t): Ditto.
30536 (vfloat16mf2x3_t): Ditto.
30537 (vfloat16mf2x4_t): Ditto.
30538 (vfloat16mf2x5_t): Ditto.
30539 (vfloat16mf2x6_t): Ditto.
30540 (vfloat16mf2x7_t): Ditto.
30541 (vfloat16mf2x8_t): Ditto.
30542 (vfloat16m1x2_t): Ditto.
30543 (vfloat16m1x3_t): Ditto.
30544 (vfloat16m1x4_t): Ditto.
30545 (vfloat16m1x5_t): Ditto.
30546 (vfloat16m1x6_t): Ditto.
30547 (vfloat16m1x7_t): Ditto.
30548 (vfloat16m1x8_t): Ditto.
30549 (vfloat16m2x2_t): Ditto.
30550 (vfloat16m2x3_t): Diito.
30551 (vfloat16m2x4_t): Diito.
30552 (vfloat16m4x2_t): Diito.
30553 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
30554 (vfloat16mf4x3_t): Ditto.
30555 (vfloat16mf4x4_t): Ditto.
30556 (vfloat16mf4x5_t): Ditto.
30557 (vfloat16mf4x6_t): Ditto.
30558 (vfloat16mf4x7_t): Ditto.
30559 (vfloat16mf4x8_t): Ditto.
30560 (vfloat16mf2x2_t): Ditto.
30561 (vfloat16mf2x3_t): Ditto.
30562 (vfloat16mf2x4_t): Ditto.
30563 (vfloat16mf2x5_t): Ditto.
30564 (vfloat16mf2x6_t): Ditto.
30565 (vfloat16mf2x7_t): Ditto.
30566 (vfloat16mf2x8_t): Ditto.
30567 (vfloat16m1x2_t): Ditto.
30568 (vfloat16m1x3_t): Ditto.
30569 (vfloat16m1x4_t): Ditto.
30570 (vfloat16m1x5_t): Ditto.
30571 (vfloat16m1x6_t): Ditto.
30572 (vfloat16m1x7_t): Ditto.
30573 (vfloat16m1x8_t): Ditto.
30574 (vfloat16m2x2_t): Ditto.
30575 (vfloat16m2x3_t): Ditto.
30576 (vfloat16m2x4_t): Ditto.
30577 (vfloat16m4x2_t): Ditto.
30578 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
30579 * config/riscv/riscv.md: Ditto.
30580 * config/riscv/vector-iterators.md: Ditto.
30582 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30584 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
30585 (gimple_fold_partial_load_store_mem_ref): Ditto.
30586 (gimple_fold_partial_store): Ditto.
30587 (gimple_fold_call): Ditto.
30589 2023-06-25 liuhongt <hongtao.liu@intel.com>
30592 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
30593 Refine pattern with UNSPEC_MASKLOAD.
30594 (maskload<mode><avx512fmaskmodelower>): Ditto.
30595 (*<avx512>_load<mode>_mask): Extend mode iterator to
30597 (*<avx512>_load<mode>): Ditto.
30599 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30601 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
30603 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30605 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
30606 LEN_MASK_{LOAD,STORE}
30608 2023-06-25 yulong <shiyulong@iscas.ac.cn>
30610 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
30612 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
30614 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
30616 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30618 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
30619 (*fma<VI:mode><P:mode>): Ditto.
30620 (*fnma<mode>): Ditto.
30621 (*fnma<VI:mode><P:mode>): Ditto.
30623 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30625 * config/riscv/autovec.md (fma<mode>4): New pattern.
30626 (*fma<mode>): Ditto.
30627 (fnma<mode>4): Ditto.
30628 (*fnma<mode>): Ditto.
30629 (fms<mode>4): Ditto.
30630 (*fms<mode>): Ditto.
30631 (fnms<mode>4): Ditto.
30632 (*fnms<mode>): Ditto.
30633 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
30635 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
30636 * config/riscv/vector.md: Fix attribute bug.
30638 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30640 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
30641 Apply LEN_MASK_{LOAD,STORE}.
30643 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30645 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
30646 Add LEN_MASK_{LOAD,STORE}.
30648 2023-06-24 David Malcolm <dmalcolm@redhat.com>
30650 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
30651 * diagnostic.cc: Likewise.
30652 * text-art/box-drawing.cc: Likewise.
30653 * text-art/canvas.cc: Likewise.
30654 * text-art/ruler.cc: Likewise.
30655 * text-art/selftests.cc: Likewise.
30656 * text-art/selftests.h (text_art::canvas): New forward decl.
30657 * text-art/style.cc: Add #define INCLUDE_VECTOR.
30658 * text-art/styled-string.cc: Likewise.
30659 * text-art/table.cc: Likewise.
30660 * text-art/table.h: Remove #include <vector>.
30661 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
30662 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
30663 Remove #include of <vector> and <string>.
30664 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
30665 * text-art/widget.h: Remove #include <vector>.
30667 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30669 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
30670 (internal_load_fn_p): Add LEN_MASK_LOAD.
30671 (internal_store_fn_p): Add LEN_MASK_STORE.
30672 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
30673 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
30674 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
30675 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
30676 (get_len_load_store_mode): Ditto.
30677 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
30678 (get_len_load_store_mode): Ditto.
30679 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
30680 (get_all_ones_mask): New function.
30681 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
30682 (vectorizable_load): Ditto.
30684 2023-06-23 Marek Polacek <polacek@redhat.com>
30686 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
30687 -std=gnu++26. Document that for C++23, its value is 202302L.
30688 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
30689 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
30690 (gen_compile_unit_die): Likewise.
30692 2023-06-23 Jan Hubicka <jh@suse.cz>
30694 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
30696 (pass_phiprop::execute): Do not compute it here; return
30697 update_ssa_only_virtuals if something changed.
30698 (pass_data_phiprop): Remove TODO_update_ssa from todos.
30700 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
30701 Aaron Sawdey <acsawdey@linux.ibm.com>
30704 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
30705 allowed prefixed lwa to be generated.
30706 * config/rs6000/fusion.md: Regenerate.
30707 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
30708 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
30709 plus compare immediate fused insns.
30710 (maybe_prefixed): Likewise.
30712 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
30714 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
30715 of ASHIFT to const0_rtx with sufficiently large shift count.
30716 Optimize highpart SUBREGs of ASHIFT as the shift operand when
30717 the shift count is the correct offset. Optimize SUBREGs of
30718 multi-word logic operations if the SUBREGs of both operands
30721 2023-06-23 Richard Biener <rguenther@suse.de>
30723 * varasm.cc (initializer_constant_valid_p_1): Only
30724 allow conversions between scalar floating point types.
30726 2023-06-23 Richard Biener <rguenther@suse.de>
30728 * tree-vect-stmts.cc (vectorizable_assignment):
30729 Properly handle non-integral operands when analyzing
30732 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30734 PR tree-optimization/110280
30735 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
30736 using build_vector_from_val with the element of input operand, and
30737 mask's type if operand and mask's types don't match.
30739 2023-06-23 Richard Biener <rguenther@suse.de>
30741 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
30742 the truth_value_p case with !VECTOR_TYPE_P.
30744 2023-06-23 Richard Biener <rguenther@suse.de>
30746 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
30747 Exit early when the type isn't scalar integral.
30749 2023-06-23 Richard Biener <rguenther@suse.de>
30751 * match.pd ((outertype)((innertype0)a+(innertype1)b)
30752 -> ((newtype)a+(newtype)b)): Use element_precision
30755 2023-06-23 Richard Biener <rguenther@suse.de>
30757 * fold-const.cc (fold_binary_loc): Use element_precision
30758 when trying (double)float1 CMP (double)float2 to
30759 float1 CMP float2 simplification.
30760 * match.pd: Likewise.
30762 2023-06-23 Richard Biener <rguenther@suse.de>
30764 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
30765 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
30767 2023-06-23 Richard Biener <rguenther@suse.de>
30769 * tree-vect-stmts.cc (vector_vector_composition_type):
30770 Handle composition of a vector from a number of elements that
30771 happens to match its number of lanes.
30773 2023-06-22 Marek Polacek <polacek@redhat.com>
30775 * configure.ac (--enable-host-bind-now): New check. Add
30776 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
30777 * configure: Regenerate.
30778 * doc/install.texi: Document --enable-host-bind-now.
30780 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
30782 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
30784 2023-06-22 Richard Biener <rguenther@suse.de>
30786 PR tree-optimization/110332
30787 * tree-ssa-phiprop.cc (propagate_with_phi): Always
30788 check aliasing with edge inserted loads.
30790 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
30791 Uros Bizjak <ubizjak@gmail.com>
30793 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
30794 expansion of ptestc with equal operands as producing const1_rtx.
30795 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
30796 estimates of UNSPEC_PTEST, where the ptest performs the PAND
30797 or PAND of its operands.
30798 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
30799 of reg_equal_p operands into an x86_stc instruction.
30800 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
30801 (define_split): Similar to above for strict_low_part destinations.
30802 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
30804 2023-06-22 David Malcolm <dmalcolm@redhat.com>
30807 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
30808 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
30810 (fanalyzer-debug-text-art): New.
30812 2023-06-22 David Malcolm <dmalcolm@redhat.com>
30814 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
30815 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
30816 text-art/style.o, text-art/styled-string.o, text-art/table.o,
30817 text-art/theme.o, and text-art/widget.o.
30818 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
30819 (COLOR_FG_BRIGHT_RED): New.
30820 (COLOR_FG_BRIGHT_GREEN): New.
30821 (COLOR_FG_BRIGHT_YELLOW): New.
30822 (COLOR_FG_BRIGHT_BLUE): New.
30823 (COLOR_FG_BRIGHT_MAGENTA): New.
30824 (COLOR_FG_BRIGHT_CYAN): New.
30825 (COLOR_FG_BRIGHT_WHITE): New.
30826 (COLOR_BG_BRIGHT_BLACK): New.
30827 (COLOR_BG_BRIGHT_RED): New.
30828 (COLOR_BG_BRIGHT_GREEN): New.
30829 (COLOR_BG_BRIGHT_YELLOW): New.
30830 (COLOR_BG_BRIGHT_BLUE): New.
30831 (COLOR_BG_BRIGHT_MAGENTA): New.
30832 (COLOR_BG_BRIGHT_CYAN): New.
30833 (COLOR_BG_BRIGHT_WHITE): New.
30834 * common.opt (fdiagnostics-text-art-charset=): New option.
30835 (diagnostic-text-art.h): New SourceInclude.
30836 (diagnostic_text_art_charset) New Enum and EnumValues.
30837 * configure: Regenerate.
30838 * configure.ac (gccdepdir): Add text-art to loop.
30839 * diagnostic-diagram.h: New file.
30840 * diagnostic-format-json.cc (json_emit_diagram): New.
30841 (diagnostic_output_format_init_json): Wire it up to
30842 context->m_diagrams.m_emission_cb.
30843 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
30844 "text-art/canvas.h".
30845 (sarif_result::on_nested_diagnostic): Move code to...
30846 (sarif_result::add_related_location): ...this new function.
30847 (sarif_result::on_diagram): New.
30848 (sarif_builder::emit_diagram): New.
30849 (sarif_builder::make_message_object_for_diagram): New.
30850 (sarif_emit_diagram): New.
30851 (diagnostic_output_format_init_sarif): Set
30852 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
30853 * diagnostic-text-art.h: New file.
30854 * diagnostic.cc: Include "diagnostic-text-art.h",
30855 "diagnostic-diagram.h", and "text-art/theme.h".
30856 (diagnostic_initialize): Initialize context->m_diagrams and
30857 call diagnostics_text_art_charset_init.
30858 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
30859 (diagnostic_emit_diagram): New.
30860 (diagnostics_text_art_charset_init): New.
30861 * diagnostic.h (text_art::theme): New forward decl.
30862 (class diagnostic_diagram): Likewise.
30863 (diagnostic_context::m_diagrams): New field.
30864 (diagnostic_emit_diagram): New decl.
30865 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
30866 -fdiagnostics-text-art-charset=.
30867 (-fdiagnostics-plain-output): Add
30868 -fdiagnostics-text-art-charset=none.
30869 * gcc.cc: Include "diagnostic-text-art.h".
30870 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
30871 * opts-common.cc (decode_cmdline_options_to_array): Add
30872 "-fdiagnostics-text-art-charset=none" to expanded_args for
30873 -fdiagnostics-plain-output.
30874 * opts.cc: Include "diagnostic-text-art.h".
30875 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
30876 * pretty-print.cc (pp_unicode_character): New.
30877 * pretty-print.h (pp_unicode_character): New decl.
30878 * selftest-run-tests.cc: Include "text-art/selftests.h".
30879 (selftest::run_tests): Call text_art_tests.
30880 * text-art/box-drawing-chars.inc: New file, generated by
30881 contrib/unicode/gen-box-drawing-chars.py.
30882 * text-art/box-drawing.cc: New file.
30883 * text-art/box-drawing.h: New file.
30884 * text-art/canvas.cc: New file.
30885 * text-art/canvas.h: New file.
30886 * text-art/ruler.cc: New file.
30887 * text-art/ruler.h: New file.
30888 * text-art/selftests.cc: New file.
30889 * text-art/selftests.h: New file.
30890 * text-art/style.cc: New file.
30891 * text-art/styled-string.cc: New file.
30892 * text-art/table.cc: New file.
30893 * text-art/table.h: New file.
30894 * text-art/theme.cc: New file.
30895 * text-art/theme.h: New file.
30896 * text-art/types.h: New file.
30897 * text-art/widget.cc: New file.
30898 * text-art/widget.h: New file.
30900 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
30902 * function.h (emit_initial_value_sets):
30903 Change return type from int to void.
30904 (aggregate_value_p): Change return type from int to bool.
30905 (prologue_contains): Ditto.
30906 (epilogue_contains): Ditto.
30907 (prologue_epilogue_contains): Ditto.
30908 * function.cc (temp_slot): Make "in_use" variable bool.
30909 (make_slot_available): Update for changed "in_use" variable.
30910 (assign_stack_temp_for_type): Ditto.
30911 (emit_initial_value_sets): Change return type from int to void
30912 and update function body accordingly.
30913 (instantiate_virtual_regs): Ditto.
30914 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
30915 (safe_insn_predicate): Change return type from int to bool.
30916 (aggregate_value_p): Change return type from int to bool
30917 and update function body accordingly.
30918 (prologue_contains): Change return type from int to bool.
30919 (prologue_epilogue_contains): Ditto.
30921 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
30923 * common.opt (fp_contract_mode) [on]: Remove fallback.
30924 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
30925 * doc/invoke.texi (-ffp-contract): Update.
30926 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
30928 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30930 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30931 Add alternatives to prefer to avoid same input and output Z register.
30932 (mask_gather_load<mode><v_int_container>): Likewise.
30933 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30934 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30935 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30936 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30938 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30940 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30941 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30942 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30943 <SVE_2BHSI:mode>_sxtw): Likewise.
30944 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30945 <SVE_2BHSI:mode>_uxtw): Likewise.
30946 (@aarch64_ldff1_gather<mode>): Likewise.
30947 (@aarch64_ldff1_gather<mode>): Likewise.
30948 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30949 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30950 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30951 <VNx4_NARROW:mode>): Likewise.
30952 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30953 <VNx2_NARROW:mode>): Likewise.
30954 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30955 <VNx2_NARROW:mode>_sxtw): Likewise.
30956 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30957 <VNx2_NARROW:mode>_uxtw): Likewise.
30958 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30959 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30960 <SVE_PARTIAL_I:mode>): Likewise.
30962 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30964 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
30965 Convert to compact alternatives syntax.
30966 (mask_gather_load<mode><v_int_container>): Likewise.
30967 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
30968 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
30969 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
30970 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
30972 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
30974 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30975 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
30976 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30977 <SVE_2BHSI:mode>_sxtw): Likewise.
30978 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
30979 <SVE_2BHSI:mode>_uxtw): Likewise.
30980 (@aarch64_ldff1_gather<mode>): Likewise.
30981 (@aarch64_ldff1_gather<mode>): Likewise.
30982 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
30983 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
30984 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
30985 <VNx4_NARROW:mode>): Likewise.
30986 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30987 <VNx2_NARROW:mode>): Likewise.
30988 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30989 <VNx2_NARROW:mode>_sxtw): Likewise.
30990 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
30991 <VNx2_NARROW:mode>_uxtw): Likewise.
30992 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
30993 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
30994 <SVE_PARTIAL_I:mode>): Likewise.
30996 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30999 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31001 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
31002 Convert to compact alternatives syntax.
31003 (mask_gather_load<mode><v_int_container>): Likewise.
31004 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
31005 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
31006 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
31007 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
31009 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
31011 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31012 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
31013 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31014 <SVE_2BHSI:mode>_sxtw): Likewise.
31015 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31016 <SVE_2BHSI:mode>_uxtw): Likewise.
31017 (@aarch64_ldff1_gather<mode>): Likewise.
31018 (@aarch64_ldff1_gather<mode>): Likewise.
31019 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
31020 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
31021 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
31022 <VNx4_NARROW:mode>): Likewise.
31023 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31024 <VNx2_NARROW:mode>): Likewise.
31025 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31026 <VNx2_NARROW:mode>_sxtw): Likewise.
31027 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31028 <VNx2_NARROW:mode>_uxtw): Likewise.
31029 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
31030 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
31031 <SVE_PARTIAL_I:mode>): Likewise.
31033 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31035 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
31036 (get_len_load_store_mode): Ditto.
31037 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
31038 (get_len_load_store_mode): Ditto.
31039 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
31040 (get_len_load_store_mode): Ditto.
31041 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
31042 (get_len_load_store_mode): Ditto.
31043 * tree-if-conv.cc: include optabs-tree instead of optabs-query
31045 2023-06-21 Richard Biener <rguenther@suse.de>
31047 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
31048 split_constant_offset for the POINTER_PLUS_EXPR case.
31050 2023-06-21 Richard Biener <rguenther@suse.de>
31052 * tree-ssa-loop-ivopts.cc (record_group_use): Use
31053 split_constant_offset.
31055 2023-06-21 Richard Biener <rguenther@suse.de>
31057 * tree-loop-distribution.cc (classify_builtin_st): Use
31058 split_constant_offset.
31059 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
31060 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
31062 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31064 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
31065 Convert to compact alternatives syntax.
31066 (mask_gather_load<mode><v_int_container>): Likewise.
31067 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
31068 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
31069 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
31070 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
31072 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
31074 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31075 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
31076 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31077 <SVE_2BHSI:mode>_sxtw): Likewise.
31078 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
31079 <SVE_2BHSI:mode>_uxtw): Likewise.
31080 (@aarch64_ldff1_gather<mode>): Likewise.
31081 (@aarch64_ldff1_gather<mode>): Likewise.
31082 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
31083 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
31084 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
31085 <VNx4_NARROW:mode>): Likewise.
31086 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31087 <VNx2_NARROW:mode>): Likewise.
31088 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31089 <VNx2_NARROW:mode>_sxtw): Likewise.
31090 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
31091 <VNx2_NARROW:mode>_uxtw): Likewise.
31092 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
31093 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
31094 <SVE_PARTIAL_I:mode>): Likewise.
31096 2023-06-21 Tamar Christina <tamar.christina@arm.com>
31099 * doc/md.texi: Replace backslashchar.
31101 2023-06-21 Richard Biener <rguenther@suse.de>
31103 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
31104 Overload. For masked main loops make sure the vectorization
31105 factor isn't more than double the number of iterations.
31107 2023-06-21 Jan Beulich <jbeulich@suse.com>
31109 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
31110 value duplication by ix86_build_signbit_mask() when AVX512F and
31112 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
31113 2-alternative form. Adjust "mode" attribute. Add "enabled"
31115 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
31116 && !TARGET_PREFER_AVX256.
31117 (*<avx512>_vpternlog<mode>_2): Likewise.
31118 (*<avx512>_vpternlog<mode>_3): Likewise.
31120 2023-06-21 liuhongt <hongtao.liu@intel.com>
31123 * tree-vect-stmts.cc (vectorizable_conversion): Use
31124 intermiediate integer type for float_expr/fix_trunc_expr when
31125 direct optab is not existed.
31127 2023-06-20 Tamar Christina <tamar.christina@arm.com>
31129 PR bootstrap/110324
31130 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
31132 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
31134 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
31135 register operand to the stack pointer. Require the second register
31136 operand to have the number specified in a separate const_int operand.
31137 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
31138 (aarch64_allocate_and_probe_stack_space): Use it.
31139 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
31140 (aarch64_expand_epilogue): Likewise.
31142 2023-06-20 Jakub Jelinek <jakub@redhat.com>
31144 PR middle-end/79173
31145 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
31146 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
31149 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
31151 * calls.h (setjmp_call_p): Change return type from int to bool.
31152 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
31153 (store_one_arg): Change return type from int to bool
31154 and adjust function body accordingly. Change "sibcall_failure"
31156 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
31157 argument to bool. Change "partial_seen" variable to bool.
31158 (load_register_parameters): Change *sibcall_failure
31159 pointer argument to bool.
31160 (check_sibcall_argument_overlap_1): Change return type from int to bool
31161 and adjust function body accordingly.
31162 (check_sibcall_argument_overlap): Ditto. Change
31163 "mark_stored_args_map" argument to bool.
31164 (emit_call_1): Change "already_popped" variable to bool.
31165 (setjmp_call_p): Change return type from int to bool
31166 and adjust function body accordingly.
31167 (initialize_argument_information): Change *must_preallocate
31168 pointer argument to bool.
31169 (expand_call): Change "pcc_struct_value", "must_preallocate"
31170 and "sibcall_failure" variables to bool.
31171 (emit_library_call_value_1): Change "pcc_struct_value"
31174 2023-06-20 Martin Jambor <mjambor@suse.cz>
31177 * ipa-sra.cc (struct caller_issues): New field there_is_one.
31178 (check_for_caller_issues): Set it.
31179 (check_all_callers_for_issues): Check it.
31181 2023-06-20 Martin Jambor <mjambor@suse.cz>
31183 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
31184 (struct ipcp_transformation): Rearrange members according to
31185 C++ class coding convention, add m_uid_to_idx,
31186 get_param_index and maybe_create_parm_idx_map.
31187 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
31188 (compare_uids): Likewise.
31189 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
31190 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
31191 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
31192 (ipcp_update_vr): Likewise.
31193 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
31194 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
31196 2023-06-20 Carl Love <cel@us.ibm.com>
31198 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
31199 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
31200 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
31201 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
31202 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
31203 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
31204 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
31205 * config/rs6000/rs6000-builtins.def
31206 (__builtin_vsx_scalar_extract_exp_to_vec,
31207 __builtin_vsx_scalar_extract_sig_to_vec,
31208 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
31209 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
31210 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
31211 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
31212 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
31213 overloaded instance. Update comments.
31214 * config/rs6000/rs6000-overload.def
31215 (__builtin_vec_scalar_insert_exp): Add new overload definition with
31217 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
31218 overloaded definitions.
31219 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
31220 (DI_to_TI): New mode attribute.
31221 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
31222 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
31223 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
31224 * doc/extend.texi (scalar_extract_exp_to_vec,
31225 scalar_extract_sig_to_vec): Add documentation for new builtins.
31226 (scalar_insert_exp): Add new overloaded builtin definition.
31228 2023-06-20 Li Xu <xuli1@eswincomputing.com>
31230 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
31231 size of vector mask mode to one rvv register.
31233 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31235 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
31237 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
31239 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
31242 2023-06-20 Richard Biener <rguenther@suse.de>
31244 * tree-ssa-dse.cc (dse_classify_store): When we found
31245 no defs and the basic-block with the original definition
31246 ends in __builtin_unreachable[_trap] the store is dead.
31248 2023-06-20 Richard Biener <rguenther@suse.de>
31250 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
31251 keep the virtual SSA form up-to-date.
31253 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31255 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
31256 New define_insn_and_split.
31258 2023-06-20 Tamar Christina <tamar.christina@arm.com>
31260 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
31262 2023-06-20 Jan Beulich <jbeulich@suse.com>
31264 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
31265 constraint. Add new AVX512F alternative.
31267 2023-06-20 Richard Biener <rguenther@suse.de>
31270 * dwarf2out.cc (process_scope_var): Continue processing
31271 the decl after setting a parent in case the existing DIE
31274 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
31276 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
31277 (riscv_arg_has_vector): Simplify.
31278 (riscv_pass_in_vector_p): Adjust warning message.
31280 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
31282 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
31283 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
31284 * config/riscv/riscv.md (riscv_frcsr): New patterns.
31285 (riscv_fscsr): Likewise.
31287 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
31289 PR rtl-optimization/110305
31290 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
31291 Handle HONOR_SNANS for x + 0.0.
31293 2023-06-19 Jan Hubicka <jh@suse.cz>
31295 PR tree-optimization/109811
31296 PR tree-optimization/109849
31297 * passes.def: Add phiprop to early optimization passes.
31298 * tree-ssa-phiprop.cc: Allow clonning.
31300 2023-06-19 Tamar Christina <tamar.christina@arm.com>
31302 * config/aarch64/aarch64.md (arches): Add nosimd.
31303 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
31306 2023-06-19 Tamar Christina <tamar.christina@arm.com>
31307 Omar Tahir <Omar.Tahir2@arm.com>
31309 * gensupport.cc (class conlist, add_constraints, add_attributes,
31310 skip_spaces, expect_char, preprocess_compact_syntax,
31311 parse_section_layout, parse_section, convert_syntax): New.
31312 (process_rtx): Check for conversion.
31313 * genoutput.cc (process_template): Check for unresolved iterators.
31314 (class data): Add compact_syntax_p.
31315 (gen_insn): Use it.
31316 * gensupport.h (compact_syntax): New.
31317 (hash-set.h): Include.
31318 * doc/md.texi: Document it.
31320 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
31322 * recog.h (check_asm_operands): Change return type from int to bool.
31323 (insn_invalid_p): Ditto.
31324 (verify_changes): Ditto.
31325 (apply_change_group): Ditto.
31326 (constrain_operands): Ditto.
31327 (constrain_operands_cached): Ditto.
31328 (validate_replace_rtx_subexp): Ditto.
31329 (validate_replace_rtx): Ditto.
31330 (validate_replace_rtx_part): Ditto.
31331 (validate_replace_rtx_part_nosimplify): Ditto.
31332 (added_clobbers_hard_reg_p): Ditto.
31333 (peep2_regno_dead_p): Ditto.
31334 (peep2_reg_dead_p): Ditto.
31335 (store_data_bypass_p): Ditto.
31336 (if_test_bypass_p): Ditto.
31337 * rtl.h (split_all_insns_noflow): Change
31338 return type from unsigned int to void.
31339 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
31340 of generated added_clobbers_hard_reg_p from int to bool and adjust
31341 function body accordingly. Change "used" variable type from
31343 * recog.cc (check_asm_operands): Change return type
31344 from int to bool and adjust function body accordingly.
31345 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
31346 (verify_changes): Change return type from int to bool.
31347 (apply_change_group): Change return type from int to bool
31348 and adjust function body accordingly.
31349 (validate_replace_rtx_subexp): Change return type from int to bool.
31350 (validate_replace_rtx): Ditto.
31351 (validate_replace_rtx_part): Ditto.
31352 (validate_replace_rtx_part_nosimplify): Ditto.
31353 (constrain_operands_cached): Ditto.
31354 (constrain_operands): Ditto. Change "lose" and "win"
31355 variables type from int to bool.
31356 (split_all_insns_noflow): Change return type from unsigned int
31357 to void and adjust function body accordingly.
31358 (peep2_regno_dead_p): Change return type from int to bool.
31359 (peep2_reg_dead_p): Ditto.
31360 (peep2_find_free_register): Change "success"
31361 variable type from int to bool
31362 (store_data_bypass_p_1): Change return type from int to bool.
31363 (store_data_bypass_p): Ditto.
31365 2023-06-19 Li Xu <xuli1@eswincomputing.com>
31367 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
31370 2023-06-19 Pan Li <pan2.li@intel.com>
31373 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
31375 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
31376 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
31377 VF_ZVE63 and VF_ZVE32.
31378 * config/riscv/vector.md
31379 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
31380 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
31381 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
31382 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
31383 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
31384 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
31385 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
31386 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
31387 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
31388 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
31390 2023-06-19 Pan Li <pan2.li@intel.com>
31393 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
31395 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
31396 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
31397 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
31398 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
31399 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
31400 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
31401 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
31402 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
31403 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
31404 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
31405 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
31406 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
31407 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
31408 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
31410 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31412 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
31413 (gcn_init_libfuncs): Add div and mod functions for all modes.
31414 Add placeholders for divmod functions.
31415 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
31417 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31419 * tree-vect-generic.cc: Include optabs-libfuncs.h.
31420 (get_compute_type): Check optab_libfunc.
31421 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
31422 (vectorizable_operation): Check optab_libfunc.
31424 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
31426 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
31427 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
31428 (V_MOV, V_MOV_ALT): Likewise.
31429 (scalar_mode, SCALAR_MODE): Add TImode.
31430 (vnsi, VnSI, vndi, VnDI): Likewise.
31431 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
31432 (mov<mode>, mov<mode>_unspec): Use V_MOV.
31433 (*mov<mode>_4reg): New insn.
31434 (mov<mode>_exec): New 4reg variant.
31435 (mov<mode>_sgprbase): Likewise.
31436 (reload_in<mode>, reload_out<mode>): Use V_MOV.
31437 (vec_set<mode>): Likewise.
31438 (vec_duplicate<mode><exec>): New 4reg variant.
31439 (vec_extract<mode><scalar_mode>): Likewise.
31440 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
31441 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
31442 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
31443 (fold_extract_last_<mode>): Use V_MOV.
31444 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
31445 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
31446 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
31447 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
31448 gather<mode>_insn_2offsets<exec>): Use V_MOV.
31449 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
31450 scatter<mode>_insn_1offset<exec_scatter>,
31451 scatter<mode>_insn_1offset_ds<exec_scatter>,
31452 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
31453 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
31454 mask_scatter_store<mode><vnsi>): Likewise.
31455 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
31456 (gcn_hard_regno_mode_ok): Likewise.
31457 (GEN_VNM): Add TImode support.
31458 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
31459 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
31460 V8TImode, and V2TImode.
31461 (print_operand): Add 'J' and 'K' print codes.
31463 2023-06-19 Richard Biener <rguenther@suse.de>
31465 PR tree-optimization/110298
31466 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
31467 Clear number of iterations info before cleaning up the CFG.
31469 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31471 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
31472 Simplify vec_concat of lowpart subreg and high part vec_select.
31474 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
31476 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
31478 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
31480 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
31481 Handle null niters_skip.
31483 2023-06-19 Richard Biener <rguenther@suse.de>
31485 * config/aarch64/aarch64.cc
31486 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
31487 to LOOP_VINFO_MASKS.
31489 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
31492 * common/config/avr/avr-common.cc: Remove setting
31493 of OPT_fdelete_null_pointer_checks.
31494 * config/avr/avr.cc (avr_option_override): Clear
31495 flag_delete_null_pointer_checks if zero_address_valid.
31496 (avr_addr_space_zero_address_valid): New function.
31497 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
31500 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31501 Robin Dapp <rdapp.gcc@gmail.com>
31503 * doc/md.texi: Add len_mask{load,store}.
31504 * genopinit.cc (main): Ditto.
31506 * internal-fn.cc (len_maskload_direct): Ditto.
31507 (len_maskstore_direct): Ditto.
31508 (expand_call_mem_ref): Ditto.
31509 (expand_partial_load_optab_fn): Ditto.
31510 (expand_len_maskload_optab_fn): Ditto.
31511 (expand_partial_store_optab_fn): Ditto.
31512 (expand_len_maskstore_optab_fn): Ditto.
31513 (direct_len_maskload_optab_supported_p): Ditto.
31514 (direct_len_maskstore_optab_supported_p): Ditto.
31515 * internal-fn.def (LEN_MASK_LOAD): Ditto.
31516 (LEN_MASK_STORE): Ditto.
31517 * optabs.def (OPTAB_CD): Ditto.
31519 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31521 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
31523 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31525 * config/riscv/autovec.md (<optab><mode>3): Implement binop
31527 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
31528 (enum vxrm_field_enum): Rename this...
31529 (enum fixed_point_rounding_mode): ...to this.
31530 (enum frm_field_enum): Rename this...
31531 (enum floating_point_rounding_mode): ...to this.
31532 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
31533 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
31535 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
31536 (riscv_excess_precision): Do not convert to float for ZVFH.
31537 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
31539 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31541 * config/riscv/vector-iterators.md: Add VI_QH iterator.
31542 * config/riscv/autovec-opt.md
31543 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
31544 that includes sign extension.
31545 (@pred_extract_first_sextsi<mode>): Dito for SImode.
31547 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
31549 * config/riscv/autovec.md (vec_set<mode>): Implement.
31550 (vec_extract<mode><vel>): Implement.
31551 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
31552 (emit_vlmax_slide_insn): Declare.
31553 (emit_nonvlmax_slide_tu_insn): Declare.
31554 (emit_scalar_move_insn): Export.
31555 (emit_nonvlmax_integer_move_insn): Export.
31556 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
31557 (emit_nonvlmax_slide_tu_insn): New function.
31558 (emit_vlmax_masked_mu_insn): No change.
31559 (emit_vlmax_integer_move_insn): Export.
31561 2023-06-19 Richard Biener <rguenther@suse.de>
31563 * tree-vectorizer.h (enum vect_partial_vector_style): New.
31564 (_loop_vec_info::partial_vector_style): Likewise.
31565 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
31566 (rgroup_controls::compare_type): Add.
31567 (vec_loop_masks): Change from a typedef to auto_vec<>
31569 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
31570 Adjust. Convert niters_skip to compare_type.
31571 (vect_set_loop_condition_partial_vectors_avx512): New function
31572 implementing the AVX512 partial vector codegen.
31573 (vect_set_loop_condition): Dispatch to the correct
31574 vect_set_loop_condition_partial_vectors_* function based on
31575 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
31576 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
31577 in the original niter type.
31578 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
31579 partial_vector_style.
31580 (can_produce_all_loop_masks_p): Adjust.
31581 (vect_verify_full_masking): Produce the rgroup_controls vector
31582 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
31583 (vect_verify_full_masking_avx512): New function implementing
31584 verification of AVX512 style masking.
31585 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
31586 (vect_analyze_loop_2): Also try AVX512 style masking.
31588 (vect_estimate_min_profitable_iters): Implement AVX512 style
31589 mask producing cost.
31590 (vect_record_loop_mask): Do not build the rgroup_controls
31591 vector here but record masks in a hash-set.
31592 (vect_get_loop_mask): Implement AVX512 style mask query,
31593 complementing the existing while_ult style.
31595 2023-06-19 Richard Biener <rguenther@suse.de>
31597 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
31599 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
31600 (vectorize_fold_left_reduction): Adjust.
31601 (vect_transform_reduction): Likewise.
31602 (vectorizable_live_operation): Likewise.
31603 * tree-vect-stmts.cc (vectorizable_call): Likewise.
31604 (vectorizable_operation): Likewise.
31605 (vectorizable_store): Likewise.
31606 (vectorizable_load): Likewise.
31607 (vectorizable_condition): Likewise.
31609 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
31612 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
31613 Add Optimization option property.
31615 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31617 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
31618 Add new pattern for the abovementioned case.
31620 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31622 * config/xtensa/xtensa.cc
31623 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
31625 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
31627 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
31629 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
31631 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
31633 2023-06-19 liuhongt <hongtao.liu@intel.com>
31636 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
31638 (sse2_packsswb<mask_name>): .. this, ..
31639 (avx2_packsswb<mask_name>): .. this and ..
31640 (avx512bw_packsswb<mask_name>): .. this.
31641 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
31642 (sse2_packssdw<mask_name>): .. this, ..
31643 (avx2_packssdw<mask_name>): .. this and ..
31644 (avx512bw_packssdw<mask_name>): .. this.
31646 2023-06-19 liuhongt <hongtao.liu@intel.com>
31649 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
31650 UNSPEC_US_TRUNCATE instead of original us_truncate for
31652 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
31654 (mmx_packsswb): .. this and ..
31655 (mmx_packuswb): .. this.
31656 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
31658 (s_trunsuffix): Removed code iterator.
31659 (any_s_truncate): Ditto.
31660 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
31661 UNSPEC_US_TRUNCATE instead of original us_truncate.
31662 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
31663 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
31665 2023-06-18 Pan Li <pan2.li@intel.com>
31667 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
31669 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
31671 * rtl.h (*rtx_equal_p_callback_function):
31672 Change return type from int to bool.
31673 (rtx_equal_p): Ditto.
31674 (*hash_rtx_callback_function): Ditto.
31675 * rtl.cc (rtx_equal_p): Change return type from int to bool
31676 and adjust function body accordingly.
31677 * early-remat.cc (scratch_equal): Ditto.
31678 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
31679 (hash_with_unspec_callback): Ditto.
31681 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
31683 * config/arc/arc.md (movqi_insn): Allow certain constants to
31684 be stored into memory in the pattern's condition.
31685 (movsf_insn): Similarly.
31687 2023-06-18 Honza <jh@ryzen3.suse.cz>
31689 PR tree-optimization/109849
31690 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
31691 ES; handle ipa_predicate::not_sra_candidate.
31692 (evaluate_properties_for_edge): Pass es to
31693 evaluate_conditions_for_known_args.
31694 (ipa_fn_summary_t::duplicate): Handle sra candidates.
31695 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
31696 (load_or_store_of_ptr_parameter): New function.
31697 (points_to_possible_sra_candidate_p): New function.
31698 (analyze_function_body): Initialize points_to_possible_sra_candidate;
31699 determine sra predicates.
31700 (estimate_ipcp_clone_size_and_time): Update call of
31701 evaluate_conditions_for_known_args.
31702 (remap_edge_params): Update points_to_possible_sra_candidate.
31703 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
31704 (write_ipa_call_summary): Likewise.
31705 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
31706 (dump_condition): Dump it.
31707 * ipa-predicate.h (struct inline_param_summary): Add
31708 points_to_possible_sra_candidate.
31710 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
31712 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
31713 function for setting the carry flag.
31714 (ix86_expand_builtin) <handlecarry>: Use it here.
31715 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
31716 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
31717 (usubc<mode>5): Likewise.
31719 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
31721 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
31722 for the immediate constant shift count.
31723 (*concat<mode><dwi>3_2): Likewise.
31724 (*concat<mode><dwi>3_3): Likewise.
31725 (*concat<mode><dwi>3_4): Likewise.
31726 (*concat<mode><dwi>3_5): Likewise.
31727 (*concat<mode><dwi>3_6): Likewise.
31729 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
31731 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
31732 (hash_rtx): Remove.
31733 * early-remat.cc (remat_candidate_hasher::equal): Update
31734 to call rtx_equal_p with rtx_equal_p_callback_function argument.
31735 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
31736 (rtx_equal_p): Remove.
31737 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
31738 argument with NULL default value.
31739 (rtx_equal_p_cb): Remove function declaration.
31740 (hash_rtx_cb): Ditto.
31741 (hash_rtx): Add hash_rtx_callback_function argument
31742 with NULL default value.
31743 * sel-sched-ir.cc (free_nop_pool): Update function comment.
31744 (skip_unspecs_callback): Ditto.
31745 (vinsn_init): Update to call hash_rtx with
31746 hash_rtx_callback_function argument.
31747 (vinsn_equal_p): Ditto.
31749 2023-06-18 yulong <shiyulong@iscas.ac.cn>
31751 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
31752 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
31753 (ADJUST_ALIGNMENT): Ditto.
31754 (RVV_TUPLE_PARTIAL_MODES): Ditto.
31755 (ADJUST_NUNITS): Ditto.
31756 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
31758 (vfloat16mf4x3_t): Ditto.
31759 (vfloat16mf4x4_t): Ditto.
31760 (vfloat16mf4x5_t): Ditto.
31761 (vfloat16mf4x6_t): Ditto.
31762 (vfloat16mf4x7_t): Ditto.
31763 (vfloat16mf4x8_t): Ditto.
31764 (vfloat16mf2x2_t): Ditto.
31765 (vfloat16mf2x3_t): Ditto.
31766 (vfloat16mf2x4_t): Ditto.
31767 (vfloat16mf2x5_t): Ditto.
31768 (vfloat16mf2x6_t): Ditto.
31769 (vfloat16mf2x7_t): Ditto.
31770 (vfloat16mf2x8_t): Ditto.
31771 (vfloat16m1x2_t): Ditto.
31772 (vfloat16m1x3_t): Ditto.
31773 (vfloat16m1x4_t): Ditto.
31774 (vfloat16m1x5_t): Ditto.
31775 (vfloat16m1x6_t): Ditto.
31776 (vfloat16m1x7_t): Ditto.
31777 (vfloat16m1x8_t): Ditto.
31778 (vfloat16m2x2_t): Ditto.
31779 (vfloat16m2x3_t): Ditto.
31780 (vfloat16m2x4_t): Ditto.
31781 (vfloat16m4x2_t): Ditto.
31782 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
31783 (vfloat16mf4x3_t): Ditto.
31784 (vfloat16mf4x4_t): Ditto.
31785 (vfloat16mf4x5_t): Ditto.
31786 (vfloat16mf4x6_t): Ditto.
31787 (vfloat16mf4x7_t): Ditto.
31788 (vfloat16mf4x8_t): Ditto.
31789 (vfloat16mf2x2_t): Ditto.
31790 (vfloat16mf2x3_t): Ditto.
31791 (vfloat16mf2x4_t): Ditto.
31792 (vfloat16mf2x5_t): Ditto.
31793 (vfloat16mf2x6_t): Ditto.
31794 (vfloat16mf2x7_t): Ditto.
31795 (vfloat16mf2x8_t): Ditto.
31796 (vfloat16m1x2_t): Ditto.
31797 (vfloat16m1x3_t): Ditto.
31798 (vfloat16m1x4_t): Ditto.
31799 (vfloat16m1x5_t): Ditto.
31800 (vfloat16m1x6_t): Ditto.
31801 (vfloat16m1x7_t): Ditto.
31802 (vfloat16m1x8_t): Ditto.
31803 (vfloat16m2x2_t): Ditto.
31804 (vfloat16m2x3_t): Ditto.
31805 (vfloat16m2x4_t): Ditto.
31806 (vfloat16m4x2_t): Ditto.
31807 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
31808 * config/riscv/riscv.md: New.
31809 * config/riscv/vector-iterators.md: New.
31811 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
31813 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
31814 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
31815 Generalize special case for converting TImode to V1TImode to handle
31816 all 128-bit vector conversions.
31818 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
31820 * gcc-ar.cc (main): Refactor to slightly reduce code
31821 duplication. Avoid unnecessary elements in nargv.
31823 2023-06-16 Pan Li <pan2.li@intel.com>
31826 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
31827 integer reduction expand.
31828 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
31829 and the LMUL1 attr respectively.
31830 * config/riscv/vector.md
31831 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
31832 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
31833 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
31834 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
31835 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
31836 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
31837 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
31839 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31842 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
31844 2023-06-16 Jakub Jelinek <jakub@redhat.com>
31846 PR middle-end/79173
31847 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
31848 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
31849 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
31851 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
31852 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
31853 * builtins.cc (fold_builtin_addc_subc): New function.
31854 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
31855 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
31857 2023-06-16 Jakub Jelinek <jakub@redhat.com>
31859 PR tree-optimization/110271
31860 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
31861 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
31862 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
31864 2023-06-16 Martin Jambor <mjambor@suse.cz>
31866 * configure: Regenerate.
31868 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
31869 Uros Bizjak <ubizjak@gmail.com>
31872 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
31873 define_insn_and_split combine *add<dwi>3_doubleword with
31874 a *concat<mode><dwi>3 for more efficient lowering after reload.
31876 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
31878 * ira-lives.cc: Include except.h.
31879 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
31880 when the pseudo does not live at the exception landing pad.
31882 2023-06-16 Alex Coplan <alex.coplan@arm.com>
31884 * doc/invoke.texi: Document -Welaborated-enum-base.
31886 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31888 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
31889 (ushrn2_n): ... This.
31890 (sqshrn2_n): Rename builtins to...
31891 (ssqshrn2_n): ... This.
31892 (uqshrn2_n): Rename builtins to...
31893 (uqushrn2_n): ... This.
31894 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
31895 (vqshrn_high_n_s32): Likewise.
31896 (vqshrn_high_n_s64): Likewise.
31897 (vqshrn_high_n_u16): Likewise.
31898 (vqshrn_high_n_u32): Likewise.
31899 (vqshrn_high_n_u64): Likewise.
31900 (vshrn_high_n_s16): Likewise.
31901 (vshrn_high_n_s32): Likewise.
31902 (vshrn_high_n_s64): Likewise.
31903 (vshrn_high_n_u16): Likewise.
31904 (vshrn_high_n_u32): Likewise.
31905 (vshrn_high_n_u64): Likewise.
31906 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
31908 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
31909 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
31910 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
31911 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
31912 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
31913 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
31914 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
31915 Update expander for the above.
31917 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31919 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
31920 (shrn2_n): ... This.
31921 (rshrn2): Rename builtins to...
31922 (rshrn2_n): ... This.
31923 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
31924 (vrshrn_high_n_s32): Likewise.
31925 (vrshrn_high_n_s64): Likewise.
31926 (vrshrn_high_n_u16): Likewise.
31927 (vrshrn_high_n_u32): Likewise.
31928 (vrshrn_high_n_u64): Likewise.
31929 (vshrn_high_n_s16): Likewise.
31930 (vshrn_high_n_s32): Likewise.
31931 (vshrn_high_n_s64): Likewise.
31932 (vshrn_high_n_u16): Likewise.
31933 (vshrn_high_n_u32): Likewise.
31934 (vshrn_high_n_u64): Likewise.
31935 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
31937 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
31938 (aarch64_shrn2<mode>_insn_le): Likewise.
31939 (aarch64_shrn2<mode>_insn_be): Likewise.
31940 (aarch64_shrn2<mode>): Likewise.
31941 (aarch64_rshrn2<mode>_insn_le): Likewise.
31942 (aarch64_rshrn2<mode>_insn_be): Likewise.
31943 (aarch64_rshrn2<mode>): Likewise.
31944 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
31945 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
31946 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
31947 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
31948 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
31949 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
31950 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
31951 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
31952 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
31953 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
31954 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
31955 (aarch64_sqshrun2_n<mode>): New define_expand.
31956 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
31957 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
31958 (aarch64_sqrshrun2_n<mode>): New define_expand.
31959 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
31960 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
31961 Delete unspec values.
31962 (VQSHRN_N): Delete int iterator.
31964 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31966 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
31967 * config/aarch64/aarch64-simd.md
31968 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
31969 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
31970 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
31971 * config/aarch64/iterators.md (shrn_s): New code attribute.
31973 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31975 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
31977 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
31978 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
31979 (aarch64_sqrshrun_n<mode>_insn): Likewise.
31980 (aarch64_sqshrun_n<mode>_insn): Likewise.
31981 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
31982 (aarch64_sqshrun_n<mode>): Likewise.
31983 (aarch64_sqrshrun_n<mode>): Likewise.
31984 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
31986 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31988 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
31989 (shrn_n): ... This.
31990 (rshrn): Rename builtins to...
31991 (rshrn_n): ... This.
31992 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
31993 (vshrn_n_s32): Likewise.
31994 (vshrn_n_s64): Likewise.
31995 (vshrn_n_u16): Likewise.
31996 (vshrn_n_u32): Likewise.
31997 (vshrn_n_u64): Likewise.
31998 (vrshrn_n_s16): Likewise.
31999 (vrshrn_n_s32): Likewise.
32000 (vrshrn_n_s64): Likewise.
32001 (vrshrn_n_u16): Likewise.
32002 (vrshrn_n_u32): Likewise.
32003 (vrshrn_n_u64): Likewise.
32004 * config/aarch64/aarch64-simd.md
32005 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
32006 (aarch64_shrn<mode>): Likewise.
32007 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
32008 (aarch64_rshrn<mode>): Likewise.
32009 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
32010 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
32011 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
32012 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
32013 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
32014 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
32015 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
32016 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
32017 (aarch64_sqshrun_n<mode>): Likewise.
32018 (aarch64_sqrshrun_n<mode>): Likewise.
32019 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
32020 (TRUNCEXTEND): New code attribute.
32021 (TRUNC_SHIFT): Likewise.
32022 (shrn_op): Likewise.
32023 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
32026 2023-06-16 Pan Li <pan2.li@intel.com>
32028 * config/riscv/riscv-vsetvl.cc
32029 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
32031 2023-06-16 Richard Biener <rguenther@suse.de>
32033 PR tree-optimization/110278
32034 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
32035 (x != (typeof x)(x == 0) -> true): Likewise.
32037 2023-06-16 Pali Rohár <pali@kernel.org>
32039 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
32040 (REAL_LIBGCC_SPEC): New define.
32041 * config/i386/mingw.opt: Add mcrtdll=
32042 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
32043 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
32044 (STARTFILE_SPEC): Adjust for -mcrtdll=.
32045 * doc/invoke.texi: Add mcrtdll= documentation.
32047 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
32049 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
32050 (mips_handle_code_readable_attr):New static function.
32051 (mips_get_code_readable_attr):New static enum function.
32052 (mips_set_current_function):Set the code_readable mode.
32053 (mips_option_override):Same as above.
32054 * doc/extend.texi:Document code_readable.
32056 2023-06-16 Richard Biener <rguenther@suse.de>
32058 PR tree-optimization/110269
32059 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
32060 with tree_expr_nonzero_p ...
32061 * match.pd (cmp (convert? addr@0) integer_zerop): With this
32064 2023-06-15 Marek Polacek <polacek@redhat.com>
32066 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
32067 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
32068 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
32069 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
32070 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
32072 * configure: Regenerate.
32073 * doc/install.texi: Document --enable-host-pie.
32075 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
32077 * regcprop.cc (maybe_mode_change): Enable stack pointer
32080 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
32082 PR tree-optimization/110266
32083 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
32085 (adjust_realpart_expr): Ditto.
32087 2023-06-15 Jan Beulich <jbeulich@suse.com>
32089 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
32092 2023-06-15 Jan Beulich <jbeulich@suse.com>
32094 * config/i386/constraints.md: Mention k and r for B.
32096 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
32097 Andrew Pinski <apinski@marvell.com>
32100 * config/loongarch/loongarch.md: Modify the register constraints for template
32101 "jumptable" and "indirect_jump" from "r" to "e".
32103 2023-06-15 Xi Ruoyao <xry111@xry111.site>
32105 * config/loongarch/loongarch-tune.h (loongarch_align): New
32107 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
32109 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
32111 * config/loongarch/loongarch.cc
32112 (loongarch_option_override_internal): Set the value of
32113 -falign-functions= if -falign-functions is enabled but no value
32114 is given. Likewise for -falign-labels=.
32116 2023-06-15 Jakub Jelinek <jakub@redhat.com>
32118 PR middle-end/79173
32119 * internal-fn.def (UADDC, USUBC): New internal functions.
32120 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
32121 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
32122 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
32123 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
32124 match_uaddc_usubc): New functions.
32125 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
32126 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
32127 other optimizations have been successful for those.
32128 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
32129 * fold-const-call.cc (fold_const_call): Likewise.
32130 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
32131 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
32132 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
32134 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
32135 define_expand patterns.
32136 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
32137 into NOTE_INSN_DELETED note rather than nop instruction.
32138 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
32141 2023-06-15 Jakub Jelinek <jakub@redhat.com>
32143 PR middle-end/79173
32144 * config/i386/i386.md (subborrow<mode>): Add alternative with
32145 memory destination and add for it define_peephole2
32146 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
32147 destination in these patterns.
32149 2023-06-15 Jakub Jelinek <jakub@redhat.com>
32151 PR middle-end/79173
32152 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
32153 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
32154 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
32155 using memory destination in these patterns.
32157 2023-06-15 Jakub Jelinek <jakub@redhat.com>
32159 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
32160 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
32161 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
32162 * fold-const-call.cc (fold_const_call): ... here.
32164 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
32166 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
32167 Rename to <su>abd<mode>3.
32168 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
32171 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
32173 * doc/md.texi (sabd, uabd): Document them.
32174 * internal-fn.def (ABD): Use new optab.
32175 * optabs.def (sabd_optab, uabd_optab): New optabs,
32176 * tree-vect-patterns.cc (vect_recog_absolute_difference):
32177 Recognize the following idiom abs (a - b).
32178 (vect_recog_sad_pattern): Refactor to use
32179 vect_recog_absolute_difference.
32180 (vect_recog_abd_pattern): Use patterns found by
32181 vect_recog_absolute_difference to build a new ABD
32184 2023-06-15 chenxiaolong <chenxl04200420@163.com>
32186 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
32187 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
32189 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32191 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
32192 (expand_vec_perm_const_1): Add merge optmization.
32194 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
32197 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
32198 (riscv_pass_by_reference): Return true for vector mode
32200 2023-06-15 Pan Li <pan2.li@intel.com>
32202 * config/riscv/autovec-opt.md: Align the predictor sytle.
32203 * config/riscv/autovec.md: Ditto.
32205 2023-06-15 Pan Li <pan2.li@intel.com>
32207 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
32208 Take elen instead of scalar BITS_PER_WORD.
32209 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
32210 instead of scaler BITS_PER_WORD.
32212 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
32214 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
32216 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32218 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
32219 Fix signed comparison warning in loop from npats to enelts.
32221 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
32223 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
32224 to offloading compilation.
32225 * config/gcn/mkoffload.cc (main): Adjust.
32226 * config/nvptx/mkoffload.cc (main): Likewise.
32227 * doc/invoke.texi (foffload-options): Update example.
32229 2023-06-14 liuhongt <hongtao.liu@intel.com>
32232 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
32233 for alternative 2 since there's no evex version for vpcmpeqd
32236 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
32238 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
32240 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
32242 * config/sh/divtab.cc: Remove.
32244 2023-06-13 Jakub Jelinek <jakub@redhat.com>
32246 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
32247 superfluous spaces around \t for vpcmpeqd.
32249 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
32251 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
32252 clearing vectors with only a single element. Set CLEARED if the
32253 vector was initialized to zero.
32255 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
32257 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
32260 (TUPLE_ENTRY): Undef.
32262 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32264 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
32265 (shuffle_generic_patterns): Ditto.
32266 (expand_vec_perm_const_1): Ditto.
32268 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32270 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
32271 (shuffle_decompress_patterns): Ditto.
32273 2023-06-13 Richard Biener <rguenther@suse.de>
32275 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
32277 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
32278 Kito Cheng <kito.cheng@sifive.com>
32280 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
32281 warning flag if func is not builtin
32282 * config/riscv/riscv.cc
32283 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
32284 (riscv_arg_has_vector): Determine whether the arg is vector type.
32285 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
32286 (riscv_init_cumulative_args): The same as header.
32287 (riscv_get_arg_info): Add the checking.
32288 (riscv_function_value): Check the func return and set warning flag
32289 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
32290 determine whether warning psabi or not.
32292 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32294 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
32295 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
32296 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
32297 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
32299 (arm_output_load_tpidr): Define.
32300 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
32301 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
32303 (reload_tp_hard): Likewise.
32304 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
32306 * doc/invoke.texi (Arm Options, mtp): Document new values.
32308 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32311 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
32312 AARCH64_TPIDRRO_EL0 value.
32313 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
32314 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
32315 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
32316 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
32318 2023-06-13 Alexandre Oliva <oliva@adacore.com>
32320 * range-op-float.cc (frange_nextafter): Drop inline.
32321 (frelop_early_resolve): Add static.
32322 (frange_float): Likewise.
32324 2023-06-13 Richard Biener <rguenther@suse.de>
32326 PR middle-end/110232
32327 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
32328 to check whether the buffer covers the whole vector.
32330 2023-06-13 Richard Biener <rguenther@suse.de>
32332 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
32333 .MASK_LOAD and friends set the size of the access to unknown.
32335 2023-06-13 Tejas Belagod <tbelagod@arm.com>
32338 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
32339 calls that have a constant input predicate vector.
32340 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
32341 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
32342 (svlast_impl::vect_all_same): Check if all vector elements are equal.
32344 2023-06-13 Andi Kleen <ak@linux.intel.com>
32346 * config/i386/gcc-auto-profile: Regenerate.
32348 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32350 * config/riscv/vector-iterators.md: Fix requirement.
32352 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32354 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
32355 (shuffle_decompress_patterns): New function.
32356 (expand_vec_perm_const_1): Add decompress optimization.
32358 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
32360 PR rtl-optimization/101188
32361 * postreload.cc (reload_cse_move2add_invalidate): New function,
32363 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
32365 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32367 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
32368 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
32369 and if maxv == 1, use constant element for duplicating into register.
32371 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
32373 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
32374 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
32375 (gimplify_adjust_omp_clauses): Change
32376 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
32377 GOMP_MAP_FORCE_PRESENT.
32378 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
32379 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
32380 to/from clauses with present modifier.
32382 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32384 PR tree-optimization/110205
32385 * range-op-float.cc (range_operator::fold_range): Add default FII
32387 * range-op-mixed.h (class operator_gt): Add missing final overrides.
32388 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
32389 (operator_lshift ::update_bitmask): Add final override.
32390 (operator_rshift ::update_bitmask): Add final override.
32391 * range-op.h (range_operator::fold_range): Add FII prototype.
32393 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32395 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
32396 Use range_op_handler directly.
32397 * range-op.cc (range_op_handler::range_op_handler): Unsigned
32398 param instead of tree-code.
32399 (ptr_op_widen_plus_signed): Delete.
32400 (ptr_op_widen_plus_unsigned): Delete.
32401 (ptr_op_widen_mult_signed): Delete.
32402 (ptr_op_widen_mult_unsigned): Delete.
32403 (range_op_table::initialize_integral_ops): Add new opcodes.
32404 * range-op.h (range_op_handler): Use unsigned.
32405 (OP_WIDEN_MULT_SIGNED): New.
32406 (OP_WIDEN_MULT_UNSIGNED): New.
32407 (OP_WIDEN_PLUS_SIGNED): New.
32408 (OP_WIDEN_PLUS_UNSIGNED): New.
32409 (RANGE_OP_TABLE_SIZE): New.
32410 (range_op_table::operator []): Use unsigned.
32411 (range_op_table::set): Use unsigned.
32412 (m_range_tree): Make unsigned.
32413 (ptr_op_widen_mult_signed): Remove.
32414 (ptr_op_widen_mult_unsigned): Remove.
32415 (ptr_op_widen_plus_signed): Remove.
32416 (ptr_op_widen_plus_unsigned): Remove.
32418 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32420 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
32421 manually as there is no access to the default operator.
32422 (cfn_copysign::fold_range): Don't check for validity.
32423 (cfn_ubsan::fold_range): Ditto.
32424 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
32425 * range-op.cc (default_operator): New.
32426 (range_op_handler::range_op_handler): Use default_operator
32428 (range_op_handler::operator bool): Move from header, compare
32429 against default operator.
32430 (range_op_handler::range_op): New.
32431 * range-op.h (range_op_handler::operator bool): Move.
32433 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32435 * range-op.cc (unified_table): Delete.
32436 (range_op_table operator_table): Instantiate.
32437 (range_op_table::range_op_table): Rename from unified_table.
32438 (range_op_handler::range_op_handler): Use range_op_table.
32439 * range-op.h (range_op_table::operator []): Inline.
32440 (range_op_table::set): Inline.
32442 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32444 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
32446 * gimple-range-op.cc (get_code): Rename from get_code_and_type
32448 (gimple_range_op_handler::supported_p): No need for type.
32449 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
32450 (cfn_copysign::fold_range): Ditto.
32451 (cfn_ubsan::fold_range): Ditto.
32452 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
32453 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
32454 * range-op-float.cc (operator_plus::op1_range): Ditto.
32455 (operator_mult::op1_range): Ditto.
32456 (range_op_float_tests): Ditto.
32457 * range-op.cc (get_op_handler): Remove.
32458 (range_op_handler::set_op_handler): Remove.
32459 (operator_plus::op1_range): No need for type.
32460 (operator_minus::op1_range): Ditto.
32461 (operator_mult::op1_range): Ditto.
32462 (operator_exact_divide::op1_range): Ditto.
32463 (operator_cast::op1_range): Ditto.
32464 (perator_bitwise_not::fold_range): Ditto.
32465 (operator_negate::fold_range): Ditto.
32466 * range-op.h (range_op_handler::range_op_handler): Remove type param.
32467 (range_cast): No need for type.
32468 (range_op_table::operator[]): Check for enum_code >= 0.
32469 * tree-data-ref.cc (compute_distributive_range): No need for type.
32470 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
32471 * value-query.cc (range_query::get_tree_range): Ditto.
32472 * value-relation.cc (relation_oracle::validate_relation): Ditto.
32473 * vr-values.cc (range_of_var_in_loop): Ditto.
32474 (simplify_using_ranges::fold_cond_with_ops): Ditto.
32476 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32478 * range-op-mixed.h (operator_max): Remove final.
32479 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
32480 (pointer_table::pointer_table): Remove.
32481 (class hybrid_max_operator): New.
32482 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
32483 * range-op.cc (pointer_tree_table): Remove.
32484 (unified_table::unified_table): Comment out MAX_EXPR.
32485 (get_op_handler): Remove check of pointer table.
32486 * range-op.h (class pointer_table): Remove.
32488 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32490 * range-op-mixed.h (operator_min): Remove final.
32491 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
32492 (class hybrid_min_operator): New.
32493 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
32494 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
32496 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32498 * range-op-mixed.h (operator_bitwise_or): Remove final.
32499 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
32500 (class hybrid_or_operator): New.
32501 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
32502 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
32504 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32506 * range-op-mixed.h (operator_bitwise_and): Remove final.
32507 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
32508 (class hybrid_and_operator): New.
32509 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
32510 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
32512 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32514 * Makefile.in (OBJS): Add range-op-ptr.o.
32515 * range-op-mixed.h (update_known_bitmask): Move prototype here.
32516 (minus_op1_op2_relation_effect): Move prototype here.
32517 (wi_includes_zero_p): Move function to here.
32518 (wi_zero_p): Ditto.
32519 * range-op.cc (update_known_bitmask): Remove static.
32520 (wi_includes_zero_p): Move to header.
32521 (wi_zero_p): Move to header.
32522 (minus_op1_op2_relation_effect): Remove static.
32523 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
32524 (pointer_plus_operator): Ditto.
32525 (pointer_min_max_operator): Ditto.
32526 (pointer_and_operator): Ditto.
32527 (pointer_or_operator): Ditto.
32528 (pointer_table): Ditto.
32529 (range_op_table::initialize_pointer_ops): Ditto.
32530 * range-op-ptr.cc: New.
32532 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32534 * range-op-mixed.h (class operator_max): Move from...
32535 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
32536 (get_op_handler): Remove the integral table.
32537 (class operator_max): Move from here.
32538 (integral_table::integral_table): Delete.
32539 * range-op.h (class integral_table): Delete.
32541 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32543 * range-op-mixed.h (class operator_min): Move from...
32544 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
32545 (class operator_min): Move from here.
32546 (integral_table::integral_table): Remove MIN_EXPR.
32548 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32550 * range-op-mixed.h (class operator_bitwise_or): Move from...
32551 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
32552 (class operator_bitwise_or): Move from here.
32553 (integral_table::integral_table): Remove BIT_IOR_EXPR.
32555 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32557 * range-op-mixed.h (class operator_bitwise_and): Move from...
32558 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
32559 (get_op_handler): Check for a pointer table entry first.
32560 (class operator_bitwise_and): Move from here.
32561 (integral_table::integral_table): Remove BIT_AND_EXPR.
32563 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32565 * range-op-mixed.h (class operator_bitwise_xor): Move from...
32566 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
32567 (class operator_bitwise_xor): Move from here.
32568 (integral_table::integral_table): Remove BIT_XOR_EXPR.
32569 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
32571 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32573 * range-op-mixed.h (class operator_bitwise_not): Move from...
32574 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
32575 (class operator_bitwise_not): Move from here.
32576 (integral_table::integral_table): Remove BIT_NOT_EXPR.
32577 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
32579 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
32581 * range-op-mixed.h (class operator_addr_expr): Move from...
32582 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
32583 (class operator_addr_expr): Move from here.
32584 (integral_table::integral_table): Remove ADDR_EXPR.
32585 (pointer_table::pointer_table): Remove ADDR_EXPR.
32587 2023-06-12 Pan Li <pan2.li@intel.com>
32589 * config/riscv/riscv-vector-builtins-types.def
32590 (vfloat16m1_t): Add type to lmul1 ops.
32591 (vfloat16m2_t): Likewise.
32592 (vfloat16m4_t): Likewise.
32594 2023-06-12 Richard Biener <rguenther@suse.de>
32596 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
32597 .MASK_STORE and friend set the size of the access to
32600 2023-06-12 Tamar Christina <tamar.christina@arm.com>
32602 * config.in: Regenerate.
32603 * configure: Regenerate.
32604 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
32606 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32608 * config/riscv/autovec-opt.md
32609 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
32610 (*<any_shiftrt:optab>trunc<mode>): Ditto.
32611 * config/riscv/autovec.md (<optab><mode>3): Change to
32612 define_insn_and_split.
32613 (v<optab><mode>3): Ditto.
32614 (trunc<mode><v_double_trunc>2): Ditto.
32616 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32618 * simplify-rtx.cc (simplify_const_unary_operation):
32619 Handle US_TRUNCATE, SS_TRUNCATE.
32621 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
32624 * doc/gm2.texi (Standard procedures): Fix Next link.
32626 2023-06-12 Tamar Christina <tamar.christina@arm.com>
32628 * config.in: Regenerate.
32630 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
32632 PR middle-end/110142
32633 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
32634 subtype to vect_widened_op_tree and remove subtype parameter, also
32635 remove superfluous overloaded function definition.
32636 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
32637 to call to vect_recog_widen_op_pattern.
32638 (vect_recog_widen_minus_pattern): Likewise.
32640 2023-06-12 liuhongt <hongtao.liu@intel.com>
32642 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
32643 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
32644 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
32645 (vec_unpacks_lo_<mode>): Ditto.
32646 (vec_unpacks_hi_<mode>): Ditto.
32647 (sse_movlhps_<mode>): New define_insn.
32648 (ssse3_palignr<mode>_perm): Extend to V_128H.
32649 (V_128H): New mode iterator.
32650 (ssepackPHmode): New mode attribute.
32651 (vunpck_extract_mode): Ditto.
32652 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
32653 (vpckfloat_temp_mode): Ditto.
32654 (vpckfloat_op_mode): Ditto.
32655 (vunpckfixt_mode): Extend to VxHF.
32656 (vunpckfixt_model): Ditto.
32657 (vunpckfixt_extract_mode): Ditto.
32659 2023-06-12 Richard Biener <rguenther@suse.de>
32661 PR middle-end/110200
32662 * genmatch.cc (expr::gen_transform): Put braces around
32663 the if arm for the (convert ...) short-cut.
32665 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
32668 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
32669 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
32671 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
32674 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
32675 floating constant itself for real_to_target call.
32677 2023-06-12 Pan Li <pan2.li@intel.com>
32679 * config/riscv/riscv-vector-builtins-types.def
32680 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
32681 (vfloat16mf2_t): Ditto.
32682 (vfloat16m1_t): Ditto.
32683 (vfloat16m2_t): Ditto.
32684 (vfloat16m4_t): Ditto.
32686 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
32688 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
32689 Do not require a stack frame when debugging is enabled for AIX.
32691 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
32693 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
32694 Remove attribute values.
32695 (insv_notbit): New post-reload insn.
32696 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
32697 (*insv.not-bit.0_split, *insv.not-bit.7_split)
32698 (*insv.xor-extract_split): Split to insv_notbit.
32699 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
32700 (*insv.xor-extract): Remove post-reload insns.
32701 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
32702 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
32703 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
32704 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
32706 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
32709 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
32710 (MSB, SIZE): New mode attributes.
32711 (any_shift): New code iterator.
32712 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
32713 (*lshr<mode>3_const_split): Add constraint alternative for
32714 the case of shift-offset = MSB. Ditch "length" attribute.
32715 (extzv<mode): New. replaces extzv. Adjust following patterns.
32716 Use avr_out_extr, avr_out_extr_not to print asm.
32717 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
32718 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
32719 * config/avr/constraints.md (C15, C23, C31, Yil): New
32720 * config/avr/predicates.md (reg_or_low_io_operand)
32721 (const7_operand, reg_or_low_io_operand)
32722 (const15_operand, const_0_to_15_operand)
32723 (const23_operand, const_0_to_23_operand)
32724 (const31_operand, const_0_to_31_operand): New.
32725 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
32726 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
32727 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
32728 MSB case to new insn constraint "r" for operands[1].
32729 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
32730 Handle these cases.
32731 (avr_rtx_costs_1): Adjust cost for a new pattern.
32733 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32735 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
32736 (vector_insn_info::parse_insn): Add rtx_insn parse.
32737 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
32738 (get_first_vsetvl): New function.
32739 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
32740 (pass_vsetvl::cleanup_insns): Remove it.
32741 (pass_vsetvl::ssa_post_optimization): New function.
32742 (has_no_uses): Ditto.
32743 (pass_vsetvl::propagate_avl): Remove it.
32744 (pass_vsetvl::df_post_optimization): New function.
32745 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
32746 * config/riscv/riscv-vsetvl.h: Adapt declaration.
32748 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
32750 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
32751 (ipcp_vr_lattice::print): Call dump method.
32752 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
32754 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
32755 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
32757 (initialize_node_lattices): Pass type when appropriate.
32758 (ipa_vr_operation_and_type_effects): Make type agnostic.
32759 (ipa_value_range_from_jfunc): Same.
32760 (propagate_vr_across_jump_function): Same.
32761 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
32762 (evaluate_properties_for_edge): Same.
32763 * ipa-prop.cc (ipa_vr::get_vrange): Same.
32764 (ipcp_update_vr): Same.
32765 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
32766 (ipa_range_set_and_normalize): Same.
32768 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
32772 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
32773 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
32774 (avr_pass_data_ifelse): New pass_data for it.
32775 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
32776 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
32777 (avr_out_cmp_ext): New functions.
32778 (compare_condtition): Make sure REG_CC dies in the branch insn.
32779 (avr_rtx_costs_1): Add computation of cbranch costs.
32780 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
32781 [ADJUST_LEN_CMP_SEXT]Handle them.
32782 (TARGET_CANONICALIZE_COMPARISON): New define.
32783 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
32784 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
32785 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
32786 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
32787 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
32788 (avr_out_cmp_zext): New Protos
32789 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
32790 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
32791 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
32792 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
32793 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
32794 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
32795 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
32796 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
32797 (adjust_len) [add_set_ZN, cmp_zext]: New.
32798 (QIPSI): New mode iterator.
32799 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
32800 (gelt): New code iterator.
32801 (gelt_eqne): New code attribute.
32802 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
32803 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
32804 (*cmpqi_sign_extend): Remove insns.
32805 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
32806 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
32807 * config/avr/predicates.md (scratch_or_d_register_operand): New.
32808 * config/avr/constraints.md (Yxx): New constraint.
32810 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32812 * config/riscv/autovec.md (select_vl<mode>): New pattern.
32813 * config/riscv/riscv-protos.h (expand_select_vl): New function.
32814 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
32816 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32818 * range-op-float.cc (foperator_mult_div_base): Delete.
32819 (foperator_mult_div_base::find_range): Make static local function.
32820 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
32821 (operator_mult::op1_range): Rename from foperator_mult.
32822 (operator_mult::op2_range): Ditto.
32823 (operator_mult::rv_fold): Ditto.
32824 (float_table::float_table): Remove MULT_EXPR.
32825 (class foperator_div): Inherit from range_operator.
32826 (float_table::float_table): Delete.
32827 * range-op-mixed.h (class operator_mult): Combined from integer
32829 * range-op.cc (float_tree_table): Delete.
32830 (op_mult): New object.
32831 (unified_table::unified_table): Add MULT_EXPR.
32832 (get_op_handler): Do not check float table any longer.
32833 (class cross_product_operator): Move to range-op-mixed.h.
32834 (class operator_mult): Move to range-op-mixed.h.
32835 (integral_table::integral_table): Remove MULT_EXPR.
32836 (pointer_table::pointer_table): Remove MULT_EXPR.
32837 * range-op.h (float_table): Remove.
32839 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32841 * range-op-float.cc (foperator_negate): Remove. Move prototypes
32842 to range-op-mixed.h
32843 (operator_negate::fold_range): Rename from foperator_negate.
32844 (operator_negate::op1_range): Ditto.
32845 (float_table::float_table): Remove NEGATE_EXPR.
32846 * range-op-mixed.h (class operator_negate): Combined from integer
32848 * range-op.cc (op_negate): New object.
32849 (unified_table::unified_table): Add NEGATE_EXPR.
32850 (class operator_negate): Move to range-op-mixed.h.
32851 (integral_table::integral_table): Remove NEGATE_EXPR.
32852 (pointer_table::pointer_table): Remove NEGATE_EXPR.
32854 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32856 * range-op-float.cc (foperator_minus): Remove. Move prototypes
32857 to range-op-mixed.h
32858 (operator_minus::fold_range): Rename from foperator_minus.
32859 (operator_minus::op1_range): Ditto.
32860 (operator_minus::op2_range): Ditto.
32861 (operator_minus::rv_fold): Ditto.
32862 (float_table::float_table): Remove MINUS_EXPR.
32863 * range-op-mixed.h (class operator_minus): Combined from integer
32865 * range-op.cc (op_minus): New object.
32866 (unified_table::unified_table): Add MINUS_EXPR.
32867 (class operator_minus): Move to range-op-mixed.h.
32868 (integral_table::integral_table): Remove MINUS_EXPR.
32869 (pointer_table::pointer_table): Remove MINUS_EXPR.
32871 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32873 * range-op-float.cc (foperator_abs): Remove. Move prototypes
32874 to range-op-mixed.h
32875 (operator_abs::fold_range): Rename from foperator_abs.
32876 (operator_abs::op1_range): Ditto.
32877 (float_table::float_table): Remove ABS_EXPR.
32878 * range-op-mixed.h (class operator_abs): Combined from integer
32880 * range-op.cc (op_abs): New object.
32881 (unified_table::unified_table): Add ABS_EXPR.
32882 (class operator_abs): Move to range-op-mixed.h.
32883 (integral_table::integral_table): Remove ABS_EXPR.
32884 (pointer_table::pointer_table): Remove ABS_EXPR.
32886 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32888 * range-op-float.cc (foperator_plus): Remove. Move prototypes
32889 to range-op-mixed.h
32890 (operator_plus::fold_range): Rename from foperator_plus.
32891 (operator_plus::op1_range): Ditto.
32892 (operator_plus::op2_range): Ditto.
32893 (operator_plus::rv_fold): Ditto.
32894 (float_table::float_table): Remove PLUS_EXPR.
32895 * range-op-mixed.h (class operator_plus): Combined from integer
32897 * range-op.cc (op_plus): New object.
32898 (unified_table::unified_table): Add PLUS_EXPR.
32899 (class operator_plus): Move to range-op-mixed.h.
32900 (integral_table::integral_table): Remove PLUS_EXPR.
32901 (pointer_table::pointer_table): Remove PLUS_EXPR.
32903 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32905 * range-op-mixed.h (class operator_cast): Combined from integer
32907 * range-op.cc (op_cast): New object.
32908 (unified_table::unified_table): Add op_cast
32909 (class operator_cast): Move to range-op-mixed.h.
32910 (integral_table::integral_table): Remove op_cast
32911 (pointer_table::pointer_table): Remove op_cast.
32913 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32915 * range-op-float.cc (operator_cst::fold_range): New.
32916 * range-op-mixed.h (class operator_cst): Move from integer file.
32917 * range-op.cc (op_cst): New object.
32918 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
32919 (class operator_cst): Move to range-op-mixed.h.
32920 (integral_table::integral_table): Remove op_cst.
32921 (pointer_table::pointer_table): Remove op_cst.
32923 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32925 * range-op-float.cc (foperator_identity): Remove. Move prototypes
32926 to range-op-mixed.h
32927 (operator_identity::fold_range): Rename from foperator_identity.
32928 (operator_identity::op1_range): Ditto.
32929 (float_table::float_table): Remove fop_identity.
32930 * range-op-mixed.h (class operator_identity): Combined from integer
32932 * range-op.cc (op_identity): New object.
32933 (unified_table::unified_table): Add op_identity.
32934 (class operator_identity): Move to range-op-mixed.h.
32935 (integral_table::integral_table): Remove identity.
32936 (pointer_table::pointer_table): Remove identity.
32938 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32940 * range-op-float.cc (foperator_ge): Remove. Move prototypes
32941 to range-op-mixed.h
32942 (operator_ge::fold_range): Rename from foperator_ge.
32943 (operator_ge::op1_range): Ditto.
32944 (float_table::float_table): Remove GE_EXPR.
32945 * range-op-mixed.h (class operator_ge): Combined from integer
32947 * range-op.cc (op_ge): New object.
32948 (unified_table::unified_table): Add GE_EXPR.
32949 (class operator_ge): Move to range-op-mixed.h.
32950 (ge_op1_op2_relation): Fold into
32951 operator_ge::op1_op2_relation.
32952 (integral_table::integral_table): Remove GE_EXPR.
32953 (pointer_table::pointer_table): Remove GE_EXPR.
32954 * range-op.h (ge_op1_op2_relation): Delete.
32956 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32958 * range-op-float.cc (foperator_gt): Remove. Move prototypes
32959 to range-op-mixed.h
32960 (operator_gt::fold_range): Rename from foperator_gt.
32961 (operator_gt::op1_range): Ditto.
32962 (float_table::float_table): Remove GT_EXPR.
32963 * range-op-mixed.h (class operator_gt): Combined from integer
32965 * range-op.cc (op_gt): New object.
32966 (unified_table::unified_table): Add GT_EXPR.
32967 (class operator_gt): Move to range-op-mixed.h.
32968 (gt_op1_op2_relation): Fold into
32969 operator_gt::op1_op2_relation.
32970 (integral_table::integral_table): Remove GT_EXPR.
32971 (pointer_table::pointer_table): Remove GT_EXPR.
32972 * range-op.h (gt_op1_op2_relation): Delete.
32974 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32976 * range-op-float.cc (foperator_le): Remove. Move prototypes
32977 to range-op-mixed.h
32978 (operator_le::fold_range): Rename from foperator_le.
32979 (operator_le::op1_range): Ditto.
32980 (float_table::float_table): Remove LE_EXPR.
32981 * range-op-mixed.h (class operator_le): Combined from integer
32983 * range-op.cc (op_le): New object.
32984 (unified_table::unified_table): Add LE_EXPR.
32985 (class operator_le): Move to range-op-mixed.h.
32986 (le_op1_op2_relation): Fold into
32987 operator_le::op1_op2_relation.
32988 (integral_table::integral_table): Remove LE_EXPR.
32989 (pointer_table::pointer_table): Remove LE_EXPR.
32990 * range-op.h (le_op1_op2_relation): Delete.
32992 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
32994 * range-op-float.cc (foperator_lt): Remove. Move prototypes
32995 to range-op-mixed.h
32996 (operator_lt::fold_range): Rename from foperator_lt.
32997 (operator_lt::op1_range): Ditto.
32998 (float_table::float_table): Remove LT_EXPR.
32999 * range-op-mixed.h (class operator_lt): Combined from integer
33001 * range-op.cc (op_lt): New object.
33002 (unified_table::unified_table): Add LT_EXPR.
33003 (class operator_lt): Move to range-op-mixed.h.
33004 (lt_op1_op2_relation): Fold into
33005 operator_lt::op1_op2_relation.
33006 (integral_table::integral_table): Remove LT_EXPR.
33007 (pointer_table::pointer_table): Remove LT_EXPR.
33008 * range-op.h (lt_op1_op2_relation): Delete.
33010 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
33012 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
33013 to range-op-mixed.h
33014 (operator_equal::fold_range): Rename from foperator_not_equal.
33015 (operator_equal::op1_range): Ditto.
33016 (float_table::float_table): Remove NE_EXPR.
33017 * range-op-mixed.h (class operator_not_equal): Combined from integer
33019 * range-op.cc (op_equal): New object.
33020 (unified_table::unified_table): Add NE_EXPR.
33021 (class operator_not_equal): Move to range-op-mixed.h.
33022 (not_equal_op1_op2_relation): Fold into
33023 operator_not_equal::op1_op2_relation.
33024 (integral_table::integral_table): Remove NE_EXPR.
33025 (pointer_table::pointer_table): Remove NE_EXPR.
33026 * range-op.h (not_equal_op1_op2_relation): Delete.
33028 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
33030 * range-op-float.cc (foperator_equal): Remove. Move prototypes
33031 to range-op-mixed.h
33032 (operator_equal::fold_range): Rename from foperator_equal.
33033 (operator_equal::op1_range): Ditto.
33034 (float_table::float_table): Remove EQ_EXPR.
33035 * range-op-mixed.h (class operator_equal): Combined from integer
33037 * range-op.cc (op_equal): New object.
33038 (unified_table::unified_table): Add EQ_EXPR.
33039 (class operator_equal): Move to range-op-mixed.h.
33040 (equal_op1_op2_relation): Fold into
33041 operator_equal::op1_op2_relation.
33042 (integral_table::integral_table): Remove EQ_EXPR.
33043 (pointer_table::pointer_table): Remove EQ_EXPR.
33044 * range-op.h (equal_op1_op2_relation): Delete.
33046 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
33048 * range-op-float.cc (class float_table): Move to header.
33049 (float_table::float_table): Move float only operators to...
33050 (range_op_table::initialize_float_ops): Here.
33051 * range-op-mixed.h: New.
33052 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
33054 (float_tree_table): Moved from range-op-float.cc.
33055 (unified_tree_table): New.
33056 (unified_table::unified_table): New. Call initialize routines.
33057 (get_op_handler): Check unified table first.
33058 (range_op_handler::range_op_handler): Handle no type constructor.
33059 (integral_table::integral_table): Move integral only operators to...
33060 (range_op_table::initialize_integral_ops): Here.
33061 (pointer_table::pointer_table): Move pointer only operators to...
33062 (range_op_table::initialize_pointer_ops): Here.
33063 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
33064 (get_bool_state): Ditto.
33065 (empty_range_varying): Ditto.
33066 (relop_early_resolve): Ditto.
33067 (class range_op_table): Add new init methods for range types.
33068 (class integral_table): Move declaration to here.
33069 (class pointer_table): Move declaration to here.
33070 (class float_table): Move declaration to here.
33072 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33073 Richard Sandiford <richard.sandiford@arm.com>
33074 Richard Biener <rguenther@suse.de>
33076 * doc/md.texi: Add SELECT_VL support.
33077 * internal-fn.def (SELECT_VL): Ditto.
33078 * optabs.def (OPTAB_D): Ditto.
33079 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
33080 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
33081 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
33082 (vectorizable_store): Ditto.
33083 (vectorizable_load): Ditto.
33084 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
33086 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
33089 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
33092 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
33094 * range-op.cc (range_cast): Move to...
33095 * range-op.h (range_cast): Here and add generic a version.
33097 2023-06-09 Marek Polacek <polacek@redhat.com>
33101 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
33102 warn about designated initializers in C only.
33104 2023-06-09 Andrew Pinski <apinski@marvell.com>
33106 PR tree-optimization/97711
33107 PR tree-optimization/110155
33108 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
33109 ((zero_one != 0) ? z <op> y : y): Likewise.
33111 2023-06-09 Andrew Pinski <apinski@marvell.com>
33113 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
33114 multiply rather than negation/bit_and.
33116 2023-06-09 Andrew Pinski <apinski@marvell.com>
33118 * match.pd (`X & -Y -> X * Y`): Allow for truncation
33119 and the same type for unsigned types.
33121 2023-06-09 Andrew Pinski <apinski@marvell.com>
33123 PR tree-optimization/110165
33124 PR tree-optimization/110166
33125 * match.pd (zero_one_valued_p): Don't accept
33126 signed 1-bit integers.
33128 2023-06-09 Richard Biener <rguenther@suse.de>
33130 * match.pd (two conversions in a row): Use element_precision
33131 to DTRT for VECTOR_TYPE.
33133 2023-06-09 Pan Li <pan2.li@intel.com>
33135 * config/riscv/riscv.md (enabled): Move to another place, and
33136 add fp_vector_disabled to the cond.
33137 (fp_vector_disabled): New attr defined for disabling fp.
33138 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
33140 2023-06-09 Pan Li <pan2.li@intel.com>
33142 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
33145 2023-06-09 liuhongt <hongtao.liu@intel.com>
33148 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
33149 view_convert_expr mask to signed type when folding pblendvb
33152 2023-06-09 liuhongt <hongtao.liu@intel.com>
33155 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
33156 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
33157 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
33159 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
33160 real codename for __builtin_ia32_pabs{b,w,d}.
33162 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33164 * gimple-range-op.cc
33165 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
33166 (gimple_range_op_handler::maybe_builtin_call): Adjust.
33167 * gimple-range-op.h (operand1, operand2): Use m_operator.
33168 * range-op.cc (integral_table, pointer_table): Relocate.
33169 (get_op_handler): Rename from get_handler and handle all types.
33170 (range_op_handler::range_op_handler): Relocate.
33171 (range_op_handler::set_op_handler): Relocate and adjust.
33172 (range_op_handler::range_op_handler): Relocate.
33173 (dispatch_trio): New.
33174 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
33175 (range_op_handler::dispatch_kind): New.
33176 (range_op_handler::fold_range): Relocate and Use new dispatch value.
33177 (range_op_handler::op1_range): Ditto.
33178 (range_op_handler::op2_range): Ditto.
33179 (range_op_handler::lhs_op1_relation): Ditto.
33180 (range_op_handler::lhs_op2_relation): Ditto.
33181 (range_op_handler::op1_op2_relation): Ditto.
33182 (range_op_handler::set_op_handler): Use m_operator member.
33183 * range-op.h (range_op_handler::operator bool): Use m_operator.
33184 (range_op_handler::dispatch_kind): New.
33185 (range_op_handler::m_valid): Delete.
33186 (range_op_handler::m_int): Delete
33187 (range_op_handler::m_float): Delete
33188 (range_op_handler::m_operator): New.
33189 (range_op_table::operator[]): Relocate from .cc file.
33190 (range_op_table::set): Ditto.
33191 * value-range.h (class vrange): Make range_op_handler a friend.
33193 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33195 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
33196 (cfn_pass_through_arg1): Adjust using statemenmt.
33197 (cfn_signbit): Change base class, adjust using statement.
33198 (cfn_copysign): Ditto.
33200 (cfn_sincos): Ditto.
33201 * range-op-float.cc (fold_range): Change class to range_operator.
33205 (lhs_op1_relation): Ditto.
33206 (lhs_op2_relation): Ditto.
33207 (op1_op2_relation): Ditto.
33208 (foperator_*): Ditto.
33209 (class float_table): New. Inherit from range_op_table.
33210 (floating_tree_table) Change to range_op_table pointer.
33211 (class floating_op_table): Delete.
33212 * range-op.cc (operator_equal): Adjust using statement.
33213 (operator_not_equal): Ditto.
33214 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
33215 (operator_minus, operator_cast): Ditto.
33216 (operator_bitwise_and, pointer_plus_operator): Ditto.
33217 (get_float_handle): Change return type.
33218 * range-op.h (range_operator_float): Delete. Relocate all methods
33219 into class range_operator.
33220 (range_op_handler::m_float): Change type to range_operator.
33221 (floating_op_table): Delete.
33222 (floating_tree_table): Change type.
33224 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33226 * range-op.cc (range_operator::fold_range): Call virtual routine.
33227 (range_operator::update_bitmask): New.
33228 (operator_equal::update_bitmask): New.
33229 (operator_not_equal::update_bitmask): New.
33230 (operator_lt::update_bitmask): New.
33231 (operator_le::update_bitmask): New.
33232 (operator_gt::update_bitmask): New.
33233 (operator_ge::update_bitmask): New.
33234 (operator_ge::update_bitmask): New.
33235 (operator_plus::update_bitmask): New.
33236 (operator_minus::update_bitmask): New.
33237 (operator_pointer_diff::update_bitmask): New.
33238 (operator_min::update_bitmask): New.
33239 (operator_max::update_bitmask): New.
33240 (operator_mult::update_bitmask): New.
33241 (operator_div:operator_div):New.
33242 (operator_div::update_bitmask): New.
33243 (operator_div::m_code): New member.
33244 (operator_exact_divide::operator_exact_divide): New constructor.
33245 (operator_lshift::update_bitmask): New.
33246 (operator_rshift::update_bitmask): New.
33247 (operator_bitwise_and::update_bitmask): New.
33248 (operator_bitwise_or::update_bitmask): New.
33249 (operator_bitwise_xor::update_bitmask): New.
33250 (operator_trunc_mod::update_bitmask): New.
33251 (op_ident, op_unknown, op_ptr_min_max): New.
33252 (op_nop, op_convert): Delete.
33253 (op_ssa, op_paren, op_obj_type): Delete.
33254 (op_realpart, op_imagpart): Delete.
33255 (op_ptr_min, op_ptr_max): Delete.
33256 (pointer_plus_operator:update_bitmask): New.
33257 (range_op_table::set): Do not use m_code.
33258 (integral_table::integral_table): Adjust to single instances.
33259 * range-op.h (range_operator::range_operator): Delete.
33260 (range_operator::m_code): Delete.
33261 (range_operator::update_bitmask): New.
33263 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
33265 * range-op-float.cc (range_operator_float::fold_range): Return
33266 NAN of the result type.
33268 2023-06-08 Jakub Jelinek <jakub@redhat.com>
33270 * optabs.cc (expand_ffs): Add forward declaration.
33271 (expand_doubleword_clz): Rename to ...
33272 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
33273 handle also doubleword CTZ and FFS in addition to CLZ.
33274 (expand_unop): Adjust caller. Also call it for doubleword
33275 ctz_optab and ffs_optab.
33277 2023-06-08 Jakub Jelinek <jakub@redhat.com>
33280 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
33281 n_words == 2 recurse with mmx_ok as first argument rather than false.
33283 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
33285 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
33286 avoid sign extension/undefined behaviour when setting each bit.
33288 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
33289 Uros Bizjak <ubizjak@gmail.com>
33291 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
33292 Use new x86_stc instruction when the carry flag must be set.
33293 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
33294 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
33295 * config/i386/i386.h (TARGET_SLOW_STC): New define.
33296 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
33297 (x86_stc): New define_insn.
33298 (define_peephole2): Convert x86_stc into alternate implementation
33299 on pentium4 without -Os when a QImode register is available.
33300 (*x86_cmc): New define_insn.
33301 (define_peephole2): Convert *x86_cmc into alternate implementation
33302 on pentium4 without -Os when a QImode register is available.
33303 (*setccc): New define_insn_and_split for a no-op CCCmode move.
33304 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
33305 recognize (and eliminate) the carry flag being copied to itself.
33306 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
33307 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
33309 2023-06-07 Andrew Pinski <apinski@marvell.com>
33311 * match.pd: Fix comment for the
33312 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
33314 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
33315 Jeff Law <jlaw@ventanamicro.com>
33317 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
33318 (rotrsi3_sext): Expose generator.
33319 (rotlsi3 pattern): Hide generator.
33320 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
33322 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
33323 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
33324 (mulsi3, <optab>si3): Likewise.
33325 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
33326 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
33327 (<u>mulsidi3): Likewise.
33328 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
33329 (mulsi3_extended, <optab>si3_extended): Likewise.
33330 (splitter for shadd feeding divison): Update RTL pattern to account
33331 for changes in how 32 bit ops are expanded for TARGET_64BIT.
33332 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
33334 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
33337 * config/riscv/riscv.cc (riscv_print_operand): Calculate
33338 memmodel only when it is valid.
33340 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
33342 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
33343 for constant element of a vector.
33345 2023-06-07 Jakub Jelinek <jakub@redhat.com>
33347 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
33348 instead compare tree_nonzero_bits <= 1U rather than just == 1.
33350 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33353 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
33355 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
33356 names for builtins.
33357 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
33358 setup if in_lto_p, just like we do for SVE.
33359 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
33360 (__arm_st64b): Delete.
33361 (__arm_st64bv): Delete.
33362 (__arm_st64bv0): Delete.
33364 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33367 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
33368 Use input operand for the destination address.
33369 * config/aarch64/aarch64.md (st64b): Fix constraint on address
33372 2023-06-07 Alex Coplan <alex.coplan@arm.com>
33375 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
33376 Replace eight consecutive spaces with tabs.
33377 (aarch64_init_ls64_builtins): Likewise.
33378 (aarch64_expand_builtin_ls64): Likewise.
33379 * config/aarch64/aarch64.md (ld64b): Likewise.
33382 (st64bv0): Likewise.
33384 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
33386 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
33387 offset table pseudo to a general reg subset.
33389 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33391 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
33393 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
33395 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
33396 (aarch64_sqxtun2<mode>_le): Likewise.
33397 (aarch64_sqxtun2<mode>_be): Likewise.
33398 (aarch64_sqxtun2<mode>): Adjust for the above.
33399 (aarch64_sqmovun<mode>): New define_expand.
33400 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
33401 (half_mask): New mode attribute.
33402 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
33405 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33407 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
33409 (aarch64_addp<mode>_insn): ... This...
33410 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
33411 (aarch64_addp<mode>): New define_expand.
33413 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33415 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
33416 * config/riscv/riscv-v.cc
33417 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
33419 (rvv_builder::single_step_npatterns_p): New function.
33420 (rvv_builder::npatterns_all_equal_p): Ditto.
33421 (const_vec_all_in_range_p): Support POLY handling.
33422 (gen_const_vector_dup): Ditto.
33423 (emit_vlmax_gather_insn): Add vrgatherei16.
33424 (emit_vlmax_masked_gather_mu_insn): Ditto.
33425 (expand_const_vector): Add VLA SLP const vector support.
33426 (expand_vec_perm): Support POLY.
33427 (struct expand_vec_perm_d): New struct.
33428 (shuffle_generic_patterns): New function.
33429 (expand_vec_perm_const_1): Ditto.
33430 (expand_vec_perm_const): Ditto.
33431 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
33432 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
33434 2023-06-07 Andrew Pinski <apinski@marvell.com>
33436 PR middle-end/110117
33437 * expr.cc (expand_single_bit_test): Handle
33438 const_int from expand_expr.
33440 2023-06-07 Andrew Pinski <apinski@marvell.com>
33442 * expr.cc (do_store_flag): Rearrange the
33443 TER code so that it overrides the nonzero bits
33444 info if we had `a & POW2`.
33446 2023-06-07 Andrew Pinski <apinski@marvell.com>
33448 PR tree-optimization/110134
33449 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
33451 (-A CMP CST -> B CMP (-CST)): Likewise.
33453 2023-06-07 Andrew Pinski <apinski@marvell.com>
33455 PR tree-optimization/89263
33456 PR tree-optimization/99069
33457 PR tree-optimization/20083
33458 PR tree-optimization/94898
33459 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
33460 one of the operands are constant.
33462 2023-06-07 Andrew Pinski <apinski@marvell.com>
33464 * match.pd (zero_one_valued_p): Match 0 integer constant
33467 2023-06-07 Pan Li <pan2.li@intel.com>
33469 * config/riscv/riscv-vector-builtins-types.def
33470 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
33471 (vfloat32m1_t): Ditto.
33472 (vfloat32m2_t): Ditto.
33473 (vfloat32m4_t): Ditto.
33474 (vfloat32m8_t): Ditto.
33475 (vint16mf4_t): Ditto.
33476 (vint16mf2_t): Ditto.
33477 (vint16m1_t): Ditto.
33478 (vint16m2_t): Ditto.
33479 (vint16m4_t): Ditto.
33480 (vint16m8_t): Ditto.
33481 (vuint16mf4_t): Ditto.
33482 (vuint16mf2_t): Ditto.
33483 (vuint16m1_t): Ditto.
33484 (vuint16m2_t): Ditto.
33485 (vuint16m4_t): Ditto.
33486 (vuint16m8_t): Ditto.
33487 (vint32mf2_t): Ditto.
33488 (vint32m1_t): Ditto.
33489 (vint32m2_t): Ditto.
33490 (vint32m4_t): Ditto.
33491 (vint32m8_t): Ditto.
33492 (vuint32mf2_t): Ditto.
33493 (vuint32m1_t): Ditto.
33494 (vuint32m2_t): Ditto.
33495 (vuint32m4_t): Ditto.
33496 (vuint32m8_t): Ditto.
33498 2023-06-07 Jason Merrill <jason@redhat.com>
33501 * doc/invoke.texi: Document it.
33503 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
33505 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
33506 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
33507 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
33508 NOT (BITREVERSE x) as BITREVERSE (NOT x).
33509 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
33510 Optimize PARITY (BITREVERSE x) as PARITY x.
33511 Optimize BITREVERSE (BITREVERSE x) as x.
33512 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
33513 BITREVERSE of a constant integer at compile-time.
33514 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
33515 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
33516 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
33517 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
33518 Optimize COPYSIGN (x, ABS y) as ABS x.
33519 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
33520 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
33521 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
33522 arguments at compile-time.
33524 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
33526 * rtl.h (function_invariant_p): Change return type from int to bool.
33527 * reload1.cc (function_invariant_p): Change return type from
33528 int to bool and adjust function body accordingly.
33530 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33532 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
33533 (*single_<optab>mult_plus<mode>): Ditto.
33534 (*double_<optab>mult_plus<mode>): Ditto.
33535 (*sign_zero_extend_fma): Ditto.
33536 (*zero_sign_extend_fma): Ditto.
33537 * config/riscv/riscv-protos.h (enum insn_type): New enum.
33539 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
33540 Tobias Burnus <tobias@codesourcery.com>
33542 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
33543 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
33545 (omp_get_attachment): Handle map clauses with 'present' modifier.
33546 (omp_group_base): Likewise.
33547 (gimplify_scan_omp_clauses): Reorder present maps to come first.
33548 Set GOVD flags for present defaultmaps.
33549 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
33550 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
33552 (lower_omp_target): Handle map clauses with 'present' modifier.
33553 Handle 'to' and 'from' clauses with 'present'.
33554 * tree-core.h (enum omp_clause_defaultmap_kind): Add
33555 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
33556 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
33557 'from' clauses with 'present' modifier. Handle present defaultmap.
33558 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
33560 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
33562 * config/rs6000/genfusion.pl: Delete some dead code.
33564 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
33566 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
33568 (gen_ld_cmpi_p10): ... this.
33570 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
33573 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
33574 duplicate expression.
33576 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33578 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
33579 Handle unsigned reduc_plus_scal_ builtins.
33580 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
33581 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
33582 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
33583 __builtin_aarch64_reduc_plus_scal_v2di.
33584 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
33586 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33588 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
33589 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
33590 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
33592 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33594 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
33595 (aarch64_shrn<mode>_insn_be): Delete.
33596 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
33597 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
33598 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
33599 (aarch64_rshrn<mode>_insn_le): Delete.
33600 (aarch64_rshrn<mode>_insn_be): Delete.
33601 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
33602 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
33604 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33606 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
33608 (aarch64_pars_overlap_p): Likewise.
33609 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
33610 Express in terms of UNSPEC_ADDV.
33611 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
33612 (*aarch64_<su>addlv<mode>_reduction): Define.
33613 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
33614 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
33615 (aarch64_pars_overlap_p): Likewise.
33616 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
33617 (VQUADW): New mode attribute.
33618 (VWIDE2X_S): Likewise.
33620 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
33621 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
33623 2023-06-06 Richard Biener <rguenther@suse.de>
33625 PR middle-end/110055
33626 * gimplify.cc (gimplify_target_expr): Do not emit
33627 CLOBBERs for variables which have static storage duration
33628 after gimplifying their initializers.
33630 2023-06-06 Richard Biener <rguenther@suse.de>
33632 PR tree-optimization/109143
33633 * tree-ssa-structalias.cc (solution_set_expand): Avoid
33634 one bitmap iteration and optimize bit range setting.
33636 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
33638 PR bootstrap/110120
33639 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
33640 XVECEXP, not XEXP, to access first item of a PARALLEL.
33642 2023-06-06 Pan Li <pan2.li@intel.com>
33644 * config/riscv/riscv-vector-builtins-types.def
33645 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
33646 (vfloat16mf2_t): Likewise.
33647 (vfloat16m1_t): Likewise.
33648 (vfloat16m2_t): Likewise.
33649 (vfloat16m4_t): Likewise.
33650 (vfloat16m8_t): Likewise.
33651 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
33652 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
33654 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
33656 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
33657 for cfi reg/mem machmode
33658 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
33660 2023-06-06 Li Xu <xuli1@eswincomputing.com>
33662 * config/riscv/vector-iterators.md:
33663 Fix 'REQUIREMENT' for machine_mode 'MODE'.
33664 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
33665 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
33666 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
33668 2023-06-06 Pan Li <pan2.li@intel.com>
33670 * config/riscv/vector-iterators.md: Fix typo in mode attr.
33672 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33673 Joel Hutton <joel.hutton@arm.com>
33675 * doc/generic.texi: Remove old tree codes.
33676 * expr.cc (expand_expr_real_2): Remove old tree code cases.
33677 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
33678 * optabs-tree.cc (optab_for_tree_code): Likewise.
33679 (supportable_half_widening_operation): Likewise.
33680 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
33681 * tree-inline.cc (estimate_operator_cost): Likewise.
33682 (op_symbol_code): Likewise.
33683 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
33684 (vect_analyze_data_ref_accesses): Likewise.
33685 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
33686 * cfgexpand.cc (expand_debug_expr): Likewise.
33687 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
33688 (supportable_widening_operation): Likewise.
33689 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
33691 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
33692 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
33693 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
33694 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
33695 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
33696 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
33697 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
33698 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
33700 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33701 Joel Hutton <joel.hutton@arm.com>
33702 Tamar Christina <tamar.christina@arm.com>
33704 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
33706 (vec_widen_<su>add_lo_<mode>): ... to this.
33707 (vec_widen_<su>addl_hi_<mode>): Rename this ...
33708 (vec_widen_<su>add_hi_<mode>): ... to this.
33709 (vec_widen_<su>subl_lo_<mode>): Rename this ...
33710 (vec_widen_<su>sub_lo_<mode>): ... to this.
33711 (vec_widen_<su>subl_hi_<mode>): Rename this ...
33712 (vec_widen_<su>sub_hi_<mode>): ...to this.
33713 * doc/generic.texi: Document new IFN codes.
33714 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
33715 (commutative_binary_fn_p): Add widen_plus fn's.
33716 (widening_fn_p): New function.
33717 (narrowing_fn_p): New function.
33718 (direct_internal_fn_optab): Change visibility.
33719 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
33720 internal_fn that expands into multiple internal_fns for widening.
33721 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
33722 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
33723 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
33724 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
33725 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
33726 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
33727 (lookup_hilo_internal_fn): Likewise.
33728 (widening_fn_p): Likewise.
33729 (Narrowing_fn_p): Likewise.
33730 * optabs.cc (commutative_optab_p): Add widening plus optabs.
33731 * optabs.def (OPTAB_D): Define widen add, sub optabs.
33732 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
33733 patterns with a hi/lo or even/odd split.
33734 (vect_recog_sad_pattern): Refactor to use new IFN codes.
33735 (vect_recog_widen_plus_pattern): Likewise.
33736 (vect_recog_widen_minus_pattern): Likewise.
33737 (vect_recog_average_pattern): Likewise.
33738 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
33740 (supportable_widening_operation): Likewise.
33741 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
33743 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
33744 Joel Hutton <joel.hutton@arm.com>
33746 * tree-vect-patterns.cc: Add include for gimple-iterator.
33747 (vect_recog_widen_op_pattern): Refactor to use code_helper.
33748 (vect_gimple_build): New function.
33749 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
33751 (vectorizable_call): Likewise.
33752 (vect_gen_widened_results_half): Likewise.
33753 (vect_create_vectorized_demotion_stmts): Likewise.
33754 (vect_create_vectorized_promotion_stmts): Likewise.
33755 (vect_create_half_widening_stmts): Likewise.
33756 (vectorizable_conversion): Likewise.
33757 (supportable_widening_operation): Likewise.
33758 (supportable_narrowing_operation): Likewise.
33759 * tree-vectorizer.h (supportable_widening_operation): Change
33760 prototype to use code_helper.
33761 (supportable_narrowing_operation): Likewise.
33762 (vect_gimple_build): New function prototype.
33763 * tree.h (code_helper::safe_as_tree_code): New function.
33764 (code_helper::safe_as_fn_code): New function.
33766 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
33768 * wide-int.cc (wi::bitreverse_large): New function implementing
33769 bit reversal of an integer.
33770 * wide-int.h (wi::bitreverse): New (template) function prototype.
33771 (bitreverse_large): Prototype helper function/implementation.
33772 (wi::bitreverse): New template wrapper around bitreverse_large.
33774 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
33776 * rtl.h (print_rtl_single): Change return type from int to void.
33777 (print_rtl_single_with_indent): Ditto.
33778 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
33779 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
33780 (rtx_writer::print_rtx_operand_code_0): Ditto.
33781 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
33782 (rtx_writer::print_rtx_operand_code_i): Ditto.
33783 (rtx_writer::print_rtx_operand_code_u): Ditto.
33784 (rtx_writer::print_rtx_operand): Ditto.
33785 (rtx_writer::print_rtx): Ditto.
33786 (rtx_writer::finish_directive): Ditto.
33787 (print_rtl_single): Change return type from int to void
33788 and adjust function body accordingly.
33789 (rtx_writer::print_rtl_single_with_indent): Ditto.
33791 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
33793 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
33794 (reg_class_subset_p): Ditto.
33795 * reginfo.cc (reg_classes_intersect_p): Ditto.
33796 (reg_class_subset_p): Ditto.
33798 2023-06-05 Pan Li <pan2.li@intel.com>
33800 * config/riscv/riscv-vector-builtins-types.def
33801 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
33802 (vfloat32m1_t): Ditto.
33803 (vfloat32m2_t): Ditto.
33804 (vfloat32m4_t): Ditto.
33805 (vfloat32m8_t): Ditto.
33806 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
33807 (vint16mf2_t): Ditto.
33808 (vint16m1_t): Ditto.
33809 (vint16m2_t): Ditto.
33810 (vint16m4_t): Ditto.
33811 (vint16m8_t): Ditto.
33812 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
33813 (vuint16mf2_t): Ditto.
33814 (vuint16m1_t): Ditto.
33815 (vuint16m2_t): Ditto.
33816 (vuint16m4_t): Ditto.
33817 (vuint16m8_t): Ditto.
33818 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
33819 (vint32m1_t): Ditto.
33820 (vint32m2_t): Ditto.
33821 (vint32m4_t): Ditto.
33822 (vint32m8_t): Ditto.
33823 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
33824 (vuint32m1_t): Ditto.
33825 (vuint32m2_t): Ditto.
33826 (vuint32m4_t): Ditto.
33827 (vuint32m8_t): Ditto.
33828 * config/riscv/vector-iterators.md: Add FP=16 support for V,
33829 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
33831 2023-06-05 Andrew Pinski <apinski@marvell.com>
33833 PR bootstrap/110085
33834 * Makefile.in (clean): Remove the removing of
33835 MULTILIB_DIR/MULTILIB_OPTIONS directories.
33837 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
33839 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
33841 * config/mips/mips.cc (speculation_barrier_libfunc): New static
33843 (mips_init_libfuncs): Initialize it.
33844 (mips_emit_speculation_barrier): New function.
33845 * config/mips/mips.md (speculation_barrier): Call
33846 mips_emit_speculation_barrier.
33848 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33850 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
33851 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
33852 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
33853 (rvv_builder::get_merged_repeating_sequence): Ditto.
33854 (rvv_builder::get_merge_scalar_mask): Ditto.
33855 (emit_scalar_move_insn): Ditto.
33856 (emit_vlmax_integer_move_insn): Ditto.
33857 (emit_nonvlmax_integer_move_insn): Ditto.
33858 (emit_vlmax_gather_insn): Ditto.
33859 (emit_vlmax_masked_gather_mu_insn): Ditto.
33860 (get_repeating_sequence_dup_machine_mode): Ditto.
33862 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33864 * config/riscv/autovec.md: Split arguments.
33865 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
33866 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
33868 2023-06-04 Andrew Pinski <apinski@marvell.com>
33870 * expr.cc (do_store_flag): Improve for single bit testing
33871 not against zero but against that single bit.
33873 2023-06-04 Andrew Pinski <apinski@marvell.com>
33875 * expr.cc (do_store_flag): Extend the one bit checking case
33876 to handle the case where we don't have an and but rather still
33877 one bit is known to be non-zero.
33879 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
33881 * config/h8300/constraints.md (Zz): Make this a normal
33883 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
33884 * config/h8300/logical.md (H8/SX bit patterns): Remove.
33886 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33888 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
33889 New insn_and_split patterns.
33891 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33894 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
33895 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
33896 (@vlmul_extx4<mode>): Ditto.
33897 (@vlmul_extx8<mode>): Ditto.
33898 (@vlmul_extx16<mode>): Ditto.
33899 (@vlmul_extx32<mode>): Ditto.
33900 (@vlmul_extx64<mode>): Ditto.
33901 (*vlmul_extx2<mode>): Ditto.
33902 (*vlmul_extx4<mode>): Ditto.
33903 (*vlmul_extx8<mode>): Ditto.
33904 (*vlmul_extx16<mode>): Ditto.
33905 (*vlmul_extx32<mode>): Ditto.
33906 (*vlmul_extx64<mode>): Ditto.
33908 2023-06-04 Pan Li <pan2.li@intel.com>
33910 * config/riscv/riscv-vector-builtins-types.def
33911 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
33912 (vfloat32m1_t): Likewise.
33913 (vfloat32m2_t): Likewise.
33914 (vfloat32m4_t): Likewise.
33915 (vfloat32m8_t): Likewise.
33916 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
33917 * config/riscv/vector-iterators.md: Add single to half machine
33920 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33922 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
33923 (*n<optab><mode>): Ditto.
33924 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
33925 (*n<optab><mode>): Ditto.
33926 * config/riscv/vector.md: Ditto.
33928 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
33931 * config/i386/i386-features.cc (scalar_chain::convert_compare):
33932 Update or delete REG_EQUAL notes, converting CONST_INT and
33933 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
33935 2023-06-04 Jason Merrill <jason@redhat.com>
33938 * tree-eh.cc (lower_resx): Pass the exception pointer to the
33940 * except.h: Tweak comment.
33942 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
33944 * postreload.cc (move2add_use_add2_insn): Handle
33945 trivial single_sets. Rename variable PAT to SET.
33946 (move2add_use_add3_insn, reload_cse_move2add): Similar.
33948 2023-06-04 Pan Li <pan2.li@intel.com>
33950 * config/riscv/riscv-vector-builtins-types.def
33951 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
33952 (vfloat16mf2_t): Likewise.
33953 (vfloat16m1_t): Likewise.
33954 (vfloat16m2_t): Likewise.
33955 (vfloat16m4_t): Likewise.
33956 (vfloat16m8_t): Likewise.
33957 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
33958 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
33959 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
33960 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
33963 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
33965 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
33968 2023-06-03 Die Li <lidie@eswincomputing.com>
33970 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
33972 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33974 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
33976 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33978 * config/riscv/vector.md: Add vector-opt.md.
33979 * config/riscv/autovec-opt.md: New file.
33981 2023-06-03 liuhongt <hongtao.liu@intel.com>
33983 PR tree-optimization/110067
33984 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
33985 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
33987 2023-06-03 liuhongt <hongtao.liu@intel.com>
33990 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
33991 (truncv2si<mode>2): Ditto.
33993 2023-06-02 Andrew Pinski <apinski@marvell.com>
33995 PR rtl-optimization/102733
33996 * dse.cc (store_info): Add addrspace field.
33997 (record_store): Record the address space
33998 and check to make sure they are the same.
34000 2023-06-02 Andrew Pinski <apinski@marvell.com>
34002 PR rtl-optimization/110042
34003 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
34004 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
34006 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
34009 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
34010 Make sure that we do not have a cap on field alignment before altering
34011 the struct layout based on the type alignment of the first entry.
34013 2023-06-02 David Faust <david.faust@oracle.com>
34016 * btfout.cc (btf_absolute_func_id): New function.
34017 (btf_asm_func_type): Call it here. Change index parameter from
34018 size_t to ctf_id_t. Use PRIu64 formatter.
34020 2023-06-02 Alex Coplan <alex.coplan@arm.com>
34022 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
34023 (btf_asm_datasec_type): Likewise.
34025 2023-06-02 Carl Love <cel@us.ibm.com>
34027 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
34028 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
34030 2023-06-02 Jason Merrill <jason@redhat.com>
34034 * tree.h (DECL_MERGEABLE): New.
34035 * tree-core.h (struct tree_decl_common): Mention it.
34036 * gimplify.cc (gimplify_init_constructor): Check it.
34037 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
34038 * varasm.cc (categorize_decl_for_section): Likewise.
34040 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
34042 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
34043 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
34044 (stack_regs_mentioned_p): Change return type from int to bool
34045 and adjust function body accordingly.
34046 (stack_regs_mentioned): Ditto.
34047 (check_asm_stack_operands): Ditto. Change "malformed_asm"
34049 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
34050 (swap_rtx_condition_1): Change return type from int to bool
34051 and adjust function body accordingly. Change "r" variable to bool.
34052 (swap_rtx_condition): Change return type from int to bool
34053 and adjust function body accordingly.
34054 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
34055 (subst_stack_regs): Ditto.
34056 (convert_regs_entry): Change return type from int to bool and adjust
34057 function body accordingly. Change "inserted" variable to bool.
34058 (convert_regs_1): Recode handling of control_flow_insn_deleted.
34059 (convert_regs_2): Recode handling of cfg_altered.
34060 (convert_regs): Ditto. Change "inserted" variable to bool.
34062 2023-06-02 Jason Merrill <jason@redhat.com>
34065 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
34066 (initializer_constant_valid_p_1): Compare float precision.
34068 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
34070 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
34073 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34075 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
34076 (vect_set_loop_condition_partial_vectors): Ditto.
34078 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
34081 * config/avr/avr.md: Add an RTL peephole to optimize operations on
34082 non-LD_REGS after a move from LD_REGS.
34083 (piaop): New code iterator.
34085 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
34088 * doc/install.texi: Document (optional) Perl usage for parallel
34089 testing of libgomp.
34091 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
34094 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
34097 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34098 KuanLin Chen <best124612@gmail.com>
34100 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
34101 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
34103 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34105 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
34107 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34109 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
34111 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34113 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
34115 (DEF_RVV_FRM_ENUM): Ditto.
34117 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34119 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
34120 intrinsic API expander
34121 * config/riscv/vector.md
34122 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
34123 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
34124 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
34126 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34128 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
34129 * config/riscv/predicates.md (vector_perm_operand): New predicate.
34130 * config/riscv/riscv-protos.h (enum insn_type): New enum.
34131 (expand_vec_perm): New function.
34132 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
34133 (gen_const_vector_dup): Ditto.
34134 (emit_vlmax_gather_insn): Ditto.
34135 (emit_vlmax_masked_gather_mu_insn): Ditto.
34136 (expand_vec_perm): Ditto.
34138 2023-06-01 Jason Merrill <jason@redhat.com>
34140 * doc/invoke.texi (-Wpedantic): Improve clarity.
34142 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
34144 * rtl.h (exp_equiv_p): Change return type from int to bool.
34145 * cse.cc (mention_regs): Change return type from int to bool
34146 and adjust function body accordingly.
34147 (exp_equiv_p): Ditto.
34148 (insert_regs): Ditto. Change "modified" function argument to bool
34149 and update usage accordingly.
34150 (record_jump_cond): Remove always zero "reversed_nonequality"
34151 function argument and update usage accordingly.
34152 (fold_rtx): Change "changed" variable to bool.
34153 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
34154 (is_dead_reg): Change return type from int to bool.
34156 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34158 * config/xtensa/xtensa.md (adddi3, subdi3):
34159 New RTL generation patterns implemented according to the instruc-
34160 tion idioms described in the Xtensa ISA reference manual (p. 600).
34162 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
34163 Uros Bizjak <ubizjak@gmail.com>
34166 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
34167 CODE_for_sse4_1_ptestzv2di.
34168 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
34169 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
34170 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
34171 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
34172 when expanding UNSPEC_PTEST to compare against zero.
34173 * config/i386/i386-features.cc (scalar_chain::convert_compare):
34174 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
34175 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
34176 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
34177 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
34178 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
34179 check for suitable matching modes for the UNSPEC_PTEST pattern.
34180 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
34181 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
34182 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
34183 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
34184 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
34185 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
34186 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
34188 (*ptest<mode>_and): Specify CCZ to only perform this optimization
34189 when only the Z flag is required.
34191 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
34194 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
34196 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34198 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
34199 Add =r,m and =r,m alternatives.
34200 (load_pair<DREG:mode><DREG2:mode>): Likewise.
34201 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
34203 2023-06-01 Pan Li <pan2.li@intel.com>
34205 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
34207 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
34208 (main): Disable FP16 tuple.
34209 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
34210 (TARGET_VECTOR_ELEN_FP_16): Ditto.
34211 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
34213 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
34214 (vfloat16mf2_t): Ditto.
34215 (vfloat16m1_t): Ditto.
34216 (vfloat16m2_t): Ditto.
34217 (vfloat16m4_t): Ditto.
34218 (vfloat16m8_t): Ditto.
34219 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
34221 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
34222 machine mode based on TARGET_VECTOR_ELEN_FP_16.
34224 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34226 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
34227 (DEF_RVV_FRM_ENUM): New macro.
34228 (handle_pragma_vector): Add FRM enum
34229 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
34236 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
34237 Richard Sandiford <richard.sandiford@arm.com>
34239 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
34240 Update call to wi::bswap.
34241 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
34242 Update call to wi::bswap.
34243 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
34244 Update calls to wi::bswap.
34245 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
34246 (wi::bswap_large): New function, with revised API.
34247 * wide-int.h (wi::bswap): New (template) function prototype.
34248 (wide_int_storage::bswap): Remove method.
34249 (sext_large, zext_large): Consistent indentation/line wrapping.
34250 (bswap_large): Prototype helper function containing implementation.
34251 (wi::bswap): New template wrapper around bswap_large.
34253 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34256 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
34257 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
34258 (usdot_prod<vsi2qi>): Rename to...
34259 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
34260 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
34261 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
34262 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
34263 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
34264 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
34265 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
34268 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34271 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
34272 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
34273 (aarch64_sq<r>dmulh_n<mode>): Rename to...
34274 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
34275 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
34276 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
34277 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
34278 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
34279 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
34280 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
34281 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
34282 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
34283 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
34284 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
34286 2023-05-31 David Faust <david.faust@oracle.com>
34288 * btfout.cc (btf_kind_names): New.
34289 (btf_kind_name): New.
34290 (btf_absolute_var_id): New utility function.
34291 (btf_relative_var_id): Likewise.
34292 (btf_relative_func_id): Likewise.
34293 (btf_absolute_datasec_id): Likewise.
34294 (btf_asm_type_ref): New.
34295 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
34296 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
34297 (btf_asm_varent): Likewise.
34298 (btf_asm_func_arg): Likewise.
34299 (btf_asm_datasec_entry): Likewise.
34300 (btf_asm_datasec_type): Likewise.
34301 (btf_asm_func_type): Likewise. Add index parameter.
34302 (btf_asm_enum_const): Likewise.
34303 (btf_asm_sou_member): Likewise.
34304 (output_btf_vars): Update btf_asm_* call accordingly.
34305 (output_asm_btf_sou_fields): Likewise.
34306 (output_asm_btf_enum_list): Likewise.
34307 (output_asm_btf_func_args_list): Likewise.
34308 (output_asm_btf_vlen_bytes): Likewise.
34309 (output_btf_func_types): Add ctf_container_ref parameter.
34310 Pass it to btf_asm_func_type.
34311 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
34312 (btf_output): Update output_btf_func_types call similarly.
34314 2023-05-31 David Faust <david.faust@oracle.com>
34316 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
34317 and BTF_KIND_FWD which do not use the size/type field at all.
34319 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
34321 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
34322 (active_insn_p): Ditto.
34323 (in_sequence_p): Ditto.
34324 (unshare_all_rtl): Change return type from int to void.
34325 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
34326 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
34327 and adjust function body accordingly.
34328 (mem_expr_equal_p): Ditto.
34329 (unshare_all_rtl): Change return type from int to void
34330 and adjust function body accordingly.
34331 (verify_rtx_sharing): Remove unneeded return.
34332 (active_insn_p): Change return type from int to bool
34333 and adjust function body accordingly.
34334 (in_sequence_p): Ditto.
34336 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
34338 * rtl.h (true_dependence): Change return type from int to bool.
34339 (canon_true_dependence): Ditto.
34340 (read_dependence): Ditto.
34341 (anti_dependence): Ditto.
34342 (canon_anti_dependence): Ditto.
34343 (output_dependence): Ditto.
34344 (canon_output_dependence): Ditto.
34345 (may_alias_p): Ditto.
34346 * alias.h (alias_sets_conflict_p): Ditto.
34347 (alias_sets_must_conflict_p): Ditto.
34348 (objects_must_conflict_p): Ditto.
34349 (nonoverlapping_memrefs_p): Ditto.
34350 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
34351 (record_set): Ditto.
34352 (base_alias_check): Ditto.
34353 (find_base_value): Ditto.
34354 (mems_in_disjoint_alias_sets_p): Ditto.
34355 (get_alias_set_entry): Ditto.
34356 (decl_for_component_ref): Ditto.
34357 (write_dependence_p): Ditto.
34358 (memory_modified_1): Ditto.
34359 (mems_in_disjoint_alias_set_p): Change return type from int to bool
34360 and adjust function body accordingly.
34361 (alias_sets_conflict_p): Ditto.
34362 (alias_sets_must_conflict_p): Ditto.
34363 (objects_must_conflict_p): Ditto.
34364 (rtx_equal_for_memref_p): Ditto.
34365 (base_alias_check): Ditto.
34366 (read_dependence): Ditto.
34367 (nonoverlapping_memrefs_p): Ditto.
34368 (true_dependence_1): Ditto.
34369 (true_dependence): Ditto.
34370 (canon_true_dependence): Ditto.
34371 (write_dependence_p): Ditto.
34372 (anti_dependence): Ditto.
34373 (canon_anti_dependence): Ditto.
34374 (output_dependence): Ditto.
34375 (canon_output_dependence): Ditto.
34376 (may_alias_p): Ditto.
34377 (init_alias_analysis): Change "changed" variable to bool.
34379 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34381 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
34382 expand into define_insn_and_split.
34384 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34386 * config/riscv/vector.md: Remove FRM.
34388 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34390 * config/riscv/vector.md: Remove FRM.
34392 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34394 * config/riscv/vector.md: Remove FRM.
34396 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
34399 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
34402 2023-05-31 Richard Biener <rguenther@suse.de>
34405 PR tree-optimization/109143
34406 * tree-ssa-structalias.cc (struct topo_info): Remove.
34407 (init_topo_info): Likewise.
34408 (free_topo_info): Likewise.
34409 (compute_topo_order): Simplify API, put the component
34410 with ESCAPED last so it's processed first.
34411 (topo_visit): Adjust.
34412 (solve_graph): Likewise.
34414 2023-05-31 Richard Biener <rguenther@suse.de>
34416 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
34418 (add_graph_edge): Count redundant edges we avoid to create.
34419 (dump_sa_stats): Dump them.
34420 (ipa_pta_execute): Do not dump generating constraints when
34421 we are not dumping them.
34423 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34425 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
34426 output template to avoid explicit switch on which_alternative.
34427 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
34428 (and<mode>3): Likewise.
34429 (ior<mode>3): Likewise.
34430 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
34432 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34434 * config/xtensa/predicates.md (xtensa_bit_join_operator):
34436 * config/xtensa/xtensa.md (ior_op): Remove.
34437 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
34438 insn_and_split pattern of the same name to express and capture
34439 the bit-combining operation with both sides swapped.
34440 In addition, replace use of code iterator with new operator
34442 (*shlrd_const, *shlrd_per_byte):
34443 Likewise regarding the code iterator.
34445 2023-05-31 Cui, Lili <lili.cui@intel.com>
34447 PR tree-optimization/110038
34448 * params.opt: Add a limit on tree-reassoc-width.
34449 * tree-ssa-reassoc.cc
34450 (rewrite_expr_tree_parallel): Add width limit.
34452 2023-05-31 Pan Li <pan2.li@intel.com>
34454 * common/config/riscv/riscv-common.cc:
34455 (riscv_implied_info): Add zvfh item.
34456 (riscv_ext_version_table): Ditto.
34457 (riscv_ext_flag_table): Ditto.
34458 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
34459 (TARGET_ZVFH): Ditto.
34461 2023-05-30 liuhongt <hongtao.liu@intel.com>
34463 PR tree-optimization/108804
34464 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
34465 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
34466 Add new parameter narrow_src_p.
34467 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
34468 vectorization by truncating to lower precision.
34469 * tree-vectorizer.h (vect_get_range_info): New declare.
34471 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
34473 * lra-int.h (lra_update_sp_offset): Add the prototype.
34474 * lra.cc (setup_sp_offset): Change the return type. Use
34475 lra_update_sp_offset.
34476 * lra-eliminations.cc (lra_update_sp_offset): New function.
34477 (lra_process_new_insns): Push the current insn to reprocess if the
34478 input reload changes sp offset.
34480 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34483 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
34484 Fix misleading identation.
34486 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34488 * rtl.h (comparison_dominates_p): Change return type from int to bool.
34489 (condjump_p): Ditto.
34490 (any_condjump_p): Ditto.
34491 (any_uncondjump_p): Ditto.
34492 (simplejump_p): Ditto.
34493 (returnjump_p): Ditto.
34494 (eh_returnjump_p): Ditto.
34495 (onlyjump_p): Ditto.
34496 (invert_jump_1): Ditto.
34497 (invert_jump): Ditto.
34498 (rtx_renumbered_equal_p): Ditto.
34499 (redirect_jump_1): Ditto.
34500 (redirect_jump): Ditto.
34501 (condjump_in_parallel_p): Ditto.
34502 * jump.cc (invert_exp_1): Adjust forward declaration.
34503 (comparison_dominates_p): Change return type from int to bool
34504 and adjust function body accordingly.
34505 (simplejump_p): Ditto.
34506 (condjump_p): Ditto.
34507 (condjump_in_parallel_p): Ditto.
34508 (any_uncondjump_p): Ditto.
34509 (any_condjump_p): Ditto.
34510 (returnjump_p): Ditto.
34511 (eh_returnjump_p): Ditto.
34512 (onlyjump_p): Ditto.
34513 (redirect_jump_1): Ditto.
34514 (redirect_jump): Ditto.
34515 (invert_exp_1): Ditto.
34516 (invert_jump_1): Ditto.
34517 (invert_jump): Ditto.
34518 (rtx_renumbered_equal_p): Ditto.
34520 2023-05-30 Andrew Pinski <apinski@marvell.com>
34522 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
34523 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
34524 Add ne as a possible cmp.
34525 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
34527 2023-05-30 Andrew Pinski <apinski@marvell.com>
34529 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
34532 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
34534 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
34535 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
34536 (and (extend X) C) as (zero_extend (and X C)), to also optimize
34537 modes wider than HOST_WIDE_INT.
34539 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
34542 * simplify-rtx.cc (simplify_const_relational_operation): Return
34543 early if we have a MODE_CC comparison that isn't a COMPARE against
34546 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
34548 * config/riscv/riscv.cc (riscv_const_insns): Allow
34549 const_vec_duplicates.
34551 2023-05-30 liuhongt <hongtao.liu@intel.com>
34553 PR middle-end/108938
34554 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
34555 function, cut from original find_bswap_or_nop function.
34556 (find_bswap_or_nop): Add a new parameter, detect bswap +
34557 rotate and save rotate result in the new parameter.
34558 (bswap_replace): Add a new parameter to indicate rotate and
34559 generate rotate stmt if needed.
34560 (maybe_optimize_vector_constructor): Adjust for new rotate
34561 parameter in the upper 2 functions.
34562 (pass_optimize_bswap::execute): Ditto.
34563 (imm_store_chain_info::output_merged_store): Ditto.
34565 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34567 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
34568 (aarch64_<su>adalp<mode>): New define_expand.
34569 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
34570 (aarch64_<su>addlp<mode>): Convert to define_expand.
34571 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
34572 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
34574 (USADDLP): Likewise.
34575 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
34577 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34579 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
34580 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
34581 srhadd, urhadd builtin codes for standard optab ones.
34582 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
34583 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
34585 (<u>avg<mode>3_ceil): Rename to...
34586 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
34588 (aarch64_<su>hsub<mode>): New define_expand.
34589 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
34590 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
34591 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
34593 2023-05-30 Andreas Schwab <schwab@suse.de>
34596 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
34597 match libsanitizer.
34599 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34601 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
34602 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
34604 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
34605 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
34606 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
34607 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
34608 (aarch64_<sra_op>sra_n<mode>): New define_expand.
34609 (aarch64_<sra_op>rsra_n<mode>): Likewise.
34610 (aarch64_<sur>sra_n<mode>): Rename to...
34611 (aarch64_<sur>sra_ndi): ... This.
34612 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
34613 any_target_p argument.
34614 (aarch64_extract_vec_duplicate_wide_int): Define.
34615 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
34616 (aarch64_const_vec_rnd_cst_p): Likewise.
34617 (aarch64_vector_mode_supported_any_target_p): Likewise.
34618 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
34619 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
34620 (VSRA): Adjust for the above.
34622 (V2XWIDE): New mode_attr.
34623 (vec_or_offset): Likewise.
34624 (SHIFTEXTEND): Likewise.
34625 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
34627 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
34628 clarify that it applies to current target options.
34629 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
34630 * doc/tm.texi.in: Regenerate.
34631 * stor-layout.cc (mode_for_vector): Check
34632 vector_mode_supported_any_target_p when iterating through vector modes.
34633 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
34634 clarify that it applies to current target options.
34635 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
34637 2023-05-30 Lili Cui <lili.cui@intel.com>
34639 PR tree-optimization/98350
34640 * tree-ssa-reassoc.cc
34641 (rewrite_expr_tree_parallel): Rewrite this function.
34642 (rank_ops_for_fma): New.
34643 (reassociate_bb): Handle new function.
34645 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
34647 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
34648 (rtx_unstable_p): Ditto.
34649 (reg_mentioned_p): Ditto.
34650 (reg_referenced_p): Ditto.
34651 (reg_used_between_p): Ditto.
34652 (reg_set_between_p): Ditto.
34653 (modified_between_p): Ditto.
34654 (no_labels_between_p): Ditto.
34655 (modified_in_p): Ditto.
34656 (reg_set_p): Ditto.
34657 (multiple_sets): Ditto.
34658 (set_noop_p): Ditto.
34659 (noop_move_p): Ditto.
34660 (reg_overlap_mentioned_p): Ditto.
34661 (dead_or_set_p): Ditto.
34662 (dead_or_set_regno_p): Ditto.
34663 (find_reg_fusage): Ditto.
34664 (find_regno_fusage): Ditto.
34665 (side_effects_p): Ditto.
34666 (volatile_refs_p): Ditto.
34667 (volatile_insn_p): Ditto.
34668 (may_trap_p_1): Ditto.
34669 (may_trap_p): Ditto.
34670 (may_trap_or_fault_p): Ditto.
34671 (computed_jump_p): Ditto.
34672 (auto_inc_p): Ditto.
34673 (loc_mentioned_in_p): Ditto.
34674 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
34675 (rtx_unstable_p): Change return type from int to bool
34676 and adjust function body accordingly.
34677 (rtx_addr_can_trap_p): Ditto.
34678 (reg_mentioned_p): Ditto.
34679 (no_labels_between_p): Ditto.
34680 (reg_used_between_p): Ditto.
34681 (reg_referenced_p): Ditto.
34682 (reg_set_between_p): Ditto.
34683 (reg_set_p): Ditto.
34684 (modified_between_p): Ditto.
34685 (modified_in_p): Ditto.
34686 (multiple_sets): Ditto.
34687 (set_noop_p): Ditto.
34688 (noop_move_p): Ditto.
34689 (reg_overlap_mentioned_p): Ditto.
34690 (dead_or_set_p): Ditto.
34691 (dead_or_set_regno_p): Ditto.
34692 (find_reg_fusage): Ditto.
34693 (find_regno_fusage): Ditto.
34694 (remove_node_from_insn_list): Ditto.
34695 (volatile_insn_p): Ditto.
34696 (volatile_refs_p): Ditto.
34697 (side_effects_p): Ditto.
34698 (may_trap_p_1): Ditto.
34699 (may_trap_p): Ditto.
34700 (may_trap_or_fault_p): Ditto.
34701 (computed_jump_p): Ditto.
34702 (auto_inc_p): Ditto.
34703 (loc_mentioned_in_p): Ditto.
34704 * combine.cc (can_combine_p): Update indirect function.
34706 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34708 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
34709 * config/riscv/iterators.md: New attribute.
34710 * config/riscv/vector-iterators.md: New attribute.
34712 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
34714 * config/riscv/riscv.md: Fix signed and unsigned comparison
34717 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34719 * config/riscv/autovec.md (fnma<mode>4): New pattern.
34720 (*fnma<mode>): Ditto.
34722 2023-05-29 Die Li <lidie@eswincomputing.com>
34724 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
34726 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
34727 process for TARGET_XTHEADCONDMOV
34729 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
34732 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
34733 TARGET_AVX512BW to generate truncv16hiv16qi2.
34735 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
34737 * config/riscv/riscv.md (and<mode>3): New expander.
34738 (*and<mode>3) New pattern.
34739 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
34742 2023-05-29 Pan Li <pan2.li@intel.com>
34744 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
34745 comments and rename local variables.
34746 (emit_nonvlmax_insn): Diito.
34747 (emit_vlmax_merge_insn): Ditto.
34748 (emit_vlmax_cmp_insn): Ditto.
34749 (emit_vlmax_cmp_mu_insn): Ditto.
34750 (emit_scalar_move_insn): Ditto.
34752 2023-05-29 Pan Li <pan2.li@intel.com>
34754 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
34756 (emit_nonvlmax_insn): Ditto.
34757 (emit_vlmax_merge_insn): Ditto.
34758 (emit_vlmax_cmp_insn): Ditto.
34759 (emit_vlmax_cmp_mu_insn): Ditto.
34760 (expand_vec_series): Ditto.
34762 2023-05-29 Pan Li <pan2.li@intel.com>
34764 * config/riscv/riscv-protos.h (enum insn_type): New type.
34765 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
34766 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
34768 (rvv_builder::get_merged_repeating_sequence): Ditto.
34769 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
34770 to evaluate the optimization cost.
34771 (rvv_builder::get_merge_scalar_mask): New function to get the merge
34773 (emit_scalar_move_insn): New function to emit vmv.s.x.
34774 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
34775 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
34777 (get_repeating_sequence_dup_machine_mode): New function to get the dup
34779 (expand_vector_init_merge_repeating_sequence): New function to perform
34781 (expand_vec_init): Add this vector init optimization.
34782 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
34784 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
34786 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
34787 put onto the increment when it is inserted after the position.
34789 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
34791 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
34794 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34796 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
34798 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34800 * config/riscv/autovec.md (fma<mode>4): New pattern.
34801 (*fma<mode>): Ditto.
34802 * config/riscv/riscv-protos.h (enum insn_type): New enum.
34803 (emit_vlmax_ternary_insn): New function.
34804 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
34806 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34808 * config/riscv/vector.md: Fix vimuladd instruction bug.
34810 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34812 * config/riscv/riscv.cc (global_state_unknown_p): New function.
34813 (riscv_mode_after): Fix incorrect VXM.
34815 2023-05-29 Pan Li <pan2.li@intel.com>
34817 * common/config/riscv/riscv-common.cc:
34818 (riscv_implied_info): Add zvfhmin item.
34819 (riscv_ext_version_table): Ditto.
34820 (riscv_ext_flag_table): Ditto.
34821 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
34822 (TARGET_ZFHMIN): Align indent.
34823 (TARGET_ZFH): Ditto.
34824 (TARGET_ZVFHMIN): New macro.
34826 2023-05-27 liuhongt <hongtao.liu@intel.com>
34829 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
34830 to VI_AVX2 to cover more modes.
34832 2023-05-27 liuhongt <hongtao.liu@intel.com>
34834 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
34835 Remove ATOM and ICELAKE(and later) core processors.
34837 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
34839 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
34841 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
34843 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
34846 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
34847 Juzhe Zhong <juzhe.zhong@rivai.ai>
34849 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
34851 (<optab><v_quad_trunc><mode>2): Dito.
34852 (<optab><v_oct_trunc><mode>2): Dito.
34853 (trunc<mode><v_double_trunc>2): Dito.
34854 (trunc<mode><v_quad_trunc>2): Dito.
34855 (trunc<mode><v_oct_trunc>2): Dito.
34856 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
34857 (autovectorize_vector_modes): Define.
34858 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
34860 (autovectorize_vector_modes): Implement hook.
34861 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
34862 Implement target hook.
34863 (riscv_vectorize_related_mode): Implement target hook.
34864 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
34865 (TARGET_VECTORIZE_RELATED_MODE): Define.
34866 * config/riscv/vector-iterators.md: Add lowercase versions of
34867 mode_attr iterators.
34869 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
34870 Tobias Burnus <tobias@codesourcery.com>
34872 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
34873 (ASM_SPEC): Use XNACKOPT.
34874 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
34875 (enum hsaco_attr_type): ... this, and generalize the names.
34876 (TARGET_XNACK): New macro.
34877 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
34879 (output_file_start): Update xnack handling.
34880 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
34881 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
34882 (sram_ecc_type): Rename to ...
34883 (hsaco_attr_type: ... this.)
34884 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
34885 (TEST_XNACK): Delete.
34886 (TEST_XNACK_ANY): New macro.
34887 (TEST_XNACK_ON): New macro.
34888 (main): Support the new -mxnack=on/off/any syntax.
34889 * doc/invoke.texi (-mxnack): Update for new syntax.
34891 2023-05-26 Andrew Pinski <apinski@marvell.com>
34893 * genmatch.cc (emit_debug_printf): New function.
34894 (dt_simplify::gen_1): Emit printf into the code
34895 before the `return true` or returning the folded result
34896 instead of emitting it always.
34898 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34900 * config/xtensa/xtensa-protos.h
34901 (xtensa_expand_block_set_unrolled_loop,
34902 xtensa_expand_block_set_small_loop): Remove.
34903 (xtensa_expand_block_set): New prototype.
34904 * config/xtensa/xtensa.cc
34905 (xtensa_expand_block_set_libcall): New subfunction.
34906 (xtensa_expand_block_set_unrolled_loop,
34907 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
34908 (xtensa_expand_block_set): New function that calls the above
34910 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
34911 xtensa_expand_block_set().
34913 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34915 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
34917 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
34919 * config/xtensa/constraints.md (O):
34920 Change to use the above function.
34921 * config/xtensa/xtensa.md (*subsi3_from_const):
34922 New insn_and_split pattern.
34924 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34926 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
34927 Retract excessive line folding, and correct the value of
34928 the "length" insn attribute related to TARGET_DENSITY.
34929 (*extzvsi-1bit_addsubx): Ditto.
34931 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
34933 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
34934 Do not disable call to ix86_expand_vecop_qihi2.
34936 2023-05-26 liuhongt <hongtao.liu@intel.com>
34940 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
34941 calculation when !hard_regno_mode_ok for GENERAL_REGS and
34942 mode, otherwise still use GENERAL_REGS.
34944 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34946 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
34947 explict VL and drop VL in ops.
34949 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
34951 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
34952 in different BB blocks.
34954 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
34956 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
34957 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
34958 instructions when available. Emulate truncation via
34959 ix86_expand_vec_perm_const_1 when native truncate insn
34961 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
34962 when available. Trivially rename some variables.
34963 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
34964 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
34965 calculation of V*QImode emulations to account for generation of
34966 2x-wider mode instructions.
34967 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
34968 emulations to account for generation of 2x-wider mode instructions.
34970 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
34973 * config/avr/avr.cc (avr_can_inline_p): New static function.
34974 (TARGET_CAN_INLINE_P): Define to that function.
34976 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
34979 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
34980 Handle any bit position and use mode QISI.
34981 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
34982 of 2 insns for bit-transfer of respective style.
34984 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
34986 * config/arm/iterators.md (MVE_6): Remove.
34987 * config/arm/mve.md: Replace MVE_6 with MVE_5.
34989 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34990 Richard Sandiford <richard.sandiford@arm.com>
34992 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
34994 (vect_set_loop_controls_directly): Add decrement IV support.
34995 (vect_set_loop_condition_partial_vectors): Ditto.
34996 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
34998 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
35001 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35004 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
35005 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
35006 Fix canonicalization of PLUS operands.
35007 (aarch64_fcmla<rot><mode>): Rename to...
35008 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
35009 Fix canonicalization of PLUS operands.
35010 (aarch64_fcmla_lane<rot><mode>): Rename to...
35011 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
35012 Fix canonicalization of PLUS operands.
35013 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
35014 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
35015 Fix canonicalization of PLUS operands.
35016 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
35018 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
35020 * config/arm/arm.md (rbitsi2): Rename to...
35021 (arm_rbit): ... This.
35022 (ctzsi2): Adjust for the above.
35023 (arm_rev16si2): Convert to define_expand.
35024 (arm_rev16si2_alt1): New pattern.
35025 (arm_rev16si2_alt): Rename to...
35026 (*arm_rev16si2_alt2): ... This.
35027 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
35028 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
35029 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
35030 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
35032 2023-05-25 Alex Coplan <alex.coplan@arm.com>
35035 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
35037 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
35038 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
35039 DFmode as an rvalue.
35041 2023-05-25 Richard Biener <rguenther@suse.de>
35044 * tree-vect-stmts.cc (vectorizable_condition): For
35045 embedded comparisons also handle the case when the target
35046 only provides vec_cmp and vcond_mask.
35048 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
35050 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
35053 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
35055 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
35056 (seq_cost_ignoring_scalar_moves): Likewise.
35057 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
35059 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35061 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
35062 (vcage_f32): Likewise.
35063 (vcages_f32): Likewise.
35064 (vcageq_f32): Likewise.
35065 (vcaged_f64): Likewise.
35066 (vcageq_f64): Likewise.
35067 (vcagts_f32): Likewise.
35068 (vcagt_f32): Likewise.
35069 (vcagt_f64): Likewise.
35070 (vcagtq_f32): Likewise.
35071 (vcagtd_f64): Likewise.
35072 (vcagtq_f64): Likewise.
35073 (vcale_f32): Likewise.
35074 (vcale_f64): Likewise.
35075 (vcaled_f64): Likewise.
35076 (vcales_f32): Likewise.
35077 (vcaleq_f32): Likewise.
35078 (vcaleq_f64): Likewise.
35079 (vcalt_f32): Likewise.
35080 (vcalt_f64): Likewise.
35081 (vcaltd_f64): Likewise.
35082 (vcaltq_f32): Likewise.
35083 (vcaltq_f64): Likewise.
35084 (vcalts_f32): Likewise.
35086 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
35090 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
35091 int to const int or const int to const unsigned int.
35092 (_mm512_mask_srli_epi16): Ditto.
35093 (_mm512_slli_epi16): Ditto.
35094 (_mm512_mask_slli_epi16): Ditto.
35095 (_mm512_maskz_slli_epi16): Ditto.
35096 (_mm512_srai_epi16): Ditto.
35097 (_mm512_mask_srai_epi16): Ditto.
35098 (_mm512_maskz_srai_epi16): Ditto.
35099 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
35100 (_mm512_mask_slli_epi64): Ditto.
35101 (_mm512_maskz_slli_epi64): Ditto.
35102 (_mm512_srli_epi64): Ditto.
35103 (_mm512_mask_srli_epi64): Ditto.
35104 (_mm512_maskz_srli_epi64): Ditto.
35105 (_mm512_srai_epi64): Ditto.
35106 (_mm512_mask_srai_epi64): Ditto.
35107 (_mm512_maskz_srai_epi64): Ditto.
35108 (_mm512_slli_epi32): Ditto.
35109 (_mm512_mask_slli_epi32): Ditto.
35110 (_mm512_maskz_slli_epi32): Ditto.
35111 (_mm512_srli_epi32): Ditto.
35112 (_mm512_mask_srli_epi32): Ditto.
35113 (_mm512_maskz_srli_epi32): Ditto.
35114 (_mm512_srai_epi32): Ditto.
35115 (_mm512_mask_srai_epi32): Ditto.
35116 (_mm512_maskz_srai_epi32): Ditto.
35117 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
35118 (_mm256_maskz_srai_epi16): Ditto.
35119 (_mm_mask_srai_epi16): Ditto.
35120 (_mm_maskz_srai_epi16): Ditto.
35121 (_mm256_mask_slli_epi16): Ditto.
35122 (_mm256_maskz_slli_epi16): Ditto.
35123 (_mm_mask_slli_epi16): Ditto.
35124 (_mm_maskz_slli_epi16): Ditto.
35125 (_mm_maskz_srli_epi16): Ditto.
35126 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
35127 (_mm256_maskz_srli_epi32): Ditto.
35128 (_mm_mask_srli_epi32): Ditto.
35129 (_mm_maskz_srli_epi32): Ditto.
35130 (_mm256_mask_srli_epi64): Ditto.
35131 (_mm256_maskz_srli_epi64): Ditto.
35132 (_mm_mask_srli_epi64): Ditto.
35133 (_mm_maskz_srli_epi64): Ditto.
35134 (_mm256_mask_srai_epi32): Ditto.
35135 (_mm256_maskz_srai_epi32): Ditto.
35136 (_mm_mask_srai_epi32): Ditto.
35137 (_mm_maskz_srai_epi32): Ditto.
35138 (_mm256_srai_epi64): Ditto.
35139 (_mm256_mask_srai_epi64): Ditto.
35140 (_mm256_maskz_srai_epi64): Ditto.
35141 (_mm_srai_epi64): Ditto.
35142 (_mm_mask_srai_epi64): Ditto.
35143 (_mm_maskz_srai_epi64): Ditto.
35144 (_mm_mask_slli_epi32): Ditto.
35145 (_mm_maskz_slli_epi32): Ditto.
35146 (_mm_mask_slli_epi64): Ditto.
35147 (_mm_maskz_slli_epi64): Ditto.
35148 (_mm256_mask_slli_epi32): Ditto.
35149 (_mm256_maskz_slli_epi32): Ditto.
35150 (_mm256_mask_slli_epi64): Ditto.
35151 (_mm256_maskz_slli_epi64): Ditto.
35153 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35155 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
35158 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
35160 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
35161 * data-streamer-out.cc (streamer_write_vrange): Same.
35162 * value-range.h (class vrange): Make streamer_write_vrange a friend.
35164 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
35166 * value-query.cc (range_query::get_tree_range): Set NAN directly
35168 * value-range.cc (frange::set): Assert that bounds are not NAN.
35170 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
35172 * value-range.cc (add_vrange): Handle known NANs.
35174 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
35176 * value-range.h (frange::set_nan): New.
35178 2023-05-25 Alexandre Oliva <oliva@adacore.com>
35181 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
35182 requires stricter alignment than MEM's.
35184 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35186 PR tree-optimization/107822
35187 PR tree-optimization/107986
35188 * Makefile.in (OBJS): Add gimple-range-phi.o.
35189 * gimple-range-cache.h (ranger_cache::m_estimate): New
35190 phi_analyzer pointer member.
35191 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
35192 phi_analyzer if no loop info is available.
35193 * gimple-range-phi.cc: New file.
35194 * gimple-range-phi.h: New file.
35195 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
35197 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35199 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
35201 (fold_range): Add range_query parameter.
35202 (fur_relation::fur_relation): New.
35203 (fur_relation::trio): New.
35204 (fur_relation::register_relation): New.
35205 (fold_relations): New.
35206 * gimple-range-fold.h (fold_range): Adjust prototypes.
35207 (fold_relations): New.
35209 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35211 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
35212 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
35213 (ranger_cache::const_query): New.
35214 * gimple-range.cc (gimple_ranger::const_query): New.
35215 * gimple-range.h (gimple_ranger::const_query): New prototype.
35217 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35219 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
35220 (ssa_cache::dump_range_query): Delete.
35221 (ssa_lazy_cache::dump_range_query): Delete.
35222 (ssa_lazy_cache::get_range): Move from header file.
35223 (ssa_lazy_cache::clear_range): ditto.
35224 (ssa_lazy_cache::clear): Ditto.
35225 * gimple-range-cache.h (class ssa_cache): Virtualize.
35226 (class ssa_lazy_cache): Inherit and virtualize.
35228 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
35230 * value-range.h (vrange::kind): Remove.
35232 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
35234 PR middle-end/109840
35235 * match.pd <popcount optimizations>: Preserve zero-extension when
35236 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
35237 popcount((T)x), so the popcount's argument keeps the same type.
35238 <parity optimizations>: Likewise preserve extensions when
35239 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
35240 parity((T)x), so that the parity's argument type is the same.
35242 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
35244 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
35245 (ipcp_store_vr_results): Same.
35246 * ipa-prop.cc (ipa_vr::ipa_vr): New.
35247 (ipa_vr::get_vrange): New.
35248 (ipa_vr::set_unknown): New.
35249 (ipa_vr::streamer_read): New.
35250 (ipa_vr::streamer_write): New.
35251 (write_ipcp_transformation_info): Use new ipa_vr API.
35252 (read_ipcp_transformation_info): Same.
35253 (ipa_vr::nonzero_p): Delete.
35254 (ipcp_update_vr): Use new ipa_vr API.
35255 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
35256 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
35258 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
35260 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
35261 silence overflow warnings later on.
35263 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
35265 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
35266 Remove handling of V8QImode.
35267 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
35268 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
35269 (v<insn>v4qi3): Ditto.
35270 * config/i386/sse.md (v<insn>v8qi3): Remove.
35272 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35275 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
35276 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
35277 (aarch64_simd_ashr<mode>): Rename to...
35278 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
35279 (aarch64_simd_imm_shl<mode>): Rename to...
35280 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
35281 (aarch64_simd_reg_sshl<mode>): Rename to...
35282 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
35283 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
35284 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
35285 (aarch64_simd_reg_shl<mode>_signed): Rename to...
35286 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
35287 (vec_shr_<mode>): Rename to...
35288 (vec_shr_<mode><vczle><vczbe>): ... This.
35289 (aarch64_<sur>shl<mode>): Rename to...
35290 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
35291 (aarch64_<sur>q<r>shl<mode>): Rename to...
35292 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
35294 2023-05-24 Richard Biener <rguenther@suse.de>
35297 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
35298 Perform final vector composition using
35299 ix86_expand_vector_init_general instead of setting
35300 the highpart and lowpart which causes spilling.
35302 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35304 PR tree-optimization/109695
35305 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
35307 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
35308 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
35309 flag to set_global_range.
35310 (gimple_ranger::prefill_stmt_dependencies): Ditto.
35312 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35314 PR tree-optimization/109695
35315 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
35317 (temporal_cache::current_p): Check always_current method.
35318 (temporal_cache::set_always_current): Add param and set value
35320 (temporal_cache::always_current_p): New.
35321 (ranger_cache::get_global_range): Adjust.
35322 (ranger_cache::set_global_range): set always current first.
35324 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
35326 PR tree-optimization/109695
35327 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
35328 fold_range with global query to choose an initial value.
35330 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35332 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
35335 2023-05-24 Richard Biener <rguenther@suse.de>
35337 PR tree-optimization/109849
35338 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
35339 expressions but take the first sets.
35341 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
35344 * doc/gm2.texi (High procedure function): New node.
35345 (Using): New menu entry for High procedure function.
35347 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
35349 PR rtl-optimization/109940
35350 * early-remat.cc (postorder_index): Rename to...
35351 (rpo_index): ...this.
35352 (compare_candidates): Sort by decreasing rpo_index rather than
35353 increasing postorder_index.
35354 (early_remat::sort_candidates): Calculate the forward RPO from
35356 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
35357 rather than DF_BACKWARD in reverse.
35359 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35362 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
35363 qualifier_none for the return operand.
35365 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35367 * config/riscv/autovec.md (<optab><mode>3): New pattern.
35368 (one_cmpl<mode>2): Ditto.
35369 (*<optab>not<mode>): Ditto.
35370 (*n<optab><mode>): Ditto.
35371 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
35374 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
35376 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
35377 calculation on n_perms by considering nvectors_per_build.
35379 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35380 Richard Sandiford <richard.sandiford@arm.com>
35382 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
35383 (vec_cmp<mode><vm>): New pattern.
35384 (vec_cmpu<mode><vm>): New pattern.
35385 (vcond<V:mode><VI:mode>): New pattern.
35386 (vcondu<V:mode><VI:mode>): New pattern.
35387 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
35388 (emit_vlmax_merge_insn): New function.
35389 (emit_vlmax_cmp_insn): Ditto.
35390 (emit_vlmax_cmp_mu_insn): Ditto.
35391 (expand_vec_cmp): Ditto.
35392 (expand_vec_cmp_float): Ditto.
35393 (expand_vcond): Ditto.
35394 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
35395 (emit_vlmax_cmp_insn): Ditto.
35396 (emit_vlmax_cmp_mu_insn): Ditto.
35397 (get_cmp_insn_code): Ditto.
35398 (expand_vec_cmp): Ditto.
35399 (expand_vec_cmp_float): Ditto.
35400 (expand_vcond): Ditto.
35402 2023-05-24 Pan Li <pan2.li@intel.com>
35404 * config/riscv/genrvv-type-indexer.cc (main): Add
35405 unsigned_eew*_lmul1_interpret for indexer.
35406 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35407 Register vuint*m1_t interpret function.
35408 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
35409 New macro for vuint8m1_t.
35410 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35411 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35412 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35413 (vbool1_t): Add to unsigned_eew*_interpret_ops.
35414 (vbool2_t): Likewise.
35415 (vbool4_t): Likewise.
35416 (vbool8_t): Likewise.
35417 (vbool16_t): Likewise.
35418 (vbool32_t): Likewise.
35419 (vbool64_t): Likewise.
35420 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
35421 New macro for vuint*m1_t.
35422 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35423 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35424 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35425 (required_extensions_p): Add vuint*m1_t interpret case.
35426 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
35427 Add vuint*m1_t interpret to base type.
35428 (unsigned_eew16_lmul1_interpret): Likewise.
35429 (unsigned_eew32_lmul1_interpret): Likewise.
35430 (unsigned_eew64_lmul1_interpret): Likewise.
35432 2023-05-24 Pan Li <pan2.li@intel.com>
35434 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
35435 for the eew size list.
35436 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
35437 (main): Add signed_eew*_lmul1_interpret for indexer.
35438 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35439 Register vint*m1_t interpret function.
35440 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
35441 New macro for vint8m1_t.
35442 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35443 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35444 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35445 (vbool1_t): Add to signed_eew*_interpret_ops.
35446 (vbool2_t): Likewise.
35447 (vbool4_t): Likewise.
35448 (vbool8_t): Likewise.
35449 (vbool16_t): Likewise.
35450 (vbool32_t): Likewise.
35451 (vbool64_t): Likewise.
35452 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
35453 New macro for vint*m1_t.
35454 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
35455 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
35456 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
35457 (required_extensions_p): Add vint8m1_t interpret case.
35458 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
35459 Add vint*m1_t interpret to base type.
35460 (signed_eew16_lmul1_interpret): Likewise.
35461 (signed_eew32_lmul1_interpret): Likewise.
35462 (signed_eew64_lmul1_interpret): Likewise.
35464 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35466 * config/riscv/autovec.md: Adjust for new interface.
35467 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
35468 (emit_nonvlmax_insn): Add AVL operand.
35469 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
35470 (emit_nonvlmax_insn): Add AVL operand.
35471 (sew64_scalar_helper): Adjust for new interface.
35472 (expand_tuple_move): Ditto.
35473 * config/riscv/vector.md: Ditto.
35475 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35477 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
35478 (expand_const_vector): Ditto.
35479 (legitimize_move): Ditto.
35480 (sew64_scalar_helper): Ditto.
35481 (expand_tuple_move): Ditto.
35482 (expand_vector_init_insert_elems): Ditto.
35483 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
35485 2023-05-24 liuhongt <hongtao.liu@intel.com>
35488 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
35489 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
35490 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
35491 (ix86_masked_all_ones): Handle 64-bit mask.
35492 * config/i386/i386-builtin.def: Replace icode of related
35493 non-mask simd abs builtins with CODE_FOR_nothing.
35495 2023-05-23 Martin Uecker <uecker@tugraz.at>
35498 * function.cc (gimplify_parm_type): Remove function.
35499 (gimplify_parameters): Call gimplify_type_sizes.
35501 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35503 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
35504 and change to also accept '*subx' pattern.
35507 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35509 * config/xtensa/predicates.md (addsub_operator): New.
35510 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
35511 *extzvsi-1bit_addsubx): New insn_and_split patterns.
35512 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
35513 Add a special case about ifcvt 'noce_try_cmove()' to handle
35514 constant loads that do not fit into signed 12 bits in the
35515 patterns added above.
35517 2023-05-23 Richard Biener <rguenther@suse.de>
35519 PR tree-optimization/109747
35520 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
35521 the SLP node only once to the cost hook.
35523 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
35525 * config/avr/avr.cc (avr_insn_cost): New static function.
35526 (TARGET_INSN_COST): Define to that function.
35528 2023-05-23 Richard Biener <rguenther@suse.de>
35531 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
35532 For vector construction or splats apply GPR->XMM move
35533 costing. QImode memory can be handled directly only
35534 with SSE4.1 pinsrb.
35536 2023-05-23 Richard Biener <rguenther@suse.de>
35538 PR tree-optimization/108752
35539 * tree-vect-stmts.cc (vectorizable_operation): For bit
35540 operations with generic word_mode vectors do not cost
35541 an extra stmt. For plus, minus and negate also cost the
35542 constant materialization.
35544 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
35546 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
35547 Call ix86_expand_vec_shift_qihi_constant for shifts
35548 with constant count operand.
35549 * config/i386/i386.cc (ix86_shift_rotate_cost):
35550 Handle V4QImode and V8QImode.
35551 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
35552 (<insn>v4qi3): Ditto.
35554 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35556 * config/riscv/vector.md: Add mode.
35558 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
35560 PR tree-optimization/109934
35561 * value-range.cc (irange::invert): Remove buggy special case.
35563 2023-05-23 Richard Biener <rguenther@suse.de>
35565 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
35568 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
35571 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
35572 subregs between any scalars that are 64 bits or smaller.
35573 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
35574 (bits_etype): New int attribute.
35575 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
35576 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
35577 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
35579 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
35581 * doc/md.texi: Document that <FOO> can be used to refer to the
35582 numerical value of an int iterator FOO. Tweak other parts of
35583 the int iterator documentation.
35584 * read-rtl.cc (iterator_group::has_self_attr): New field.
35585 (map_attr_string): When has_self_attr is true, make <FOO>
35586 expand to the current value of iterator FOO.
35587 (initialize_iterators): Set has_self_attr for int iterators.
35589 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35591 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
35592 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
35593 (RVV_UNOP_NUM): New macro.
35594 (RVV_BINOP_NUM): Ditto.
35595 (legitimize_move): Refactor the framework of RVV auto-vectorization.
35596 (emit_vlmax_op): Ditto.
35597 (emit_vlmax_reg_op): Ditto.
35598 (emit_len_op): Ditto.
35599 (emit_len_binop): Ditto.
35600 (emit_vlmax_tany_many): Ditto.
35601 (emit_nonvlmax_tany_many): Ditto.
35602 (sew64_scalar_helper): Ditto.
35603 (expand_tuple_move): Ditto.
35604 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
35605 (emit_pred_binop): Ditto.
35606 (emit_vlmax_op): Ditto.
35607 (emit_vlmax_tany_many): New function.
35608 (emit_len_op): Remove.
35609 (emit_nonvlmax_tany_many): New function.
35610 (emit_vlmax_reg_op): Remove.
35611 (emit_len_binop): Ditto.
35612 (emit_index_op): Ditto.
35613 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
35614 (expand_const_vector): Ditto.
35615 (legitimize_move): Ditto.
35616 (sew64_scalar_helper): Ditto.
35617 (expand_tuple_move): Ditto.
35618 (expand_vector_init_insert_elems): Ditto.
35619 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
35620 * config/riscv/vector.md: Ditto.
35622 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35625 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
35626 and constraint for operand 0.
35627 (add_vec_concat_subst_be): Likewise.
35629 2023-05-23 Richard Biener <rguenther@suse.de>
35631 PR tree-optimization/109849
35632 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
35633 and use that to determine what to hoist.
35635 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
35637 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
35638 specific treatment for bit-fields only if they have an integral type
35639 and filter out non-integral bit-fields that do not start and end on
35642 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
35644 PR tree-optimization/109920
35645 * value-range.h (RESIZABLE>::~int_range): Use delete[].
35647 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
35649 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
35650 calcuation of integer vector mode costs to reflect generated
35651 instruction sequences of different integer vector modes and
35652 different target ABIs. Remove "speed" function argument.
35653 (ix86_rtx_costs): Update call for removed function argument.
35654 (ix86_vector_costs::add_stmt_cost): Ditto.
35656 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
35658 * value-range.h (class Value_Range): Implement set_zero,
35659 set_nonzero, and nonzero_p.
35661 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
35663 * config/i386/i386.cc (ix86_multiplication_cost): Add
35664 the cost of a memory read to the cost of V?QImode sequences.
35666 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35668 * config/riscv/riscv-v.cc: Add "m_" prefix.
35670 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35672 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
35673 multiple-rgroup of length.
35674 * tree-vect-stmts.cc (vectorizable_store): Ditto.
35675 (vectorizable_load): Ditto.
35676 * tree-vectorizer.h (vect_get_loop_len): Ditto.
35678 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35680 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
35683 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
35685 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
35686 handling for the case index == count.
35688 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
35691 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
35692 Don't fold to XOR / AND / XOR if just one bit is copied to the
35695 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
35697 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
35698 builtin for bit reversal using brev instruction.
35699 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
35700 NVPTX_BUILTIN_BREVLL.
35701 (nvptx_init_builtins): Define "brev" and "brevll".
35702 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
35703 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
35704 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
35705 section, document __builtin_nvptx_brev{,ll}.
35707 2023-05-21 Jakub Jelinek <jakub@redhat.com>
35709 PR tree-optimization/109505
35710 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
35711 Combine successive equal operations with constants,
35712 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
35713 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
35716 2023-05-21 Andrew Pinski <apinski@marvell.com>
35718 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
35720 2023-05-21 Pan Li <pan2.li@intel.com>
35722 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
35723 rest bool size, aka 2, 4, 8, 16, 32, 64.
35724 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
35725 Register vbool[2|4|8|16|32|64] interpret function.
35726 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
35727 New macro for vbool2_t.
35728 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
35729 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
35730 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
35731 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
35732 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
35733 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
35734 (vint16m1_t): Likewise.
35735 (vint32m1_t): Likewise.
35736 (vint64m1_t): Likewise.
35737 (vuint8m1_t): Likewise.
35738 (vuint16m1_t): Likewise.
35739 (vuint32m1_t): Likewise.
35740 (vuint64m1_t): Likewise.
35741 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
35742 New macro for vbool2_t.
35743 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
35744 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
35745 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
35746 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
35747 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
35748 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
35749 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
35750 vbool2_t interprect to base type.
35751 (bool4_interpret): Likewise.
35752 (bool8_interpret): Likewise.
35753 (bool16_interpret): Likewise.
35754 (bool32_interpret): Likewise.
35755 (bool64_interpret): Likewise.
35757 2023-05-21 Andrew Pinski <apinski@marvell.com>
35759 PR middle-end/109919
35760 * expr.cc (expand_single_bit_test): Don't use the
35761 target for expand_expr.
35763 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
35765 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
35768 2023-05-20 Pan Li <pan2.li@intel.com>
35770 * mode-switching.cc (entity_map): Initialize the array to zero.
35773 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
35776 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
35777 Remove superfluous "parallel" in insn pattern.
35778 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
35779 printing error text to assembly.
35781 2023-05-20 Andrew Pinski <apinski@marvell.com>
35783 * expr.cc (fold_single_bit_test): Rename to ...
35784 (expand_single_bit_test): This and expand directly.
35785 (do_store_flag): Update for the rename function.
35787 2023-05-20 Andrew Pinski <apinski@marvell.com>
35789 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
35790 instead of shift/and.
35792 2023-05-20 Andrew Pinski <apinski@marvell.com>
35794 * expr.cc (fold_single_bit_test): Add an assert
35795 and simplify based on code being NE_EXPR or EQ_EXPR.
35797 2023-05-20 Andrew Pinski <apinski@marvell.com>
35799 * expr.cc (fold_single_bit_test): Take inner and bitnum
35800 instead of arg0 and arg1. Update the code.
35801 (do_store_flag): Don't create a tree when calling
35802 fold_single_bit_test instead just call it with the bitnum
35803 and the inner tree.
35805 2023-05-20 Andrew Pinski <apinski@marvell.com>
35807 * expr.cc (fold_single_bit_test): Use get_def_for_expr
35808 instead of checking the inner's code.
35810 2023-05-20 Andrew Pinski <apinski@marvell.com>
35812 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
35813 (fold_single_bit_test): This and simplify.
35815 2023-05-20 Andrew Pinski <apinski@marvell.com>
35817 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
35819 (fold_single_bit_test): Likewise.
35820 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
35821 (fold_single_bit_test): Likewise and make static.
35822 * fold-const.h (fold_single_bit_test): Remove declaration.
35824 2023-05-20 Die Li <lidie@eswincomputing.com>
35826 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
35829 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
35831 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
35833 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
35836 * config/riscv/bitmanip.md
35837 (<bitmanip_optab>disi2): Match with any_extend.
35838 (<bitmanip_optab>disi2_sext): New pattern to match
35839 with sign extend using an ANDI instruction.
35841 2023-05-19 Nathan Sidwell <nathan@acm.org>
35844 * opts.h (handle_deferred_dump_options): Declare.
35845 * opts-global.cc (handle_common_deferred_options): Do not handle
35847 (handle_deferred_dump_options): New.
35848 * toplev.cc (toplev::main): Call it after plugin init.
35850 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
35852 * config/riscv/constraints.md (DsS, DsD): Restore agreement
35853 with shiftm1 mode attribute.
35855 2023-05-19 Andrew Pinski <apinski@marvell.com>
35858 * gcc.cc (default_compilers["@c-header"]): Add %w
35859 after the --output-pch.
35861 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
35863 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
35864 to hival, ASHIFT the corresponding regs.
35866 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
35868 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
35870 2023-05-19 Jakub Jelinek <jakub@redhat.com>
35872 PR tree-optimization/105776
35873 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
35874 non-NULL, allow division statement to have a cast as single imm use
35875 rather than comparison/condition.
35876 (match_arith_overflow): In that case remove the cast stmt in addition
35877 to the division statement.
35879 2023-05-19 Jakub Jelinek <jakub@redhat.com>
35881 PR tree-optimization/101856
35882 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
35883 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
35884 support it but umul_highpart_optab does.
35886 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
35888 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
35889 of tree_to_shwi on array indices. Minor tweaks.
35891 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
35893 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
35894 * attribs.cc (diag_attr_exclusions): Ditto.
35895 (decl_attributes): Ditto.
35896 (build_type_attribute_qual_variant): Ditto.
35897 * builtins.cc (fold_builtin_carg): Ditto.
35898 (fold_builtin_next_arg): Ditto.
35899 (do_mpc_arg2): Ditto.
35900 * cfgexpand.cc (expand_return): Ditto.
35901 * cgraph.h (decl_in_symtab_p): Ditto.
35902 (symtab_node::get_create): Ditto.
35903 * dwarf2out.cc (base_type_die): Ditto.
35904 (implicit_ptr_descriptor): Ditto.
35905 (gen_array_type_die): Ditto.
35906 (gen_type_die_with_usage): Ditto.
35907 (optimize_location_into_implicit_ptr): Ditto.
35908 * expr.cc (do_store_flag): Ditto.
35909 * fold-const.cc (negate_expr_p): Ditto.
35910 (fold_negate_expr_1): Ditto.
35911 (fold_convert_const): Ditto.
35912 (fold_convert_loc): Ditto.
35913 (constant_boolean_node): Ditto.
35914 (fold_binary_op_with_conditional_arg): Ditto.
35915 (build_fold_addr_expr_with_type_loc): Ditto.
35916 (fold_comparison): Ditto.
35917 (fold_checksum_tree): Ditto.
35918 (tree_unary_nonnegative_warnv_p): Ditto.
35919 (integer_valued_real_unary_p): Ditto.
35920 (fold_read_from_constant_string): Ditto.
35921 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
35922 * gimple-expr.cc (useless_type_conversion_p): Ditto.
35923 (is_gimple_reg): Ditto.
35924 (is_gimple_asm_val): Ditto.
35925 (mark_addressable): Ditto.
35926 * gimple-expr.h (is_gimple_variable): Ditto.
35927 (virtual_operand_p): Ditto.
35928 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
35929 * gimplify.cc (gimplify_bind_expr): Ditto.
35930 (gimplify_return_expr): Ditto.
35931 (gimple_add_padding_init_for_auto_var): Ditto.
35932 (gimplify_addr_expr): Ditto.
35933 (omp_add_variable): Ditto.
35934 (omp_notice_variable): Ditto.
35935 (omp_get_base_pointer): Ditto.
35936 (omp_strip_components_and_deref): Ditto.
35937 (omp_strip_indirections): Ditto.
35938 (omp_accumulate_sibling_list): Ditto.
35939 (omp_build_struct_sibling_lists): Ditto.
35940 (gimplify_adjust_omp_clauses_1): Ditto.
35941 (gimplify_adjust_omp_clauses): Ditto.
35942 (gimplify_omp_for): Ditto.
35943 (goa_lhs_expr_p): Ditto.
35944 (gimplify_one_sizepos): Ditto.
35945 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
35946 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
35947 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
35948 (propagate_controlled_uses): Ditto.
35949 * ipa-sra.cc (type_prevails_p): Ditto.
35950 (scan_expr_access): Ditto.
35951 * optabs-tree.cc (optab_for_tree_code): Ditto.
35952 * toplev.cc (wrapup_global_declaration_1): Ditto.
35953 * trans-mem.cc (transaction_invariant_address_p): Ditto.
35954 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
35955 (verify_gimple_comparison): Ditto.
35956 (verify_gimple_assign_binary): Ditto.
35957 (verify_gimple_assign_single): Ditto.
35958 * tree-complex.cc (get_component_ssa_name): Ditto.
35959 * tree-emutls.cc (lower_emutls_2): Ditto.
35960 * tree-inline.cc (copy_tree_body_r): Ditto.
35961 (estimate_move_cost): Ditto.
35962 (copy_decl_for_dup_finish): Ditto.
35963 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
35964 (note_nonlocal_vla_type): Ditto.
35965 (convert_local_omp_clauses): Ditto.
35966 (remap_vla_decls): Ditto.
35967 (fixup_vla_decls): Ditto.
35968 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
35969 * tree-pretty-print.cc (print_declaration): Ditto.
35970 (print_call_name): Ditto.
35971 * tree-sra.cc (compare_access_positions): Ditto.
35972 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
35973 * tree-ssa-ccp.cc (get_default_value): Ditto.
35974 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
35975 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
35976 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
35977 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
35978 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
35979 * tree-ssa-sink.cc (statement_sink_location): Ditto.
35980 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
35981 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
35982 * tree-ssa-uninit.cc (warn_uninit): Ditto.
35983 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
35984 (non_rewritable_mem_ref_base): Ditto.
35985 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
35986 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
35987 * tree-vect-generic.cc (do_binop): Ditto.
35989 * tree-vect-stmts.cc (vect_init_vector): Ditto.
35990 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
35991 * tree.cc (sign_mask_for): Ditto.
35992 (verify_type_variant): Ditto.
35993 (gimple_canonical_types_compatible_p): Ditto.
35994 (verify_type): Ditto.
35995 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
35996 * var-tracking.cc (prepare_call_arguments): Ditto.
35997 (vt_add_function_parameters): Ditto.
35998 * varasm.cc (decode_addr_const): Ditto.
36000 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
36002 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
36003 (lower_reduction_clauses): Ditto.
36004 (lower_send_clauses): Ditto.
36005 (lower_omp_task_reductions): Ditto.
36006 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
36007 (worker_single_copy): Ditto.
36008 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
36009 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
36011 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
36013 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
36015 (lto_read_body_or_constructor): Ditto.
36016 * lto-streamer-out.cc (tree_is_indexable): Ditto.
36017 (lto_output_var_decl_ref): Ditto.
36018 (DFS::DFS_write_tree_body): Ditto.
36019 (wrap_refs): Ditto.
36020 (write_symbol_extension_info): Ditto.
36022 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
36024 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
36025 defines from tree.h.
36026 (aarch64_mangle_type): Ditto.
36027 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
36028 (alpha_gimplify_va_arg_1): Ditto.
36029 * config/arc/arc.cc (arc_encode_section_info): Ditto.
36030 (arc_is_aux_reg_p): Ditto.
36031 (arc_is_uncached_mem_p): Ditto.
36032 (arc_handle_aux_attribute): Ditto.
36033 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
36034 (arm_handle_cmse_nonsecure_call): Ditto.
36035 (arm_set_default_type_attributes): Ditto.
36036 (arm_is_segment_info_known): Ditto.
36037 (arm_mangle_type): Ditto.
36038 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
36039 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
36040 (avr_decl_absdata_p): Ditto.
36041 (avr_insert_attributes): Ditto.
36042 (avr_section_type_flags): Ditto.
36043 (avr_encode_section_info): Ditto.
36044 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
36045 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
36046 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
36047 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
36048 (csky_mangle_type): Ditto.
36049 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
36050 * config/darwin.cc (is_objc_metadata): Ditto.
36051 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
36052 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
36053 * config/frv/frv.cc (frv_emit_movsi): Ditto.
36054 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
36055 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
36056 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
36057 * config/i386/i386-expand.cc: Ditto.
36058 * config/i386/i386.cc (type_natural_mode): Ditto.
36059 (ix86_function_arg): Ditto.
36060 (ix86_data_alignment): Ditto.
36061 (ix86_local_alignment): Ditto.
36062 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
36063 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
36064 (i386_pe_type_dllexport_p): Ditto.
36065 (i386_pe_adjust_class_at_definition): Ditto.
36066 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
36067 (i386_pe_binds_local_p): Ditto.
36068 (i386_pe_section_type_flags): Ditto.
36069 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
36070 (ia64_gimplify_va_arg): Ditto.
36071 (ia64_in_small_data_p): Ditto.
36072 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
36073 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
36074 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
36075 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
36076 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
36077 (mcore_encode_section_info): Ditto.
36078 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
36079 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
36080 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
36081 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
36082 (pass_in_memory): Ditto.
36083 (nvptx_generate_vector_shuffle): Ditto.
36084 (nvptx_lockless_update): Ditto.
36085 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
36086 (pa_function_value): Ditto.
36087 (pa_function_arg): Ditto.
36088 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
36089 (TEXT_SPACE_P): Ditto.
36090 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
36091 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
36092 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
36093 (riscv_mangle_type): Ditto.
36094 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
36095 (rl78_addsi3_internal): Ditto.
36096 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
36097 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
36098 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
36099 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
36100 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
36101 (rs6000_function_arg_advance_1): Ditto.
36102 (rs6000_function_arg): Ditto.
36103 (rs6000_pass_by_reference): Ditto.
36104 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
36105 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
36106 (rs6000_set_default_type_attributes): Ditto.
36107 (rs6000_elf_in_small_data_p): Ditto.
36108 (IN_NAMED_SECTION): Ditto.
36109 (rs6000_xcoff_encode_section_info): Ditto.
36110 (rs6000_function_value): Ditto.
36111 (invalid_arg_for_unprototyped_fn): Ditto.
36112 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
36113 (s390_vec_n_elem): Ditto.
36114 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
36115 (s390_function_arg_integer): Ditto.
36116 (s390_return_in_memory): Ditto.
36117 (s390_encode_section_info): Ditto.
36118 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
36119 (sh_function_value): Ditto.
36120 * config/sol2.cc (solaris_insert_attributes): Ditto.
36121 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
36122 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
36123 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
36124 (xstormy16_handle_below100_attribute): Ditto.
36125 * config/v850/v850.cc (v850_encode_section_info): Ditto.
36126 (v850_insert_attributes): Ditto.
36127 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
36128 (visium_return_in_memory): Ditto.
36129 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
36131 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
36133 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
36134 (ix86_expand_vecop_qihi): Add op2vec bool variable.
36135 Do not set REG_EQUAL note.
36136 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
36138 * config/i386/i386.cc (ix86_multiplication_cost): Handle
36139 V4QImode and V8QImode.
36140 * config/i386/mmx.md (mulv8qi3): New expander.
36142 * config/i386/sse.md (mulv8qi3): Remove.
36144 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
36146 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
36148 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
36150 PR bootstrap/105831
36151 * config.gcc: Use = operator instead of ==.
36153 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
36155 PR bootstrap/105831
36156 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
36157 * configure.ac: Likewise.
36158 * configure: Regenerate.
36160 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36162 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
36163 (__ARM_mve_coerce1): Remove.
36164 (__ARM_mve_coerce2): Remove.
36165 (__ARM_mve_coerce3): Remove.
36166 (__ARM_mve_coerce_i_scalar): New.
36167 (__ARM_mve_coerce_s8_ptr): New.
36168 (__ARM_mve_coerce_u8_ptr): New.
36169 (__ARM_mve_coerce_s16_ptr): New.
36170 (__ARM_mve_coerce_u16_ptr): New.
36171 (__ARM_mve_coerce_s32_ptr): New.
36172 (__ARM_mve_coerce_u32_ptr): New.
36173 (__ARM_mve_coerce_s64_ptr): New.
36174 (__ARM_mve_coerce_u64_ptr): New.
36175 (__ARM_mve_coerce_f_scalar): New.
36176 (__ARM_mve_coerce_f16_ptr): New.
36177 (__ARM_mve_coerce_f32_ptr): New.
36178 (__arm_vst4q): Change _coerce_ overloads.
36179 (__arm_vbicq): Change _coerce_ overloads.
36180 (__arm_vld1q): Change _coerce_ overloads.
36181 (__arm_vld1q_z): Change _coerce_ overloads.
36182 (__arm_vld2q): Change _coerce_ overloads.
36183 (__arm_vld4q): Change _coerce_ overloads.
36184 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
36185 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
36186 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
36187 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
36188 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
36189 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
36190 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
36191 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
36192 (__arm_vst1q_p): Change _coerce_ overloads.
36193 (__arm_vst2q): Change _coerce_ overloads.
36194 (__arm_vst1q): Change _coerce_ overloads.
36195 (__arm_vstrhq): Change _coerce_ overloads.
36196 (__arm_vstrhq_p): Change _coerce_ overloads.
36197 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
36198 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
36199 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
36200 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
36201 (__arm_vstrwq_p): Change _coerce_ overloads.
36202 (__arm_vstrwq): Change _coerce_ overloads.
36203 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
36204 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
36205 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
36206 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
36207 (__arm_vsetq_lane): Change _coerce_ overloads.
36208 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
36209 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
36210 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
36211 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
36212 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
36213 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
36214 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
36215 (__arm_vidupq_x_u8): Change _coerce_ overloads.
36216 (__arm_vddupq_x_u8): Change _coerce_ overloads.
36217 (__arm_vidupq_x_u16): Change _coerce_ overloads.
36218 (__arm_vddupq_x_u16): Change _coerce_ overloads.
36219 (__arm_vidupq_x_u32): Change _coerce_ overloads.
36220 (__arm_vddupq_x_u32): Change _coerce_ overloads.
36221 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
36222 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
36223 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
36224 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
36225 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
36226 (__arm_vidupq_u16): Change _coerce_ overloads.
36227 (__arm_vidupq_u32): Change _coerce_ overloads.
36228 (__arm_vidupq_u8): Change _coerce_ overloads.
36229 (__arm_vddupq_u16): Change _coerce_ overloads.
36230 (__arm_vddupq_u32): Change _coerce_ overloads.
36231 (__arm_vddupq_u8): Change _coerce_ overloads.
36232 (__arm_viwdupq_m): Change _coerce_ overloads.
36233 (__arm_viwdupq_u16): Change _coerce_ overloads.
36234 (__arm_viwdupq_u32): Change _coerce_ overloads.
36235 (__arm_viwdupq_u8): Change _coerce_ overloads.
36236 (__arm_vdwdupq_m): Change _coerce_ overloads.
36237 (__arm_vdwdupq_u16): Change _coerce_ overloads.
36238 (__arm_vdwdupq_u32): Change _coerce_ overloads.
36239 (__arm_vdwdupq_u8): Change _coerce_ overloads.
36240 (__arm_vstrbq): Change _coerce_ overloads.
36241 (__arm_vstrbq_p): Change _coerce_ overloads.
36242 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
36243 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
36244 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
36245 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
36246 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
36248 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36250 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
36253 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36255 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
36256 (__arm_vadcq_u32): Likewise.
36257 (__arm_vadcq_m_s32): Likewise.
36258 (__arm_vadcq_m_u32): Likewise.
36259 (__arm_vsbcq_s32): Likewise.
36260 (__arm_vsbcq_u32): Likewise.
36261 (__arm_vsbcq_m_s32): Likewise.
36262 (__arm_vsbcq_m_u32): Likewise.
36263 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
36265 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
36267 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
36268 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
36269 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
36270 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
36271 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
36272 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
36273 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
36274 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
36275 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
36276 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
36277 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
36278 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
36279 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
36280 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
36281 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
36282 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
36283 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
36284 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
36285 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
36286 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
36287 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
36288 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
36289 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
36290 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
36291 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
36292 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
36293 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
36294 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
36295 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
36296 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
36297 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
36298 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
36299 (mve_vorrq_m_f<mode>)
36300 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
36301 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
36302 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
36303 capitalization in the emitted asm.
36305 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
36307 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
36309 (Ri): Move constraint definition from predicates.md.
36310 (Rl): Define new constraint.
36311 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
36312 missing constraint.
36313 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
36314 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
36315 op 2. Fix asm output spacing.
36316 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
36317 * config/arm/predicates.md (Ri) Move constraint to constraints.md
36318 (mve_vldrd_immediate): Move it from
36320 (mve_vstrw_immediate): New predicate.
36322 2023-05-18 Pan Li <pan2.li@intel.com>
36323 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36324 Kito Cheng <kito.cheng@sifive.com>
36325 Richard Biener <rguenther@suse.de>
36326 Richard Sandiford <richard.sandiford@arm.com>
36328 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
36329 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
36330 (struct table_elt): Extend machine_mode to 16 bits.
36331 (struct set): Ditto.
36332 * genmodes.cc (emit_mode_wider): Extend type from char to short.
36333 (emit_mode_complex): Ditto.
36334 (emit_mode_inner): Ditto.
36335 (emit_class_narrowest_mode): Ditto.
36336 * genopinit.cc (main): Extend the machine_mode limit.
36337 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
36338 re-ordered the struct fields for padding.
36339 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
36340 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
36341 (get_mode_alignment): Extend type from char to short.
36342 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
36343 removed the ATTRIBUTE_PACKED.
36344 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
36345 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
36346 m_kind to 2 bits and remove m_spare.
36347 * rtl.h (RTX_CODE_BITSIZE): New macro.
36348 (struct rtx_def): Swap both the bit size and location between the
36349 rtx_code and the machine_mode.
36350 (subreg_shape::unique_id): Extend the machine_mode limit.
36351 * rtlanal.h: Extend machine_mode to 16 bits.
36352 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
36353 bits and re-ordered the struct fields for padding.
36354 (struct tree_decl_common): Extend machine_mode to 16 bits.
36356 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
36358 * genrecog.cc (print_nonbool_test): Fix type error of
36359 switch (SUBREG_BYTE (op))'.
36361 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
36363 * common/config/riscv/riscv-common.cc: Remove
36364 trailing spaces on lines.
36365 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
36366 * config/riscv/riscv.h (enum reg_class): Likewise.
36367 * config/riscv/riscv.md: Likewise.
36369 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
36371 * config/pa/pa.md (clear_cache): New.
36373 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
36375 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
36376 parenthesis. Fix misnamed index entry.
36377 <concept>: Fix misnamed index entry.
36379 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
36381 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
36383 (*<optab>si3_mask, *<optab>di3_mask): Here.
36384 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
36385 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
36387 (*<bitmanip_optab>si3_sext_mask): Likewise.
36388 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
36389 and const_di_mask_operand.
36390 (bitmanip_rotate): New iterator.
36391 (bitmanip_optab): Add rotates.
36392 * config/riscv/predicates.md (const_si_mask_operand): Renamed
36393 from const31_operand. Generalize to handle more mask constants.
36394 (const_di_mask_operand): Similarly.
36396 2023-05-17 Jakub Jelinek <jakub@redhat.com>
36399 * config/i386/i386-builtin-types.def (FLOAT128): Use
36400 float128t_type_node rather than float128_type_node.
36402 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
36404 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
36405 FP_CONTRACT_FAST (no functional change).
36407 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
36409 * config/i386/i386.cc (ix86_multiplication_cost): Correct
36410 calcuation of integer vector mode costs to reflect generated
36411 instruction sequences of different integer vector modes and
36412 different target ABIs.
36414 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36416 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
36417 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
36418 (riscv_mode_needed): Ditto.
36419 (riscv_mode_after): Ditto.
36420 (riscv_mode_entry): Ditto.
36421 (riscv_mode_exit): Ditto.
36422 (riscv_mode_priority): Ditto.
36423 (TARGET_MODE_EMIT): New target hook.
36424 (TARGET_MODE_NEEDED): Ditto.
36425 (TARGET_MODE_AFTER): Ditto.
36426 (TARGET_MODE_ENTRY): Ditto.
36427 (TARGET_MODE_EXIT): Ditto.
36428 (TARGET_MODE_PRIORITY): Ditto.
36429 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
36430 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
36431 * config/riscv/riscv.md: Add csrwvxrm.
36432 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
36433 (vxrmsi): New pattern.
36435 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36437 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
36438 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36439 (struct narrow_alu_def): Ditto.
36440 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
36441 (function_expander::use_exact_insn): Ditto.
36442 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
36443 (function_base::has_rounding_mode_operand_p): New function.
36445 2023-05-17 Andrew Pinski <apinski@marvell.com>
36447 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
36448 against 0 instead of calling integer_zerop.
36450 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36452 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
36453 (DEF_RVV_VXRM_ENUM): New macro.
36454 (handle_pragma_vector): Add vxrm enum register.
36455 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
36461 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36463 * value-range.h (Value_Range::operator=): New.
36465 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36467 * value-range.cc (vrange::operator=): Add a stub to copy
36468 unsupported ranges.
36469 * value-range.h (is_a <unsupported_range>): New.
36470 (Value_Range::operator=): Support copying unsupported ranges.
36472 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
36474 * data-streamer-in.cc (streamer_read_real_value): New.
36475 (streamer_read_value_range): New.
36476 * data-streamer-out.cc (streamer_write_real_value): New.
36477 (streamer_write_vrange): New.
36478 * data-streamer.h (streamer_write_vrange): New.
36479 (streamer_read_value_range): New.
36481 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
36484 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
36485 is ignored for a fixed underlying type.
36486 (C++ Dialect Options): Likewise for -fstrict-enums.
36488 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
36490 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
36493 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36495 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
36497 (s390_atomic_align_for_mode): New.
36499 2023-05-17 Jakub Jelinek <jakub@redhat.com>
36501 * wide-int.cc (wi::from_array): Add missing closing paren in function
36504 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
36506 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
36507 suggested unroll factor once the previous analysis fails.
36509 2023-05-17 Pan Li <pan2.li@intel.com>
36511 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
36513 (main): Add bool1 to the type indexer.
36514 * config/riscv/riscv-vector-builtins-functions.def
36515 (vreinterpret): Register vbool1 interpret function.
36516 * config/riscv/riscv-vector-builtins-types.def
36517 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
36518 (vint8m1_t): Add the type to bool1_interpret_ops.
36519 (vint16m1_t): Ditto.
36520 (vint32m1_t): Ditto.
36521 (vint64m1_t): Ditto.
36522 (vuint8m1_t): Ditto.
36523 (vuint16m1_t): Ditto.
36524 (vuint32m1_t): Ditto.
36525 (vuint64m1_t): Ditto.
36526 * config/riscv/riscv-vector-builtins.cc
36527 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
36528 (required_extensions_p): Add bool1 interpret case.
36529 * config/riscv/riscv-vector-builtins.def
36530 (bool1_interpret): Add bool1 interpret to base type.
36531 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
36532 with VB dest for vreinterpret.
36534 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
36537 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
36538 constants through "lis; xoris".
36540 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
36542 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
36543 default rs6000 target pass for O2 and above.
36544 * doc/invoke.texi: Document -free
36546 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
36548 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
36549 Fix wrong select_kind...
36551 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36553 * config/s390/s390-protos.h (s390_expand_setmem): Change
36554 function signature.
36555 * config/s390/s390.cc (s390_expand_setmem): For memset's less
36556 than or equal to 256 byte do not perform a libc call.
36557 * config/s390/s390.md: Change expander into a version which
36560 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36562 * config/s390/s390-protos.h (s390_expand_movmem): New.
36563 * config/s390/s390.cc (s390_expand_movmem): New.
36564 * config/s390/s390.md (movmem<mode>): New.
36568 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36570 * config/s390/s390-protos.h (s390_expand_cpymem): Change
36571 function signature.
36572 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
36573 than or equal to 256 byte do not perform a libc call.
36574 (s390_expand_insv): Adapt new function signature of
36575 s390_expand_cpymem.
36576 * config/s390/s390.md: Change expander into a version which
36579 2023-05-16 Andrew Pinski <apinski@marvell.com>
36581 PR tree-optimization/109424
36582 * match.pd: Add patterns for min/max of zero_one_valued
36585 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36587 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
36588 * config/riscv/riscv-vector-builtins.cc
36589 (function_expander::use_ternop_insn): Add default rounding mode.
36590 (function_expander::use_widen_ternop_insn): Ditto.
36591 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
36592 (riscv_hard_regno_mode_ok): Ditto.
36593 (riscv_conditional_register_usage): Ditto.
36594 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
36595 (FRM_REG_P): Ditto.
36596 (RISCV_DWARF_FRM): Ditto.
36597 * config/riscv/riscv.md: Ditto.
36598 * config/riscv/vector-iterators.md: split no frm and has frm operations.
36599 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
36600 (@pred_<optab><mode>): Ditto.
36602 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
36604 PR tree-optimization/109695
36605 * value-range.cc (irange::operator=): Resize range.
36606 (irange::union_): Same.
36607 (irange::intersect): Same.
36608 (irange::invert): Same.
36609 (int_range_max): Default to 3 sub-ranges and resize as needed.
36610 * value-range.h (irange::maybe_resize): New.
36612 (int_range::int_range): Adjust for resizing.
36613 (int_range::operator=): Same.
36615 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
36617 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
36619 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
36620 when range changed.
36622 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36624 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
36625 * config/riscv/riscv-vector-builtins.cc
36626 (function_expander::use_exact_insn): Add default rounding mode operand.
36627 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
36628 (riscv_hard_regno_mode_ok): Ditto.
36629 (riscv_conditional_register_usage): Ditto.
36630 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
36631 (VXRM_REG_P): Ditto.
36632 (RISCV_DWARF_VXRM): Ditto.
36633 * config/riscv/riscv.md: Ditto.
36634 * config/riscv/vector.md: Ditto
36636 2023-05-15 Pan Li <pan2.li@intel.com>
36638 * optabs.cc (maybe_gen_insn): Add case to generate instruction
36639 that has 11 operands.
36641 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36643 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
36644 logic for vector modes.
36646 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36649 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
36650 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
36651 (aarch64_cmtst<mode>): Rename to...
36652 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
36653 (*aarch64_cmtst_same_<mode>): Rename to...
36654 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
36655 (*aarch64_cmtstdi): Rename to...
36656 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
36657 (aarch64_fac<optab><mode>): Rename to...
36658 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
36660 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36663 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
36664 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
36666 2023-05-15 Pan Li <pan2.li@intel.com>
36667 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36668 kito-cheng <kito.cheng@sifive.com>
36670 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
36671 deciding the mode is constant or not.
36672 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
36674 2023-05-15 Richard Biener <rguenther@suse.de>
36676 PR tree-optimization/109848
36677 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
36678 TARGET_MEM_REF address preparation before the store, not
36681 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36683 * config/riscv/riscv.cc
36684 (riscv_vectorize_preferred_vector_alignment): New function.
36685 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
36687 2023-05-14 Andrew Pinski <apinski@marvell.com>
36689 PR tree-optimization/109829
36690 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
36692 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
36695 * config/i386/i386.cc: Revert the 2023-05-11 change.
36696 (ix86_widen_mult_cost): Return high value instead of
36697 ICEing for unsupported modes.
36699 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
36701 * config/i386/i386.cc (x86_function_profiler): Take
36702 ix86_direct_extern_access into account when generating calls
36705 2023-05-14 Pan Li <pan2.li@intel.com>
36707 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
36708 Refactor the or pattern to switch cases.
36710 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36712 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
36713 aarch64_expand_vector_init to this, and remove interleaving case.
36714 Recursively call aarch64_expand_vector_init_fallback, instead of
36715 aarch64_expand_vector_init.
36716 (aarch64_unzip_vector_init): New function.
36717 (aarch64_expand_vector_init): Likewise.
36719 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
36721 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
36722 Pull out function call from the gcc_assert.
36724 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
36726 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
36727 (policy_to_str): New.
36728 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
36730 2023-05-13 Andrew Pinski <apinski@marvell.com>
36732 PR tree-optimization/109834
36733 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
36734 (popcount(rotate(x,y))->popcount(x)): Likewise.
36736 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
36738 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
36739 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
36740 gen_extend_insn to generate zero/sign extension instructions.
36742 (ix86_expand_vecop_qihi): Initialize interleave functions
36743 for MULT code only. Fix comments.
36745 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
36748 * config/i386/mmx.md (mulv2si3): Remove expander.
36749 (mulv2si3): Rename insn pattern from *mulv2si.
36751 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
36753 PR libstdc++/109816
36754 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
36755 '!lto_stream_offload_p'.
36757 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
36758 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36761 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
36762 (local_avl_compatible_p): New.
36763 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
36764 for LCM, rewrite as a backward algorithm.
36765 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
36766 interface, handle a BB at once.
36768 2023-05-12 Richard Biener <rguenther@suse.de>
36770 PR tree-optimization/64731
36771 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
36772 handle TARGET_MEM_REF destinations of stores from vector
36775 2023-05-12 Richard Biener <rguenther@suse.de>
36777 PR tree-optimization/109791
36778 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
36780 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
36783 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36785 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
36786 * config/arm/arm-mve-builtins-base.def (vsriq): New.
36787 * config/arm/arm-mve-builtins-base.h (vsriq): New.
36788 * config/arm/arm-mve-builtins.cc
36789 (function_instance::has_inactive_argument): Handle vsriq.
36790 * config/arm/arm_mve.h (vsriq): Remove.
36792 (vsriq_n_u8): Remove.
36793 (vsriq_n_s8): Remove.
36794 (vsriq_n_u16): Remove.
36795 (vsriq_n_s16): Remove.
36796 (vsriq_n_u32): Remove.
36797 (vsriq_n_s32): Remove.
36798 (vsriq_m_n_s8): Remove.
36799 (vsriq_m_n_u8): Remove.
36800 (vsriq_m_n_s16): Remove.
36801 (vsriq_m_n_u16): Remove.
36802 (vsriq_m_n_s32): Remove.
36803 (vsriq_m_n_u32): Remove.
36804 (__arm_vsriq_n_u8): Remove.
36805 (__arm_vsriq_n_s8): Remove.
36806 (__arm_vsriq_n_u16): Remove.
36807 (__arm_vsriq_n_s16): Remove.
36808 (__arm_vsriq_n_u32): Remove.
36809 (__arm_vsriq_n_s32): Remove.
36810 (__arm_vsriq_m_n_s8): Remove.
36811 (__arm_vsriq_m_n_u8): Remove.
36812 (__arm_vsriq_m_n_s16): Remove.
36813 (__arm_vsriq_m_n_u16): Remove.
36814 (__arm_vsriq_m_n_s32): Remove.
36815 (__arm_vsriq_m_n_u32): Remove.
36816 (__arm_vsriq): Remove.
36817 (__arm_vsriq_m): Remove.
36819 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36821 * config/arm/iterators.md (mve_insn): Add vsri.
36822 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
36823 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
36824 (mve_vsriq_m_n_<supf><mode>): Rename into ...
36825 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36827 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36829 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
36830 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
36832 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36834 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
36835 * config/arm/arm-mve-builtins-base.def (vsliq): New.
36836 * config/arm/arm-mve-builtins-base.h (vsliq): New.
36837 * config/arm/arm-mve-builtins.cc
36838 (function_instance::has_inactive_argument): Handle vsliq.
36839 * config/arm/arm_mve.h (vsliq): Remove.
36841 (vsliq_n_u8): Remove.
36842 (vsliq_n_s8): Remove.
36843 (vsliq_n_u16): Remove.
36844 (vsliq_n_s16): Remove.
36845 (vsliq_n_u32): Remove.
36846 (vsliq_n_s32): Remove.
36847 (vsliq_m_n_s8): Remove.
36848 (vsliq_m_n_s32): Remove.
36849 (vsliq_m_n_s16): Remove.
36850 (vsliq_m_n_u8): Remove.
36851 (vsliq_m_n_u32): Remove.
36852 (vsliq_m_n_u16): Remove.
36853 (__arm_vsliq_n_u8): Remove.
36854 (__arm_vsliq_n_s8): Remove.
36855 (__arm_vsliq_n_u16): Remove.
36856 (__arm_vsliq_n_s16): Remove.
36857 (__arm_vsliq_n_u32): Remove.
36858 (__arm_vsliq_n_s32): Remove.
36859 (__arm_vsliq_m_n_s8): Remove.
36860 (__arm_vsliq_m_n_s32): Remove.
36861 (__arm_vsliq_m_n_s16): Remove.
36862 (__arm_vsliq_m_n_u8): Remove.
36863 (__arm_vsliq_m_n_u32): Remove.
36864 (__arm_vsliq_m_n_u16): Remove.
36865 (__arm_vsliq): Remove.
36866 (__arm_vsliq_m): Remove.
36868 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36870 * config/arm/iterators.md (mve_insn>): Add vsli.
36871 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
36872 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36873 (mve_vsliq_m_n_<supf><mode>): Rename into ...
36874 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36876 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36878 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
36879 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
36881 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36883 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
36884 * config/arm/arm-mve-builtins-base.def (vpselq): New.
36885 * config/arm/arm-mve-builtins-base.h (vpselq): New.
36886 * config/arm/arm_mve.h (vpselq): Remove.
36887 (vpselq_u8): Remove.
36888 (vpselq_s8): Remove.
36889 (vpselq_u16): Remove.
36890 (vpselq_s16): Remove.
36891 (vpselq_u32): Remove.
36892 (vpselq_s32): Remove.
36893 (vpselq_u64): Remove.
36894 (vpselq_s64): Remove.
36895 (vpselq_f16): Remove.
36896 (vpselq_f32): Remove.
36897 (__arm_vpselq_u8): Remove.
36898 (__arm_vpselq_s8): Remove.
36899 (__arm_vpselq_u16): Remove.
36900 (__arm_vpselq_s16): Remove.
36901 (__arm_vpselq_u32): Remove.
36902 (__arm_vpselq_s32): Remove.
36903 (__arm_vpselq_u64): Remove.
36904 (__arm_vpselq_s64): Remove.
36905 (__arm_vpselq_f16): Remove.
36906 (__arm_vpselq_f32): Remove.
36907 (__arm_vpselq): Remove.
36909 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36911 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
36912 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
36914 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36916 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
36918 * config/arm/iterators.md (MVE_VPSELQ_F): New.
36919 (mve_insn): Add vpsel.
36920 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
36921 (@mve_<mve_insn>q_<supf><mode>): ... this.
36922 (@mve_vpselq_f<mode>): Rename into ...
36923 (@mve_<mve_insn>q_f<mode>): ... this.
36925 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36927 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
36928 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
36929 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
36930 * config/arm/arm-mve-builtins.cc
36931 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
36933 * config/arm/arm_mve.h (vfmaq): Remove.
36937 (vfmasq_m): Remove.
36939 (vfmaq_f16): Remove.
36940 (vfmaq_n_f16): Remove.
36941 (vfmasq_n_f16): Remove.
36942 (vfmsq_f16): Remove.
36943 (vfmaq_f32): Remove.
36944 (vfmaq_n_f32): Remove.
36945 (vfmasq_n_f32): Remove.
36946 (vfmsq_f32): Remove.
36947 (vfmaq_m_f32): Remove.
36948 (vfmaq_m_f16): Remove.
36949 (vfmaq_m_n_f32): Remove.
36950 (vfmaq_m_n_f16): Remove.
36951 (vfmasq_m_n_f32): Remove.
36952 (vfmasq_m_n_f16): Remove.
36953 (vfmsq_m_f32): Remove.
36954 (vfmsq_m_f16): Remove.
36955 (__arm_vfmaq_f16): Remove.
36956 (__arm_vfmaq_n_f16): Remove.
36957 (__arm_vfmasq_n_f16): Remove.
36958 (__arm_vfmsq_f16): Remove.
36959 (__arm_vfmaq_f32): Remove.
36960 (__arm_vfmaq_n_f32): Remove.
36961 (__arm_vfmasq_n_f32): Remove.
36962 (__arm_vfmsq_f32): Remove.
36963 (__arm_vfmaq_m_f32): Remove.
36964 (__arm_vfmaq_m_f16): Remove.
36965 (__arm_vfmaq_m_n_f32): Remove.
36966 (__arm_vfmaq_m_n_f16): Remove.
36967 (__arm_vfmasq_m_n_f32): Remove.
36968 (__arm_vfmasq_m_n_f16): Remove.
36969 (__arm_vfmsq_m_f32): Remove.
36970 (__arm_vfmsq_m_f16): Remove.
36971 (__arm_vfmaq): Remove.
36972 (__arm_vfmasq): Remove.
36973 (__arm_vfmsq): Remove.
36974 (__arm_vfmaq_m): Remove.
36975 (__arm_vfmasq_m): Remove.
36976 (__arm_vfmsq_m): Remove.
36978 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36980 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
36982 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
36983 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
36984 (mve_insn): Add vfma, vfmas, vfms.
36985 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
36987 (@mve_<mve_insn>q_f<mode>): ... this.
36988 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
36989 (@mve_<mve_insn>q_n_f<mode>): ... this.
36990 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
36991 @mve_<mve_insn>q_m_f<mode>.
36992 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
36993 @mve_<mve_insn>q_m_n_f<mode>.
36995 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
36997 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
36998 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
37000 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37002 * config/arm/arm-mve-builtins-base.cc
37003 (FUNCTION_WITH_RTX_M_N_NO_F): New.
37005 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
37006 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
37007 * config/arm/arm_mve.h (vmvnq): Remove.
37010 (vmvnq_s8): Remove.
37011 (vmvnq_s16): Remove.
37012 (vmvnq_s32): Remove.
37013 (vmvnq_n_s16): Remove.
37014 (vmvnq_n_s32): Remove.
37015 (vmvnq_u8): Remove.
37016 (vmvnq_u16): Remove.
37017 (vmvnq_u32): Remove.
37018 (vmvnq_n_u16): Remove.
37019 (vmvnq_n_u32): Remove.
37020 (vmvnq_m_u8): Remove.
37021 (vmvnq_m_s8): Remove.
37022 (vmvnq_m_u16): Remove.
37023 (vmvnq_m_s16): Remove.
37024 (vmvnq_m_u32): Remove.
37025 (vmvnq_m_s32): Remove.
37026 (vmvnq_m_n_s16): Remove.
37027 (vmvnq_m_n_u16): Remove.
37028 (vmvnq_m_n_s32): Remove.
37029 (vmvnq_m_n_u32): Remove.
37030 (vmvnq_x_s8): Remove.
37031 (vmvnq_x_s16): Remove.
37032 (vmvnq_x_s32): Remove.
37033 (vmvnq_x_u8): Remove.
37034 (vmvnq_x_u16): Remove.
37035 (vmvnq_x_u32): Remove.
37036 (vmvnq_x_n_s16): Remove.
37037 (vmvnq_x_n_s32): Remove.
37038 (vmvnq_x_n_u16): Remove.
37039 (vmvnq_x_n_u32): Remove.
37040 (__arm_vmvnq_s8): Remove.
37041 (__arm_vmvnq_s16): Remove.
37042 (__arm_vmvnq_s32): Remove.
37043 (__arm_vmvnq_n_s16): Remove.
37044 (__arm_vmvnq_n_s32): Remove.
37045 (__arm_vmvnq_u8): Remove.
37046 (__arm_vmvnq_u16): Remove.
37047 (__arm_vmvnq_u32): Remove.
37048 (__arm_vmvnq_n_u16): Remove.
37049 (__arm_vmvnq_n_u32): Remove.
37050 (__arm_vmvnq_m_u8): Remove.
37051 (__arm_vmvnq_m_s8): Remove.
37052 (__arm_vmvnq_m_u16): Remove.
37053 (__arm_vmvnq_m_s16): Remove.
37054 (__arm_vmvnq_m_u32): Remove.
37055 (__arm_vmvnq_m_s32): Remove.
37056 (__arm_vmvnq_m_n_s16): Remove.
37057 (__arm_vmvnq_m_n_u16): Remove.
37058 (__arm_vmvnq_m_n_s32): Remove.
37059 (__arm_vmvnq_m_n_u32): Remove.
37060 (__arm_vmvnq_x_s8): Remove.
37061 (__arm_vmvnq_x_s16): Remove.
37062 (__arm_vmvnq_x_s32): Remove.
37063 (__arm_vmvnq_x_u8): Remove.
37064 (__arm_vmvnq_x_u16): Remove.
37065 (__arm_vmvnq_x_u32): Remove.
37066 (__arm_vmvnq_x_n_s16): Remove.
37067 (__arm_vmvnq_x_n_s32): Remove.
37068 (__arm_vmvnq_x_n_u16): Remove.
37069 (__arm_vmvnq_x_n_u32): Remove.
37070 (__arm_vmvnq): Remove.
37071 (__arm_vmvnq_m): Remove.
37072 (__arm_vmvnq_x): Remove.
37074 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37076 * config/arm/iterators.md (mve_insn): Add vmvn.
37077 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
37078 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37079 (mve_vmvnq_m_<supf><mode>): Rename into ...
37080 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
37081 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
37082 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37084 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37086 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
37087 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
37089 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37091 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
37092 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
37093 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
37094 * config/arm/arm_mve.h (vbrsrq): Remove.
37095 (vbrsrq_m): Remove.
37096 (vbrsrq_x): Remove.
37097 (vbrsrq_n_f16): Remove.
37098 (vbrsrq_n_f32): Remove.
37099 (vbrsrq_n_u8): Remove.
37100 (vbrsrq_n_s8): Remove.
37101 (vbrsrq_n_u16): Remove.
37102 (vbrsrq_n_s16): Remove.
37103 (vbrsrq_n_u32): Remove.
37104 (vbrsrq_n_s32): Remove.
37105 (vbrsrq_m_n_s8): Remove.
37106 (vbrsrq_m_n_s32): Remove.
37107 (vbrsrq_m_n_s16): Remove.
37108 (vbrsrq_m_n_u8): Remove.
37109 (vbrsrq_m_n_u32): Remove.
37110 (vbrsrq_m_n_u16): Remove.
37111 (vbrsrq_m_n_f32): Remove.
37112 (vbrsrq_m_n_f16): Remove.
37113 (vbrsrq_x_n_s8): Remove.
37114 (vbrsrq_x_n_s16): Remove.
37115 (vbrsrq_x_n_s32): Remove.
37116 (vbrsrq_x_n_u8): Remove.
37117 (vbrsrq_x_n_u16): Remove.
37118 (vbrsrq_x_n_u32): Remove.
37119 (vbrsrq_x_n_f16): Remove.
37120 (vbrsrq_x_n_f32): Remove.
37121 (__arm_vbrsrq_n_u8): Remove.
37122 (__arm_vbrsrq_n_s8): Remove.
37123 (__arm_vbrsrq_n_u16): Remove.
37124 (__arm_vbrsrq_n_s16): Remove.
37125 (__arm_vbrsrq_n_u32): Remove.
37126 (__arm_vbrsrq_n_s32): Remove.
37127 (__arm_vbrsrq_m_n_s8): Remove.
37128 (__arm_vbrsrq_m_n_s32): Remove.
37129 (__arm_vbrsrq_m_n_s16): Remove.
37130 (__arm_vbrsrq_m_n_u8): Remove.
37131 (__arm_vbrsrq_m_n_u32): Remove.
37132 (__arm_vbrsrq_m_n_u16): Remove.
37133 (__arm_vbrsrq_x_n_s8): Remove.
37134 (__arm_vbrsrq_x_n_s16): Remove.
37135 (__arm_vbrsrq_x_n_s32): Remove.
37136 (__arm_vbrsrq_x_n_u8): Remove.
37137 (__arm_vbrsrq_x_n_u16): Remove.
37138 (__arm_vbrsrq_x_n_u32): Remove.
37139 (__arm_vbrsrq_n_f16): Remove.
37140 (__arm_vbrsrq_n_f32): Remove.
37141 (__arm_vbrsrq_m_n_f32): Remove.
37142 (__arm_vbrsrq_m_n_f16): Remove.
37143 (__arm_vbrsrq_x_n_f16): Remove.
37144 (__arm_vbrsrq_x_n_f32): Remove.
37145 (__arm_vbrsrq): Remove.
37146 (__arm_vbrsrq_m): Remove.
37147 (__arm_vbrsrq_x): Remove.
37149 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37151 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
37152 (mve_insn): Add vbrsr.
37153 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
37154 (@mve_<mve_insn>q_n_f<mode>): ... this.
37155 (mve_vbrsrq_n_<supf><mode>): Rename into ...
37156 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37157 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
37158 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37159 (mve_vbrsrq_m_n_f<mode>): Rename into ...
37160 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
37162 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37164 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
37165 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
37167 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37169 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
37170 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
37171 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
37172 * config/arm/arm_mve.h (vqshluq): Remove.
37173 (vqshluq_m): Remove.
37174 (vqshluq_n_s8): Remove.
37175 (vqshluq_n_s16): Remove.
37176 (vqshluq_n_s32): Remove.
37177 (vqshluq_m_n_s8): Remove.
37178 (vqshluq_m_n_s16): Remove.
37179 (vqshluq_m_n_s32): Remove.
37180 (__arm_vqshluq_n_s8): Remove.
37181 (__arm_vqshluq_n_s16): Remove.
37182 (__arm_vqshluq_n_s32): Remove.
37183 (__arm_vqshluq_m_n_s8): Remove.
37184 (__arm_vqshluq_m_n_s16): Remove.
37185 (__arm_vqshluq_m_n_s32): Remove.
37186 (__arm_vqshluq): Remove.
37187 (__arm_vqshluq_m): Remove.
37189 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37191 * config/arm/iterators.md (mve_insn): Add vqshlu.
37192 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
37193 (VQSHLUQ_M_N, VQSHLUQ_N): New.
37194 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
37195 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37196 (mve_vqshluq_m_n_s<mode>): Change name into ...
37197 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37199 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37201 * config/arm/arm-mve-builtins-shapes.cc
37202 (binary_lshift_unsigned): New.
37203 * config/arm/arm-mve-builtins-shapes.h
37204 (binary_lshift_unsigned): New.
37206 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37208 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
37209 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
37210 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
37211 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
37212 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
37213 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
37214 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
37215 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
37216 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
37217 (vrmlaldavhaxq): Remove.
37218 (vrmlsldavhaq): Remove.
37219 (vrmlsldavhaxq): Remove.
37220 (vrmlaldavhaq_p): Remove.
37221 (vrmlaldavhaxq_p): Remove.
37222 (vrmlsldavhaq_p): Remove.
37223 (vrmlsldavhaxq_p): Remove.
37224 (vrmlaldavhaq_s32): Remove.
37225 (vrmlaldavhaq_u32): Remove.
37226 (vrmlaldavhaxq_s32): Remove.
37227 (vrmlsldavhaq_s32): Remove.
37228 (vrmlsldavhaxq_s32): Remove.
37229 (vrmlaldavhaq_p_s32): Remove.
37230 (vrmlaldavhaq_p_u32): Remove.
37231 (vrmlaldavhaxq_p_s32): Remove.
37232 (vrmlsldavhaq_p_s32): Remove.
37233 (vrmlsldavhaxq_p_s32): Remove.
37234 (__arm_vrmlaldavhaq_s32): Remove.
37235 (__arm_vrmlaldavhaq_u32): Remove.
37236 (__arm_vrmlaldavhaxq_s32): Remove.
37237 (__arm_vrmlsldavhaq_s32): Remove.
37238 (__arm_vrmlsldavhaxq_s32): Remove.
37239 (__arm_vrmlaldavhaq_p_s32): Remove.
37240 (__arm_vrmlaldavhaq_p_u32): Remove.
37241 (__arm_vrmlaldavhaxq_p_s32): Remove.
37242 (__arm_vrmlsldavhaq_p_s32): Remove.
37243 (__arm_vrmlsldavhaxq_p_s32): Remove.
37244 (__arm_vrmlaldavhaq): Remove.
37245 (__arm_vrmlaldavhaxq): Remove.
37246 (__arm_vrmlsldavhaq): Remove.
37247 (__arm_vrmlsldavhaxq): Remove.
37248 (__arm_vrmlaldavhaq_p): Remove.
37249 (__arm_vrmlaldavhaxq_p): Remove.
37250 (__arm_vrmlsldavhaq_p): Remove.
37251 (__arm_vrmlsldavhaxq_p): Remove.
37253 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37255 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
37256 (MVE_VRMLxLDAVHAxQ_P): New.
37257 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
37259 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
37260 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
37262 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
37263 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
37264 (mve_vrmlsldavhaq_sv4si): Merge into ...
37265 (@mve_<mve_insn>q_<supf>v4si): ... this.
37266 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
37267 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
37268 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
37269 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
37271 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37273 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
37274 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
37276 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
37277 * config/arm/arm_mve.h (vqdmulltq): Remove.
37278 (vqdmullbq): Remove.
37279 (vqdmullbq_m): Remove.
37280 (vqdmulltq_m): Remove.
37281 (vqdmulltq_s16): Remove.
37282 (vqdmulltq_n_s16): Remove.
37283 (vqdmullbq_s16): Remove.
37284 (vqdmullbq_n_s16): Remove.
37285 (vqdmulltq_s32): Remove.
37286 (vqdmulltq_n_s32): Remove.
37287 (vqdmullbq_s32): Remove.
37288 (vqdmullbq_n_s32): Remove.
37289 (vqdmullbq_m_n_s32): Remove.
37290 (vqdmullbq_m_n_s16): Remove.
37291 (vqdmullbq_m_s32): Remove.
37292 (vqdmullbq_m_s16): Remove.
37293 (vqdmulltq_m_n_s32): Remove.
37294 (vqdmulltq_m_n_s16): Remove.
37295 (vqdmulltq_m_s32): Remove.
37296 (vqdmulltq_m_s16): Remove.
37297 (__arm_vqdmulltq_s16): Remove.
37298 (__arm_vqdmulltq_n_s16): Remove.
37299 (__arm_vqdmullbq_s16): Remove.
37300 (__arm_vqdmullbq_n_s16): Remove.
37301 (__arm_vqdmulltq_s32): Remove.
37302 (__arm_vqdmulltq_n_s32): Remove.
37303 (__arm_vqdmullbq_s32): Remove.
37304 (__arm_vqdmullbq_n_s32): Remove.
37305 (__arm_vqdmullbq_m_n_s32): Remove.
37306 (__arm_vqdmullbq_m_n_s16): Remove.
37307 (__arm_vqdmullbq_m_s32): Remove.
37308 (__arm_vqdmullbq_m_s16): Remove.
37309 (__arm_vqdmulltq_m_n_s32): Remove.
37310 (__arm_vqdmulltq_m_n_s16): Remove.
37311 (__arm_vqdmulltq_m_s32): Remove.
37312 (__arm_vqdmulltq_m_s16): Remove.
37313 (__arm_vqdmulltq): Remove.
37314 (__arm_vqdmullbq): Remove.
37315 (__arm_vqdmullbq_m): Remove.
37316 (__arm_vqdmulltq_m): Remove.
37318 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37320 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
37321 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
37322 (mve_insn): Add vqdmullb, vqdmullt.
37323 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
37324 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
37326 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
37327 (mve_vqdmulltq_n_s<mode>): Merge into ...
37328 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37329 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
37330 (@mve_<mve_insn>q_<supf><mode>): ... this.
37331 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
37333 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
37334 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
37335 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
37337 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
37339 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
37340 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
37342 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
37344 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
37345 Drop unused parameter.
37346 (riscv_select_multilib): Ditto.
37347 (riscv_compute_multilib): Update call site of
37348 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
37350 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
37352 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
37353 * config/riscv/riscv-protos.h (expand_vec_init): New function.
37354 * config/riscv/riscv-v.cc (class rvv_builder): New class.
37355 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
37356 (rvv_builder::get_merged_repeating_sequence): Ditto.
37357 (expand_vector_init_insert_elems): Ditto.
37358 (expand_vec_init): Ditto.
37359 * config/riscv/vector-iterators.md: New attribute.
37361 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37363 * config/rs6000/rs6000-builtins.def
37364 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
37366 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
37367 xsiexpdpf to xsiexpdpf_di.
37368 * config/rs6000/vsx.md (xsiexpdp): Rename to...
37369 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
37370 replace TARGET_64BIT with TARGET_POWERPC64.
37371 (xsiexpdpf): Rename to...
37372 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
37373 replace TARGET_64BIT with TARGET_POWERPC64.
37375 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37377 * config/rs6000/rs6000-builtins.def
37378 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
37380 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
37383 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
37385 * config/rs6000/rs6000-builtins.def
37386 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
37387 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
37389 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
37390 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
37391 TARGET_64BIT check.
37392 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
37393 requirement when it has a 64-bit argument.
37395 2023-05-12 Pan Li <pan2.li@intel.com>
37396 Richard Sandiford <richard.sandiford@arm.com>
37397 Richard Biener <rguenther@suse.de>
37398 Jakub Jelinek <jakub@redhat.com>
37400 * mux-utils.h: Add overload operator == and != for pointer_mux.
37401 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
37402 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
37403 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
37404 (dv_as_decl): Ditto.
37405 (dv_as_opaque): Removed due to unnecessary.
37406 (struct variable_hasher): Take decl_or_value as compare_type.
37407 (variable_hasher::equal): Diito.
37408 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
37409 (dv_from_value): Ditto.
37410 (attrs_list_member): Ditto.
37411 (vars_copy): Ditto.
37412 (var_reg_decl_set): Ditto.
37413 (var_reg_delete_and_set): Ditto.
37414 (find_loc_in_1pdv): Ditto.
37415 (canonicalize_values_star): Ditto.
37416 (variable_post_merge_new_vals): Ditto.
37417 (dump_onepart_variable_differences): Ditto.
37418 (variable_different_p): Ditto.
37419 (set_slot_part): Ditto.
37420 (clobber_slot_part): Ditto.
37421 (clobber_variable_part): Ditto.
37423 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
37425 * match.pd: simplify vector shift + bit_and + multiply.
37427 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37429 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
37430 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37431 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
37432 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37433 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
37434 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
37435 * config/arm/arm-mve-builtins.cc
37436 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
37437 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
37438 * config/arm/arm_mve.h (vqrdmlashq): Remove.
37439 (vqrdmlahq): Remove.
37440 (vqdmlashq): Remove.
37441 (vqdmlahq): Remove.
37445 (vmlasq_m): Remove.
37446 (vqdmlashq_m): Remove.
37447 (vqdmlahq_m): Remove.
37448 (vqrdmlahq_m): Remove.
37449 (vqrdmlashq_m): Remove.
37450 (vmlasq_n_u8): Remove.
37451 (vmlaq_n_u8): Remove.
37452 (vqrdmlashq_n_s8): Remove.
37453 (vqrdmlahq_n_s8): Remove.
37454 (vqdmlahq_n_s8): Remove.
37455 (vqdmlashq_n_s8): Remove.
37456 (vmlasq_n_s8): Remove.
37457 (vmlaq_n_s8): Remove.
37458 (vmlasq_n_u16): Remove.
37459 (vmlaq_n_u16): Remove.
37460 (vqrdmlashq_n_s16): Remove.
37461 (vqrdmlahq_n_s16): Remove.
37462 (vqdmlashq_n_s16): Remove.
37463 (vqdmlahq_n_s16): Remove.
37464 (vmlasq_n_s16): Remove.
37465 (vmlaq_n_s16): Remove.
37466 (vmlasq_n_u32): Remove.
37467 (vmlaq_n_u32): Remove.
37468 (vqrdmlashq_n_s32): Remove.
37469 (vqrdmlahq_n_s32): Remove.
37470 (vqdmlashq_n_s32): Remove.
37471 (vqdmlahq_n_s32): Remove.
37472 (vmlasq_n_s32): Remove.
37473 (vmlaq_n_s32): Remove.
37474 (vmlaq_m_n_s8): Remove.
37475 (vmlaq_m_n_s32): Remove.
37476 (vmlaq_m_n_s16): Remove.
37477 (vmlaq_m_n_u8): Remove.
37478 (vmlaq_m_n_u32): Remove.
37479 (vmlaq_m_n_u16): Remove.
37480 (vmlasq_m_n_s8): Remove.
37481 (vmlasq_m_n_s32): Remove.
37482 (vmlasq_m_n_s16): Remove.
37483 (vmlasq_m_n_u8): Remove.
37484 (vmlasq_m_n_u32): Remove.
37485 (vmlasq_m_n_u16): Remove.
37486 (vqdmlashq_m_n_s8): Remove.
37487 (vqdmlashq_m_n_s32): Remove.
37488 (vqdmlashq_m_n_s16): Remove.
37489 (vqdmlahq_m_n_s8): Remove.
37490 (vqdmlahq_m_n_s32): Remove.
37491 (vqdmlahq_m_n_s16): Remove.
37492 (vqrdmlahq_m_n_s8): Remove.
37493 (vqrdmlahq_m_n_s32): Remove.
37494 (vqrdmlahq_m_n_s16): Remove.
37495 (vqrdmlashq_m_n_s8): Remove.
37496 (vqrdmlashq_m_n_s32): Remove.
37497 (vqrdmlashq_m_n_s16): Remove.
37498 (__arm_vmlasq_n_u8): Remove.
37499 (__arm_vmlaq_n_u8): Remove.
37500 (__arm_vqrdmlashq_n_s8): Remove.
37501 (__arm_vqdmlashq_n_s8): Remove.
37502 (__arm_vqrdmlahq_n_s8): Remove.
37503 (__arm_vqdmlahq_n_s8): Remove.
37504 (__arm_vmlasq_n_s8): Remove.
37505 (__arm_vmlaq_n_s8): Remove.
37506 (__arm_vmlasq_n_u16): Remove.
37507 (__arm_vmlaq_n_u16): Remove.
37508 (__arm_vqrdmlashq_n_s16): Remove.
37509 (__arm_vqdmlashq_n_s16): Remove.
37510 (__arm_vqrdmlahq_n_s16): Remove.
37511 (__arm_vqdmlahq_n_s16): Remove.
37512 (__arm_vmlasq_n_s16): Remove.
37513 (__arm_vmlaq_n_s16): Remove.
37514 (__arm_vmlasq_n_u32): Remove.
37515 (__arm_vmlaq_n_u32): Remove.
37516 (__arm_vqrdmlashq_n_s32): Remove.
37517 (__arm_vqdmlashq_n_s32): Remove.
37518 (__arm_vqrdmlahq_n_s32): Remove.
37519 (__arm_vqdmlahq_n_s32): Remove.
37520 (__arm_vmlasq_n_s32): Remove.
37521 (__arm_vmlaq_n_s32): Remove.
37522 (__arm_vmlaq_m_n_s8): Remove.
37523 (__arm_vmlaq_m_n_s32): Remove.
37524 (__arm_vmlaq_m_n_s16): Remove.
37525 (__arm_vmlaq_m_n_u8): Remove.
37526 (__arm_vmlaq_m_n_u32): Remove.
37527 (__arm_vmlaq_m_n_u16): Remove.
37528 (__arm_vmlasq_m_n_s8): Remove.
37529 (__arm_vmlasq_m_n_s32): Remove.
37530 (__arm_vmlasq_m_n_s16): Remove.
37531 (__arm_vmlasq_m_n_u8): Remove.
37532 (__arm_vmlasq_m_n_u32): Remove.
37533 (__arm_vmlasq_m_n_u16): Remove.
37534 (__arm_vqdmlahq_m_n_s8): Remove.
37535 (__arm_vqdmlahq_m_n_s32): Remove.
37536 (__arm_vqdmlahq_m_n_s16): Remove.
37537 (__arm_vqrdmlahq_m_n_s8): Remove.
37538 (__arm_vqrdmlahq_m_n_s32): Remove.
37539 (__arm_vqrdmlahq_m_n_s16): Remove.
37540 (__arm_vqrdmlashq_m_n_s8): Remove.
37541 (__arm_vqrdmlashq_m_n_s32): Remove.
37542 (__arm_vqrdmlashq_m_n_s16): Remove.
37543 (__arm_vqdmlashq_m_n_s8): Remove.
37544 (__arm_vqdmlashq_m_n_s16): Remove.
37545 (__arm_vqdmlashq_m_n_s32): Remove.
37546 (__arm_vmlasq): Remove.
37547 (__arm_vmlaq): Remove.
37548 (__arm_vqrdmlashq): Remove.
37549 (__arm_vqdmlashq): Remove.
37550 (__arm_vqrdmlahq): Remove.
37551 (__arm_vqdmlahq): Remove.
37552 (__arm_vmlaq_m): Remove.
37553 (__arm_vmlasq_m): Remove.
37554 (__arm_vqdmlahq_m): Remove.
37555 (__arm_vqrdmlahq_m): Remove.
37556 (__arm_vqrdmlashq_m): Remove.
37557 (__arm_vqdmlashq_m): Remove.
37559 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37561 * config/arm/iterators.md (MVE_VMLxQ_N): New.
37562 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
37564 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
37566 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
37567 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
37568 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
37569 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
37570 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
37572 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37574 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
37575 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
37577 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37579 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
37580 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37581 (vqrdmlsdhxq): New.
37582 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
37583 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37584 (vqrdmlsdhxq): New.
37585 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
37586 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
37587 (vqrdmlsdhxq): New.
37588 * config/arm/arm-mve-builtins.cc
37589 (function_instance::has_inactive_argument): Handle vqrdmladhq,
37590 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
37591 vqdmlsdhq, vqdmlsdhxq.
37592 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
37593 (vqrdmlsdhq): Remove.
37594 (vqrdmladhxq): Remove.
37595 (vqrdmladhq): Remove.
37596 (vqdmlsdhxq): Remove.
37597 (vqdmlsdhq): Remove.
37598 (vqdmladhxq): Remove.
37599 (vqdmladhq): Remove.
37600 (vqdmladhq_m): Remove.
37601 (vqdmladhxq_m): Remove.
37602 (vqdmlsdhq_m): Remove.
37603 (vqdmlsdhxq_m): Remove.
37604 (vqrdmladhq_m): Remove.
37605 (vqrdmladhxq_m): Remove.
37606 (vqrdmlsdhq_m): Remove.
37607 (vqrdmlsdhxq_m): Remove.
37608 (vqrdmlsdhxq_s8): Remove.
37609 (vqrdmlsdhq_s8): Remove.
37610 (vqrdmladhxq_s8): Remove.
37611 (vqrdmladhq_s8): Remove.
37612 (vqdmlsdhxq_s8): Remove.
37613 (vqdmlsdhq_s8): Remove.
37614 (vqdmladhxq_s8): Remove.
37615 (vqdmladhq_s8): Remove.
37616 (vqrdmlsdhxq_s16): Remove.
37617 (vqrdmlsdhq_s16): Remove.
37618 (vqrdmladhxq_s16): Remove.
37619 (vqrdmladhq_s16): Remove.
37620 (vqdmlsdhxq_s16): Remove.
37621 (vqdmlsdhq_s16): Remove.
37622 (vqdmladhxq_s16): Remove.
37623 (vqdmladhq_s16): Remove.
37624 (vqrdmlsdhxq_s32): Remove.
37625 (vqrdmlsdhq_s32): Remove.
37626 (vqrdmladhxq_s32): Remove.
37627 (vqrdmladhq_s32): Remove.
37628 (vqdmlsdhxq_s32): Remove.
37629 (vqdmlsdhq_s32): Remove.
37630 (vqdmladhxq_s32): Remove.
37631 (vqdmladhq_s32): Remove.
37632 (vqdmladhq_m_s8): Remove.
37633 (vqdmladhq_m_s32): Remove.
37634 (vqdmladhq_m_s16): Remove.
37635 (vqdmladhxq_m_s8): Remove.
37636 (vqdmladhxq_m_s32): Remove.
37637 (vqdmladhxq_m_s16): Remove.
37638 (vqdmlsdhq_m_s8): Remove.
37639 (vqdmlsdhq_m_s32): Remove.
37640 (vqdmlsdhq_m_s16): Remove.
37641 (vqdmlsdhxq_m_s8): Remove.
37642 (vqdmlsdhxq_m_s32): Remove.
37643 (vqdmlsdhxq_m_s16): Remove.
37644 (vqrdmladhq_m_s8): Remove.
37645 (vqrdmladhq_m_s32): Remove.
37646 (vqrdmladhq_m_s16): Remove.
37647 (vqrdmladhxq_m_s8): Remove.
37648 (vqrdmladhxq_m_s32): Remove.
37649 (vqrdmladhxq_m_s16): Remove.
37650 (vqrdmlsdhq_m_s8): Remove.
37651 (vqrdmlsdhq_m_s32): Remove.
37652 (vqrdmlsdhq_m_s16): Remove.
37653 (vqrdmlsdhxq_m_s8): Remove.
37654 (vqrdmlsdhxq_m_s32): Remove.
37655 (vqrdmlsdhxq_m_s16): Remove.
37656 (__arm_vqrdmlsdhxq_s8): Remove.
37657 (__arm_vqrdmlsdhq_s8): Remove.
37658 (__arm_vqrdmladhxq_s8): Remove.
37659 (__arm_vqrdmladhq_s8): Remove.
37660 (__arm_vqdmlsdhxq_s8): Remove.
37661 (__arm_vqdmlsdhq_s8): Remove.
37662 (__arm_vqdmladhxq_s8): Remove.
37663 (__arm_vqdmladhq_s8): Remove.
37664 (__arm_vqrdmlsdhxq_s16): Remove.
37665 (__arm_vqrdmlsdhq_s16): Remove.
37666 (__arm_vqrdmladhxq_s16): Remove.
37667 (__arm_vqrdmladhq_s16): Remove.
37668 (__arm_vqdmlsdhxq_s16): Remove.
37669 (__arm_vqdmlsdhq_s16): Remove.
37670 (__arm_vqdmladhxq_s16): Remove.
37671 (__arm_vqdmladhq_s16): Remove.
37672 (__arm_vqrdmlsdhxq_s32): Remove.
37673 (__arm_vqrdmlsdhq_s32): Remove.
37674 (__arm_vqrdmladhxq_s32): Remove.
37675 (__arm_vqrdmladhq_s32): Remove.
37676 (__arm_vqdmlsdhxq_s32): Remove.
37677 (__arm_vqdmlsdhq_s32): Remove.
37678 (__arm_vqdmladhxq_s32): Remove.
37679 (__arm_vqdmladhq_s32): Remove.
37680 (__arm_vqdmladhq_m_s8): Remove.
37681 (__arm_vqdmladhq_m_s32): Remove.
37682 (__arm_vqdmladhq_m_s16): Remove.
37683 (__arm_vqdmladhxq_m_s8): Remove.
37684 (__arm_vqdmladhxq_m_s32): Remove.
37685 (__arm_vqdmladhxq_m_s16): Remove.
37686 (__arm_vqdmlsdhq_m_s8): Remove.
37687 (__arm_vqdmlsdhq_m_s32): Remove.
37688 (__arm_vqdmlsdhq_m_s16): Remove.
37689 (__arm_vqdmlsdhxq_m_s8): Remove.
37690 (__arm_vqdmlsdhxq_m_s32): Remove.
37691 (__arm_vqdmlsdhxq_m_s16): Remove.
37692 (__arm_vqrdmladhq_m_s8): Remove.
37693 (__arm_vqrdmladhq_m_s32): Remove.
37694 (__arm_vqrdmladhq_m_s16): Remove.
37695 (__arm_vqrdmladhxq_m_s8): Remove.
37696 (__arm_vqrdmladhxq_m_s32): Remove.
37697 (__arm_vqrdmladhxq_m_s16): Remove.
37698 (__arm_vqrdmlsdhq_m_s8): Remove.
37699 (__arm_vqrdmlsdhq_m_s32): Remove.
37700 (__arm_vqrdmlsdhq_m_s16): Remove.
37701 (__arm_vqrdmlsdhxq_m_s8): Remove.
37702 (__arm_vqrdmlsdhxq_m_s32): Remove.
37703 (__arm_vqrdmlsdhxq_m_s16): Remove.
37704 (__arm_vqrdmlsdhxq): Remove.
37705 (__arm_vqrdmlsdhq): Remove.
37706 (__arm_vqrdmladhxq): Remove.
37707 (__arm_vqrdmladhq): Remove.
37708 (__arm_vqdmlsdhxq): Remove.
37709 (__arm_vqdmlsdhq): Remove.
37710 (__arm_vqdmladhxq): Remove.
37711 (__arm_vqdmladhq): Remove.
37712 (__arm_vqdmladhq_m): Remove.
37713 (__arm_vqdmladhxq_m): Remove.
37714 (__arm_vqdmlsdhq_m): Remove.
37715 (__arm_vqdmlsdhxq_m): Remove.
37716 (__arm_vqrdmladhq_m): Remove.
37717 (__arm_vqrdmladhxq_m): Remove.
37718 (__arm_vqrdmlsdhq_m): Remove.
37719 (__arm_vqrdmlsdhxq_m): Remove.
37721 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37723 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
37724 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
37725 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
37726 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
37727 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
37728 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
37729 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
37730 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
37731 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
37732 (mve_vqdmladhq_s<mode>): Merge into ...
37733 (@mve_<mve_insn>q_<supf><mode>): ... this.
37735 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37737 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
37738 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
37740 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37742 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
37743 (vmlsldavaq, vmlsldavaxq): New.
37744 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
37745 (vmlsldavaq, vmlsldavaxq): New.
37746 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
37747 (vmlsldavaq, vmlsldavaxq): New.
37748 * config/arm/arm_mve.h (vmlaldavaq): Remove.
37749 (vmlaldavaxq): Remove.
37750 (vmlsldavaq): Remove.
37751 (vmlsldavaxq): Remove.
37752 (vmlaldavaq_p): Remove.
37753 (vmlaldavaxq_p): Remove.
37754 (vmlsldavaq_p): Remove.
37755 (vmlsldavaxq_p): Remove.
37756 (vmlaldavaq_s16): Remove.
37757 (vmlaldavaxq_s16): Remove.
37758 (vmlsldavaq_s16): Remove.
37759 (vmlsldavaxq_s16): Remove.
37760 (vmlaldavaq_u16): Remove.
37761 (vmlaldavaq_s32): Remove.
37762 (vmlaldavaxq_s32): Remove.
37763 (vmlsldavaq_s32): Remove.
37764 (vmlsldavaxq_s32): Remove.
37765 (vmlaldavaq_u32): Remove.
37766 (vmlaldavaq_p_s32): Remove.
37767 (vmlaldavaq_p_s16): Remove.
37768 (vmlaldavaq_p_u32): Remove.
37769 (vmlaldavaq_p_u16): Remove.
37770 (vmlaldavaxq_p_s32): Remove.
37771 (vmlaldavaxq_p_s16): Remove.
37772 (vmlsldavaq_p_s32): Remove.
37773 (vmlsldavaq_p_s16): Remove.
37774 (vmlsldavaxq_p_s32): Remove.
37775 (vmlsldavaxq_p_s16): Remove.
37776 (__arm_vmlaldavaq_s16): Remove.
37777 (__arm_vmlaldavaxq_s16): Remove.
37778 (__arm_vmlsldavaq_s16): Remove.
37779 (__arm_vmlsldavaxq_s16): Remove.
37780 (__arm_vmlaldavaq_u16): Remove.
37781 (__arm_vmlaldavaq_s32): Remove.
37782 (__arm_vmlaldavaxq_s32): Remove.
37783 (__arm_vmlsldavaq_s32): Remove.
37784 (__arm_vmlsldavaxq_s32): Remove.
37785 (__arm_vmlaldavaq_u32): Remove.
37786 (__arm_vmlaldavaq_p_s32): Remove.
37787 (__arm_vmlaldavaq_p_s16): Remove.
37788 (__arm_vmlaldavaq_p_u32): Remove.
37789 (__arm_vmlaldavaq_p_u16): Remove.
37790 (__arm_vmlaldavaxq_p_s32): Remove.
37791 (__arm_vmlaldavaxq_p_s16): Remove.
37792 (__arm_vmlsldavaq_p_s32): Remove.
37793 (__arm_vmlsldavaq_p_s16): Remove.
37794 (__arm_vmlsldavaxq_p_s32): Remove.
37795 (__arm_vmlsldavaxq_p_s16): Remove.
37796 (__arm_vmlaldavaq): Remove.
37797 (__arm_vmlaldavaxq): Remove.
37798 (__arm_vmlsldavaq): Remove.
37799 (__arm_vmlsldavaxq): Remove.
37800 (__arm_vmlaldavaq_p): Remove.
37801 (__arm_vmlaldavaxq_p): Remove.
37802 (__arm_vmlsldavaq_p): Remove.
37803 (__arm_vmlsldavaxq_p): Remove.
37805 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37807 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
37809 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
37810 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
37811 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
37812 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
37813 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
37814 (mve_vmlaldavaxq_s<mode>): Merge into ...
37815 (@mve_<mve_insn>q_<supf><mode>): ... this.
37816 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
37817 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
37819 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37821 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37823 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
37824 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
37826 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37828 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
37829 (vrmlsldavhq, vrmlsldavhxq): New.
37830 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
37831 (vrmlsldavhq, vrmlsldavhxq): New.
37832 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
37833 (vrmlsldavhq, vrmlsldavhxq): New.
37834 * config/arm/arm-mve-builtins-functions.h
37835 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
37836 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
37837 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
37838 (vrmlsldavhxq): Remove.
37839 (vrmlsldavhq): Remove.
37840 (vrmlaldavhxq): Remove.
37841 (vrmlaldavhq_p): Remove.
37842 (vrmlaldavhxq_p): Remove.
37843 (vrmlsldavhq_p): Remove.
37844 (vrmlsldavhxq_p): Remove.
37845 (vrmlaldavhq_u32): Remove.
37846 (vrmlsldavhxq_s32): Remove.
37847 (vrmlsldavhq_s32): Remove.
37848 (vrmlaldavhxq_s32): Remove.
37849 (vrmlaldavhq_s32): Remove.
37850 (vrmlaldavhq_p_s32): Remove.
37851 (vrmlaldavhxq_p_s32): Remove.
37852 (vrmlsldavhq_p_s32): Remove.
37853 (vrmlsldavhxq_p_s32): Remove.
37854 (vrmlaldavhq_p_u32): Remove.
37855 (__arm_vrmlaldavhq_u32): Remove.
37856 (__arm_vrmlsldavhxq_s32): Remove.
37857 (__arm_vrmlsldavhq_s32): Remove.
37858 (__arm_vrmlaldavhxq_s32): Remove.
37859 (__arm_vrmlaldavhq_s32): Remove.
37860 (__arm_vrmlaldavhq_p_s32): Remove.
37861 (__arm_vrmlaldavhxq_p_s32): Remove.
37862 (__arm_vrmlsldavhq_p_s32): Remove.
37863 (__arm_vrmlsldavhxq_p_s32): Remove.
37864 (__arm_vrmlaldavhq_p_u32): Remove.
37865 (__arm_vrmlaldavhq): Remove.
37866 (__arm_vrmlsldavhxq): Remove.
37867 (__arm_vrmlsldavhq): Remove.
37868 (__arm_vrmlaldavhxq): Remove.
37869 (__arm_vrmlaldavhq_p): Remove.
37870 (__arm_vrmlaldavhxq_p): Remove.
37871 (__arm_vrmlsldavhq_p): Remove.
37872 (__arm_vrmlsldavhxq_p): Remove.
37874 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37876 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
37878 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
37879 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
37880 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
37881 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
37882 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
37883 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
37884 (@mve_<mve_insn>q_<supf>v4si): ... this.
37885 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
37886 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
37888 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
37890 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37892 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
37893 (vmlsldavq, vmlsldavxq): New.
37894 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
37895 (vmlsldavq, vmlsldavxq): New.
37896 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
37897 (vmlsldavq, vmlsldavxq): New.
37898 * config/arm/arm_mve.h (vmlaldavq): Remove.
37899 (vmlsldavxq): Remove.
37900 (vmlsldavq): Remove.
37901 (vmlaldavxq): Remove.
37902 (vmlaldavq_p): Remove.
37903 (vmlaldavxq_p): Remove.
37904 (vmlsldavq_p): Remove.
37905 (vmlsldavxq_p): Remove.
37906 (vmlaldavq_u16): Remove.
37907 (vmlsldavxq_s16): Remove.
37908 (vmlsldavq_s16): Remove.
37909 (vmlaldavxq_s16): Remove.
37910 (vmlaldavq_s16): Remove.
37911 (vmlaldavq_u32): Remove.
37912 (vmlsldavxq_s32): Remove.
37913 (vmlsldavq_s32): Remove.
37914 (vmlaldavxq_s32): Remove.
37915 (vmlaldavq_s32): Remove.
37916 (vmlaldavq_p_s16): Remove.
37917 (vmlaldavxq_p_s16): Remove.
37918 (vmlsldavq_p_s16): Remove.
37919 (vmlsldavxq_p_s16): Remove.
37920 (vmlaldavq_p_u16): Remove.
37921 (vmlaldavq_p_s32): Remove.
37922 (vmlaldavxq_p_s32): Remove.
37923 (vmlsldavq_p_s32): Remove.
37924 (vmlsldavxq_p_s32): Remove.
37925 (vmlaldavq_p_u32): Remove.
37926 (__arm_vmlaldavq_u16): Remove.
37927 (__arm_vmlsldavxq_s16): Remove.
37928 (__arm_vmlsldavq_s16): Remove.
37929 (__arm_vmlaldavxq_s16): Remove.
37930 (__arm_vmlaldavq_s16): Remove.
37931 (__arm_vmlaldavq_u32): Remove.
37932 (__arm_vmlsldavxq_s32): Remove.
37933 (__arm_vmlsldavq_s32): Remove.
37934 (__arm_vmlaldavxq_s32): Remove.
37935 (__arm_vmlaldavq_s32): Remove.
37936 (__arm_vmlaldavq_p_s16): Remove.
37937 (__arm_vmlaldavxq_p_s16): Remove.
37938 (__arm_vmlsldavq_p_s16): Remove.
37939 (__arm_vmlsldavxq_p_s16): Remove.
37940 (__arm_vmlaldavq_p_u16): Remove.
37941 (__arm_vmlaldavq_p_s32): Remove.
37942 (__arm_vmlaldavxq_p_s32): Remove.
37943 (__arm_vmlsldavq_p_s32): Remove.
37944 (__arm_vmlsldavxq_p_s32): Remove.
37945 (__arm_vmlaldavq_p_u32): Remove.
37946 (__arm_vmlaldavq): Remove.
37947 (__arm_vmlsldavxq): Remove.
37948 (__arm_vmlsldavq): Remove.
37949 (__arm_vmlaldavxq): Remove.
37950 (__arm_vmlaldavq_p): Remove.
37951 (__arm_vmlaldavxq_p): Remove.
37952 (__arm_vmlsldavq_p): Remove.
37953 (__arm_vmlsldavxq_p): Remove.
37955 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37957 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
37958 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
37959 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
37960 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
37961 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
37962 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
37963 (mve_vmlsldavxq_s<mode>): Merge into ...
37964 (@mve_<mve_insn>q_<supf><mode>): ... this.
37965 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
37966 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
37968 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
37970 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37972 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
37973 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
37975 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
37977 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
37978 * config/arm/arm-mve-builtins-base.def (vabavq): New.
37979 * config/arm/arm-mve-builtins-base.h (vabavq): New.
37980 * config/arm/arm_mve.h (vabavq): Remove.
37981 (vabavq_p): Remove.
37982 (vabavq_s8): Remove.
37983 (vabavq_s16): Remove.
37984 (vabavq_s32): Remove.
37985 (vabavq_u8): Remove.
37986 (vabavq_u16): Remove.
37987 (vabavq_u32): Remove.
37988 (vabavq_p_s8): Remove.
37989 (vabavq_p_u8): Remove.
37990 (vabavq_p_s16): Remove.
37991 (vabavq_p_u16): Remove.
37992 (vabavq_p_s32): Remove.
37993 (vabavq_p_u32): Remove.
37994 (__arm_vabavq_s8): Remove.
37995 (__arm_vabavq_s16): Remove.
37996 (__arm_vabavq_s32): Remove.
37997 (__arm_vabavq_u8): Remove.
37998 (__arm_vabavq_u16): Remove.
37999 (__arm_vabavq_u32): Remove.
38000 (__arm_vabavq_p_s8): Remove.
38001 (__arm_vabavq_p_u8): Remove.
38002 (__arm_vabavq_p_s16): Remove.
38003 (__arm_vabavq_p_u16): Remove.
38004 (__arm_vabavq_p_s32): Remove.
38005 (__arm_vabavq_p_u32): Remove.
38006 (__arm_vabavq): Remove.
38007 (__arm_vabavq_p): Remove.
38009 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38011 * config/arm/iterators.md (mve_insn): Add vabav.
38012 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
38013 (@mve_<mve_insn>q_<supf><mode>): ... this,.
38014 (mve_vabavq_p_<supf><mode>): Rename into ...
38015 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
38017 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38019 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
38020 (vmlsdavaq, vmlsdavaxq): New.
38021 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
38022 (vmlsdavaq, vmlsdavaxq): New.
38023 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
38024 (vmlsdavaq, vmlsdavaxq): New.
38025 * config/arm/arm_mve.h (vmladavaq): Remove.
38026 (vmlsdavaxq): Remove.
38027 (vmlsdavaq): Remove.
38028 (vmladavaxq): Remove.
38029 (vmladavaq_p): Remove.
38030 (vmladavaxq_p): Remove.
38031 (vmlsdavaq_p): Remove.
38032 (vmlsdavaxq_p): Remove.
38033 (vmladavaq_u8): Remove.
38034 (vmlsdavaxq_s8): Remove.
38035 (vmlsdavaq_s8): Remove.
38036 (vmladavaxq_s8): Remove.
38037 (vmladavaq_s8): Remove.
38038 (vmladavaq_u16): Remove.
38039 (vmlsdavaxq_s16): Remove.
38040 (vmlsdavaq_s16): Remove.
38041 (vmladavaxq_s16): Remove.
38042 (vmladavaq_s16): Remove.
38043 (vmladavaq_u32): Remove.
38044 (vmlsdavaxq_s32): Remove.
38045 (vmlsdavaq_s32): Remove.
38046 (vmladavaxq_s32): Remove.
38047 (vmladavaq_s32): Remove.
38048 (vmladavaq_p_s8): Remove.
38049 (vmladavaq_p_s32): Remove.
38050 (vmladavaq_p_s16): Remove.
38051 (vmladavaq_p_u8): Remove.
38052 (vmladavaq_p_u32): Remove.
38053 (vmladavaq_p_u16): Remove.
38054 (vmladavaxq_p_s8): Remove.
38055 (vmladavaxq_p_s32): Remove.
38056 (vmladavaxq_p_s16): Remove.
38057 (vmlsdavaq_p_s8): Remove.
38058 (vmlsdavaq_p_s32): Remove.
38059 (vmlsdavaq_p_s16): Remove.
38060 (vmlsdavaxq_p_s8): Remove.
38061 (vmlsdavaxq_p_s32): Remove.
38062 (vmlsdavaxq_p_s16): Remove.
38063 (__arm_vmladavaq_u8): Remove.
38064 (__arm_vmlsdavaxq_s8): Remove.
38065 (__arm_vmlsdavaq_s8): Remove.
38066 (__arm_vmladavaxq_s8): Remove.
38067 (__arm_vmladavaq_s8): Remove.
38068 (__arm_vmladavaq_u16): Remove.
38069 (__arm_vmlsdavaxq_s16): Remove.
38070 (__arm_vmlsdavaq_s16): Remove.
38071 (__arm_vmladavaxq_s16): Remove.
38072 (__arm_vmladavaq_s16): Remove.
38073 (__arm_vmladavaq_u32): Remove.
38074 (__arm_vmlsdavaxq_s32): Remove.
38075 (__arm_vmlsdavaq_s32): Remove.
38076 (__arm_vmladavaxq_s32): Remove.
38077 (__arm_vmladavaq_s32): Remove.
38078 (__arm_vmladavaq_p_s8): Remove.
38079 (__arm_vmladavaq_p_s32): Remove.
38080 (__arm_vmladavaq_p_s16): Remove.
38081 (__arm_vmladavaq_p_u8): Remove.
38082 (__arm_vmladavaq_p_u32): Remove.
38083 (__arm_vmladavaq_p_u16): Remove.
38084 (__arm_vmladavaxq_p_s8): Remove.
38085 (__arm_vmladavaxq_p_s32): Remove.
38086 (__arm_vmladavaxq_p_s16): Remove.
38087 (__arm_vmlsdavaq_p_s8): Remove.
38088 (__arm_vmlsdavaq_p_s32): Remove.
38089 (__arm_vmlsdavaq_p_s16): Remove.
38090 (__arm_vmlsdavaxq_p_s8): Remove.
38091 (__arm_vmlsdavaxq_p_s32): Remove.
38092 (__arm_vmlsdavaxq_p_s16): Remove.
38093 (__arm_vmladavaq): Remove.
38094 (__arm_vmlsdavaxq): Remove.
38095 (__arm_vmlsdavaq): Remove.
38096 (__arm_vmladavaxq): Remove.
38097 (__arm_vmladavaq_p): Remove.
38098 (__arm_vmladavaxq_p): Remove.
38099 (__arm_vmlsdavaq_p): Remove.
38100 (__arm_vmlsdavaxq_p): Remove.
38102 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38104 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
38105 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
38107 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38109 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
38110 (vmlsdavq, vmlsdavxq): New.
38111 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
38112 (vmlsdavq, vmlsdavxq): New.
38113 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
38114 (vmlsdavq, vmlsdavxq): New.
38115 * config/arm/arm_mve.h (vmladavq): Remove.
38116 (vmlsdavxq): Remove.
38117 (vmlsdavq): Remove.
38118 (vmladavxq): Remove.
38119 (vmladavq_p): Remove.
38120 (vmlsdavxq_p): Remove.
38121 (vmlsdavq_p): Remove.
38122 (vmladavxq_p): Remove.
38123 (vmladavq_u8): Remove.
38124 (vmlsdavxq_s8): Remove.
38125 (vmlsdavq_s8): Remove.
38126 (vmladavxq_s8): Remove.
38127 (vmladavq_s8): Remove.
38128 (vmladavq_u16): Remove.
38129 (vmlsdavxq_s16): Remove.
38130 (vmlsdavq_s16): Remove.
38131 (vmladavxq_s16): Remove.
38132 (vmladavq_s16): Remove.
38133 (vmladavq_u32): Remove.
38134 (vmlsdavxq_s32): Remove.
38135 (vmlsdavq_s32): Remove.
38136 (vmladavxq_s32): Remove.
38137 (vmladavq_s32): Remove.
38138 (vmladavq_p_u8): Remove.
38139 (vmlsdavxq_p_s8): Remove.
38140 (vmlsdavq_p_s8): Remove.
38141 (vmladavxq_p_s8): Remove.
38142 (vmladavq_p_s8): Remove.
38143 (vmladavq_p_u16): Remove.
38144 (vmlsdavxq_p_s16): Remove.
38145 (vmlsdavq_p_s16): Remove.
38146 (vmladavxq_p_s16): Remove.
38147 (vmladavq_p_s16): Remove.
38148 (vmladavq_p_u32): Remove.
38149 (vmlsdavxq_p_s32): Remove.
38150 (vmlsdavq_p_s32): Remove.
38151 (vmladavxq_p_s32): Remove.
38152 (vmladavq_p_s32): Remove.
38153 (__arm_vmladavq_u8): Remove.
38154 (__arm_vmlsdavxq_s8): Remove.
38155 (__arm_vmlsdavq_s8): Remove.
38156 (__arm_vmladavxq_s8): Remove.
38157 (__arm_vmladavq_s8): Remove.
38158 (__arm_vmladavq_u16): Remove.
38159 (__arm_vmlsdavxq_s16): Remove.
38160 (__arm_vmlsdavq_s16): Remove.
38161 (__arm_vmladavxq_s16): Remove.
38162 (__arm_vmladavq_s16): Remove.
38163 (__arm_vmladavq_u32): Remove.
38164 (__arm_vmlsdavxq_s32): Remove.
38165 (__arm_vmlsdavq_s32): Remove.
38166 (__arm_vmladavxq_s32): Remove.
38167 (__arm_vmladavq_s32): Remove.
38168 (__arm_vmladavq_p_u8): Remove.
38169 (__arm_vmlsdavxq_p_s8): Remove.
38170 (__arm_vmlsdavq_p_s8): Remove.
38171 (__arm_vmladavxq_p_s8): Remove.
38172 (__arm_vmladavq_p_s8): Remove.
38173 (__arm_vmladavq_p_u16): Remove.
38174 (__arm_vmlsdavxq_p_s16): Remove.
38175 (__arm_vmlsdavq_p_s16): Remove.
38176 (__arm_vmladavxq_p_s16): Remove.
38177 (__arm_vmladavq_p_s16): Remove.
38178 (__arm_vmladavq_p_u32): Remove.
38179 (__arm_vmlsdavxq_p_s32): Remove.
38180 (__arm_vmlsdavq_p_s32): Remove.
38181 (__arm_vmladavxq_p_s32): Remove.
38182 (__arm_vmladavq_p_s32): Remove.
38183 (__arm_vmladavq): Remove.
38184 (__arm_vmlsdavxq): Remove.
38185 (__arm_vmlsdavq): Remove.
38186 (__arm_vmladavxq): Remove.
38187 (__arm_vmladavq_p): Remove.
38188 (__arm_vmlsdavxq_p): Remove.
38189 (__arm_vmlsdavq_p): Remove.
38190 (__arm_vmladavxq_p): Remove.
38192 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38194 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
38195 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
38196 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
38197 vmlsdavax, vmlsdav, vmlsdavx.
38198 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
38199 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
38200 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
38202 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
38203 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
38204 (mve_vmlsdavxq_s<mode>): Merge into ...
38205 (@mve_<mve_insn>q_<supf><mode>): ... this.
38206 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
38207 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
38209 (@mve_<mve_insn>q_<supf><mode>): ... this.
38210 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
38211 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
38212 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38213 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
38214 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
38216 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38218 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38220 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
38221 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
38223 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38225 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
38226 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
38227 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
38228 * config/arm/arm_mve.h (vaddlvaq): Remove.
38229 (vaddlvaq_p): Remove.
38230 (vaddlvaq_u32): Remove.
38231 (vaddlvaq_s32): Remove.
38232 (vaddlvaq_p_s32): Remove.
38233 (vaddlvaq_p_u32): Remove.
38234 (__arm_vaddlvaq_u32): Remove.
38235 (__arm_vaddlvaq_s32): Remove.
38236 (__arm_vaddlvaq_p_s32): Remove.
38237 (__arm_vaddlvaq_p_u32): Remove.
38238 (__arm_vaddlvaq): Remove.
38239 (__arm_vaddlvaq_p): Remove.
38241 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38243 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
38244 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
38246 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38248 * config/arm/iterators.md (mve_insn): Add vaddlva.
38249 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
38250 (@mve_<mve_insn>q_<supf>v4si): ... this.
38251 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
38252 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
38254 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
38257 * config/i386/i386.cc (ix86_widen_mult_cost):
38258 Handle V4HImode and V2SImode.
38260 2023-05-11 Andrew Pinski <apinski@marvell.com>
38262 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
38263 defined by a phi node with more than one uses, allow for the
38264 only uses are in that same defining statement.
38266 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38268 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
38271 2023-05-11 Pan Li <pan2.li@intel.com>
38273 * config/riscv/vector.md: Add comments for simplifying to vmset.
38275 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38277 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
38279 (v<optab><mode>3): Add vector shift pattern.
38280 * config/riscv/vector-iterators.md: New iterator.
38282 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38284 * config/riscv/autovec.md: Use renamed functions.
38285 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
38286 (emit_vlmax_reg_op): To this.
38287 (emit_nonvlmax_op): Rename.
38288 (emit_len_op): To this.
38289 (emit_nonvlmax_binop): Rename.
38290 (emit_len_binop): To this.
38291 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
38292 (emit_pred_binop): Remove vlmax_p.
38293 (emit_vlmax_op): Rename.
38294 (emit_vlmax_reg_op): To this.
38295 (emit_nonvlmax_op): Rename.
38296 (emit_len_op): To this.
38297 (emit_nonvlmax_binop): Rename.
38298 (emit_len_binop): To this.
38299 (sew64_scalar_helper): Use renamed functions.
38300 (expand_tuple_move): Use renamed functions.
38301 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
38303 * config/riscv/vector.md: Use renamed functions.
38305 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
38306 Michael Collison <collison@rivosinc.com>
38308 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
38309 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
38310 * config/riscv/riscv-v.cc (emit_pred_op): New function.
38311 (set_expander_dest_and_mask): New function.
38312 (emit_pred_binop): New function.
38313 (emit_nonvlmax_binop): New function.
38315 2023-05-11 Pan Li <pan2.li@intel.com>
38317 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
38318 * gimple-loop-interchange.cc
38319 (tree_loop_interchange::map_inductions_to_loop): Ditto.
38320 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
38321 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
38322 * tree-ssa-loop-manip.cc (create_iv): Ditto.
38323 (tree_transform_and_unroll_loop): Ditto.
38324 (canonicalize_loop_ivs): Ditto.
38325 * tree-ssa-loop-manip.h (create_iv): Ditto.
38326 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
38327 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
38329 (vect_set_loop_condition_normal): Ditto.
38330 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
38331 * tree-vect-stmts.cc (vectorizable_store): Ditto.
38332 (vectorizable_load): Ditto.
38334 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38336 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
38337 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
38338 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
38339 * config/arm/arm_mve.h (vmovlbq): Remove.
38341 (vmovlbq_m): Remove.
38342 (vmovltq_m): Remove.
38343 (vmovlbq_x): Remove.
38344 (vmovltq_x): Remove.
38345 (vmovlbq_s8): Remove.
38346 (vmovlbq_s16): Remove.
38347 (vmovltq_s8): Remove.
38348 (vmovltq_s16): Remove.
38349 (vmovltq_u8): Remove.
38350 (vmovltq_u16): Remove.
38351 (vmovlbq_u8): Remove.
38352 (vmovlbq_u16): Remove.
38353 (vmovlbq_m_s8): Remove.
38354 (vmovltq_m_s8): Remove.
38355 (vmovlbq_m_u8): Remove.
38356 (vmovltq_m_u8): Remove.
38357 (vmovlbq_m_s16): Remove.
38358 (vmovltq_m_s16): Remove.
38359 (vmovlbq_m_u16): Remove.
38360 (vmovltq_m_u16): Remove.
38361 (vmovlbq_x_s8): Remove.
38362 (vmovlbq_x_s16): Remove.
38363 (vmovlbq_x_u8): Remove.
38364 (vmovlbq_x_u16): Remove.
38365 (vmovltq_x_s8): Remove.
38366 (vmovltq_x_s16): Remove.
38367 (vmovltq_x_u8): Remove.
38368 (vmovltq_x_u16): Remove.
38369 (__arm_vmovlbq_s8): Remove.
38370 (__arm_vmovlbq_s16): Remove.
38371 (__arm_vmovltq_s8): Remove.
38372 (__arm_vmovltq_s16): Remove.
38373 (__arm_vmovltq_u8): Remove.
38374 (__arm_vmovltq_u16): Remove.
38375 (__arm_vmovlbq_u8): Remove.
38376 (__arm_vmovlbq_u16): Remove.
38377 (__arm_vmovlbq_m_s8): Remove.
38378 (__arm_vmovltq_m_s8): Remove.
38379 (__arm_vmovlbq_m_u8): Remove.
38380 (__arm_vmovltq_m_u8): Remove.
38381 (__arm_vmovlbq_m_s16): Remove.
38382 (__arm_vmovltq_m_s16): Remove.
38383 (__arm_vmovlbq_m_u16): Remove.
38384 (__arm_vmovltq_m_u16): Remove.
38385 (__arm_vmovlbq_x_s8): Remove.
38386 (__arm_vmovlbq_x_s16): Remove.
38387 (__arm_vmovlbq_x_u8): Remove.
38388 (__arm_vmovlbq_x_u16): Remove.
38389 (__arm_vmovltq_x_s8): Remove.
38390 (__arm_vmovltq_x_s16): Remove.
38391 (__arm_vmovltq_x_u8): Remove.
38392 (__arm_vmovltq_x_u16): Remove.
38393 (__arm_vmovlbq): Remove.
38394 (__arm_vmovltq): Remove.
38395 (__arm_vmovlbq_m): Remove.
38396 (__arm_vmovltq_m): Remove.
38397 (__arm_vmovlbq_x): Remove.
38398 (__arm_vmovltq_x): Remove.
38400 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38402 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
38403 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
38405 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38407 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
38408 (VMOVLBQ, VMOVLTQ): Merge into ...
38409 (VMOVLxQ): ... this.
38410 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
38411 (VMOVLxQ_M): ... this.
38412 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
38413 (mve_vmovlbq_<supf><mode>): Merge into ...
38414 (@mve_<mve_insn>q_<supf><mode>): ... this.
38415 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
38417 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
38419 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38421 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
38422 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
38423 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
38424 * config/arm/arm-mve-builtins-functions.h
38425 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
38426 * config/arm/arm_mve.h (vaddlvq): Remove.
38427 (vaddlvq_p): Remove.
38428 (vaddlvq_s32): Remove.
38429 (vaddlvq_u32): Remove.
38430 (vaddlvq_p_s32): Remove.
38431 (vaddlvq_p_u32): Remove.
38432 (__arm_vaddlvq_s32): Remove.
38433 (__arm_vaddlvq_u32): Remove.
38434 (__arm_vaddlvq_p_s32): Remove.
38435 (__arm_vaddlvq_p_u32): Remove.
38436 (__arm_vaddlvq): Remove.
38437 (__arm_vaddlvq_p): Remove.
38439 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38441 * config/arm/iterators.md (mve_insn): Add vaddlv.
38442 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
38443 (@mve_<mve_insn>q_<supf>v4si): ... this.
38444 (mve_vaddlvq_p_<supf>v4si): Rename into ...
38445 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
38447 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38449 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
38450 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
38452 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38454 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
38455 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
38456 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
38457 * config/arm/arm_mve.h (vaddvaq): Remove.
38458 (vaddvaq_p): Remove.
38459 (vaddvaq_u8): Remove.
38460 (vaddvaq_s8): Remove.
38461 (vaddvaq_u16): Remove.
38462 (vaddvaq_s16): Remove.
38463 (vaddvaq_u32): Remove.
38464 (vaddvaq_s32): Remove.
38465 (vaddvaq_p_u8): Remove.
38466 (vaddvaq_p_s8): Remove.
38467 (vaddvaq_p_u16): Remove.
38468 (vaddvaq_p_s16): Remove.
38469 (vaddvaq_p_u32): Remove.
38470 (vaddvaq_p_s32): Remove.
38471 (__arm_vaddvaq_u8): Remove.
38472 (__arm_vaddvaq_s8): Remove.
38473 (__arm_vaddvaq_u16): Remove.
38474 (__arm_vaddvaq_s16): Remove.
38475 (__arm_vaddvaq_u32): Remove.
38476 (__arm_vaddvaq_s32): Remove.
38477 (__arm_vaddvaq_p_u8): Remove.
38478 (__arm_vaddvaq_p_s8): Remove.
38479 (__arm_vaddvaq_p_u16): Remove.
38480 (__arm_vaddvaq_p_s16): Remove.
38481 (__arm_vaddvaq_p_u32): Remove.
38482 (__arm_vaddvaq_p_s32): Remove.
38483 (__arm_vaddvaq): Remove.
38484 (__arm_vaddvaq_p): Remove.
38486 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38488 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
38489 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
38491 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38493 * config/arm/iterators.md (mve_insn): Add vaddva.
38494 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
38495 (@mve_<mve_insn>q_<supf><mode>): ... this.
38496 (mve_vaddvaq_p_<supf><mode>): Rename into ...
38497 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38499 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38501 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
38502 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
38503 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
38504 * config/arm/arm_mve.h (vaddvq): Remove.
38505 (vaddvq_p): Remove.
38506 (vaddvq_s8): Remove.
38507 (vaddvq_s16): Remove.
38508 (vaddvq_s32): Remove.
38509 (vaddvq_u8): Remove.
38510 (vaddvq_u16): Remove.
38511 (vaddvq_u32): Remove.
38512 (vaddvq_p_u8): Remove.
38513 (vaddvq_p_s8): Remove.
38514 (vaddvq_p_u16): Remove.
38515 (vaddvq_p_s16): Remove.
38516 (vaddvq_p_u32): Remove.
38517 (vaddvq_p_s32): Remove.
38518 (__arm_vaddvq_s8): Remove.
38519 (__arm_vaddvq_s16): Remove.
38520 (__arm_vaddvq_s32): Remove.
38521 (__arm_vaddvq_u8): Remove.
38522 (__arm_vaddvq_u16): Remove.
38523 (__arm_vaddvq_u32): Remove.
38524 (__arm_vaddvq_p_u8): Remove.
38525 (__arm_vaddvq_p_s8): Remove.
38526 (__arm_vaddvq_p_u16): Remove.
38527 (__arm_vaddvq_p_s16): Remove.
38528 (__arm_vaddvq_p_u32): Remove.
38529 (__arm_vaddvq_p_s32): Remove.
38530 (__arm_vaddvq): Remove.
38531 (__arm_vaddvq_p): Remove.
38533 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38535 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
38536 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
38538 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38540 * config/arm/iterators.md (mve_insn): Add vaddv.
38541 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
38542 (@mve_<mve_insn>q_<supf><mode>): ... this.
38543 (mve_vaddvq_p_<supf><mode>): Rename into ...
38544 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
38545 * config/arm/vec-common.md: Use gen_mve_q instead of
38548 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38550 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
38552 * config/arm/arm-mve-builtins-base.def (vdupq): New.
38553 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
38554 * config/arm/arm_mve.h (vdupq_n): Remove.
38556 (vdupq_n_f16): Remove.
38557 (vdupq_n_f32): Remove.
38558 (vdupq_n_s8): Remove.
38559 (vdupq_n_s16): Remove.
38560 (vdupq_n_s32): Remove.
38561 (vdupq_n_u8): Remove.
38562 (vdupq_n_u16): Remove.
38563 (vdupq_n_u32): Remove.
38564 (vdupq_m_n_u8): Remove.
38565 (vdupq_m_n_s8): Remove.
38566 (vdupq_m_n_u16): Remove.
38567 (vdupq_m_n_s16): Remove.
38568 (vdupq_m_n_u32): Remove.
38569 (vdupq_m_n_s32): Remove.
38570 (vdupq_m_n_f16): Remove.
38571 (vdupq_m_n_f32): Remove.
38572 (vdupq_x_n_s8): Remove.
38573 (vdupq_x_n_s16): Remove.
38574 (vdupq_x_n_s32): Remove.
38575 (vdupq_x_n_u8): Remove.
38576 (vdupq_x_n_u16): Remove.
38577 (vdupq_x_n_u32): Remove.
38578 (vdupq_x_n_f16): Remove.
38579 (vdupq_x_n_f32): Remove.
38580 (__arm_vdupq_n_s8): Remove.
38581 (__arm_vdupq_n_s16): Remove.
38582 (__arm_vdupq_n_s32): Remove.
38583 (__arm_vdupq_n_u8): Remove.
38584 (__arm_vdupq_n_u16): Remove.
38585 (__arm_vdupq_n_u32): Remove.
38586 (__arm_vdupq_m_n_u8): Remove.
38587 (__arm_vdupq_m_n_s8): Remove.
38588 (__arm_vdupq_m_n_u16): Remove.
38589 (__arm_vdupq_m_n_s16): Remove.
38590 (__arm_vdupq_m_n_u32): Remove.
38591 (__arm_vdupq_m_n_s32): Remove.
38592 (__arm_vdupq_x_n_s8): Remove.
38593 (__arm_vdupq_x_n_s16): Remove.
38594 (__arm_vdupq_x_n_s32): Remove.
38595 (__arm_vdupq_x_n_u8): Remove.
38596 (__arm_vdupq_x_n_u16): Remove.
38597 (__arm_vdupq_x_n_u32): Remove.
38598 (__arm_vdupq_n_f16): Remove.
38599 (__arm_vdupq_n_f32): Remove.
38600 (__arm_vdupq_m_n_f16): Remove.
38601 (__arm_vdupq_m_n_f32): Remove.
38602 (__arm_vdupq_x_n_f16): Remove.
38603 (__arm_vdupq_x_n_f32): Remove.
38604 (__arm_vdupq_n): Remove.
38605 (__arm_vdupq_m): Remove.
38607 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38609 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
38610 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
38612 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38614 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
38615 (MVE_FP_N_VDUPQ_ONLY): New.
38616 (mve_insn): Add vdupq.
38617 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
38618 (@mve_<mve_insn>q_n_f<mode>): ... this.
38619 (mve_vdupq_n_<supf><mode>): Rename into ...
38620 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
38621 (mve_vdupq_m_n_<supf><mode>): Rename into ...
38622 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
38623 (mve_vdupq_m_n_f<mode>): Rename into ...
38624 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
38626 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38628 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
38630 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
38632 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
38634 * config/arm/arm_mve.h (vrev16q): Remove.
38637 (vrev64q_m): Remove.
38638 (vrev16q_m): Remove.
38639 (vrev32q_m): Remove.
38640 (vrev16q_x): Remove.
38641 (vrev32q_x): Remove.
38642 (vrev64q_x): Remove.
38643 (vrev64q_f16): Remove.
38644 (vrev64q_f32): Remove.
38645 (vrev32q_f16): Remove.
38646 (vrev16q_s8): Remove.
38647 (vrev32q_s8): Remove.
38648 (vrev32q_s16): Remove.
38649 (vrev64q_s8): Remove.
38650 (vrev64q_s16): Remove.
38651 (vrev64q_s32): Remove.
38652 (vrev64q_u8): Remove.
38653 (vrev64q_u16): Remove.
38654 (vrev64q_u32): Remove.
38655 (vrev32q_u8): Remove.
38656 (vrev32q_u16): Remove.
38657 (vrev16q_u8): Remove.
38658 (vrev64q_m_u8): Remove.
38659 (vrev64q_m_s8): Remove.
38660 (vrev64q_m_u16): Remove.
38661 (vrev64q_m_s16): Remove.
38662 (vrev64q_m_u32): Remove.
38663 (vrev64q_m_s32): Remove.
38664 (vrev16q_m_s8): Remove.
38665 (vrev32q_m_f16): Remove.
38666 (vrev16q_m_u8): Remove.
38667 (vrev32q_m_s8): Remove.
38668 (vrev64q_m_f16): Remove.
38669 (vrev32q_m_u8): Remove.
38670 (vrev32q_m_s16): Remove.
38671 (vrev64q_m_f32): Remove.
38672 (vrev32q_m_u16): Remove.
38673 (vrev16q_x_s8): Remove.
38674 (vrev16q_x_u8): Remove.
38675 (vrev32q_x_s8): Remove.
38676 (vrev32q_x_s16): Remove.
38677 (vrev32q_x_u8): Remove.
38678 (vrev32q_x_u16): Remove.
38679 (vrev64q_x_s8): Remove.
38680 (vrev64q_x_s16): Remove.
38681 (vrev64q_x_s32): Remove.
38682 (vrev64q_x_u8): Remove.
38683 (vrev64q_x_u16): Remove.
38684 (vrev64q_x_u32): Remove.
38685 (vrev32q_x_f16): Remove.
38686 (vrev64q_x_f16): Remove.
38687 (vrev64q_x_f32): Remove.
38688 (__arm_vrev16q_s8): Remove.
38689 (__arm_vrev32q_s8): Remove.
38690 (__arm_vrev32q_s16): Remove.
38691 (__arm_vrev64q_s8): Remove.
38692 (__arm_vrev64q_s16): Remove.
38693 (__arm_vrev64q_s32): Remove.
38694 (__arm_vrev64q_u8): Remove.
38695 (__arm_vrev64q_u16): Remove.
38696 (__arm_vrev64q_u32): Remove.
38697 (__arm_vrev32q_u8): Remove.
38698 (__arm_vrev32q_u16): Remove.
38699 (__arm_vrev16q_u8): Remove.
38700 (__arm_vrev64q_m_u8): Remove.
38701 (__arm_vrev64q_m_s8): Remove.
38702 (__arm_vrev64q_m_u16): Remove.
38703 (__arm_vrev64q_m_s16): Remove.
38704 (__arm_vrev64q_m_u32): Remove.
38705 (__arm_vrev64q_m_s32): Remove.
38706 (__arm_vrev16q_m_s8): Remove.
38707 (__arm_vrev16q_m_u8): Remove.
38708 (__arm_vrev32q_m_s8): Remove.
38709 (__arm_vrev32q_m_u8): Remove.
38710 (__arm_vrev32q_m_s16): Remove.
38711 (__arm_vrev32q_m_u16): Remove.
38712 (__arm_vrev16q_x_s8): Remove.
38713 (__arm_vrev16q_x_u8): Remove.
38714 (__arm_vrev32q_x_s8): Remove.
38715 (__arm_vrev32q_x_s16): Remove.
38716 (__arm_vrev32q_x_u8): Remove.
38717 (__arm_vrev32q_x_u16): Remove.
38718 (__arm_vrev64q_x_s8): Remove.
38719 (__arm_vrev64q_x_s16): Remove.
38720 (__arm_vrev64q_x_s32): Remove.
38721 (__arm_vrev64q_x_u8): Remove.
38722 (__arm_vrev64q_x_u16): Remove.
38723 (__arm_vrev64q_x_u32): Remove.
38724 (__arm_vrev64q_f16): Remove.
38725 (__arm_vrev64q_f32): Remove.
38726 (__arm_vrev32q_f16): Remove.
38727 (__arm_vrev32q_m_f16): Remove.
38728 (__arm_vrev64q_m_f16): Remove.
38729 (__arm_vrev64q_m_f32): Remove.
38730 (__arm_vrev32q_x_f16): Remove.
38731 (__arm_vrev64q_x_f16): Remove.
38732 (__arm_vrev64q_x_f32): Remove.
38733 (__arm_vrev16q): Remove.
38734 (__arm_vrev32q): Remove.
38735 (__arm_vrev64q): Remove.
38736 (__arm_vrev64q_m): Remove.
38737 (__arm_vrev16q_m): Remove.
38738 (__arm_vrev32q_m): Remove.
38739 (__arm_vrev16q_x): Remove.
38740 (__arm_vrev32q_x): Remove.
38741 (__arm_vrev64q_x): Remove.
38743 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38745 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
38746 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
38747 (MVE_FP_M_VREV32Q_ONLY): New iterators.
38748 (mve_insn): Add vrev16q, vrev32q, vrev64q.
38749 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
38750 (@mve_<mve_insn>q_f<mode>): ... this
38751 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
38752 (mve_vrev64q_<supf><mode>): Rename into ...
38753 (@mve_<mve_insn>q_<supf><mode>): ... this.
38754 (mve_vrev32q_<supf><mode>): Rename into
38755 @mve_<mve_insn>q_<supf><mode>.
38756 (mve_vrev16q_<supf>v16qi): Rename into
38757 @mve_<mve_insn>q_<supf><mode>.
38758 (mve_vrev64q_m_<supf><mode>): Rename into
38759 @mve_<mve_insn>q_m_<supf><mode>.
38760 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
38761 (mve_vrev32q_m_<supf><mode>): Rename into
38762 @mve_<mve_insn>q_m_<supf><mode>.
38763 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
38764 (mve_vrev16q_m_<supf>v16qi): Rename into
38765 @mve_<mve_insn>q_m_<supf><mode>.
38767 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
38769 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
38770 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38771 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
38772 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38773 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
38774 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
38775 * config/arm/arm-mve-builtins-functions.h (class
38776 unspec_based_mve_function_exact_insn_vcmp): New.
38777 * config/arm/arm-mve-builtins.cc
38778 (function_instance::has_inactive_argument): Handle vcmp.
38779 * config/arm/arm_mve.h (vcmpneq): Remove.
38787 (vcmpneq_m): Remove.
38788 (vcmphiq_m): Remove.
38789 (vcmpeqq_m): Remove.
38790 (vcmpcsq_m): Remove.
38791 (vcmpcsq_m_n): Remove.
38792 (vcmpltq_m): Remove.
38793 (vcmpleq_m): Remove.
38794 (vcmpgtq_m): Remove.
38795 (vcmpgeq_m): Remove.
38796 (vcmpneq_s8): Remove.
38797 (vcmpneq_s16): Remove.
38798 (vcmpneq_s32): Remove.
38799 (vcmpneq_u8): Remove.
38800 (vcmpneq_u16): Remove.
38801 (vcmpneq_u32): Remove.
38802 (vcmpneq_n_u8): Remove.
38803 (vcmphiq_u8): Remove.
38804 (vcmphiq_n_u8): Remove.
38805 (vcmpeqq_u8): Remove.
38806 (vcmpeqq_n_u8): Remove.
38807 (vcmpcsq_u8): Remove.
38808 (vcmpcsq_n_u8): Remove.
38809 (vcmpneq_n_s8): Remove.
38810 (vcmpltq_s8): Remove.
38811 (vcmpltq_n_s8): Remove.
38812 (vcmpleq_s8): Remove.
38813 (vcmpleq_n_s8): Remove.
38814 (vcmpgtq_s8): Remove.
38815 (vcmpgtq_n_s8): Remove.
38816 (vcmpgeq_s8): Remove.
38817 (vcmpgeq_n_s8): Remove.
38818 (vcmpeqq_s8): Remove.
38819 (vcmpeqq_n_s8): Remove.
38820 (vcmpneq_n_u16): Remove.
38821 (vcmphiq_u16): Remove.
38822 (vcmphiq_n_u16): Remove.
38823 (vcmpeqq_u16): Remove.
38824 (vcmpeqq_n_u16): Remove.
38825 (vcmpcsq_u16): Remove.
38826 (vcmpcsq_n_u16): Remove.
38827 (vcmpneq_n_s16): Remove.
38828 (vcmpltq_s16): Remove.
38829 (vcmpltq_n_s16): Remove.
38830 (vcmpleq_s16): Remove.
38831 (vcmpleq_n_s16): Remove.
38832 (vcmpgtq_s16): Remove.
38833 (vcmpgtq_n_s16): Remove.
38834 (vcmpgeq_s16): Remove.
38835 (vcmpgeq_n_s16): Remove.
38836 (vcmpeqq_s16): Remove.
38837 (vcmpeqq_n_s16): Remove.
38838 (vcmpneq_n_u32): Remove.
38839 (vcmphiq_u32): Remove.
38840 (vcmphiq_n_u32): Remove.
38841 (vcmpeqq_u32): Remove.
38842 (vcmpeqq_n_u32): Remove.
38843 (vcmpcsq_u32): Remove.
38844 (vcmpcsq_n_u32): Remove.
38845 (vcmpneq_n_s32): Remove.
38846 (vcmpltq_s32): Remove.
38847 (vcmpltq_n_s32): Remove.
38848 (vcmpleq_s32): Remove.
38849 (vcmpleq_n_s32): Remove.
38850 (vcmpgtq_s32): Remove.
38851 (vcmpgtq_n_s32): Remove.
38852 (vcmpgeq_s32): Remove.
38853 (vcmpgeq_n_s32): Remove.
38854 (vcmpeqq_s32): Remove.
38855 (vcmpeqq_n_s32): Remove.
38856 (vcmpneq_n_f16): Remove.
38857 (vcmpneq_f16): Remove.
38858 (vcmpltq_n_f16): Remove.
38859 (vcmpltq_f16): Remove.
38860 (vcmpleq_n_f16): Remove.
38861 (vcmpleq_f16): Remove.
38862 (vcmpgtq_n_f16): Remove.
38863 (vcmpgtq_f16): Remove.
38864 (vcmpgeq_n_f16): Remove.
38865 (vcmpgeq_f16): Remove.
38866 (vcmpeqq_n_f16): Remove.
38867 (vcmpeqq_f16): Remove.
38868 (vcmpneq_n_f32): Remove.
38869 (vcmpneq_f32): Remove.
38870 (vcmpltq_n_f32): Remove.
38871 (vcmpltq_f32): Remove.
38872 (vcmpleq_n_f32): Remove.
38873 (vcmpleq_f32): Remove.
38874 (vcmpgtq_n_f32): Remove.
38875 (vcmpgtq_f32): Remove.
38876 (vcmpgeq_n_f32): Remove.
38877 (vcmpgeq_f32): Remove.
38878 (vcmpeqq_n_f32): Remove.
38879 (vcmpeqq_f32): Remove.
38880 (vcmpeqq_m_f16): Remove.
38881 (vcmpeqq_m_f32): Remove.
38882 (vcmpneq_m_u8): Remove.
38883 (vcmpneq_m_n_u8): Remove.
38884 (vcmphiq_m_u8): Remove.
38885 (vcmphiq_m_n_u8): Remove.
38886 (vcmpeqq_m_u8): Remove.
38887 (vcmpeqq_m_n_u8): Remove.
38888 (vcmpcsq_m_u8): Remove.
38889 (vcmpcsq_m_n_u8): Remove.
38890 (vcmpneq_m_s8): Remove.
38891 (vcmpneq_m_n_s8): Remove.
38892 (vcmpltq_m_s8): Remove.
38893 (vcmpltq_m_n_s8): Remove.
38894 (vcmpleq_m_s8): Remove.
38895 (vcmpleq_m_n_s8): Remove.
38896 (vcmpgtq_m_s8): Remove.
38897 (vcmpgtq_m_n_s8): Remove.
38898 (vcmpgeq_m_s8): Remove.
38899 (vcmpgeq_m_n_s8): Remove.
38900 (vcmpeqq_m_s8): Remove.
38901 (vcmpeqq_m_n_s8): Remove.
38902 (vcmpneq_m_u16): Remove.
38903 (vcmpneq_m_n_u16): Remove.
38904 (vcmphiq_m_u16): Remove.
38905 (vcmphiq_m_n_u16): Remove.
38906 (vcmpeqq_m_u16): Remove.
38907 (vcmpeqq_m_n_u16): Remove.
38908 (vcmpcsq_m_u16): Remove.
38909 (vcmpcsq_m_n_u16): Remove.
38910 (vcmpneq_m_s16): Remove.
38911 (vcmpneq_m_n_s16): Remove.
38912 (vcmpltq_m_s16): Remove.
38913 (vcmpltq_m_n_s16): Remove.
38914 (vcmpleq_m_s16): Remove.
38915 (vcmpleq_m_n_s16): Remove.
38916 (vcmpgtq_m_s16): Remove.
38917 (vcmpgtq_m_n_s16): Remove.
38918 (vcmpgeq_m_s16): Remove.
38919 (vcmpgeq_m_n_s16): Remove.
38920 (vcmpeqq_m_s16): Remove.
38921 (vcmpeqq_m_n_s16): Remove.
38922 (vcmpneq_m_u32): Remove.
38923 (vcmpneq_m_n_u32): Remove.
38924 (vcmphiq_m_u32): Remove.
38925 (vcmphiq_m_n_u32): Remove.
38926 (vcmpeqq_m_u32): Remove.
38927 (vcmpeqq_m_n_u32): Remove.
38928 (vcmpcsq_m_u32): Remove.
38929 (vcmpcsq_m_n_u32): Remove.
38930 (vcmpneq_m_s32): Remove.
38931 (vcmpneq_m_n_s32): Remove.
38932 (vcmpltq_m_s32): Remove.
38933 (vcmpltq_m_n_s32): Remove.
38934 (vcmpleq_m_s32): Remove.
38935 (vcmpleq_m_n_s32): Remove.
38936 (vcmpgtq_m_s32): Remove.
38937 (vcmpgtq_m_n_s32): Remove.
38938 (vcmpgeq_m_s32): Remove.
38939 (vcmpgeq_m_n_s32): Remove.
38940 (vcmpeqq_m_s32): Remove.
38941 (vcmpeqq_m_n_s32): Remove.
38942 (vcmpeqq_m_n_f16): Remove.
38943 (vcmpgeq_m_f16): Remove.
38944 (vcmpgeq_m_n_f16): Remove.
38945 (vcmpgtq_m_f16): Remove.
38946 (vcmpgtq_m_n_f16): Remove.
38947 (vcmpleq_m_f16): Remove.
38948 (vcmpleq_m_n_f16): Remove.
38949 (vcmpltq_m_f16): Remove.
38950 (vcmpltq_m_n_f16): Remove.
38951 (vcmpneq_m_f16): Remove.
38952 (vcmpneq_m_n_f16): Remove.
38953 (vcmpeqq_m_n_f32): Remove.
38954 (vcmpgeq_m_f32): Remove.
38955 (vcmpgeq_m_n_f32): Remove.
38956 (vcmpgtq_m_f32): Remove.
38957 (vcmpgtq_m_n_f32): Remove.
38958 (vcmpleq_m_f32): Remove.
38959 (vcmpleq_m_n_f32): Remove.
38960 (vcmpltq_m_f32): Remove.
38961 (vcmpltq_m_n_f32): Remove.
38962 (vcmpneq_m_f32): Remove.
38963 (vcmpneq_m_n_f32): Remove.
38964 (__arm_vcmpneq_s8): Remove.
38965 (__arm_vcmpneq_s16): Remove.
38966 (__arm_vcmpneq_s32): Remove.
38967 (__arm_vcmpneq_u8): Remove.
38968 (__arm_vcmpneq_u16): Remove.
38969 (__arm_vcmpneq_u32): Remove.
38970 (__arm_vcmpneq_n_u8): Remove.
38971 (__arm_vcmphiq_u8): Remove.
38972 (__arm_vcmphiq_n_u8): Remove.
38973 (__arm_vcmpeqq_u8): Remove.
38974 (__arm_vcmpeqq_n_u8): Remove.
38975 (__arm_vcmpcsq_u8): Remove.
38976 (__arm_vcmpcsq_n_u8): Remove.
38977 (__arm_vcmpneq_n_s8): Remove.
38978 (__arm_vcmpltq_s8): Remove.
38979 (__arm_vcmpltq_n_s8): Remove.
38980 (__arm_vcmpleq_s8): Remove.
38981 (__arm_vcmpleq_n_s8): Remove.
38982 (__arm_vcmpgtq_s8): Remove.
38983 (__arm_vcmpgtq_n_s8): Remove.
38984 (__arm_vcmpgeq_s8): Remove.
38985 (__arm_vcmpgeq_n_s8): Remove.
38986 (__arm_vcmpeqq_s8): Remove.
38987 (__arm_vcmpeqq_n_s8): Remove.
38988 (__arm_vcmpneq_n_u16): Remove.
38989 (__arm_vcmphiq_u16): Remove.
38990 (__arm_vcmphiq_n_u16): Remove.
38991 (__arm_vcmpeqq_u16): Remove.
38992 (__arm_vcmpeqq_n_u16): Remove.
38993 (__arm_vcmpcsq_u16): Remove.
38994 (__arm_vcmpcsq_n_u16): Remove.
38995 (__arm_vcmpneq_n_s16): Remove.
38996 (__arm_vcmpltq_s16): Remove.
38997 (__arm_vcmpltq_n_s16): Remove.
38998 (__arm_vcmpleq_s16): Remove.
38999 (__arm_vcmpleq_n_s16): Remove.
39000 (__arm_vcmpgtq_s16): Remove.
39001 (__arm_vcmpgtq_n_s16): Remove.
39002 (__arm_vcmpgeq_s16): Remove.
39003 (__arm_vcmpgeq_n_s16): Remove.
39004 (__arm_vcmpeqq_s16): Remove.
39005 (__arm_vcmpeqq_n_s16): Remove.
39006 (__arm_vcmpneq_n_u32): Remove.
39007 (__arm_vcmphiq_u32): Remove.
39008 (__arm_vcmphiq_n_u32): Remove.
39009 (__arm_vcmpeqq_u32): Remove.
39010 (__arm_vcmpeqq_n_u32): Remove.
39011 (__arm_vcmpcsq_u32): Remove.
39012 (__arm_vcmpcsq_n_u32): Remove.
39013 (__arm_vcmpneq_n_s32): Remove.
39014 (__arm_vcmpltq_s32): Remove.
39015 (__arm_vcmpltq_n_s32): Remove.
39016 (__arm_vcmpleq_s32): Remove.
39017 (__arm_vcmpleq_n_s32): Remove.
39018 (__arm_vcmpgtq_s32): Remove.
39019 (__arm_vcmpgtq_n_s32): Remove.
39020 (__arm_vcmpgeq_s32): Remove.
39021 (__arm_vcmpgeq_n_s32): Remove.
39022 (__arm_vcmpeqq_s32): Remove.
39023 (__arm_vcmpeqq_n_s32): Remove.
39024 (__arm_vcmpneq_m_u8): Remove.
39025 (__arm_vcmpneq_m_n_u8): Remove.
39026 (__arm_vcmphiq_m_u8): Remove.
39027 (__arm_vcmphiq_m_n_u8): Remove.
39028 (__arm_vcmpeqq_m_u8): Remove.
39029 (__arm_vcmpeqq_m_n_u8): Remove.
39030 (__arm_vcmpcsq_m_u8): Remove.
39031 (__arm_vcmpcsq_m_n_u8): Remove.
39032 (__arm_vcmpneq_m_s8): Remove.
39033 (__arm_vcmpneq_m_n_s8): Remove.
39034 (__arm_vcmpltq_m_s8): Remove.
39035 (__arm_vcmpltq_m_n_s8): Remove.
39036 (__arm_vcmpleq_m_s8): Remove.
39037 (__arm_vcmpleq_m_n_s8): Remove.
39038 (__arm_vcmpgtq_m_s8): Remove.
39039 (__arm_vcmpgtq_m_n_s8): Remove.
39040 (__arm_vcmpgeq_m_s8): Remove.
39041 (__arm_vcmpgeq_m_n_s8): Remove.
39042 (__arm_vcmpeqq_m_s8): Remove.
39043 (__arm_vcmpeqq_m_n_s8): Remove.
39044 (__arm_vcmpneq_m_u16): Remove.
39045 (__arm_vcmpneq_m_n_u16): Remove.
39046 (__arm_vcmphiq_m_u16): Remove.
39047 (__arm_vcmphiq_m_n_u16): Remove.
39048 (__arm_vcmpeqq_m_u16): Remove.
39049 (__arm_vcmpeqq_m_n_u16): Remove.
39050 (__arm_vcmpcsq_m_u16): Remove.
39051 (__arm_vcmpcsq_m_n_u16): Remove.
39052 (__arm_vcmpneq_m_s16): Remove.
39053 (__arm_vcmpneq_m_n_s16): Remove.
39054 (__arm_vcmpltq_m_s16): Remove.
39055 (__arm_vcmpltq_m_n_s16): Remove.
39056 (__arm_vcmpleq_m_s16): Remove.
39057 (__arm_vcmpleq_m_n_s16): Remove.
39058 (__arm_vcmpgtq_m_s16): Remove.
39059 (__arm_vcmpgtq_m_n_s16): Remove.
39060 (__arm_vcmpgeq_m_s16): Remove.
39061 (__arm_vcmpgeq_m_n_s16): Remove.
39062 (__arm_vcmpeqq_m_s16): Remove.
39063 (__arm_vcmpeqq_m_n_s16): Remove.
39064 (__arm_vcmpneq_m_u32): Remove.
39065 (__arm_vcmpneq_m_n_u32): Remove.
39066 (__arm_vcmphiq_m_u32): Remove.
39067 (__arm_vcmphiq_m_n_u32): Remove.
39068 (__arm_vcmpeqq_m_u32): Remove.
39069 (__arm_vcmpeqq_m_n_u32): Remove.
39070 (__arm_vcmpcsq_m_u32): Remove.
39071 (__arm_vcmpcsq_m_n_u32): Remove.
39072 (__arm_vcmpneq_m_s32): Remove.
39073 (__arm_vcmpneq_m_n_s32): Remove.
39074 (__arm_vcmpltq_m_s32): Remove.
39075 (__arm_vcmpltq_m_n_s32): Remove.
39076 (__arm_vcmpleq_m_s32): Remove.
39077 (__arm_vcmpleq_m_n_s32): Remove.
39078 (__arm_vcmpgtq_m_s32): Remove.
39079 (__arm_vcmpgtq_m_n_s32): Remove.
39080 (__arm_vcmpgeq_m_s32): Remove.
39081 (__arm_vcmpgeq_m_n_s32): Remove.
39082 (__arm_vcmpeqq_m_s32): Remove.
39083 (__arm_vcmpeqq_m_n_s32): Remove.
39084 (__arm_vcmpneq_n_f16): Remove.
39085 (__arm_vcmpneq_f16): Remove.
39086 (__arm_vcmpltq_n_f16): Remove.
39087 (__arm_vcmpltq_f16): Remove.
39088 (__arm_vcmpleq_n_f16): Remove.
39089 (__arm_vcmpleq_f16): Remove.
39090 (__arm_vcmpgtq_n_f16): Remove.
39091 (__arm_vcmpgtq_f16): Remove.
39092 (__arm_vcmpgeq_n_f16): Remove.
39093 (__arm_vcmpgeq_f16): Remove.
39094 (__arm_vcmpeqq_n_f16): Remove.
39095 (__arm_vcmpeqq_f16): Remove.
39096 (__arm_vcmpneq_n_f32): Remove.
39097 (__arm_vcmpneq_f32): Remove.
39098 (__arm_vcmpltq_n_f32): Remove.
39099 (__arm_vcmpltq_f32): Remove.
39100 (__arm_vcmpleq_n_f32): Remove.
39101 (__arm_vcmpleq_f32): Remove.
39102 (__arm_vcmpgtq_n_f32): Remove.
39103 (__arm_vcmpgtq_f32): Remove.
39104 (__arm_vcmpgeq_n_f32): Remove.
39105 (__arm_vcmpgeq_f32): Remove.
39106 (__arm_vcmpeqq_n_f32): Remove.
39107 (__arm_vcmpeqq_f32): Remove.
39108 (__arm_vcmpeqq_m_f16): Remove.
39109 (__arm_vcmpeqq_m_f32): Remove.
39110 (__arm_vcmpeqq_m_n_f16): Remove.
39111 (__arm_vcmpgeq_m_f16): Remove.
39112 (__arm_vcmpgeq_m_n_f16): Remove.
39113 (__arm_vcmpgtq_m_f16): Remove.
39114 (__arm_vcmpgtq_m_n_f16): Remove.
39115 (__arm_vcmpleq_m_f16): Remove.
39116 (__arm_vcmpleq_m_n_f16): Remove.
39117 (__arm_vcmpltq_m_f16): Remove.
39118 (__arm_vcmpltq_m_n_f16): Remove.
39119 (__arm_vcmpneq_m_f16): Remove.
39120 (__arm_vcmpneq_m_n_f16): Remove.
39121 (__arm_vcmpeqq_m_n_f32): Remove.
39122 (__arm_vcmpgeq_m_f32): Remove.
39123 (__arm_vcmpgeq_m_n_f32): Remove.
39124 (__arm_vcmpgtq_m_f32): Remove.
39125 (__arm_vcmpgtq_m_n_f32): Remove.
39126 (__arm_vcmpleq_m_f32): Remove.
39127 (__arm_vcmpleq_m_n_f32): Remove.
39128 (__arm_vcmpltq_m_f32): Remove.
39129 (__arm_vcmpltq_m_n_f32): Remove.
39130 (__arm_vcmpneq_m_f32): Remove.
39131 (__arm_vcmpneq_m_n_f32): Remove.
39132 (__arm_vcmpneq): Remove.
39133 (__arm_vcmphiq): Remove.
39134 (__arm_vcmpeqq): Remove.
39135 (__arm_vcmpcsq): Remove.
39136 (__arm_vcmpltq): Remove.
39137 (__arm_vcmpleq): Remove.
39138 (__arm_vcmpgtq): Remove.
39139 (__arm_vcmpgeq): Remove.
39140 (__arm_vcmpneq_m): Remove.
39141 (__arm_vcmphiq_m): Remove.
39142 (__arm_vcmpeqq_m): Remove.
39143 (__arm_vcmpcsq_m): Remove.
39144 (__arm_vcmpltq_m): Remove.
39145 (__arm_vcmpleq_m): Remove.
39146 (__arm_vcmpgtq_m): Remove.
39147 (__arm_vcmpgeq_m): Remove.
39149 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
39151 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
39152 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
39154 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
39156 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
39157 (MVE_CMP_M_N_F, mve_cmp_op1): New.
39160 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
39161 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
39162 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
39163 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
39164 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
39165 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
39166 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
39167 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
39168 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
39169 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
39171 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
39172 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
39173 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
39174 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
39175 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
39177 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
39178 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
39179 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
39180 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
39181 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
39183 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
39185 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
39186 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
39187 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
39190 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
39192 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
39193 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
39194 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
39195 Simplify parity(rotate(x,y)) as parity(x).
39197 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39199 * config/riscv/autovec.md (@vec_series<mode>): New pattern
39200 * config/riscv/riscv-protos.h (expand_vec_series): New function.
39201 * config/riscv/riscv-v.cc (emit_binop): Ditto.
39202 (emit_index_op): Ditto.
39203 (expand_vec_series): Ditto.
39204 (expand_const_vector): Add series vector handling.
39205 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
39207 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
39209 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
39210 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
39211 (*concat<mode><dwi>3_2): Likewise.
39212 (*concat<mode><dwi>3_3): Likewise.
39213 (*concat<mode><dwi>3_4): Likewise.
39214 (*concat<mode><dwi>3_5): Likewise.
39215 (*concat<mode><dwi>3_6): Likewise.
39216 (*concat<mode><dwi>3_7): Likewise.
39218 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
39221 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
39222 (<insn>v4qiv4hi2): New expander.
39223 (<insn>v2hiv2si2): Ditto.
39224 (<insn>v2qiv2si2): Ditto.
39225 (<insn>v2qiv2hi2): Ditto.
39227 2023-05-10 Jeff Law <jlaw@ventanamicro>
39229 * config/h8300/constraints.md (Q): Make this a special memory
39233 2023-05-10 Jakub Jelinek <jakub@redhat.com>
39236 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
39237 if t is void_list_node.
39239 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39241 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
39242 (aarch64_sqmovun<mode>_insn_be): Delete.
39243 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
39244 (aarch64_sqmovun<mode>): Delete expander.
39246 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39249 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
39251 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
39252 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
39253 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
39255 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39258 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
39260 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
39261 (aarch64_<sur>qadd<mode>): Rename to...
39262 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
39264 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39266 * config/aarch64/aarch64-simd.md
39267 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
39268 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
39269 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
39270 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
39272 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39275 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
39276 (aarch64_xtn<mode>_insn_be): Likewise.
39277 (trunc<mode><Vnarrowq>2): Rename to...
39278 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
39279 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
39280 (aarch64_<su>qmovn<mode>): Likewise.
39281 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
39282 (aarch64_<su>qmovn<mode>_insn_le): Delete.
39283 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
39285 2023-05-10 Li Xu <xuli1@eswincomputing.com>
39287 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
39288 intruction replace null avl with (const_int 0).
39290 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39292 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
39295 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39298 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
39299 (source_equal_p): Fix dead loop in vsetvl avl checking.
39301 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
39303 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
39304 of modeadjusted_dccr.
39306 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39308 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
39309 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
39310 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
39311 * config/arm/arm-mve-builtins.cc
39312 (function_instance::has_inactive_argument): Handle vmaxaq and
39314 * config/arm/arm_mve.h (vminaq): Remove.
39316 (vminaq_m): Remove.
39317 (vmaxaq_m): Remove.
39318 (vminaq_s8): Remove.
39319 (vmaxaq_s8): Remove.
39320 (vminaq_s16): Remove.
39321 (vmaxaq_s16): Remove.
39322 (vminaq_s32): Remove.
39323 (vmaxaq_s32): Remove.
39324 (vminaq_m_s8): Remove.
39325 (vmaxaq_m_s8): Remove.
39326 (vminaq_m_s16): Remove.
39327 (vmaxaq_m_s16): Remove.
39328 (vminaq_m_s32): Remove.
39329 (vmaxaq_m_s32): Remove.
39330 (__arm_vminaq_s8): Remove.
39331 (__arm_vmaxaq_s8): Remove.
39332 (__arm_vminaq_s16): Remove.
39333 (__arm_vmaxaq_s16): Remove.
39334 (__arm_vminaq_s32): Remove.
39335 (__arm_vmaxaq_s32): Remove.
39336 (__arm_vminaq_m_s8): Remove.
39337 (__arm_vmaxaq_m_s8): Remove.
39338 (__arm_vminaq_m_s16): Remove.
39339 (__arm_vmaxaq_m_s16): Remove.
39340 (__arm_vminaq_m_s32): Remove.
39341 (__arm_vmaxaq_m_s32): Remove.
39342 (__arm_vminaq): Remove.
39343 (__arm_vmaxaq): Remove.
39344 (__arm_vminaq_m): Remove.
39345 (__arm_vmaxaq_m): Remove.
39347 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39349 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
39351 (mve_insn): Add vmaxa, vmina.
39352 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
39353 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
39355 (@mve_<mve_insn>q_<supf><mode>): ... this.
39356 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
39357 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
39359 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39361 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
39362 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
39364 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39366 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
39367 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
39368 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
39369 * config/arm/arm-mve-builtins.cc
39370 (function_instance::has_inactive_argument): Handle vmaxnmaq and
39372 * config/arm/arm_mve.h (vminnmaq): Remove.
39373 (vmaxnmaq): Remove.
39374 (vmaxnmaq_m): Remove.
39375 (vminnmaq_m): Remove.
39376 (vminnmaq_f16): Remove.
39377 (vmaxnmaq_f16): Remove.
39378 (vminnmaq_f32): Remove.
39379 (vmaxnmaq_f32): Remove.
39380 (vmaxnmaq_m_f16): Remove.
39381 (vminnmaq_m_f16): Remove.
39382 (vmaxnmaq_m_f32): Remove.
39383 (vminnmaq_m_f32): Remove.
39384 (__arm_vminnmaq_f16): Remove.
39385 (__arm_vmaxnmaq_f16): Remove.
39386 (__arm_vminnmaq_f32): Remove.
39387 (__arm_vmaxnmaq_f32): Remove.
39388 (__arm_vmaxnmaq_m_f16): Remove.
39389 (__arm_vminnmaq_m_f16): Remove.
39390 (__arm_vmaxnmaq_m_f32): Remove.
39391 (__arm_vminnmaq_m_f32): Remove.
39392 (__arm_vminnmaq): Remove.
39393 (__arm_vmaxnmaq): Remove.
39394 (__arm_vmaxnmaq_m): Remove.
39395 (__arm_vminnmaq_m): Remove.
39397 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39399 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
39400 (MVE_VMAXNMA_VMINNMAQ_M): New.
39401 (mve_insn): Add vmaxnma, vminnma.
39402 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
39404 (@mve_<mve_insn>q_f<mode>): ... this.
39405 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
39406 (@mve_<mve_insn>q_m_f<mode>): ... this.
39408 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39410 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
39411 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
39412 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
39413 (vminnmavq, vminnmvq): New.
39414 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
39415 (vminnmavq, vminnmvq): New.
39416 * config/arm/arm_mve.h (vminnmvq): Remove.
39417 (vminnmavq): Remove.
39418 (vmaxnmvq): Remove.
39419 (vmaxnmavq): Remove.
39420 (vmaxnmavq_p): Remove.
39421 (vmaxnmvq_p): Remove.
39422 (vminnmavq_p): Remove.
39423 (vminnmvq_p): Remove.
39424 (vminnmvq_f16): Remove.
39425 (vminnmavq_f16): Remove.
39426 (vmaxnmvq_f16): Remove.
39427 (vmaxnmavq_f16): Remove.
39428 (vminnmvq_f32): Remove.
39429 (vminnmavq_f32): Remove.
39430 (vmaxnmvq_f32): Remove.
39431 (vmaxnmavq_f32): Remove.
39432 (vmaxnmavq_p_f16): Remove.
39433 (vmaxnmvq_p_f16): Remove.
39434 (vminnmavq_p_f16): Remove.
39435 (vminnmvq_p_f16): Remove.
39436 (vmaxnmavq_p_f32): Remove.
39437 (vmaxnmvq_p_f32): Remove.
39438 (vminnmavq_p_f32): Remove.
39439 (vminnmvq_p_f32): Remove.
39440 (__arm_vminnmvq_f16): Remove.
39441 (__arm_vminnmavq_f16): Remove.
39442 (__arm_vmaxnmvq_f16): Remove.
39443 (__arm_vmaxnmavq_f16): Remove.
39444 (__arm_vminnmvq_f32): Remove.
39445 (__arm_vminnmavq_f32): Remove.
39446 (__arm_vmaxnmvq_f32): Remove.
39447 (__arm_vmaxnmavq_f32): Remove.
39448 (__arm_vmaxnmavq_p_f16): Remove.
39449 (__arm_vmaxnmvq_p_f16): Remove.
39450 (__arm_vminnmavq_p_f16): Remove.
39451 (__arm_vminnmvq_p_f16): Remove.
39452 (__arm_vmaxnmavq_p_f32): Remove.
39453 (__arm_vmaxnmvq_p_f32): Remove.
39454 (__arm_vminnmavq_p_f32): Remove.
39455 (__arm_vminnmvq_p_f32): Remove.
39456 (__arm_vminnmvq): Remove.
39457 (__arm_vminnmavq): Remove.
39458 (__arm_vmaxnmvq): Remove.
39459 (__arm_vmaxnmavq): Remove.
39460 (__arm_vmaxnmavq_p): Remove.
39461 (__arm_vmaxnmvq_p): Remove.
39462 (__arm_vminnmavq_p): Remove.
39463 (__arm_vminnmvq_p): Remove.
39464 (__arm_vmaxnmavq_m): Remove.
39465 (__arm_vmaxnmvq_m): Remove.
39467 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39469 * config/arm/arm-mve-builtins-functions.h
39470 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
39472 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39474 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
39475 (MVE_VMAXNMxV_MINNMxVQ_P): New.
39476 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
39477 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
39478 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
39479 (@mve_<mve_insn>q_f<mode>): ... this.
39480 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
39481 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
39482 (@mve_<mve_insn>q_p_f<mode>): ... this.
39484 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39486 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
39487 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
39488 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
39489 * config/arm/arm_mve.h (vminnmq): Remove.
39491 (vmaxnmq_m): Remove.
39492 (vminnmq_m): Remove.
39493 (vminnmq_x): Remove.
39494 (vmaxnmq_x): Remove.
39495 (vminnmq_f16): Remove.
39496 (vmaxnmq_f16): Remove.
39497 (vminnmq_f32): Remove.
39498 (vmaxnmq_f32): Remove.
39499 (vmaxnmq_m_f32): Remove.
39500 (vmaxnmq_m_f16): Remove.
39501 (vminnmq_m_f32): Remove.
39502 (vminnmq_m_f16): Remove.
39503 (vminnmq_x_f16): Remove.
39504 (vminnmq_x_f32): Remove.
39505 (vmaxnmq_x_f16): Remove.
39506 (vmaxnmq_x_f32): Remove.
39507 (__arm_vminnmq_f16): Remove.
39508 (__arm_vmaxnmq_f16): Remove.
39509 (__arm_vminnmq_f32): Remove.
39510 (__arm_vmaxnmq_f32): Remove.
39511 (__arm_vmaxnmq_m_f32): Remove.
39512 (__arm_vmaxnmq_m_f16): Remove.
39513 (__arm_vminnmq_m_f32): Remove.
39514 (__arm_vminnmq_m_f16): Remove.
39515 (__arm_vminnmq_x_f16): Remove.
39516 (__arm_vminnmq_x_f32): Remove.
39517 (__arm_vmaxnmq_x_f16): Remove.
39518 (__arm_vmaxnmq_x_f32): Remove.
39519 (__arm_vminnmq): Remove.
39520 (__arm_vmaxnmq): Remove.
39521 (__arm_vmaxnmq_m): Remove.
39522 (__arm_vminnmq_m): Remove.
39523 (__arm_vminnmq_x): Remove.
39524 (__arm_vmaxnmq_x): Remove.
39526 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39528 * config/arm/iterators.md (MAX_MIN_F): New.
39529 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
39530 (mve_insn): Add vmaxnm, vminnm.
39531 (max_min_f_str): New.
39532 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
39534 (@mve_<max_min_f_str>q_f<mode>): ... this.
39535 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
39536 (@mve_<mve_insn>q_m_f<mode>): ... this.
39538 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39540 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
39541 (smax<mode>3): Likewise.
39543 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39545 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
39546 (FUNCTION_PRED_P_S): New.
39547 (vmaxavq, vminavq, vmaxvq, vminvq): New.
39548 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
39550 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
39552 * config/arm/arm_mve.h (vminvq): Remove.
39554 (vminvq_p): Remove.
39555 (vmaxvq_p): Remove.
39556 (vminvq_u8): Remove.
39557 (vmaxvq_u8): Remove.
39558 (vminvq_s8): Remove.
39559 (vmaxvq_s8): Remove.
39560 (vminvq_u16): Remove.
39561 (vmaxvq_u16): Remove.
39562 (vminvq_s16): Remove.
39563 (vmaxvq_s16): Remove.
39564 (vminvq_u32): Remove.
39565 (vmaxvq_u32): Remove.
39566 (vminvq_s32): Remove.
39567 (vmaxvq_s32): Remove.
39568 (vminvq_p_u8): Remove.
39569 (vmaxvq_p_u8): Remove.
39570 (vminvq_p_s8): Remove.
39571 (vmaxvq_p_s8): Remove.
39572 (vminvq_p_u16): Remove.
39573 (vmaxvq_p_u16): Remove.
39574 (vminvq_p_s16): Remove.
39575 (vmaxvq_p_s16): Remove.
39576 (vminvq_p_u32): Remove.
39577 (vmaxvq_p_u32): Remove.
39578 (vminvq_p_s32): Remove.
39579 (vmaxvq_p_s32): Remove.
39580 (__arm_vminvq_u8): Remove.
39581 (__arm_vmaxvq_u8): Remove.
39582 (__arm_vminvq_s8): Remove.
39583 (__arm_vmaxvq_s8): Remove.
39584 (__arm_vminvq_u16): Remove.
39585 (__arm_vmaxvq_u16): Remove.
39586 (__arm_vminvq_s16): Remove.
39587 (__arm_vmaxvq_s16): Remove.
39588 (__arm_vminvq_u32): Remove.
39589 (__arm_vmaxvq_u32): Remove.
39590 (__arm_vminvq_s32): Remove.
39591 (__arm_vmaxvq_s32): Remove.
39592 (__arm_vminvq_p_u8): Remove.
39593 (__arm_vmaxvq_p_u8): Remove.
39594 (__arm_vminvq_p_s8): Remove.
39595 (__arm_vmaxvq_p_s8): Remove.
39596 (__arm_vminvq_p_u16): Remove.
39597 (__arm_vmaxvq_p_u16): Remove.
39598 (__arm_vminvq_p_s16): Remove.
39599 (__arm_vmaxvq_p_s16): Remove.
39600 (__arm_vminvq_p_u32): Remove.
39601 (__arm_vmaxvq_p_u32): Remove.
39602 (__arm_vminvq_p_s32): Remove.
39603 (__arm_vmaxvq_p_s32): Remove.
39604 (__arm_vminvq): Remove.
39605 (__arm_vmaxvq): Remove.
39606 (__arm_vminvq_p): Remove.
39607 (__arm_vmaxvq_p): Remove.
39610 (vminavq_p): Remove.
39611 (vmaxavq_p): Remove.
39612 (vminavq_s8): Remove.
39613 (vmaxavq_s8): Remove.
39614 (vminavq_s16): Remove.
39615 (vmaxavq_s16): Remove.
39616 (vminavq_s32): Remove.
39617 (vmaxavq_s32): Remove.
39618 (vminavq_p_s8): Remove.
39619 (vmaxavq_p_s8): Remove.
39620 (vminavq_p_s16): Remove.
39621 (vmaxavq_p_s16): Remove.
39622 (vminavq_p_s32): Remove.
39623 (vmaxavq_p_s32): Remove.
39624 (__arm_vminavq_s8): Remove.
39625 (__arm_vmaxavq_s8): Remove.
39626 (__arm_vminavq_s16): Remove.
39627 (__arm_vmaxavq_s16): Remove.
39628 (__arm_vminavq_s32): Remove.
39629 (__arm_vmaxavq_s32): Remove.
39630 (__arm_vminavq_p_s8): Remove.
39631 (__arm_vmaxavq_p_s8): Remove.
39632 (__arm_vminavq_p_s16): Remove.
39633 (__arm_vmaxavq_p_s16): Remove.
39634 (__arm_vminavq_p_s32): Remove.
39635 (__arm_vmaxavq_p_s32): Remove.
39636 (__arm_vminavq): Remove.
39637 (__arm_vmaxavq): Remove.
39638 (__arm_vminavq_p): Remove.
39639 (__arm_vmaxavq_p): Remove.
39641 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39643 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
39644 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
39645 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
39646 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
39647 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
39648 (@mve_<mve_insn>q_<supf><mode>): ... this.
39649 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
39650 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
39651 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
39653 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39655 * config/arm/arm-mve-builtins-functions.h (class
39656 unspec_mve_function_exact_insn_pred_p): New.
39658 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39660 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
39661 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
39663 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39665 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
39666 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
39668 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
39670 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
39672 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
39673 (ADJUST_REG_ALLOC_ORDER): Likewise.
39674 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
39676 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
39677 Upa rather than Upl for unpredicated movprfx alternatives.
39679 2023-05-09 Jeff Law <jlaw@ventanamicro>
39681 * config/h8300/testcompare.md: Add peephole2 which uses a memory
39682 load to set flags, thus eliminating a compare against zero.
39684 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39686 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
39687 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
39688 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
39689 * config/arm/arm_mve.h (vshlltq): Remove.
39691 (vshllbq_m): Remove.
39692 (vshlltq_m): Remove.
39693 (vshllbq_x): Remove.
39694 (vshlltq_x): Remove.
39695 (vshlltq_n_u8): Remove.
39696 (vshllbq_n_u8): Remove.
39697 (vshlltq_n_s8): Remove.
39698 (vshllbq_n_s8): Remove.
39699 (vshlltq_n_u16): Remove.
39700 (vshllbq_n_u16): Remove.
39701 (vshlltq_n_s16): Remove.
39702 (vshllbq_n_s16): Remove.
39703 (vshllbq_m_n_s8): Remove.
39704 (vshllbq_m_n_s16): Remove.
39705 (vshllbq_m_n_u8): Remove.
39706 (vshllbq_m_n_u16): Remove.
39707 (vshlltq_m_n_s8): Remove.
39708 (vshlltq_m_n_s16): Remove.
39709 (vshlltq_m_n_u8): Remove.
39710 (vshlltq_m_n_u16): Remove.
39711 (vshllbq_x_n_s8): Remove.
39712 (vshllbq_x_n_s16): Remove.
39713 (vshllbq_x_n_u8): Remove.
39714 (vshllbq_x_n_u16): Remove.
39715 (vshlltq_x_n_s8): Remove.
39716 (vshlltq_x_n_s16): Remove.
39717 (vshlltq_x_n_u8): Remove.
39718 (vshlltq_x_n_u16): Remove.
39719 (__arm_vshlltq_n_u8): Remove.
39720 (__arm_vshllbq_n_u8): Remove.
39721 (__arm_vshlltq_n_s8): Remove.
39722 (__arm_vshllbq_n_s8): Remove.
39723 (__arm_vshlltq_n_u16): Remove.
39724 (__arm_vshllbq_n_u16): Remove.
39725 (__arm_vshlltq_n_s16): Remove.
39726 (__arm_vshllbq_n_s16): Remove.
39727 (__arm_vshllbq_m_n_s8): Remove.
39728 (__arm_vshllbq_m_n_s16): Remove.
39729 (__arm_vshllbq_m_n_u8): Remove.
39730 (__arm_vshllbq_m_n_u16): Remove.
39731 (__arm_vshlltq_m_n_s8): Remove.
39732 (__arm_vshlltq_m_n_s16): Remove.
39733 (__arm_vshlltq_m_n_u8): Remove.
39734 (__arm_vshlltq_m_n_u16): Remove.
39735 (__arm_vshllbq_x_n_s8): Remove.
39736 (__arm_vshllbq_x_n_s16): Remove.
39737 (__arm_vshllbq_x_n_u8): Remove.
39738 (__arm_vshllbq_x_n_u16): Remove.
39739 (__arm_vshlltq_x_n_s8): Remove.
39740 (__arm_vshlltq_x_n_s16): Remove.
39741 (__arm_vshlltq_x_n_u8): Remove.
39742 (__arm_vshlltq_x_n_u16): Remove.
39743 (__arm_vshlltq): Remove.
39744 (__arm_vshllbq): Remove.
39745 (__arm_vshllbq_m): Remove.
39746 (__arm_vshlltq_m): Remove.
39747 (__arm_vshllbq_x): Remove.
39748 (__arm_vshlltq_x): Remove.
39750 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39752 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
39753 (VSHLLBQ_N, VSHLLTQ_N): Remove.
39755 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
39756 (VSHLLxQ_M_N): New.
39757 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
39758 (mve_vshlltq_n_<supf><mode>): Merge into ...
39759 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
39760 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
39762 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
39764 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39766 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
39767 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
39769 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39771 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
39772 (vqmovntq, vqmovunbq, vqmovuntq): New.
39773 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
39774 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
39775 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
39776 (vqmovntq, vqmovunbq, vqmovuntq): New.
39777 * config/arm/arm-mve-builtins.cc
39778 (function_instance::has_inactive_argument): Handle vmovnbq,
39779 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
39780 * config/arm/arm_mve.h (vqmovntq): Remove.
39781 (vqmovnbq): Remove.
39782 (vqmovnbq_m): Remove.
39783 (vqmovntq_m): Remove.
39784 (vqmovntq_u16): Remove.
39785 (vqmovnbq_u16): Remove.
39786 (vqmovntq_s16): Remove.
39787 (vqmovnbq_s16): Remove.
39788 (vqmovntq_u32): Remove.
39789 (vqmovnbq_u32): Remove.
39790 (vqmovntq_s32): Remove.
39791 (vqmovnbq_s32): Remove.
39792 (vqmovnbq_m_s16): Remove.
39793 (vqmovntq_m_s16): Remove.
39794 (vqmovnbq_m_u16): Remove.
39795 (vqmovntq_m_u16): Remove.
39796 (vqmovnbq_m_s32): Remove.
39797 (vqmovntq_m_s32): Remove.
39798 (vqmovnbq_m_u32): Remove.
39799 (vqmovntq_m_u32): Remove.
39800 (__arm_vqmovntq_u16): Remove.
39801 (__arm_vqmovnbq_u16): Remove.
39802 (__arm_vqmovntq_s16): Remove.
39803 (__arm_vqmovnbq_s16): Remove.
39804 (__arm_vqmovntq_u32): Remove.
39805 (__arm_vqmovnbq_u32): Remove.
39806 (__arm_vqmovntq_s32): Remove.
39807 (__arm_vqmovnbq_s32): Remove.
39808 (__arm_vqmovnbq_m_s16): Remove.
39809 (__arm_vqmovntq_m_s16): Remove.
39810 (__arm_vqmovnbq_m_u16): Remove.
39811 (__arm_vqmovntq_m_u16): Remove.
39812 (__arm_vqmovnbq_m_s32): Remove.
39813 (__arm_vqmovntq_m_s32): Remove.
39814 (__arm_vqmovnbq_m_u32): Remove.
39815 (__arm_vqmovntq_m_u32): Remove.
39816 (__arm_vqmovntq): Remove.
39817 (__arm_vqmovnbq): Remove.
39818 (__arm_vqmovnbq_m): Remove.
39819 (__arm_vqmovntq_m): Remove.
39822 (vmovnbq_m): Remove.
39823 (vmovntq_m): Remove.
39824 (vmovntq_u16): Remove.
39825 (vmovnbq_u16): Remove.
39826 (vmovntq_s16): Remove.
39827 (vmovnbq_s16): Remove.
39828 (vmovntq_u32): Remove.
39829 (vmovnbq_u32): Remove.
39830 (vmovntq_s32): Remove.
39831 (vmovnbq_s32): Remove.
39832 (vmovnbq_m_s16): Remove.
39833 (vmovntq_m_s16): Remove.
39834 (vmovnbq_m_u16): Remove.
39835 (vmovntq_m_u16): Remove.
39836 (vmovnbq_m_s32): Remove.
39837 (vmovntq_m_s32): Remove.
39838 (vmovnbq_m_u32): Remove.
39839 (vmovntq_m_u32): Remove.
39840 (__arm_vmovntq_u16): Remove.
39841 (__arm_vmovnbq_u16): Remove.
39842 (__arm_vmovntq_s16): Remove.
39843 (__arm_vmovnbq_s16): Remove.
39844 (__arm_vmovntq_u32): Remove.
39845 (__arm_vmovnbq_u32): Remove.
39846 (__arm_vmovntq_s32): Remove.
39847 (__arm_vmovnbq_s32): Remove.
39848 (__arm_vmovnbq_m_s16): Remove.
39849 (__arm_vmovntq_m_s16): Remove.
39850 (__arm_vmovnbq_m_u16): Remove.
39851 (__arm_vmovntq_m_u16): Remove.
39852 (__arm_vmovnbq_m_s32): Remove.
39853 (__arm_vmovntq_m_s32): Remove.
39854 (__arm_vmovnbq_m_u32): Remove.
39855 (__arm_vmovntq_m_u32): Remove.
39856 (__arm_vmovntq): Remove.
39857 (__arm_vmovnbq): Remove.
39858 (__arm_vmovnbq_m): Remove.
39859 (__arm_vmovntq_m): Remove.
39860 (vqmovuntq): Remove.
39861 (vqmovunbq): Remove.
39862 (vqmovunbq_m): Remove.
39863 (vqmovuntq_m): Remove.
39864 (vqmovuntq_s16): Remove.
39865 (vqmovunbq_s16): Remove.
39866 (vqmovuntq_s32): Remove.
39867 (vqmovunbq_s32): Remove.
39868 (vqmovunbq_m_s16): Remove.
39869 (vqmovuntq_m_s16): Remove.
39870 (vqmovunbq_m_s32): Remove.
39871 (vqmovuntq_m_s32): Remove.
39872 (__arm_vqmovuntq_s16): Remove.
39873 (__arm_vqmovunbq_s16): Remove.
39874 (__arm_vqmovuntq_s32): Remove.
39875 (__arm_vqmovunbq_s32): Remove.
39876 (__arm_vqmovunbq_m_s16): Remove.
39877 (__arm_vqmovuntq_m_s16): Remove.
39878 (__arm_vqmovunbq_m_s32): Remove.
39879 (__arm_vqmovuntq_m_s32): Remove.
39880 (__arm_vqmovuntq): Remove.
39881 (__arm_vqmovunbq): Remove.
39882 (__arm_vqmovunbq_m): Remove.
39883 (__arm_vqmovuntq_m): Remove.
39885 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39887 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
39888 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
39891 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
39893 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
39894 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
39895 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
39896 (mve_vqmovuntq_s<mode>): Merge into ...
39897 (@mve_<mve_insn>q_<supf><mode>): ... this.
39898 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
39899 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
39900 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
39901 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
39903 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39905 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
39906 (binary_move_narrow_unsigned): New.
39907 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
39908 (binary_move_narrow_unsigned): New.
39910 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
39912 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
39913 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
39914 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
39915 (vrndpq, vrndq, vrndxq): New.
39916 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
39917 (vrndpq, vrndq, vrndxq): New.
39918 * config/arm/arm_mve.h (vrndxq): Remove.
39924 (vrndaq_m): Remove.
39925 (vrndmq_m): Remove.
39926 (vrndnq_m): Remove.
39927 (vrndpq_m): Remove.
39929 (vrndxq_m): Remove.
39931 (vrndnq_x): Remove.
39932 (vrndmq_x): Remove.
39933 (vrndpq_x): Remove.
39934 (vrndaq_x): Remove.
39935 (vrndxq_x): Remove.
39936 (vrndxq_f16): Remove.
39937 (vrndxq_f32): Remove.
39938 (vrndq_f16): Remove.
39939 (vrndq_f32): Remove.
39940 (vrndpq_f16): Remove.
39941 (vrndpq_f32): Remove.
39942 (vrndnq_f16): Remove.
39943 (vrndnq_f32): Remove.
39944 (vrndmq_f16): Remove.
39945 (vrndmq_f32): Remove.
39946 (vrndaq_f16): Remove.
39947 (vrndaq_f32): Remove.
39948 (vrndaq_m_f16): Remove.
39949 (vrndmq_m_f16): Remove.
39950 (vrndnq_m_f16): Remove.
39951 (vrndpq_m_f16): Remove.
39952 (vrndq_m_f16): Remove.
39953 (vrndxq_m_f16): Remove.
39954 (vrndaq_m_f32): Remove.
39955 (vrndmq_m_f32): Remove.
39956 (vrndnq_m_f32): Remove.
39957 (vrndpq_m_f32): Remove.
39958 (vrndq_m_f32): Remove.
39959 (vrndxq_m_f32): Remove.
39960 (vrndq_x_f16): Remove.
39961 (vrndq_x_f32): Remove.
39962 (vrndnq_x_f16): Remove.
39963 (vrndnq_x_f32): Remove.
39964 (vrndmq_x_f16): Remove.
39965 (vrndmq_x_f32): Remove.
39966 (vrndpq_x_f16): Remove.
39967 (vrndpq_x_f32): Remove.
39968 (vrndaq_x_f16): Remove.
39969 (vrndaq_x_f32): Remove.
39970 (vrndxq_x_f16): Remove.
39971 (vrndxq_x_f32): Remove.
39972 (__arm_vrndxq_f16): Remove.
39973 (__arm_vrndxq_f32): Remove.
39974 (__arm_vrndq_f16): Remove.
39975 (__arm_vrndq_f32): Remove.
39976 (__arm_vrndpq_f16): Remove.
39977 (__arm_vrndpq_f32): Remove.
39978 (__arm_vrndnq_f16): Remove.
39979 (__arm_vrndnq_f32): Remove.
39980 (__arm_vrndmq_f16): Remove.
39981 (__arm_vrndmq_f32): Remove.
39982 (__arm_vrndaq_f16): Remove.
39983 (__arm_vrndaq_f32): Remove.
39984 (__arm_vrndaq_m_f16): Remove.
39985 (__arm_vrndmq_m_f16): Remove.
39986 (__arm_vrndnq_m_f16): Remove.
39987 (__arm_vrndpq_m_f16): Remove.
39988 (__arm_vrndq_m_f16): Remove.
39989 (__arm_vrndxq_m_f16): Remove.
39990 (__arm_vrndaq_m_f32): Remove.
39991 (__arm_vrndmq_m_f32): Remove.
39992 (__arm_vrndnq_m_f32): Remove.
39993 (__arm_vrndpq_m_f32): Remove.
39994 (__arm_vrndq_m_f32): Remove.
39995 (__arm_vrndxq_m_f32): Remove.
39996 (__arm_vrndq_x_f16): Remove.
39997 (__arm_vrndq_x_f32): Remove.
39998 (__arm_vrndnq_x_f16): Remove.
39999 (__arm_vrndnq_x_f32): Remove.
40000 (__arm_vrndmq_x_f16): Remove.
40001 (__arm_vrndmq_x_f32): Remove.
40002 (__arm_vrndpq_x_f16): Remove.
40003 (__arm_vrndpq_x_f32): Remove.
40004 (__arm_vrndaq_x_f16): Remove.
40005 (__arm_vrndaq_x_f32): Remove.
40006 (__arm_vrndxq_x_f16): Remove.
40007 (__arm_vrndxq_x_f32): Remove.
40008 (__arm_vrndxq): Remove.
40009 (__arm_vrndq): Remove.
40010 (__arm_vrndpq): Remove.
40011 (__arm_vrndnq): Remove.
40012 (__arm_vrndmq): Remove.
40013 (__arm_vrndaq): Remove.
40014 (__arm_vrndaq_m): Remove.
40015 (__arm_vrndmq_m): Remove.
40016 (__arm_vrndnq_m): Remove.
40017 (__arm_vrndpq_m): Remove.
40018 (__arm_vrndq_m): Remove.
40019 (__arm_vrndxq_m): Remove.
40020 (__arm_vrndq_x): Remove.
40021 (__arm_vrndnq_x): Remove.
40022 (__arm_vrndmq_x): Remove.
40023 (__arm_vrndpq_x): Remove.
40024 (__arm_vrndaq_x): Remove.
40025 (__arm_vrndxq_x): Remove.
40027 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
40029 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
40030 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
40031 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
40032 (vclzq, vqabsq, vqnegq): New.
40033 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
40034 (vqabsq, vqnegq): New.
40035 * config/arm/arm_mve.h (vabsq): Remove.
40038 (vabsq_f16): Remove.
40039 (vabsq_f32): Remove.
40040 (vabsq_s8): Remove.
40041 (vabsq_s16): Remove.
40042 (vabsq_s32): Remove.
40043 (vabsq_m_s8): Remove.
40044 (vabsq_m_s16): Remove.
40045 (vabsq_m_s32): Remove.
40046 (vabsq_m_f16): Remove.
40047 (vabsq_m_f32): Remove.
40048 (vabsq_x_s8): Remove.
40049 (vabsq_x_s16): Remove.
40050 (vabsq_x_s32): Remove.
40051 (vabsq_x_f16): Remove.
40052 (vabsq_x_f32): Remove.
40053 (__arm_vabsq_s8): Remove.
40054 (__arm_vabsq_s16): Remove.
40055 (__arm_vabsq_s32): Remove.
40056 (__arm_vabsq_m_s8): Remove.
40057 (__arm_vabsq_m_s16): Remove.
40058 (__arm_vabsq_m_s32): Remove.
40059 (__arm_vabsq_x_s8): Remove.
40060 (__arm_vabsq_x_s16): Remove.
40061 (__arm_vabsq_x_s32): Remove.
40062 (__arm_vabsq_f16): Remove.
40063 (__arm_vabsq_f32): Remove.
40064 (__arm_vabsq_m_f16): Remove.
40065 (__arm_vabsq_m_f32): Remove.
40066 (__arm_vabsq_x_f16): Remove.
40067 (__arm_vabsq_x_f32): Remove.
40068 (__arm_vabsq): Remove.
40069 (__arm_vabsq_m): Remove.
40070 (__arm_vabsq_x): Remove.
40074 (vnegq_f16): Remove.
40075 (vnegq_f32): Remove.
40076 (vnegq_s8): Remove.
40077 (vnegq_s16): Remove.
40078 (vnegq_s32): Remove.
40079 (vnegq_m_s8): Remove.
40080 (vnegq_m_s16): Remove.
40081 (vnegq_m_s32): Remove.
40082 (vnegq_m_f16): Remove.
40083 (vnegq_m_f32): Remove.
40084 (vnegq_x_s8): Remove.
40085 (vnegq_x_s16): Remove.
40086 (vnegq_x_s32): Remove.
40087 (vnegq_x_f16): Remove.
40088 (vnegq_x_f32): Remove.
40089 (__arm_vnegq_s8): Remove.
40090 (__arm_vnegq_s16): Remove.
40091 (__arm_vnegq_s32): Remove.
40092 (__arm_vnegq_m_s8): Remove.
40093 (__arm_vnegq_m_s16): Remove.
40094 (__arm_vnegq_m_s32): Remove.
40095 (__arm_vnegq_x_s8): Remove.
40096 (__arm_vnegq_x_s16): Remove.
40097 (__arm_vnegq_x_s32): Remove.
40098 (__arm_vnegq_f16): Remove.
40099 (__arm_vnegq_f32): Remove.
40100 (__arm_vnegq_m_f16): Remove.
40101 (__arm_vnegq_m_f32): Remove.
40102 (__arm_vnegq_x_f16): Remove.
40103 (__arm_vnegq_x_f32): Remove.
40104 (__arm_vnegq): Remove.
40105 (__arm_vnegq_m): Remove.
40106 (__arm_vnegq_x): Remove.
40110 (vclsq_s8): Remove.
40111 (vclsq_s16): Remove.
40112 (vclsq_s32): Remove.
40113 (vclsq_m_s8): Remove.
40114 (vclsq_m_s16): Remove.
40115 (vclsq_m_s32): Remove.
40116 (vclsq_x_s8): Remove.
40117 (vclsq_x_s16): Remove.
40118 (vclsq_x_s32): Remove.
40119 (__arm_vclsq_s8): Remove.
40120 (__arm_vclsq_s16): Remove.
40121 (__arm_vclsq_s32): Remove.
40122 (__arm_vclsq_m_s8): Remove.
40123 (__arm_vclsq_m_s16): Remove.
40124 (__arm_vclsq_m_s32): Remove.
40125 (__arm_vclsq_x_s8): Remove.
40126 (__arm_vclsq_x_s16): Remove.
40127 (__arm_vclsq_x_s32): Remove.
40128 (__arm_vclsq): Remove.
40129 (__arm_vclsq_m): Remove.
40130 (__arm_vclsq_x): Remove.
40134 (vclzq_s8): Remove.
40135 (vclzq_s16): Remove.
40136 (vclzq_s32): Remove.
40137 (vclzq_u8): Remove.
40138 (vclzq_u16): Remove.
40139 (vclzq_u32): Remove.
40140 (vclzq_m_u8): Remove.
40141 (vclzq_m_s8): Remove.
40142 (vclzq_m_u16): Remove.
40143 (vclzq_m_s16): Remove.
40144 (vclzq_m_u32): Remove.
40145 (vclzq_m_s32): Remove.
40146 (vclzq_x_s8): Remove.
40147 (vclzq_x_s16): Remove.
40148 (vclzq_x_s32): Remove.
40149 (vclzq_x_u8): Remove.
40150 (vclzq_x_u16): Remove.
40151 (vclzq_x_u32): Remove.
40152 (__arm_vclzq_s8): Remove.
40153 (__arm_vclzq_s16): Remove.
40154 (__arm_vclzq_s32): Remove.
40155 (__arm_vclzq_u8): Remove.
40156 (__arm_vclzq_u16): Remove.
40157 (__arm_vclzq_u32): Remove.
40158 (__arm_vclzq_m_u8): Remove.
40159 (__arm_vclzq_m_s8): Remove.
40160 (__arm_vclzq_m_u16): Remove.
40161 (__arm_vclzq_m_s16): Remove.
40162 (__arm_vclzq_m_u32): Remove.
40163 (__arm_vclzq_m_s32): Remove.
40164 (__arm_vclzq_x_s8): Remove.
40165 (__arm_vclzq_x_s16): Remove.
40166 (__arm_vclzq_x_s32): Remove.
40167 (__arm_vclzq_x_u8): Remove.
40168 (__arm_vclzq_x_u16): Remove.
40169 (__arm_vclzq_x_u32): Remove.
40170 (__arm_vclzq): Remove.
40171 (__arm_vclzq_m): Remove.
40172 (__arm_vclzq_x): Remove.
40175 (vqnegq_m): Remove.
40176 (vqabsq_m): Remove.
40177 (vqabsq_s8): Remove.
40178 (vqabsq_s16): Remove.
40179 (vqabsq_s32): Remove.
40180 (vqnegq_s8): Remove.
40181 (vqnegq_s16): Remove.
40182 (vqnegq_s32): Remove.
40183 (vqnegq_m_s8): Remove.
40184 (vqabsq_m_s8): Remove.
40185 (vqnegq_m_s16): Remove.
40186 (vqabsq_m_s16): Remove.
40187 (vqnegq_m_s32): Remove.
40188 (vqabsq_m_s32): Remove.
40189 (__arm_vqabsq_s8): Remove.
40190 (__arm_vqabsq_s16): Remove.
40191 (__arm_vqabsq_s32): Remove.
40192 (__arm_vqnegq_s8): Remove.
40193 (__arm_vqnegq_s16): Remove.
40194 (__arm_vqnegq_s32): Remove.
40195 (__arm_vqnegq_m_s8): Remove.
40196 (__arm_vqabsq_m_s8): Remove.
40197 (__arm_vqnegq_m_s16): Remove.
40198 (__arm_vqabsq_m_s16): Remove.
40199 (__arm_vqnegq_m_s32): Remove.
40200 (__arm_vqabsq_m_s32): Remove.
40201 (__arm_vqabsq): Remove.
40202 (__arm_vqnegq): Remove.
40203 (__arm_vqnegq_m): Remove.
40204 (__arm_vqabsq_m): Remove.
40206 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
40208 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
40209 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
40210 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
40211 vrndm, vrndn, vrndp, vrnd, vrndx.
40212 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
40213 VQABSQ_M_S, VQNEGQ_M_S.
40215 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
40216 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
40217 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
40218 (@mve_<mve_insn>q_f<mode>): ... this.
40219 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
40220 (mve_v<absneg_str>q_f<mode>): ... this.
40221 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
40222 (mve_v<absneg_str>q_s<mode>): ... this.
40223 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
40224 (@mve_<mve_insn>q_<supf><mode>): ... this.
40225 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
40226 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
40227 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
40228 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
40229 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
40230 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
40231 (mve_vrndxq_m_f<mode>): Merge into ...
40232 (@mve_<mve_insn>q_m_f<mode>): ... this.
40234 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
40236 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
40237 * config/arm/arm-mve-builtins-shapes.h (unary): New.
40239 2023-05-09 Jakub Jelinek <jakub@redhat.com>
40241 * mux-utils.h: Fix comment typo, avoides -> avoids.
40243 2023-05-09 Jakub Jelinek <jakub@redhat.com>
40245 PR tree-optimization/109778
40246 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
40247 wi::zext (x, width) rather than x if width != precision, rather
40248 than using wi::zext (right, width) after the shift.
40249 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
40250 of wi::lrotate or wi::rrotate.
40252 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40254 * genmatch.cc (get_out_file): Make static and rename to ...
40255 (choose_output): ... this. Reimplement. Update all uses ...
40256 (decision_tree::gen): ... here and ...
40259 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40261 * genmatch.cc (showUsage): Reimplement as ...
40262 (usage): ...this. Adjust all uses.
40263 (main): Print usage when no arguments. Add missing 'return 1'.
40265 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
40267 * genmatch.cc (header_file): Make static.
40268 (emit_func): Rename to...
40269 (fp_decl): ... this. Adjust all uses.
40270 (fp_decl_done): New function. Use it...
40271 (decision_tree::gen): ... here and...
40272 (write_predicate): ... here.
40275 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
40277 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
40280 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
40281 Uros Bizjak <ubizjak@gmail.com>
40283 * config/i386/i386.md (any_or_plus): Move definition earlier.
40284 (*insvti_highpart_1): New define_insn_and_split to overwrite
40285 (insv) the highpart of a TImode register/memory.
40287 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
40289 * auto-profile.cc (auto_profile): Check todo from early_inline
40290 to see if cleanup_tree_vfg needs to be called.
40291 (early_inline): Return todo from early_inliner.
40293 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
40295 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
40297 (pass_vsetvl::get_block_info): New.
40298 (pass_vsetvl::update_vector_info): New.
40299 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
40300 (pass_vsetvl::compute_local_backward_infos): Ditto.
40301 (pass_vsetvl::transfer_before): Ditto.
40302 (pass_vsetvl::transfer_after): Ditto.
40303 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
40304 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
40305 (pass_vsetvl::cleanup_insns): Ditto.
40306 (pass_vsetvl::compute_local_backward_infos): Use
40307 update_vector_info.
40309 2023-05-08 Jeff Law <jlaw@ventanamicro>
40311 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
40313 2023-05-08 Richard Biener <rguenther@suse.de>
40314 Michael Meissner <meissner@linux.ibm.com>
40316 PR middle-end/108623
40317 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
40318 Align bit fields > 1 bit to at least an 8-bit boundary.
40320 2023-05-08 Andrew Pinski <apinski@marvell.com>
40322 PR tree-optimization/109424
40323 PR tree-optimization/59424
40324 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
40325 (factor_out_conditional_operation): This and add support for all unary
40327 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
40328 to call factor_out_conditional_operation instead.
40330 2023-05-08 Andrew Pinski <apinski@marvell.com>
40332 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
40333 over factor_out_conditional_conversion.
40335 2023-05-08 Andrew Pinski <apinski@marvell.com>
40337 PR tree-optimization/49959
40338 PR tree-optimization/103771
40339 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
40340 Diamond shapped bb form for factor_out_conditional_conversion.
40342 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40344 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
40345 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
40346 (riscv_vector_get_mask_mode): Ditto.
40347 (get_mask_policy_no_pred): Ditto.
40348 (get_tail_policy_no_pred): Ditto.
40349 (get_mask_mode): New function.
40350 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
40351 (get_tail_policy_no_pred): Ditto.
40352 (riscv_vector_mask_mode_p): Ditto.
40353 (riscv_vector_get_mask_mode): Ditto.
40354 (get_mask_mode): New function.
40355 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
40357 (get_tail_policy_for_pred): Ditto.
40358 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
40359 (get_mask_policy_for_pred): Ditto
40360 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
40362 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
40364 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
40365 (riscv_select_multilib): New.
40366 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
40367 also handle select_by_abi.
40368 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
40369 to select_by_abi_arch_cmodel from 1.
40370 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
40371 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
40373 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
40375 * Makefile.in: (gimple-match-head.o-warn): Remove.
40376 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
40377 gimple-match-exports.cc.
40378 (gimple-match-auto.h): Only depend on s-gimple-match.
40379 (generic-match-auto.h): Likewise.
40381 2023-05-08 Andrew Pinski <apinski@marvell.com>
40383 PR tree-optimization/109691
40384 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
40386 If the removed statement can throw, have need_eh_cleanup
40387 include the bb of that statement.
40388 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
40389 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
40391 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
40392 Initialize dceworklist instead of stmts_to_remove.
40393 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
40394 Destore dceworklist instead of stmts_to_remove.
40395 (substitute_and_fold_dom_walker::before_dom_children):
40396 Set dceworklist instead of adding to stmts_to_remove.
40397 (substitute_and_fold_engine::substitute_and_fold):
40398 Call simple_dce_from_worklist instead of poping
40400 Don't update the stat on removal statements.
40402 2023-05-07 Andrew Pinski <apinski@marvell.com>
40405 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
40406 Change argument type to aarch64_feature_flags.
40407 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
40408 constructor argument type to aarch64_feature_flags.
40409 Change m_old_asm_isa_flags to be aarch64_feature_flags.
40411 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
40413 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
40414 more parallel code if can_create_pseudo_p.
40416 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
40419 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
40420 immediately before moving a multi-word register by parts.
40422 2023-05-06 Jeff Law <jlaw@ventanamicro>
40424 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
40426 2023-05-06 Michael Collison <collison@rivosinc.com>
40428 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
40429 Check that GET_MODE_NUNITS is a multiple of 2.
40431 2023-05-06 Michael Collison <collison@rivosinc.com>
40433 * config/riscv/riscv.cc
40434 (riscv_estimated_poly_value): Implement
40435 TARGET_ESTIMATED_POLY_VALUE.
40436 (riscv_preferred_simd_mode): Implement
40437 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
40438 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
40439 (riscv_empty_mask_is_expensive): Implement
40440 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
40441 (riscv_vectorize_create_costs): Implement
40442 TARGET_VECTORIZE_CREATE_COSTS.
40443 (riscv_support_vector_misalignment): Implement
40444 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
40445 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
40446 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
40447 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
40448 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
40450 2023-05-06 Jeff Law <jlaw@ventanamicro>
40452 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
40453 duplicate definition.
40455 2023-05-06 Michael Collison <collison@rivosinc.com>
40457 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
40458 (riscv_vector_preferred_simd_mode): Ditto.
40459 (get_mask_policy_no_pred): Ditto.
40460 (get_tail_policy_no_pred): Ditto.
40461 (riscv_vector_mask_mode_p): Ditto.
40462 (riscv_vector_get_mask_mode): Ditto.
40464 2023-05-06 Michael Collison <collison@rivosinc.com>
40466 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
40467 Remove static declaration to to make externally visible.
40468 (get_mask_policy_for_pred): Ditto.
40469 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
40470 New external declaration.
40471 (get_mask_policy_for_pred): Ditto.
40473 2023-05-06 Michael Collison <collison@rivosinc.com>
40475 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
40476 (riscv_vector_get_mask_mode): Ditto.
40477 (get_mask_policy_no_pred): Ditto.
40478 (get_tail_policy_no_pred): Ditto.
40480 2023-05-06 Xi Ruoyao <xry111@xry111.site>
40482 * config/loongarch/loongarch.h (struct machine_function): Add
40483 reg_is_wrapped_separately array for register wrapping
40485 * config/loongarch/loongarch.cc
40486 (loongarch_get_separate_components): New function.
40487 (loongarch_components_for_bb): Likewise.
40488 (loongarch_disqualify_components): Likewise.
40489 (loongarch_process_components): Likewise.
40490 (loongarch_emit_prologue_components): Likewise.
40491 (loongarch_emit_epilogue_components): Likewise.
40492 (loongarch_set_handled_components): Likewise.
40493 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
40494 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
40495 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
40496 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
40497 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
40498 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
40499 (loongarch_for_each_saved_reg): Skip registers that are wrapped
40502 2023-05-06 Xi Ruoyao <xry111@xry111.site>
40505 * Makefile.in (s-macro_list): Pass -nostdinc to
40508 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40510 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
40511 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
40512 (preferred_simd_mode): Ditto.
40513 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
40514 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
40515 (riscv_preferred_simd_mode): New function.
40516 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
40517 * config/riscv/vector.md: Add autovec.md.
40518 * config/riscv/autovec.md: New file.
40520 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40522 * real.h (dconst_pi): Define.
40523 (dconst_e_ptr): Formatting fix.
40524 (dconst_pi_ptr): Declare.
40525 * real.cc (dconst_pi_ptr): New function.
40526 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
40527 boundaries range with range computed from sin/cos of the particular
40528 bounds if the argument range is shorter than 2*pi.
40529 (cfn_sincos::op1_range): Take bulps into account when determining
40530 which result ranges are always invalid or behave like known NAN.
40532 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
40534 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
40535 pass type to vrange_storage::equal_p.
40536 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
40537 (irange_storage::equal_p): Same.
40538 (frange_storage::equal_p): Same.
40539 * value-range-storage.h (class frange_storage): Same.
40541 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40544 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
40545 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
40547 2023-05-06 liuhongt <hongtao.liu@intel.com>
40549 * combine.cc (maybe_swap_commutative_operands): Canonicalize
40550 vec_merge when mask is constant.
40551 * doc/md.texi: Document vec_merge canonicalization.
40553 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40555 * value-range.h (frange_arithmetic): Declare.
40556 * range-op-float.cc (frange_arithmetic): No longer static.
40557 * gimple-range-op.cc (frange_mpfr_arg1): New function.
40558 (cfn_sqrt::fold_range): Intersect the generic boundaries range
40559 with range computed from sqrt of the particular bounds.
40560 (cfn_sqrt::op1_range): Intersect the generic boundaries range
40561 with range computed from squared particular bounds.
40563 2023-05-06 Jakub Jelinek <jakub@redhat.com>
40565 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
40566 earlier with helper variables also renamed.
40567 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
40568 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
40569 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
40571 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
40573 * config/cris/cris.md (splitop): Add PLUS.
40574 * config/cris/cris.cc (cris_split_constant): Also handle
40575 PLUS when a split into two insns may be useful.
40577 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40579 * config/cris/cris.md (movandsplit1): New define_peephole2.
40581 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40583 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
40585 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
40587 * doc/md.texi (define_peephole2): Document order of scanning.
40589 2023-05-05 Pan Li <pan2.li@intel.com>
40590 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40592 * config/riscv/vector.md: Allow const as the operand of RVV
40593 indexed load/store.
40595 2023-05-05 Pan Li <pan2.li@intel.com>
40597 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
40598 consumed by simplify_rtx.
40600 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40602 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
40603 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
40604 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
40605 * config/arm/arm_mve.h (vshrq): Remove.
40607 (vrshrq_m): Remove.
40609 (vrshrq_x): Remove.
40611 (vshrq_n_s8): Remove.
40612 (vshrq_n_s16): Remove.
40613 (vshrq_n_s32): Remove.
40614 (vshrq_n_u8): Remove.
40615 (vshrq_n_u16): Remove.
40616 (vshrq_n_u32): Remove.
40617 (vrshrq_n_u8): Remove.
40618 (vrshrq_n_s8): Remove.
40619 (vrshrq_n_u16): Remove.
40620 (vrshrq_n_s16): Remove.
40621 (vrshrq_n_u32): Remove.
40622 (vrshrq_n_s32): Remove.
40623 (vrshrq_m_n_s8): Remove.
40624 (vrshrq_m_n_s32): Remove.
40625 (vrshrq_m_n_s16): Remove.
40626 (vrshrq_m_n_u8): Remove.
40627 (vrshrq_m_n_u32): Remove.
40628 (vrshrq_m_n_u16): Remove.
40629 (vshrq_m_n_s8): Remove.
40630 (vshrq_m_n_s32): Remove.
40631 (vshrq_m_n_s16): Remove.
40632 (vshrq_m_n_u8): Remove.
40633 (vshrq_m_n_u32): Remove.
40634 (vshrq_m_n_u16): Remove.
40635 (vrshrq_x_n_s8): Remove.
40636 (vrshrq_x_n_s16): Remove.
40637 (vrshrq_x_n_s32): Remove.
40638 (vrshrq_x_n_u8): Remove.
40639 (vrshrq_x_n_u16): Remove.
40640 (vrshrq_x_n_u32): Remove.
40641 (vshrq_x_n_s8): Remove.
40642 (vshrq_x_n_s16): Remove.
40643 (vshrq_x_n_s32): Remove.
40644 (vshrq_x_n_u8): Remove.
40645 (vshrq_x_n_u16): Remove.
40646 (vshrq_x_n_u32): Remove.
40647 (__arm_vshrq_n_s8): Remove.
40648 (__arm_vshrq_n_s16): Remove.
40649 (__arm_vshrq_n_s32): Remove.
40650 (__arm_vshrq_n_u8): Remove.
40651 (__arm_vshrq_n_u16): Remove.
40652 (__arm_vshrq_n_u32): Remove.
40653 (__arm_vrshrq_n_u8): Remove.
40654 (__arm_vrshrq_n_s8): Remove.
40655 (__arm_vrshrq_n_u16): Remove.
40656 (__arm_vrshrq_n_s16): Remove.
40657 (__arm_vrshrq_n_u32): Remove.
40658 (__arm_vrshrq_n_s32): Remove.
40659 (__arm_vrshrq_m_n_s8): Remove.
40660 (__arm_vrshrq_m_n_s32): Remove.
40661 (__arm_vrshrq_m_n_s16): Remove.
40662 (__arm_vrshrq_m_n_u8): Remove.
40663 (__arm_vrshrq_m_n_u32): Remove.
40664 (__arm_vrshrq_m_n_u16): Remove.
40665 (__arm_vshrq_m_n_s8): Remove.
40666 (__arm_vshrq_m_n_s32): Remove.
40667 (__arm_vshrq_m_n_s16): Remove.
40668 (__arm_vshrq_m_n_u8): Remove.
40669 (__arm_vshrq_m_n_u32): Remove.
40670 (__arm_vshrq_m_n_u16): Remove.
40671 (__arm_vrshrq_x_n_s8): Remove.
40672 (__arm_vrshrq_x_n_s16): Remove.
40673 (__arm_vrshrq_x_n_s32): Remove.
40674 (__arm_vrshrq_x_n_u8): Remove.
40675 (__arm_vrshrq_x_n_u16): Remove.
40676 (__arm_vrshrq_x_n_u32): Remove.
40677 (__arm_vshrq_x_n_s8): Remove.
40678 (__arm_vshrq_x_n_s16): Remove.
40679 (__arm_vshrq_x_n_s32): Remove.
40680 (__arm_vshrq_x_n_u8): Remove.
40681 (__arm_vshrq_x_n_u16): Remove.
40682 (__arm_vshrq_x_n_u32): Remove.
40683 (__arm_vshrq): Remove.
40684 (__arm_vrshrq): Remove.
40685 (__arm_vrshrq_m): Remove.
40686 (__arm_vshrq_m): Remove.
40687 (__arm_vrshrq_x): Remove.
40688 (__arm_vshrq_x): Remove.
40690 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40692 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
40693 (mve_insn): Add vrshr, vshr.
40694 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
40695 (mve_vrshrq_n_<supf><mode>): Merge into ...
40696 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40697 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
40699 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40701 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40703 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
40704 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
40706 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40708 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
40709 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
40710 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
40711 (vqrshrunbq, vqrshruntq): New.
40712 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
40713 (vqrshrunbq, vqrshruntq): New.
40714 * config/arm/arm-mve-builtins.cc
40715 (function_instance::has_inactive_argument): Handle vqshrunbq,
40716 vqshruntq, vqrshrunbq, vqrshruntq.
40717 * config/arm/arm_mve.h (vqrshrunbq): Remove.
40718 (vqrshruntq): Remove.
40719 (vqrshrunbq_m): Remove.
40720 (vqrshruntq_m): Remove.
40721 (vqrshrunbq_n_s16): Remove.
40722 (vqrshrunbq_n_s32): Remove.
40723 (vqrshruntq_n_s16): Remove.
40724 (vqrshruntq_n_s32): Remove.
40725 (vqrshrunbq_m_n_s32): Remove.
40726 (vqrshrunbq_m_n_s16): Remove.
40727 (vqrshruntq_m_n_s32): Remove.
40728 (vqrshruntq_m_n_s16): Remove.
40729 (__arm_vqrshrunbq_n_s16): Remove.
40730 (__arm_vqrshrunbq_n_s32): Remove.
40731 (__arm_vqrshruntq_n_s16): Remove.
40732 (__arm_vqrshruntq_n_s32): Remove.
40733 (__arm_vqrshrunbq_m_n_s32): Remove.
40734 (__arm_vqrshrunbq_m_n_s16): Remove.
40735 (__arm_vqrshruntq_m_n_s32): Remove.
40736 (__arm_vqrshruntq_m_n_s16): Remove.
40737 (__arm_vqrshrunbq): Remove.
40738 (__arm_vqrshruntq): Remove.
40739 (__arm_vqrshrunbq_m): Remove.
40740 (__arm_vqrshruntq_m): Remove.
40741 (vqshrunbq): Remove.
40742 (vqshruntq): Remove.
40743 (vqshrunbq_m): Remove.
40744 (vqshruntq_m): Remove.
40745 (vqshrunbq_n_s16): Remove.
40746 (vqshruntq_n_s16): Remove.
40747 (vqshrunbq_n_s32): Remove.
40748 (vqshruntq_n_s32): Remove.
40749 (vqshrunbq_m_n_s32): Remove.
40750 (vqshrunbq_m_n_s16): Remove.
40751 (vqshruntq_m_n_s32): Remove.
40752 (vqshruntq_m_n_s16): Remove.
40753 (__arm_vqshrunbq_n_s16): Remove.
40754 (__arm_vqshruntq_n_s16): Remove.
40755 (__arm_vqshrunbq_n_s32): Remove.
40756 (__arm_vqshruntq_n_s32): Remove.
40757 (__arm_vqshrunbq_m_n_s32): Remove.
40758 (__arm_vqshrunbq_m_n_s16): Remove.
40759 (__arm_vqshruntq_m_n_s32): Remove.
40760 (__arm_vqshruntq_m_n_s16): Remove.
40761 (__arm_vqshrunbq): Remove.
40762 (__arm_vqshruntq): Remove.
40763 (__arm_vqshrunbq_m): Remove.
40764 (__arm_vqshruntq_m): Remove.
40766 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40768 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
40769 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
40770 (MVE_SHRN_M_N): Likewise.
40771 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
40772 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
40774 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
40775 (mve_vqrshruntq_n_s<mode>): Remove.
40776 (mve_vqshrunbq_n_s<mode>): Remove.
40777 (mve_vqshruntq_n_s<mode>): Remove.
40778 (mve_vqrshrunbq_m_n_s<mode>): Remove.
40779 (mve_vqrshruntq_m_n_s<mode>): Remove.
40780 (mve_vqshrunbq_m_n_s<mode>): Remove.
40781 (mve_vqshruntq_m_n_s<mode>): Remove.
40783 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40785 * config/arm/arm-mve-builtins-shapes.cc
40786 (binary_rshift_narrow_unsigned): New.
40787 * config/arm/arm-mve-builtins-shapes.h
40788 (binary_rshift_narrow_unsigned): New.
40790 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40792 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
40793 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
40794 (vqrshrnbq, vqrshrntq): New.
40795 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
40796 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
40798 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
40799 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
40800 * config/arm/arm-mve-builtins.cc
40801 (function_instance::has_inactive_argument): Handle vshrnbq,
40802 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
40804 * config/arm/arm_mve.h (vshrnbq): Remove.
40806 (vshrnbq_m): Remove.
40807 (vshrntq_m): Remove.
40808 (vshrnbq_n_s16): Remove.
40809 (vshrntq_n_s16): Remove.
40810 (vshrnbq_n_u16): Remove.
40811 (vshrntq_n_u16): Remove.
40812 (vshrnbq_n_s32): Remove.
40813 (vshrntq_n_s32): Remove.
40814 (vshrnbq_n_u32): Remove.
40815 (vshrntq_n_u32): Remove.
40816 (vshrnbq_m_n_s32): Remove.
40817 (vshrnbq_m_n_s16): Remove.
40818 (vshrnbq_m_n_u32): Remove.
40819 (vshrnbq_m_n_u16): Remove.
40820 (vshrntq_m_n_s32): Remove.
40821 (vshrntq_m_n_s16): Remove.
40822 (vshrntq_m_n_u32): Remove.
40823 (vshrntq_m_n_u16): Remove.
40824 (__arm_vshrnbq_n_s16): Remove.
40825 (__arm_vshrntq_n_s16): Remove.
40826 (__arm_vshrnbq_n_u16): Remove.
40827 (__arm_vshrntq_n_u16): Remove.
40828 (__arm_vshrnbq_n_s32): Remove.
40829 (__arm_vshrntq_n_s32): Remove.
40830 (__arm_vshrnbq_n_u32): Remove.
40831 (__arm_vshrntq_n_u32): Remove.
40832 (__arm_vshrnbq_m_n_s32): Remove.
40833 (__arm_vshrnbq_m_n_s16): Remove.
40834 (__arm_vshrnbq_m_n_u32): Remove.
40835 (__arm_vshrnbq_m_n_u16): Remove.
40836 (__arm_vshrntq_m_n_s32): Remove.
40837 (__arm_vshrntq_m_n_s16): Remove.
40838 (__arm_vshrntq_m_n_u32): Remove.
40839 (__arm_vshrntq_m_n_u16): Remove.
40840 (__arm_vshrnbq): Remove.
40841 (__arm_vshrntq): Remove.
40842 (__arm_vshrnbq_m): Remove.
40843 (__arm_vshrntq_m): Remove.
40844 (vrshrnbq): Remove.
40845 (vrshrntq): Remove.
40846 (vrshrnbq_m): Remove.
40847 (vrshrntq_m): Remove.
40848 (vrshrnbq_n_s16): Remove.
40849 (vrshrntq_n_s16): Remove.
40850 (vrshrnbq_n_u16): Remove.
40851 (vrshrntq_n_u16): Remove.
40852 (vrshrnbq_n_s32): Remove.
40853 (vrshrntq_n_s32): Remove.
40854 (vrshrnbq_n_u32): Remove.
40855 (vrshrntq_n_u32): Remove.
40856 (vrshrnbq_m_n_s32): Remove.
40857 (vrshrnbq_m_n_s16): Remove.
40858 (vrshrnbq_m_n_u32): Remove.
40859 (vrshrnbq_m_n_u16): Remove.
40860 (vrshrntq_m_n_s32): Remove.
40861 (vrshrntq_m_n_s16): Remove.
40862 (vrshrntq_m_n_u32): Remove.
40863 (vrshrntq_m_n_u16): Remove.
40864 (__arm_vrshrnbq_n_s16): Remove.
40865 (__arm_vrshrntq_n_s16): Remove.
40866 (__arm_vrshrnbq_n_u16): Remove.
40867 (__arm_vrshrntq_n_u16): Remove.
40868 (__arm_vrshrnbq_n_s32): Remove.
40869 (__arm_vrshrntq_n_s32): Remove.
40870 (__arm_vrshrnbq_n_u32): Remove.
40871 (__arm_vrshrntq_n_u32): Remove.
40872 (__arm_vrshrnbq_m_n_s32): Remove.
40873 (__arm_vrshrnbq_m_n_s16): Remove.
40874 (__arm_vrshrnbq_m_n_u32): Remove.
40875 (__arm_vrshrnbq_m_n_u16): Remove.
40876 (__arm_vrshrntq_m_n_s32): Remove.
40877 (__arm_vrshrntq_m_n_s16): Remove.
40878 (__arm_vrshrntq_m_n_u32): Remove.
40879 (__arm_vrshrntq_m_n_u16): Remove.
40880 (__arm_vrshrnbq): Remove.
40881 (__arm_vrshrntq): Remove.
40882 (__arm_vrshrnbq_m): Remove.
40883 (__arm_vrshrntq_m): Remove.
40884 (vqshrnbq): Remove.
40885 (vqshrntq): Remove.
40886 (vqshrnbq_m): Remove.
40887 (vqshrntq_m): Remove.
40888 (vqshrnbq_n_s16): Remove.
40889 (vqshrntq_n_s16): Remove.
40890 (vqshrnbq_n_u16): Remove.
40891 (vqshrntq_n_u16): Remove.
40892 (vqshrnbq_n_s32): Remove.
40893 (vqshrntq_n_s32): Remove.
40894 (vqshrnbq_n_u32): Remove.
40895 (vqshrntq_n_u32): Remove.
40896 (vqshrnbq_m_n_s32): Remove.
40897 (vqshrnbq_m_n_s16): Remove.
40898 (vqshrnbq_m_n_u32): Remove.
40899 (vqshrnbq_m_n_u16): Remove.
40900 (vqshrntq_m_n_s32): Remove.
40901 (vqshrntq_m_n_s16): Remove.
40902 (vqshrntq_m_n_u32): Remove.
40903 (vqshrntq_m_n_u16): Remove.
40904 (__arm_vqshrnbq_n_s16): Remove.
40905 (__arm_vqshrntq_n_s16): Remove.
40906 (__arm_vqshrnbq_n_u16): Remove.
40907 (__arm_vqshrntq_n_u16): Remove.
40908 (__arm_vqshrnbq_n_s32): Remove.
40909 (__arm_vqshrntq_n_s32): Remove.
40910 (__arm_vqshrnbq_n_u32): Remove.
40911 (__arm_vqshrntq_n_u32): Remove.
40912 (__arm_vqshrnbq_m_n_s32): Remove.
40913 (__arm_vqshrnbq_m_n_s16): Remove.
40914 (__arm_vqshrnbq_m_n_u32): Remove.
40915 (__arm_vqshrnbq_m_n_u16): Remove.
40916 (__arm_vqshrntq_m_n_s32): Remove.
40917 (__arm_vqshrntq_m_n_s16): Remove.
40918 (__arm_vqshrntq_m_n_u32): Remove.
40919 (__arm_vqshrntq_m_n_u16): Remove.
40920 (__arm_vqshrnbq): Remove.
40921 (__arm_vqshrntq): Remove.
40922 (__arm_vqshrnbq_m): Remove.
40923 (__arm_vqshrntq_m): Remove.
40924 (vqrshrnbq): Remove.
40925 (vqrshrntq): Remove.
40926 (vqrshrnbq_m): Remove.
40927 (vqrshrntq_m): Remove.
40928 (vqrshrnbq_n_s16): Remove.
40929 (vqrshrnbq_n_u16): Remove.
40930 (vqrshrnbq_n_s32): Remove.
40931 (vqrshrnbq_n_u32): Remove.
40932 (vqrshrntq_n_s16): Remove.
40933 (vqrshrntq_n_u16): Remove.
40934 (vqrshrntq_n_s32): Remove.
40935 (vqrshrntq_n_u32): Remove.
40936 (vqrshrnbq_m_n_s32): Remove.
40937 (vqrshrnbq_m_n_s16): Remove.
40938 (vqrshrnbq_m_n_u32): Remove.
40939 (vqrshrnbq_m_n_u16): Remove.
40940 (vqrshrntq_m_n_s32): Remove.
40941 (vqrshrntq_m_n_s16): Remove.
40942 (vqrshrntq_m_n_u32): Remove.
40943 (vqrshrntq_m_n_u16): Remove.
40944 (__arm_vqrshrnbq_n_s16): Remove.
40945 (__arm_vqrshrnbq_n_u16): Remove.
40946 (__arm_vqrshrnbq_n_s32): Remove.
40947 (__arm_vqrshrnbq_n_u32): Remove.
40948 (__arm_vqrshrntq_n_s16): Remove.
40949 (__arm_vqrshrntq_n_u16): Remove.
40950 (__arm_vqrshrntq_n_s32): Remove.
40951 (__arm_vqrshrntq_n_u32): Remove.
40952 (__arm_vqrshrnbq_m_n_s32): Remove.
40953 (__arm_vqrshrnbq_m_n_s16): Remove.
40954 (__arm_vqrshrnbq_m_n_u32): Remove.
40955 (__arm_vqrshrnbq_m_n_u16): Remove.
40956 (__arm_vqrshrntq_m_n_s32): Remove.
40957 (__arm_vqrshrntq_m_n_s16): Remove.
40958 (__arm_vqrshrntq_m_n_u32): Remove.
40959 (__arm_vqrshrntq_m_n_u16): Remove.
40960 (__arm_vqrshrnbq): Remove.
40961 (__arm_vqrshrntq): Remove.
40962 (__arm_vqrshrnbq_m): Remove.
40963 (__arm_vqrshrntq_m): Remove.
40965 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40967 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
40968 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
40969 vrshrnt, vshrnb, vshrnt.
40971 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
40972 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
40973 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
40974 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
40975 (mve_vshrntq_n_<supf><mode>): Merge into ...
40976 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
40977 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
40978 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
40979 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
40980 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
40982 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
40984 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40986 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
40988 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
40990 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
40992 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
40993 (vmaxq, vminq): New.
40994 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
40995 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
40996 * config/arm/arm_mve.h (vminq): Remove.
41002 (vminq_u8): Remove.
41003 (vmaxq_u8): Remove.
41004 (vminq_s8): Remove.
41005 (vmaxq_s8): Remove.
41006 (vminq_u16): Remove.
41007 (vmaxq_u16): Remove.
41008 (vminq_s16): Remove.
41009 (vmaxq_s16): Remove.
41010 (vminq_u32): Remove.
41011 (vmaxq_u32): Remove.
41012 (vminq_s32): Remove.
41013 (vmaxq_s32): Remove.
41014 (vmaxq_m_s8): Remove.
41015 (vmaxq_m_s32): Remove.
41016 (vmaxq_m_s16): Remove.
41017 (vmaxq_m_u8): Remove.
41018 (vmaxq_m_u32): Remove.
41019 (vmaxq_m_u16): Remove.
41020 (vminq_m_s8): Remove.
41021 (vminq_m_s32): Remove.
41022 (vminq_m_s16): Remove.
41023 (vminq_m_u8): Remove.
41024 (vminq_m_u32): Remove.
41025 (vminq_m_u16): Remove.
41026 (vminq_x_s8): Remove.
41027 (vminq_x_s16): Remove.
41028 (vminq_x_s32): Remove.
41029 (vminq_x_u8): Remove.
41030 (vminq_x_u16): Remove.
41031 (vminq_x_u32): Remove.
41032 (vmaxq_x_s8): Remove.
41033 (vmaxq_x_s16): Remove.
41034 (vmaxq_x_s32): Remove.
41035 (vmaxq_x_u8): Remove.
41036 (vmaxq_x_u16): Remove.
41037 (vmaxq_x_u32): Remove.
41038 (__arm_vminq_u8): Remove.
41039 (__arm_vmaxq_u8): Remove.
41040 (__arm_vminq_s8): Remove.
41041 (__arm_vmaxq_s8): Remove.
41042 (__arm_vminq_u16): Remove.
41043 (__arm_vmaxq_u16): Remove.
41044 (__arm_vminq_s16): Remove.
41045 (__arm_vmaxq_s16): Remove.
41046 (__arm_vminq_u32): Remove.
41047 (__arm_vmaxq_u32): Remove.
41048 (__arm_vminq_s32): Remove.
41049 (__arm_vmaxq_s32): Remove.
41050 (__arm_vmaxq_m_s8): Remove.
41051 (__arm_vmaxq_m_s32): Remove.
41052 (__arm_vmaxq_m_s16): Remove.
41053 (__arm_vmaxq_m_u8): Remove.
41054 (__arm_vmaxq_m_u32): Remove.
41055 (__arm_vmaxq_m_u16): Remove.
41056 (__arm_vminq_m_s8): Remove.
41057 (__arm_vminq_m_s32): Remove.
41058 (__arm_vminq_m_s16): Remove.
41059 (__arm_vminq_m_u8): Remove.
41060 (__arm_vminq_m_u32): Remove.
41061 (__arm_vminq_m_u16): Remove.
41062 (__arm_vminq_x_s8): Remove.
41063 (__arm_vminq_x_s16): Remove.
41064 (__arm_vminq_x_s32): Remove.
41065 (__arm_vminq_x_u8): Remove.
41066 (__arm_vminq_x_u16): Remove.
41067 (__arm_vminq_x_u32): Remove.
41068 (__arm_vmaxq_x_s8): Remove.
41069 (__arm_vmaxq_x_s16): Remove.
41070 (__arm_vmaxq_x_s32): Remove.
41071 (__arm_vmaxq_x_u8): Remove.
41072 (__arm_vmaxq_x_u16): Remove.
41073 (__arm_vmaxq_x_u32): Remove.
41074 (__arm_vminq): Remove.
41075 (__arm_vmaxq): Remove.
41076 (__arm_vmaxq_m): Remove.
41077 (__arm_vminq_m): Remove.
41078 (__arm_vminq_x): Remove.
41079 (__arm_vmaxq_x): Remove.
41081 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41083 * config/arm/iterators.md (MAX_MIN_SU): New.
41084 (max_min_su_str): New.
41085 (max_min_supf): New.
41086 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
41087 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
41088 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
41090 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41092 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
41093 (vqshlq, vshlq): New.
41094 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
41095 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
41096 * config/arm/arm_mve.h (vshlq): Remove.
41099 (vshlq_m_r): Remove.
41101 (vshlq_m_n): Remove.
41103 (vshlq_x_n): Remove.
41104 (vshlq_s8): Remove.
41105 (vshlq_s16): Remove.
41106 (vshlq_s32): Remove.
41107 (vshlq_u8): Remove.
41108 (vshlq_u16): Remove.
41109 (vshlq_u32): Remove.
41110 (vshlq_r_u8): Remove.
41111 (vshlq_n_u8): Remove.
41112 (vshlq_r_s8): Remove.
41113 (vshlq_n_s8): Remove.
41114 (vshlq_r_u16): Remove.
41115 (vshlq_n_u16): Remove.
41116 (vshlq_r_s16): Remove.
41117 (vshlq_n_s16): Remove.
41118 (vshlq_r_u32): Remove.
41119 (vshlq_n_u32): Remove.
41120 (vshlq_r_s32): Remove.
41121 (vshlq_n_s32): Remove.
41122 (vshlq_m_r_u8): Remove.
41123 (vshlq_m_r_s8): Remove.
41124 (vshlq_m_r_u16): Remove.
41125 (vshlq_m_r_s16): Remove.
41126 (vshlq_m_r_u32): Remove.
41127 (vshlq_m_r_s32): Remove.
41128 (vshlq_m_u8): Remove.
41129 (vshlq_m_s8): Remove.
41130 (vshlq_m_u16): Remove.
41131 (vshlq_m_s16): Remove.
41132 (vshlq_m_u32): Remove.
41133 (vshlq_m_s32): Remove.
41134 (vshlq_m_n_s8): Remove.
41135 (vshlq_m_n_s32): Remove.
41136 (vshlq_m_n_s16): Remove.
41137 (vshlq_m_n_u8): Remove.
41138 (vshlq_m_n_u32): Remove.
41139 (vshlq_m_n_u16): Remove.
41140 (vshlq_x_s8): Remove.
41141 (vshlq_x_s16): Remove.
41142 (vshlq_x_s32): Remove.
41143 (vshlq_x_u8): Remove.
41144 (vshlq_x_u16): Remove.
41145 (vshlq_x_u32): Remove.
41146 (vshlq_x_n_s8): Remove.
41147 (vshlq_x_n_s16): Remove.
41148 (vshlq_x_n_s32): Remove.
41149 (vshlq_x_n_u8): Remove.
41150 (vshlq_x_n_u16): Remove.
41151 (vshlq_x_n_u32): Remove.
41152 (__arm_vshlq_s8): Remove.
41153 (__arm_vshlq_s16): Remove.
41154 (__arm_vshlq_s32): Remove.
41155 (__arm_vshlq_u8): Remove.
41156 (__arm_vshlq_u16): Remove.
41157 (__arm_vshlq_u32): Remove.
41158 (__arm_vshlq_r_u8): Remove.
41159 (__arm_vshlq_n_u8): Remove.
41160 (__arm_vshlq_r_s8): Remove.
41161 (__arm_vshlq_n_s8): Remove.
41162 (__arm_vshlq_r_u16): Remove.
41163 (__arm_vshlq_n_u16): Remove.
41164 (__arm_vshlq_r_s16): Remove.
41165 (__arm_vshlq_n_s16): Remove.
41166 (__arm_vshlq_r_u32): Remove.
41167 (__arm_vshlq_n_u32): Remove.
41168 (__arm_vshlq_r_s32): Remove.
41169 (__arm_vshlq_n_s32): Remove.
41170 (__arm_vshlq_m_r_u8): Remove.
41171 (__arm_vshlq_m_r_s8): Remove.
41172 (__arm_vshlq_m_r_u16): Remove.
41173 (__arm_vshlq_m_r_s16): Remove.
41174 (__arm_vshlq_m_r_u32): Remove.
41175 (__arm_vshlq_m_r_s32): Remove.
41176 (__arm_vshlq_m_u8): Remove.
41177 (__arm_vshlq_m_s8): Remove.
41178 (__arm_vshlq_m_u16): Remove.
41179 (__arm_vshlq_m_s16): Remove.
41180 (__arm_vshlq_m_u32): Remove.
41181 (__arm_vshlq_m_s32): Remove.
41182 (__arm_vshlq_m_n_s8): Remove.
41183 (__arm_vshlq_m_n_s32): Remove.
41184 (__arm_vshlq_m_n_s16): Remove.
41185 (__arm_vshlq_m_n_u8): Remove.
41186 (__arm_vshlq_m_n_u32): Remove.
41187 (__arm_vshlq_m_n_u16): Remove.
41188 (__arm_vshlq_x_s8): Remove.
41189 (__arm_vshlq_x_s16): Remove.
41190 (__arm_vshlq_x_s32): Remove.
41191 (__arm_vshlq_x_u8): Remove.
41192 (__arm_vshlq_x_u16): Remove.
41193 (__arm_vshlq_x_u32): Remove.
41194 (__arm_vshlq_x_n_s8): Remove.
41195 (__arm_vshlq_x_n_s16): Remove.
41196 (__arm_vshlq_x_n_s32): Remove.
41197 (__arm_vshlq_x_n_u8): Remove.
41198 (__arm_vshlq_x_n_u16): Remove.
41199 (__arm_vshlq_x_n_u32): Remove.
41200 (__arm_vshlq): Remove.
41201 (__arm_vshlq_r): Remove.
41202 (__arm_vshlq_n): Remove.
41203 (__arm_vshlq_m_r): Remove.
41204 (__arm_vshlq_m): Remove.
41205 (__arm_vshlq_m_n): Remove.
41206 (__arm_vshlq_x): Remove.
41207 (__arm_vshlq_x_n): Remove.
41209 (vqshlq_r): Remove.
41210 (vqshlq_n): Remove.
41211 (vqshlq_m_r): Remove.
41212 (vqshlq_m_n): Remove.
41213 (vqshlq_m): Remove.
41214 (vqshlq_u8): Remove.
41215 (vqshlq_r_u8): Remove.
41216 (vqshlq_n_u8): Remove.
41217 (vqshlq_s8): Remove.
41218 (vqshlq_r_s8): Remove.
41219 (vqshlq_n_s8): Remove.
41220 (vqshlq_u16): Remove.
41221 (vqshlq_r_u16): Remove.
41222 (vqshlq_n_u16): Remove.
41223 (vqshlq_s16): Remove.
41224 (vqshlq_r_s16): Remove.
41225 (vqshlq_n_s16): Remove.
41226 (vqshlq_u32): Remove.
41227 (vqshlq_r_u32): Remove.
41228 (vqshlq_n_u32): Remove.
41229 (vqshlq_s32): Remove.
41230 (vqshlq_r_s32): Remove.
41231 (vqshlq_n_s32): Remove.
41232 (vqshlq_m_r_u8): Remove.
41233 (vqshlq_m_r_s8): Remove.
41234 (vqshlq_m_r_u16): Remove.
41235 (vqshlq_m_r_s16): Remove.
41236 (vqshlq_m_r_u32): Remove.
41237 (vqshlq_m_r_s32): Remove.
41238 (vqshlq_m_n_s8): Remove.
41239 (vqshlq_m_n_s32): Remove.
41240 (vqshlq_m_n_s16): Remove.
41241 (vqshlq_m_n_u8): Remove.
41242 (vqshlq_m_n_u32): Remove.
41243 (vqshlq_m_n_u16): Remove.
41244 (vqshlq_m_s8): Remove.
41245 (vqshlq_m_s32): Remove.
41246 (vqshlq_m_s16): Remove.
41247 (vqshlq_m_u8): Remove.
41248 (vqshlq_m_u32): Remove.
41249 (vqshlq_m_u16): Remove.
41250 (__arm_vqshlq_u8): Remove.
41251 (__arm_vqshlq_r_u8): Remove.
41252 (__arm_vqshlq_n_u8): Remove.
41253 (__arm_vqshlq_s8): Remove.
41254 (__arm_vqshlq_r_s8): Remove.
41255 (__arm_vqshlq_n_s8): Remove.
41256 (__arm_vqshlq_u16): Remove.
41257 (__arm_vqshlq_r_u16): Remove.
41258 (__arm_vqshlq_n_u16): Remove.
41259 (__arm_vqshlq_s16): Remove.
41260 (__arm_vqshlq_r_s16): Remove.
41261 (__arm_vqshlq_n_s16): Remove.
41262 (__arm_vqshlq_u32): Remove.
41263 (__arm_vqshlq_r_u32): Remove.
41264 (__arm_vqshlq_n_u32): Remove.
41265 (__arm_vqshlq_s32): Remove.
41266 (__arm_vqshlq_r_s32): Remove.
41267 (__arm_vqshlq_n_s32): Remove.
41268 (__arm_vqshlq_m_r_u8): Remove.
41269 (__arm_vqshlq_m_r_s8): Remove.
41270 (__arm_vqshlq_m_r_u16): Remove.
41271 (__arm_vqshlq_m_r_s16): Remove.
41272 (__arm_vqshlq_m_r_u32): Remove.
41273 (__arm_vqshlq_m_r_s32): Remove.
41274 (__arm_vqshlq_m_n_s8): Remove.
41275 (__arm_vqshlq_m_n_s32): Remove.
41276 (__arm_vqshlq_m_n_s16): Remove.
41277 (__arm_vqshlq_m_n_u8): Remove.
41278 (__arm_vqshlq_m_n_u32): Remove.
41279 (__arm_vqshlq_m_n_u16): Remove.
41280 (__arm_vqshlq_m_s8): Remove.
41281 (__arm_vqshlq_m_s32): Remove.
41282 (__arm_vqshlq_m_s16): Remove.
41283 (__arm_vqshlq_m_u8): Remove.
41284 (__arm_vqshlq_m_u32): Remove.
41285 (__arm_vqshlq_m_u16): Remove.
41286 (__arm_vqshlq): Remove.
41287 (__arm_vqshlq_r): Remove.
41288 (__arm_vqshlq_n): Remove.
41289 (__arm_vqshlq_m_r): Remove.
41290 (__arm_vqshlq_m_n): Remove.
41291 (__arm_vqshlq_m): Remove.
41293 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41295 * config/arm/arm-mve-builtins-functions.h (class
41296 unspec_mve_function_exact_insn_vshl): New.
41298 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41300 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
41301 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
41303 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41305 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
41306 (finish_opt_n_resolution): Handle MODE_r.
41307 * config/arm/arm-mve-builtins.def (r): New mode.
41309 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41311 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
41312 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
41314 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41316 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
41318 * config/arm/arm-mve-builtins-base.def (vabdq): New.
41319 * config/arm/arm-mve-builtins-base.h (vabdq): New.
41320 * config/arm/arm_mve.h (vabdq): Remove.
41323 (vabdq_u8): Remove.
41324 (vabdq_s8): Remove.
41325 (vabdq_u16): Remove.
41326 (vabdq_s16): Remove.
41327 (vabdq_u32): Remove.
41328 (vabdq_s32): Remove.
41329 (vabdq_f16): Remove.
41330 (vabdq_f32): Remove.
41331 (vabdq_m_s8): Remove.
41332 (vabdq_m_s32): Remove.
41333 (vabdq_m_s16): Remove.
41334 (vabdq_m_u8): Remove.
41335 (vabdq_m_u32): Remove.
41336 (vabdq_m_u16): Remove.
41337 (vabdq_m_f32): Remove.
41338 (vabdq_m_f16): Remove.
41339 (vabdq_x_s8): Remove.
41340 (vabdq_x_s16): Remove.
41341 (vabdq_x_s32): Remove.
41342 (vabdq_x_u8): Remove.
41343 (vabdq_x_u16): Remove.
41344 (vabdq_x_u32): Remove.
41345 (vabdq_x_f16): Remove.
41346 (vabdq_x_f32): Remove.
41347 (__arm_vabdq_u8): Remove.
41348 (__arm_vabdq_s8): Remove.
41349 (__arm_vabdq_u16): Remove.
41350 (__arm_vabdq_s16): Remove.
41351 (__arm_vabdq_u32): Remove.
41352 (__arm_vabdq_s32): Remove.
41353 (__arm_vabdq_m_s8): Remove.
41354 (__arm_vabdq_m_s32): Remove.
41355 (__arm_vabdq_m_s16): Remove.
41356 (__arm_vabdq_m_u8): Remove.
41357 (__arm_vabdq_m_u32): Remove.
41358 (__arm_vabdq_m_u16): Remove.
41359 (__arm_vabdq_x_s8): Remove.
41360 (__arm_vabdq_x_s16): Remove.
41361 (__arm_vabdq_x_s32): Remove.
41362 (__arm_vabdq_x_u8): Remove.
41363 (__arm_vabdq_x_u16): Remove.
41364 (__arm_vabdq_x_u32): Remove.
41365 (__arm_vabdq_f16): Remove.
41366 (__arm_vabdq_f32): Remove.
41367 (__arm_vabdq_m_f32): Remove.
41368 (__arm_vabdq_m_f16): Remove.
41369 (__arm_vabdq_x_f16): Remove.
41370 (__arm_vabdq_x_f32): Remove.
41371 (__arm_vabdq): Remove.
41372 (__arm_vabdq_m): Remove.
41373 (__arm_vabdq_x): Remove.
41375 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41377 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
41378 (MVE_FP_VABDQ_ONLY): New.
41379 (mve_insn): Add vabd.
41380 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
41381 (@mve_<mve_insn>q_f<mode>): ... this.
41382 (mve_vabdq_m_f<mode>): Remove.
41384 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41386 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
41387 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
41388 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
41389 * config/arm/arm_mve.h (vqrdmulhq): Remove.
41390 (vqrdmulhq_m): Remove.
41391 (vqrdmulhq_s8): Remove.
41392 (vqrdmulhq_n_s8): Remove.
41393 (vqrdmulhq_s16): Remove.
41394 (vqrdmulhq_n_s16): Remove.
41395 (vqrdmulhq_s32): Remove.
41396 (vqrdmulhq_n_s32): Remove.
41397 (vqrdmulhq_m_n_s8): Remove.
41398 (vqrdmulhq_m_n_s32): Remove.
41399 (vqrdmulhq_m_n_s16): Remove.
41400 (vqrdmulhq_m_s8): Remove.
41401 (vqrdmulhq_m_s32): Remove.
41402 (vqrdmulhq_m_s16): Remove.
41403 (__arm_vqrdmulhq_s8): Remove.
41404 (__arm_vqrdmulhq_n_s8): Remove.
41405 (__arm_vqrdmulhq_s16): Remove.
41406 (__arm_vqrdmulhq_n_s16): Remove.
41407 (__arm_vqrdmulhq_s32): Remove.
41408 (__arm_vqrdmulhq_n_s32): Remove.
41409 (__arm_vqrdmulhq_m_n_s8): Remove.
41410 (__arm_vqrdmulhq_m_n_s32): Remove.
41411 (__arm_vqrdmulhq_m_n_s16): Remove.
41412 (__arm_vqrdmulhq_m_s8): Remove.
41413 (__arm_vqrdmulhq_m_s32): Remove.
41414 (__arm_vqrdmulhq_m_s16): Remove.
41415 (__arm_vqrdmulhq): Remove.
41416 (__arm_vqrdmulhq_m): Remove.
41418 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41420 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
41421 (MVE_SHIFT_N, MVE_SHIFT_R): New.
41422 (mve_insn): Add vqshl, vshl.
41423 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
41424 (mve_vshlq_n_<supf><mode>): Merge into ...
41425 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
41426 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
41428 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
41429 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
41431 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
41432 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
41434 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
41435 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
41437 (@mve_<mve_insn>q_<supf><mode>): ... this.
41439 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41441 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
41442 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
41443 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
41444 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
41446 * config/arm/arm_mve.h (vrshlq): Remove.
41447 (vrshlq_m_n): Remove.
41448 (vrshlq_m): Remove.
41449 (vrshlq_x): Remove.
41450 (vrshlq_u8): Remove.
41451 (vrshlq_n_u8): Remove.
41452 (vrshlq_s8): Remove.
41453 (vrshlq_n_s8): Remove.
41454 (vrshlq_u16): Remove.
41455 (vrshlq_n_u16): Remove.
41456 (vrshlq_s16): Remove.
41457 (vrshlq_n_s16): Remove.
41458 (vrshlq_u32): Remove.
41459 (vrshlq_n_u32): Remove.
41460 (vrshlq_s32): Remove.
41461 (vrshlq_n_s32): Remove.
41462 (vrshlq_m_n_u8): Remove.
41463 (vrshlq_m_n_s8): Remove.
41464 (vrshlq_m_n_u16): Remove.
41465 (vrshlq_m_n_s16): Remove.
41466 (vrshlq_m_n_u32): Remove.
41467 (vrshlq_m_n_s32): Remove.
41468 (vrshlq_m_s8): Remove.
41469 (vrshlq_m_s32): Remove.
41470 (vrshlq_m_s16): Remove.
41471 (vrshlq_m_u8): Remove.
41472 (vrshlq_m_u32): Remove.
41473 (vrshlq_m_u16): Remove.
41474 (vrshlq_x_s8): Remove.
41475 (vrshlq_x_s16): Remove.
41476 (vrshlq_x_s32): Remove.
41477 (vrshlq_x_u8): Remove.
41478 (vrshlq_x_u16): Remove.
41479 (vrshlq_x_u32): Remove.
41480 (__arm_vrshlq_u8): Remove.
41481 (__arm_vrshlq_n_u8): Remove.
41482 (__arm_vrshlq_s8): Remove.
41483 (__arm_vrshlq_n_s8): Remove.
41484 (__arm_vrshlq_u16): Remove.
41485 (__arm_vrshlq_n_u16): Remove.
41486 (__arm_vrshlq_s16): Remove.
41487 (__arm_vrshlq_n_s16): Remove.
41488 (__arm_vrshlq_u32): Remove.
41489 (__arm_vrshlq_n_u32): Remove.
41490 (__arm_vrshlq_s32): Remove.
41491 (__arm_vrshlq_n_s32): Remove.
41492 (__arm_vrshlq_m_n_u8): Remove.
41493 (__arm_vrshlq_m_n_s8): Remove.
41494 (__arm_vrshlq_m_n_u16): Remove.
41495 (__arm_vrshlq_m_n_s16): Remove.
41496 (__arm_vrshlq_m_n_u32): Remove.
41497 (__arm_vrshlq_m_n_s32): Remove.
41498 (__arm_vrshlq_m_s8): Remove.
41499 (__arm_vrshlq_m_s32): Remove.
41500 (__arm_vrshlq_m_s16): Remove.
41501 (__arm_vrshlq_m_u8): Remove.
41502 (__arm_vrshlq_m_u32): Remove.
41503 (__arm_vrshlq_m_u16): Remove.
41504 (__arm_vrshlq_x_s8): Remove.
41505 (__arm_vrshlq_x_s16): Remove.
41506 (__arm_vrshlq_x_s32): Remove.
41507 (__arm_vrshlq_x_u8): Remove.
41508 (__arm_vrshlq_x_u16): Remove.
41509 (__arm_vrshlq_x_u32): Remove.
41510 (__arm_vrshlq): Remove.
41511 (__arm_vrshlq_m_n): Remove.
41512 (__arm_vrshlq_m): Remove.
41513 (__arm_vrshlq_x): Remove.
41515 (vqrshlq_m_n): Remove.
41516 (vqrshlq_m): Remove.
41517 (vqrshlq_u8): Remove.
41518 (vqrshlq_n_u8): Remove.
41519 (vqrshlq_s8): Remove.
41520 (vqrshlq_n_s8): Remove.
41521 (vqrshlq_u16): Remove.
41522 (vqrshlq_n_u16): Remove.
41523 (vqrshlq_s16): Remove.
41524 (vqrshlq_n_s16): Remove.
41525 (vqrshlq_u32): Remove.
41526 (vqrshlq_n_u32): Remove.
41527 (vqrshlq_s32): Remove.
41528 (vqrshlq_n_s32): Remove.
41529 (vqrshlq_m_n_u8): Remove.
41530 (vqrshlq_m_n_s8): Remove.
41531 (vqrshlq_m_n_u16): Remove.
41532 (vqrshlq_m_n_s16): Remove.
41533 (vqrshlq_m_n_u32): Remove.
41534 (vqrshlq_m_n_s32): Remove.
41535 (vqrshlq_m_s8): Remove.
41536 (vqrshlq_m_s32): Remove.
41537 (vqrshlq_m_s16): Remove.
41538 (vqrshlq_m_u8): Remove.
41539 (vqrshlq_m_u32): Remove.
41540 (vqrshlq_m_u16): Remove.
41541 (__arm_vqrshlq_u8): Remove.
41542 (__arm_vqrshlq_n_u8): Remove.
41543 (__arm_vqrshlq_s8): Remove.
41544 (__arm_vqrshlq_n_s8): Remove.
41545 (__arm_vqrshlq_u16): Remove.
41546 (__arm_vqrshlq_n_u16): Remove.
41547 (__arm_vqrshlq_s16): Remove.
41548 (__arm_vqrshlq_n_s16): Remove.
41549 (__arm_vqrshlq_u32): Remove.
41550 (__arm_vqrshlq_n_u32): Remove.
41551 (__arm_vqrshlq_s32): Remove.
41552 (__arm_vqrshlq_n_s32): Remove.
41553 (__arm_vqrshlq_m_n_u8): Remove.
41554 (__arm_vqrshlq_m_n_s8): Remove.
41555 (__arm_vqrshlq_m_n_u16): Remove.
41556 (__arm_vqrshlq_m_n_s16): Remove.
41557 (__arm_vqrshlq_m_n_u32): Remove.
41558 (__arm_vqrshlq_m_n_s32): Remove.
41559 (__arm_vqrshlq_m_s8): Remove.
41560 (__arm_vqrshlq_m_s32): Remove.
41561 (__arm_vqrshlq_m_s16): Remove.
41562 (__arm_vqrshlq_m_u8): Remove.
41563 (__arm_vqrshlq_m_u32): Remove.
41564 (__arm_vqrshlq_m_u16): Remove.
41565 (__arm_vqrshlq): Remove.
41566 (__arm_vqrshlq_m_n): Remove.
41567 (__arm_vqrshlq_m): Remove.
41569 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41571 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
41572 (mve_insn): Add vqrshl, vrshl.
41573 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
41574 (mve_vrshlq_n_<supf><mode>): Merge into ...
41575 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
41576 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
41578 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
41580 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
41582 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
41583 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
41585 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
41588 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
41589 denegrate PHI optmization.
41591 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
41593 * config/i386/predicates.md (register_no_SP_operand):
41594 Rename from index_register_operand.
41595 (call_register_operand): Update for rename.
41596 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
41598 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41601 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
41602 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
41603 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
41604 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
41605 (s-match): Split into s-generic-match and s-gimple-match.
41606 * configure.ac (with-matchpd-partitions,
41607 DEFAULT_MATCHPD_PARTITIONS): New.
41608 * configure: Regenerate.
41610 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41613 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
41614 (decision_tree::gen): Accept list of files instead of single and update
41615 to write function definition to header and main file.
41616 (write_predicate): Likewise.
41617 (write_header): Emit pragmas and new includes.
41618 (main): Create file buffers and cleanup.
41619 (showUsage, write_header_includes): New.
41621 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41624 * Makefile.in (OBJS): Add gimple-match-exports.o.
41625 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
41626 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
41627 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
41628 gimple_resimplify5, constant_for_folding, convert_conditional_op,
41629 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
41630 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
41631 do_valueize, try_conditional_simplification, gimple_extract,
41632 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
41633 commutative_ternary_op_p, first_commutative_argument,
41634 associative_binary_op_p, directly_supported_p,
41635 get_conditional_internal_fn): Moved to gimple-match-exports.cc
41636 * gimple-match-exports.cc: New file.
41638 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41641 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
41643 (dt_simplify::gen_1): Use it.
41645 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41648 * genmatch.cc (output_line_directive): Only emit commented directive
41651 2023-05-05 Tamar Christina <tamar.christina@arm.com>
41654 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
41656 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
41658 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
41659 unused in_mode/in_n variables.
41661 2023-05-05 Richard Biener <rguenther@suse.de>
41663 PR tree-optimization/109735
41664 * tree-vect-stmts.cc (vectorizable_operation): Perform
41665 conversion for POINTER_DIFF_EXPR unconditionally.
41667 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
41669 * config/i386/mmx.md (mulv2si3): New expander.
41670 (*mulv2si3): New insn pattern.
41672 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
41673 Thomas Schwinge <thomas@codesourcery.com>
41676 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
41677 alongside reverse-offload function table to prevent NULL values
41678 of the function addresses.
41680 2023-05-05 Jakub Jelinek <jakub@redhat.com>
41682 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
41684 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
41686 2023-05-05 Andrew Pinski <apinski@marvell.com>
41688 PR tree-optimization/109732
41689 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
41690 of the argtrue/argfalse.
41692 2023-05-05 Andrew Pinski <apinski@marvell.com>
41694 PR tree-optimization/109722
41695 * match.pd: Extend the `ABS<a> == 0` pattern
41696 to cover `ABSU<a> == 0` too.
41698 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
41701 * config/i386/predicates.md (index_reg_operand): New predicate.
41702 * config/i386/i386.md (ashift to lea spliter): Use
41703 general_reg_operand and index_reg_operand predicates.
41705 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41707 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
41708 Rename and reimplement with RTL codes to...
41709 (aarch64_<optab>hn2<mode>_insn_le): .. This.
41710 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
41711 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
41713 (aarch64_<optab>hn2<mode>_insn_be): ... This.
41714 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
41715 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
41716 (aarch64_<optab>hn2<mode>): ... This.
41717 (aarch64_r<optab>hn2<mode>): New expander.
41718 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
41719 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
41720 (ADDSUBHN): Delete.
41721 (sur): Remove handling of the above.
41722 (addsub): Likewise.
41724 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41726 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
41728 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
41729 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
41730 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
41731 (aarch64_<sur><addsub>hn<mode>): Delete.
41732 (aarch64_<optab>hn<mode>): New define_expand.
41733 (aarch64_r<optab>hn<mode>): Likewise.
41734 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
41737 2023-05-04 Andrew Pinski <apinski@marvell.com>
41739 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
41740 diamond form bb with forwarder only empty blocks better.
41742 2023-05-04 Andrew Pinski <apinski@marvell.com>
41744 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
41745 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
41746 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
41747 of an inline version of it.
41748 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
41749 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
41751 2023-05-04 Andrew Pinski <apinski@marvell.com>
41753 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
41754 the default argument value for dce_ssa_names to nullptr.
41755 Check to make sure dce_ssa_names is a non-nullptr before
41756 calling simple_dce_from_worklist.
41758 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
41760 * config/i386/predicates.md (index_register_operand): Reject
41761 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
41762 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
41763 (call_register_no_elim_operand): Rewrite as ...
41764 (call_register_operand): ... this.
41765 (call_insn_operand): Use call_register_operand predicate.
41767 2023-05-04 Richard Biener <rguenther@suse.de>
41769 PR tree-optimization/109721
41770 * tree-vect-stmts.cc (vectorizable_operation): Make sure
41771 to test word_mode for all !target_support_p operations.
41773 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41776 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
41777 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
41778 (aarch64_mla<mode>): Rename to...
41779 (aarch64_mla<mode><vczle><vczbe>): ... This.
41780 (*aarch64_mla_elt<mode>): Rename to...
41781 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
41782 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
41783 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41784 (aarch64_mla_n<mode>): Rename to...
41785 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
41786 (aarch64_mls<mode>): Rename to...
41787 (aarch64_mls<mode><vczle><vczbe>): ... This.
41788 (*aarch64_mls_elt<mode>): Rename to...
41789 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
41790 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
41791 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41792 (aarch64_mls_n<mode>): Rename to...
41793 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
41794 (fma<mode>4): Rename to...
41795 (fma<mode>4<vczle><vczbe>): ... This.
41796 (*aarch64_fma4_elt<mode>): Rename to...
41797 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
41798 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
41799 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41800 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
41801 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
41802 (fnma<mode>4): Rename to...
41803 (fnma<mode>4<vczle><vczbe>): ... This.
41804 (*aarch64_fnma4_elt<mode>): Rename to...
41805 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
41806 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
41807 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
41808 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
41809 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
41810 (aarch64_simd_bsl<mode>_internal): Rename to...
41811 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
41812 (*aarch64_simd_bsl<mode>_alt): Rename to...
41813 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
41815 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
41818 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
41819 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
41820 (fabd<mode>3): Rename to...
41821 (fabd<mode>3<vczle><vczbe>): ... This.
41822 (aarch64_<optab>p<mode>): Rename to...
41823 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
41824 (aarch64_faddp<mode>): Rename to...
41825 (aarch64_faddp<mode><vczle><vczbe>): ... This.
41827 2023-05-04 Martin Liska <mliska@suse.cz>
41829 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
41830 (print_version): Use it.
41831 (generate_results): Likewise.
41833 2023-05-04 Richard Biener <rguenther@suse.de>
41835 * tree-cfg.h (last_stmt): Rename to ...
41836 (last_nondebug_stmt): ... this.
41837 * tree-cfg.cc (last_stmt): Rename to ...
41838 (last_nondebug_stmt): ... this.
41839 (assign_discriminators): Adjust.
41840 (group_case_labels_stmt): Likewise.
41841 (gimple_can_duplicate_bb_p): Likewise.
41842 (execute_fixup_cfg): Likewise.
41843 * auto-profile.cc (afdo_propagate_circuit): Likewise.
41844 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
41845 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
41846 (determine_parallel_type): Likewise.
41847 (adjust_context_and_scope): Likewise.
41848 (expand_task_call): Likewise.
41849 (remove_exit_barrier): Likewise.
41850 (expand_omp_taskreg): Likewise.
41851 (expand_omp_for_init_counts): Likewise.
41852 (expand_omp_for_init_vars): Likewise.
41853 (expand_omp_for_static_chunk): Likewise.
41854 (expand_omp_simd): Likewise.
41855 (expand_oacc_for): Likewise.
41856 (expand_omp_for): Likewise.
41857 (expand_omp_sections): Likewise.
41858 (expand_omp_atomic_fetch_op): Likewise.
41859 (expand_omp_atomic_cas): Likewise.
41860 (expand_omp_atomic): Likewise.
41861 (expand_omp_target): Likewise.
41862 (expand_omp): Likewise.
41863 (omp_make_gimple_edges): Likewise.
41864 * trans-mem.cc (tm_region_init): Likewise.
41865 * tree-inline.cc (redirect_all_calls): Likewise.
41866 * tree-parloops.cc (gen_parallel_loop): Likewise.
41867 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
41868 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
41870 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
41871 (may_eliminate_iv): Likewise.
41872 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
41873 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
41875 (estimate_numbers_of_iterations): Likewise.
41876 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
41877 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
41878 (set_predicates_for_bb): Likewise.
41879 (init_loop_unswitch_info): Likewise.
41880 (hoist_guard): Likewise.
41881 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
41882 (minmax_replacement): Likewise.
41883 * tree-ssa-reassoc.cc (update_range_test): Likewise.
41884 (optimize_range_tests_to_bit_test): Likewise.
41885 (optimize_range_tests_var_bound): Likewise.
41886 (optimize_range_tests): Likewise.
41887 (no_side_effect_bb): Likewise.
41888 (suitable_cond_bb): Likewise.
41889 (maybe_optimize_range_tests): Likewise.
41890 (reassociate_bb): Likewise.
41891 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
41893 2023-05-04 Jakub Jelinek <jakub@redhat.com>
41896 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
41897 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
41898 for it only if it still has TImode. Don't decide whether to call
41899 fix_debug_reg_uses based on whether SRC is ever set or not.
41901 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41903 * config/cris/cris.cc (cris_split_constant): New function.
41904 * config/cris/cris.md (splitop): New iterator.
41905 (opsplit1): New define_peephole2.
41906 * config/cris/cris-protos.h (cris_split_constant): Declare.
41907 (cris_splittable_constant_p): New macro.
41909 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41911 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
41914 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
41916 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
41917 lra_in_progress, not reload_in_progress.
41918 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
41919 * config/cris/constraints.md ("Q"): Ditto.
41921 2023-05-03 Andrew Pinski <apinski@marvell.com>
41923 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
41924 stats on removed number of statements and phis.
41926 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
41928 PR tree-optimization/109711
41929 * value-range.cc (irange::verify_range): Allow types of
41932 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
41935 * calls.cc (can_implement_as_sibling_call_p): Reject calls
41936 to __sanitizer_cov_trace_pc.
41938 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
41941 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
41942 a new ABI break parameter for GCC 14. Set it to the alignment
41943 of enums that have an underlying type. Take the true alignment
41944 of such enums from the TYPE_ALIGN of the underlying type's
41946 (aarch64_function_arg_boundary): Update accordingly.
41947 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
41948 Warn about ABI differences.
41950 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
41953 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
41954 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
41955 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
41956 (aarch64_gimplify_va_arg_expr): Likewise.
41958 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
41960 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
41961 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
41962 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
41964 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
41965 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
41966 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
41967 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
41968 * config/arm/arm_mve.h (vhsubq): Remove.
41970 (vhaddq_m): Remove.
41971 (vhsubq_m): Remove.
41972 (vhaddq_x): Remove.
41973 (vhsubq_x): Remove.
41974 (vhsubq_u8): Remove.
41975 (vhsubq_n_u8): Remove.
41976 (vhaddq_u8): Remove.
41977 (vhaddq_n_u8): Remove.
41978 (vhsubq_s8): Remove.
41979 (vhsubq_n_s8): Remove.
41980 (vhaddq_s8): Remove.
41981 (vhaddq_n_s8): Remove.
41982 (vhsubq_u16): Remove.
41983 (vhsubq_n_u16): Remove.
41984 (vhaddq_u16): Remove.
41985 (vhaddq_n_u16): Remove.
41986 (vhsubq_s16): Remove.
41987 (vhsubq_n_s16): Remove.
41988 (vhaddq_s16): Remove.
41989 (vhaddq_n_s16): Remove.
41990 (vhsubq_u32): Remove.
41991 (vhsubq_n_u32): Remove.
41992 (vhaddq_u32): Remove.
41993 (vhaddq_n_u32): Remove.
41994 (vhsubq_s32): Remove.
41995 (vhsubq_n_s32): Remove.
41996 (vhaddq_s32): Remove.
41997 (vhaddq_n_s32): Remove.
41998 (vhaddq_m_n_s8): Remove.
41999 (vhaddq_m_n_s32): Remove.
42000 (vhaddq_m_n_s16): Remove.
42001 (vhaddq_m_n_u8): Remove.
42002 (vhaddq_m_n_u32): Remove.
42003 (vhaddq_m_n_u16): Remove.
42004 (vhaddq_m_s8): Remove.
42005 (vhaddq_m_s32): Remove.
42006 (vhaddq_m_s16): Remove.
42007 (vhaddq_m_u8): Remove.
42008 (vhaddq_m_u32): Remove.
42009 (vhaddq_m_u16): Remove.
42010 (vhsubq_m_n_s8): Remove.
42011 (vhsubq_m_n_s32): Remove.
42012 (vhsubq_m_n_s16): Remove.
42013 (vhsubq_m_n_u8): Remove.
42014 (vhsubq_m_n_u32): Remove.
42015 (vhsubq_m_n_u16): Remove.
42016 (vhsubq_m_s8): Remove.
42017 (vhsubq_m_s32): Remove.
42018 (vhsubq_m_s16): Remove.
42019 (vhsubq_m_u8): Remove.
42020 (vhsubq_m_u32): Remove.
42021 (vhsubq_m_u16): Remove.
42022 (vhaddq_x_n_s8): Remove.
42023 (vhaddq_x_n_s16): Remove.
42024 (vhaddq_x_n_s32): Remove.
42025 (vhaddq_x_n_u8): Remove.
42026 (vhaddq_x_n_u16): Remove.
42027 (vhaddq_x_n_u32): Remove.
42028 (vhaddq_x_s8): Remove.
42029 (vhaddq_x_s16): Remove.
42030 (vhaddq_x_s32): Remove.
42031 (vhaddq_x_u8): Remove.
42032 (vhaddq_x_u16): Remove.
42033 (vhaddq_x_u32): Remove.
42034 (vhsubq_x_n_s8): Remove.
42035 (vhsubq_x_n_s16): Remove.
42036 (vhsubq_x_n_s32): Remove.
42037 (vhsubq_x_n_u8): Remove.
42038 (vhsubq_x_n_u16): Remove.
42039 (vhsubq_x_n_u32): Remove.
42040 (vhsubq_x_s8): Remove.
42041 (vhsubq_x_s16): Remove.
42042 (vhsubq_x_s32): Remove.
42043 (vhsubq_x_u8): Remove.
42044 (vhsubq_x_u16): Remove.
42045 (vhsubq_x_u32): Remove.
42046 (__arm_vhsubq_u8): Remove.
42047 (__arm_vhsubq_n_u8): Remove.
42048 (__arm_vhaddq_u8): Remove.
42049 (__arm_vhaddq_n_u8): Remove.
42050 (__arm_vhsubq_s8): Remove.
42051 (__arm_vhsubq_n_s8): Remove.
42052 (__arm_vhaddq_s8): Remove.
42053 (__arm_vhaddq_n_s8): Remove.
42054 (__arm_vhsubq_u16): Remove.
42055 (__arm_vhsubq_n_u16): Remove.
42056 (__arm_vhaddq_u16): Remove.
42057 (__arm_vhaddq_n_u16): Remove.
42058 (__arm_vhsubq_s16): Remove.
42059 (__arm_vhsubq_n_s16): Remove.
42060 (__arm_vhaddq_s16): Remove.
42061 (__arm_vhaddq_n_s16): Remove.
42062 (__arm_vhsubq_u32): Remove.
42063 (__arm_vhsubq_n_u32): Remove.
42064 (__arm_vhaddq_u32): Remove.
42065 (__arm_vhaddq_n_u32): Remove.
42066 (__arm_vhsubq_s32): Remove.
42067 (__arm_vhsubq_n_s32): Remove.
42068 (__arm_vhaddq_s32): Remove.
42069 (__arm_vhaddq_n_s32): Remove.
42070 (__arm_vhaddq_m_n_s8): Remove.
42071 (__arm_vhaddq_m_n_s32): Remove.
42072 (__arm_vhaddq_m_n_s16): Remove.
42073 (__arm_vhaddq_m_n_u8): Remove.
42074 (__arm_vhaddq_m_n_u32): Remove.
42075 (__arm_vhaddq_m_n_u16): Remove.
42076 (__arm_vhaddq_m_s8): Remove.
42077 (__arm_vhaddq_m_s32): Remove.
42078 (__arm_vhaddq_m_s16): Remove.
42079 (__arm_vhaddq_m_u8): Remove.
42080 (__arm_vhaddq_m_u32): Remove.
42081 (__arm_vhaddq_m_u16): Remove.
42082 (__arm_vhsubq_m_n_s8): Remove.
42083 (__arm_vhsubq_m_n_s32): Remove.
42084 (__arm_vhsubq_m_n_s16): Remove.
42085 (__arm_vhsubq_m_n_u8): Remove.
42086 (__arm_vhsubq_m_n_u32): Remove.
42087 (__arm_vhsubq_m_n_u16): Remove.
42088 (__arm_vhsubq_m_s8): Remove.
42089 (__arm_vhsubq_m_s32): Remove.
42090 (__arm_vhsubq_m_s16): Remove.
42091 (__arm_vhsubq_m_u8): Remove.
42092 (__arm_vhsubq_m_u32): Remove.
42093 (__arm_vhsubq_m_u16): Remove.
42094 (__arm_vhaddq_x_n_s8): Remove.
42095 (__arm_vhaddq_x_n_s16): Remove.
42096 (__arm_vhaddq_x_n_s32): Remove.
42097 (__arm_vhaddq_x_n_u8): Remove.
42098 (__arm_vhaddq_x_n_u16): Remove.
42099 (__arm_vhaddq_x_n_u32): Remove.
42100 (__arm_vhaddq_x_s8): Remove.
42101 (__arm_vhaddq_x_s16): Remove.
42102 (__arm_vhaddq_x_s32): Remove.
42103 (__arm_vhaddq_x_u8): Remove.
42104 (__arm_vhaddq_x_u16): Remove.
42105 (__arm_vhaddq_x_u32): Remove.
42106 (__arm_vhsubq_x_n_s8): Remove.
42107 (__arm_vhsubq_x_n_s16): Remove.
42108 (__arm_vhsubq_x_n_s32): Remove.
42109 (__arm_vhsubq_x_n_u8): Remove.
42110 (__arm_vhsubq_x_n_u16): Remove.
42111 (__arm_vhsubq_x_n_u32): Remove.
42112 (__arm_vhsubq_x_s8): Remove.
42113 (__arm_vhsubq_x_s16): Remove.
42114 (__arm_vhsubq_x_s32): Remove.
42115 (__arm_vhsubq_x_u8): Remove.
42116 (__arm_vhsubq_x_u16): Remove.
42117 (__arm_vhsubq_x_u32): Remove.
42118 (__arm_vhsubq): Remove.
42119 (__arm_vhaddq): Remove.
42120 (__arm_vhaddq_m): Remove.
42121 (__arm_vhsubq_m): Remove.
42122 (__arm_vhaddq_x): Remove.
42123 (__arm_vhsubq_x): Remove.
42125 (vmulhq_m): Remove.
42126 (vmulhq_x): Remove.
42127 (vmulhq_u8): Remove.
42128 (vmulhq_s8): Remove.
42129 (vmulhq_u16): Remove.
42130 (vmulhq_s16): Remove.
42131 (vmulhq_u32): Remove.
42132 (vmulhq_s32): Remove.
42133 (vmulhq_m_s8): Remove.
42134 (vmulhq_m_s32): Remove.
42135 (vmulhq_m_s16): Remove.
42136 (vmulhq_m_u8): Remove.
42137 (vmulhq_m_u32): Remove.
42138 (vmulhq_m_u16): Remove.
42139 (vmulhq_x_s8): Remove.
42140 (vmulhq_x_s16): Remove.
42141 (vmulhq_x_s32): Remove.
42142 (vmulhq_x_u8): Remove.
42143 (vmulhq_x_u16): Remove.
42144 (vmulhq_x_u32): Remove.
42145 (__arm_vmulhq_u8): Remove.
42146 (__arm_vmulhq_s8): Remove.
42147 (__arm_vmulhq_u16): Remove.
42148 (__arm_vmulhq_s16): Remove.
42149 (__arm_vmulhq_u32): Remove.
42150 (__arm_vmulhq_s32): Remove.
42151 (__arm_vmulhq_m_s8): Remove.
42152 (__arm_vmulhq_m_s32): Remove.
42153 (__arm_vmulhq_m_s16): Remove.
42154 (__arm_vmulhq_m_u8): Remove.
42155 (__arm_vmulhq_m_u32): Remove.
42156 (__arm_vmulhq_m_u16): Remove.
42157 (__arm_vmulhq_x_s8): Remove.
42158 (__arm_vmulhq_x_s16): Remove.
42159 (__arm_vmulhq_x_s32): Remove.
42160 (__arm_vmulhq_x_u8): Remove.
42161 (__arm_vmulhq_x_u16): Remove.
42162 (__arm_vmulhq_x_u32): Remove.
42163 (__arm_vmulhq): Remove.
42164 (__arm_vmulhq_m): Remove.
42165 (__arm_vmulhq_x): Remove.
42168 (vqaddq_m): Remove.
42169 (vqsubq_m): Remove.
42170 (vqsubq_u8): Remove.
42171 (vqsubq_n_u8): Remove.
42172 (vqaddq_u8): Remove.
42173 (vqaddq_n_u8): Remove.
42174 (vqsubq_s8): Remove.
42175 (vqsubq_n_s8): Remove.
42176 (vqaddq_s8): Remove.
42177 (vqaddq_n_s8): Remove.
42178 (vqsubq_u16): Remove.
42179 (vqsubq_n_u16): Remove.
42180 (vqaddq_u16): Remove.
42181 (vqaddq_n_u16): Remove.
42182 (vqsubq_s16): Remove.
42183 (vqsubq_n_s16): Remove.
42184 (vqaddq_s16): Remove.
42185 (vqaddq_n_s16): Remove.
42186 (vqsubq_u32): Remove.
42187 (vqsubq_n_u32): Remove.
42188 (vqaddq_u32): Remove.
42189 (vqaddq_n_u32): Remove.
42190 (vqsubq_s32): Remove.
42191 (vqsubq_n_s32): Remove.
42192 (vqaddq_s32): Remove.
42193 (vqaddq_n_s32): Remove.
42194 (vqaddq_m_n_s8): Remove.
42195 (vqaddq_m_n_s32): Remove.
42196 (vqaddq_m_n_s16): Remove.
42197 (vqaddq_m_n_u8): Remove.
42198 (vqaddq_m_n_u32): Remove.
42199 (vqaddq_m_n_u16): Remove.
42200 (vqaddq_m_s8): Remove.
42201 (vqaddq_m_s32): Remove.
42202 (vqaddq_m_s16): Remove.
42203 (vqaddq_m_u8): Remove.
42204 (vqaddq_m_u32): Remove.
42205 (vqaddq_m_u16): Remove.
42206 (vqsubq_m_n_s8): Remove.
42207 (vqsubq_m_n_s32): Remove.
42208 (vqsubq_m_n_s16): Remove.
42209 (vqsubq_m_n_u8): Remove.
42210 (vqsubq_m_n_u32): Remove.
42211 (vqsubq_m_n_u16): Remove.
42212 (vqsubq_m_s8): Remove.
42213 (vqsubq_m_s32): Remove.
42214 (vqsubq_m_s16): Remove.
42215 (vqsubq_m_u8): Remove.
42216 (vqsubq_m_u32): Remove.
42217 (vqsubq_m_u16): Remove.
42218 (__arm_vqsubq_u8): Remove.
42219 (__arm_vqsubq_n_u8): Remove.
42220 (__arm_vqaddq_u8): Remove.
42221 (__arm_vqaddq_n_u8): Remove.
42222 (__arm_vqsubq_s8): Remove.
42223 (__arm_vqsubq_n_s8): Remove.
42224 (__arm_vqaddq_s8): Remove.
42225 (__arm_vqaddq_n_s8): Remove.
42226 (__arm_vqsubq_u16): Remove.
42227 (__arm_vqsubq_n_u16): Remove.
42228 (__arm_vqaddq_u16): Remove.
42229 (__arm_vqaddq_n_u16): Remove.
42230 (__arm_vqsubq_s16): Remove.
42231 (__arm_vqsubq_n_s16): Remove.
42232 (__arm_vqaddq_s16): Remove.
42233 (__arm_vqaddq_n_s16): Remove.
42234 (__arm_vqsubq_u32): Remove.
42235 (__arm_vqsubq_n_u32): Remove.
42236 (__arm_vqaddq_u32): Remove.
42237 (__arm_vqaddq_n_u32): Remove.
42238 (__arm_vqsubq_s32): Remove.
42239 (__arm_vqsubq_n_s32): Remove.
42240 (__arm_vqaddq_s32): Remove.
42241 (__arm_vqaddq_n_s32): Remove.
42242 (__arm_vqaddq_m_n_s8): Remove.
42243 (__arm_vqaddq_m_n_s32): Remove.
42244 (__arm_vqaddq_m_n_s16): Remove.
42245 (__arm_vqaddq_m_n_u8): Remove.
42246 (__arm_vqaddq_m_n_u32): Remove.
42247 (__arm_vqaddq_m_n_u16): Remove.
42248 (__arm_vqaddq_m_s8): Remove.
42249 (__arm_vqaddq_m_s32): Remove.
42250 (__arm_vqaddq_m_s16): Remove.
42251 (__arm_vqaddq_m_u8): Remove.
42252 (__arm_vqaddq_m_u32): Remove.
42253 (__arm_vqaddq_m_u16): Remove.
42254 (__arm_vqsubq_m_n_s8): Remove.
42255 (__arm_vqsubq_m_n_s32): Remove.
42256 (__arm_vqsubq_m_n_s16): Remove.
42257 (__arm_vqsubq_m_n_u8): Remove.
42258 (__arm_vqsubq_m_n_u32): Remove.
42259 (__arm_vqsubq_m_n_u16): Remove.
42260 (__arm_vqsubq_m_s8): Remove.
42261 (__arm_vqsubq_m_s32): Remove.
42262 (__arm_vqsubq_m_s16): Remove.
42263 (__arm_vqsubq_m_u8): Remove.
42264 (__arm_vqsubq_m_u32): Remove.
42265 (__arm_vqsubq_m_u16): Remove.
42266 (__arm_vqsubq): Remove.
42267 (__arm_vqaddq): Remove.
42268 (__arm_vqaddq_m): Remove.
42269 (__arm_vqsubq_m): Remove.
42270 (vqdmulhq): Remove.
42271 (vqdmulhq_m): Remove.
42272 (vqdmulhq_s8): Remove.
42273 (vqdmulhq_n_s8): Remove.
42274 (vqdmulhq_s16): Remove.
42275 (vqdmulhq_n_s16): Remove.
42276 (vqdmulhq_s32): Remove.
42277 (vqdmulhq_n_s32): Remove.
42278 (vqdmulhq_m_n_s8): Remove.
42279 (vqdmulhq_m_n_s32): Remove.
42280 (vqdmulhq_m_n_s16): Remove.
42281 (vqdmulhq_m_s8): Remove.
42282 (vqdmulhq_m_s32): Remove.
42283 (vqdmulhq_m_s16): Remove.
42284 (__arm_vqdmulhq_s8): Remove.
42285 (__arm_vqdmulhq_n_s8): Remove.
42286 (__arm_vqdmulhq_s16): Remove.
42287 (__arm_vqdmulhq_n_s16): Remove.
42288 (__arm_vqdmulhq_s32): Remove.
42289 (__arm_vqdmulhq_n_s32): Remove.
42290 (__arm_vqdmulhq_m_n_s8): Remove.
42291 (__arm_vqdmulhq_m_n_s32): Remove.
42292 (__arm_vqdmulhq_m_n_s16): Remove.
42293 (__arm_vqdmulhq_m_s8): Remove.
42294 (__arm_vqdmulhq_m_s32): Remove.
42295 (__arm_vqdmulhq_m_s16): Remove.
42296 (__arm_vqdmulhq): Remove.
42297 (__arm_vqdmulhq_m): Remove.
42299 (vrhaddq_m): Remove.
42300 (vrhaddq_x): Remove.
42301 (vrhaddq_u8): Remove.
42302 (vrhaddq_s8): Remove.
42303 (vrhaddq_u16): Remove.
42304 (vrhaddq_s16): Remove.
42305 (vrhaddq_u32): Remove.
42306 (vrhaddq_s32): Remove.
42307 (vrhaddq_m_s8): Remove.
42308 (vrhaddq_m_s32): Remove.
42309 (vrhaddq_m_s16): Remove.
42310 (vrhaddq_m_u8): Remove.
42311 (vrhaddq_m_u32): Remove.
42312 (vrhaddq_m_u16): Remove.
42313 (vrhaddq_x_s8): Remove.
42314 (vrhaddq_x_s16): Remove.
42315 (vrhaddq_x_s32): Remove.
42316 (vrhaddq_x_u8): Remove.
42317 (vrhaddq_x_u16): Remove.
42318 (vrhaddq_x_u32): Remove.
42319 (__arm_vrhaddq_u8): Remove.
42320 (__arm_vrhaddq_s8): Remove.
42321 (__arm_vrhaddq_u16): Remove.
42322 (__arm_vrhaddq_s16): Remove.
42323 (__arm_vrhaddq_u32): Remove.
42324 (__arm_vrhaddq_s32): Remove.
42325 (__arm_vrhaddq_m_s8): Remove.
42326 (__arm_vrhaddq_m_s32): Remove.
42327 (__arm_vrhaddq_m_s16): Remove.
42328 (__arm_vrhaddq_m_u8): Remove.
42329 (__arm_vrhaddq_m_u32): Remove.
42330 (__arm_vrhaddq_m_u16): Remove.
42331 (__arm_vrhaddq_x_s8): Remove.
42332 (__arm_vrhaddq_x_s16): Remove.
42333 (__arm_vrhaddq_x_s32): Remove.
42334 (__arm_vrhaddq_x_u8): Remove.
42335 (__arm_vrhaddq_x_u16): Remove.
42336 (__arm_vrhaddq_x_u32): Remove.
42337 (__arm_vrhaddq): Remove.
42338 (__arm_vrhaddq_m): Remove.
42339 (__arm_vrhaddq_x): Remove.
42341 (vrmulhq_m): Remove.
42342 (vrmulhq_x): Remove.
42343 (vrmulhq_u8): Remove.
42344 (vrmulhq_s8): Remove.
42345 (vrmulhq_u16): Remove.
42346 (vrmulhq_s16): Remove.
42347 (vrmulhq_u32): Remove.
42348 (vrmulhq_s32): Remove.
42349 (vrmulhq_m_s8): Remove.
42350 (vrmulhq_m_s32): Remove.
42351 (vrmulhq_m_s16): Remove.
42352 (vrmulhq_m_u8): Remove.
42353 (vrmulhq_m_u32): Remove.
42354 (vrmulhq_m_u16): Remove.
42355 (vrmulhq_x_s8): Remove.
42356 (vrmulhq_x_s16): Remove.
42357 (vrmulhq_x_s32): Remove.
42358 (vrmulhq_x_u8): Remove.
42359 (vrmulhq_x_u16): Remove.
42360 (vrmulhq_x_u32): Remove.
42361 (__arm_vrmulhq_u8): Remove.
42362 (__arm_vrmulhq_s8): Remove.
42363 (__arm_vrmulhq_u16): Remove.
42364 (__arm_vrmulhq_s16): Remove.
42365 (__arm_vrmulhq_u32): Remove.
42366 (__arm_vrmulhq_s32): Remove.
42367 (__arm_vrmulhq_m_s8): Remove.
42368 (__arm_vrmulhq_m_s32): Remove.
42369 (__arm_vrmulhq_m_s16): Remove.
42370 (__arm_vrmulhq_m_u8): Remove.
42371 (__arm_vrmulhq_m_u32): Remove.
42372 (__arm_vrmulhq_m_u16): Remove.
42373 (__arm_vrmulhq_x_s8): Remove.
42374 (__arm_vrmulhq_x_s16): Remove.
42375 (__arm_vrmulhq_x_s32): Remove.
42376 (__arm_vrmulhq_x_u8): Remove.
42377 (__arm_vrmulhq_x_u16): Remove.
42378 (__arm_vrmulhq_x_u32): Remove.
42379 (__arm_vrmulhq): Remove.
42380 (__arm_vrmulhq_m): Remove.
42381 (__arm_vrmulhq_x): Remove.
42383 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42385 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
42386 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
42387 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
42388 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
42389 * config/arm/mve.md (mve_vabdq_<supf><mode>)
42390 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
42391 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
42392 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
42393 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
42394 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
42395 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
42397 (@mve_<mve_insn>q_<supf><mode>): ... this.
42398 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
42399 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
42400 gen_mve_vhaddq / gen_mve_vrhaddq.
42402 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42404 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
42405 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
42406 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
42407 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
42408 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
42409 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
42410 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
42411 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
42412 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
42413 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
42414 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
42415 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
42416 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
42418 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42420 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
42421 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
42423 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
42424 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
42425 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
42426 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
42427 (mve_vqsubq_n_<supf><mode>): Merge into ...
42428 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
42430 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42432 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
42433 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
42434 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
42435 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
42436 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
42437 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
42438 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
42439 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
42440 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
42441 (mve_vshlq_m_<supf><mode>): Merged into
42442 @mve_<mve_insn>q_m_<supf><mode>.
42443 (mve_vabdq_m_<supf><mode>): Likewise.
42444 (mve_vhaddq_m_<supf><mode>): Likewise.
42445 (mve_vhsubq_m_<supf><mode>): Likewise.
42446 (mve_vmaxq_m_<supf><mode>): Likewise.
42447 (mve_vminq_m_<supf><mode>): Likewise.
42448 (mve_vmulhq_m_<supf><mode>): Likewise.
42449 (mve_vqaddq_m_<supf><mode>): Likewise.
42450 (mve_vqrshlq_m_<supf><mode>): Likewise.
42451 (mve_vqshlq_m_<supf><mode>): Likewise.
42452 (mve_vqsubq_m_<supf><mode>): Likewise.
42453 (mve_vrhaddq_m_<supf><mode>): Likewise.
42454 (mve_vrmulhq_m_<supf><mode>): Likewise.
42455 (mve_vrshlq_m_<supf><mode>): Likewise.
42456 (mve_vqdmladhq_m_s<mode>): Likewise.
42457 (mve_vqdmladhxq_m_s<mode>): Likewise.
42458 (mve_vqdmlsdhq_m_s<mode>): Likewise.
42459 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
42460 (mve_vqdmulhq_m_s<mode>): Likewise.
42461 (mve_vqrdmladhq_m_s<mode>): Likewise.
42462 (mve_vqrdmladhxq_m_s<mode>): Likewise.
42463 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
42464 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
42465 (mve_vqrdmulhq_m_s<mode>): Likewise.
42467 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42469 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
42470 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
42471 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
42472 * config/arm/arm_mve.h (vcreateq_f16): Remove.
42473 (vcreateq_f32): Remove.
42474 (vcreateq_u8): Remove.
42475 (vcreateq_u16): Remove.
42476 (vcreateq_u32): Remove.
42477 (vcreateq_u64): Remove.
42478 (vcreateq_s8): Remove.
42479 (vcreateq_s16): Remove.
42480 (vcreateq_s32): Remove.
42481 (vcreateq_s64): Remove.
42482 (__arm_vcreateq_u8): Remove.
42483 (__arm_vcreateq_u16): Remove.
42484 (__arm_vcreateq_u32): Remove.
42485 (__arm_vcreateq_u64): Remove.
42486 (__arm_vcreateq_s8): Remove.
42487 (__arm_vcreateq_s16): Remove.
42488 (__arm_vcreateq_s32): Remove.
42489 (__arm_vcreateq_s64): Remove.
42490 (__arm_vcreateq_f16): Remove.
42491 (__arm_vcreateq_f32): Remove.
42493 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42495 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
42496 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
42497 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
42498 (@mve_<mve_insn>q_f<mode>): ... this.
42499 (mve_vcreateq_<supf><mode>): Rename into ...
42500 (@mve_<mve_insn>q_<supf><mode>): ... this.
42502 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42504 * config/arm/arm-mve-builtins-shapes.cc (create): New.
42505 * config/arm/arm-mve-builtins-shapes.h: (create): New.
42507 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42509 * config/arm/arm-mve-builtins-functions.h (class
42510 unspec_mve_function_exact_insn): New.
42512 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42514 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
42516 * config/arm/arm-mve-builtins-base.def (vorrq): New.
42517 * config/arm/arm-mve-builtins-base.h (vorrq): New.
42518 * config/arm/arm-mve-builtins.cc
42519 (function_instance::has_inactive_argument): Handle vorrq.
42520 * config/arm/arm_mve.h (vorrq): Remove.
42521 (vorrq_m_n): Remove.
42524 (vorrq_u8): Remove.
42525 (vorrq_s8): Remove.
42526 (vorrq_u16): Remove.
42527 (vorrq_s16): Remove.
42528 (vorrq_u32): Remove.
42529 (vorrq_s32): Remove.
42530 (vorrq_n_u16): Remove.
42531 (vorrq_f16): Remove.
42532 (vorrq_n_s16): Remove.
42533 (vorrq_n_u32): Remove.
42534 (vorrq_f32): Remove.
42535 (vorrq_n_s32): Remove.
42536 (vorrq_m_n_s16): Remove.
42537 (vorrq_m_n_u16): Remove.
42538 (vorrq_m_n_s32): Remove.
42539 (vorrq_m_n_u32): Remove.
42540 (vorrq_m_s8): Remove.
42541 (vorrq_m_s32): Remove.
42542 (vorrq_m_s16): Remove.
42543 (vorrq_m_u8): Remove.
42544 (vorrq_m_u32): Remove.
42545 (vorrq_m_u16): Remove.
42546 (vorrq_m_f32): Remove.
42547 (vorrq_m_f16): Remove.
42548 (vorrq_x_s8): Remove.
42549 (vorrq_x_s16): Remove.
42550 (vorrq_x_s32): Remove.
42551 (vorrq_x_u8): Remove.
42552 (vorrq_x_u16): Remove.
42553 (vorrq_x_u32): Remove.
42554 (vorrq_x_f16): Remove.
42555 (vorrq_x_f32): Remove.
42556 (__arm_vorrq_u8): Remove.
42557 (__arm_vorrq_s8): Remove.
42558 (__arm_vorrq_u16): Remove.
42559 (__arm_vorrq_s16): Remove.
42560 (__arm_vorrq_u32): Remove.
42561 (__arm_vorrq_s32): Remove.
42562 (__arm_vorrq_n_u16): Remove.
42563 (__arm_vorrq_n_s16): Remove.
42564 (__arm_vorrq_n_u32): Remove.
42565 (__arm_vorrq_n_s32): Remove.
42566 (__arm_vorrq_m_n_s16): Remove.
42567 (__arm_vorrq_m_n_u16): Remove.
42568 (__arm_vorrq_m_n_s32): Remove.
42569 (__arm_vorrq_m_n_u32): Remove.
42570 (__arm_vorrq_m_s8): Remove.
42571 (__arm_vorrq_m_s32): Remove.
42572 (__arm_vorrq_m_s16): Remove.
42573 (__arm_vorrq_m_u8): Remove.
42574 (__arm_vorrq_m_u32): Remove.
42575 (__arm_vorrq_m_u16): Remove.
42576 (__arm_vorrq_x_s8): Remove.
42577 (__arm_vorrq_x_s16): Remove.
42578 (__arm_vorrq_x_s32): Remove.
42579 (__arm_vorrq_x_u8): Remove.
42580 (__arm_vorrq_x_u16): Remove.
42581 (__arm_vorrq_x_u32): Remove.
42582 (__arm_vorrq_f16): Remove.
42583 (__arm_vorrq_f32): Remove.
42584 (__arm_vorrq_m_f32): Remove.
42585 (__arm_vorrq_m_f16): Remove.
42586 (__arm_vorrq_x_f16): Remove.
42587 (__arm_vorrq_x_f32): Remove.
42588 (__arm_vorrq): Remove.
42589 (__arm_vorrq_m_n): Remove.
42590 (__arm_vorrq_m): Remove.
42591 (__arm_vorrq_x): Remove.
42593 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42595 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
42596 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
42597 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
42598 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
42600 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42602 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
42603 (vandq,veorq): New.
42604 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
42605 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
42606 * config/arm/arm_mve.h (vandq): Remove.
42609 (vandq_u8): Remove.
42610 (vandq_s8): Remove.
42611 (vandq_u16): Remove.
42612 (vandq_s16): Remove.
42613 (vandq_u32): Remove.
42614 (vandq_s32): Remove.
42615 (vandq_f16): Remove.
42616 (vandq_f32): Remove.
42617 (vandq_m_s8): Remove.
42618 (vandq_m_s32): Remove.
42619 (vandq_m_s16): Remove.
42620 (vandq_m_u8): Remove.
42621 (vandq_m_u32): Remove.
42622 (vandq_m_u16): Remove.
42623 (vandq_m_f32): Remove.
42624 (vandq_m_f16): Remove.
42625 (vandq_x_s8): Remove.
42626 (vandq_x_s16): Remove.
42627 (vandq_x_s32): Remove.
42628 (vandq_x_u8): Remove.
42629 (vandq_x_u16): Remove.
42630 (vandq_x_u32): Remove.
42631 (vandq_x_f16): Remove.
42632 (vandq_x_f32): Remove.
42633 (__arm_vandq_u8): Remove.
42634 (__arm_vandq_s8): Remove.
42635 (__arm_vandq_u16): Remove.
42636 (__arm_vandq_s16): Remove.
42637 (__arm_vandq_u32): Remove.
42638 (__arm_vandq_s32): Remove.
42639 (__arm_vandq_m_s8): Remove.
42640 (__arm_vandq_m_s32): Remove.
42641 (__arm_vandq_m_s16): Remove.
42642 (__arm_vandq_m_u8): Remove.
42643 (__arm_vandq_m_u32): Remove.
42644 (__arm_vandq_m_u16): Remove.
42645 (__arm_vandq_x_s8): Remove.
42646 (__arm_vandq_x_s16): Remove.
42647 (__arm_vandq_x_s32): Remove.
42648 (__arm_vandq_x_u8): Remove.
42649 (__arm_vandq_x_u16): Remove.
42650 (__arm_vandq_x_u32): Remove.
42651 (__arm_vandq_f16): Remove.
42652 (__arm_vandq_f32): Remove.
42653 (__arm_vandq_m_f32): Remove.
42654 (__arm_vandq_m_f16): Remove.
42655 (__arm_vandq_x_f16): Remove.
42656 (__arm_vandq_x_f32): Remove.
42657 (__arm_vandq): Remove.
42658 (__arm_vandq_m): Remove.
42659 (__arm_vandq_x): Remove.
42662 (veorq_u8): Remove.
42663 (veorq_s8): Remove.
42664 (veorq_u16): Remove.
42665 (veorq_s16): Remove.
42666 (veorq_u32): Remove.
42667 (veorq_s32): Remove.
42668 (veorq_f16): Remove.
42669 (veorq_f32): Remove.
42670 (veorq_m_s8): Remove.
42671 (veorq_m_s32): Remove.
42672 (veorq_m_s16): Remove.
42673 (veorq_m_u8): Remove.
42674 (veorq_m_u32): Remove.
42675 (veorq_m_u16): Remove.
42676 (veorq_m_f32): Remove.
42677 (veorq_m_f16): Remove.
42678 (veorq_x_s8): Remove.
42679 (veorq_x_s16): Remove.
42680 (veorq_x_s32): Remove.
42681 (veorq_x_u8): Remove.
42682 (veorq_x_u16): Remove.
42683 (veorq_x_u32): Remove.
42684 (veorq_x_f16): Remove.
42685 (veorq_x_f32): Remove.
42686 (__arm_veorq_u8): Remove.
42687 (__arm_veorq_s8): Remove.
42688 (__arm_veorq_u16): Remove.
42689 (__arm_veorq_s16): Remove.
42690 (__arm_veorq_u32): Remove.
42691 (__arm_veorq_s32): Remove.
42692 (__arm_veorq_m_s8): Remove.
42693 (__arm_veorq_m_s32): Remove.
42694 (__arm_veorq_m_s16): Remove.
42695 (__arm_veorq_m_u8): Remove.
42696 (__arm_veorq_m_u32): Remove.
42697 (__arm_veorq_m_u16): Remove.
42698 (__arm_veorq_x_s8): Remove.
42699 (__arm_veorq_x_s16): Remove.
42700 (__arm_veorq_x_s32): Remove.
42701 (__arm_veorq_x_u8): Remove.
42702 (__arm_veorq_x_u16): Remove.
42703 (__arm_veorq_x_u32): Remove.
42704 (__arm_veorq_f16): Remove.
42705 (__arm_veorq_f32): Remove.
42706 (__arm_veorq_m_f32): Remove.
42707 (__arm_veorq_m_f16): Remove.
42708 (__arm_veorq_x_f16): Remove.
42709 (__arm_veorq_x_f32): Remove.
42710 (__arm_veorq): Remove.
42711 (__arm_veorq_m): Remove.
42712 (__arm_veorq_x): Remove.
42714 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42716 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
42717 (MVE_FP_M_BINARY_LOGIC): New.
42718 (MVE_INT_M_N_BINARY_LOGIC): New.
42719 (MVE_INT_N_BINARY_LOGIC): New.
42720 (mve_insn): Add vand, veor, vorr, vbic.
42721 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
42722 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
42723 (mve_vbicq_m_<supf><mode>): Merge into ...
42724 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
42725 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
42726 (mve_vbicq_m_f<mode>): Merge into ...
42727 (@mve_<mve_insn>q_m_f<mode>): ... this.
42728 (mve_vorrq_n_<supf><mode>)
42729 (mve_vbicq_n_<supf><mode>): Merge into ...
42730 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
42731 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
42733 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
42735 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42737 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
42738 * config/arm/arm-mve-builtins-shapes.h (binary): New.
42740 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
42742 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
42744 (vaddq, vmulq, vsubq): New.
42745 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
42746 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
42747 * config/arm/arm_mve.h (vaddq): Remove.
42750 (vaddq_n_u8): Remove.
42751 (vaddq_n_s8): Remove.
42752 (vaddq_n_u16): Remove.
42753 (vaddq_n_s16): Remove.
42754 (vaddq_n_u32): Remove.
42755 (vaddq_n_s32): Remove.
42756 (vaddq_n_f16): Remove.
42757 (vaddq_n_f32): Remove.
42758 (vaddq_m_n_s8): Remove.
42759 (vaddq_m_n_s32): Remove.
42760 (vaddq_m_n_s16): Remove.
42761 (vaddq_m_n_u8): Remove.
42762 (vaddq_m_n_u32): Remove.
42763 (vaddq_m_n_u16): Remove.
42764 (vaddq_m_s8): Remove.
42765 (vaddq_m_s32): Remove.
42766 (vaddq_m_s16): Remove.
42767 (vaddq_m_u8): Remove.
42768 (vaddq_m_u32): Remove.
42769 (vaddq_m_u16): Remove.
42770 (vaddq_m_f32): Remove.
42771 (vaddq_m_f16): Remove.
42772 (vaddq_m_n_f32): Remove.
42773 (vaddq_m_n_f16): Remove.
42774 (vaddq_s8): Remove.
42775 (vaddq_s16): Remove.
42776 (vaddq_s32): Remove.
42777 (vaddq_u8): Remove.
42778 (vaddq_u16): Remove.
42779 (vaddq_u32): Remove.
42780 (vaddq_f16): Remove.
42781 (vaddq_f32): Remove.
42782 (vaddq_x_s8): Remove.
42783 (vaddq_x_s16): Remove.
42784 (vaddq_x_s32): Remove.
42785 (vaddq_x_n_s8): Remove.
42786 (vaddq_x_n_s16): Remove.
42787 (vaddq_x_n_s32): Remove.
42788 (vaddq_x_u8): Remove.
42789 (vaddq_x_u16): Remove.
42790 (vaddq_x_u32): Remove.
42791 (vaddq_x_n_u8): Remove.
42792 (vaddq_x_n_u16): Remove.
42793 (vaddq_x_n_u32): Remove.
42794 (vaddq_x_f16): Remove.
42795 (vaddq_x_f32): Remove.
42796 (vaddq_x_n_f16): Remove.
42797 (vaddq_x_n_f32): Remove.
42798 (__arm_vaddq_n_u8): Remove.
42799 (__arm_vaddq_n_s8): Remove.
42800 (__arm_vaddq_n_u16): Remove.
42801 (__arm_vaddq_n_s16): Remove.
42802 (__arm_vaddq_n_u32): Remove.
42803 (__arm_vaddq_n_s32): Remove.
42804 (__arm_vaddq_m_n_s8): Remove.
42805 (__arm_vaddq_m_n_s32): Remove.
42806 (__arm_vaddq_m_n_s16): Remove.
42807 (__arm_vaddq_m_n_u8): Remove.
42808 (__arm_vaddq_m_n_u32): Remove.
42809 (__arm_vaddq_m_n_u16): Remove.
42810 (__arm_vaddq_m_s8): Remove.
42811 (__arm_vaddq_m_s32): Remove.
42812 (__arm_vaddq_m_s16): Remove.
42813 (__arm_vaddq_m_u8): Remove.
42814 (__arm_vaddq_m_u32): Remove.
42815 (__arm_vaddq_m_u16): Remove.
42816 (__arm_vaddq_s8): Remove.
42817 (__arm_vaddq_s16): Remove.
42818 (__arm_vaddq_s32): Remove.
42819 (__arm_vaddq_u8): Remove.
42820 (__arm_vaddq_u16): Remove.
42821 (__arm_vaddq_u32): Remove.
42822 (__arm_vaddq_x_s8): Remove.
42823 (__arm_vaddq_x_s16): Remove.
42824 (__arm_vaddq_x_s32): Remove.
42825 (__arm_vaddq_x_n_s8): Remove.
42826 (__arm_vaddq_x_n_s16): Remove.
42827 (__arm_vaddq_x_n_s32): Remove.
42828 (__arm_vaddq_x_u8): Remove.
42829 (__arm_vaddq_x_u16): Remove.
42830 (__arm_vaddq_x_u32): Remove.
42831 (__arm_vaddq_x_n_u8): Remove.
42832 (__arm_vaddq_x_n_u16): Remove.
42833 (__arm_vaddq_x_n_u32): Remove.
42834 (__arm_vaddq_n_f16): Remove.
42835 (__arm_vaddq_n_f32): Remove.
42836 (__arm_vaddq_m_f32): Remove.
42837 (__arm_vaddq_m_f16): Remove.
42838 (__arm_vaddq_m_n_f32): Remove.
42839 (__arm_vaddq_m_n_f16): Remove.
42840 (__arm_vaddq_f16): Remove.
42841 (__arm_vaddq_f32): Remove.
42842 (__arm_vaddq_x_f16): Remove.
42843 (__arm_vaddq_x_f32): Remove.
42844 (__arm_vaddq_x_n_f16): Remove.
42845 (__arm_vaddq_x_n_f32): Remove.
42846 (__arm_vaddq): Remove.
42847 (__arm_vaddq_m): Remove.
42848 (__arm_vaddq_x): Remove.
42852 (vmulq_u8): Remove.
42853 (vmulq_n_u8): Remove.
42854 (vmulq_s8): Remove.
42855 (vmulq_n_s8): Remove.
42856 (vmulq_u16): Remove.
42857 (vmulq_n_u16): Remove.
42858 (vmulq_s16): Remove.
42859 (vmulq_n_s16): Remove.
42860 (vmulq_u32): Remove.
42861 (vmulq_n_u32): Remove.
42862 (vmulq_s32): Remove.
42863 (vmulq_n_s32): Remove.
42864 (vmulq_n_f16): Remove.
42865 (vmulq_f16): Remove.
42866 (vmulq_n_f32): Remove.
42867 (vmulq_f32): Remove.
42868 (vmulq_m_n_s8): Remove.
42869 (vmulq_m_n_s32): Remove.
42870 (vmulq_m_n_s16): Remove.
42871 (vmulq_m_n_u8): Remove.
42872 (vmulq_m_n_u32): Remove.
42873 (vmulq_m_n_u16): Remove.
42874 (vmulq_m_s8): Remove.
42875 (vmulq_m_s32): Remove.
42876 (vmulq_m_s16): Remove.
42877 (vmulq_m_u8): Remove.
42878 (vmulq_m_u32): Remove.
42879 (vmulq_m_u16): Remove.
42880 (vmulq_m_f32): Remove.
42881 (vmulq_m_f16): Remove.
42882 (vmulq_m_n_f32): Remove.
42883 (vmulq_m_n_f16): Remove.
42884 (vmulq_x_s8): Remove.
42885 (vmulq_x_s16): Remove.
42886 (vmulq_x_s32): Remove.
42887 (vmulq_x_n_s8): Remove.
42888 (vmulq_x_n_s16): Remove.
42889 (vmulq_x_n_s32): Remove.
42890 (vmulq_x_u8): Remove.
42891 (vmulq_x_u16): Remove.
42892 (vmulq_x_u32): Remove.
42893 (vmulq_x_n_u8): Remove.
42894 (vmulq_x_n_u16): Remove.
42895 (vmulq_x_n_u32): Remove.
42896 (vmulq_x_f16): Remove.
42897 (vmulq_x_f32): Remove.
42898 (vmulq_x_n_f16): Remove.
42899 (vmulq_x_n_f32): Remove.
42900 (__arm_vmulq_u8): Remove.
42901 (__arm_vmulq_n_u8): Remove.
42902 (__arm_vmulq_s8): Remove.
42903 (__arm_vmulq_n_s8): Remove.
42904 (__arm_vmulq_u16): Remove.
42905 (__arm_vmulq_n_u16): Remove.
42906 (__arm_vmulq_s16): Remove.
42907 (__arm_vmulq_n_s16): Remove.
42908 (__arm_vmulq_u32): Remove.
42909 (__arm_vmulq_n_u32): Remove.
42910 (__arm_vmulq_s32): Remove.
42911 (__arm_vmulq_n_s32): Remove.
42912 (__arm_vmulq_m_n_s8): Remove.
42913 (__arm_vmulq_m_n_s32): Remove.
42914 (__arm_vmulq_m_n_s16): Remove.
42915 (__arm_vmulq_m_n_u8): Remove.
42916 (__arm_vmulq_m_n_u32): Remove.
42917 (__arm_vmulq_m_n_u16): Remove.
42918 (__arm_vmulq_m_s8): Remove.
42919 (__arm_vmulq_m_s32): Remove.
42920 (__arm_vmulq_m_s16): Remove.
42921 (__arm_vmulq_m_u8): Remove.
42922 (__arm_vmulq_m_u32): Remove.
42923 (__arm_vmulq_m_u16): Remove.
42924 (__arm_vmulq_x_s8): Remove.
42925 (__arm_vmulq_x_s16): Remove.
42926 (__arm_vmulq_x_s32): Remove.
42927 (__arm_vmulq_x_n_s8): Remove.
42928 (__arm_vmulq_x_n_s16): Remove.
42929 (__arm_vmulq_x_n_s32): Remove.
42930 (__arm_vmulq_x_u8): Remove.
42931 (__arm_vmulq_x_u16): Remove.
42932 (__arm_vmulq_x_u32): Remove.
42933 (__arm_vmulq_x_n_u8): Remove.
42934 (__arm_vmulq_x_n_u16): Remove.
42935 (__arm_vmulq_x_n_u32): Remove.
42936 (__arm_vmulq_n_f16): Remove.
42937 (__arm_vmulq_f16): Remove.
42938 (__arm_vmulq_n_f32): Remove.
42939 (__arm_vmulq_f32): Remove.
42940 (__arm_vmulq_m_f32): Remove.
42941 (__arm_vmulq_m_f16): Remove.
42942 (__arm_vmulq_m_n_f32): Remove.
42943 (__arm_vmulq_m_n_f16): Remove.
42944 (__arm_vmulq_x_f16): Remove.
42945 (__arm_vmulq_x_f32): Remove.
42946 (__arm_vmulq_x_n_f16): Remove.
42947 (__arm_vmulq_x_n_f32): Remove.
42948 (__arm_vmulq): Remove.
42949 (__arm_vmulq_m): Remove.
42950 (__arm_vmulq_x): Remove.
42954 (vsubq_n_f16): Remove.
42955 (vsubq_n_f32): Remove.
42956 (vsubq_u8): Remove.
42957 (vsubq_n_u8): Remove.
42958 (vsubq_s8): Remove.
42959 (vsubq_n_s8): Remove.
42960 (vsubq_u16): Remove.
42961 (vsubq_n_u16): Remove.
42962 (vsubq_s16): Remove.
42963 (vsubq_n_s16): Remove.
42964 (vsubq_u32): Remove.
42965 (vsubq_n_u32): Remove.
42966 (vsubq_s32): Remove.
42967 (vsubq_n_s32): Remove.
42968 (vsubq_f16): Remove.
42969 (vsubq_f32): Remove.
42970 (vsubq_m_s8): Remove.
42971 (vsubq_m_u8): Remove.
42972 (vsubq_m_s16): Remove.
42973 (vsubq_m_u16): Remove.
42974 (vsubq_m_s32): Remove.
42975 (vsubq_m_u32): Remove.
42976 (vsubq_m_n_s8): Remove.
42977 (vsubq_m_n_s32): Remove.
42978 (vsubq_m_n_s16): Remove.
42979 (vsubq_m_n_u8): Remove.
42980 (vsubq_m_n_u32): Remove.
42981 (vsubq_m_n_u16): Remove.
42982 (vsubq_m_f32): Remove.
42983 (vsubq_m_f16): Remove.
42984 (vsubq_m_n_f32): Remove.
42985 (vsubq_m_n_f16): Remove.
42986 (vsubq_x_s8): Remove.
42987 (vsubq_x_s16): Remove.
42988 (vsubq_x_s32): Remove.
42989 (vsubq_x_n_s8): Remove.
42990 (vsubq_x_n_s16): Remove.
42991 (vsubq_x_n_s32): Remove.
42992 (vsubq_x_u8): Remove.
42993 (vsubq_x_u16): Remove.
42994 (vsubq_x_u32): Remove.
42995 (vsubq_x_n_u8): Remove.
42996 (vsubq_x_n_u16): Remove.
42997 (vsubq_x_n_u32): Remove.
42998 (vsubq_x_f16): Remove.
42999 (vsubq_x_f32): Remove.
43000 (vsubq_x_n_f16): Remove.
43001 (vsubq_x_n_f32): Remove.
43002 (__arm_vsubq_u8): Remove.
43003 (__arm_vsubq_n_u8): Remove.
43004 (__arm_vsubq_s8): Remove.
43005 (__arm_vsubq_n_s8): Remove.
43006 (__arm_vsubq_u16): Remove.
43007 (__arm_vsubq_n_u16): Remove.
43008 (__arm_vsubq_s16): Remove.
43009 (__arm_vsubq_n_s16): Remove.
43010 (__arm_vsubq_u32): Remove.
43011 (__arm_vsubq_n_u32): Remove.
43012 (__arm_vsubq_s32): Remove.
43013 (__arm_vsubq_n_s32): Remove.
43014 (__arm_vsubq_m_s8): Remove.
43015 (__arm_vsubq_m_u8): Remove.
43016 (__arm_vsubq_m_s16): Remove.
43017 (__arm_vsubq_m_u16): Remove.
43018 (__arm_vsubq_m_s32): Remove.
43019 (__arm_vsubq_m_u32): Remove.
43020 (__arm_vsubq_m_n_s8): Remove.
43021 (__arm_vsubq_m_n_s32): Remove.
43022 (__arm_vsubq_m_n_s16): Remove.
43023 (__arm_vsubq_m_n_u8): Remove.
43024 (__arm_vsubq_m_n_u32): Remove.
43025 (__arm_vsubq_m_n_u16): Remove.
43026 (__arm_vsubq_x_s8): Remove.
43027 (__arm_vsubq_x_s16): Remove.
43028 (__arm_vsubq_x_s32): Remove.
43029 (__arm_vsubq_x_n_s8): Remove.
43030 (__arm_vsubq_x_n_s16): Remove.
43031 (__arm_vsubq_x_n_s32): Remove.
43032 (__arm_vsubq_x_u8): Remove.
43033 (__arm_vsubq_x_u16): Remove.
43034 (__arm_vsubq_x_u32): Remove.
43035 (__arm_vsubq_x_n_u8): Remove.
43036 (__arm_vsubq_x_n_u16): Remove.
43037 (__arm_vsubq_x_n_u32): Remove.
43038 (__arm_vsubq_n_f16): Remove.
43039 (__arm_vsubq_n_f32): Remove.
43040 (__arm_vsubq_f16): Remove.
43041 (__arm_vsubq_f32): Remove.
43042 (__arm_vsubq_m_f32): Remove.
43043 (__arm_vsubq_m_f16): Remove.
43044 (__arm_vsubq_m_n_f32): Remove.
43045 (__arm_vsubq_m_n_f16): Remove.
43046 (__arm_vsubq_x_f16): Remove.
43047 (__arm_vsubq_x_f32): Remove.
43048 (__arm_vsubq_x_n_f16): Remove.
43049 (__arm_vsubq_x_n_f32): Remove.
43050 (__arm_vsubq): Remove.
43051 (__arm_vsubq_m): Remove.
43052 (__arm_vsubq_x): Remove.
43053 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
43055 (vmulq_u, vmulq_s, vmulq_f): Remove.
43056 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
43057 (mve_vmulq_<supf><mode>): Remove.
43059 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
43061 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
43062 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
43063 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
43065 * config/arm/mve.md
43066 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
43068 (@mve_<mve_insn>q_n_f<mode>): ... this.
43069 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
43070 (mve_vsubq_n_<supf><mode>): Factorize into ...
43071 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
43072 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
43074 (mve_<mve_addsubmul>q<mode>): ... this.
43075 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
43077 (mve_<mve_addsubmul>q_f<mode>): ... this.
43078 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
43079 (mve_vsubq_m_<supf><mode>): Factorize into ...
43080 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
43081 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
43082 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
43083 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
43084 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
43086 (@mve_<mve_insn>q_m_f<mode>): ... this.
43087 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
43088 (mve_vsubq_m_n_f<mode>): Factorize into ...
43089 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
43091 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
43093 * config/arm/arm-mve-builtins-functions.h (class
43094 unspec_based_mve_function_base): New.
43095 (class unspec_based_mve_function_exact_insn): New.
43097 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
43099 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
43100 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
43102 2023-05-03 Murray Steele <murray.steele@arm.com>
43103 Christophe Lyon <christophe.lyon@arm.com>
43105 * config/arm/arm-mve-builtins-base.cc (class
43106 vuninitializedq_impl): New.
43107 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
43108 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
43110 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
43111 * config/arm/arm-mve-builtins-shapes.h (inherent): New
43113 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
43114 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
43115 (__arm_vuninitializedq_u8): Remove.
43116 (__arm_vuninitializedq_u16): Remove.
43117 (__arm_vuninitializedq_u32): Remove.
43118 (__arm_vuninitializedq_u64): Remove.
43119 (__arm_vuninitializedq_s8): Remove.
43120 (__arm_vuninitializedq_s16): Remove.
43121 (__arm_vuninitializedq_s32): Remove.
43122 (__arm_vuninitializedq_s64): Remove.
43123 (__arm_vuninitializedq_f16): Remove.
43124 (__arm_vuninitializedq_f32): Remove.
43126 2023-05-03 Murray Steele <murray.steele@arm.com>
43127 Christophe Lyon <christophe.lyon@arm.com>
43129 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
43130 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
43131 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
43132 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
43133 (parse_type): Likewise.
43134 (parse_signature): Likewise.
43135 (build_one): Likewise.
43136 (build_all): Likewise.
43137 (overloaded_base): New struct.
43138 (unary_convert_def): Likewise.
43139 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
43140 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
43142 (TYPES_reinterpret_unsigned1): Likewise.
43143 (TYPES_reinterpret_integer): Likewise.
43144 (TYPES_reinterpret_integer1): Likewise.
43145 (TYPES_reinterpret_float1): Likewise.
43146 (TYPES_reinterpret_float): Likewise.
43147 (reinterpret_integer): New.
43148 (reinterpret_float): New.
43149 (handle_arm_mve_h): Register builtins.
43150 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
43151 (vreinterpretq_s32): Likewise.
43152 (vreinterpretq_s64): Likewise.
43153 (vreinterpretq_s8): Likewise.
43154 (vreinterpretq_u16): Likewise.
43155 (vreinterpretq_u32): Likewise.
43156 (vreinterpretq_u64): Likewise.
43157 (vreinterpretq_u8): Likewise.
43158 (vreinterpretq_f16): Likewise.
43159 (vreinterpretq_f32): Likewise.
43160 (vreinterpretq_s16_s32): Likewise.
43161 (vreinterpretq_s16_s64): Likewise.
43162 (vreinterpretq_s16_s8): Likewise.
43163 (vreinterpretq_s16_u16): Likewise.
43164 (vreinterpretq_s16_u32): Likewise.
43165 (vreinterpretq_s16_u64): Likewise.
43166 (vreinterpretq_s16_u8): Likewise.
43167 (vreinterpretq_s32_s16): Likewise.
43168 (vreinterpretq_s32_s64): Likewise.
43169 (vreinterpretq_s32_s8): Likewise.
43170 (vreinterpretq_s32_u16): Likewise.
43171 (vreinterpretq_s32_u32): Likewise.
43172 (vreinterpretq_s32_u64): Likewise.
43173 (vreinterpretq_s32_u8): Likewise.
43174 (vreinterpretq_s64_s16): Likewise.
43175 (vreinterpretq_s64_s32): Likewise.
43176 (vreinterpretq_s64_s8): Likewise.
43177 (vreinterpretq_s64_u16): Likewise.
43178 (vreinterpretq_s64_u32): Likewise.
43179 (vreinterpretq_s64_u64): Likewise.
43180 (vreinterpretq_s64_u8): Likewise.
43181 (vreinterpretq_s8_s16): Likewise.
43182 (vreinterpretq_s8_s32): Likewise.
43183 (vreinterpretq_s8_s64): Likewise.
43184 (vreinterpretq_s8_u16): Likewise.
43185 (vreinterpretq_s8_u32): Likewise.
43186 (vreinterpretq_s8_u64): Likewise.
43187 (vreinterpretq_s8_u8): Likewise.
43188 (vreinterpretq_u16_s16): Likewise.
43189 (vreinterpretq_u16_s32): Likewise.
43190 (vreinterpretq_u16_s64): Likewise.
43191 (vreinterpretq_u16_s8): Likewise.
43192 (vreinterpretq_u16_u32): Likewise.
43193 (vreinterpretq_u16_u64): Likewise.
43194 (vreinterpretq_u16_u8): Likewise.
43195 (vreinterpretq_u32_s16): Likewise.
43196 (vreinterpretq_u32_s32): Likewise.
43197 (vreinterpretq_u32_s64): Likewise.
43198 (vreinterpretq_u32_s8): Likewise.
43199 (vreinterpretq_u32_u16): Likewise.
43200 (vreinterpretq_u32_u64): Likewise.
43201 (vreinterpretq_u32_u8): Likewise.
43202 (vreinterpretq_u64_s16): Likewise.
43203 (vreinterpretq_u64_s32): Likewise.
43204 (vreinterpretq_u64_s64): Likewise.
43205 (vreinterpretq_u64_s8): Likewise.
43206 (vreinterpretq_u64_u16): Likewise.
43207 (vreinterpretq_u64_u32): Likewise.
43208 (vreinterpretq_u64_u8): Likewise.
43209 (vreinterpretq_u8_s16): Likewise.
43210 (vreinterpretq_u8_s32): Likewise.
43211 (vreinterpretq_u8_s64): Likewise.
43212 (vreinterpretq_u8_s8): Likewise.
43213 (vreinterpretq_u8_u16): Likewise.
43214 (vreinterpretq_u8_u32): Likewise.
43215 (vreinterpretq_u8_u64): Likewise.
43216 (vreinterpretq_s32_f16): Likewise.
43217 (vreinterpretq_s32_f32): Likewise.
43218 (vreinterpretq_u16_f16): Likewise.
43219 (vreinterpretq_u16_f32): Likewise.
43220 (vreinterpretq_u32_f16): Likewise.
43221 (vreinterpretq_u32_f32): Likewise.
43222 (vreinterpretq_u64_f16): Likewise.
43223 (vreinterpretq_u64_f32): Likewise.
43224 (vreinterpretq_u8_f16): Likewise.
43225 (vreinterpretq_u8_f32): Likewise.
43226 (vreinterpretq_f16_f32): Likewise.
43227 (vreinterpretq_f16_s16): Likewise.
43228 (vreinterpretq_f16_s32): Likewise.
43229 (vreinterpretq_f16_s64): Likewise.
43230 (vreinterpretq_f16_s8): Likewise.
43231 (vreinterpretq_f16_u16): Likewise.
43232 (vreinterpretq_f16_u32): Likewise.
43233 (vreinterpretq_f16_u64): Likewise.
43234 (vreinterpretq_f16_u8): Likewise.
43235 (vreinterpretq_f32_f16): Likewise.
43236 (vreinterpretq_f32_s16): Likewise.
43237 (vreinterpretq_f32_s32): Likewise.
43238 (vreinterpretq_f32_s64): Likewise.
43239 (vreinterpretq_f32_s8): Likewise.
43240 (vreinterpretq_f32_u16): Likewise.
43241 (vreinterpretq_f32_u32): Likewise.
43242 (vreinterpretq_f32_u64): Likewise.
43243 (vreinterpretq_f32_u8): Likewise.
43244 (vreinterpretq_s16_f16): Likewise.
43245 (vreinterpretq_s16_f32): Likewise.
43246 (vreinterpretq_s64_f16): Likewise.
43247 (vreinterpretq_s64_f32): Likewise.
43248 (vreinterpretq_s8_f16): Likewise.
43249 (vreinterpretq_s8_f32): Likewise.
43250 (__arm_vreinterpretq_f16): Likewise.
43251 (__arm_vreinterpretq_f32): Likewise.
43252 (__arm_vreinterpretq_s16): Likewise.
43253 (__arm_vreinterpretq_s32): Likewise.
43254 (__arm_vreinterpretq_s64): Likewise.
43255 (__arm_vreinterpretq_s8): Likewise.
43256 (__arm_vreinterpretq_u16): Likewise.
43257 (__arm_vreinterpretq_u32): Likewise.
43258 (__arm_vreinterpretq_u64): Likewise.
43259 (__arm_vreinterpretq_u8): Likewise.
43260 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
43261 (__arm_vreinterpretq_s16_s64): Likewise.
43262 (__arm_vreinterpretq_s16_s8): Likewise.
43263 (__arm_vreinterpretq_s16_u16): Likewise.
43264 (__arm_vreinterpretq_s16_u32): Likewise.
43265 (__arm_vreinterpretq_s16_u64): Likewise.
43266 (__arm_vreinterpretq_s16_u8): Likewise.
43267 (__arm_vreinterpretq_s32_s16): Likewise.
43268 (__arm_vreinterpretq_s32_s64): Likewise.
43269 (__arm_vreinterpretq_s32_s8): Likewise.
43270 (__arm_vreinterpretq_s32_u16): Likewise.
43271 (__arm_vreinterpretq_s32_u32): Likewise.
43272 (__arm_vreinterpretq_s32_u64): Likewise.
43273 (__arm_vreinterpretq_s32_u8): Likewise.
43274 (__arm_vreinterpretq_s64_s16): Likewise.
43275 (__arm_vreinterpretq_s64_s32): Likewise.
43276 (__arm_vreinterpretq_s64_s8): Likewise.
43277 (__arm_vreinterpretq_s64_u16): Likewise.
43278 (__arm_vreinterpretq_s64_u32): Likewise.
43279 (__arm_vreinterpretq_s64_u64): Likewise.
43280 (__arm_vreinterpretq_s64_u8): Likewise.
43281 (__arm_vreinterpretq_s8_s16): Likewise.
43282 (__arm_vreinterpretq_s8_s32): Likewise.
43283 (__arm_vreinterpretq_s8_s64): Likewise.
43284 (__arm_vreinterpretq_s8_u16): Likewise.
43285 (__arm_vreinterpretq_s8_u32): Likewise.
43286 (__arm_vreinterpretq_s8_u64): Likewise.
43287 (__arm_vreinterpretq_s8_u8): Likewise.
43288 (__arm_vreinterpretq_u16_s16): Likewise.
43289 (__arm_vreinterpretq_u16_s32): Likewise.
43290 (__arm_vreinterpretq_u16_s64): Likewise.
43291 (__arm_vreinterpretq_u16_s8): Likewise.
43292 (__arm_vreinterpretq_u16_u32): Likewise.
43293 (__arm_vreinterpretq_u16_u64): Likewise.
43294 (__arm_vreinterpretq_u16_u8): Likewise.
43295 (__arm_vreinterpretq_u32_s16): Likewise.
43296 (__arm_vreinterpretq_u32_s32): Likewise.
43297 (__arm_vreinterpretq_u32_s64): Likewise.
43298 (__arm_vreinterpretq_u32_s8): Likewise.
43299 (__arm_vreinterpretq_u32_u16): Likewise.
43300 (__arm_vreinterpretq_u32_u64): Likewise.
43301 (__arm_vreinterpretq_u32_u8): Likewise.
43302 (__arm_vreinterpretq_u64_s16): Likewise.
43303 (__arm_vreinterpretq_u64_s32): Likewise.
43304 (__arm_vreinterpretq_u64_s64): Likewise.
43305 (__arm_vreinterpretq_u64_s8): Likewise.
43306 (__arm_vreinterpretq_u64_u16): Likewise.
43307 (__arm_vreinterpretq_u64_u32): Likewise.
43308 (__arm_vreinterpretq_u64_u8): Likewise.
43309 (__arm_vreinterpretq_u8_s16): Likewise.
43310 (__arm_vreinterpretq_u8_s32): Likewise.
43311 (__arm_vreinterpretq_u8_s64): Likewise.
43312 (__arm_vreinterpretq_u8_s8): Likewise.
43313 (__arm_vreinterpretq_u8_u16): Likewise.
43314 (__arm_vreinterpretq_u8_u32): Likewise.
43315 (__arm_vreinterpretq_u8_u64): Likewise.
43316 (__arm_vreinterpretq_s32_f16): Likewise.
43317 (__arm_vreinterpretq_s32_f32): Likewise.
43318 (__arm_vreinterpretq_s16_f16): Likewise.
43319 (__arm_vreinterpretq_s16_f32): Likewise.
43320 (__arm_vreinterpretq_s64_f16): Likewise.
43321 (__arm_vreinterpretq_s64_f32): Likewise.
43322 (__arm_vreinterpretq_s8_f16): Likewise.
43323 (__arm_vreinterpretq_s8_f32): Likewise.
43324 (__arm_vreinterpretq_u16_f16): Likewise.
43325 (__arm_vreinterpretq_u16_f32): Likewise.
43326 (__arm_vreinterpretq_u32_f16): Likewise.
43327 (__arm_vreinterpretq_u32_f32): Likewise.
43328 (__arm_vreinterpretq_u64_f16): Likewise.
43329 (__arm_vreinterpretq_u64_f32): Likewise.
43330 (__arm_vreinterpretq_u8_f16): Likewise.
43331 (__arm_vreinterpretq_u8_f32): Likewise.
43332 (__arm_vreinterpretq_f16_f32): Likewise.
43333 (__arm_vreinterpretq_f16_s16): Likewise.
43334 (__arm_vreinterpretq_f16_s32): Likewise.
43335 (__arm_vreinterpretq_f16_s64): Likewise.
43336 (__arm_vreinterpretq_f16_s8): Likewise.
43337 (__arm_vreinterpretq_f16_u16): Likewise.
43338 (__arm_vreinterpretq_f16_u32): Likewise.
43339 (__arm_vreinterpretq_f16_u64): Likewise.
43340 (__arm_vreinterpretq_f16_u8): Likewise.
43341 (__arm_vreinterpretq_f32_f16): Likewise.
43342 (__arm_vreinterpretq_f32_s16): Likewise.
43343 (__arm_vreinterpretq_f32_s32): Likewise.
43344 (__arm_vreinterpretq_f32_s64): Likewise.
43345 (__arm_vreinterpretq_f32_s8): Likewise.
43346 (__arm_vreinterpretq_f32_u16): Likewise.
43347 (__arm_vreinterpretq_f32_u32): Likewise.
43348 (__arm_vreinterpretq_f32_u64): Likewise.
43349 (__arm_vreinterpretq_f32_u8): Likewise.
43350 (__arm_vreinterpretq_s16): Likewise.
43351 (__arm_vreinterpretq_s32): Likewise.
43352 (__arm_vreinterpretq_s64): Likewise.
43353 (__arm_vreinterpretq_s8): Likewise.
43354 (__arm_vreinterpretq_u16): Likewise.
43355 (__arm_vreinterpretq_u32): Likewise.
43356 (__arm_vreinterpretq_u64): Likewise.
43357 (__arm_vreinterpretq_u8): Likewise.
43358 (__arm_vreinterpretq_f16): Likewise.
43359 (__arm_vreinterpretq_f32): Likewise.
43360 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
43361 * config/arm/unspecs.md: (REINTERPRET): New unspec.
43363 2023-05-03 Murray Steele <murray.steele@arm.com>
43364 Christophe Lyon <christophe.lyon@arm.com>
43365 Christophe Lyon <christophe.lyon@arm.com
43367 * config.gcc: Add arm-mve-builtins-base.o and
43368 arm-mve-builtins-shapes.o to extra_objs.
43369 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
43371 (arm_expand_builtin): Likewise
43372 (arm_check_builtin_call): Likewise
43373 (arm_describe_resolver): Likewise.
43374 * config/arm/arm-builtins.h (enum resolver_ident): Add
43376 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
43377 (arm_resolve_overloaded_builtin): Handle MVE builtins.
43378 (arm_register_target_pragmas): Register arm_check_builtin_call.
43379 * config/arm/arm-mve-builtins.cc (class registered_function): New
43381 (struct registered_function_hasher): New struct.
43382 (pred_suffixes): New table.
43383 (mode_suffixes): New table.
43384 (type_suffix_info): New table.
43385 (TYPES_float16): New.
43386 (TYPES_all_float): New.
43387 (TYPES_integer_8): New.
43388 (TYPES_integer_8_16): New.
43389 (TYPES_integer_16_32): New.
43390 (TYPES_integer_32): New.
43391 (TYPES_signed_16_32): New.
43392 (TYPES_signed_32): New.
43393 (TYPES_all_signed): New.
43394 (TYPES_all_unsigned): New.
43395 (TYPES_all_integer): New.
43396 (TYPES_all_integer_with_64): New.
43397 (DEF_VECTOR_TYPE): New.
43398 (DEF_DOUBLE_TYPE): New.
43399 (DEF_MVE_TYPES_ARRAY): New.
43400 (all_integer): New.
43401 (all_integer_with_64): New.
43405 (all_unsigned): New.
43407 (integer_8_16): New.
43408 (integer_16_32): New.
43410 (signed_16_32): New.
43412 (register_vector_type): Use void_type_node for mve.fp-only types when
43413 mve.fp is not enabled.
43414 (register_builtin_tuple_types): Likewise.
43415 (handle_arm_mve_h): New function..
43416 (matches_type_p): Likewise..
43417 (report_out_of_range): Likewise.
43418 (report_not_enum): Likewise.
43419 (report_missing_float): Likewise.
43420 (report_non_ice): Likewise.
43421 (check_requires_float): Likewise.
43422 (function_instance::hash): Likewise
43423 (function_instance::call_properties): Likewise.
43424 (function_instance::reads_global_state_p): Likewise.
43425 (function_instance::modifies_global_state_p): Likewise.
43426 (function_instance::could_trap_p): Likewise.
43427 (function_instance::has_inactive_argument): Likewise.
43428 (registered_function_hasher::hash): Likewise.
43429 (registered_function_hasher::equal): Likewise.
43430 (function_builder::function_builder): Likewise.
43431 (function_builder::~function_builder): Likewise.
43432 (function_builder::append_name): Likewise.
43433 (function_builder::finish_name): Likewise.
43434 (function_builder::get_name): Likewise.
43435 (add_attribute): Likewise.
43436 (function_builder::get_attributes): Likewise.
43437 (function_builder::add_function): Likewise.
43438 (function_builder::add_unique_function): Likewise.
43439 (function_builder::add_overloaded_function): Likewise.
43440 (function_builder::add_overloaded_functions): Likewise.
43441 (function_builder::register_function_group): Likewise.
43442 (function_call_info::function_call_info): Likewise.
43443 (function_resolver::function_resolver): Likewise.
43444 (function_resolver::get_vector_type): Likewise.
43445 (function_resolver::get_scalar_type_name): Likewise.
43446 (function_resolver::get_argument_type): Likewise.
43447 (function_resolver::scalar_argument_p): Likewise.
43448 (function_resolver::report_no_such_form): Likewise.
43449 (function_resolver::lookup_form): Likewise.
43450 (function_resolver::resolve_to): Likewise.
43451 (function_resolver::infer_vector_or_tuple_type): Likewise.
43452 (function_resolver::infer_vector_type): Likewise.
43453 (function_resolver::require_vector_or_scalar_type): Likewise.
43454 (function_resolver::require_vector_type): Likewise.
43455 (function_resolver::require_matching_vector_type): Likewise.
43456 (function_resolver::require_derived_vector_type): Likewise.
43457 (function_resolver::require_derived_scalar_type): Likewise.
43458 (function_resolver::require_integer_immediate): Likewise.
43459 (function_resolver::require_scalar_type): Likewise.
43460 (function_resolver::check_num_arguments): Likewise.
43461 (function_resolver::check_gp_argument): Likewise.
43462 (function_resolver::finish_opt_n_resolution): Likewise.
43463 (function_resolver::resolve_unary): Likewise.
43464 (function_resolver::resolve_unary_n): Likewise.
43465 (function_resolver::resolve_uniform): Likewise.
43466 (function_resolver::resolve_uniform_opt_n): Likewise.
43467 (function_resolver::resolve): Likewise.
43468 (function_checker::function_checker): Likewise.
43469 (function_checker::argument_exists_p): Likewise.
43470 (function_checker::require_immediate): Likewise.
43471 (function_checker::require_immediate_enum): Likewise.
43472 (function_checker::require_immediate_range): Likewise.
43473 (function_checker::check): Likewise.
43474 (gimple_folder::gimple_folder): Likewise.
43475 (gimple_folder::fold): Likewise.
43476 (function_expander::function_expander): Likewise.
43477 (function_expander::direct_optab_handler): Likewise.
43478 (function_expander::get_fallback_value): Likewise.
43479 (function_expander::get_reg_target): Likewise.
43480 (function_expander::add_output_operand): Likewise.
43481 (function_expander::add_input_operand): Likewise.
43482 (function_expander::add_integer_operand): Likewise.
43483 (function_expander::generate_insn): Likewise.
43484 (function_expander::use_exact_insn): Likewise.
43485 (function_expander::use_unpred_insn): Likewise.
43486 (function_expander::use_pred_x_insn): Likewise.
43487 (function_expander::use_cond_insn): Likewise.
43488 (function_expander::map_to_rtx_codes): Likewise.
43489 (function_expander::expand): Likewise.
43490 (resolve_overloaded_builtin): Likewise.
43491 (check_builtin_call): Likewise.
43492 (gimple_fold_builtin): Likewise.
43493 (expand_builtin): Likewise.
43494 (gt_ggc_mx): Likewise.
43495 (gt_pch_nx): Likewise.
43496 (gt_pch_nx): Likewise.
43497 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
43508 (offset): New mode.
43509 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
43510 (CP_READ_FPCR): Likewise.
43511 (CP_RAISE_FP_EXCEPTIONS): Likewise.
43512 (CP_READ_MEMORY): Likewise.
43513 (CP_WRITE_MEMORY): Likewise.
43514 (enum units_index): New enum.
43515 (enum predication_index): New.
43516 (enum type_class_index): New.
43517 (enum mode_suffix_index): New enum.
43518 (enum type_suffix_index): New.
43519 (struct mode_suffix_info): New struct.
43520 (struct type_suffix_info): New.
43521 (struct function_group_info): Likewise.
43522 (class function_instance): Likewise.
43523 (class registered_function): Likewise.
43524 (class function_builder): Likewise.
43525 (class function_call_info): Likewise.
43526 (class function_resolver): Likewise.
43527 (class function_checker): Likewise.
43528 (class gimple_folder): Likewise.
43529 (class function_expander): Likewise.
43530 (get_mve_pred16_t): Likewise.
43531 (find_mode_suffix): New function.
43532 (class function_base): Likewise.
43533 (class function_shape): Likewise.
43534 (function_instance::operator==): New function.
43535 (function_instance::operator!=): Likewise.
43536 (function_instance::vectors_per_tuple): Likewise.
43537 (function_instance::mode_suffix): Likewise.
43538 (function_instance::type_suffix): Likewise.
43539 (function_instance::scalar_type): Likewise.
43540 (function_instance::vector_type): Likewise.
43541 (function_instance::tuple_type): Likewise.
43542 (function_instance::vector_mode): Likewise.
43543 (function_call_info::function_returns_void_p): Likewise.
43544 (function_base::call_properties): Likewise.
43545 * config/arm/arm-protos.h (enum arm_builtin_class): Add
43547 (handle_arm_mve_h): New.
43548 (resolve_overloaded_builtin): New.
43549 (check_builtin_call): New.
43550 (gimple_fold_builtin): New.
43551 (expand_builtin): New.
43552 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
43553 arm_gimple_fold_builtin.
43554 (arm_gimple_fold_builtin): New function.
43555 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
43556 * config/arm/predicates.md (arm_any_register_operand): New predicate.
43557 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
43558 (arm-mve-builtins-shapes.o): New target.
43559 (arm-mve-builtins-base.o): New target.
43560 * config/arm/arm-mve-builtins-base.cc: New file.
43561 * config/arm/arm-mve-builtins-base.def: New file.
43562 * config/arm/arm-mve-builtins-base.h: New file.
43563 * config/arm/arm-mve-builtins-functions.h: New file.
43564 * config/arm/arm-mve-builtins-shapes.cc: New file.
43565 * config/arm/arm-mve-builtins-shapes.h: New file.
43567 2023-05-03 Murray Steele <murray.steele@arm.com>
43568 Christophe Lyon <christophe.lyon@arm.com>
43569 Christophe Lyon <christophe.lyon@arm.com>
43571 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
43573 (arm_init_builtin): Use arm_general_add_builtin_function instead
43574 of arm_add_builtin_function.
43575 (arm_init_acle_builtins): Likewise.
43576 (arm_init_mve_builtins): Likewise.
43577 (arm_init_crypto_builtins): Likewise.
43578 (arm_init_builtins): Likewise.
43579 (arm_general_builtin_decl): New function.
43580 (arm_builtin_decl): Defer to numberspace-specialized functions.
43581 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
43582 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
43583 (arm_general_expand_builtin_1): ... specialize for general builtins.
43584 (arm_expand_acle_builtin): Use arm_general_expand_builtin
43585 instead of arm_expand_builtin.
43586 (arm_expand_mve_builtin): Likewise.
43587 (arm_expand_neon_builtin): Likewise.
43588 (arm_expand_vfp_builtin): Likewise.
43589 (arm_general_expand_builtin): New function.
43590 (arm_expand_builtin): Specialize for general builtins.
43591 (arm_general_check_builtin_call): New function.
43592 (arm_check_builtin_call): Specialize for general builtins.
43593 (arm_describe_resolver): Validate numberspace.
43594 (arm_cde_end_args): Likewise.
43595 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
43596 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
43598 2023-05-03 Martin Liska <mliska@suse.cz>
43601 * config/riscv/sync.md: Add gcc_unreachable to a switch.
43603 2023-05-03 Richard Biener <rguenther@suse.de>
43605 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
43606 (patch_loop_exit): Likewise.
43607 (connect_loops): Likewise.
43608 (split_loop): Likewise.
43609 (control_dep_semi_invariant_p): Likewise.
43610 (do_split_loop_on_cond): Likewise.
43611 (split_loop_on_cond): Likewise.
43612 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
43614 (simplify_loop_version): Likewise.
43615 (evaluate_bbs): Likewise.
43616 (find_loop_guard): Likewise.
43617 (clean_up_after_unswitching): Likewise.
43618 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
43620 (optimize_spaceship): Take a gcond * argument, avoid
43622 (math_opts_dom_walker::after_dom_children): Adjust call to
43623 optimize_spaceship.
43624 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
43625 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
43628 2023-05-03 Andreas Schwab <schwab@suse.de>
43630 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
43632 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43634 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
43636 (class vlseg): New class.
43637 (class vsseg): Ditto.
43638 (class vlsseg): Ditto.
43639 (class vssseg): Ditto.
43640 (class seg_indexed_load): Ditto.
43641 (class seg_indexed_store): Ditto.
43642 (class vlsegff): Ditto.
43644 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43645 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
43655 * config/riscv/riscv-vector-builtins-shapes.cc (struct
43656 seg_loadstore_def): Ditto.
43657 (struct seg_indexed_loadstore_def): Ditto.
43658 (struct seg_fault_load_def): Ditto.
43660 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43661 * config/riscv/riscv-vector-builtins.cc
43662 (function_builder::append_nf): New function.
43663 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
43664 Change ptr from double into float.
43665 (vfloat32m1x3_t): Ditto.
43666 (vfloat32m1x4_t): Ditto.
43667 (vfloat32m1x5_t): Ditto.
43668 (vfloat32m1x6_t): Ditto.
43669 (vfloat32m1x7_t): Ditto.
43670 (vfloat32m1x8_t): Ditto.
43671 (vfloat32m2x2_t): Ditto.
43672 (vfloat32m2x3_t): Ditto.
43673 (vfloat32m2x4_t): Ditto.
43674 (vfloat32m4x2_t): Ditto.
43675 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
43676 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
43678 * config/riscv/riscv.md: Add segment instructions.
43679 * config/riscv/vector-iterators.md: Support segment intrinsics.
43680 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
43682 (@pred_unit_strided_store<mode>): Ditto.
43683 (@pred_strided_load<mode>): Ditto.
43684 (@pred_strided_store<mode>): Ditto.
43685 (@pred_fault_load<mode>): Ditto.
43686 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
43687 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
43688 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
43689 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
43690 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
43691 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
43692 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
43693 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
43694 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
43695 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
43696 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
43697 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
43698 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
43699 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
43701 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43703 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
43704 tuple type support.
43706 (floattype): Ditto.
43708 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
43709 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
43711 (vget): Add tuple type vget.
43712 * config/riscv/riscv-vector-builtins-types.def
43713 (DEF_RVV_TUPLE_OPS): New macro.
43714 (vint8mf8x2_t): Ditto.
43715 (vuint8mf8x2_t): Ditto.
43716 (vint8mf8x3_t): Ditto.
43717 (vuint8mf8x3_t): Ditto.
43718 (vint8mf8x4_t): Ditto.
43719 (vuint8mf8x4_t): Ditto.
43720 (vint8mf8x5_t): Ditto.
43721 (vuint8mf8x5_t): Ditto.
43722 (vint8mf8x6_t): Ditto.
43723 (vuint8mf8x6_t): Ditto.
43724 (vint8mf8x7_t): Ditto.
43725 (vuint8mf8x7_t): Ditto.
43726 (vint8mf8x8_t): Ditto.
43727 (vuint8mf8x8_t): Ditto.
43728 (vint8mf4x2_t): Ditto.
43729 (vuint8mf4x2_t): Ditto.
43730 (vint8mf4x3_t): Ditto.
43731 (vuint8mf4x3_t): Ditto.
43732 (vint8mf4x4_t): Ditto.
43733 (vuint8mf4x4_t): Ditto.
43734 (vint8mf4x5_t): Ditto.
43735 (vuint8mf4x5_t): Ditto.
43736 (vint8mf4x6_t): Ditto.
43737 (vuint8mf4x6_t): Ditto.
43738 (vint8mf4x7_t): Ditto.
43739 (vuint8mf4x7_t): Ditto.
43740 (vint8mf4x8_t): Ditto.
43741 (vuint8mf4x8_t): Ditto.
43742 (vint8mf2x2_t): Ditto.
43743 (vuint8mf2x2_t): Ditto.
43744 (vint8mf2x3_t): Ditto.
43745 (vuint8mf2x3_t): Ditto.
43746 (vint8mf2x4_t): Ditto.
43747 (vuint8mf2x4_t): Ditto.
43748 (vint8mf2x5_t): Ditto.
43749 (vuint8mf2x5_t): Ditto.
43750 (vint8mf2x6_t): Ditto.
43751 (vuint8mf2x6_t): Ditto.
43752 (vint8mf2x7_t): Ditto.
43753 (vuint8mf2x7_t): Ditto.
43754 (vint8mf2x8_t): Ditto.
43755 (vuint8mf2x8_t): Ditto.
43756 (vint8m1x2_t): Ditto.
43757 (vuint8m1x2_t): Ditto.
43758 (vint8m1x3_t): Ditto.
43759 (vuint8m1x3_t): Ditto.
43760 (vint8m1x4_t): Ditto.
43761 (vuint8m1x4_t): Ditto.
43762 (vint8m1x5_t): Ditto.
43763 (vuint8m1x5_t): Ditto.
43764 (vint8m1x6_t): Ditto.
43765 (vuint8m1x6_t): Ditto.
43766 (vint8m1x7_t): Ditto.
43767 (vuint8m1x7_t): Ditto.
43768 (vint8m1x8_t): Ditto.
43769 (vuint8m1x8_t): Ditto.
43770 (vint8m2x2_t): Ditto.
43771 (vuint8m2x2_t): Ditto.
43772 (vint8m2x3_t): Ditto.
43773 (vuint8m2x3_t): Ditto.
43774 (vint8m2x4_t): Ditto.
43775 (vuint8m2x4_t): Ditto.
43776 (vint8m4x2_t): Ditto.
43777 (vuint8m4x2_t): Ditto.
43778 (vint16mf4x2_t): Ditto.
43779 (vuint16mf4x2_t): Ditto.
43780 (vint16mf4x3_t): Ditto.
43781 (vuint16mf4x3_t): Ditto.
43782 (vint16mf4x4_t): Ditto.
43783 (vuint16mf4x4_t): Ditto.
43784 (vint16mf4x5_t): Ditto.
43785 (vuint16mf4x5_t): Ditto.
43786 (vint16mf4x6_t): Ditto.
43787 (vuint16mf4x6_t): Ditto.
43788 (vint16mf4x7_t): Ditto.
43789 (vuint16mf4x7_t): Ditto.
43790 (vint16mf4x8_t): Ditto.
43791 (vuint16mf4x8_t): Ditto.
43792 (vint16mf2x2_t): Ditto.
43793 (vuint16mf2x2_t): Ditto.
43794 (vint16mf2x3_t): Ditto.
43795 (vuint16mf2x3_t): Ditto.
43796 (vint16mf2x4_t): Ditto.
43797 (vuint16mf2x4_t): Ditto.
43798 (vint16mf2x5_t): Ditto.
43799 (vuint16mf2x5_t): Ditto.
43800 (vint16mf2x6_t): Ditto.
43801 (vuint16mf2x6_t): Ditto.
43802 (vint16mf2x7_t): Ditto.
43803 (vuint16mf2x7_t): Ditto.
43804 (vint16mf2x8_t): Ditto.
43805 (vuint16mf2x8_t): Ditto.
43806 (vint16m1x2_t): Ditto.
43807 (vuint16m1x2_t): Ditto.
43808 (vint16m1x3_t): Ditto.
43809 (vuint16m1x3_t): Ditto.
43810 (vint16m1x4_t): Ditto.
43811 (vuint16m1x4_t): Ditto.
43812 (vint16m1x5_t): Ditto.
43813 (vuint16m1x5_t): Ditto.
43814 (vint16m1x6_t): Ditto.
43815 (vuint16m1x6_t): Ditto.
43816 (vint16m1x7_t): Ditto.
43817 (vuint16m1x7_t): Ditto.
43818 (vint16m1x8_t): Ditto.
43819 (vuint16m1x8_t): Ditto.
43820 (vint16m2x2_t): Ditto.
43821 (vuint16m2x2_t): Ditto.
43822 (vint16m2x3_t): Ditto.
43823 (vuint16m2x3_t): Ditto.
43824 (vint16m2x4_t): Ditto.
43825 (vuint16m2x4_t): Ditto.
43826 (vint16m4x2_t): Ditto.
43827 (vuint16m4x2_t): Ditto.
43828 (vint32mf2x2_t): Ditto.
43829 (vuint32mf2x2_t): Ditto.
43830 (vint32mf2x3_t): Ditto.
43831 (vuint32mf2x3_t): Ditto.
43832 (vint32mf2x4_t): Ditto.
43833 (vuint32mf2x4_t): Ditto.
43834 (vint32mf2x5_t): Ditto.
43835 (vuint32mf2x5_t): Ditto.
43836 (vint32mf2x6_t): Ditto.
43837 (vuint32mf2x6_t): Ditto.
43838 (vint32mf2x7_t): Ditto.
43839 (vuint32mf2x7_t): Ditto.
43840 (vint32mf2x8_t): Ditto.
43841 (vuint32mf2x8_t): Ditto.
43842 (vint32m1x2_t): Ditto.
43843 (vuint32m1x2_t): Ditto.
43844 (vint32m1x3_t): Ditto.
43845 (vuint32m1x3_t): Ditto.
43846 (vint32m1x4_t): Ditto.
43847 (vuint32m1x4_t): Ditto.
43848 (vint32m1x5_t): Ditto.
43849 (vuint32m1x5_t): Ditto.
43850 (vint32m1x6_t): Ditto.
43851 (vuint32m1x6_t): Ditto.
43852 (vint32m1x7_t): Ditto.
43853 (vuint32m1x7_t): Ditto.
43854 (vint32m1x8_t): Ditto.
43855 (vuint32m1x8_t): Ditto.
43856 (vint32m2x2_t): Ditto.
43857 (vuint32m2x2_t): Ditto.
43858 (vint32m2x3_t): Ditto.
43859 (vuint32m2x3_t): Ditto.
43860 (vint32m2x4_t): Ditto.
43861 (vuint32m2x4_t): Ditto.
43862 (vint32m4x2_t): Ditto.
43863 (vuint32m4x2_t): Ditto.
43864 (vint64m1x2_t): Ditto.
43865 (vuint64m1x2_t): Ditto.
43866 (vint64m1x3_t): Ditto.
43867 (vuint64m1x3_t): Ditto.
43868 (vint64m1x4_t): Ditto.
43869 (vuint64m1x4_t): Ditto.
43870 (vint64m1x5_t): Ditto.
43871 (vuint64m1x5_t): Ditto.
43872 (vint64m1x6_t): Ditto.
43873 (vuint64m1x6_t): Ditto.
43874 (vint64m1x7_t): Ditto.
43875 (vuint64m1x7_t): Ditto.
43876 (vint64m1x8_t): Ditto.
43877 (vuint64m1x8_t): Ditto.
43878 (vint64m2x2_t): Ditto.
43879 (vuint64m2x2_t): Ditto.
43880 (vint64m2x3_t): Ditto.
43881 (vuint64m2x3_t): Ditto.
43882 (vint64m2x4_t): Ditto.
43883 (vuint64m2x4_t): Ditto.
43884 (vint64m4x2_t): Ditto.
43885 (vuint64m4x2_t): Ditto.
43886 (vfloat32mf2x2_t): Ditto.
43887 (vfloat32mf2x3_t): Ditto.
43888 (vfloat32mf2x4_t): Ditto.
43889 (vfloat32mf2x5_t): Ditto.
43890 (vfloat32mf2x6_t): Ditto.
43891 (vfloat32mf2x7_t): Ditto.
43892 (vfloat32mf2x8_t): Ditto.
43893 (vfloat32m1x2_t): Ditto.
43894 (vfloat32m1x3_t): Ditto.
43895 (vfloat32m1x4_t): Ditto.
43896 (vfloat32m1x5_t): Ditto.
43897 (vfloat32m1x6_t): Ditto.
43898 (vfloat32m1x7_t): Ditto.
43899 (vfloat32m1x8_t): Ditto.
43900 (vfloat32m2x2_t): Ditto.
43901 (vfloat32m2x3_t): Ditto.
43902 (vfloat32m2x4_t): Ditto.
43903 (vfloat32m4x2_t): Ditto.
43904 (vfloat64m1x2_t): Ditto.
43905 (vfloat64m1x3_t): Ditto.
43906 (vfloat64m1x4_t): Ditto.
43907 (vfloat64m1x5_t): Ditto.
43908 (vfloat64m1x6_t): Ditto.
43909 (vfloat64m1x7_t): Ditto.
43910 (vfloat64m1x8_t): Ditto.
43911 (vfloat64m2x2_t): Ditto.
43912 (vfloat64m2x3_t): Ditto.
43913 (vfloat64m2x4_t): Ditto.
43914 (vfloat64m4x2_t): Ditto.
43915 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
43917 (DEF_RVV_TYPE_INDEX): Ditto.
43918 (rvv_arg_type_info::get_tuple_subpart_type): New function.
43919 (DEF_RVV_TUPLE_TYPE): New macro.
43920 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
43921 Adapt for tuple vget/vset support.
43922 (vint8mf4_t): Ditto.
43923 (vuint8mf4_t): Ditto.
43924 (vint8mf2_t): Ditto.
43925 (vuint8mf2_t): Ditto.
43926 (vint8m1_t): Ditto.
43927 (vuint8m1_t): Ditto.
43928 (vint8m2_t): Ditto.
43929 (vuint8m2_t): Ditto.
43930 (vint8m4_t): Ditto.
43931 (vuint8m4_t): Ditto.
43932 (vint8m8_t): Ditto.
43933 (vuint8m8_t): Ditto.
43934 (vint16mf4_t): Ditto.
43935 (vuint16mf4_t): Ditto.
43936 (vint16mf2_t): Ditto.
43937 (vuint16mf2_t): Ditto.
43938 (vint16m1_t): Ditto.
43939 (vuint16m1_t): Ditto.
43940 (vint16m2_t): Ditto.
43941 (vuint16m2_t): Ditto.
43942 (vint16m4_t): Ditto.
43943 (vuint16m4_t): Ditto.
43944 (vint16m8_t): Ditto.
43945 (vuint16m8_t): Ditto.
43946 (vint32mf2_t): Ditto.
43947 (vuint32mf2_t): Ditto.
43948 (vint32m1_t): Ditto.
43949 (vuint32m1_t): Ditto.
43950 (vint32m2_t): Ditto.
43951 (vuint32m2_t): Ditto.
43952 (vint32m4_t): Ditto.
43953 (vuint32m4_t): Ditto.
43954 (vint32m8_t): Ditto.
43955 (vuint32m8_t): Ditto.
43956 (vint64m1_t): Ditto.
43957 (vuint64m1_t): Ditto.
43958 (vint64m2_t): Ditto.
43959 (vuint64m2_t): Ditto.
43960 (vint64m4_t): Ditto.
43961 (vuint64m4_t): Ditto.
43962 (vint64m8_t): Ditto.
43963 (vuint64m8_t): Ditto.
43964 (vfloat32mf2_t): Ditto.
43965 (vfloat32m1_t): Ditto.
43966 (vfloat32m2_t): Ditto.
43967 (vfloat32m4_t): Ditto.
43968 (vfloat32m8_t): Ditto.
43969 (vfloat64m1_t): Ditto.
43970 (vfloat64m2_t): Ditto.
43971 (vfloat64m4_t): Ditto.
43972 (vfloat64m8_t): Ditto.
43973 (tuple_subpart): Add tuple subpart base type.
43974 * config/riscv/riscv-vector-builtins.h (struct
43975 rvv_arg_type_info): Ditto.
43976 (tuple_type_field): New function.
43978 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43980 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
43981 (RVV_TUPLE_PARTIAL_MODES): Ditto.
43982 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
43985 (get_subpart_mode): Ditto.
43986 (get_tuple_mode): Ditto.
43987 (expand_tuple_move): Ditto.
43988 * config/riscv/riscv-v.cc (ENTRY): New macro.
43989 (TUPLE_ENTRY): Ditto.
43990 (get_nf): New function.
43991 (get_subpart_mode): Ditto.
43992 (get_tuple_mode): Ditto.
43993 (expand_tuple_move): Ditto.
43994 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
43996 (register_tuple_type): New function
43997 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
43999 (vint8mf8x2_t): New macro.
44000 (vuint8mf8x2_t): Ditto.
44001 (vint8mf8x3_t): Ditto.
44002 (vuint8mf8x3_t): Ditto.
44003 (vint8mf8x4_t): Ditto.
44004 (vuint8mf8x4_t): Ditto.
44005 (vint8mf8x5_t): Ditto.
44006 (vuint8mf8x5_t): Ditto.
44007 (vint8mf8x6_t): Ditto.
44008 (vuint8mf8x6_t): Ditto.
44009 (vint8mf8x7_t): Ditto.
44010 (vuint8mf8x7_t): Ditto.
44011 (vint8mf8x8_t): Ditto.
44012 (vuint8mf8x8_t): Ditto.
44013 (vint8mf4x2_t): Ditto.
44014 (vuint8mf4x2_t): Ditto.
44015 (vint8mf4x3_t): Ditto.
44016 (vuint8mf4x3_t): Ditto.
44017 (vint8mf4x4_t): Ditto.
44018 (vuint8mf4x4_t): Ditto.
44019 (vint8mf4x5_t): Ditto.
44020 (vuint8mf4x5_t): Ditto.
44021 (vint8mf4x6_t): Ditto.
44022 (vuint8mf4x6_t): Ditto.
44023 (vint8mf4x7_t): Ditto.
44024 (vuint8mf4x7_t): Ditto.
44025 (vint8mf4x8_t): Ditto.
44026 (vuint8mf4x8_t): Ditto.
44027 (vint8mf2x2_t): Ditto.
44028 (vuint8mf2x2_t): Ditto.
44029 (vint8mf2x3_t): Ditto.
44030 (vuint8mf2x3_t): Ditto.
44031 (vint8mf2x4_t): Ditto.
44032 (vuint8mf2x4_t): Ditto.
44033 (vint8mf2x5_t): Ditto.
44034 (vuint8mf2x5_t): Ditto.
44035 (vint8mf2x6_t): Ditto.
44036 (vuint8mf2x6_t): Ditto.
44037 (vint8mf2x7_t): Ditto.
44038 (vuint8mf2x7_t): Ditto.
44039 (vint8mf2x8_t): Ditto.
44040 (vuint8mf2x8_t): Ditto.
44041 (vint8m1x2_t): Ditto.
44042 (vuint8m1x2_t): Ditto.
44043 (vint8m1x3_t): Ditto.
44044 (vuint8m1x3_t): Ditto.
44045 (vint8m1x4_t): Ditto.
44046 (vuint8m1x4_t): Ditto.
44047 (vint8m1x5_t): Ditto.
44048 (vuint8m1x5_t): Ditto.
44049 (vint8m1x6_t): Ditto.
44050 (vuint8m1x6_t): Ditto.
44051 (vint8m1x7_t): Ditto.
44052 (vuint8m1x7_t): Ditto.
44053 (vint8m1x8_t): Ditto.
44054 (vuint8m1x8_t): Ditto.
44055 (vint8m2x2_t): Ditto.
44056 (vuint8m2x2_t): Ditto.
44057 (vint8m2x3_t): Ditto.
44058 (vuint8m2x3_t): Ditto.
44059 (vint8m2x4_t): Ditto.
44060 (vuint8m2x4_t): Ditto.
44061 (vint8m4x2_t): Ditto.
44062 (vuint8m4x2_t): Ditto.
44063 (vint16mf4x2_t): Ditto.
44064 (vuint16mf4x2_t): Ditto.
44065 (vint16mf4x3_t): Ditto.
44066 (vuint16mf4x3_t): Ditto.
44067 (vint16mf4x4_t): Ditto.
44068 (vuint16mf4x4_t): Ditto.
44069 (vint16mf4x5_t): Ditto.
44070 (vuint16mf4x5_t): Ditto.
44071 (vint16mf4x6_t): Ditto.
44072 (vuint16mf4x6_t): Ditto.
44073 (vint16mf4x7_t): Ditto.
44074 (vuint16mf4x7_t): Ditto.
44075 (vint16mf4x8_t): Ditto.
44076 (vuint16mf4x8_t): Ditto.
44077 (vint16mf2x2_t): Ditto.
44078 (vuint16mf2x2_t): Ditto.
44079 (vint16mf2x3_t): Ditto.
44080 (vuint16mf2x3_t): Ditto.
44081 (vint16mf2x4_t): Ditto.
44082 (vuint16mf2x4_t): Ditto.
44083 (vint16mf2x5_t): Ditto.
44084 (vuint16mf2x5_t): Ditto.
44085 (vint16mf2x6_t): Ditto.
44086 (vuint16mf2x6_t): Ditto.
44087 (vint16mf2x7_t): Ditto.
44088 (vuint16mf2x7_t): Ditto.
44089 (vint16mf2x8_t): Ditto.
44090 (vuint16mf2x8_t): Ditto.
44091 (vint16m1x2_t): Ditto.
44092 (vuint16m1x2_t): Ditto.
44093 (vint16m1x3_t): Ditto.
44094 (vuint16m1x3_t): Ditto.
44095 (vint16m1x4_t): Ditto.
44096 (vuint16m1x4_t): Ditto.
44097 (vint16m1x5_t): Ditto.
44098 (vuint16m1x5_t): Ditto.
44099 (vint16m1x6_t): Ditto.
44100 (vuint16m1x6_t): Ditto.
44101 (vint16m1x7_t): Ditto.
44102 (vuint16m1x7_t): Ditto.
44103 (vint16m1x8_t): Ditto.
44104 (vuint16m1x8_t): Ditto.
44105 (vint16m2x2_t): Ditto.
44106 (vuint16m2x2_t): Ditto.
44107 (vint16m2x3_t): Ditto.
44108 (vuint16m2x3_t): Ditto.
44109 (vint16m2x4_t): Ditto.
44110 (vuint16m2x4_t): Ditto.
44111 (vint16m4x2_t): Ditto.
44112 (vuint16m4x2_t): Ditto.
44113 (vint32mf2x2_t): Ditto.
44114 (vuint32mf2x2_t): Ditto.
44115 (vint32mf2x3_t): Ditto.
44116 (vuint32mf2x3_t): Ditto.
44117 (vint32mf2x4_t): Ditto.
44118 (vuint32mf2x4_t): Ditto.
44119 (vint32mf2x5_t): Ditto.
44120 (vuint32mf2x5_t): Ditto.
44121 (vint32mf2x6_t): Ditto.
44122 (vuint32mf2x6_t): Ditto.
44123 (vint32mf2x7_t): Ditto.
44124 (vuint32mf2x7_t): Ditto.
44125 (vint32mf2x8_t): Ditto.
44126 (vuint32mf2x8_t): Ditto.
44127 (vint32m1x2_t): Ditto.
44128 (vuint32m1x2_t): Ditto.
44129 (vint32m1x3_t): Ditto.
44130 (vuint32m1x3_t): Ditto.
44131 (vint32m1x4_t): Ditto.
44132 (vuint32m1x4_t): Ditto.
44133 (vint32m1x5_t): Ditto.
44134 (vuint32m1x5_t): Ditto.
44135 (vint32m1x6_t): Ditto.
44136 (vuint32m1x6_t): Ditto.
44137 (vint32m1x7_t): Ditto.
44138 (vuint32m1x7_t): Ditto.
44139 (vint32m1x8_t): Ditto.
44140 (vuint32m1x8_t): Ditto.
44141 (vint32m2x2_t): Ditto.
44142 (vuint32m2x2_t): Ditto.
44143 (vint32m2x3_t): Ditto.
44144 (vuint32m2x3_t): Ditto.
44145 (vint32m2x4_t): Ditto.
44146 (vuint32m2x4_t): Ditto.
44147 (vint32m4x2_t): Ditto.
44148 (vuint32m4x2_t): Ditto.
44149 (vint64m1x2_t): Ditto.
44150 (vuint64m1x2_t): Ditto.
44151 (vint64m1x3_t): Ditto.
44152 (vuint64m1x3_t): Ditto.
44153 (vint64m1x4_t): Ditto.
44154 (vuint64m1x4_t): Ditto.
44155 (vint64m1x5_t): Ditto.
44156 (vuint64m1x5_t): Ditto.
44157 (vint64m1x6_t): Ditto.
44158 (vuint64m1x6_t): Ditto.
44159 (vint64m1x7_t): Ditto.
44160 (vuint64m1x7_t): Ditto.
44161 (vint64m1x8_t): Ditto.
44162 (vuint64m1x8_t): Ditto.
44163 (vint64m2x2_t): Ditto.
44164 (vuint64m2x2_t): Ditto.
44165 (vint64m2x3_t): Ditto.
44166 (vuint64m2x3_t): Ditto.
44167 (vint64m2x4_t): Ditto.
44168 (vuint64m2x4_t): Ditto.
44169 (vint64m4x2_t): Ditto.
44170 (vuint64m4x2_t): Ditto.
44171 (vfloat32mf2x2_t): Ditto.
44172 (vfloat32mf2x3_t): Ditto.
44173 (vfloat32mf2x4_t): Ditto.
44174 (vfloat32mf2x5_t): Ditto.
44175 (vfloat32mf2x6_t): Ditto.
44176 (vfloat32mf2x7_t): Ditto.
44177 (vfloat32mf2x8_t): Ditto.
44178 (vfloat32m1x2_t): Ditto.
44179 (vfloat32m1x3_t): Ditto.
44180 (vfloat32m1x4_t): Ditto.
44181 (vfloat32m1x5_t): Ditto.
44182 (vfloat32m1x6_t): Ditto.
44183 (vfloat32m1x7_t): Ditto.
44184 (vfloat32m1x8_t): Ditto.
44185 (vfloat32m2x2_t): Ditto.
44186 (vfloat32m2x3_t): Ditto.
44187 (vfloat32m2x4_t): Ditto.
44188 (vfloat32m4x2_t): Ditto.
44189 (vfloat64m1x2_t): Ditto.
44190 (vfloat64m1x3_t): Ditto.
44191 (vfloat64m1x4_t): Ditto.
44192 (vfloat64m1x5_t): Ditto.
44193 (vfloat64m1x6_t): Ditto.
44194 (vfloat64m1x7_t): Ditto.
44195 (vfloat64m1x8_t): Ditto.
44196 (vfloat64m2x2_t): Ditto.
44197 (vfloat64m2x3_t): Ditto.
44198 (vfloat64m2x4_t): Ditto.
44199 (vfloat64m4x2_t): Ditto.
44200 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
44202 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
44203 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
44205 (TUPLE_ENTRY): Ditto.
44206 (riscv_v_ext_mode_p): New function.
44207 (riscv_v_adjust_nunits): Add tuple mode adjustment.
44208 (riscv_classify_address): Ditto.
44209 (riscv_binary_cost): Ditto.
44210 (riscv_rtx_costs): Ditto.
44211 (riscv_secondary_memory_needed): Ditto.
44212 (riscv_hard_regno_nregs): Ditto.
44213 (riscv_hard_regno_mode_ok): Ditto.
44214 (riscv_vector_mode_supported_p): Ditto.
44215 (riscv_regmode_natural_size): Ditto.
44216 (riscv_array_mode): New function.
44217 (TARGET_ARRAY_MODE): New target hook.
44218 * config/riscv/riscv.md: Add tuple modes.
44219 * config/riscv/vector-iterators.md: Ditto.
44220 * config/riscv/vector.md (mov<mode>): Add tuple modes data
44222 (*mov<VT:mode>_<P:mode>): Ditto.
44224 2023-05-03 Richard Biener <rguenther@suse.de>
44226 * cse.cc (cse_insn): Track an equivalence to the destination
44227 separately and delay using src_related for it.
44229 2023-05-03 Richard Biener <rguenther@suse.de>
44231 * cse.cc (HASH): Turn into inline function and mix
44232 in another HASH_SHIFT bits.
44233 (SAFE_HASH): Likewise.
44235 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44238 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
44239 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
44241 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44244 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
44245 (add<mode>3<vczle><vczbe>): ... This.
44246 (sub<mode>3): Rename to...
44247 (sub<mode>3<vczle><vczbe>): ... This.
44248 (mul<mode>3): Rename to...
44249 (mul<mode>3<vczle><vczbe>): ... This.
44250 (*div<mode>3): Rename to...
44251 (*div<mode>3<vczle><vczbe>): ... This.
44252 (neg<mode>2): Rename to...
44253 (neg<mode>2<vczle><vczbe>): ... This.
44254 (abs<mode>2): Rename to...
44255 (abs<mode>2<vczle><vczbe>): ... This.
44256 (<frint_pattern><mode>2): Rename to...
44257 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
44258 (<fmaxmin><mode>3): Rename to...
44259 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
44260 (*sqrt<mode>2): Rename to...
44261 (*sqrt<mode>2<vczle><vczbe>): ... This.
44263 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
44265 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
44267 2023-05-03 Martin Liska <mliska@suse.cz>
44269 PR tree-optimization/109693
44270 * value-range-storage.cc (vrange_allocator::vrange_allocator):
44271 Remove unused field.
44272 * value-range-storage.h: Likewise.
44274 2023-05-02 Andrew Pinski <apinski@marvell.com>
44276 * tree-ssa-phiopt.cc (move_stmt): New function.
44277 (match_simplify_replacement): Use move_stmt instead
44278 of the inlined version.
44280 2023-05-02 Andrew Pinski <apinski@marvell.com>
44282 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
44285 2023-05-02 Andrew Pinski <apinski@marvell.com>
44287 PR tree-optimization/109702
44288 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
44289 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
44291 2023-05-02 Andrew Pinski <apinski@marvell.com>
44294 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
44295 insn_and_split pattern.
44297 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44299 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
44302 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44304 * config/riscv/sync.md (mem_thread_fence_1): Change fence
44305 depending on the given memory model.
44307 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44309 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
44310 riscv_union_memmodels function to sync.md.
44311 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
44312 get the union of two memmodels in sync.md.
44313 (riscv_print_operand): Add %I and %J flags that output the
44314 optimal LR/SC flag bits for a given memory model.
44315 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
44316 bits on SC op and replace with optimized %I, %J flags.
44318 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44320 * config/riscv/riscv.cc
44321 (riscv_memmodel_needs_amo_release): Change function name.
44322 (riscv_print_operand): Remove unneeded %F case.
44323 * config/riscv/sync.md: Remove unneeded fences.
44325 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44328 * config/riscv/sync.md (atomic_store<mode>): Use simple store
44329 instruction in combination with fence(s).
44331 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44333 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
44334 of %A to include release bits.
44336 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44338 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
44339 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
44342 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44344 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
44345 sequentially consistent LR.aqrl/SC.rl pairs.
44347 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
44349 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
44350 sanitize memmodel input with memmodel_base.
44352 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
44353 Pan Li <pan2.li@intel.com>
44356 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
44358 2023-05-02 Romain Naour <romain.naour@gmail.com>
44360 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
44363 2023-05-02 Martin Liska <mliska@suse.cz>
44365 * doc/invoke.texi: Update documentation based on param.opt file.
44367 2023-05-02 Richard Biener <rguenther@suse.de>
44369 PR tree-optimization/109672
44370 * tree-vect-stmts.cc (vectorizable_operation): For plus,
44371 minus and negate always check the vector mode is word mode.
44373 2023-05-01 Andrew Pinski <apinski@marvell.com>
44375 * tree-ssa-phiopt.cc: Update comment about
44376 how the transformation are implemented.
44378 2023-05-01 Jeff Law <jlaw@ventanamicro>
44380 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
44382 2023-05-01 Jeff Law <jlaw@ventanamicro>
44384 * config/cris/cris.cc (TARGET_LRA_P): Remove.
44385 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
44386 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
44387 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
44388 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
44389 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
44391 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
44393 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
44394 * print-tree.cc (print_decl_identifier): Implement it.
44395 * toplev.cc (output_stack_usage_1): Use it.
44397 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44399 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
44402 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44404 * value-range.h (irange::set_nonzero): Inline.
44406 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44408 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
44410 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
44411 invalid_range, as it is an inverse range.
44412 * tree-vrp.cc (find_case_label_range): Avoid trees.
44413 * value-range.cc (irange::irange_set): Delete.
44414 (irange::irange_set_1bit_anti_range): Delete.
44415 (irange::irange_set_anti_range): Delete.
44416 (irange::set): Cleanup.
44417 * value-range.h (class irange): Remove irange_set,
44418 irange_set_anti_range, irange_set_1bit_anti_range.
44419 (irange::set_undefined): Remove set to m_type.
44421 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44423 * range-op.cc (update_known_bitmask): Adjust for irange containing
44424 wide_ints internally.
44425 * tree-ssanames.cc (set_nonzero_bits): Same.
44426 * tree-ssanames.h (set_nonzero_bits): Same.
44427 * value-range-storage.cc (irange_storage::set_irange): Same.
44428 (irange_storage::get_irange): Same.
44429 * value-range.cc (irange::operator=): Same.
44430 (irange::irange_set): Same.
44431 (irange::irange_set_1bit_anti_range): Same.
44432 (irange::irange_set_anti_range): Same.
44433 (irange::set): Same.
44434 (irange::verify_range): Same.
44435 (irange::contains_p): Same.
44436 (irange::irange_single_pair_union): Same.
44437 (irange::union_): Same.
44438 (irange::irange_contains_p): Same.
44439 (irange::intersect): Same.
44440 (irange::invert): Same.
44441 (irange::set_range_from_nonzero_bits): Same.
44442 (irange::set_nonzero_bits): Same.
44443 (mask_to_wi): Same.
44444 (irange::intersect_nonzero_bits): Same.
44445 (irange::union_nonzero_bits): Same.
44448 (tree_range): Same.
44449 (range_tests_strict_enum): Same.
44450 (range_tests_misc): Same.
44451 (range_tests_nonzero_bits): Same.
44452 * value-range.h (irange::type): Same.
44453 (irange::varying_compatible_p): Same.
44454 (irange::irange): Same.
44455 (int_range::int_range): Same.
44456 (irange::set_undefined): Same.
44457 (irange::set_varying): Same.
44458 (irange::lower_bound): Same.
44459 (irange::upper_bound): Same.
44461 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44463 * gimple-range-fold.cc (tree_lower_bound): Delete.
44464 (tree_upper_bound): Delete.
44465 (vrp_val_max): Delete.
44466 (vrp_val_min): Delete.
44467 (fold_using_range::range_of_ssa_name_with_loop_info): Call
44468 range_of_var_in_loop.
44469 * vr-values.cc (valid_value_p): Delete.
44470 (fix_overflow): Delete.
44471 (get_scev_info): New.
44472 (bounds_of_var_in_loop): Refactor into...
44473 (induction_variable_may_overflow_p): ...this,
44474 (range_from_loop_direction): ...and this,
44475 (range_of_var_in_loop): ...and this.
44476 * vr-values.h (bounds_of_var_in_loop): Delete.
44477 (range_of_var_in_loop): New.
44479 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44481 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
44483 (vrp_val_max): New.
44484 (vrp_val_min): New.
44485 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
44486 * range-op.cc (max_limit): Same.
44488 (plus_minus_ranges): Same.
44489 (operator_rshift::op1_range): Same.
44490 (operator_cast::inside_domain_p): Same.
44491 * value-range.cc (vrp_val_is_max): Delete.
44492 (vrp_val_is_min): Delete.
44493 (range_tests_misc): Use irange_val_*.
44494 * value-range.h (vrp_val_is_min): Delete.
44495 (vrp_val_is_max): Delete.
44496 (vrp_val_max): Delete.
44497 (irange_val_min): New.
44498 (vrp_val_min): Delete.
44499 (irange_val_max): New.
44500 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
44502 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44504 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
44505 * gimple-fold.cc (size_must_be_zero_p): Same.
44506 * gimple-loop-versioning.cc
44507 (loop_versioning::prune_loop_conditions): Same.
44508 * gimple-range-edge.cc (gcond_edge_range): Same.
44509 (gimple_outgoing_range::calc_switch_ranges): Same.
44510 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
44511 (adjust_realpart_expr): Same.
44512 (fold_using_range::range_of_address): Same.
44513 (fold_using_range::relation_fold_and_or): Same.
44514 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
44515 (range_is_either_true_or_false): Same.
44516 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
44517 (cfn_clz::fold_range): Same.
44518 (cfn_ctz::fold_range): Same.
44519 * gimple-range-tests.cc (class test_expr_eval): Same.
44520 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
44521 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
44522 (propagate_vr_across_jump_function): Same.
44523 (decide_whether_version_node): Same.
44524 * ipa-prop.cc (ipa_get_value_range): Same.
44525 * ipa-prop.h (ipa_range_set_and_normalize): Same.
44526 * range-op.cc (get_shift_range): Same.
44527 (value_range_from_overflowed_bounds): Same.
44528 (value_range_with_overflow): Same.
44529 (create_possibly_reversed_range): Same.
44530 (equal_op1_op2_relation): Same.
44531 (not_equal_op1_op2_relation): Same.
44532 (lt_op1_op2_relation): Same.
44533 (le_op1_op2_relation): Same.
44534 (gt_op1_op2_relation): Same.
44535 (ge_op1_op2_relation): Same.
44536 (operator_mult::op1_range): Same.
44537 (operator_exact_divide::op1_range): Same.
44538 (operator_lshift::op1_range): Same.
44539 (operator_rshift::op1_range): Same.
44540 (operator_cast::op1_range): Same.
44541 (operator_logical_and::fold_range): Same.
44542 (set_nonzero_range_from_mask): Same.
44543 (operator_bitwise_or::op1_range): Same.
44544 (operator_bitwise_xor::op1_range): Same.
44545 (operator_addr_expr::fold_range): Same.
44546 (pointer_plus_operator::wi_fold): Same.
44547 (pointer_or_operator::op1_range): Same.
44554 (range_op_cast_tests): Same.
44555 (range_op_lshift_tests): Same.
44556 (range_op_rshift_tests): Same.
44557 (range_op_bitwise_and_tests): Same.
44558 (range_relational_tests): Same.
44559 * range.cc (range_zero): Same.
44560 (range_nonzero): Same.
44561 * range.h (range_true): Same.
44562 (range_false): Same.
44563 (range_true_and_false): Same.
44564 * tree-data-ref.cc (split_constant_offset_1): Same.
44565 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
44566 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
44567 (find_unswitching_predicates_for_bb): Same.
44568 * tree-ssa-phiopt.cc (value_replacement): Same.
44569 * tree-ssa-threadbackward.cc
44570 (back_threader::find_taken_edge_cond): Same.
44571 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
44572 * tree-vrp.cc (find_case_label_range): Same.
44573 * value-query.cc (range_query::get_tree_range): Same.
44574 * value-range.cc (irange::set_nonnegative): Same.
44575 (frange::contains_p): Same.
44576 (frange::singleton_p): Same.
44577 (frange::internal_singleton_p): Same.
44578 (irange::irange_set): Same.
44579 (irange::irange_set_1bit_anti_range): Same.
44580 (irange::irange_set_anti_range): Same.
44581 (irange::set): Same.
44582 (irange::operator==): Same.
44583 (irange::singleton_p): Same.
44584 (irange::contains_p): Same.
44585 (irange::set_range_from_nonzero_bits): Same.
44586 (DEFINE_INT_RANGE_INSTANCE): Same.
44596 (range_uint128): New.
44597 (range_uchar): New.
44599 (build_range3): Convert to irange wide_int API.
44600 (range_tests_irange3): Same.
44601 (range_tests_int_range_max): Same.
44602 (range_tests_strict_enum): Same.
44603 (range_tests_misc): Same.
44604 (range_tests_nonzero_bits): Same.
44605 (range_tests_nan): Same.
44606 (range_tests_signed_zeros): Same.
44607 * value-range.h (Value_Range::Value_Range): Same.
44608 (irange::set): Same.
44609 (irange::nonzero_p): Same.
44610 (irange::contains_p): Same.
44611 (range_includes_zero_p): Same.
44612 (irange::set_nonzero): Same.
44613 (irange::set_zero): Same.
44614 (contains_zero_p): Same.
44615 (frange::contains_p): Same.
44617 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
44618 (bounds_of_var_in_loop): Same.
44619 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
44621 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44623 * value-range.cc (irange::irange_union): Rename to...
44624 (irange::union_): ...this.
44625 (irange::irange_intersect): Rename to...
44626 (irange::intersect): ...this.
44627 * value-range.h (irange::union_): Delete.
44628 (irange::intersect): Delete.
44630 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44632 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
44634 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44636 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
44638 (compare_ranges): Delete.
44639 (compare_range_with_value): Delete.
44640 (bounds_of_var_in_loop): Tidy up by using ranger API.
44641 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
44642 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
44643 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
44644 strict_overflow_p and only_ranges.
44645 (simplify_using_ranges::legacy_fold_cond): Adjust call to
44646 legacy_fold_cond_overflow.
44647 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
44649 (range_fits_type_p): Rename value_range to irange.
44650 * vr-values.h (range_fits_type_p): Adjust prototype.
44652 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44654 * value-range.cc (irange::irange_set_anti_range): Remove uses of
44655 tree_lower_bound and tree_upper_bound.
44656 (irange::verify_range): Same.
44657 (irange::operator==): Same.
44658 (irange::singleton_p): Same.
44659 * value-range.h (irange::tree_lower_bound): Delete.
44660 (irange::tree_upper_bound): Delete.
44661 (irange::lower_bound): Delete.
44662 (irange::upper_bound): Delete.
44663 (irange::zero_p): Remove uses of tree_lower_bound and
44666 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44668 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
44670 (determine_value_range): Same.
44671 (record_nonwrapping_iv): Same.
44672 (infer_loop_bounds_from_signedness): Same.
44673 (scev_var_range_cant_overflow): Same.
44674 * tree-vrp.cc (operand_less_p): Delete.
44675 * tree-vrp.h (operand_less_p): Delete.
44676 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
44677 (irange::value_inside_range): Delete.
44678 * value-range.h (vrange::kind): Delete.
44679 (irange::num_pairs): Remove check of m_kind.
44680 (irange::min): Delete.
44681 (irange::max): Delete.
44683 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
44685 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
44686 for vrange_storage.
44687 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
44688 (sbr_vector::grow): Same.
44689 (sbr_vector::set_bb_range): Same.
44690 (sbr_vector::get_bb_range): Same.
44691 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
44692 (sbr_sparse_bitmap::set_bb_range): Same.
44693 (sbr_sparse_bitmap::get_bb_range): Same.
44694 (block_range_cache::block_range_cache): Same.
44695 (ssa_global_cache::ssa_global_cache): Same.
44696 (ssa_global_cache::get_global_range): Same.
44697 (ssa_global_cache::set_global_range): Same.
44698 * gimple-range-cache.h: Same.
44699 * gimple-range-edge.cc
44700 (gimple_outgoing_range::gimple_outgoing_range): Same.
44701 (gimple_outgoing_range::switch_edge_range): Same.
44702 (gimple_outgoing_range::calc_switch_ranges): Same.
44703 * gimple-range-edge.h: Same.
44704 * gimple-range-infer.cc
44705 (infer_range_manager::infer_range_manager): Same.
44706 (infer_range_manager::get_nonzero): Same.
44707 (infer_range_manager::maybe_adjust_range): Same.
44708 (infer_range_manager::add_range): Same.
44709 * gimple-range-infer.h: Rename obstack_vrange_allocator to
44711 * tree-core.h (struct irange_storage_slot): Remove.
44712 (struct tree_ssa_name): Remove irange_info and frange_info. Make
44713 range_info a pointer to vrange_storage.
44714 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
44715 (range_info_alloc): Same.
44716 (range_info_free): Same.
44717 (range_info_get_range): Same.
44718 (range_info_set_range): Same.
44719 (get_nonzero_bits): Same.
44720 * value-query.cc (get_ssa_name_range_info): Same.
44721 * value-range-storage.cc (class vrange_internal_alloc): New.
44722 (class vrange_obstack_alloc): New.
44723 (class vrange_ggc_alloc): New.
44724 (vrange_allocator::vrange_allocator): New.
44725 (vrange_allocator::~vrange_allocator): New.
44726 (vrange_storage::alloc_slot): New.
44727 (vrange_allocator::alloc): New.
44728 (vrange_allocator::free): New.
44729 (vrange_allocator::clone): New.
44730 (vrange_allocator::clone_varying): New.
44731 (vrange_allocator::clone_undefined): New.
44732 (vrange_storage::alloc): New.
44733 (vrange_storage::set_vrange): Remove slot argument.
44734 (vrange_storage::get_vrange): Same.
44735 (vrange_storage::fits_p): Same.
44736 (vrange_storage::equal_p): New.
44737 (irange_storage::write_lengths_address): New.
44738 (irange_storage::lengths_address): New.
44739 (irange_storage_slot::alloc_slot): Remove.
44740 (irange_storage::alloc): New.
44741 (irange_storage_slot::irange_storage_slot): Remove.
44742 (irange_storage::irange_storage): New.
44743 (write_wide_int): New.
44744 (irange_storage_slot::set_irange): Remove.
44745 (irange_storage::set_irange): New.
44746 (read_wide_int): New.
44747 (irange_storage_slot::get_irange): Remove.
44748 (irange_storage::get_irange): New.
44749 (irange_storage_slot::size): Remove.
44750 (irange_storage::equal_p): New.
44751 (irange_storage_slot::num_wide_ints_needed): Remove.
44752 (irange_storage::size): New.
44753 (irange_storage_slot::fits_p): Remove.
44754 (irange_storage::fits_p): New.
44755 (irange_storage_slot::dump): Remove.
44756 (irange_storage::dump): New.
44757 (frange_storage_slot::alloc_slot): Remove.
44758 (frange_storage::alloc): New.
44759 (frange_storage_slot::set_frange): Remove.
44760 (frange_storage::set_frange): New.
44761 (frange_storage_slot::get_frange): Remove.
44762 (frange_storage::get_frange): New.
44763 (frange_storage_slot::fits_p): Remove.
44764 (frange_storage::equal_p): New.
44765 (frange_storage::fits_p): New.
44766 (ggc_vrange_allocator): New.
44767 (ggc_alloc_vrange_storage): New.
44768 * value-range-storage.h (class vrange_storage): Rewrite.
44769 (class irange_storage): Rewrite.
44770 (class frange_storage): Rewrite.
44771 (class obstack_vrange_allocator): Remove.
44772 (class ggc_vrange_allocator): Remove.
44773 (vrange_allocator::alloc_vrange): Remove.
44774 (vrange_allocator::alloc_irange): Remove.
44775 (vrange_allocator::alloc_frange): Remove.
44776 (ggc_alloc_vrange_storage): New.
44777 * value-range.h (class irange): Rename vrange_allocator to
44779 (class frange): Same.
44781 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
44783 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
44784 inc to avoid clobbering the carry flag.
44786 2023-04-30 Andrew Pinski <apinski@marvell.com>
44788 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
44789 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
44791 2023-04-30 Andrew Pinski <apinski@marvell.com>
44793 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
44794 Allow some builtin/internal function calls which
44795 are known not to trap/throw.
44796 (phiopt_worker::match_simplify_replacement):
44797 Use name instead of getting the lhs again.
44799 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
44801 * configure: Regenerate.
44802 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
44804 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
44806 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
44807 emit_insn_if_valid_for_reload.
44808 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
44809 to be recognized, also try emitting a parallel that clobbers
44810 TARGET_FLAGS_REGNUM, as applicable.
44812 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
44814 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
44816 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
44817 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
44819 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
44821 * config/stormy16/stormy16.md (any_lshift): New code iterator.
44822 (any_or_plus): Likewise.
44823 (any_rotate): Likewise.
44824 (*<any_lshift>_and_internal): New define_insn_and_split to
44825 recognize a logical shift followed by an AND, and split it
44826 again after reload.
44827 (*swpn): New define_insn matching xstormy16's swpn.
44828 (*swpn_zext): New define_insn recognizing swpn followed by
44829 zero_extendqihi2, i.e. with the high byte set to zero.
44830 (*swpn_sext): Likewise, for swpn followed by cbw.
44831 (*swpn_sext_2): Likewise, for an alternate RTL form.
44832 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
44833 sequence is split in the correct place to recognize the *swpn_zext
44834 followed by any_or_plus (ior, xor or plus) instruction.
44836 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
44839 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
44840 (lm32-*-uclinux*): Likewise.
44842 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
44844 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
44845 for riscv_use_save_libcall.
44846 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
44847 (riscv_compute_frame_info): restructure to decouple stack allocation
44848 for rv32e w/o save-restore.
44850 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
44852 * doc/install.texi: Fix documentation typo
44854 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
44856 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
44857 (u): Add div/udiv cases.
44858 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
44859 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
44861 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
44862 (thead_c906_tune_info): Likewise.
44863 (optimize_size_tune_info): Likewise.
44864 (riscv_use_divmod_expander): New function.
44865 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
44867 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
44869 * config/riscv/bitmanip.md: Added clmulr instruction.
44870 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
44871 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
44873 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
44874 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
44875 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
44876 functions to riscv-cmo.def.
44877 * config/riscv/generic.md: Add clmul to list of instructions
44878 using the generic_imul reservation.
44880 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
44882 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
44884 2023-04-28 Andrew Pinski <apinski@marvell.com>
44886 PR tree-optimization/100958
44887 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
44888 (pass_phiopt::execute): Don't call two_value_replacement.
44889 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
44890 handle what two_value_replacement did.
44892 2023-04-28 Andrew Pinski <apinski@marvell.com>
44894 * match.pd: Add patterns for
44895 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
44897 2023-04-28 Andrew Pinski <apinski@marvell.com>
44899 * match.pd: Factor out the deciding the min/max from
44900 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
44902 * fold-const.cc (minmax_from_comparison): this new function.
44903 * fold-const.h (minmax_from_comparison): New prototype.
44905 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
44907 PR rtl-optimization/109476
44908 * lower-subreg.cc: Include explow.h for force_reg.
44909 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
44910 If decomposing a suitable LSHIFTRT and we're not splitting
44911 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
44912 instead of setting a high part SUBREG to zero, which helps combine.
44913 (decompose_multiword_subregs): Update call to resolve_shift_zext.
44915 2023-04-28 Richard Biener <rguenther@suse.de>
44917 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
44919 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
44920 gather-scatter info and cost emulated scatters accordingly.
44921 (get_load_store_type): Support emulated scatters.
44922 (vectorizable_store): Likewise. Emulate them by extracting
44923 scalar offsets and data, doing scalar stores.
44925 2023-04-28 Richard Biener <rguenther@suse.de>
44927 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
44928 Tame down element extracts and scalar loads for gather/scatter
44929 similar to elementwise strided accesses.
44931 2023-04-28 Pan Li <pan2.li@intel.com>
44932 kito-cheng <kito.cheng@sifive.com>
44934 * config/riscv/vector.md: Add new define split to perform
44935 the simplification.
44937 2023-04-28 Richard Biener <rguenther@suse.de>
44940 * ipa-param-manipulation.cc
44941 (ipa_param_body_adjustments::modify_expression): Allow
44942 conversion of a register to a non-register type. Elide
44943 conversions inside BIT_FIELD_REFs.
44945 2023-04-28 Richard Biener <rguenther@suse.de>
44947 PR tree-optimization/109644
44948 * tree-cfg.cc (verify_types_in_gimple_reference): Check
44949 register constraints on the outermost VIEW_CONVERT_EXPR
44950 only. Do not allow register or invariant bases on
44951 multi-level or possibly variable index handled components.
44953 2023-04-28 Richard Biener <rguenther@suse.de>
44955 * gimplify.cc (gimplify_compound_lval): When there's a
44956 non-register type produced by one of the handled component
44957 operations make sure we get a non-register base.
44959 2023-04-28 Richard Biener <rguenther@suse.de>
44961 PR tree-optimization/108752
44962 * tree-vect-generic.cc (build_replicated_const): Rename
44963 to build_replicated_int_cst and move to tree.{h,cc}.
44964 (do_plus_minus): Adjust.
44965 (do_negate): Likewise.
44966 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
44967 arithmetic vector operations in lowered form.
44968 * tree.h (build_replicated_int_cst): Declare.
44969 * tree.cc (build_replicated_int_cst): Moved from
44970 tree-vect-generic.cc build_replicated_const.
44972 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44975 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
44976 (aarch64_rbit<mode><vczle><vczbe>): ... This.
44977 (neg<mode>2): Rename to...
44978 (neg<mode>2<vczle><vczbe>): ... This.
44979 (abs<mode>2): Rename to...
44980 (abs<mode>2<vczle><vczbe>): ... This.
44981 (aarch64_abs<mode>): Rename to...
44982 (aarch64_abs<mode><vczle><vczbe>): ... This.
44983 (one_cmpl<mode>2): Rename to...
44984 (one_cmpl<mode>2<vczle><vczbe>): ... This.
44985 (clrsb<mode>2): Rename to...
44986 (clrsb<mode>2<vczle><vczbe>): ... This.
44987 (clz<mode>2): Rename to...
44988 (clz<mode>2<vczle><vczbe>): ... This.
44989 (popcount<mode>2): Rename to...
44990 (popcount<mode>2<vczle><vczbe>): ... This.
44992 2023-04-28 Jakub Jelinek <jakub@redhat.com>
44994 * gimple-range-op.cc (class cfn_sqrt): New type.
44995 (op_cfn_sqrt): New variable.
44996 (gimple_range_op_handler::maybe_builtin_call): Handle
44997 CASE_CFN_SQRT{,_FN}.
44999 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
45000 Jakub Jelinek <jakub@redhat.com>
45002 * value-range.h (frange_nextafter): Declare.
45003 * gimple-range-op.cc (class cfn_sincos): New.
45004 (op_cfn_sin, op_cfn_cos): New variables.
45005 (gimple_range_op_handler::maybe_builtin_call): Handle
45006 CASE_CFN_{SIN,COS}{,_FN}.
45008 2023-04-28 Jakub Jelinek <jakub@redhat.com>
45010 * target.def (libm_function_max_error): New target hook.
45011 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
45012 * doc/tm.texi: Regenerated.
45013 * targhooks.h (default_libm_function_max_error,
45014 glibc_linux_libm_function_max_error): Declare.
45015 * targhooks.cc: Include case-cfn-macros.h.
45016 (default_libm_function_max_error,
45017 glibc_linux_libm_function_max_error): New functions.
45018 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45019 * config/linux-protos.h (linux_libm_function_max_error): Declare.
45020 * config/linux.cc: Include target.h and targhooks.h.
45021 (linux_libm_function_max_error): New function.
45022 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
45023 (arc_libm_function_max_error): New function.
45024 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45025 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
45026 (ix86_libm_function_max_error): New function.
45027 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45028 * config/rs6000/rs6000-protos.h
45029 (rs6000_linux_libm_function_max_error): Declare.
45030 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
45031 and case-cfn-macros.h.
45032 (rs6000_linux_libm_function_max_error): New function.
45033 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45034 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45035 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
45036 (or1k_libm_function_max_error): New function.
45037 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
45039 2023-04-28 Alexandre Oliva <oliva@adacore.com>
45041 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
45042 Move detach value calls...
45043 (pass_harden_conditional_branches::execute): ... here.
45044 (pass_harden_compares::execute): Detach values before
45047 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
45049 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
45050 (cml<addsub_as><mode>4): Likewise.
45051 (vec_addsub<mode>3): Likewise.
45052 (cadd<rot><mode>3): Likewise.
45053 (vec_fmaddsub<mode>4): Likewise.
45054 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
45056 2023-04-27 Andrew Pinski <apinski@marvell.com>
45058 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
45059 up to 2 min/max expressions in the sequence/match code.
45061 2023-04-27 Andrew Pinski <apinski@marvell.com>
45063 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
45065 * tree-eh.cc (operation_could_trap_helper_p): Treate
45066 MIN_EXPR/MAX_EXPR similar as other comparisons.
45068 2023-04-27 Andrew Pinski <apinski@marvell.com>
45070 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
45072 (cond_if_else_store_replacement): Likewise.
45073 (get_non_trapping): Likewise.
45074 (store_elim_worker): Move into ...
45075 (pass_cselim::execute): This.
45077 2023-04-27 Andrew Pinski <apinski@marvell.com>
45079 * tree-ssa-phiopt.cc (two_value_replacement): Remove
45081 (match_simplify_replacement): Likewise.
45082 (factor_out_conditional_conversion): Likewise.
45083 (value_replacement): Likewise.
45084 (minmax_replacement): Likewise.
45085 (spaceship_replacement): Likewise.
45086 (cond_removal_in_builtin_zero_pattern): Likewise.
45087 (hoist_adjacent_loads): Likewise.
45088 (tree_ssa_phiopt_worker): Move into ...
45089 (pass_phiopt::execute): this.
45091 2023-04-27 Andrew Pinski <apinski@marvell.com>
45093 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
45094 do_store_elim argument and split that part out to ...
45095 (store_elim_worker): This new function.
45096 (pass_cselim::execute): Call store_elim_worker.
45097 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
45099 2023-04-27 Jan Hubicka <jh@suse.cz>
45101 * cfgloopmanip.h (unloop_loops): Export.
45102 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
45103 that no longer loop.
45104 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
45105 vectors of loops to unloop.
45106 (canonicalize_induction_variables): Free vectors here.
45107 (tree_unroll_loops_completely): Free vectors here.
45109 2023-04-27 Richard Biener <rguenther@suse.de>
45111 PR tree-optimization/109170
45112 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
45113 Handle __builtin_expect and similar via cfn_pass_through_arg1
45114 and inspecting the calls fnspec.
45115 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
45116 and BUILT_IN_EXPECT_WITH_PROBABILITY.
45118 2023-04-27 Alexandre Oliva <oliva@adacore.com>
45120 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
45122 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
45124 PR tree-optimization/109639
45125 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
45126 (propagate_vr_across_jump_function): Same.
45127 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
45128 * ipa-prop.h (ipa_range_set_and_normalize): New.
45129 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
45131 2023-04-27 Richard Biener <rguenther@suse.de>
45133 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
45134 create a CTOR operand in the result when simplifying GIMPLE.
45136 2023-04-27 Richard Biener <rguenther@suse.de>
45138 * gimplify.cc (gimplify_compound_lval): When the base
45139 gimplified to a register make sure to split up chains
45142 2023-04-27 Richard Biener <rguenther@suse.de>
45145 * ipa-param-manipulation.h
45146 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
45148 * ipa-param-manipulation.cc
45149 (ipa_param_body_adjustments::modify_expression): Likewise.
45150 When we need a conversion and the replacement is a register
45151 split the conversion out.
45152 (ipa_param_body_adjustments::modify_assignment): Pass
45153 extra_stmts to RHS modify_expression.
45155 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
45157 * doc/extend.texi (Zero Length): Describe example.
45159 2023-04-27 Richard Biener <rguenther@suse.de>
45161 PR tree-optimization/109594
45162 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
45163 what we rewrite to a register based on the above.
45165 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
45167 * config/riscv/riscv.cc: Fix whitespace.
45168 * config/riscv/sync.md: Fix whitespace.
45170 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45172 PR tree-optimization/108697
45173 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
45174 not clear the vector on an out of range query.
45175 (ssa_cache::dump): Use dump_range_query instead of get_range.
45176 (ssa_cache::dump_range_query): New.
45177 (ssa_lazy_cache::dump_range_query): New.
45178 (ssa_lazy_cache::set_range): New.
45179 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
45180 (class ssa_lazy_cache): New.
45181 (ssa_lazy_cache::ssa_lazy_cache): New.
45182 (ssa_lazy_cache::~ssa_lazy_cache): New.
45183 (ssa_lazy_cache::get_range): New.
45184 (ssa_lazy_cache::clear_range): New.
45185 (ssa_lazy_cache::clear): New.
45186 (ssa_lazy_cache::dump): New.
45187 * gimple-range-path.cc (path_range_query::path_range_query): Do
45188 not allocate a ssa_cache object nor has_cache bitmap.
45189 (path_range_query::~path_range_query): Do not free objects.
45190 (path_range_query::clear_cache): Remove.
45191 (path_range_query::get_cache): Adjust.
45192 (path_range_query::set_cache): Remove.
45193 (path_range_query::dump): Don't call through a pointer.
45194 (path_range_query::internal_range_of_expr): Set cache directly.
45195 (path_range_query::reset_path): Clear cache directly.
45196 (path_range_query::ssa_range_in_phi): Fold with globals only.
45197 (path_range_query::compute_ranges_in_phis): Simply set range.
45198 (path_range_query::compute_ranges_in_block): Call cache directly.
45199 * gimple-range-path.h (class path_range_query): Replace bitmap
45200 and cache pointer with lazy cache object.
45201 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
45203 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45205 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
45206 (ssa_cache::~ssa_cache): Rename.
45207 (ssa_cache::has_range): New.
45208 (ssa_cache::get_range): Rename.
45209 (ssa_cache::set_range): Rename.
45210 (ssa_cache::clear_range): Rename.
45211 (ssa_cache::clear): Rename.
45212 (ssa_cache::dump): Rename and use get_range.
45213 (ranger_cache::get_global_range): Use get_range and set_range.
45214 (ranger_cache::range_of_def): Use get_range.
45215 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
45216 (class ranger_cache): Use ssa_cache.
45217 * gimple-range-path.cc (path_range_query::path_range_query): Use
45219 (path_range_query::get_cache): Use get_range.
45220 (path_range_query::set_cache): Use set_range.
45221 * gimple-range-path.h (class path_range_query): Use ssa_cache.
45222 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
45223 (assume_query::range_of_expr): Use get_range.
45224 (assume_query::assume_query): Use set_range.
45225 (assume_query::calculate_op): Use get_range and set_range.
45226 * gimple-range.h (class assume_query): Use ssa_cache.
45228 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45230 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
45231 and local to optionally zero memory.
45232 (br_vector::grow): Only zero memory if flag is set.
45233 (class sbr_lazy_vector): New.
45234 (sbr_lazy_vector::sbr_lazy_vector): New.
45235 (sbr_lazy_vector::set_bb_range): New.
45236 (sbr_lazy_vector::get_bb_range): New.
45237 (sbr_lazy_vector::bb_range_p): New.
45238 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
45239 * gimple-range-gori.cc (gori_map::calculate_gori): Use
45240 param_vrp_switch_limit.
45241 (gori_compute::gori_compute): Use param_vrp_switch_limit.
45242 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
45243 (vrp_switch_limit): Rename from evrp_switch_limit.
45244 (vrp_vector_threshold): New.
45246 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45248 * value-relation.cc (dom_oracle::query_relation): Check early for lack
45250 * value-relation.h (equiv_oracle::has_equiv_p): New.
45252 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
45254 PR tree-optimization/109417
45255 * gimple-range-gori.cc (range_def_chain::register_dependency):
45256 Save the ssa version number, not the pointer.
45257 (gori_compute::may_recompute_p): No need to check if a dependency
45258 is in the free list.
45259 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
45260 fields to be unsigned int instead of trees.
45261 (ange_def_chain::depend1): Adjust.
45262 (ange_def_chain::depend2): Adjust.
45263 * gimple-range.h: Include "ssa.h" to inline ssa_name().
45265 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
45267 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
45268 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
45269 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
45271 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
45274 * config/riscv/riscv-protos.h: Add helper function stubs.
45275 * config/riscv/riscv.cc: Add helper functions for subword masking.
45276 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
45277 -mno-inline-atomics.
45278 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
45279 fetch_and_nand, CAS, and exchange ops.
45280 * doc/invoke.texi: Add blurb regarding new command-line flags
45281 -minline-atomics and -mno-inline-atomics.
45283 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45285 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
45286 Reimplement using standard RTL codes instead of unspec.
45287 (aarch64_rshrn2<mode>_insn_be): Likewise.
45288 (aarch64_rshrn2<mode>): Adjust for the above.
45289 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
45291 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45293 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
45294 with standard RTL codes instead of an UNSPEC.
45295 (aarch64_rshrn<mode>_insn_be): Likewise.
45296 (aarch64_rshrn<mode>): Adjust for the above.
45297 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
45299 2023-04-26 Pan Li <pan2.li@intel.com>
45300 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45302 * config/riscv/riscv.cc (riscv_classify_address): Allow
45303 const0_rtx for the RVV load/store.
45305 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45307 * range-op.cc (range_op_cast_tests): Remove legacy support.
45308 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
45309 * value-range.cc (irange::operator=): Same.
45310 (get_legacy_range): Same.
45311 (irange::copy_legacy_to_multi_range): Delete.
45312 (irange::copy_to_legacy): Delete.
45313 (irange::irange_set_anti_range): Delete.
45314 (irange::set): Remove legacy support.
45315 (irange::verify_range): Same.
45316 (irange::legacy_lower_bound): Delete.
45317 (irange::legacy_upper_bound): Delete.
45318 (irange::legacy_equal_p): Delete.
45319 (irange::operator==): Remove legacy support.
45320 (irange::singleton_p): Same.
45321 (irange::value_inside_range): Same.
45322 (irange::contains_p): Same.
45323 (intersect_ranges): Delete.
45324 (irange::legacy_intersect): Delete.
45325 (union_ranges): Delete.
45326 (irange::legacy_union): Delete.
45327 (irange::legacy_verbose_union_): Delete.
45328 (irange::legacy_verbose_intersect): Delete.
45329 (irange::irange_union): Remove legacy support.
45330 (irange::irange_intersect): Same.
45331 (irange::intersect): Same.
45332 (irange::invert): Same.
45333 (ranges_from_anti_range): Delete.
45334 (gt_pch_nx): Adjust for legacy removal.
45336 (range_tests_legacy): Delete.
45337 (range_tests_misc): Adjust for legacy removal.
45338 (range_tests): Same.
45339 * value-range.h (class irange): Same.
45340 (irange::legacy_mode_p): Delete.
45341 (ranges_from_anti_range): Delete.
45342 (irange::nonzero_p): Adjust for legacy removal.
45343 (irange::lower_bound): Same.
45344 (irange::upper_bound): Same.
45345 (irange::union_): Same.
45346 (irange::intersect): Same.
45347 (irange::set_nonzero): Same.
45348 (irange::set_zero): Same.
45349 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
45351 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45353 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
45354 of range_has_numeric_bounds_p with irange API.
45355 (range_has_numeric_bounds_p): Delete.
45356 * value-range.h (range_has_numeric_bounds_p): Delete.
45358 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45360 * tree-data-ref.cc (compute_distributive_range): Replace uses of
45361 range_int_cst_p with irange API.
45362 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
45363 * tree-vrp.h (range_int_cst_p): Delete.
45364 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
45365 range_int_cst_p with irange API.
45366 (vr_set_zero_nonzero_bits): Same.
45367 (range_fits_type_p): Same.
45368 (simplify_using_ranges::simplify_casted_cond): Same.
45369 * tree-vrp.cc (range_int_cst_p): Remove.
45371 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45373 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
45375 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45377 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
45378 API uses to new API.
45379 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
45380 * internal-fn.cc (get_min_precision): Same.
45382 * tree-affine.cc (expr_to_aff_combination): Same.
45383 * tree-data-ref.cc (dr_step_indicator): Same.
45384 * tree-dfa.cc (get_ref_base_and_extent): Same.
45385 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
45386 * tree-ssa-phiopt.cc (two_value_replacement): Same.
45387 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
45388 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
45389 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
45390 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
45391 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
45392 * tree.cc (get_range_pos_neg): Same.
45394 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45396 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
45397 vrange::dump instead of ad-hoc dumper.
45398 * tree-ssa-strlen.cc (dump_strlen_info): Same.
45399 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
45402 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45404 * range-op.cc (operator_cast::op1_range): Use
45405 create_possibly_reversed_range.
45406 (operator_bitwise_and::simple_op1_range_solver): Same.
45407 * value-range.cc (swap_out_of_order_endpoints): Delete.
45408 (irange::set): Remove call to swap_out_of_order_endpoints.
45410 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45412 * builtins.cc (determine_block_size): Convert use of legacy API to
45414 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
45415 (array_bounds_checker::check_array_ref): Same.
45416 * gimple-ssa-warn-restrict.cc
45417 (builtin_memref::extend_offset_range): Same.
45418 * ipa-cp.cc (ipcp_store_vr_results): Same.
45419 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
45420 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
45421 (ipa_write_jump_function): Same.
45422 * pointer-query.cc (get_size_range): Same.
45423 * tree-data-ref.cc (split_constant_offset): Same.
45424 * tree-ssa-strlen.cc (get_range): Same.
45425 (maybe_diag_stxncpy_trunc): Same.
45426 (strlen_pass::get_len_or_size): Same.
45427 (strlen_pass::count_nonzero_bytes_addr): Same.
45428 * tree-vect-patterns.cc (vect_get_range_info): Same.
45429 * value-range.cc (irange::maybe_anti_range): Remove.
45430 (get_legacy_range): New.
45431 (irange::copy_to_legacy): Use get_legacy_range.
45432 (ranges_from_anti_range): Same.
45433 * value-range.h (class irange): Remove maybe_anti_range.
45434 (get_legacy_range): New.
45435 * vr-values.cc (check_for_binary_op_overflow): Convert use of
45436 legacy API to get_legacy_range.
45437 (compare_ranges): Same.
45438 (compare_range_with_value): Same.
45439 (bounds_of_var_in_loop): Same.
45440 (find_case_label_ranges): Same.
45441 (simplify_using_ranges::simplify_switch_using_ranges): Same.
45443 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45445 * value-range-pretty-print.cc (vrange_printer::visit): Remove
45447 * value-range.cc (irange::constant_p): Remove.
45448 (irange::get_nonzero_bits_from_range): Remove constant_p use.
45449 * value-range.h (class irange): Remove constant_p.
45450 (irange::num_pairs): Remove constant_p use.
45452 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45454 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
45456 (irange::set): Same.
45457 (irange::legacy_lower_bound): Same.
45458 (irange::legacy_upper_bound): Same.
45459 (irange::contains_p): Same.
45460 (range_tests_legacy): Same.
45461 (irange::normalize_addresses): Remove.
45462 (irange::normalize_symbolics): Remove.
45463 (irange::symbolic_p): Remove.
45464 * value-range.h (class irange): Remove symbolic_p,
45465 normalize_symbolics, and normalize_addresses.
45466 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
45467 Remove symbolics support.
45469 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45471 * value-range.cc (irange::may_contain_p): Remove.
45472 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
45473 usage with contains_p.
45474 * vr-values.cc (compare_range_with_value): Same.
45476 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45478 * tree-vrp.cc (supported_types_p): Remove.
45479 (defined_ranges_p): Remove.
45480 (range_fold_binary_expr): Remove.
45481 (range_fold_unary_expr): Remove.
45482 * tree-vrp.h (range_fold_unary_expr): Remove.
45483 (range_fold_binary_expr): Remove.
45485 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45487 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
45488 (ipa_value_range_from_jfunc): Same.
45489 (propagate_vr_across_jump_function): Same.
45490 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
45491 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
45492 * vr-values.cc (bounds_of_var_in_loop): Same.
45494 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45496 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
45497 Add irange argument.
45498 (check_out_of_bounds_and_warn): Remove check for vr.
45499 (array_bounds_checker::check_array_ref): Remove pointer qualifier
45500 for vr and adjust accordingly.
45501 * gimple-array-bounds.h (get_value_range): Add irange argument.
45502 * value-query.cc (class equiv_allocator): Delete.
45503 (range_query::get_value_range): Delete.
45504 (range_query::range_query): Remove allocator access.
45505 (range_query::~range_query): Same.
45506 * value-query.h (get_value_range): Delete.
45508 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
45509 call to get_value_range.
45510 (check_for_binary_op_overflow): Same.
45511 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
45512 (simplify_using_ranges::simplify_abs_using_ranges): Same.
45513 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
45514 (simplify_using_ranges::simplify_casted_cond): Same.
45515 (simplify_using_ranges::simplify_switch_using_ranges): Same.
45516 (simplify_using_ranges::two_valued_val_range_p): Same.
45518 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45521 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
45523 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
45524 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
45525 (simplify_using_ranges::legacy_fold_cond): ...this.
45526 (simplify_using_ranges::fold_cond): Rename
45527 vrp_evaluate_conditional_warnv_with_ops to
45528 legacy_fold_cond_overflow.
45529 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
45530 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
45531 legacy_fold_cond_overflow respectively.
45533 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
45535 * vr-values.cc (get_vr_for_comparison): Remove.
45536 (compare_name_with_value): Same.
45537 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
45538 compare_name_with_value.
45539 * vr-values.h: Remove compare_name_with_value.
45540 Remove get_vr_for_comparison.
45542 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
45544 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
45545 (bswapsi2): New define_insn.
45546 (swaphi): New define_insn to exchange two registers (swpw).
45547 (define_peephole2): Recognize exchange of registers as swaphi.
45549 2023-04-26 Richard Biener <rguenther@suse.de>
45551 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
45553 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
45554 * predict.cc (apply_return_prediction): Likewise.
45555 * sese.cc (set_ifsese_condition): Likewise. Simplify.
45556 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
45557 (make_edges_bb): Likewise.
45558 (make_cond_expr_edges): Likewise.
45559 (end_recording_case_labels): Likewise.
45560 (make_gimple_asm_edges): Likewise.
45561 (cleanup_dead_labels): Likewise.
45562 (group_case_labels): Likewise.
45563 (gimple_can_merge_blocks_p): Likewise.
45564 (gimple_merge_blocks): Likewise.
45565 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
45566 (gimple_duplicate_sese_tail): Avoid last_stmt.
45567 (find_loop_dist_alias): Likewise.
45568 (gimple_block_ends_with_condjump_p): Likewise.
45569 (gimple_purge_dead_eh_edges): Likewise.
45570 (gimple_purge_dead_abnormal_call_edges): Likewise.
45571 (pass_warn_function_return::execute): Likewise.
45572 (execute_fixup_cfg): Likewise.
45573 * tree-eh.cc (redirect_eh_edge_1): Likewise.
45574 (pass_lower_resx::execute): Likewise.
45575 (pass_lower_eh_dispatch::execute): Likewise.
45576 (cleanup_empty_eh): Likewise.
45577 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
45578 (predicate_bbs): Likewise.
45579 (ifcvt_split_critical_edges): Likewise.
45580 * tree-loop-distribution.cc (create_edge_for_control_dependence):
45582 (loop_distribution::transform_reduction_loop): Likewise.
45583 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
45584 (try_transform_to_exit_first_loop_alt): Likewise.
45585 (transform_to_exit_first_loop): Likewise.
45586 (create_parallel_loop): Likewise.
45587 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
45588 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
45589 (eliminate_unnecessary_stmts): Likewise.
45591 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
45593 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
45594 (pass_tree_ifcombine::execute): Likewise.
45595 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
45596 (should_duplicate_loop_header_p): Likewise.
45597 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
45598 (tree_estimate_loop_size): Likewise.
45599 (try_unroll_loop_completely): Likewise.
45600 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
45601 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
45602 (canonicalize_loop_ivs): Likewise.
45603 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
45604 (bound_difference): Likewise.
45605 (number_of_iterations_popcount): Likewise.
45606 (number_of_iterations_cltz): Likewise.
45607 (number_of_iterations_cltz_complement): Likewise.
45608 (simplify_using_initial_conditions): Likewise.
45609 (number_of_iterations_exit_assumptions): Likewise.
45610 (loop_niter_by_eval): Likewise.
45611 (estimate_numbers_of_iterations): Likewise.
45613 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45615 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
45617 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
45620 * config/rs6000/rs6000-builtins.def
45621 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
45622 __builtin_vsx_scalar_cmp_exp_qp_lt,
45623 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
45626 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
45629 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
45630 easy_vector_constant with const_vector_each_byte_same, add
45631 handlings in preparation for !easy_vector_constant, and update
45632 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
45633 * config/rs6000/predicates.md (const_vector_each_byte_same): New
45636 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45638 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
45639 (*pred_ltge<mode>_merge_tie_mask): Ditto.
45640 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
45641 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
45642 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
45643 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
45644 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
45646 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45648 * config/riscv/vector.md: Fix redundant vmv1r.v.
45650 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45652 * config/riscv/vector.md: Fix RA constraint.
45654 2023-04-26 Pan Li <pan2.li@intel.com>
45657 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
45658 check for vn_reference equal.
45660 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45662 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
45663 auto-vectorization preference.
45664 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
45665 auto-vectorization.
45666 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
45668 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
45670 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
45671 and bclridisi_nottwobits patterns.
45672 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
45673 predicate to avoid splitting arith constants.
45674 (const_nottwobits_not_arith_operand): New predicate.
45676 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
45678 * recog.cc (peep2_attempt, peep2_update_life): Correct
45679 head-comment description of parameter match_len.
45681 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
45683 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
45684 riscv_split_symbol() drop in_splitter arg.
45685 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
45686 riscv_split_symbol() drop in_splitter arg.
45687 riscv_force_temporary() drop in_splitter arg.
45688 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
45689 riscv_split_symbol() drop in_splitter arg.
45691 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
45693 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
45694 superfluous debug temporaries for single GIMPLE assignments.
45696 2023-04-25 Richard Biener <rguenther@suse.de>
45698 PR tree-optimization/109609
45699 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
45701 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
45702 the size given by arg_max_access_size_given_by_arg_p as
45703 maximum, not exact, size.
45705 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45708 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
45709 (orn<mode>3<vczle><vczbe>): ... This.
45710 (bic<mode>3): Rename to...
45711 (bic<mode>3<vczle><vczbe>): ... This.
45712 (<su><maxmin><mode>3): Rename to...
45713 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
45715 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45717 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
45718 * config/aarch64/iterators.md (VQDIV): New mode iterator.
45719 (vnx2di): New mode attribute.
45721 2023-04-25 Richard Biener <rguenther@suse.de>
45723 PR rtl-optimization/109585
45724 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
45726 2023-04-25 Jakub Jelinek <jakub@redhat.com>
45729 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
45730 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
45731 is larger than signed int maximum.
45733 2023-04-25 Martin Liska <mliska@suse.cz>
45735 * doc/gcov.texi: Document the new "calls" field and document
45736 the API bump. Mention also "block_ids" for lines.
45737 * gcov.cc (output_intermediate_json_line): Output info about
45738 calls and extend branches as well.
45739 (generate_results): Bump version to 2.
45740 (output_line_details): Use block ID instead of a non-sensual
45743 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
45745 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
45746 length attribute for the first (memory operand) alternative.
45748 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
45750 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
45751 * config/aarch64/constraints.md: Make "Umn" relaxed memory
45753 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
45755 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
45757 * value-range.cc (frange::set): Adjust constructor.
45758 * value-range.h (nan_state::nan_state): Replace default
45759 constructor with one taking an argument.
45761 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
45763 * ipa-cp.cc (ipa_range_contains_p): New.
45764 (decide_whether_version_node): Use it.
45766 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
45768 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
45769 simplify two successive VEC_PERM_EXPRs with same VLA mask,
45770 where mask chooses elements in reverse order.
45772 2023-04-24 Andrew Pinski <apinski@marvell.com>
45774 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
45775 and support diamond shaped basic block form.
45776 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
45778 2023-04-24 Andrew Pinski <apinski@marvell.com>
45780 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
45781 Instead of calling last_and_only_stmt, look for the last statement
45784 2023-04-24 Andrew Pinski <apinski@marvell.com>
45786 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
45788 (match_simplify_replacement): Call
45789 empty_bb_or_one_feeding_into_p instead of doing it inline.
45791 2023-04-24 Andrew Pinski <apinski@marvell.com>
45793 PR tree-optimization/68894
45794 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
45795 continue for the do_hoist_loads diamond case.
45797 2023-04-24 Andrew Pinski <apinski@marvell.com>
45799 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
45800 code for better code readability.
45802 2023-04-24 Andrew Pinski <apinski@marvell.com>
45804 PR tree-optimization/109604
45805 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
45806 diamond form check from ...
45807 (minmax_replacement): Here.
45809 2023-04-24 Patrick Palka <ppalka@redhat.com>
45811 * tree.cc (strip_array_types): Don't define here.
45812 (is_typedef_decl): Don't define here.
45813 (typedef_variant_p): Don't define here.
45814 * tree.h (strip_array_types): Define here.
45815 (is_typedef_decl): Define here.
45816 (typedef_variant_p): Define here.
45818 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
45820 * doc/generic.texi (OpenMP): Add != to allowed
45821 conditions and state that vars can be unsigned.
45822 * tree.def (OMP_FOR): Likewise.
45824 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45826 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
45828 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
45830 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
45831 Remove explicit Solaris 11 references.
45833 (Options specification, --with-gnu-as): as and gas always differ
45835 Remove /usr/ccs/bin reference.
45836 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
45837 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
45838 (*-*-solaris2*): ... here.
45839 Update bundled GCC versions.
45840 Don't refer to pre-built binaries.
45841 Remove /bin/sh warning.
45842 Update assembler, linker recommendations.
45843 Document GNAT bootstrap compiler.
45844 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
45845 (sparc64-*-solaris2*): Move content...
45846 (sparcv9-*-solaris2*): ...here.
45847 Add GDC for 64-bit bootstrap compilers.
45849 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45852 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
45854 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
45857 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45859 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
45860 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
45861 (aarch64_<su>abal2<mode>): New define_expand.
45862 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
45863 (aarch64_rtx_costs): Handle ABD rtxes.
45864 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
45865 * config/aarch64/iterators.md (ABAL2): Delete.
45866 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
45868 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45870 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
45871 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
45872 (<sur>sadv16qi): Rename to...
45873 (<su>sadv16qi): ... This. Adjust for the above.
45874 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
45875 (<su>sad<vsi2qi>): ... This. Adjust for the above.
45876 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
45877 * config/aarch64/iterators.md (ABAL): Delete.
45878 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
45880 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45882 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
45883 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
45884 (aarch64_<su>abdl2<mode>): New define_expand.
45885 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
45886 * config/aarch64/iterators.md (ABDL2): Delete.
45887 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
45889 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45891 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
45892 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
45894 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
45895 * config/aarch64/iterators.md (ABDL): Delete.
45896 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
45898 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45900 * config/aarch64/aarch64-simd.md
45901 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
45903 2023-04-24 Richard Biener <rguenther@suse.de>
45905 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
45907 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
45909 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
45910 (set_switch_stmt_execution_predicate): Likewise.
45911 (phi_result_unknown_predicate): Likewise.
45912 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
45913 (ipa_analyze_indirect_call_uses): Likewise.
45914 * predict.cc (predict_iv_comparison): Likewise.
45915 (predict_extra_loop_exits): Likewise.
45916 (predict_loops): Likewise.
45917 (tree_predict_by_opcode): Likewise.
45918 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
45920 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
45921 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
45922 (replace_phi_edge_with_variable): Likewise.
45923 (two_value_replacement): Likewise.
45924 (value_replacement): Likewise.
45925 (minmax_replacement): Likewise.
45926 (spaceship_replacement): Likewise.
45927 (cond_removal_in_builtin_zero_pattern): Likewise.
45928 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
45929 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
45930 (vn_phi_lookup): Likewise.
45931 (vn_phi_insert): Likewise.
45932 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
45933 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
45935 (back_threader_profitability::possibly_profitable_path_p):
45937 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
45939 * tree-switch-conversion.cc (pass_convert_switch::execute):
45941 (pass_lower_switch<O0>::execute): Likewise.
45942 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
45943 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
45944 * tree-vect-slp.cc (vect_slp_function): Likewise.
45945 * tree-vect-stmts.cc (cfun_returns): Likewise.
45946 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
45947 (vect_loop_dist_alias_call): Likewise.
45949 2023-04-24 Richard Biener <rguenther@suse.de>
45951 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
45953 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45955 * config/riscv/riscv-vsetvl.cc
45956 (vector_infos_manager::all_avail_in_compatible_p): New function.
45957 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
45958 * config/riscv/riscv-vsetvl.h: New function.
45960 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45962 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
45963 comment for cleanup_insns.
45965 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
45967 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
45968 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
45969 with the fault first load property.
45971 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45973 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
45974 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
45976 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
45979 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
45980 (aarch64_addp<mode><vczle><vczbe>): ... This.
45982 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45984 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
45985 provide reasonable values for common arithmetic operations and
45986 immediate operands (in several machine modes).
45988 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45990 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
45991 format specifier to output high_part register name of SImode reg.
45992 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
45993 (zero_extendqihi2): Fix lengths, consistent formatting and add
45994 "and Rx,#255" alternative, for documentation purposes.
45995 (zero_extendhisi2): New define_insn.
45997 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
45999 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
46000 SImode shifts by two by performing a single bit SImode shift twice.
46002 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
46004 PR tree-optimization/109593
46005 * value-range.cc (frange::operator==): Handle NANs.
46007 2023-04-23 liuhongt <hongtao.liu@intel.com>
46009 PR rtl-optimization/108707
46010 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
46011 GENERAL_REGS when preferred reg_class is not known.
46013 2023-04-22 Andrew Pinski <apinski@marvell.com>
46015 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
46016 Change the code around slightly to move diamond
46017 handling for do_store_elim/do_hoist_loads out of
46020 2023-04-22 Andrew Pinski <apinski@marvell.com>
46022 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
46023 Remove check on empty_block_p.
46025 2023-04-22 Jakub Jelinek <jakub@redhat.com>
46027 PR bootstrap/109589
46028 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
46029 * realmpfr.h (class auto_mpfr): Likewise.
46031 2023-04-22 Jakub Jelinek <jakub@redhat.com>
46033 PR tree-optimization/109583
46034 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
46035 if vec_mode is not VECTOR_MODE_P.
46037 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
46038 Ondrej Kubanek <kubanek0ondrej@gmail.com>
46040 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
46041 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
46042 loop profile and bounds after header duplication.
46043 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
46044 Break out from try_peel_loop; fix handling of 0 iterations.
46045 (try_peel_loop): Use adjust_loop_info_after_peeling.
46047 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
46049 PR tree-optimization/109546
46050 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
46051 not fold conditions with ADDR_EXPR early.
46053 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46055 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
46056 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
46058 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
46059 (*aarch64_<optab><mode>3_zero): Define.
46060 (*aarch64_<optab><mode>3_cssc): Likewise.
46061 * config/aarch64/iterators.md (maxminand): New code attribute.
46063 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46066 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
46067 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
46069 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
46070 (aarch64_override_options_internal): Handle the above.
46071 (aarch64_output_load_tp): New function.
46072 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
46073 aarch64_output_load_tp.
46074 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
46075 (mtp=): New option.
46076 * doc/invoke.texi (AArch64 Options): Document -mtp=.
46078 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46081 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
46082 (add_vec_concat_subst_be): Likewise.
46085 (add<mode>3): Rename to...
46086 (add<mode>3<vczle><vczbe>): ... This.
46087 (sub<mode>3): Rename to...
46088 (sub<mode>3<vczle><vczbe>): ... This.
46089 (mul<mode>3): Rename to...
46090 (mul<mode>3<vczle><vczbe>): ... This.
46091 (and<mode>3): Rename to...
46092 (and<mode>3<vczle><vczbe>): ... This.
46093 (ior<mode>3): Rename to...
46094 (ior<mode>3<vczle><vczbe>): ... This.
46095 (xor<mode>3): Rename to...
46096 (xor<mode>3<vczle><vczbe>): ... This.
46097 * config/aarch64/iterators.md (VDZ): Define.
46099 2023-04-21 Patrick Palka <ppalka@redhat.com>
46101 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
46104 2023-04-21 Jan Hubicka <jh@suse.cz>
46106 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
46109 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
46111 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
46112 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
46114 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46116 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
46117 force_reg instead of copy_to_mode_reg.
46118 (aarch64_expand_vector_init): Likewise.
46120 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
46122 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
46123 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
46124 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
46125 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
46126 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
46127 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
46128 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
46129 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
46130 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
46131 * config/i386/predicates.md (index_register_operand):
46132 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
46133 * config/i386/i386.cc (ix86_legitimate_address_p): Use
46134 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
46135 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
46137 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
46138 Ondrej Kubanek <kubanek0ondrej@gmail.com>
46140 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
46143 2023-04-21 Richard Biener <rguenther@suse.de>
46145 * is-a.h (safe_is_a): New.
46147 2023-04-21 Richard Biener <rguenther@suse.de>
46149 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
46150 (gphi_iterator::operator*): Likewise.
46152 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
46153 Michal Jires <michal@jires.eu>
46155 * ipa-inline.cc (class inline_badness): New class.
46156 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
46158 (update_edge_key): Update.
46159 (lookup_recursive_calls): Likewise.
46160 (recursive_inlining): Likewise.
46161 (add_new_edges_to_heap): Likewise.
46162 (inline_small_functions): Likewise.
46164 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
46166 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
46168 2023-04-21 Richard Biener <rguenther@suse.de>
46170 PR tree-optimization/109573
46171 * tree-vect-loop.cc (vectorizable_live_operation): Allow
46172 unhandled SSA copy as well. Demote assert to checking only.
46174 2023-04-21 Richard Biener <rguenther@suse.de>
46176 * df-core.cc (df_analyze): Compute RPO on the reverse graph
46177 for DF_BACKWARD problems.
46178 (loop_post_order_compute): Rename to ...
46179 (loop_rev_post_order_compute): ... this, compute a RPO.
46180 (loop_inverted_post_order_compute): Rename to ...
46181 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
46182 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
46183 problems, RPO on the inverted graph for DF_BACKWARD.
46185 2023-04-21 Richard Biener <rguenther@suse.de>
46187 * cfganal.h (inverted_rev_post_order_compute): Rename
46189 (inverted_post_order_compute): ... this. Add struct function
46190 argument, change allocation to a C array.
46191 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
46192 * lcm.cc (compute_antinout_edge): Adjust.
46193 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
46194 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
46195 * tree-ssa-pre.cc (compute_antic): Likewise.
46197 2023-04-21 Richard Biener <rguenther@suse.de>
46199 * df.h (df_d::postorder_inverted): Change back to int *,
46201 * df-core.cc (rest_of_handle_df_finish): Adjust.
46202 (df_analyze_1): Likewise.
46203 (df_analyze): For DF_FORWARD problems use RPO on the forward
46205 (loop_inverted_post_order_compute): Adjust API.
46206 (df_analyze_loop): Adjust.
46207 (df_get_n_blocks): Likewise.
46208 (df_get_postorder): Likewise.
46210 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46213 * config/riscv/riscv-vsetvl.cc
46214 (vector_infos_manager::all_empty_predecessor_p): New function.
46215 (pass_vsetvl::backward_demand_fusion): Ditto.
46216 * config/riscv/riscv-vsetvl.h: Ditto.
46218 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
46221 * config/riscv/generic.md: Change standard names to insn names.
46223 2023-04-21 Richard Biener <rguenther@suse.de>
46225 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
46226 (compute_laterin): Use RPO.
46227 (compute_available): Likewise.
46229 2023-04-21 Peng Fan <fanpeng@loongson.cn>
46231 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
46233 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46236 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
46237 (vector_insn_info::skip_avl_compatible_p): Ditto.
46238 (vector_insn_info::merge): Remove default value.
46239 (pass_vsetvl::compute_local_backward_infos): Ditto.
46240 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
46241 * config/riscv/riscv-vsetvl.h: Ditto.
46243 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
46245 * doc/extend.texi (Common Function Attributes): Remove duplicate
46248 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
46250 PR tree-optimization/109564
46251 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
46252 UNDEFINED range names when deciding if all PHI arguments are the same,
46254 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46256 PR tree-optimization/109011
46257 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
46258 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
46259 .CTZ (X) = PREC - .POPCOUNT (X | -X).
46261 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
46263 * lra-constraints.cc (match_reload): Exclude some hard regs for
46264 multi-reg inout reload pseudos used in asm in different mode.
46266 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
46268 * config/arm/arm.cc (thumb1_legitimate_address_p):
46269 Use VIRTUAL_REGISTER_P predicate.
46270 (arm_eliminable_register): Ditto.
46271 * config/avr/avr.md (push<mode>_1): Ditto.
46272 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
46273 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
46274 * config/i386/predicates.md (register_no_elim_operand): Ditto.
46275 * config/iq2000/predicates.md (call_insn_operand): Ditto.
46276 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
46278 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
46281 * config/i386/predicates.md (extract_operator): New predicate.
46282 * config/i386/i386.md (any_extract): Remove code iterator.
46283 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
46284 (*cmpqi_ext<mode>_1): Ditto.
46285 (*cmpqi_ext<mode>_2): Ditto.
46286 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
46287 (*cmpqi_ext<mode>_3): Ditto.
46288 (*cmpqi_ext<mode>_4): Ditto.
46289 (*extzvqi_mem_rex64): Ditto.
46291 (*insvqi_2): Ditto.
46292 (*extendqi<SWI24:mode>_ext_1): Ditto.
46293 (*addqi_ext<mode>_0): Ditto.
46294 (*addqi_ext<mode>_1): Ditto.
46295 (*addqi_ext<mode>_2): Ditto.
46296 (*subqi_ext<mode>_0): Ditto.
46297 (*subqi_ext<mode>_2): Ditto.
46298 (*testqi_ext<mode>_1): Ditto.
46299 (*testqi_ext<mode>_2): Ditto.
46300 (*andqi_ext<mode>_0): Ditto.
46301 (*andqi_ext<mode>_1): Ditto.
46302 (*andqi_ext<mode>_1_cc): Ditto.
46303 (*andqi_ext<mode>_2): Ditto.
46304 (*<any_or:code>qi_ext<mode>_0): Ditto.
46305 (*<any_or:code>qi_ext<mode>_1): Ditto.
46306 (*<any_or:code>qi_ext<mode>_2): Ditto.
46307 (*xorqi_ext<mode>_1_cc): Ditto.
46308 (*negqi_ext<mode>_2): Ditto.
46309 (*ashlqi_ext<mode>_2): Ditto.
46310 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
46312 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
46315 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
46316 <bitmanip_insn> as the type to allow for fine grained control of
46317 scheduling these insns.
46318 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
46320 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
46321 pcnt, signed and unsigned min/max.
46323 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46324 kito-cheng <kito.cheng@sifive.com>
46326 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
46328 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46329 kito-cheng <kito.cheng@sifive.com>
46332 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
46333 (pass_vsetvl::cleanup_insns): Fix bug.
46335 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
46337 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
46338 (ldexp<mode>3): Delete.
46339 (ldexp<mode>3<exec>): Change "B" to "A".
46341 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46342 Jonathan Wakely <jwakely@redhat.com>
46344 * tree.h (built_in_function_equal_p): New helper function.
46345 (fndecl_built_in_p): Turn into variadic template to support
46346 1 or more built_in_function arguments.
46347 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
46348 * gimplify.cc (goa_stabilize_expr): Likewise.
46349 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
46350 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
46351 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
46352 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
46353 cgraph_update_edges_for_call_stmt_node,
46354 cgraph_edge::verify_corresponds_to_fndecl,
46355 cgraph_node::verify_node): Likewise.
46356 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
46357 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
46358 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
46360 2023-04-20 Jakub Jelinek <jakub@redhat.com>
46362 PR tree-optimization/109011
46363 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
46364 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
46365 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
46366 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
46367 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
46369 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
46371 2023-04-20 Richard Biener <rguenther@suse.de>
46373 * df-core.cc (rest_of_handle_df_initialize): Remove
46374 computation of df->postorder, df->postorder_inverted and
46377 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46379 * common/config/i386/i386-common.cc
46380 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
46381 (ix86_handle_option): Set AVX flag for VAES.
46382 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
46383 Add OPTION_MASK_ISA2_VAES_UNSET.
46384 (def_builtin): Share builtin between AES and VAES.
46385 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
46387 * config/i386/i386.md (aes): New isa attribute.
46388 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
46389 (aesenclast): Ditto.
46391 (aesdeclast): Ditto.
46392 * config/i386/vaesintrin.h: Remove redundant avx target push.
46393 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
46394 (_mm_aesdeclast_si128): Ditto.
46395 (_mm_aesenc_si128): Ditto.
46396 (_mm_aesenclast_si128): Ditto.
46398 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
46400 * config/i386/avx2intrin.h
46401 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
46402 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
46403 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
46404 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
46405 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
46406 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
46407 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
46408 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
46409 (_mm_reduce_add_epi16): New instrinsics.
46410 (_mm_reduce_mul_epi16): Ditto.
46411 (_mm_reduce_and_epi16): Ditto.
46412 (_mm_reduce_or_epi16): Ditto.
46413 (_mm_reduce_max_epi16): Ditto.
46414 (_mm_reduce_max_epu16): Ditto.
46415 (_mm_reduce_min_epi16): Ditto.
46416 (_mm_reduce_min_epu16): Ditto.
46417 (_mm256_reduce_add_epi16): Ditto.
46418 (_mm256_reduce_mul_epi16): Ditto.
46419 (_mm256_reduce_and_epi16): Ditto.
46420 (_mm256_reduce_or_epi16): Ditto.
46421 (_mm256_reduce_max_epi16): Ditto.
46422 (_mm256_reduce_max_epu16): Ditto.
46423 (_mm256_reduce_min_epi16): Ditto.
46424 (_mm256_reduce_min_epu16): Ditto.
46425 (_mm_reduce_add_epi8): Ditto.
46426 (_mm_reduce_mul_epi8): Ditto.
46427 (_mm_reduce_and_epi8): Ditto.
46428 (_mm_reduce_or_epi8): Ditto.
46429 (_mm_reduce_max_epi8): Ditto.
46430 (_mm_reduce_max_epu8): Ditto.
46431 (_mm_reduce_min_epi8): Ditto.
46432 (_mm_reduce_min_epu8): Ditto.
46433 (_mm256_reduce_add_epi8): Ditto.
46434 (_mm256_reduce_mul_epi8): Ditto.
46435 (_mm256_reduce_and_epi8): Ditto.
46436 (_mm256_reduce_or_epi8): Ditto.
46437 (_mm256_reduce_max_epi8): Ditto.
46438 (_mm256_reduce_max_epu8): Ditto.
46439 (_mm256_reduce_min_epi8): Ditto.
46440 (_mm256_reduce_min_epu8): Ditto.
46441 * config/i386/avx512vlbwintrin.h:
46442 (_mm_mask_reduce_add_epi16): Ditto.
46443 (_mm_mask_reduce_mul_epi16): Ditto.
46444 (_mm_mask_reduce_and_epi16): Ditto.
46445 (_mm_mask_reduce_or_epi16): Ditto.
46446 (_mm_mask_reduce_max_epi16): Ditto.
46447 (_mm_mask_reduce_max_epu16): Ditto.
46448 (_mm_mask_reduce_min_epi16): Ditto.
46449 (_mm_mask_reduce_min_epu16): Ditto.
46450 (_mm256_mask_reduce_add_epi16): Ditto.
46451 (_mm256_mask_reduce_mul_epi16): Ditto.
46452 (_mm256_mask_reduce_and_epi16): Ditto.
46453 (_mm256_mask_reduce_or_epi16): Ditto.
46454 (_mm256_mask_reduce_max_epi16): Ditto.
46455 (_mm256_mask_reduce_max_epu16): Ditto.
46456 (_mm256_mask_reduce_min_epi16): Ditto.
46457 (_mm256_mask_reduce_min_epu16): Ditto.
46458 (_mm_mask_reduce_add_epi8): Ditto.
46459 (_mm_mask_reduce_mul_epi8): Ditto.
46460 (_mm_mask_reduce_and_epi8): Ditto.
46461 (_mm_mask_reduce_or_epi8): Ditto.
46462 (_mm_mask_reduce_max_epi8): Ditto.
46463 (_mm_mask_reduce_max_epu8): Ditto.
46464 (_mm_mask_reduce_min_epi8): Ditto.
46465 (_mm_mask_reduce_min_epu8): Ditto.
46466 (_mm256_mask_reduce_add_epi8): Ditto.
46467 (_mm256_mask_reduce_mul_epi8): Ditto.
46468 (_mm256_mask_reduce_and_epi8): Ditto.
46469 (_mm256_mask_reduce_or_epi8): Ditto.
46470 (_mm256_mask_reduce_max_epi8): Ditto.
46471 (_mm256_mask_reduce_max_epu8): Ditto.
46472 (_mm256_mask_reduce_min_epi8): Ditto.
46473 (_mm256_mask_reduce_min_epu8): Ditto.
46475 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46477 * common/config/i386/i386-common.cc
46478 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
46479 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
46480 (OPTION_MASK_ISA_AVX_UNSET):
46481 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
46482 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
46483 * config/i386/i386.md (vpclmulqdqvl): New.
46484 * config/i386/sse.md (pclmulqdq): Add evex encoding.
46485 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
46488 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46490 * config/i386/avx512vlbwintrin.h
46491 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
46492 (_mm_mask_blend_epi8): Ditto.
46493 (_mm256_mask_blend_epi16): Ditto.
46494 (_mm256_mask_blend_epi8): Ditto.
46495 * config/i386/avx512vlintrin.h
46496 (_mm256_mask_blend_pd): Ditto.
46497 (_mm256_mask_blend_ps): Ditto.
46498 (_mm256_mask_blend_epi64): Ditto.
46499 (_mm256_mask_blend_epi32): Ditto.
46500 (_mm_mask_blend_pd): Ditto.
46501 (_mm_mask_blend_ps): Ditto.
46502 (_mm_mask_blend_epi64): Ditto.
46503 (_mm_mask_blend_epi32): Ditto.
46504 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
46505 (VF_AVX512HFBFVL): Move it before the first usage.
46506 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
46507 to VF_AVX512HFBFVL.
46509 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46511 * common/config/i386/i386-common.cc
46512 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
46513 to OPTION_MASK_ISA_AVX512BW_SET.
46514 (OPTION_MASK_ISA_AVX512F_UNSET):
46515 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
46516 (OPTION_MASK_ISA_AVX512BW_UNSET):
46517 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
46518 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
46519 * config/i386/avx512vbmi2vlintrin.h: Ditto.
46520 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
46521 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
46522 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
46523 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
46525 (compressstore<mode>_mask): Ditto.
46526 (expand<mode>_mask): Ditto.
46527 (expand<mode>_maskz): Ditto.
46528 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
46529 VI12_VI48F_AVX512VL.
46531 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46533 * common/config/i386/i386-common.cc
46534 (OPTION_MASK_ISA_AVX512BITALG_SET):
46535 Change OPTION_MASK_ISA_AVX512F_SET
46536 to OPTION_MASK_ISA_AVX512BW_SET.
46537 (OPTION_MASK_ISA_AVX512F_UNSET):
46538 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
46539 (OPTION_MASK_ISA_AVX512BW_UNSET):
46540 Add OPTION_MASK_ISA_AVX512BITALG_SET.
46541 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
46542 * config/i386/i386-builtin.def:
46543 Remove redundant OPTION_MASK_ISA_AVX512BW.
46544 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
46545 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
46546 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
46548 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
46550 * config/i386/i386-expand.cc
46551 (ix86_check_builtin_isa_match): Correct wrong comments.
46552 Add a new macro SHARE_BUILTIN and refactor the current if
46555 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
46557 * config/i386/cpuid.h: Open a new section for Extended Features
46558 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
46561 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
46563 * config/i386/sse.md: Modify insn vperm{i,f}
46566 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
46568 * config/xtensa/xtensa-opts.h: New header.
46569 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
46570 xtensa_strict_align.
46571 * config/xtensa/xtensa.cc (xtensa_option_override): When
46572 -m[no-]strict-align is not specified in the command line set
46573 xtensa_strict_align to 0 if the hardware supports both unaligned
46574 loads and stores or to 1 otherwise.
46575 * config/xtensa/xtensa.opt (mstrict-align): New option.
46576 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
46578 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
46580 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
46583 2023-04-19 Andrew Pinski <apinski@marvell.com>
46585 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
46587 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
46589 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
46590 (VECTOR_BOOL_MODE): Ditto.
46591 (ADJUST_NUNITS): Ditto.
46592 (ADJUST_ALIGNMENT): Ditto.
46593 (ADJUST_BYTESIZE): Ditto.
46594 (ADJUST_PRECISION): Ditto.
46595 (RVV_MODES): Ditto.
46596 (VECTOR_MODE_WITH_PREFIX): Ditto.
46597 * config/riscv/riscv-v.cc (ENTRY): Ditto.
46598 (get_vlmul): Ditto.
46599 (get_ratio): Ditto.
46600 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
46601 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
46602 (vbool64_t): Ditto.
46603 (vbool32_t): Ditto.
46604 (vbool16_t): Ditto.
46609 (vint8mf8_t): Ditto.
46610 (vuint8mf8_t): Ditto.
46611 (vint8mf4_t): Ditto.
46612 (vuint8mf4_t): Ditto.
46613 (vint8mf2_t): Ditto.
46614 (vuint8mf2_t): Ditto.
46615 (vint8m1_t): Ditto.
46616 (vuint8m1_t): Ditto.
46617 (vint8m2_t): Ditto.
46618 (vuint8m2_t): Ditto.
46619 (vint8m4_t): Ditto.
46620 (vuint8m4_t): Ditto.
46621 (vint8m8_t): Ditto.
46622 (vuint8m8_t): Ditto.
46623 (vint16mf4_t): Ditto.
46624 (vuint16mf4_t): Ditto.
46625 (vint16mf2_t): Ditto.
46626 (vuint16mf2_t): Ditto.
46627 (vint16m1_t): Ditto.
46628 (vuint16m1_t): Ditto.
46629 (vint16m2_t): Ditto.
46630 (vuint16m2_t): Ditto.
46631 (vint16m4_t): Ditto.
46632 (vuint16m4_t): Ditto.
46633 (vint16m8_t): Ditto.
46634 (vuint16m8_t): Ditto.
46635 (vint32mf2_t): Ditto.
46636 (vuint32mf2_t): Ditto.
46637 (vint32m1_t): Ditto.
46638 (vuint32m1_t): Ditto.
46639 (vint32m2_t): Ditto.
46640 (vuint32m2_t): Ditto.
46641 (vint32m4_t): Ditto.
46642 (vuint32m4_t): Ditto.
46643 (vint32m8_t): Ditto.
46644 (vuint32m8_t): Ditto.
46645 (vint64m1_t): Ditto.
46646 (vuint64m1_t): Ditto.
46647 (vint64m2_t): Ditto.
46648 (vuint64m2_t): Ditto.
46649 (vint64m4_t): Ditto.
46650 (vuint64m4_t): Ditto.
46651 (vint64m8_t): Ditto.
46652 (vuint64m8_t): Ditto.
46653 (vfloat32mf2_t): Ditto.
46654 (vfloat32m1_t): Ditto.
46655 (vfloat32m2_t): Ditto.
46656 (vfloat32m4_t): Ditto.
46657 (vfloat32m8_t): Ditto.
46658 (vfloat64m1_t): Ditto.
46659 (vfloat64m2_t): Ditto.
46660 (vfloat64m4_t): Ditto.
46661 (vfloat64m8_t): Ditto.
46662 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
46663 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
46664 (riscv_convert_vector_bits): Ditto.
46665 * config/riscv/riscv.md:
46666 * config/riscv/vector-iterators.md:
46667 * config/riscv/vector.md
46668 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46669 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
46670 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46671 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
46672 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
46673 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
46674 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
46675 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
46676 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
46678 2023-04-19 Pan Li <pan2.li@intel.com>
46680 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
46681 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
46683 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
46687 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
46688 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
46689 for operand 0. Use any_extract code iterator.
46690 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
46691 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
46692 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
46693 (*cmpqi_ext<mode>_1): Use general_operand predicate
46694 for operand 1. Use any_extract code iterator.
46695 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
46696 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
46698 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46700 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
46701 (aarch64_uaddw2<mode>): Delete.
46702 (aarch64_ssubw2<mode>): Delete.
46703 (aarch64_usubw2<mode>): Delete.
46704 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
46706 2023-04-19 Richard Biener <rguenther@suse.de>
46708 * tree-ssa-structalias.cc (do_ds_constraint): Use
46709 solve_add_graph_edge.
46711 2023-04-19 Richard Biener <rguenther@suse.de>
46713 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
46715 (do_sd_constraint): ... here.
46717 2023-04-19 Richard Biener <rguenther@suse.de>
46719 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
46720 rejecting the merge when A contains only a non-local label.
46722 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
46724 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
46725 (VIRTUAL_REGISTER_NUM_P): Ditto.
46726 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
46727 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
46728 * function.cc (instantiate_decl_rtl): Ditto.
46729 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
46730 (nonzero_address_p): Ditto.
46731 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
46733 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
46735 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
46737 2023-04-19 Richard Biener <rguenther@suse.de>
46739 * system.h (auto_mpz::operator->()): New.
46740 * realmpfr.h (auto_mpfr::operator->()): New.
46741 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
46742 * real.cc (real_from_string): Likewise.
46743 (dconst_e_ptr): Likewise.
46744 (dconst_sqrt2_ptr): Likewise.
46745 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
46747 (bound_difference_of_offsetted_base): Likewise.
46748 (number_of_iterations_ne): Likewise.
46749 (number_of_iterations_lt_to_ne): Likewise.
46750 * ubsan.cc: Include realmpfr.h.
46751 (ubsan_instrument_float_cast): Use auto_mpfr.
46753 2023-04-19 Richard Biener <rguenther@suse.de>
46755 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
46756 edges, remove edges from escaped after special-casing them.
46758 2023-04-19 Richard Biener <rguenther@suse.de>
46760 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
46763 2023-04-19 Richard Biener <rguenther@suse.de>
46765 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
46766 to the LHS varinfo solution member.
46768 2023-04-19 Richard Biener <rguenther@suse.de>
46770 * tree-ssa-structalias.cc (topo_visit): Look at the real
46771 destination of edges.
46773 2023-04-19 Richard Biener <rguenther@suse.de>
46775 PR tree-optimization/44794
46776 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
46777 If an epilogue loop is required set its iteration upper bound.
46779 2023-04-19 Xi Ruoyao <xry111@xry111.site>
46782 * config/loongarch/loongarch-protos.h
46783 (loongarch_expand_block_move): Add a parameter as alignment RTX.
46784 * config/loongarch/loongarch.h:
46785 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
46786 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
46787 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
46788 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
46789 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
46790 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
46791 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
46792 Take the alignment from the parameter, but set it to
46793 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
46794 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
46795 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
46796 (loongarch_block_move_straight): When there are left-over bytes,
46797 half the mode size instead of falling back to byte mode at once.
46798 (loongarch_block_move_loop): Limit the length of loop body with
46799 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
46800 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
46801 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
46802 to loongarch_expand_block_move.
46804 2023-04-19 Xi Ruoyao <xry111@xry111.site>
46806 * config/loongarch/loongarch.cc
46807 (loongarch_setup_incoming_varargs): Don't save more GARs than
46808 cfun->va_list_gpr_size / UNITS_PER_WORD.
46810 2023-04-19 Richard Biener <rguenther@suse.de>
46812 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
46813 no epilogue condition.
46815 2023-04-19 Richard Biener <rguenther@suse.de>
46817 * gimple.h (gimple_assign_load): Outline...
46818 * gimple.cc (gimple_assign_load): ... here. Avoid
46819 get_base_address and instead just strip the outermost
46820 handled component, treating a remaining handled component
46823 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46825 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
46827 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
46829 2023-04-19 Jakub Jelinek <jakub@redhat.com>
46831 PR tree-optimization/109011
46832 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
46833 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
46834 CLZ, CTZ and FFS. Remove vargs variable, use
46835 gimple_build_call_internal rather than gimple_build_call_internal_vec.
46836 (vect_vect_recog_func_ptrs): Adjust popcount entry.
46838 2023-04-19 Jakub Jelinek <jakub@redhat.com>
46841 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
46842 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
46843 a new REG rather than the SUBREG.
46845 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46847 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
46850 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46853 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
46854 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
46856 2023-04-19 Richard Biener <rguenther@suse.de>
46858 PR rtl-optimization/109237
46859 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
46860 TREE_VISITED on INSN_VAR_LOCATION_DECL.
46861 (delete_trivially_dead_insns): Maintain TREE_VISITED on
46862 active debug bind INSN_VAR_LOCATION_DECL.
46864 2023-04-19 Richard Biener <rguenther@suse.de>
46866 PR rtl-optimization/109237
46867 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
46869 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
46871 * doc/install.texi (enable-decimal-float): Add AArch64.
46873 2023-04-19 liuhongt <hongtao.liu@intel.com>
46875 PR rtl-optimization/109351
46876 * ira.cc (setup_class_subset_and_memory_move_costs): Check
46877 hard_regno_mode_ok before setting lowest memory move cost for
46878 the mode with different reg classes.
46880 2023-04-18 Jason Merrill <jason@redhat.com>
46882 * doc/invoke.texi: Remove stray @gol.
46884 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46886 * ifcvt.cc (cond_move_process_if_block): Consider the result of
46887 targetm.noce_conversion_profitable_p() when replacing the original
46888 sequence with the converted one.
46890 2023-04-18 Mark Harmstone <mark@harmstone.com>
46892 * common.opt (gcodeview): Add new option.
46893 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
46894 * opts.cc (command_handle_option): Similarly.
46895 * doc/invoke.texi: Add documentation for -gcodeview.
46897 2023-04-18 Andrew Pinski <apinski@marvell.com>
46899 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
46900 (make_pass_phiopt): Make execute out of line.
46901 (tree_ssa_cs_elim): Move code into ...
46902 (pass_cselim::execute): here.
46904 2023-04-18 Sam James <sam@gentoo.org>
46906 * system.h: Drop unused INCLUDE_PTHREAD_H.
46908 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
46910 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
46913 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
46915 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
46916 (bswapdi2, bswapsi2): Similarly.
46918 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
46921 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
46922 Use CODE_FOR_sse4_1_insertps_v4sf.
46923 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
46924 (expand_vec_perm_1): Call expand_vec_per_insertps.
46925 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
46926 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
46927 (@sse4_1_insertps_<mode>): New insn pattern.
46928 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
46929 pattern from sse4_1_insertps using VI4F_128 mode iterator.
46931 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
46933 * value-range.cc (gt_ggc_mx): New.
46935 * value-range.h (class vrange): Add GTY marker.
46936 (class frange): Same.
46937 (gt_ggc_mx): Remove.
46938 (gt_pch_nx): Remove.
46940 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
46942 * lra-constraints.cc (constraint_unique): New.
46943 (process_address_1): Apply constraint_unique test.
46944 * recog.cc (constrain_operands): Allow relaxed memory
46947 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
46949 * doc/extend.texi (Target Builtins): Add RISC-V Vector
46951 (RISC-V Vector Intrinsics): Document GCC implemented which
46952 version of RISC-V vector intrinsics and its reference.
46954 2023-04-18 Richard Biener <rguenther@suse.de>
46956 PR middle-end/108786
46957 * bitmap.h (bitmap_clear_first_set_bit): New.
46958 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
46959 bitmap_first_set_bit and add optional clearing of the bit.
46960 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
46961 (bitmap_clear_first_set_bit): Likewise.
46962 * df-core.cc (df_worklist_dataflow_doublequeue): Use
46963 bitmap_clear_first_set_bit.
46964 * graphite-scop-detection.cc (scop_detection::merge_sese):
46966 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
46967 (sanitize_asan_mark_poison): Likewise.
46968 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
46969 * tree-into-ssa.cc (rewrite_blocks): Likewise.
46970 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
46971 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
46973 2023-04-18 Richard Biener <rguenther@suse.de>
46975 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
46976 (dump_sa_points_to_info): ... this function.
46977 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
46978 and call dump_sa_stats guarded with TDF_STATS.
46979 (ipa_pta_execute): Likewise.
46980 (compute_may_aliases): Guard dump_alias_info with
46981 TDF_DETAILS|TDF_ALIAS.
46983 2023-04-18 Andrew Pinski <apinski@marvell.com>
46985 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
46986 the expression that is being tried when TDF_FOLDING
46988 (phiopt_worker::match_simplify_replacement): Dump
46989 the sequence which was created by gimple_simplify_phiopt
46990 when TDF_FOLDING is true.
46992 2023-04-18 Andrew Pinski <apinski@marvell.com>
46994 * tree-ssa-phiopt.cc (match_simplify_replacement):
46995 Simplify code that does the movement slightly.
46997 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46999 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
47001 (rev16<mode>2): Rename to...
47002 (aarch64_rev16<mode>2_alt1): ... This.
47003 (rev16<mode>2_alt): Rename to...
47004 (*aarch64_rev16<mode>2_alt2): ... This.
47006 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47008 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
47009 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
47011 * range-op-float.cc (zero_range): Use dconstm0.
47012 (zero_to_inf_range): Same.
47013 * real.h (dconstm0): New.
47014 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
47015 (frange::set_zero): Do not declare dconstm0.
47017 2023-04-18 Richard Biener <rguenther@suse.de>
47019 * system.h (class auto_mpz): New,
47020 * realmpfr.h (class auto_mpfr): Likewise.
47021 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
47022 (do_mpfr_arg2): Likewise.
47023 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
47025 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47027 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
47028 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
47030 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47032 * value-range.cc (frange::operator==): Adjust for NAN.
47033 (range_tests_nan): Remove some NAN tests.
47035 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47037 * inchash.cc (hash::add_real_value): New.
47038 * inchash.h (class hash): Add add_real_value.
47039 * value-range.cc (add_vrange): New.
47040 * value-range.h (inchash::add_vrange): New.
47042 2023-04-18 Richard Biener <rguenther@suse.de>
47044 PR tree-optimization/109539
47045 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
47046 Re-implement pointer relatedness for PHIs.
47048 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
47050 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
47051 (SV_FP): New iterator.
47052 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
47053 (recip<mode>2): Unify the two patterns using SV_FP.
47054 (div_scale<mode><exec_vcc>): New insn.
47055 (div_fmas<mode><exec>): New insn.
47056 (div_fixup<mode><exec>): New insn.
47057 (div<mode>3): Unify the two expanders and rewrite using hardfp.
47058 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
47059 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
47060 and UNSPEC_DIV_FIXUP.
47061 (vccwait): New attribute.
47063 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47065 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
47066 if the argument matches that.
47068 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
47070 * config/aarch64/atomics.md
47071 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
47072 Use SD_HSDI for destination mode iterator.
47074 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
47076 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
47077 of z-extensions and s-extensions.
47078 (riscv_subset_list::parse): Likewise.
47080 2023-04-18 Jakub Jelinek <jakub@redhat.com>
47082 PR tree-optimization/109240
47083 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
47084 first vec_perm operand and minus as second using fneg/fadd and
47085 minus as first vec_perm operand and plus as second using fneg/fsub.
47087 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47089 * data-streamer.cc (bp_pack_real_value): New.
47090 (bp_unpack_real_value): New.
47091 * data-streamer.h (bp_pack_real_value): New.
47092 (bp_unpack_real_value): New.
47093 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
47094 bp_unpack_real_value.
47095 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
47096 bp_pack_real_value.
47098 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47100 * wide-int.h (WIDE_INT_MAX_HWIS): New.
47101 (class fixed_wide_int_storage): Use it.
47102 (trailing_wide_ints <N>::set_precision): Use it.
47103 (trailing_wide_ints <N>::extra_size): Use it.
47105 2023-04-18 Xi Ruoyao <xry111@xry111.site>
47107 * config/loongarch/loongarch-protos.h
47108 (loongarch_addu16i_imm12_operand_p): New function prototype.
47109 (loongarch_split_plus_constant): Likewise.
47110 * config/loongarch/loongarch.cc
47111 (loongarch_addu16i_imm12_operand_p): New function.
47112 (loongarch_split_plus_constant): Likewise.
47113 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
47114 (DUAL_IMM12_OPERAND): Likewise.
47115 (DUAL_ADDU16I_OPERAND): Likewise.
47116 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
47118 * config/loongarch/predicates.md (const_dual_imm12_operand): New
47120 (const_addu16i_operand): Likewise.
47121 (const_addu16i_imm12_di_operand): Likewise.
47122 (const_addu16i_imm12_si_operand): Likewise.
47123 (plus_di_operand): Likewise.
47124 (plus_si_operand): Likewise.
47125 (plus_si_extend_operand): Likewise.
47126 * config/loongarch/loongarch.md (add<mode>3): Convert to
47127 define_insn_and_split. Use plus_<mode>_operand predicate
47128 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
47129 and Le constraints.
47130 (*addsi3_extended): Convert to define_insn_and_split. Use
47131 plus_si_extend_operand instead of arith_operand. Add
47132 alternatives for La and Le alternatives.
47134 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47136 * value-range.h (Value_Range::Value_Range): New.
47137 (Value_Range::contains_p): New.
47139 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
47141 * value-range.h (class vrange): Make m_discriminator const.
47142 (class irange): Make m_max_ranges const. Adjust constructors
47144 (class unsupported_range): Construct vrange appropriately.
47145 (class frange): Same.
47147 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
47149 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
47152 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
47154 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
47156 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
47158 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
47160 (riscv_expand_epilogue): Likewise.
47162 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
47164 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
47166 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
47168 2023-04-17 Andrew Pinski <apinski@marvell.com>
47170 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
47173 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
47175 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
47178 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
47180 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
47181 parameter remaining_size.
47182 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
47183 (riscv_expand_prologue): Likewise.
47184 (riscv_expand_epilogue): Likewise.
47186 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
47188 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
47189 roriw for constant counts.
47190 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
47191 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
47192 (simplify_context::simplify_binary_operation_1): Use it.
47193 * expmed.cc (expand_shift_1): Likewise.
47195 2023-04-17 Martin Jambor <mjambor@suse.cz>
47199 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
47200 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
47201 (ipa_zap_jf_refdesc): New function.
47202 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
47203 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
47204 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
47205 the new parameter of find_reference.
47206 (adjust_references_in_caller): Likewise. Make sure the constant jump
47207 function is not used to decrement a refdec counter again. Only
47208 decrement refdesc counters when the pass_through jump function allows
47209 it. Added a detailed dump when decrementing refdesc counters.
47210 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
47211 (ipa_set_jf_simple_pass_through): Initialize the new flag.
47212 (ipa_set_jf_unary_pass_through): Likewise.
47213 (ipa_set_jf_arith_pass_through): Likewise.
47214 (remove_described_reference): Provide a value for the new parameter of
47216 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
47217 the previous pass_through had a flag mandating that we do so.
47218 (propagate_controlled_uses): Likewise. Only decrement refdesc
47219 counters when the pass_through jump function allows it.
47220 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
47221 parameter of find_reference.
47222 (ipa_write_jump_function): Assert the new flag does not have to be
47224 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
47227 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
47228 Di Zhao <di.zhao@amperecomputing.com>
47230 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
47231 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
47232 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
47233 Check for the above tuning option when processing loads.
47235 2023-04-17 Richard Biener <rguenther@suse.de>
47237 PR tree-optimization/109524
47238 * tree-vrp.cc (remove_unreachable::m_list): Change to a
47239 vector of pairs of block indices.
47240 (remove_unreachable::maybe_register_block): Adjust.
47241 (remove_unreachable::remove_and_update_globals): Likewise.
47242 Deal with removed blocks.
47244 2023-04-16 Jeff Law <jlaw@ventanamicro>
47247 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
47248 TARGET_SFB_ALU, force the true arm into a register.
47250 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
47253 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
47254 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
47256 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
47257 (pa_function_arg_size): Change return type to int. Return zero
47258 for arguments larger than 1 GB. Update comments.
47260 2023-04-15 Jakub Jelinek <jakub@redhat.com>
47262 PR tree-optimization/109154
47263 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
47264 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
47266 2023-04-15 Jason Merrill <jason@redhat.com>
47269 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
47270 Overhaul lhs_ref.ref analysis.
47272 2023-04-14 Richard Biener <rguenther@suse.de>
47274 PR tree-optimization/109502
47275 * tree-vect-stmts.cc (vectorizable_assignment): Fix
47276 check for conversion between mask and non-mask types.
47278 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
47279 Jakub Jelinek <jakub@redhat.com>
47283 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
47284 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
47285 smaller than word_mode.
47286 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
47287 <case AND>: Likewise.
47289 2023-04-14 Jakub Jelinek <jakub@redhat.com>
47291 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
47294 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
47296 PR tree-optimization/108139
47297 PR tree-optimization/109462
47298 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
47299 equivalency check for PHI nodes.
47300 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
47301 does not dominate single-arg equivalency edges.
47303 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
47306 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
47307 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
47309 2023-04-13 Richard Biener <rguenther@suse.de>
47311 PR tree-optimization/109491
47312 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
47313 NULL operands test.
47315 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47318 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
47319 (vint16mf4_t): Ditto.
47320 (vint32mf2_t): Ditto.
47321 (vint64m1_t): Ditto.
47322 (vint64m2_t): Ditto.
47323 (vint64m4_t): Ditto.
47324 (vint64m8_t): Ditto.
47325 (vuint8mf8_t): Ditto.
47326 (vuint16mf4_t): Ditto.
47327 (vuint32mf2_t): Ditto.
47328 (vuint64m1_t): Ditto.
47329 (vuint64m2_t): Ditto.
47330 (vuint64m4_t): Ditto.
47331 (vuint64m8_t): Ditto.
47332 (vfloat32mf2_t): Ditto.
47333 (vbool64_t): Ditto.
47334 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
47335 (register_vector_type): Ditto.
47336 (check_required_extensions): Fix condition.
47337 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
47338 (RVV_REQUIRE_ELEN_64): New define.
47339 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
47340 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
47341 (TARGET_VECTOR_FP64): Ditto.
47342 (ENTRY): Fix predicate.
47343 * config/riscv/vector-iterators.md: Fix predicate.
47345 2023-04-12 Jakub Jelinek <jakub@redhat.com>
47347 PR tree-optimization/109410
47348 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
47349 block if first statement of the function is a call to returns_twice
47352 2023-04-12 Jakub Jelinek <jakub@redhat.com>
47355 * config/i386/i386.cc: Include rtl-error.h.
47356 (ix86_print_operand): For z modifier warning, use warning_for_asm
47357 if this_is_asm_operands. For Z modifier errors, use %c and code
47358 instead of hardcoded Z.
47360 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
47362 * config/i386/x-mingw32-utf8: Remove extrataneous $@
47364 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
47366 PR tree-optimization/109462
47367 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
47368 check for equivalences if NAME is a phi node.
47370 2023-04-12 Richard Biener <rguenther@suse.de>
47372 PR tree-optimization/109473
47373 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
47374 Convert scalar result to the computation type before performing
47375 the reduction adjustment.
47377 2023-04-12 Richard Biener <rguenther@suse.de>
47379 PR tree-optimization/109469
47380 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
47381 a returns-twice call.
47383 2023-04-12 Richard Biener <rguenther@suse.de>
47385 PR tree-optimization/109434
47386 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
47387 handle possibly throwing calls when processing the LHS
47388 and may-defs are not OK.
47390 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
47392 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
47393 predicate to avoid splitting arith constants.
47395 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
47396 Pan Li <pan2.li@intel.com>
47397 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47398 Kito Cheng <kito.cheng@sifive.com>
47401 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
47402 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
47403 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
47404 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
47405 (riscv_zero_call_used_regs): New.
47406 (TARGET_ZERO_CALL_USED_REGS): New.
47408 2023-04-11 Martin Liska <mliska@suse.cz>
47411 * opts.cc (finish_options): Drop also
47412 x_flag_var_tracking_assignments.
47414 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
47416 PR tree-optimization/108888
47417 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
47419 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
47422 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
47423 (vsx_sign_extend_v16qi_<mode>): ... this.
47424 (vsx_sign_extend_hi_<mode>): Rename to...
47425 (vsx_sign_extend_v8hi_<mode>): ... this.
47426 (vsx_sign_extend_si_v2di): Rename to...
47427 (vsx_sign_extend_v4si_v2di): ... this.
47428 (vsignextend_qi_<mode>): Remove.
47429 (vsignextend_hi_<mode>): Remove.
47430 (vsignextend_si_v2di): Remove.
47431 (vsignextend_v2di_v1ti): Remove.
47432 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
47433 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
47434 with gen_vsx_sign_extend_v16qi_v4si.
47435 * config/rs6000/rs6000.md (split for DI constant generation):
47436 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
47437 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
47438 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
47439 with gen_vsx_sign_extend_v16qi_si.
47440 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
47441 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
47442 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
47443 vsx_sign_extend_v16qi_v4si.
47444 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
47445 vsx_sign_extend_v8hi_v2di.
47446 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
47447 vsx_sign_extend_v8hi_v4si.
47448 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
47449 vsx_sign_extend_si_v2di.
47450 (__builtin_altivec_vsignext): Set bif-pattern to
47451 vsx_sign_extend_v2di_v1ti.
47452 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
47453 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
47454 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
47455 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
47457 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
47460 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
47461 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
47463 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
47465 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
47467 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
47469 * common/config/i386/cpuinfo.h (get_available_features):
47470 Detect AMX-COMPLEX.
47471 * common/config/i386/i386-common.cc
47472 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
47473 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
47474 (ix86_handle_option): Handle -mamx-complex.
47475 * common/config/i386/i386-cpuinfo.h (enum processor_features):
47476 Add FEATURE_AMX_COMPLEX.
47477 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
47479 * config.gcc: Add amxcomplexintrin.h.
47480 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
47481 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
47483 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
47484 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
47485 Handle amx-complex.
47486 * config/i386/i386.opt: Add option -mamx-complex.
47487 * config/i386/immintrin.h: Include amxcomplexintrin.h.
47488 * doc/extend.texi: Document amx-complex.
47489 * doc/invoke.texi: Document -mamx-complex.
47490 * doc/sourcebuild.texi: Document target amx-complex.
47491 * config/i386/amxcomplexintrin.h: New file.
47493 2023-04-08 Jakub Jelinek <jakub@redhat.com>
47495 PR tree-optimization/109392
47496 * tree-vect-generic.cc (tree_vec_extract): Handle failure
47497 of maybe_push_res_to_seq better.
47499 2023-04-08 Jakub Jelinek <jakub@redhat.com>
47501 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
47503 (SYSTEM_H): Depend on $(HASHTAB_H).
47504 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
47505 dependency on $(RTL_BASE_H), remove redundant dependency on
47508 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
47511 * config/arm/arm.cc (arm_effective_regno): New function.
47512 (mve_vector_mem_operand): Use it.
47514 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
47516 PR tree-optimization/109417
47517 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
47518 dependency is in SSA_NAME_FREE_LIST.
47520 2023-04-06 Andrew Pinski <apinski@marvell.com>
47522 PR tree-optimization/109427
47523 * params.opt (-param=vect-induction-float=):
47524 Fix option attribute typo for IntegerRange.
47526 2023-04-05 Jeff Law <jlaw@ventanamicro>
47529 * combine.cc (combine_instructions): Force re-recognition when
47530 after restoring the body of an insn to its original form.
47532 2023-04-05 Martin Jambor <mjambor@suse.cz>
47535 * ipa-sra.cc (zap_useless_ipcp_results): New function.
47536 (process_isra_node_results): Call it.
47538 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
47540 * config/riscv/vector.md: Fix incorrect operand order.
47542 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47544 * config/riscv/riscv-vsetvl.cc
47545 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
47548 2023-04-05 Li Xu <xuli1@eswincomputing.com>
47550 * config/riscv/riscv-vector-builtins.def: Fix typo.
47551 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
47552 * config/riscv/vector-iterators.md: Ditto.
47554 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
47556 * doc/md.texi (Including Patterns): Fix page break.
47558 2023-04-04 Jakub Jelinek <jakub@redhat.com>
47560 PR tree-optimization/109386
47561 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
47562 foperator_le::op1_range, foperator_le::op2_range,
47563 foperator_gt::op1_range, foperator_gt::op2_range,
47564 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
47565 BRS_FALSE case even if the other op is maybe_isnan, not just
47567 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
47568 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
47569 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
47570 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
47571 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
47572 not just known_isnan.
47574 2023-04-04 Marek Polacek <polacek@redhat.com>
47576 PR sanitizer/109107
47577 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
47579 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
47581 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
47583 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
47584 (mve_vcreateq_f<mode>): Swap operands.
47586 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
47588 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
47590 2023-04-04 Jakub Jelinek <jakub@redhat.com>
47593 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
47594 Reword diagnostics about zfinx conflict with f, formatting fixes.
47596 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
47598 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
47600 2023-04-04 Richard Biener <rguenther@suse.de>
47602 PR tree-optimization/109304
47603 * tree-profile.cc (tree_profiling): Use symtab node
47604 availability to decide whether to skip adjusting calls.
47605 Do not adjust calls to internal functions.
47607 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
47610 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
47611 function for permutation control vector by considering big endianness.
47613 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
47616 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
47617 (rs6000_vprtyb<mode>2): ... this.
47618 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
47619 rs6000_vprtybv2di2.
47620 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
47621 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
47622 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
47623 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
47625 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
47626 Sandra Loosemore <sandra@codesourcery.com>
47628 * doc/md.texi (Insn Splitting): Tweak wording for readability.
47630 2023-04-03 Martin Jambor <mjambor@suse.cz>
47633 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
47634 offset + size will be representable in unsigned int.
47636 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
47638 * configure.ac (ZSTD_LIB): Move before zstd.h check.
47639 Unset gcc_cv_header_zstd_h without libzstd.
47640 * configure: Regenerate.
47642 2023-04-03 Martin Liska <mliska@suse.cz>
47644 * doc/invoke.texi: Document new param.
47646 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
47648 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
47649 new check_effective_target function.
47651 2023-04-03 Li Xu <xuli1@eswincomputing.com>
47653 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
47654 (vfloat32m8_t): Likewise
47656 2023-04-03 liuhongt <hongtao.liu@intel.com>
47658 * doc/md.texi: Document signbitm2.
47660 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47661 kito-cheng <kito.cheng@sifive.com>
47663 * config/riscv/vector.md: Fix RA constraint.
47665 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47667 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
47668 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
47669 * config/riscv/vector.md: Fix scalar move bug.
47671 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47673 * range-op-float.cc (foperator_equal::fold_range): If at least
47674 one of the op ranges is not singleton and neither is NaN and all
47675 4 bounds are zero, return [1, 1].
47676 (foperator_not_equal::fold_range): In the same case return [0, 0].
47678 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47680 * range-op-float.cc (foperator_equal::fold_range): Perform the
47681 non-singleton handling regardless of maybe_isnan (op1, op2).
47682 (foperator_not_equal::fold_range): Likewise.
47683 (foperator_lt::fold_range, foperator_le::fold_range,
47684 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
47685 real_* comparison check which results in range_false (type)
47686 even if maybe_isnan (op1, op2). Simplify.
47687 (foperator_ltgt): New class.
47688 (fop_ltgt): New variable.
47689 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
47692 2023-04-01 Jakub Jelinek <jakub@redhat.com>
47695 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
47696 returns VOIDmode, handle it like if the register isn't used for
47697 passing arguments at all.
47698 (apply_result_size): If targetm.calls.get_raw_result_mode returns
47699 VOIDmode, handle it like if the register isn't used for returning
47701 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
47702 means to return VOIDmode.
47703 * doc/tm.texi: Regenerated.
47704 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
47705 TARGET_SVE for P0_REGNUM.
47706 (aarch64_function_arg_regno_p): Also return true for p0-p3.
47707 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
47709 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
47711 * lra-constraints.cc: (combine_reload_insn): New function.
47713 2023-03-31 Jakub Jelinek <jakub@redhat.com>
47715 PR tree-optimization/91645
47716 * range-op-float.cc (foperator_unordered_lt::fold_range,
47717 foperator_unordered_le::fold_range,
47718 foperator_unordered_gt::fold_range,
47719 foperator_unordered_ge::fold_range,
47720 foperator_unordered_equal::fold_range): Call the ordered
47721 fold_range on ranges with cleared NaNs.
47722 * value-query.cc (range_query::get_tree_range): Handle also
47723 COMPARISON_CLASS_P trees.
47725 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
47726 Andrew Pinski <pinskia@gmail.com>
47729 * config/riscv/t-riscv: Add missing dependencies.
47731 2023-03-31 liuhongt <hongtao.liu@intel.com>
47733 * config/i386/i386.cc (inline_memory_move_cost): Return 100
47734 for MASK_REGS when MODE_SIZE > 8.
47736 2023-03-31 liuhongt <hongtao.liu@intel.com>
47739 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
47740 ufloat/ufix to floatuns/fixuns.
47741 * config/i386/i386-expand.cc
47742 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
47743 * config/i386/sse.md
47744 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
47746 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
47747 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
47749 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
47751 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
47753 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
47754 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
47755 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
47756 (ufloatv2siv2df2<mask_name>): Renamed to ..
47757 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
47758 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
47760 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
47762 (ufix_notruncv2dfv2si2): Renamed to ..
47763 (fixuns_notruncv2dfv2si2):.. this.
47764 (ufix_notruncv2dfv2si2_mask): Renamed to ..
47765 (fixuns_notruncv2dfv2si2_mask): .. this.
47766 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
47767 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
47768 (ufix_truncv2dfv2si2): Renamed to ..
47769 (*fixuns_truncv2dfv2si2): .. this.
47770 (ufix_truncv2dfv2si2_mask): Renamed to ..
47771 (fixuns_truncv2dfv2si2_mask): .. this.
47772 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
47773 (*fixuns_truncv2dfv2si2_mask_1): .. this.
47774 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
47775 (fixuns_truncv4dfv4si2<mask_name>): .. this.
47776 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
47778 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
47780 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
47781 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
47784 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
47786 PR tree-optimization/109154
47787 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
47788 * gimple-range-gori.h (may_recompute_p): Add depth param.
47789 * params.opt (ranger-recompute-depth): New param.
47791 2023-03-30 Jason Merrill <jason@redhat.com>
47795 * cgraph.h: Move reset() from cgraph_node to symtab_node.
47796 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
47797 remove_from_same_comdat_group.
47799 2023-03-30 Richard Biener <rguenther@suse.de>
47801 PR tree-optimization/107561
47802 * gimple-ssa-warn-access.cc (get_size_range): Add flags
47803 argument and pass it on.
47804 (check_access): When querying for the size range pass
47805 SR_ALLOW_ZERO when the known destination size is zero.
47807 2023-03-30 Richard Biener <rguenther@suse.de>
47809 PR tree-optimization/109342
47810 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
47811 overload for edge. When that edge is a backedge use
47812 dominated_by_p directly.
47814 2023-03-30 liuhongt <hongtao.liu@intel.com>
47816 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
47817 vpblendd instead of vpblendw for V4SI under avx2.
47819 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
47821 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
47822 for many quick operands, for register-sized modes.
47824 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
47826 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
47829 2023-03-29 Martin Liska <mliska@suse.cz>
47831 PR bootstrap/109310
47832 * configure.ac: Emit a warning for deprecated option
47833 --enable-link-mutex.
47834 * configure: Regenerate.
47836 2023-03-29 Richard Biener <rguenther@suse.de>
47838 PR tree-optimization/109331
47839 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
47840 discover a taken edge make sure to cleanup the CFG.
47842 2023-03-29 Richard Biener <rguenther@suse.de>
47844 PR tree-optimization/109327
47845 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
47846 already removed stmts when draining to_remove.
47848 2023-03-29 Richard Biener <rguenther@suse.de>
47851 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
47852 so we can re-create the DIE for the type if required.
47854 2023-03-29 Jakub Jelinek <jakub@redhat.com>
47855 Richard Biener <rguenther@suse.de>
47857 PR tree-optimization/109301
47858 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
47859 properties_provided from PROP_gimple_opt_math to 0.
47860 (pass_data_expand_powcabs): Change properties_provided from 0 to
47861 PROP_gimple_opt_math.
47863 2023-03-29 Richard Biener <rguenther@suse.de>
47865 PR tree-optimization/109154
47866 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
47867 inverted condition specially by inverting at the caller.
47868 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
47870 2023-03-28 David Malcolm <dmalcolm@redhat.com>
47873 * diagnostic-show-locus.cc (column_range::column_range): Factor
47874 out assertion conditional into...
47875 (column_range::valid_p): ...this new function.
47876 (line_corrections::add_hint): Don't attempt to consolidate hints
47877 if it would lead to invalid column_range instances.
47879 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
47882 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
47883 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
47886 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
47888 PR rtl-optimization/109187
47889 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
47890 subtraction in three-way comparison.
47892 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
47894 PR tree-optimization/109265
47895 PR tree-optimization/109274
47896 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
47897 not create a relation record is op1 and op2 are the same symbol.
47898 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
47899 handler for this stmt, but create a new record only if this statement
47900 generates a relation based on the ranges.
47901 (gori_compute::compute_operand2_range): Ditto.
47902 * value-relation.h (value_relation::set_relation): Always create the
47903 record that is requested.
47905 2023-03-28 Richard Biener <rguenther@suse.de>
47907 PR tree-optimization/107087
47908 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
47909 executable regions to avoid useless work and to better
47910 propagate degenerate PHIs.
47912 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
47914 * config/i386/x-mingw32-utf8: update comments.
47916 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
47919 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
47920 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
47922 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
47924 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
47925 after inlining. Record which decls are loaded from. Fix handling
47926 of vops for loads and stores.
47927 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
47928 (aarch64_accesses_vector_load_decl_p): Likewise.
47929 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
47931 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
47932 that loads from a decl, treat vector stores to those decls as
47934 (aarch64_vector_costs::finish_cost): ...and in that case,
47935 if the vector code does nothing more than a store, give the
47936 prologue a zero cost as well.
47938 2023-03-28 Richard Biener <rguenther@suse.de>
47941 PR tree-optimization/108129
47942 * genmatch.cc (lower_for): For (match ...) delay
47943 substituting into the match operator if possible.
47944 (dt_operand::gen_gimple_expr): For user_id look at the
47945 first substitute for determining how to access operands.
47946 (dt_operand::gen_generic_expr): Likewise.
47947 (dt_node::gen_kids): Properly sort user_ids according
47948 to their substitutes.
47949 (dt_node::gen_kids_1): Code-generate user_id matching.
47951 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47952 Jonathan Wakely <jwakely@redhat.com>
47954 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
47955 Use subcommand rather than sub-command in function comments.
47957 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47959 PR tree-optimization/109154
47960 * value-range.h (frange::flush_denormals_to_zero): Make it public
47961 rather than private.
47962 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
47964 * range-op-float.cc (range_operator_float::fold_range): Call
47965 flush_denormals_to_zero.
47967 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47969 PR middle-end/106190
47970 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
47971 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
47973 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47975 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
47976 as 4th argument to set to avoid clear_nan and union_ calls.
47978 2023-03-28 Jakub Jelinek <jakub@redhat.com>
47981 * config/i386/i386.cc (assign_386_stack_local): For DImode
47982 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
47983 align 32 rather than 0 to assign_stack_local.
47985 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
47988 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
47989 on operand #3 to get the final condition code. Use std::swap.
47990 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
47991 (fucmp<gcond:code>8<P:mode>_vis): Move around.
47992 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
47993 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
47995 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
47997 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
47998 top-level sections.
48000 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
48002 * config.host: Pull in i386/x-mingw32-utf8 Makefile
48003 fragment and reference utf8rc-mingw32.o explicitly
48005 * config/i386/sym-mingw32.cc: prevent name mangling of
48007 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
48008 depend on manifest file explicitly.
48010 2023-03-28 Richard Biener <rguenther@suse.de>
48013 2023-03-27 Richard Biener <rguenther@suse.de>
48015 PR rtl-optimization/109237
48016 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
48018 2023-03-28 Richard Biener <rguenther@suse.de>
48020 * common.opt (gdwarf): Remove Negative(gdwarf-).
48022 2023-03-28 Richard Biener <rguenther@suse.de>
48024 * common.opt (gdwarf): Add RejectNegative.
48025 (gdwarf-): Likewise.
48029 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
48031 * config/cris/constraints.md ("T"): Correct to
48032 define_memory_constraint.
48034 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
48036 * config/cris/cris.md (BW2): New mode-iterator.
48037 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
48040 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
48042 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
48043 for possible eliminable compares.
48045 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
48047 * config/cris/constraints.md ("R"): Remove unused constraint.
48049 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
48051 PR gcov-profile/109297
48052 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
48053 (merge_stream_usage): Likewise.
48054 (overlap_usage): Likewise.
48056 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
48059 * config/riscv/thead.md: Add missing mode specifiers.
48061 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
48062 Jiangning Liu <jiangning.liu@amperecomputing.com>
48063 Manolis Tsamis <manolis.tsamis@vrull.eu>
48065 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
48067 2023-03-27 Richard Biener <rguenther@suse.de>
48069 PR rtl-optimization/109237
48070 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
48072 2023-03-27 Richard Biener <rguenther@suse.de>
48075 * lto-wrapper.cc (run_gcc): Parse alternate debug options
48076 as well, they always enable debug.
48078 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
48081 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
48083 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
48085 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
48088 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
48089 than zero when calling vec_sld.
48090 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
48091 zero when calling vec_sld.
48092 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
48093 than zero when calling vec_sld.
48095 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
48097 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
48098 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
48099 loops are represented and which fields are vectors. Add
48100 documentation for OMP_FOR_PRE_BODY field. Document internal
48101 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
48102 * tree.def (OMP_FOR): Make documentation consistent with the
48103 Texinfo manual, to fill some gaps and correct errors.
48105 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
48108 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
48109 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
48110 (handle_move_double): Call it before handle_movsi.
48111 * config/m68k/m68k-protos.h: Declare it.
48113 2023-03-26 Jakub Jelinek <jakub@redhat.com>
48115 PR tree-optimization/109230
48116 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
48118 2023-03-26 Jakub Jelinek <jakub@redhat.com>
48121 * predict.cc (compute_function_frequency): Don't call
48122 warn_function_cold if function already has cold attribute.
48124 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
48126 * doc/install.texi: Remove anachronistic note
48127 related to languages built and separate source tarballs.
48129 2023-03-25 David Malcolm <dmalcolm@redhat.com>
48132 * diagnostic-format-sarif.cc (read_until_eof): Delete.
48133 (maybe_read_file): Delete.
48134 (sarif_builder::maybe_make_artifact_content_object): Use
48135 get_source_file_content rather than maybe_read_file.
48136 Reject it if it's not valid UTF-8.
48137 * input.cc (file_cache_slot::get_full_file_content): New.
48138 (get_source_file_content): New.
48139 (selftest::check_cpp_valid_utf8_p): New.
48140 (selftest::test_cpp_valid_utf8_p): New.
48141 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
48142 * input.h (get_source_file_content): New prototype.
48144 2023-03-24 David Malcolm <dmalcolm@redhat.com>
48146 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
48148 (Special Functions for Debugging the Analyzer): Convert to a
48149 table, and rewrite in places.
48150 (Other Debugging Techniques): Add notes on how to compare two
48151 different exploded graphs.
48153 2023-03-24 David Malcolm <dmalcolm@redhat.com>
48156 * json.cc: Update comments to indicate that we now preserve
48157 insertion order of keys within objects.
48158 (object::print): Traverse keys in insertion order.
48159 (object::set): Preserve insertion order of keys.
48160 (selftest::test_writing_objects): Add an additional key to verify
48161 that we preserve insertion order.
48162 * json.h (object::m_keys): New field.
48164 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
48166 PR tree-optimization/109238
48167 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
48168 predecessors which this block dominates.
48170 2023-03-24 Richard Biener <rguenther@suse.de>
48172 PR tree-optimization/106912
48173 * tree-profile.cc (tree_profiling): Update stmts only when
48174 profiling or testing coverage. Make sure to update calls
48175 fntype, stripping 'const' there.
48177 2023-03-24 Jakub Jelinek <jakub@redhat.com>
48179 PR middle-end/109258
48180 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
48181 if target == const0_rtx.
48183 2023-03-24 Alexandre Oliva <oliva@adacore.com>
48185 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
48186 Document options and effective targets.
48188 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
48190 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
48193 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
48195 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
48196 non-earlyclobber alternative.
48198 2023-03-23 Andrew Pinski <apinski@marvell.com>
48201 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
48204 2023-03-23 Richard Biener <rguenther@suse.de>
48206 PR tree-optimization/107569
48207 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
48208 Do not push SSA names with zero uses as available leader.
48209 (process_bb): Likewise.
48211 2023-03-23 Richard Biener <rguenther@suse.de>
48213 PR tree-optimization/109262
48214 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
48215 combining a piecewise complex load avoid touching loads
48216 that throw internally. Use fun, not cfun throughout.
48218 2023-03-23 Jakub Jelinek <jakub@redhat.com>
48220 * value-range.cc (irange::irange_union, irange::intersect): Fix
48221 comment spelling bugs.
48222 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
48223 * gimple-range-trace.h: Likewise.
48224 * gimple-range-edge.cc: Likewise.
48225 (gimple_outgoing_range_stmt_p,
48226 gimple_outgoing_range::switch_edge_range,
48227 gimple_outgoing_range::edge_range_p): Likewise.
48228 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
48229 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
48230 assume_query::assume_query, assume_query::calculate_phi): Likewise.
48231 * gimple-range-edge.h: Likewise.
48232 * value-range.h (Value_Range::set, Value_Range::lower_bound,
48233 Value_Range::upper_bound, frange::set_undefined): Likewise.
48234 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
48235 gori_compute): Likewise.
48236 * gimple-range-fold.h (fold_using_range): Likewise.
48237 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
48239 * gimple-range-gori.cc (range_def_chain::in_chain_p,
48240 range_def_chain::dump, gori_map::calculate_gori,
48241 gori_compute::compute_operand_range_switch,
48242 gori_compute::logical_combine, gori_compute::refine_using_relation,
48243 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
48245 * gimple-range.h: Likewise.
48246 (enable_ranger): Likewise.
48247 * range-op.h (empty_range_varying): Likewise.
48248 * value-query.h (value_query): Likewise.
48249 * gimple-range-cache.cc (block_range_cache::set_bb_range,
48250 block_range_cache::dump, ssa_global_cache::clear_global_range,
48251 temporal_cache::temporal_value, temporal_cache::current_p,
48252 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
48253 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
48255 * gimple-range-fold.cc (fur_edge::get_phi_operand,
48256 fur_stmt::get_operand, gimple_range_adjustment,
48257 fold_using_range::range_of_phi,
48258 fold_using_range::relation_fold_and_or): Likewise.
48259 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
48260 * value-query.cc (range_query::value_of_expr,
48261 range_query::value_on_edge, range_query::query_relation): Likewise.
48262 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
48263 intersect_range_with_nonzero_bits): Likewise.
48264 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
48265 exit_range): Likewise.
48266 * value-relation.h: Likewise.
48267 (equiv_oracle, relation_trio::relation_trio, value_relation,
48268 value_relation::value_relation, pe_min): Likewise.
48269 * range-op-float.cc (range_operator_float::rv_fold,
48270 frange_arithmetic, foperator_unordered_equal::op1_range,
48271 foperator_div::rv_fold): Likewise.
48272 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
48273 * value-relation.cc (equiv_oracle::query_relation,
48274 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
48275 value_relation::apply_transitive, relation_chain_head::find_relation,
48276 dom_oracle::query_relation, dom_oracle::find_relation_block,
48277 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
48278 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
48279 create_possibly_reversed_range, adjust_op1_for_overflow,
48280 operator_mult::wi_fold, operator_exact_divide::op1_range,
48281 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
48282 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
48283 range_op_lshift_tests): Likewise.
48285 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
48287 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
48288 (move_callee_saved_registers): Detect the bug condition early.
48290 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
48292 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
48293 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
48295 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
48296 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
48297 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
48298 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
48299 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
48301 2023-03-23 Jakub Jelinek <jakub@redhat.com>
48303 PR tree-optimization/109176
48304 * tree-vect-generic.cc (expand_vector_condition): If a has
48305 vector boolean type and is a comparison, also check if both
48306 the comparison and VEC_COND_EXPR could be successfully expanded
48309 2023-03-23 Pan Li <pan2.li@intel.com>
48310 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48314 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
48315 for vector mask modes.
48316 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
48317 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
48319 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
48321 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
48323 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48326 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
48327 (emit_vlmax_op): Ditto.
48328 * config/riscv/riscv-v.cc (get_sew): New function.
48329 (emit_vlmax_vsetvl): Adapt function.
48330 (emit_pred_op): Ditto.
48331 (emit_vlmax_op): Ditto.
48332 (emit_nonvlmax_op): Ditto.
48333 (legitimize_move): Fix LRA ICE.
48334 (gen_no_side_effects_vsetvl_rtx): Adapt function.
48335 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
48336 (@mov<VB:mode><P:mode>_lra): Ditto.
48337 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
48338 (*mov<VB:mode><P:mode>_lra): Ditto.
48340 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48343 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
48344 __riscv_vlenb support.
48346 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
48347 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
48348 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
48350 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
48351 * config/riscv/riscv-vector-builtins.cc: Ditto.
48353 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48354 kito-cheng <kito.cheng@sifive.com>
48356 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
48357 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
48358 (pass_vsetvl::need_vsetvl): Fix bugs.
48359 (pass_vsetvl::backward_demand_fusion): Fix bugs.
48360 (pass_vsetvl::demand_fusion): Fix bugs.
48361 (eliminate_insn): Fix bugs.
48362 (insert_vsetvl): Ditto.
48363 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
48364 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
48365 * config/riscv/vector.md: Ditto.
48367 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48368 kito-cheng <kito.cheng@sifive.com>
48370 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
48371 * config/riscv/vector-iterators.md (nmsac): Ditto.
48377 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
48378 (@pred_mul_plus<mode>): Ditto.
48379 (*pred_madd<mode>): Ditto.
48380 (*pred_macc<mode>): Ditto.
48381 (*pred_mul_plus<mode>): Ditto.
48382 (@pred_mul_plus<mode>_scalar): Ditto.
48383 (*pred_madd<mode>_scalar): Ditto.
48384 (*pred_macc<mode>_scalar): Ditto.
48385 (*pred_mul_plus<mode>_scalar): Ditto.
48386 (*pred_madd<mode>_extended_scalar): Ditto.
48387 (*pred_macc<mode>_extended_scalar): Ditto.
48388 (*pred_mul_plus<mode>_extended_scalar): Ditto.
48389 (@pred_minus_mul<mode>): Ditto.
48390 (*pred_<madd_nmsub><mode>): Ditto.
48391 (*pred_nmsub<mode>): Ditto.
48392 (*pred_<macc_nmsac><mode>): Ditto.
48393 (*pred_nmsac<mode>): Ditto.
48394 (*pred_mul_<optab><mode>): Ditto.
48395 (*pred_minus_mul<mode>): Ditto.
48396 (@pred_mul_<optab><mode>_scalar): Ditto.
48397 (@pred_minus_mul<mode>_scalar): Ditto.
48398 (*pred_<madd_nmsub><mode>_scalar): Ditto.
48399 (*pred_nmsub<mode>_scalar): Ditto.
48400 (*pred_<macc_nmsac><mode>_scalar): Ditto.
48401 (*pred_nmsac<mode>_scalar): Ditto.
48402 (*pred_mul_<optab><mode>_scalar): Ditto.
48403 (*pred_minus_mul<mode>_scalar): Ditto.
48404 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
48405 (*pred_nmsub<mode>_extended_scalar): Ditto.
48406 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
48407 (*pred_nmsac<mode>_extended_scalar): Ditto.
48408 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
48409 (*pred_minus_mul<mode>_extended_scalar): Ditto.
48410 (*pred_<madd_msub><mode>): Ditto.
48411 (*pred_<macc_msac><mode>): Ditto.
48412 (*pred_<madd_msub><mode>_scalar): Ditto.
48413 (*pred_<macc_msac><mode>_scalar): Ditto.
48414 (@pred_neg_mul_<optab><mode>): Ditto.
48415 (@pred_mul_neg_<optab><mode>): Ditto.
48416 (*pred_<nmadd_msub><mode>): Ditto.
48417 (*pred_<nmsub_nmadd><mode>): Ditto.
48418 (*pred_<nmacc_msac><mode>): Ditto.
48419 (*pred_<nmsac_nmacc><mode>): Ditto.
48420 (*pred_neg_mul_<optab><mode>): Ditto.
48421 (*pred_mul_neg_<optab><mode>): Ditto.
48422 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
48423 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
48424 (*pred_<nmadd_msub><mode>_scalar): Ditto.
48425 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
48426 (*pred_<nmacc_msac><mode>_scalar): Ditto.
48427 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
48428 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
48429 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
48430 (@pred_widen_neg_mul_<optab><mode>): Ditto.
48431 (@pred_widen_mul_neg_<optab><mode>): Ditto.
48432 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
48433 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
48435 2023-03-23 liuhongt <hongtao.liu@intel.com>
48437 * builtins.cc (builtin_memset_read_str): Replace
48438 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
48439 (builtin_memset_gen_str): Ditto.
48440 * config/i386/i386-expand.cc
48441 (ix86_convert_const_wide_int_to_broadcast): Replace
48442 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
48443 (ix86_expand_vector_move): Ditto.
48444 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
48446 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
48447 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
48448 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
48449 * doc/tm.texi.in: Ditto.
48450 * target.def: Ditto.
48452 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
48454 * lra.cc (lra): Do not repeat inheritance and live range splitting
48455 when asm error is found.
48457 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
48459 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
48460 (gcn_expand_dpp_distribute_even_insn)
48461 (gcn_expand_dpp_distribute_odd_insn): Declare.
48462 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
48463 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
48464 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
48465 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
48466 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
48467 (fms<mode>4_negop2): New patterns.
48468 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
48469 (gcn_expand_dpp_distribute_even_insn)
48470 (gcn_expand_dpp_distribute_odd_insn): New functions.
48471 * config/gcn/gcn.md: Add entries to unspec enum.
48473 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
48475 PR tree-optimization/109008
48476 * value-range.cc (frange::set): Add nan_state argument.
48477 * value-range.h (class nan_state): New.
48478 (frange::get_nan_state): New.
48480 2023-03-22 Martin Liska <mliska@suse.cz>
48482 * configure: Regenerate.
48484 2023-03-21 Joseph Myers <joseph@codesourcery.com>
48486 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
48489 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
48491 PR tree-optimization/109192
48492 * gimple-range-gori.cc (gori_compute::compute_operand_range):
48493 Terminate gori calculations if a relation is not relevant.
48494 * value-relation.h (value_relation::set_relation): Allow
48495 equality between op1 and op2 if they are the same.
48497 2023-03-21 Richard Biener <rguenther@suse.de>
48499 PR tree-optimization/109219
48500 * tree-vect-loop.cc (vectorizable_reduction): Check
48501 slp_node, not STMT_SLP_TYPE.
48502 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
48503 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
48504 Remove assertion on STMT_SLP_TYPE.
48506 2023-03-21 Jakub Jelinek <jakub@redhat.com>
48508 PR tree-optimization/109215
48509 * tree.h (enum special_array_member): Adjust comments for int_0
48511 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
48512 has zero sized element type and the array has variable number of
48513 elements or constant one or more elements.
48514 (component_ref_size): Adjust comments, formatting fix.
48516 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48518 * configure.ac: Add check for the Texinfo 6.8
48519 CONTENTS_OUTPUT_LOCATION customization variable and set it if
48521 * configure: Regenerate.
48522 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
48523 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
48524 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
48525 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
48527 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48529 * doc/extend.texi: Associate use_hazard_barrier_return index
48530 entry with its attribute.
48531 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
48534 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48536 * doc/implement-c.texi: Remove usage of @gol.
48537 * doc/invoke.texi: Ditto.
48538 * doc/sourcebuild.texi: Ditto.
48539 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
48540 texinfo.tex versions, the bug it was working around appears to
48543 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48545 * doc/include/texinfo.tex: Update to 2023-01-17.19.
48547 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48549 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
48550 @enddefbuiltin for defining built-in functions.
48551 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
48552 places where it should be used.
48554 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48556 * doc/extend.texi (Formatted Output Function Checking): New
48557 subsection for grouping together printf et al.
48558 (Exception handling) Fix missing @ sign before copyright
48559 header, which lead to the copyright line leaking into
48560 '(gcc)Exception handling'.
48561 * doc/gcc.texi: Set document language to en_US.
48562 (@copying): Wrap front cover texts in quotations, move in manual
48565 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
48567 * doc/gcc.texi: Add the Indices appendix, to make texinfo
48568 generate nice indices overview page.
48570 2023-03-21 Richard Biener <rguenther@suse.de>
48572 PR tree-optimization/109170
48573 * gimple-range-op.cc (cfn_pass_through_arg1): New.
48574 (gimple_range_op_handler::maybe_builtin_call): Handle
48575 __builtin_expect via cfn_pass_through_arg1.
48577 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
48580 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
48581 (init_float128_ieee): Delete code to switch complex multiply and divide
48583 (complex_multiply_builtin_code): New helper function.
48584 (complex_divide_builtin_code): Likewise.
48585 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
48586 of complex 128-bit multiply and divide built-in functions.
48588 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
48591 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
48593 2023-03-19 Jonny Grant <jg@jguk.org>
48595 * doc/extend.texi (Common Function Attributes) <nonnull>:
48598 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
48600 PR rtl-optimization/109179
48601 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
48602 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
48604 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48607 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
48609 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
48610 to allocate_struct_function instead of false.
48611 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
48612 nor DECL_RESULT here. Pass true as ABSTRACT_P to
48613 push_struct_function. Call targetm.target_option.relayout_function
48615 (tree_function_versioning): Formatting fix.
48617 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
48619 * lra-constraints.cc: Include hooks.h.
48620 (combine_reload_insn): New function.
48621 (lra_constraints): Call it.
48623 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48624 kito-cheng <kito.cheng@sifive.com>
48626 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
48627 as legitimate value.
48628 * config/riscv/riscv-vector-builtins.cc
48629 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
48630 (function_expander::use_widen_ternop_insn): Ditto.
48631 * config/riscv/vector.md (@vundefined<mode>): New pattern.
48632 (pred_mul_<optab><mode>_undef_merge): Remove.
48633 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
48634 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
48635 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
48636 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
48638 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
48641 * config/riscv/riscv.md: Fix subreg bug.
48643 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48645 PR middle-end/108685
48646 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
48647 use its loop_father rather than BODY_BB's loop_father.
48648 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
48649 If broken_loop with ordered > collapse and at least one of those
48650 extra loops aren't guaranteed to have at least one iteration, change
48651 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
48652 loop_father to l0_bb's loop_father rather than l1_bb's.
48654 2023-03-17 Jakub Jelinek <jakub@redhat.com>
48657 * gdbhooks.py (TreePrinter.to_string): Wrap
48658 gdb.parse_and_eval('tree_code_type') in a try block, parse
48659 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
48660 raises exception. Update comments for the recent tree_code_type
48663 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
48665 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
48666 issues. Add more line breaks to example so it doesn't overflow
48669 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
48671 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
48672 line breaks in examples.
48673 <malloc>: Fix bad line breaks in running text, also copy-edit
48675 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
48676 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
48678 (C++ Dialect Options) <-fcontracts>: Add line break in example.
48679 <-Wctad-maybe-unsupported>: Likewise.
48680 <-Winvalid-constexpr>: Likewise.
48681 (Warning Options) <-Wdangling-pointer>: Likewise.
48682 <-Winterference-size>: Likewise.
48683 <-Wvla-parameter>: Likewise.
48684 (Static Analyzer Options): Fix bad line breaks in running text,
48685 plus add some missing markup.
48686 (Optimize Options) <openacc-privatization>: Fix more bad line
48687 breaks in running text.
48689 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
48691 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
48692 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
48693 (expand_vec_perm_2perm_pblendv): Ditto.
48695 2023-03-16 Martin Liska <mliska@suse.cz>
48697 PR middle-end/106133
48698 * gcc.cc (driver_handle_option): Use x_main_input_basename
48699 if x_dump_base_name is null.
48700 * opts.cc (common_handle_option): Likewise.
48702 2023-03-16 Richard Biener <rguenther@suse.de>
48704 PR tree-optimization/109123
48705 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
48706 Do not emit -Wuse-after-free late.
48707 (pass_waccess::check_call): Always check call pointer uses.
48709 2023-03-16 Richard Biener <rguenther@suse.de>
48711 PR tree-optimization/109141
48712 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
48713 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
48715 (renumber_gimple_stmt_uids): ... here and
48716 (renumber_gimple_stmt_uids_in_blocks): ... here.
48717 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
48718 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
48720 (pass_waccess::check_pointer_uses): Process all PHIs.
48722 2023-03-15 David Malcolm <dmalcolm@redhat.com>
48725 * diagnostic-format-sarif.cc (class sarif_invocation): New.
48726 (class sarif_ice_notification): New.
48727 (sarif_builder::m_invocation_obj): New field.
48728 (sarif_invocation::add_notification_for_ice): New.
48729 (sarif_invocation::prepare_to_flush): New.
48730 (sarif_ice_notification::sarif_ice_notification): New.
48731 (sarif_builder::sarif_builder): Add m_invocation_obj.
48732 (sarif_builder::end_diagnostic): Special-case DK_ICE and
48734 (sarif_builder::flush_to_file): Call prepare_to_flush on
48735 m_invocation_obj. Pass the latter to make_top_level_object.
48736 (sarif_builder::make_result_object): Move creation of "locations"
48738 (sarif_builder::make_locations_arr): ...this new function.
48739 (sarif_builder::make_top_level_object): Add "invocation_obj" param
48740 and pass it to make_run_object.
48741 (sarif_builder::make_run_object): Add "invocation_obj" param and
48743 (sarif_ice_handler): New callback.
48744 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
48745 * diagnostic.cc (diagnostic_initialize): Initialize new field
48747 (diagnostic_action_after_output): If it is set, make one attempt
48748 to call ice_handler_cb.
48749 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
48751 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
48753 * config/i386/i386-expand.cc (expand_vec_perm_blend):
48754 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
48755 and fix V2HImode handling.
48756 (expand_vec_perm_1): Try to emit BLEND instruction
48757 before MOVSS/MOVSD.
48758 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
48760 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
48762 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
48764 2023-03-15 Richard Biener <rguenther@suse.de>
48766 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
48767 Do not diagnose clobbers.
48769 2023-03-15 Richard Biener <rguenther@suse.de>
48771 PR tree-optimization/109139
48772 * tree-ssa-live.cc (remove_unused_locals): Look at the
48773 base address for unused decls on the LHS of .DEFERRED_INIT.
48775 2023-03-15 Xi Ruoyao <xry111@xry111.site>
48778 * builtins.cc (inline_string_cmp): Force the character
48779 difference into "result" pseudo-register, instead of reassign
48780 the pseudo-register.
48782 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48784 * config.gcc: Add thead.o to RISC-V extra_objs.
48785 * config/riscv/peephole.md: Add mempair peephole passes.
48786 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
48788 (th_mempair_operands_p): Likewise.
48789 (th_mempair_order_operands): Likewise.
48790 (th_mempair_prepare_save_restore_operands): Likewise.
48791 (th_mempair_save_restore_regs): Likewise.
48792 (th_mempair_output_move): Likewise.
48793 * config/riscv/riscv.cc (riscv_save_reg): Move code.
48794 (riscv_restore_reg): Move code.
48795 (riscv_for_each_saved_reg): Add code to emit mempair insns.
48796 * config/riscv/t-riscv: Add thead.cc.
48797 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
48799 (*th_mempair_store_<GPR:mode>2): Likewise.
48800 (*th_mempair_load_extendsidi2): Likewise.
48801 (*th_mempair_load_zero_extendsidi2): Likewise.
48802 * config/riscv/thead.cc: New file.
48804 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48806 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
48807 New constraint "th_f_fmv".
48808 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
48810 * config/riscv/riscv.cc (riscv_split_doubleword_move):
48811 Add split code for XTheadFmv.
48812 (riscv_secondary_memory_needed): XTheadFmv does not need
48814 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
48815 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
48816 movdf_hardfloat_rv32.
48817 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
48818 (th_fmv_x_w): New INSN.
48819 (th_fmv_x_hw): New INSN.
48821 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48823 * config/riscv/riscv.md (maddhisi4): New expand.
48824 (msubhisi4): New expand.
48825 * config/riscv/thead.md (*th_mula<mode>): New pattern.
48826 (*th_mulawsi): New pattern.
48827 (*th_mulawsi2): New pattern.
48828 (*th_maddhisi4): New pattern.
48829 (*th_sextw_maddhisi4): New pattern.
48830 (*th_muls<mode>): New pattern.
48831 (*th_mulswsi): New pattern.
48832 (*th_mulswsi2): New pattern.
48833 (*th_msubhisi4): New pattern.
48834 (*th_sextw_msubhisi4): New pattern.
48836 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48838 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
48839 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
48841 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
48843 (riscv_expand_conditional_move): New function.
48844 (riscv_expand_conditional_move_onesided): New function.
48845 * config/riscv/riscv.md: Add support for XTheadCondMov.
48846 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
48847 support for XTheadCondMov.
48848 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
48850 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48852 * config/riscv/bitmanip.md (clzdi2): New expand.
48853 (clzsi2): New expand.
48854 (ctz<mode>2): New expand.
48855 (popcount<mode>2): New expand.
48856 (<bitmanip_optab>si2): Rename INSN.
48857 (*<bitmanip_optab>si2): Hide INSN name.
48858 (<bitmanip_optab>di2): Rename INSN.
48859 (*<bitmanip_optab>di2): Hide INSN name.
48860 (rotrsi3): Remove INSN.
48861 (rotr<mode>3): Add expand.
48862 (*rotrsi3): New INSN.
48863 (rotrdi3): Rename INSN.
48864 (*rotrdi3): Hide INSN name.
48865 (rotrsi3_sext): Rename INSN.
48866 (*rotrsi3_sext): Hide INSN name.
48867 (bswap<mode>2): Remove INSN.
48868 (bswapdi2): Add expand.
48869 (bswapsi2): Add expand.
48870 (*bswap<mode>2): Hide INSN name.
48871 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
48873 * config/riscv/riscv.md (extv<mode>): New expand.
48874 (extzv<mode>): New expand.
48875 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
48876 (*th_ext<mode>): New INSN.
48877 (*th_extu<mode>): New INSN.
48878 (*th_clz<mode>2): New INSN.
48879 (*th_rev<mode>2): New INSN.
48881 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48883 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
48884 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
48886 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48888 * config/riscv/riscv.md: Include thead.md
48889 * config/riscv/thead.md: New file.
48891 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48893 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
48895 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
48897 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
48898 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
48899 (MASK_XTHEADBB): New.
48900 (MASK_XTHEADBS): New.
48901 (MASK_XTHEADCMO): New.
48902 (MASK_XTHEADCONDMOV): New.
48903 (MASK_XTHEADFMEMIDX): New.
48904 (MASK_XTHEADFMV): New.
48905 (MASK_XTHEADINT): New.
48906 (MASK_XTHEADMAC): New.
48907 (MASK_XTHEADMEMIDX): New.
48908 (MASK_XTHEADMEMPAIR): New.
48909 (MASK_XTHEADSYNC): New.
48910 (TARGET_XTHEADBA): New.
48911 (TARGET_XTHEADBB): New.
48912 (TARGET_XTHEADBS): New.
48913 (TARGET_XTHEADCMO): New.
48914 (TARGET_XTHEADCONDMOV): New.
48915 (TARGET_XTHEADFMEMIDX): New.
48916 (TARGET_XTHEADFMV): New.
48917 (TARGET_XTHEADINT): New.
48918 (TARGET_XTHEADMAC): New.
48919 (TARGET_XTHEADMEMIDX): New.
48920 (TARGET_XTHEADMEMPAIR): new.
48921 (TARGET_XTHEADSYNC): New.
48922 * config/riscv/riscv.opt: Add riscv_xthead_subext.
48924 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
48927 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
48928 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
48929 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
48931 2023-03-14 Jakub Jelinek <jakub@redhat.com>
48934 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
48935 when lo is equal to dhi and hi is a MEM which uses dlo register.
48937 2023-03-14 Martin Jambor <mjambor@suse.cz>
48940 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
48941 global0 instead of zeroing when it does not have as many counts as
48944 2023-03-14 Martin Jambor <mjambor@suse.cz>
48947 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
48948 ipa count, remove assert, lenient_count_portion_handling, dump
48949 also orig_node_count.
48951 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
48953 * config/i386/i386-expand.cc (expand_vec_perm_movs):
48954 Handle V2SImode for TARGET_MMX_WITH_SSE.
48955 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
48956 using V2FI mode iterator to handle both V2SI and V2SF modes.
48958 2023-03-14 Sam James <sam@gentoo.org>
48960 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
48961 including <sstream> earlier.
48962 * system.h: Add INCLUDE_SSTREAM.
48964 2023-03-14 Richard Biener <rguenther@suse.de>
48966 * tree-ssa-live.cc (remove_unused_locals): Do not treat
48967 the .DEFERRED_INIT of a variable as use, instead remove
48968 that if it is the only use.
48970 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
48972 PR rtl-optimization/107762
48973 * expr.cc (emit_group_store): Revert latest change.
48975 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
48977 PR tree-optimization/109005
48978 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
48979 aggregate type check.
48981 2023-03-14 Jakub Jelinek <jakub@redhat.com>
48983 PR tree-optimization/109115
48984 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
48985 r.upper_bound () on r.undefined_p () range.
48987 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
48989 PR tree-optimization/106896
48990 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
48991 implementatoin with probability_in; avoid some asserts.
48993 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
48995 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
48997 2023-03-13 Sean Bright <sean@seanbright.com>
48999 * doc/invoke.texi (Warning Options): Remove errant 'See'
49002 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
49004 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
49005 REG_OK_FOR_BASE_P): Remove.
49007 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49009 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
49010 (=vd,vd,vr,vr): Ditto.
49011 * config/riscv/vector.md: Ditto.
49013 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49015 * config/riscv/riscv-vector-builtins.cc
49016 (function_expander::use_compare_insn): Add operand predicate check.
49018 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49020 * config/riscv/vector.md: Fine tune RA constraints.
49022 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
49024 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
49025 hsaco assemble/link.
49027 2023-03-13 Richard Biener <rguenther@suse.de>
49029 PR tree-optimization/109046
49030 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
49031 piecewise complex loads.
49033 2023-03-12 Jakub Jelinek <jakub@redhat.com>
49035 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
49036 (aarch64_bf16_ptr_type_node): Adjust comment.
49037 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
49038 bfloat16_type_node rather than aarch64_bf16_type_node.
49039 (aarch64_libgcc_floating_mode_supported_p,
49040 aarch64_scalar_mode_supported_p): Also support BFmode.
49041 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
49042 (aarch64_invalid_binary_op): Remove BFmode related rejections.
49043 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
49044 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
49045 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
49046 aarch64_bf16_type_node.
49047 (aarch64_init_simd_builtin_types): Likewise.
49048 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
49049 which is created in tree.cc already.
49050 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
49052 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
49054 PR middle-end/109031
49055 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
49056 ensure that the type of x is as wide or wider than the type of a.
49058 2023-03-12 Tamar Christina <tamar.christina@arm.com>
49061 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
49062 (*bitmask_shift_plus<mode>): New.
49063 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
49064 (@aarch64_bitmask_udiv<mode>3): Remove.
49065 * config/aarch64/aarch64.cc
49066 (aarch64_vectorize_can_special_div_by_constant,
49067 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
49068 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
49069 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
49071 2023-03-12 Tamar Christina <tamar.christina@arm.com>
49074 * target.def (preferred_div_as_shifts_over_mult): New.
49075 * doc/tm.texi.in: Document it.
49076 * doc/tm.texi: Regenerate.
49077 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
49078 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
49079 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
49081 2023-03-12 Tamar Christina <tamar.christina@arm.com>
49082 Richard Sandiford <richard.sandiford@arm.com>
49085 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
49088 2023-03-12 Tamar Christina <tamar.christina@arm.com>
49089 Andrew MacLeod <amacleod@redhat.com>
49092 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
49093 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
49095 (gimple_range_op_handler::maybe_non_standard): New.
49096 * range-op.cc (class operator_widen_plus_signed,
49097 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
49098 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
49099 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
49100 operator_widen_mult_unsigned::wi_fold,
49101 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
49102 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
49103 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
49104 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
49106 2023-03-12 Tamar Christina <tamar.christina@arm.com>
49109 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
49110 * doc/tm.texi.in: Likewise.
49111 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
49112 * expmed.cc (expand_divmod): Likewise.
49113 * expmed.h (expand_divmod): Likewise.
49114 * expr.cc (force_operand, expand_expr_divmod): Likewise.
49115 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
49116 * target.def (can_special_div_by_const): Remove.
49117 * target.h: Remove tree-core.h include
49118 * targhooks.cc (default_can_special_div_by_const): Remove.
49119 * targhooks.h (default_can_special_div_by_const): Remove.
49120 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
49121 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
49122 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
49124 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
49126 * doc/install.texi2html: Fix issue number typo in comment.
49128 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
49130 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
49133 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
49135 * doc/invoke.texi (Optimize Options): Add markup to
49136 description of asan-kernel-mem-intrinsic-prefix, and clarify
49139 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
49141 * doc/extend.texi (Named Address Spaces): Drop a redundant link
49144 2023-03-11 Jeff Law <jlaw@ventanamicro>
49147 * doc/extend.texi: Clarify Attribute Syntax a bit.
49149 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
49151 * doc/install.texi (Prerequisites): Suggest using newer versions
49153 (Final install): Clean up and modernize discussion of how to
49154 build or obtain the GCC manuals.
49155 * doc/install.texi2html: Update comment to point to the PR instead
49156 of "makeinfo 4.7 brokenness" (it's not specific to that version).
49158 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49161 * optabs.cc (expand_fix): For conversions from BFmode to integral,
49162 use shifts to convert it to SFmode first and then convert SFmode
49165 2023-03-10 Andrew Pinski <apinski@marvell.com>
49167 * config/aarch64/aarch64.md: Add a new define_split
49170 2023-03-10 Richard Biener <rguenther@suse.de>
49172 * tree-ssa-structalias.cc (solve_graph): Immediately
49173 iterate self-cycles.
49175 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49177 PR tree-optimization/109008
49178 * range-op-float.cc (float_widen_lhs_range): If not
49179 -frounding-math and not IBM double double format, extend lhs
49180 range just by 0.5ulp rather than 1ulp in each direction.
49182 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49185 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
49187 * config/i386/t-cygwin-w64: Remove.
49189 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49192 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
49193 C++14, don't declare as extern const arrays.
49194 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
49195 static constexpr member arrays for C++11 or C++14.
49196 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
49197 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
49198 (TREE_CODE_LENGTH): For C++11 or C++14 use
49199 tree_code_length_tmpl <0>::tree_code_length instead of
49201 * tree.cc (tree_code_type, tree_code_length): Remove.
49203 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49206 * common.opt (fcanon-prefix-map): New option.
49207 * opts.cc: Include file-prefix-map.h.
49208 (flag_canon_prefix_map): New variable.
49209 (common_handle_option): Handle OPT_fcanon_prefix_map.
49210 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
49211 * file-prefix-map.h (flag_canon_prefix_map): Declare.
49212 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
49214 (add_prefix_map): Initialize canonicalize member from
49215 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
49216 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
49217 use lrealpath result only for map->canonicalize map entries.
49218 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
49219 * opts-global.cc (handle_common_deferred_options): Clear
49220 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
49221 * doc/invoke.texi (-fcanon-prefix-map): Document.
49222 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
49223 see also for -fcanon-prefix-map.
49224 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
49226 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49229 * cgraphunit.cc (check_global_declaration): Don't warn for unused
49230 variables which have OPT_Wunused_variable warning suppressed.
49232 2023-03-10 Jakub Jelinek <jakub@redhat.com>
49234 PR tree-optimization/109008
49235 * range-op-float.cc (float_widen_lhs_range): If lb is
49236 minimum representable finite number or ub is maximum
49237 representable finite number, instead of widening it to
49238 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
49239 Temporarily clear flag_finite_math_only when canonicalizing
49242 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49244 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
49245 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
49246 (gimple_fold_builtin): Ditto.
49247 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
49248 (class vleff): Ditto.
49250 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49251 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
49253 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
49254 (struct fault_load_def): Ditto.
49256 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49257 * config/riscv/riscv-vector-builtins.cc
49258 (rvv_arg_type_info::get_tree_type): Add size_ptr.
49259 (gimple_folder::gimple_folder): New class.
49260 (gimple_folder::fold): Ditto.
49261 (gimple_fold_builtin): New function.
49262 (get_read_vl_instance): Ditto.
49263 (get_read_vl_decl): Ditto.
49264 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
49265 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
49266 (get_read_vl_instance): New function.
49267 (get_read_vl_decl): Ditto.
49268 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
49269 (read_vl_insn_p): Ditto.
49270 (available_occurrence_p): Ditto.
49271 (backward_propagate_worthwhile_p): Ditto.
49272 (gen_vsetvl_pat): Adapt for vleff support.
49273 (get_forward_read_vl_insn): New function.
49274 (get_backward_fault_first_load_insn): Ditto.
49275 (source_equal_p): Adapt for vleff support.
49276 (first_ratio_invalid_for_second_sew_p): Remove.
49277 (first_ratio_invalid_for_second_lmul_p): Ditto.
49278 (first_lmul_less_than_second_lmul_p): Ditto.
49279 (first_ratio_less_than_second_ratio_p): Ditto.
49280 (support_relaxed_compatible_p): New function.
49281 (vector_insn_info::operator>): Remove.
49282 (vector_insn_info::operator>=): Refine.
49283 (vector_insn_info::parse_insn): Adapt for vleff support.
49284 (vector_insn_info::compatible_p): Ditto.
49285 (vector_insn_info::update_fault_first_load_avl): New function.
49286 (pass_vsetvl::transfer_after): Adapt for vleff support.
49287 (pass_vsetvl::demand_fusion): Ditto.
49288 (pass_vsetvl::cleanup_insns): Ditto.
49289 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
49290 redundant condtions.
49291 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
49292 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
49293 * config/riscv/riscv.md: Adapt for vleff support.
49294 * config/riscv/t-riscv: Ditto.
49295 * config/riscv/vector-iterators.md: New iterator.
49296 * config/riscv/vector.md (read_vlsi): New pattern.
49297 (read_vldi_zero_extend): Ditto.
49298 (@pred_fault_load<mode>): Ditto.
49300 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49302 * config/riscv/riscv-vector-builtins.cc
49303 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
49304 (function_expander::use_widen_ternop_insn): Ditto.
49305 * optabs.cc (maybe_gen_insn): Extend nops handling.
49307 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49309 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
49310 patterns according to RVV ISA.
49311 * config/riscv/vector-iterators.md: New iterators.
49312 * config/riscv/vector.md
49313 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
49314 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
49315 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
49316 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
49317 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
49318 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
49319 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
49320 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
49321 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
49322 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
49323 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
49324 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
49325 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
49326 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
49328 2023-03-10 Michael Collison <collison@rivosinc.com>
49330 * tree-vect-loop-manip.cc (vect_do_peeling): Use
49331 result of constant_lower_bound instead of vf for the lower
49332 bound of the epilog loop trip count.
49334 2023-03-09 Tamar Christina <tamar.christina@arm.com>
49336 * passes.cc (emergency_dump_function): Finish graph generation.
49338 2023-03-09 Tamar Christina <tamar.christina@arm.com>
49340 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
49341 and bottom bit only.
49343 2023-03-09 Andrew Pinski <apinski@marvell.com>
49345 PR tree-optimization/108980
49346 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
49347 Reorgnize the call to warning for not strict flexible arrays
49348 to be before the check of warned.
49350 2023-03-09 Jason Merrill <jason@redhat.com>
49352 * doc/extend.texi: Comment out __is_deducible docs.
49354 2023-03-09 Jason Merrill <jason@redhat.com>
49357 * doc/extend.texi (Type Traits):: Document __is_deducible.
49359 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
49362 * config.host: add object for x86_64-*-mingw*.
49363 * config/i386/sym-mingw32.cc: dummy file to attach
49365 * config/i386/utf8-mingw32.rc: windres resource file.
49366 * config/i386/winnt-utf8.manifest: XML manifest to
49368 * config/i386/x-mingw32: reference to x-mingw32-utf8.
49369 * config/i386/x-mingw32-utf8: Makefile fragment to
49370 embed UTF-8 manifest.
49372 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
49374 * lra-constraints.cc (process_alt_operands): Use operand modes for
49375 clobbered regs instead of the biggest access mode.
49377 2023-03-09 Richard Biener <rguenther@suse.de>
49379 PR middle-end/108995
49380 * fold-const.cc (extract_muldiv_1): Avoid folding
49381 (CST * b) / CST2 when sanitizing overflow and we rely on
49382 overflow being undefined.
49384 2023-03-09 Jakub Jelinek <jakub@redhat.com>
49385 Richard Biener <rguenther@suse.de>
49387 PR tree-optimization/109008
49388 * range-op-float.cc (float_widen_lhs_range): New function.
49389 (foperator_plus::op1_range, foperator_minus::op1_range,
49390 foperator_minus::op2_range, foperator_mult::op1_range,
49391 foperator_div::op1_range, foperator_div::op2_range): Use it.
49393 2023-03-07 Jonathan Grant <jg@jguk.org>
49396 * doc/invoke.texi (Instrumentation Options): Clarify
49397 LeakSanitizer behavior.
49399 2023-03-07 Benson Muite <benson_muite@emailplus.org>
49401 * doc/install.texi (Prerequisites): Add link to gmplib.org.
49403 2023-03-07 Pan Li <pan2.li@intel.com>
49404 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49408 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
49410 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
49411 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
49412 * genmodes.cc (adj_precision): New.
49413 (ADJUST_PRECISION): New.
49414 (emit_mode_adjustments): Handle ADJUST_PRECISION.
49416 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
49418 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
49420 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
49422 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
49423 {s|u}{max|min} in QI, HI and DI modes.
49424 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
49425 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
49426 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
49427 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
49430 2023-03-06 Richard Biener <rguenther@suse.de>
49432 PR tree-optimization/109025
49433 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
49434 the inner LC PHI use is the inner loop PHI latch definition
49435 before classifying an outer PHI as double reduction.
49437 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
49440 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
49442 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
49443 (X86_TUNE_USE_SCATTER): Likewise.
49445 2023-03-06 Xi Ruoyao <xry111@xry111.site>
49448 * config/loongarch/loongarch.h (FP_RETURN): Use
49449 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
49450 (UNITS_PER_FP_ARG): Likewise.
49452 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49454 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
49455 (pass_vsetvl::backward_demand_fusion): Ditto.
49457 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49458 SiYu Wu <siyu@isrc.iscas.ac.cn>
49460 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
49462 (riscv_sm3p1_<mode>): New.
49463 (riscv_sm4ed_<mode>): New.
49464 (riscv_sm4ks_<mode>): New.
49465 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
49466 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
49467 ZKSH's built-in functions.
49469 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49470 SiYu Wu <siyu@isrc.iscas.ac.cn>
49472 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
49473 (riscv_sha256sig1_<mode>): New.
49474 (riscv_sha256sum0_<mode>): New.
49475 (riscv_sha256sum1_<mode>): New.
49476 (riscv_sha512sig0h): New.
49477 (riscv_sha512sig0l): New.
49478 (riscv_sha512sig1h): New.
49479 (riscv_sha512sig1l): New.
49480 (riscv_sha512sum0r): New.
49481 (riscv_sha512sum1r): New.
49482 (riscv_sha512sig0): New.
49483 (riscv_sha512sig1): New.
49484 (riscv_sha512sum0): New.
49485 (riscv_sha512sum1): New.
49486 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
49487 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
49488 built-in functions.
49489 (DIRECT_BUILTIN): Add new.
49491 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49492 SiYu Wu <siyu@isrc.iscas.ac.cn>
49494 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
49496 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
49497 (riscv_aes32dsmi): New.
49498 (riscv_aes64ds): New.
49499 (riscv_aes64dsm): New.
49500 (riscv_aes64im): New.
49501 (riscv_aes64ks1i): New.
49502 (riscv_aes64ks2): New.
49503 (riscv_aes32esi): New.
49504 (riscv_aes32esmi): New.
49505 (riscv_aes64es): New.
49506 (riscv_aes64esm): New.
49507 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
49508 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
49509 ZKNE's built-in functions.
49511 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49512 SiYu Wu <siyu@isrc.iscas.ac.cn>
49514 * config/riscv/bitmanip.md: Add ZBKB's instructions.
49515 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
49516 * config/riscv/riscv.md: Add new type for crypto instructions.
49517 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
49519 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
49520 extension's built-in function file.
49522 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
49523 SiYu Wu <siyu@isrc.iscas.ac.cn>
49525 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
49526 (RISCV_FTYPE_NAME3): New.
49527 (RISCV_ATYPE_QI): New.
49528 (RISCV_ATYPE_HI): New.
49529 (RISCV_FTYPE_ATYPES2): New.
49530 (RISCV_FTYPE_ATYPES3): New.
49531 * config/riscv/riscv-ftypes.def (2): New.
49534 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
49536 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
49539 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49540 kito-cheng <kito.cheng@sifive.com>
49542 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
49543 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
49544 (riscv_register_pragmas): Add builtin function check call.
49545 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
49546 (check_builtin_call): New function.
49547 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
49548 (class vreinterpret): Ditto.
49549 (class vlmul_ext): Ditto.
49550 (class vlmul_trunc): Ditto.
49551 (class vset): Ditto.
49552 (class vget): Ditto.
49554 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49555 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
49571 (vundefined): Add new intrinsic.
49572 (vreinterpret): Ditto.
49573 (vlmul_ext): Ditto.
49574 (vlmul_trunc): Ditto.
49577 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
49578 (struct narrow_alu_def): Ditto.
49579 (struct reduc_alu_def): Ditto.
49580 (struct vundefined_def): Ditto.
49581 (struct misc_def): Ditto.
49582 (struct vset_def): Ditto.
49583 (struct vget_def): Ditto.
49585 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49586 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
49587 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
49588 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
49589 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
49590 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
49591 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
49592 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
49593 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
49594 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
49595 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
49596 (DEF_RVV_LMUL1_OPS): Ditto.
49597 (DEF_RVV_LMUL2_OPS): Ditto.
49598 (DEF_RVV_LMUL4_OPS): Ditto.
49599 (vint16mf4_t): Ditto.
49600 (vint16mf2_t): Ditto.
49601 (vint16m1_t): Ditto.
49602 (vint16m2_t): Ditto.
49603 (vint16m4_t): Ditto.
49604 (vint16m8_t): Ditto.
49605 (vint32mf2_t): Ditto.
49606 (vint32m1_t): Ditto.
49607 (vint32m2_t): Ditto.
49608 (vint32m4_t): Ditto.
49609 (vint32m8_t): Ditto.
49610 (vint64m1_t): Ditto.
49611 (vint64m2_t): Ditto.
49612 (vint64m4_t): Ditto.
49613 (vint64m8_t): Ditto.
49614 (vuint16mf4_t): Ditto.
49615 (vuint16mf2_t): Ditto.
49616 (vuint16m1_t): Ditto.
49617 (vuint16m2_t): Ditto.
49618 (vuint16m4_t): Ditto.
49619 (vuint16m8_t): Ditto.
49620 (vuint32mf2_t): Ditto.
49621 (vuint32m1_t): Ditto.
49622 (vuint32m2_t): Ditto.
49623 (vuint32m4_t): Ditto.
49624 (vuint32m8_t): Ditto.
49625 (vuint64m1_t): Ditto.
49626 (vuint64m2_t): Ditto.
49627 (vuint64m4_t): Ditto.
49628 (vuint64m8_t): Ditto.
49629 (vint8mf4_t): Ditto.
49630 (vint8mf2_t): Ditto.
49631 (vint8m1_t): Ditto.
49632 (vint8m2_t): Ditto.
49633 (vint8m4_t): Ditto.
49634 (vint8m8_t): Ditto.
49635 (vuint8mf4_t): Ditto.
49636 (vuint8mf2_t): Ditto.
49637 (vuint8m1_t): Ditto.
49638 (vuint8m2_t): Ditto.
49639 (vuint8m4_t): Ditto.
49640 (vuint8m8_t): Ditto.
49641 (vint8mf8_t): Ditto.
49642 (vuint8mf8_t): Ditto.
49643 (vfloat32mf2_t): Ditto.
49644 (vfloat32m1_t): Ditto.
49645 (vfloat32m2_t): Ditto.
49646 (vfloat32m4_t): Ditto.
49647 (vfloat64m1_t): Ditto.
49648 (vfloat64m2_t): Ditto.
49649 (vfloat64m4_t): Ditto.
49650 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
49651 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
49652 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
49653 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
49654 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
49655 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
49656 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
49657 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
49658 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
49659 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
49660 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
49661 (DEF_RVV_LMUL1_OPS): Ditto.
49662 (DEF_RVV_LMUL2_OPS): Ditto.
49663 (DEF_RVV_LMUL4_OPS): Ditto.
49664 (DEF_RVV_TYPE_INDEX): Ditto.
49665 (required_extensions_p): Adapt for new intrinsic support/
49666 (get_required_extensions): New function.
49667 (check_required_extensions): Ditto.
49668 (unsigned_base_type_p): Remove.
49669 (rvv_arg_type_info::get_scalar_ptr_type): New function.
49670 (get_mode_for_bitsize): Remove.
49671 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
49672 (rvv_arg_type_info::get_base_vector_type): Ditto.
49673 (rvv_arg_type_info::get_function_type_index): Ditto.
49674 (DEF_RVV_BASE_TYPE): New def.
49675 (function_builder::apply_predication): New class.
49676 (function_expander::mask_mode): Ditto.
49677 (function_checker::function_checker): Ditto.
49678 (function_checker::report_non_ice): Ditto.
49679 (function_checker::report_out_of_range): Ditto.
49680 (function_checker::require_immediate): Ditto.
49681 (function_checker::require_immediate_range): Ditto.
49682 (function_checker::check): Ditto.
49683 (check_builtin_call): Ditto.
49684 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
49685 (DEF_RVV_BASE_TYPE): Ditto.
49686 (DEF_RVV_TYPE_INDEX): Ditto.
49687 (vbool64_t): Ditto.
49688 (vbool32_t): Ditto.
49689 (vbool16_t): Ditto.
49694 (vuint8mf8_t): Ditto.
49695 (vuint8mf4_t): Ditto.
49696 (vuint8mf2_t): Ditto.
49697 (vuint8m1_t): Ditto.
49698 (vuint8m2_t): Ditto.
49699 (vint8m4_t): Ditto.
49700 (vuint8m4_t): Ditto.
49701 (vint8m8_t): Ditto.
49702 (vuint8m8_t): Ditto.
49703 (vint16mf4_t): Ditto.
49704 (vuint16mf2_t): Ditto.
49705 (vuint16m1_t): Ditto.
49706 (vuint16m2_t): Ditto.
49707 (vuint16m4_t): Ditto.
49708 (vuint16m8_t): Ditto.
49709 (vint32mf2_t): Ditto.
49710 (vuint32m1_t): Ditto.
49711 (vuint32m2_t): Ditto.
49712 (vuint32m4_t): Ditto.
49713 (vuint32m8_t): Ditto.
49714 (vuint64m1_t): Ditto.
49715 (vuint64m2_t): Ditto.
49716 (vuint64m4_t): Ditto.
49717 (vuint64m8_t): Ditto.
49718 (vfloat32mf2_t): Ditto.
49719 (vfloat32m1_t): Ditto.
49720 (vfloat32m2_t): Ditto.
49721 (vfloat32m4_t): Ditto.
49722 (vfloat32m8_t): Ditto.
49723 (vfloat64m1_t): Ditto.
49724 (vfloat64m4_t): Ditto.
49725 (vector): Move it def.
49728 (signed_vector): Ditto.
49729 (unsigned_vector): Ditto.
49730 (unsigned_scalar): Ditto.
49731 (vector_ptr): Ditto.
49732 (scalar_ptr): Ditto.
49733 (scalar_const_ptr): Ditto.
49737 (unsigned_long): Ditto.
49739 (eew8_index): Ditto.
49740 (eew16_index): Ditto.
49741 (eew32_index): Ditto.
49742 (eew64_index): Ditto.
49743 (shift_vector): Ditto.
49744 (double_trunc_vector): Ditto.
49745 (quad_trunc_vector): Ditto.
49746 (oct_trunc_vector): Ditto.
49747 (double_trunc_scalar): Ditto.
49748 (double_trunc_signed_vector): Ditto.
49749 (double_trunc_unsigned_vector): Ditto.
49750 (double_trunc_unsigned_scalar): Ditto.
49751 (double_trunc_float_vector): Ditto.
49752 (float_vector): Ditto.
49753 (lmul1_vector): Ditto.
49754 (widen_lmul1_vector): Ditto.
49755 (eew8_interpret): Ditto.
49756 (eew16_interpret): Ditto.
49757 (eew32_interpret): Ditto.
49758 (eew64_interpret): Ditto.
49759 (vlmul_ext_x2): Ditto.
49760 (vlmul_ext_x4): Ditto.
49761 (vlmul_ext_x8): Ditto.
49762 (vlmul_ext_x16): Ditto.
49763 (vlmul_ext_x32): Ditto.
49764 (vlmul_ext_x64): Ditto.
49765 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
49766 (struct function_type_info): New function.
49767 (struct rvv_arg_type_info): Ditto.
49768 (class function_checker): New class.
49769 (rvv_arg_type_info::get_scalar_type): New function.
49770 (rvv_arg_type_info::get_vector_type): Ditto.
49771 (function_expander::ret_mode): New function.
49772 (function_checker::arg_mode): Ditto.
49773 (function_checker::ret_mode): Ditto.
49774 * config/riscv/t-riscv: Add generator.
49775 * config/riscv/vector-iterators.md: New iterators.
49776 * config/riscv/vector.md (vundefined<mode>): New pattern.
49777 (@vundefined<mode>): Ditto.
49778 (@vreinterpret<mode>): Ditto.
49779 (@vlmul_extx2<mode>): Ditto.
49780 (@vlmul_extx4<mode>): Ditto.
49781 (@vlmul_extx8<mode>): Ditto.
49782 (@vlmul_extx16<mode>): Ditto.
49783 (@vlmul_extx32<mode>): Ditto.
49784 (@vlmul_extx64<mode>): Ditto.
49785 (*vlmul_extx2<mode>): Ditto.
49786 (*vlmul_extx4<mode>): Ditto.
49787 (*vlmul_extx8<mode>): Ditto.
49788 (*vlmul_extx16<mode>): Ditto.
49789 (*vlmul_extx32<mode>): Ditto.
49790 (*vlmul_extx64<mode>): Ditto.
49791 * config/riscv/genrvv-type-indexer.cc: New file.
49793 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49795 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
49796 (slide1_sew64_helper): New function.
49797 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
49798 (get_unknown_min_value): Ditto.
49799 (force_vector_length_operand): Ditto.
49800 (gen_no_side_effects_vsetvl_rtx): Ditto.
49801 (get_vl_x2_rtx): Ditto.
49802 (slide1_sew64_helper): Ditto.
49803 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
49804 (class vrgather): Ditto.
49805 (class vrgatherei16): Ditto.
49806 (class vcompress): Ditto.
49808 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49809 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
49810 (vslidedown): Ditto.
49811 (vslide1up): Ditto.
49812 (vslide1down): Ditto.
49813 (vfslide1up): Ditto.
49814 (vfslide1down): Ditto.
49816 (vrgatherei16): Ditto.
49817 (vcompress): Ditto.
49818 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
49819 (vint8mf8_t): Ditto.
49820 (vint8mf4_t): Ditto.
49821 (vint8mf2_t): Ditto.
49822 (vint8m1_t): Ditto.
49823 (vint8m2_t): Ditto.
49824 (vint8m4_t): Ditto.
49825 (vint16mf4_t): Ditto.
49826 (vint16mf2_t): Ditto.
49827 (vint16m1_t): Ditto.
49828 (vint16m2_t): Ditto.
49829 (vint16m4_t): Ditto.
49830 (vint16m8_t): Ditto.
49831 (vint32mf2_t): Ditto.
49832 (vint32m1_t): Ditto.
49833 (vint32m2_t): Ditto.
49834 (vint32m4_t): Ditto.
49835 (vint32m8_t): Ditto.
49836 (vint64m1_t): Ditto.
49837 (vint64m2_t): Ditto.
49838 (vint64m4_t): Ditto.
49839 (vint64m8_t): Ditto.
49840 (vuint8mf8_t): Ditto.
49841 (vuint8mf4_t): Ditto.
49842 (vuint8mf2_t): Ditto.
49843 (vuint8m1_t): Ditto.
49844 (vuint8m2_t): Ditto.
49845 (vuint8m4_t): Ditto.
49846 (vuint16mf4_t): Ditto.
49847 (vuint16mf2_t): Ditto.
49848 (vuint16m1_t): Ditto.
49849 (vuint16m2_t): Ditto.
49850 (vuint16m4_t): Ditto.
49851 (vuint16m8_t): Ditto.
49852 (vuint32mf2_t): Ditto.
49853 (vuint32m1_t): Ditto.
49854 (vuint32m2_t): Ditto.
49855 (vuint32m4_t): Ditto.
49856 (vuint32m8_t): Ditto.
49857 (vuint64m1_t): Ditto.
49858 (vuint64m2_t): Ditto.
49859 (vuint64m4_t): Ditto.
49860 (vuint64m8_t): Ditto.
49861 (vfloat32mf2_t): Ditto.
49862 (vfloat32m1_t): Ditto.
49863 (vfloat32m2_t): Ditto.
49864 (vfloat32m4_t): Ditto.
49865 (vfloat32m8_t): Ditto.
49866 (vfloat64m1_t): Ditto.
49867 (vfloat64m2_t): Ditto.
49868 (vfloat64m4_t): Ditto.
49869 (vfloat64m8_t): Ditto.
49870 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
49871 * config/riscv/riscv.md: Adjust RVV instruction types.
49872 * config/riscv/vector-iterators.md (down): New iterator.
49873 (=vd,vr): New attribute.
49874 (UNSPEC_VSLIDE1UP): New unspec.
49875 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
49876 (*pred_slide<ud><mode>): Ditto.
49877 (*pred_slide<ud><mode>_extended): Ditto.
49878 (@pred_gather<mode>): Ditto.
49879 (@pred_gather<mode>_scalar): Ditto.
49880 (@pred_gatherei16<mode>): Ditto.
49881 (@pred_compress<mode>): Ditto.
49883 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49885 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
49887 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
49889 * config/riscv/constraints.md (Wb1): New constraint.
49890 * config/riscv/predicates.md
49891 (vector_least_significant_set_mask_operand): New predicate.
49892 (vector_broadcast_mask_operand): Ditto.
49893 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
49894 (gen_scalar_move_mask): New function.
49895 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
49896 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
49897 (class vmv_s): Ditto.
49899 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
49900 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
49904 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
49906 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
49907 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
49908 (function_expander::use_exact_insn): New function.
49909 (function_expander::use_contiguous_load_insn): New function.
49910 (function_expander::use_contiguous_store_insn): New function.
49911 (function_expander::use_ternop_insn): New function.
49912 (function_expander::use_widen_ternop_insn): New function.
49913 (function_expander::use_scalar_move_insn): New function.
49914 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
49915 * config/riscv/riscv-vector-builtins.h
49916 (function_expander::add_scalar_move_mask_operand): New class.
49917 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
49918 (scalar_move_insn_p): Ditto.
49919 (has_vsetvl_killed_avl_p): Ditto.
49920 (anticipatable_occurrence_p): Ditto.
49921 (insert_vsetvl): Ditto.
49922 (get_vl_vtype_info): Ditto.
49923 (calculate_sew): Ditto.
49924 (calculate_vlmul): Ditto.
49925 (incompatible_avl_p): Ditto.
49926 (different_sew_p): Ditto.
49927 (different_lmul_p): Ditto.
49928 (different_ratio_p): Ditto.
49929 (different_tail_policy_p): Ditto.
49930 (different_mask_policy_p): Ditto.
49931 (possible_zero_avl_p): Ditto.
49932 (first_ratio_invalid_for_second_sew_p): Ditto.
49933 (first_ratio_invalid_for_second_lmul_p): Ditto.
49934 (second_ratio_invalid_for_first_sew_p): Ditto.
49935 (second_ratio_invalid_for_first_lmul_p): Ditto.
49936 (second_sew_less_than_first_sew_p): Ditto.
49937 (first_sew_less_than_second_sew_p): Ditto.
49938 (compare_lmul): Ditto.
49939 (second_lmul_less_than_first_lmul_p): Ditto.
49940 (first_lmul_less_than_second_lmul_p): Ditto.
49941 (first_ratio_less_than_second_ratio_p): Ditto.
49942 (second_ratio_less_than_first_ratio_p): Ditto.
49943 (DEF_INCOMPATIBLE_COND): Ditto.
49944 (greatest_sew): Ditto.
49945 (first_sew): Ditto.
49946 (second_sew): Ditto.
49947 (first_vlmul): Ditto.
49948 (second_vlmul): Ditto.
49949 (first_ratio): Ditto.
49950 (second_ratio): Ditto.
49951 (vlmul_for_first_sew_second_ratio): Ditto.
49952 (ratio_for_second_sew_first_vlmul): Ditto.
49953 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
49954 (always_unavailable): Ditto.
49955 (avl_unavailable_p): Ditto.
49956 (sew_unavailable_p): Ditto.
49957 (lmul_unavailable_p): Ditto.
49958 (ge_sew_unavailable_p): Ditto.
49959 (ge_sew_lmul_unavailable_p): Ditto.
49960 (ge_sew_ratio_unavailable_p): Ditto.
49961 (DEF_UNAVAILABLE_COND): Ditto.
49962 (same_sew_lmul_demand_p): Ditto.
49963 (propagate_avl_across_demands_p): Ditto.
49964 (reg_available_p): Ditto.
49965 (avl_info::has_non_zero_avl): Ditto.
49966 (vl_vtype_info::has_non_zero_avl): Ditto.
49967 (vector_insn_info::operator>=): Refactor.
49968 (vector_insn_info::parse_insn): Adjust for scalar move.
49969 (vector_insn_info::demand_vl_vtype): Remove.
49970 (vector_insn_info::compatible_p): New function.
49971 (vector_insn_info::compatible_avl_p): Ditto.
49972 (vector_insn_info::compatible_vtype_p): Ditto.
49973 (vector_insn_info::available_p): Ditto.
49974 (vector_insn_info::merge): Ditto.
49975 (vector_insn_info::fuse_avl): Ditto.
49976 (vector_insn_info::fuse_sew_lmul): Ditto.
49977 (vector_insn_info::fuse_tail_policy): Ditto.
49978 (vector_insn_info::fuse_mask_policy): Ditto.
49979 (vector_insn_info::dump): Ditto.
49980 (vector_infos_manager::release): Ditto.
49981 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
49982 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
49983 (pass_vsetvl::hard_empty_block_p): Ditto.
49984 (pass_vsetvl::backward_demand_fusion): Ditto.
49985 (pass_vsetvl::forward_demand_fusion): Ditto.
49986 (pass_vsetvl::refine_vsetvls): Ditto.
49987 (pass_vsetvl::cleanup_vsetvls): Ditto.
49988 (pass_vsetvl::commit_vsetvls): Ditto.
49989 (pass_vsetvl::propagate_avl): Ditto.
49990 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
49991 (struct demands_pair): Ditto.
49992 (struct demands_cond): Ditto.
49993 (struct demands_fuse_rule): Ditto.
49994 * config/riscv/vector-iterators.md: New iterator.
49995 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
49996 (*pred_broadcast<mode>): Ditto.
49997 (*pred_broadcast<mode>_extended_scalar): Ditto.
49998 (@pred_extract_first<mode>): Ditto.
49999 (*pred_extract_first<mode>): Ditto.
50000 (@pred_extract_first_trunc<mode>): Ditto.
50001 * config/riscv/riscv-vsetvl.def: New file.
50003 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
50005 * config/riscv/bitmanip.md: allow 0 constant in max/min
50008 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
50010 * config/riscv/bitmanip.md: Fix wrong index in the check.
50012 2023-03-04 Jakub Jelinek <jakub@redhat.com>
50014 PR middle-end/109006
50015 * vec.cc (test_auto_alias): Adjust comment for removal of
50017 * read-rtl-function.cc (function_reader::parse_block): Likewise.
50018 * gdbhooks.py: Likewise.
50020 2023-03-04 Jakub Jelinek <jakub@redhat.com>
50022 PR testsuite/108973
50023 * selftest-diagnostic.cc
50024 (test_diagnostic_context::test_diagnostic_context): Set
50025 caret_max_width to 80.
50027 2023-03-03 Alexandre Oliva <oliva@adacore.com>
50029 * gimple-ssa-warn-access.cc
50030 (pass_waccess::check_dangling_stores): Skip non-stores.
50032 2023-03-03 Alexandre Oliva <oliva@adacore.com>
50034 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
50035 after vmsr and vmrs, and lower the case of P0.
50037 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
50039 PR middle-end/109006
50040 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
50042 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
50044 PR middle-end/109006
50045 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
50047 2023-03-03 Jakub Jelinek <jakub@redhat.com>
50050 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
50051 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
50052 suppressed on stmt. For [static %E] warning, print access_nelts
50053 rather than access_size. Fix up comment wording.
50055 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
50057 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
50058 arch14 instead of z16.
50060 2023-03-03 Anthony Green <green@moxielogic.com>
50062 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
50064 2023-03-03 Anthony Green <green@moxielogic.com>
50066 * config/moxie/constraints.md (A, B, W): Change
50067 define_constraint to define_memory_constraint.
50069 2023-03-03 Xi Ruoyao <xry111@xry111.site>
50071 * toplev.cc (process_options): Fix the spelling of
50072 "-fstack-clash-protection".
50074 2023-03-03 Richard Biener <rguenther@suse.de>
50076 PR tree-optimization/109002
50077 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
50078 PHI-translate ANTIC_IN.
50080 2023-03-03 Jakub Jelinek <jakub@redhat.com>
50082 PR tree-optimization/108988
50083 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
50084 size_type_node before passing it as argument to fwrite. Formatting
50087 2023-03-03 Richard Biener <rguenther@suse.de>
50090 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
50091 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
50092 * config/i386/i386-features.h (scalar_chain::max_visits): New.
50093 (scalar_chain::build): Add bitmap parameter, return boolean.
50094 (scalar_chain::add_insn): Likewise.
50095 (scalar_chain::analyze_register_chain): Likewise.
50096 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
50097 Initialize max_visits.
50098 (scalar_chain::analyze_register_chain): When we exhaust
50099 max_visits, abort. Also abort when running into any
50101 (scalar_chain::add_insn): Propagate abort.
50102 (scalar_chain::build): Likewise. When aborting amend
50103 the set of disallowed insn with the insns set.
50104 (convert_scalars_to_vector): Adjust. Do not convert aborted
50107 2023-03-03 Richard Biener <rguenther@suse.de>
50110 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
50111 generate a DIE for a function scope static.
50113 2023-03-03 Alexandre Oliva <oliva@adacore.com>
50115 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
50117 2023-03-02 Jakub Jelinek <jakub@redhat.com>
50120 * target.h (emit_support_tinfos_callback): New typedef.
50121 * targhooks.h (default_emit_support_tinfos): Declare.
50122 * targhooks.cc (default_emit_support_tinfos): New function.
50123 * target.def (emit_support_tinfos): New target hook.
50124 * doc/tm.texi.in (emit_support_tinfos): Document it.
50125 * doc/tm.texi: Regenerated.
50126 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
50127 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
50129 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
50131 * ira-costs.cc: Include print-rtl.h.
50132 (record_reg_classes, scan_one_insn): Add code to print debug info.
50133 (record_operand_costs): Find and use smaller cost for hard reg
50136 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
50137 Paul-Antoine Arras <pa@codesourcery.com>
50139 * builtins.cc (mathfn_built_in_explicit): New.
50140 * config/gcn/gcn.cc: Include case-cfn-macros.h.
50141 (mathfn_built_in_explicit): Add prototype.
50142 (gcn_vectorize_builtin_vectorized_function): New.
50143 (gcn_libc_has_function): New.
50144 (TARGET_LIBC_HAS_FUNCTION): Define.
50145 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
50147 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
50149 PR tree-optimization/108979
50150 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
50151 operations on invariants.
50153 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
50155 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
50156 * config/s390/s390.cc (s390_option_override_internal): Make
50157 partial vector usage the default from z13 on.
50158 * config/s390/vector.md (len_load_v16qi): Add.
50159 (len_store_v16qi): Add.
50161 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
50163 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
50164 of constant 0 offset.
50166 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
50168 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
50170 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
50172 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
50174 * config.gcc: add -with-{no-}msa build option.
50175 * config/mips/mips.h: Likewise.
50176 * doc/install.texi: Likewise.
50178 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
50180 PR tree-optimization/108603
50181 * explow.cc (convert_memory_address_addr_space_1): Only wrap
50182 the result of a recursive call in a CONST if no instructions
50185 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
50187 PR tree-optimization/108430
50188 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
50189 of inverted condition.
50191 2023-03-02 Jakub Jelinek <jakub@redhat.com>
50194 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
50195 comparison copy the bytes from ptr to a temporary buffer and clearing
50196 padding bits in there.
50198 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
50200 PR middle-end/108545
50201 * gimplify.cc (struct tree_operand_hash_no_se): New.
50202 (omp_index_mapping_groups_1, omp_index_mapping_groups,
50203 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
50204 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
50205 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
50206 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
50207 of tree_operand_hash.
50209 2023-03-01 LIU Hao <lh_mouse@126.com>
50212 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
50213 Remove the size limit `pch_VA_max_size`
50215 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
50217 PR middle-end/108546
50218 * omp-low.cc (lower_omp_target): Remove optional handling
50219 on the receiver side, i.e. inside target (data), for
50222 2023-03-01 Jakub Jelinek <jakub@redhat.com>
50225 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
50226 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
50228 2023-03-01 Richard Biener <rguenther@suse.de>
50230 PR tree-optimization/108970
50231 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
50232 Check we can copy the BBs.
50233 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
50235 (vect_do_peeling): Streamline error handling.
50237 2023-03-01 Richard Biener <rguenther@suse.de>
50239 PR tree-optimization/108950
50240 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
50241 Check oprnd0 is defined in the loop.
50242 * tree-vect-loop.cc (vectorizable_reduction): Record all
50243 operands vector types, compute that of invariants and
50244 properly update their SLP nodes.
50246 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
50249 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
50250 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
50252 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
50254 PR middle-end/107411
50255 PR middle-end/107411
50256 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
50258 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
50259 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
50261 2023-02-28 Jakub Jelinek <jakub@redhat.com>
50263 PR sanitizer/108894
50264 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
50265 comparison rather than index > bound.
50266 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
50267 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
50268 * doc/invoke.texi (-fsanitize=bounds): Document that whether
50269 flexible array member-like arrays are instrumented or not depends
50270 on -fstrict-flex-arrays* options of strict_flex_array attributes.
50271 (-fsanitize=bounds-strict): Document that flexible array members
50272 are not instrumented.
50274 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
50278 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
50279 (fmod<mode>3): Ditto.
50280 (fpremxf4_i387): Ditto.
50281 (reminderxf3): Ditto.
50282 (reminder<mode>3): Ditto.
50283 (fprem1xf4_i387): Ditto.
50285 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
50287 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
50288 generating FFS with mismatched operand and result modes, by using
50289 an explicit SIGN_EXTEND/ZERO_EXTEND.
50290 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
50291 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
50293 2023-02-27 Patrick Palka <ppalka@redhat.com>
50295 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
50296 * lra-int.h (lra_change_class): Likewise.
50297 * recog.h (which_op_alt): Likewise.
50298 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
50301 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50303 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
50305 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
50307 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
50308 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
50310 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
50312 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
50313 (xtensa_get_config_v3): New functions.
50315 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
50317 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
50319 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
50321 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
50322 the macro to 0x1000000000.
50324 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
50327 * doc/gm2.texi (-fm2-pathname): New option documented.
50328 (-fm2-pathnameI): New option documented.
50329 (-fm2-prefix=): New option documented.
50330 (-fruntime-modules=): Update default module list.
50332 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
50335 * config/xtensa/xtensa-protos.h
50336 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
50337 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
50338 to xtensa_expand_call.
50339 (xtensa_expand_call): Emit the call and add a clobber expression
50340 for the static chain to it in case of windowed ABI.
50341 * config/xtensa/xtensa.md (call, call_value, sibcall)
50342 (sibcall_value): Call xtensa_expand_call and complete expansion
50343 right after that call.
50345 2023-02-24 Richard Biener <rguenther@suse.de>
50347 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
50348 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
50349 changing alignment of vec<T, A, vl_embed> and simplifying
50351 (vec<T, A, vl_embed>::address): Compute as this + 1.
50352 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
50353 vector instead of the offset of the m_vecdata member.
50354 (auto_vec<T, N>::m_data): Turn storage into
50355 uninitialized unsigned char.
50356 (auto_vec<T, N>::auto_vec): Allow allocation of one
50357 stack member. Initialize m_vec in a special way to
50358 avoid later stringop overflow diagnostics.
50359 * vec.cc (test_auto_alias): New.
50360 (vec_cc_tests): Call it.
50362 2023-02-24 Richard Biener <rguenther@suse.de>
50364 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
50365 take a const reference to the object, use address to
50367 (vec<T, A, vl_embed>::contains): Use address to access data.
50368 (vec<T, A, vl_embed>::operator[]): Use address instead of
50369 m_vecdata to access data.
50370 (vec<T, A, vl_embed>::iterate): Likewise.
50371 (vec<T, A, vl_embed>::copy): Likewise.
50372 (vec<T, A, vl_embed>::quick_push): Likewise.
50373 (vec<T, A, vl_embed>::pop): Likewise.
50374 (vec<T, A, vl_embed>::quick_insert): Likewise.
50375 (vec<T, A, vl_embed>::ordered_remove): Likewise.
50376 (vec<T, A, vl_embed>::unordered_remove): Likewise.
50377 (vec<T, A, vl_embed>::block_remove): Likewise.
50378 (vec<T, A, vl_heap>::address): Likewise.
50380 2023-02-24 Martin Liska <mliska@suse.cz>
50382 PR sanitizer/108834
50383 * asan.cc (asan_add_global): Use proper TU name for normal
50384 global variables (and aux_base_name for the artificial one).
50386 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50388 * config/i386/i386-builtin.def: Update description of BDESC
50389 and BDESC_FIRST in file comment to include mask2.
50391 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
50393 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
50395 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50397 PR middle-end/108854
50398 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
50399 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
50400 nodes and adjust their DECL_CONTEXT.
50402 2023-02-24 Jakub Jelinek <jakub@redhat.com>
50405 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
50406 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
50407 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
50408 __builtin_ia32_cvtne2ps2bf16_v8bf,
50409 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
50410 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
50411 __builtin_ia32_cvtneps2bf16_v8sf_mask,
50412 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
50413 __builtin_ia32_cvtneps2bf16_v4sf_mask,
50414 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
50415 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
50416 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
50417 __builtin_ia32_dpbf16ps_v4sf_mask,
50418 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
50419 OPTION_MASK_ISA_AVX512VL.
50421 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
50423 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
50424 Add non-compact 32-bit multilibs.
50426 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
50428 * config/mips/mips.md (*clo<mode>2): New pattern.
50430 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
50432 * config/mips/mips.h (machine_function): New variable
50433 use_hazard_barrier_return_p.
50434 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
50435 (mips_hb_return_internal): New insn pattern.
50436 * config/mips/mips.cc (mips_attribute_table): Add attribute
50437 use_hazard_barrier_return.
50438 (mips_use_hazard_barrier_return_p): New static function.
50439 (mips_function_attr_inlinable_p): Likewise.
50440 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
50441 Emit error for unsupported architecture choice.
50442 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
50443 Return false for use_hazard_barrier_return.
50444 (mips_expand_epilogue): Emit hazard barrier return.
50445 * doc/extend.texi: Document use_hazard_barrier_return.
50447 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50449 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
50450 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
50451 for the gcc-internal headers.
50453 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50455 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
50456 and $(POSTCOMPILE) instead of manual dependency listing.
50457 * config/xtensa/xtensa-dynconfig.c: Rename to ...
50458 * config/xtensa/xtensa-dynconfig.cc: ... this.
50460 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
50462 * doc/cfg.texi: Reorder index entries around @items.
50463 * doc/cpp.texi: Ditto.
50464 * doc/cppenv.texi: Ditto.
50465 * doc/cppopts.texi: Ditto.
50466 * doc/generic.texi: Ditto.
50467 * doc/install.texi: Ditto.
50468 * doc/extend.texi: Ditto.
50469 * doc/invoke.texi: Ditto.
50470 * doc/md.texi: Ditto.
50471 * doc/rtl.texi: Ditto.
50472 * doc/tm.texi.in: Ditto.
50473 * doc/trouble.texi: Ditto.
50474 * doc/tm.texi: Regenerate.
50476 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50478 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
50479 the occurrence of general-purpose register used only once and for
50480 transferring intermediate value.
50482 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50484 * config/xtensa/xtensa.cc (machine_function): Add new member
50485 'eliminated_callee_saved_bmp'.
50486 (xtensa_can_eliminate_callee_saved_reg_p): New function to
50487 determine whether the register can be eliminated or not.
50488 (xtensa_expand_prologue): Add invoking the above function and
50489 elimination the use of callee-saved register by using its stack
50490 slot through the stack pointer (or the frame pointer if needed)
50492 (xtensa_expand_prologue): Modify to not emit register restoration
50493 insn from its stack slot if the register is already eliminated.
50495 2023-02-23 Jakub Jelinek <jakub@redhat.com>
50497 PR translation/108890
50498 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
50499 around fatal_error format strings.
50501 2023-02-23 Richard Biener <rguenther@suse.de>
50503 * tree-ssa-structalias.cc (handle_lhs_call): Do not
50504 re-create rhsc, only truncate it.
50506 2023-02-23 Jakub Jelinek <jakub@redhat.com>
50508 PR middle-end/106258
50509 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
50510 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
50512 2023-02-23 Richard Biener <rguenther@suse.de>
50514 * tree-if-conv.cc (tree_if_conversion): Properly manage
50515 memory of refs and the contained data references.
50517 2023-02-23 Richard Biener <rguenther@suse.de>
50519 PR tree-optimization/108888
50520 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
50521 calls to predicate.
50522 (predicate_statements): Only predicate calls with PLF_2.
50524 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50526 * config/xtensa/xtensa.md
50527 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
50528 Add missing "SI:" to PLUS RTXes.
50530 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50533 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
50534 Emit (use (reg:SI A0_REG)) at the end in the sibling call
50535 (i.e. the same place as (return) in the normal call).
50537 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
50540 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
50543 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
50545 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
50546 (sibcall_value, sibcall_value_internal): Add 'use' expression
50549 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
50551 * doc/cppdiropts.texi: Reorder @opindex commands to precede
50552 @items they relate to.
50553 * doc/cppopts.texi: Ditto.
50554 * doc/cppwarnopts.texi: Ditto.
50555 * doc/invoke.texi: Ditto.
50556 * doc/lto.texi: Ditto.
50558 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
50560 * internal-fn.cc (expand_MASK_CALL): New.
50561 * internal-fn.def (MASK_CALL): New.
50562 * internal-fn.h (expand_MASK_CALL): New prototype.
50563 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
50564 for mask arguments also.
50565 * tree-if-conv.cc: Include cgraph.h.
50566 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
50567 (predicate_statements): Convert functions to IFN_MASK_CALL.
50568 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
50569 IFN_MASK_CALL as a SIMD function call.
50570 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
50571 IFN_MASK_CALL as an inbranch SIMD function call.
50572 Generate the mask vector arguments.
50574 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50576 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
50577 (class widen_reducop): Ditto.
50578 (class freducop): Ditto.
50579 (class widen_freducop): Ditto.
50581 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
50582 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
50591 (vwredsumu): Ditto.
50592 (vfredusum): Ditto.
50593 (vfredosum): Ditto.
50596 (vfwredosum): Ditto.
50597 (vfwredusum): Ditto.
50598 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
50600 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
50601 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
50602 (DEF_RVV_WU_OPS): Ditto.
50603 (DEF_RVV_WF_OPS): Ditto.
50604 (vint8mf8_t): Ditto.
50605 (vint8mf4_t): Ditto.
50606 (vint8mf2_t): Ditto.
50607 (vint8m1_t): Ditto.
50608 (vint8m2_t): Ditto.
50609 (vint8m4_t): Ditto.
50610 (vint8m8_t): Ditto.
50611 (vint16mf4_t): Ditto.
50612 (vint16mf2_t): Ditto.
50613 (vint16m1_t): Ditto.
50614 (vint16m2_t): Ditto.
50615 (vint16m4_t): Ditto.
50616 (vint16m8_t): Ditto.
50617 (vint32mf2_t): Ditto.
50618 (vint32m1_t): Ditto.
50619 (vint32m2_t): Ditto.
50620 (vint32m4_t): Ditto.
50621 (vint32m8_t): Ditto.
50622 (vuint8mf8_t): Ditto.
50623 (vuint8mf4_t): Ditto.
50624 (vuint8mf2_t): Ditto.
50625 (vuint8m1_t): Ditto.
50626 (vuint8m2_t): Ditto.
50627 (vuint8m4_t): Ditto.
50628 (vuint8m8_t): Ditto.
50629 (vuint16mf4_t): Ditto.
50630 (vuint16mf2_t): Ditto.
50631 (vuint16m1_t): Ditto.
50632 (vuint16m2_t): Ditto.
50633 (vuint16m4_t): Ditto.
50634 (vuint16m8_t): Ditto.
50635 (vuint32mf2_t): Ditto.
50636 (vuint32m1_t): Ditto.
50637 (vuint32m2_t): Ditto.
50638 (vuint32m4_t): Ditto.
50639 (vuint32m8_t): Ditto.
50640 (vfloat32mf2_t): Ditto.
50641 (vfloat32m1_t): Ditto.
50642 (vfloat32m2_t): Ditto.
50643 (vfloat32m4_t): Ditto.
50644 (vfloat32m8_t): Ditto.
50645 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
50646 (DEF_RVV_WU_OPS): Ditto.
50647 (DEF_RVV_WF_OPS): Ditto.
50648 (required_extensions_p): Add reduction support.
50649 (rvv_arg_type_info::get_base_vector_type): Ditto.
50650 (rvv_arg_type_info::get_tree_type): Ditto.
50651 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
50652 * config/riscv/riscv.md: Ditto.
50653 * config/riscv/vector-iterators.md (minu): Ditto.
50654 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
50655 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
50656 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
50657 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
50658 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
50659 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
50660 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
50662 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
50664 * config/riscv/iterators.md: New iterator.
50665 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
50666 (enum ternop_type): New enum.
50667 (class vmacc): New class.
50668 (class imac): Ditto.
50669 (class vnmsac): Ditto.
50670 (enum widen_ternop_type): New enum.
50671 (class vmadd): Ditto.
50672 (class vnmsub): Ditto.
50673 (class iwmac): Ditto.
50674 (class vwmacc): Ditto.
50675 (class vwmaccu): Ditto.
50676 (class vwmaccsu): Ditto.
50677 (class vwmaccus): Ditto.
50678 (class reverse_binop): Ditto.
50679 (class vfmacc): Ditto.
50680 (class vfnmsac): Ditto.
50681 (class vfmadd): Ditto.
50682 (class vfnmsub): Ditto.
50683 (class vfnmacc): Ditto.
50684 (class vfmsac): Ditto.
50685 (class vfnmadd): Ditto.
50686 (class vfmsub): Ditto.
50687 (class vfwmacc): Ditto.
50688 (class vfwnmacc): Ditto.
50689 (class vfwmsac): Ditto.
50690 (class vfwnmsac): Ditto.
50691 (class float_misc): Ditto.
50692 (class fcmp): Ditto.
50693 (class vfclass): Ditto.
50694 (class vfcvt_x): Ditto.
50695 (class vfcvt_rtz_x): Ditto.
50696 (class vfcvt_f): Ditto.
50697 (class vfwcvt_x): Ditto.
50698 (class vfwcvt_rtz_x): Ditto.
50699 (class vfwcvt_f): Ditto.
50700 (class vfncvt_x): Ditto.
50701 (class vfncvt_rtz_x): Ditto.
50702 (class vfncvt_f): Ditto.
50703 (class vfncvt_rod_f): Ditto.
50705 * config/riscv/riscv-vector-builtins-bases.h:
50706 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
50750 (vfcvt_rtz_x): Ditto.
50751 (vfcvt_rtz_xu): Ditto.
50754 (vfwcvt_xu): Ditto.
50755 (vfwcvt_rtz_x): Ditto.
50756 (vfwcvt_rtz_xu): Ditto.
50759 (vfncvt_xu): Ditto.
50760 (vfncvt_rtz_x): Ditto.
50761 (vfncvt_rtz_xu): Ditto.
50763 (vfncvt_rod_f): Ditto.
50764 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
50765 (struct move_def): Ditto.
50766 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
50767 (DEF_RVV_CONVERT_I_OPS): Ditto.
50768 (DEF_RVV_CONVERT_U_OPS): Ditto.
50769 (DEF_RVV_WCONVERT_I_OPS): Ditto.
50770 (DEF_RVV_WCONVERT_U_OPS): Ditto.
50771 (DEF_RVV_WCONVERT_F_OPS): Ditto.
50772 (vfloat64m1_t): Ditto.
50773 (vfloat64m2_t): Ditto.
50774 (vfloat64m4_t): Ditto.
50775 (vfloat64m8_t): Ditto.
50776 (vint32mf2_t): Ditto.
50777 (vint32m1_t): Ditto.
50778 (vint32m2_t): Ditto.
50779 (vint32m4_t): Ditto.
50780 (vint32m8_t): Ditto.
50781 (vint64m1_t): Ditto.
50782 (vint64m2_t): Ditto.
50783 (vint64m4_t): Ditto.
50784 (vint64m8_t): Ditto.
50785 (vuint32mf2_t): Ditto.
50786 (vuint32m1_t): Ditto.
50787 (vuint32m2_t): Ditto.
50788 (vuint32m4_t): Ditto.
50789 (vuint32m8_t): Ditto.
50790 (vuint64m1_t): Ditto.
50791 (vuint64m2_t): Ditto.
50792 (vuint64m4_t): Ditto.
50793 (vuint64m8_t): Ditto.
50794 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
50795 (DEF_RVV_CONVERT_U_OPS): Ditto.
50796 (DEF_RVV_WCONVERT_I_OPS): Ditto.
50797 (DEF_RVV_WCONVERT_U_OPS): Ditto.
50798 (DEF_RVV_WCONVERT_F_OPS): Ditto.
50799 (DEF_RVV_F_OPS): Ditto.
50800 (DEF_RVV_WEXTF_OPS): Ditto.
50801 (required_extensions_p): Adjust for floating-point support.
50802 (check_required_extensions): Ditto.
50803 (unsigned_base_type_p): Ditto.
50804 (get_mode_for_bitsize): Ditto.
50805 (rvv_arg_type_info::get_base_vector_type): Ditto.
50806 (rvv_arg_type_info::get_tree_type): Ditto.
50807 * config/riscv/riscv-vector-builtins.def (v_f): New define.
50810 (xu_v): New define.
50812 (xu_w): New define.
50813 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
50814 (function_expander::arg_mode): New function.
50815 * config/riscv/vector-iterators.md (sof): New iterator.
50821 (fixuns_trunc): Ditto.
50823 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
50824 (@pred_<optab><mode>): Ditto.
50825 (@pred_<optab><mode>_scalar): Ditto.
50826 (@pred_<optab><mode>_reverse_scalar): Ditto.
50827 (@pred_<copysign><mode>): Ditto.
50828 (@pred_<copysign><mode>_scalar): Ditto.
50829 (@pred_mul_<optab><mode>): Ditto.
50830 (pred_mul_<optab><mode>_undef_merge): Ditto.
50831 (*pred_<madd_nmsub><mode>): Ditto.
50832 (*pred_<macc_nmsac><mode>): Ditto.
50833 (*pred_mul_<optab><mode>): Ditto.
50834 (@pred_mul_<optab><mode>_scalar): Ditto.
50835 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
50836 (*pred_<madd_nmsub><mode>_scalar): Ditto.
50837 (*pred_<macc_nmsac><mode>_scalar): Ditto.
50838 (*pred_mul_<optab><mode>_scalar): Ditto.
50839 (@pred_neg_mul_<optab><mode>): Ditto.
50840 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
50841 (*pred_<nmadd_msub><mode>): Ditto.
50842 (*pred_<nmacc_msac><mode>): Ditto.
50843 (*pred_neg_mul_<optab><mode>): Ditto.
50844 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
50845 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
50846 (*pred_<nmadd_msub><mode>_scalar): Ditto.
50847 (*pred_<nmacc_msac><mode>_scalar): Ditto.
50848 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
50849 (@pred_<misc_op><mode>): Ditto.
50850 (@pred_class<mode>): Ditto.
50851 (@pred_dual_widen_<optab><mode>): Ditto.
50852 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
50853 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
50854 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
50855 (@pred_widen_mul_<optab><mode>): Ditto.
50856 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
50857 (@pred_widen_neg_mul_<optab><mode>): Ditto.
50858 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
50859 (@pred_cmp<mode>): Ditto.
50860 (*pred_cmp<mode>): Ditto.
50861 (*pred_cmp<mode>_narrow): Ditto.
50862 (@pred_cmp<mode>_scalar): Ditto.
50863 (*pred_cmp<mode>_scalar): Ditto.
50864 (*pred_cmp<mode>_scalar_narrow): Ditto.
50865 (@pred_eqne<mode>_scalar): Ditto.
50866 (*pred_eqne<mode>_scalar): Ditto.
50867 (*pred_eqne<mode>_scalar_narrow): Ditto.
50868 (@pred_merge<mode>_scalar): Ditto.
50869 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
50870 (@pred_<fix_cvt><mode>): Ditto.
50871 (@pred_<float_cvt><mode>): Ditto.
50872 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
50873 (@pred_widen_<fix_cvt><mode>): Ditto.
50874 (@pred_widen_<float_cvt><mode>): Ditto.
50875 (@pred_extend<mode>): Ditto.
50876 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
50877 (@pred_narrow_<fix_cvt><mode>): Ditto.
50878 (@pred_narrow_<float_cvt><mode>): Ditto.
50879 (@pred_trunc<mode>): Ditto.
50880 (@pred_rod_trunc<mode>): Ditto.
50882 2023-02-22 Jakub Jelinek <jakub@redhat.com>
50884 PR middle-end/106258
50885 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
50886 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
50887 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
50888 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
50890 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
50892 * common.opt (-Wcomplain-wrong-lang): New.
50893 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
50894 * opts-common.cc (prune_options): Handle it.
50895 * opts-global.cc (complain_wrong_lang): Use it.
50897 2023-02-21 David Malcolm <dmalcolm@redhat.com>
50900 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
50902 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
50905 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
50907 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
50908 (sibcall_value, sibcall_value_internal): Add 'use' expression
50911 2023-02-21 Richard Biener <rguenther@suse.de>
50913 PR tree-optimization/108691
50914 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
50915 assert about calls_setjmp not becoming true when it was false.
50917 2023-02-21 Richard Biener <rguenther@suse.de>
50919 PR tree-optimization/108793
50920 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
50921 Use convert operands to niter_type when computing num.
50923 2023-02-21 Richard Biener <rguenther@suse.de>
50926 2023-02-13 Richard Biener <rguenther@suse.de>
50928 PR tree-optimization/108691
50929 * tree-cfg.cc (notice_special_calls): When the CFG is built
50930 honor gimple_call_ctrl_altering_p.
50931 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
50932 temporarily if the call is not control-altering.
50933 * calls.cc (emit_call_1): Do not add REG_SETJMP if
50934 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
50936 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
50938 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
50939 true if register A0 (return address register) when -Og is specified.
50941 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
50943 * config/i386/predicates.md
50944 (general_x64constmem_operand): New predicate.
50945 * config/i386/i386.md (*cmpqi_ext<mode>_1):
50946 Use nonimm_x64constmem_operand.
50947 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
50948 (*addqi_ext<mode>_1): Ditto.
50949 (*testqi_ext<mode>_1): Ditto.
50950 (*andqi_ext<mode>_1): Ditto.
50951 (*andqi_ext<mode>_1_cc): Ditto.
50952 (*<any_or:code>qi_ext<mode>_1): Ditto.
50953 (*xorqi_ext<mode>_1_cc): Ditto.
50955 2023-02-20 Jakub Jelinek <jakub2redhat.com>
50958 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
50959 gen_umadddi4_highpart{,_le}.
50961 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
50963 * config/riscv/riscv.md (prefetch): Use r instead of p for the
50965 (riscv_prefetchi_<mode>): Ditto.
50967 2023-02-20 Richard Biener <rguenther@suse.de>
50969 PR tree-optimization/108816
50970 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
50971 versioning condition split prerequesite, assert required
50974 2023-02-20 Richard Biener <rguenther@suse.de>
50976 PR tree-optimization/108825
50977 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
50978 loop-local verfication only verify there's no pending SSA
50981 2023-02-20 Richard Biener <rguenther@suse.de>
50983 PR tree-optimization/108819
50984 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
50985 we have an SSA name as iv_2 as expected.
50987 2023-02-18 Jakub Jelinek <jakub@redhat.com>
50989 PR tree-optimization/108819
50990 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
50992 2023-02-18 Jakub Jelinek <jakub@redhat.com>
50995 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
50996 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
50998 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
50999 with ix86_replace_reg_with_reg.
51001 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
51003 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
51005 2023-02-18 Xi Ruoyao <xry111@xry111.site>
51007 * config.gcc (triplet_abi): Set its value based on $with_abi,
51008 instead of $target.
51009 (la_canonical_triplet): Set it after $triplet_abi is set
51011 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
51012 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
51015 2023-02-18 Andrew Pinski <apinski@marvell.com>
51017 * match.pd: Remove #if GIMPLE around the
51020 2023-02-18 Andrew Pinski <apinski@marvell.com>
51022 * value-query.h (get_range_query): Return the global ranges
51023 for a nullptr func.
51025 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
51027 * doc/invoke.texi (@item -Wall): Fix typo in
51030 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
51033 * config/i386/predicates.md
51034 (nonimm_x64constmem_operand): New predicate.
51035 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
51036 (*subqi_ext<mode>_0): Ditto.
51037 (*andqi_ext<mode>_0): Ditto.
51038 (*<any_or:code>qi_ext<mode>_0): Ditto.
51040 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
51043 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
51044 int_outermode instead of GET_MODE (tem) to prevent
51045 VOIDmode from entering simplify_gen_subreg.
51047 2023-02-17 Richard Biener <rguenther@suse.de>
51049 PR tree-optimization/108821
51050 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
51051 move volatile accesses.
51053 2023-02-17 Richard Biener <rguenther@suse.de>
51055 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
51056 called on virtual operands.
51057 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
51058 ssa_undefined_value_p calls.
51059 (vn_phi_insert): Likewise.
51060 (set_ssa_val_to): Likewise.
51061 (visit_phi): Avoid extra work with equivalences for
51062 virtual operand PHIs.
51064 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51066 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
51068 (class mask_nlogic): Ditto.
51069 (class mask_notlogic): Ditto.
51070 (class vmmv): Ditto.
51071 (class vmclr): Ditto.
51072 (class vmset): Ditto.
51073 (class vmnot): Ditto.
51074 (class vcpop): Ditto.
51075 (class vfirst): Ditto.
51076 (class mask_misc): Ditto.
51077 (class viota): Ditto.
51078 (class vid): Ditto.
51080 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51081 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
51100 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
51101 (struct mask_alu_def): Ditto.
51103 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51104 * config/riscv/riscv-vector-builtins.cc: Ditto.
51105 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
51106 for dest it scalar RVV intrinsics.
51107 * config/riscv/vector-iterators.md (sof): New iterator.
51108 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
51109 (@pred_<optab>not<mode>): New pattern.
51110 (@pred_popcount<VB:mode><P:mode>): New pattern.
51111 (@pred_ffs<VB:mode><P:mode>): New pattern.
51112 (@pred_<misc_op><mode>): New pattern.
51113 (@pred_iota<mode>): New pattern.
51114 (@pred_series<mode>): New pattern.
51116 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51118 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
51122 * config/riscv/riscv-vector-builtins.cc: Ditto.
51124 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51125 kito-cheng <kito.cheng@sifive.com>
51127 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
51128 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
51129 (sew64_scalar_helper): New function.
51130 * config/riscv/vector.md: Normalization.
51132 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51134 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
51196 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51198 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
51199 (@pred_<optab><mode>_scalar): Ditto.
51200 (*pred_<optab><mode>_scalar): Ditto.
51201 (*pred_<optab><mode>_extended_scalar): Ditto.
51203 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51205 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
51206 (init_builtins): Ditto.
51207 (mangle_builtin_type): Ditto.
51208 (verify_type_context): Ditto.
51209 (handle_pragma_vector): Ditto.
51210 (builtin_decl): Ditto.
51211 (expand_builtin): Ditto.
51212 (const_vec_all_same_in_range_p): Ditto.
51213 (legitimize_move): Ditto.
51214 (emit_vlmax_op): Ditto.
51215 (emit_nonvlmax_op): Ditto.
51216 (get_vlmul): Ditto.
51217 (get_ratio): Ditto.
51220 (get_avl_type): Ditto.
51221 (calculate_ratio): Ditto.
51222 (enum vlmul_type): Ditto.
51224 (neg_simm5_p): Ditto.
51225 (has_vi_variant_p): Ditto.
51227 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51229 * config/riscv/riscv-protos.h (simm32_p): Remove.
51230 * config/riscv/riscv-v.cc (simm32_p): Ditto.
51231 * config/riscv/vector.md: Use immediate_operand
51232 instead of riscv_vector::simm32_p.
51234 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
51236 * doc/invoke.texi (Optimize Options): Reword the explanation
51237 getting minimal, maximal and default values of a parameter.
51239 2023-02-16 Patrick Palka <ppalka@redhat.com>
51241 * addresses.h: Mechanically drop 'static' from 'static inline'
51242 functions via s/^static inline/inline/g.
51243 * asan.h: Likewise.
51244 * attribs.h: Likewise.
51245 * basic-block.h: Likewise.
51246 * bitmap.h: Likewise.
51247 * cfghooks.h: Likewise.
51248 * cfgloop.h: Likewise.
51249 * cgraph.h: Likewise.
51250 * cselib.h: Likewise.
51251 * data-streamer.h: Likewise.
51252 * debug.h: Likewise.
51254 * diagnostic.h: Likewise.
51255 * dominance.h: Likewise.
51256 * dumpfile.h: Likewise.
51257 * emit-rtl.h: Likewise.
51258 * except.h: Likewise.
51259 * expmed.h: Likewise.
51260 * expr.h: Likewise.
51261 * fixed-value.h: Likewise.
51262 * gengtype.h: Likewise.
51263 * gimple-expr.h: Likewise.
51264 * gimple-iterator.h: Likewise.
51265 * gimple-predict.h: Likewise.
51266 * gimple-range-fold.h: Likewise.
51267 * gimple-ssa.h: Likewise.
51268 * gimple.h: Likewise.
51269 * graphite.h: Likewise.
51270 * hard-reg-set.h: Likewise.
51271 * hash-map.h: Likewise.
51272 * hash-set.h: Likewise.
51273 * hash-table.h: Likewise.
51274 * hwint.h: Likewise.
51275 * input.h: Likewise.
51276 * insn-addr.h: Likewise.
51277 * internal-fn.h: Likewise.
51278 * ipa-fnsummary.h: Likewise.
51279 * ipa-icf-gimple.h: Likewise.
51280 * ipa-inline.h: Likewise.
51281 * ipa-modref.h: Likewise.
51282 * ipa-prop.h: Likewise.
51283 * ira-int.h: Likewise.
51285 * lra-int.h: Likewise.
51287 * lto-streamer.h: Likewise.
51288 * memmodel.h: Likewise.
51289 * omp-general.h: Likewise.
51290 * optabs-query.h: Likewise.
51291 * optabs.h: Likewise.
51292 * plugin.h: Likewise.
51293 * pretty-print.h: Likewise.
51294 * range.h: Likewise.
51295 * read-md.h: Likewise.
51296 * recog.h: Likewise.
51297 * regs.h: Likewise.
51298 * rtl-iter.h: Likewise.
51300 * sbitmap.h: Likewise.
51301 * sched-int.h: Likewise.
51302 * sel-sched-ir.h: Likewise.
51303 * sese.h: Likewise.
51304 * sparseset.h: Likewise.
51305 * ssa-iterators.h: Likewise.
51306 * system.h: Likewise.
51307 * target-globals.h: Likewise.
51308 * target.h: Likewise.
51309 * timevar.h: Likewise.
51310 * tree-chrec.h: Likewise.
51311 * tree-data-ref.h: Likewise.
51312 * tree-iterator.h: Likewise.
51313 * tree-outof-ssa.h: Likewise.
51314 * tree-phinodes.h: Likewise.
51315 * tree-scalar-evolution.h: Likewise.
51316 * tree-sra.h: Likewise.
51317 * tree-ssa-alias.h: Likewise.
51318 * tree-ssa-live.h: Likewise.
51319 * tree-ssa-loop-manip.h: Likewise.
51320 * tree-ssa-loop.h: Likewise.
51321 * tree-ssa-operands.h: Likewise.
51322 * tree-ssa-propagate.h: Likewise.
51323 * tree-ssa-sccvn.h: Likewise.
51324 * tree-ssa.h: Likewise.
51325 * tree-ssanames.h: Likewise.
51326 * tree-streamer.h: Likewise.
51327 * tree-switch-conversion.h: Likewise.
51328 * tree-vectorizer.h: Likewise.
51329 * tree.h: Likewise.
51330 * wide-int.h: Likewise.
51332 2023-02-16 Jakub Jelinek <jakub@redhat.com>
51334 PR tree-optimization/108657
51335 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
51336 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
51337 is a call to internal or builtin function.
51339 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
51341 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
51342 using-declaration to unhide functions.
51344 2023-02-16 Jakub Jelinek <jakub@redhat.com>
51346 PR tree-optimization/108783
51347 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
51348 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
51349 t to curr->op. Otherwise, punt if either newop1 or newop2 are
51350 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
51352 2023-02-16 Richard Biener <rguenther@suse.de>
51354 PR tree-optimization/108791
51355 * tree-ssa-forwprop.cc (optimize_vector_load): Build
51356 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
51359 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
51362 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
51363 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
51364 (ix86_expand_prologue): Likewise.
51366 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
51368 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
51370 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
51372 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
51373 int248_register_operand predicate in zero_extract sub-RTX.
51374 (*cmpqi_ext<mode>_2): Ditto.
51375 (*cmpqi_ext<mode>_3): Ditto.
51376 (*cmpqi_ext<mode>_4): Ditto.
51377 (*extzvqi_mem_rex64): Ditto.
51379 (*insvqi_1_mem_rex64): Ditto.
51380 (@insv<mode>_1): Ditto.
51381 (*insvqi_1): Ditto.
51382 (*insvqi_2): Ditto.
51383 (*insvqi_3): Ditto.
51384 (*extendqi<SWI24:mode>_ext_1): Ditto.
51385 (*addqi_ext<mode>_1): Ditto.
51386 (*addqi_ext<mode>_2): Ditto.
51387 (*subqi_ext<mode>_2): Ditto.
51388 (*testqi_ext<mode>_1): Ditto.
51389 (*testqi_ext<mode>_2): Ditto.
51390 (*andqi_ext<mode>_1): Ditto.
51391 (*andqi_ext<mode>_1_cc): Ditto.
51392 (*andqi_ext<mode>_2): Ditto.
51393 (*<any_or:code>qi_ext<mode>_1): Ditto.
51394 (*<any_or:code>qi_ext<mode>_2): Ditto.
51395 (*xorqi_ext<mode>_1_cc): Ditto.
51396 (*negqi_ext<mode>_2): Ditto.
51397 (*ashlqi_ext<mode>_2): Ditto.
51398 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
51400 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
51402 * config/i386/predicates.md (int248_register_operand):
51403 Rename from extr_register_operand.
51404 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
51405 (*extzx<mode>): Ditto.
51406 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
51407 (*ashl<mode>3_mask): Ditto.
51408 (*<any_shiftrt:insn><mode>3_mask): Ditto.
51409 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
51410 (*<any_rotate:insn><mode>3_mask): Ditto.
51411 (*<btsc><mode>_mask): Ditto.
51412 (*btr<mode>_mask): Ditto.
51413 (*jcc_bt<mode>_mask_1): Ditto.
51415 2023-02-15 Richard Biener <rguenther@suse.de>
51417 PR middle-end/26854
51418 * df-core.cc (df_worklist_propagate_forward): Put later
51419 blocks on worklist and only earlier blocks on pending.
51420 (df_worklist_propagate_backward): Likewise.
51421 (df_worklist_dataflow_doublequeue): Change the iteration
51422 to process new blocks in the same iteration if that
51423 maintains the iteration order.
51425 2023-02-15 Marek Polacek <polacek@redhat.com>
51427 PR middle-end/106080
51428 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
51431 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51433 * config/riscv/predicates.md: Refine codes.
51434 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
51435 * config/riscv/riscv-v.cc: Refine codes.
51436 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
51438 (class imac): New class.
51439 (enum widen_ternop_type): New enum.
51440 (class iwmac): New class.
51442 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51443 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
51451 * config/riscv/riscv-vector-builtins.cc
51452 (function_builder::apply_predication): Adjust for multiply-add support.
51453 (function_expander::add_vundef_operand): Refine codes.
51454 (function_expander::use_ternop_insn): New function.
51455 (function_expander::use_widen_ternop_insn): Ditto.
51456 * config/riscv/riscv-vector-builtins.h: New function.
51457 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
51458 (pred_mul_<optab><mode>_undef_merge): Ditto.
51459 (*pred_<madd_nmsub><mode>): Ditto.
51460 (*pred_<macc_nmsac><mode>): Ditto.
51461 (*pred_mul_<optab><mode>): Ditto.
51462 (@pred_mul_<optab><mode>_scalar): Ditto.
51463 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
51464 (*pred_<madd_nmsub><mode>_scalar): Ditto.
51465 (*pred_<macc_nmsac><mode>_scalar): Ditto.
51466 (*pred_mul_<optab><mode>_scalar): Ditto.
51467 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
51468 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
51469 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
51470 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
51471 (@pred_widen_mul_plus<su><mode>): Ditto.
51472 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
51473 (@pred_widen_mul_plussu<mode>): Ditto.
51474 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
51475 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
51477 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51479 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
51480 (vector_all_trues_mask_operand): New predicate.
51481 (vector_undef_operand): New predicate.
51482 (ltge_operator): New predicate.
51483 (comparison_except_ltge_operator): New predicate.
51484 (comparison_except_eqge_operator): New predicate.
51485 (ge_operator): New predicate.
51486 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
51487 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
51489 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51490 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
51500 * config/riscv/riscv-vector-builtins-shapes.cc
51501 (struct return_mask_def): Adjust for compare support.
51502 * config/riscv/riscv-vector-builtins.cc
51503 (function_expander::use_compare_insn): New function.
51504 * config/riscv/riscv-vector-builtins.h
51505 (function_expander::add_integer_operand): Ditto.
51506 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
51507 * config/riscv/riscv.md: Add vector min/max attributes.
51508 * config/riscv/vector-iterators.md (xnor): New iterator.
51509 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
51510 (*pred_cmp<mode>): Ditto.
51511 (*pred_cmp<mode>_narrow): Ditto.
51512 (@pred_ltge<mode>): Ditto.
51513 (*pred_ltge<mode>): Ditto.
51514 (*pred_ltge<mode>_narrow): Ditto.
51515 (@pred_cmp<mode>_scalar): Ditto.
51516 (*pred_cmp<mode>_scalar): Ditto.
51517 (*pred_cmp<mode>_scalar_narrow): Ditto.
51518 (@pred_eqne<mode>_scalar): Ditto.
51519 (*pred_eqne<mode>_scalar): Ditto.
51520 (*pred_eqne<mode>_scalar_narrow): Ditto.
51521 (*pred_cmp<mode>_extended_scalar): Ditto.
51522 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
51523 (*pred_eqne<mode>_extended_scalar): Ditto.
51524 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
51525 (@pred_ge<mode>_scalar): Ditto.
51526 (@pred_<optab><mode>): Ditto.
51527 (@pred_n<optab><mode>): Ditto.
51528 (@pred_<optab>n<mode>): Ditto.
51529 (@pred_not<mode>): Ditto.
51531 2023-02-15 Martin Jambor <mjambor@suse.cz>
51534 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
51535 creation of non-scalar replacements even if IPA-CP knows their
51538 2023-02-15 Jakub Jelinek <jakub@redhat.com>
51542 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
51543 expander, change operand 3 to be TImode, emit maddlddi4 and
51544 umadddi4_highpart{,_le} with its low half and finally add the high
51545 half to the result.
51547 2023-02-15 Martin Liska <mliska@suse.cz>
51549 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
51551 2023-02-15 Richard Biener <rguenther@suse.de>
51553 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
51554 for with_poison and alias worklist to it.
51555 (sanitize_asan_mark_poison): Likewise.
51557 2023-02-15 Richard Biener <rguenther@suse.de>
51560 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
51561 Combine bitmap test and set.
51562 (scalar_chain::add_insn): Likewise.
51563 (scalar_chain::analyze_register_chain): Remove redundant
51564 attempt to add to queue and instead strengthen assert.
51565 Sink common attempts to mark the def dual-mode.
51566 (scalar_chain::add_to_queue): Remove redundant insn bitmap
51569 2023-02-15 Richard Biener <rguenther@suse.de>
51572 * config/i386/i386-features.cc (convert_scalars_to_vector):
51573 Switch candidates bitmaps to tree view before building the chains.
51575 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
51577 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
51578 "failure trying to reload" call.
51580 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
51582 * gdbinit.in (phrs): New command.
51583 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
51584 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
51586 2023-02-14 David Faust <david.faust@oracle.com>
51589 * config/bpf/constraints.md (q): New memory constraint.
51590 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
51591 (zero_extendqidi2): Likewise.
51592 (zero_extendsidi2): Likewise.
51593 (*mov<MM:mode>): Likewise.
51595 2023-02-14 Andrew Pinski <apinski@marvell.com>
51597 PR tree-optimization/108355
51598 PR tree-optimization/96921
51599 * match.pd: Add pattern for "1 - bool_val".
51601 2023-02-14 Richard Biener <rguenther@suse.de>
51603 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
51604 basic block index hashing on the availability of ->cclhs.
51605 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
51606 rely on ->cclhs availability.
51607 (vn_phi_lookup): Set ->cclhs only when we are eventually
51608 going to CSE the PHI.
51609 (vn_phi_insert): Likewise.
51611 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
51613 * gimplify.cc (gimplify_save_expr): Add missing guard.
51615 2023-02-14 Richard Biener <rguenther@suse.de>
51617 PR tree-optimization/108782
51618 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
51619 Make sure we're not vectorizing an inner loop.
51621 2023-02-14 Jakub Jelinek <jakub@redhat.com>
51623 PR sanitizer/108777
51624 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
51625 * asan.h (asan_memfn_rtl): Declare.
51626 * asan.cc (asan_memfn_rtls): New variable.
51627 (asan_memfn_rtl): New function.
51628 * builtins.cc (expand_builtin): If
51629 param_asan_kernel_mem_intrinsic_prefix and function is
51630 kernel-{,hw}address sanitized, emit calls to
51631 __{,hw}asan_{memcpy,memmove,memset} rather than
51632 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
51633 instead of flag_sanitize & SANITIZE_ADDRESS to check if
51634 asan_intercepted_p functions shouldn't be expanded inline.
51636 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
51638 PR tree-optimization/96373
51639 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
51640 operations on the loop mask. Reject partial vectors if this isn't
51643 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
51645 PR rtl-optimization/108681
51646 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
51647 code to handle bare uses and clobbers.
51649 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
51651 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
51652 caller_save_p flag when clearing defined_p flag.
51653 (setup_reg_equiv): Ditto.
51654 * lra-constraints.cc (lra_constraints): Ditto.
51656 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
51659 * config/i386/predicates.md (extr_register_operand):
51660 New special predicate.
51661 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
51662 as operand 1 predicate.
51663 (*exzv<mode>): Ditto.
51664 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
51666 2023-02-13 Richard Biener <rguenther@suse.de>
51668 PR tree-optimization/28614
51669 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
51670 walking all edges in most cases.
51671 (vn_nary_op_insert_pieces_predicated): Avoid repeated
51672 calls to can_track_predicate_on_edge unless checking is
51674 (process_bb): Instead call it once here for each edge
51675 we register possibly multiple predicates on.
51677 2023-02-13 Richard Biener <rguenther@suse.de>
51679 PR tree-optimization/108691
51680 * tree-cfg.cc (notice_special_calls): When the CFG is built
51681 honor gimple_call_ctrl_altering_p.
51682 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
51683 temporarily if the call is not control-altering.
51684 * calls.cc (emit_call_1): Do not add REG_SETJMP if
51685 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
51687 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
51690 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
51691 (struct s390_sched_state): Initialise to zero.
51692 (s390_sched_variable_issue): For better debuggability also emit
51694 (s390_sched_init): Unconditionally reset scheduler state.
51696 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
51698 * ifcvt.h (noce_if_info::cond_inverted): New field.
51699 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
51700 values when cond_inverted is true.
51701 (noce_find_if_block): Allow the condition to be inverted when
51702 handling conditional moves.
51704 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
51706 * config/s390/predicates.md (execute_operation): Use
51707 constrain_operands instead of extract_constrain_insn in order to
51708 determine wheter there exists a valid alternative.
51710 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
51712 * common/config/arc/arc-common.cc (arc_option_optimization_table):
51713 Remove millicode from list.
51715 2023-02-13 Martin Liska <mliska@suse.cz>
51717 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
51719 2023-02-13 Richard Biener <rguenther@suse.de>
51721 PR tree-optimization/106722
51722 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
51723 whether we marked a stmt.
51724 (mark_control_dependent_edges_necessary): When
51725 mark_last_stmt_necessary didn't mark any stmt make sure
51726 to mark its control dependent edges.
51727 (propagate_necessity): Likewise.
51729 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
51731 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
51732 (DWARF_FRAME_REGISTERS): New.
51733 (DWARF_REG_TO_UNWIND_COLUMN): New.
51735 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
51737 * doc/sourcebuild.texi: Remove (broken) direct reference to
51738 "The GNU configure and build system".
51740 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
51742 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
51743 gen_add3_insn to gen_rtx_SET.
51744 (riscv_adjust_libcall_cfi_epilogue): Likewise.
51746 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51748 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
51749 (class vnclip): Ditto.
51751 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51752 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
51761 * config/riscv/vector-iterators.md (su): Add instruction.
51764 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
51765 (@pred_<sat_op><mode>_scalar): Ditto.
51766 (*pred_<sat_op><mode>_scalar): Ditto.
51767 (*pred_<sat_op><mode>_extended_scalar): Ditto.
51768 (@pred_narrow_clip<v_su><mode>): Ditto.
51769 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
51771 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51773 * config/riscv/constraints.md (Wbr): Remove unused constraint.
51774 * config/riscv/predicates.md: Fix move operand predicate.
51775 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
51776 (class vncvt_x): Ditto.
51777 (class vmerge): Ditto.
51778 (class vmv_v): Ditto.
51780 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51781 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
51788 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
51789 (struct move_def): Ditto.
51791 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51792 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
51793 (DEF_RVV_WEXTU_OPS): Ditto
51794 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
51799 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
51800 * config/riscv/vector-iterators.md (nmsac):New iterator.
51801 (nmsub): New iterator.
51802 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
51803 (@pred_merge<mode>_scalar): New pattern.
51804 (*pred_merge<mode>_scalar): New pattern.
51805 (*pred_merge<mode>_extended_scalar): New pattern.
51806 (@pred_narrow_<optab><mode>): New pattern.
51807 (@pred_narrow_<optab><mode>_scalar): New pattern.
51808 (@pred_trunc<mode>): New pattern.
51810 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51812 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
51813 (class vmsbc): Ditto.
51814 (BASE): Define new class.
51815 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51816 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
51818 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
51821 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51822 * config/riscv/riscv-vector-builtins.cc
51823 (function_expander::use_exact_insn): Adjust for new support
51824 * config/riscv/riscv-vector-builtins.h
51825 (function_base::has_merge_operand_p): New function.
51826 * config/riscv/vector-iterators.md: New iterator.
51827 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
51828 (@pred_msbc<mode>): Ditto.
51829 (@pred_madc<mode>_scalar): Ditto.
51830 (@pred_msbc<mode>_scalar): Ditto.
51831 (*pred_madc<mode>_scalar): Ditto.
51832 (*pred_madc<mode>_extended_scalar): Ditto.
51833 (*pred_msbc<mode>_scalar): Ditto.
51834 (*pred_msbc<mode>_extended_scalar): Ditto.
51835 (@pred_madc<mode>_overflow): Ditto.
51836 (@pred_msbc<mode>_overflow): Ditto.
51837 (@pred_madc<mode>_overflow_scalar): Ditto.
51838 (@pred_msbc<mode>_overflow_scalar): Ditto.
51839 (*pred_madc<mode>_overflow_scalar): Ditto.
51840 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
51841 (*pred_msbc<mode>_overflow_scalar): Ditto.
51842 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
51844 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51846 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
51847 * config/riscv/riscv-v.cc (simm32_p): Ditto.
51848 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
51849 (class vsbc): Ditto.
51851 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51852 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
51854 * config/riscv/riscv-vector-builtins-shapes.cc
51855 (struct no_mask_policy_def): Ditto.
51857 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
51858 * config/riscv/riscv-vector-builtins.cc
51859 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
51860 (rvv_arg_type_info::get_tree_type): Ditto.
51861 (function_expander::use_exact_insn): Ditto.
51862 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
51863 (function_base::use_mask_predication_p): New function.
51864 * config/riscv/vector-iterators.md: New iterator.
51865 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
51866 (@pred_sbc<mode>): Ditto.
51867 (@pred_adc<mode>_scalar): Ditto.
51868 (@pred_sbc<mode>_scalar): Ditto.
51869 (*pred_adc<mode>_scalar): Ditto.
51870 (*pred_adc<mode>_extended_scalar): Ditto.
51871 (*pred_sbc<mode>_scalar): Ditto.
51872 (*pred_sbc<mode>_extended_scalar): Ditto.
51874 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51876 * config/riscv/vector.md: use "zero" reg.
51878 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51880 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
51882 (class vwmulsu): Ditto.
51883 (class vwcvt): Ditto.
51884 (BASE): Add integer widening support.
51885 * config/riscv/riscv-vector-builtins-bases.h: Ditto
51886 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
51887 (vwsub): New class.
51888 (vwmul): New class.
51889 (vwmulu): New class.
51890 (vwmulsu): New class.
51891 (vwaddu): New class.
51892 (vwsubu): New class.
51893 (vwcvt_x): New class.
51894 (vwcvtu_x): New class.
51895 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
51897 (struct widen_alu_def): New class.
51898 (SHAPE): New class.
51899 * config/riscv/riscv-vector-builtins-shapes.h: New class.
51900 * config/riscv/riscv-vector-builtins.cc
51901 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
51902 (rvv_arg_type_info::get_tree_type): Ditto.
51903 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
51905 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
51907 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
51908 * config/riscv/riscv.h (X0_REGNUM): New constant.
51909 * config/riscv/vector-iterators.md: New iterators.
51910 * config/riscv/vector.md
51911 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
51913 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
51915 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
51916 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
51918 (@pred_widen_mulsu<mode>): Ditto.
51919 (@pred_widen_mulsu<mode>_scalar): Ditto.
51920 (@pred_<optab><mode>): Ditto.
51922 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51923 kito-cheng <kito.cheng@sifive.com>
51925 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
51926 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
51928 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
51929 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
51933 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
51935 (DEF_RVV_FULL_V_U_OPS): Ditto.
51936 (vint8mf8_t): Ditto.
51937 (vint8mf4_t): Ditto.
51938 (vint8mf2_t): Ditto.
51939 (vint8m1_t): Ditto.
51940 (vint8m2_t): Ditto.
51941 (vint8m4_t): Ditto.
51942 (vint8m8_t): Ditto.
51943 (vint16mf4_t): Ditto.
51944 (vint16mf2_t): Ditto.
51945 (vint16m1_t): Ditto.
51946 (vint16m2_t): Ditto.
51947 (vint16m4_t): Ditto.
51948 (vint16m8_t): Ditto.
51949 (vint32mf2_t): Ditto.
51950 (vint32m1_t): Ditto.
51951 (vint32m2_t): Ditto.
51952 (vint32m4_t): Ditto.
51953 (vint32m8_t): Ditto.
51954 (vint64m1_t): Ditto.
51955 (vint64m2_t): Ditto.
51956 (vint64m4_t): Ditto.
51957 (vint64m8_t): Ditto.
51958 (vuint8mf8_t): Ditto.
51959 (vuint8mf4_t): Ditto.
51960 (vuint8mf2_t): Ditto.
51961 (vuint8m1_t): Ditto.
51962 (vuint8m2_t): Ditto.
51963 (vuint8m4_t): Ditto.
51964 (vuint8m8_t): Ditto.
51965 (vuint16mf4_t): Ditto.
51966 (vuint16mf2_t): Ditto.
51967 (vuint16m1_t): Ditto.
51968 (vuint16m2_t): Ditto.
51969 (vuint16m4_t): Ditto.
51970 (vuint16m8_t): Ditto.
51971 (vuint32mf2_t): Ditto.
51972 (vuint32m1_t): Ditto.
51973 (vuint32m2_t): Ditto.
51974 (vuint32m4_t): Ditto.
51975 (vuint32m8_t): Ditto.
51976 (vuint64m1_t): Ditto.
51977 (vuint64m2_t): Ditto.
51978 (vuint64m4_t): Ditto.
51979 (vuint64m8_t): Ditto.
51980 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
51981 (DEF_RVV_FULL_V_U_OPS): Ditto.
51982 (check_required_extensions): Add vmulh support.
51983 (rvv_arg_type_info::get_tree_type): Ditto.
51984 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
51985 (enum rvv_base_type): Ditto.
51986 * config/riscv/riscv.opt: Add 'V' extension flag.
51987 * config/riscv/vector-iterators.md (su): New iterator.
51988 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
51989 (@pred_mulh<v_su><mode>_scalar): Ditto.
51990 (*pred_mulh<v_su><mode>_scalar): Ditto.
51991 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
51993 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
51995 * config/riscv/iterators.md: Add sign_extend/zero_extend.
51996 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
51998 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
51999 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
52002 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
52003 for vsext/vzext support.
52004 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
52006 (DEF_RVV_QEXTI_OPS): Ditto.
52007 (DEF_RVV_OEXTI_OPS): Ditto.
52008 (DEF_RVV_WEXTU_OPS): Ditto.
52009 (DEF_RVV_QEXTU_OPS): Ditto.
52010 (DEF_RVV_OEXTU_OPS): Ditto.
52011 (vint16mf4_t): Ditto.
52012 (vint16mf2_t): Ditto.
52013 (vint16m1_t): Ditto.
52014 (vint16m2_t): Ditto.
52015 (vint16m4_t): Ditto.
52016 (vint16m8_t): Ditto.
52017 (vint32mf2_t): Ditto.
52018 (vint32m1_t): Ditto.
52019 (vint32m2_t): Ditto.
52020 (vint32m4_t): Ditto.
52021 (vint32m8_t): Ditto.
52022 (vint64m1_t): Ditto.
52023 (vint64m2_t): Ditto.
52024 (vint64m4_t): Ditto.
52025 (vint64m8_t): Ditto.
52026 (vuint16mf4_t): Ditto.
52027 (vuint16mf2_t): Ditto.
52028 (vuint16m1_t): Ditto.
52029 (vuint16m2_t): Ditto.
52030 (vuint16m4_t): Ditto.
52031 (vuint16m8_t): Ditto.
52032 (vuint32mf2_t): Ditto.
52033 (vuint32m1_t): Ditto.
52034 (vuint32m2_t): Ditto.
52035 (vuint32m4_t): Ditto.
52036 (vuint32m8_t): Ditto.
52037 (vuint64m1_t): Ditto.
52038 (vuint64m2_t): Ditto.
52039 (vuint64m4_t): Ditto.
52040 (vuint64m8_t): Ditto.
52041 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
52042 (DEF_RVV_QEXTI_OPS): Ditto.
52043 (DEF_RVV_OEXTI_OPS): Ditto.
52044 (DEF_RVV_WEXTU_OPS): Ditto.
52045 (DEF_RVV_QEXTU_OPS): Ditto.
52046 (DEF_RVV_OEXTU_OPS): Ditto.
52047 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
52049 (rvv_arg_type_info::get_tree_type): Ditto.
52050 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
52051 * config/riscv/vector-iterators.md (z): New attribute.
52052 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
52053 (@pred_<optab><mode>_vf4): Ditto.
52054 (@pred_<optab><mode>_vf8): Ditto.
52056 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52058 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
52059 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
52060 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
52061 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
52062 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
52066 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
52071 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
52072 (@pred_<optab><mode>_scalar): New pattern.
52073 (*pred_<optab><mode>_scalar): New pattern.
52074 (*pred_<optab><mode>_extended_scalar): New pattern.
52076 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52078 * config/riscv/iterators.md: Add neg and not.
52079 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
52081 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
52082 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
52103 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
52104 (struct alu_def): Ditto.
52106 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
52107 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
52108 * config/riscv/vector-iterators.md: New iterator.
52109 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
52111 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52113 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
52115 2023-02-11 Jakub Jelinek <jakub@redhat.com>
52118 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
52119 item->offset bit position is too large to be representable as
52120 unsigned int byte position.
52122 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
52124 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
52126 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
52128 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
52129 valid_combine only when ira_use_lra_p is true.
52131 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
52133 * params.opt (ira-simple-lra-insn-threshold): Add new param.
52134 * ira.cc (ira): Use the param to switch on simple LRA.
52136 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
52138 PR tree-optimization/108687
52139 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
52140 back to RFD_NONE mode for calculations.
52141 (ranger_cache::propagate_cache): Call the internal edge range API
52142 with RFD_READ_ONLY instead of changing the external routine.
52144 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
52146 PR tree-optimization/108520
52147 * gimple-range-infer.cc (check_assume_func): Invoke
52148 gimple_range_global directly instead using global_range_query.
52149 * value-query.cc (get_range_global): Add function context and
52150 avoid calling nonnull_arg_p if not cfun.
52151 (gimple_range_global): Add function context pointer.
52152 * value-query.h (imple_range_global): Add function context.
52154 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52156 * config/riscv/constraints.md (Wdm): Adjust constraint.
52157 (Wbr): New constraint.
52158 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
52159 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
52160 (emit_vlmax_op): New function.
52161 (emit_nonvlmax_op): Ditto.
52163 (neg_simm5_p): Ditto.
52164 (has_vi_variant_p): Ditto.
52165 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
52166 (emit_vlmax_op): New function.
52167 (emit_nonvlmax_op): Ditto.
52168 (expand_const_vector): Adjust function.
52169 (legitimize_move): Ditto.
52170 (simm32_p): New function.
52172 (neg_simm5_p): Ditto.
52173 (has_vi_variant_p): Ditto.
52174 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
52176 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
52177 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
52180 (vminu): Remove signed cases.
52182 (vdiv): Remove unsigned cases.
52184 (vdivu): Remove signed cases.
52188 (vrsub): New class.
52193 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
52194 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
52195 * config/riscv/vector-iterators.md: New iterators.
52196 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
52198 (@pred_<optab><mode>_scalar): New pattern.
52199 (@pred_sub<mode>_reverse_scalar): Ditto.
52200 (*pred_<optab><mode>_scalar): Ditto.
52201 (*pred_<optab><mode>_extended_scalar): Ditto.
52202 (*pred_sub<mode>_reverse_scalar): Ditto.
52203 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
52205 2023-02-10 Richard Biener <rguenther@suse.de>
52207 PR tree-optimization/108724
52208 * tree-vect-stmts.cc (vectorizable_operation): Avoid
52209 using word_mode vectors when vector lowering will
52210 decompose them to elementwise operations.
52212 2023-02-10 Jakub Jelinek <jakub@redhat.com>
52215 2023-02-09 Martin Liska <mliska@suse.cz>
52218 * doc/extend.texi: Document that the function
52219 does not work correctly for old VIA processors.
52221 2023-02-10 Andrew Pinski <apinski@marvell.com>
52222 Andrew Macleod <amacleod@redhat.com>
52224 PR tree-optimization/108684
52225 * tree-ssa-dce.cc (simple_dce_from_worklist):
52226 Check all ssa names and not just non-vdef ones
52227 before accepting the inline-asm.
52228 Call unlink_stmt_vdef on the statement before
52231 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
52233 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52234 * ira.cc (validate_equiv_mem): Check memref address variance.
52235 (no_equiv): Clear caller_save_p flag.
52236 (update_equiv_regs): Define caller save equivalence for
52238 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52239 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52240 call_save_p. Use caller save equivalence depending on the arg.
52241 (split_reg): Adjust the call.
52243 2023-02-09 Jakub Jelinek <jakub@redhat.com>
52246 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
52247 (cpu_indicator_init): Call get_available_features for all CPUs with
52248 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
52251 2023-02-09 Jakub Jelinek <jakub@redhat.com>
52253 PR tree-optimization/108688
52254 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
52255 of BIT_INSERT_EXPR extracting exactly all inserted bits even
52256 when without mode precision. Formatting fixes.
52258 2023-02-09 Andrew Pinski <apinski@marvell.com>
52260 PR tree-optimization/108688
52261 * match.pd (bit_field_ref [bit_insert]): Avoid generating
52262 BIT_FIELD_REFs of non-mode-precision integral operands.
52264 2023-02-09 Martin Liska <mliska@suse.cz>
52267 * doc/extend.texi: Document that the function
52268 does not work correctly for old VIA processors.
52270 2023-02-09 Andreas Schwab <schwab@suse.de>
52272 * lto-wrapper.cc (merge_and_complain): Handle
52273 -funwind-tables and -fasynchronous-unwind-tables.
52274 (append_compiler_options): Likewise.
52276 2023-02-09 Richard Biener <rguenther@suse.de>
52278 PR tree-optimization/26854
52279 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
52280 view around insert_updated_phi_nodes_for.
52281 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
52283 (walk_aliased_vdefs_1): Likewise.
52285 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
52287 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
52289 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
52292 * config.gcc (tm_mlib_file): Define new variable.
52294 2023-02-08 Jakub Jelinek <jakub@redhat.com>
52296 PR tree-optimization/108692
52297 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
52298 widened_code which is different from code, don't call
52299 vect_look_through_possible_promotion but instead just check op is
52300 SSA_NAME with integral type for which vect_is_simple_use is true
52301 and call set_op on this_unprom.
52303 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
52305 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
52307 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
52309 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
52310 to 'aarch_ra_sign_key'.
52311 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
52313 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
52314 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
52315 * config/arm/arm.opt: Define.
52317 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
52319 PR tree-optimization/108316
52320 * tree-vect-stmts.cc (get_load_store_type): When using
52321 internal functions for gather/scatter, make sure that the type
52322 of the offset argument is consistent with the offset vector type.
52324 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
52327 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
52329 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52330 * ira.cc (validate_equiv_mem): Check memref address variance.
52331 (update_equiv_regs): Define caller save equivalence for
52333 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52334 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52335 call_save_p. Use caller save equivalence depending on the arg.
52336 (split_reg): Adjust the call.
52338 2023-02-08 Jakub Jelinek <jakub@redhat.com>
52340 * tree.def (SAD_EXPR): Remove outdated comment about missing
52343 2023-02-07 Marek Polacek <polacek@redhat.com>
52345 * doc/invoke.texi: Update -fchar8_t documentation.
52347 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
52349 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
52350 * ira.cc (validate_equiv_mem): Check memref address variance.
52351 (update_equiv_regs): Define caller save equivalence for
52353 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
52354 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
52355 call_save_p. Use caller save equivalence depending on the arg.
52356 (split_reg): Adjust the call.
52358 2023-02-07 Richard Biener <rguenther@suse.de>
52360 PR tree-optimization/26854
52361 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
52362 instead of immediate uses.
52364 2023-02-07 Jakub Jelinek <jakub@redhat.com>
52366 PR tree-optimization/106923
52367 * ipa-split.cc (execute_split_functions): Don't split returns_twice
52370 2023-02-07 Jakub Jelinek <jakub@redhat.com>
52372 PR tree-optimization/106433
52373 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
52374 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
52376 2023-02-07 Jan Hubicka <jh@suse.cz>
52378 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
52381 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
52383 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
52384 (process_asm): Create a constructor for GCN_STACK_SIZE.
52385 (main): Parse the -mstack-size option.
52387 2023-02-06 Alex Coplan <alex.coplan@arm.com>
52390 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
52391 Use correct constraint for operand 3.
52393 2023-02-06 Martin Jambor <mjambor@suse.cz>
52395 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
52397 2023-02-06 Xi Ruoyao <xry111@xry111.site>
52399 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
52400 New define_int_iterator.
52401 (bytepick_d_ashift_amount): Likewise.
52402 (bytepick_imm): New define_int_attr.
52403 (bytepick_w_lshiftrt_amount): Likewise.
52404 (bytepick_d_lshiftrt_amount): Likewise.
52405 (bytepick_w_<bytepick_imm>): New define_insn template.
52406 (bytepick_w_<bytepick_imm>_extend): Likewise.
52407 (bytepick_d_<bytepick_imm>): Likewise.
52408 (bytepick_w): Remove unused define_insn.
52409 (bytepick_d): Likewise.
52410 (UNSPEC_BYTEPICK_W): Remove unused unspec.
52411 (UNSPEC_BYTEPICK_D): Likewise.
52412 * config/loongarch/predicates.md (const_0_to_3_operand):
52413 Remove unused define_predicate.
52414 (const_0_to_7_operand): Likewise.
52416 2023-02-06 Jakub Jelinek <jakub@redhat.com>
52418 PR tree-optimization/108655
52419 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
52420 or -fsanitize=unreachable -fsanitize-trap=unreachable return
52421 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
52423 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
52425 * doc/install.texi (Specific): Remove PW32.
52427 2023-02-03 Jakub Jelinek <jakub@redhat.com>
52429 PR tree-optimization/108647
52430 * range-op.cc (operator_equal::op1_range,
52431 operator_not_equal::op1_range): Don't test op2 bound
52432 equality if op2.undefined_p (), instead set_varying.
52433 (operator_lt::op1_range, operator_le::op1_range,
52434 operator_gt::op1_range, operator_ge::op1_range): Return false if
52435 op2.undefined_p ().
52436 (operator_lt::op2_range, operator_le::op2_range,
52437 operator_gt::op2_range, operator_ge::op2_range): Return false if
52438 op1.undefined_p ().
52440 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
52442 PR tree-optimization/108639
52443 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
52445 (irange::operator==): Same.
52447 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
52449 PR tree-optimization/108647
52450 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
52451 (foperator_lt::op2_range): Same.
52452 (foperator_le::op1_range): Same.
52453 (foperator_le::op2_range): Same.
52454 (foperator_gt::op1_range): Same.
52455 (foperator_gt::op2_range): Same.
52456 (foperator_ge::op1_range): Same.
52457 (foperator_ge::op2_range): Same.
52458 (foperator_unordered_lt::op1_range): Same.
52459 (foperator_unordered_lt::op2_range): Same.
52460 (foperator_unordered_le::op1_range): Same.
52461 (foperator_unordered_le::op2_range): Same.
52462 (foperator_unordered_gt::op1_range): Same.
52463 (foperator_unordered_gt::op2_range): Same.
52464 (foperator_unordered_ge::op1_range): Same.
52465 (foperator_unordered_ge::op2_range): Same.
52467 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
52469 PR tree-optimization/107570
52470 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
52472 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
52474 * doc/gm2.texi (Internals): Remove from menu.
52475 (Using): Comment out ifnohtml conditional.
52476 (Documentation): Use gcc url.
52477 (License): Node simplified.
52478 (Copying): New node. Include gpl_v3_without_node.
52479 (Contributing): Node simplified.
52480 (Internals): Commented out.
52481 (Libraries): Node simplified.
52484 (Functions): Ditto.
52486 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
52488 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
52490 (mve_vqshluq_m_n_s<mode>): Likewise.
52491 (mve_vshlq_m_<supf><mode>): Likewise.
52492 (mve_vsriq_m_n_<supf><mode>): Likewise.
52493 (mve_vsubq_m_<supf><mode>): Likewise.
52495 2023-02-03 Martin Jambor <mjambor@suse.cz>
52498 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
52499 when comparing to an IPA-CP value.
52500 (dump_list_of_param_indices): New function.
52501 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
52502 Dump removed candidates using dump_list_of_param_indices.
52503 * ipa-param-manipulation.cc
52504 (ipa_param_body_adjustments::modify_expression): Add assert checking
52505 sizes of a VIEW_CONVERT_EXPR will match.
52506 (ipa_param_body_adjustments::modify_assignment): Likewise.
52508 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
52510 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
52511 * config/riscv/riscv.cc: Ditto.
52513 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52515 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
52519 * config/riscv/vector.md: Ditto.
52521 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52523 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
52524 * config/riscv/riscv-vector-builtins-bases.cc: New class.
52525 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
52528 * config/riscv/riscv-vector-builtins.cc: Ditto.
52529 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
52531 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
52533 * toplev.cc (toplev::main): Only print the version information header
52534 from toplevel main().
52536 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
52538 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
52539 cond_{ashl|ashr|lshr}
52541 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
52543 PR rtl-optimization/108086
52544 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
52545 Adjust size-related commentary accordingly.
52547 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
52549 PR rtl-optimization/108508
52550 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
52551 the splay tree search gives the first clobber in the second group,
52552 make sure that the root of the first clobber group is updated
52553 correctly. Enter the new clobber group into the definition splay
52556 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
52558 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
52559 Fix finding best match score.
52561 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52564 PR rtl-optimization/108463
52566 * cselib.cc (cselib_current_insn): Move declaration earlier.
52567 (cselib_hasher::equal): For debug only locs, temporarily override
52568 cselib_current_insn to their l->setting_insn for the
52569 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
52570 promote some debug locs.
52571 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
52572 when using cselib call cselib_lookup_from_insn on the address but
52573 don't substitute it.
52575 2023-02-02 Richard Biener <rguenther@suse.de>
52577 PR middle-end/108625
52578 * genmatch.cc (expr::gen_transform): Also disallow resimplification
52579 from pushing to lseq with force_leaf.
52580 (dt_simplify::gen_1): Likewise.
52582 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
52584 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
52585 (struct kernargs): Replace the common content with kernargs_abi.
52586 (struct heap): Delete.
52587 (main): Read GCN_STACK_SIZE envvar.
52588 Allocate space for the device stacks.
52589 Write the new kernargs fields.
52590 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
52591 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
52592 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
52593 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
52594 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
52595 Set up the stacks from the values in the kernargs, not private.
52596 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
52597 (gcn_hsa_declare_function_name): Turn off the private segment.
52598 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
52599 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
52600 * config/gcn/gcn.opt (mstack-size): Change the description.
52602 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52605 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
52606 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
52607 addressing MVE predicate modes.
52608 (mve_bool_vec_to_const): Change to represent correct MVE predicate
52610 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
52612 (arm_vector_mode_supported_p): Likewise.
52613 (arm_mode_to_pred_mode): Add V2QI.
52614 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
52616 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
52617 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
52618 (v2qi_UP): New macro.
52619 (v4bi_UP): New macro.
52620 (v8bi_UP): New macro.
52621 (v16bi_UP): New macro.
52622 (arm_expand_builtin_args): Make it able to expand the new predicate
52624 * config/arm/arm-modes.def (V2QI): New mode.
52625 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
52626 Pred4x4_t): Remove unused predicate builtin types.
52627 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
52628 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
52629 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
52630 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
52631 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
52632 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
52633 of MODE_VECTOR_BOOL.
52634 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
52635 (MVE_VPRED): Likewise.
52636 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
52637 (MVE_vctp): New mode attribute.
52641 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
52642 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
52644 (mve_vpnothi): Rename this...
52645 (mve_vpnotv16bi): ... to this.
52646 (mve_vctp<mode1>q_mhi): Rename this...
52647 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
52648 (mve_vldrdq_gather_base_z_<supf>v2di,
52649 mve_vldrdq_gather_offset_z_<supf>v2di,
52650 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
52651 mve_vstrdq_scatter_base_p_<supf>v2di,
52652 mve_vstrdq_scatter_offset_p_<supf>v2di,
52653 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
52654 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
52655 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
52656 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
52657 mve_vldrdq_gather_base_wb_z_<supf>v2di,
52658 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
52659 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
52661 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
52663 (VCTP): ... with this.
52664 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
52665 (VCTP_M): ... with this.
52666 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
52667 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
52669 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52672 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
52673 (arm_modes_tieable_p): Make MVE predicate modes tieable.
52674 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
52675 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
52676 simplify_subreg to simplify subregs where the outermode is not scalar.
52678 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
52681 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
52682 new qualifiers parameter and use unsigned short type for MVE predicate.
52683 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
52685 (arm_init_crypto_builtins): Likewise.
52687 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52690 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
52691 * internal-fn.def (TRAP): Remove.
52692 * internal-fn.cc (expand_TRAP): Remove.
52693 * tree.cc (build_common_builtin_nodes): Define
52694 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
52695 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
52696 instead of BUILT_IN_TRAP.
52697 * gimple.cc (gimple_build_builtin_unreachable): Remove
52698 emitting internal function for BUILT_IN_TRAP.
52699 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
52700 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
52701 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
52702 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
52703 BUILT_IN_UNREACHABLE_TRAP.
52704 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
52705 * tree-cfg.cc (verify_gimple_call,
52706 pass_warn_function_return::execute): Likewise.
52707 * attribs.cc (decl_attributes): Don't report exclusions on
52708 BUILT_IN_UNREACHABLE_TRAP either.
52710 2023-02-02 liuhongt <hongtao.liu@intel.com>
52712 PR tree-optimization/108601
52713 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
52714 * tree-vect-loop.cc
52715 (vectorizable_nonlinear_induction): Remove
52716 vect_can_peel_nonlinear_iv_p.
52717 (vect_can_peel_nonlinear_iv_p): Don't peel
52718 nonlinear iv(mult or shift) for epilog when vf is not
52719 constant and moved the defination to ..
52720 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
52723 2023-02-02 Jakub Jelinek <jakub@redhat.com>
52725 PR middle-end/108435
52726 * tree-nested.cc (convert_nonlocal_omp_clauses)
52727 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
52728 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
52729 before calling declare_vars.
52730 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
52731 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
52732 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
52733 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
52735 2023-02-01 Tamar Christina <tamar.christina@arm.com>
52737 * common/config/aarch64/aarch64-common.cc
52738 (struct aarch64_option_extension): Add native_detect and document struct
52740 (all_extensions): Set new field native_detect.
52741 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
52744 2023-02-01 Martin Liska <mliska@suse.cz>
52746 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
52749 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
52751 PR tree-optimization/108356
52752 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
52753 do a search of the DOM tree for a range.
52755 2023-02-01 Martin Liska <mliska@suse.cz>
52758 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
52759 ony non-null values.
52760 * ipa.cc (walk_polymorphic_call_targets): Likewise.
52762 2023-02-01 Martin Liska <mliska@suse.cz>
52765 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
52768 2023-02-01 Jakub Jelinek <jakub@redhat.com>
52771 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
52772 subregs in DEBUG_INSNs.
52774 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
52776 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
52778 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52780 * config/s390/s390.cc (s390_restore_gpr_p): New function.
52781 (s390_preserve_gpr_arg_in_range_p): New function.
52782 (s390_preserve_gpr_arg_p): New function.
52783 (s390_preserve_fpr_arg_p): New function.
52784 (s390_register_info_stdarg_fpr): Rename to ...
52785 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
52786 (s390_register_info_stdarg_gpr): Rename to ...
52787 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
52788 (s390_register_info): Use the renamed functions above.
52789 (s390_optimize_register_info): Likewise.
52790 (save_fpr): Generate CFI for -mpreserve-args.
52791 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
52792 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
52793 (s390_optimize_prologue): Likewise.
52794 * config/s390/s390.opt: New option -mpreserve-args
52796 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52798 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
52799 (restore_gprs): Likewise.
52800 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
52801 frame pointer if a frame-pointer is used.
52802 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
52803 * config/s390/s390.md (stack_tie): Add a register operand and
52805 (@stack_tie<mode>): ... this.
52807 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
52809 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
52810 EMIT_CFI parameter.
52811 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
52812 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
52814 2023-02-01 Richard Biener <rguenther@suse.de>
52816 PR middle-end/108500
52817 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
52818 with tree traversal algorithm.
52820 2023-02-01 Jason Merrill <jason@redhat.com>
52822 * doc/invoke.texi: Document -Wno-changes-meaning.
52824 2023-02-01 David Malcolm <dmalcolm@redhat.com>
52826 * doc/invoke.texi (Static Analyzer Options): Add notes about
52827 limitations of -fanalyzer.
52829 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52831 * config/riscv/constraints.md (vj): New.
52833 * config/riscv/iterators.md: Add more opcode.
52834 * config/riscv/predicates.md (vector_arith_operand): New.
52835 (vector_neg_arith_operand): New.
52836 (vector_shift_operand): New.
52837 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
52838 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
52855 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
52872 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
52873 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
52874 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
52875 (DEF_RVV_U_OPS): New.
52876 (rvv_arg_type_info::get_base_vector_type): Handle
52877 RVV_BASE_shift_vector.
52878 (rvv_arg_type_info::get_tree_type): Ditto.
52879 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
52880 RVV_BASE_shift_vector.
52881 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
52882 * config/riscv/vector-iterators.md: Handle more opcode.
52883 * config/riscv/vector.md (@pred_<optab><mode>): New.
52885 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
52888 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
52891 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
52893 PR tree-optimization/108608
52894 * tree-vect-loop.cc (vect_transform_reduction): Handle single
52895 def-use cycles that involve function calls rather than tree codes.
52897 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52899 PR tree-optimization/108385
52900 * gimple-range-gori.cc (gori_compute::compute_operand_range):
52901 Allow VARYING computations to continue if there is a relation.
52902 * range-op.cc (pointer_plus_operator::op2_range): New.
52904 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52906 PR tree-optimization/108359
52907 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
52908 (range_operator::fold_range): If op1 is equivalent to op2 then
52909 invoke new fold_in_parts_equiv to operate on sub-components.
52910 * range-op.h (wi_fold_in_parts_equiv): New prototype.
52912 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
52914 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
52915 not abort calculations if there is a valid relation available.
52916 (gori_compute::refine_using_relation): Pass correct relation trio.
52917 (gori_compute::compute_operand1_range): Create trio and use it.
52918 (gori_compute::compute_operand2_range): Ditto.
52919 * range-op.cc (operator_plus::op1_range): Use correct trio member.
52920 (operator_minus::op1_range): Use correct trio member.
52921 * value-relation.cc (value_relation::create_trio): New.
52922 * value-relation.h (value_relation::create_trio): New prototype.
52924 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52927 * config/i386/i386-expand.cc
52928 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
52929 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
52930 equal to bitsize of mode.
52932 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52934 PR rtl-optimization/108596
52935 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
52936 ends with asm goto and has a crossing fallthrough edge to the same bb
52937 that contains at least one of its labels by restoring EDGE_CROSSING
52938 flag even on possible edge from cur_bb to new_bb successor.
52940 2023-01-31 Jakub Jelinek <jakub@redhat.com>
52943 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
52944 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
52945 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
52946 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
52947 uninitialized automatic variable __W.
52949 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
52951 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
52953 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
52955 * config/riscv/riscv-protos.h (get_vector_mode): New function.
52956 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
52957 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
52958 (class loadstore): Adjust for indexed loads/stores support.
52960 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
52961 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
52977 * config/riscv/riscv-vector-builtins-shapes.cc
52978 (struct indexed_loadstore_def): New class.
52980 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
52981 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
52982 for indexed loads/stores support.
52983 (check_required_extensions): Ditto.
52984 (rvv_arg_type_info::get_base_vector_type): New function.
52985 (rvv_arg_type_info::get_tree_type): Ditto.
52986 (function_builder::add_unique_function): Adjust for indexed loads/stores
52988 (function_expander::use_exact_insn): New function.
52989 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
52990 indexed loads/stores support.
52991 (struct rvv_arg_type_info): Ditto.
52992 (function_expander::index_mode): New function.
52993 (function_base::apply_tail_policy_p): Ditto.
52994 (function_base::apply_mask_policy_p): Ditto.
52995 * config/riscv/vector-iterators.md (unspec): New unspec.
52996 * config/riscv/vector.md (unspec): Ditto.
52997 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
52999 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
53000 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
53001 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
53002 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
53003 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
53004 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
53005 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
53006 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
53007 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
53008 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
53009 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
53010 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
53011 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
53013 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
53015 * config.gcc: Recognize x86_64-*-gnu* targets and include
53017 * config/i386/gnu64.h: Define configuration for new target
53018 including ld.so location.
53020 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
53022 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
53023 ampere1a to include SM4.
53025 2023-01-30 Andrew Pinski <apinski@marvell.com>
53027 PR tree-optimization/108582
53028 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
53029 for middlebb to have no phi nodes.
53031 2023-01-30 Richard Biener <rguenther@suse.de>
53033 PR tree-optimization/108574
53034 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
53035 sameval and def, ignore the equivalence if there's the
53036 danger of oscillating between two values.
53038 2023-01-30 Andreas Schwab <schwab@suse.de>
53040 * common/config/riscv/riscv-common.cc
53041 (riscv_option_optimization_table)
53042 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
53043 -fasynchronous-unwind-tables and -funwind-tables.
53044 * config.gcc (riscv*-*-linux*): Define
53045 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
53047 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
53049 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
53050 value of includedir.
53052 2023-01-30 Richard Biener <rguenther@suse.de>
53055 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
53058 2023-01-30 liuhongt <hongtao.liu@intel.com>
53060 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
53061 * doc/invoke.texi: Ditto.
53063 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
53065 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
53066 (stmt_may_terminate_function_p): If assuming return or EH
53067 volatile asm is safe.
53068 (find_always_executed_bbs): Fix handling of terminating BBS and
53069 infinite loops; add debug output.
53070 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
53072 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
53074 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
53075 off-by-one in checking the permissible shift-amount.
53077 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
53079 * doc/extend.texi (Named Address Spaces): Update link to the
53082 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
53084 * doc/standards.texi (Standards): Fix markup.
53086 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
53088 * doc/standards.texi (Standards): Update link to Objective-C book.
53090 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
53092 * doc/invoke.texi (Instrumentation Options): Update reference to
53095 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
53097 * doc/standards.texi: Update Go1 link.
53099 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53101 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
53102 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
53105 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
53106 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
53108 * config/riscv/riscv-vector-builtins.cc
53109 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
53110 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
53111 (@pred_strided_store<mode>): Ditto.
53113 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53115 * config/riscv/vector.md (tail_policy_op_idx): Remove.
53116 (mask_policy_op_idx): Remove.
53117 (avl_type_op_idx): Remove.
53119 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
53121 PR tree-optimization/96373
53122 * tree.h (sign_mask_for): Declare.
53123 * tree.cc (sign_mask_for): New function.
53124 (signed_or_unsigned_type_for): For vector types, try to use the
53125 related_int_vector_mode.
53126 * genmatch.cc (commutative_op): Handle conditional internal functions.
53127 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
53129 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
53131 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
53132 Use the likely minimum VF when bounding the denominators to
53133 the estimated number of iterations.
53135 2023-01-27 Richard Biener <rguenther@suse.de>
53138 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
53139 and -Ofast FP environment side-effects.
53141 2023-01-27 Richard Biener <rguenther@suse.de>
53144 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
53145 Don't add crtfastmath.o for -shared.
53147 2023-01-27 Richard Biener <rguenther@suse.de>
53150 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
53153 2023-01-27 Richard Biener <rguenther@suse.de>
53156 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
53157 crtfastmath.o for -shared.
53159 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
53161 PR tree-optimization/108306
53162 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
53163 varying for shifts that are always out of void range.
53164 (operator_rshift::fold_range): Return [0, 0] not
53165 varying for shifts that are always out of void range.
53167 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
53169 PR tree-optimization/108447
53170 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
53171 Do not attempt to fold HONOR_NAN types.
53173 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53175 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
53176 Remove _m suffix for "vop_m" C++ overloaded API name.
53178 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53180 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
53181 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
53182 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
53184 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
53185 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
53186 (vbool64_t): Ditto.
53187 (vbool32_t): Ditto.
53188 (vbool16_t): Ditto.
53193 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
53194 (rvv_arg_type_info::get_tree_type): Ditto.
53195 (function_expander::use_contiguous_load_insn): Ditto.
53196 * config/riscv/vector.md (@pred_store<mode>): Ditto.
53198 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53200 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
53201 (vsetvl_discard_result_insn_p): New function.
53202 (reg_killed_by_bb_p): rename to find_reg_killed_by.
53203 (find_reg_killed_by): New name.
53204 (get_vl): allow it to be called by more functions.
53205 (has_vsetvl_killed_avl_p): Add condition.
53206 (get_avl): allow it to be called by more functions.
53207 (insn_should_be_added_p): New function.
53208 (get_all_nonphi_defs): Refine function.
53209 (get_all_sets): Ditto.
53210 (get_same_bb_set): New function.
53211 (any_insn_in_bb_p): Ditto.
53212 (any_set_in_bb_p): Ditto.
53213 (get_vl_vtype_info): Add VLMAX forward optimization.
53214 (source_equal_p): Fix issues.
53215 (extract_single_source): Refine.
53216 (avl_info::multiple_source_equal_p): New function.
53217 (avl_info::operator==): Adjust for final version.
53218 (vl_vtype_info::operator==): Ditto.
53219 (vl_vtype_info::same_avl_p): Ditto.
53220 (vector_insn_info::parse_insn): Ditto.
53221 (vector_insn_info::available_p): New function.
53222 (vector_insn_info::merge): Adjust for final version.
53223 (vector_insn_info::dump): Add hard_empty.
53224 (pass_vsetvl::hard_empty_block_p): New function.
53225 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
53226 (pass_vsetvl::forward_demand_fusion): Ditto.
53227 (pass_vsetvl::demand_fusion): Ditto.
53228 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
53229 (pass_vsetvl::compute_local_properties): Adjust for final version.
53230 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
53231 (pass_vsetvl::refine_vsetvls): Ditto.
53232 (pass_vsetvl::commit_vsetvls): Ditto.
53233 (pass_vsetvl::propagate_avl): New function.
53234 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
53235 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
53237 2023-01-27 Jakub Jelinek <jakub@redhat.com>
53240 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
53241 from size_t to int.
53243 2023-01-27 Jakub Jelinek <jakub@redhat.com>
53246 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
53247 redirection of calls to __builtin_trap in addition to redirection
53248 to __builtin_unreachable.
53250 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53252 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
53254 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53256 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
53257 (emit_vsetvl_insn): Ditto.
53259 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53261 * config/riscv/vector.md: Fix constraints.
53263 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53265 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
53267 2023-01-27 Patrick Palka <ppalka@redhat.com>
53268 Jakub Jelinek <jakub@redhat.com>
53270 * tree-core.h (tree_code_type, tree_code_length): For
53271 C++17 and later, add inline keyword, otherwise don't define
53272 the arrays, but declare extern arrays.
53273 * tree.cc (tree_code_type, tree_code_length): Define these
53274 arrays for C++14 and older.
53276 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53278 * config/riscv/riscv-vsetvl.h: Change it into public.
53280 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53282 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
53285 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53287 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
53289 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53291 * config/riscv/vector.md: Fix incorrect attributes.
53293 2023-01-27 Richard Biener <rguenther@suse.de>
53296 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
53297 Don't add crtfastmath.o for -shared.
53299 2023-01-27 Alexandre Oliva <oliva@gnu.org>
53301 * doc/options.texi (option, RejectNegative): Mention that
53302 -g-started options are also implicitly negatable.
53304 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
53306 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
53307 Use get_typenode_from_name to get fixed-width integer type
53309 * config/riscv/riscv-vector-builtins.def: Update define with
53310 fixed-width integer type nodes.
53312 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53314 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
53315 (real_insn_and_same_bb_p): New function.
53316 (same_bb_and_after_or_equal_p): Remove it.
53317 (before_p): New function.
53318 (reg_killed_by_bb_p): Ditto.
53319 (has_vsetvl_killed_avl_p): Ditto.
53320 (get_vl): Move location so that we can call it.
53321 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
53322 (available_occurrence_p): Ditto.
53323 (dominate_probability_p): Remove it.
53324 (can_backward_propagate_p): Remove it.
53325 (get_all_nonphi_defs): New function.
53326 (get_all_predecessors): Ditto.
53327 (any_insn_in_bb_p): Ditto.
53328 (insert_vsetvl): Adjust AVL REG.
53329 (source_equal_p): New function.
53330 (extract_single_source): Ditto.
53331 (avl_info::single_source_equal_p): Ditto.
53332 (avl_info::operator==): Adjust for AVL=REG.
53333 (vl_vtype_info::same_avl_p): Ditto.
53334 (vector_insn_info::set_demand_info): Remove it.
53335 (vector_insn_info::compatible_p): Adjust for AVL=REG.
53336 (vector_insn_info::compatible_avl_p): New function.
53337 (vector_insn_info::merge): Adjust AVL=REG.
53338 (vector_insn_info::dump): Ditto.
53339 (pass_vsetvl::merge_successors): Remove it.
53340 (enum fusion_type): New enum.
53341 (pass_vsetvl::get_backward_fusion_type): New function.
53342 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
53343 (pass_vsetvl::forward_demand_fusion): Ditto.
53344 (pass_vsetvl::demand_fusion): Ditto.
53345 (pass_vsetvl::prune_expressions): Ditto.
53346 (pass_vsetvl::compute_local_properties): Ditto.
53347 (pass_vsetvl::cleanup_vsetvls): Ditto.
53348 (pass_vsetvl::commit_vsetvls): Ditto.
53349 (pass_vsetvl::init): Ditto.
53350 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
53351 (enum merge_type): New enum.
53353 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53355 * config/riscv/riscv-vsetvl.cc
53356 (vector_infos_manager::vector_infos_manager): Add probability.
53357 (vector_infos_manager::dump): Ditto.
53358 (pass_vsetvl::compute_probabilities): Ditto.
53359 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
53361 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53363 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
53364 (vector_insn_info::merge): Ditto.
53365 (vector_insn_info::dump): Ditto.
53366 (pass_vsetvl::merge_successors): Ditto.
53367 (pass_vsetvl::backward_demand_fusion): Ditto.
53368 (pass_vsetvl::forward_demand_fusion): Ditto.
53369 (pass_vsetvl::commit_vsetvls): Ditto.
53370 * config/riscv/riscv-vsetvl.h: Ditto.
53372 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53374 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
53377 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53379 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
53381 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53383 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
53384 Add pre-check for redundant flow.
53386 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53388 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
53389 (vector_infos_manager::free_bitmap_vectors): Ditto.
53390 (pass_vsetvl::pre_vsetvl): Adjust codes.
53391 * config/riscv/riscv-vsetvl.h: New function declaration.
53393 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53395 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
53396 (vector_insn_info::set_demand_info): New function.
53397 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
53398 (pass_vsetvl::merge_successors): Ditto.
53399 (pass_vsetvl::compute_global_backward_infos): Ditto.
53400 (pass_vsetvl::backward_demand_fusion): Ditto.
53401 (pass_vsetvl::forward_demand_fusion): Ditto.
53402 (pass_vsetvl::demand_fusion): New function.
53403 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
53404 * config/riscv/riscv-vsetvl.h: New function declaration.
53406 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53408 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
53410 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53412 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
53413 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
53415 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53417 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
53418 (backward_propagate_worthwhile_p): Fix non-worthwhile.
53420 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53422 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
53424 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53426 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
53427 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
53428 (pass_vsetvl::commit_vsetvls): Ditto.
53429 * config/riscv/riscv-vsetvl.h: New function declaration.
53431 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53433 * config/riscv/vector.md:
53435 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53437 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
53438 pred_store for vse.
53439 * config/riscv/riscv-vector-builtins.cc
53440 (function_expander::add_mem_operand): Refine function.
53441 (function_expander::use_contiguous_load_insn): Adjust new
53443 (function_expander::use_contiguous_store_insn): Ditto.
53444 * config/riscv/riscv-vector-builtins.h: Refine function.
53445 * config/riscv/vector.md (@pred_store<mode>): New pattern.
53447 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
53449 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
53451 2023-01-26 Marek Polacek <polacek@redhat.com>
53453 PR middle-end/108543
53454 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
53455 if it was previously set.
53457 2023-01-26 Jakub Jelinek <jakub@redhat.com>
53459 PR tree-optimization/108540
53460 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
53461 are singletons, use range_true even if op1 != op2
53462 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
53463 even if intersection of the ranges is empty and one has
53464 zero low bound and another zero high bound, use range_true_and_false
53465 rather than range_false.
53466 (foperator_not_equal::fold_range): If both op1 and op2
53467 are singletons, use range_false even if op1 != op2
53468 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
53469 even if intersection of the ranges is empty and one has
53470 zero low bound and another zero high bound, use range_true_and_false
53471 rather than range_true.
53473 2023-01-26 Jakub Jelinek <jakub@redhat.com>
53475 * value-relation.cc (kind_string): Add const.
53476 (rr_negate_table, rr_swap_table, rr_intersect_table,
53477 rr_union_table, rr_transitive_table): Add static const, change
53478 element type from relation_kind to unsigned char.
53479 (relation_negate, relation_swap, relation_intersect, relation_union,
53480 relation_transitive): Cast rr_*_table element to relation_kind.
53481 (relation_to_code): Add static const.
53482 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
53484 2023-01-26 Richard Biener <rguenther@suse.de>
53486 PR tree-optimization/108547
53487 * gimple-predicate-analysis.cc (value_sat_pred_p):
53490 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
53492 PR tree-optimization/108522
53493 * tree-object-size.cc (compute_object_offset): Make EXPR
53494 argument non-const. Call component_ref_field_offset.
53496 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
53498 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
53499 FEATURE_STRING field.
53501 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
53503 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
53505 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
53509 * gcc.cc: Provide default specs for Modula-2 so that when the
53510 language is not built-in better diagnostics are emitted for
53511 attempts to use .mod or .m2i file extensions.
53513 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53515 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
53517 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53519 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
53521 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53523 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
53526 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53528 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
53530 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
53532 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
53534 2023-01-25 Richard Biener <rguenther@suse.de>
53536 PR tree-optimization/108523
53537 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
53538 backedge value for the result when using predication to
53541 2023-01-25 Richard Biener <rguenther@suse.de>
53543 * doc/lto.texi (Command line options): Reword and update reference
53544 to removed lto_read_all_file_options.
53546 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
53548 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
53551 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
53553 * doc/contrib.texi: Add Jose E. Marchesi.
53555 2023-01-25 Jakub Jelinek <jakub@redhat.com>
53557 PR tree-optimization/108498
53558 * gimple-ssa-store-merging.cc (class store_operand_info):
53559 End coment with full stop rather than comma.
53560 (split_group): Likewise.
53561 (merged_store_group::apply_stores): Clear string_concatenation if
53562 start or end aren't on a byte boundary.
53564 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
53565 Jakub Jelinek <jakub@redhat.com>
53567 PR tree-optimization/108522
53568 * tree-object-size.cc (compute_object_offset): Use
53569 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
53571 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
53573 * config/xtensa/xtensa.md:
53574 Fix exit from loops detecting references before overwriting in the
53577 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
53579 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
53580 do elimination but only for hard register.
53581 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
53582 calls of get_hard_regno.
53584 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
53586 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
53589 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
53592 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
53593 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
53596 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
53598 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
53599 and only include 'csky/t-csky-linux' when enable multilib.
53600 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
53601 define it when disable multilib.
53603 2023-01-24 Richard Biener <rguenther@suse.de>
53605 PR tree-optimization/108500
53606 * dominance.h (calculate_dominance_info): Add parameter
53607 to indicate fast-query compute, defaulted to true.
53608 * dominance.cc (calculate_dominance_info): Honor
53609 fast-query compute parameter.
53610 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
53611 not compute the dominator fast-query DFS numbers.
53613 2023-01-24 Eric Biggers <ebiggers@google.com>
53616 * optc-save-gen.awk: Fix copy-and-paste error.
53618 2023-01-24 Jakub Jelinek <jakub@redhat.com>
53621 * cgraphbuild.cc: Include gimplify.h.
53622 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
53623 their corresponding DECL_VALUE_EXPR expressions after unsharing.
53625 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53628 * config.gcc (tm_file): Move the variable out of loop.
53630 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
53631 Yang Yujie <yangyujie@loongson.cn>
53634 * config/loongarch/loongarch.cc (loongarch_classify_address):
53635 Add precessint for CONST_INT.
53636 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
53637 (loongarch_print_operand): Increase the processing of '%c'.
53638 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
53639 And port the public operand modifiers information to this document.
53641 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53643 * doc/invoke.texi (-mbranch-protection): Update documentation.
53645 2023-01-23 Richard Biener <rguenther@suse.de>
53648 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
53650 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
53651 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
53652 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
53653 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
53655 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53657 * config/arm/aout.h (ra_auth_code): Add entry in enum.
53658 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
53659 to dwarf frame expression.
53660 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
53661 (arm_expand_prologue): Update frame related information and reg notes
53662 for pac/pacbit insn.
53663 (arm_regno_class): Check for pac pseudo reigster.
53664 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
53665 (arm_init_machine_status): Set pacspval_needed to zero.
53666 (arm_debugger_regno): Check for PAC register.
53667 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
53669 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
53670 (arm_unwind_emit): Update REG_CFA_REGISTER case._
53671 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
53672 (DWARF_PAC_REGNUM): Define.
53673 (IS_PAC_REGNUM): Likewise.
53674 (enum reg_class): Add PAC_REG entry.
53675 (machine_function): Add pacbti_needed state to structure.
53676 * config/arm/arm.md (RA_AUTH_CODE): Define.
53678 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53680 * config.gcc ($tm_file): Update variable.
53681 * config/arm/arm-mlib.h: Create new header file.
53682 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
53683 multilib arch directory.
53684 (MULTILIB_REUSE): Add multilib reuse rules.
53685 (MULTILIB_MATCHES): Add multilib match rules.
53687 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53689 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
53690 * config/arm/arm-tables.opt: Regenerate.
53691 * config/arm/arm-tune.md: Likewise.
53692 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
53693 * (-mfix-cmse-cve-2021-35465): Likewise.
53695 2023-01-23 Richard Biener <rguenther@suse.de>
53697 PR tree-optimization/108482
53698 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
53699 .LOOP_DIST_ALIAS calls.
53701 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53703 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
53704 * config/arm/arm-protos.h: Update.
53705 * config/arm/aarch-common-protos.h: Declare
53706 'aarch_bti_arch_check'.
53707 * config/arm/arm.cc (aarch_bti_enabled) Update.
53708 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
53709 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
53710 * config/arm/arm.md (bti_nop): New insn.
53711 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
53712 (aarch-bti-insert.o): New target.
53713 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
53714 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
53716 (gate): Make use of 'aarch_bti_arch_check'.
53717 * config/arm/arm-passes.def: New file.
53718 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
53720 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53722 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
53723 'aarch-bti-insert.o'.
53724 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
53726 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
53727 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
53728 (aarch64_output_mi_thunk)
53729 (aarch64_print_patchable_function_entry)
53730 (aarch64_file_end_indicate_exec_stack): Update renamed function
53731 calls to renamed functions.
53732 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
53733 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
53735 * config/aarch64/aarch64-bti-insert.cc: Delete.
53736 * config/arm/aarch-bti-insert.cc: New file including and
53737 generalizing code from aarch64-bti-insert.cc.
53738 * config/arm/aarch-common-protos.h: Update.
53740 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53742 * config/arm/arm.h (arm_arch8m_main): Declare it.
53743 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
53745 * config/arm/arm.cc (arm_arch8m_main): Define it.
53746 (arm_option_reconfigure_globals): Set arm_arch8m_main.
53747 (arm_compute_frame_layout, arm_expand_prologue)
53748 (thumb2_expand_return, arm_expand_epilogue)
53749 (arm_conditional_register_usage): Update for pac codegen.
53750 (arm_current_function_pac_enabled_p): New function.
53751 (aarch_bti_enabled) New function.
53752 (use_return_insn): Return zero when pac is enabled.
53753 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
53755 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
53756 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
53758 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53760 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
53761 mbranch-protection.
53763 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53764 Tejas Belagod <tbelagod@arm.com>
53766 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
53767 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
53769 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53770 Tejas Belagod <tbelagod@arm.com>
53771 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
53773 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
53774 new pseudo register class _UVRSC_PAC.
53776 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53777 Tejas Belagod <tbelagod@arm.com>
53779 * config/arm/arm-c.cc (arm_cpu_builtins): Define
53780 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
53781 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
53783 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53784 Tejas Belagod <tbelagod@arm.com>
53786 * doc/sourcebuild.texi: Document arm_pacbti_hw.
53788 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53789 Tejas Belagod <tbelagod@arm.com>
53790 Richard Earnshaw <Richard.Earnshaw@arm.com>
53792 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
53793 -mbranch-protection option and initialize appropriate data structures.
53794 * config/arm/arm.opt (-mbranch-protection): New option.
53795 * doc/invoke.texi (Arm Options): Document it.
53797 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53798 Tejas Belagod <tbelagod@arm.com>
53800 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
53801 * config/arm/arm-cpus.in (pacbti): New feature.
53802 * doc/invoke.texi (Arm Options): Document it.
53804 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
53805 Tejas Belagod <tbelagod@arm.com>
53807 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
53808 (all_architectures): Fix comment.
53809 (aarch64_parse_extension): Rename return type, enum value names.
53810 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
53811 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
53812 Also rename corresponding enum values.
53813 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
53814 out aarch64_function_type and move it to common code as
53815 aarch_function_type in aarch-common.h.
53816 * config/aarch64/aarch64-protos.h: Include common types header,
53817 move out types aarch64_parse_opt_result and aarch64_key_type to
53819 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
53820 and functions out into aarch-common.h and aarch-common.cc. Fix up
53821 all the name changes resulting from the move.
53822 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
53824 * config/aarch64/aarch64.opt: Include aarch-common.h to import
53825 type move. Fix up name changes from factoring out common code and
53827 * config/arm/aarch-common-protos.h: Export factored out routines to both
53829 * config/arm/aarch-common.cc: Include newly factored out types.
53830 Move all mbranch-protection code and data structures from
53832 * config/arm/aarch-common.h: New header that declares types shared
53833 between aarch32 and aarch64 backends.
53834 * config/arm/arm-protos.h: Declare types and variables that are
53835 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
53836 aarch_ra_sign_scope and aarch_enable_bti.
53837 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
53838 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
53839 * config/arm/arm.cc: Add missing includes.
53841 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
53843 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
53845 2023-01-23 Richard Biener <rguenther@suse.de>
53847 PR tree-optimization/108449
53848 * cgraphunit.cc (check_global_declaration): Do not turn
53849 undefined statics into externs.
53851 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
53853 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
53854 and HI input modes.
53855 * config/pru/pru.md (clz): Fix generated code for QI and HI
53858 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
53860 * config/v850/v850.cc (v850_select_section): Put const volatile
53861 objects into read-only sections.
53863 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
53865 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
53866 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
53867 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
53869 2023-01-20 Jakub Jelinek <jakub@redhat.com>
53871 PR tree-optimization/108457
53872 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
53873 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
53874 argument instead of a temporary. Formatting fixes.
53876 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53878 PR tree-optimization/108447
53879 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
53880 (relation_tests): Add self-tests for relation_{intersect,union}
53882 * selftest.h (relation_tests): Declare.
53883 * function-tests.cc (test_ranges): Call it.
53885 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
53888 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
53889 invalid third argument to __builtin_ia32_prefetch.
53891 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53893 PR middle-end/108459
53894 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
53895 than fold_unary for NEGATE_EXPR.
53897 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
53900 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
53901 comment. Move assert about alignment a bit later.
53903 2023-01-19 Jakub Jelinek <jakub@redhat.com>
53905 PR tree-optimization/108440
53906 * tree-ssa-forwprop.cc: Include gimple-range.h.
53907 (simplify_rotate): For the forms with T2 wider than T and shift counts of
53908 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
53909 to B. For the forms with T2 wider than T and shift counts of
53910 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
53911 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
53912 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
53913 pass specific ranger instead of get_global_range_query.
53914 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
53917 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
53919 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
53920 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
53922 (aarch64_simd_vec_copy_lane<mode>): Likewise.
53923 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
53925 2023-01-19 Alexandre Oliva <oliva@adacore.com>
53928 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
53929 within debug insns.
53931 2023-01-18 Martin Jambor <mjambor@suse.cz>
53934 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
53935 lcone_of chain also do not need the body.
53937 2023-01-18 Richard Biener <rguenther@suse.de>
53940 2022-12-16 Richard Biener <rguenther@suse.de>
53942 PR middle-end/108086
53943 * tree-inline.cc (remap_ssa_name): Do not unshare the
53944 result from the decl_map.
53946 2023-01-18 Murray Steele <murray.steele@arm.com>
53949 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
53951 (__arm_vst1q_p_s8): Likewise.
53952 (__arm_vld1q_z_u8): Likewise.
53953 (__arm_vld1q_z_s8): Likewise.
53954 (__arm_vst1q_p_u16): Likewise.
53955 (__arm_vst1q_p_s16): Likewise.
53956 (__arm_vld1q_z_u16): Likewise.
53957 (__arm_vld1q_z_s16): Likewise.
53958 (__arm_vst1q_p_u32): Likewise.
53959 (__arm_vst1q_p_s32): Likewise.
53960 (__arm_vld1q_z_u32): Likewise.
53961 (__arm_vld1q_z_s32): Likewise.
53962 (__arm_vld1q_z_f16): Likewise.
53963 (__arm_vst1q_p_f16): Likewise.
53964 (__arm_vld1q_z_f32): Likewise.
53965 (__arm_vst1q_p_f32): Likewise.
53967 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
53969 * config/xtensa/xtensa.md (xorsi3_internal):
53970 Rename from the original of "xorsi3".
53971 (xorsi3): New expansion pattern that emits addition rather than
53972 bitwise-XOR when the second source is a constant of -2147483648
53975 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
53976 Andrew Pinski <apinski@marvell.com>
53979 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
53980 vec_vsubcuqP with vec_vsubcuq.
53982 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
53985 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
53986 support for invalid uses of MMA opaque type in function arguments.
53988 2023-01-18 liuhongt <hongtao.liu@intel.com>
53991 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
53992 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
53993 -share or -mno-daz-ftz is specified.
53994 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
53995 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
53997 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
53999 * config/bpf/bpf.cc (bpf_option_override): Disable
54002 2023-01-17 Jakub Jelinek <jakub@redhat.com>
54004 PR tree-optimization/106523
54005 * tree-ssa-forwprop.cc (simplify_rotate): For the
54006 patterns with (-Y) & (B - 1) in one operand's shift
54007 count and Y in another, if T2 has wider precision than T,
54008 punt if Y could have a value in [B, B2 - 1] range.
54010 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
54013 * config/i386/i386.cc (x86_output_mi_thunk): Disable
54014 -mforce-indirect-call for PIC in 32-bit mode.
54016 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
54019 * ipa-modref.cc (modref_access_analysis::analyze): Use
54020 find_always_executed_bbs.
54021 * ipa-sra.cc (process_scan_results): Likewise.
54022 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
54023 (find_always_executed_bbs): New function.
54024 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
54025 (find_always_executed_bbs): Declare.
54027 2023-01-16 Jan Hubicka <jh@suse.cz>
54029 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
54030 by TARGET_USE_SCATTER.
54031 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
54032 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
54033 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
54034 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
54035 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
54036 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
54038 2023-01-16 Richard Biener <rguenther@suse.de>
54041 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
54043 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
54047 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
54048 (__ARM_mve_coerce3): Likewise.
54050 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
54052 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
54054 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
54056 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
54057 (number_of_iterations_bitcount): Add call to the above.
54058 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
54059 c[lt]z idiom recognition.
54061 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
54063 * doc/sourcebuild.texi: Add missing target attributes.
54065 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
54067 PR tree-optimization/94793
54068 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
54070 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
54071 (number_of_iterations_cltz_complement): New.
54072 (number_of_iterations_bitcount): Add call to the above.
54074 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
54076 * doc/extend.texi (Common Function Attributes): Fix grammar.
54078 2023-01-16 Jakub Jelinek <jakub@redhat.com>
54081 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
54082 * config/riscv/riscv-vsetvl.cc: Likewise.
54084 2023-01-16 Jakub Jelinek <jakub@redhat.com>
54087 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
54088 disable -Winit-self using pragma GCC diagnostic ignored.
54089 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
54091 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
54092 _mm256_undefined_si256): Likewise.
54093 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
54094 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
54095 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
54096 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
54098 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
54101 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
54102 support for invalid uses in inline asm, factor out the checking and
54103 erroring to lambda function check_and_error_invalid_use.
54105 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
54107 PR tree-optimization/107608
54108 * range-op-float.cc (range_operator_float::fold_range): Avoid
54109 folding into INF when flag_trapping_math.
54110 * value-range.h (frange::known_isinf): Return false for possible NANs.
54112 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54114 * config.gcc (csky-*-*): Support --with-float=softfp.
54116 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54118 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
54119 Rename to xtensa_adjust_reg_alloc_order.
54120 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
54121 Ditto. And also remove code to reorder register numbers for
54122 leaf functions, rename the tables, and adjust the allocation
54123 order for the call0 ABI to use register A0 more.
54124 (xtensa_leaf_regs): Remove.
54125 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
54126 (order_regs_for_local_alloc): Rename as the above.
54127 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
54129 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
54131 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
54132 Change to define_insn_and_split to fold ldr+dup to ld1rq.
54133 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
54135 2023-01-14 Alexandre Oliva <oliva@adacore.com>
54137 * hash-table.h (is_deleted): Precheck !is_empty.
54138 (mark_deleted): Postcheck !is_empty.
54139 (copy constructor): Test is_empty before is_deleted.
54141 2023-01-14 Alexandre Oliva <oliva@adacore.com>
54144 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
54147 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
54149 PR rtl-optimization/108274
54150 * function.cc (thread_prologue_and_epilogue_insns): Also update the
54151 DF information for calls in a few more cases.
54153 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
54155 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
54156 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
54158 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
54159 (MAX_SYNC_LIBFUNC_SIZE): Define.
54160 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
54162 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
54163 libcall when sync libcalls are disabled.
54164 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
54165 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
54166 are disabled on 32-bit target.
54167 * config/pa/pa.opt (matomic-libcalls): New option.
54168 * doc/invoke.texi (HPPA Options): Update.
54170 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
54172 PR rtl-optimization/108117
54173 PR rtl-optimization/108132
54174 * sched-deps.cc (deps_analyze_insn): Do not schedule across
54175 calls before reload.
54177 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
54179 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
54180 options for -mlibarch.
54181 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
54182 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
54184 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
54186 * attribs.cc (strict_flex_array_level_of): Move this function to ...
54187 * attribs.h (strict_flex_array_level_of): Remove the declaration.
54188 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
54189 replace the referece to strict_flex_array_level_of with
54190 DECL_NOT_FLEXARRAY.
54191 * tree.cc (component_ref_size): Likewise.
54193 2023-01-13 Richard Biener <rguenther@suse.de>
54196 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
54197 crtfastmath.o for -shared.
54198 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
54200 2023-01-13 Richard Biener <rguenther@suse.de>
54203 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
54204 crtfastmath.o for -shared.
54205 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
54207 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
54210 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
54212 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
54214 (TARGET_DWARF_FRAME_REG_MODE): Define.
54216 2023-01-13 Richard Biener <rguenther@suse.de>
54219 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
54220 update EH info on the fly.
54222 2023-01-13 Richard Biener <rguenther@suse.de>
54224 PR tree-optimization/108387
54225 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
54226 value before inserting expression into the tables.
54228 2023-01-12 Andrew Pinski <apinski@marvell.com>
54229 Roger Sayle <roger@nextmovesoftware.com>
54231 PR tree-optimization/92342
54232 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
54233 Use tcc_comparison and :c for the multiply.
54234 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
54236 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
54237 Richard Sandiford <richard.sandiford@arm.com>
54240 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
54241 Check DECL_PACKED for bitfield.
54242 (aarch64_layout_arg): Warn when parameter passing ABI changes.
54243 (aarch64_function_arg_boundary): Do not warn here.
54244 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
54247 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
54248 Richard Sandiford <richard.sandiford@arm.com>
54250 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
54252 (aarch64_layout_arg): Factorize warning conditions.
54253 (aarch64_function_arg_boundary): Fix typo.
54254 * function.cc (currently_expanding_function_start): New variable.
54255 (expand_function_start): Handle
54256 currently_expanding_function_start.
54257 * function.h (currently_expanding_function_start): Declare.
54259 2023-01-12 Richard Biener <rguenther@suse.de>
54261 PR tree-optimization/99412
54262 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
54263 (swap_ops_for_binary_stmt): Remove reduction handling.
54264 (rewrite_expr_tree_parallel): Adjust.
54265 (reassociate_bb): Likewise.
54266 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
54268 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54270 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
54271 Rearrange the emitting codes.
54273 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54275 * config/xtensa/xtensa.md (*btrue):
54276 Correct value of the attribute "length" that depends on
54277 TARGET_DENSITY and operands, and add '?' character to the register
54278 constraint of the compared operand.
54280 2023-01-12 Alexandre Oliva <oliva@adacore.com>
54282 * hash-table.h (expand): Check elements and deleted counts.
54283 (verify): Likewise.
54285 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
54287 PR tree-optimization/71343
54288 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
54289 the value number of the expression X << C the same as the value
54290 number for the multiplication X * (1<<C).
54292 2023-01-11 David Faust <david.faust@oracle.com>
54295 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
54296 floating point modes.
54298 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
54300 PR tree-optimization/108199
54301 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
54302 for bit-field references.
54304 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
54306 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
54307 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
54308 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
54309 OPTION_MASK_P10_FUSION.
54311 2023-01-11 Richard Biener <rguenther@suse.de>
54313 PR tree-optimization/107767
54314 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
54315 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
54316 * tree-switch-conversion.cc (switch_conversion::collect):
54317 Count unique non-default targets accounting for later
54318 merging opportunities.
54320 2023-01-11 Martin Liska <mliska@suse.cz>
54322 PR middle-end/107976
54323 * params.opt: Limit JT params.
54324 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
54326 2023-01-11 Richard Biener <rguenther@suse.de>
54328 PR tree-optimization/108352
54329 * tree-ssa-threadbackward.cc
54330 (back_threader_profitability::profitable_path_p): Adjust
54331 heuristic that allows non-multi-way branch threads creating
54333 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
54334 (--param fsm-scale-path-stmts): Adjust.
54335 * params.opt (--param=fsm-scale-path-blocks=): Remove.
54336 (-param=fsm-scale-path-stmts=): Adjust description.
54338 2023-01-11 Richard Biener <rguenther@suse.de>
54340 PR tree-optimization/108353
54341 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
54343 (add_ssa_edge): Simplify.
54344 (add_control_edge): Likewise.
54345 (ssa_prop_init): Likewise.
54346 (ssa_prop_fini): Likewise.
54347 (ssa_propagation_engine::ssa_propagate): Likewise.
54349 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
54351 * config/s390/s390.md (*not<mode>): New pattern.
54353 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54355 * config/xtensa/xtensa.cc (xtensa_insn_cost):
54356 Let insn cost for size be obtained by applying COSTS_N_INSNS()
54357 to instruction length and then dividing by 3.
54359 2023-01-10 Richard Biener <rguenther@suse.de>
54361 PR tree-optimization/106293
54362 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
54363 process degenerate PHI defs.
54365 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
54367 PR rtl-optimization/106421
54368 * cprop.cc (bypass_block): Check that DEST is local to this
54369 function (non-NULL) before calling find_edge.
54371 2023-01-10 Martin Jambor <mjambor@suse.cz>
54374 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
54375 sort_replacements, lookup_first_base_replacement and
54376 m_sorted_replacements_p.
54377 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
54378 (ipa_param_body_adjustments::register_replacement): Set
54379 m_sorted_replacements_p to false.
54380 (compare_param_body_replacement): New function.
54381 (ipa_param_body_adjustments::sort_replacements): Likewise.
54382 (ipa_param_body_adjustments::common_initialization): Call
54384 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
54385 m_sorted_replacements_p.
54386 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
54388 (ipa_param_body_adjustments::lookup_first_base_replacement): New
54390 (ipa_param_body_adjustments::modify_call_stmt): Use
54391 lookup_first_base_replacement.
54392 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
54393 adjustments->sort_replacements.
54395 2023-01-10 Richard Biener <rguenther@suse.de>
54397 PR tree-optimization/108314
54398 * tree-vect-stmts.cc (vectorizable_condition): Do not
54399 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
54401 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54403 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
54405 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54407 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
54409 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54411 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
54412 defines for soft float abi.
54414 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54416 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
54417 (smart_bclri): Likewise.
54418 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
54419 (fast_bclri): Likewise.
54420 (fast_cmpnesi_i): Likewise.
54421 (*fast_cmpltsi_i): Likewise.
54422 (*fast_cmpgeusi_i): Likewise.
54424 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
54426 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
54427 flag_fp_int_builtin_inexact || !flag_trapping_math.
54428 (<frm_pattern><mode>2): Likewise.
54430 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
54432 * config/s390/s390.cc (s390_register_info): Check call_used_regs
54433 instead of hard-coding the register numbers for call saved
54435 (s390_optimize_register_info): Likewise.
54437 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
54439 * doc/gm2.texi (Overview): Fix @node markers.
54440 (Using): Likewise. Remove subsections that were moved to Overview
54441 from the menu and move others around.
54443 2023-01-09 Richard Biener <rguenther@suse.de>
54445 PR middle-end/108209
54446 * genmatch.cc (commutative_op): Fix return value for
54447 user-id with non-commutative first replacement.
54449 2023-01-09 Jakub Jelinek <jakub@redhat.com>
54452 * calls.cc (expand_call): For calls with
54453 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
54456 2023-01-09 Richard Biener <rguenther@suse.de>
54458 PR middle-end/69482
54459 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
54460 qualified accesses also force objects to memory.
54462 2023-01-09 Martin Liska <mliska@suse.cz>
54465 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
54466 NULL (deleleted value) to a hash_set.
54468 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54470 * config/xtensa/xtensa.md (*splice_bits):
54471 New insn_and_split pattern.
54473 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
54475 * config/xtensa/xtensa.cc
54476 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
54477 New helper functions.
54478 (xtensa_set_return_address, xtensa_output_mi_thunk):
54479 Change to use the helper function.
54480 (xtensa_emit_adjust_stack_ptr): Ditto.
54481 And also change to try reusing the content of scratch register
54482 A9 if the register is not modified in the function body.
54484 2023-01-07 LIU Hao <lh_mouse@126.com>
54486 PR middle-end/108300
54487 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
54488 before <windows.h>.
54489 * diagnostic-color.cc: Likewise.
54490 * plugin.cc: Likewise.
54491 * prefix.cc: Likewise.
54493 2023-01-06 Joseph Myers <joseph@codesourcery.com>
54495 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
54496 for handling real integer types.
54498 2023-01-06 Tamar Christina <tamar.christina@arm.com>
54501 2022-12-12 Tamar Christina <tamar.christina@arm.com>
54503 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
54504 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
54505 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
54506 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
54507 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
54508 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
54509 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
54510 (aarch64_simd_dupv2hf): New.
54511 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
54513 * config/aarch64/iterators.md (VHSDF_P): New.
54514 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
54515 Vel, q, vp): Add V2HF.
54516 * config/arm/types.md (neon_fp_reduc_add_h): New.
54518 2023-01-06 Martin Liska <mliska@suse.cz>
54520 PR middle-end/107966
54521 * doc/options.texi: Fix Var documentation in internal manual.
54523 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
54526 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54528 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
54529 RTL expansion to allow condition (mask) to be shared/reused,
54530 by avoiding overwriting pseudos and adding REG_EQUAL notes.
54532 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
54534 * common.opt: Add -static-libgm2.
54535 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
54536 * doc/gm2.texi: Document static-libgm2.
54537 * gcc.cc (driver_handle_option): Allow static-libgm2.
54539 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
54541 * common/config/i386/i386-common.cc (processor_alias_table):
54542 Use CPU_ZNVER4 for znver4.
54543 * config/i386/i386.md: Add znver4.md.
54544 * config/i386/znver4.md: New.
54546 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54548 PR tree-optimization/108253
54549 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
54552 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54554 PR middle-end/108237
54555 * generic-match-head.cc: Include tree-pass.h.
54556 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
54557 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
54558 resp. PROP_gimple_lvec property set.
54560 2023-01-04 Jakub Jelinek <jakub@redhat.com>
54562 PR sanitizer/108256
54563 * convert.cc (do_narrow): Punt for MULT_EXPR if original
54564 type doesn't wrap around and -fsanitize=signed-integer-overflow
54566 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
54568 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
54570 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
54571 * common/config/i386/i386-common.cc: Add Emeraldrapids.
54573 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
54575 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
54578 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
54580 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
54581 default constructor to initialize it.
54582 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
54583 for last and iterate to handle recursive calls. Delete leftover
54584 candidates at the end.
54585 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
54587 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
54588 gc_candidate bit when a clone is used.
54590 2023-01-03 Florian Weimer <fweimer@redhat.com>
54593 2023-01-02 Florian Weimer <fweimer@redhat.com>
54595 * dwarf2cfi.cc (init_return_column_size): Remove.
54596 (init_one_dwarf_reg_size): Adjust.
54597 (generate_dwarf_reg_sizes): New function. Extracted
54598 from expand_builtin_init_dwarf_reg_sizes.
54599 (expand_builtin_init_dwarf_reg_sizes): Call
54600 generate_dwarf_reg_sizes.
54601 * target.def (init_dwarf_reg_sizes_extra): Adjust
54603 * config/msp430/msp430.cc
54604 (msp430_init_dwarf_reg_sizes_extra): Adjust.
54605 * config/rs6000/rs6000.cc
54606 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
54607 * doc/tm.texi: Update.
54609 2023-01-03 Florian Weimer <fweimer@redhat.com>
54612 2023-01-02 Florian Weimer <fweimer@redhat.com>
54614 * debug.h (dwarf_reg_sizes_constant): Declare.
54615 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
54617 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
54619 PR tree-optimization/105043
54620 * doc/extend.texi (Object Size Checking): Split out into two
54621 subsections and mention _FORTIFY_SOURCE.
54623 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54625 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
54626 RTL expansion to allow condition (mask) to be shared/reused,
54627 by avoiding overwriting pseudos and adding REG_EQUAL notes.
54629 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
54632 * config/i386/i386-features.cc
54633 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
54634 the gain/cost of converting a MEM operand.
54636 2023-01-03 Jakub Jelinek <jakub@redhat.com>
54638 PR middle-end/108264
54639 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
54640 from source which doesn't have scalar integral mode first convert
54643 2023-01-03 Jakub Jelinek <jakub@redhat.com>
54645 PR rtl-optimization/108263
54646 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
54649 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
54652 * config/i386/lujiazui.md (lujiazui_div): New automaton.
54653 (lua_div): New unit.
54654 (lua_idiv_qi): Correct unit in the reservation.
54655 (lua_idiv_qi_load): Ditto.
54656 (lua_idiv_hi): Ditto.
54657 (lua_idiv_hi_load): Ditto.
54658 (lua_idiv_si): Ditto.
54659 (lua_idiv_si_load): Ditto.
54660 (lua_idiv_di): Ditto.
54661 (lua_idiv_di_load): Ditto.
54662 (lua_fdiv_SF): Ditto.
54663 (lua_fdiv_SF_load): Ditto.
54664 (lua_fdiv_DF): Ditto.
54665 (lua_fdiv_DF_load): Ditto.
54666 (lua_fdiv_XF): Ditto.
54667 (lua_fdiv_XF_load): Ditto.
54668 (lua_ssediv_SF): Ditto.
54669 (lua_ssediv_load_SF): Ditto.
54670 (lua_ssediv_V4SF): Ditto.
54671 (lua_ssediv_load_V4SF): Ditto.
54672 (lua_ssediv_V8SF): Ditto.
54673 (lua_ssediv_load_V8SF): Ditto.
54674 (lua_ssediv_SD): Ditto.
54675 (lua_ssediv_load_SD): Ditto.
54676 (lua_ssediv_V2DF): Ditto.
54677 (lua_ssediv_load_V2DF): Ditto.
54678 (lua_ssediv_V4DF): Ditto.
54679 (lua_ssediv_load_V4DF): Ditto.
54681 2023-01-02 Florian Weimer <fweimer@redhat.com>
54683 * debug.h (dwarf_reg_sizes_constant): Declare.
54684 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
54686 2023-01-02 Florian Weimer <fweimer@redhat.com>
54688 * dwarf2cfi.cc (init_return_column_size): Remove.
54689 (init_one_dwarf_reg_size): Adjust.
54690 (generate_dwarf_reg_sizes): New function. Extracted
54691 from expand_builtin_init_dwarf_reg_sizes.
54692 (expand_builtin_init_dwarf_reg_sizes): Call
54693 generate_dwarf_reg_sizes.
54694 * target.def (init_dwarf_reg_sizes_extra): Adjust
54696 * config/msp430/msp430.cc
54697 (msp430_init_dwarf_reg_sizes_extra): Adjust.
54698 * config/rs6000/rs6000.cc
54699 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
54700 * doc/tm.texi: Update.
54702 2023-01-02 Jakub Jelinek <jakub@redhat.com>
54704 * gcc.cc (process_command): Update copyright notice dates.
54705 * gcov-dump.cc (print_version): Ditto.
54706 * gcov.cc (print_version): Ditto.
54707 * gcov-tool.cc (print_version): Ditto.
54708 * gengtype.cc (create_file): Ditto.
54709 * doc/cpp.texi: Bump @copying's copyright year.
54710 * doc/cppinternals.texi: Ditto.
54711 * doc/gcc.texi: Ditto.
54712 * doc/gccint.texi: Ditto.
54713 * doc/gcov.texi: Ditto.
54714 * doc/install.texi: Ditto.
54715 * doc/invoke.texi: Ditto.
54717 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
54718 Uroš Bizjak <ubizjak@gmail.com>
54720 * config/i386/i386.md (extendditi2): New define_insn.
54721 (define_split): Use DWIH mode iterator to treat new extendditi2
54722 identically to existing extendsidi2_1.
54723 (define_peephole2): Likewise.
54724 (define_peephole2): Likewise.
54725 (define_Split): Likewise.
54728 Copyright (C) 2023 Free Software Foundation, Inc.
54730 Copying and distribution of this file, with or without modification,
54731 are permitted in any medium without royalty provided the copyright
54732 notice and this notice are preserved.