* Makefile.in (C_COMMON_OBJS): Depend on c-cilkplus.o.
[official-gcc.git] / gcc / dwarf2cfi.c
blobe0f85edc61bb6d2114f3df75ea7eab80a644f5ef
1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "version.h"
25 #include "flags.h"
26 #include "rtl.h"
27 #include "tree.h"
28 #include "function.h"
29 #include "basic-block.h"
30 #include "dwarf2.h"
31 #include "dwarf2out.h"
32 #include "dwarf2asm.h"
33 #include "ggc.h"
34 #include "hash-table.h"
35 #include "tm_p.h"
36 #include "target.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
53 #endif
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
57 #endif
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
68 dw_cfa_location cfa;
69 dw_cfi_ref cfa_cfi;
71 /* The expressions for any register column that is saved. */
72 cfi_vec reg_save;
73 } dw_cfi_row;
75 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
76 typedef struct GTY(()) reg_saved_in_data_struct {
77 rtx orig_reg;
78 rtx saved_in_reg;
79 } reg_saved_in_data;
82 /* Since we no longer have a proper CFG, we're going to create a facsimile
83 of one on the fly while processing the frame-related insns.
85 We create dw_trace_info structures for each extended basic block beginning
86 and ending at a "save point". Save points are labels, barriers, certain
87 notes, and of course the beginning and end of the function.
89 As we encounter control transfer insns, we propagate the "current"
90 row state across the edges to the starts of traces. When checking is
91 enabled, we validate that we propagate the same data from all sources.
93 All traces are members of the TRACE_INFO array, in the order in which
94 they appear in the instruction stream.
96 All save points are present in the TRACE_INDEX hash, mapping the insn
97 starting a trace to the dw_trace_info describing the trace. */
99 typedef struct
101 /* The insn that begins the trace. */
102 rtx head;
104 /* The row state at the beginning and end of the trace. */
105 dw_cfi_row *beg_row, *end_row;
107 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
108 while scanning insns. However, the args_size value is irrelevant at
109 any point except can_throw_internal_p insns. Therefore the "delay"
110 sizes the values that must actually be emitted for this trace. */
111 HOST_WIDE_INT beg_true_args_size, end_true_args_size;
112 HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
114 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
115 rtx eh_head;
117 /* The following variables contain data used in interpreting frame related
118 expressions. These are not part of the "real" row state as defined by
119 Dwarf, but it seems like they need to be propagated into a trace in case
120 frame related expressions have been sunk. */
121 /* ??? This seems fragile. These variables are fragments of a larger
122 expression. If we do not keep the entire expression together, we risk
123 not being able to put it together properly. Consider forcing targets
124 to generate self-contained expressions and dropping all of the magic
125 interpretation code in this file. Or at least refusing to shrink wrap
126 any frame related insn that doesn't contain a complete expression. */
128 /* The register used for saving registers to the stack, and its offset
129 from the CFA. */
130 dw_cfa_location cfa_store;
132 /* A temporary register holding an integral value used in adjusting SP
133 or setting up the store_reg. The "offset" field holds the integer
134 value, not an offset. */
135 dw_cfa_location cfa_temp;
137 /* A set of registers saved in other registers. This is the inverse of
138 the row->reg_save info, if the entry is a DW_CFA_register. This is
139 implemented as a flat array because it normally contains zero or 1
140 entry, depending on the target. IA-64 is the big spender here, using
141 a maximum of 5 entries. */
142 vec<reg_saved_in_data> regs_saved_in_regs;
144 /* An identifier for this trace. Used only for debugging dumps. */
145 unsigned id;
147 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
148 bool switch_sections;
150 /* True if we've seen different values incoming to beg_true_args_size. */
151 bool args_size_undefined;
152 } dw_trace_info;
155 typedef dw_trace_info *dw_trace_info_ref;
158 /* Hashtable helpers. */
160 struct trace_info_hasher : typed_noop_remove <dw_trace_info>
162 typedef dw_trace_info value_type;
163 typedef dw_trace_info compare_type;
164 static inline hashval_t hash (const value_type *);
165 static inline bool equal (const value_type *, const compare_type *);
168 inline hashval_t
169 trace_info_hasher::hash (const value_type *ti)
171 return INSN_UID (ti->head);
174 inline bool
175 trace_info_hasher::equal (const value_type *a, const compare_type *b)
177 return a->head == b->head;
181 /* The variables making up the pseudo-cfg, as described above. */
182 static vec<dw_trace_info> trace_info;
183 static vec<dw_trace_info_ref> trace_work_list;
184 static hash_table <trace_info_hasher> trace_index;
186 /* A vector of call frame insns for the CIE. */
187 cfi_vec cie_cfi_vec;
189 /* The state of the first row of the FDE table, which includes the
190 state provided by the CIE. */
191 static GTY(()) dw_cfi_row *cie_cfi_row;
193 static GTY(()) reg_saved_in_data *cie_return_save;
195 static GTY(()) unsigned long dwarf2out_cfi_label_num;
197 /* The insn after which a new CFI note should be emitted. */
198 static rtx add_cfi_insn;
200 /* When non-null, add_cfi will add the CFI to this vector. */
201 static cfi_vec *add_cfi_vec;
203 /* The current instruction trace. */
204 static dw_trace_info *cur_trace;
206 /* The current, i.e. most recently generated, row of the CFI table. */
207 static dw_cfi_row *cur_row;
209 /* A copy of the current CFA, for use during the processing of a
210 single insn. */
211 static dw_cfa_location *cur_cfa;
213 /* We delay emitting a register save until either (a) we reach the end
214 of the prologue or (b) the register is clobbered. This clusters
215 register saves so that there are fewer pc advances. */
217 typedef struct {
218 rtx reg;
219 rtx saved_reg;
220 HOST_WIDE_INT cfa_offset;
221 } queued_reg_save;
224 static vec<queued_reg_save> queued_reg_saves;
226 /* True if any CFI directives were emitted at the current insn. */
227 static bool any_cfis_emitted;
229 /* Short-hand for commonly used register numbers. */
230 static unsigned dw_stack_pointer_regnum;
231 static unsigned dw_frame_pointer_regnum;
233 /* Hook used by __throw. */
236 expand_builtin_dwarf_sp_column (void)
238 unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
239 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1));
242 /* MEM is a memory reference for the register size table, each element of
243 which has mode MODE. Initialize column C as a return address column. */
245 static void
246 init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c)
248 HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
249 HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
250 emit_move_insn (adjust_address (mem, mode, offset),
251 gen_int_mode (size, mode));
254 /* Generate code to initialize the register size table. */
256 void
257 expand_builtin_init_dwarf_reg_sizes (tree address)
259 unsigned int i;
260 enum machine_mode mode = TYPE_MODE (char_type_node);
261 rtx addr = expand_normal (address);
262 rtx mem = gen_rtx_MEM (BLKmode, addr);
263 bool wrote_return_column = false;
265 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
267 unsigned int dnum = DWARF_FRAME_REGNUM (i);
268 unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
270 if (rnum < DWARF_FRAME_REGISTERS)
272 HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
273 enum machine_mode save_mode = reg_raw_mode[i];
274 HOST_WIDE_INT size;
276 if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
277 save_mode = choose_hard_reg_mode (i, 1, true);
278 if (dnum == DWARF_FRAME_RETURN_COLUMN)
280 if (save_mode == VOIDmode)
281 continue;
282 wrote_return_column = true;
284 size = GET_MODE_SIZE (save_mode);
285 if (offset < 0)
286 continue;
288 emit_move_insn (adjust_address (mem, mode, offset),
289 gen_int_mode (size, mode));
293 if (!wrote_return_column)
294 init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
296 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
297 init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN);
298 #endif
300 targetm.init_dwarf_reg_sizes_extra (address);
304 static dw_trace_info *
305 get_trace_info (rtx insn)
307 dw_trace_info dummy;
308 dummy.head = insn;
309 return trace_index.find_with_hash (&dummy, INSN_UID (insn));
312 static bool
313 save_point_p (rtx insn)
315 /* Labels, except those that are really jump tables. */
316 if (LABEL_P (insn))
317 return inside_basic_block_p (insn);
319 /* We split traces at the prologue/epilogue notes because those
320 are points at which the unwind info is usually stable. This
321 makes it easier to find spots with identical unwind info so
322 that we can use remember/restore_state opcodes. */
323 if (NOTE_P (insn))
324 switch (NOTE_KIND (insn))
326 case NOTE_INSN_PROLOGUE_END:
327 case NOTE_INSN_EPILOGUE_BEG:
328 return true;
331 return false;
334 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
336 static inline HOST_WIDE_INT
337 div_data_align (HOST_WIDE_INT off)
339 HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT;
340 gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off);
341 return r;
344 /* Return true if we need a signed version of a given opcode
345 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
347 static inline bool
348 need_data_align_sf_opcode (HOST_WIDE_INT off)
350 return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0;
353 /* Return a pointer to a newly allocated Call Frame Instruction. */
355 static inline dw_cfi_ref
356 new_cfi (void)
358 dw_cfi_ref cfi = ggc_alloc_dw_cfi_node ();
360 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0;
361 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0;
363 return cfi;
366 /* Return a newly allocated CFI row, with no defined data. */
368 static dw_cfi_row *
369 new_cfi_row (void)
371 dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row ();
373 row->cfa.reg = INVALID_REGNUM;
375 return row;
378 /* Return a copy of an existing CFI row. */
380 static dw_cfi_row *
381 copy_cfi_row (dw_cfi_row *src)
383 dw_cfi_row *dst = ggc_alloc_dw_cfi_row ();
385 *dst = *src;
386 dst->reg_save = vec_safe_copy (src->reg_save);
388 return dst;
391 /* Generate a new label for the CFI info to refer to. */
393 static char *
394 dwarf2out_cfi_label (void)
396 int num = dwarf2out_cfi_label_num++;
397 char label[20];
399 ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num);
401 return xstrdup (label);
404 /* Add CFI either to the current insn stream or to a vector, or both. */
406 static void
407 add_cfi (dw_cfi_ref cfi)
409 any_cfis_emitted = true;
411 if (add_cfi_insn != NULL)
413 add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
414 NOTE_CFI (add_cfi_insn) = cfi;
417 if (add_cfi_vec != NULL)
418 vec_safe_push (*add_cfi_vec, cfi);
421 static void
422 add_cfi_args_size (HOST_WIDE_INT size)
424 dw_cfi_ref cfi = new_cfi ();
426 /* While we can occasionally have args_size < 0 internally, this state
427 should not persist at a point we actually need an opcode. */
428 gcc_assert (size >= 0);
430 cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
431 cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
433 add_cfi (cfi);
436 static void
437 add_cfi_restore (unsigned reg)
439 dw_cfi_ref cfi = new_cfi ();
441 cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
442 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
444 add_cfi (cfi);
447 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
448 that the register column is no longer saved. */
450 static void
451 update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
453 if (vec_safe_length (row->reg_save) <= column)
454 vec_safe_grow_cleared (row->reg_save, column + 1);
455 (*row->reg_save)[column] = cfi;
458 /* This function fills in aa dw_cfa_location structure from a dwarf location
459 descriptor sequence. */
461 static void
462 get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc)
464 struct dw_loc_descr_struct *ptr;
465 cfa->offset = 0;
466 cfa->base_offset = 0;
467 cfa->indirect = 0;
468 cfa->reg = -1;
470 for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
472 enum dwarf_location_atom op = ptr->dw_loc_opc;
474 switch (op)
476 case DW_OP_reg0:
477 case DW_OP_reg1:
478 case DW_OP_reg2:
479 case DW_OP_reg3:
480 case DW_OP_reg4:
481 case DW_OP_reg5:
482 case DW_OP_reg6:
483 case DW_OP_reg7:
484 case DW_OP_reg8:
485 case DW_OP_reg9:
486 case DW_OP_reg10:
487 case DW_OP_reg11:
488 case DW_OP_reg12:
489 case DW_OP_reg13:
490 case DW_OP_reg14:
491 case DW_OP_reg15:
492 case DW_OP_reg16:
493 case DW_OP_reg17:
494 case DW_OP_reg18:
495 case DW_OP_reg19:
496 case DW_OP_reg20:
497 case DW_OP_reg21:
498 case DW_OP_reg22:
499 case DW_OP_reg23:
500 case DW_OP_reg24:
501 case DW_OP_reg25:
502 case DW_OP_reg26:
503 case DW_OP_reg27:
504 case DW_OP_reg28:
505 case DW_OP_reg29:
506 case DW_OP_reg30:
507 case DW_OP_reg31:
508 cfa->reg = op - DW_OP_reg0;
509 break;
510 case DW_OP_regx:
511 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
512 break;
513 case DW_OP_breg0:
514 case DW_OP_breg1:
515 case DW_OP_breg2:
516 case DW_OP_breg3:
517 case DW_OP_breg4:
518 case DW_OP_breg5:
519 case DW_OP_breg6:
520 case DW_OP_breg7:
521 case DW_OP_breg8:
522 case DW_OP_breg9:
523 case DW_OP_breg10:
524 case DW_OP_breg11:
525 case DW_OP_breg12:
526 case DW_OP_breg13:
527 case DW_OP_breg14:
528 case DW_OP_breg15:
529 case DW_OP_breg16:
530 case DW_OP_breg17:
531 case DW_OP_breg18:
532 case DW_OP_breg19:
533 case DW_OP_breg20:
534 case DW_OP_breg21:
535 case DW_OP_breg22:
536 case DW_OP_breg23:
537 case DW_OP_breg24:
538 case DW_OP_breg25:
539 case DW_OP_breg26:
540 case DW_OP_breg27:
541 case DW_OP_breg28:
542 case DW_OP_breg29:
543 case DW_OP_breg30:
544 case DW_OP_breg31:
545 cfa->reg = op - DW_OP_breg0;
546 cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
547 break;
548 case DW_OP_bregx:
549 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
550 cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int;
551 break;
552 case DW_OP_deref:
553 cfa->indirect = 1;
554 break;
555 case DW_OP_plus_uconst:
556 cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
557 break;
558 default:
559 gcc_unreachable ();
564 /* Find the previous value for the CFA, iteratively. CFI is the opcode
565 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
566 one level of remember/restore state processing. */
568 void
569 lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember)
571 switch (cfi->dw_cfi_opc)
573 case DW_CFA_def_cfa_offset:
574 case DW_CFA_def_cfa_offset_sf:
575 loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset;
576 break;
577 case DW_CFA_def_cfa_register:
578 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
579 break;
580 case DW_CFA_def_cfa:
581 case DW_CFA_def_cfa_sf:
582 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
583 loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset;
584 break;
585 case DW_CFA_def_cfa_expression:
586 get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc);
587 break;
589 case DW_CFA_remember_state:
590 gcc_assert (!remember->in_use);
591 *remember = *loc;
592 remember->in_use = 1;
593 break;
594 case DW_CFA_restore_state:
595 gcc_assert (remember->in_use);
596 *loc = *remember;
597 remember->in_use = 0;
598 break;
600 default:
601 break;
605 /* Determine if two dw_cfa_location structures define the same data. */
607 bool
608 cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2)
610 return (loc1->reg == loc2->reg
611 && loc1->offset == loc2->offset
612 && loc1->indirect == loc2->indirect
613 && (loc1->indirect == 0
614 || loc1->base_offset == loc2->base_offset));
617 /* Determine if two CFI operands are identical. */
619 static bool
620 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
622 switch (t)
624 case dw_cfi_oprnd_unused:
625 return true;
626 case dw_cfi_oprnd_reg_num:
627 return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
628 case dw_cfi_oprnd_offset:
629 return a->dw_cfi_offset == b->dw_cfi_offset;
630 case dw_cfi_oprnd_addr:
631 return (a->dw_cfi_addr == b->dw_cfi_addr
632 || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
633 case dw_cfi_oprnd_loc:
634 return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
636 gcc_unreachable ();
639 /* Determine if two CFI entries are identical. */
641 static bool
642 cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
644 enum dwarf_call_frame_info opc;
646 /* Make things easier for our callers, including missing operands. */
647 if (a == b)
648 return true;
649 if (a == NULL || b == NULL)
650 return false;
652 /* Obviously, the opcodes must match. */
653 opc = a->dw_cfi_opc;
654 if (opc != b->dw_cfi_opc)
655 return false;
657 /* Compare the two operands, re-using the type of the operands as
658 already exposed elsewhere. */
659 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
660 &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
661 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
662 &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
665 /* Determine if two CFI_ROW structures are identical. */
667 static bool
668 cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
670 size_t i, n_a, n_b, n_max;
672 if (a->cfa_cfi)
674 if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
675 return false;
677 else if (!cfa_equal_p (&a->cfa, &b->cfa))
678 return false;
680 n_a = vec_safe_length (a->reg_save);
681 n_b = vec_safe_length (b->reg_save);
682 n_max = MAX (n_a, n_b);
684 for (i = 0; i < n_max; ++i)
686 dw_cfi_ref r_a = NULL, r_b = NULL;
688 if (i < n_a)
689 r_a = (*a->reg_save)[i];
690 if (i < n_b)
691 r_b = (*b->reg_save)[i];
693 if (!cfi_equal_p (r_a, r_b))
694 return false;
697 return true;
700 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
701 what opcode to emit. Returns the CFI opcode to effect the change, or
702 NULL if NEW_CFA == OLD_CFA. */
704 static dw_cfi_ref
705 def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
707 dw_cfi_ref cfi;
709 /* If nothing changed, no need to issue any call frame instructions. */
710 if (cfa_equal_p (old_cfa, new_cfa))
711 return NULL;
713 cfi = new_cfi ();
715 if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect)
717 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
718 the CFA register did not change but the offset did. The data
719 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
720 in the assembler via the .cfi_def_cfa_offset directive. */
721 if (new_cfa->offset < 0)
722 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
723 else
724 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
725 cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset;
727 else if (new_cfa->offset == old_cfa->offset
728 && old_cfa->reg != INVALID_REGNUM
729 && !new_cfa->indirect
730 && !old_cfa->indirect)
732 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
733 indicating the CFA register has changed to <register> but the
734 offset has not changed. */
735 cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
736 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
738 else if (new_cfa->indirect == 0)
740 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
741 indicating the CFA register has changed to <register> with
742 the specified offset. The data factoring for DW_CFA_def_cfa_sf
743 happens in output_cfi, or in the assembler via the .cfi_def_cfa
744 directive. */
745 if (new_cfa->offset < 0)
746 cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
747 else
748 cfi->dw_cfi_opc = DW_CFA_def_cfa;
749 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
750 cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset;
752 else
754 /* Construct a DW_CFA_def_cfa_expression instruction to
755 calculate the CFA using a full location expression since no
756 register-offset pair is available. */
757 struct dw_loc_descr_struct *loc_list;
759 cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
760 loc_list = build_cfa_loc (new_cfa, 0);
761 cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
764 return cfi;
767 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
769 static void
770 def_cfa_1 (dw_cfa_location *new_cfa)
772 dw_cfi_ref cfi;
774 if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
775 cur_trace->cfa_store.offset = new_cfa->offset;
777 cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
778 if (cfi)
780 cur_row->cfa = *new_cfa;
781 cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression
782 ? cfi : NULL);
784 add_cfi (cfi);
788 /* Add the CFI for saving a register. REG is the CFA column number.
789 If SREG is -1, the register is saved at OFFSET from the CFA;
790 otherwise it is saved in SREG. */
792 static void
793 reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset)
795 dw_fde_ref fde = cfun ? cfun->fde : NULL;
796 dw_cfi_ref cfi = new_cfi ();
798 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
800 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
801 if (fde
802 && fde->stack_realign
803 && sreg == INVALID_REGNUM)
805 cfi->dw_cfi_opc = DW_CFA_expression;
806 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
807 cfi->dw_cfi_oprnd2.dw_cfi_loc
808 = build_cfa_aligned_loc (&cur_row->cfa, offset,
809 fde->stack_realignment);
811 else if (sreg == INVALID_REGNUM)
813 if (need_data_align_sf_opcode (offset))
814 cfi->dw_cfi_opc = DW_CFA_offset_extended_sf;
815 else if (reg & ~0x3f)
816 cfi->dw_cfi_opc = DW_CFA_offset_extended;
817 else
818 cfi->dw_cfi_opc = DW_CFA_offset;
819 cfi->dw_cfi_oprnd2.dw_cfi_offset = offset;
821 else if (sreg == reg)
823 /* While we could emit something like DW_CFA_same_value or
824 DW_CFA_restore, we never expect to see something like that
825 in a prologue. This is more likely to be a bug. A backend
826 can always bypass this by using REG_CFA_RESTORE directly. */
827 gcc_unreachable ();
829 else
831 cfi->dw_cfi_opc = DW_CFA_register;
832 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
835 add_cfi (cfi);
836 update_row_reg_save (cur_row, reg, cfi);
839 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
840 and adjust data structures to match. */
842 static void
843 notice_args_size (rtx insn)
845 HOST_WIDE_INT args_size, delta;
846 rtx note;
848 note = find_reg_note (insn, REG_ARGS_SIZE, NULL);
849 if (note == NULL)
850 return;
852 args_size = INTVAL (XEXP (note, 0));
853 delta = args_size - cur_trace->end_true_args_size;
854 if (delta == 0)
855 return;
857 cur_trace->end_true_args_size = args_size;
859 /* If the CFA is computed off the stack pointer, then we must adjust
860 the computation of the CFA as well. */
861 if (cur_cfa->reg == dw_stack_pointer_regnum)
863 gcc_assert (!cur_cfa->indirect);
865 /* Convert a change in args_size (always a positive in the
866 direction of stack growth) to a change in stack pointer. */
867 #ifndef STACK_GROWS_DOWNWARD
868 delta = -delta;
869 #endif
870 cur_cfa->offset += delta;
874 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
875 data within the trace related to EH insns and args_size. */
877 static void
878 notice_eh_throw (rtx insn)
880 HOST_WIDE_INT args_size;
882 args_size = cur_trace->end_true_args_size;
883 if (cur_trace->eh_head == NULL)
885 cur_trace->eh_head = insn;
886 cur_trace->beg_delay_args_size = args_size;
887 cur_trace->end_delay_args_size = args_size;
889 else if (cur_trace->end_delay_args_size != args_size)
891 cur_trace->end_delay_args_size = args_size;
893 /* ??? If the CFA is the stack pointer, search backward for the last
894 CFI note and insert there. Given that the stack changed for the
895 args_size change, there *must* be such a note in between here and
896 the last eh insn. */
897 add_cfi_args_size (args_size);
901 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
902 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
903 used in places where rtl is prohibited. */
905 static inline unsigned
906 dwf_regno (const_rtx reg)
908 return DWARF_FRAME_REGNUM (REGNO (reg));
911 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
913 static bool
914 compare_reg_or_pc (rtx x, rtx y)
916 if (REG_P (x) && REG_P (y))
917 return REGNO (x) == REGNO (y);
918 return x == y;
921 /* Record SRC as being saved in DEST. DEST may be null to delete an
922 existing entry. SRC may be a register or PC_RTX. */
924 static void
925 record_reg_saved_in_reg (rtx dest, rtx src)
927 reg_saved_in_data *elt;
928 size_t i;
930 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt)
931 if (compare_reg_or_pc (elt->orig_reg, src))
933 if (dest == NULL)
934 cur_trace->regs_saved_in_regs.unordered_remove (i);
935 else
936 elt->saved_in_reg = dest;
937 return;
940 if (dest == NULL)
941 return;
943 reg_saved_in_data e = {src, dest};
944 cur_trace->regs_saved_in_regs.safe_push (e);
947 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
948 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
950 static void
951 queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset)
953 queued_reg_save *q;
954 queued_reg_save e = {reg, sreg, offset};
955 size_t i;
957 /* Duplicates waste space, but it's also necessary to remove them
958 for correctness, since the queue gets output in reverse order. */
959 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
960 if (compare_reg_or_pc (q->reg, reg))
962 *q = e;
963 return;
966 queued_reg_saves.safe_push (e);
969 /* Output all the entries in QUEUED_REG_SAVES. */
971 static void
972 dwarf2out_flush_queued_reg_saves (void)
974 queued_reg_save *q;
975 size_t i;
977 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
979 unsigned int reg, sreg;
981 record_reg_saved_in_reg (q->saved_reg, q->reg);
983 if (q->reg == pc_rtx)
984 reg = DWARF_FRAME_RETURN_COLUMN;
985 else
986 reg = dwf_regno (q->reg);
987 if (q->saved_reg)
988 sreg = dwf_regno (q->saved_reg);
989 else
990 sreg = INVALID_REGNUM;
991 reg_save (reg, sreg, q->cfa_offset);
994 queued_reg_saves.truncate (0);
997 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
998 location for? Or, does it clobber a register which we've previously
999 said that some other register is saved in, and for which we now
1000 have a new location for? */
1002 static bool
1003 clobbers_queued_reg_save (const_rtx insn)
1005 queued_reg_save *q;
1006 size_t iq;
1008 FOR_EACH_VEC_ELT (queued_reg_saves, iq, q)
1010 size_t ir;
1011 reg_saved_in_data *rir;
1013 if (modified_in_p (q->reg, insn))
1014 return true;
1016 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir)
1017 if (compare_reg_or_pc (q->reg, rir->orig_reg)
1018 && modified_in_p (rir->saved_in_reg, insn))
1019 return true;
1022 return false;
1025 /* What register, if any, is currently saved in REG? */
1027 static rtx
1028 reg_saved_in (rtx reg)
1030 unsigned int regn = REGNO (reg);
1031 queued_reg_save *q;
1032 reg_saved_in_data *rir;
1033 size_t i;
1035 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
1036 if (q->saved_reg && regn == REGNO (q->saved_reg))
1037 return q->reg;
1039 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir)
1040 if (regn == REGNO (rir->saved_in_reg))
1041 return rir->orig_reg;
1043 return NULL_RTX;
1046 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1048 static void
1049 dwarf2out_frame_debug_def_cfa (rtx pat)
1051 memset (cur_cfa, 0, sizeof (*cur_cfa));
1053 if (GET_CODE (pat) == PLUS)
1055 cur_cfa->offset = INTVAL (XEXP (pat, 1));
1056 pat = XEXP (pat, 0);
1058 if (MEM_P (pat))
1060 cur_cfa->indirect = 1;
1061 pat = XEXP (pat, 0);
1062 if (GET_CODE (pat) == PLUS)
1064 cur_cfa->base_offset = INTVAL (XEXP (pat, 1));
1065 pat = XEXP (pat, 0);
1068 /* ??? If this fails, we could be calling into the _loc functions to
1069 define a full expression. So far no port does that. */
1070 gcc_assert (REG_P (pat));
1071 cur_cfa->reg = dwf_regno (pat);
1074 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1076 static void
1077 dwarf2out_frame_debug_adjust_cfa (rtx pat)
1079 rtx src, dest;
1081 gcc_assert (GET_CODE (pat) == SET);
1082 dest = XEXP (pat, 0);
1083 src = XEXP (pat, 1);
1085 switch (GET_CODE (src))
1087 case PLUS:
1088 gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
1089 cur_cfa->offset -= INTVAL (XEXP (src, 1));
1090 break;
1092 case REG:
1093 break;
1095 default:
1096 gcc_unreachable ();
1099 cur_cfa->reg = dwf_regno (dest);
1100 gcc_assert (cur_cfa->indirect == 0);
1103 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1105 static void
1106 dwarf2out_frame_debug_cfa_offset (rtx set)
1108 HOST_WIDE_INT offset;
1109 rtx src, addr, span;
1110 unsigned int sregno;
1112 src = XEXP (set, 1);
1113 addr = XEXP (set, 0);
1114 gcc_assert (MEM_P (addr));
1115 addr = XEXP (addr, 0);
1117 /* As documented, only consider extremely simple addresses. */
1118 switch (GET_CODE (addr))
1120 case REG:
1121 gcc_assert (dwf_regno (addr) == cur_cfa->reg);
1122 offset = -cur_cfa->offset;
1123 break;
1124 case PLUS:
1125 gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg);
1126 offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset;
1127 break;
1128 default:
1129 gcc_unreachable ();
1132 if (src == pc_rtx)
1134 span = NULL;
1135 sregno = DWARF_FRAME_RETURN_COLUMN;
1137 else
1139 span = targetm.dwarf_register_span (src);
1140 sregno = dwf_regno (src);
1143 /* ??? We'd like to use queue_reg_save, but we need to come up with
1144 a different flushing heuristic for epilogues. */
1145 if (!span)
1146 reg_save (sregno, INVALID_REGNUM, offset);
1147 else
1149 /* We have a PARALLEL describing where the contents of SRC live.
1150 Queue register saves for each piece of the PARALLEL. */
1151 int par_index;
1152 int limit;
1153 HOST_WIDE_INT span_offset = offset;
1155 gcc_assert (GET_CODE (span) == PARALLEL);
1157 limit = XVECLEN (span, 0);
1158 for (par_index = 0; par_index < limit; par_index++)
1160 rtx elem = XVECEXP (span, 0, par_index);
1162 sregno = dwf_regno (src);
1163 reg_save (sregno, INVALID_REGNUM, span_offset);
1164 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1169 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1171 static void
1172 dwarf2out_frame_debug_cfa_register (rtx set)
1174 rtx src, dest;
1175 unsigned sregno, dregno;
1177 src = XEXP (set, 1);
1178 dest = XEXP (set, 0);
1180 record_reg_saved_in_reg (dest, src);
1181 if (src == pc_rtx)
1182 sregno = DWARF_FRAME_RETURN_COLUMN;
1183 else
1184 sregno = dwf_regno (src);
1186 dregno = dwf_regno (dest);
1188 /* ??? We'd like to use queue_reg_save, but we need to come up with
1189 a different flushing heuristic for epilogues. */
1190 reg_save (sregno, dregno, 0);
1193 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1195 static void
1196 dwarf2out_frame_debug_cfa_expression (rtx set)
1198 rtx src, dest, span;
1199 dw_cfi_ref cfi = new_cfi ();
1200 unsigned regno;
1202 dest = SET_DEST (set);
1203 src = SET_SRC (set);
1205 gcc_assert (REG_P (src));
1206 gcc_assert (MEM_P (dest));
1208 span = targetm.dwarf_register_span (src);
1209 gcc_assert (!span);
1211 regno = dwf_regno (src);
1213 cfi->dw_cfi_opc = DW_CFA_expression;
1214 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
1215 cfi->dw_cfi_oprnd2.dw_cfi_loc
1216 = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
1217 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
1219 /* ??? We'd like to use queue_reg_save, were the interface different,
1220 and, as above, we could manage flushing for epilogues. */
1221 add_cfi (cfi);
1222 update_row_reg_save (cur_row, regno, cfi);
1225 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1227 static void
1228 dwarf2out_frame_debug_cfa_restore (rtx reg)
1230 unsigned int regno = dwf_regno (reg);
1232 add_cfi_restore (regno);
1233 update_row_reg_save (cur_row, regno, NULL);
1236 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1237 ??? Perhaps we should note in the CIE where windows are saved (instead of
1238 assuming 0(cfa)) and what registers are in the window. */
1240 static void
1241 dwarf2out_frame_debug_cfa_window_save (void)
1243 dw_cfi_ref cfi = new_cfi ();
1245 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
1246 add_cfi (cfi);
1249 /* Record call frame debugging information for an expression EXPR,
1250 which either sets SP or FP (adjusting how we calculate the frame
1251 address) or saves a register to the stack or another register.
1252 LABEL indicates the address of EXPR.
1254 This function encodes a state machine mapping rtxes to actions on
1255 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1256 users need not read the source code.
1258 The High-Level Picture
1260 Changes in the register we use to calculate the CFA: Currently we
1261 assume that if you copy the CFA register into another register, we
1262 should take the other one as the new CFA register; this seems to
1263 work pretty well. If it's wrong for some target, it's simple
1264 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1266 Changes in the register we use for saving registers to the stack:
1267 This is usually SP, but not always. Again, we deduce that if you
1268 copy SP into another register (and SP is not the CFA register),
1269 then the new register is the one we will be using for register
1270 saves. This also seems to work.
1272 Register saves: There's not much guesswork about this one; if
1273 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1274 register save, and the register used to calculate the destination
1275 had better be the one we think we're using for this purpose.
1276 It's also assumed that a copy from a call-saved register to another
1277 register is saving that register if RTX_FRAME_RELATED_P is set on
1278 that instruction. If the copy is from a call-saved register to
1279 the *same* register, that means that the register is now the same
1280 value as in the caller.
1282 Except: If the register being saved is the CFA register, and the
1283 offset is nonzero, we are saving the CFA, so we assume we have to
1284 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1285 the intent is to save the value of SP from the previous frame.
1287 In addition, if a register has previously been saved to a different
1288 register,
1290 Invariants / Summaries of Rules
1292 cfa current rule for calculating the CFA. It usually
1293 consists of a register and an offset. This is
1294 actually stored in *cur_cfa, but abbreviated
1295 for the purposes of this documentation.
1296 cfa_store register used by prologue code to save things to the stack
1297 cfa_store.offset is the offset from the value of
1298 cfa_store.reg to the actual CFA
1299 cfa_temp register holding an integral value. cfa_temp.offset
1300 stores the value, which will be used to adjust the
1301 stack pointer. cfa_temp is also used like cfa_store,
1302 to track stores to the stack via fp or a temp reg.
1304 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1305 with cfa.reg as the first operand changes the cfa.reg and its
1306 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1307 cfa_temp.offset.
1309 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1310 expression yielding a constant. This sets cfa_temp.reg
1311 and cfa_temp.offset.
1313 Rule 5: Create a new register cfa_store used to save items to the
1314 stack.
1316 Rules 10-14: Save a register to the stack. Define offset as the
1317 difference of the original location and cfa_store's
1318 location (or cfa_temp's location if cfa_temp is used).
1320 Rules 16-20: If AND operation happens on sp in prologue, we assume
1321 stack is realigned. We will use a group of DW_OP_XXX
1322 expressions to represent the location of the stored
1323 register instead of CFA+offset.
1325 The Rules
1327 "{a,b}" indicates a choice of a xor b.
1328 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1330 Rule 1:
1331 (set <reg1> <reg2>:cfa.reg)
1332 effects: cfa.reg = <reg1>
1333 cfa.offset unchanged
1334 cfa_temp.reg = <reg1>
1335 cfa_temp.offset = cfa.offset
1337 Rule 2:
1338 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1339 {<const_int>,<reg>:cfa_temp.reg}))
1340 effects: cfa.reg = sp if fp used
1341 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1342 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1343 if cfa_store.reg==sp
1345 Rule 3:
1346 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1347 effects: cfa.reg = fp
1348 cfa_offset += +/- <const_int>
1350 Rule 4:
1351 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1352 constraints: <reg1> != fp
1353 <reg1> != sp
1354 effects: cfa.reg = <reg1>
1355 cfa_temp.reg = <reg1>
1356 cfa_temp.offset = cfa.offset
1358 Rule 5:
1359 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1360 constraints: <reg1> != fp
1361 <reg1> != sp
1362 effects: cfa_store.reg = <reg1>
1363 cfa_store.offset = cfa.offset - cfa_temp.offset
1365 Rule 6:
1366 (set <reg> <const_int>)
1367 effects: cfa_temp.reg = <reg>
1368 cfa_temp.offset = <const_int>
1370 Rule 7:
1371 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1372 effects: cfa_temp.reg = <reg1>
1373 cfa_temp.offset |= <const_int>
1375 Rule 8:
1376 (set <reg> (high <exp>))
1377 effects: none
1379 Rule 9:
1380 (set <reg> (lo_sum <exp> <const_int>))
1381 effects: cfa_temp.reg = <reg>
1382 cfa_temp.offset = <const_int>
1384 Rule 10:
1385 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1386 effects: cfa_store.offset -= <const_int>
1387 cfa.offset = cfa_store.offset if cfa.reg == sp
1388 cfa.reg = sp
1389 cfa.base_offset = -cfa_store.offset
1391 Rule 11:
1392 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1393 effects: cfa_store.offset += -/+ mode_size(mem)
1394 cfa.offset = cfa_store.offset if cfa.reg == sp
1395 cfa.reg = sp
1396 cfa.base_offset = -cfa_store.offset
1398 Rule 12:
1399 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1401 <reg2>)
1402 effects: cfa.reg = <reg1>
1403 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1405 Rule 13:
1406 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1407 effects: cfa.reg = <reg1>
1408 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1410 Rule 14:
1411 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1412 effects: cfa.reg = <reg1>
1413 cfa.base_offset = -cfa_temp.offset
1414 cfa_temp.offset -= mode_size(mem)
1416 Rule 15:
1417 (set <reg> {unspec, unspec_volatile})
1418 effects: target-dependent
1420 Rule 16:
1421 (set sp (and: sp <const_int>))
1422 constraints: cfa_store.reg == sp
1423 effects: cfun->fde.stack_realign = 1
1424 cfa_store.offset = 0
1425 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1427 Rule 17:
1428 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1429 effects: cfa_store.offset += -/+ mode_size(mem)
1431 Rule 18:
1432 (set (mem ({pre_inc, pre_dec} sp)) fp)
1433 constraints: fde->stack_realign == 1
1434 effects: cfa_store.offset = 0
1435 cfa.reg != HARD_FRAME_POINTER_REGNUM
1437 Rule 19:
1438 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1439 constraints: fde->stack_realign == 1
1440 && cfa.offset == 0
1441 && cfa.indirect == 0
1442 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1443 effects: Use DW_CFA_def_cfa_expression to define cfa
1444 cfa.reg == fde->drap_reg */
1446 static void
1447 dwarf2out_frame_debug_expr (rtx expr)
1449 rtx src, dest, span;
1450 HOST_WIDE_INT offset;
1451 dw_fde_ref fde;
1453 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1454 the PARALLEL independently. The first element is always processed if
1455 it is a SET. This is for backward compatibility. Other elements
1456 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1457 flag is set in them. */
1458 if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE)
1460 int par_index;
1461 int limit = XVECLEN (expr, 0);
1462 rtx elem;
1464 /* PARALLELs have strict read-modify-write semantics, so we
1465 ought to evaluate every rvalue before changing any lvalue.
1466 It's cumbersome to do that in general, but there's an
1467 easy approximation that is enough for all current users:
1468 handle register saves before register assignments. */
1469 if (GET_CODE (expr) == PARALLEL)
1470 for (par_index = 0; par_index < limit; par_index++)
1472 elem = XVECEXP (expr, 0, par_index);
1473 if (GET_CODE (elem) == SET
1474 && MEM_P (SET_DEST (elem))
1475 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1476 dwarf2out_frame_debug_expr (elem);
1479 for (par_index = 0; par_index < limit; par_index++)
1481 elem = XVECEXP (expr, 0, par_index);
1482 if (GET_CODE (elem) == SET
1483 && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
1484 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1485 dwarf2out_frame_debug_expr (elem);
1487 return;
1490 gcc_assert (GET_CODE (expr) == SET);
1492 src = SET_SRC (expr);
1493 dest = SET_DEST (expr);
1495 if (REG_P (src))
1497 rtx rsi = reg_saved_in (src);
1498 if (rsi)
1499 src = rsi;
1502 fde = cfun->fde;
1504 switch (GET_CODE (dest))
1506 case REG:
1507 switch (GET_CODE (src))
1509 /* Setting FP from SP. */
1510 case REG:
1511 if (cur_cfa->reg == dwf_regno (src))
1513 /* Rule 1 */
1514 /* Update the CFA rule wrt SP or FP. Make sure src is
1515 relative to the current CFA register.
1517 We used to require that dest be either SP or FP, but the
1518 ARM copies SP to a temporary register, and from there to
1519 FP. So we just rely on the backends to only set
1520 RTX_FRAME_RELATED_P on appropriate insns. */
1521 cur_cfa->reg = dwf_regno (dest);
1522 cur_trace->cfa_temp.reg = cur_cfa->reg;
1523 cur_trace->cfa_temp.offset = cur_cfa->offset;
1525 else
1527 /* Saving a register in a register. */
1528 gcc_assert (!fixed_regs [REGNO (dest)]
1529 /* For the SPARC and its register window. */
1530 || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
1532 /* After stack is aligned, we can only save SP in FP
1533 if drap register is used. In this case, we have
1534 to restore stack pointer with the CFA value and we
1535 don't generate this DWARF information. */
1536 if (fde
1537 && fde->stack_realign
1538 && REGNO (src) == STACK_POINTER_REGNUM)
1539 gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
1540 && fde->drap_reg != INVALID_REGNUM
1541 && cur_cfa->reg != dwf_regno (src));
1542 else
1543 queue_reg_save (src, dest, 0);
1545 break;
1547 case PLUS:
1548 case MINUS:
1549 case LO_SUM:
1550 if (dest == stack_pointer_rtx)
1552 /* Rule 2 */
1553 /* Adjusting SP. */
1554 switch (GET_CODE (XEXP (src, 1)))
1556 case CONST_INT:
1557 offset = INTVAL (XEXP (src, 1));
1558 break;
1559 case REG:
1560 gcc_assert (dwf_regno (XEXP (src, 1))
1561 == cur_trace->cfa_temp.reg);
1562 offset = cur_trace->cfa_temp.offset;
1563 break;
1564 default:
1565 gcc_unreachable ();
1568 if (XEXP (src, 0) == hard_frame_pointer_rtx)
1570 /* Restoring SP from FP in the epilogue. */
1571 gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum);
1572 cur_cfa->reg = dw_stack_pointer_regnum;
1574 else if (GET_CODE (src) == LO_SUM)
1575 /* Assume we've set the source reg of the LO_SUM from sp. */
1577 else
1578 gcc_assert (XEXP (src, 0) == stack_pointer_rtx);
1580 if (GET_CODE (src) != MINUS)
1581 offset = -offset;
1582 if (cur_cfa->reg == dw_stack_pointer_regnum)
1583 cur_cfa->offset += offset;
1584 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
1585 cur_trace->cfa_store.offset += offset;
1587 else if (dest == hard_frame_pointer_rtx)
1589 /* Rule 3 */
1590 /* Either setting the FP from an offset of the SP,
1591 or adjusting the FP */
1592 gcc_assert (frame_pointer_needed);
1594 gcc_assert (REG_P (XEXP (src, 0))
1595 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1596 && CONST_INT_P (XEXP (src, 1)));
1597 offset = INTVAL (XEXP (src, 1));
1598 if (GET_CODE (src) != MINUS)
1599 offset = -offset;
1600 cur_cfa->offset += offset;
1601 cur_cfa->reg = dw_frame_pointer_regnum;
1603 else
1605 gcc_assert (GET_CODE (src) != MINUS);
1607 /* Rule 4 */
1608 if (REG_P (XEXP (src, 0))
1609 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1610 && CONST_INT_P (XEXP (src, 1)))
1612 /* Setting a temporary CFA register that will be copied
1613 into the FP later on. */
1614 offset = - INTVAL (XEXP (src, 1));
1615 cur_cfa->offset += offset;
1616 cur_cfa->reg = dwf_regno (dest);
1617 /* Or used to save regs to the stack. */
1618 cur_trace->cfa_temp.reg = cur_cfa->reg;
1619 cur_trace->cfa_temp.offset = cur_cfa->offset;
1622 /* Rule 5 */
1623 else if (REG_P (XEXP (src, 0))
1624 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1625 && XEXP (src, 1) == stack_pointer_rtx)
1627 /* Setting a scratch register that we will use instead
1628 of SP for saving registers to the stack. */
1629 gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum);
1630 cur_trace->cfa_store.reg = dwf_regno (dest);
1631 cur_trace->cfa_store.offset
1632 = cur_cfa->offset - cur_trace->cfa_temp.offset;
1635 /* Rule 9 */
1636 else if (GET_CODE (src) == LO_SUM
1637 && CONST_INT_P (XEXP (src, 1)))
1639 cur_trace->cfa_temp.reg = dwf_regno (dest);
1640 cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1));
1642 else
1643 gcc_unreachable ();
1645 break;
1647 /* Rule 6 */
1648 case CONST_INT:
1649 cur_trace->cfa_temp.reg = dwf_regno (dest);
1650 cur_trace->cfa_temp.offset = INTVAL (src);
1651 break;
1653 /* Rule 7 */
1654 case IOR:
1655 gcc_assert (REG_P (XEXP (src, 0))
1656 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1657 && CONST_INT_P (XEXP (src, 1)));
1659 cur_trace->cfa_temp.reg = dwf_regno (dest);
1660 cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1));
1661 break;
1663 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1664 which will fill in all of the bits. */
1665 /* Rule 8 */
1666 case HIGH:
1667 break;
1669 /* Rule 15 */
1670 case UNSPEC:
1671 case UNSPEC_VOLATILE:
1672 /* All unspecs should be represented by REG_CFA_* notes. */
1673 gcc_unreachable ();
1674 return;
1676 /* Rule 16 */
1677 case AND:
1678 /* If this AND operation happens on stack pointer in prologue,
1679 we assume the stack is realigned and we extract the
1680 alignment. */
1681 if (fde && XEXP (src, 0) == stack_pointer_rtx)
1683 /* We interpret reg_save differently with stack_realign set.
1684 Thus we must flush whatever we have queued first. */
1685 dwarf2out_flush_queued_reg_saves ();
1687 gcc_assert (cur_trace->cfa_store.reg
1688 == dwf_regno (XEXP (src, 0)));
1689 fde->stack_realign = 1;
1690 fde->stack_realignment = INTVAL (XEXP (src, 1));
1691 cur_trace->cfa_store.offset = 0;
1693 if (cur_cfa->reg != dw_stack_pointer_regnum
1694 && cur_cfa->reg != dw_frame_pointer_regnum)
1695 fde->drap_reg = cur_cfa->reg;
1697 return;
1699 default:
1700 gcc_unreachable ();
1702 break;
1704 case MEM:
1706 /* Saving a register to the stack. Make sure dest is relative to the
1707 CFA register. */
1708 switch (GET_CODE (XEXP (dest, 0)))
1710 /* Rule 10 */
1711 /* With a push. */
1712 case PRE_MODIFY:
1713 case POST_MODIFY:
1714 /* We can't handle variable size modifications. */
1715 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
1716 == CONST_INT);
1717 offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1));
1719 gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
1720 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1722 cur_trace->cfa_store.offset += offset;
1723 if (cur_cfa->reg == dw_stack_pointer_regnum)
1724 cur_cfa->offset = cur_trace->cfa_store.offset;
1726 if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
1727 offset -= cur_trace->cfa_store.offset;
1728 else
1729 offset = -cur_trace->cfa_store.offset;
1730 break;
1732 /* Rule 11 */
1733 case PRE_INC:
1734 case PRE_DEC:
1735 case POST_DEC:
1736 offset = GET_MODE_SIZE (GET_MODE (dest));
1737 if (GET_CODE (XEXP (dest, 0)) == PRE_INC)
1738 offset = -offset;
1740 gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
1741 == STACK_POINTER_REGNUM)
1742 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1744 cur_trace->cfa_store.offset += offset;
1746 /* Rule 18: If stack is aligned, we will use FP as a
1747 reference to represent the address of the stored
1748 regiser. */
1749 if (fde
1750 && fde->stack_realign
1751 && REG_P (src)
1752 && REGNO (src) == HARD_FRAME_POINTER_REGNUM)
1754 gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum);
1755 cur_trace->cfa_store.offset = 0;
1758 if (cur_cfa->reg == dw_stack_pointer_regnum)
1759 cur_cfa->offset = cur_trace->cfa_store.offset;
1761 if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
1762 offset += -cur_trace->cfa_store.offset;
1763 else
1764 offset = -cur_trace->cfa_store.offset;
1765 break;
1767 /* Rule 12 */
1768 /* With an offset. */
1769 case PLUS:
1770 case MINUS:
1771 case LO_SUM:
1773 unsigned int regno;
1775 gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1))
1776 && REG_P (XEXP (XEXP (dest, 0), 0)));
1777 offset = INTVAL (XEXP (XEXP (dest, 0), 1));
1778 if (GET_CODE (XEXP (dest, 0)) == MINUS)
1779 offset = -offset;
1781 regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
1783 if (cur_cfa->reg == regno)
1784 offset -= cur_cfa->offset;
1785 else if (cur_trace->cfa_store.reg == regno)
1786 offset -= cur_trace->cfa_store.offset;
1787 else
1789 gcc_assert (cur_trace->cfa_temp.reg == regno);
1790 offset -= cur_trace->cfa_temp.offset;
1793 break;
1795 /* Rule 13 */
1796 /* Without an offset. */
1797 case REG:
1799 unsigned int regno = dwf_regno (XEXP (dest, 0));
1801 if (cur_cfa->reg == regno)
1802 offset = -cur_cfa->offset;
1803 else if (cur_trace->cfa_store.reg == regno)
1804 offset = -cur_trace->cfa_store.offset;
1805 else
1807 gcc_assert (cur_trace->cfa_temp.reg == regno);
1808 offset = -cur_trace->cfa_temp.offset;
1811 break;
1813 /* Rule 14 */
1814 case POST_INC:
1815 gcc_assert (cur_trace->cfa_temp.reg
1816 == dwf_regno (XEXP (XEXP (dest, 0), 0)));
1817 offset = -cur_trace->cfa_temp.offset;
1818 cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
1819 break;
1821 default:
1822 gcc_unreachable ();
1825 /* Rule 17 */
1826 /* If the source operand of this MEM operation is a memory,
1827 we only care how much stack grew. */
1828 if (MEM_P (src))
1829 break;
1831 if (REG_P (src)
1832 && REGNO (src) != STACK_POINTER_REGNUM
1833 && REGNO (src) != HARD_FRAME_POINTER_REGNUM
1834 && dwf_regno (src) == cur_cfa->reg)
1836 /* We're storing the current CFA reg into the stack. */
1838 if (cur_cfa->offset == 0)
1840 /* Rule 19 */
1841 /* If stack is aligned, putting CFA reg into stack means
1842 we can no longer use reg + offset to represent CFA.
1843 Here we use DW_CFA_def_cfa_expression instead. The
1844 result of this expression equals to the original CFA
1845 value. */
1846 if (fde
1847 && fde->stack_realign
1848 && cur_cfa->indirect == 0
1849 && cur_cfa->reg != dw_frame_pointer_regnum)
1851 gcc_assert (fde->drap_reg == cur_cfa->reg);
1853 cur_cfa->indirect = 1;
1854 cur_cfa->reg = dw_frame_pointer_regnum;
1855 cur_cfa->base_offset = offset;
1856 cur_cfa->offset = 0;
1858 fde->drap_reg_saved = 1;
1859 break;
1862 /* If the source register is exactly the CFA, assume
1863 we're saving SP like any other register; this happens
1864 on the ARM. */
1865 queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
1866 break;
1868 else
1870 /* Otherwise, we'll need to look in the stack to
1871 calculate the CFA. */
1872 rtx x = XEXP (dest, 0);
1874 if (!REG_P (x))
1875 x = XEXP (x, 0);
1876 gcc_assert (REG_P (x));
1878 cur_cfa->reg = dwf_regno (x);
1879 cur_cfa->base_offset = offset;
1880 cur_cfa->indirect = 1;
1881 break;
1885 span = NULL;
1886 if (REG_P (src))
1887 span = targetm.dwarf_register_span (src);
1888 if (!span)
1889 queue_reg_save (src, NULL_RTX, offset);
1890 else
1892 /* We have a PARALLEL describing where the contents of SRC live.
1893 Queue register saves for each piece of the PARALLEL. */
1894 int par_index;
1895 int limit;
1896 HOST_WIDE_INT span_offset = offset;
1898 gcc_assert (GET_CODE (span) == PARALLEL);
1900 limit = XVECLEN (span, 0);
1901 for (par_index = 0; par_index < limit; par_index++)
1903 rtx elem = XVECEXP (span, 0, par_index);
1904 queue_reg_save (elem, NULL_RTX, span_offset);
1905 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1908 break;
1910 default:
1911 gcc_unreachable ();
1915 /* Record call frame debugging information for INSN, which either sets
1916 SP or FP (adjusting how we calculate the frame address) or saves a
1917 register to the stack. */
1919 static void
1920 dwarf2out_frame_debug (rtx insn)
1922 rtx note, n;
1923 bool handled_one = false;
1925 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1926 switch (REG_NOTE_KIND (note))
1928 case REG_FRAME_RELATED_EXPR:
1929 insn = XEXP (note, 0);
1930 goto do_frame_expr;
1932 case REG_CFA_DEF_CFA:
1933 dwarf2out_frame_debug_def_cfa (XEXP (note, 0));
1934 handled_one = true;
1935 break;
1937 case REG_CFA_ADJUST_CFA:
1938 n = XEXP (note, 0);
1939 if (n == NULL)
1941 n = PATTERN (insn);
1942 if (GET_CODE (n) == PARALLEL)
1943 n = XVECEXP (n, 0, 0);
1945 dwarf2out_frame_debug_adjust_cfa (n);
1946 handled_one = true;
1947 break;
1949 case REG_CFA_OFFSET:
1950 n = XEXP (note, 0);
1951 if (n == NULL)
1952 n = single_set (insn);
1953 dwarf2out_frame_debug_cfa_offset (n);
1954 handled_one = true;
1955 break;
1957 case REG_CFA_REGISTER:
1958 n = XEXP (note, 0);
1959 if (n == NULL)
1961 n = PATTERN (insn);
1962 if (GET_CODE (n) == PARALLEL)
1963 n = XVECEXP (n, 0, 0);
1965 dwarf2out_frame_debug_cfa_register (n);
1966 handled_one = true;
1967 break;
1969 case REG_CFA_EXPRESSION:
1970 n = XEXP (note, 0);
1971 if (n == NULL)
1972 n = single_set (insn);
1973 dwarf2out_frame_debug_cfa_expression (n);
1974 handled_one = true;
1975 break;
1977 case REG_CFA_RESTORE:
1978 n = XEXP (note, 0);
1979 if (n == NULL)
1981 n = PATTERN (insn);
1982 if (GET_CODE (n) == PARALLEL)
1983 n = XVECEXP (n, 0, 0);
1984 n = XEXP (n, 0);
1986 dwarf2out_frame_debug_cfa_restore (n);
1987 handled_one = true;
1988 break;
1990 case REG_CFA_SET_VDRAP:
1991 n = XEXP (note, 0);
1992 if (REG_P (n))
1994 dw_fde_ref fde = cfun->fde;
1995 if (fde)
1997 gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
1998 if (REG_P (n))
1999 fde->vdrap_reg = dwf_regno (n);
2002 handled_one = true;
2003 break;
2005 case REG_CFA_WINDOW_SAVE:
2006 dwarf2out_frame_debug_cfa_window_save ();
2007 handled_one = true;
2008 break;
2010 case REG_CFA_FLUSH_QUEUE:
2011 /* The actual flush happens elsewhere. */
2012 handled_one = true;
2013 break;
2015 default:
2016 break;
2019 if (!handled_one)
2021 insn = PATTERN (insn);
2022 do_frame_expr:
2023 dwarf2out_frame_debug_expr (insn);
2025 /* Check again. A parallel can save and update the same register.
2026 We could probably check just once, here, but this is safer than
2027 removing the check at the start of the function. */
2028 if (clobbers_queued_reg_save (insn))
2029 dwarf2out_flush_queued_reg_saves ();
2033 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2035 static void
2036 change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
2038 size_t i, n_old, n_new, n_max;
2039 dw_cfi_ref cfi;
2041 if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
2042 add_cfi (new_row->cfa_cfi);
2043 else
2045 cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
2046 if (cfi)
2047 add_cfi (cfi);
2050 n_old = vec_safe_length (old_row->reg_save);
2051 n_new = vec_safe_length (new_row->reg_save);
2052 n_max = MAX (n_old, n_new);
2054 for (i = 0; i < n_max; ++i)
2056 dw_cfi_ref r_old = NULL, r_new = NULL;
2058 if (i < n_old)
2059 r_old = (*old_row->reg_save)[i];
2060 if (i < n_new)
2061 r_new = (*new_row->reg_save)[i];
2063 if (r_old == r_new)
2065 else if (r_new == NULL)
2066 add_cfi_restore (i);
2067 else if (!cfi_equal_p (r_old, r_new))
2068 add_cfi (r_new);
2072 /* Examine CFI and return true if a cfi label and set_loc is needed
2073 beforehand. Even when generating CFI assembler instructions, we
2074 still have to add the cfi to the list so that lookup_cfa_1 works
2075 later on. When -g2 and above we even need to force emitting of
2076 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2077 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2078 and so don't use convert_cfa_to_fb_loc_list. */
2080 static bool
2081 cfi_label_required_p (dw_cfi_ref cfi)
2083 if (!dwarf2out_do_cfi_asm ())
2084 return true;
2086 if (dwarf_version == 2
2087 && debug_info_level > DINFO_LEVEL_TERSE
2088 && (write_symbols == DWARF2_DEBUG
2089 || write_symbols == VMS_AND_DWARF2_DEBUG))
2091 switch (cfi->dw_cfi_opc)
2093 case DW_CFA_def_cfa_offset:
2094 case DW_CFA_def_cfa_offset_sf:
2095 case DW_CFA_def_cfa_register:
2096 case DW_CFA_def_cfa:
2097 case DW_CFA_def_cfa_sf:
2098 case DW_CFA_def_cfa_expression:
2099 case DW_CFA_restore_state:
2100 return true;
2101 default:
2102 return false;
2105 return false;
2108 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2109 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2110 necessary. */
2111 static void
2112 add_cfis_to_fde (void)
2114 dw_fde_ref fde = cfun->fde;
2115 rtx insn, next;
2116 /* We always start with a function_begin label. */
2117 bool first = false;
2119 for (insn = get_insns (); insn; insn = next)
2121 next = NEXT_INSN (insn);
2123 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2125 fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi);
2126 /* Don't attempt to advance_loc4 between labels
2127 in different sections. */
2128 first = true;
2131 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2133 bool required = cfi_label_required_p (NOTE_CFI (insn));
2134 while (next)
2135 if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
2137 required |= cfi_label_required_p (NOTE_CFI (next));
2138 next = NEXT_INSN (next);
2140 else if (active_insn_p (next)
2141 || (NOTE_P (next) && (NOTE_KIND (next)
2142 == NOTE_INSN_SWITCH_TEXT_SECTIONS)))
2143 break;
2144 else
2145 next = NEXT_INSN (next);
2146 if (required)
2148 int num = dwarf2out_cfi_label_num;
2149 const char *label = dwarf2out_cfi_label ();
2150 dw_cfi_ref xcfi;
2151 rtx tmp;
2153 /* Set the location counter to the new label. */
2154 xcfi = new_cfi ();
2155 xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
2156 : DW_CFA_advance_loc4);
2157 xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
2158 vec_safe_push (fde->dw_fde_cfi, xcfi);
2160 tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
2161 NOTE_LABEL_NUMBER (tmp) = num;
2166 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2167 vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn));
2168 insn = NEXT_INSN (insn);
2170 while (insn != next);
2171 first = false;
2176 /* If LABEL is the start of a trace, then initialize the state of that
2177 trace from CUR_TRACE and CUR_ROW. */
2179 static void
2180 maybe_record_trace_start (rtx start, rtx origin)
2182 dw_trace_info *ti;
2183 HOST_WIDE_INT args_size;
2185 ti = get_trace_info (start);
2186 gcc_assert (ti != NULL);
2188 if (dump_file)
2190 fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
2191 cur_trace->id, ti->id,
2192 (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
2193 (origin ? INSN_UID (origin) : 0));
2196 args_size = cur_trace->end_true_args_size;
2197 if (ti->beg_row == NULL)
2199 /* This is the first time we've encountered this trace. Propagate
2200 state across the edge and push the trace onto the work list. */
2201 ti->beg_row = copy_cfi_row (cur_row);
2202 ti->beg_true_args_size = args_size;
2204 ti->cfa_store = cur_trace->cfa_store;
2205 ti->cfa_temp = cur_trace->cfa_temp;
2206 ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy ();
2208 trace_work_list.safe_push (ti);
2210 if (dump_file)
2211 fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id);
2213 else
2216 /* We ought to have the same state incoming to a given trace no
2217 matter how we arrive at the trace. Anything else means we've
2218 got some kind of optimization error. */
2219 gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
2221 /* The args_size is allowed to conflict if it isn't actually used. */
2222 if (ti->beg_true_args_size != args_size)
2223 ti->args_size_undefined = true;
2227 /* Similarly, but handle the args_size and CFA reset across EH
2228 and non-local goto edges. */
2230 static void
2231 maybe_record_trace_start_abnormal (rtx start, rtx origin)
2233 HOST_WIDE_INT save_args_size, delta;
2234 dw_cfa_location save_cfa;
2236 save_args_size = cur_trace->end_true_args_size;
2237 if (save_args_size == 0)
2239 maybe_record_trace_start (start, origin);
2240 return;
2243 delta = -save_args_size;
2244 cur_trace->end_true_args_size = 0;
2246 save_cfa = cur_row->cfa;
2247 if (cur_row->cfa.reg == dw_stack_pointer_regnum)
2249 /* Convert a change in args_size (always a positive in the
2250 direction of stack growth) to a change in stack pointer. */
2251 #ifndef STACK_GROWS_DOWNWARD
2252 delta = -delta;
2253 #endif
2254 cur_row->cfa.offset += delta;
2257 maybe_record_trace_start (start, origin);
2259 cur_trace->end_true_args_size = save_args_size;
2260 cur_row->cfa = save_cfa;
2263 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2264 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2266 static void
2267 create_trace_edges (rtx insn)
2269 rtx tmp, lab;
2270 int i, n;
2272 if (JUMP_P (insn))
2274 if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
2275 return;
2277 if (tablejump_p (insn, NULL, &tmp))
2279 rtvec vec;
2281 tmp = PATTERN (tmp);
2282 vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
2284 n = GET_NUM_ELEM (vec);
2285 for (i = 0; i < n; ++i)
2287 lab = XEXP (RTVEC_ELT (vec, i), 0);
2288 maybe_record_trace_start (lab, insn);
2291 else if (computed_jump_p (insn))
2293 for (lab = forced_labels; lab; lab = XEXP (lab, 1))
2294 maybe_record_trace_start (XEXP (lab, 0), insn);
2296 else if (returnjump_p (insn))
2298 else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
2300 n = ASM_OPERANDS_LABEL_LENGTH (tmp);
2301 for (i = 0; i < n; ++i)
2303 lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
2304 maybe_record_trace_start (lab, insn);
2307 else
2309 lab = JUMP_LABEL (insn);
2310 gcc_assert (lab != NULL);
2311 maybe_record_trace_start (lab, insn);
2314 else if (CALL_P (insn))
2316 /* Sibling calls don't have edges inside this function. */
2317 if (SIBLING_CALL_P (insn))
2318 return;
2320 /* Process non-local goto edges. */
2321 if (can_nonlocal_goto (insn))
2322 for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
2323 maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
2325 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2327 rtx seq = PATTERN (insn);
2328 int i, n = XVECLEN (seq, 0);
2329 for (i = 0; i < n; ++i)
2330 create_trace_edges (XVECEXP (seq, 0, i));
2331 return;
2334 /* Process EH edges. */
2335 if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
2337 eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
2338 if (lp)
2339 maybe_record_trace_start_abnormal (lp->landing_pad, insn);
2343 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2345 static void
2346 scan_insn_after (rtx insn)
2348 if (RTX_FRAME_RELATED_P (insn))
2349 dwarf2out_frame_debug (insn);
2350 notice_args_size (insn);
2353 /* Scan the trace beginning at INSN and create the CFI notes for the
2354 instructions therein. */
2356 static void
2357 scan_trace (dw_trace_info *trace)
2359 rtx prev, insn = trace->head;
2360 dw_cfa_location this_cfa;
2362 if (dump_file)
2363 fprintf (dump_file, "Processing trace %u : start at %s %d\n",
2364 trace->id, rtx_name[(int) GET_CODE (insn)],
2365 INSN_UID (insn));
2367 trace->end_row = copy_cfi_row (trace->beg_row);
2368 trace->end_true_args_size = trace->beg_true_args_size;
2370 cur_trace = trace;
2371 cur_row = trace->end_row;
2373 this_cfa = cur_row->cfa;
2374 cur_cfa = &this_cfa;
2376 for (prev = insn, insn = NEXT_INSN (insn);
2377 insn;
2378 prev = insn, insn = NEXT_INSN (insn))
2380 rtx control;
2382 /* Do everything that happens "before" the insn. */
2383 add_cfi_insn = prev;
2385 /* Notice the end of a trace. */
2386 if (BARRIER_P (insn))
2388 /* Don't bother saving the unneeded queued registers at all. */
2389 queued_reg_saves.truncate (0);
2390 break;
2392 if (save_point_p (insn))
2394 /* Propagate across fallthru edges. */
2395 dwarf2out_flush_queued_reg_saves ();
2396 maybe_record_trace_start (insn, NULL);
2397 break;
2400 if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
2401 continue;
2403 /* Handle all changes to the row state. Sequences require special
2404 handling for the positioning of the notes. */
2405 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2407 rtx elt, pat = PATTERN (insn);
2408 int i, n = XVECLEN (pat, 0);
2410 control = XVECEXP (pat, 0, 0);
2411 if (can_throw_internal (control))
2412 notice_eh_throw (control);
2413 dwarf2out_flush_queued_reg_saves ();
2415 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
2417 /* ??? Hopefully multiple delay slots are not annulled. */
2418 gcc_assert (n == 2);
2419 gcc_assert (!RTX_FRAME_RELATED_P (control));
2420 gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
2422 elt = XVECEXP (pat, 0, 1);
2424 if (INSN_FROM_TARGET_P (elt))
2426 HOST_WIDE_INT restore_args_size;
2427 cfi_vec save_row_reg_save;
2429 /* If ELT is an instruction from target of an annulled
2430 branch, the effects are for the target only and so
2431 the args_size and CFA along the current path
2432 shouldn't change. */
2433 add_cfi_insn = NULL;
2434 restore_args_size = cur_trace->end_true_args_size;
2435 cur_cfa = &cur_row->cfa;
2436 save_row_reg_save = vec_safe_copy (cur_row->reg_save);
2438 scan_insn_after (elt);
2440 /* ??? Should we instead save the entire row state? */
2441 gcc_assert (!queued_reg_saves.length ());
2443 create_trace_edges (control);
2445 cur_trace->end_true_args_size = restore_args_size;
2446 cur_row->cfa = this_cfa;
2447 cur_row->reg_save = save_row_reg_save;
2448 cur_cfa = &this_cfa;
2450 else
2452 /* If ELT is a annulled branch-taken instruction (i.e.
2453 executed only when branch is not taken), the args_size
2454 and CFA should not change through the jump. */
2455 create_trace_edges (control);
2457 /* Update and continue with the trace. */
2458 add_cfi_insn = insn;
2459 scan_insn_after (elt);
2460 def_cfa_1 (&this_cfa);
2462 continue;
2465 /* The insns in the delay slot should all be considered to happen
2466 "before" a call insn. Consider a call with a stack pointer
2467 adjustment in the delay slot. The backtrace from the callee
2468 should include the sp adjustment. Unfortunately, that leaves
2469 us with an unavoidable unwinding error exactly at the call insn
2470 itself. For jump insns we'd prefer to avoid this error by
2471 placing the notes after the sequence. */
2472 if (JUMP_P (control))
2473 add_cfi_insn = insn;
2475 for (i = 1; i < n; ++i)
2477 elt = XVECEXP (pat, 0, i);
2478 scan_insn_after (elt);
2481 /* Make sure any register saves are visible at the jump target. */
2482 dwarf2out_flush_queued_reg_saves ();
2483 any_cfis_emitted = false;
2485 /* However, if there is some adjustment on the call itself, e.g.
2486 a call_pop, that action should be considered to happen after
2487 the call returns. */
2488 add_cfi_insn = insn;
2489 scan_insn_after (control);
2491 else
2493 /* Flush data before calls and jumps, and of course if necessary. */
2494 if (can_throw_internal (insn))
2496 notice_eh_throw (insn);
2497 dwarf2out_flush_queued_reg_saves ();
2499 else if (!NONJUMP_INSN_P (insn)
2500 || clobbers_queued_reg_save (insn)
2501 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2502 dwarf2out_flush_queued_reg_saves ();
2503 any_cfis_emitted = false;
2505 add_cfi_insn = insn;
2506 scan_insn_after (insn);
2507 control = insn;
2510 /* Between frame-related-p and args_size we might have otherwise
2511 emitted two cfa adjustments. Do it now. */
2512 def_cfa_1 (&this_cfa);
2514 /* Minimize the number of advances by emitting the entire queue
2515 once anything is emitted. */
2516 if (any_cfis_emitted
2517 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2518 dwarf2out_flush_queued_reg_saves ();
2520 /* Note that a test for control_flow_insn_p does exactly the
2521 same tests as are done to actually create the edges. So
2522 always call the routine and let it not create edges for
2523 non-control-flow insns. */
2524 create_trace_edges (control);
2527 add_cfi_insn = NULL;
2528 cur_row = NULL;
2529 cur_trace = NULL;
2530 cur_cfa = NULL;
2533 /* Scan the function and create the initial set of CFI notes. */
2535 static void
2536 create_cfi_notes (void)
2538 dw_trace_info *ti;
2540 gcc_checking_assert (!queued_reg_saves.exists ());
2541 gcc_checking_assert (!trace_work_list.exists ());
2543 /* Always begin at the entry trace. */
2544 ti = &trace_info[0];
2545 scan_trace (ti);
2547 while (!trace_work_list.is_empty ())
2549 ti = trace_work_list.pop ();
2550 scan_trace (ti);
2553 queued_reg_saves.release ();
2554 trace_work_list.release ();
2557 /* Return the insn before the first NOTE_INSN_CFI after START. */
2559 static rtx
2560 before_next_cfi_note (rtx start)
2562 rtx prev = start;
2563 while (start)
2565 if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
2566 return prev;
2567 prev = start;
2568 start = NEXT_INSN (start);
2570 gcc_unreachable ();
2573 /* Insert CFI notes between traces to properly change state between them. */
2575 static void
2576 connect_traces (void)
2578 unsigned i, n = trace_info.length ();
2579 dw_trace_info *prev_ti, *ti;
2581 /* ??? Ideally, we should have both queued and processed every trace.
2582 However the current representation of constant pools on various targets
2583 is indistinguishable from unreachable code. Assume for the moment that
2584 we can simply skip over such traces. */
2585 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2586 these are not "real" instructions, and should not be considered.
2587 This could be generically useful for tablejump data as well. */
2588 /* Remove all unprocessed traces from the list. */
2589 for (i = n - 1; i > 0; --i)
2591 ti = &trace_info[i];
2592 if (ti->beg_row == NULL)
2594 trace_info.ordered_remove (i);
2595 n -= 1;
2597 else
2598 gcc_assert (ti->end_row != NULL);
2601 /* Work from the end back to the beginning. This lets us easily insert
2602 remember/restore_state notes in the correct order wrt other notes. */
2603 prev_ti = &trace_info[n - 1];
2604 for (i = n - 1; i > 0; --i)
2606 dw_cfi_row *old_row;
2608 ti = prev_ti;
2609 prev_ti = &trace_info[i - 1];
2611 add_cfi_insn = ti->head;
2613 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2614 for the portion of the function in the alternate text
2615 section. The row state at the very beginning of that
2616 new FDE will be exactly the row state from the CIE. */
2617 if (ti->switch_sections)
2618 old_row = cie_cfi_row;
2619 else
2621 old_row = prev_ti->end_row;
2622 /* If there's no change from the previous end state, fine. */
2623 if (cfi_row_equal_p (old_row, ti->beg_row))
2625 /* Otherwise check for the common case of sharing state with
2626 the beginning of an epilogue, but not the end. Insert
2627 remember/restore opcodes in that case. */
2628 else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row))
2630 dw_cfi_ref cfi;
2632 /* Note that if we blindly insert the remember at the
2633 start of the trace, we can wind up increasing the
2634 size of the unwind info due to extra advance opcodes.
2635 Instead, put the remember immediately before the next
2636 state change. We know there must be one, because the
2637 state at the beginning and head of the trace differ. */
2638 add_cfi_insn = before_next_cfi_note (prev_ti->head);
2639 cfi = new_cfi ();
2640 cfi->dw_cfi_opc = DW_CFA_remember_state;
2641 add_cfi (cfi);
2643 add_cfi_insn = ti->head;
2644 cfi = new_cfi ();
2645 cfi->dw_cfi_opc = DW_CFA_restore_state;
2646 add_cfi (cfi);
2648 old_row = prev_ti->beg_row;
2650 /* Otherwise, we'll simply change state from the previous end. */
2653 change_cfi_row (old_row, ti->beg_row);
2655 if (dump_file && add_cfi_insn != ti->head)
2657 rtx note;
2659 fprintf (dump_file, "Fixup between trace %u and %u:\n",
2660 prev_ti->id, ti->id);
2662 note = ti->head;
2665 note = NEXT_INSN (note);
2666 gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
2667 output_cfi_directive (dump_file, NOTE_CFI (note));
2669 while (note != add_cfi_insn);
2673 /* Connect args_size between traces that have can_throw_internal insns. */
2674 if (cfun->eh->lp_array)
2676 HOST_WIDE_INT prev_args_size = 0;
2678 for (i = 0; i < n; ++i)
2680 ti = &trace_info[i];
2682 if (ti->switch_sections)
2683 prev_args_size = 0;
2684 if (ti->eh_head == NULL)
2685 continue;
2686 gcc_assert (!ti->args_size_undefined);
2688 if (ti->beg_delay_args_size != prev_args_size)
2690 /* ??? Search back to previous CFI note. */
2691 add_cfi_insn = PREV_INSN (ti->eh_head);
2692 add_cfi_args_size (ti->beg_delay_args_size);
2695 prev_args_size = ti->end_delay_args_size;
2700 /* Set up the pseudo-cfg of instruction traces, as described at the
2701 block comment at the top of the file. */
2703 static void
2704 create_pseudo_cfg (void)
2706 bool saw_barrier, switch_sections;
2707 dw_trace_info ti;
2708 rtx insn;
2709 unsigned i;
2711 /* The first trace begins at the start of the function,
2712 and begins with the CIE row state. */
2713 trace_info.create (16);
2714 memset (&ti, 0, sizeof (ti));
2715 ti.head = get_insns ();
2716 ti.beg_row = cie_cfi_row;
2717 ti.cfa_store = cie_cfi_row->cfa;
2718 ti.cfa_temp.reg = INVALID_REGNUM;
2719 trace_info.quick_push (ti);
2721 if (cie_return_save)
2722 ti.regs_saved_in_regs.safe_push (*cie_return_save);
2724 /* Walk all the insns, collecting start of trace locations. */
2725 saw_barrier = false;
2726 switch_sections = false;
2727 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2729 if (BARRIER_P (insn))
2730 saw_barrier = true;
2731 else if (NOTE_P (insn)
2732 && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2734 /* We should have just seen a barrier. */
2735 gcc_assert (saw_barrier);
2736 switch_sections = true;
2738 /* Watch out for save_point notes between basic blocks.
2739 In particular, a note after a barrier. Do not record these,
2740 delaying trace creation until the label. */
2741 else if (save_point_p (insn)
2742 && (LABEL_P (insn) || !saw_barrier))
2744 memset (&ti, 0, sizeof (ti));
2745 ti.head = insn;
2746 ti.switch_sections = switch_sections;
2747 ti.id = trace_info.length () - 1;
2748 trace_info.safe_push (ti);
2750 saw_barrier = false;
2751 switch_sections = false;
2755 /* Create the trace index after we've finished building trace_info,
2756 avoiding stale pointer problems due to reallocation. */
2757 trace_index.create (trace_info.length ());
2758 dw_trace_info *tp;
2759 FOR_EACH_VEC_ELT (trace_info, i, tp)
2761 dw_trace_info **slot;
2763 if (dump_file)
2764 fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i,
2765 rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head),
2766 tp->switch_sections ? " (section switch)" : "");
2768 slot = trace_index.find_slot_with_hash (tp, INSN_UID (tp->head), INSERT);
2769 gcc_assert (*slot == NULL);
2770 *slot = tp;
2774 /* Record the initial position of the return address. RTL is
2775 INCOMING_RETURN_ADDR_RTX. */
2777 static void
2778 initial_return_save (rtx rtl)
2780 unsigned int reg = INVALID_REGNUM;
2781 HOST_WIDE_INT offset = 0;
2783 switch (GET_CODE (rtl))
2785 case REG:
2786 /* RA is in a register. */
2787 reg = dwf_regno (rtl);
2788 break;
2790 case MEM:
2791 /* RA is on the stack. */
2792 rtl = XEXP (rtl, 0);
2793 switch (GET_CODE (rtl))
2795 case REG:
2796 gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM);
2797 offset = 0;
2798 break;
2800 case PLUS:
2801 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2802 offset = INTVAL (XEXP (rtl, 1));
2803 break;
2805 case MINUS:
2806 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2807 offset = -INTVAL (XEXP (rtl, 1));
2808 break;
2810 default:
2811 gcc_unreachable ();
2814 break;
2816 case PLUS:
2817 /* The return address is at some offset from any value we can
2818 actually load. For instance, on the SPARC it is in %i7+8. Just
2819 ignore the offset for now; it doesn't matter for unwinding frames. */
2820 gcc_assert (CONST_INT_P (XEXP (rtl, 1)));
2821 initial_return_save (XEXP (rtl, 0));
2822 return;
2824 default:
2825 gcc_unreachable ();
2828 if (reg != DWARF_FRAME_RETURN_COLUMN)
2830 if (reg != INVALID_REGNUM)
2831 record_reg_saved_in_reg (rtl, pc_rtx);
2832 reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
2836 static void
2837 create_cie_data (void)
2839 dw_cfa_location loc;
2840 dw_trace_info cie_trace;
2842 dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
2843 dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
2845 memset (&cie_trace, 0, sizeof (cie_trace));
2846 cur_trace = &cie_trace;
2848 add_cfi_vec = &cie_cfi_vec;
2849 cie_cfi_row = cur_row = new_cfi_row ();
2851 /* On entry, the Canonical Frame Address is at SP. */
2852 memset (&loc, 0, sizeof (loc));
2853 loc.reg = dw_stack_pointer_regnum;
2854 loc.offset = INCOMING_FRAME_SP_OFFSET;
2855 def_cfa_1 (&loc);
2857 if (targetm.debug_unwind_info () == UI_DWARF2
2858 || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
2860 initial_return_save (INCOMING_RETURN_ADDR_RTX);
2862 /* For a few targets, we have the return address incoming into a
2863 register, but choose a different return column. This will result
2864 in a DW_CFA_register for the return, and an entry in
2865 regs_saved_in_regs to match. If the target later stores that
2866 return address register to the stack, we want to be able to emit
2867 the DW_CFA_offset against the return column, not the intermediate
2868 save register. Save the contents of regs_saved_in_regs so that
2869 we can re-initialize it at the start of each function. */
2870 switch (cie_trace.regs_saved_in_regs.length ())
2872 case 0:
2873 break;
2874 case 1:
2875 cie_return_save = ggc_alloc_reg_saved_in_data ();
2876 *cie_return_save = cie_trace.regs_saved_in_regs[0];
2877 cie_trace.regs_saved_in_regs.release ();
2878 break;
2879 default:
2880 gcc_unreachable ();
2884 add_cfi_vec = NULL;
2885 cur_row = NULL;
2886 cur_trace = NULL;
2889 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2890 state at each location within the function. These notes will be
2891 emitted during pass_final. */
2893 static unsigned int
2894 execute_dwarf2_frame (void)
2896 /* The first time we're called, compute the incoming frame state. */
2897 if (cie_cfi_vec == NULL)
2898 create_cie_data ();
2900 dwarf2out_alloc_current_fde ();
2902 create_pseudo_cfg ();
2904 /* Do the work. */
2905 create_cfi_notes ();
2906 connect_traces ();
2907 add_cfis_to_fde ();
2909 /* Free all the data we allocated. */
2911 size_t i;
2912 dw_trace_info *ti;
2914 FOR_EACH_VEC_ELT (trace_info, i, ti)
2915 ti->regs_saved_in_regs.release ();
2917 trace_info.release ();
2919 trace_index.dispose ();
2921 return 0;
2924 /* Convert a DWARF call frame info. operation to its string name */
2926 static const char *
2927 dwarf_cfi_name (unsigned int cfi_opc)
2929 const char *name = get_DW_CFA_name (cfi_opc);
2931 if (name != NULL)
2932 return name;
2934 return "DW_CFA_<unknown>";
2937 /* This routine will generate the correct assembly data for a location
2938 description based on a cfi entry with a complex address. */
2940 static void
2941 output_cfa_loc (dw_cfi_ref cfi, int for_eh)
2943 dw_loc_descr_ref loc;
2944 unsigned long size;
2946 if (cfi->dw_cfi_opc == DW_CFA_expression)
2948 unsigned r =
2949 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
2950 dw2_asm_output_data (1, r, NULL);
2951 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2953 else
2954 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2956 /* Output the size of the block. */
2957 size = size_of_locs (loc);
2958 dw2_asm_output_data_uleb128 (size, NULL);
2960 /* Now output the operations themselves. */
2961 output_loc_sequence (loc, for_eh);
2964 /* Similar, but used for .cfi_escape. */
2966 static void
2967 output_cfa_loc_raw (dw_cfi_ref cfi)
2969 dw_loc_descr_ref loc;
2970 unsigned long size;
2972 if (cfi->dw_cfi_opc == DW_CFA_expression)
2974 unsigned r =
2975 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
2976 fprintf (asm_out_file, "%#x,", r);
2977 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2979 else
2980 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2982 /* Output the size of the block. */
2983 size = size_of_locs (loc);
2984 dw2_asm_output_data_uleb128_raw (size);
2985 fputc (',', asm_out_file);
2987 /* Now output the operations themselves. */
2988 output_loc_sequence_raw (loc);
2991 /* Output a Call Frame Information opcode and its operand(s). */
2993 void
2994 output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh)
2996 unsigned long r;
2997 HOST_WIDE_INT off;
2999 if (cfi->dw_cfi_opc == DW_CFA_advance_loc)
3000 dw2_asm_output_data (1, (cfi->dw_cfi_opc
3001 | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)),
3002 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX,
3003 ((unsigned HOST_WIDE_INT)
3004 cfi->dw_cfi_oprnd1.dw_cfi_offset));
3005 else if (cfi->dw_cfi_opc == DW_CFA_offset)
3007 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3008 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3009 "DW_CFA_offset, column %#lx", r);
3010 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3011 dw2_asm_output_data_uleb128 (off, NULL);
3013 else if (cfi->dw_cfi_opc == DW_CFA_restore)
3015 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3016 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3017 "DW_CFA_restore, column %#lx", r);
3019 else
3021 dw2_asm_output_data (1, cfi->dw_cfi_opc,
3022 "%s", dwarf_cfi_name (cfi->dw_cfi_opc));
3024 switch (cfi->dw_cfi_opc)
3026 case DW_CFA_set_loc:
3027 if (for_eh)
3028 dw2_asm_output_encoded_addr_rtx (
3029 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3030 gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr),
3031 false, NULL);
3032 else
3033 dw2_asm_output_addr (DWARF2_ADDR_SIZE,
3034 cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL);
3035 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3036 break;
3038 case DW_CFA_advance_loc1:
3039 dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3040 fde->dw_fde_current_label, NULL);
3041 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3042 break;
3044 case DW_CFA_advance_loc2:
3045 dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3046 fde->dw_fde_current_label, NULL);
3047 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3048 break;
3050 case DW_CFA_advance_loc4:
3051 dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3052 fde->dw_fde_current_label, NULL);
3053 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3054 break;
3056 case DW_CFA_MIPS_advance_loc8:
3057 dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3058 fde->dw_fde_current_label, NULL);
3059 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3060 break;
3062 case DW_CFA_offset_extended:
3063 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3064 dw2_asm_output_data_uleb128 (r, NULL);
3065 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3066 dw2_asm_output_data_uleb128 (off, NULL);
3067 break;
3069 case DW_CFA_def_cfa:
3070 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3071 dw2_asm_output_data_uleb128 (r, NULL);
3072 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL);
3073 break;
3075 case DW_CFA_offset_extended_sf:
3076 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3077 dw2_asm_output_data_uleb128 (r, NULL);
3078 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3079 dw2_asm_output_data_sleb128 (off, NULL);
3080 break;
3082 case DW_CFA_def_cfa_sf:
3083 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3084 dw2_asm_output_data_uleb128 (r, NULL);
3085 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3086 dw2_asm_output_data_sleb128 (off, NULL);
3087 break;
3089 case DW_CFA_restore_extended:
3090 case DW_CFA_undefined:
3091 case DW_CFA_same_value:
3092 case DW_CFA_def_cfa_register:
3093 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3094 dw2_asm_output_data_uleb128 (r, NULL);
3095 break;
3097 case DW_CFA_register:
3098 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3099 dw2_asm_output_data_uleb128 (r, NULL);
3100 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh);
3101 dw2_asm_output_data_uleb128 (r, NULL);
3102 break;
3104 case DW_CFA_def_cfa_offset:
3105 case DW_CFA_GNU_args_size:
3106 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL);
3107 break;
3109 case DW_CFA_def_cfa_offset_sf:
3110 off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3111 dw2_asm_output_data_sleb128 (off, NULL);
3112 break;
3114 case DW_CFA_GNU_window_save:
3115 break;
3117 case DW_CFA_def_cfa_expression:
3118 case DW_CFA_expression:
3119 output_cfa_loc (cfi, for_eh);
3120 break;
3122 case DW_CFA_GNU_negative_offset_extended:
3123 /* Obsoleted by DW_CFA_offset_extended_sf. */
3124 gcc_unreachable ();
3126 default:
3127 break;
3132 /* Similar, but do it via assembler directives instead. */
3134 void
3135 output_cfi_directive (FILE *f, dw_cfi_ref cfi)
3137 unsigned long r, r2;
3139 switch (cfi->dw_cfi_opc)
3141 case DW_CFA_advance_loc:
3142 case DW_CFA_advance_loc1:
3143 case DW_CFA_advance_loc2:
3144 case DW_CFA_advance_loc4:
3145 case DW_CFA_MIPS_advance_loc8:
3146 case DW_CFA_set_loc:
3147 /* Should only be created in a code path not followed when emitting
3148 via directives. The assembler is going to take care of this for
3149 us. But this routines is also used for debugging dumps, so
3150 print something. */
3151 gcc_assert (f != asm_out_file);
3152 fprintf (f, "\t.cfi_advance_loc\n");
3153 break;
3155 case DW_CFA_offset:
3156 case DW_CFA_offset_extended:
3157 case DW_CFA_offset_extended_sf:
3158 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3159 fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3160 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3161 break;
3163 case DW_CFA_restore:
3164 case DW_CFA_restore_extended:
3165 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3166 fprintf (f, "\t.cfi_restore %lu\n", r);
3167 break;
3169 case DW_CFA_undefined:
3170 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3171 fprintf (f, "\t.cfi_undefined %lu\n", r);
3172 break;
3174 case DW_CFA_same_value:
3175 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3176 fprintf (f, "\t.cfi_same_value %lu\n", r);
3177 break;
3179 case DW_CFA_def_cfa:
3180 case DW_CFA_def_cfa_sf:
3181 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3182 fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3183 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3184 break;
3186 case DW_CFA_def_cfa_register:
3187 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3188 fprintf (f, "\t.cfi_def_cfa_register %lu\n", r);
3189 break;
3191 case DW_CFA_register:
3192 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3193 r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1);
3194 fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2);
3195 break;
3197 case DW_CFA_def_cfa_offset:
3198 case DW_CFA_def_cfa_offset_sf:
3199 fprintf (f, "\t.cfi_def_cfa_offset "
3200 HOST_WIDE_INT_PRINT_DEC"\n",
3201 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3202 break;
3204 case DW_CFA_remember_state:
3205 fprintf (f, "\t.cfi_remember_state\n");
3206 break;
3207 case DW_CFA_restore_state:
3208 fprintf (f, "\t.cfi_restore_state\n");
3209 break;
3211 case DW_CFA_GNU_args_size:
3212 if (f == asm_out_file)
3214 fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size);
3215 dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3216 if (flag_debug_asm)
3217 fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC,
3218 ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset);
3219 fputc ('\n', f);
3221 else
3223 fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n",
3224 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3226 break;
3228 case DW_CFA_GNU_window_save:
3229 fprintf (f, "\t.cfi_window_save\n");
3230 break;
3232 case DW_CFA_def_cfa_expression:
3233 if (f != asm_out_file)
3235 fprintf (f, "\t.cfi_def_cfa_expression ...\n");
3236 break;
3238 /* FALLTHRU */
3239 case DW_CFA_expression:
3240 if (f != asm_out_file)
3242 fprintf (f, "\t.cfi_cfa_expression ...\n");
3243 break;
3245 fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc);
3246 output_cfa_loc_raw (cfi);
3247 fputc ('\n', f);
3248 break;
3250 default:
3251 gcc_unreachable ();
3255 void
3256 dwarf2out_emit_cfi (dw_cfi_ref cfi)
3258 if (dwarf2out_do_cfi_asm ())
3259 output_cfi_directive (asm_out_file, cfi);
3262 static void
3263 dump_cfi_row (FILE *f, dw_cfi_row *row)
3265 dw_cfi_ref cfi;
3266 unsigned i;
3268 cfi = row->cfa_cfi;
3269 if (!cfi)
3271 dw_cfa_location dummy;
3272 memset (&dummy, 0, sizeof (dummy));
3273 dummy.reg = INVALID_REGNUM;
3274 cfi = def_cfa_0 (&dummy, &row->cfa);
3276 output_cfi_directive (f, cfi);
3278 FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi)
3279 if (cfi)
3280 output_cfi_directive (f, cfi);
3283 void debug_cfi_row (dw_cfi_row *row);
3285 void
3286 debug_cfi_row (dw_cfi_row *row)
3288 dump_cfi_row (stderr, row);
3292 /* Save the result of dwarf2out_do_frame across PCH.
3293 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3294 static GTY(()) signed char saved_do_cfi_asm = 0;
3296 /* Decide whether we want to emit frame unwind information for the current
3297 translation unit. */
3299 bool
3300 dwarf2out_do_frame (void)
3302 /* We want to emit correct CFA location expressions or lists, so we
3303 have to return true if we're going to output debug info, even if
3304 we're not going to output frame or unwind info. */
3305 if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
3306 return true;
3308 if (saved_do_cfi_asm > 0)
3309 return true;
3311 if (targetm.debug_unwind_info () == UI_DWARF2)
3312 return true;
3314 if ((flag_unwind_tables || flag_exceptions)
3315 && targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
3316 return true;
3318 return false;
3321 /* Decide whether to emit frame unwind via assembler directives. */
3323 bool
3324 dwarf2out_do_cfi_asm (void)
3326 int enc;
3328 if (saved_do_cfi_asm != 0)
3329 return saved_do_cfi_asm > 0;
3331 /* Assume failure for a moment. */
3332 saved_do_cfi_asm = -1;
3334 if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ())
3335 return false;
3336 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
3337 return false;
3339 /* Make sure the personality encoding is one the assembler can support.
3340 In particular, aligned addresses can't be handled. */
3341 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3342 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3343 return false;
3344 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3345 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3346 return false;
3348 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3349 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3350 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3351 && !flag_unwind_tables && !flag_exceptions
3352 && targetm_common.except_unwind_info (&global_options) != UI_DWARF2)
3353 return false;
3355 /* Success! */
3356 saved_do_cfi_asm = 1;
3357 return true;
3360 static bool
3361 gate_dwarf2_frame (void)
3363 #ifndef HAVE_prologue
3364 /* Targets which still implement the prologue in assembler text
3365 cannot use the generic dwarf2 unwinding. */
3366 return false;
3367 #endif
3369 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3370 from the optimized shrink-wrapping annotations that we will compute.
3371 For now, only produce the CFI notes for dwarf2. */
3372 return dwarf2out_do_frame ();
3375 namespace {
3377 const pass_data pass_data_dwarf2_frame =
3379 RTL_PASS, /* type */
3380 "dwarf2", /* name */
3381 OPTGROUP_NONE, /* optinfo_flags */
3382 true, /* has_gate */
3383 true, /* has_execute */
3384 TV_FINAL, /* tv_id */
3385 0, /* properties_required */
3386 0, /* properties_provided */
3387 0, /* properties_destroyed */
3388 0, /* todo_flags_start */
3389 0, /* todo_flags_finish */
3392 class pass_dwarf2_frame : public rtl_opt_pass
3394 public:
3395 pass_dwarf2_frame (gcc::context *ctxt)
3396 : rtl_opt_pass (pass_data_dwarf2_frame, ctxt)
3399 /* opt_pass methods: */
3400 bool gate () { return gate_dwarf2_frame (); }
3401 unsigned int execute () { return execute_dwarf2_frame (); }
3403 }; // class pass_dwarf2_frame
3405 } // anon namespace
3407 rtl_opt_pass *
3408 make_pass_dwarf2_frame (gcc::context *ctxt)
3410 return new pass_dwarf2_frame (ctxt);
3413 #include "gt-dwarf2cfi.h"