1 /****************************************************************************
3 * GNAT COMPILER COMPONENTS *
5 * S I G T R A M P - T A R G E T *
7 * Asm Implementation Include File *
9 * Copyright (C) 2011-2017, Free Software Foundation, Inc. *
11 * GNAT is free software; you can redistribute it and/or modify it under *
12 * terms of the GNU General Public License as published by the Free Soft- *
13 * ware Foundation; either version 3, or (at your option) any later ver- *
14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
16 * or FITNESS FOR A PARTICULAR PURPOSE. *
18 * As a special exception under Section 7 of GPL version 3, you are granted *
19 * additional permissions described in the GCC Runtime Library Exception, *
20 * version 3.1, as published by the Free Software Foundation. *
22 * In particular, you can freely distribute your programs built with the *
23 * GNAT Pro compiler, including any required library run-time units, using *
24 * any licensing terms of your choosing. See the AdaCore Software License *
27 * GNAT was originally developed by the GNAT team at New York University. *
28 * Extensive contributions were provided by Ada Core Technologies Inc. *
30 ****************************************************************************/
32 /***************************************************************
33 * VxWorks target specific part of the __gnat_sigtramp service *
34 ***************************************************************/
36 /* Note: This target specific part is kept in a separate file to avoid
37 duplication of its code for the vxworks and vxworks-vxsim asm
38 implementation files. */
40 /* ---------------------------
41 -- And now the asm stubs --
42 ---------------------------
44 They all have a common structure with blocks of asm sequences queued one
45 after the others. Typically:
55 asm code to establish frame, setup the cfa reg value,
56 call the real signal handler, ...
61 /*--------------------------------
62 -- Misc constants and helpers --
63 -------------------------------- */
65 /* asm string construction helpers. */
67 #define STR(TEXT) #TEXT
68 /* stringify expanded TEXT, surrounding it with double quotes. */
71 /* stringify E, which will resolve as text but may contain macros
72 still to be expanded. */
74 /* asm (TEXT) outputs <tab>TEXT. These facilitate the output of
80 #define TCR(S) TAB(CR(S))
82 /* REGNO constants, dwarf column numbers for registers of interest. */
90 #define REGNO_GR(N) (N)
92 #define REGNO_PC 67 /* ARG_POINTER_REGNUM */
94 #define FUNCTION "@function"
98 #define REGNO_G_REG_OFFSET(N) (N)
100 #define FUNCTION "%function"
103 #define REGNO_PC_OFFSET 31 /* PC_REGNUM */
105 #define REGNO_PC_OFFSET 15 /* PC_REGNUM */
108 /* Mapping of CFI Column, Gcc Regno, Signal context offset for _LP64
119 /* These are the cfi colunm numbers */
129 #define REGNO_EFLAGS 9
130 #define REGNO_SET_PC 8 /* aka %eip */
132 #define FUNCTION "@function"
134 /* Mapping of CFI Column, Gcc Regno, Signal context offset for 32bit
150 There is no unique numbering for the x86 architecture. It's parameterized
151 by DWARF_FRAME_REGNUM, which is DBX_REGISTER_NUMBER except for Windows, and
152 the latter depends on the platform.
155 #elif defined (__x86_64__)
157 /* These are the cfi colunm numbers */
175 #define REGNO_RPC 16 /* aka %rip */
176 #define REGNO_EFLAGS 49
179 #define FUNCTION "@function"
183 #endif /* REGNO constants */
186 /*------------------------------
187 -- Stub construction blocks --
188 ------------------------------ */
192 Only non-volatile registers are suitable for a CFA base. These are the
193 only ones we can expect to be able retrieve from the unwinding context
194 while walking up the chain, saved by at least the bottom-most exception
195 propagation services. We set a non-volatile register to the value we
196 need in the stub body that follows. */
198 #if defined (__PPC__)
200 /* Use r15 for PPC. Note that r14 is inappropriate here, even though it
201 is non-volatile according to the ABI, because GCC uses it as an extra
202 SCRATCH on SPE targets. */
206 #elif defined (ARMEL)
211 /* Use r8 for ARM. Any of r4-r8 should work. */
219 #elif defined (__x86_64__)
226 #endif /* CFA setup block */
228 #define CFI_DEF_CFA \
229 CR(".cfi_def_cfa " S(CFA_REG) ", 0")
231 /* Register location blocks
232 ------------------------
233 Rules to find registers of interest from the CFA. This should comprise
234 all the non-volatile registers relevant to the interrupted context.
236 Note that we include r1 in this set, unlike the libgcc unwinding
237 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI
238 expressions and the absence of rule for r1 gets compensated by using the
239 target CFA instead. We don't need the expression facility here and
240 setup a fake CFA to allow very simple offset expressions, so having a
241 rule for r1 is the proper thing to do. We for sure have observed
242 crashes in some cases without it. */
244 #if defined (__PPC__)
246 #define COMMON_CFI(REG) \
247 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
249 #define CFI_COMMON_REGS \
250 CR("# CFI for common registers\n") \
251 TCR(COMMON_CFI(GR(0))) \
252 TCR(COMMON_CFI(GR(1))) \
253 TCR(COMMON_CFI(GR(2))) \
254 TCR(COMMON_CFI(GR(3))) \
255 TCR(COMMON_CFI(GR(4))) \
256 TCR(COMMON_CFI(GR(5))) \
257 TCR(COMMON_CFI(GR(6))) \
258 TCR(COMMON_CFI(GR(7))) \
259 TCR(COMMON_CFI(GR(8))) \
260 TCR(COMMON_CFI(GR(9))) \
261 TCR(COMMON_CFI(GR(10))) \
262 TCR(COMMON_CFI(GR(11))) \
263 TCR(COMMON_CFI(GR(12))) \
264 TCR(COMMON_CFI(GR(13))) \
265 TCR(COMMON_CFI(GR(14))) \
266 TCR(COMMON_CFI(GR(15))) \
267 TCR(COMMON_CFI(GR(16))) \
268 TCR(COMMON_CFI(GR(17))) \
269 TCR(COMMON_CFI(GR(18))) \
270 TCR(COMMON_CFI(GR(19))) \
271 TCR(COMMON_CFI(GR(20))) \
272 TCR(COMMON_CFI(GR(21))) \
273 TCR(COMMON_CFI(GR(22))) \
274 TCR(COMMON_CFI(GR(23))) \
275 TCR(COMMON_CFI(GR(24))) \
276 TCR(COMMON_CFI(GR(25))) \
277 TCR(COMMON_CFI(GR(26))) \
278 TCR(COMMON_CFI(GR(27))) \
279 TCR(COMMON_CFI(GR(28))) \
280 TCR(COMMON_CFI(GR(29))) \
281 TCR(COMMON_CFI(GR(30))) \
282 TCR(COMMON_CFI(GR(31))) \
283 TCR(COMMON_CFI(LR)) \
284 TCR(COMMON_CFI(CR)) \
285 TCR(COMMON_CFI(CTR)) \
286 TCR(COMMON_CFI(XER)) \
287 TCR(COMMON_CFI(PC)) \
288 TCR(".cfi_return_column " S(REGNO_PC))
290 /* Trampoline body block
291 --------------------- */
293 #if !defined (__PPC64__)
294 #define SIGTRAMP_BODY \
296 TCR("# Allocate frame and save the non-volatile") \
297 TCR("# registers we're going to modify") \
298 TCR("stwu %r1,-16(%r1)") \
300 TCR("stw %r0,20(%r1)") \
301 TCR("stw %r" S(CFA_REG) ",8(%r1)") \
303 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
304 TCR("mr %r" S(CFA_REG) ", %r7") \
306 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
307 TCR("# arguments are the same as those we received in r3, r4 and r5") \
311 TCR("# Restore our callee-saved items, release our frame and return") \
312 TCR("lwz %r" S(CFA_REG) ",8(%r1)") \
313 TCR("lwz %r0,20(%r1)") \
316 TCR("addi %r1,%r1,16") \
319 #define SIGTRAMP_BODY \
322 TCR("addis 2,12,.TOC.-0@ha") \
323 TCR("addi 2,2,.TOC.-0@l") \
324 TCR(".localentry __gnat_sigtramp_common,.-__gnat_sigtramp_common") \
325 TCR("# Allocate frame and save the non-volatile") \
326 TCR("# registers we're going to modify") \
328 TCR("std %r0,16(%r1)") \
329 TCR("stdu %r1,-32(%r1)") \
330 TCR("std %r2,24(%r1)") \
331 TCR("std %r" S(CFA_REG) ",8(%r1)") \
333 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
334 TCR("mr %r" S(CFA_REG) ", %r7") \
336 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
337 TCR("# arguments are the same as those we received in r3, r4 and r5") \
342 TCR("# Restore our callee-saved items, release our frame and return") \
343 TCR("ld %r" S(CFA_REG) ",8(%r1)") \
344 TCR("ld %r2,24(%r1)") \
345 TCR("addi %r1,%r1,32") \
346 TCR("ld %r0,16(%r1)") \
351 #elif defined (ARMEL)
353 #define COMMON_CFI(REG) \
354 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
357 #define CFI_COMMON_REGS \
358 CR("# CFI for common registers\n") \
359 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
360 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
361 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
362 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
363 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
364 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
365 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
366 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
367 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
368 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
369 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
370 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
371 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
372 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
373 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
374 TCR(COMMON_CFI(G_REG_OFFSET(15))) \
375 TCR(COMMON_CFI(G_REG_OFFSET(16))) \
376 TCR(COMMON_CFI(G_REG_OFFSET(17))) \
377 TCR(COMMON_CFI(G_REG_OFFSET(18))) \
378 TCR(COMMON_CFI(G_REG_OFFSET(19))) \
379 TCR(COMMON_CFI(G_REG_OFFSET(20))) \
380 TCR(COMMON_CFI(G_REG_OFFSET(21))) \
381 TCR(COMMON_CFI(G_REG_OFFSET(22))) \
382 TCR(COMMON_CFI(G_REG_OFFSET(23))) \
383 TCR(COMMON_CFI(G_REG_OFFSET(24))) \
384 TCR(COMMON_CFI(G_REG_OFFSET(25))) \
385 TCR(COMMON_CFI(G_REG_OFFSET(26))) \
386 TCR(COMMON_CFI(G_REG_OFFSET(27))) \
387 TCR(COMMON_CFI(G_REG_OFFSET(28))) \
388 TCR(COMMON_CFI(G_REG_OFFSET(29))) \
389 TCR(COMMON_CFI(PC_OFFSET)) \
390 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
392 #define CFI_COMMON_REGS \
393 CR("# CFI for common registers\n") \
394 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
395 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
396 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
397 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
398 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
399 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
400 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
401 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
402 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
403 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
404 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
405 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
406 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
407 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
408 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
409 TCR(COMMON_CFI(PC_OFFSET)) \
410 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
413 /* Trampoline body block
414 --------------------- */
416 #define SIGTRAMP_BODY \
418 TCR("# Push FP and LR on stack") \
419 TCR("stp x29, x30, [sp, #-16]!") \
420 TCR("# Push register used to hold the CFA on stack") \
421 TCR("str x" S(CFA_REG) ", [sp, #-8]!") \
422 TCR("# Set the CFA: x2 value") \
423 TCR("mov x" S(CFA_REG) ", x2") \
424 TCR("# Call the handler") \
426 TCR("# Release our frame and return (should never get here!).") \
427 TCR("ldr x" S(CFA_REG) " , [sp], 8") \
428 TCR("ldp x29, x30, [sp], 16") \
431 #define SIGTRAMP_BODY \
433 TCR("# Allocate frame and save the non-volatile") \
434 TCR("# registers we're going to modify") \
436 TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \
437 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
438 TCR("ldr r"S(CFA_REG)", [ip]") \
440 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
441 TCR("# arguments are the same as those we received in r0, r1 and r2") \
442 TCR("sub fp, ip, #4") \
444 TCR("# Restore our callee-saved items, release our frame and return") \
445 TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}")
450 #if CPU == SIMNT || CPU == SIMPENTIUM || CPU == SIMLINUX
451 #define COMMON_CFI(REG) \
452 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
454 #define COMMON_CFI(REG) \
455 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
458 #define PC_CFI(REG) \
459 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
461 #define CFI_COMMON_REGS \
462 CR("# CFI for common registers\n") \
463 TCR(COMMON_CFI(EDI)) \
464 TCR(COMMON_CFI(ESI)) \
465 TCR(COMMON_CFI(EBP)) \
466 TCR(COMMON_CFI(ESP)) \
467 TCR(COMMON_CFI(EBX)) \
468 TCR(COMMON_CFI(EDX)) \
469 TCR(COMMON_CFI(ECX)) \
470 TCR(COMMON_CFI(EAX)) \
471 TCR(COMMON_CFI(EFLAGS)) \
472 TCR(PC_CFI(SET_PC)) \
473 TCR(".cfi_return_column " S(REGNO_SET_PC))
475 /* Trampoline body block
476 --------------------- */
478 #define SIGTRAMP_BODY \
480 TCR("# Allocate frame and save the non-volatile") \
481 TCR("# registers we're going to modify") \
483 TCR("movl %esp, %ebp") \
485 TCR("subl $24, %esp") \
486 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
487 TCR("movl 24(%ebp), %edi") \
488 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
489 TCR("# arguments are the same as those we received") \
490 TCR("movl 16(%ebp), %eax") \
491 TCR("movl %eax, 8(%esp)") \
492 TCR("movl 12(%ebp), %eax") \
493 TCR("movl %eax, 4(%esp)") \
494 TCR("movl 8(%ebp), %eax") \
495 TCR("movl %eax, (%esp)") \
496 TCR("call *20(%ebp)") \
497 TCR("# Restore our callee-saved items, release our frame and return") \
502 #elif defined (__x86_64__)
504 #define COMMON_CFI(REG) \
505 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
507 #define CFI_COMMON_REGS \
508 CR("# CFI for common registers\n") \
509 TCR(COMMON_CFI(R15)) \
510 TCR(COMMON_CFI(R14)) \
511 TCR(COMMON_CFI(R13)) \
512 TCR(COMMON_CFI(R12)) \
513 TCR(COMMON_CFI(R11)) \
514 TCR(COMMON_CFI(R10)) \
515 TCR(COMMON_CFI(R9)) \
516 TCR(COMMON_CFI(R8)) \
517 TCR(COMMON_CFI(RDI)) \
518 TCR(COMMON_CFI(RSI)) \
519 TCR(COMMON_CFI(RBP)) \
520 TCR(COMMON_CFI(RSP)) \
521 TCR(COMMON_CFI(RBX)) \
522 TCR(COMMON_CFI(RDX)) \
523 TCR(COMMON_CFI(RCX)) \
524 TCR(COMMON_CFI(RAX)) \
525 TCR(COMMON_CFI(RPC)) \
526 TCR(".cfi_return_column " S(REGNO_RPC))
528 /* Trampoline body block
529 --------------------- */
531 #define SIGTRAMP_BODY \
533 TCR("# Allocate frame and save the non-volatile") \
534 TCR("# registers we're going to modify") \
535 TCR("subq $8, %rsp") \
536 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
537 TCR("movq %r8, %r15") \
538 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
539 TCR("# arguments are the same as those we received") \
541 TCR("# This part should never be executed") \
542 TCR("addq $8, %rsp") \
547 #endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */
549 /* Symbol definition block
550 ----------------------- */
553 #define FUNC_ALIGN TCR(".p2align 4,,15")
558 #define SIGTRAMP_START(SYM) \
559 CR("# " S(SYM) " cfi trampoline") \
560 TCR(".type " S(SYM) ", "FUNCTION) \
564 TCR(".cfi_startproc") \
565 TCR(".cfi_signal_frame")
567 /* Symbol termination block
568 ------------------------ */
570 #define SIGTRAMP_END(SYM) \
572 TCR(".size " S(SYM) ", .-" S(SYM))
574 /*----------------------------
575 -- And now, the real code --
576 ---------------------------- */
578 /* Text section start. The compiler isn't aware of that switch. */