Fix gnu11 fallout on SPARC
[official-gcc.git] / gcc / reorg.c
blob8d69433e1048e598ae3197c3e8f35978ac139231
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "hashtab.h"
112 #include "hash-set.h"
113 #include "vec.h"
114 #include "machmode.h"
115 #include "hard-reg-set.h"
116 #include "input.h"
117 #include "function.h"
118 #include "insn-config.h"
119 #include "conditions.h"
120 #include "basic-block.h"
121 #include "regs.h"
122 #include "recog.h"
123 #include "flags.h"
124 #include "obstack.h"
125 #include "insn-attr.h"
126 #include "resource.h"
127 #include "except.h"
128 #include "params.h"
129 #include "target.h"
130 #include "tree-pass.h"
131 #include "emit-rtl.h"
133 #ifdef DELAY_SLOTS
135 #ifndef ANNUL_IFTRUE_SLOTS
136 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
137 #endif
138 #ifndef ANNUL_IFFALSE_SLOTS
139 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
140 #endif
143 /* First, some functions that were used before GCC got a control flow graph.
144 These functions are now only used here in reorg.c, and have therefore
145 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
147 /* Return the last label to mark the same position as LABEL. Return LABEL
148 itself if it is null or any return rtx. */
150 static rtx
151 skip_consecutive_labels (rtx label_or_return)
153 rtx_insn *insn;
155 if (label_or_return && ANY_RETURN_P (label_or_return))
156 return label_or_return;
158 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
160 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
161 if (LABEL_P (insn))
162 label = insn;
164 return label;
167 #ifdef HAVE_cc0
168 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
169 and REG_CC_USER notes so we can find it. */
171 static void
172 link_cc0_insns (rtx insn)
174 rtx user = next_nonnote_insn (insn);
176 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
177 user = XVECEXP (PATTERN (user), 0, 0);
179 add_reg_note (user, REG_CC_SETTER, insn);
180 add_reg_note (insn, REG_CC_USER, user);
182 #endif
184 /* Insns which have delay slots that have not yet been filled. */
186 static struct obstack unfilled_slots_obstack;
187 static rtx *unfilled_firstobj;
189 /* Define macros to refer to the first and last slot containing unfilled
190 insns. These are used because the list may move and its address
191 should be recomputed at each use. */
193 #define unfilled_slots_base \
194 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
196 #define unfilled_slots_next \
197 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
199 /* Points to the label before the end of the function, or before a
200 return insn. */
201 static rtx_code_label *function_return_label;
202 /* Likewise for a simple_return. */
203 static rtx_code_label *function_simple_return_label;
205 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
206 not always monotonically increase. */
207 static int *uid_to_ruid;
209 /* Highest valid index in `uid_to_ruid'. */
210 static int max_uid;
212 static int stop_search_p (rtx, int);
213 static int resource_conflicts_p (struct resources *, struct resources *);
214 static int insn_references_resource_p (rtx, struct resources *, bool);
215 static int insn_sets_resource_p (rtx, struct resources *, bool);
216 static rtx_code_label *find_end_label (rtx);
217 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
218 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
219 static rtx_insn *delete_from_delay_slot (rtx_insn *);
220 static void delete_scheduled_jump (rtx_insn *);
221 static void note_delay_statistics (int, int);
222 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
223 static rtx_insn_list *optimize_skip (rtx_insn *);
224 #endif
225 static int get_jump_flags (const rtx_insn *, rtx);
226 static int mostly_true_jump (rtx);
227 static rtx get_branch_condition (const rtx_insn *, rtx);
228 static int condition_dominates_p (rtx, const rtx_insn *);
229 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
230 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
231 static int check_annul_list_true_false (int, rtx);
232 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
233 rtx_sequence *,
234 rtx_insn_list *,
235 struct resources *,
236 struct resources *,
237 struct resources *,
238 int, int *, int *,
239 rtx *);
240 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
241 rtx_sequence *,
242 rtx_insn_list *,
243 struct resources *,
244 struct resources *,
245 struct resources *,
246 int, int *, int *);
247 static void try_merge_delay_insns (rtx, rtx_insn *);
248 static rtx redundant_insn (rtx, rtx_insn *, rtx);
249 static int own_thread_p (rtx, rtx, int);
250 static void update_block (rtx_insn *, rtx);
251 static int reorg_redirect_jump (rtx_insn *, rtx);
252 static void update_reg_dead_notes (rtx, rtx);
253 static void fix_reg_dead_note (rtx, rtx);
254 static void update_reg_unused_notes (rtx, rtx);
255 static void fill_simple_delay_slots (int);
256 static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx, rtx, rtx,
257 int, int, int, int,
258 int *, rtx_insn_list *);
259 static void fill_eager_delay_slots (void);
260 static void relax_delay_slots (rtx_insn *);
261 static void make_return_insns (rtx_insn *);
263 /* A wrapper around next_active_insn which takes care to return ret_rtx
264 unchanged. */
266 static rtx
267 first_active_target_insn (rtx insn)
269 if (ANY_RETURN_P (insn))
270 return insn;
271 return next_active_insn (as_a <rtx_insn *> (insn));
274 /* Return true iff INSN is a simplejump, or any kind of return insn. */
276 static bool
277 simplejump_or_return_p (rtx insn)
279 return (JUMP_P (insn)
280 && (simplejump_p (as_a <rtx_insn *> (insn))
281 || ANY_RETURN_P (PATTERN (insn))));
284 /* Return TRUE if this insn should stop the search for insn to fill delay
285 slots. LABELS_P indicates that labels should terminate the search.
286 In all cases, jumps terminate the search. */
288 static int
289 stop_search_p (rtx insn, int labels_p)
291 if (insn == 0)
292 return 1;
294 /* If the insn can throw an exception that is caught within the function,
295 it may effectively perform a jump from the viewpoint of the function.
296 Therefore act like for a jump. */
297 if (can_throw_internal (insn))
298 return 1;
300 switch (GET_CODE (insn))
302 case NOTE:
303 case CALL_INSN:
304 return 0;
306 case CODE_LABEL:
307 return labels_p;
309 case JUMP_INSN:
310 case BARRIER:
311 return 1;
313 case INSN:
314 /* OK unless it contains a delay slot or is an `asm' insn of some type.
315 We don't know anything about these. */
316 return (GET_CODE (PATTERN (insn)) == SEQUENCE
317 || GET_CODE (PATTERN (insn)) == ASM_INPUT
318 || asm_noperands (PATTERN (insn)) >= 0);
320 default:
321 gcc_unreachable ();
325 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
326 resource set contains a volatile memory reference. Otherwise, return FALSE. */
328 static int
329 resource_conflicts_p (struct resources *res1, struct resources *res2)
331 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
332 || res1->volatil || res2->volatil)
333 return 1;
335 return hard_reg_set_intersect_p (res1->regs, res2->regs);
338 /* Return TRUE if any resource marked in RES, a `struct resources', is
339 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
340 routine is using those resources.
342 We compute this by computing all the resources referenced by INSN and
343 seeing if this conflicts with RES. It might be faster to directly check
344 ourselves, and this is the way it used to work, but it means duplicating
345 a large block of complex code. */
347 static int
348 insn_references_resource_p (rtx insn, struct resources *res,
349 bool include_delayed_effects)
351 struct resources insn_res;
353 CLEAR_RESOURCE (&insn_res);
354 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
355 return resource_conflicts_p (&insn_res, res);
358 /* Return TRUE if INSN modifies resources that are marked in RES.
359 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
360 included. CC0 is only modified if it is explicitly set; see comments
361 in front of mark_set_resources for details. */
363 static int
364 insn_sets_resource_p (rtx insn, struct resources *res,
365 bool include_delayed_effects)
367 struct resources insn_sets;
369 CLEAR_RESOURCE (&insn_sets);
370 mark_set_resources (insn, &insn_sets, 0,
371 (include_delayed_effects
372 ? MARK_SRC_DEST_CALL
373 : MARK_SRC_DEST));
374 return resource_conflicts_p (&insn_sets, res);
377 /* Find a label at the end of the function or before a RETURN. If there
378 is none, try to make one. If that fails, returns 0.
380 The property of such a label is that it is placed just before the
381 epilogue or a bare RETURN insn, so that another bare RETURN can be
382 turned into a jump to the label unconditionally. In particular, the
383 label cannot be placed before a RETURN insn with a filled delay slot.
385 ??? There may be a problem with the current implementation. Suppose
386 we start with a bare RETURN insn and call find_end_label. It may set
387 function_return_label just before the RETURN. Suppose the machinery
388 is able to fill the delay slot of the RETURN insn afterwards. Then
389 function_return_label is no longer valid according to the property
390 described above and find_end_label will still return it unmodified.
391 Note that this is probably mitigated by the following observation:
392 once function_return_label is made, it is very likely the target of
393 a jump, so filling the delay slot of the RETURN will be much more
394 difficult.
395 KIND is either simple_return_rtx or ret_rtx, indicating which type of
396 return we're looking for. */
398 static rtx_code_label *
399 find_end_label (rtx kind)
401 rtx_insn *insn;
402 rtx_code_label **plabel;
404 if (kind == ret_rtx)
405 plabel = &function_return_label;
406 else
408 gcc_assert (kind == simple_return_rtx);
409 plabel = &function_simple_return_label;
412 /* If we found one previously, return it. */
413 if (*plabel)
414 return *plabel;
416 /* Otherwise, see if there is a label at the end of the function. If there
417 is, it must be that RETURN insns aren't needed, so that is our return
418 label and we don't have to do anything else. */
420 insn = get_last_insn ();
421 while (NOTE_P (insn)
422 || (NONJUMP_INSN_P (insn)
423 && (GET_CODE (PATTERN (insn)) == USE
424 || GET_CODE (PATTERN (insn)) == CLOBBER)))
425 insn = PREV_INSN (insn);
427 /* When a target threads its epilogue we might already have a
428 suitable return insn. If so put a label before it for the
429 function_return_label. */
430 if (BARRIER_P (insn)
431 && JUMP_P (PREV_INSN (insn))
432 && PATTERN (PREV_INSN (insn)) == kind)
434 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
435 rtx_code_label *label = gen_label_rtx ();
436 LABEL_NUSES (label) = 0;
438 /* Put the label before any USE insns that may precede the RETURN
439 insn. */
440 while (GET_CODE (temp) == USE)
441 temp = PREV_INSN (temp);
443 emit_label_after (label, temp);
444 *plabel = label;
447 else if (LABEL_P (insn))
448 *plabel = as_a <rtx_code_label *> (insn);
449 else
451 rtx_code_label *label = gen_label_rtx ();
452 LABEL_NUSES (label) = 0;
453 /* If the basic block reorder pass moves the return insn to
454 some other place try to locate it again and put our
455 function_return_label there. */
456 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
457 insn = PREV_INSN (insn);
458 if (insn)
460 insn = PREV_INSN (insn);
462 /* Put the label before any USE insns that may precede the
463 RETURN insn. */
464 while (GET_CODE (insn) == USE)
465 insn = PREV_INSN (insn);
467 emit_label_after (label, insn);
469 else
471 #ifdef HAVE_epilogue
472 if (HAVE_epilogue
473 #ifdef HAVE_return
474 && ! HAVE_return
475 #endif
477 /* The RETURN insn has its delay slot filled so we cannot
478 emit the label just before it. Since we already have
479 an epilogue and cannot emit a new RETURN, we cannot
480 emit the label at all. */
481 return NULL;
482 #endif /* HAVE_epilogue */
484 /* Otherwise, make a new label and emit a RETURN and BARRIER,
485 if needed. */
486 emit_label (label);
487 #ifdef HAVE_return
488 if (HAVE_return)
490 /* The return we make may have delay slots too. */
491 rtx pat = gen_return ();
492 rtx_insn *insn = emit_jump_insn (pat);
493 set_return_jump_label (insn);
494 emit_barrier ();
495 if (num_delay_slots (insn) > 0)
496 obstack_ptr_grow (&unfilled_slots_obstack, insn);
498 #endif
500 *plabel = label;
503 /* Show one additional use for this label so it won't go away until
504 we are done. */
505 ++LABEL_NUSES (*plabel);
507 return *plabel;
510 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
511 the pattern of INSN with the SEQUENCE.
513 Returns the insn containing the SEQUENCE that replaces INSN. */
515 static rtx_insn *
516 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
518 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
519 rtvec seqv = rtvec_alloc (length + 1);
520 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
521 rtx_insn *seq_insn = make_insn_raw (seq);
523 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
524 not have a location, but one of the delayed insns does, we pick up a
525 location from there later. */
526 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
528 /* Unlink INSN from the insn chain, so that we can put it into
529 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
530 rtx after = PREV_INSN (insn);
531 remove_insn (insn);
532 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
534 /* Build our SEQUENCE and rebuild the insn chain. */
535 int i = 1;
536 start_sequence ();
537 XVECEXP (seq, 0, 0) = emit_insn (insn);
538 for (rtx_insn_list *li = list; li; li = li->next (), i++)
540 rtx_insn *tem = li->insn ();
541 rtx note, next;
543 /* Show that this copy of the insn isn't deleted. */
544 tem->set_undeleted ();
546 /* Unlink insn from its original place, and re-emit it into
547 the sequence. */
548 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
549 XVECEXP (seq, 0, i) = emit_insn (tem);
551 /* SPARC assembler, for instance, emit warning when debug info is output
552 into the delay slot. */
553 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
554 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
555 INSN_LOCATION (tem) = 0;
557 for (note = REG_NOTES (tem); note; note = next)
559 next = XEXP (note, 1);
560 switch (REG_NOTE_KIND (note))
562 case REG_DEAD:
563 /* Remove any REG_DEAD notes because we can't rely on them now
564 that the insn has been moved. */
565 remove_note (tem, note);
566 break;
568 case REG_LABEL_OPERAND:
569 case REG_LABEL_TARGET:
570 /* Keep the label reference count up to date. */
571 if (LABEL_P (XEXP (note, 0)))
572 LABEL_NUSES (XEXP (note, 0)) ++;
573 break;
575 default:
576 break;
580 end_sequence ();
581 gcc_assert (i == length + 1);
583 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
584 add_insn_after (seq_insn, after, NULL);
586 return seq_insn;
589 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
590 be in the order in which the insns are to be executed. */
592 static rtx_insn_list *
593 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
595 /* If we have an empty list, just make a new list element. If
596 INSN has its block number recorded, clear it since we may
597 be moving the insn to a new block. */
599 if (delay_list == 0)
601 clear_hashed_info_for_insn (insn);
602 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
605 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
606 list. */
607 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
609 return delay_list;
612 /* Delete INSN from the delay slot of the insn that it is in, which may
613 produce an insn with no delay slots. Return the new insn. */
615 static rtx_insn *
616 delete_from_delay_slot (rtx_insn *insn)
618 rtx_insn *trial, *seq_insn, *prev;
619 rtx_sequence *seq;
620 rtx_insn_list *delay_list = 0;
621 int i;
622 int had_barrier = 0;
624 /* We first must find the insn containing the SEQUENCE with INSN in its
625 delay slot. Do this by finding an insn, TRIAL, where
626 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
628 for (trial = insn;
629 PREV_INSN (NEXT_INSN (trial)) == trial;
630 trial = NEXT_INSN (trial))
633 seq_insn = PREV_INSN (NEXT_INSN (trial));
634 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
636 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
637 had_barrier = 1;
639 /* Create a delay list consisting of all the insns other than the one
640 we are deleting (unless we were the only one). */
641 if (seq->len () > 2)
642 for (i = 1; i < seq->len (); i++)
643 if (seq->insn (i) != insn)
644 delay_list = add_to_delay_list (seq->insn (i), delay_list);
646 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
647 list, and rebuild the delay list if non-empty. */
648 prev = PREV_INSN (seq_insn);
649 trial = seq->insn (0);
650 delete_related_insns (seq_insn);
651 add_insn_after (trial, prev, NULL);
653 /* If there was a barrier after the old SEQUENCE, remit it. */
654 if (had_barrier)
655 emit_barrier_after (trial);
657 /* If there are any delay insns, remit them. Otherwise clear the
658 annul flag. */
659 if (delay_list)
660 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
661 else if (JUMP_P (trial))
662 INSN_ANNULLED_BRANCH_P (trial) = 0;
664 INSN_FROM_TARGET_P (insn) = 0;
666 /* Show we need to fill this insn again. */
667 obstack_ptr_grow (&unfilled_slots_obstack, trial);
669 return trial;
672 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
673 the insn that sets CC0 for it and delete it too. */
675 static void
676 delete_scheduled_jump (rtx_insn *insn)
678 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
679 delete the insn that sets the condition code, but it is hard to find it.
680 Since this case is rare anyway, don't bother trying; there would likely
681 be other insns that became dead anyway, which we wouldn't know to
682 delete. */
684 #ifdef HAVE_cc0
685 if (reg_mentioned_p (cc0_rtx, insn))
687 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
689 /* If a reg-note was found, it points to an insn to set CC0. This
690 insn is in the delay list of some other insn. So delete it from
691 the delay list it was in. */
692 if (note)
694 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
695 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
696 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
698 else
700 /* The insn setting CC0 is our previous insn, but it may be in
701 a delay slot. It will be the last insn in the delay slot, if
702 it is. */
703 rtx_insn *trial = previous_insn (insn);
704 if (NOTE_P (trial))
705 trial = prev_nonnote_insn (trial);
706 if (sets_cc0_p (PATTERN (trial)) != 1
707 || FIND_REG_INC_NOTE (trial, NULL_RTX))
708 return;
709 if (PREV_INSN (NEXT_INSN (trial)) == trial)
710 delete_related_insns (trial);
711 else
712 delete_from_delay_slot (trial);
715 #endif
717 delete_related_insns (insn);
720 /* Counters for delay-slot filling. */
722 #define NUM_REORG_FUNCTIONS 2
723 #define MAX_DELAY_HISTOGRAM 3
724 #define MAX_REORG_PASSES 2
726 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
728 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
730 static int reorg_pass_number;
732 static void
733 note_delay_statistics (int slots_filled, int index)
735 num_insns_needing_delays[index][reorg_pass_number]++;
736 if (slots_filled > MAX_DELAY_HISTOGRAM)
737 slots_filled = MAX_DELAY_HISTOGRAM;
738 num_filled_delays[index][slots_filled][reorg_pass_number]++;
741 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
743 /* Optimize the following cases:
745 1. When a conditional branch skips over only one instruction,
746 use an annulling branch and put that insn in the delay slot.
747 Use either a branch that annuls when the condition if true or
748 invert the test with a branch that annuls when the condition is
749 false. This saves insns, since otherwise we must copy an insn
750 from the L1 target.
752 (orig) (skip) (otherwise)
753 Bcc.n L1 Bcc',a L1 Bcc,a L1'
754 insn insn insn2
755 L1: L1: L1:
756 insn2 insn2 insn2
757 insn3 insn3 L1':
758 insn3
760 2. When a conditional branch skips over only one instruction,
761 and after that, it unconditionally branches somewhere else,
762 perform the similar optimization. This saves executing the
763 second branch in the case where the inverted condition is true.
765 Bcc.n L1 Bcc',a L2
766 insn insn
767 L1: L1:
768 Bra L2 Bra L2
770 INSN is a JUMP_INSN.
772 This should be expanded to skip over N insns, where N is the number
773 of delay slots required. */
775 static rtx_insn_list *
776 optimize_skip (rtx_insn *insn)
778 rtx_insn *trial = next_nonnote_insn (insn);
779 rtx_insn *next_trial = next_active_insn (trial);
780 rtx_insn_list *delay_list = 0;
781 int flags;
783 flags = get_jump_flags (insn, JUMP_LABEL (insn));
785 if (trial == 0
786 || !NONJUMP_INSN_P (trial)
787 || GET_CODE (PATTERN (trial)) == SEQUENCE
788 || recog_memoized (trial) < 0
789 || (! eligible_for_annul_false (insn, 0, trial, flags)
790 && ! eligible_for_annul_true (insn, 0, trial, flags))
791 || can_throw_internal (trial))
792 return 0;
794 /* There are two cases where we are just executing one insn (we assume
795 here that a branch requires only one insn; this should be generalized
796 at some point): Where the branch goes around a single insn or where
797 we have one insn followed by a branch to the same label we branch to.
798 In both of these cases, inverting the jump and annulling the delay
799 slot give the same effect in fewer insns. */
800 if (next_trial == next_active_insn (JUMP_LABEL (insn))
801 || (next_trial != 0
802 && simplejump_or_return_p (next_trial)
803 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
805 if (eligible_for_annul_false (insn, 0, trial, flags))
807 if (invert_jump (insn, JUMP_LABEL (insn), 1))
808 INSN_FROM_TARGET_P (trial) = 1;
809 else if (! eligible_for_annul_true (insn, 0, trial, flags))
810 return 0;
813 delay_list = add_to_delay_list (trial, NULL);
814 next_trial = next_active_insn (trial);
815 update_block (trial, trial);
816 delete_related_insns (trial);
818 /* Also, if we are targeting an unconditional
819 branch, thread our jump to the target of that branch. Don't
820 change this into a RETURN here, because it may not accept what
821 we have in the delay slot. We'll fix this up later. */
822 if (next_trial && simplejump_or_return_p (next_trial))
824 rtx target_label = JUMP_LABEL (next_trial);
825 if (ANY_RETURN_P (target_label))
826 target_label = find_end_label (target_label);
828 if (target_label)
830 /* Recompute the flags based on TARGET_LABEL since threading
831 the jump to TARGET_LABEL may change the direction of the
832 jump (which may change the circumstances in which the
833 delay slot is nullified). */
834 flags = get_jump_flags (insn, target_label);
835 if (eligible_for_annul_true (insn, 0, trial, flags))
836 reorg_redirect_jump (insn, target_label);
840 INSN_ANNULLED_BRANCH_P (insn) = 1;
843 return delay_list;
845 #endif
847 /* Encode and return branch direction and prediction information for
848 INSN assuming it will jump to LABEL.
850 Non conditional branches return no direction information and
851 are predicted as very likely taken. */
853 static int
854 get_jump_flags (const rtx_insn *insn, rtx label)
856 int flags;
858 /* get_jump_flags can be passed any insn with delay slots, these may
859 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
860 direction information, and only if they are conditional jumps.
862 If LABEL is a return, then there is no way to determine the branch
863 direction. */
864 if (JUMP_P (insn)
865 && (condjump_p (insn) || condjump_in_parallel_p (insn))
866 && !ANY_RETURN_P (label)
867 && INSN_UID (insn) <= max_uid
868 && INSN_UID (label) <= max_uid)
869 flags
870 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
871 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
872 /* No valid direction information. */
873 else
874 flags = 0;
876 return flags;
879 /* Return truth value of the statement that this branch
880 is mostly taken. If we think that the branch is extremely likely
881 to be taken, we return 2. If the branch is slightly more likely to be
882 taken, return 1. If the branch is slightly less likely to be taken,
883 return 0 and if the branch is highly unlikely to be taken, return -1. */
885 static int
886 mostly_true_jump (rtx jump_insn)
888 /* If branch probabilities are available, then use that number since it
889 always gives a correct answer. */
890 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
891 if (note)
893 int prob = XINT (note, 0);
895 if (prob >= REG_BR_PROB_BASE * 9 / 10)
896 return 2;
897 else if (prob >= REG_BR_PROB_BASE / 2)
898 return 1;
899 else if (prob >= REG_BR_PROB_BASE / 10)
900 return 0;
901 else
902 return -1;
905 /* If there is no note, assume branches are not taken.
906 This should be rare. */
907 return 0;
910 /* Return the condition under which INSN will branch to TARGET. If TARGET
911 is zero, return the condition under which INSN will return. If INSN is
912 an unconditional branch, return const_true_rtx. If INSN isn't a simple
913 type of jump, or it doesn't go to TARGET, return 0. */
915 static rtx
916 get_branch_condition (const rtx_insn *insn, rtx target)
918 rtx pat = PATTERN (insn);
919 rtx src;
921 if (condjump_in_parallel_p (insn))
922 pat = XVECEXP (pat, 0, 0);
924 if (ANY_RETURN_P (pat) && pat == target)
925 return const_true_rtx;
927 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
928 return 0;
930 src = SET_SRC (pat);
931 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
932 return const_true_rtx;
934 else if (GET_CODE (src) == IF_THEN_ELSE
935 && XEXP (src, 2) == pc_rtx
936 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
937 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
938 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
939 return XEXP (src, 0);
941 else if (GET_CODE (src) == IF_THEN_ELSE
942 && XEXP (src, 1) == pc_rtx
943 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
944 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
945 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
947 enum rtx_code rev;
948 rev = reversed_comparison_code (XEXP (src, 0), insn);
949 if (rev != UNKNOWN)
950 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
951 XEXP (XEXP (src, 0), 0),
952 XEXP (XEXP (src, 0), 1));
955 return 0;
958 /* Return nonzero if CONDITION is more strict than the condition of
959 INSN, i.e., if INSN will always branch if CONDITION is true. */
961 static int
962 condition_dominates_p (rtx condition, const rtx_insn *insn)
964 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
965 enum rtx_code code = GET_CODE (condition);
966 enum rtx_code other_code;
968 if (rtx_equal_p (condition, other_condition)
969 || other_condition == const_true_rtx)
970 return 1;
972 else if (condition == const_true_rtx || other_condition == 0)
973 return 0;
975 other_code = GET_CODE (other_condition);
976 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
977 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
978 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
979 return 0;
981 return comparison_dominates_p (code, other_code);
984 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
985 any insns already in the delay slot of JUMP. */
987 static int
988 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
990 int flags, i;
991 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
993 /* Make sure all the delay slots of this jump would still
994 be valid after threading the jump. If they are still
995 valid, then return nonzero. */
997 flags = get_jump_flags (jump, newlabel);
998 for (i = 1; i < pat->len (); i++)
999 if (! (
1000 #ifdef ANNUL_IFFALSE_SLOTS
1001 (INSN_ANNULLED_BRANCH_P (jump)
1002 && INSN_FROM_TARGET_P (pat->insn (i)))
1003 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
1004 #endif
1005 #ifdef ANNUL_IFTRUE_SLOTS
1006 (INSN_ANNULLED_BRANCH_P (jump)
1007 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1008 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1009 #endif
1010 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1011 break;
1013 return (i == pat->len ());
1016 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1017 any insns we wish to place in the delay slot of JUMP. */
1019 static int
1020 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1021 rtx_insn_list *delay_list)
1023 int flags, i;
1024 rtx_insn_list *li;
1026 /* Make sure all the insns in DELAY_LIST would still be
1027 valid after threading the jump. If they are still
1028 valid, then return nonzero. */
1030 flags = get_jump_flags (jump, newlabel);
1031 for (li = delay_list, i = 0; li; li = li->next (), i++)
1032 if (! (
1033 #ifdef ANNUL_IFFALSE_SLOTS
1034 (INSN_ANNULLED_BRANCH_P (jump)
1035 && INSN_FROM_TARGET_P (li->insn ()))
1036 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1037 #endif
1038 #ifdef ANNUL_IFTRUE_SLOTS
1039 (INSN_ANNULLED_BRANCH_P (jump)
1040 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1041 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1042 #endif
1043 eligible_for_delay (jump, i, li->insn (), flags)))
1044 break;
1046 return (li == NULL);
1049 /* DELAY_LIST is a list of insns that have already been placed into delay
1050 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1051 If not, return 0; otherwise return 1. */
1053 static int
1054 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1056 rtx temp;
1058 if (delay_list)
1060 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1062 rtx trial = XEXP (temp, 0);
1064 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1065 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1066 return 0;
1070 return 1;
1073 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1074 the condition tested by INSN is CONDITION and the resources shown in
1075 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1076 from SEQ's delay list, in addition to whatever insns it may execute
1077 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1078 needed while searching for delay slot insns. Return the concatenated
1079 delay list if possible, otherwise, return 0.
1081 SLOTS_TO_FILL is the total number of slots required by INSN, and
1082 PSLOTS_FILLED points to the number filled so far (also the number of
1083 insns in DELAY_LIST). It is updated with the number that have been
1084 filled from the SEQUENCE, if any.
1086 PANNUL_P points to a nonzero value if we already know that we need
1087 to annul INSN. If this routine determines that annulling is needed,
1088 it may set that value nonzero.
1090 PNEW_THREAD points to a location that is to receive the place at which
1091 execution should continue. */
1093 static rtx_insn_list *
1094 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1095 rtx_insn_list *delay_list, struct resources *sets,
1096 struct resources *needed,
1097 struct resources *other_needed,
1098 int slots_to_fill, int *pslots_filled,
1099 int *pannul_p, rtx *pnew_thread)
1101 int slots_remaining = slots_to_fill - *pslots_filled;
1102 int total_slots_filled = *pslots_filled;
1103 rtx_insn_list *new_delay_list = 0;
1104 int must_annul = *pannul_p;
1105 int used_annul = 0;
1106 int i;
1107 struct resources cc_set;
1108 bool *redundant;
1110 /* We can't do anything if there are more delay slots in SEQ than we
1111 can handle, or if we don't know that it will be a taken branch.
1112 We know that it will be a taken branch if it is either an unconditional
1113 branch or a conditional branch with a stricter branch condition.
1115 Also, exit if the branch has more than one set, since then it is computing
1116 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1117 ??? It may be possible to move other sets into INSN in addition to
1118 moving the instructions in the delay slots.
1120 We can not steal the delay list if one of the instructions in the
1121 current delay_list modifies the condition codes and the jump in the
1122 sequence is a conditional jump. We can not do this because we can
1123 not change the direction of the jump because the condition codes
1124 will effect the direction of the jump in the sequence. */
1126 CLEAR_RESOURCE (&cc_set);
1127 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1129 rtx_insn *trial = temp->insn ();
1131 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1132 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1133 return delay_list;
1136 if (XVECLEN (seq, 0) - 1 > slots_remaining
1137 || ! condition_dominates_p (condition, seq->insn (0))
1138 || ! single_set (seq->insn (0)))
1139 return delay_list;
1141 #ifdef MD_CAN_REDIRECT_BRANCH
1142 /* On some targets, branches with delay slots can have a limited
1143 displacement. Give the back end a chance to tell us we can't do
1144 this. */
1145 if (! MD_CAN_REDIRECT_BRANCH (insn, seq->insn (0)))
1146 return delay_list;
1147 #endif
1149 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1150 for (i = 1; i < seq->len (); i++)
1152 rtx_insn *trial = seq->insn (i);
1153 int flags;
1155 if (insn_references_resource_p (trial, sets, false)
1156 || insn_sets_resource_p (trial, needed, false)
1157 || insn_sets_resource_p (trial, sets, false)
1158 #ifdef HAVE_cc0
1159 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1160 delay list. */
1161 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1162 #endif
1163 /* If TRIAL is from the fallthrough code of an annulled branch insn
1164 in SEQ, we cannot use it. */
1165 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1166 && ! INSN_FROM_TARGET_P (trial)))
1167 return delay_list;
1169 /* If this insn was already done (usually in a previous delay slot),
1170 pretend we put it in our delay slot. */
1171 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1172 if (redundant[i])
1173 continue;
1175 /* We will end up re-vectoring this branch, so compute flags
1176 based on jumping to the new label. */
1177 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1179 if (! must_annul
1180 && ((condition == const_true_rtx
1181 || (! insn_sets_resource_p (trial, other_needed, false)
1182 && ! may_trap_or_fault_p (PATTERN (trial)))))
1183 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1184 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1185 && (must_annul = 1,
1186 check_annul_list_true_false (0, delay_list)
1187 && check_annul_list_true_false (0, new_delay_list)
1188 && eligible_for_annul_false (insn, total_slots_filled,
1189 trial, flags)))
1191 if (must_annul)
1192 used_annul = 1;
1193 rtx_insn *temp = copy_delay_slot_insn (trial);
1194 INSN_FROM_TARGET_P (temp) = 1;
1195 new_delay_list = add_to_delay_list (temp, new_delay_list);
1196 total_slots_filled++;
1198 if (--slots_remaining == 0)
1199 break;
1201 else
1202 return delay_list;
1205 /* Record the effect of the instructions that were redundant and which
1206 we therefore decided not to copy. */
1207 for (i = 1; i < seq->len (); i++)
1208 if (redundant[i])
1209 update_block (seq->insn (i), insn);
1211 /* Show the place to which we will be branching. */
1212 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1214 /* Add any new insns to the delay list and update the count of the
1215 number of slots filled. */
1216 *pslots_filled = total_slots_filled;
1217 if (used_annul)
1218 *pannul_p = 1;
1220 if (delay_list == 0)
1221 return new_delay_list;
1223 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1224 delay_list = add_to_delay_list (temp->insn (), delay_list);
1226 return delay_list;
1229 /* Similar to steal_delay_list_from_target except that SEQ is on the
1230 fallthrough path of INSN. Here we only do something if the delay insn
1231 of SEQ is an unconditional branch. In that case we steal its delay slot
1232 for INSN since unconditional branches are much easier to fill. */
1234 static rtx_insn_list *
1235 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1236 rtx_sequence *seq,
1237 rtx_insn_list *delay_list,
1238 struct resources *sets,
1239 struct resources *needed,
1240 struct resources *other_needed,
1241 int slots_to_fill, int *pslots_filled,
1242 int *pannul_p)
1244 int i;
1245 int flags;
1246 int must_annul = *pannul_p;
1247 int used_annul = 0;
1249 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1251 /* We can't do anything if SEQ's delay insn isn't an
1252 unconditional branch. */
1254 if (! simplejump_or_return_p (seq->insn (0)))
1255 return delay_list;
1257 for (i = 1; i < seq->len (); i++)
1259 rtx_insn *trial = seq->insn (i);
1261 /* If TRIAL sets CC0, stealing it will move it too far from the use
1262 of CC0. */
1263 if (insn_references_resource_p (trial, sets, false)
1264 || insn_sets_resource_p (trial, needed, false)
1265 || insn_sets_resource_p (trial, sets, false)
1266 #ifdef HAVE_cc0
1267 || sets_cc0_p (PATTERN (trial))
1268 #endif
1271 break;
1273 /* If this insn was already done, we don't need it. */
1274 if (redundant_insn (trial, insn, delay_list))
1276 update_block (trial, insn);
1277 delete_from_delay_slot (trial);
1278 continue;
1281 if (! must_annul
1282 && ((condition == const_true_rtx
1283 || (! insn_sets_resource_p (trial, other_needed, false)
1284 && ! may_trap_or_fault_p (PATTERN (trial)))))
1285 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1286 : (must_annul || delay_list == NULL) && (must_annul = 1,
1287 check_annul_list_true_false (1, delay_list)
1288 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1290 if (must_annul)
1291 used_annul = 1;
1292 delete_from_delay_slot (trial);
1293 delay_list = add_to_delay_list (trial, delay_list);
1295 if (++(*pslots_filled) == slots_to_fill)
1296 break;
1298 else
1299 break;
1302 if (used_annul)
1303 *pannul_p = 1;
1304 return delay_list;
1307 /* Try merging insns starting at THREAD which match exactly the insns in
1308 INSN's delay list.
1310 If all insns were matched and the insn was previously annulling, the
1311 annul bit will be cleared.
1313 For each insn that is merged, if the branch is or will be non-annulling,
1314 we delete the merged insn. */
1316 static void
1317 try_merge_delay_insns (rtx insn, rtx_insn *thread)
1319 rtx_insn *trial, *next_trial;
1320 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1321 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1322 int slot_number = 1;
1323 int num_slots = XVECLEN (PATTERN (insn), 0);
1324 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1325 struct resources set, needed;
1326 rtx_insn_list *merged_insns = 0;
1327 int i;
1328 int flags;
1330 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1332 CLEAR_RESOURCE (&needed);
1333 CLEAR_RESOURCE (&set);
1335 /* If this is not an annulling branch, take into account anything needed in
1336 INSN's delay slot. This prevents two increments from being incorrectly
1337 folded into one. If we are annulling, this would be the correct
1338 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1339 will essentially disable this optimization. This method is somewhat of
1340 a kludge, but I don't see a better way.) */
1341 if (! annul_p)
1342 for (i = 1 ; i < num_slots; i++)
1343 if (XVECEXP (PATTERN (insn), 0, i))
1344 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1345 true);
1347 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1349 rtx pat = PATTERN (trial);
1350 rtx oldtrial = trial;
1352 next_trial = next_nonnote_insn (trial);
1354 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1355 if (NONJUMP_INSN_P (trial)
1356 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1357 continue;
1359 if (GET_CODE (next_to_match) == GET_CODE (trial)
1360 #ifdef HAVE_cc0
1361 /* We can't share an insn that sets cc0. */
1362 && ! sets_cc0_p (pat)
1363 #endif
1364 && ! insn_references_resource_p (trial, &set, true)
1365 && ! insn_sets_resource_p (trial, &set, true)
1366 && ! insn_sets_resource_p (trial, &needed, true)
1367 && (trial = try_split (pat, trial, 0)) != 0
1368 /* Update next_trial, in case try_split succeeded. */
1369 && (next_trial = next_nonnote_insn (trial))
1370 /* Likewise THREAD. */
1371 && (thread = oldtrial == thread ? trial : thread)
1372 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1373 /* Have to test this condition if annul condition is different
1374 from (and less restrictive than) non-annulling one. */
1375 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1378 if (! annul_p)
1380 update_block (trial, thread);
1381 if (trial == thread)
1382 thread = next_active_insn (thread);
1384 delete_related_insns (trial);
1385 INSN_FROM_TARGET_P (next_to_match) = 0;
1387 else
1388 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1390 if (++slot_number == num_slots)
1391 break;
1393 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1396 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1397 mark_referenced_resources (trial, &needed, true);
1400 /* See if we stopped on a filled insn. If we did, try to see if its
1401 delay slots match. */
1402 if (slot_number != num_slots
1403 && trial && NONJUMP_INSN_P (trial)
1404 && GET_CODE (PATTERN (trial)) == SEQUENCE
1405 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1406 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1408 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1409 rtx filled_insn = XVECEXP (pat, 0, 0);
1411 /* Account for resources set/needed by the filled insn. */
1412 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1413 mark_referenced_resources (filled_insn, &needed, true);
1415 for (i = 1; i < pat->len (); i++)
1417 rtx_insn *dtrial = pat->insn (i);
1419 if (! insn_references_resource_p (dtrial, &set, true)
1420 && ! insn_sets_resource_p (dtrial, &set, true)
1421 && ! insn_sets_resource_p (dtrial, &needed, true)
1422 #ifdef HAVE_cc0
1423 && ! sets_cc0_p (PATTERN (dtrial))
1424 #endif
1425 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1426 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1428 if (! annul_p)
1430 rtx_insn *new_rtx;
1432 update_block (dtrial, thread);
1433 new_rtx = delete_from_delay_slot (dtrial);
1434 if (thread->deleted ())
1435 thread = new_rtx;
1436 INSN_FROM_TARGET_P (next_to_match) = 0;
1438 else
1439 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1440 merged_insns);
1442 if (++slot_number == num_slots)
1443 break;
1445 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1447 else
1449 /* Keep track of the set/referenced resources for the delay
1450 slots of any trial insns we encounter. */
1451 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1452 mark_referenced_resources (dtrial, &needed, true);
1457 /* If all insns in the delay slot have been matched and we were previously
1458 annulling the branch, we need not any more. In that case delete all the
1459 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1460 the delay list so that we know that it isn't only being used at the
1461 target. */
1462 if (slot_number == num_slots && annul_p)
1464 for (; merged_insns; merged_insns = merged_insns->next ())
1466 if (GET_MODE (merged_insns) == SImode)
1468 rtx_insn *new_rtx;
1470 update_block (merged_insns->insn (), thread);
1471 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1472 if (thread->deleted ())
1473 thread = new_rtx;
1475 else
1477 update_block (merged_insns->insn (), thread);
1478 delete_related_insns (merged_insns->insn ());
1482 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1484 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1485 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1489 /* See if INSN is redundant with an insn in front of TARGET. Often this
1490 is called when INSN is a candidate for a delay slot of TARGET.
1491 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1492 of INSN. Often INSN will be redundant with an insn in a delay slot of
1493 some previous insn. This happens when we have a series of branches to the
1494 same label; in that case the first insn at the target might want to go
1495 into each of the delay slots.
1497 If we are not careful, this routine can take up a significant fraction
1498 of the total compilation time (4%), but only wins rarely. Hence we
1499 speed this routine up by making two passes. The first pass goes back
1500 until it hits a label and sees if it finds an insn with an identical
1501 pattern. Only in this (relatively rare) event does it check for
1502 data conflicts.
1504 We do not split insns we encounter. This could cause us not to find a
1505 redundant insn, but the cost of splitting seems greater than the possible
1506 gain in rare cases. */
1508 static rtx
1509 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1511 rtx target_main = target;
1512 rtx ipat = PATTERN (insn);
1513 rtx_insn *trial;
1514 rtx pat;
1515 struct resources needed, set;
1516 int i;
1517 unsigned insns_to_search;
1519 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1520 are allowed to not actually assign to such a register. */
1521 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1522 return 0;
1524 /* Scan backwards looking for a match. */
1525 for (trial = PREV_INSN (target),
1526 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1527 trial && insns_to_search > 0;
1528 trial = PREV_INSN (trial))
1530 /* (use (insn))s can come immediately after a barrier if the
1531 label that used to precede them has been deleted as dead.
1532 See delete_related_insns. */
1533 if (LABEL_P (trial) || BARRIER_P (trial))
1534 return 0;
1536 if (!INSN_P (trial))
1537 continue;
1538 --insns_to_search;
1540 pat = PATTERN (trial);
1541 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1542 continue;
1544 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1546 /* Stop for a CALL and its delay slots because it is difficult to
1547 track its resource needs correctly. */
1548 if (CALL_P (seq->element (0)))
1549 return 0;
1551 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1552 slots because it is difficult to track its resource needs
1553 correctly. */
1555 #ifdef INSN_SETS_ARE_DELAYED
1556 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1557 return 0;
1558 #endif
1560 #ifdef INSN_REFERENCES_ARE_DELAYED
1561 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1562 return 0;
1563 #endif
1565 /* See if any of the insns in the delay slot match, updating
1566 resource requirements as we go. */
1567 for (i = seq->len () - 1; i > 0; i--)
1568 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1569 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1570 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1571 break;
1573 /* If found a match, exit this loop early. */
1574 if (i > 0)
1575 break;
1578 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1579 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1580 break;
1583 /* If we didn't find an insn that matches, return 0. */
1584 if (trial == 0)
1585 return 0;
1587 /* See what resources this insn sets and needs. If they overlap, or
1588 if this insn references CC0, it can't be redundant. */
1590 CLEAR_RESOURCE (&needed);
1591 CLEAR_RESOURCE (&set);
1592 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1593 mark_referenced_resources (insn, &needed, true);
1595 /* If TARGET is a SEQUENCE, get the main insn. */
1596 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1597 target_main = XVECEXP (PATTERN (target), 0, 0);
1599 if (resource_conflicts_p (&needed, &set)
1600 #ifdef HAVE_cc0
1601 || reg_mentioned_p (cc0_rtx, ipat)
1602 #endif
1603 /* The insn requiring the delay may not set anything needed or set by
1604 INSN. */
1605 || insn_sets_resource_p (target_main, &needed, true)
1606 || insn_sets_resource_p (target_main, &set, true))
1607 return 0;
1609 /* Insns we pass may not set either NEEDED or SET, so merge them for
1610 simpler tests. */
1611 needed.memory |= set.memory;
1612 IOR_HARD_REG_SET (needed.regs, set.regs);
1614 /* This insn isn't redundant if it conflicts with an insn that either is
1615 or will be in a delay slot of TARGET. */
1617 while (delay_list)
1619 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1620 return 0;
1621 delay_list = XEXP (delay_list, 1);
1624 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1625 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1626 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1627 true))
1628 return 0;
1630 /* Scan backwards until we reach a label or an insn that uses something
1631 INSN sets or sets something insn uses or sets. */
1633 for (trial = PREV_INSN (target),
1634 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1635 trial && !LABEL_P (trial) && insns_to_search > 0;
1636 trial = PREV_INSN (trial))
1638 if (!INSN_P (trial))
1639 continue;
1640 --insns_to_search;
1642 pat = PATTERN (trial);
1643 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1644 continue;
1646 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1648 bool annul_p = false;
1649 rtx_insn *control = seq->insn (0);
1651 /* If this is a CALL_INSN and its delay slots, it is hard to track
1652 the resource needs properly, so give up. */
1653 if (CALL_P (control))
1654 return 0;
1656 /* If this is an INSN or JUMP_INSN with delayed effects, it
1657 is hard to track the resource needs properly, so give up. */
1659 #ifdef INSN_SETS_ARE_DELAYED
1660 if (INSN_SETS_ARE_DELAYED (control))
1661 return 0;
1662 #endif
1664 #ifdef INSN_REFERENCES_ARE_DELAYED
1665 if (INSN_REFERENCES_ARE_DELAYED (control))
1666 return 0;
1667 #endif
1669 if (JUMP_P (control))
1670 annul_p = INSN_ANNULLED_BRANCH_P (control);
1672 /* See if any of the insns in the delay slot match, updating
1673 resource requirements as we go. */
1674 for (i = seq->len () - 1; i > 0; i--)
1676 rtx candidate = seq->element (i);
1678 /* If an insn will be annulled if the branch is false, it isn't
1679 considered as a possible duplicate insn. */
1680 if (rtx_equal_p (PATTERN (candidate), ipat)
1681 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1683 /* Show that this insn will be used in the sequel. */
1684 INSN_FROM_TARGET_P (candidate) = 0;
1685 return candidate;
1688 /* Unless this is an annulled insn from the target of a branch,
1689 we must stop if it sets anything needed or set by INSN. */
1690 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1691 && insn_sets_resource_p (candidate, &needed, true))
1692 return 0;
1695 /* If the insn requiring the delay slot conflicts with INSN, we
1696 must stop. */
1697 if (insn_sets_resource_p (control, &needed, true))
1698 return 0;
1700 else
1702 /* See if TRIAL is the same as INSN. */
1703 pat = PATTERN (trial);
1704 if (rtx_equal_p (pat, ipat))
1705 return trial;
1707 /* Can't go any further if TRIAL conflicts with INSN. */
1708 if (insn_sets_resource_p (trial, &needed, true))
1709 return 0;
1713 return 0;
1716 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1717 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1718 is nonzero, we are allowed to fall into this thread; otherwise, we are
1719 not.
1721 If LABEL is used more than one or we pass a label other than LABEL before
1722 finding an active insn, we do not own this thread. */
1724 static int
1725 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1727 rtx_insn *active_insn;
1728 rtx_insn *insn;
1730 /* We don't own the function end. */
1731 if (thread == 0 || ANY_RETURN_P (thread))
1732 return 0;
1734 /* We have a non-NULL insn. */
1735 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1737 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1738 active_insn = next_active_insn (PREV_INSN (thread_insn));
1740 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1741 if (LABEL_P (insn)
1742 && (insn != label || LABEL_NUSES (insn) != 1))
1743 return 0;
1745 if (allow_fallthrough)
1746 return 1;
1748 /* Ensure that we reach a BARRIER before any insn or label. */
1749 for (insn = prev_nonnote_insn (thread_insn);
1750 insn == 0 || !BARRIER_P (insn);
1751 insn = prev_nonnote_insn (insn))
1752 if (insn == 0
1753 || LABEL_P (insn)
1754 || (NONJUMP_INSN_P (insn)
1755 && GET_CODE (PATTERN (insn)) != USE
1756 && GET_CODE (PATTERN (insn)) != CLOBBER))
1757 return 0;
1759 return 1;
1762 /* Called when INSN is being moved from a location near the target of a jump.
1763 We leave a marker of the form (use (INSN)) immediately in front
1764 of WHERE for mark_target_live_regs. These markers will be deleted when
1765 reorg finishes.
1767 We used to try to update the live status of registers if WHERE is at
1768 the start of a basic block, but that can't work since we may remove a
1769 BARRIER in relax_delay_slots. */
1771 static void
1772 update_block (rtx_insn *insn, rtx where)
1774 /* Ignore if this was in a delay slot and it came from the target of
1775 a branch. */
1776 if (INSN_FROM_TARGET_P (insn))
1777 return;
1779 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1781 /* INSN might be making a value live in a block where it didn't use to
1782 be. So recompute liveness information for this block. */
1784 incr_ticks_for_insn (insn);
1787 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1788 the basic block containing the jump. */
1790 static int
1791 reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
1793 incr_ticks_for_insn (jump);
1794 return redirect_jump (jump, nlabel, 1);
1797 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1798 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1799 that reference values used in INSN. If we find one, then we move the
1800 REG_DEAD note to INSN.
1802 This is needed to handle the case where a later insn (after INSN) has a
1803 REG_DEAD note for a register used by INSN, and this later insn subsequently
1804 gets moved before a CODE_LABEL because it is a redundant insn. In this
1805 case, mark_target_live_regs may be confused into thinking the register
1806 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1808 static void
1809 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1811 rtx p, link, next;
1813 for (p = next_nonnote_insn (insn); p != delayed_insn;
1814 p = next_nonnote_insn (p))
1815 for (link = REG_NOTES (p); link; link = next)
1817 next = XEXP (link, 1);
1819 if (REG_NOTE_KIND (link) != REG_DEAD
1820 || !REG_P (XEXP (link, 0)))
1821 continue;
1823 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1825 /* Move the REG_DEAD note from P to INSN. */
1826 remove_note (p, link);
1827 XEXP (link, 1) = REG_NOTES (insn);
1828 REG_NOTES (insn) = link;
1833 /* Called when an insn redundant with start_insn is deleted. If there
1834 is a REG_DEAD note for the target of start_insn between start_insn
1835 and stop_insn, then the REG_DEAD note needs to be deleted since the
1836 value no longer dies there.
1838 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1839 confused into thinking the register is dead. */
1841 static void
1842 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1844 rtx p, link, next;
1846 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1847 p = next_nonnote_insn (p))
1848 for (link = REG_NOTES (p); link; link = next)
1850 next = XEXP (link, 1);
1852 if (REG_NOTE_KIND (link) != REG_DEAD
1853 || !REG_P (XEXP (link, 0)))
1854 continue;
1856 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1858 remove_note (p, link);
1859 return;
1864 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1866 This handles the case of udivmodXi4 instructions which optimize their
1867 output depending on whether any REG_UNUSED notes are present.
1868 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1869 does. */
1871 static void
1872 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1874 rtx link, next;
1876 for (link = REG_NOTES (insn); link; link = next)
1878 next = XEXP (link, 1);
1880 if (REG_NOTE_KIND (link) != REG_UNUSED
1881 || !REG_P (XEXP (link, 0)))
1882 continue;
1884 if (! find_regno_note (redundant_insn, REG_UNUSED,
1885 REGNO (XEXP (link, 0))))
1886 remove_note (insn, link);
1890 static vec <rtx> sibling_labels;
1892 /* Return the label before INSN, or put a new label there. If SIBLING is
1893 non-zero, it is another label associated with the new label (if any),
1894 typically the former target of the jump that will be redirected to
1895 the new label. */
1897 static rtx_insn *
1898 get_label_before (rtx_insn *insn, rtx sibling)
1900 rtx_insn *label;
1902 /* Find an existing label at this point
1903 or make a new one if there is none. */
1904 label = prev_nonnote_insn (insn);
1906 if (label == 0 || !LABEL_P (label))
1908 rtx_insn *prev = PREV_INSN (insn);
1910 label = gen_label_rtx ();
1911 emit_label_after (label, prev);
1912 LABEL_NUSES (label) = 0;
1913 if (sibling)
1915 sibling_labels.safe_push (label);
1916 sibling_labels.safe_push (sibling);
1919 return label;
1922 /* Scan a function looking for insns that need a delay slot and find insns to
1923 put into the delay slot.
1925 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1926 as calls). We do these first since we don't want jump insns (that are
1927 easier to fill) to get the only insns that could be used for non-jump insns.
1928 When it is zero, only try to fill JUMP_INSNs.
1930 When slots are filled in this manner, the insns (including the
1931 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1932 it is possible to tell whether a delay slot has really been filled
1933 or not. `final' knows how to deal with this, by communicating
1934 through FINAL_SEQUENCE. */
1936 static void
1937 fill_simple_delay_slots (int non_jumps_p)
1939 rtx_insn *insn, *trial, *next_trial;
1940 rtx pat;
1941 int i;
1942 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1943 struct resources needed, set;
1944 int slots_to_fill, slots_filled;
1945 rtx_insn_list *delay_list;
1947 for (i = 0; i < num_unfilled_slots; i++)
1949 int flags;
1950 /* Get the next insn to fill. If it has already had any slots assigned,
1951 we can't do anything with it. Maybe we'll improve this later. */
1953 insn = unfilled_slots_base[i];
1954 if (insn == 0
1955 || insn->deleted ()
1956 || (NONJUMP_INSN_P (insn)
1957 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1958 || (JUMP_P (insn) && non_jumps_p)
1959 || (!JUMP_P (insn) && ! non_jumps_p))
1960 continue;
1962 /* It may have been that this insn used to need delay slots, but
1963 now doesn't; ignore in that case. This can happen, for example,
1964 on the HP PA RISC, where the number of delay slots depends on
1965 what insns are nearby. */
1966 slots_to_fill = num_delay_slots (insn);
1968 /* Some machine description have defined instructions to have
1969 delay slots only in certain circumstances which may depend on
1970 nearby insns (which change due to reorg's actions).
1972 For example, the PA port normally has delay slots for unconditional
1973 jumps.
1975 However, the PA port claims such jumps do not have a delay slot
1976 if they are immediate successors of certain CALL_INSNs. This
1977 allows the port to favor filling the delay slot of the call with
1978 the unconditional jump. */
1979 if (slots_to_fill == 0)
1980 continue;
1982 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1983 says how many. After initialization, first try optimizing
1985 call _foo call _foo
1986 nop add %o7,.-L1,%o7
1987 b,a L1
1990 If this case applies, the delay slot of the call is filled with
1991 the unconditional jump. This is done first to avoid having the
1992 delay slot of the call filled in the backward scan. Also, since
1993 the unconditional jump is likely to also have a delay slot, that
1994 insn must exist when it is subsequently scanned.
1996 This is tried on each insn with delay slots as some machines
1997 have insns which perform calls, but are not represented as
1998 CALL_INSNs. */
2000 slots_filled = 0;
2001 delay_list = 0;
2003 if (JUMP_P (insn))
2004 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2005 else
2006 flags = get_jump_flags (insn, NULL_RTX);
2008 if ((trial = next_active_insn (insn))
2009 && JUMP_P (trial)
2010 && simplejump_p (trial)
2011 && eligible_for_delay (insn, slots_filled, trial, flags)
2012 && no_labels_between_p (insn, trial)
2013 && ! can_throw_internal (trial))
2015 rtx_insn **tmp;
2016 slots_filled++;
2017 delay_list = add_to_delay_list (trial, delay_list);
2019 /* TRIAL may have had its delay slot filled, then unfilled. When
2020 the delay slot is unfilled, TRIAL is placed back on the unfilled
2021 slots obstack. Unfortunately, it is placed on the end of the
2022 obstack, not in its original location. Therefore, we must search
2023 from entry i + 1 to the end of the unfilled slots obstack to
2024 try and find TRIAL. */
2025 tmp = &unfilled_slots_base[i + 1];
2026 while (*tmp != trial && tmp != unfilled_slots_next)
2027 tmp++;
2029 /* Remove the unconditional jump from consideration for delay slot
2030 filling and unthread it. */
2031 if (*tmp == trial)
2032 *tmp = 0;
2034 rtx_insn *next = NEXT_INSN (trial);
2035 rtx_insn *prev = PREV_INSN (trial);
2036 if (prev)
2037 SET_NEXT_INSN (prev) = next;
2038 if (next)
2039 SET_PREV_INSN (next) = prev;
2043 /* Now, scan backwards from the insn to search for a potential
2044 delay-slot candidate. Stop searching when a label or jump is hit.
2046 For each candidate, if it is to go into the delay slot (moved
2047 forward in execution sequence), it must not need or set any resources
2048 that were set by later insns and must not set any resources that
2049 are needed for those insns.
2051 The delay slot insn itself sets resources unless it is a call
2052 (in which case the called routine, not the insn itself, is doing
2053 the setting). */
2055 if (slots_filled < slots_to_fill)
2057 CLEAR_RESOURCE (&needed);
2058 CLEAR_RESOURCE (&set);
2059 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2060 mark_referenced_resources (insn, &needed, false);
2062 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2063 trial = next_trial)
2065 next_trial = prev_nonnote_insn (trial);
2067 /* This must be an INSN or CALL_INSN. */
2068 pat = PATTERN (trial);
2070 /* Stand-alone USE and CLOBBER are just for flow. */
2071 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2072 continue;
2074 /* Check for resource conflict first, to avoid unnecessary
2075 splitting. */
2076 if (! insn_references_resource_p (trial, &set, true)
2077 && ! insn_sets_resource_p (trial, &set, true)
2078 && ! insn_sets_resource_p (trial, &needed, true)
2079 #ifdef HAVE_cc0
2080 /* Can't separate set of cc0 from its use. */
2081 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2082 #endif
2083 && ! can_throw_internal (trial))
2085 trial = try_split (pat, trial, 1);
2086 next_trial = prev_nonnote_insn (trial);
2087 if (eligible_for_delay (insn, slots_filled, trial, flags))
2089 /* In this case, we are searching backward, so if we
2090 find insns to put on the delay list, we want
2091 to put them at the head, rather than the
2092 tail, of the list. */
2094 update_reg_dead_notes (trial, insn);
2095 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2096 trial, delay_list);
2097 update_block (trial, trial);
2098 delete_related_insns (trial);
2099 if (slots_to_fill == ++slots_filled)
2100 break;
2101 continue;
2105 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2106 mark_referenced_resources (trial, &needed, true);
2110 /* If all needed slots haven't been filled, we come here. */
2112 /* Try to optimize case of jumping around a single insn. */
2113 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2114 if (slots_filled != slots_to_fill
2115 && delay_list == 0
2116 && JUMP_P (insn)
2117 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2118 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2120 delay_list = optimize_skip (insn);
2121 if (delay_list)
2122 slots_filled += 1;
2124 #endif
2126 /* Try to get insns from beyond the insn needing the delay slot.
2127 These insns can neither set or reference resources set in insns being
2128 skipped, cannot set resources in the insn being skipped, and, if this
2129 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2130 call might not return).
2132 There used to be code which continued past the target label if
2133 we saw all uses of the target label. This code did not work,
2134 because it failed to account for some instructions which were
2135 both annulled and marked as from the target. This can happen as a
2136 result of optimize_skip. Since this code was redundant with
2137 fill_eager_delay_slots anyways, it was just deleted. */
2139 if (slots_filled != slots_to_fill
2140 /* If this instruction could throw an exception which is
2141 caught in the same function, then it's not safe to fill
2142 the delay slot with an instruction from beyond this
2143 point. For example, consider:
2145 int i = 2;
2147 try {
2148 f();
2149 i = 3;
2150 } catch (...) {}
2152 return i;
2154 Even though `i' is a local variable, we must be sure not
2155 to put `i = 3' in the delay slot if `f' might throw an
2156 exception.
2158 Presumably, we should also check to see if we could get
2159 back to this function via `setjmp'. */
2160 && ! can_throw_internal (insn)
2161 && !JUMP_P (insn))
2163 int maybe_never = 0;
2164 rtx pat, trial_delay;
2166 CLEAR_RESOURCE (&needed);
2167 CLEAR_RESOURCE (&set);
2168 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2169 mark_referenced_resources (insn, &needed, true);
2171 if (CALL_P (insn))
2172 maybe_never = 1;
2174 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2175 trial = next_trial)
2177 next_trial = next_nonnote_insn (trial);
2179 /* This must be an INSN or CALL_INSN. */
2180 pat = PATTERN (trial);
2182 /* Stand-alone USE and CLOBBER are just for flow. */
2183 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2184 continue;
2186 /* If this already has filled delay slots, get the insn needing
2187 the delay slots. */
2188 if (GET_CODE (pat) == SEQUENCE)
2189 trial_delay = XVECEXP (pat, 0, 0);
2190 else
2191 trial_delay = trial;
2193 /* Stop our search when seeing a jump. */
2194 if (JUMP_P (trial_delay))
2195 break;
2197 /* See if we have a resource problem before we try to split. */
2198 if (GET_CODE (pat) != SEQUENCE
2199 && ! insn_references_resource_p (trial, &set, true)
2200 && ! insn_sets_resource_p (trial, &set, true)
2201 && ! insn_sets_resource_p (trial, &needed, true)
2202 #ifdef HAVE_cc0
2203 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2204 #endif
2205 && ! (maybe_never && may_trap_or_fault_p (pat))
2206 && (trial = try_split (pat, trial, 0))
2207 && eligible_for_delay (insn, slots_filled, trial, flags)
2208 && ! can_throw_internal (trial))
2210 next_trial = next_nonnote_insn (trial);
2211 delay_list = add_to_delay_list (trial, delay_list);
2212 #ifdef HAVE_cc0
2213 if (reg_mentioned_p (cc0_rtx, pat))
2214 link_cc0_insns (trial);
2215 #endif
2216 delete_related_insns (trial);
2217 if (slots_to_fill == ++slots_filled)
2218 break;
2219 continue;
2222 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2223 mark_referenced_resources (trial, &needed, true);
2225 /* Ensure we don't put insns between the setting of cc and the
2226 comparison by moving a setting of cc into an earlier delay
2227 slot since these insns could clobber the condition code. */
2228 set.cc = 1;
2230 /* If this is a call, we might not get here. */
2231 if (CALL_P (trial_delay))
2232 maybe_never = 1;
2235 /* If there are slots left to fill and our search was stopped by an
2236 unconditional branch, try the insn at the branch target. We can
2237 redirect the branch if it works.
2239 Don't do this if the insn at the branch target is a branch. */
2240 if (slots_to_fill != slots_filled
2241 && trial
2242 && jump_to_label_p (trial)
2243 && simplejump_p (trial)
2244 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2245 && ! (NONJUMP_INSN_P (next_trial)
2246 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2247 && !JUMP_P (next_trial)
2248 && ! insn_references_resource_p (next_trial, &set, true)
2249 && ! insn_sets_resource_p (next_trial, &set, true)
2250 && ! insn_sets_resource_p (next_trial, &needed, true)
2251 #ifdef HAVE_cc0
2252 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2253 #endif
2254 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2255 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2256 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2257 && ! can_throw_internal (trial))
2259 /* See comment in relax_delay_slots about necessity of using
2260 next_real_insn here. */
2261 rtx_insn *new_label = next_real_insn (next_trial);
2263 if (new_label != 0)
2264 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2265 else
2266 new_label = find_end_label (simple_return_rtx);
2268 if (new_label)
2270 delay_list
2271 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2272 delay_list);
2273 slots_filled++;
2274 reorg_redirect_jump (trial, new_label);
2279 /* If this is an unconditional jump, then try to get insns from the
2280 target of the jump. */
2281 if (JUMP_P (insn)
2282 && simplejump_p (insn)
2283 && slots_filled != slots_to_fill)
2284 delay_list
2285 = fill_slots_from_thread (insn, const_true_rtx,
2286 next_active_insn (JUMP_LABEL (insn)),
2287 NULL, 1, 1,
2288 own_thread_p (JUMP_LABEL (insn),
2289 JUMP_LABEL (insn), 0),
2290 slots_to_fill, &slots_filled,
2291 delay_list);
2293 if (delay_list)
2294 unfilled_slots_base[i]
2295 = emit_delay_sequence (insn, delay_list, slots_filled);
2297 if (slots_to_fill == slots_filled)
2298 unfilled_slots_base[i] = 0;
2300 note_delay_statistics (slots_filled, 0);
2304 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2305 return the ultimate label reached by any such chain of jumps.
2306 Return a suitable return rtx if the chain ultimately leads to a
2307 return instruction.
2308 If LABEL is not followed by a jump, return LABEL.
2309 If the chain loops or we can't find end, return LABEL,
2310 since that tells caller to avoid changing the insn.
2311 If the returned label is obtained by following a crossing jump,
2312 set *CROSSING to true, otherwise set it to false. */
2314 static rtx
2315 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2317 rtx_insn *insn;
2318 rtx_insn *next;
2319 int depth;
2321 *crossing = false;
2322 if (ANY_RETURN_P (label))
2323 return label;
2325 rtx_insn *value = as_a <rtx_insn *> (label);
2327 for (depth = 0;
2328 (depth < 10
2329 && (insn = next_active_insn (value)) != 0
2330 && JUMP_P (insn)
2331 && JUMP_LABEL (insn) != NULL_RTX
2332 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2333 || ANY_RETURN_P (PATTERN (insn)))
2334 && (next = NEXT_INSN (insn))
2335 && BARRIER_P (next));
2336 depth++)
2338 rtx this_label_or_return = JUMP_LABEL (insn);
2340 /* If we have found a cycle, make the insn jump to itself. */
2341 if (this_label_or_return == label)
2342 return label;
2344 /* Cannot follow returns and cannot look through tablejumps. */
2345 if (ANY_RETURN_P (this_label_or_return))
2346 return this_label_or_return;
2348 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2349 if (NEXT_INSN (this_label)
2350 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2351 break;
2353 if (!targetm.can_follow_jump (jump, insn))
2354 break;
2355 if (!*crossing)
2356 *crossing = CROSSING_JUMP_P (jump);
2357 value = this_label;
2359 if (depth == 10)
2360 return label;
2361 return value;
2364 /* Try to find insns to place in delay slots.
2366 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2367 or is an unconditional branch if CONDITION is const_true_rtx.
2368 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2370 THREAD is a flow-of-control, either the insns to be executed if the
2371 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2373 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2374 to see if any potential delay slot insns set things needed there.
2376 LIKELY is nonzero if it is extremely likely that the branch will be
2377 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2378 end of a loop back up to the top.
2380 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2381 thread. I.e., it is the fallthrough code of our jump or the target of the
2382 jump when we are the only jump going there.
2384 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2385 case, we can only take insns from the head of the thread for our delay
2386 slot. We then adjust the jump to point after the insns we have taken. */
2388 static rtx_insn_list *
2389 fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return,
2390 rtx opposite_thread, int likely,
2391 int thread_if_true,
2392 int own_thread, int slots_to_fill,
2393 int *pslots_filled, rtx_insn_list *delay_list)
2395 rtx new_thread;
2396 struct resources opposite_needed, set, needed;
2397 rtx_insn *trial;
2398 int lose = 0;
2399 int must_annul = 0;
2400 int flags;
2402 /* Validate our arguments. */
2403 gcc_assert (condition != const_true_rtx || thread_if_true);
2404 gcc_assert (own_thread || thread_if_true);
2406 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2408 /* If our thread is the end of subroutine, we can't get any delay
2409 insns from that. */
2410 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2411 return delay_list;
2413 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2415 /* If this is an unconditional branch, nothing is needed at the
2416 opposite thread. Otherwise, compute what is needed there. */
2417 if (condition == const_true_rtx)
2418 CLEAR_RESOURCE (&opposite_needed);
2419 else
2420 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2422 /* If the insn at THREAD can be split, do it here to avoid having to
2423 update THREAD and NEW_THREAD if it is done in the loop below. Also
2424 initialize NEW_THREAD. */
2426 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2428 /* Scan insns at THREAD. We are looking for an insn that can be removed
2429 from THREAD (it neither sets nor references resources that were set
2430 ahead of it and it doesn't set anything needs by the insns ahead of
2431 it) and that either can be placed in an annulling insn or aren't
2432 needed at OPPOSITE_THREAD. */
2434 CLEAR_RESOURCE (&needed);
2435 CLEAR_RESOURCE (&set);
2437 /* If we do not own this thread, we must stop as soon as we find
2438 something that we can't put in a delay slot, since all we can do
2439 is branch into THREAD at a later point. Therefore, labels stop
2440 the search if this is not the `true' thread. */
2442 for (trial = thread;
2443 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2444 trial = next_nonnote_insn (trial))
2446 rtx pat, old_trial;
2448 /* If we have passed a label, we no longer own this thread. */
2449 if (LABEL_P (trial))
2451 own_thread = 0;
2452 continue;
2455 pat = PATTERN (trial);
2456 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2457 continue;
2459 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2460 don't separate or copy insns that set and use CC0. */
2461 if (! insn_references_resource_p (trial, &set, true)
2462 && ! insn_sets_resource_p (trial, &set, true)
2463 && ! insn_sets_resource_p (trial, &needed, true)
2464 #ifdef HAVE_cc0
2465 && ! (reg_mentioned_p (cc0_rtx, pat)
2466 && (! own_thread || ! sets_cc0_p (pat)))
2467 #endif
2468 && ! can_throw_internal (trial))
2470 rtx prior_insn;
2472 /* If TRIAL is redundant with some insn before INSN, we don't
2473 actually need to add it to the delay list; we can merely pretend
2474 we did. */
2475 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2477 fix_reg_dead_note (prior_insn, insn);
2478 if (own_thread)
2480 update_block (trial, thread);
2481 if (trial == thread)
2483 thread = next_active_insn (thread);
2484 if (new_thread == trial)
2485 new_thread = thread;
2488 delete_related_insns (trial);
2490 else
2492 update_reg_unused_notes (prior_insn, trial);
2493 new_thread = next_active_insn (trial);
2496 continue;
2499 /* There are two ways we can win: If TRIAL doesn't set anything
2500 needed at the opposite thread and can't trap, or if it can
2501 go into an annulled delay slot. */
2502 if (!must_annul
2503 && (condition == const_true_rtx
2504 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2505 && ! may_trap_or_fault_p (pat)
2506 && ! RTX_FRAME_RELATED_P (trial))))
2508 old_trial = trial;
2509 trial = try_split (pat, trial, 0);
2510 if (new_thread == old_trial)
2511 new_thread = trial;
2512 if (thread == old_trial)
2513 thread = trial;
2514 pat = PATTERN (trial);
2515 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2516 goto winner;
2518 else if (0
2519 #ifdef ANNUL_IFTRUE_SLOTS
2520 || ! thread_if_true
2521 #endif
2522 #ifdef ANNUL_IFFALSE_SLOTS
2523 || thread_if_true
2524 #endif
2527 old_trial = trial;
2528 trial = try_split (pat, trial, 0);
2529 if (new_thread == old_trial)
2530 new_thread = trial;
2531 if (thread == old_trial)
2532 thread = trial;
2533 pat = PATTERN (trial);
2534 if ((must_annul || delay_list == NULL) && (thread_if_true
2535 ? check_annul_list_true_false (0, delay_list)
2536 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2537 : check_annul_list_true_false (1, delay_list)
2538 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2540 rtx_insn *temp;
2542 must_annul = 1;
2543 winner:
2545 #ifdef HAVE_cc0
2546 if (reg_mentioned_p (cc0_rtx, pat))
2547 link_cc0_insns (trial);
2548 #endif
2550 /* If we own this thread, delete the insn. If this is the
2551 destination of a branch, show that a basic block status
2552 may have been updated. In any case, mark the new
2553 starting point of this thread. */
2554 if (own_thread)
2556 rtx note;
2558 update_block (trial, thread);
2559 if (trial == thread)
2561 thread = next_active_insn (thread);
2562 if (new_thread == trial)
2563 new_thread = thread;
2566 /* We are moving this insn, not deleting it. We must
2567 temporarily increment the use count on any referenced
2568 label lest it be deleted by delete_related_insns. */
2569 for (note = REG_NOTES (trial);
2570 note != NULL_RTX;
2571 note = XEXP (note, 1))
2572 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2573 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2575 /* REG_LABEL_OPERAND could be
2576 NOTE_INSN_DELETED_LABEL too. */
2577 if (LABEL_P (XEXP (note, 0)))
2578 LABEL_NUSES (XEXP (note, 0))++;
2579 else
2580 gcc_assert (REG_NOTE_KIND (note)
2581 == REG_LABEL_OPERAND);
2583 if (jump_to_label_p (trial))
2584 LABEL_NUSES (JUMP_LABEL (trial))++;
2586 delete_related_insns (trial);
2588 for (note = REG_NOTES (trial);
2589 note != NULL_RTX;
2590 note = XEXP (note, 1))
2591 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2592 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2594 /* REG_LABEL_OPERAND could be
2595 NOTE_INSN_DELETED_LABEL too. */
2596 if (LABEL_P (XEXP (note, 0)))
2597 LABEL_NUSES (XEXP (note, 0))--;
2598 else
2599 gcc_assert (REG_NOTE_KIND (note)
2600 == REG_LABEL_OPERAND);
2602 if (jump_to_label_p (trial))
2603 LABEL_NUSES (JUMP_LABEL (trial))--;
2605 else
2606 new_thread = next_active_insn (trial);
2608 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2609 if (thread_if_true)
2610 INSN_FROM_TARGET_P (temp) = 1;
2612 delay_list = add_to_delay_list (temp, delay_list);
2614 if (slots_to_fill == ++(*pslots_filled))
2616 /* Even though we have filled all the slots, we
2617 may be branching to a location that has a
2618 redundant insn. Skip any if so. */
2619 while (new_thread && ! own_thread
2620 && ! insn_sets_resource_p (new_thread, &set, true)
2621 && ! insn_sets_resource_p (new_thread, &needed,
2622 true)
2623 && ! insn_references_resource_p (new_thread,
2624 &set, true)
2625 && (prior_insn
2626 = redundant_insn (new_thread, insn,
2627 delay_list)))
2629 /* We know we do not own the thread, so no need
2630 to call update_block and delete_insn. */
2631 fix_reg_dead_note (prior_insn, insn);
2632 update_reg_unused_notes (prior_insn, new_thread);
2633 new_thread = next_active_insn (new_thread);
2635 break;
2638 continue;
2643 /* This insn can't go into a delay slot. */
2644 lose = 1;
2645 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2646 mark_referenced_resources (trial, &needed, true);
2648 /* Ensure we don't put insns between the setting of cc and the comparison
2649 by moving a setting of cc into an earlier delay slot since these insns
2650 could clobber the condition code. */
2651 set.cc = 1;
2653 /* If this insn is a register-register copy and the next insn has
2654 a use of our destination, change it to use our source. That way,
2655 it will become a candidate for our delay slot the next time
2656 through this loop. This case occurs commonly in loops that
2657 scan a list.
2659 We could check for more complex cases than those tested below,
2660 but it doesn't seem worth it. It might also be a good idea to try
2661 to swap the two insns. That might do better.
2663 We can't do this if the next insn modifies our destination, because
2664 that would make the replacement into the insn invalid. We also can't
2665 do this if it modifies our source, because it might be an earlyclobber
2666 operand. This latter test also prevents updating the contents of
2667 a PRE_INC. We also can't do this if there's overlap of source and
2668 destination. Overlap may happen for larger-than-register-size modes. */
2670 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2671 && REG_P (SET_SRC (pat))
2672 && REG_P (SET_DEST (pat))
2673 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2675 rtx next = next_nonnote_insn (trial);
2677 if (next && NONJUMP_INSN_P (next)
2678 && GET_CODE (PATTERN (next)) != USE
2679 && ! reg_set_p (SET_DEST (pat), next)
2680 && ! reg_set_p (SET_SRC (pat), next)
2681 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2682 && ! modified_in_p (SET_DEST (pat), next))
2683 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2687 /* If we stopped on a branch insn that has delay slots, see if we can
2688 steal some of the insns in those slots. */
2689 if (trial && NONJUMP_INSN_P (trial)
2690 && GET_CODE (PATTERN (trial)) == SEQUENCE
2691 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2693 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2694 /* If this is the `true' thread, we will want to follow the jump,
2695 so we can only do this if we have taken everything up to here. */
2696 if (thread_if_true && trial == new_thread)
2698 delay_list
2699 = steal_delay_list_from_target (insn, condition, sequence,
2700 delay_list, &set, &needed,
2701 &opposite_needed, slots_to_fill,
2702 pslots_filled, &must_annul,
2703 &new_thread);
2704 /* If we owned the thread and are told that it branched
2705 elsewhere, make sure we own the thread at the new location. */
2706 if (own_thread && trial != new_thread)
2707 own_thread = own_thread_p (new_thread, new_thread, 0);
2709 else if (! thread_if_true)
2710 delay_list
2711 = steal_delay_list_from_fallthrough (insn, condition,
2712 sequence,
2713 delay_list, &set, &needed,
2714 &opposite_needed, slots_to_fill,
2715 pslots_filled, &must_annul);
2718 /* If we haven't found anything for this delay slot and it is very
2719 likely that the branch will be taken, see if the insn at our target
2720 increments or decrements a register with an increment that does not
2721 depend on the destination register. If so, try to place the opposite
2722 arithmetic insn after the jump insn and put the arithmetic insn in the
2723 delay slot. If we can't do this, return. */
2724 if (delay_list == 0 && likely
2725 && new_thread && !ANY_RETURN_P (new_thread)
2726 && NONJUMP_INSN_P (new_thread)
2727 && !RTX_FRAME_RELATED_P (new_thread)
2728 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2729 && asm_noperands (PATTERN (new_thread)) < 0)
2731 rtx pat = PATTERN (new_thread);
2732 rtx dest;
2733 rtx src;
2735 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2736 above. */
2737 trial = as_a <rtx_insn *> (new_thread);
2738 pat = PATTERN (trial);
2740 if (!NONJUMP_INSN_P (trial)
2741 || GET_CODE (pat) != SET
2742 || ! eligible_for_delay (insn, 0, trial, flags)
2743 || can_throw_internal (trial))
2744 return 0;
2746 dest = SET_DEST (pat), src = SET_SRC (pat);
2747 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2748 && rtx_equal_p (XEXP (src, 0), dest)
2749 && (!FLOAT_MODE_P (GET_MODE (src))
2750 || flag_unsafe_math_optimizations)
2751 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2752 && ! side_effects_p (pat))
2754 rtx other = XEXP (src, 1);
2755 rtx new_arith;
2756 rtx_insn *ninsn;
2758 /* If this is a constant adjustment, use the same code with
2759 the negated constant. Otherwise, reverse the sense of the
2760 arithmetic. */
2761 if (CONST_INT_P (other))
2762 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2763 negate_rtx (GET_MODE (src), other));
2764 else
2765 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2766 GET_MODE (src), dest, other);
2768 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2769 insn);
2771 if (recog_memoized (ninsn) < 0
2772 || (extract_insn (ninsn),
2773 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2775 delete_related_insns (ninsn);
2776 return 0;
2779 if (own_thread)
2781 update_block (trial, thread);
2782 if (trial == thread)
2784 thread = next_active_insn (thread);
2785 if (new_thread == trial)
2786 new_thread = thread;
2788 delete_related_insns (trial);
2790 else
2791 new_thread = next_active_insn (trial);
2793 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2794 if (thread_if_true)
2795 INSN_FROM_TARGET_P (ninsn) = 1;
2797 delay_list = add_to_delay_list (ninsn, NULL);
2798 (*pslots_filled)++;
2802 if (delay_list && must_annul)
2803 INSN_ANNULLED_BRANCH_P (insn) = 1;
2805 /* If we are to branch into the middle of this thread, find an appropriate
2806 label or make a new one if none, and redirect INSN to it. If we hit the
2807 end of the function, use the end-of-function label. */
2808 if (new_thread != thread)
2810 rtx label;
2811 bool crossing = false;
2813 gcc_assert (thread_if_true);
2815 if (new_thread && simplejump_or_return_p (new_thread)
2816 && redirect_with_delay_list_safe_p (insn,
2817 JUMP_LABEL (new_thread),
2818 delay_list))
2819 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2820 &crossing);
2822 if (ANY_RETURN_P (new_thread))
2823 label = find_end_label (new_thread);
2824 else if (LABEL_P (new_thread))
2825 label = new_thread;
2826 else
2827 label = get_label_before (as_a <rtx_insn *> (new_thread),
2828 JUMP_LABEL (insn));
2830 if (label)
2832 reorg_redirect_jump (insn, label);
2833 if (crossing)
2834 CROSSING_JUMP_P (insn) = 1;
2838 return delay_list;
2841 /* Make another attempt to find insns to place in delay slots.
2843 We previously looked for insns located in front of the delay insn
2844 and, for non-jump delay insns, located behind the delay insn.
2846 Here only try to schedule jump insns and try to move insns from either
2847 the target or the following insns into the delay slot. If annulling is
2848 supported, we will be likely to do this. Otherwise, we can do this only
2849 if safe. */
2851 static void
2852 fill_eager_delay_slots (void)
2854 rtx_insn *insn;
2855 int i;
2856 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2858 for (i = 0; i < num_unfilled_slots; i++)
2860 rtx condition;
2861 rtx target_label, insn_at_target;
2862 rtx_insn *fallthrough_insn;
2863 rtx_insn_list *delay_list = 0;
2864 int own_target;
2865 int own_fallthrough;
2866 int prediction, slots_to_fill, slots_filled;
2868 insn = unfilled_slots_base[i];
2869 if (insn == 0
2870 || insn->deleted ()
2871 || !JUMP_P (insn)
2872 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2873 continue;
2875 slots_to_fill = num_delay_slots (insn);
2876 /* Some machine description have defined instructions to have
2877 delay slots only in certain circumstances which may depend on
2878 nearby insns (which change due to reorg's actions).
2880 For example, the PA port normally has delay slots for unconditional
2881 jumps.
2883 However, the PA port claims such jumps do not have a delay slot
2884 if they are immediate successors of certain CALL_INSNs. This
2885 allows the port to favor filling the delay slot of the call with
2886 the unconditional jump. */
2887 if (slots_to_fill == 0)
2888 continue;
2890 slots_filled = 0;
2891 target_label = JUMP_LABEL (insn);
2892 condition = get_branch_condition (insn, target_label);
2894 if (condition == 0)
2895 continue;
2897 /* Get the next active fallthrough and target insns and see if we own
2898 them. Then see whether the branch is likely true. We don't need
2899 to do a lot of this for unconditional branches. */
2901 insn_at_target = first_active_target_insn (target_label);
2902 own_target = own_thread_p (target_label, target_label, 0);
2904 if (condition == const_true_rtx)
2906 own_fallthrough = 0;
2907 fallthrough_insn = 0;
2908 prediction = 2;
2910 else
2912 fallthrough_insn = next_active_insn (insn);
2913 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2914 prediction = mostly_true_jump (insn);
2917 /* If this insn is expected to branch, first try to get insns from our
2918 target, then our fallthrough insns. If it is not expected to branch,
2919 try the other order. */
2921 if (prediction > 0)
2923 delay_list
2924 = fill_slots_from_thread (insn, condition, insn_at_target,
2925 fallthrough_insn, prediction == 2, 1,
2926 own_target,
2927 slots_to_fill, &slots_filled, delay_list);
2929 if (delay_list == 0 && own_fallthrough)
2931 /* Even though we didn't find anything for delay slots,
2932 we might have found a redundant insn which we deleted
2933 from the thread that was filled. So we have to recompute
2934 the next insn at the target. */
2935 target_label = JUMP_LABEL (insn);
2936 insn_at_target = first_active_target_insn (target_label);
2938 delay_list
2939 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2940 insn_at_target, 0, 0,
2941 own_fallthrough,
2942 slots_to_fill, &slots_filled,
2943 delay_list);
2946 else
2948 if (own_fallthrough)
2949 delay_list
2950 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2951 insn_at_target, 0, 0,
2952 own_fallthrough,
2953 slots_to_fill, &slots_filled,
2954 delay_list);
2956 if (delay_list == 0)
2957 delay_list
2958 = fill_slots_from_thread (insn, condition, insn_at_target,
2959 next_active_insn (insn), 0, 1,
2960 own_target,
2961 slots_to_fill, &slots_filled,
2962 delay_list);
2965 if (delay_list)
2966 unfilled_slots_base[i]
2967 = emit_delay_sequence (insn, delay_list, slots_filled);
2969 if (slots_to_fill == slots_filled)
2970 unfilled_slots_base[i] = 0;
2972 note_delay_statistics (slots_filled, 1);
2976 static void delete_computation (rtx insn);
2978 /* Recursively delete prior insns that compute the value (used only by INSN
2979 which the caller is deleting) stored in the register mentioned by NOTE
2980 which is a REG_DEAD note associated with INSN. */
2982 static void
2983 delete_prior_computation (rtx note, rtx insn)
2985 rtx our_prev;
2986 rtx reg = XEXP (note, 0);
2988 for (our_prev = prev_nonnote_insn (insn);
2989 our_prev && (NONJUMP_INSN_P (our_prev)
2990 || CALL_P (our_prev));
2991 our_prev = prev_nonnote_insn (our_prev))
2993 rtx pat = PATTERN (our_prev);
2995 /* If we reach a CALL which is not calling a const function
2996 or the callee pops the arguments, then give up. */
2997 if (CALL_P (our_prev)
2998 && (! RTL_CONST_CALL_P (our_prev)
2999 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3000 break;
3002 /* If we reach a SEQUENCE, it is too complex to try to
3003 do anything with it, so give up. We can be run during
3004 and after reorg, so SEQUENCE rtl can legitimately show
3005 up here. */
3006 if (GET_CODE (pat) == SEQUENCE)
3007 break;
3009 if (GET_CODE (pat) == USE
3010 && NONJUMP_INSN_P (XEXP (pat, 0)))
3011 /* reorg creates USEs that look like this. We leave them
3012 alone because reorg needs them for its own purposes. */
3013 break;
3015 if (reg_set_p (reg, pat))
3017 if (side_effects_p (pat) && !CALL_P (our_prev))
3018 break;
3020 if (GET_CODE (pat) == PARALLEL)
3022 /* If we find a SET of something else, we can't
3023 delete the insn. */
3025 int i;
3027 for (i = 0; i < XVECLEN (pat, 0); i++)
3029 rtx part = XVECEXP (pat, 0, i);
3031 if (GET_CODE (part) == SET
3032 && SET_DEST (part) != reg)
3033 break;
3036 if (i == XVECLEN (pat, 0))
3037 delete_computation (our_prev);
3039 else if (GET_CODE (pat) == SET
3040 && REG_P (SET_DEST (pat)))
3042 int dest_regno = REGNO (SET_DEST (pat));
3043 int dest_endregno = END_REGNO (SET_DEST (pat));
3044 int regno = REGNO (reg);
3045 int endregno = END_REGNO (reg);
3047 if (dest_regno >= regno
3048 && dest_endregno <= endregno)
3049 delete_computation (our_prev);
3051 /* We may have a multi-word hard register and some, but not
3052 all, of the words of the register are needed in subsequent
3053 insns. Write REG_UNUSED notes for those parts that were not
3054 needed. */
3055 else if (dest_regno <= regno
3056 && dest_endregno >= endregno)
3058 int i;
3060 add_reg_note (our_prev, REG_UNUSED, reg);
3062 for (i = dest_regno; i < dest_endregno; i++)
3063 if (! find_regno_note (our_prev, REG_UNUSED, i))
3064 break;
3066 if (i == dest_endregno)
3067 delete_computation (our_prev);
3071 break;
3074 /* If PAT references the register that dies here, it is an
3075 additional use. Hence any prior SET isn't dead. However, this
3076 insn becomes the new place for the REG_DEAD note. */
3077 if (reg_overlap_mentioned_p (reg, pat))
3079 XEXP (note, 1) = REG_NOTES (our_prev);
3080 REG_NOTES (our_prev) = note;
3081 break;
3086 /* Delete INSN and recursively delete insns that compute values used only
3087 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3089 Look at all our REG_DEAD notes. If a previous insn does nothing other
3090 than set a register that dies in this insn, we can delete that insn
3091 as well.
3093 On machines with CC0, if CC0 is used in this insn, we may be able to
3094 delete the insn that set it. */
3096 static void
3097 delete_computation (rtx insn)
3099 rtx note, next;
3101 #ifdef HAVE_cc0
3102 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3104 rtx prev = prev_nonnote_insn (insn);
3105 /* We assume that at this stage
3106 CC's are always set explicitly
3107 and always immediately before the jump that
3108 will use them. So if the previous insn
3109 exists to set the CC's, delete it
3110 (unless it performs auto-increments, etc.). */
3111 if (prev && NONJUMP_INSN_P (prev)
3112 && sets_cc0_p (PATTERN (prev)))
3114 if (sets_cc0_p (PATTERN (prev)) > 0
3115 && ! side_effects_p (PATTERN (prev)))
3116 delete_computation (prev);
3117 else
3118 /* Otherwise, show that cc0 won't be used. */
3119 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3122 #endif
3124 for (note = REG_NOTES (insn); note; note = next)
3126 next = XEXP (note, 1);
3128 if (REG_NOTE_KIND (note) != REG_DEAD
3129 /* Verify that the REG_NOTE is legitimate. */
3130 || !REG_P (XEXP (note, 0)))
3131 continue;
3133 delete_prior_computation (note, insn);
3136 delete_related_insns (insn);
3139 /* If all INSN does is set the pc, delete it,
3140 and delete the insn that set the condition codes for it
3141 if that's what the previous thing was. */
3143 static void
3144 delete_jump (rtx_insn *insn)
3146 rtx set = single_set (insn);
3148 if (set && GET_CODE (SET_DEST (set)) == PC)
3149 delete_computation (insn);
3152 static rtx_insn *
3153 label_before_next_insn (rtx x, rtx scan_limit)
3155 rtx_insn *insn = next_active_insn (x);
3156 while (insn)
3158 insn = PREV_INSN (insn);
3159 if (insn == scan_limit || insn == NULL_RTX)
3160 return NULL;
3161 if (LABEL_P (insn))
3162 break;
3164 return insn;
3168 /* Once we have tried two ways to fill a delay slot, make a pass over the
3169 code to try to improve the results and to do such things as more jump
3170 threading. */
3172 static void
3173 relax_delay_slots (rtx_insn *first)
3175 rtx_insn *insn, *next;
3176 rtx_sequence *pat;
3177 rtx trial;
3178 rtx_insn *delay_insn;
3179 rtx target_label;
3181 /* Look at every JUMP_INSN and see if we can improve it. */
3182 for (insn = first; insn; insn = next)
3184 rtx_insn *other;
3185 bool crossing;
3187 next = next_active_insn (insn);
3189 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3190 the next insn, or jumps to a label that is not the last of a
3191 group of consecutive labels. */
3192 if (JUMP_P (insn)
3193 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3194 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3196 target_label
3197 = skip_consecutive_labels (follow_jumps (target_label, insn,
3198 &crossing));
3199 if (ANY_RETURN_P (target_label))
3200 target_label = find_end_label (target_label);
3202 if (target_label && next_active_insn (target_label) == next
3203 && ! condjump_in_parallel_p (insn))
3205 delete_jump (insn);
3206 continue;
3209 if (target_label && target_label != JUMP_LABEL (insn))
3211 reorg_redirect_jump (insn, target_label);
3212 if (crossing)
3213 CROSSING_JUMP_P (insn) = 1;
3216 /* See if this jump conditionally branches around an unconditional
3217 jump. If so, invert this jump and point it to the target of the
3218 second jump. */
3219 if (next && simplejump_or_return_p (next)
3220 && any_condjump_p (insn)
3221 && target_label
3222 && next_active_insn (target_label) == next_active_insn (next)
3223 && no_labels_between_p (insn, next))
3225 rtx label = JUMP_LABEL (next);
3227 /* Be careful how we do this to avoid deleting code or
3228 labels that are momentarily dead. See similar optimization
3229 in jump.c.
3231 We also need to ensure we properly handle the case when
3232 invert_jump fails. */
3234 ++LABEL_NUSES (target_label);
3235 if (!ANY_RETURN_P (label))
3236 ++LABEL_NUSES (label);
3238 if (invert_jump (insn, label, 1))
3240 delete_related_insns (next);
3241 next = insn;
3244 if (!ANY_RETURN_P (label))
3245 --LABEL_NUSES (label);
3247 if (--LABEL_NUSES (target_label) == 0)
3248 delete_related_insns (target_label);
3250 continue;
3254 /* If this is an unconditional jump and the previous insn is a
3255 conditional jump, try reversing the condition of the previous
3256 insn and swapping our targets. The next pass might be able to
3257 fill the slots.
3259 Don't do this if we expect the conditional branch to be true, because
3260 we would then be making the more common case longer. */
3262 if (simplejump_or_return_p (insn)
3263 && (other = prev_active_insn (insn)) != 0
3264 && any_condjump_p (other)
3265 && no_labels_between_p (other, insn)
3266 && 0 > mostly_true_jump (other))
3268 rtx other_target = JUMP_LABEL (other);
3269 target_label = JUMP_LABEL (insn);
3271 if (invert_jump (other, target_label, 0))
3272 reorg_redirect_jump (insn, other_target);
3275 /* Now look only at cases where we have a filled delay slot. */
3276 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3277 continue;
3279 pat = as_a <rtx_sequence *> (PATTERN (insn));
3280 delay_insn = pat->insn (0);
3282 /* See if the first insn in the delay slot is redundant with some
3283 previous insn. Remove it from the delay slot if so; then set up
3284 to reprocess this insn. */
3285 if (redundant_insn (pat->insn (1), delay_insn, 0))
3287 update_block (pat->insn (1), insn);
3288 delete_from_delay_slot (pat->insn (1));
3289 next = prev_active_insn (next);
3290 continue;
3293 /* See if we have a RETURN insn with a filled delay slot followed
3294 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3295 the first RETURN (but not its delay insn). This gives the same
3296 effect in fewer instructions.
3298 Only do so if optimizing for size since this results in slower, but
3299 smaller code. */
3300 if (optimize_function_for_size_p (cfun)
3301 && ANY_RETURN_P (PATTERN (delay_insn))
3302 && next
3303 && JUMP_P (next)
3304 && PATTERN (next) == PATTERN (delay_insn))
3306 rtx_insn *after;
3307 int i;
3309 /* Delete the RETURN and just execute the delay list insns.
3311 We do this by deleting the INSN containing the SEQUENCE, then
3312 re-emitting the insns separately, and then deleting the RETURN.
3313 This allows the count of the jump target to be properly
3314 decremented.
3316 Note that we need to change the INSN_UID of the re-emitted insns
3317 since it is used to hash the insns for mark_target_live_regs and
3318 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3320 Clear the from target bit, since these insns are no longer
3321 in delay slots. */
3322 for (i = 0; i < XVECLEN (pat, 0); i++)
3323 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3325 trial = PREV_INSN (insn);
3326 delete_related_insns (insn);
3327 gcc_assert (GET_CODE (pat) == SEQUENCE);
3328 add_insn_after (delay_insn, trial, NULL);
3329 after = delay_insn;
3330 for (i = 1; i < pat->len (); i++)
3331 after = emit_copy_of_insn_after (pat->insn (i), after);
3332 delete_scheduled_jump (delay_insn);
3333 continue;
3336 /* Now look only at the cases where we have a filled JUMP_INSN. */
3337 if (!JUMP_P (delay_insn)
3338 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3339 continue;
3341 target_label = JUMP_LABEL (delay_insn);
3342 if (target_label && ANY_RETURN_P (target_label))
3343 continue;
3345 /* If this jump goes to another unconditional jump, thread it, but
3346 don't convert a jump into a RETURN here. */
3347 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3348 &crossing));
3349 if (ANY_RETURN_P (trial))
3350 trial = find_end_label (trial);
3352 if (trial && trial != target_label
3353 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3355 reorg_redirect_jump (delay_insn, trial);
3356 target_label = trial;
3357 if (crossing)
3358 CROSSING_JUMP_P (insn) = 1;
3361 /* If the first insn at TARGET_LABEL is redundant with a previous
3362 insn, redirect the jump to the following insn and process again.
3363 We use next_real_insn instead of next_active_insn so we
3364 don't skip USE-markers, or we'll end up with incorrect
3365 liveness info. */
3366 trial = next_real_insn (target_label);
3367 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3368 && redundant_insn (trial, insn, 0)
3369 && ! can_throw_internal (trial))
3371 /* Figure out where to emit the special USE insn so we don't
3372 later incorrectly compute register live/death info. */
3373 rtx_insn *tmp = next_active_insn (trial);
3374 if (tmp == 0)
3375 tmp = find_end_label (simple_return_rtx);
3377 if (tmp)
3379 /* Insert the special USE insn and update dataflow info.
3380 We know "trial" is an insn here as it is the output of
3381 next_real_insn () above. */
3382 update_block (as_a <rtx_insn *> (trial), tmp);
3384 /* Now emit a label before the special USE insn, and
3385 redirect our jump to the new label. */
3386 target_label = get_label_before (PREV_INSN (tmp), target_label);
3387 reorg_redirect_jump (delay_insn, target_label);
3388 next = insn;
3389 continue;
3393 /* Similarly, if it is an unconditional jump with one insn in its
3394 delay list and that insn is redundant, thread the jump. */
3395 rtx_sequence *trial_seq =
3396 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3397 if (trial_seq
3398 && trial_seq->len () == 2
3399 && JUMP_P (trial_seq->insn (0))
3400 && simplejump_or_return_p (trial_seq->insn (0))
3401 && redundant_insn (trial_seq->insn (1), insn, 0))
3403 target_label = JUMP_LABEL (trial_seq->insn (0));
3404 if (ANY_RETURN_P (target_label))
3405 target_label = find_end_label (target_label);
3407 if (target_label
3408 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3409 insn))
3411 update_block (trial_seq->insn (1), insn);
3412 reorg_redirect_jump (delay_insn, target_label);
3413 next = insn;
3414 continue;
3418 /* See if we have a simple (conditional) jump that is useless. */
3419 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3420 && ! condjump_in_parallel_p (delay_insn)
3421 && prev_active_insn (target_label) == insn
3422 && ! BARRIER_P (prev_nonnote_insn (target_label))
3423 #ifdef HAVE_cc0
3424 /* If the last insn in the delay slot sets CC0 for some insn,
3425 various code assumes that it is in a delay slot. We could
3426 put it back where it belonged and delete the register notes,
3427 but it doesn't seem worthwhile in this uncommon case. */
3428 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3429 REG_CC_USER, NULL_RTX)
3430 #endif
3433 rtx_insn *after;
3434 int i;
3436 /* All this insn does is execute its delay list and jump to the
3437 following insn. So delete the jump and just execute the delay
3438 list insns.
3440 We do this by deleting the INSN containing the SEQUENCE, then
3441 re-emitting the insns separately, and then deleting the jump.
3442 This allows the count of the jump target to be properly
3443 decremented.
3445 Note that we need to change the INSN_UID of the re-emitted insns
3446 since it is used to hash the insns for mark_target_live_regs and
3447 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3449 Clear the from target bit, since these insns are no longer
3450 in delay slots. */
3451 for (i = 0; i < XVECLEN (pat, 0); i++)
3452 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3454 trial = PREV_INSN (insn);
3455 delete_related_insns (insn);
3456 gcc_assert (GET_CODE (pat) == SEQUENCE);
3457 add_insn_after (delay_insn, trial, NULL);
3458 after = delay_insn;
3459 for (i = 1; i < pat->len (); i++)
3460 after = emit_copy_of_insn_after (pat->insn (i), after);
3461 delete_scheduled_jump (delay_insn);
3462 continue;
3465 /* See if this is an unconditional jump around a single insn which is
3466 identical to the one in its delay slot. In this case, we can just
3467 delete the branch and the insn in its delay slot. */
3468 if (next && NONJUMP_INSN_P (next)
3469 && label_before_next_insn (next, insn) == target_label
3470 && simplejump_p (insn)
3471 && XVECLEN (pat, 0) == 2
3472 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3474 delete_related_insns (insn);
3475 continue;
3478 /* See if this jump (with its delay slots) conditionally branches
3479 around an unconditional jump (without delay slots). If so, invert
3480 this jump and point it to the target of the second jump. We cannot
3481 do this for annulled jumps, though. Again, don't convert a jump to
3482 a RETURN here. */
3483 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3484 && any_condjump_p (delay_insn)
3485 && next && simplejump_or_return_p (next)
3486 && next_active_insn (target_label) == next_active_insn (next)
3487 && no_labels_between_p (insn, next))
3489 rtx label = JUMP_LABEL (next);
3490 rtx old_label = JUMP_LABEL (delay_insn);
3492 if (ANY_RETURN_P (label))
3493 label = find_end_label (label);
3495 /* find_end_label can generate a new label. Check this first. */
3496 if (label
3497 && no_labels_between_p (insn, next)
3498 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3500 /* Be careful how we do this to avoid deleting code or labels
3501 that are momentarily dead. See similar optimization in
3502 jump.c */
3503 if (old_label)
3504 ++LABEL_NUSES (old_label);
3506 if (invert_jump (delay_insn, label, 1))
3508 int i;
3510 /* Must update the INSN_FROM_TARGET_P bits now that
3511 the branch is reversed, so that mark_target_live_regs
3512 will handle the delay slot insn correctly. */
3513 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3515 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3516 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3519 delete_related_insns (next);
3520 next = insn;
3523 if (old_label && --LABEL_NUSES (old_label) == 0)
3524 delete_related_insns (old_label);
3525 continue;
3529 /* If we own the thread opposite the way this insn branches, see if we
3530 can merge its delay slots with following insns. */
3531 if (INSN_FROM_TARGET_P (pat->insn (1))
3532 && own_thread_p (NEXT_INSN (insn), 0, 1))
3533 try_merge_delay_insns (insn, next);
3534 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3535 && own_thread_p (target_label, target_label, 0))
3536 try_merge_delay_insns (insn, next_active_insn (target_label));
3538 /* If we get here, we haven't deleted INSN. But we may have deleted
3539 NEXT, so recompute it. */
3540 next = next_active_insn (insn);
3545 /* Look for filled jumps to the end of function label. We can try to convert
3546 them into RETURN insns if the insns in the delay slot are valid for the
3547 RETURN as well. */
3549 static void
3550 make_return_insns (rtx_insn *first)
3552 rtx_insn *insn;
3553 rtx_insn *jump_insn;
3554 rtx real_return_label = function_return_label;
3555 rtx real_simple_return_label = function_simple_return_label;
3556 int slots, i;
3558 /* See if there is a RETURN insn in the function other than the one we
3559 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3560 into a RETURN to jump to it. */
3561 for (insn = first; insn; insn = NEXT_INSN (insn))
3562 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3564 rtx t = get_label_before (insn, NULL_RTX);
3565 if (PATTERN (insn) == ret_rtx)
3566 real_return_label = t;
3567 else
3568 real_simple_return_label = t;
3569 break;
3572 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3573 was equal to END_OF_FUNCTION_LABEL. */
3574 if (real_return_label)
3575 LABEL_NUSES (real_return_label)++;
3576 if (real_simple_return_label)
3577 LABEL_NUSES (real_simple_return_label)++;
3579 /* Clear the list of insns to fill so we can use it. */
3580 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3582 for (insn = first; insn; insn = NEXT_INSN (insn))
3584 int flags;
3585 rtx kind, real_label;
3587 /* Only look at filled JUMP_INSNs that go to the end of function
3588 label. */
3589 if (!NONJUMP_INSN_P (insn))
3590 continue;
3592 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3593 continue;
3595 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3597 if (!jump_to_label_p (pat->insn (0)))
3598 continue;
3600 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3602 kind = ret_rtx;
3603 real_label = real_return_label;
3605 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3607 kind = simple_return_rtx;
3608 real_label = real_simple_return_label;
3610 else
3611 continue;
3613 jump_insn = pat->insn (0);
3615 /* If we can't make the jump into a RETURN, try to redirect it to the best
3616 RETURN and go on to the next insn. */
3617 if (!reorg_redirect_jump (jump_insn, kind))
3619 /* Make sure redirecting the jump will not invalidate the delay
3620 slot insns. */
3621 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3622 reorg_redirect_jump (jump_insn, real_label);
3623 continue;
3626 /* See if this RETURN can accept the insns current in its delay slot.
3627 It can if it has more or an equal number of slots and the contents
3628 of each is valid. */
3630 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3631 slots = num_delay_slots (jump_insn);
3632 if (slots >= XVECLEN (pat, 0) - 1)
3634 for (i = 1; i < XVECLEN (pat, 0); i++)
3635 if (! (
3636 #ifdef ANNUL_IFFALSE_SLOTS
3637 (INSN_ANNULLED_BRANCH_P (jump_insn)
3638 && INSN_FROM_TARGET_P (pat->insn (i)))
3639 ? eligible_for_annul_false (jump_insn, i - 1,
3640 pat->insn (i), flags) :
3641 #endif
3642 #ifdef ANNUL_IFTRUE_SLOTS
3643 (INSN_ANNULLED_BRANCH_P (jump_insn)
3644 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3645 ? eligible_for_annul_true (jump_insn, i - 1,
3646 pat->insn (i), flags) :
3647 #endif
3648 eligible_for_delay (jump_insn, i - 1,
3649 pat->insn (i), flags)))
3650 break;
3652 else
3653 i = 0;
3655 if (i == XVECLEN (pat, 0))
3656 continue;
3658 /* We have to do something with this insn. If it is an unconditional
3659 RETURN, delete the SEQUENCE and output the individual insns,
3660 followed by the RETURN. Then set things up so we try to find
3661 insns for its delay slots, if it needs some. */
3662 if (ANY_RETURN_P (PATTERN (jump_insn)))
3664 rtx_insn *prev = PREV_INSN (insn);
3666 delete_related_insns (insn);
3667 for (i = 1; i < XVECLEN (pat, 0); i++)
3668 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3670 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3671 emit_barrier_after (insn);
3673 if (slots)
3674 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3676 else
3677 /* It is probably more efficient to keep this with its current
3678 delay slot as a branch to a RETURN. */
3679 reorg_redirect_jump (jump_insn, real_label);
3682 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3683 new delay slots we have created. */
3684 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3685 delete_related_insns (real_return_label);
3686 if (real_simple_return_label != NULL_RTX
3687 && --LABEL_NUSES (real_simple_return_label) == 0)
3688 delete_related_insns (real_simple_return_label);
3690 fill_simple_delay_slots (1);
3691 fill_simple_delay_slots (0);
3694 /* Try to find insns to place in delay slots. */
3696 static void
3697 dbr_schedule (rtx_insn *first)
3699 rtx_insn *insn, *next, *epilogue_insn = 0;
3700 int i;
3701 bool need_return_insns;
3703 /* If the current function has no insns other than the prologue and
3704 epilogue, then do not try to fill any delay slots. */
3705 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3706 return;
3708 /* Find the highest INSN_UID and allocate and initialize our map from
3709 INSN_UID's to position in code. */
3710 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3712 if (INSN_UID (insn) > max_uid)
3713 max_uid = INSN_UID (insn);
3714 if (NOTE_P (insn)
3715 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3716 epilogue_insn = insn;
3719 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3720 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3721 uid_to_ruid[INSN_UID (insn)] = i;
3723 /* Initialize the list of insns that need filling. */
3724 if (unfilled_firstobj == 0)
3726 gcc_obstack_init (&unfilled_slots_obstack);
3727 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3730 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3732 rtx target;
3734 /* Skip vector tables. We can't get attributes for them. */
3735 if (JUMP_TABLE_DATA_P (insn))
3736 continue;
3738 if (JUMP_P (insn))
3739 INSN_ANNULLED_BRANCH_P (insn) = 0;
3740 INSN_FROM_TARGET_P (insn) = 0;
3742 if (num_delay_slots (insn) > 0)
3743 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3745 /* Ensure all jumps go to the last of a set of consecutive labels. */
3746 if (JUMP_P (insn)
3747 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3748 && !ANY_RETURN_P (JUMP_LABEL (insn))
3749 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3750 != JUMP_LABEL (insn)))
3751 redirect_jump (insn, target, 1);
3754 init_resource_info (epilogue_insn);
3756 /* Show we haven't computed an end-of-function label yet. */
3757 function_return_label = function_simple_return_label = NULL;
3759 /* Initialize the statistics for this function. */
3760 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3761 memset (num_filled_delays, 0, sizeof num_filled_delays);
3763 /* Now do the delay slot filling. Try everything twice in case earlier
3764 changes make more slots fillable. */
3766 for (reorg_pass_number = 0;
3767 reorg_pass_number < MAX_REORG_PASSES;
3768 reorg_pass_number++)
3770 fill_simple_delay_slots (1);
3771 fill_simple_delay_slots (0);
3772 fill_eager_delay_slots ();
3773 relax_delay_slots (first);
3776 /* If we made an end of function label, indicate that it is now
3777 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3778 If it is now unused, delete it. */
3779 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3780 delete_related_insns (function_return_label);
3781 if (function_simple_return_label
3782 && --LABEL_NUSES (function_simple_return_label) == 0)
3783 delete_related_insns (function_simple_return_label);
3785 need_return_insns = false;
3786 #ifdef HAVE_return
3787 need_return_insns |= HAVE_return && function_return_label != 0;
3788 #endif
3789 #ifdef HAVE_simple_return
3790 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3791 #endif
3792 if (need_return_insns)
3793 make_return_insns (first);
3795 /* Delete any USE insns made by update_block; subsequent passes don't need
3796 them or know how to deal with them. */
3797 for (insn = first; insn; insn = next)
3799 next = NEXT_INSN (insn);
3801 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3802 && INSN_P (XEXP (PATTERN (insn), 0)))
3803 next = delete_related_insns (insn);
3806 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3808 /* It is not clear why the line below is needed, but it does seem to be. */
3809 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3811 if (dump_file)
3813 int i, j, need_comma;
3814 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3815 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3817 for (reorg_pass_number = 0;
3818 reorg_pass_number < MAX_REORG_PASSES;
3819 reorg_pass_number++)
3821 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3822 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3824 need_comma = 0;
3825 fprintf (dump_file, ";; Reorg function #%d\n", i);
3827 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3828 num_insns_needing_delays[i][reorg_pass_number]);
3830 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3831 if (num_filled_delays[i][j][reorg_pass_number])
3833 if (need_comma)
3834 fprintf (dump_file, ", ");
3835 need_comma = 1;
3836 fprintf (dump_file, "%d got %d delays",
3837 num_filled_delays[i][j][reorg_pass_number], j);
3839 fprintf (dump_file, "\n");
3842 memset (total_delay_slots, 0, sizeof total_delay_slots);
3843 memset (total_annul_slots, 0, sizeof total_annul_slots);
3844 for (insn = first; insn; insn = NEXT_INSN (insn))
3846 if (! insn->deleted ()
3847 && NONJUMP_INSN_P (insn)
3848 && GET_CODE (PATTERN (insn)) != USE
3849 && GET_CODE (PATTERN (insn)) != CLOBBER)
3851 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3853 rtx control;
3854 j = XVECLEN (PATTERN (insn), 0) - 1;
3855 if (j > MAX_DELAY_HISTOGRAM)
3856 j = MAX_DELAY_HISTOGRAM;
3857 control = XVECEXP (PATTERN (insn), 0, 0);
3858 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3859 total_annul_slots[j]++;
3860 else
3861 total_delay_slots[j]++;
3863 else if (num_delay_slots (insn) > 0)
3864 total_delay_slots[0]++;
3867 fprintf (dump_file, ";; Reorg totals: ");
3868 need_comma = 0;
3869 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3871 if (total_delay_slots[j])
3873 if (need_comma)
3874 fprintf (dump_file, ", ");
3875 need_comma = 1;
3876 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3879 fprintf (dump_file, "\n");
3880 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3881 fprintf (dump_file, ";; Reorg annuls: ");
3882 need_comma = 0;
3883 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3885 if (total_annul_slots[j])
3887 if (need_comma)
3888 fprintf (dump_file, ", ");
3889 need_comma = 1;
3890 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3893 fprintf (dump_file, "\n");
3894 #endif
3895 fprintf (dump_file, "\n");
3898 if (!sibling_labels.is_empty ())
3900 update_alignments (sibling_labels);
3901 sibling_labels.release ();
3904 free_resource_info ();
3905 free (uid_to_ruid);
3906 crtl->dbr_scheduled_p = true;
3908 #endif /* DELAY_SLOTS */
3910 /* Run delay slot optimization. */
3911 static unsigned int
3912 rest_of_handle_delay_slots (void)
3914 #ifdef DELAY_SLOTS
3915 dbr_schedule (get_insns ());
3916 #endif
3917 return 0;
3920 namespace {
3922 const pass_data pass_data_delay_slots =
3924 RTL_PASS, /* type */
3925 "dbr", /* name */
3926 OPTGROUP_NONE, /* optinfo_flags */
3927 TV_DBR_SCHED, /* tv_id */
3928 0, /* properties_required */
3929 0, /* properties_provided */
3930 0, /* properties_destroyed */
3931 0, /* todo_flags_start */
3932 0, /* todo_flags_finish */
3935 class pass_delay_slots : public rtl_opt_pass
3937 public:
3938 pass_delay_slots (gcc::context *ctxt)
3939 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3942 /* opt_pass methods: */
3943 virtual bool gate (function *);
3944 virtual unsigned int execute (function *)
3946 return rest_of_handle_delay_slots ();
3949 }; // class pass_delay_slots
3951 bool
3952 pass_delay_slots::gate (function *)
3954 #ifdef DELAY_SLOTS
3955 /* At -O0 dataflow info isn't updated after RA. */
3956 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3957 #else
3958 return 0;
3959 #endif
3962 } // anon namespace
3964 rtl_opt_pass *
3965 make_pass_delay_slots (gcc::context *ctxt)
3967 return new pass_delay_slots (ctxt);
3970 /* Machine dependent reorg pass. */
3972 namespace {
3974 const pass_data pass_data_machine_reorg =
3976 RTL_PASS, /* type */
3977 "mach", /* name */
3978 OPTGROUP_NONE, /* optinfo_flags */
3979 TV_MACH_DEP, /* tv_id */
3980 0, /* properties_required */
3981 0, /* properties_provided */
3982 0, /* properties_destroyed */
3983 0, /* todo_flags_start */
3984 0, /* todo_flags_finish */
3987 class pass_machine_reorg : public rtl_opt_pass
3989 public:
3990 pass_machine_reorg (gcc::context *ctxt)
3991 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
3994 /* opt_pass methods: */
3995 virtual bool gate (function *)
3997 return targetm.machine_dependent_reorg != 0;
4000 virtual unsigned int execute (function *)
4002 targetm.machine_dependent_reorg ();
4003 return 0;
4006 }; // class pass_machine_reorg
4008 } // anon namespace
4010 rtl_opt_pass *
4011 make_pass_machine_reorg (gcc::context *ctxt)
4013 return new pass_machine_reorg (ctxt);