* gcc.dg/vect/vect-outer-simd-1.c: Remove cleanup-tree-dump directive.
[official-gcc.git] / gcc / expr.c
blob5a931dc35ae7148b03e5ec6c7d0d0cd4be3e976c
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "hash-set.h"
27 #include "vec.h"
28 #include "double-int.h"
29 #include "input.h"
30 #include "alias.h"
31 #include "symtab.h"
32 #include "wide-int.h"
33 #include "inchash.h"
34 #include "tree.h"
35 #include "fold-const.h"
36 #include "stringpool.h"
37 #include "stor-layout.h"
38 #include "attribs.h"
39 #include "varasm.h"
40 #include "flags.h"
41 #include "regs.h"
42 #include "hard-reg-set.h"
43 #include "except.h"
44 #include "function.h"
45 #include "insn-config.h"
46 #include "insn-attr.h"
47 #include "hashtab.h"
48 #include "statistics.h"
49 #include "real.h"
50 #include "fixed-value.h"
51 #include "expmed.h"
52 #include "dojump.h"
53 #include "explow.h"
54 #include "calls.h"
55 #include "emit-rtl.h"
56 #include "stmt.h"
57 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
58 #include "expr.h"
59 #include "insn-codes.h"
60 #include "optabs.h"
61 #include "libfuncs.h"
62 #include "recog.h"
63 #include "reload.h"
64 #include "typeclass.h"
65 #include "toplev.h"
66 #include "langhooks.h"
67 #include "intl.h"
68 #include "tm_p.h"
69 #include "tree-iterator.h"
70 #include "predict.h"
71 #include "dominance.h"
72 #include "cfg.h"
73 #include "basic-block.h"
74 #include "tree-ssa-alias.h"
75 #include "internal-fn.h"
76 #include "gimple-expr.h"
77 #include "is-a.h"
78 #include "gimple.h"
79 #include "gimple-ssa.h"
80 #include "hash-map.h"
81 #include "plugin-api.h"
82 #include "ipa-ref.h"
83 #include "cgraph.h"
84 #include "tree-ssanames.h"
85 #include "target.h"
86 #include "common/common-target.h"
87 #include "timevar.h"
88 #include "df.h"
89 #include "diagnostic.h"
90 #include "tree-ssa-live.h"
91 #include "tree-outof-ssa.h"
92 #include "target-globals.h"
93 #include "params.h"
94 #include "tree-ssa-address.h"
95 #include "cfgexpand.h"
96 #include "builtins.h"
97 #include "tree-chkp.h"
98 #include "rtl-chkp.h"
99 #include "ccmp.h"
102 /* If this is nonzero, we do not bother generating VOLATILE
103 around volatile memory references, and we are willing to
104 output indirect addresses. If cse is to follow, we reject
105 indirect addresses so a useful potential cse is generated;
106 if it is used only once, instruction combination will produce
107 the same indirect address eventually. */
108 int cse_not_expected;
110 /* This structure is used by move_by_pieces to describe the move to
111 be performed. */
112 struct move_by_pieces_d
114 rtx to;
115 rtx to_addr;
116 int autinc_to;
117 int explicit_inc_to;
118 rtx from;
119 rtx from_addr;
120 int autinc_from;
121 int explicit_inc_from;
122 unsigned HOST_WIDE_INT len;
123 HOST_WIDE_INT offset;
124 int reverse;
127 /* This structure is used by store_by_pieces to describe the clear to
128 be performed. */
130 struct store_by_pieces_d
132 rtx to;
133 rtx to_addr;
134 int autinc_to;
135 int explicit_inc_to;
136 unsigned HOST_WIDE_INT len;
137 HOST_WIDE_INT offset;
138 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode);
139 void *constfundata;
140 int reverse;
143 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
144 struct move_by_pieces_d *);
145 static bool block_move_libcall_safe_for_call_parm (void);
146 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
147 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
148 unsigned HOST_WIDE_INT);
149 static tree emit_block_move_libcall_fn (int);
150 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
151 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, machine_mode);
152 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
153 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
154 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
155 struct store_by_pieces_d *);
156 static tree clear_storage_libcall_fn (int);
157 static rtx_insn *compress_float_constant (rtx, rtx);
158 static rtx get_subtarget (rtx);
159 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
160 HOST_WIDE_INT, machine_mode,
161 tree, int, alias_set_type);
162 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
163 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
164 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
165 machine_mode, tree, alias_set_type, bool);
167 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
169 static int is_aligning_offset (const_tree, const_tree);
170 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
171 static rtx do_store_flag (sepops, rtx, machine_mode);
172 #ifdef PUSH_ROUNDING
173 static void emit_single_push_insn (machine_mode, rtx, tree);
174 #endif
175 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, int);
176 static rtx const_vector_from_tree (tree);
177 static tree tree_expr_size (const_tree);
178 static HOST_WIDE_INT int_expr_size (tree);
181 /* This is run to set up which modes can be used
182 directly in memory and to initialize the block move optab. It is run
183 at the beginning of compilation and when the target is reinitialized. */
185 void
186 init_expr_target (void)
188 rtx insn, pat;
189 machine_mode mode;
190 int num_clobbers;
191 rtx mem, mem1;
192 rtx reg;
194 /* Try indexing by frame ptr and try by stack ptr.
195 It is known that on the Convex the stack ptr isn't a valid index.
196 With luck, one or the other is valid on any machine. */
197 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
198 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
200 /* A scratch register we can modify in-place below to avoid
201 useless RTL allocations. */
202 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
204 insn = rtx_alloc (INSN);
205 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
206 PATTERN (insn) = pat;
208 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
209 mode = (machine_mode) ((int) mode + 1))
211 int regno;
213 direct_load[(int) mode] = direct_store[(int) mode] = 0;
214 PUT_MODE (mem, mode);
215 PUT_MODE (mem1, mode);
217 /* See if there is some register that can be used in this mode and
218 directly loaded or stored from memory. */
220 if (mode != VOIDmode && mode != BLKmode)
221 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
222 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
223 regno++)
225 if (! HARD_REGNO_MODE_OK (regno, mode))
226 continue;
228 set_mode_and_regno (reg, mode, regno);
230 SET_SRC (pat) = mem;
231 SET_DEST (pat) = reg;
232 if (recog (pat, insn, &num_clobbers) >= 0)
233 direct_load[(int) mode] = 1;
235 SET_SRC (pat) = mem1;
236 SET_DEST (pat) = reg;
237 if (recog (pat, insn, &num_clobbers) >= 0)
238 direct_load[(int) mode] = 1;
240 SET_SRC (pat) = reg;
241 SET_DEST (pat) = mem;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_store[(int) mode] = 1;
245 SET_SRC (pat) = reg;
246 SET_DEST (pat) = mem1;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_store[(int) mode] = 1;
252 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
255 mode = GET_MODE_WIDER_MODE (mode))
257 machine_mode srcmode;
258 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
259 srcmode = GET_MODE_WIDER_MODE (srcmode))
261 enum insn_code ic;
263 ic = can_extend_p (mode, srcmode, 0);
264 if (ic == CODE_FOR_nothing)
265 continue;
267 PUT_MODE (mem, srcmode);
269 if (insn_operand_matches (ic, 1, mem))
270 float_extend_from_mem[mode][srcmode] = true;
275 /* This is run at the start of compiling a function. */
277 void
278 init_expr (void)
280 memset (&crtl->expr, 0, sizeof (crtl->expr));
283 /* Copy data from FROM to TO, where the machine modes are not the same.
284 Both modes may be integer, or both may be floating, or both may be
285 fixed-point.
286 UNSIGNEDP should be nonzero if FROM is an unsigned type.
287 This causes zero-extension instead of sign-extension. */
289 void
290 convert_move (rtx to, rtx from, int unsignedp)
292 machine_mode to_mode = GET_MODE (to);
293 machine_mode from_mode = GET_MODE (from);
294 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
295 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
296 enum insn_code code;
297 rtx libcall;
299 /* rtx code for making an equivalent value. */
300 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
301 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
304 gcc_assert (to_real == from_real);
305 gcc_assert (to_mode != BLKmode);
306 gcc_assert (from_mode != BLKmode);
308 /* If the source and destination are already the same, then there's
309 nothing to do. */
310 if (to == from)
311 return;
313 /* If FROM is a SUBREG that indicates that we have already done at least
314 the required extension, strip it. We don't handle such SUBREGs as
315 TO here. */
317 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
318 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
319 >= GET_MODE_PRECISION (to_mode))
320 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
321 from = gen_lowpart (to_mode, from), from_mode = to_mode;
323 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
325 if (to_mode == from_mode
326 || (from_mode == VOIDmode && CONSTANT_P (from)))
328 emit_move_insn (to, from);
329 return;
332 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
334 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
336 if (VECTOR_MODE_P (to_mode))
337 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
338 else
339 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
341 emit_move_insn (to, from);
342 return;
345 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
347 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
348 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
349 return;
352 if (to_real)
354 rtx value;
355 rtx_insn *insns;
356 convert_optab tab;
358 gcc_assert ((GET_MODE_PRECISION (from_mode)
359 != GET_MODE_PRECISION (to_mode))
360 || (DECIMAL_FLOAT_MODE_P (from_mode)
361 != DECIMAL_FLOAT_MODE_P (to_mode)));
363 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
364 /* Conversion between decimal float and binary float, same size. */
365 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
366 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
367 tab = sext_optab;
368 else
369 tab = trunc_optab;
371 /* Try converting directly if the insn is supported. */
373 code = convert_optab_handler (tab, to_mode, from_mode);
374 if (code != CODE_FOR_nothing)
376 emit_unop_insn (code, to, from,
377 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
378 return;
381 /* Otherwise use a libcall. */
382 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
384 /* Is this conversion implemented yet? */
385 gcc_assert (libcall);
387 start_sequence ();
388 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
389 1, from, from_mode);
390 insns = get_insns ();
391 end_sequence ();
392 emit_libcall_block (insns, to, value,
393 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
394 from)
395 : gen_rtx_FLOAT_EXTEND (to_mode, from));
396 return;
399 /* Handle pointer conversion. */ /* SPEE 900220. */
400 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
402 convert_optab ctab;
404 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
405 ctab = trunc_optab;
406 else if (unsignedp)
407 ctab = zext_optab;
408 else
409 ctab = sext_optab;
411 if (convert_optab_handler (ctab, to_mode, from_mode)
412 != CODE_FOR_nothing)
414 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
415 to, from, UNKNOWN);
416 return;
420 /* Targets are expected to provide conversion insns between PxImode and
421 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
422 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
424 machine_mode full_mode
425 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
427 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
428 != CODE_FOR_nothing);
430 if (full_mode != from_mode)
431 from = convert_to_mode (full_mode, from, unsignedp);
432 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
433 to, from, UNKNOWN);
434 return;
436 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
438 rtx new_from;
439 machine_mode full_mode
440 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
441 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
442 enum insn_code icode;
444 icode = convert_optab_handler (ctab, full_mode, from_mode);
445 gcc_assert (icode != CODE_FOR_nothing);
447 if (to_mode == full_mode)
449 emit_unop_insn (icode, to, from, UNKNOWN);
450 return;
453 new_from = gen_reg_rtx (full_mode);
454 emit_unop_insn (icode, new_from, from, UNKNOWN);
456 /* else proceed to integer conversions below. */
457 from_mode = full_mode;
458 from = new_from;
461 /* Make sure both are fixed-point modes or both are not. */
462 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
463 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
464 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
466 /* If we widen from_mode to to_mode and they are in the same class,
467 we won't saturate the result.
468 Otherwise, always saturate the result to play safe. */
469 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
470 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
471 expand_fixed_convert (to, from, 0, 0);
472 else
473 expand_fixed_convert (to, from, 0, 1);
474 return;
477 /* Now both modes are integers. */
479 /* Handle expanding beyond a word. */
480 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
481 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
483 rtx_insn *insns;
484 rtx lowpart;
485 rtx fill_value;
486 rtx lowfrom;
487 int i;
488 machine_mode lowpart_mode;
489 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
491 /* Try converting directly if the insn is supported. */
492 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
493 != CODE_FOR_nothing)
495 /* If FROM is a SUBREG, put it into a register. Do this
496 so that we always generate the same set of insns for
497 better cse'ing; if an intermediate assignment occurred,
498 we won't be doing the operation directly on the SUBREG. */
499 if (optimize > 0 && GET_CODE (from) == SUBREG)
500 from = force_reg (from_mode, from);
501 emit_unop_insn (code, to, from, equiv_code);
502 return;
504 /* Next, try converting via full word. */
505 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
506 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
507 != CODE_FOR_nothing))
509 rtx word_to = gen_reg_rtx (word_mode);
510 if (REG_P (to))
512 if (reg_overlap_mentioned_p (to, from))
513 from = force_reg (from_mode, from);
514 emit_clobber (to);
516 convert_move (word_to, from, unsignedp);
517 emit_unop_insn (code, to, word_to, equiv_code);
518 return;
521 /* No special multiword conversion insn; do it by hand. */
522 start_sequence ();
524 /* Since we will turn this into a no conflict block, we must ensure the
525 the source does not overlap the target so force it into an isolated
526 register when maybe so. Likewise for any MEM input, since the
527 conversion sequence might require several references to it and we
528 must ensure we're getting the same value every time. */
530 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
531 from = force_reg (from_mode, from);
533 /* Get a copy of FROM widened to a word, if necessary. */
534 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
535 lowpart_mode = word_mode;
536 else
537 lowpart_mode = from_mode;
539 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
541 lowpart = gen_lowpart (lowpart_mode, to);
542 emit_move_insn (lowpart, lowfrom);
544 /* Compute the value to put in each remaining word. */
545 if (unsignedp)
546 fill_value = const0_rtx;
547 else
548 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
549 LT, lowfrom, const0_rtx,
550 lowpart_mode, 0, -1);
552 /* Fill the remaining words. */
553 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
555 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
556 rtx subword = operand_subword (to, index, 1, to_mode);
558 gcc_assert (subword);
560 if (fill_value != subword)
561 emit_move_insn (subword, fill_value);
564 insns = get_insns ();
565 end_sequence ();
567 emit_insn (insns);
568 return;
571 /* Truncating multi-word to a word or less. */
572 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
573 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
575 if (!((MEM_P (from)
576 && ! MEM_VOLATILE_P (from)
577 && direct_load[(int) to_mode]
578 && ! mode_dependent_address_p (XEXP (from, 0),
579 MEM_ADDR_SPACE (from)))
580 || REG_P (from)
581 || GET_CODE (from) == SUBREG))
582 from = force_reg (from_mode, from);
583 convert_move (to, gen_lowpart (word_mode, from), 0);
584 return;
587 /* Now follow all the conversions between integers
588 no more than a word long. */
590 /* For truncation, usually we can just refer to FROM in a narrower mode. */
591 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
592 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
594 if (!((MEM_P (from)
595 && ! MEM_VOLATILE_P (from)
596 && direct_load[(int) to_mode]
597 && ! mode_dependent_address_p (XEXP (from, 0),
598 MEM_ADDR_SPACE (from)))
599 || REG_P (from)
600 || GET_CODE (from) == SUBREG))
601 from = force_reg (from_mode, from);
602 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
603 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
604 from = copy_to_reg (from);
605 emit_move_insn (to, gen_lowpart (to_mode, from));
606 return;
609 /* Handle extension. */
610 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
612 /* Convert directly if that works. */
613 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
614 != CODE_FOR_nothing)
616 emit_unop_insn (code, to, from, equiv_code);
617 return;
619 else
621 machine_mode intermediate;
622 rtx tmp;
623 int shift_amount;
625 /* Search for a mode to convert via. */
626 for (intermediate = from_mode; intermediate != VOIDmode;
627 intermediate = GET_MODE_WIDER_MODE (intermediate))
628 if (((can_extend_p (to_mode, intermediate, unsignedp)
629 != CODE_FOR_nothing)
630 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
631 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
632 && (can_extend_p (intermediate, from_mode, unsignedp)
633 != CODE_FOR_nothing))
635 convert_move (to, convert_to_mode (intermediate, from,
636 unsignedp), unsignedp);
637 return;
640 /* No suitable intermediate mode.
641 Generate what we need with shifts. */
642 shift_amount = (GET_MODE_PRECISION (to_mode)
643 - GET_MODE_PRECISION (from_mode));
644 from = gen_lowpart (to_mode, force_reg (from_mode, from));
645 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
646 to, unsignedp);
647 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
648 to, unsignedp);
649 if (tmp != to)
650 emit_move_insn (to, tmp);
651 return;
655 /* Support special truncate insns for certain modes. */
656 if (convert_optab_handler (trunc_optab, to_mode,
657 from_mode) != CODE_FOR_nothing)
659 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
660 to, from, UNKNOWN);
661 return;
664 /* Handle truncation of volatile memrefs, and so on;
665 the things that couldn't be truncated directly,
666 and for which there was no special instruction.
668 ??? Code above formerly short-circuited this, for most integer
669 mode pairs, with a force_reg in from_mode followed by a recursive
670 call to this routine. Appears always to have been wrong. */
671 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
673 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
674 emit_move_insn (to, temp);
675 return;
678 /* Mode combination is not recognized. */
679 gcc_unreachable ();
682 /* Return an rtx for a value that would result
683 from converting X to mode MODE.
684 Both X and MODE may be floating, or both integer.
685 UNSIGNEDP is nonzero if X is an unsigned value.
686 This can be done by referring to a part of X in place
687 or by copying to a new temporary with conversion. */
690 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
692 return convert_modes (mode, VOIDmode, x, unsignedp);
695 /* Return an rtx for a value that would result
696 from converting X from mode OLDMODE to mode MODE.
697 Both modes may be floating, or both integer.
698 UNSIGNEDP is nonzero if X is an unsigned value.
700 This can be done by referring to a part of X in place
701 or by copying to a new temporary with conversion.
703 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
706 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
708 rtx temp;
710 /* If FROM is a SUBREG that indicates that we have already done at least
711 the required extension, strip it. */
713 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
714 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
715 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
716 x = gen_lowpart (mode, SUBREG_REG (x));
718 if (GET_MODE (x) != VOIDmode)
719 oldmode = GET_MODE (x);
721 if (mode == oldmode)
722 return x;
724 if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT)
726 /* If the caller did not tell us the old mode, then there is not
727 much to do with respect to canonicalization. We have to
728 assume that all the bits are significant. */
729 if (GET_MODE_CLASS (oldmode) != MODE_INT)
730 oldmode = MAX_MODE_INT;
731 wide_int w = wide_int::from (std::make_pair (x, oldmode),
732 GET_MODE_PRECISION (mode),
733 unsignedp ? UNSIGNED : SIGNED);
734 return immed_wide_int_const (w, mode);
737 /* We can do this with a gen_lowpart if both desired and current modes
738 are integer, and this is either a constant integer, a register, or a
739 non-volatile MEM. */
740 if (GET_MODE_CLASS (mode) == MODE_INT
741 && GET_MODE_CLASS (oldmode) == MODE_INT
742 && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode])
744 || (REG_P (x)
745 && (!HARD_REGISTER_P (x)
746 || HARD_REGNO_MODE_OK (REGNO (x), mode))
747 && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x)))))
749 return gen_lowpart (mode, x);
751 /* Converting from integer constant into mode is always equivalent to an
752 subreg operation. */
753 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
755 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
756 return simplify_gen_subreg (mode, x, oldmode, 0);
759 temp = gen_reg_rtx (mode);
760 convert_move (temp, x, unsignedp);
761 return temp;
764 /* Return the largest alignment we can use for doing a move (or store)
765 of MAX_PIECES. ALIGN is the largest alignment we could use. */
767 static unsigned int
768 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
770 machine_mode tmode;
772 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
773 if (align >= GET_MODE_ALIGNMENT (tmode))
774 align = GET_MODE_ALIGNMENT (tmode);
775 else
777 machine_mode tmode, xmode;
779 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
780 tmode != VOIDmode;
781 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
782 if (GET_MODE_SIZE (tmode) > max_pieces
783 || SLOW_UNALIGNED_ACCESS (tmode, align))
784 break;
786 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
789 return align;
792 /* Return the widest integer mode no wider than SIZE. If no such mode
793 can be found, return VOIDmode. */
795 static machine_mode
796 widest_int_mode_for_size (unsigned int size)
798 machine_mode tmode, mode = VOIDmode;
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
801 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
802 if (GET_MODE_SIZE (tmode) < size)
803 mode = tmode;
805 return mode;
808 /* Determine whether the LEN bytes can be moved by using several move
809 instructions. Return nonzero if a call to move_by_pieces should
810 succeed. */
813 can_move_by_pieces (unsigned HOST_WIDE_INT len,
814 unsigned int align)
816 return targetm.use_by_pieces_infrastructure_p (len, align, MOVE_BY_PIECES,
817 optimize_insn_for_speed_p ());
820 /* Generate several move instructions to copy LEN bytes from block FROM to
821 block TO. (These are MEM rtx's with BLKmode).
823 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
824 used to push FROM to the stack.
826 ALIGN is maximum stack alignment we can assume.
828 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
829 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
830 stpcpy. */
833 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
834 unsigned int align, int endp)
836 struct move_by_pieces_d data;
837 machine_mode to_addr_mode;
838 machine_mode from_addr_mode = get_address_mode (from);
839 rtx to_addr, from_addr = XEXP (from, 0);
840 unsigned int max_size = MOVE_MAX_PIECES + 1;
841 enum insn_code icode;
843 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
845 data.offset = 0;
846 data.from_addr = from_addr;
847 if (to)
849 to_addr_mode = get_address_mode (to);
850 to_addr = XEXP (to, 0);
851 data.to = to;
852 data.autinc_to
853 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
854 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
855 data.reverse
856 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
858 else
860 to_addr_mode = VOIDmode;
861 to_addr = NULL_RTX;
862 data.to = NULL_RTX;
863 data.autinc_to = 1;
864 if (STACK_GROWS_DOWNWARD)
865 data.reverse = 1;
866 else
867 data.reverse = 0;
869 data.to_addr = to_addr;
870 data.from = from;
871 data.autinc_from
872 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
873 || GET_CODE (from_addr) == POST_INC
874 || GET_CODE (from_addr) == POST_DEC);
876 data.explicit_inc_from = 0;
877 data.explicit_inc_to = 0;
878 if (data.reverse) data.offset = len;
879 data.len = len;
881 /* If copying requires more than two move insns,
882 copy addresses to registers (to make displacements shorter)
883 and use post-increment if available. */
884 if (!(data.autinc_from && data.autinc_to)
885 && move_by_pieces_ninsns (len, align, max_size) > 2)
887 /* Find the mode of the largest move...
888 MODE might not be used depending on the definitions of the
889 USE_* macros below. */
890 machine_mode mode ATTRIBUTE_UNUSED
891 = widest_int_mode_for_size (max_size);
893 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
895 data.from_addr = copy_to_mode_reg (from_addr_mode,
896 plus_constant (from_addr_mode,
897 from_addr, len));
898 data.autinc_from = 1;
899 data.explicit_inc_from = -1;
901 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
903 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
904 data.autinc_from = 1;
905 data.explicit_inc_from = 1;
907 if (!data.autinc_from && CONSTANT_P (from_addr))
908 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
909 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
911 data.to_addr = copy_to_mode_reg (to_addr_mode,
912 plus_constant (to_addr_mode,
913 to_addr, len));
914 data.autinc_to = 1;
915 data.explicit_inc_to = -1;
917 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
919 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
920 data.autinc_to = 1;
921 data.explicit_inc_to = 1;
923 if (!data.autinc_to && CONSTANT_P (to_addr))
924 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
927 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
929 /* First move what we can in the largest integer mode, then go to
930 successively smaller modes. */
932 while (max_size > 1 && data.len > 0)
934 machine_mode mode = widest_int_mode_for_size (max_size);
936 if (mode == VOIDmode)
937 break;
939 icode = optab_handler (mov_optab, mode);
940 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
941 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
943 max_size = GET_MODE_SIZE (mode);
946 /* The code above should have handled everything. */
947 gcc_assert (!data.len);
949 if (endp)
951 rtx to1;
953 gcc_assert (!data.reverse);
954 if (data.autinc_to)
956 if (endp == 2)
958 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
959 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
960 else
961 data.to_addr = copy_to_mode_reg (to_addr_mode,
962 plus_constant (to_addr_mode,
963 data.to_addr,
964 -1));
966 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
967 data.offset);
969 else
971 if (endp == 2)
972 --data.offset;
973 to1 = adjust_address (data.to, QImode, data.offset);
975 return to1;
977 else
978 return data.to;
981 /* Return number of insns required to move L bytes by pieces.
982 ALIGN (in bits) is maximum alignment we can assume. */
984 unsigned HOST_WIDE_INT
985 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
986 unsigned int max_size)
988 unsigned HOST_WIDE_INT n_insns = 0;
990 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
992 while (max_size > 1 && l > 0)
994 machine_mode mode;
995 enum insn_code icode;
997 mode = widest_int_mode_for_size (max_size);
999 if (mode == VOIDmode)
1000 break;
1002 icode = optab_handler (mov_optab, mode);
1003 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1004 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1006 max_size = GET_MODE_SIZE (mode);
1009 gcc_assert (!l);
1010 return n_insns;
1013 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1014 with move instructions for mode MODE. GENFUN is the gen_... function
1015 to make a move insn for that mode. DATA has all the other info. */
1017 static void
1018 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1019 struct move_by_pieces_d *data)
1021 unsigned int size = GET_MODE_SIZE (mode);
1022 rtx to1 = NULL_RTX, from1;
1024 while (data->len >= size)
1026 if (data->reverse)
1027 data->offset -= size;
1029 if (data->to)
1031 if (data->autinc_to)
1032 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1033 data->offset);
1034 else
1035 to1 = adjust_address (data->to, mode, data->offset);
1038 if (data->autinc_from)
1039 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1040 data->offset);
1041 else
1042 from1 = adjust_address (data->from, mode, data->offset);
1044 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1045 emit_insn (gen_add2_insn (data->to_addr,
1046 gen_int_mode (-(HOST_WIDE_INT) size,
1047 GET_MODE (data->to_addr))));
1048 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1049 emit_insn (gen_add2_insn (data->from_addr,
1050 gen_int_mode (-(HOST_WIDE_INT) size,
1051 GET_MODE (data->from_addr))));
1053 if (data->to)
1054 emit_insn ((*genfun) (to1, from1));
1055 else
1057 #ifdef PUSH_ROUNDING
1058 emit_single_push_insn (mode, from1, NULL);
1059 #else
1060 gcc_unreachable ();
1061 #endif
1064 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1065 emit_insn (gen_add2_insn (data->to_addr,
1066 gen_int_mode (size,
1067 GET_MODE (data->to_addr))));
1068 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1069 emit_insn (gen_add2_insn (data->from_addr,
1070 gen_int_mode (size,
1071 GET_MODE (data->from_addr))));
1073 if (! data->reverse)
1074 data->offset += size;
1076 data->len -= size;
1080 /* Emit code to move a block Y to a block X. This may be done with
1081 string-move instructions, with multiple scalar move instructions,
1082 or with a library call.
1084 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1085 SIZE is an rtx that says how long they are.
1086 ALIGN is the maximum alignment we can assume they have.
1087 METHOD describes what kind of copy this is, and what mechanisms may be used.
1088 MIN_SIZE is the minimal size of block to move
1089 MAX_SIZE is the maximal size of block to move, if it can not be represented
1090 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1092 Return the address of the new block, if memcpy is called and returns it,
1093 0 otherwise. */
1096 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1097 unsigned int expected_align, HOST_WIDE_INT expected_size,
1098 unsigned HOST_WIDE_INT min_size,
1099 unsigned HOST_WIDE_INT max_size,
1100 unsigned HOST_WIDE_INT probable_max_size)
1102 bool may_use_call;
1103 rtx retval = 0;
1104 unsigned int align;
1106 gcc_assert (size);
1107 if (CONST_INT_P (size)
1108 && INTVAL (size) == 0)
1109 return 0;
1111 switch (method)
1113 case BLOCK_OP_NORMAL:
1114 case BLOCK_OP_TAILCALL:
1115 may_use_call = true;
1116 break;
1118 case BLOCK_OP_CALL_PARM:
1119 may_use_call = block_move_libcall_safe_for_call_parm ();
1121 /* Make inhibit_defer_pop nonzero around the library call
1122 to force it to pop the arguments right away. */
1123 NO_DEFER_POP;
1124 break;
1126 case BLOCK_OP_NO_LIBCALL:
1127 may_use_call = false;
1128 break;
1130 default:
1131 gcc_unreachable ();
1134 gcc_assert (MEM_P (x) && MEM_P (y));
1135 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1136 gcc_assert (align >= BITS_PER_UNIT);
1138 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1139 block copy is more efficient for other large modes, e.g. DCmode. */
1140 x = adjust_address (x, BLKmode, 0);
1141 y = adjust_address (y, BLKmode, 0);
1143 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1144 can be incorrect is coming from __builtin_memcpy. */
1145 if (CONST_INT_P (size))
1147 x = shallow_copy_rtx (x);
1148 y = shallow_copy_rtx (y);
1149 set_mem_size (x, INTVAL (size));
1150 set_mem_size (y, INTVAL (size));
1153 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1154 move_by_pieces (x, y, INTVAL (size), align, 0);
1155 else if (emit_block_move_via_movmem (x, y, size, align,
1156 expected_align, expected_size,
1157 min_size, max_size, probable_max_size))
1159 else if (may_use_call
1160 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1161 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1163 /* Since x and y are passed to a libcall, mark the corresponding
1164 tree EXPR as addressable. */
1165 tree y_expr = MEM_EXPR (y);
1166 tree x_expr = MEM_EXPR (x);
1167 if (y_expr)
1168 mark_addressable (y_expr);
1169 if (x_expr)
1170 mark_addressable (x_expr);
1171 retval = emit_block_move_via_libcall (x, y, size,
1172 method == BLOCK_OP_TAILCALL);
1175 else
1176 emit_block_move_via_loop (x, y, size, align);
1178 if (method == BLOCK_OP_CALL_PARM)
1179 OK_DEFER_POP;
1181 return retval;
1185 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1187 unsigned HOST_WIDE_INT max, min = 0;
1188 if (GET_CODE (size) == CONST_INT)
1189 min = max = UINTVAL (size);
1190 else
1191 max = GET_MODE_MASK (GET_MODE (size));
1192 return emit_block_move_hints (x, y, size, method, 0, -1,
1193 min, max, max);
1196 /* A subroutine of emit_block_move. Returns true if calling the
1197 block move libcall will not clobber any parameters which may have
1198 already been placed on the stack. */
1200 static bool
1201 block_move_libcall_safe_for_call_parm (void)
1203 #if defined (REG_PARM_STACK_SPACE)
1204 tree fn;
1205 #endif
1207 /* If arguments are pushed on the stack, then they're safe. */
1208 if (PUSH_ARGS)
1209 return true;
1211 /* If registers go on the stack anyway, any argument is sure to clobber
1212 an outgoing argument. */
1213 #if defined (REG_PARM_STACK_SPACE)
1214 fn = emit_block_move_libcall_fn (false);
1215 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1216 depend on its argument. */
1217 (void) fn;
1218 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1219 && REG_PARM_STACK_SPACE (fn) != 0)
1220 return false;
1221 #endif
1223 /* If any argument goes in memory, then it might clobber an outgoing
1224 argument. */
1226 CUMULATIVE_ARGS args_so_far_v;
1227 cumulative_args_t args_so_far;
1228 tree fn, arg;
1230 fn = emit_block_move_libcall_fn (false);
1231 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1232 args_so_far = pack_cumulative_args (&args_so_far_v);
1234 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1235 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1237 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1238 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1239 NULL_TREE, true);
1240 if (!tmp || !REG_P (tmp))
1241 return false;
1242 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1243 return false;
1244 targetm.calls.function_arg_advance (args_so_far, mode,
1245 NULL_TREE, true);
1248 return true;
1251 /* A subroutine of emit_block_move. Expand a movmem pattern;
1252 return true if successful. */
1254 static bool
1255 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1256 unsigned int expected_align, HOST_WIDE_INT expected_size,
1257 unsigned HOST_WIDE_INT min_size,
1258 unsigned HOST_WIDE_INT max_size,
1259 unsigned HOST_WIDE_INT probable_max_size)
1261 int save_volatile_ok = volatile_ok;
1262 machine_mode mode;
1264 if (expected_align < align)
1265 expected_align = align;
1266 if (expected_size != -1)
1268 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1269 expected_size = probable_max_size;
1270 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1271 expected_size = min_size;
1274 /* Since this is a move insn, we don't care about volatility. */
1275 volatile_ok = 1;
1277 /* Try the most limited insn first, because there's no point
1278 including more than one in the machine description unless
1279 the more limited one has some advantage. */
1281 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1282 mode = GET_MODE_WIDER_MODE (mode))
1284 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1286 if (code != CODE_FOR_nothing
1287 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1288 here because if SIZE is less than the mode mask, as it is
1289 returned by the macro, it will definitely be less than the
1290 actual mode mask. Since SIZE is within the Pmode address
1291 space, we limit MODE to Pmode. */
1292 && ((CONST_INT_P (size)
1293 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1294 <= (GET_MODE_MASK (mode) >> 1)))
1295 || max_size <= (GET_MODE_MASK (mode) >> 1)
1296 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1298 struct expand_operand ops[9];
1299 unsigned int nops;
1301 /* ??? When called via emit_block_move_for_call, it'd be
1302 nice if there were some way to inform the backend, so
1303 that it doesn't fail the expansion because it thinks
1304 emitting the libcall would be more efficient. */
1305 nops = insn_data[(int) code].n_generator_args;
1306 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1308 create_fixed_operand (&ops[0], x);
1309 create_fixed_operand (&ops[1], y);
1310 /* The check above guarantees that this size conversion is valid. */
1311 create_convert_operand_to (&ops[2], size, mode, true);
1312 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1313 if (nops >= 6)
1315 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1316 create_integer_operand (&ops[5], expected_size);
1318 if (nops >= 8)
1320 create_integer_operand (&ops[6], min_size);
1321 /* If we can not represent the maximal size,
1322 make parameter NULL. */
1323 if ((HOST_WIDE_INT) max_size != -1)
1324 create_integer_operand (&ops[7], max_size);
1325 else
1326 create_fixed_operand (&ops[7], NULL);
1328 if (nops == 9)
1330 /* If we can not represent the maximal size,
1331 make parameter NULL. */
1332 if ((HOST_WIDE_INT) probable_max_size != -1)
1333 create_integer_operand (&ops[8], probable_max_size);
1334 else
1335 create_fixed_operand (&ops[8], NULL);
1337 if (maybe_expand_insn (code, nops, ops))
1339 volatile_ok = save_volatile_ok;
1340 return true;
1345 volatile_ok = save_volatile_ok;
1346 return false;
1349 /* A subroutine of emit_block_move. Expand a call to memcpy.
1350 Return the return value from memcpy, 0 otherwise. */
1353 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1355 rtx dst_addr, src_addr;
1356 tree call_expr, fn, src_tree, dst_tree, size_tree;
1357 machine_mode size_mode;
1358 rtx retval;
1360 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1361 pseudos. We can then place those new pseudos into a VAR_DECL and
1362 use them later. */
1364 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1365 src_addr = copy_addr_to_reg (XEXP (src, 0));
1367 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1368 src_addr = convert_memory_address (ptr_mode, src_addr);
1370 dst_tree = make_tree (ptr_type_node, dst_addr);
1371 src_tree = make_tree (ptr_type_node, src_addr);
1373 size_mode = TYPE_MODE (sizetype);
1375 size = convert_to_mode (size_mode, size, 1);
1376 size = copy_to_mode_reg (size_mode, size);
1378 /* It is incorrect to use the libcall calling conventions to call
1379 memcpy in this context. This could be a user call to memcpy and
1380 the user may wish to examine the return value from memcpy. For
1381 targets where libcalls and normal calls have different conventions
1382 for returning pointers, we could end up generating incorrect code. */
1384 size_tree = make_tree (sizetype, size);
1386 fn = emit_block_move_libcall_fn (true);
1387 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1388 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1390 retval = expand_normal (call_expr);
1392 return retval;
1395 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1396 for the function we use for block copies. */
1398 static GTY(()) tree block_move_fn;
1400 void
1401 init_block_move_fn (const char *asmspec)
1403 if (!block_move_fn)
1405 tree args, fn, attrs, attr_args;
1407 fn = get_identifier ("memcpy");
1408 args = build_function_type_list (ptr_type_node, ptr_type_node,
1409 const_ptr_type_node, sizetype,
1410 NULL_TREE);
1412 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1413 DECL_EXTERNAL (fn) = 1;
1414 TREE_PUBLIC (fn) = 1;
1415 DECL_ARTIFICIAL (fn) = 1;
1416 TREE_NOTHROW (fn) = 1;
1417 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1418 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1420 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1421 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1423 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1425 block_move_fn = fn;
1428 if (asmspec)
1429 set_user_assembler_name (block_move_fn, asmspec);
1432 static tree
1433 emit_block_move_libcall_fn (int for_call)
1435 static bool emitted_extern;
1437 if (!block_move_fn)
1438 init_block_move_fn (NULL);
1440 if (for_call && !emitted_extern)
1442 emitted_extern = true;
1443 make_decl_rtl (block_move_fn);
1446 return block_move_fn;
1449 /* A subroutine of emit_block_move. Copy the data via an explicit
1450 loop. This is used only when libcalls are forbidden. */
1451 /* ??? It'd be nice to copy in hunks larger than QImode. */
1453 static void
1454 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1455 unsigned int align ATTRIBUTE_UNUSED)
1457 rtx_code_label *cmp_label, *top_label;
1458 rtx iter, x_addr, y_addr, tmp;
1459 machine_mode x_addr_mode = get_address_mode (x);
1460 machine_mode y_addr_mode = get_address_mode (y);
1461 machine_mode iter_mode;
1463 iter_mode = GET_MODE (size);
1464 if (iter_mode == VOIDmode)
1465 iter_mode = word_mode;
1467 top_label = gen_label_rtx ();
1468 cmp_label = gen_label_rtx ();
1469 iter = gen_reg_rtx (iter_mode);
1471 emit_move_insn (iter, const0_rtx);
1473 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1474 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1475 do_pending_stack_adjust ();
1477 emit_jump (cmp_label);
1478 emit_label (top_label);
1480 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1481 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1483 if (x_addr_mode != y_addr_mode)
1484 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1485 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1487 x = change_address (x, QImode, x_addr);
1488 y = change_address (y, QImode, y_addr);
1490 emit_move_insn (x, y);
1492 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1493 true, OPTAB_LIB_WIDEN);
1494 if (tmp != iter)
1495 emit_move_insn (iter, tmp);
1497 emit_label (cmp_label);
1499 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1500 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1503 /* Copy all or part of a value X into registers starting at REGNO.
1504 The number of registers to be filled is NREGS. */
1506 void
1507 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
1509 int i;
1510 rtx pat;
1511 rtx_insn *last;
1513 if (nregs == 0)
1514 return;
1516 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1517 x = validize_mem (force_const_mem (mode, x));
1519 /* See if the machine can do this with a load multiple insn. */
1520 if (HAVE_load_multiple)
1522 last = get_last_insn ();
1523 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1524 GEN_INT (nregs));
1525 if (pat)
1527 emit_insn (pat);
1528 return;
1530 else
1531 delete_insns_since (last);
1534 for (i = 0; i < nregs; i++)
1535 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1536 operand_subword_force (x, i, mode));
1539 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1540 The number of registers to be filled is NREGS. */
1542 void
1543 move_block_from_reg (int regno, rtx x, int nregs)
1545 int i;
1547 if (nregs == 0)
1548 return;
1550 /* See if the machine can do this with a store multiple insn. */
1551 if (HAVE_store_multiple)
1553 rtx_insn *last = get_last_insn ();
1554 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1555 GEN_INT (nregs));
1556 if (pat)
1558 emit_insn (pat);
1559 return;
1561 else
1562 delete_insns_since (last);
1565 for (i = 0; i < nregs; i++)
1567 rtx tem = operand_subword (x, i, 1, BLKmode);
1569 gcc_assert (tem);
1571 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1575 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1576 ORIG, where ORIG is a non-consecutive group of registers represented by
1577 a PARALLEL. The clone is identical to the original except in that the
1578 original set of registers is replaced by a new set of pseudo registers.
1579 The new set has the same modes as the original set. */
1582 gen_group_rtx (rtx orig)
1584 int i, length;
1585 rtx *tmps;
1587 gcc_assert (GET_CODE (orig) == PARALLEL);
1589 length = XVECLEN (orig, 0);
1590 tmps = XALLOCAVEC (rtx, length);
1592 /* Skip a NULL entry in first slot. */
1593 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1595 if (i)
1596 tmps[0] = 0;
1598 for (; i < length; i++)
1600 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1601 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1603 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1606 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1609 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1610 except that values are placed in TMPS[i], and must later be moved
1611 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1613 static void
1614 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1616 rtx src;
1617 int start, i;
1618 machine_mode m = GET_MODE (orig_src);
1620 gcc_assert (GET_CODE (dst) == PARALLEL);
1622 if (m != VOIDmode
1623 && !SCALAR_INT_MODE_P (m)
1624 && !MEM_P (orig_src)
1625 && GET_CODE (orig_src) != CONCAT)
1627 machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1628 if (imode == BLKmode)
1629 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1630 else
1631 src = gen_reg_rtx (imode);
1632 if (imode != BLKmode)
1633 src = gen_lowpart (GET_MODE (orig_src), src);
1634 emit_move_insn (src, orig_src);
1635 /* ...and back again. */
1636 if (imode != BLKmode)
1637 src = gen_lowpart (imode, src);
1638 emit_group_load_1 (tmps, dst, src, type, ssize);
1639 return;
1642 /* Check for a NULL entry, used to indicate that the parameter goes
1643 both on the stack and in registers. */
1644 if (XEXP (XVECEXP (dst, 0, 0), 0))
1645 start = 0;
1646 else
1647 start = 1;
1649 /* Process the pieces. */
1650 for (i = start; i < XVECLEN (dst, 0); i++)
1652 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1653 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1654 unsigned int bytelen = GET_MODE_SIZE (mode);
1655 int shift = 0;
1657 /* Handle trailing fragments that run over the size of the struct. */
1658 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1660 /* Arrange to shift the fragment to where it belongs.
1661 extract_bit_field loads to the lsb of the reg. */
1662 if (
1663 #ifdef BLOCK_REG_PADDING
1664 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1665 == (BYTES_BIG_ENDIAN ? upward : downward)
1666 #else
1667 BYTES_BIG_ENDIAN
1668 #endif
1670 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1671 bytelen = ssize - bytepos;
1672 gcc_assert (bytelen > 0);
1675 /* If we won't be loading directly from memory, protect the real source
1676 from strange tricks we might play; but make sure that the source can
1677 be loaded directly into the destination. */
1678 src = orig_src;
1679 if (!MEM_P (orig_src)
1680 && (!CONSTANT_P (orig_src)
1681 || (GET_MODE (orig_src) != mode
1682 && GET_MODE (orig_src) != VOIDmode)))
1684 if (GET_MODE (orig_src) == VOIDmode)
1685 src = gen_reg_rtx (mode);
1686 else
1687 src = gen_reg_rtx (GET_MODE (orig_src));
1689 emit_move_insn (src, orig_src);
1692 /* Optimize the access just a bit. */
1693 if (MEM_P (src)
1694 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1695 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1696 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1697 && bytelen == GET_MODE_SIZE (mode))
1699 tmps[i] = gen_reg_rtx (mode);
1700 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1702 else if (COMPLEX_MODE_P (mode)
1703 && GET_MODE (src) == mode
1704 && bytelen == GET_MODE_SIZE (mode))
1705 /* Let emit_move_complex do the bulk of the work. */
1706 tmps[i] = src;
1707 else if (GET_CODE (src) == CONCAT)
1709 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1710 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1712 if ((bytepos == 0 && bytelen == slen0)
1713 || (bytepos != 0 && bytepos + bytelen <= slen))
1715 /* The following assumes that the concatenated objects all
1716 have the same size. In this case, a simple calculation
1717 can be used to determine the object and the bit field
1718 to be extracted. */
1719 tmps[i] = XEXP (src, bytepos / slen0);
1720 if (! CONSTANT_P (tmps[i])
1721 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1722 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1723 (bytepos % slen0) * BITS_PER_UNIT,
1724 1, NULL_RTX, mode, mode);
1726 else
1728 rtx mem;
1730 gcc_assert (!bytepos);
1731 mem = assign_stack_temp (GET_MODE (src), slen);
1732 emit_move_insn (mem, src);
1733 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1734 0, 1, NULL_RTX, mode, mode);
1737 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1738 SIMD register, which is currently broken. While we get GCC
1739 to emit proper RTL for these cases, let's dump to memory. */
1740 else if (VECTOR_MODE_P (GET_MODE (dst))
1741 && REG_P (src))
1743 int slen = GET_MODE_SIZE (GET_MODE (src));
1744 rtx mem;
1746 mem = assign_stack_temp (GET_MODE (src), slen);
1747 emit_move_insn (mem, src);
1748 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1750 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1751 && XVECLEN (dst, 0) > 1)
1752 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
1753 else if (CONSTANT_P (src))
1755 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1757 if (len == ssize)
1758 tmps[i] = src;
1759 else
1761 rtx first, second;
1763 /* TODO: const_wide_int can have sizes other than this... */
1764 gcc_assert (2 * len == ssize);
1765 split_double (src, &first, &second);
1766 if (i)
1767 tmps[i] = second;
1768 else
1769 tmps[i] = first;
1772 else if (REG_P (src) && GET_MODE (src) == mode)
1773 tmps[i] = src;
1774 else
1775 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1776 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1777 mode, mode);
1779 if (shift)
1780 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1781 shift, tmps[i], 0);
1785 /* Emit code to move a block SRC of type TYPE to a block DST,
1786 where DST is non-consecutive registers represented by a PARALLEL.
1787 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1788 if not known. */
1790 void
1791 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1793 rtx *tmps;
1794 int i;
1796 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1797 emit_group_load_1 (tmps, dst, src, type, ssize);
1799 /* Copy the extracted pieces into the proper (probable) hard regs. */
1800 for (i = 0; i < XVECLEN (dst, 0); i++)
1802 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1803 if (d == NULL)
1804 continue;
1805 emit_move_insn (d, tmps[i]);
1809 /* Similar, but load SRC into new pseudos in a format that looks like
1810 PARALLEL. This can later be fed to emit_group_move to get things
1811 in the right place. */
1814 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1816 rtvec vec;
1817 int i;
1819 vec = rtvec_alloc (XVECLEN (parallel, 0));
1820 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1822 /* Convert the vector to look just like the original PARALLEL, except
1823 with the computed values. */
1824 for (i = 0; i < XVECLEN (parallel, 0); i++)
1826 rtx e = XVECEXP (parallel, 0, i);
1827 rtx d = XEXP (e, 0);
1829 if (d)
1831 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1832 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1834 RTVEC_ELT (vec, i) = e;
1837 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1840 /* Emit code to move a block SRC to block DST, where SRC and DST are
1841 non-consecutive groups of registers, each represented by a PARALLEL. */
1843 void
1844 emit_group_move (rtx dst, rtx src)
1846 int i;
1848 gcc_assert (GET_CODE (src) == PARALLEL
1849 && GET_CODE (dst) == PARALLEL
1850 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1852 /* Skip first entry if NULL. */
1853 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1854 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1855 XEXP (XVECEXP (src, 0, i), 0));
1858 /* Move a group of registers represented by a PARALLEL into pseudos. */
1861 emit_group_move_into_temps (rtx src)
1863 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1864 int i;
1866 for (i = 0; i < XVECLEN (src, 0); i++)
1868 rtx e = XVECEXP (src, 0, i);
1869 rtx d = XEXP (e, 0);
1871 if (d)
1872 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1873 RTVEC_ELT (vec, i) = e;
1876 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1879 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1880 where SRC is non-consecutive registers represented by a PARALLEL.
1881 SSIZE represents the total size of block ORIG_DST, or -1 if not
1882 known. */
1884 void
1885 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1887 rtx *tmps, dst;
1888 int start, finish, i;
1889 machine_mode m = GET_MODE (orig_dst);
1891 gcc_assert (GET_CODE (src) == PARALLEL);
1893 if (!SCALAR_INT_MODE_P (m)
1894 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1896 machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1897 if (imode == BLKmode)
1898 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1899 else
1900 dst = gen_reg_rtx (imode);
1901 emit_group_store (dst, src, type, ssize);
1902 if (imode != BLKmode)
1903 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1904 emit_move_insn (orig_dst, dst);
1905 return;
1908 /* Check for a NULL entry, used to indicate that the parameter goes
1909 both on the stack and in registers. */
1910 if (XEXP (XVECEXP (src, 0, 0), 0))
1911 start = 0;
1912 else
1913 start = 1;
1914 finish = XVECLEN (src, 0);
1916 tmps = XALLOCAVEC (rtx, finish);
1918 /* Copy the (probable) hard regs into pseudos. */
1919 for (i = start; i < finish; i++)
1921 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1922 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1924 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1925 emit_move_insn (tmps[i], reg);
1927 else
1928 tmps[i] = reg;
1931 /* If we won't be storing directly into memory, protect the real destination
1932 from strange tricks we might play. */
1933 dst = orig_dst;
1934 if (GET_CODE (dst) == PARALLEL)
1936 rtx temp;
1938 /* We can get a PARALLEL dst if there is a conditional expression in
1939 a return statement. In that case, the dst and src are the same,
1940 so no action is necessary. */
1941 if (rtx_equal_p (dst, src))
1942 return;
1944 /* It is unclear if we can ever reach here, but we may as well handle
1945 it. Allocate a temporary, and split this into a store/load to/from
1946 the temporary. */
1947 temp = assign_stack_temp (GET_MODE (dst), ssize);
1948 emit_group_store (temp, src, type, ssize);
1949 emit_group_load (dst, temp, type, ssize);
1950 return;
1952 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1954 machine_mode outer = GET_MODE (dst);
1955 machine_mode inner;
1956 HOST_WIDE_INT bytepos;
1957 bool done = false;
1958 rtx temp;
1960 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1961 dst = gen_reg_rtx (outer);
1963 /* Make life a bit easier for combine. */
1964 /* If the first element of the vector is the low part
1965 of the destination mode, use a paradoxical subreg to
1966 initialize the destination. */
1967 if (start < finish)
1969 inner = GET_MODE (tmps[start]);
1970 bytepos = subreg_lowpart_offset (inner, outer);
1971 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1973 temp = simplify_gen_subreg (outer, tmps[start],
1974 inner, 0);
1975 if (temp)
1977 emit_move_insn (dst, temp);
1978 done = true;
1979 start++;
1984 /* If the first element wasn't the low part, try the last. */
1985 if (!done
1986 && start < finish - 1)
1988 inner = GET_MODE (tmps[finish - 1]);
1989 bytepos = subreg_lowpart_offset (inner, outer);
1990 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1992 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1993 inner, 0);
1994 if (temp)
1996 emit_move_insn (dst, temp);
1997 done = true;
1998 finish--;
2003 /* Otherwise, simply initialize the result to zero. */
2004 if (!done)
2005 emit_move_insn (dst, CONST0_RTX (outer));
2008 /* Process the pieces. */
2009 for (i = start; i < finish; i++)
2011 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2012 machine_mode mode = GET_MODE (tmps[i]);
2013 unsigned int bytelen = GET_MODE_SIZE (mode);
2014 unsigned int adj_bytelen;
2015 rtx dest = dst;
2017 /* Handle trailing fragments that run over the size of the struct. */
2018 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2019 adj_bytelen = ssize - bytepos;
2020 else
2021 adj_bytelen = bytelen;
2023 if (GET_CODE (dst) == CONCAT)
2025 if (bytepos + adj_bytelen
2026 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2027 dest = XEXP (dst, 0);
2028 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2030 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2031 dest = XEXP (dst, 1);
2033 else
2035 machine_mode dest_mode = GET_MODE (dest);
2036 machine_mode tmp_mode = GET_MODE (tmps[i]);
2038 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2040 if (GET_MODE_ALIGNMENT (dest_mode)
2041 >= GET_MODE_ALIGNMENT (tmp_mode))
2043 dest = assign_stack_temp (dest_mode,
2044 GET_MODE_SIZE (dest_mode));
2045 emit_move_insn (adjust_address (dest,
2046 tmp_mode,
2047 bytepos),
2048 tmps[i]);
2049 dst = dest;
2051 else
2053 dest = assign_stack_temp (tmp_mode,
2054 GET_MODE_SIZE (tmp_mode));
2055 emit_move_insn (dest, tmps[i]);
2056 dst = adjust_address (dest, dest_mode, bytepos);
2058 break;
2062 /* Handle trailing fragments that run over the size of the struct. */
2063 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2065 /* store_bit_field always takes its value from the lsb.
2066 Move the fragment to the lsb if it's not already there. */
2067 if (
2068 #ifdef BLOCK_REG_PADDING
2069 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2070 == (BYTES_BIG_ENDIAN ? upward : downward)
2071 #else
2072 BYTES_BIG_ENDIAN
2073 #endif
2076 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2077 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2078 shift, tmps[i], 0);
2081 /* Make sure not to write past the end of the struct. */
2082 store_bit_field (dest,
2083 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2084 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2085 VOIDmode, tmps[i]);
2088 /* Optimize the access just a bit. */
2089 else if (MEM_P (dest)
2090 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2091 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2092 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2093 && bytelen == GET_MODE_SIZE (mode))
2094 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2096 else
2097 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2098 0, 0, mode, tmps[i]);
2101 /* Copy from the pseudo into the (probable) hard reg. */
2102 if (orig_dst != dst)
2103 emit_move_insn (orig_dst, dst);
2106 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2107 of the value stored in X. */
2110 maybe_emit_group_store (rtx x, tree type)
2112 machine_mode mode = TYPE_MODE (type);
2113 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2114 if (GET_CODE (x) == PARALLEL)
2116 rtx result = gen_reg_rtx (mode);
2117 emit_group_store (result, x, type, int_size_in_bytes (type));
2118 return result;
2120 return x;
2123 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2125 This is used on targets that return BLKmode values in registers. */
2127 void
2128 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2130 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2131 rtx src = NULL, dst = NULL;
2132 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2133 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2134 machine_mode mode = GET_MODE (srcreg);
2135 machine_mode tmode = GET_MODE (target);
2136 machine_mode copy_mode;
2138 /* BLKmode registers created in the back-end shouldn't have survived. */
2139 gcc_assert (mode != BLKmode);
2141 /* If the structure doesn't take up a whole number of words, see whether
2142 SRCREG is padded on the left or on the right. If it's on the left,
2143 set PADDING_CORRECTION to the number of bits to skip.
2145 In most ABIs, the structure will be returned at the least end of
2146 the register, which translates to right padding on little-endian
2147 targets and left padding on big-endian targets. The opposite
2148 holds if the structure is returned at the most significant
2149 end of the register. */
2150 if (bytes % UNITS_PER_WORD != 0
2151 && (targetm.calls.return_in_msb (type)
2152 ? !BYTES_BIG_ENDIAN
2153 : BYTES_BIG_ENDIAN))
2154 padding_correction
2155 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2157 /* We can use a single move if we have an exact mode for the size. */
2158 else if (MEM_P (target)
2159 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2160 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2161 && bytes == GET_MODE_SIZE (mode))
2163 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2164 return;
2167 /* And if we additionally have the same mode for a register. */
2168 else if (REG_P (target)
2169 && GET_MODE (target) == mode
2170 && bytes == GET_MODE_SIZE (mode))
2172 emit_move_insn (target, srcreg);
2173 return;
2176 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2177 into a new pseudo which is a full word. */
2178 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2180 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2181 mode = word_mode;
2184 /* Copy the structure BITSIZE bits at a time. If the target lives in
2185 memory, take care of not reading/writing past its end by selecting
2186 a copy mode suited to BITSIZE. This should always be possible given
2187 how it is computed.
2189 If the target lives in register, make sure not to select a copy mode
2190 larger than the mode of the register.
2192 We could probably emit more efficient code for machines which do not use
2193 strict alignment, but it doesn't seem worth the effort at the current
2194 time. */
2196 copy_mode = word_mode;
2197 if (MEM_P (target))
2199 machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2200 if (mem_mode != BLKmode)
2201 copy_mode = mem_mode;
2203 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2204 copy_mode = tmode;
2206 for (bitpos = 0, xbitpos = padding_correction;
2207 bitpos < bytes * BITS_PER_UNIT;
2208 bitpos += bitsize, xbitpos += bitsize)
2210 /* We need a new source operand each time xbitpos is on a
2211 word boundary and when xbitpos == padding_correction
2212 (the first time through). */
2213 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2214 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2216 /* We need a new destination operand each time bitpos is on
2217 a word boundary. */
2218 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2219 dst = target;
2220 else if (bitpos % BITS_PER_WORD == 0)
2221 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2223 /* Use xbitpos for the source extraction (right justified) and
2224 bitpos for the destination store (left justified). */
2225 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2226 extract_bit_field (src, bitsize,
2227 xbitpos % BITS_PER_WORD, 1,
2228 NULL_RTX, copy_mode, copy_mode));
2232 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2233 register if it contains any data, otherwise return null.
2235 This is used on targets that return BLKmode values in registers. */
2238 copy_blkmode_to_reg (machine_mode mode, tree src)
2240 int i, n_regs;
2241 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2242 unsigned int bitsize;
2243 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2244 machine_mode dst_mode;
2246 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2248 x = expand_normal (src);
2250 bytes = int_size_in_bytes (TREE_TYPE (src));
2251 if (bytes == 0)
2252 return NULL_RTX;
2254 /* If the structure doesn't take up a whole number of words, see
2255 whether the register value should be padded on the left or on
2256 the right. Set PADDING_CORRECTION to the number of padding
2257 bits needed on the left side.
2259 In most ABIs, the structure will be returned at the least end of
2260 the register, which translates to right padding on little-endian
2261 targets and left padding on big-endian targets. The opposite
2262 holds if the structure is returned at the most significant
2263 end of the register. */
2264 if (bytes % UNITS_PER_WORD != 0
2265 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2266 ? !BYTES_BIG_ENDIAN
2267 : BYTES_BIG_ENDIAN))
2268 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2269 * BITS_PER_UNIT));
2271 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2272 dst_words = XALLOCAVEC (rtx, n_regs);
2273 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2275 /* Copy the structure BITSIZE bits at a time. */
2276 for (bitpos = 0, xbitpos = padding_correction;
2277 bitpos < bytes * BITS_PER_UNIT;
2278 bitpos += bitsize, xbitpos += bitsize)
2280 /* We need a new destination pseudo each time xbitpos is
2281 on a word boundary and when xbitpos == padding_correction
2282 (the first time through). */
2283 if (xbitpos % BITS_PER_WORD == 0
2284 || xbitpos == padding_correction)
2286 /* Generate an appropriate register. */
2287 dst_word = gen_reg_rtx (word_mode);
2288 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2290 /* Clear the destination before we move anything into it. */
2291 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2294 /* We need a new source operand each time bitpos is on a word
2295 boundary. */
2296 if (bitpos % BITS_PER_WORD == 0)
2297 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2299 /* Use bitpos for the source extraction (left justified) and
2300 xbitpos for the destination store (right justified). */
2301 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2302 0, 0, word_mode,
2303 extract_bit_field (src_word, bitsize,
2304 bitpos % BITS_PER_WORD, 1,
2305 NULL_RTX, word_mode, word_mode));
2308 if (mode == BLKmode)
2310 /* Find the smallest integer mode large enough to hold the
2311 entire structure. */
2312 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2313 mode != VOIDmode;
2314 mode = GET_MODE_WIDER_MODE (mode))
2315 /* Have we found a large enough mode? */
2316 if (GET_MODE_SIZE (mode) >= bytes)
2317 break;
2319 /* A suitable mode should have been found. */
2320 gcc_assert (mode != VOIDmode);
2323 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2324 dst_mode = word_mode;
2325 else
2326 dst_mode = mode;
2327 dst = gen_reg_rtx (dst_mode);
2329 for (i = 0; i < n_regs; i++)
2330 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2332 if (mode != dst_mode)
2333 dst = gen_lowpart (mode, dst);
2335 return dst;
2338 /* Add a USE expression for REG to the (possibly empty) list pointed
2339 to by CALL_FUSAGE. REG must denote a hard register. */
2341 void
2342 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2344 gcc_assert (REG_P (reg));
2346 if (!HARD_REGISTER_P (reg))
2347 return;
2349 *call_fusage
2350 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2353 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2354 to by CALL_FUSAGE. REG must denote a hard register. */
2356 void
2357 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2359 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2361 *call_fusage
2362 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2365 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2366 starting at REGNO. All of these registers must be hard registers. */
2368 void
2369 use_regs (rtx *call_fusage, int regno, int nregs)
2371 int i;
2373 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2375 for (i = 0; i < nregs; i++)
2376 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2379 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2380 PARALLEL REGS. This is for calls that pass values in multiple
2381 non-contiguous locations. The Irix 6 ABI has examples of this. */
2383 void
2384 use_group_regs (rtx *call_fusage, rtx regs)
2386 int i;
2388 for (i = 0; i < XVECLEN (regs, 0); i++)
2390 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2392 /* A NULL entry means the parameter goes both on the stack and in
2393 registers. This can also be a MEM for targets that pass values
2394 partially on the stack and partially in registers. */
2395 if (reg != 0 && REG_P (reg))
2396 use_reg (call_fusage, reg);
2400 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2401 assigment and the code of the expresion on the RHS is CODE. Return
2402 NULL otherwise. */
2404 static gimple
2405 get_def_for_expr (tree name, enum tree_code code)
2407 gimple def_stmt;
2409 if (TREE_CODE (name) != SSA_NAME)
2410 return NULL;
2412 def_stmt = get_gimple_for_ssa_name (name);
2413 if (!def_stmt
2414 || gimple_assign_rhs_code (def_stmt) != code)
2415 return NULL;
2417 return def_stmt;
2420 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2421 assigment and the class of the expresion on the RHS is CLASS. Return
2422 NULL otherwise. */
2424 static gimple
2425 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2427 gimple def_stmt;
2429 if (TREE_CODE (name) != SSA_NAME)
2430 return NULL;
2432 def_stmt = get_gimple_for_ssa_name (name);
2433 if (!def_stmt
2434 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2435 return NULL;
2437 return def_stmt;
2441 /* Determine whether the LEN bytes generated by CONSTFUN can be
2442 stored to memory using several move instructions. CONSTFUNDATA is
2443 a pointer which will be passed as argument in every CONSTFUN call.
2444 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2445 a memset operation and false if it's a copy of a constant string.
2446 Return nonzero if a call to store_by_pieces should succeed. */
2449 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2450 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2451 void *constfundata, unsigned int align, bool memsetp)
2453 unsigned HOST_WIDE_INT l;
2454 unsigned int max_size;
2455 HOST_WIDE_INT offset = 0;
2456 machine_mode mode;
2457 enum insn_code icode;
2458 int reverse;
2459 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2460 rtx cst ATTRIBUTE_UNUSED;
2462 if (len == 0)
2463 return 1;
2465 if (!targetm.use_by_pieces_infrastructure_p (len, align,
2466 memsetp
2467 ? SET_BY_PIECES
2468 : STORE_BY_PIECES,
2469 optimize_insn_for_speed_p ()))
2470 return 0;
2472 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2474 /* We would first store what we can in the largest integer mode, then go to
2475 successively smaller modes. */
2477 for (reverse = 0;
2478 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2479 reverse++)
2481 l = len;
2482 max_size = STORE_MAX_PIECES + 1;
2483 while (max_size > 1 && l > 0)
2485 mode = widest_int_mode_for_size (max_size);
2487 if (mode == VOIDmode)
2488 break;
2490 icode = optab_handler (mov_optab, mode);
2491 if (icode != CODE_FOR_nothing
2492 && align >= GET_MODE_ALIGNMENT (mode))
2494 unsigned int size = GET_MODE_SIZE (mode);
2496 while (l >= size)
2498 if (reverse)
2499 offset -= size;
2501 cst = (*constfun) (constfundata, offset, mode);
2502 if (!targetm.legitimate_constant_p (mode, cst))
2503 return 0;
2505 if (!reverse)
2506 offset += size;
2508 l -= size;
2512 max_size = GET_MODE_SIZE (mode);
2515 /* The code above should have handled everything. */
2516 gcc_assert (!l);
2519 return 1;
2522 /* Generate several move instructions to store LEN bytes generated by
2523 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2524 pointer which will be passed as argument in every CONSTFUN call.
2525 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2526 a memset operation and false if it's a copy of a constant string.
2527 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2528 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2529 stpcpy. */
2532 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2533 rtx (*constfun) (void *, HOST_WIDE_INT, machine_mode),
2534 void *constfundata, unsigned int align, bool memsetp, int endp)
2536 machine_mode to_addr_mode = get_address_mode (to);
2537 struct store_by_pieces_d data;
2539 if (len == 0)
2541 gcc_assert (endp != 2);
2542 return to;
2545 gcc_assert (targetm.use_by_pieces_infrastructure_p
2546 (len, align,
2547 memsetp
2548 ? SET_BY_PIECES
2549 : STORE_BY_PIECES,
2550 optimize_insn_for_speed_p ()));
2552 data.constfun = constfun;
2553 data.constfundata = constfundata;
2554 data.len = len;
2555 data.to = to;
2556 store_by_pieces_1 (&data, align);
2557 if (endp)
2559 rtx to1;
2561 gcc_assert (!data.reverse);
2562 if (data.autinc_to)
2564 if (endp == 2)
2566 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2567 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2568 else
2569 data.to_addr = copy_to_mode_reg (to_addr_mode,
2570 plus_constant (to_addr_mode,
2571 data.to_addr,
2572 -1));
2574 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2575 data.offset);
2577 else
2579 if (endp == 2)
2580 --data.offset;
2581 to1 = adjust_address (data.to, QImode, data.offset);
2583 return to1;
2585 else
2586 return data.to;
2589 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2590 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2592 static void
2593 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2595 struct store_by_pieces_d data;
2597 if (len == 0)
2598 return;
2600 data.constfun = clear_by_pieces_1;
2601 data.constfundata = NULL;
2602 data.len = len;
2603 data.to = to;
2604 store_by_pieces_1 (&data, align);
2607 /* Callback routine for clear_by_pieces.
2608 Return const0_rtx unconditionally. */
2610 static rtx
2611 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2612 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2613 machine_mode mode ATTRIBUTE_UNUSED)
2615 return const0_rtx;
2618 /* Subroutine of clear_by_pieces and store_by_pieces.
2619 Generate several move instructions to store LEN bytes of block TO. (A MEM
2620 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2622 static void
2623 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2624 unsigned int align ATTRIBUTE_UNUSED)
2626 machine_mode to_addr_mode = get_address_mode (data->to);
2627 rtx to_addr = XEXP (data->to, 0);
2628 unsigned int max_size = STORE_MAX_PIECES + 1;
2629 enum insn_code icode;
2631 data->offset = 0;
2632 data->to_addr = to_addr;
2633 data->autinc_to
2634 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2635 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2637 data->explicit_inc_to = 0;
2638 data->reverse
2639 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2640 if (data->reverse)
2641 data->offset = data->len;
2643 /* If storing requires more than two move insns,
2644 copy addresses to registers (to make displacements shorter)
2645 and use post-increment if available. */
2646 if (!data->autinc_to
2647 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2649 /* Determine the main mode we'll be using.
2650 MODE might not be used depending on the definitions of the
2651 USE_* macros below. */
2652 machine_mode mode ATTRIBUTE_UNUSED
2653 = widest_int_mode_for_size (max_size);
2655 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2657 data->to_addr = copy_to_mode_reg (to_addr_mode,
2658 plus_constant (to_addr_mode,
2659 to_addr,
2660 data->len));
2661 data->autinc_to = 1;
2662 data->explicit_inc_to = -1;
2665 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2666 && ! data->autinc_to)
2668 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2669 data->autinc_to = 1;
2670 data->explicit_inc_to = 1;
2673 if ( !data->autinc_to && CONSTANT_P (to_addr))
2674 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2677 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2679 /* First store what we can in the largest integer mode, then go to
2680 successively smaller modes. */
2682 while (max_size > 1 && data->len > 0)
2684 machine_mode mode = widest_int_mode_for_size (max_size);
2686 if (mode == VOIDmode)
2687 break;
2689 icode = optab_handler (mov_optab, mode);
2690 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2691 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2693 max_size = GET_MODE_SIZE (mode);
2696 /* The code above should have handled everything. */
2697 gcc_assert (!data->len);
2700 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2701 with move instructions for mode MODE. GENFUN is the gen_... function
2702 to make a move insn for that mode. DATA has all the other info. */
2704 static void
2705 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2706 struct store_by_pieces_d *data)
2708 unsigned int size = GET_MODE_SIZE (mode);
2709 rtx to1, cst;
2711 while (data->len >= size)
2713 if (data->reverse)
2714 data->offset -= size;
2716 if (data->autinc_to)
2717 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2718 data->offset);
2719 else
2720 to1 = adjust_address (data->to, mode, data->offset);
2722 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2723 emit_insn (gen_add2_insn (data->to_addr,
2724 gen_int_mode (-(HOST_WIDE_INT) size,
2725 GET_MODE (data->to_addr))));
2727 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2728 emit_insn ((*genfun) (to1, cst));
2730 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2731 emit_insn (gen_add2_insn (data->to_addr,
2732 gen_int_mode (size,
2733 GET_MODE (data->to_addr))));
2735 if (! data->reverse)
2736 data->offset += size;
2738 data->len -= size;
2742 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2743 its length in bytes. */
2746 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2747 unsigned int expected_align, HOST_WIDE_INT expected_size,
2748 unsigned HOST_WIDE_INT min_size,
2749 unsigned HOST_WIDE_INT max_size,
2750 unsigned HOST_WIDE_INT probable_max_size)
2752 machine_mode mode = GET_MODE (object);
2753 unsigned int align;
2755 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2757 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2758 just move a zero. Otherwise, do this a piece at a time. */
2759 if (mode != BLKmode
2760 && CONST_INT_P (size)
2761 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2763 rtx zero = CONST0_RTX (mode);
2764 if (zero != NULL)
2766 emit_move_insn (object, zero);
2767 return NULL;
2770 if (COMPLEX_MODE_P (mode))
2772 zero = CONST0_RTX (GET_MODE_INNER (mode));
2773 if (zero != NULL)
2775 write_complex_part (object, zero, 0);
2776 write_complex_part (object, zero, 1);
2777 return NULL;
2782 if (size == const0_rtx)
2783 return NULL;
2785 align = MEM_ALIGN (object);
2787 if (CONST_INT_P (size)
2788 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
2789 CLEAR_BY_PIECES,
2790 optimize_insn_for_speed_p ()))
2791 clear_by_pieces (object, INTVAL (size), align);
2792 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2793 expected_align, expected_size,
2794 min_size, max_size, probable_max_size))
2796 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2797 return set_storage_via_libcall (object, size, const0_rtx,
2798 method == BLOCK_OP_TAILCALL);
2799 else
2800 gcc_unreachable ();
2802 return NULL;
2806 clear_storage (rtx object, rtx size, enum block_op_methods method)
2808 unsigned HOST_WIDE_INT max, min = 0;
2809 if (GET_CODE (size) == CONST_INT)
2810 min = max = UINTVAL (size);
2811 else
2812 max = GET_MODE_MASK (GET_MODE (size));
2813 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
2817 /* A subroutine of clear_storage. Expand a call to memset.
2818 Return the return value of memset, 0 otherwise. */
2821 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2823 tree call_expr, fn, object_tree, size_tree, val_tree;
2824 machine_mode size_mode;
2825 rtx retval;
2827 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2828 place those into new pseudos into a VAR_DECL and use them later. */
2830 object = copy_addr_to_reg (XEXP (object, 0));
2832 size_mode = TYPE_MODE (sizetype);
2833 size = convert_to_mode (size_mode, size, 1);
2834 size = copy_to_mode_reg (size_mode, size);
2836 /* It is incorrect to use the libcall calling conventions to call
2837 memset in this context. This could be a user call to memset and
2838 the user may wish to examine the return value from memset. For
2839 targets where libcalls and normal calls have different conventions
2840 for returning pointers, we could end up generating incorrect code. */
2842 object_tree = make_tree (ptr_type_node, object);
2843 if (!CONST_INT_P (val))
2844 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2845 size_tree = make_tree (sizetype, size);
2846 val_tree = make_tree (integer_type_node, val);
2848 fn = clear_storage_libcall_fn (true);
2849 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2850 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2852 retval = expand_normal (call_expr);
2854 return retval;
2857 /* A subroutine of set_storage_via_libcall. Create the tree node
2858 for the function we use for block clears. */
2860 tree block_clear_fn;
2862 void
2863 init_block_clear_fn (const char *asmspec)
2865 if (!block_clear_fn)
2867 tree fn, args;
2869 fn = get_identifier ("memset");
2870 args = build_function_type_list (ptr_type_node, ptr_type_node,
2871 integer_type_node, sizetype,
2872 NULL_TREE);
2874 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2875 DECL_EXTERNAL (fn) = 1;
2876 TREE_PUBLIC (fn) = 1;
2877 DECL_ARTIFICIAL (fn) = 1;
2878 TREE_NOTHROW (fn) = 1;
2879 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2880 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2882 block_clear_fn = fn;
2885 if (asmspec)
2886 set_user_assembler_name (block_clear_fn, asmspec);
2889 static tree
2890 clear_storage_libcall_fn (int for_call)
2892 static bool emitted_extern;
2894 if (!block_clear_fn)
2895 init_block_clear_fn (NULL);
2897 if (for_call && !emitted_extern)
2899 emitted_extern = true;
2900 make_decl_rtl (block_clear_fn);
2903 return block_clear_fn;
2906 /* Expand a setmem pattern; return true if successful. */
2908 bool
2909 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2910 unsigned int expected_align, HOST_WIDE_INT expected_size,
2911 unsigned HOST_WIDE_INT min_size,
2912 unsigned HOST_WIDE_INT max_size,
2913 unsigned HOST_WIDE_INT probable_max_size)
2915 /* Try the most limited insn first, because there's no point
2916 including more than one in the machine description unless
2917 the more limited one has some advantage. */
2919 machine_mode mode;
2921 if (expected_align < align)
2922 expected_align = align;
2923 if (expected_size != -1)
2925 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
2926 expected_size = max_size;
2927 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
2928 expected_size = min_size;
2931 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2932 mode = GET_MODE_WIDER_MODE (mode))
2934 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2936 if (code != CODE_FOR_nothing
2937 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2938 here because if SIZE is less than the mode mask, as it is
2939 returned by the macro, it will definitely be less than the
2940 actual mode mask. Since SIZE is within the Pmode address
2941 space, we limit MODE to Pmode. */
2942 && ((CONST_INT_P (size)
2943 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2944 <= (GET_MODE_MASK (mode) >> 1)))
2945 || max_size <= (GET_MODE_MASK (mode) >> 1)
2946 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
2948 struct expand_operand ops[9];
2949 unsigned int nops;
2951 nops = insn_data[(int) code].n_generator_args;
2952 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
2954 create_fixed_operand (&ops[0], object);
2955 /* The check above guarantees that this size conversion is valid. */
2956 create_convert_operand_to (&ops[1], size, mode, true);
2957 create_convert_operand_from (&ops[2], val, byte_mode, true);
2958 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2959 if (nops >= 6)
2961 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2962 create_integer_operand (&ops[5], expected_size);
2964 if (nops >= 8)
2966 create_integer_operand (&ops[6], min_size);
2967 /* If we can not represent the maximal size,
2968 make parameter NULL. */
2969 if ((HOST_WIDE_INT) max_size != -1)
2970 create_integer_operand (&ops[7], max_size);
2971 else
2972 create_fixed_operand (&ops[7], NULL);
2974 if (nops == 9)
2976 /* If we can not represent the maximal size,
2977 make parameter NULL. */
2978 if ((HOST_WIDE_INT) probable_max_size != -1)
2979 create_integer_operand (&ops[8], probable_max_size);
2980 else
2981 create_fixed_operand (&ops[8], NULL);
2983 if (maybe_expand_insn (code, nops, ops))
2984 return true;
2988 return false;
2992 /* Write to one of the components of the complex value CPLX. Write VAL to
2993 the real part if IMAG_P is false, and the imaginary part if its true. */
2995 void
2996 write_complex_part (rtx cplx, rtx val, bool imag_p)
2998 machine_mode cmode;
2999 machine_mode imode;
3000 unsigned ibitsize;
3002 if (GET_CODE (cplx) == CONCAT)
3004 emit_move_insn (XEXP (cplx, imag_p), val);
3005 return;
3008 cmode = GET_MODE (cplx);
3009 imode = GET_MODE_INNER (cmode);
3010 ibitsize = GET_MODE_BITSIZE (imode);
3012 /* For MEMs simplify_gen_subreg may generate an invalid new address
3013 because, e.g., the original address is considered mode-dependent
3014 by the target, which restricts simplify_subreg from invoking
3015 adjust_address_nv. Instead of preparing fallback support for an
3016 invalid address, we call adjust_address_nv directly. */
3017 if (MEM_P (cplx))
3019 emit_move_insn (adjust_address_nv (cplx, imode,
3020 imag_p ? GET_MODE_SIZE (imode) : 0),
3021 val);
3022 return;
3025 /* If the sub-object is at least word sized, then we know that subregging
3026 will work. This special case is important, since store_bit_field
3027 wants to operate on integer modes, and there's rarely an OImode to
3028 correspond to TCmode. */
3029 if (ibitsize >= BITS_PER_WORD
3030 /* For hard regs we have exact predicates. Assume we can split
3031 the original object if it spans an even number of hard regs.
3032 This special case is important for SCmode on 64-bit platforms
3033 where the natural size of floating-point regs is 32-bit. */
3034 || (REG_P (cplx)
3035 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3036 && REG_NREGS (cplx) % 2 == 0))
3038 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3039 imag_p ? GET_MODE_SIZE (imode) : 0);
3040 if (part)
3042 emit_move_insn (part, val);
3043 return;
3045 else
3046 /* simplify_gen_subreg may fail for sub-word MEMs. */
3047 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3050 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
3053 /* Extract one of the components of the complex value CPLX. Extract the
3054 real part if IMAG_P is false, and the imaginary part if it's true. */
3056 static rtx
3057 read_complex_part (rtx cplx, bool imag_p)
3059 machine_mode cmode, imode;
3060 unsigned ibitsize;
3062 if (GET_CODE (cplx) == CONCAT)
3063 return XEXP (cplx, imag_p);
3065 cmode = GET_MODE (cplx);
3066 imode = GET_MODE_INNER (cmode);
3067 ibitsize = GET_MODE_BITSIZE (imode);
3069 /* Special case reads from complex constants that got spilled to memory. */
3070 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3072 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3073 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3075 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3076 if (CONSTANT_CLASS_P (part))
3077 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3081 /* For MEMs simplify_gen_subreg may generate an invalid new address
3082 because, e.g., the original address is considered mode-dependent
3083 by the target, which restricts simplify_subreg from invoking
3084 adjust_address_nv. Instead of preparing fallback support for an
3085 invalid address, we call adjust_address_nv directly. */
3086 if (MEM_P (cplx))
3087 return adjust_address_nv (cplx, imode,
3088 imag_p ? GET_MODE_SIZE (imode) : 0);
3090 /* If the sub-object is at least word sized, then we know that subregging
3091 will work. This special case is important, since extract_bit_field
3092 wants to operate on integer modes, and there's rarely an OImode to
3093 correspond to TCmode. */
3094 if (ibitsize >= BITS_PER_WORD
3095 /* For hard regs we have exact predicates. Assume we can split
3096 the original object if it spans an even number of hard regs.
3097 This special case is important for SCmode on 64-bit platforms
3098 where the natural size of floating-point regs is 32-bit. */
3099 || (REG_P (cplx)
3100 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3101 && REG_NREGS (cplx) % 2 == 0))
3103 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3104 imag_p ? GET_MODE_SIZE (imode) : 0);
3105 if (ret)
3106 return ret;
3107 else
3108 /* simplify_gen_subreg may fail for sub-word MEMs. */
3109 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3112 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3113 true, NULL_RTX, imode, imode);
3116 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3117 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3118 represented in NEW_MODE. If FORCE is true, this will never happen, as
3119 we'll force-create a SUBREG if needed. */
3121 static rtx
3122 emit_move_change_mode (machine_mode new_mode,
3123 machine_mode old_mode, rtx x, bool force)
3125 rtx ret;
3127 if (push_operand (x, GET_MODE (x)))
3129 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3130 MEM_COPY_ATTRIBUTES (ret, x);
3132 else if (MEM_P (x))
3134 /* We don't have to worry about changing the address since the
3135 size in bytes is supposed to be the same. */
3136 if (reload_in_progress)
3138 /* Copy the MEM to change the mode and move any
3139 substitutions from the old MEM to the new one. */
3140 ret = adjust_address_nv (x, new_mode, 0);
3141 copy_replacements (x, ret);
3143 else
3144 ret = adjust_address (x, new_mode, 0);
3146 else
3148 /* Note that we do want simplify_subreg's behavior of validating
3149 that the new mode is ok for a hard register. If we were to use
3150 simplify_gen_subreg, we would create the subreg, but would
3151 probably run into the target not being able to implement it. */
3152 /* Except, of course, when FORCE is true, when this is exactly what
3153 we want. Which is needed for CCmodes on some targets. */
3154 if (force)
3155 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3156 else
3157 ret = simplify_subreg (new_mode, x, old_mode, 0);
3160 return ret;
3163 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3164 an integer mode of the same size as MODE. Returns the instruction
3165 emitted, or NULL if such a move could not be generated. */
3167 static rtx_insn *
3168 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3170 machine_mode imode;
3171 enum insn_code code;
3173 /* There must exist a mode of the exact size we require. */
3174 imode = int_mode_for_mode (mode);
3175 if (imode == BLKmode)
3176 return NULL;
3178 /* The target must support moves in this mode. */
3179 code = optab_handler (mov_optab, imode);
3180 if (code == CODE_FOR_nothing)
3181 return NULL;
3183 x = emit_move_change_mode (imode, mode, x, force);
3184 if (x == NULL_RTX)
3185 return NULL;
3186 y = emit_move_change_mode (imode, mode, y, force);
3187 if (y == NULL_RTX)
3188 return NULL;
3189 return emit_insn (GEN_FCN (code) (x, y));
3192 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3193 Return an equivalent MEM that does not use an auto-increment. */
3196 emit_move_resolve_push (machine_mode mode, rtx x)
3198 enum rtx_code code = GET_CODE (XEXP (x, 0));
3199 HOST_WIDE_INT adjust;
3200 rtx temp;
3202 adjust = GET_MODE_SIZE (mode);
3203 #ifdef PUSH_ROUNDING
3204 adjust = PUSH_ROUNDING (adjust);
3205 #endif
3206 if (code == PRE_DEC || code == POST_DEC)
3207 adjust = -adjust;
3208 else if (code == PRE_MODIFY || code == POST_MODIFY)
3210 rtx expr = XEXP (XEXP (x, 0), 1);
3211 HOST_WIDE_INT val;
3213 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3214 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3215 val = INTVAL (XEXP (expr, 1));
3216 if (GET_CODE (expr) == MINUS)
3217 val = -val;
3218 gcc_assert (adjust == val || adjust == -val);
3219 adjust = val;
3222 /* Do not use anti_adjust_stack, since we don't want to update
3223 stack_pointer_delta. */
3224 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3225 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3226 0, OPTAB_LIB_WIDEN);
3227 if (temp != stack_pointer_rtx)
3228 emit_move_insn (stack_pointer_rtx, temp);
3230 switch (code)
3232 case PRE_INC:
3233 case PRE_DEC:
3234 case PRE_MODIFY:
3235 temp = stack_pointer_rtx;
3236 break;
3237 case POST_INC:
3238 case POST_DEC:
3239 case POST_MODIFY:
3240 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3241 break;
3242 default:
3243 gcc_unreachable ();
3246 return replace_equiv_address (x, temp);
3249 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3250 X is known to satisfy push_operand, and MODE is known to be complex.
3251 Returns the last instruction emitted. */
3253 rtx_insn *
3254 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3256 machine_mode submode = GET_MODE_INNER (mode);
3257 bool imag_first;
3259 #ifdef PUSH_ROUNDING
3260 unsigned int submodesize = GET_MODE_SIZE (submode);
3262 /* In case we output to the stack, but the size is smaller than the
3263 machine can push exactly, we need to use move instructions. */
3264 if (PUSH_ROUNDING (submodesize) != submodesize)
3266 x = emit_move_resolve_push (mode, x);
3267 return emit_move_insn (x, y);
3269 #endif
3271 /* Note that the real part always precedes the imag part in memory
3272 regardless of machine's endianness. */
3273 switch (GET_CODE (XEXP (x, 0)))
3275 case PRE_DEC:
3276 case POST_DEC:
3277 imag_first = true;
3278 break;
3279 case PRE_INC:
3280 case POST_INC:
3281 imag_first = false;
3282 break;
3283 default:
3284 gcc_unreachable ();
3287 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3288 read_complex_part (y, imag_first));
3289 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3290 read_complex_part (y, !imag_first));
3293 /* A subroutine of emit_move_complex. Perform the move from Y to X
3294 via two moves of the parts. Returns the last instruction emitted. */
3296 rtx_insn *
3297 emit_move_complex_parts (rtx x, rtx y)
3299 /* Show the output dies here. This is necessary for SUBREGs
3300 of pseudos since we cannot track their lifetimes correctly;
3301 hard regs shouldn't appear here except as return values. */
3302 if (!reload_completed && !reload_in_progress
3303 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3304 emit_clobber (x);
3306 write_complex_part (x, read_complex_part (y, false), false);
3307 write_complex_part (x, read_complex_part (y, true), true);
3309 return get_last_insn ();
3312 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3313 MODE is known to be complex. Returns the last instruction emitted. */
3315 static rtx_insn *
3316 emit_move_complex (machine_mode mode, rtx x, rtx y)
3318 bool try_int;
3320 /* Need to take special care for pushes, to maintain proper ordering
3321 of the data, and possibly extra padding. */
3322 if (push_operand (x, mode))
3323 return emit_move_complex_push (mode, x, y);
3325 /* See if we can coerce the target into moving both values at once, except
3326 for floating point where we favor moving as parts if this is easy. */
3327 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3328 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3329 && !(REG_P (x)
3330 && HARD_REGISTER_P (x)
3331 && REG_NREGS (x) == 1)
3332 && !(REG_P (y)
3333 && HARD_REGISTER_P (y)
3334 && REG_NREGS (y) == 1))
3335 try_int = false;
3336 /* Not possible if the values are inherently not adjacent. */
3337 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3338 try_int = false;
3339 /* Is possible if both are registers (or subregs of registers). */
3340 else if (register_operand (x, mode) && register_operand (y, mode))
3341 try_int = true;
3342 /* If one of the operands is a memory, and alignment constraints
3343 are friendly enough, we may be able to do combined memory operations.
3344 We do not attempt this if Y is a constant because that combination is
3345 usually better with the by-parts thing below. */
3346 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3347 && (!STRICT_ALIGNMENT
3348 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3349 try_int = true;
3350 else
3351 try_int = false;
3353 if (try_int)
3355 rtx_insn *ret;
3357 /* For memory to memory moves, optimal behavior can be had with the
3358 existing block move logic. */
3359 if (MEM_P (x) && MEM_P (y))
3361 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3362 BLOCK_OP_NO_LIBCALL);
3363 return get_last_insn ();
3366 ret = emit_move_via_integer (mode, x, y, true);
3367 if (ret)
3368 return ret;
3371 return emit_move_complex_parts (x, y);
3374 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3375 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3377 static rtx_insn *
3378 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3380 rtx_insn *ret;
3382 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3383 if (mode != CCmode)
3385 enum insn_code code = optab_handler (mov_optab, CCmode);
3386 if (code != CODE_FOR_nothing)
3388 x = emit_move_change_mode (CCmode, mode, x, true);
3389 y = emit_move_change_mode (CCmode, mode, y, true);
3390 return emit_insn (GEN_FCN (code) (x, y));
3394 /* Otherwise, find the MODE_INT mode of the same width. */
3395 ret = emit_move_via_integer (mode, x, y, false);
3396 gcc_assert (ret != NULL);
3397 return ret;
3400 /* Return true if word I of OP lies entirely in the
3401 undefined bits of a paradoxical subreg. */
3403 static bool
3404 undefined_operand_subword_p (const_rtx op, int i)
3406 machine_mode innermode, innermostmode;
3407 int offset;
3408 if (GET_CODE (op) != SUBREG)
3409 return false;
3410 innermode = GET_MODE (op);
3411 innermostmode = GET_MODE (SUBREG_REG (op));
3412 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3413 /* The SUBREG_BYTE represents offset, as if the value were stored in
3414 memory, except for a paradoxical subreg where we define
3415 SUBREG_BYTE to be 0; undo this exception as in
3416 simplify_subreg. */
3417 if (SUBREG_BYTE (op) == 0
3418 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3420 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3421 if (WORDS_BIG_ENDIAN)
3422 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3423 if (BYTES_BIG_ENDIAN)
3424 offset += difference % UNITS_PER_WORD;
3426 if (offset >= GET_MODE_SIZE (innermostmode)
3427 || offset <= -GET_MODE_SIZE (word_mode))
3428 return true;
3429 return false;
3432 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3433 MODE is any multi-word or full-word mode that lacks a move_insn
3434 pattern. Note that you will get better code if you define such
3435 patterns, even if they must turn into multiple assembler instructions. */
3437 static rtx_insn *
3438 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3440 rtx_insn *last_insn = 0;
3441 rtx_insn *seq;
3442 rtx inner;
3443 bool need_clobber;
3444 int i;
3446 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3448 /* If X is a push on the stack, do the push now and replace
3449 X with a reference to the stack pointer. */
3450 if (push_operand (x, mode))
3451 x = emit_move_resolve_push (mode, x);
3453 /* If we are in reload, see if either operand is a MEM whose address
3454 is scheduled for replacement. */
3455 if (reload_in_progress && MEM_P (x)
3456 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3457 x = replace_equiv_address_nv (x, inner);
3458 if (reload_in_progress && MEM_P (y)
3459 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3460 y = replace_equiv_address_nv (y, inner);
3462 start_sequence ();
3464 need_clobber = false;
3465 for (i = 0;
3466 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3467 i++)
3469 rtx xpart = operand_subword (x, i, 1, mode);
3470 rtx ypart;
3472 /* Do not generate code for a move if it would come entirely
3473 from the undefined bits of a paradoxical subreg. */
3474 if (undefined_operand_subword_p (y, i))
3475 continue;
3477 ypart = operand_subword (y, i, 1, mode);
3479 /* If we can't get a part of Y, put Y into memory if it is a
3480 constant. Otherwise, force it into a register. Then we must
3481 be able to get a part of Y. */
3482 if (ypart == 0 && CONSTANT_P (y))
3484 y = use_anchored_address (force_const_mem (mode, y));
3485 ypart = operand_subword (y, i, 1, mode);
3487 else if (ypart == 0)
3488 ypart = operand_subword_force (y, i, mode);
3490 gcc_assert (xpart && ypart);
3492 need_clobber |= (GET_CODE (xpart) == SUBREG);
3494 last_insn = emit_move_insn (xpart, ypart);
3497 seq = get_insns ();
3498 end_sequence ();
3500 /* Show the output dies here. This is necessary for SUBREGs
3501 of pseudos since we cannot track their lifetimes correctly;
3502 hard regs shouldn't appear here except as return values.
3503 We never want to emit such a clobber after reload. */
3504 if (x != y
3505 && ! (reload_in_progress || reload_completed)
3506 && need_clobber != 0)
3507 emit_clobber (x);
3509 emit_insn (seq);
3511 return last_insn;
3514 /* Low level part of emit_move_insn.
3515 Called just like emit_move_insn, but assumes X and Y
3516 are basically valid. */
3518 rtx_insn *
3519 emit_move_insn_1 (rtx x, rtx y)
3521 machine_mode mode = GET_MODE (x);
3522 enum insn_code code;
3524 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3526 code = optab_handler (mov_optab, mode);
3527 if (code != CODE_FOR_nothing)
3528 return emit_insn (GEN_FCN (code) (x, y));
3530 /* Expand complex moves by moving real part and imag part. */
3531 if (COMPLEX_MODE_P (mode))
3532 return emit_move_complex (mode, x, y);
3534 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3535 || ALL_FIXED_POINT_MODE_P (mode))
3537 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3539 /* If we can't find an integer mode, use multi words. */
3540 if (result)
3541 return result;
3542 else
3543 return emit_move_multi_word (mode, x, y);
3546 if (GET_MODE_CLASS (mode) == MODE_CC)
3547 return emit_move_ccmode (mode, x, y);
3549 /* Try using a move pattern for the corresponding integer mode. This is
3550 only safe when simplify_subreg can convert MODE constants into integer
3551 constants. At present, it can only do this reliably if the value
3552 fits within a HOST_WIDE_INT. */
3553 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3555 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3557 if (ret)
3559 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3560 return ret;
3564 return emit_move_multi_word (mode, x, y);
3567 /* Generate code to copy Y into X.
3568 Both Y and X must have the same mode, except that
3569 Y can be a constant with VOIDmode.
3570 This mode cannot be BLKmode; use emit_block_move for that.
3572 Return the last instruction emitted. */
3574 rtx_insn *
3575 emit_move_insn (rtx x, rtx y)
3577 machine_mode mode = GET_MODE (x);
3578 rtx y_cst = NULL_RTX;
3579 rtx_insn *last_insn;
3580 rtx set;
3582 gcc_assert (mode != BLKmode
3583 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3585 if (CONSTANT_P (y))
3587 if (optimize
3588 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3589 && (last_insn = compress_float_constant (x, y)))
3590 return last_insn;
3592 y_cst = y;
3594 if (!targetm.legitimate_constant_p (mode, y))
3596 y = force_const_mem (mode, y);
3598 /* If the target's cannot_force_const_mem prevented the spill,
3599 assume that the target's move expanders will also take care
3600 of the non-legitimate constant. */
3601 if (!y)
3602 y = y_cst;
3603 else
3604 y = use_anchored_address (y);
3608 /* If X or Y are memory references, verify that their addresses are valid
3609 for the machine. */
3610 if (MEM_P (x)
3611 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3612 MEM_ADDR_SPACE (x))
3613 && ! push_operand (x, GET_MODE (x))))
3614 x = validize_mem (x);
3616 if (MEM_P (y)
3617 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3618 MEM_ADDR_SPACE (y)))
3619 y = validize_mem (y);
3621 gcc_assert (mode != BLKmode);
3623 last_insn = emit_move_insn_1 (x, y);
3625 if (y_cst && REG_P (x)
3626 && (set = single_set (last_insn)) != NULL_RTX
3627 && SET_DEST (set) == x
3628 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3629 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3631 return last_insn;
3634 /* Generate the body of an instruction to copy Y into X.
3635 It may be a list of insns, if one insn isn't enough. */
3637 rtx_insn *
3638 gen_move_insn (rtx x, rtx y)
3640 rtx_insn *seq;
3642 start_sequence ();
3643 emit_move_insn_1 (x, y);
3644 seq = get_insns ();
3645 end_sequence ();
3646 return seq;
3649 /* Same as above, but return rtx (used as a callback, which must have
3650 prototype compatible with other functions returning rtx). */
3653 gen_move_insn_uncast (rtx x, rtx y)
3655 return gen_move_insn (x, y);
3658 /* If Y is representable exactly in a narrower mode, and the target can
3659 perform the extension directly from constant or memory, then emit the
3660 move as an extension. */
3662 static rtx_insn *
3663 compress_float_constant (rtx x, rtx y)
3665 machine_mode dstmode = GET_MODE (x);
3666 machine_mode orig_srcmode = GET_MODE (y);
3667 machine_mode srcmode;
3668 REAL_VALUE_TYPE r;
3669 int oldcost, newcost;
3670 bool speed = optimize_insn_for_speed_p ();
3672 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3674 if (targetm.legitimate_constant_p (dstmode, y))
3675 oldcost = set_src_cost (y, speed);
3676 else
3677 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3679 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3680 srcmode != orig_srcmode;
3681 srcmode = GET_MODE_WIDER_MODE (srcmode))
3683 enum insn_code ic;
3684 rtx trunc_y;
3685 rtx_insn *last_insn;
3687 /* Skip if the target can't extend this way. */
3688 ic = can_extend_p (dstmode, srcmode, 0);
3689 if (ic == CODE_FOR_nothing)
3690 continue;
3692 /* Skip if the narrowed value isn't exact. */
3693 if (! exact_real_truncate (srcmode, &r))
3694 continue;
3696 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3698 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3700 /* Skip if the target needs extra instructions to perform
3701 the extension. */
3702 if (!insn_operand_matches (ic, 1, trunc_y))
3703 continue;
3704 /* This is valid, but may not be cheaper than the original. */
3705 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3706 speed);
3707 if (oldcost < newcost)
3708 continue;
3710 else if (float_extend_from_mem[dstmode][srcmode])
3712 trunc_y = force_const_mem (srcmode, trunc_y);
3713 /* This is valid, but may not be cheaper than the original. */
3714 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3715 speed);
3716 if (oldcost < newcost)
3717 continue;
3718 trunc_y = validize_mem (trunc_y);
3720 else
3721 continue;
3723 /* For CSE's benefit, force the compressed constant pool entry
3724 into a new pseudo. This constant may be used in different modes,
3725 and if not, combine will put things back together for us. */
3726 trunc_y = force_reg (srcmode, trunc_y);
3728 /* If x is a hard register, perform the extension into a pseudo,
3729 so that e.g. stack realignment code is aware of it. */
3730 rtx target = x;
3731 if (REG_P (x) && HARD_REGISTER_P (x))
3732 target = gen_reg_rtx (dstmode);
3734 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3735 last_insn = get_last_insn ();
3737 if (REG_P (target))
3738 set_unique_reg_note (last_insn, REG_EQUAL, y);
3740 if (target != x)
3741 return emit_move_insn (x, target);
3742 return last_insn;
3745 return NULL;
3748 /* Pushing data onto the stack. */
3750 /* Push a block of length SIZE (perhaps variable)
3751 and return an rtx to address the beginning of the block.
3752 The value may be virtual_outgoing_args_rtx.
3754 EXTRA is the number of bytes of padding to push in addition to SIZE.
3755 BELOW nonzero means this padding comes at low addresses;
3756 otherwise, the padding comes at high addresses. */
3759 push_block (rtx size, int extra, int below)
3761 rtx temp;
3763 size = convert_modes (Pmode, ptr_mode, size, 1);
3764 if (CONSTANT_P (size))
3765 anti_adjust_stack (plus_constant (Pmode, size, extra));
3766 else if (REG_P (size) && extra == 0)
3767 anti_adjust_stack (size);
3768 else
3770 temp = copy_to_mode_reg (Pmode, size);
3771 if (extra != 0)
3772 temp = expand_binop (Pmode, add_optab, temp,
3773 gen_int_mode (extra, Pmode),
3774 temp, 0, OPTAB_LIB_WIDEN);
3775 anti_adjust_stack (temp);
3778 if (STACK_GROWS_DOWNWARD)
3780 temp = virtual_outgoing_args_rtx;
3781 if (extra != 0 && below)
3782 temp = plus_constant (Pmode, temp, extra);
3784 else
3786 if (CONST_INT_P (size))
3787 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3788 -INTVAL (size) - (below ? 0 : extra));
3789 else if (extra != 0 && !below)
3790 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3791 negate_rtx (Pmode, plus_constant (Pmode, size,
3792 extra)));
3793 else
3794 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3795 negate_rtx (Pmode, size));
3798 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3801 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3803 static rtx
3804 mem_autoinc_base (rtx mem)
3806 if (MEM_P (mem))
3808 rtx addr = XEXP (mem, 0);
3809 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3810 return XEXP (addr, 0);
3812 return NULL;
3815 /* A utility routine used here, in reload, and in try_split. The insns
3816 after PREV up to and including LAST are known to adjust the stack,
3817 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3818 placing notes as appropriate. PREV may be NULL, indicating the
3819 entire insn sequence prior to LAST should be scanned.
3821 The set of allowed stack pointer modifications is small:
3822 (1) One or more auto-inc style memory references (aka pushes),
3823 (2) One or more addition/subtraction with the SP as destination,
3824 (3) A single move insn with the SP as destination,
3825 (4) A call_pop insn,
3826 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3828 Insns in the sequence that do not modify the SP are ignored,
3829 except for noreturn calls.
3831 The return value is the amount of adjustment that can be trivially
3832 verified, via immediate operand or auto-inc. If the adjustment
3833 cannot be trivially extracted, the return value is INT_MIN. */
3835 HOST_WIDE_INT
3836 find_args_size_adjust (rtx_insn *insn)
3838 rtx dest, set, pat;
3839 int i;
3841 pat = PATTERN (insn);
3842 set = NULL;
3844 /* Look for a call_pop pattern. */
3845 if (CALL_P (insn))
3847 /* We have to allow non-call_pop patterns for the case
3848 of emit_single_push_insn of a TLS address. */
3849 if (GET_CODE (pat) != PARALLEL)
3850 return 0;
3852 /* All call_pop have a stack pointer adjust in the parallel.
3853 The call itself is always first, and the stack adjust is
3854 usually last, so search from the end. */
3855 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3857 set = XVECEXP (pat, 0, i);
3858 if (GET_CODE (set) != SET)
3859 continue;
3860 dest = SET_DEST (set);
3861 if (dest == stack_pointer_rtx)
3862 break;
3864 /* We'd better have found the stack pointer adjust. */
3865 if (i == 0)
3866 return 0;
3867 /* Fall through to process the extracted SET and DEST
3868 as if it was a standalone insn. */
3870 else if (GET_CODE (pat) == SET)
3871 set = pat;
3872 else if ((set = single_set (insn)) != NULL)
3874 else if (GET_CODE (pat) == PARALLEL)
3876 /* ??? Some older ports use a parallel with a stack adjust
3877 and a store for a PUSH_ROUNDING pattern, rather than a
3878 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3879 /* ??? See h8300 and m68k, pushqi1. */
3880 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3882 set = XVECEXP (pat, 0, i);
3883 if (GET_CODE (set) != SET)
3884 continue;
3885 dest = SET_DEST (set);
3886 if (dest == stack_pointer_rtx)
3887 break;
3889 /* We do not expect an auto-inc of the sp in the parallel. */
3890 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3891 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3892 != stack_pointer_rtx);
3894 if (i < 0)
3895 return 0;
3897 else
3898 return 0;
3900 dest = SET_DEST (set);
3902 /* Look for direct modifications of the stack pointer. */
3903 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3905 /* Look for a trivial adjustment, otherwise assume nothing. */
3906 /* Note that the SPU restore_stack_block pattern refers to
3907 the stack pointer in V4SImode. Consider that non-trivial. */
3908 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3909 && GET_CODE (SET_SRC (set)) == PLUS
3910 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3911 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3912 return INTVAL (XEXP (SET_SRC (set), 1));
3913 /* ??? Reload can generate no-op moves, which will be cleaned
3914 up later. Recognize it and continue searching. */
3915 else if (rtx_equal_p (dest, SET_SRC (set)))
3916 return 0;
3917 else
3918 return HOST_WIDE_INT_MIN;
3920 else
3922 rtx mem, addr;
3924 /* Otherwise only think about autoinc patterns. */
3925 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3927 mem = dest;
3928 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3929 != stack_pointer_rtx);
3931 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3932 mem = SET_SRC (set);
3933 else
3934 return 0;
3936 addr = XEXP (mem, 0);
3937 switch (GET_CODE (addr))
3939 case PRE_INC:
3940 case POST_INC:
3941 return GET_MODE_SIZE (GET_MODE (mem));
3942 case PRE_DEC:
3943 case POST_DEC:
3944 return -GET_MODE_SIZE (GET_MODE (mem));
3945 case PRE_MODIFY:
3946 case POST_MODIFY:
3947 addr = XEXP (addr, 1);
3948 gcc_assert (GET_CODE (addr) == PLUS);
3949 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3950 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3951 return INTVAL (XEXP (addr, 1));
3952 default:
3953 gcc_unreachable ();
3959 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
3961 int args_size = end_args_size;
3962 bool saw_unknown = false;
3963 rtx_insn *insn;
3965 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3967 HOST_WIDE_INT this_delta;
3969 if (!NONDEBUG_INSN_P (insn))
3970 continue;
3972 this_delta = find_args_size_adjust (insn);
3973 if (this_delta == 0)
3975 if (!CALL_P (insn)
3976 || ACCUMULATE_OUTGOING_ARGS
3977 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3978 continue;
3981 gcc_assert (!saw_unknown);
3982 if (this_delta == HOST_WIDE_INT_MIN)
3983 saw_unknown = true;
3985 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3986 if (STACK_GROWS_DOWNWARD)
3987 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3989 args_size -= this_delta;
3992 return saw_unknown ? INT_MIN : args_size;
3995 #ifdef PUSH_ROUNDING
3996 /* Emit single push insn. */
3998 static void
3999 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4001 rtx dest_addr;
4002 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4003 rtx dest;
4004 enum insn_code icode;
4006 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4007 /* If there is push pattern, use it. Otherwise try old way of throwing
4008 MEM representing push operation to move expander. */
4009 icode = optab_handler (push_optab, mode);
4010 if (icode != CODE_FOR_nothing)
4012 struct expand_operand ops[1];
4014 create_input_operand (&ops[0], x, mode);
4015 if (maybe_expand_insn (icode, 1, ops))
4016 return;
4018 if (GET_MODE_SIZE (mode) == rounded_size)
4019 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4020 /* If we are to pad downward, adjust the stack pointer first and
4021 then store X into the stack location using an offset. This is
4022 because emit_move_insn does not know how to pad; it does not have
4023 access to type. */
4024 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
4026 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4027 HOST_WIDE_INT offset;
4029 emit_move_insn (stack_pointer_rtx,
4030 expand_binop (Pmode,
4031 STACK_GROWS_DOWNWARD ? sub_optab
4032 : add_optab,
4033 stack_pointer_rtx,
4034 gen_int_mode (rounded_size, Pmode),
4035 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4037 offset = (HOST_WIDE_INT) padding_size;
4038 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4039 /* We have already decremented the stack pointer, so get the
4040 previous value. */
4041 offset += (HOST_WIDE_INT) rounded_size;
4043 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4044 /* We have already incremented the stack pointer, so get the
4045 previous value. */
4046 offset -= (HOST_WIDE_INT) rounded_size;
4048 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4049 gen_int_mode (offset, Pmode));
4051 else
4053 if (STACK_GROWS_DOWNWARD)
4054 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4055 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4056 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4057 Pmode));
4058 else
4059 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4060 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4061 gen_int_mode (rounded_size, Pmode));
4063 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4066 dest = gen_rtx_MEM (mode, dest_addr);
4068 if (type != 0)
4070 set_mem_attributes (dest, type, 1);
4072 if (cfun->tail_call_marked)
4073 /* Function incoming arguments may overlap with sibling call
4074 outgoing arguments and we cannot allow reordering of reads
4075 from function arguments with stores to outgoing arguments
4076 of sibling calls. */
4077 set_mem_alias_set (dest, 0);
4079 emit_move_insn (dest, x);
4082 /* Emit and annotate a single push insn. */
4084 static void
4085 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4087 int delta, old_delta = stack_pointer_delta;
4088 rtx_insn *prev = get_last_insn ();
4089 rtx_insn *last;
4091 emit_single_push_insn_1 (mode, x, type);
4093 last = get_last_insn ();
4095 /* Notice the common case where we emitted exactly one insn. */
4096 if (PREV_INSN (last) == prev)
4098 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4099 return;
4102 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4103 gcc_assert (delta == INT_MIN || delta == old_delta);
4105 #endif
4107 /* If reading SIZE bytes from X will end up reading from
4108 Y return the number of bytes that overlap. Return -1
4109 if there is no overlap or -2 if we can't determine
4110 (for example when X and Y have different base registers). */
4112 static int
4113 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4115 rtx tmp = plus_constant (Pmode, x, size);
4116 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4118 if (!CONST_INT_P (sub))
4119 return -2;
4121 HOST_WIDE_INT val = INTVAL (sub);
4123 return IN_RANGE (val, 1, size) ? val : -1;
4126 /* Generate code to push X onto the stack, assuming it has mode MODE and
4127 type TYPE.
4128 MODE is redundant except when X is a CONST_INT (since they don't
4129 carry mode info).
4130 SIZE is an rtx for the size of data to be copied (in bytes),
4131 needed only if X is BLKmode.
4132 Return true if successful. May return false if asked to push a
4133 partial argument during a sibcall optimization (as specified by
4134 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4135 to not overlap.
4137 ALIGN (in bits) is maximum alignment we can assume.
4139 If PARTIAL and REG are both nonzero, then copy that many of the first
4140 bytes of X into registers starting with REG, and push the rest of X.
4141 The amount of space pushed is decreased by PARTIAL bytes.
4142 REG must be a hard register in this case.
4143 If REG is zero but PARTIAL is not, take any all others actions for an
4144 argument partially in registers, but do not actually load any
4145 registers.
4147 EXTRA is the amount in bytes of extra space to leave next to this arg.
4148 This is ignored if an argument block has already been allocated.
4150 On a machine that lacks real push insns, ARGS_ADDR is the address of
4151 the bottom of the argument block for this call. We use indexing off there
4152 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4153 argument block has not been preallocated.
4155 ARGS_SO_FAR is the size of args previously pushed for this call.
4157 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4158 for arguments passed in registers. If nonzero, it will be the number
4159 of bytes required. */
4161 bool
4162 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4163 unsigned int align, int partial, rtx reg, int extra,
4164 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4165 rtx alignment_pad, bool sibcall_p)
4167 rtx xinner;
4168 enum direction stack_direction = STACK_GROWS_DOWNWARD ? downward : upward;
4170 /* Decide where to pad the argument: `downward' for below,
4171 `upward' for above, or `none' for don't pad it.
4172 Default is below for small data on big-endian machines; else above. */
4173 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4175 /* Invert direction if stack is post-decrement.
4176 FIXME: why? */
4177 if (STACK_PUSH_CODE == POST_DEC)
4178 if (where_pad != none)
4179 where_pad = (where_pad == downward ? upward : downward);
4181 xinner = x;
4183 int nregs = partial / UNITS_PER_WORD;
4184 rtx *tmp_regs = NULL;
4185 int overlapping = 0;
4187 if (mode == BLKmode
4188 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4190 /* Copy a block into the stack, entirely or partially. */
4192 rtx temp;
4193 int used;
4194 int offset;
4195 int skip;
4197 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4198 used = partial - offset;
4200 if (mode != BLKmode)
4202 /* A value is to be stored in an insufficiently aligned
4203 stack slot; copy via a suitably aligned slot if
4204 necessary. */
4205 size = GEN_INT (GET_MODE_SIZE (mode));
4206 if (!MEM_P (xinner))
4208 temp = assign_temp (type, 1, 1);
4209 emit_move_insn (temp, xinner);
4210 xinner = temp;
4214 gcc_assert (size);
4216 /* USED is now the # of bytes we need not copy to the stack
4217 because registers will take care of them. */
4219 if (partial != 0)
4220 xinner = adjust_address (xinner, BLKmode, used);
4222 /* If the partial register-part of the arg counts in its stack size,
4223 skip the part of stack space corresponding to the registers.
4224 Otherwise, start copying to the beginning of the stack space,
4225 by setting SKIP to 0. */
4226 skip = (reg_parm_stack_space == 0) ? 0 : used;
4228 #ifdef PUSH_ROUNDING
4229 /* Do it with several push insns if that doesn't take lots of insns
4230 and if there is no difficulty with push insns that skip bytes
4231 on the stack for alignment purposes. */
4232 if (args_addr == 0
4233 && PUSH_ARGS
4234 && CONST_INT_P (size)
4235 && skip == 0
4236 && MEM_ALIGN (xinner) >= align
4237 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4238 /* Here we avoid the case of a structure whose weak alignment
4239 forces many pushes of a small amount of data,
4240 and such small pushes do rounding that causes trouble. */
4241 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4242 || align >= BIGGEST_ALIGNMENT
4243 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4244 == (align / BITS_PER_UNIT)))
4245 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4247 /* Push padding now if padding above and stack grows down,
4248 or if padding below and stack grows up.
4249 But if space already allocated, this has already been done. */
4250 if (extra && args_addr == 0
4251 && where_pad != none && where_pad != stack_direction)
4252 anti_adjust_stack (GEN_INT (extra));
4254 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4256 else
4257 #endif /* PUSH_ROUNDING */
4259 rtx target;
4261 /* Otherwise make space on the stack and copy the data
4262 to the address of that space. */
4264 /* Deduct words put into registers from the size we must copy. */
4265 if (partial != 0)
4267 if (CONST_INT_P (size))
4268 size = GEN_INT (INTVAL (size) - used);
4269 else
4270 size = expand_binop (GET_MODE (size), sub_optab, size,
4271 gen_int_mode (used, GET_MODE (size)),
4272 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4275 /* Get the address of the stack space.
4276 In this case, we do not deal with EXTRA separately.
4277 A single stack adjust will do. */
4278 if (! args_addr)
4280 temp = push_block (size, extra, where_pad == downward);
4281 extra = 0;
4283 else if (CONST_INT_P (args_so_far))
4284 temp = memory_address (BLKmode,
4285 plus_constant (Pmode, args_addr,
4286 skip + INTVAL (args_so_far)));
4287 else
4288 temp = memory_address (BLKmode,
4289 plus_constant (Pmode,
4290 gen_rtx_PLUS (Pmode,
4291 args_addr,
4292 args_so_far),
4293 skip));
4295 if (!ACCUMULATE_OUTGOING_ARGS)
4297 /* If the source is referenced relative to the stack pointer,
4298 copy it to another register to stabilize it. We do not need
4299 to do this if we know that we won't be changing sp. */
4301 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4302 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4303 temp = copy_to_reg (temp);
4306 target = gen_rtx_MEM (BLKmode, temp);
4308 /* We do *not* set_mem_attributes here, because incoming arguments
4309 may overlap with sibling call outgoing arguments and we cannot
4310 allow reordering of reads from function arguments with stores
4311 to outgoing arguments of sibling calls. We do, however, want
4312 to record the alignment of the stack slot. */
4313 /* ALIGN may well be better aligned than TYPE, e.g. due to
4314 PARM_BOUNDARY. Assume the caller isn't lying. */
4315 set_mem_align (target, align);
4317 /* If part should go in registers and pushing to that part would
4318 overwrite some of the values that need to go into regs, load the
4319 overlapping values into temporary pseudos to be moved into the hard
4320 regs at the end after the stack pushing has completed.
4321 We cannot load them directly into the hard regs here because
4322 they can be clobbered by the block move expansions.
4323 See PR 65358. */
4325 if (partial > 0 && reg != 0 && mode == BLKmode
4326 && GET_CODE (reg) != PARALLEL)
4328 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4329 if (overlapping > 0)
4331 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4332 overlapping /= UNITS_PER_WORD;
4334 tmp_regs = XALLOCAVEC (rtx, overlapping);
4336 for (int i = 0; i < overlapping; i++)
4337 tmp_regs[i] = gen_reg_rtx (word_mode);
4339 for (int i = 0; i < overlapping; i++)
4340 emit_move_insn (tmp_regs[i],
4341 operand_subword_force (target, i, mode));
4343 else if (overlapping == -1)
4344 overlapping = 0;
4345 /* Could not determine whether there is overlap.
4346 Fail the sibcall. */
4347 else
4349 overlapping = 0;
4350 if (sibcall_p)
4351 return false;
4354 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4357 else if (partial > 0)
4359 /* Scalar partly in registers. */
4361 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4362 int i;
4363 int not_stack;
4364 /* # bytes of start of argument
4365 that we must make space for but need not store. */
4366 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4367 int args_offset = INTVAL (args_so_far);
4368 int skip;
4370 /* Push padding now if padding above and stack grows down,
4371 or if padding below and stack grows up.
4372 But if space already allocated, this has already been done. */
4373 if (extra && args_addr == 0
4374 && where_pad != none && where_pad != stack_direction)
4375 anti_adjust_stack (GEN_INT (extra));
4377 /* If we make space by pushing it, we might as well push
4378 the real data. Otherwise, we can leave OFFSET nonzero
4379 and leave the space uninitialized. */
4380 if (args_addr == 0)
4381 offset = 0;
4383 /* Now NOT_STACK gets the number of words that we don't need to
4384 allocate on the stack. Convert OFFSET to words too. */
4385 not_stack = (partial - offset) / UNITS_PER_WORD;
4386 offset /= UNITS_PER_WORD;
4388 /* If the partial register-part of the arg counts in its stack size,
4389 skip the part of stack space corresponding to the registers.
4390 Otherwise, start copying to the beginning of the stack space,
4391 by setting SKIP to 0. */
4392 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4394 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4395 x = validize_mem (force_const_mem (mode, x));
4397 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4398 SUBREGs of such registers are not allowed. */
4399 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4400 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4401 x = copy_to_reg (x);
4403 /* Loop over all the words allocated on the stack for this arg. */
4404 /* We can do it by words, because any scalar bigger than a word
4405 has a size a multiple of a word. */
4406 for (i = size - 1; i >= not_stack; i--)
4407 if (i >= not_stack + offset)
4408 if (!emit_push_insn (operand_subword_force (x, i, mode),
4409 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4410 0, args_addr,
4411 GEN_INT (args_offset + ((i - not_stack + skip)
4412 * UNITS_PER_WORD)),
4413 reg_parm_stack_space, alignment_pad, sibcall_p))
4414 return false;
4416 else
4418 rtx addr;
4419 rtx dest;
4421 /* Push padding now if padding above and stack grows down,
4422 or if padding below and stack grows up.
4423 But if space already allocated, this has already been done. */
4424 if (extra && args_addr == 0
4425 && where_pad != none && where_pad != stack_direction)
4426 anti_adjust_stack (GEN_INT (extra));
4428 #ifdef PUSH_ROUNDING
4429 if (args_addr == 0 && PUSH_ARGS)
4430 emit_single_push_insn (mode, x, type);
4431 else
4432 #endif
4434 if (CONST_INT_P (args_so_far))
4435 addr
4436 = memory_address (mode,
4437 plus_constant (Pmode, args_addr,
4438 INTVAL (args_so_far)));
4439 else
4440 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4441 args_so_far));
4442 dest = gen_rtx_MEM (mode, addr);
4444 /* We do *not* set_mem_attributes here, because incoming arguments
4445 may overlap with sibling call outgoing arguments and we cannot
4446 allow reordering of reads from function arguments with stores
4447 to outgoing arguments of sibling calls. We do, however, want
4448 to record the alignment of the stack slot. */
4449 /* ALIGN may well be better aligned than TYPE, e.g. due to
4450 PARM_BOUNDARY. Assume the caller isn't lying. */
4451 set_mem_align (dest, align);
4453 emit_move_insn (dest, x);
4457 /* Move the partial arguments into the registers and any overlapping
4458 values that we moved into the pseudos in tmp_regs. */
4459 if (partial > 0 && reg != 0)
4461 /* Handle calls that pass values in multiple non-contiguous locations.
4462 The Irix 6 ABI has examples of this. */
4463 if (GET_CODE (reg) == PARALLEL)
4464 emit_group_load (reg, x, type, -1);
4465 else
4467 gcc_assert (partial % UNITS_PER_WORD == 0);
4468 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4470 for (int i = 0; i < overlapping; i++)
4471 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4472 + nregs - overlapping + i),
4473 tmp_regs[i]);
4478 if (extra && args_addr == 0 && where_pad == stack_direction)
4479 anti_adjust_stack (GEN_INT (extra));
4481 if (alignment_pad && args_addr == 0)
4482 anti_adjust_stack (alignment_pad);
4484 return true;
4487 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4488 operations. */
4490 static rtx
4491 get_subtarget (rtx x)
4493 return (optimize
4494 || x == 0
4495 /* Only registers can be subtargets. */
4496 || !REG_P (x)
4497 /* Don't use hard regs to avoid extending their life. */
4498 || REGNO (x) < FIRST_PSEUDO_REGISTER
4499 ? 0 : x);
4502 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4503 FIELD is a bitfield. Returns true if the optimization was successful,
4504 and there's nothing else to do. */
4506 static bool
4507 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4508 unsigned HOST_WIDE_INT bitpos,
4509 unsigned HOST_WIDE_INT bitregion_start,
4510 unsigned HOST_WIDE_INT bitregion_end,
4511 machine_mode mode1, rtx str_rtx,
4512 tree to, tree src)
4514 machine_mode str_mode = GET_MODE (str_rtx);
4515 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4516 tree op0, op1;
4517 rtx value, result;
4518 optab binop;
4519 gimple srcstmt;
4520 enum tree_code code;
4522 if (mode1 != VOIDmode
4523 || bitsize >= BITS_PER_WORD
4524 || str_bitsize > BITS_PER_WORD
4525 || TREE_SIDE_EFFECTS (to)
4526 || TREE_THIS_VOLATILE (to))
4527 return false;
4529 STRIP_NOPS (src);
4530 if (TREE_CODE (src) != SSA_NAME)
4531 return false;
4532 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4533 return false;
4535 srcstmt = get_gimple_for_ssa_name (src);
4536 if (!srcstmt
4537 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4538 return false;
4540 code = gimple_assign_rhs_code (srcstmt);
4542 op0 = gimple_assign_rhs1 (srcstmt);
4544 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4545 to find its initialization. Hopefully the initialization will
4546 be from a bitfield load. */
4547 if (TREE_CODE (op0) == SSA_NAME)
4549 gimple op0stmt = get_gimple_for_ssa_name (op0);
4551 /* We want to eventually have OP0 be the same as TO, which
4552 should be a bitfield. */
4553 if (!op0stmt
4554 || !is_gimple_assign (op0stmt)
4555 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4556 return false;
4557 op0 = gimple_assign_rhs1 (op0stmt);
4560 op1 = gimple_assign_rhs2 (srcstmt);
4562 if (!operand_equal_p (to, op0, 0))
4563 return false;
4565 if (MEM_P (str_rtx))
4567 unsigned HOST_WIDE_INT offset1;
4569 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4570 str_mode = word_mode;
4571 str_mode = get_best_mode (bitsize, bitpos,
4572 bitregion_start, bitregion_end,
4573 MEM_ALIGN (str_rtx), str_mode, 0);
4574 if (str_mode == VOIDmode)
4575 return false;
4576 str_bitsize = GET_MODE_BITSIZE (str_mode);
4578 offset1 = bitpos;
4579 bitpos %= str_bitsize;
4580 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4581 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4583 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4584 return false;
4586 /* If the bit field covers the whole REG/MEM, store_field
4587 will likely generate better code. */
4588 if (bitsize >= str_bitsize)
4589 return false;
4591 /* We can't handle fields split across multiple entities. */
4592 if (bitpos + bitsize > str_bitsize)
4593 return false;
4595 if (BYTES_BIG_ENDIAN)
4596 bitpos = str_bitsize - bitpos - bitsize;
4598 switch (code)
4600 case PLUS_EXPR:
4601 case MINUS_EXPR:
4602 /* For now, just optimize the case of the topmost bitfield
4603 where we don't need to do any masking and also
4604 1 bit bitfields where xor can be used.
4605 We might win by one instruction for the other bitfields
4606 too if insv/extv instructions aren't used, so that
4607 can be added later. */
4608 if (bitpos + bitsize != str_bitsize
4609 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4610 break;
4612 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4613 value = convert_modes (str_mode,
4614 TYPE_MODE (TREE_TYPE (op1)), value,
4615 TYPE_UNSIGNED (TREE_TYPE (op1)));
4617 /* We may be accessing data outside the field, which means
4618 we can alias adjacent data. */
4619 if (MEM_P (str_rtx))
4621 str_rtx = shallow_copy_rtx (str_rtx);
4622 set_mem_alias_set (str_rtx, 0);
4623 set_mem_expr (str_rtx, 0);
4626 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4627 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4629 value = expand_and (str_mode, value, const1_rtx, NULL);
4630 binop = xor_optab;
4632 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4633 result = expand_binop (str_mode, binop, str_rtx,
4634 value, str_rtx, 1, OPTAB_WIDEN);
4635 if (result != str_rtx)
4636 emit_move_insn (str_rtx, result);
4637 return true;
4639 case BIT_IOR_EXPR:
4640 case BIT_XOR_EXPR:
4641 if (TREE_CODE (op1) != INTEGER_CST)
4642 break;
4643 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4644 value = convert_modes (str_mode,
4645 TYPE_MODE (TREE_TYPE (op1)), value,
4646 TYPE_UNSIGNED (TREE_TYPE (op1)));
4648 /* We may be accessing data outside the field, which means
4649 we can alias adjacent data. */
4650 if (MEM_P (str_rtx))
4652 str_rtx = shallow_copy_rtx (str_rtx);
4653 set_mem_alias_set (str_rtx, 0);
4654 set_mem_expr (str_rtx, 0);
4657 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4658 if (bitpos + bitsize != str_bitsize)
4660 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4661 str_mode);
4662 value = expand_and (str_mode, value, mask, NULL_RTX);
4664 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4665 result = expand_binop (str_mode, binop, str_rtx,
4666 value, str_rtx, 1, OPTAB_WIDEN);
4667 if (result != str_rtx)
4668 emit_move_insn (str_rtx, result);
4669 return true;
4671 default:
4672 break;
4675 return false;
4678 /* In the C++ memory model, consecutive bit fields in a structure are
4679 considered one memory location.
4681 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4682 returns the bit range of consecutive bits in which this COMPONENT_REF
4683 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4684 and *OFFSET may be adjusted in the process.
4686 If the access does not need to be restricted, 0 is returned in both
4687 *BITSTART and *BITEND. */
4689 static void
4690 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4691 unsigned HOST_WIDE_INT *bitend,
4692 tree exp,
4693 HOST_WIDE_INT *bitpos,
4694 tree *offset)
4696 HOST_WIDE_INT bitoffset;
4697 tree field, repr;
4699 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4701 field = TREE_OPERAND (exp, 1);
4702 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4703 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4704 need to limit the range we can access. */
4705 if (!repr)
4707 *bitstart = *bitend = 0;
4708 return;
4711 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4712 part of a larger bit field, then the representative does not serve any
4713 useful purpose. This can occur in Ada. */
4714 if (handled_component_p (TREE_OPERAND (exp, 0)))
4716 machine_mode rmode;
4717 HOST_WIDE_INT rbitsize, rbitpos;
4718 tree roffset;
4719 int unsignedp;
4720 int volatilep = 0;
4721 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4722 &roffset, &rmode, &unsignedp, &volatilep, false);
4723 if ((rbitpos % BITS_PER_UNIT) != 0)
4725 *bitstart = *bitend = 0;
4726 return;
4730 /* Compute the adjustment to bitpos from the offset of the field
4731 relative to the representative. DECL_FIELD_OFFSET of field and
4732 repr are the same by construction if they are not constants,
4733 see finish_bitfield_layout. */
4734 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4735 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4736 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4737 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4738 else
4739 bitoffset = 0;
4740 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4741 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4743 /* If the adjustment is larger than bitpos, we would have a negative bit
4744 position for the lower bound and this may wreak havoc later. Adjust
4745 offset and bitpos to make the lower bound non-negative in that case. */
4746 if (bitoffset > *bitpos)
4748 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4749 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4751 *bitpos += adjust;
4752 if (*offset == NULL_TREE)
4753 *offset = size_int (-adjust / BITS_PER_UNIT);
4754 else
4755 *offset
4756 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4757 *bitstart = 0;
4759 else
4760 *bitstart = *bitpos - bitoffset;
4762 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4765 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4766 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4767 DECL_RTL was not set yet, return NORTL. */
4769 static inline bool
4770 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4772 if (TREE_CODE (addr) != ADDR_EXPR)
4773 return false;
4775 tree base = TREE_OPERAND (addr, 0);
4777 if (!DECL_P (base)
4778 || TREE_ADDRESSABLE (base)
4779 || DECL_MODE (base) == BLKmode)
4780 return false;
4782 if (!DECL_RTL_SET_P (base))
4783 return nortl;
4785 return (!MEM_P (DECL_RTL (base)));
4788 /* Returns true if the MEM_REF REF refers to an object that does not
4789 reside in memory and has non-BLKmode. */
4791 static inline bool
4792 mem_ref_refers_to_non_mem_p (tree ref)
4794 tree base = TREE_OPERAND (ref, 0);
4795 return addr_expr_of_non_mem_decl_p_1 (base, false);
4798 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4799 is true, try generating a nontemporal store. */
4801 void
4802 expand_assignment (tree to, tree from, bool nontemporal)
4804 rtx to_rtx = 0;
4805 rtx result;
4806 machine_mode mode;
4807 unsigned int align;
4808 enum insn_code icode;
4810 /* Don't crash if the lhs of the assignment was erroneous. */
4811 if (TREE_CODE (to) == ERROR_MARK)
4813 expand_normal (from);
4814 return;
4817 /* Optimize away no-op moves without side-effects. */
4818 if (operand_equal_p (to, from, 0))
4819 return;
4821 /* Handle misaligned stores. */
4822 mode = TYPE_MODE (TREE_TYPE (to));
4823 if ((TREE_CODE (to) == MEM_REF
4824 || TREE_CODE (to) == TARGET_MEM_REF)
4825 && mode != BLKmode
4826 && !mem_ref_refers_to_non_mem_p (to)
4827 && ((align = get_object_alignment (to))
4828 < GET_MODE_ALIGNMENT (mode))
4829 && (((icode = optab_handler (movmisalign_optab, mode))
4830 != CODE_FOR_nothing)
4831 || SLOW_UNALIGNED_ACCESS (mode, align)))
4833 rtx reg, mem;
4835 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4836 reg = force_not_mem (reg);
4837 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4839 if (icode != CODE_FOR_nothing)
4841 struct expand_operand ops[2];
4843 create_fixed_operand (&ops[0], mem);
4844 create_input_operand (&ops[1], reg, mode);
4845 /* The movmisalign<mode> pattern cannot fail, else the assignment
4846 would silently be omitted. */
4847 expand_insn (icode, 2, ops);
4849 else
4850 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4851 return;
4854 /* Assignment of a structure component needs special treatment
4855 if the structure component's rtx is not simply a MEM.
4856 Assignment of an array element at a constant index, and assignment of
4857 an array element in an unaligned packed structure field, has the same
4858 problem. Same for (partially) storing into a non-memory object. */
4859 if (handled_component_p (to)
4860 || (TREE_CODE (to) == MEM_REF
4861 && mem_ref_refers_to_non_mem_p (to))
4862 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4864 machine_mode mode1;
4865 HOST_WIDE_INT bitsize, bitpos;
4866 unsigned HOST_WIDE_INT bitregion_start = 0;
4867 unsigned HOST_WIDE_INT bitregion_end = 0;
4868 tree offset;
4869 int unsignedp;
4870 int volatilep = 0;
4871 tree tem;
4873 push_temp_slots ();
4874 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4875 &unsignedp, &volatilep, true);
4877 /* Make sure bitpos is not negative, it can wreak havoc later. */
4878 if (bitpos < 0)
4880 gcc_assert (offset == NULL_TREE);
4881 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4882 ? 3 : exact_log2 (BITS_PER_UNIT)));
4883 bitpos &= BITS_PER_UNIT - 1;
4886 if (TREE_CODE (to) == COMPONENT_REF
4887 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4888 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4889 /* The C++ memory model naturally applies to byte-aligned fields.
4890 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4891 BITSIZE are not byte-aligned, there is no need to limit the range
4892 we can access. This can occur with packed structures in Ada. */
4893 else if (bitsize > 0
4894 && bitsize % BITS_PER_UNIT == 0
4895 && bitpos % BITS_PER_UNIT == 0)
4897 bitregion_start = bitpos;
4898 bitregion_end = bitpos + bitsize - 1;
4901 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4903 /* If the field has a mode, we want to access it in the
4904 field's mode, not the computed mode.
4905 If a MEM has VOIDmode (external with incomplete type),
4906 use BLKmode for it instead. */
4907 if (MEM_P (to_rtx))
4909 if (mode1 != VOIDmode)
4910 to_rtx = adjust_address (to_rtx, mode1, 0);
4911 else if (GET_MODE (to_rtx) == VOIDmode)
4912 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4915 if (offset != 0)
4917 machine_mode address_mode;
4918 rtx offset_rtx;
4920 if (!MEM_P (to_rtx))
4922 /* We can get constant negative offsets into arrays with broken
4923 user code. Translate this to a trap instead of ICEing. */
4924 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4925 expand_builtin_trap ();
4926 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4929 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4930 address_mode = get_address_mode (to_rtx);
4931 if (GET_MODE (offset_rtx) != address_mode)
4933 /* We cannot be sure that the RTL in offset_rtx is valid outside
4934 of a memory address context, so force it into a register
4935 before attempting to convert it to the desired mode. */
4936 offset_rtx = force_operand (offset_rtx, NULL_RTX);
4937 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4940 /* If we have an expression in OFFSET_RTX and a non-zero
4941 byte offset in BITPOS, adding the byte offset before the
4942 OFFSET_RTX results in better intermediate code, which makes
4943 later rtl optimization passes perform better.
4945 We prefer intermediate code like this:
4947 r124:DI=r123:DI+0x18
4948 [r124:DI]=r121:DI
4950 ... instead of ...
4952 r124:DI=r123:DI+0x10
4953 [r124:DI+0x8]=r121:DI
4955 This is only done for aligned data values, as these can
4956 be expected to result in single move instructions. */
4957 if (mode1 != VOIDmode
4958 && bitpos != 0
4959 && bitsize > 0
4960 && (bitpos % bitsize) == 0
4961 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4962 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
4964 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4965 bitregion_start = 0;
4966 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
4967 bitregion_end -= bitpos;
4968 bitpos = 0;
4971 to_rtx = offset_address (to_rtx, offset_rtx,
4972 highest_pow2_factor_for_target (to,
4973 offset));
4976 /* No action is needed if the target is not a memory and the field
4977 lies completely outside that target. This can occur if the source
4978 code contains an out-of-bounds access to a small array. */
4979 if (!MEM_P (to_rtx)
4980 && GET_MODE (to_rtx) != BLKmode
4981 && (unsigned HOST_WIDE_INT) bitpos
4982 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4984 expand_normal (from);
4985 result = NULL;
4987 /* Handle expand_expr of a complex value returning a CONCAT. */
4988 else if (GET_CODE (to_rtx) == CONCAT)
4990 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4991 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4992 && bitpos == 0
4993 && bitsize == mode_bitsize)
4994 result = store_expr (from, to_rtx, false, nontemporal);
4995 else if (bitsize == mode_bitsize / 2
4996 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4997 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4998 nontemporal);
4999 else if (bitpos + bitsize <= mode_bitsize / 2)
5000 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5001 bitregion_start, bitregion_end,
5002 mode1, from,
5003 get_alias_set (to), nontemporal);
5004 else if (bitpos >= mode_bitsize / 2)
5005 result = store_field (XEXP (to_rtx, 1), bitsize,
5006 bitpos - mode_bitsize / 2,
5007 bitregion_start, bitregion_end,
5008 mode1, from,
5009 get_alias_set (to), nontemporal);
5010 else if (bitpos == 0 && bitsize == mode_bitsize)
5012 rtx from_rtx;
5013 result = expand_normal (from);
5014 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
5015 TYPE_MODE (TREE_TYPE (from)), 0);
5016 emit_move_insn (XEXP (to_rtx, 0),
5017 read_complex_part (from_rtx, false));
5018 emit_move_insn (XEXP (to_rtx, 1),
5019 read_complex_part (from_rtx, true));
5021 else
5023 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5024 GET_MODE_SIZE (GET_MODE (to_rtx)));
5025 write_complex_part (temp, XEXP (to_rtx, 0), false);
5026 write_complex_part (temp, XEXP (to_rtx, 1), true);
5027 result = store_field (temp, bitsize, bitpos,
5028 bitregion_start, bitregion_end,
5029 mode1, from,
5030 get_alias_set (to), nontemporal);
5031 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5032 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5035 else
5037 if (MEM_P (to_rtx))
5039 /* If the field is at offset zero, we could have been given the
5040 DECL_RTX of the parent struct. Don't munge it. */
5041 to_rtx = shallow_copy_rtx (to_rtx);
5042 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5043 if (volatilep)
5044 MEM_VOLATILE_P (to_rtx) = 1;
5047 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5048 bitregion_start, bitregion_end,
5049 mode1,
5050 to_rtx, to, from))
5051 result = NULL;
5052 else
5053 result = store_field (to_rtx, bitsize, bitpos,
5054 bitregion_start, bitregion_end,
5055 mode1, from,
5056 get_alias_set (to), nontemporal);
5059 if (result)
5060 preserve_temp_slots (result);
5061 pop_temp_slots ();
5062 return;
5065 /* If the rhs is a function call and its value is not an aggregate,
5066 call the function before we start to compute the lhs.
5067 This is needed for correct code for cases such as
5068 val = setjmp (buf) on machines where reference to val
5069 requires loading up part of an address in a separate insn.
5071 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5072 since it might be a promoted variable where the zero- or sign- extension
5073 needs to be done. Handling this in the normal way is safe because no
5074 computation is done before the call. The same is true for SSA names. */
5075 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5076 && COMPLETE_TYPE_P (TREE_TYPE (from))
5077 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5078 && ! (((TREE_CODE (to) == VAR_DECL
5079 || TREE_CODE (to) == PARM_DECL
5080 || TREE_CODE (to) == RESULT_DECL)
5081 && REG_P (DECL_RTL (to)))
5082 || TREE_CODE (to) == SSA_NAME))
5084 rtx value;
5085 rtx bounds;
5087 push_temp_slots ();
5088 value = expand_normal (from);
5090 /* Split value and bounds to store them separately. */
5091 chkp_split_slot (value, &value, &bounds);
5093 if (to_rtx == 0)
5094 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5096 /* Handle calls that return values in multiple non-contiguous locations.
5097 The Irix 6 ABI has examples of this. */
5098 if (GET_CODE (to_rtx) == PARALLEL)
5100 if (GET_CODE (value) == PARALLEL)
5101 emit_group_move (to_rtx, value);
5102 else
5103 emit_group_load (to_rtx, value, TREE_TYPE (from),
5104 int_size_in_bytes (TREE_TYPE (from)));
5106 else if (GET_CODE (value) == PARALLEL)
5107 emit_group_store (to_rtx, value, TREE_TYPE (from),
5108 int_size_in_bytes (TREE_TYPE (from)));
5109 else if (GET_MODE (to_rtx) == BLKmode)
5111 /* Handle calls that return BLKmode values in registers. */
5112 if (REG_P (value))
5113 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5114 else
5115 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5117 else
5119 if (POINTER_TYPE_P (TREE_TYPE (to)))
5120 value = convert_memory_address_addr_space
5121 (GET_MODE (to_rtx), value,
5122 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5124 emit_move_insn (to_rtx, value);
5127 /* Store bounds if required. */
5128 if (bounds
5129 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5131 gcc_assert (MEM_P (to_rtx));
5132 chkp_emit_bounds_store (bounds, value, to_rtx);
5135 preserve_temp_slots (to_rtx);
5136 pop_temp_slots ();
5137 return;
5140 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5141 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5143 /* Don't move directly into a return register. */
5144 if (TREE_CODE (to) == RESULT_DECL
5145 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5147 rtx temp;
5149 push_temp_slots ();
5151 /* If the source is itself a return value, it still is in a pseudo at
5152 this point so we can move it back to the return register directly. */
5153 if (REG_P (to_rtx)
5154 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5155 && TREE_CODE (from) != CALL_EXPR)
5156 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5157 else
5158 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5160 /* Handle calls that return values in multiple non-contiguous locations.
5161 The Irix 6 ABI has examples of this. */
5162 if (GET_CODE (to_rtx) == PARALLEL)
5164 if (GET_CODE (temp) == PARALLEL)
5165 emit_group_move (to_rtx, temp);
5166 else
5167 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5168 int_size_in_bytes (TREE_TYPE (from)));
5170 else if (temp)
5171 emit_move_insn (to_rtx, temp);
5173 preserve_temp_slots (to_rtx);
5174 pop_temp_slots ();
5175 return;
5178 /* In case we are returning the contents of an object which overlaps
5179 the place the value is being stored, use a safe function when copying
5180 a value through a pointer into a structure value return block. */
5181 if (TREE_CODE (to) == RESULT_DECL
5182 && TREE_CODE (from) == INDIRECT_REF
5183 && ADDR_SPACE_GENERIC_P
5184 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5185 && refs_may_alias_p (to, from)
5186 && cfun->returns_struct
5187 && !cfun->returns_pcc_struct)
5189 rtx from_rtx, size;
5191 push_temp_slots ();
5192 size = expr_size (from);
5193 from_rtx = expand_normal (from);
5195 emit_library_call (memmove_libfunc, LCT_NORMAL,
5196 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5197 XEXP (from_rtx, 0), Pmode,
5198 convert_to_mode (TYPE_MODE (sizetype),
5199 size, TYPE_UNSIGNED (sizetype)),
5200 TYPE_MODE (sizetype));
5202 preserve_temp_slots (to_rtx);
5203 pop_temp_slots ();
5204 return;
5207 /* Compute FROM and store the value in the rtx we got. */
5209 push_temp_slots ();
5210 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, to);
5211 preserve_temp_slots (result);
5212 pop_temp_slots ();
5213 return;
5216 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5217 succeeded, false otherwise. */
5219 bool
5220 emit_storent_insn (rtx to, rtx from)
5222 struct expand_operand ops[2];
5223 machine_mode mode = GET_MODE (to);
5224 enum insn_code code = optab_handler (storent_optab, mode);
5226 if (code == CODE_FOR_nothing)
5227 return false;
5229 create_fixed_operand (&ops[0], to);
5230 create_input_operand (&ops[1], from, mode);
5231 return maybe_expand_insn (code, 2, ops);
5234 /* Generate code for computing expression EXP,
5235 and storing the value into TARGET.
5237 If the mode is BLKmode then we may return TARGET itself.
5238 It turns out that in BLKmode it doesn't cause a problem.
5239 because C has no operators that could combine two different
5240 assignments into the same BLKmode object with different values
5241 with no sequence point. Will other languages need this to
5242 be more thorough?
5244 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5245 stack, and block moves may need to be treated specially.
5247 If NONTEMPORAL is true, try using a nontemporal store instruction.
5249 If BTARGET is not NULL then computed bounds of EXP are
5250 associated with BTARGET. */
5253 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5254 bool nontemporal, tree btarget)
5256 rtx temp;
5257 rtx alt_rtl = NULL_RTX;
5258 location_t loc = curr_insn_location ();
5260 if (VOID_TYPE_P (TREE_TYPE (exp)))
5262 /* C++ can generate ?: expressions with a throw expression in one
5263 branch and an rvalue in the other. Here, we resolve attempts to
5264 store the throw expression's nonexistent result. */
5265 gcc_assert (!call_param_p);
5266 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5267 return NULL_RTX;
5269 if (TREE_CODE (exp) == COMPOUND_EXPR)
5271 /* Perform first part of compound expression, then assign from second
5272 part. */
5273 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5274 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5275 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5276 call_param_p, nontemporal, btarget);
5278 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5280 /* For conditional expression, get safe form of the target. Then
5281 test the condition, doing the appropriate assignment on either
5282 side. This avoids the creation of unnecessary temporaries.
5283 For non-BLKmode, it is more efficient not to do this. */
5285 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5287 do_pending_stack_adjust ();
5288 NO_DEFER_POP;
5289 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5290 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5291 nontemporal, btarget);
5292 emit_jump_insn (gen_jump (lab2));
5293 emit_barrier ();
5294 emit_label (lab1);
5295 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5296 nontemporal, btarget);
5297 emit_label (lab2);
5298 OK_DEFER_POP;
5300 return NULL_RTX;
5302 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5303 /* If this is a scalar in a register that is stored in a wider mode
5304 than the declared mode, compute the result into its declared mode
5305 and then convert to the wider mode. Our value is the computed
5306 expression. */
5308 rtx inner_target = 0;
5310 /* We can do the conversion inside EXP, which will often result
5311 in some optimizations. Do the conversion in two steps: first
5312 change the signedness, if needed, then the extend. But don't
5313 do this if the type of EXP is a subtype of something else
5314 since then the conversion might involve more than just
5315 converting modes. */
5316 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5317 && TREE_TYPE (TREE_TYPE (exp)) == 0
5318 && GET_MODE_PRECISION (GET_MODE (target))
5319 == TYPE_PRECISION (TREE_TYPE (exp)))
5321 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5322 TYPE_UNSIGNED (TREE_TYPE (exp))))
5324 /* Some types, e.g. Fortran's logical*4, won't have a signed
5325 version, so use the mode instead. */
5326 tree ntype
5327 = (signed_or_unsigned_type_for
5328 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5329 if (ntype == NULL)
5330 ntype = lang_hooks.types.type_for_mode
5331 (TYPE_MODE (TREE_TYPE (exp)),
5332 SUBREG_PROMOTED_SIGN (target));
5334 exp = fold_convert_loc (loc, ntype, exp);
5337 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5338 (GET_MODE (SUBREG_REG (target)),
5339 SUBREG_PROMOTED_SIGN (target)),
5340 exp);
5342 inner_target = SUBREG_REG (target);
5345 temp = expand_expr (exp, inner_target, VOIDmode,
5346 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5348 /* Handle bounds returned by call. */
5349 if (TREE_CODE (exp) == CALL_EXPR)
5351 rtx bounds;
5352 chkp_split_slot (temp, &temp, &bounds);
5353 if (bounds && btarget)
5355 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5356 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5357 chkp_set_rtl_bounds (btarget, tmp);
5361 /* If TEMP is a VOIDmode constant, use convert_modes to make
5362 sure that we properly convert it. */
5363 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5365 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5366 temp, SUBREG_PROMOTED_SIGN (target));
5367 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5368 GET_MODE (target), temp,
5369 SUBREG_PROMOTED_SIGN (target));
5372 convert_move (SUBREG_REG (target), temp,
5373 SUBREG_PROMOTED_SIGN (target));
5375 return NULL_RTX;
5377 else if ((TREE_CODE (exp) == STRING_CST
5378 || (TREE_CODE (exp) == MEM_REF
5379 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5380 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5381 == STRING_CST
5382 && integer_zerop (TREE_OPERAND (exp, 1))))
5383 && !nontemporal && !call_param_p
5384 && MEM_P (target))
5386 /* Optimize initialization of an array with a STRING_CST. */
5387 HOST_WIDE_INT exp_len, str_copy_len;
5388 rtx dest_mem;
5389 tree str = TREE_CODE (exp) == STRING_CST
5390 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5392 exp_len = int_expr_size (exp);
5393 if (exp_len <= 0)
5394 goto normal_expr;
5396 if (TREE_STRING_LENGTH (str) <= 0)
5397 goto normal_expr;
5399 str_copy_len = strlen (TREE_STRING_POINTER (str));
5400 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5401 goto normal_expr;
5403 str_copy_len = TREE_STRING_LENGTH (str);
5404 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5405 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5407 str_copy_len += STORE_MAX_PIECES - 1;
5408 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5410 str_copy_len = MIN (str_copy_len, exp_len);
5411 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5412 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5413 MEM_ALIGN (target), false))
5414 goto normal_expr;
5416 dest_mem = target;
5418 dest_mem = store_by_pieces (dest_mem,
5419 str_copy_len, builtin_strncpy_read_str,
5420 CONST_CAST (char *,
5421 TREE_STRING_POINTER (str)),
5422 MEM_ALIGN (target), false,
5423 exp_len > str_copy_len ? 1 : 0);
5424 if (exp_len > str_copy_len)
5425 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5426 GEN_INT (exp_len - str_copy_len),
5427 BLOCK_OP_NORMAL);
5428 return NULL_RTX;
5430 else
5432 rtx tmp_target;
5434 normal_expr:
5435 /* If we want to use a nontemporal store, force the value to
5436 register first. */
5437 tmp_target = nontemporal ? NULL_RTX : target;
5438 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5439 (call_param_p
5440 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5441 &alt_rtl, false);
5443 /* Handle bounds returned by call. */
5444 if (TREE_CODE (exp) == CALL_EXPR)
5446 rtx bounds;
5447 chkp_split_slot (temp, &temp, &bounds);
5448 if (bounds && btarget)
5450 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5451 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5452 chkp_set_rtl_bounds (btarget, tmp);
5457 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5458 the same as that of TARGET, adjust the constant. This is needed, for
5459 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5460 only a word-sized value. */
5461 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5462 && TREE_CODE (exp) != ERROR_MARK
5463 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5464 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5465 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5467 /* If value was not generated in the target, store it there.
5468 Convert the value to TARGET's type first if necessary and emit the
5469 pending incrementations that have been queued when expanding EXP.
5470 Note that we cannot emit the whole queue blindly because this will
5471 effectively disable the POST_INC optimization later.
5473 If TEMP and TARGET compare equal according to rtx_equal_p, but
5474 one or both of them are volatile memory refs, we have to distinguish
5475 two cases:
5476 - expand_expr has used TARGET. In this case, we must not generate
5477 another copy. This can be detected by TARGET being equal according
5478 to == .
5479 - expand_expr has not used TARGET - that means that the source just
5480 happens to have the same RTX form. Since temp will have been created
5481 by expand_expr, it will compare unequal according to == .
5482 We must generate a copy in this case, to reach the correct number
5483 of volatile memory references. */
5485 if ((! rtx_equal_p (temp, target)
5486 || (temp != target && (side_effects_p (temp)
5487 || side_effects_p (target))))
5488 && TREE_CODE (exp) != ERROR_MARK
5489 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5490 but TARGET is not valid memory reference, TEMP will differ
5491 from TARGET although it is really the same location. */
5492 && !(alt_rtl
5493 && rtx_equal_p (alt_rtl, target)
5494 && !side_effects_p (alt_rtl)
5495 && !side_effects_p (target))
5496 /* If there's nothing to copy, don't bother. Don't call
5497 expr_size unless necessary, because some front-ends (C++)
5498 expr_size-hook must not be given objects that are not
5499 supposed to be bit-copied or bit-initialized. */
5500 && expr_size (exp) != const0_rtx)
5502 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5504 if (GET_MODE (target) == BLKmode)
5506 /* Handle calls that return BLKmode values in registers. */
5507 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5508 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5509 else
5510 store_bit_field (target,
5511 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5512 0, 0, 0, GET_MODE (temp), temp);
5514 else
5515 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5518 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5520 /* Handle copying a string constant into an array. The string
5521 constant may be shorter than the array. So copy just the string's
5522 actual length, and clear the rest. First get the size of the data
5523 type of the string, which is actually the size of the target. */
5524 rtx size = expr_size (exp);
5526 if (CONST_INT_P (size)
5527 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5528 emit_block_move (target, temp, size,
5529 (call_param_p
5530 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5531 else
5533 machine_mode pointer_mode
5534 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5535 machine_mode address_mode = get_address_mode (target);
5537 /* Compute the size of the data to copy from the string. */
5538 tree copy_size
5539 = size_binop_loc (loc, MIN_EXPR,
5540 make_tree (sizetype, size),
5541 size_int (TREE_STRING_LENGTH (exp)));
5542 rtx copy_size_rtx
5543 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5544 (call_param_p
5545 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5546 rtx_code_label *label = 0;
5548 /* Copy that much. */
5549 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5550 TYPE_UNSIGNED (sizetype));
5551 emit_block_move (target, temp, copy_size_rtx,
5552 (call_param_p
5553 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5555 /* Figure out how much is left in TARGET that we have to clear.
5556 Do all calculations in pointer_mode. */
5557 if (CONST_INT_P (copy_size_rtx))
5559 size = plus_constant (address_mode, size,
5560 -INTVAL (copy_size_rtx));
5561 target = adjust_address (target, BLKmode,
5562 INTVAL (copy_size_rtx));
5564 else
5566 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5567 copy_size_rtx, NULL_RTX, 0,
5568 OPTAB_LIB_WIDEN);
5570 if (GET_MODE (copy_size_rtx) != address_mode)
5571 copy_size_rtx = convert_to_mode (address_mode,
5572 copy_size_rtx,
5573 TYPE_UNSIGNED (sizetype));
5575 target = offset_address (target, copy_size_rtx,
5576 highest_pow2_factor (copy_size));
5577 label = gen_label_rtx ();
5578 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5579 GET_MODE (size), 0, label);
5582 if (size != const0_rtx)
5583 clear_storage (target, size, BLOCK_OP_NORMAL);
5585 if (label)
5586 emit_label (label);
5589 /* Handle calls that return values in multiple non-contiguous locations.
5590 The Irix 6 ABI has examples of this. */
5591 else if (GET_CODE (target) == PARALLEL)
5593 if (GET_CODE (temp) == PARALLEL)
5594 emit_group_move (target, temp);
5595 else
5596 emit_group_load (target, temp, TREE_TYPE (exp),
5597 int_size_in_bytes (TREE_TYPE (exp)));
5599 else if (GET_CODE (temp) == PARALLEL)
5600 emit_group_store (target, temp, TREE_TYPE (exp),
5601 int_size_in_bytes (TREE_TYPE (exp)));
5602 else if (GET_MODE (temp) == BLKmode)
5603 emit_block_move (target, temp, expr_size (exp),
5604 (call_param_p
5605 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5606 /* If we emit a nontemporal store, there is nothing else to do. */
5607 else if (nontemporal && emit_storent_insn (target, temp))
5609 else
5611 temp = force_operand (temp, target);
5612 if (temp != target)
5613 emit_move_insn (target, temp);
5617 return NULL_RTX;
5620 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5622 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5624 return store_expr_with_bounds (exp, target, call_param_p, nontemporal, NULL);
5627 /* Return true if field F of structure TYPE is a flexible array. */
5629 static bool
5630 flexible_array_member_p (const_tree f, const_tree type)
5632 const_tree tf;
5634 tf = TREE_TYPE (f);
5635 return (DECL_CHAIN (f) == NULL
5636 && TREE_CODE (tf) == ARRAY_TYPE
5637 && TYPE_DOMAIN (tf)
5638 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5639 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5640 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5641 && int_size_in_bytes (type) >= 0);
5644 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5645 must have in order for it to completely initialize a value of type TYPE.
5646 Return -1 if the number isn't known.
5648 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5650 static HOST_WIDE_INT
5651 count_type_elements (const_tree type, bool for_ctor_p)
5653 switch (TREE_CODE (type))
5655 case ARRAY_TYPE:
5657 tree nelts;
5659 nelts = array_type_nelts (type);
5660 if (nelts && tree_fits_uhwi_p (nelts))
5662 unsigned HOST_WIDE_INT n;
5664 n = tree_to_uhwi (nelts) + 1;
5665 if (n == 0 || for_ctor_p)
5666 return n;
5667 else
5668 return n * count_type_elements (TREE_TYPE (type), false);
5670 return for_ctor_p ? -1 : 1;
5673 case RECORD_TYPE:
5675 unsigned HOST_WIDE_INT n;
5676 tree f;
5678 n = 0;
5679 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5680 if (TREE_CODE (f) == FIELD_DECL)
5682 if (!for_ctor_p)
5683 n += count_type_elements (TREE_TYPE (f), false);
5684 else if (!flexible_array_member_p (f, type))
5685 /* Don't count flexible arrays, which are not supposed
5686 to be initialized. */
5687 n += 1;
5690 return n;
5693 case UNION_TYPE:
5694 case QUAL_UNION_TYPE:
5696 tree f;
5697 HOST_WIDE_INT n, m;
5699 gcc_assert (!for_ctor_p);
5700 /* Estimate the number of scalars in each field and pick the
5701 maximum. Other estimates would do instead; the idea is simply
5702 to make sure that the estimate is not sensitive to the ordering
5703 of the fields. */
5704 n = 1;
5705 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5706 if (TREE_CODE (f) == FIELD_DECL)
5708 m = count_type_elements (TREE_TYPE (f), false);
5709 /* If the field doesn't span the whole union, add an extra
5710 scalar for the rest. */
5711 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5712 TYPE_SIZE (type)) != 1)
5713 m++;
5714 if (n < m)
5715 n = m;
5717 return n;
5720 case COMPLEX_TYPE:
5721 return 2;
5723 case VECTOR_TYPE:
5724 return TYPE_VECTOR_SUBPARTS (type);
5726 case INTEGER_TYPE:
5727 case REAL_TYPE:
5728 case FIXED_POINT_TYPE:
5729 case ENUMERAL_TYPE:
5730 case BOOLEAN_TYPE:
5731 case POINTER_TYPE:
5732 case OFFSET_TYPE:
5733 case REFERENCE_TYPE:
5734 case NULLPTR_TYPE:
5735 return 1;
5737 case ERROR_MARK:
5738 return 0;
5740 case VOID_TYPE:
5741 case METHOD_TYPE:
5742 case FUNCTION_TYPE:
5743 case LANG_TYPE:
5744 default:
5745 gcc_unreachable ();
5749 /* Helper for categorize_ctor_elements. Identical interface. */
5751 static bool
5752 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5753 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5755 unsigned HOST_WIDE_INT idx;
5756 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5757 tree value, purpose, elt_type;
5759 /* Whether CTOR is a valid constant initializer, in accordance with what
5760 initializer_constant_valid_p does. If inferred from the constructor
5761 elements, true until proven otherwise. */
5762 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5763 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5765 nz_elts = 0;
5766 init_elts = 0;
5767 num_fields = 0;
5768 elt_type = NULL_TREE;
5770 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5772 HOST_WIDE_INT mult = 1;
5774 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5776 tree lo_index = TREE_OPERAND (purpose, 0);
5777 tree hi_index = TREE_OPERAND (purpose, 1);
5779 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5780 mult = (tree_to_uhwi (hi_index)
5781 - tree_to_uhwi (lo_index) + 1);
5783 num_fields += mult;
5784 elt_type = TREE_TYPE (value);
5786 switch (TREE_CODE (value))
5788 case CONSTRUCTOR:
5790 HOST_WIDE_INT nz = 0, ic = 0;
5792 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5793 p_complete);
5795 nz_elts += mult * nz;
5796 init_elts += mult * ic;
5798 if (const_from_elts_p && const_p)
5799 const_p = const_elt_p;
5801 break;
5803 case INTEGER_CST:
5804 case REAL_CST:
5805 case FIXED_CST:
5806 if (!initializer_zerop (value))
5807 nz_elts += mult;
5808 init_elts += mult;
5809 break;
5811 case STRING_CST:
5812 nz_elts += mult * TREE_STRING_LENGTH (value);
5813 init_elts += mult * TREE_STRING_LENGTH (value);
5814 break;
5816 case COMPLEX_CST:
5817 if (!initializer_zerop (TREE_REALPART (value)))
5818 nz_elts += mult;
5819 if (!initializer_zerop (TREE_IMAGPART (value)))
5820 nz_elts += mult;
5821 init_elts += mult;
5822 break;
5824 case VECTOR_CST:
5826 unsigned i;
5827 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5829 tree v = VECTOR_CST_ELT (value, i);
5830 if (!initializer_zerop (v))
5831 nz_elts += mult;
5832 init_elts += mult;
5835 break;
5837 default:
5839 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5840 nz_elts += mult * tc;
5841 init_elts += mult * tc;
5843 if (const_from_elts_p && const_p)
5844 const_p = initializer_constant_valid_p (value, elt_type)
5845 != NULL_TREE;
5847 break;
5851 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5852 num_fields, elt_type))
5853 *p_complete = false;
5855 *p_nz_elts += nz_elts;
5856 *p_init_elts += init_elts;
5858 return const_p;
5861 /* Examine CTOR to discover:
5862 * how many scalar fields are set to nonzero values,
5863 and place it in *P_NZ_ELTS;
5864 * how many scalar fields in total are in CTOR,
5865 and place it in *P_ELT_COUNT.
5866 * whether the constructor is complete -- in the sense that every
5867 meaningful byte is explicitly given a value --
5868 and place it in *P_COMPLETE.
5870 Return whether or not CTOR is a valid static constant initializer, the same
5871 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5873 bool
5874 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5875 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5877 *p_nz_elts = 0;
5878 *p_init_elts = 0;
5879 *p_complete = true;
5881 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5884 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5885 of which had type LAST_TYPE. Each element was itself a complete
5886 initializer, in the sense that every meaningful byte was explicitly
5887 given a value. Return true if the same is true for the constructor
5888 as a whole. */
5890 bool
5891 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5892 const_tree last_type)
5894 if (TREE_CODE (type) == UNION_TYPE
5895 || TREE_CODE (type) == QUAL_UNION_TYPE)
5897 if (num_elts == 0)
5898 return false;
5900 gcc_assert (num_elts == 1 && last_type);
5902 /* ??? We could look at each element of the union, and find the
5903 largest element. Which would avoid comparing the size of the
5904 initialized element against any tail padding in the union.
5905 Doesn't seem worth the effort... */
5906 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5909 return count_type_elements (type, true) == num_elts;
5912 /* Return 1 if EXP contains mostly (3/4) zeros. */
5914 static int
5915 mostly_zeros_p (const_tree exp)
5917 if (TREE_CODE (exp) == CONSTRUCTOR)
5919 HOST_WIDE_INT nz_elts, init_elts;
5920 bool complete_p;
5922 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5923 return !complete_p || nz_elts < init_elts / 4;
5926 return initializer_zerop (exp);
5929 /* Return 1 if EXP contains all zeros. */
5931 static int
5932 all_zeros_p (const_tree exp)
5934 if (TREE_CODE (exp) == CONSTRUCTOR)
5936 HOST_WIDE_INT nz_elts, init_elts;
5937 bool complete_p;
5939 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5940 return nz_elts == 0;
5943 return initializer_zerop (exp);
5946 /* Helper function for store_constructor.
5947 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5948 CLEARED is as for store_constructor.
5949 ALIAS_SET is the alias set to use for any stores.
5951 This provides a recursive shortcut back to store_constructor when it isn't
5952 necessary to go through store_field. This is so that we can pass through
5953 the cleared field to let store_constructor know that we may not have to
5954 clear a substructure if the outer structure has already been cleared. */
5956 static void
5957 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5958 HOST_WIDE_INT bitpos, machine_mode mode,
5959 tree exp, int cleared, alias_set_type alias_set)
5961 if (TREE_CODE (exp) == CONSTRUCTOR
5962 /* We can only call store_constructor recursively if the size and
5963 bit position are on a byte boundary. */
5964 && bitpos % BITS_PER_UNIT == 0
5965 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5966 /* If we have a nonzero bitpos for a register target, then we just
5967 let store_field do the bitfield handling. This is unlikely to
5968 generate unnecessary clear instructions anyways. */
5969 && (bitpos == 0 || MEM_P (target)))
5971 if (MEM_P (target))
5972 target
5973 = adjust_address (target,
5974 GET_MODE (target) == BLKmode
5975 || 0 != (bitpos
5976 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5977 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5980 /* Update the alias set, if required. */
5981 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5982 && MEM_ALIAS_SET (target) != 0)
5984 target = copy_rtx (target);
5985 set_mem_alias_set (target, alias_set);
5988 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5990 else
5991 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5995 /* Returns the number of FIELD_DECLs in TYPE. */
5997 static int
5998 fields_length (const_tree type)
6000 tree t = TYPE_FIELDS (type);
6001 int count = 0;
6003 for (; t; t = DECL_CHAIN (t))
6004 if (TREE_CODE (t) == FIELD_DECL)
6005 ++count;
6007 return count;
6011 /* Store the value of constructor EXP into the rtx TARGET.
6012 TARGET is either a REG or a MEM; we know it cannot conflict, since
6013 safe_from_p has been called.
6014 CLEARED is true if TARGET is known to have been zero'd.
6015 SIZE is the number of bytes of TARGET we are allowed to modify: this
6016 may not be the same as the size of EXP if we are assigning to a field
6017 which has been packed to exclude padding bits. */
6019 static void
6020 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
6022 tree type = TREE_TYPE (exp);
6023 #ifdef WORD_REGISTER_OPERATIONS
6024 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6025 #endif
6027 switch (TREE_CODE (type))
6029 case RECORD_TYPE:
6030 case UNION_TYPE:
6031 case QUAL_UNION_TYPE:
6033 unsigned HOST_WIDE_INT idx;
6034 tree field, value;
6036 /* If size is zero or the target is already cleared, do nothing. */
6037 if (size == 0 || cleared)
6038 cleared = 1;
6039 /* We either clear the aggregate or indicate the value is dead. */
6040 else if ((TREE_CODE (type) == UNION_TYPE
6041 || TREE_CODE (type) == QUAL_UNION_TYPE)
6042 && ! CONSTRUCTOR_ELTS (exp))
6043 /* If the constructor is empty, clear the union. */
6045 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6046 cleared = 1;
6049 /* If we are building a static constructor into a register,
6050 set the initial value as zero so we can fold the value into
6051 a constant. But if more than one register is involved,
6052 this probably loses. */
6053 else if (REG_P (target) && TREE_STATIC (exp)
6054 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
6056 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6057 cleared = 1;
6060 /* If the constructor has fewer fields than the structure or
6061 if we are initializing the structure to mostly zeros, clear
6062 the whole structure first. Don't do this if TARGET is a
6063 register whose mode size isn't equal to SIZE since
6064 clear_storage can't handle this case. */
6065 else if (size > 0
6066 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
6067 != fields_length (type))
6068 || mostly_zeros_p (exp))
6069 && (!REG_P (target)
6070 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
6071 == size)))
6073 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6074 cleared = 1;
6077 if (REG_P (target) && !cleared)
6078 emit_clobber (target);
6080 /* Store each element of the constructor into the
6081 corresponding field of TARGET. */
6082 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6084 machine_mode mode;
6085 HOST_WIDE_INT bitsize;
6086 HOST_WIDE_INT bitpos = 0;
6087 tree offset;
6088 rtx to_rtx = target;
6090 /* Just ignore missing fields. We cleared the whole
6091 structure, above, if any fields are missing. */
6092 if (field == 0)
6093 continue;
6095 if (cleared && initializer_zerop (value))
6096 continue;
6098 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6099 bitsize = tree_to_uhwi (DECL_SIZE (field));
6100 else
6101 bitsize = -1;
6103 mode = DECL_MODE (field);
6104 if (DECL_BIT_FIELD (field))
6105 mode = VOIDmode;
6107 offset = DECL_FIELD_OFFSET (field);
6108 if (tree_fits_shwi_p (offset)
6109 && tree_fits_shwi_p (bit_position (field)))
6111 bitpos = int_bit_position (field);
6112 offset = 0;
6114 else
6115 bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field));
6117 if (offset)
6119 machine_mode address_mode;
6120 rtx offset_rtx;
6122 offset
6123 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
6124 make_tree (TREE_TYPE (exp),
6125 target));
6127 offset_rtx = expand_normal (offset);
6128 gcc_assert (MEM_P (to_rtx));
6130 address_mode = get_address_mode (to_rtx);
6131 if (GET_MODE (offset_rtx) != address_mode)
6132 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
6134 to_rtx = offset_address (to_rtx, offset_rtx,
6135 highest_pow2_factor (offset));
6138 #ifdef WORD_REGISTER_OPERATIONS
6139 /* If this initializes a field that is smaller than a
6140 word, at the start of a word, try to widen it to a full
6141 word. This special case allows us to output C++ member
6142 function initializations in a form that the optimizers
6143 can understand. */
6144 if (REG_P (target)
6145 && bitsize < BITS_PER_WORD
6146 && bitpos % BITS_PER_WORD == 0
6147 && GET_MODE_CLASS (mode) == MODE_INT
6148 && TREE_CODE (value) == INTEGER_CST
6149 && exp_size >= 0
6150 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6152 tree type = TREE_TYPE (value);
6154 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6156 type = lang_hooks.types.type_for_mode
6157 (word_mode, TYPE_UNSIGNED (type));
6158 value = fold_convert (type, value);
6161 if (BYTES_BIG_ENDIAN)
6162 value
6163 = fold_build2 (LSHIFT_EXPR, type, value,
6164 build_int_cst (type,
6165 BITS_PER_WORD - bitsize));
6166 bitsize = BITS_PER_WORD;
6167 mode = word_mode;
6169 #endif
6171 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6172 && DECL_NONADDRESSABLE_P (field))
6174 to_rtx = copy_rtx (to_rtx);
6175 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6178 store_constructor_field (to_rtx, bitsize, bitpos, mode,
6179 value, cleared,
6180 get_alias_set (TREE_TYPE (field)));
6182 break;
6184 case ARRAY_TYPE:
6186 tree value, index;
6187 unsigned HOST_WIDE_INT i;
6188 int need_to_clear;
6189 tree domain;
6190 tree elttype = TREE_TYPE (type);
6191 int const_bounds_p;
6192 HOST_WIDE_INT minelt = 0;
6193 HOST_WIDE_INT maxelt = 0;
6195 domain = TYPE_DOMAIN (type);
6196 const_bounds_p = (TYPE_MIN_VALUE (domain)
6197 && TYPE_MAX_VALUE (domain)
6198 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6199 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6201 /* If we have constant bounds for the range of the type, get them. */
6202 if (const_bounds_p)
6204 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6205 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6208 /* If the constructor has fewer elements than the array, clear
6209 the whole array first. Similarly if this is static
6210 constructor of a non-BLKmode object. */
6211 if (cleared)
6212 need_to_clear = 0;
6213 else if (REG_P (target) && TREE_STATIC (exp))
6214 need_to_clear = 1;
6215 else
6217 unsigned HOST_WIDE_INT idx;
6218 tree index, value;
6219 HOST_WIDE_INT count = 0, zero_count = 0;
6220 need_to_clear = ! const_bounds_p;
6222 /* This loop is a more accurate version of the loop in
6223 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6224 is also needed to check for missing elements. */
6225 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6227 HOST_WIDE_INT this_node_count;
6229 if (need_to_clear)
6230 break;
6232 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6234 tree lo_index = TREE_OPERAND (index, 0);
6235 tree hi_index = TREE_OPERAND (index, 1);
6237 if (! tree_fits_uhwi_p (lo_index)
6238 || ! tree_fits_uhwi_p (hi_index))
6240 need_to_clear = 1;
6241 break;
6244 this_node_count = (tree_to_uhwi (hi_index)
6245 - tree_to_uhwi (lo_index) + 1);
6247 else
6248 this_node_count = 1;
6250 count += this_node_count;
6251 if (mostly_zeros_p (value))
6252 zero_count += this_node_count;
6255 /* Clear the entire array first if there are any missing
6256 elements, or if the incidence of zero elements is >=
6257 75%. */
6258 if (! need_to_clear
6259 && (count < maxelt - minelt + 1
6260 || 4 * zero_count >= 3 * count))
6261 need_to_clear = 1;
6264 if (need_to_clear && size > 0)
6266 if (REG_P (target))
6267 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6268 else
6269 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6270 cleared = 1;
6273 if (!cleared && REG_P (target))
6274 /* Inform later passes that the old value is dead. */
6275 emit_clobber (target);
6277 /* Store each element of the constructor into the
6278 corresponding element of TARGET, determined by counting the
6279 elements. */
6280 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6282 machine_mode mode;
6283 HOST_WIDE_INT bitsize;
6284 HOST_WIDE_INT bitpos;
6285 rtx xtarget = target;
6287 if (cleared && initializer_zerop (value))
6288 continue;
6290 mode = TYPE_MODE (elttype);
6291 if (mode == BLKmode)
6292 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6293 ? tree_to_uhwi (TYPE_SIZE (elttype))
6294 : -1);
6295 else
6296 bitsize = GET_MODE_BITSIZE (mode);
6298 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6300 tree lo_index = TREE_OPERAND (index, 0);
6301 tree hi_index = TREE_OPERAND (index, 1);
6302 rtx index_r, pos_rtx;
6303 HOST_WIDE_INT lo, hi, count;
6304 tree position;
6306 /* If the range is constant and "small", unroll the loop. */
6307 if (const_bounds_p
6308 && tree_fits_shwi_p (lo_index)
6309 && tree_fits_shwi_p (hi_index)
6310 && (lo = tree_to_shwi (lo_index),
6311 hi = tree_to_shwi (hi_index),
6312 count = hi - lo + 1,
6313 (!MEM_P (target)
6314 || count <= 2
6315 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6316 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6317 <= 40 * 8)))))
6319 lo -= minelt; hi -= minelt;
6320 for (; lo <= hi; lo++)
6322 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6324 if (MEM_P (target)
6325 && !MEM_KEEP_ALIAS_SET_P (target)
6326 && TREE_CODE (type) == ARRAY_TYPE
6327 && TYPE_NONALIASED_COMPONENT (type))
6329 target = copy_rtx (target);
6330 MEM_KEEP_ALIAS_SET_P (target) = 1;
6333 store_constructor_field
6334 (target, bitsize, bitpos, mode, value, cleared,
6335 get_alias_set (elttype));
6338 else
6340 rtx_code_label *loop_start = gen_label_rtx ();
6341 rtx_code_label *loop_end = gen_label_rtx ();
6342 tree exit_cond;
6344 expand_normal (hi_index);
6346 index = build_decl (EXPR_LOCATION (exp),
6347 VAR_DECL, NULL_TREE, domain);
6348 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6349 SET_DECL_RTL (index, index_r);
6350 store_expr (lo_index, index_r, 0, false);
6352 /* Build the head of the loop. */
6353 do_pending_stack_adjust ();
6354 emit_label (loop_start);
6356 /* Assign value to element index. */
6357 position =
6358 fold_convert (ssizetype,
6359 fold_build2 (MINUS_EXPR,
6360 TREE_TYPE (index),
6361 index,
6362 TYPE_MIN_VALUE (domain)));
6364 position =
6365 size_binop (MULT_EXPR, position,
6366 fold_convert (ssizetype,
6367 TYPE_SIZE_UNIT (elttype)));
6369 pos_rtx = expand_normal (position);
6370 xtarget = offset_address (target, pos_rtx,
6371 highest_pow2_factor (position));
6372 xtarget = adjust_address (xtarget, mode, 0);
6373 if (TREE_CODE (value) == CONSTRUCTOR)
6374 store_constructor (value, xtarget, cleared,
6375 bitsize / BITS_PER_UNIT);
6376 else
6377 store_expr (value, xtarget, 0, false);
6379 /* Generate a conditional jump to exit the loop. */
6380 exit_cond = build2 (LT_EXPR, integer_type_node,
6381 index, hi_index);
6382 jumpif (exit_cond, loop_end, -1);
6384 /* Update the loop counter, and jump to the head of
6385 the loop. */
6386 expand_assignment (index,
6387 build2 (PLUS_EXPR, TREE_TYPE (index),
6388 index, integer_one_node),
6389 false);
6391 emit_jump (loop_start);
6393 /* Build the end of the loop. */
6394 emit_label (loop_end);
6397 else if ((index != 0 && ! tree_fits_shwi_p (index))
6398 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6400 tree position;
6402 if (index == 0)
6403 index = ssize_int (1);
6405 if (minelt)
6406 index = fold_convert (ssizetype,
6407 fold_build2 (MINUS_EXPR,
6408 TREE_TYPE (index),
6409 index,
6410 TYPE_MIN_VALUE (domain)));
6412 position =
6413 size_binop (MULT_EXPR, index,
6414 fold_convert (ssizetype,
6415 TYPE_SIZE_UNIT (elttype)));
6416 xtarget = offset_address (target,
6417 expand_normal (position),
6418 highest_pow2_factor (position));
6419 xtarget = adjust_address (xtarget, mode, 0);
6420 store_expr (value, xtarget, 0, false);
6422 else
6424 if (index != 0)
6425 bitpos = ((tree_to_shwi (index) - minelt)
6426 * tree_to_uhwi (TYPE_SIZE (elttype)));
6427 else
6428 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6430 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6431 && TREE_CODE (type) == ARRAY_TYPE
6432 && TYPE_NONALIASED_COMPONENT (type))
6434 target = copy_rtx (target);
6435 MEM_KEEP_ALIAS_SET_P (target) = 1;
6437 store_constructor_field (target, bitsize, bitpos, mode, value,
6438 cleared, get_alias_set (elttype));
6441 break;
6444 case VECTOR_TYPE:
6446 unsigned HOST_WIDE_INT idx;
6447 constructor_elt *ce;
6448 int i;
6449 int need_to_clear;
6450 int icode = CODE_FOR_nothing;
6451 tree elttype = TREE_TYPE (type);
6452 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6453 machine_mode eltmode = TYPE_MODE (elttype);
6454 HOST_WIDE_INT bitsize;
6455 HOST_WIDE_INT bitpos;
6456 rtvec vector = NULL;
6457 unsigned n_elts;
6458 alias_set_type alias;
6460 gcc_assert (eltmode != BLKmode);
6462 n_elts = TYPE_VECTOR_SUBPARTS (type);
6463 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6465 machine_mode mode = GET_MODE (target);
6467 icode = (int) optab_handler (vec_init_optab, mode);
6468 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6469 if (icode != CODE_FOR_nothing)
6471 tree value;
6473 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6474 if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE)
6476 icode = CODE_FOR_nothing;
6477 break;
6480 if (icode != CODE_FOR_nothing)
6482 unsigned int i;
6484 vector = rtvec_alloc (n_elts);
6485 for (i = 0; i < n_elts; i++)
6486 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6490 /* If the constructor has fewer elements than the vector,
6491 clear the whole array first. Similarly if this is static
6492 constructor of a non-BLKmode object. */
6493 if (cleared)
6494 need_to_clear = 0;
6495 else if (REG_P (target) && TREE_STATIC (exp))
6496 need_to_clear = 1;
6497 else
6499 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6500 tree value;
6502 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6504 int n_elts_here = tree_to_uhwi
6505 (int_const_binop (TRUNC_DIV_EXPR,
6506 TYPE_SIZE (TREE_TYPE (value)),
6507 TYPE_SIZE (elttype)));
6509 count += n_elts_here;
6510 if (mostly_zeros_p (value))
6511 zero_count += n_elts_here;
6514 /* Clear the entire vector first if there are any missing elements,
6515 or if the incidence of zero elements is >= 75%. */
6516 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6519 if (need_to_clear && size > 0 && !vector)
6521 if (REG_P (target))
6522 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6523 else
6524 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6525 cleared = 1;
6528 /* Inform later passes that the old value is dead. */
6529 if (!cleared && !vector && REG_P (target))
6530 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6532 if (MEM_P (target))
6533 alias = MEM_ALIAS_SET (target);
6534 else
6535 alias = get_alias_set (elttype);
6537 /* Store each element of the constructor into the corresponding
6538 element of TARGET, determined by counting the elements. */
6539 for (idx = 0, i = 0;
6540 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6541 idx++, i += bitsize / elt_size)
6543 HOST_WIDE_INT eltpos;
6544 tree value = ce->value;
6546 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6547 if (cleared && initializer_zerop (value))
6548 continue;
6550 if (ce->index)
6551 eltpos = tree_to_uhwi (ce->index);
6552 else
6553 eltpos = i;
6555 if (vector)
6557 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6558 elements. */
6559 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6560 RTVEC_ELT (vector, eltpos)
6561 = expand_normal (value);
6563 else
6565 machine_mode value_mode =
6566 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6567 ? TYPE_MODE (TREE_TYPE (value))
6568 : eltmode;
6569 bitpos = eltpos * elt_size;
6570 store_constructor_field (target, bitsize, bitpos, value_mode,
6571 value, cleared, alias);
6575 if (vector)
6576 emit_insn (GEN_FCN (icode)
6577 (target,
6578 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6579 break;
6582 default:
6583 gcc_unreachable ();
6587 /* Store the value of EXP (an expression tree)
6588 into a subfield of TARGET which has mode MODE and occupies
6589 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6590 If MODE is VOIDmode, it means that we are storing into a bit-field.
6592 BITREGION_START is bitpos of the first bitfield in this region.
6593 BITREGION_END is the bitpos of the ending bitfield in this region.
6594 These two fields are 0, if the C++ memory model does not apply,
6595 or we are not interested in keeping track of bitfield regions.
6597 Always return const0_rtx unless we have something particular to
6598 return.
6600 ALIAS_SET is the alias set for the destination. This value will
6601 (in general) be different from that for TARGET, since TARGET is a
6602 reference to the containing structure.
6604 If NONTEMPORAL is true, try generating a nontemporal store. */
6606 static rtx
6607 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6608 unsigned HOST_WIDE_INT bitregion_start,
6609 unsigned HOST_WIDE_INT bitregion_end,
6610 machine_mode mode, tree exp,
6611 alias_set_type alias_set, bool nontemporal)
6613 if (TREE_CODE (exp) == ERROR_MARK)
6614 return const0_rtx;
6616 /* If we have nothing to store, do nothing unless the expression has
6617 side-effects. */
6618 if (bitsize == 0)
6619 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6621 if (GET_CODE (target) == CONCAT)
6623 /* We're storing into a struct containing a single __complex. */
6625 gcc_assert (!bitpos);
6626 return store_expr (exp, target, 0, nontemporal);
6629 /* If the structure is in a register or if the component
6630 is a bit field, we cannot use addressing to access it.
6631 Use bit-field techniques or SUBREG to store in it. */
6633 if (mode == VOIDmode
6634 || (mode != BLKmode && ! direct_store[(int) mode]
6635 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6636 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6637 || REG_P (target)
6638 || GET_CODE (target) == SUBREG
6639 /* If the field isn't aligned enough to store as an ordinary memref,
6640 store it as a bit field. */
6641 || (mode != BLKmode
6642 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6643 || bitpos % GET_MODE_ALIGNMENT (mode))
6644 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6645 || (bitpos % BITS_PER_UNIT != 0)))
6646 || (bitsize >= 0 && mode != BLKmode
6647 && GET_MODE_BITSIZE (mode) > bitsize)
6648 /* If the RHS and field are a constant size and the size of the
6649 RHS isn't the same size as the bitfield, we must use bitfield
6650 operations. */
6651 || (bitsize >= 0
6652 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6653 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6654 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6655 decl we must use bitfield operations. */
6656 || (bitsize >= 0
6657 && TREE_CODE (exp) == MEM_REF
6658 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6659 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6660 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6661 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6663 rtx temp;
6664 gimple nop_def;
6666 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6667 implies a mask operation. If the precision is the same size as
6668 the field we're storing into, that mask is redundant. This is
6669 particularly common with bit field assignments generated by the
6670 C front end. */
6671 nop_def = get_def_for_expr (exp, NOP_EXPR);
6672 if (nop_def)
6674 tree type = TREE_TYPE (exp);
6675 if (INTEGRAL_TYPE_P (type)
6676 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6677 && bitsize == TYPE_PRECISION (type))
6679 tree op = gimple_assign_rhs1 (nop_def);
6680 type = TREE_TYPE (op);
6681 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6682 exp = op;
6686 temp = expand_normal (exp);
6688 /* If BITSIZE is narrower than the size of the type of EXP
6689 we will be narrowing TEMP. Normally, what's wanted are the
6690 low-order bits. However, if EXP's type is a record and this is
6691 big-endian machine, we want the upper BITSIZE bits. */
6692 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6693 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6694 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6695 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6696 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6697 NULL_RTX, 1);
6699 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6700 if (mode != VOIDmode && mode != BLKmode
6701 && mode != TYPE_MODE (TREE_TYPE (exp)))
6702 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6704 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6705 are both BLKmode, both must be in memory and BITPOS must be aligned
6706 on a byte boundary. If so, we simply do a block copy. Likewise for
6707 a BLKmode-like TARGET. */
6708 if (GET_CODE (temp) != PARALLEL
6709 && GET_MODE (temp) == BLKmode
6710 && (GET_MODE (target) == BLKmode
6711 || (MEM_P (target)
6712 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6713 && (bitpos % BITS_PER_UNIT) == 0
6714 && (bitsize % BITS_PER_UNIT) == 0)))
6716 gcc_assert (MEM_P (target) && MEM_P (temp)
6717 && (bitpos % BITS_PER_UNIT) == 0);
6719 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6720 emit_block_move (target, temp,
6721 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6722 / BITS_PER_UNIT),
6723 BLOCK_OP_NORMAL);
6725 return const0_rtx;
6728 /* Handle calls that return values in multiple non-contiguous locations.
6729 The Irix 6 ABI has examples of this. */
6730 if (GET_CODE (temp) == PARALLEL)
6732 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6733 rtx temp_target;
6734 if (mode == BLKmode || mode == VOIDmode)
6735 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6736 temp_target = gen_reg_rtx (mode);
6737 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6738 temp = temp_target;
6740 else if (mode == BLKmode)
6742 /* Handle calls that return BLKmode values in registers. */
6743 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6745 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6746 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6747 temp = temp_target;
6749 else
6751 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6752 rtx temp_target;
6753 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6754 temp_target = gen_reg_rtx (mode);
6755 temp_target
6756 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6757 temp_target, mode, mode);
6758 temp = temp_target;
6762 /* Store the value in the bitfield. */
6763 store_bit_field (target, bitsize, bitpos,
6764 bitregion_start, bitregion_end,
6765 mode, temp);
6767 return const0_rtx;
6769 else
6771 /* Now build a reference to just the desired component. */
6772 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6774 if (to_rtx == target)
6775 to_rtx = copy_rtx (to_rtx);
6777 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6778 set_mem_alias_set (to_rtx, alias_set);
6780 return store_expr (exp, to_rtx, 0, nontemporal);
6784 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6785 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6786 codes and find the ultimate containing object, which we return.
6788 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6789 bit position, and *PUNSIGNEDP to the signedness of the field.
6790 If the position of the field is variable, we store a tree
6791 giving the variable offset (in units) in *POFFSET.
6792 This offset is in addition to the bit position.
6793 If the position is not variable, we store 0 in *POFFSET.
6795 If any of the extraction expressions is volatile,
6796 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6798 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6799 Otherwise, it is a mode that can be used to access the field.
6801 If the field describes a variable-sized object, *PMODE is set to
6802 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6803 this case, but the address of the object can be found.
6805 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6806 look through nodes that serve as markers of a greater alignment than
6807 the one that can be deduced from the expression. These nodes make it
6808 possible for front-ends to prevent temporaries from being created by
6809 the middle-end on alignment considerations. For that purpose, the
6810 normal operating mode at high-level is to always pass FALSE so that
6811 the ultimate containing object is really returned; moreover, the
6812 associated predicate handled_component_p will always return TRUE
6813 on these nodes, thus indicating that they are essentially handled
6814 by get_inner_reference. TRUE should only be passed when the caller
6815 is scanning the expression in order to build another representation
6816 and specifically knows how to handle these nodes; as such, this is
6817 the normal operating mode in the RTL expanders. */
6819 tree
6820 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6821 HOST_WIDE_INT *pbitpos, tree *poffset,
6822 machine_mode *pmode, int *punsignedp,
6823 int *pvolatilep, bool keep_aligning)
6825 tree size_tree = 0;
6826 machine_mode mode = VOIDmode;
6827 bool blkmode_bitfield = false;
6828 tree offset = size_zero_node;
6829 offset_int bit_offset = 0;
6831 /* First get the mode, signedness, and size. We do this from just the
6832 outermost expression. */
6833 *pbitsize = -1;
6834 if (TREE_CODE (exp) == COMPONENT_REF)
6836 tree field = TREE_OPERAND (exp, 1);
6837 size_tree = DECL_SIZE (field);
6838 if (flag_strict_volatile_bitfields > 0
6839 && TREE_THIS_VOLATILE (exp)
6840 && DECL_BIT_FIELD_TYPE (field)
6841 && DECL_MODE (field) != BLKmode)
6842 /* Volatile bitfields should be accessed in the mode of the
6843 field's type, not the mode computed based on the bit
6844 size. */
6845 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6846 else if (!DECL_BIT_FIELD (field))
6847 mode = DECL_MODE (field);
6848 else if (DECL_MODE (field) == BLKmode)
6849 blkmode_bitfield = true;
6851 *punsignedp = DECL_UNSIGNED (field);
6853 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6855 size_tree = TREE_OPERAND (exp, 1);
6856 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6857 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6859 /* For vector types, with the correct size of access, use the mode of
6860 inner type. */
6861 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6862 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6863 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6864 mode = TYPE_MODE (TREE_TYPE (exp));
6866 else
6868 mode = TYPE_MODE (TREE_TYPE (exp));
6869 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6871 if (mode == BLKmode)
6872 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6873 else
6874 *pbitsize = GET_MODE_BITSIZE (mode);
6877 if (size_tree != 0)
6879 if (! tree_fits_uhwi_p (size_tree))
6880 mode = BLKmode, *pbitsize = -1;
6881 else
6882 *pbitsize = tree_to_uhwi (size_tree);
6885 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6886 and find the ultimate containing object. */
6887 while (1)
6889 switch (TREE_CODE (exp))
6891 case BIT_FIELD_REF:
6892 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
6893 break;
6895 case COMPONENT_REF:
6897 tree field = TREE_OPERAND (exp, 1);
6898 tree this_offset = component_ref_field_offset (exp);
6900 /* If this field hasn't been filled in yet, don't go past it.
6901 This should only happen when folding expressions made during
6902 type construction. */
6903 if (this_offset == 0)
6904 break;
6906 offset = size_binop (PLUS_EXPR, offset, this_offset);
6907 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
6909 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6911 break;
6913 case ARRAY_REF:
6914 case ARRAY_RANGE_REF:
6916 tree index = TREE_OPERAND (exp, 1);
6917 tree low_bound = array_ref_low_bound (exp);
6918 tree unit_size = array_ref_element_size (exp);
6920 /* We assume all arrays have sizes that are a multiple of a byte.
6921 First subtract the lower bound, if any, in the type of the
6922 index, then convert to sizetype and multiply by the size of
6923 the array element. */
6924 if (! integer_zerop (low_bound))
6925 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6926 index, low_bound);
6928 offset = size_binop (PLUS_EXPR, offset,
6929 size_binop (MULT_EXPR,
6930 fold_convert (sizetype, index),
6931 unit_size));
6933 break;
6935 case REALPART_EXPR:
6936 break;
6938 case IMAGPART_EXPR:
6939 bit_offset += *pbitsize;
6940 break;
6942 case VIEW_CONVERT_EXPR:
6943 if (keep_aligning && STRICT_ALIGNMENT
6944 && (TYPE_ALIGN (TREE_TYPE (exp))
6945 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6946 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6947 < BIGGEST_ALIGNMENT)
6948 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6949 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6950 goto done;
6951 break;
6953 case MEM_REF:
6954 /* Hand back the decl for MEM[&decl, off]. */
6955 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6957 tree off = TREE_OPERAND (exp, 1);
6958 if (!integer_zerop (off))
6960 offset_int boff, coff = mem_ref_offset (exp);
6961 boff = wi::lshift (coff, LOG2_BITS_PER_UNIT);
6962 bit_offset += boff;
6964 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6966 goto done;
6968 default:
6969 goto done;
6972 /* If any reference in the chain is volatile, the effect is volatile. */
6973 if (TREE_THIS_VOLATILE (exp))
6974 *pvolatilep = 1;
6976 exp = TREE_OPERAND (exp, 0);
6978 done:
6980 /* If OFFSET is constant, see if we can return the whole thing as a
6981 constant bit position. Make sure to handle overflow during
6982 this conversion. */
6983 if (TREE_CODE (offset) == INTEGER_CST)
6985 offset_int tem = wi::sext (wi::to_offset (offset),
6986 TYPE_PRECISION (sizetype));
6987 tem = wi::lshift (tem, LOG2_BITS_PER_UNIT);
6988 tem += bit_offset;
6989 if (wi::fits_shwi_p (tem))
6991 *pbitpos = tem.to_shwi ();
6992 *poffset = offset = NULL_TREE;
6996 /* Otherwise, split it up. */
6997 if (offset)
6999 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7000 if (wi::neg_p (bit_offset) || !wi::fits_shwi_p (bit_offset))
7002 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
7003 offset_int tem = bit_offset.and_not (mask);
7004 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7005 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7006 bit_offset -= tem;
7007 tem = wi::arshift (tem, LOG2_BITS_PER_UNIT);
7008 offset = size_binop (PLUS_EXPR, offset,
7009 wide_int_to_tree (sizetype, tem));
7012 *pbitpos = bit_offset.to_shwi ();
7013 *poffset = offset;
7016 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7017 if (mode == VOIDmode
7018 && blkmode_bitfield
7019 && (*pbitpos % BITS_PER_UNIT) == 0
7020 && (*pbitsize % BITS_PER_UNIT) == 0)
7021 *pmode = BLKmode;
7022 else
7023 *pmode = mode;
7025 return exp;
7028 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7030 static unsigned HOST_WIDE_INT
7031 target_align (const_tree target)
7033 /* We might have a chain of nested references with intermediate misaligning
7034 bitfields components, so need to recurse to find out. */
7036 unsigned HOST_WIDE_INT this_align, outer_align;
7038 switch (TREE_CODE (target))
7040 case BIT_FIELD_REF:
7041 return 1;
7043 case COMPONENT_REF:
7044 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7045 outer_align = target_align (TREE_OPERAND (target, 0));
7046 return MIN (this_align, outer_align);
7048 case ARRAY_REF:
7049 case ARRAY_RANGE_REF:
7050 this_align = TYPE_ALIGN (TREE_TYPE (target));
7051 outer_align = target_align (TREE_OPERAND (target, 0));
7052 return MIN (this_align, outer_align);
7054 CASE_CONVERT:
7055 case NON_LVALUE_EXPR:
7056 case VIEW_CONVERT_EXPR:
7057 this_align = TYPE_ALIGN (TREE_TYPE (target));
7058 outer_align = target_align (TREE_OPERAND (target, 0));
7059 return MAX (this_align, outer_align);
7061 default:
7062 return TYPE_ALIGN (TREE_TYPE (target));
7067 /* Given an rtx VALUE that may contain additions and multiplications, return
7068 an equivalent value that just refers to a register, memory, or constant.
7069 This is done by generating instructions to perform the arithmetic and
7070 returning a pseudo-register containing the value.
7072 The returned value may be a REG, SUBREG, MEM or constant. */
7075 force_operand (rtx value, rtx target)
7077 rtx op1, op2;
7078 /* Use subtarget as the target for operand 0 of a binary operation. */
7079 rtx subtarget = get_subtarget (target);
7080 enum rtx_code code = GET_CODE (value);
7082 /* Check for subreg applied to an expression produced by loop optimizer. */
7083 if (code == SUBREG
7084 && !REG_P (SUBREG_REG (value))
7085 && !MEM_P (SUBREG_REG (value)))
7087 value
7088 = simplify_gen_subreg (GET_MODE (value),
7089 force_reg (GET_MODE (SUBREG_REG (value)),
7090 force_operand (SUBREG_REG (value),
7091 NULL_RTX)),
7092 GET_MODE (SUBREG_REG (value)),
7093 SUBREG_BYTE (value));
7094 code = GET_CODE (value);
7097 /* Check for a PIC address load. */
7098 if ((code == PLUS || code == MINUS)
7099 && XEXP (value, 0) == pic_offset_table_rtx
7100 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7101 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7102 || GET_CODE (XEXP (value, 1)) == CONST))
7104 if (!subtarget)
7105 subtarget = gen_reg_rtx (GET_MODE (value));
7106 emit_move_insn (subtarget, value);
7107 return subtarget;
7110 if (ARITHMETIC_P (value))
7112 op2 = XEXP (value, 1);
7113 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7114 subtarget = 0;
7115 if (code == MINUS && CONST_INT_P (op2))
7117 code = PLUS;
7118 op2 = negate_rtx (GET_MODE (value), op2);
7121 /* Check for an addition with OP2 a constant integer and our first
7122 operand a PLUS of a virtual register and something else. In that
7123 case, we want to emit the sum of the virtual register and the
7124 constant first and then add the other value. This allows virtual
7125 register instantiation to simply modify the constant rather than
7126 creating another one around this addition. */
7127 if (code == PLUS && CONST_INT_P (op2)
7128 && GET_CODE (XEXP (value, 0)) == PLUS
7129 && REG_P (XEXP (XEXP (value, 0), 0))
7130 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7131 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7133 rtx temp = expand_simple_binop (GET_MODE (value), code,
7134 XEXP (XEXP (value, 0), 0), op2,
7135 subtarget, 0, OPTAB_LIB_WIDEN);
7136 return expand_simple_binop (GET_MODE (value), code, temp,
7137 force_operand (XEXP (XEXP (value,
7138 0), 1), 0),
7139 target, 0, OPTAB_LIB_WIDEN);
7142 op1 = force_operand (XEXP (value, 0), subtarget);
7143 op2 = force_operand (op2, NULL_RTX);
7144 switch (code)
7146 case MULT:
7147 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7148 case DIV:
7149 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7150 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7151 target, 1, OPTAB_LIB_WIDEN);
7152 else
7153 return expand_divmod (0,
7154 FLOAT_MODE_P (GET_MODE (value))
7155 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7156 GET_MODE (value), op1, op2, target, 0);
7157 case MOD:
7158 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7159 target, 0);
7160 case UDIV:
7161 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7162 target, 1);
7163 case UMOD:
7164 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7165 target, 1);
7166 case ASHIFTRT:
7167 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7168 target, 0, OPTAB_LIB_WIDEN);
7169 default:
7170 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7171 target, 1, OPTAB_LIB_WIDEN);
7174 if (UNARY_P (value))
7176 if (!target)
7177 target = gen_reg_rtx (GET_MODE (value));
7178 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7179 switch (code)
7181 case ZERO_EXTEND:
7182 case SIGN_EXTEND:
7183 case TRUNCATE:
7184 case FLOAT_EXTEND:
7185 case FLOAT_TRUNCATE:
7186 convert_move (target, op1, code == ZERO_EXTEND);
7187 return target;
7189 case FIX:
7190 case UNSIGNED_FIX:
7191 expand_fix (target, op1, code == UNSIGNED_FIX);
7192 return target;
7194 case FLOAT:
7195 case UNSIGNED_FLOAT:
7196 expand_float (target, op1, code == UNSIGNED_FLOAT);
7197 return target;
7199 default:
7200 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7204 #ifdef INSN_SCHEDULING
7205 /* On machines that have insn scheduling, we want all memory reference to be
7206 explicit, so we need to deal with such paradoxical SUBREGs. */
7207 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7208 value
7209 = simplify_gen_subreg (GET_MODE (value),
7210 force_reg (GET_MODE (SUBREG_REG (value)),
7211 force_operand (SUBREG_REG (value),
7212 NULL_RTX)),
7213 GET_MODE (SUBREG_REG (value)),
7214 SUBREG_BYTE (value));
7215 #endif
7217 return value;
7220 /* Subroutine of expand_expr: return nonzero iff there is no way that
7221 EXP can reference X, which is being modified. TOP_P is nonzero if this
7222 call is going to be used to determine whether we need a temporary
7223 for EXP, as opposed to a recursive call to this function.
7225 It is always safe for this routine to return zero since it merely
7226 searches for optimization opportunities. */
7229 safe_from_p (const_rtx x, tree exp, int top_p)
7231 rtx exp_rtl = 0;
7232 int i, nops;
7234 if (x == 0
7235 /* If EXP has varying size, we MUST use a target since we currently
7236 have no way of allocating temporaries of variable size
7237 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7238 So we assume here that something at a higher level has prevented a
7239 clash. This is somewhat bogus, but the best we can do. Only
7240 do this when X is BLKmode and when we are at the top level. */
7241 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7242 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7243 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7244 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7245 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7246 != INTEGER_CST)
7247 && GET_MODE (x) == BLKmode)
7248 /* If X is in the outgoing argument area, it is always safe. */
7249 || (MEM_P (x)
7250 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7251 || (GET_CODE (XEXP (x, 0)) == PLUS
7252 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7253 return 1;
7255 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7256 find the underlying pseudo. */
7257 if (GET_CODE (x) == SUBREG)
7259 x = SUBREG_REG (x);
7260 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7261 return 0;
7264 /* Now look at our tree code and possibly recurse. */
7265 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7267 case tcc_declaration:
7268 exp_rtl = DECL_RTL_IF_SET (exp);
7269 break;
7271 case tcc_constant:
7272 return 1;
7274 case tcc_exceptional:
7275 if (TREE_CODE (exp) == TREE_LIST)
7277 while (1)
7279 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7280 return 0;
7281 exp = TREE_CHAIN (exp);
7282 if (!exp)
7283 return 1;
7284 if (TREE_CODE (exp) != TREE_LIST)
7285 return safe_from_p (x, exp, 0);
7288 else if (TREE_CODE (exp) == CONSTRUCTOR)
7290 constructor_elt *ce;
7291 unsigned HOST_WIDE_INT idx;
7293 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7294 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7295 || !safe_from_p (x, ce->value, 0))
7296 return 0;
7297 return 1;
7299 else if (TREE_CODE (exp) == ERROR_MARK)
7300 return 1; /* An already-visited SAVE_EXPR? */
7301 else
7302 return 0;
7304 case tcc_statement:
7305 /* The only case we look at here is the DECL_INITIAL inside a
7306 DECL_EXPR. */
7307 return (TREE_CODE (exp) != DECL_EXPR
7308 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7309 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7310 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7312 case tcc_binary:
7313 case tcc_comparison:
7314 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7315 return 0;
7316 /* Fall through. */
7318 case tcc_unary:
7319 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7321 case tcc_expression:
7322 case tcc_reference:
7323 case tcc_vl_exp:
7324 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7325 the expression. If it is set, we conflict iff we are that rtx or
7326 both are in memory. Otherwise, we check all operands of the
7327 expression recursively. */
7329 switch (TREE_CODE (exp))
7331 case ADDR_EXPR:
7332 /* If the operand is static or we are static, we can't conflict.
7333 Likewise if we don't conflict with the operand at all. */
7334 if (staticp (TREE_OPERAND (exp, 0))
7335 || TREE_STATIC (exp)
7336 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7337 return 1;
7339 /* Otherwise, the only way this can conflict is if we are taking
7340 the address of a DECL a that address if part of X, which is
7341 very rare. */
7342 exp = TREE_OPERAND (exp, 0);
7343 if (DECL_P (exp))
7345 if (!DECL_RTL_SET_P (exp)
7346 || !MEM_P (DECL_RTL (exp)))
7347 return 0;
7348 else
7349 exp_rtl = XEXP (DECL_RTL (exp), 0);
7351 break;
7353 case MEM_REF:
7354 if (MEM_P (x)
7355 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7356 get_alias_set (exp)))
7357 return 0;
7358 break;
7360 case CALL_EXPR:
7361 /* Assume that the call will clobber all hard registers and
7362 all of memory. */
7363 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7364 || MEM_P (x))
7365 return 0;
7366 break;
7368 case WITH_CLEANUP_EXPR:
7369 case CLEANUP_POINT_EXPR:
7370 /* Lowered by gimplify.c. */
7371 gcc_unreachable ();
7373 case SAVE_EXPR:
7374 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7376 default:
7377 break;
7380 /* If we have an rtx, we do not need to scan our operands. */
7381 if (exp_rtl)
7382 break;
7384 nops = TREE_OPERAND_LENGTH (exp);
7385 for (i = 0; i < nops; i++)
7386 if (TREE_OPERAND (exp, i) != 0
7387 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7388 return 0;
7390 break;
7392 case tcc_type:
7393 /* Should never get a type here. */
7394 gcc_unreachable ();
7397 /* If we have an rtl, find any enclosed object. Then see if we conflict
7398 with it. */
7399 if (exp_rtl)
7401 if (GET_CODE (exp_rtl) == SUBREG)
7403 exp_rtl = SUBREG_REG (exp_rtl);
7404 if (REG_P (exp_rtl)
7405 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7406 return 0;
7409 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7410 are memory and they conflict. */
7411 return ! (rtx_equal_p (x, exp_rtl)
7412 || (MEM_P (x) && MEM_P (exp_rtl)
7413 && true_dependence (exp_rtl, VOIDmode, x)));
7416 /* If we reach here, it is safe. */
7417 return 1;
7421 /* Return the highest power of two that EXP is known to be a multiple of.
7422 This is used in updating alignment of MEMs in array references. */
7424 unsigned HOST_WIDE_INT
7425 highest_pow2_factor (const_tree exp)
7427 unsigned HOST_WIDE_INT ret;
7428 int trailing_zeros = tree_ctz (exp);
7429 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7430 return BIGGEST_ALIGNMENT;
7431 ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros;
7432 if (ret > BIGGEST_ALIGNMENT)
7433 return BIGGEST_ALIGNMENT;
7434 return ret;
7437 /* Similar, except that the alignment requirements of TARGET are
7438 taken into account. Assume it is at least as aligned as its
7439 type, unless it is a COMPONENT_REF in which case the layout of
7440 the structure gives the alignment. */
7442 static unsigned HOST_WIDE_INT
7443 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7445 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7446 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7448 return MAX (factor, talign);
7451 /* Convert the tree comparison code TCODE to the rtl one where the
7452 signedness is UNSIGNEDP. */
7454 static enum rtx_code
7455 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7457 enum rtx_code code;
7458 switch (tcode)
7460 case EQ_EXPR:
7461 code = EQ;
7462 break;
7463 case NE_EXPR:
7464 code = NE;
7465 break;
7466 case LT_EXPR:
7467 code = unsignedp ? LTU : LT;
7468 break;
7469 case LE_EXPR:
7470 code = unsignedp ? LEU : LE;
7471 break;
7472 case GT_EXPR:
7473 code = unsignedp ? GTU : GT;
7474 break;
7475 case GE_EXPR:
7476 code = unsignedp ? GEU : GE;
7477 break;
7478 case UNORDERED_EXPR:
7479 code = UNORDERED;
7480 break;
7481 case ORDERED_EXPR:
7482 code = ORDERED;
7483 break;
7484 case UNLT_EXPR:
7485 code = UNLT;
7486 break;
7487 case UNLE_EXPR:
7488 code = UNLE;
7489 break;
7490 case UNGT_EXPR:
7491 code = UNGT;
7492 break;
7493 case UNGE_EXPR:
7494 code = UNGE;
7495 break;
7496 case UNEQ_EXPR:
7497 code = UNEQ;
7498 break;
7499 case LTGT_EXPR:
7500 code = LTGT;
7501 break;
7503 default:
7504 gcc_unreachable ();
7506 return code;
7509 /* Subroutine of expand_expr. Expand the two operands of a binary
7510 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7511 The value may be stored in TARGET if TARGET is nonzero. The
7512 MODIFIER argument is as documented by expand_expr. */
7514 void
7515 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7516 enum expand_modifier modifier)
7518 if (! safe_from_p (target, exp1, 1))
7519 target = 0;
7520 if (operand_equal_p (exp0, exp1, 0))
7522 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7523 *op1 = copy_rtx (*op0);
7525 else
7527 /* If we need to preserve evaluation order, copy exp0 into its own
7528 temporary variable so that it can't be clobbered by exp1. */
7529 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7530 exp0 = save_expr (exp0);
7531 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7532 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7537 /* Return a MEM that contains constant EXP. DEFER is as for
7538 output_constant_def and MODIFIER is as for expand_expr. */
7540 static rtx
7541 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7543 rtx mem;
7545 mem = output_constant_def (exp, defer);
7546 if (modifier != EXPAND_INITIALIZER)
7547 mem = use_anchored_address (mem);
7548 return mem;
7551 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7552 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7554 static rtx
7555 expand_expr_addr_expr_1 (tree exp, rtx target, machine_mode tmode,
7556 enum expand_modifier modifier, addr_space_t as)
7558 rtx result, subtarget;
7559 tree inner, offset;
7560 HOST_WIDE_INT bitsize, bitpos;
7561 int volatilep, unsignedp;
7562 machine_mode mode1;
7564 /* If we are taking the address of a constant and are at the top level,
7565 we have to use output_constant_def since we can't call force_const_mem
7566 at top level. */
7567 /* ??? This should be considered a front-end bug. We should not be
7568 generating ADDR_EXPR of something that isn't an LVALUE. The only
7569 exception here is STRING_CST. */
7570 if (CONSTANT_CLASS_P (exp))
7572 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7573 if (modifier < EXPAND_SUM)
7574 result = force_operand (result, target);
7575 return result;
7578 /* Everything must be something allowed by is_gimple_addressable. */
7579 switch (TREE_CODE (exp))
7581 case INDIRECT_REF:
7582 /* This case will happen via recursion for &a->b. */
7583 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7585 case MEM_REF:
7587 tree tem = TREE_OPERAND (exp, 0);
7588 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7589 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7590 return expand_expr (tem, target, tmode, modifier);
7593 case CONST_DECL:
7594 /* Expand the initializer like constants above. */
7595 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7596 0, modifier), 0);
7597 if (modifier < EXPAND_SUM)
7598 result = force_operand (result, target);
7599 return result;
7601 case REALPART_EXPR:
7602 /* The real part of the complex number is always first, therefore
7603 the address is the same as the address of the parent object. */
7604 offset = 0;
7605 bitpos = 0;
7606 inner = TREE_OPERAND (exp, 0);
7607 break;
7609 case IMAGPART_EXPR:
7610 /* The imaginary part of the complex number is always second.
7611 The expression is therefore always offset by the size of the
7612 scalar type. */
7613 offset = 0;
7614 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7615 inner = TREE_OPERAND (exp, 0);
7616 break;
7618 case COMPOUND_LITERAL_EXPR:
7619 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7620 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7621 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7622 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7623 the initializers aren't gimplified. */
7624 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7625 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7626 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7627 target, tmode, modifier, as);
7628 /* FALLTHRU */
7629 default:
7630 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7631 expand_expr, as that can have various side effects; LABEL_DECLs for
7632 example, may not have their DECL_RTL set yet. Expand the rtl of
7633 CONSTRUCTORs too, which should yield a memory reference for the
7634 constructor's contents. Assume language specific tree nodes can
7635 be expanded in some interesting way. */
7636 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7637 if (DECL_P (exp)
7638 || TREE_CODE (exp) == CONSTRUCTOR
7639 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7641 result = expand_expr (exp, target, tmode,
7642 modifier == EXPAND_INITIALIZER
7643 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7645 /* If the DECL isn't in memory, then the DECL wasn't properly
7646 marked TREE_ADDRESSABLE, which will be either a front-end
7647 or a tree optimizer bug. */
7649 if (TREE_ADDRESSABLE (exp)
7650 && ! MEM_P (result)
7651 && ! targetm.calls.allocate_stack_slots_for_args ())
7653 error ("local frame unavailable (naked function?)");
7654 return result;
7656 else
7657 gcc_assert (MEM_P (result));
7658 result = XEXP (result, 0);
7660 /* ??? Is this needed anymore? */
7661 if (DECL_P (exp))
7662 TREE_USED (exp) = 1;
7664 if (modifier != EXPAND_INITIALIZER
7665 && modifier != EXPAND_CONST_ADDRESS
7666 && modifier != EXPAND_SUM)
7667 result = force_operand (result, target);
7668 return result;
7671 /* Pass FALSE as the last argument to get_inner_reference although
7672 we are expanding to RTL. The rationale is that we know how to
7673 handle "aligning nodes" here: we can just bypass them because
7674 they won't change the final object whose address will be returned
7675 (they actually exist only for that purpose). */
7676 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7677 &mode1, &unsignedp, &volatilep, false);
7678 break;
7681 /* We must have made progress. */
7682 gcc_assert (inner != exp);
7684 subtarget = offset || bitpos ? NULL_RTX : target;
7685 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7686 inner alignment, force the inner to be sufficiently aligned. */
7687 if (CONSTANT_CLASS_P (inner)
7688 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7690 inner = copy_node (inner);
7691 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7692 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7693 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7695 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7697 if (offset)
7699 rtx tmp;
7701 if (modifier != EXPAND_NORMAL)
7702 result = force_operand (result, NULL);
7703 tmp = expand_expr (offset, NULL_RTX, tmode,
7704 modifier == EXPAND_INITIALIZER
7705 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7707 /* expand_expr is allowed to return an object in a mode other
7708 than TMODE. If it did, we need to convert. */
7709 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7710 tmp = convert_modes (tmode, GET_MODE (tmp),
7711 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7712 result = convert_memory_address_addr_space (tmode, result, as);
7713 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7715 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7716 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7717 else
7719 subtarget = bitpos ? NULL_RTX : target;
7720 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7721 1, OPTAB_LIB_WIDEN);
7725 if (bitpos)
7727 /* Someone beforehand should have rejected taking the address
7728 of such an object. */
7729 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7731 result = convert_memory_address_addr_space (tmode, result, as);
7732 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7733 if (modifier < EXPAND_SUM)
7734 result = force_operand (result, target);
7737 return result;
7740 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7741 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7743 static rtx
7744 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7745 enum expand_modifier modifier)
7747 addr_space_t as = ADDR_SPACE_GENERIC;
7748 machine_mode address_mode = Pmode;
7749 machine_mode pointer_mode = ptr_mode;
7750 machine_mode rmode;
7751 rtx result;
7753 /* Target mode of VOIDmode says "whatever's natural". */
7754 if (tmode == VOIDmode)
7755 tmode = TYPE_MODE (TREE_TYPE (exp));
7757 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7759 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7760 address_mode = targetm.addr_space.address_mode (as);
7761 pointer_mode = targetm.addr_space.pointer_mode (as);
7764 /* We can get called with some Weird Things if the user does silliness
7765 like "(short) &a". In that case, convert_memory_address won't do
7766 the right thing, so ignore the given target mode. */
7767 if (tmode != address_mode && tmode != pointer_mode)
7768 tmode = address_mode;
7770 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7771 tmode, modifier, as);
7773 /* Despite expand_expr claims concerning ignoring TMODE when not
7774 strictly convenient, stuff breaks if we don't honor it. Note
7775 that combined with the above, we only do this for pointer modes. */
7776 rmode = GET_MODE (result);
7777 if (rmode == VOIDmode)
7778 rmode = tmode;
7779 if (rmode != tmode)
7780 result = convert_memory_address_addr_space (tmode, result, as);
7782 return result;
7785 /* Generate code for computing CONSTRUCTOR EXP.
7786 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7787 is TRUE, instead of creating a temporary variable in memory
7788 NULL is returned and the caller needs to handle it differently. */
7790 static rtx
7791 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7792 bool avoid_temp_mem)
7794 tree type = TREE_TYPE (exp);
7795 machine_mode mode = TYPE_MODE (type);
7797 /* Try to avoid creating a temporary at all. This is possible
7798 if all of the initializer is zero.
7799 FIXME: try to handle all [0..255] initializers we can handle
7800 with memset. */
7801 if (TREE_STATIC (exp)
7802 && !TREE_ADDRESSABLE (exp)
7803 && target != 0 && mode == BLKmode
7804 && all_zeros_p (exp))
7806 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7807 return target;
7810 /* All elts simple constants => refer to a constant in memory. But
7811 if this is a non-BLKmode mode, let it store a field at a time
7812 since that should make a CONST_INT, CONST_WIDE_INT or
7813 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7814 use, it is best to store directly into the target unless the type
7815 is large enough that memcpy will be used. If we are making an
7816 initializer and all operands are constant, put it in memory as
7817 well.
7819 FIXME: Avoid trying to fill vector constructors piece-meal.
7820 Output them with output_constant_def below unless we're sure
7821 they're zeros. This should go away when vector initializers
7822 are treated like VECTOR_CST instead of arrays. */
7823 if ((TREE_STATIC (exp)
7824 && ((mode == BLKmode
7825 && ! (target != 0 && safe_from_p (target, exp, 1)))
7826 || TREE_ADDRESSABLE (exp)
7827 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7828 && (! can_move_by_pieces
7829 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7830 TYPE_ALIGN (type)))
7831 && ! mostly_zeros_p (exp))))
7832 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7833 && TREE_CONSTANT (exp)))
7835 rtx constructor;
7837 if (avoid_temp_mem)
7838 return NULL_RTX;
7840 constructor = expand_expr_constant (exp, 1, modifier);
7842 if (modifier != EXPAND_CONST_ADDRESS
7843 && modifier != EXPAND_INITIALIZER
7844 && modifier != EXPAND_SUM)
7845 constructor = validize_mem (constructor);
7847 return constructor;
7850 /* Handle calls that pass values in multiple non-contiguous
7851 locations. The Irix 6 ABI has examples of this. */
7852 if (target == 0 || ! safe_from_p (target, exp, 1)
7853 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7855 if (avoid_temp_mem)
7856 return NULL_RTX;
7858 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
7861 store_constructor (exp, target, 0, int_expr_size (exp));
7862 return target;
7866 /* expand_expr: generate code for computing expression EXP.
7867 An rtx for the computed value is returned. The value is never null.
7868 In the case of a void EXP, const0_rtx is returned.
7870 The value may be stored in TARGET if TARGET is nonzero.
7871 TARGET is just a suggestion; callers must assume that
7872 the rtx returned may not be the same as TARGET.
7874 If TARGET is CONST0_RTX, it means that the value will be ignored.
7876 If TMODE is not VOIDmode, it suggests generating the
7877 result in mode TMODE. But this is done only when convenient.
7878 Otherwise, TMODE is ignored and the value generated in its natural mode.
7879 TMODE is just a suggestion; callers must assume that
7880 the rtx returned may not have mode TMODE.
7882 Note that TARGET may have neither TMODE nor MODE. In that case, it
7883 probably will not be used.
7885 If MODIFIER is EXPAND_SUM then when EXP is an addition
7886 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7887 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7888 products as above, or REG or MEM, or constant.
7889 Ordinarily in such cases we would output mul or add instructions
7890 and then return a pseudo reg containing the sum.
7892 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7893 it also marks a label as absolutely required (it can't be dead).
7894 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7895 This is used for outputting expressions used in initializers.
7897 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7898 with a constant address even if that address is not normally legitimate.
7899 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7901 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7902 a call parameter. Such targets require special care as we haven't yet
7903 marked TARGET so that it's safe from being trashed by libcalls. We
7904 don't want to use TARGET for anything but the final result;
7905 Intermediate values must go elsewhere. Additionally, calls to
7906 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7908 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7909 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7910 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7911 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7912 recursively.
7914 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7915 In this case, we don't adjust a returned MEM rtx that wouldn't be
7916 sufficiently aligned for its mode; instead, it's up to the caller
7917 to deal with it afterwards. This is used to make sure that unaligned
7918 base objects for which out-of-bounds accesses are supported, for
7919 example record types with trailing arrays, aren't realigned behind
7920 the back of the caller.
7921 The normal operating mode is to pass FALSE for this parameter. */
7924 expand_expr_real (tree exp, rtx target, machine_mode tmode,
7925 enum expand_modifier modifier, rtx *alt_rtl,
7926 bool inner_reference_p)
7928 rtx ret;
7930 /* Handle ERROR_MARK before anybody tries to access its type. */
7931 if (TREE_CODE (exp) == ERROR_MARK
7932 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7934 ret = CONST0_RTX (tmode);
7935 return ret ? ret : const0_rtx;
7938 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
7939 inner_reference_p);
7940 return ret;
7943 /* Try to expand the conditional expression which is represented by
7944 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7945 return the rtl reg which repsents the result. Otherwise return
7946 NULL_RTL. */
7948 static rtx
7949 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7950 tree treeop1 ATTRIBUTE_UNUSED,
7951 tree treeop2 ATTRIBUTE_UNUSED)
7953 rtx insn;
7954 rtx op00, op01, op1, op2;
7955 enum rtx_code comparison_code;
7956 machine_mode comparison_mode;
7957 gimple srcstmt;
7958 rtx temp;
7959 tree type = TREE_TYPE (treeop1);
7960 int unsignedp = TYPE_UNSIGNED (type);
7961 machine_mode mode = TYPE_MODE (type);
7962 machine_mode orig_mode = mode;
7964 /* If we cannot do a conditional move on the mode, try doing it
7965 with the promoted mode. */
7966 if (!can_conditionally_move_p (mode))
7968 mode = promote_mode (type, mode, &unsignedp);
7969 if (!can_conditionally_move_p (mode))
7970 return NULL_RTX;
7971 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7973 else
7974 temp = assign_temp (type, 0, 1);
7976 start_sequence ();
7977 expand_operands (treeop1, treeop2,
7978 temp, &op1, &op2, EXPAND_NORMAL);
7980 if (TREE_CODE (treeop0) == SSA_NAME
7981 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7983 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7984 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7985 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7986 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7987 comparison_mode = TYPE_MODE (type);
7988 unsignedp = TYPE_UNSIGNED (type);
7989 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7991 else if (COMPARISON_CLASS_P (treeop0))
7993 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7994 enum tree_code cmpcode = TREE_CODE (treeop0);
7995 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7996 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7997 unsignedp = TYPE_UNSIGNED (type);
7998 comparison_mode = TYPE_MODE (type);
7999 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8001 else
8003 op00 = expand_normal (treeop0);
8004 op01 = const0_rtx;
8005 comparison_code = NE;
8006 comparison_mode = GET_MODE (op00);
8007 if (comparison_mode == VOIDmode)
8008 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8011 if (GET_MODE (op1) != mode)
8012 op1 = gen_lowpart (mode, op1);
8014 if (GET_MODE (op2) != mode)
8015 op2 = gen_lowpart (mode, op2);
8017 /* Try to emit the conditional move. */
8018 insn = emit_conditional_move (temp, comparison_code,
8019 op00, op01, comparison_mode,
8020 op1, op2, mode,
8021 unsignedp);
8023 /* If we could do the conditional move, emit the sequence,
8024 and return. */
8025 if (insn)
8027 rtx_insn *seq = get_insns ();
8028 end_sequence ();
8029 emit_insn (seq);
8030 return convert_modes (orig_mode, mode, temp, 0);
8033 /* Otherwise discard the sequence and fall back to code with
8034 branches. */
8035 end_sequence ();
8036 return NULL_RTX;
8040 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8041 enum expand_modifier modifier)
8043 rtx op0, op1, op2, temp;
8044 rtx_code_label *lab;
8045 tree type;
8046 int unsignedp;
8047 machine_mode mode;
8048 enum tree_code code = ops->code;
8049 optab this_optab;
8050 rtx subtarget, original_target;
8051 int ignore;
8052 bool reduce_bit_field;
8053 location_t loc = ops->location;
8054 tree treeop0, treeop1, treeop2;
8055 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8056 ? reduce_to_bit_field_precision ((expr), \
8057 target, \
8058 type) \
8059 : (expr))
8061 type = ops->type;
8062 mode = TYPE_MODE (type);
8063 unsignedp = TYPE_UNSIGNED (type);
8065 treeop0 = ops->op0;
8066 treeop1 = ops->op1;
8067 treeop2 = ops->op2;
8069 /* We should be called only on simple (binary or unary) expressions,
8070 exactly those that are valid in gimple expressions that aren't
8071 GIMPLE_SINGLE_RHS (or invalid). */
8072 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8073 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8074 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8076 ignore = (target == const0_rtx
8077 || ((CONVERT_EXPR_CODE_P (code)
8078 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8079 && TREE_CODE (type) == VOID_TYPE));
8081 /* We should be called only if we need the result. */
8082 gcc_assert (!ignore);
8084 /* An operation in what may be a bit-field type needs the
8085 result to be reduced to the precision of the bit-field type,
8086 which is narrower than that of the type's mode. */
8087 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8088 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8090 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8091 target = 0;
8093 /* Use subtarget as the target for operand 0 of a binary operation. */
8094 subtarget = get_subtarget (target);
8095 original_target = target;
8097 switch (code)
8099 case NON_LVALUE_EXPR:
8100 case PAREN_EXPR:
8101 CASE_CONVERT:
8102 if (treeop0 == error_mark_node)
8103 return const0_rtx;
8105 if (TREE_CODE (type) == UNION_TYPE)
8107 tree valtype = TREE_TYPE (treeop0);
8109 /* If both input and output are BLKmode, this conversion isn't doing
8110 anything except possibly changing memory attribute. */
8111 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8113 rtx result = expand_expr (treeop0, target, tmode,
8114 modifier);
8116 result = copy_rtx (result);
8117 set_mem_attributes (result, type, 0);
8118 return result;
8121 if (target == 0)
8123 if (TYPE_MODE (type) != BLKmode)
8124 target = gen_reg_rtx (TYPE_MODE (type));
8125 else
8126 target = assign_temp (type, 1, 1);
8129 if (MEM_P (target))
8130 /* Store data into beginning of memory target. */
8131 store_expr (treeop0,
8132 adjust_address (target, TYPE_MODE (valtype), 0),
8133 modifier == EXPAND_STACK_PARM,
8134 false);
8136 else
8138 gcc_assert (REG_P (target));
8140 /* Store this field into a union of the proper type. */
8141 store_field (target,
8142 MIN ((int_size_in_bytes (TREE_TYPE
8143 (treeop0))
8144 * BITS_PER_UNIT),
8145 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8146 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8149 /* Return the entire union. */
8150 return target;
8153 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8155 op0 = expand_expr (treeop0, target, VOIDmode,
8156 modifier);
8158 /* If the signedness of the conversion differs and OP0 is
8159 a promoted SUBREG, clear that indication since we now
8160 have to do the proper extension. */
8161 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8162 && GET_CODE (op0) == SUBREG)
8163 SUBREG_PROMOTED_VAR_P (op0) = 0;
8165 return REDUCE_BIT_FIELD (op0);
8168 op0 = expand_expr (treeop0, NULL_RTX, mode,
8169 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8170 if (GET_MODE (op0) == mode)
8173 /* If OP0 is a constant, just convert it into the proper mode. */
8174 else if (CONSTANT_P (op0))
8176 tree inner_type = TREE_TYPE (treeop0);
8177 machine_mode inner_mode = GET_MODE (op0);
8179 if (inner_mode == VOIDmode)
8180 inner_mode = TYPE_MODE (inner_type);
8182 if (modifier == EXPAND_INITIALIZER)
8183 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8184 subreg_lowpart_offset (mode,
8185 inner_mode));
8186 else
8187 op0= convert_modes (mode, inner_mode, op0,
8188 TYPE_UNSIGNED (inner_type));
8191 else if (modifier == EXPAND_INITIALIZER)
8192 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8194 else if (target == 0)
8195 op0 = convert_to_mode (mode, op0,
8196 TYPE_UNSIGNED (TREE_TYPE
8197 (treeop0)));
8198 else
8200 convert_move (target, op0,
8201 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8202 op0 = target;
8205 return REDUCE_BIT_FIELD (op0);
8207 case ADDR_SPACE_CONVERT_EXPR:
8209 tree treeop0_type = TREE_TYPE (treeop0);
8210 addr_space_t as_to;
8211 addr_space_t as_from;
8213 gcc_assert (POINTER_TYPE_P (type));
8214 gcc_assert (POINTER_TYPE_P (treeop0_type));
8216 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8217 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8219 /* Conversions between pointers to the same address space should
8220 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8221 gcc_assert (as_to != as_from);
8223 /* Ask target code to handle conversion between pointers
8224 to overlapping address spaces. */
8225 if (targetm.addr_space.subset_p (as_to, as_from)
8226 || targetm.addr_space.subset_p (as_from, as_to))
8228 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8229 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8230 gcc_assert (op0);
8231 return op0;
8234 /* For disjoint address spaces, converting anything but
8235 a null pointer invokes undefined behaviour. We simply
8236 always return a null pointer here. */
8237 return CONST0_RTX (mode);
8240 case POINTER_PLUS_EXPR:
8241 /* Even though the sizetype mode and the pointer's mode can be different
8242 expand is able to handle this correctly and get the correct result out
8243 of the PLUS_EXPR code. */
8244 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8245 if sizetype precision is smaller than pointer precision. */
8246 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8247 treeop1 = fold_convert_loc (loc, type,
8248 fold_convert_loc (loc, ssizetype,
8249 treeop1));
8250 /* If sizetype precision is larger than pointer precision, truncate the
8251 offset to have matching modes. */
8252 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8253 treeop1 = fold_convert_loc (loc, type, treeop1);
8255 case PLUS_EXPR:
8256 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8257 something else, make sure we add the register to the constant and
8258 then to the other thing. This case can occur during strength
8259 reduction and doing it this way will produce better code if the
8260 frame pointer or argument pointer is eliminated.
8262 fold-const.c will ensure that the constant is always in the inner
8263 PLUS_EXPR, so the only case we need to do anything about is if
8264 sp, ap, or fp is our second argument, in which case we must swap
8265 the innermost first argument and our second argument. */
8267 if (TREE_CODE (treeop0) == PLUS_EXPR
8268 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8269 && TREE_CODE (treeop1) == VAR_DECL
8270 && (DECL_RTL (treeop1) == frame_pointer_rtx
8271 || DECL_RTL (treeop1) == stack_pointer_rtx
8272 || DECL_RTL (treeop1) == arg_pointer_rtx))
8274 gcc_unreachable ();
8277 /* If the result is to be ptr_mode and we are adding an integer to
8278 something, we might be forming a constant. So try to use
8279 plus_constant. If it produces a sum and we can't accept it,
8280 use force_operand. This allows P = &ARR[const] to generate
8281 efficient code on machines where a SYMBOL_REF is not a valid
8282 address.
8284 If this is an EXPAND_SUM call, always return the sum. */
8285 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8286 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8288 if (modifier == EXPAND_STACK_PARM)
8289 target = 0;
8290 if (TREE_CODE (treeop0) == INTEGER_CST
8291 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8292 && TREE_CONSTANT (treeop1))
8294 rtx constant_part;
8295 HOST_WIDE_INT wc;
8296 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8298 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8299 EXPAND_SUM);
8300 /* Use wi::shwi to ensure that the constant is
8301 truncated according to the mode of OP1, then sign extended
8302 to a HOST_WIDE_INT. Using the constant directly can result
8303 in non-canonical RTL in a 64x32 cross compile. */
8304 wc = TREE_INT_CST_LOW (treeop0);
8305 constant_part =
8306 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8307 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8308 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8309 op1 = force_operand (op1, target);
8310 return REDUCE_BIT_FIELD (op1);
8313 else if (TREE_CODE (treeop1) == INTEGER_CST
8314 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8315 && TREE_CONSTANT (treeop0))
8317 rtx constant_part;
8318 HOST_WIDE_INT wc;
8319 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8321 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8322 (modifier == EXPAND_INITIALIZER
8323 ? EXPAND_INITIALIZER : EXPAND_SUM));
8324 if (! CONSTANT_P (op0))
8326 op1 = expand_expr (treeop1, NULL_RTX,
8327 VOIDmode, modifier);
8328 /* Return a PLUS if modifier says it's OK. */
8329 if (modifier == EXPAND_SUM
8330 || modifier == EXPAND_INITIALIZER)
8331 return simplify_gen_binary (PLUS, mode, op0, op1);
8332 goto binop2;
8334 /* Use wi::shwi to ensure that the constant is
8335 truncated according to the mode of OP1, then sign extended
8336 to a HOST_WIDE_INT. Using the constant directly can result
8337 in non-canonical RTL in a 64x32 cross compile. */
8338 wc = TREE_INT_CST_LOW (treeop1);
8339 constant_part
8340 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8341 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8342 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8343 op0 = force_operand (op0, target);
8344 return REDUCE_BIT_FIELD (op0);
8348 /* Use TER to expand pointer addition of a negated value
8349 as pointer subtraction. */
8350 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8351 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8352 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8353 && TREE_CODE (treeop1) == SSA_NAME
8354 && TYPE_MODE (TREE_TYPE (treeop0))
8355 == TYPE_MODE (TREE_TYPE (treeop1)))
8357 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8358 if (def)
8360 treeop1 = gimple_assign_rhs1 (def);
8361 code = MINUS_EXPR;
8362 goto do_minus;
8366 /* No sense saving up arithmetic to be done
8367 if it's all in the wrong mode to form part of an address.
8368 And force_operand won't know whether to sign-extend or
8369 zero-extend. */
8370 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8371 || mode != ptr_mode)
8373 expand_operands (treeop0, treeop1,
8374 subtarget, &op0, &op1, EXPAND_NORMAL);
8375 if (op0 == const0_rtx)
8376 return op1;
8377 if (op1 == const0_rtx)
8378 return op0;
8379 goto binop2;
8382 expand_operands (treeop0, treeop1,
8383 subtarget, &op0, &op1, modifier);
8384 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8386 case MINUS_EXPR:
8387 do_minus:
8388 /* For initializers, we are allowed to return a MINUS of two
8389 symbolic constants. Here we handle all cases when both operands
8390 are constant. */
8391 /* Handle difference of two symbolic constants,
8392 for the sake of an initializer. */
8393 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8394 && really_constant_p (treeop0)
8395 && really_constant_p (treeop1))
8397 expand_operands (treeop0, treeop1,
8398 NULL_RTX, &op0, &op1, modifier);
8400 /* If the last operand is a CONST_INT, use plus_constant of
8401 the negated constant. Else make the MINUS. */
8402 if (CONST_INT_P (op1))
8403 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8404 -INTVAL (op1)));
8405 else
8406 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8409 /* No sense saving up arithmetic to be done
8410 if it's all in the wrong mode to form part of an address.
8411 And force_operand won't know whether to sign-extend or
8412 zero-extend. */
8413 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8414 || mode != ptr_mode)
8415 goto binop;
8417 expand_operands (treeop0, treeop1,
8418 subtarget, &op0, &op1, modifier);
8420 /* Convert A - const to A + (-const). */
8421 if (CONST_INT_P (op1))
8423 op1 = negate_rtx (mode, op1);
8424 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8427 goto binop2;
8429 case WIDEN_MULT_PLUS_EXPR:
8430 case WIDEN_MULT_MINUS_EXPR:
8431 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8432 op2 = expand_normal (treeop2);
8433 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8434 target, unsignedp);
8435 return target;
8437 case WIDEN_MULT_EXPR:
8438 /* If first operand is constant, swap them.
8439 Thus the following special case checks need only
8440 check the second operand. */
8441 if (TREE_CODE (treeop0) == INTEGER_CST)
8443 tree t1 = treeop0;
8444 treeop0 = treeop1;
8445 treeop1 = t1;
8448 /* First, check if we have a multiplication of one signed and one
8449 unsigned operand. */
8450 if (TREE_CODE (treeop1) != INTEGER_CST
8451 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8452 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8454 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8455 this_optab = usmul_widen_optab;
8456 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8457 != CODE_FOR_nothing)
8459 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8460 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8461 EXPAND_NORMAL);
8462 else
8463 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8464 EXPAND_NORMAL);
8465 /* op0 and op1 might still be constant, despite the above
8466 != INTEGER_CST check. Handle it. */
8467 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8469 op0 = convert_modes (innermode, mode, op0, true);
8470 op1 = convert_modes (innermode, mode, op1, false);
8471 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8472 target, unsignedp));
8474 goto binop3;
8477 /* Check for a multiplication with matching signedness. */
8478 else if ((TREE_CODE (treeop1) == INTEGER_CST
8479 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8480 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8481 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8483 tree op0type = TREE_TYPE (treeop0);
8484 machine_mode innermode = TYPE_MODE (op0type);
8485 bool zextend_p = TYPE_UNSIGNED (op0type);
8486 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8487 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8489 if (TREE_CODE (treeop0) != INTEGER_CST)
8491 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8492 != CODE_FOR_nothing)
8494 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8495 EXPAND_NORMAL);
8496 /* op0 and op1 might still be constant, despite the above
8497 != INTEGER_CST check. Handle it. */
8498 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8500 widen_mult_const:
8501 op0 = convert_modes (innermode, mode, op0, zextend_p);
8503 = convert_modes (innermode, mode, op1,
8504 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8505 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8506 target,
8507 unsignedp));
8509 temp = expand_widening_mult (mode, op0, op1, target,
8510 unsignedp, this_optab);
8511 return REDUCE_BIT_FIELD (temp);
8513 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8514 != CODE_FOR_nothing
8515 && innermode == word_mode)
8517 rtx htem, hipart;
8518 op0 = expand_normal (treeop0);
8519 if (TREE_CODE (treeop1) == INTEGER_CST)
8520 op1 = convert_modes (innermode, mode,
8521 expand_normal (treeop1),
8522 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8523 else
8524 op1 = expand_normal (treeop1);
8525 /* op0 and op1 might still be constant, despite the above
8526 != INTEGER_CST check. Handle it. */
8527 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8528 goto widen_mult_const;
8529 temp = expand_binop (mode, other_optab, op0, op1, target,
8530 unsignedp, OPTAB_LIB_WIDEN);
8531 hipart = gen_highpart (innermode, temp);
8532 htem = expand_mult_highpart_adjust (innermode, hipart,
8533 op0, op1, hipart,
8534 zextend_p);
8535 if (htem != hipart)
8536 emit_move_insn (hipart, htem);
8537 return REDUCE_BIT_FIELD (temp);
8541 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8542 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8543 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8544 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8546 case FMA_EXPR:
8548 optab opt = fma_optab;
8549 gimple def0, def2;
8551 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8552 call. */
8553 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8555 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8556 tree call_expr;
8558 gcc_assert (fn != NULL_TREE);
8559 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8560 return expand_builtin (call_expr, target, subtarget, mode, false);
8563 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8564 /* The multiplication is commutative - look at its 2nd operand
8565 if the first isn't fed by a negate. */
8566 if (!def0)
8568 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8569 /* Swap operands if the 2nd operand is fed by a negate. */
8570 if (def0)
8572 tree tem = treeop0;
8573 treeop0 = treeop1;
8574 treeop1 = tem;
8577 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8579 op0 = op2 = NULL;
8581 if (def0 && def2
8582 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8584 opt = fnms_optab;
8585 op0 = expand_normal (gimple_assign_rhs1 (def0));
8586 op2 = expand_normal (gimple_assign_rhs1 (def2));
8588 else if (def0
8589 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8591 opt = fnma_optab;
8592 op0 = expand_normal (gimple_assign_rhs1 (def0));
8594 else if (def2
8595 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8597 opt = fms_optab;
8598 op2 = expand_normal (gimple_assign_rhs1 (def2));
8601 if (op0 == NULL)
8602 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8603 if (op2 == NULL)
8604 op2 = expand_normal (treeop2);
8605 op1 = expand_normal (treeop1);
8607 return expand_ternary_op (TYPE_MODE (type), opt,
8608 op0, op1, op2, target, 0);
8611 case MULT_EXPR:
8612 /* If this is a fixed-point operation, then we cannot use the code
8613 below because "expand_mult" doesn't support sat/no-sat fixed-point
8614 multiplications. */
8615 if (ALL_FIXED_POINT_MODE_P (mode))
8616 goto binop;
8618 /* If first operand is constant, swap them.
8619 Thus the following special case checks need only
8620 check the second operand. */
8621 if (TREE_CODE (treeop0) == INTEGER_CST)
8623 tree t1 = treeop0;
8624 treeop0 = treeop1;
8625 treeop1 = t1;
8628 /* Attempt to return something suitable for generating an
8629 indexed address, for machines that support that. */
8631 if (modifier == EXPAND_SUM && mode == ptr_mode
8632 && tree_fits_shwi_p (treeop1))
8634 tree exp1 = treeop1;
8636 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8637 EXPAND_SUM);
8639 if (!REG_P (op0))
8640 op0 = force_operand (op0, NULL_RTX);
8641 if (!REG_P (op0))
8642 op0 = copy_to_mode_reg (mode, op0);
8644 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8645 gen_int_mode (tree_to_shwi (exp1),
8646 TYPE_MODE (TREE_TYPE (exp1)))));
8649 if (modifier == EXPAND_STACK_PARM)
8650 target = 0;
8652 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8653 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8655 case TRUNC_DIV_EXPR:
8656 case FLOOR_DIV_EXPR:
8657 case CEIL_DIV_EXPR:
8658 case ROUND_DIV_EXPR:
8659 case EXACT_DIV_EXPR:
8660 /* If this is a fixed-point operation, then we cannot use the code
8661 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8662 divisions. */
8663 if (ALL_FIXED_POINT_MODE_P (mode))
8664 goto binop;
8666 if (modifier == EXPAND_STACK_PARM)
8667 target = 0;
8668 /* Possible optimization: compute the dividend with EXPAND_SUM
8669 then if the divisor is constant can optimize the case
8670 where some terms of the dividend have coeffs divisible by it. */
8671 expand_operands (treeop0, treeop1,
8672 subtarget, &op0, &op1, EXPAND_NORMAL);
8673 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8675 case RDIV_EXPR:
8676 goto binop;
8678 case MULT_HIGHPART_EXPR:
8679 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8680 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8681 gcc_assert (temp);
8682 return temp;
8684 case TRUNC_MOD_EXPR:
8685 case FLOOR_MOD_EXPR:
8686 case CEIL_MOD_EXPR:
8687 case ROUND_MOD_EXPR:
8688 if (modifier == EXPAND_STACK_PARM)
8689 target = 0;
8690 expand_operands (treeop0, treeop1,
8691 subtarget, &op0, &op1, EXPAND_NORMAL);
8692 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8694 case FIXED_CONVERT_EXPR:
8695 op0 = expand_normal (treeop0);
8696 if (target == 0 || modifier == EXPAND_STACK_PARM)
8697 target = gen_reg_rtx (mode);
8699 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8700 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8701 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8702 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8703 else
8704 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8705 return target;
8707 case FIX_TRUNC_EXPR:
8708 op0 = expand_normal (treeop0);
8709 if (target == 0 || modifier == EXPAND_STACK_PARM)
8710 target = gen_reg_rtx (mode);
8711 expand_fix (target, op0, unsignedp);
8712 return target;
8714 case FLOAT_EXPR:
8715 op0 = expand_normal (treeop0);
8716 if (target == 0 || modifier == EXPAND_STACK_PARM)
8717 target = gen_reg_rtx (mode);
8718 /* expand_float can't figure out what to do if FROM has VOIDmode.
8719 So give it the correct mode. With -O, cse will optimize this. */
8720 if (GET_MODE (op0) == VOIDmode)
8721 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8722 op0);
8723 expand_float (target, op0,
8724 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8725 return target;
8727 case NEGATE_EXPR:
8728 op0 = expand_expr (treeop0, subtarget,
8729 VOIDmode, EXPAND_NORMAL);
8730 if (modifier == EXPAND_STACK_PARM)
8731 target = 0;
8732 temp = expand_unop (mode,
8733 optab_for_tree_code (NEGATE_EXPR, type,
8734 optab_default),
8735 op0, target, 0);
8736 gcc_assert (temp);
8737 return REDUCE_BIT_FIELD (temp);
8739 case ABS_EXPR:
8740 op0 = expand_expr (treeop0, subtarget,
8741 VOIDmode, EXPAND_NORMAL);
8742 if (modifier == EXPAND_STACK_PARM)
8743 target = 0;
8745 /* ABS_EXPR is not valid for complex arguments. */
8746 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8747 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8749 /* Unsigned abs is simply the operand. Testing here means we don't
8750 risk generating incorrect code below. */
8751 if (TYPE_UNSIGNED (type))
8752 return op0;
8754 return expand_abs (mode, op0, target, unsignedp,
8755 safe_from_p (target, treeop0, 1));
8757 case MAX_EXPR:
8758 case MIN_EXPR:
8759 target = original_target;
8760 if (target == 0
8761 || modifier == EXPAND_STACK_PARM
8762 || (MEM_P (target) && MEM_VOLATILE_P (target))
8763 || GET_MODE (target) != mode
8764 || (REG_P (target)
8765 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8766 target = gen_reg_rtx (mode);
8767 expand_operands (treeop0, treeop1,
8768 target, &op0, &op1, EXPAND_NORMAL);
8770 /* First try to do it with a special MIN or MAX instruction.
8771 If that does not win, use a conditional jump to select the proper
8772 value. */
8773 this_optab = optab_for_tree_code (code, type, optab_default);
8774 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8775 OPTAB_WIDEN);
8776 if (temp != 0)
8777 return temp;
8779 /* At this point, a MEM target is no longer useful; we will get better
8780 code without it. */
8782 if (! REG_P (target))
8783 target = gen_reg_rtx (mode);
8785 /* If op1 was placed in target, swap op0 and op1. */
8786 if (target != op0 && target == op1)
8787 std::swap (op0, op1);
8789 /* We generate better code and avoid problems with op1 mentioning
8790 target by forcing op1 into a pseudo if it isn't a constant. */
8791 if (! CONSTANT_P (op1))
8792 op1 = force_reg (mode, op1);
8795 enum rtx_code comparison_code;
8796 rtx cmpop1 = op1;
8798 if (code == MAX_EXPR)
8799 comparison_code = unsignedp ? GEU : GE;
8800 else
8801 comparison_code = unsignedp ? LEU : LE;
8803 /* Canonicalize to comparisons against 0. */
8804 if (op1 == const1_rtx)
8806 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8807 or (a != 0 ? a : 1) for unsigned.
8808 For MIN we are safe converting (a <= 1 ? a : 1)
8809 into (a <= 0 ? a : 1) */
8810 cmpop1 = const0_rtx;
8811 if (code == MAX_EXPR)
8812 comparison_code = unsignedp ? NE : GT;
8814 if (op1 == constm1_rtx && !unsignedp)
8816 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8817 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8818 cmpop1 = const0_rtx;
8819 if (code == MIN_EXPR)
8820 comparison_code = LT;
8823 /* Use a conditional move if possible. */
8824 if (can_conditionally_move_p (mode))
8826 rtx insn;
8828 start_sequence ();
8830 /* Try to emit the conditional move. */
8831 insn = emit_conditional_move (target, comparison_code,
8832 op0, cmpop1, mode,
8833 op0, op1, mode,
8834 unsignedp);
8836 /* If we could do the conditional move, emit the sequence,
8837 and return. */
8838 if (insn)
8840 rtx_insn *seq = get_insns ();
8841 end_sequence ();
8842 emit_insn (seq);
8843 return target;
8846 /* Otherwise discard the sequence and fall back to code with
8847 branches. */
8848 end_sequence ();
8851 if (target != op0)
8852 emit_move_insn (target, op0);
8854 lab = gen_label_rtx ();
8855 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8856 unsignedp, mode, NULL_RTX, NULL, lab,
8857 -1);
8859 emit_move_insn (target, op1);
8860 emit_label (lab);
8861 return target;
8863 case BIT_NOT_EXPR:
8864 op0 = expand_expr (treeop0, subtarget,
8865 VOIDmode, EXPAND_NORMAL);
8866 if (modifier == EXPAND_STACK_PARM)
8867 target = 0;
8868 /* In case we have to reduce the result to bitfield precision
8869 for unsigned bitfield expand this as XOR with a proper constant
8870 instead. */
8871 if (reduce_bit_field && TYPE_UNSIGNED (type))
8873 wide_int mask = wi::mask (TYPE_PRECISION (type),
8874 false, GET_MODE_PRECISION (mode));
8876 temp = expand_binop (mode, xor_optab, op0,
8877 immed_wide_int_const (mask, mode),
8878 target, 1, OPTAB_LIB_WIDEN);
8880 else
8881 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8882 gcc_assert (temp);
8883 return temp;
8885 /* ??? Can optimize bitwise operations with one arg constant.
8886 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8887 and (a bitwise1 b) bitwise2 b (etc)
8888 but that is probably not worth while. */
8890 case BIT_AND_EXPR:
8891 case BIT_IOR_EXPR:
8892 case BIT_XOR_EXPR:
8893 goto binop;
8895 case LROTATE_EXPR:
8896 case RROTATE_EXPR:
8897 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8898 || (GET_MODE_PRECISION (TYPE_MODE (type))
8899 == TYPE_PRECISION (type)));
8900 /* fall through */
8902 case LSHIFT_EXPR:
8903 case RSHIFT_EXPR:
8904 /* If this is a fixed-point operation, then we cannot use the code
8905 below because "expand_shift" doesn't support sat/no-sat fixed-point
8906 shifts. */
8907 if (ALL_FIXED_POINT_MODE_P (mode))
8908 goto binop;
8910 if (! safe_from_p (subtarget, treeop1, 1))
8911 subtarget = 0;
8912 if (modifier == EXPAND_STACK_PARM)
8913 target = 0;
8914 op0 = expand_expr (treeop0, subtarget,
8915 VOIDmode, EXPAND_NORMAL);
8916 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8917 unsignedp);
8918 if (code == LSHIFT_EXPR)
8919 temp = REDUCE_BIT_FIELD (temp);
8920 return temp;
8922 /* Could determine the answer when only additive constants differ. Also,
8923 the addition of one can be handled by changing the condition. */
8924 case LT_EXPR:
8925 case LE_EXPR:
8926 case GT_EXPR:
8927 case GE_EXPR:
8928 case EQ_EXPR:
8929 case NE_EXPR:
8930 case UNORDERED_EXPR:
8931 case ORDERED_EXPR:
8932 case UNLT_EXPR:
8933 case UNLE_EXPR:
8934 case UNGT_EXPR:
8935 case UNGE_EXPR:
8936 case UNEQ_EXPR:
8937 case LTGT_EXPR:
8939 temp = do_store_flag (ops,
8940 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8941 tmode != VOIDmode ? tmode : mode);
8942 if (temp)
8943 return temp;
8945 /* Use a compare and a jump for BLKmode comparisons, or for function
8946 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8948 if ((target == 0
8949 || modifier == EXPAND_STACK_PARM
8950 || ! safe_from_p (target, treeop0, 1)
8951 || ! safe_from_p (target, treeop1, 1)
8952 /* Make sure we don't have a hard reg (such as function's return
8953 value) live across basic blocks, if not optimizing. */
8954 || (!optimize && REG_P (target)
8955 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8956 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8958 emit_move_insn (target, const0_rtx);
8960 rtx_code_label *lab1 = gen_label_rtx ();
8961 jumpifnot_1 (code, treeop0, treeop1, lab1, -1);
8963 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8964 emit_move_insn (target, constm1_rtx);
8965 else
8966 emit_move_insn (target, const1_rtx);
8968 emit_label (lab1);
8969 return target;
8971 case COMPLEX_EXPR:
8972 /* Get the rtx code of the operands. */
8973 op0 = expand_normal (treeop0);
8974 op1 = expand_normal (treeop1);
8976 if (!target)
8977 target = gen_reg_rtx (TYPE_MODE (type));
8978 else
8979 /* If target overlaps with op1, then either we need to force
8980 op1 into a pseudo (if target also overlaps with op0),
8981 or write the complex parts in reverse order. */
8982 switch (GET_CODE (target))
8984 case CONCAT:
8985 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8987 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8989 complex_expr_force_op1:
8990 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8991 emit_move_insn (temp, op1);
8992 op1 = temp;
8993 break;
8995 complex_expr_swap_order:
8996 /* Move the imaginary (op1) and real (op0) parts to their
8997 location. */
8998 write_complex_part (target, op1, true);
8999 write_complex_part (target, op0, false);
9001 return target;
9003 break;
9004 case MEM:
9005 temp = adjust_address_nv (target,
9006 GET_MODE_INNER (GET_MODE (target)), 0);
9007 if (reg_overlap_mentioned_p (temp, op1))
9009 machine_mode imode = GET_MODE_INNER (GET_MODE (target));
9010 temp = adjust_address_nv (target, imode,
9011 GET_MODE_SIZE (imode));
9012 if (reg_overlap_mentioned_p (temp, op0))
9013 goto complex_expr_force_op1;
9014 goto complex_expr_swap_order;
9016 break;
9017 default:
9018 if (reg_overlap_mentioned_p (target, op1))
9020 if (reg_overlap_mentioned_p (target, op0))
9021 goto complex_expr_force_op1;
9022 goto complex_expr_swap_order;
9024 break;
9027 /* Move the real (op0) and imaginary (op1) parts to their location. */
9028 write_complex_part (target, op0, false);
9029 write_complex_part (target, op1, true);
9031 return target;
9033 case WIDEN_SUM_EXPR:
9035 tree oprnd0 = treeop0;
9036 tree oprnd1 = treeop1;
9038 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9039 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9040 target, unsignedp);
9041 return target;
9044 case REDUC_MAX_EXPR:
9045 case REDUC_MIN_EXPR:
9046 case REDUC_PLUS_EXPR:
9048 op0 = expand_normal (treeop0);
9049 this_optab = optab_for_tree_code (code, type, optab_default);
9050 machine_mode vec_mode = TYPE_MODE (TREE_TYPE (treeop0));
9052 if (optab_handler (this_optab, vec_mode) != CODE_FOR_nothing)
9054 struct expand_operand ops[2];
9055 enum insn_code icode = optab_handler (this_optab, vec_mode);
9057 create_output_operand (&ops[0], target, mode);
9058 create_input_operand (&ops[1], op0, vec_mode);
9059 if (maybe_expand_insn (icode, 2, ops))
9061 target = ops[0].value;
9062 if (GET_MODE (target) != mode)
9063 return gen_lowpart (tmode, target);
9064 return target;
9067 /* Fall back to optab with vector result, and then extract scalar. */
9068 this_optab = scalar_reduc_to_vector (this_optab, type);
9069 temp = expand_unop (vec_mode, this_optab, op0, NULL_RTX, unsignedp);
9070 gcc_assert (temp);
9071 /* The tree code produces a scalar result, but (somewhat by convention)
9072 the optab produces a vector with the result in element 0 if
9073 little-endian, or element N-1 if big-endian. So pull the scalar
9074 result out of that element. */
9075 int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
9076 int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
9077 temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
9078 target, mode, mode);
9079 gcc_assert (temp);
9080 return temp;
9083 case VEC_UNPACK_HI_EXPR:
9084 case VEC_UNPACK_LO_EXPR:
9086 op0 = expand_normal (treeop0);
9087 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9088 target, unsignedp);
9089 gcc_assert (temp);
9090 return temp;
9093 case VEC_UNPACK_FLOAT_HI_EXPR:
9094 case VEC_UNPACK_FLOAT_LO_EXPR:
9096 op0 = expand_normal (treeop0);
9097 /* The signedness is determined from input operand. */
9098 temp = expand_widen_pattern_expr
9099 (ops, op0, NULL_RTX, NULL_RTX,
9100 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9102 gcc_assert (temp);
9103 return temp;
9106 case VEC_WIDEN_MULT_HI_EXPR:
9107 case VEC_WIDEN_MULT_LO_EXPR:
9108 case VEC_WIDEN_MULT_EVEN_EXPR:
9109 case VEC_WIDEN_MULT_ODD_EXPR:
9110 case VEC_WIDEN_LSHIFT_HI_EXPR:
9111 case VEC_WIDEN_LSHIFT_LO_EXPR:
9112 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9113 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9114 target, unsignedp);
9115 gcc_assert (target);
9116 return target;
9118 case VEC_PACK_TRUNC_EXPR:
9119 case VEC_PACK_SAT_EXPR:
9120 case VEC_PACK_FIX_TRUNC_EXPR:
9121 mode = TYPE_MODE (TREE_TYPE (treeop0));
9122 goto binop;
9124 case VEC_PERM_EXPR:
9125 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9126 op2 = expand_normal (treeop2);
9128 /* Careful here: if the target doesn't support integral vector modes,
9129 a constant selection vector could wind up smooshed into a normal
9130 integral constant. */
9131 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9133 tree sel_type = TREE_TYPE (treeop2);
9134 machine_mode vmode
9135 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9136 TYPE_VECTOR_SUBPARTS (sel_type));
9137 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9138 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9139 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9141 else
9142 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9144 temp = expand_vec_perm (mode, op0, op1, op2, target);
9145 gcc_assert (temp);
9146 return temp;
9148 case DOT_PROD_EXPR:
9150 tree oprnd0 = treeop0;
9151 tree oprnd1 = treeop1;
9152 tree oprnd2 = treeop2;
9153 rtx op2;
9155 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9156 op2 = expand_normal (oprnd2);
9157 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9158 target, unsignedp);
9159 return target;
9162 case SAD_EXPR:
9164 tree oprnd0 = treeop0;
9165 tree oprnd1 = treeop1;
9166 tree oprnd2 = treeop2;
9167 rtx op2;
9169 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9170 op2 = expand_normal (oprnd2);
9171 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9172 target, unsignedp);
9173 return target;
9176 case REALIGN_LOAD_EXPR:
9178 tree oprnd0 = treeop0;
9179 tree oprnd1 = treeop1;
9180 tree oprnd2 = treeop2;
9181 rtx op2;
9183 this_optab = optab_for_tree_code (code, type, optab_default);
9184 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9185 op2 = expand_normal (oprnd2);
9186 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9187 target, unsignedp);
9188 gcc_assert (temp);
9189 return temp;
9192 case COND_EXPR:
9194 /* A COND_EXPR with its type being VOID_TYPE represents a
9195 conditional jump and is handled in
9196 expand_gimple_cond_expr. */
9197 gcc_assert (!VOID_TYPE_P (type));
9199 /* Note that COND_EXPRs whose type is a structure or union
9200 are required to be constructed to contain assignments of
9201 a temporary variable, so that we can evaluate them here
9202 for side effect only. If type is void, we must do likewise. */
9204 gcc_assert (!TREE_ADDRESSABLE (type)
9205 && !ignore
9206 && TREE_TYPE (treeop1) != void_type_node
9207 && TREE_TYPE (treeop2) != void_type_node);
9209 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9210 if (temp)
9211 return temp;
9213 /* If we are not to produce a result, we have no target. Otherwise,
9214 if a target was specified use it; it will not be used as an
9215 intermediate target unless it is safe. If no target, use a
9216 temporary. */
9218 if (modifier != EXPAND_STACK_PARM
9219 && original_target
9220 && safe_from_p (original_target, treeop0, 1)
9221 && GET_MODE (original_target) == mode
9222 && !MEM_P (original_target))
9223 temp = original_target;
9224 else
9225 temp = assign_temp (type, 0, 1);
9227 do_pending_stack_adjust ();
9228 NO_DEFER_POP;
9229 rtx_code_label *lab0 = gen_label_rtx ();
9230 rtx_code_label *lab1 = gen_label_rtx ();
9231 jumpifnot (treeop0, lab0, -1);
9232 store_expr (treeop1, temp,
9233 modifier == EXPAND_STACK_PARM,
9234 false);
9236 emit_jump_insn (gen_jump (lab1));
9237 emit_barrier ();
9238 emit_label (lab0);
9239 store_expr (treeop2, temp,
9240 modifier == EXPAND_STACK_PARM,
9241 false);
9243 emit_label (lab1);
9244 OK_DEFER_POP;
9245 return temp;
9248 case VEC_COND_EXPR:
9249 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9250 return target;
9252 default:
9253 gcc_unreachable ();
9256 /* Here to do an ordinary binary operator. */
9257 binop:
9258 expand_operands (treeop0, treeop1,
9259 subtarget, &op0, &op1, EXPAND_NORMAL);
9260 binop2:
9261 this_optab = optab_for_tree_code (code, type, optab_default);
9262 binop3:
9263 if (modifier == EXPAND_STACK_PARM)
9264 target = 0;
9265 temp = expand_binop (mode, this_optab, op0, op1, target,
9266 unsignedp, OPTAB_LIB_WIDEN);
9267 gcc_assert (temp);
9268 /* Bitwise operations do not need bitfield reduction as we expect their
9269 operands being properly truncated. */
9270 if (code == BIT_XOR_EXPR
9271 || code == BIT_AND_EXPR
9272 || code == BIT_IOR_EXPR)
9273 return temp;
9274 return REDUCE_BIT_FIELD (temp);
9276 #undef REDUCE_BIT_FIELD
9279 /* Return TRUE if expression STMT is suitable for replacement.
9280 Never consider memory loads as replaceable, because those don't ever lead
9281 into constant expressions. */
9283 static bool
9284 stmt_is_replaceable_p (gimple stmt)
9286 if (ssa_is_replaceable_p (stmt))
9288 /* Don't move around loads. */
9289 if (!gimple_assign_single_p (stmt)
9290 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9291 return true;
9293 return false;
9297 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9298 enum expand_modifier modifier, rtx *alt_rtl,
9299 bool inner_reference_p)
9301 rtx op0, op1, temp, decl_rtl;
9302 tree type;
9303 int unsignedp;
9304 machine_mode mode;
9305 enum tree_code code = TREE_CODE (exp);
9306 rtx subtarget, original_target;
9307 int ignore;
9308 tree context;
9309 bool reduce_bit_field;
9310 location_t loc = EXPR_LOCATION (exp);
9311 struct separate_ops ops;
9312 tree treeop0, treeop1, treeop2;
9313 tree ssa_name = NULL_TREE;
9314 gimple g;
9316 type = TREE_TYPE (exp);
9317 mode = TYPE_MODE (type);
9318 unsignedp = TYPE_UNSIGNED (type);
9320 treeop0 = treeop1 = treeop2 = NULL_TREE;
9321 if (!VL_EXP_CLASS_P (exp))
9322 switch (TREE_CODE_LENGTH (code))
9324 default:
9325 case 3: treeop2 = TREE_OPERAND (exp, 2);
9326 case 2: treeop1 = TREE_OPERAND (exp, 1);
9327 case 1: treeop0 = TREE_OPERAND (exp, 0);
9328 case 0: break;
9330 ops.code = code;
9331 ops.type = type;
9332 ops.op0 = treeop0;
9333 ops.op1 = treeop1;
9334 ops.op2 = treeop2;
9335 ops.location = loc;
9337 ignore = (target == const0_rtx
9338 || ((CONVERT_EXPR_CODE_P (code)
9339 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9340 && TREE_CODE (type) == VOID_TYPE));
9342 /* An operation in what may be a bit-field type needs the
9343 result to be reduced to the precision of the bit-field type,
9344 which is narrower than that of the type's mode. */
9345 reduce_bit_field = (!ignore
9346 && INTEGRAL_TYPE_P (type)
9347 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9349 /* If we are going to ignore this result, we need only do something
9350 if there is a side-effect somewhere in the expression. If there
9351 is, short-circuit the most common cases here. Note that we must
9352 not call expand_expr with anything but const0_rtx in case this
9353 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9355 if (ignore)
9357 if (! TREE_SIDE_EFFECTS (exp))
9358 return const0_rtx;
9360 /* Ensure we reference a volatile object even if value is ignored, but
9361 don't do this if all we are doing is taking its address. */
9362 if (TREE_THIS_VOLATILE (exp)
9363 && TREE_CODE (exp) != FUNCTION_DECL
9364 && mode != VOIDmode && mode != BLKmode
9365 && modifier != EXPAND_CONST_ADDRESS)
9367 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9368 if (MEM_P (temp))
9369 copy_to_reg (temp);
9370 return const0_rtx;
9373 if (TREE_CODE_CLASS (code) == tcc_unary
9374 || code == BIT_FIELD_REF
9375 || code == COMPONENT_REF
9376 || code == INDIRECT_REF)
9377 return expand_expr (treeop0, const0_rtx, VOIDmode,
9378 modifier);
9380 else if (TREE_CODE_CLASS (code) == tcc_binary
9381 || TREE_CODE_CLASS (code) == tcc_comparison
9382 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9384 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9385 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9386 return const0_rtx;
9389 target = 0;
9392 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9393 target = 0;
9395 /* Use subtarget as the target for operand 0 of a binary operation. */
9396 subtarget = get_subtarget (target);
9397 original_target = target;
9399 switch (code)
9401 case LABEL_DECL:
9403 tree function = decl_function_context (exp);
9405 temp = label_rtx (exp);
9406 temp = gen_rtx_LABEL_REF (Pmode, temp);
9408 if (function != current_function_decl
9409 && function != 0)
9410 LABEL_REF_NONLOCAL_P (temp) = 1;
9412 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9413 return temp;
9416 case SSA_NAME:
9417 /* ??? ivopts calls expander, without any preparation from
9418 out-of-ssa. So fake instructions as if this was an access to the
9419 base variable. This unnecessarily allocates a pseudo, see how we can
9420 reuse it, if partition base vars have it set already. */
9421 if (!currently_expanding_to_rtl)
9423 tree var = SSA_NAME_VAR (exp);
9424 if (var && DECL_RTL_SET_P (var))
9425 return DECL_RTL (var);
9426 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9427 LAST_VIRTUAL_REGISTER + 1);
9430 g = get_gimple_for_ssa_name (exp);
9431 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9432 if (g == NULL
9433 && modifier == EXPAND_INITIALIZER
9434 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9435 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9436 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9437 g = SSA_NAME_DEF_STMT (exp);
9438 if (g)
9440 rtx r;
9441 ops.code = gimple_assign_rhs_code (g);
9442 switch (get_gimple_rhs_class (ops.code))
9444 case GIMPLE_TERNARY_RHS:
9445 ops.op2 = gimple_assign_rhs3 (g);
9446 /* Fallthru */
9447 case GIMPLE_BINARY_RHS:
9448 ops.op1 = gimple_assign_rhs2 (g);
9450 /* Try to expand conditonal compare. */
9451 if (targetm.gen_ccmp_first)
9453 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9454 r = expand_ccmp_expr (g);
9455 if (r)
9456 break;
9458 /* Fallthru */
9459 case GIMPLE_UNARY_RHS:
9460 ops.op0 = gimple_assign_rhs1 (g);
9461 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9462 ops.location = gimple_location (g);
9463 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9464 break;
9465 case GIMPLE_SINGLE_RHS:
9467 location_t saved_loc = curr_insn_location ();
9468 set_curr_insn_location (gimple_location (g));
9469 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9470 tmode, modifier, NULL, inner_reference_p);
9471 set_curr_insn_location (saved_loc);
9472 break;
9474 default:
9475 gcc_unreachable ();
9477 if (REG_P (r) && !REG_EXPR (r))
9478 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9479 return r;
9482 ssa_name = exp;
9483 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9484 exp = SSA_NAME_VAR (ssa_name);
9485 goto expand_decl_rtl;
9487 case PARM_DECL:
9488 case VAR_DECL:
9489 /* If a static var's type was incomplete when the decl was written,
9490 but the type is complete now, lay out the decl now. */
9491 if (DECL_SIZE (exp) == 0
9492 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9493 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9494 layout_decl (exp, 0);
9496 /* ... fall through ... */
9498 case FUNCTION_DECL:
9499 case RESULT_DECL:
9500 decl_rtl = DECL_RTL (exp);
9501 expand_decl_rtl:
9502 gcc_assert (decl_rtl);
9503 decl_rtl = copy_rtx (decl_rtl);
9504 /* Record writes to register variables. */
9505 if (modifier == EXPAND_WRITE
9506 && REG_P (decl_rtl)
9507 && HARD_REGISTER_P (decl_rtl))
9508 add_to_hard_reg_set (&crtl->asm_clobbers,
9509 GET_MODE (decl_rtl), REGNO (decl_rtl));
9511 /* Ensure variable marked as used even if it doesn't go through
9512 a parser. If it hasn't be used yet, write out an external
9513 definition. */
9514 TREE_USED (exp) = 1;
9516 /* Show we haven't gotten RTL for this yet. */
9517 temp = 0;
9519 /* Variables inherited from containing functions should have
9520 been lowered by this point. */
9521 context = decl_function_context (exp);
9522 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9523 || context == current_function_decl
9524 || TREE_STATIC (exp)
9525 || DECL_EXTERNAL (exp)
9526 /* ??? C++ creates functions that are not TREE_STATIC. */
9527 || TREE_CODE (exp) == FUNCTION_DECL);
9529 /* This is the case of an array whose size is to be determined
9530 from its initializer, while the initializer is still being parsed.
9531 ??? We aren't parsing while expanding anymore. */
9533 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9534 temp = validize_mem (decl_rtl);
9536 /* If DECL_RTL is memory, we are in the normal case and the
9537 address is not valid, get the address into a register. */
9539 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9541 if (alt_rtl)
9542 *alt_rtl = decl_rtl;
9543 decl_rtl = use_anchored_address (decl_rtl);
9544 if (modifier != EXPAND_CONST_ADDRESS
9545 && modifier != EXPAND_SUM
9546 && !memory_address_addr_space_p (DECL_MODE (exp),
9547 XEXP (decl_rtl, 0),
9548 MEM_ADDR_SPACE (decl_rtl)))
9549 temp = replace_equiv_address (decl_rtl,
9550 copy_rtx (XEXP (decl_rtl, 0)));
9553 /* If we got something, return it. But first, set the alignment
9554 if the address is a register. */
9555 if (temp != 0)
9557 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9558 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9560 return temp;
9563 /* If the mode of DECL_RTL does not match that of the decl,
9564 there are two cases: we are dealing with a BLKmode value
9565 that is returned in a register, or we are dealing with
9566 a promoted value. In the latter case, return a SUBREG
9567 of the wanted mode, but mark it so that we know that it
9568 was already extended. */
9569 if (REG_P (decl_rtl)
9570 && DECL_MODE (exp) != BLKmode
9571 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9573 machine_mode pmode;
9575 /* Get the signedness to be used for this variable. Ensure we get
9576 the same mode we got when the variable was declared. */
9577 if (code == SSA_NAME
9578 && (g = SSA_NAME_DEF_STMT (ssa_name))
9579 && gimple_code (g) == GIMPLE_CALL
9580 && !gimple_call_internal_p (g))
9581 pmode = promote_function_mode (type, mode, &unsignedp,
9582 gimple_call_fntype (g),
9584 else
9585 pmode = promote_decl_mode (exp, &unsignedp);
9586 gcc_assert (GET_MODE (decl_rtl) == pmode);
9588 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9589 SUBREG_PROMOTED_VAR_P (temp) = 1;
9590 SUBREG_PROMOTED_SET (temp, unsignedp);
9591 return temp;
9594 return decl_rtl;
9596 case INTEGER_CST:
9597 /* Given that TYPE_PRECISION (type) is not always equal to
9598 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9599 the former to the latter according to the signedness of the
9600 type. */
9601 temp = immed_wide_int_const (wide_int::from
9602 (exp,
9603 GET_MODE_PRECISION (TYPE_MODE (type)),
9604 TYPE_SIGN (type)),
9605 TYPE_MODE (type));
9606 return temp;
9608 case VECTOR_CST:
9610 tree tmp = NULL_TREE;
9611 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9612 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9613 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9614 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9615 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9616 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9617 return const_vector_from_tree (exp);
9618 if (GET_MODE_CLASS (mode) == MODE_INT)
9620 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9621 if (type_for_mode)
9622 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9624 if (!tmp)
9626 vec<constructor_elt, va_gc> *v;
9627 unsigned i;
9628 vec_alloc (v, VECTOR_CST_NELTS (exp));
9629 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9630 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9631 tmp = build_constructor (type, v);
9633 return expand_expr (tmp, ignore ? const0_rtx : target,
9634 tmode, modifier);
9637 case CONST_DECL:
9638 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9640 case REAL_CST:
9641 /* If optimized, generate immediate CONST_DOUBLE
9642 which will be turned into memory by reload if necessary.
9644 We used to force a register so that loop.c could see it. But
9645 this does not allow gen_* patterns to perform optimizations with
9646 the constants. It also produces two insns in cases like "x = 1.0;".
9647 On most machines, floating-point constants are not permitted in
9648 many insns, so we'd end up copying it to a register in any case.
9650 Now, we do the copying in expand_binop, if appropriate. */
9651 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9652 TYPE_MODE (TREE_TYPE (exp)));
9654 case FIXED_CST:
9655 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9656 TYPE_MODE (TREE_TYPE (exp)));
9658 case COMPLEX_CST:
9659 /* Handle evaluating a complex constant in a CONCAT target. */
9660 if (original_target && GET_CODE (original_target) == CONCAT)
9662 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9663 rtx rtarg, itarg;
9665 rtarg = XEXP (original_target, 0);
9666 itarg = XEXP (original_target, 1);
9668 /* Move the real and imaginary parts separately. */
9669 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9670 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9672 if (op0 != rtarg)
9673 emit_move_insn (rtarg, op0);
9674 if (op1 != itarg)
9675 emit_move_insn (itarg, op1);
9677 return original_target;
9680 /* ... fall through ... */
9682 case STRING_CST:
9683 temp = expand_expr_constant (exp, 1, modifier);
9685 /* temp contains a constant address.
9686 On RISC machines where a constant address isn't valid,
9687 make some insns to get that address into a register. */
9688 if (modifier != EXPAND_CONST_ADDRESS
9689 && modifier != EXPAND_INITIALIZER
9690 && modifier != EXPAND_SUM
9691 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9692 MEM_ADDR_SPACE (temp)))
9693 return replace_equiv_address (temp,
9694 copy_rtx (XEXP (temp, 0)));
9695 return temp;
9697 case SAVE_EXPR:
9699 tree val = treeop0;
9700 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9701 inner_reference_p);
9703 if (!SAVE_EXPR_RESOLVED_P (exp))
9705 /* We can indeed still hit this case, typically via builtin
9706 expanders calling save_expr immediately before expanding
9707 something. Assume this means that we only have to deal
9708 with non-BLKmode values. */
9709 gcc_assert (GET_MODE (ret) != BLKmode);
9711 val = build_decl (curr_insn_location (),
9712 VAR_DECL, NULL, TREE_TYPE (exp));
9713 DECL_ARTIFICIAL (val) = 1;
9714 DECL_IGNORED_P (val) = 1;
9715 treeop0 = val;
9716 TREE_OPERAND (exp, 0) = treeop0;
9717 SAVE_EXPR_RESOLVED_P (exp) = 1;
9719 if (!CONSTANT_P (ret))
9720 ret = copy_to_reg (ret);
9721 SET_DECL_RTL (val, ret);
9724 return ret;
9728 case CONSTRUCTOR:
9729 /* If we don't need the result, just ensure we evaluate any
9730 subexpressions. */
9731 if (ignore)
9733 unsigned HOST_WIDE_INT idx;
9734 tree value;
9736 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9737 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9739 return const0_rtx;
9742 return expand_constructor (exp, target, modifier, false);
9744 case TARGET_MEM_REF:
9746 addr_space_t as
9747 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9748 enum insn_code icode;
9749 unsigned int align;
9751 op0 = addr_for_mem_ref (exp, as, true);
9752 op0 = memory_address_addr_space (mode, op0, as);
9753 temp = gen_rtx_MEM (mode, op0);
9754 set_mem_attributes (temp, exp, 0);
9755 set_mem_addr_space (temp, as);
9756 align = get_object_alignment (exp);
9757 if (modifier != EXPAND_WRITE
9758 && modifier != EXPAND_MEMORY
9759 && mode != BLKmode
9760 && align < GET_MODE_ALIGNMENT (mode)
9761 /* If the target does not have special handling for unaligned
9762 loads of mode then it can use regular moves for them. */
9763 && ((icode = optab_handler (movmisalign_optab, mode))
9764 != CODE_FOR_nothing))
9766 struct expand_operand ops[2];
9768 /* We've already validated the memory, and we're creating a
9769 new pseudo destination. The predicates really can't fail,
9770 nor can the generator. */
9771 create_output_operand (&ops[0], NULL_RTX, mode);
9772 create_fixed_operand (&ops[1], temp);
9773 expand_insn (icode, 2, ops);
9774 temp = ops[0].value;
9776 return temp;
9779 case MEM_REF:
9781 addr_space_t as
9782 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9783 machine_mode address_mode;
9784 tree base = TREE_OPERAND (exp, 0);
9785 gimple def_stmt;
9786 enum insn_code icode;
9787 unsigned align;
9788 /* Handle expansion of non-aliased memory with non-BLKmode. That
9789 might end up in a register. */
9790 if (mem_ref_refers_to_non_mem_p (exp))
9792 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
9793 base = TREE_OPERAND (base, 0);
9794 if (offset == 0
9795 && tree_fits_uhwi_p (TYPE_SIZE (type))
9796 && (GET_MODE_BITSIZE (DECL_MODE (base))
9797 == tree_to_uhwi (TYPE_SIZE (type))))
9798 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9799 target, tmode, modifier);
9800 if (TYPE_MODE (type) == BLKmode)
9802 temp = assign_stack_temp (DECL_MODE (base),
9803 GET_MODE_SIZE (DECL_MODE (base)));
9804 store_expr (base, temp, 0, false);
9805 temp = adjust_address (temp, BLKmode, offset);
9806 set_mem_size (temp, int_size_in_bytes (type));
9807 return temp;
9809 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9810 bitsize_int (offset * BITS_PER_UNIT));
9811 return expand_expr (exp, target, tmode, modifier);
9813 address_mode = targetm.addr_space.address_mode (as);
9814 base = TREE_OPERAND (exp, 0);
9815 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9817 tree mask = gimple_assign_rhs2 (def_stmt);
9818 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9819 gimple_assign_rhs1 (def_stmt), mask);
9820 TREE_OPERAND (exp, 0) = base;
9822 align = get_object_alignment (exp);
9823 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9824 op0 = memory_address_addr_space (mode, op0, as);
9825 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9827 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
9828 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9829 op0 = memory_address_addr_space (mode, op0, as);
9831 temp = gen_rtx_MEM (mode, op0);
9832 set_mem_attributes (temp, exp, 0);
9833 set_mem_addr_space (temp, as);
9834 if (TREE_THIS_VOLATILE (exp))
9835 MEM_VOLATILE_P (temp) = 1;
9836 if (modifier != EXPAND_WRITE
9837 && modifier != EXPAND_MEMORY
9838 && !inner_reference_p
9839 && mode != BLKmode
9840 && align < GET_MODE_ALIGNMENT (mode))
9842 if ((icode = optab_handler (movmisalign_optab, mode))
9843 != CODE_FOR_nothing)
9845 struct expand_operand ops[2];
9847 /* We've already validated the memory, and we're creating a
9848 new pseudo destination. The predicates really can't fail,
9849 nor can the generator. */
9850 create_output_operand (&ops[0], NULL_RTX, mode);
9851 create_fixed_operand (&ops[1], temp);
9852 expand_insn (icode, 2, ops);
9853 temp = ops[0].value;
9855 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9856 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9857 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9858 (modifier == EXPAND_STACK_PARM
9859 ? NULL_RTX : target),
9860 mode, mode);
9862 return temp;
9865 case ARRAY_REF:
9868 tree array = treeop0;
9869 tree index = treeop1;
9870 tree init;
9872 /* Fold an expression like: "foo"[2].
9873 This is not done in fold so it won't happen inside &.
9874 Don't fold if this is for wide characters since it's too
9875 difficult to do correctly and this is a very rare case. */
9877 if (modifier != EXPAND_CONST_ADDRESS
9878 && modifier != EXPAND_INITIALIZER
9879 && modifier != EXPAND_MEMORY)
9881 tree t = fold_read_from_constant_string (exp);
9883 if (t)
9884 return expand_expr (t, target, tmode, modifier);
9887 /* If this is a constant index into a constant array,
9888 just get the value from the array. Handle both the cases when
9889 we have an explicit constructor and when our operand is a variable
9890 that was declared const. */
9892 if (modifier != EXPAND_CONST_ADDRESS
9893 && modifier != EXPAND_INITIALIZER
9894 && modifier != EXPAND_MEMORY
9895 && TREE_CODE (array) == CONSTRUCTOR
9896 && ! TREE_SIDE_EFFECTS (array)
9897 && TREE_CODE (index) == INTEGER_CST)
9899 unsigned HOST_WIDE_INT ix;
9900 tree field, value;
9902 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9903 field, value)
9904 if (tree_int_cst_equal (field, index))
9906 if (!TREE_SIDE_EFFECTS (value))
9907 return expand_expr (fold (value), target, tmode, modifier);
9908 break;
9912 else if (optimize >= 1
9913 && modifier != EXPAND_CONST_ADDRESS
9914 && modifier != EXPAND_INITIALIZER
9915 && modifier != EXPAND_MEMORY
9916 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9917 && TREE_CODE (index) == INTEGER_CST
9918 && (TREE_CODE (array) == VAR_DECL
9919 || TREE_CODE (array) == CONST_DECL)
9920 && (init = ctor_for_folding (array)) != error_mark_node)
9922 if (init == NULL_TREE)
9924 tree value = build_zero_cst (type);
9925 if (TREE_CODE (value) == CONSTRUCTOR)
9927 /* If VALUE is a CONSTRUCTOR, this optimization is only
9928 useful if this doesn't store the CONSTRUCTOR into
9929 memory. If it does, it is more efficient to just
9930 load the data from the array directly. */
9931 rtx ret = expand_constructor (value, target,
9932 modifier, true);
9933 if (ret == NULL_RTX)
9934 value = NULL_TREE;
9937 if (value)
9938 return expand_expr (value, target, tmode, modifier);
9940 else if (TREE_CODE (init) == CONSTRUCTOR)
9942 unsigned HOST_WIDE_INT ix;
9943 tree field, value;
9945 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9946 field, value)
9947 if (tree_int_cst_equal (field, index))
9949 if (TREE_SIDE_EFFECTS (value))
9950 break;
9952 if (TREE_CODE (value) == CONSTRUCTOR)
9954 /* If VALUE is a CONSTRUCTOR, this
9955 optimization is only useful if
9956 this doesn't store the CONSTRUCTOR
9957 into memory. If it does, it is more
9958 efficient to just load the data from
9959 the array directly. */
9960 rtx ret = expand_constructor (value, target,
9961 modifier, true);
9962 if (ret == NULL_RTX)
9963 break;
9966 return
9967 expand_expr (fold (value), target, tmode, modifier);
9970 else if (TREE_CODE (init) == STRING_CST)
9972 tree low_bound = array_ref_low_bound (exp);
9973 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
9975 /* Optimize the special case of a zero lower bound.
9977 We convert the lower bound to sizetype to avoid problems
9978 with constant folding. E.g. suppose the lower bound is
9979 1 and its mode is QI. Without the conversion
9980 (ARRAY + (INDEX - (unsigned char)1))
9981 becomes
9982 (ARRAY + (-(unsigned char)1) + INDEX)
9983 which becomes
9984 (ARRAY + 255 + INDEX). Oops! */
9985 if (!integer_zerop (low_bound))
9986 index1 = size_diffop_loc (loc, index1,
9987 fold_convert_loc (loc, sizetype,
9988 low_bound));
9990 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
9992 tree type = TREE_TYPE (TREE_TYPE (init));
9993 machine_mode mode = TYPE_MODE (type);
9995 if (GET_MODE_CLASS (mode) == MODE_INT
9996 && GET_MODE_SIZE (mode) == 1)
9997 return gen_int_mode (TREE_STRING_POINTER (init)
9998 [TREE_INT_CST_LOW (index1)],
9999 mode);
10004 goto normal_inner_ref;
10006 case COMPONENT_REF:
10007 /* If the operand is a CONSTRUCTOR, we can just extract the
10008 appropriate field if it is present. */
10009 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10011 unsigned HOST_WIDE_INT idx;
10012 tree field, value;
10014 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10015 idx, field, value)
10016 if (field == treeop1
10017 /* We can normally use the value of the field in the
10018 CONSTRUCTOR. However, if this is a bitfield in
10019 an integral mode that we can fit in a HOST_WIDE_INT,
10020 we must mask only the number of bits in the bitfield,
10021 since this is done implicitly by the constructor. If
10022 the bitfield does not meet either of those conditions,
10023 we can't do this optimization. */
10024 && (! DECL_BIT_FIELD (field)
10025 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
10026 && (GET_MODE_PRECISION (DECL_MODE (field))
10027 <= HOST_BITS_PER_WIDE_INT))))
10029 if (DECL_BIT_FIELD (field)
10030 && modifier == EXPAND_STACK_PARM)
10031 target = 0;
10032 op0 = expand_expr (value, target, tmode, modifier);
10033 if (DECL_BIT_FIELD (field))
10035 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10036 machine_mode imode = TYPE_MODE (TREE_TYPE (field));
10038 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10040 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
10041 imode);
10042 op0 = expand_and (imode, op0, op1, target);
10044 else
10046 int count = GET_MODE_PRECISION (imode) - bitsize;
10048 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10049 target, 0);
10050 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10051 target, 0);
10055 return op0;
10058 goto normal_inner_ref;
10060 case BIT_FIELD_REF:
10061 case ARRAY_RANGE_REF:
10062 normal_inner_ref:
10064 machine_mode mode1, mode2;
10065 HOST_WIDE_INT bitsize, bitpos;
10066 tree offset;
10067 int volatilep = 0, must_force_mem;
10068 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
10069 &mode1, &unsignedp, &volatilep, true);
10070 rtx orig_op0, memloc;
10071 bool clear_mem_expr = false;
10073 /* If we got back the original object, something is wrong. Perhaps
10074 we are evaluating an expression too early. In any event, don't
10075 infinitely recurse. */
10076 gcc_assert (tem != exp);
10078 /* If TEM's type is a union of variable size, pass TARGET to the inner
10079 computation, since it will need a temporary and TARGET is known
10080 to have to do. This occurs in unchecked conversion in Ada. */
10081 orig_op0 = op0
10082 = expand_expr_real (tem,
10083 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10084 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10085 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10086 != INTEGER_CST)
10087 && modifier != EXPAND_STACK_PARM
10088 ? target : NULL_RTX),
10089 VOIDmode,
10090 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10091 NULL, true);
10093 /* If the field has a mode, we want to access it in the
10094 field's mode, not the computed mode.
10095 If a MEM has VOIDmode (external with incomplete type),
10096 use BLKmode for it instead. */
10097 if (MEM_P (op0))
10099 if (mode1 != VOIDmode)
10100 op0 = adjust_address (op0, mode1, 0);
10101 else if (GET_MODE (op0) == VOIDmode)
10102 op0 = adjust_address (op0, BLKmode, 0);
10105 mode2
10106 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10108 /* If we have either an offset, a BLKmode result, or a reference
10109 outside the underlying object, we must force it to memory.
10110 Such a case can occur in Ada if we have unchecked conversion
10111 of an expression from a scalar type to an aggregate type or
10112 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10113 passed a partially uninitialized object or a view-conversion
10114 to a larger size. */
10115 must_force_mem = (offset
10116 || mode1 == BLKmode
10117 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10119 /* Handle CONCAT first. */
10120 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10122 if (bitpos == 0
10123 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
10124 return op0;
10125 if (bitpos == 0
10126 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10127 && bitsize)
10129 op0 = XEXP (op0, 0);
10130 mode2 = GET_MODE (op0);
10132 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10133 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10134 && bitpos
10135 && bitsize)
10137 op0 = XEXP (op0, 1);
10138 bitpos = 0;
10139 mode2 = GET_MODE (op0);
10141 else
10142 /* Otherwise force into memory. */
10143 must_force_mem = 1;
10146 /* If this is a constant, put it in a register if it is a legitimate
10147 constant and we don't need a memory reference. */
10148 if (CONSTANT_P (op0)
10149 && mode2 != BLKmode
10150 && targetm.legitimate_constant_p (mode2, op0)
10151 && !must_force_mem)
10152 op0 = force_reg (mode2, op0);
10154 /* Otherwise, if this is a constant, try to force it to the constant
10155 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10156 is a legitimate constant. */
10157 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10158 op0 = validize_mem (memloc);
10160 /* Otherwise, if this is a constant or the object is not in memory
10161 and need be, put it there. */
10162 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10164 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10165 emit_move_insn (memloc, op0);
10166 op0 = memloc;
10167 clear_mem_expr = true;
10170 if (offset)
10172 machine_mode address_mode;
10173 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10174 EXPAND_SUM);
10176 gcc_assert (MEM_P (op0));
10178 address_mode = get_address_mode (op0);
10179 if (GET_MODE (offset_rtx) != address_mode)
10181 /* We cannot be sure that the RTL in offset_rtx is valid outside
10182 of a memory address context, so force it into a register
10183 before attempting to convert it to the desired mode. */
10184 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10185 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10188 /* See the comment in expand_assignment for the rationale. */
10189 if (mode1 != VOIDmode
10190 && bitpos != 0
10191 && bitsize > 0
10192 && (bitpos % bitsize) == 0
10193 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10194 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10196 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10197 bitpos = 0;
10200 op0 = offset_address (op0, offset_rtx,
10201 highest_pow2_factor (offset));
10204 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10205 record its alignment as BIGGEST_ALIGNMENT. */
10206 if (MEM_P (op0) && bitpos == 0 && offset != 0
10207 && is_aligning_offset (offset, tem))
10208 set_mem_align (op0, BIGGEST_ALIGNMENT);
10210 /* Don't forget about volatility even if this is a bitfield. */
10211 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10213 if (op0 == orig_op0)
10214 op0 = copy_rtx (op0);
10216 MEM_VOLATILE_P (op0) = 1;
10219 /* In cases where an aligned union has an unaligned object
10220 as a field, we might be extracting a BLKmode value from
10221 an integer-mode (e.g., SImode) object. Handle this case
10222 by doing the extract into an object as wide as the field
10223 (which we know to be the width of a basic mode), then
10224 storing into memory, and changing the mode to BLKmode. */
10225 if (mode1 == VOIDmode
10226 || REG_P (op0) || GET_CODE (op0) == SUBREG
10227 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10228 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10229 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10230 && modifier != EXPAND_CONST_ADDRESS
10231 && modifier != EXPAND_INITIALIZER
10232 && modifier != EXPAND_MEMORY)
10233 /* If the bitfield is volatile and the bitsize
10234 is narrower than the access size of the bitfield,
10235 we need to extract bitfields from the access. */
10236 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10237 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10238 && mode1 != BLKmode
10239 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10240 /* If the field isn't aligned enough to fetch as a memref,
10241 fetch it as a bit field. */
10242 || (mode1 != BLKmode
10243 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10244 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10245 || (MEM_P (op0)
10246 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10247 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10248 && modifier != EXPAND_MEMORY
10249 && ((modifier == EXPAND_CONST_ADDRESS
10250 || modifier == EXPAND_INITIALIZER)
10251 ? STRICT_ALIGNMENT
10252 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10253 || (bitpos % BITS_PER_UNIT != 0)))
10254 /* If the type and the field are a constant size and the
10255 size of the type isn't the same size as the bitfield,
10256 we must use bitfield operations. */
10257 || (bitsize >= 0
10258 && TYPE_SIZE (TREE_TYPE (exp))
10259 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10260 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10261 bitsize)))
10263 machine_mode ext_mode = mode;
10265 if (ext_mode == BLKmode
10266 && ! (target != 0 && MEM_P (op0)
10267 && MEM_P (target)
10268 && bitpos % BITS_PER_UNIT == 0))
10269 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10271 if (ext_mode == BLKmode)
10273 if (target == 0)
10274 target = assign_temp (type, 1, 1);
10276 /* ??? Unlike the similar test a few lines below, this one is
10277 very likely obsolete. */
10278 if (bitsize == 0)
10279 return target;
10281 /* In this case, BITPOS must start at a byte boundary and
10282 TARGET, if specified, must be a MEM. */
10283 gcc_assert (MEM_P (op0)
10284 && (!target || MEM_P (target))
10285 && !(bitpos % BITS_PER_UNIT));
10287 emit_block_move (target,
10288 adjust_address (op0, VOIDmode,
10289 bitpos / BITS_PER_UNIT),
10290 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10291 / BITS_PER_UNIT),
10292 (modifier == EXPAND_STACK_PARM
10293 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10295 return target;
10298 /* If we have nothing to extract, the result will be 0 for targets
10299 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10300 return 0 for the sake of consistency, as reading a zero-sized
10301 bitfield is valid in Ada and the value is fully specified. */
10302 if (bitsize == 0)
10303 return const0_rtx;
10305 op0 = validize_mem (op0);
10307 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10308 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10310 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10311 (modifier == EXPAND_STACK_PARM
10312 ? NULL_RTX : target),
10313 ext_mode, ext_mode);
10315 /* If the result is a record type and BITSIZE is narrower than
10316 the mode of OP0, an integral mode, and this is a big endian
10317 machine, we must put the field into the high-order bits. */
10318 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10319 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10320 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10321 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10322 GET_MODE_BITSIZE (GET_MODE (op0))
10323 - bitsize, op0, 1);
10325 /* If the result type is BLKmode, store the data into a temporary
10326 of the appropriate type, but with the mode corresponding to the
10327 mode for the data we have (op0's mode). */
10328 if (mode == BLKmode)
10330 rtx new_rtx
10331 = assign_stack_temp_for_type (ext_mode,
10332 GET_MODE_BITSIZE (ext_mode),
10333 type);
10334 emit_move_insn (new_rtx, op0);
10335 op0 = copy_rtx (new_rtx);
10336 PUT_MODE (op0, BLKmode);
10339 return op0;
10342 /* If the result is BLKmode, use that to access the object
10343 now as well. */
10344 if (mode == BLKmode)
10345 mode1 = BLKmode;
10347 /* Get a reference to just this component. */
10348 if (modifier == EXPAND_CONST_ADDRESS
10349 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10350 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10351 else
10352 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10354 if (op0 == orig_op0)
10355 op0 = copy_rtx (op0);
10357 set_mem_attributes (op0, exp, 0);
10359 if (REG_P (XEXP (op0, 0)))
10360 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10362 /* If op0 is a temporary because the original expressions was forced
10363 to memory, clear MEM_EXPR so that the original expression cannot
10364 be marked as addressable through MEM_EXPR of the temporary. */
10365 if (clear_mem_expr)
10366 set_mem_expr (op0, NULL_TREE);
10368 MEM_VOLATILE_P (op0) |= volatilep;
10369 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10370 || modifier == EXPAND_CONST_ADDRESS
10371 || modifier == EXPAND_INITIALIZER)
10372 return op0;
10374 if (target == 0)
10375 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10377 convert_move (target, op0, unsignedp);
10378 return target;
10381 case OBJ_TYPE_REF:
10382 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10384 case CALL_EXPR:
10385 /* All valid uses of __builtin_va_arg_pack () are removed during
10386 inlining. */
10387 if (CALL_EXPR_VA_ARG_PACK (exp))
10388 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10390 tree fndecl = get_callee_fndecl (exp), attr;
10392 if (fndecl
10393 && (attr = lookup_attribute ("error",
10394 DECL_ATTRIBUTES (fndecl))) != NULL)
10395 error ("%Kcall to %qs declared with attribute error: %s",
10396 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10397 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10398 if (fndecl
10399 && (attr = lookup_attribute ("warning",
10400 DECL_ATTRIBUTES (fndecl))) != NULL)
10401 warning_at (tree_nonartificial_location (exp),
10402 0, "%Kcall to %qs declared with attribute warning: %s",
10403 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10404 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10406 /* Check for a built-in function. */
10407 if (fndecl && DECL_BUILT_IN (fndecl))
10409 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10410 if (CALL_WITH_BOUNDS_P (exp))
10411 return expand_builtin_with_bounds (exp, target, subtarget,
10412 tmode, ignore);
10413 else
10414 return expand_builtin (exp, target, subtarget, tmode, ignore);
10417 return expand_call (exp, target, ignore);
10419 case VIEW_CONVERT_EXPR:
10420 op0 = NULL_RTX;
10422 /* If we are converting to BLKmode, try to avoid an intermediate
10423 temporary by fetching an inner memory reference. */
10424 if (mode == BLKmode
10425 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10426 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10427 && handled_component_p (treeop0))
10429 machine_mode mode1;
10430 HOST_WIDE_INT bitsize, bitpos;
10431 tree offset;
10432 int unsignedp;
10433 int volatilep = 0;
10434 tree tem
10435 = get_inner_reference (treeop0, &bitsize, &bitpos,
10436 &offset, &mode1, &unsignedp, &volatilep,
10437 true);
10438 rtx orig_op0;
10440 /* ??? We should work harder and deal with non-zero offsets. */
10441 if (!offset
10442 && (bitpos % BITS_PER_UNIT) == 0
10443 && bitsize >= 0
10444 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10446 /* See the normal_inner_ref case for the rationale. */
10447 orig_op0
10448 = expand_expr_real (tem,
10449 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10450 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10451 != INTEGER_CST)
10452 && modifier != EXPAND_STACK_PARM
10453 ? target : NULL_RTX),
10454 VOIDmode,
10455 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10456 NULL, true);
10458 if (MEM_P (orig_op0))
10460 op0 = orig_op0;
10462 /* Get a reference to just this component. */
10463 if (modifier == EXPAND_CONST_ADDRESS
10464 || modifier == EXPAND_SUM
10465 || modifier == EXPAND_INITIALIZER)
10466 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10467 else
10468 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10470 if (op0 == orig_op0)
10471 op0 = copy_rtx (op0);
10473 set_mem_attributes (op0, treeop0, 0);
10474 if (REG_P (XEXP (op0, 0)))
10475 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10477 MEM_VOLATILE_P (op0) |= volatilep;
10482 if (!op0)
10483 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10484 NULL, inner_reference_p);
10486 /* If the input and output modes are both the same, we are done. */
10487 if (mode == GET_MODE (op0))
10489 /* If neither mode is BLKmode, and both modes are the same size
10490 then we can use gen_lowpart. */
10491 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10492 && (GET_MODE_PRECISION (mode)
10493 == GET_MODE_PRECISION (GET_MODE (op0)))
10494 && !COMPLEX_MODE_P (GET_MODE (op0)))
10496 if (GET_CODE (op0) == SUBREG)
10497 op0 = force_reg (GET_MODE (op0), op0);
10498 temp = gen_lowpart_common (mode, op0);
10499 if (temp)
10500 op0 = temp;
10501 else
10503 if (!REG_P (op0) && !MEM_P (op0))
10504 op0 = force_reg (GET_MODE (op0), op0);
10505 op0 = gen_lowpart (mode, op0);
10508 /* If both types are integral, convert from one mode to the other. */
10509 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10510 op0 = convert_modes (mode, GET_MODE (op0), op0,
10511 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10512 /* If the output type is a bit-field type, do an extraction. */
10513 else if (reduce_bit_field)
10514 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10515 TYPE_UNSIGNED (type), NULL_RTX,
10516 mode, mode);
10517 /* As a last resort, spill op0 to memory, and reload it in a
10518 different mode. */
10519 else if (!MEM_P (op0))
10521 /* If the operand is not a MEM, force it into memory. Since we
10522 are going to be changing the mode of the MEM, don't call
10523 force_const_mem for constants because we don't allow pool
10524 constants to change mode. */
10525 tree inner_type = TREE_TYPE (treeop0);
10527 gcc_assert (!TREE_ADDRESSABLE (exp));
10529 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10530 target
10531 = assign_stack_temp_for_type
10532 (TYPE_MODE (inner_type),
10533 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10535 emit_move_insn (target, op0);
10536 op0 = target;
10539 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10540 output type is such that the operand is known to be aligned, indicate
10541 that it is. Otherwise, we need only be concerned about alignment for
10542 non-BLKmode results. */
10543 if (MEM_P (op0))
10545 enum insn_code icode;
10547 if (TYPE_ALIGN_OK (type))
10549 /* ??? Copying the MEM without substantially changing it might
10550 run afoul of the code handling volatile memory references in
10551 store_expr, which assumes that TARGET is returned unmodified
10552 if it has been used. */
10553 op0 = copy_rtx (op0);
10554 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10556 else if (modifier != EXPAND_WRITE
10557 && modifier != EXPAND_MEMORY
10558 && !inner_reference_p
10559 && mode != BLKmode
10560 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10562 /* If the target does have special handling for unaligned
10563 loads of mode then use them. */
10564 if ((icode = optab_handler (movmisalign_optab, mode))
10565 != CODE_FOR_nothing)
10567 rtx reg, insn;
10569 op0 = adjust_address (op0, mode, 0);
10570 /* We've already validated the memory, and we're creating a
10571 new pseudo destination. The predicates really can't
10572 fail. */
10573 reg = gen_reg_rtx (mode);
10575 /* Nor can the insn generator. */
10576 insn = GEN_FCN (icode) (reg, op0);
10577 emit_insn (insn);
10578 return reg;
10580 else if (STRICT_ALIGNMENT)
10582 tree inner_type = TREE_TYPE (treeop0);
10583 HOST_WIDE_INT temp_size
10584 = MAX (int_size_in_bytes (inner_type),
10585 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10586 rtx new_rtx
10587 = assign_stack_temp_for_type (mode, temp_size, type);
10588 rtx new_with_op0_mode
10589 = adjust_address (new_rtx, GET_MODE (op0), 0);
10591 gcc_assert (!TREE_ADDRESSABLE (exp));
10593 if (GET_MODE (op0) == BLKmode)
10594 emit_block_move (new_with_op0_mode, op0,
10595 GEN_INT (GET_MODE_SIZE (mode)),
10596 (modifier == EXPAND_STACK_PARM
10597 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10598 else
10599 emit_move_insn (new_with_op0_mode, op0);
10601 op0 = new_rtx;
10605 op0 = adjust_address (op0, mode, 0);
10608 return op0;
10610 case MODIFY_EXPR:
10612 tree lhs = treeop0;
10613 tree rhs = treeop1;
10614 gcc_assert (ignore);
10616 /* Check for |= or &= of a bitfield of size one into another bitfield
10617 of size 1. In this case, (unless we need the result of the
10618 assignment) we can do this more efficiently with a
10619 test followed by an assignment, if necessary.
10621 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10622 things change so we do, this code should be enhanced to
10623 support it. */
10624 if (TREE_CODE (lhs) == COMPONENT_REF
10625 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10626 || TREE_CODE (rhs) == BIT_AND_EXPR)
10627 && TREE_OPERAND (rhs, 0) == lhs
10628 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10629 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10630 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10632 rtx_code_label *label = gen_label_rtx ();
10633 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10634 do_jump (TREE_OPERAND (rhs, 1),
10635 value ? label : 0,
10636 value ? 0 : label, -1);
10637 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10638 false);
10639 do_pending_stack_adjust ();
10640 emit_label (label);
10641 return const0_rtx;
10644 expand_assignment (lhs, rhs, false);
10645 return const0_rtx;
10648 case ADDR_EXPR:
10649 return expand_expr_addr_expr (exp, target, tmode, modifier);
10651 case REALPART_EXPR:
10652 op0 = expand_normal (treeop0);
10653 return read_complex_part (op0, false);
10655 case IMAGPART_EXPR:
10656 op0 = expand_normal (treeop0);
10657 return read_complex_part (op0, true);
10659 case RETURN_EXPR:
10660 case LABEL_EXPR:
10661 case GOTO_EXPR:
10662 case SWITCH_EXPR:
10663 case ASM_EXPR:
10664 /* Expanded in cfgexpand.c. */
10665 gcc_unreachable ();
10667 case TRY_CATCH_EXPR:
10668 case CATCH_EXPR:
10669 case EH_FILTER_EXPR:
10670 case TRY_FINALLY_EXPR:
10671 /* Lowered by tree-eh.c. */
10672 gcc_unreachable ();
10674 case WITH_CLEANUP_EXPR:
10675 case CLEANUP_POINT_EXPR:
10676 case TARGET_EXPR:
10677 case CASE_LABEL_EXPR:
10678 case VA_ARG_EXPR:
10679 case BIND_EXPR:
10680 case INIT_EXPR:
10681 case CONJ_EXPR:
10682 case COMPOUND_EXPR:
10683 case PREINCREMENT_EXPR:
10684 case PREDECREMENT_EXPR:
10685 case POSTINCREMENT_EXPR:
10686 case POSTDECREMENT_EXPR:
10687 case LOOP_EXPR:
10688 case EXIT_EXPR:
10689 case COMPOUND_LITERAL_EXPR:
10690 /* Lowered by gimplify.c. */
10691 gcc_unreachable ();
10693 case FDESC_EXPR:
10694 /* Function descriptors are not valid except for as
10695 initialization constants, and should not be expanded. */
10696 gcc_unreachable ();
10698 case WITH_SIZE_EXPR:
10699 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10700 have pulled out the size to use in whatever context it needed. */
10701 return expand_expr_real (treeop0, original_target, tmode,
10702 modifier, alt_rtl, inner_reference_p);
10704 default:
10705 return expand_expr_real_2 (&ops, target, tmode, modifier);
10709 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10710 signedness of TYPE), possibly returning the result in TARGET. */
10711 static rtx
10712 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10714 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10715 if (target && GET_MODE (target) != GET_MODE (exp))
10716 target = 0;
10717 /* For constant values, reduce using build_int_cst_type. */
10718 if (CONST_INT_P (exp))
10720 HOST_WIDE_INT value = INTVAL (exp);
10721 tree t = build_int_cst_type (type, value);
10722 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10724 else if (TYPE_UNSIGNED (type))
10726 machine_mode mode = GET_MODE (exp);
10727 rtx mask = immed_wide_int_const
10728 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
10729 return expand_and (mode, exp, mask, target);
10731 else
10733 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10734 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10735 exp, count, target, 0);
10736 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10737 exp, count, target, 0);
10741 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10742 when applied to the address of EXP produces an address known to be
10743 aligned more than BIGGEST_ALIGNMENT. */
10745 static int
10746 is_aligning_offset (const_tree offset, const_tree exp)
10748 /* Strip off any conversions. */
10749 while (CONVERT_EXPR_P (offset))
10750 offset = TREE_OPERAND (offset, 0);
10752 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10753 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10754 if (TREE_CODE (offset) != BIT_AND_EXPR
10755 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
10756 || compare_tree_int (TREE_OPERAND (offset, 1),
10757 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10758 || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0)
10759 return 0;
10761 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10762 It must be NEGATE_EXPR. Then strip any more conversions. */
10763 offset = TREE_OPERAND (offset, 0);
10764 while (CONVERT_EXPR_P (offset))
10765 offset = TREE_OPERAND (offset, 0);
10767 if (TREE_CODE (offset) != NEGATE_EXPR)
10768 return 0;
10770 offset = TREE_OPERAND (offset, 0);
10771 while (CONVERT_EXPR_P (offset))
10772 offset = TREE_OPERAND (offset, 0);
10774 /* This must now be the address of EXP. */
10775 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10778 /* Return the tree node if an ARG corresponds to a string constant or zero
10779 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10780 in bytes within the string that ARG is accessing. The type of the
10781 offset will be `sizetype'. */
10783 tree
10784 string_constant (tree arg, tree *ptr_offset)
10786 tree array, offset, lower_bound;
10787 STRIP_NOPS (arg);
10789 if (TREE_CODE (arg) == ADDR_EXPR)
10791 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10793 *ptr_offset = size_zero_node;
10794 return TREE_OPERAND (arg, 0);
10796 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10798 array = TREE_OPERAND (arg, 0);
10799 offset = size_zero_node;
10801 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10803 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10804 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10805 if (TREE_CODE (array) != STRING_CST
10806 && TREE_CODE (array) != VAR_DECL)
10807 return 0;
10809 /* Check if the array has a nonzero lower bound. */
10810 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10811 if (!integer_zerop (lower_bound))
10813 /* If the offset and base aren't both constants, return 0. */
10814 if (TREE_CODE (lower_bound) != INTEGER_CST)
10815 return 0;
10816 if (TREE_CODE (offset) != INTEGER_CST)
10817 return 0;
10818 /* Adjust offset by the lower bound. */
10819 offset = size_diffop (fold_convert (sizetype, offset),
10820 fold_convert (sizetype, lower_bound));
10823 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10825 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10826 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10827 if (TREE_CODE (array) != ADDR_EXPR)
10828 return 0;
10829 array = TREE_OPERAND (array, 0);
10830 if (TREE_CODE (array) != STRING_CST
10831 && TREE_CODE (array) != VAR_DECL)
10832 return 0;
10834 else
10835 return 0;
10837 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10839 tree arg0 = TREE_OPERAND (arg, 0);
10840 tree arg1 = TREE_OPERAND (arg, 1);
10842 STRIP_NOPS (arg0);
10843 STRIP_NOPS (arg1);
10845 if (TREE_CODE (arg0) == ADDR_EXPR
10846 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10847 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10849 array = TREE_OPERAND (arg0, 0);
10850 offset = arg1;
10852 else if (TREE_CODE (arg1) == ADDR_EXPR
10853 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10854 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10856 array = TREE_OPERAND (arg1, 0);
10857 offset = arg0;
10859 else
10860 return 0;
10862 else
10863 return 0;
10865 if (TREE_CODE (array) == STRING_CST)
10867 *ptr_offset = fold_convert (sizetype, offset);
10868 return array;
10870 else if (TREE_CODE (array) == VAR_DECL
10871 || TREE_CODE (array) == CONST_DECL)
10873 int length;
10874 tree init = ctor_for_folding (array);
10876 /* Variables initialized to string literals can be handled too. */
10877 if (init == error_mark_node
10878 || !init
10879 || TREE_CODE (init) != STRING_CST)
10880 return 0;
10882 /* Avoid const char foo[4] = "abcde"; */
10883 if (DECL_SIZE_UNIT (array) == NULL_TREE
10884 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10885 || (length = TREE_STRING_LENGTH (init)) <= 0
10886 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10887 return 0;
10889 /* If variable is bigger than the string literal, OFFSET must be constant
10890 and inside of the bounds of the string literal. */
10891 offset = fold_convert (sizetype, offset);
10892 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10893 && (! tree_fits_uhwi_p (offset)
10894 || compare_tree_int (offset, length) >= 0))
10895 return 0;
10897 *ptr_offset = offset;
10898 return init;
10901 return 0;
10904 /* Generate code to calculate OPS, and exploded expression
10905 using a store-flag instruction and return an rtx for the result.
10906 OPS reflects a comparison.
10908 If TARGET is nonzero, store the result there if convenient.
10910 Return zero if there is no suitable set-flag instruction
10911 available on this machine.
10913 Once expand_expr has been called on the arguments of the comparison,
10914 we are committed to doing the store flag, since it is not safe to
10915 re-evaluate the expression. We emit the store-flag insn by calling
10916 emit_store_flag, but only expand the arguments if we have a reason
10917 to believe that emit_store_flag will be successful. If we think that
10918 it will, but it isn't, we have to simulate the store-flag with a
10919 set/jump/set sequence. */
10921 static rtx
10922 do_store_flag (sepops ops, rtx target, machine_mode mode)
10924 enum rtx_code code;
10925 tree arg0, arg1, type;
10926 tree tem;
10927 machine_mode operand_mode;
10928 int unsignedp;
10929 rtx op0, op1;
10930 rtx subtarget = target;
10931 location_t loc = ops->location;
10933 arg0 = ops->op0;
10934 arg1 = ops->op1;
10936 /* Don't crash if the comparison was erroneous. */
10937 if (arg0 == error_mark_node || arg1 == error_mark_node)
10938 return const0_rtx;
10940 type = TREE_TYPE (arg0);
10941 operand_mode = TYPE_MODE (type);
10942 unsignedp = TYPE_UNSIGNED (type);
10944 /* We won't bother with BLKmode store-flag operations because it would mean
10945 passing a lot of information to emit_store_flag. */
10946 if (operand_mode == BLKmode)
10947 return 0;
10949 /* We won't bother with store-flag operations involving function pointers
10950 when function pointers must be canonicalized before comparisons. */
10951 #ifdef HAVE_canonicalize_funcptr_for_compare
10952 if (HAVE_canonicalize_funcptr_for_compare
10953 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10954 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10955 == FUNCTION_TYPE))
10956 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10957 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10958 == FUNCTION_TYPE))))
10959 return 0;
10960 #endif
10962 STRIP_NOPS (arg0);
10963 STRIP_NOPS (arg1);
10965 /* For vector typed comparisons emit code to generate the desired
10966 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10967 expander for this. */
10968 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10970 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10971 tree if_true = constant_boolean_node (true, ops->type);
10972 tree if_false = constant_boolean_node (false, ops->type);
10973 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10976 /* Get the rtx comparison code to use. We know that EXP is a comparison
10977 operation of some type. Some comparisons against 1 and -1 can be
10978 converted to comparisons with zero. Do so here so that the tests
10979 below will be aware that we have a comparison with zero. These
10980 tests will not catch constants in the first operand, but constants
10981 are rarely passed as the first operand. */
10983 switch (ops->code)
10985 case EQ_EXPR:
10986 code = EQ;
10987 break;
10988 case NE_EXPR:
10989 code = NE;
10990 break;
10991 case LT_EXPR:
10992 if (integer_onep (arg1))
10993 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10994 else
10995 code = unsignedp ? LTU : LT;
10996 break;
10997 case LE_EXPR:
10998 if (! unsignedp && integer_all_onesp (arg1))
10999 arg1 = integer_zero_node, code = LT;
11000 else
11001 code = unsignedp ? LEU : LE;
11002 break;
11003 case GT_EXPR:
11004 if (! unsignedp && integer_all_onesp (arg1))
11005 arg1 = integer_zero_node, code = GE;
11006 else
11007 code = unsignedp ? GTU : GT;
11008 break;
11009 case GE_EXPR:
11010 if (integer_onep (arg1))
11011 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11012 else
11013 code = unsignedp ? GEU : GE;
11014 break;
11016 case UNORDERED_EXPR:
11017 code = UNORDERED;
11018 break;
11019 case ORDERED_EXPR:
11020 code = ORDERED;
11021 break;
11022 case UNLT_EXPR:
11023 code = UNLT;
11024 break;
11025 case UNLE_EXPR:
11026 code = UNLE;
11027 break;
11028 case UNGT_EXPR:
11029 code = UNGT;
11030 break;
11031 case UNGE_EXPR:
11032 code = UNGE;
11033 break;
11034 case UNEQ_EXPR:
11035 code = UNEQ;
11036 break;
11037 case LTGT_EXPR:
11038 code = LTGT;
11039 break;
11041 default:
11042 gcc_unreachable ();
11045 /* Put a constant second. */
11046 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11047 || TREE_CODE (arg0) == FIXED_CST)
11049 tem = arg0; arg0 = arg1; arg1 = tem;
11050 code = swap_condition (code);
11053 /* If this is an equality or inequality test of a single bit, we can
11054 do this by shifting the bit being tested to the low-order bit and
11055 masking the result with the constant 1. If the condition was EQ,
11056 we xor it with 1. This does not require an scc insn and is faster
11057 than an scc insn even if we have it.
11059 The code to make this transformation was moved into fold_single_bit_test,
11060 so we just call into the folder and expand its result. */
11062 if ((code == NE || code == EQ)
11063 && integer_zerop (arg1)
11064 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11066 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11067 if (srcstmt
11068 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11070 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11071 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11072 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11073 gimple_assign_rhs1 (srcstmt),
11074 gimple_assign_rhs2 (srcstmt));
11075 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11076 if (temp)
11077 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11081 if (! get_subtarget (target)
11082 || GET_MODE (subtarget) != operand_mode)
11083 subtarget = 0;
11085 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11087 if (target == 0)
11088 target = gen_reg_rtx (mode);
11090 /* Try a cstore if possible. */
11091 return emit_store_flag_force (target, code, op0, op1,
11092 operand_mode, unsignedp,
11093 (TYPE_PRECISION (ops->type) == 1
11094 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11098 /* Stubs in case we haven't got a casesi insn. */
11099 #ifndef HAVE_casesi
11100 # define HAVE_casesi 0
11101 # define gen_casesi(a, b, c, d, e) (0)
11102 # define CODE_FOR_casesi CODE_FOR_nothing
11103 #endif
11105 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11106 0 otherwise (i.e. if there is no casesi instruction).
11108 DEFAULT_PROBABILITY is the probability of jumping to the default
11109 label. */
11111 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11112 rtx table_label, rtx default_label, rtx fallback_label,
11113 int default_probability)
11115 struct expand_operand ops[5];
11116 machine_mode index_mode = SImode;
11117 rtx op1, op2, index;
11119 if (! HAVE_casesi)
11120 return 0;
11122 /* Convert the index to SImode. */
11123 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
11125 machine_mode omode = TYPE_MODE (index_type);
11126 rtx rangertx = expand_normal (range);
11128 /* We must handle the endpoints in the original mode. */
11129 index_expr = build2 (MINUS_EXPR, index_type,
11130 index_expr, minval);
11131 minval = integer_zero_node;
11132 index = expand_normal (index_expr);
11133 if (default_label)
11134 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11135 omode, 1, default_label,
11136 default_probability);
11137 /* Now we can safely truncate. */
11138 index = convert_to_mode (index_mode, index, 0);
11140 else
11142 if (TYPE_MODE (index_type) != index_mode)
11144 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11145 index_expr = fold_convert (index_type, index_expr);
11148 index = expand_normal (index_expr);
11151 do_pending_stack_adjust ();
11153 op1 = expand_normal (minval);
11154 op2 = expand_normal (range);
11156 create_input_operand (&ops[0], index, index_mode);
11157 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11158 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11159 create_fixed_operand (&ops[3], table_label);
11160 create_fixed_operand (&ops[4], (default_label
11161 ? default_label
11162 : fallback_label));
11163 expand_jump_insn (CODE_FOR_casesi, 5, ops);
11164 return 1;
11167 /* Attempt to generate a tablejump instruction; same concept. */
11168 /* Subroutine of the next function.
11170 INDEX is the value being switched on, with the lowest value
11171 in the table already subtracted.
11172 MODE is its expected mode (needed if INDEX is constant).
11173 RANGE is the length of the jump table.
11174 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11176 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11177 index value is out of range.
11178 DEFAULT_PROBABILITY is the probability of jumping to
11179 the default label. */
11181 static void
11182 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11183 rtx default_label, int default_probability)
11185 rtx temp, vector;
11187 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11188 cfun->cfg->max_jumptable_ents = INTVAL (range);
11190 /* Do an unsigned comparison (in the proper mode) between the index
11191 expression and the value which represents the length of the range.
11192 Since we just finished subtracting the lower bound of the range
11193 from the index expression, this comparison allows us to simultaneously
11194 check that the original index expression value is both greater than
11195 or equal to the minimum value of the range and less than or equal to
11196 the maximum value of the range. */
11198 if (default_label)
11199 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11200 default_label, default_probability);
11203 /* If index is in range, it must fit in Pmode.
11204 Convert to Pmode so we can index with it. */
11205 if (mode != Pmode)
11206 index = convert_to_mode (Pmode, index, 1);
11208 /* Don't let a MEM slip through, because then INDEX that comes
11209 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11210 and break_out_memory_refs will go to work on it and mess it up. */
11211 #ifdef PIC_CASE_VECTOR_ADDRESS
11212 if (flag_pic && !REG_P (index))
11213 index = copy_to_mode_reg (Pmode, index);
11214 #endif
11216 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11217 GET_MODE_SIZE, because this indicates how large insns are. The other
11218 uses should all be Pmode, because they are addresses. This code
11219 could fail if addresses and insns are not the same size. */
11220 index = simplify_gen_binary (MULT, Pmode, index,
11221 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11222 Pmode));
11223 index = simplify_gen_binary (PLUS, Pmode, index,
11224 gen_rtx_LABEL_REF (Pmode, table_label));
11226 #ifdef PIC_CASE_VECTOR_ADDRESS
11227 if (flag_pic)
11228 index = PIC_CASE_VECTOR_ADDRESS (index);
11229 else
11230 #endif
11231 index = memory_address (CASE_VECTOR_MODE, index);
11232 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11233 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11234 convert_move (temp, vector, 0);
11236 emit_jump_insn (gen_tablejump (temp, table_label));
11238 /* If we are generating PIC code or if the table is PC-relative, the
11239 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11240 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11241 emit_barrier ();
11245 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11246 rtx table_label, rtx default_label, int default_probability)
11248 rtx index;
11250 if (! HAVE_tablejump)
11251 return 0;
11253 index_expr = fold_build2 (MINUS_EXPR, index_type,
11254 fold_convert (index_type, index_expr),
11255 fold_convert (index_type, minval));
11256 index = expand_normal (index_expr);
11257 do_pending_stack_adjust ();
11259 do_tablejump (index, TYPE_MODE (index_type),
11260 convert_modes (TYPE_MODE (index_type),
11261 TYPE_MODE (TREE_TYPE (range)),
11262 expand_normal (range),
11263 TYPE_UNSIGNED (TREE_TYPE (range))),
11264 table_label, default_label, default_probability);
11265 return 1;
11268 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11269 static rtx
11270 const_vector_from_tree (tree exp)
11272 rtvec v;
11273 unsigned i;
11274 int units;
11275 tree elt;
11276 machine_mode inner, mode;
11278 mode = TYPE_MODE (TREE_TYPE (exp));
11280 if (initializer_zerop (exp))
11281 return CONST0_RTX (mode);
11283 units = GET_MODE_NUNITS (mode);
11284 inner = GET_MODE_INNER (mode);
11286 v = rtvec_alloc (units);
11288 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11290 elt = VECTOR_CST_ELT (exp, i);
11292 if (TREE_CODE (elt) == REAL_CST)
11293 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11294 inner);
11295 else if (TREE_CODE (elt) == FIXED_CST)
11296 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11297 inner);
11298 else
11299 RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner);
11302 return gen_rtx_CONST_VECTOR (mode, v);
11305 /* Build a decl for a personality function given a language prefix. */
11307 tree
11308 build_personality_function (const char *lang)
11310 const char *unwind_and_version;
11311 tree decl, type;
11312 char *name;
11314 switch (targetm_common.except_unwind_info (&global_options))
11316 case UI_NONE:
11317 return NULL;
11318 case UI_SJLJ:
11319 unwind_and_version = "_sj0";
11320 break;
11321 case UI_DWARF2:
11322 case UI_TARGET:
11323 unwind_and_version = "_v0";
11324 break;
11325 case UI_SEH:
11326 unwind_and_version = "_seh0";
11327 break;
11328 default:
11329 gcc_unreachable ();
11332 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11334 type = build_function_type_list (integer_type_node, integer_type_node,
11335 long_long_unsigned_type_node,
11336 ptr_type_node, ptr_type_node, NULL_TREE);
11337 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11338 get_identifier (name), type);
11339 DECL_ARTIFICIAL (decl) = 1;
11340 DECL_EXTERNAL (decl) = 1;
11341 TREE_PUBLIC (decl) = 1;
11343 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11344 are the flags assigned by targetm.encode_section_info. */
11345 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11347 return decl;
11350 /* Extracts the personality function of DECL and returns the corresponding
11351 libfunc. */
11354 get_personality_function (tree decl)
11356 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11357 enum eh_personality_kind pk;
11359 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11360 if (pk == eh_personality_none)
11361 return NULL;
11363 if (!personality
11364 && pk == eh_personality_any)
11365 personality = lang_hooks.eh_personality ();
11367 if (pk == eh_personality_lang)
11368 gcc_assert (personality != NULL_TREE);
11370 return XEXP (DECL_RTL (personality), 0);
11373 /* Returns a tree for the size of EXP in bytes. */
11375 static tree
11376 tree_expr_size (const_tree exp)
11378 if (DECL_P (exp)
11379 && DECL_SIZE_UNIT (exp) != 0)
11380 return DECL_SIZE_UNIT (exp);
11381 else
11382 return size_in_bytes (TREE_TYPE (exp));
11385 /* Return an rtx for the size in bytes of the value of EXP. */
11388 expr_size (tree exp)
11390 tree size;
11392 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11393 size = TREE_OPERAND (exp, 1);
11394 else
11396 size = tree_expr_size (exp);
11397 gcc_assert (size);
11398 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11401 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11404 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11405 if the size can vary or is larger than an integer. */
11407 static HOST_WIDE_INT
11408 int_expr_size (tree exp)
11410 tree size;
11412 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11413 size = TREE_OPERAND (exp, 1);
11414 else
11416 size = tree_expr_size (exp);
11417 gcc_assert (size);
11420 if (size == 0 || !tree_fits_shwi_p (size))
11421 return -1;
11423 return tree_to_shwi (size);
11426 #include "gt-expr.h"