PR tree-optimization/48762
[official-gcc.git] / gcc / reorg.c
blobf89598276b16d586eebc4fa29fd3755de6bc5d85
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2013 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
116 #include "regs.h"
117 #include "recog.h"
118 #include "flags.h"
119 #include "obstack.h"
120 #include "insn-attr.h"
121 #include "resource.h"
122 #include "except.h"
123 #include "params.h"
124 #include "target.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
128 #ifdef DELAY_SLOTS
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
132 #endif
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
135 #endif
137 /* Insns which have delay slots that have not yet been filled. */
139 static struct obstack unfilled_slots_obstack;
140 static rtx *unfilled_firstobj;
142 /* Define macros to refer to the first and last slot containing unfilled
143 insns. These are used because the list may move and its address
144 should be recomputed at each use. */
146 #define unfilled_slots_base \
147 ((rtx *) obstack_base (&unfilled_slots_obstack))
149 #define unfilled_slots_next \
150 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
152 /* Points to the label before the end of the function, or before a
153 return insn. */
154 static rtx function_return_label;
155 /* Likewise for a simple_return. */
156 static rtx function_simple_return_label;
158 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
159 not always monotonically increase. */
160 static int *uid_to_ruid;
162 /* Highest valid index in `uid_to_ruid'. */
163 static int max_uid;
165 static int stop_search_p (rtx, int);
166 static int resource_conflicts_p (struct resources *, struct resources *);
167 static int insn_references_resource_p (rtx, struct resources *, bool);
168 static int insn_sets_resource_p (rtx, struct resources *, bool);
169 static rtx find_end_label (rtx);
170 static rtx emit_delay_sequence (rtx, rtx, int);
171 static rtx add_to_delay_list (rtx, rtx);
172 static rtx delete_from_delay_slot (rtx);
173 static void delete_scheduled_jump (rtx);
174 static void note_delay_statistics (int, int);
175 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
176 static rtx optimize_skip (rtx);
177 #endif
178 static int get_jump_flags (rtx, rtx);
179 static int mostly_true_jump (rtx);
180 static rtx get_branch_condition (rtx, rtx);
181 static int condition_dominates_p (rtx, rtx);
182 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
183 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
184 static int check_annul_list_true_false (int, rtx);
185 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
186 struct resources *,
187 struct resources *,
188 struct resources *,
189 int, int *, int *, rtx *);
190 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
191 struct resources *,
192 struct resources *,
193 struct resources *,
194 int, int *, int *);
195 static void try_merge_delay_insns (rtx, rtx);
196 static rtx redundant_insn (rtx, rtx, rtx);
197 static int own_thread_p (rtx, rtx, int);
198 static void update_block (rtx, rtx);
199 static int reorg_redirect_jump (rtx, rtx);
200 static void update_reg_dead_notes (rtx, rtx);
201 static void fix_reg_dead_note (rtx, rtx);
202 static void update_reg_unused_notes (rtx, rtx);
203 static void fill_simple_delay_slots (int);
204 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
205 int, int, int, int,
206 int *, rtx);
207 static void fill_eager_delay_slots (void);
208 static void relax_delay_slots (rtx);
209 static void make_return_insns (rtx);
211 /* A wrapper around next_active_insn which takes care to return ret_rtx
212 unchanged. */
214 static rtx
215 first_active_target_insn (rtx insn)
217 if (ANY_RETURN_P (insn))
218 return insn;
219 return next_active_insn (insn);
222 /* Return true iff INSN is a simplejump, or any kind of return insn. */
224 static bool
225 simplejump_or_return_p (rtx insn)
227 return (JUMP_P (insn)
228 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
231 /* Return TRUE if this insn should stop the search for insn to fill delay
232 slots. LABELS_P indicates that labels should terminate the search.
233 In all cases, jumps terminate the search. */
235 static int
236 stop_search_p (rtx insn, int labels_p)
238 if (insn == 0)
239 return 1;
241 /* If the insn can throw an exception that is caught within the function,
242 it may effectively perform a jump from the viewpoint of the function.
243 Therefore act like for a jump. */
244 if (can_throw_internal (insn))
245 return 1;
247 switch (GET_CODE (insn))
249 case NOTE:
250 case CALL_INSN:
251 return 0;
253 case CODE_LABEL:
254 return labels_p;
256 case JUMP_INSN:
257 case BARRIER:
258 return 1;
260 case INSN:
261 /* OK unless it contains a delay slot or is an `asm' insn of some type.
262 We don't know anything about these. */
263 return (GET_CODE (PATTERN (insn)) == SEQUENCE
264 || GET_CODE (PATTERN (insn)) == ASM_INPUT
265 || asm_noperands (PATTERN (insn)) >= 0);
267 default:
268 gcc_unreachable ();
272 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
273 resource set contains a volatile memory reference. Otherwise, return FALSE. */
275 static int
276 resource_conflicts_p (struct resources *res1, struct resources *res2)
278 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
279 || (res1->unch_memory && res2->unch_memory)
280 || res1->volatil || res2->volatil)
281 return 1;
283 return hard_reg_set_intersect_p (res1->regs, res2->regs);
286 /* Return TRUE if any resource marked in RES, a `struct resources', is
287 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
288 routine is using those resources.
290 We compute this by computing all the resources referenced by INSN and
291 seeing if this conflicts with RES. It might be faster to directly check
292 ourselves, and this is the way it used to work, but it means duplicating
293 a large block of complex code. */
295 static int
296 insn_references_resource_p (rtx insn, struct resources *res,
297 bool include_delayed_effects)
299 struct resources insn_res;
301 CLEAR_RESOURCE (&insn_res);
302 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
303 return resource_conflicts_p (&insn_res, res);
306 /* Return TRUE if INSN modifies resources that are marked in RES.
307 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
308 included. CC0 is only modified if it is explicitly set; see comments
309 in front of mark_set_resources for details. */
311 static int
312 insn_sets_resource_p (rtx insn, struct resources *res,
313 bool include_delayed_effects)
315 struct resources insn_sets;
317 CLEAR_RESOURCE (&insn_sets);
318 mark_set_resources (insn, &insn_sets, 0,
319 (include_delayed_effects
320 ? MARK_SRC_DEST_CALL
321 : MARK_SRC_DEST));
322 return resource_conflicts_p (&insn_sets, res);
325 /* Find a label at the end of the function or before a RETURN. If there
326 is none, try to make one. If that fails, returns 0.
328 The property of such a label is that it is placed just before the
329 epilogue or a bare RETURN insn, so that another bare RETURN can be
330 turned into a jump to the label unconditionally. In particular, the
331 label cannot be placed before a RETURN insn with a filled delay slot.
333 ??? There may be a problem with the current implementation. Suppose
334 we start with a bare RETURN insn and call find_end_label. It may set
335 function_return_label just before the RETURN. Suppose the machinery
336 is able to fill the delay slot of the RETURN insn afterwards. Then
337 function_return_label is no longer valid according to the property
338 described above and find_end_label will still return it unmodified.
339 Note that this is probably mitigated by the following observation:
340 once function_return_label is made, it is very likely the target of
341 a jump, so filling the delay slot of the RETURN will be much more
342 difficult.
343 KIND is either simple_return_rtx or ret_rtx, indicating which type of
344 return we're looking for. */
346 static rtx
347 find_end_label (rtx kind)
349 rtx insn;
350 rtx *plabel;
352 if (kind == ret_rtx)
353 plabel = &function_return_label;
354 else
356 gcc_assert (kind == simple_return_rtx);
357 plabel = &function_simple_return_label;
360 /* If we found one previously, return it. */
361 if (*plabel)
362 return *plabel;
364 /* Otherwise, see if there is a label at the end of the function. If there
365 is, it must be that RETURN insns aren't needed, so that is our return
366 label and we don't have to do anything else. */
368 insn = get_last_insn ();
369 while (NOTE_P (insn)
370 || (NONJUMP_INSN_P (insn)
371 && (GET_CODE (PATTERN (insn)) == USE
372 || GET_CODE (PATTERN (insn)) == CLOBBER)))
373 insn = PREV_INSN (insn);
375 /* When a target threads its epilogue we might already have a
376 suitable return insn. If so put a label before it for the
377 function_return_label. */
378 if (BARRIER_P (insn)
379 && JUMP_P (PREV_INSN (insn))
380 && PATTERN (PREV_INSN (insn)) == kind)
382 rtx temp = PREV_INSN (PREV_INSN (insn));
383 rtx label = gen_label_rtx ();
384 LABEL_NUSES (label) = 0;
386 /* Put the label before any USE insns that may precede the RETURN
387 insn. */
388 while (GET_CODE (temp) == USE)
389 temp = PREV_INSN (temp);
391 emit_label_after (label, temp);
392 *plabel = label;
395 else if (LABEL_P (insn))
396 *plabel = insn;
397 else
399 rtx label = gen_label_rtx ();
400 LABEL_NUSES (label) = 0;
401 /* If the basic block reorder pass moves the return insn to
402 some other place try to locate it again and put our
403 function_return_label there. */
404 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
405 insn = PREV_INSN (insn);
406 if (insn)
408 insn = PREV_INSN (insn);
410 /* Put the label before any USE insns that may precede the
411 RETURN insn. */
412 while (GET_CODE (insn) == USE)
413 insn = PREV_INSN (insn);
415 emit_label_after (label, insn);
417 else
419 #ifdef HAVE_epilogue
420 if (HAVE_epilogue
421 #ifdef HAVE_return
422 && ! HAVE_return
423 #endif
425 /* The RETURN insn has its delay slot filled so we cannot
426 emit the label just before it. Since we already have
427 an epilogue and cannot emit a new RETURN, we cannot
428 emit the label at all. */
429 return NULL_RTX;
430 #endif /* HAVE_epilogue */
432 /* Otherwise, make a new label and emit a RETURN and BARRIER,
433 if needed. */
434 emit_label (label);
435 #ifdef HAVE_return
436 if (HAVE_return)
438 /* The return we make may have delay slots too. */
439 rtx insn = gen_return ();
440 insn = emit_jump_insn (insn);
441 set_return_jump_label (insn);
442 emit_barrier ();
443 if (num_delay_slots (insn) > 0)
444 obstack_ptr_grow (&unfilled_slots_obstack, insn);
446 #endif
448 *plabel = label;
451 /* Show one additional use for this label so it won't go away until
452 we are done. */
453 ++LABEL_NUSES (*plabel);
455 return *plabel;
458 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
459 the pattern of INSN with the SEQUENCE.
461 Chain the insns so that NEXT_INSN of each insn in the sequence points to
462 the next and NEXT_INSN of the last insn in the sequence points to
463 the first insn after the sequence. Similarly for PREV_INSN. This makes
464 it easier to scan all insns.
466 Returns the SEQUENCE that replaces INSN. */
468 static rtx
469 emit_delay_sequence (rtx insn, rtx list, int length)
471 int i = 1;
472 rtx li;
473 int had_barrier = 0;
475 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
476 rtvec seqv = rtvec_alloc (length + 1);
477 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
478 rtx seq_insn = make_insn_raw (seq);
479 rtx first = get_insns ();
480 rtx last = get_last_insn ();
482 /* Make a copy of the insn having delay slots. */
483 rtx delay_insn = copy_rtx (insn);
485 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
486 confuse further processing. Update LAST in case it was the last insn.
487 We will put the BARRIER back in later. */
488 if (NEXT_INSN (insn) && BARRIER_P (NEXT_INSN (insn)))
490 delete_related_insns (NEXT_INSN (insn));
491 last = get_last_insn ();
492 had_barrier = 1;
495 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
496 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
497 PREV_INSN (seq_insn) = PREV_INSN (insn);
499 if (insn != last)
500 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
502 if (insn != first)
503 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
505 /* Note the calls to set_new_first_and_last_insn must occur after
506 SEQ_INSN has been completely spliced into the insn stream.
508 Otherwise CUR_INSN_UID will get set to an incorrect value because
509 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
510 if (insn == last)
511 set_new_first_and_last_insn (first, seq_insn);
513 if (insn == first)
514 set_new_first_and_last_insn (seq_insn, last);
516 /* Build our SEQUENCE and rebuild the insn chain. */
517 XVECEXP (seq, 0, 0) = delay_insn;
518 INSN_DELETED_P (delay_insn) = 0;
519 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
521 INSN_LOCATION (seq_insn) = INSN_LOCATION (delay_insn);
523 for (li = list; li; li = XEXP (li, 1), i++)
525 rtx tem = XEXP (li, 0);
526 rtx note, next;
528 /* Show that this copy of the insn isn't deleted. */
529 INSN_DELETED_P (tem) = 0;
531 XVECEXP (seq, 0, i) = tem;
532 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
533 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
535 /* SPARC assembler, for instance, emit warning when debug info is output
536 into the delay slot. */
537 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
538 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
539 INSN_LOCATION (tem) = 0;
541 for (note = REG_NOTES (tem); note; note = next)
543 next = XEXP (note, 1);
544 switch (REG_NOTE_KIND (note))
546 case REG_DEAD:
547 /* Remove any REG_DEAD notes because we can't rely on them now
548 that the insn has been moved. */
549 remove_note (tem, note);
550 break;
552 case REG_LABEL_OPERAND:
553 case REG_LABEL_TARGET:
554 /* Keep the label reference count up to date. */
555 if (LABEL_P (XEXP (note, 0)))
556 LABEL_NUSES (XEXP (note, 0)) ++;
557 break;
559 default:
560 break;
565 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
567 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
568 last insn in that SEQUENCE to point to us. Similarly for the first
569 insn in the following insn if it is a SEQUENCE. */
571 if (PREV_INSN (seq_insn) && NONJUMP_INSN_P (PREV_INSN (seq_insn))
572 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
573 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
574 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
575 = seq_insn;
577 if (NEXT_INSN (seq_insn) && NONJUMP_INSN_P (NEXT_INSN (seq_insn))
578 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
579 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
581 /* If there used to be a BARRIER, put it back. */
582 if (had_barrier)
583 emit_barrier_after (seq_insn);
585 gcc_assert (i == length + 1);
587 return seq_insn;
590 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
591 be in the order in which the insns are to be executed. */
593 static rtx
594 add_to_delay_list (rtx insn, rtx delay_list)
596 /* If we have an empty list, just make a new list element. If
597 INSN has its block number recorded, clear it since we may
598 be moving the insn to a new block. */
600 if (delay_list == 0)
602 clear_hashed_info_for_insn (insn);
603 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
606 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
607 list. */
608 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
610 return delay_list;
613 /* Delete INSN from the delay slot of the insn that it is in, which may
614 produce an insn with no delay slots. Return the new insn. */
616 static rtx
617 delete_from_delay_slot (rtx insn)
619 rtx trial, seq_insn, seq, prev;
620 rtx delay_list = 0;
621 int i;
622 int had_barrier = 0;
624 /* We first must find the insn containing the SEQUENCE with INSN in its
625 delay slot. Do this by finding an insn, TRIAL, where
626 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
628 for (trial = insn;
629 PREV_INSN (NEXT_INSN (trial)) == trial;
630 trial = NEXT_INSN (trial))
633 seq_insn = PREV_INSN (NEXT_INSN (trial));
634 seq = PATTERN (seq_insn);
636 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
637 had_barrier = 1;
639 /* Create a delay list consisting of all the insns other than the one
640 we are deleting (unless we were the only one). */
641 if (XVECLEN (seq, 0) > 2)
642 for (i = 1; i < XVECLEN (seq, 0); i++)
643 if (XVECEXP (seq, 0, i) != insn)
644 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
646 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
647 list, and rebuild the delay list if non-empty. */
648 prev = PREV_INSN (seq_insn);
649 trial = XVECEXP (seq, 0, 0);
650 delete_related_insns (seq_insn);
651 add_insn_after (trial, prev, NULL);
653 /* If there was a barrier after the old SEQUENCE, remit it. */
654 if (had_barrier)
655 emit_barrier_after (trial);
657 /* If there are any delay insns, remit them. Otherwise clear the
658 annul flag. */
659 if (delay_list)
660 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
661 else if (JUMP_P (trial))
662 INSN_ANNULLED_BRANCH_P (trial) = 0;
664 INSN_FROM_TARGET_P (insn) = 0;
666 /* Show we need to fill this insn again. */
667 obstack_ptr_grow (&unfilled_slots_obstack, trial);
669 return trial;
672 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
673 the insn that sets CC0 for it and delete it too. */
675 static void
676 delete_scheduled_jump (rtx insn)
678 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
679 delete the insn that sets the condition code, but it is hard to find it.
680 Since this case is rare anyway, don't bother trying; there would likely
681 be other insns that became dead anyway, which we wouldn't know to
682 delete. */
684 #ifdef HAVE_cc0
685 if (reg_mentioned_p (cc0_rtx, insn))
687 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
689 /* If a reg-note was found, it points to an insn to set CC0. This
690 insn is in the delay list of some other insn. So delete it from
691 the delay list it was in. */
692 if (note)
694 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
695 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
696 delete_from_delay_slot (XEXP (note, 0));
698 else
700 /* The insn setting CC0 is our previous insn, but it may be in
701 a delay slot. It will be the last insn in the delay slot, if
702 it is. */
703 rtx trial = previous_insn (insn);
704 if (NOTE_P (trial))
705 trial = prev_nonnote_insn (trial);
706 if (sets_cc0_p (PATTERN (trial)) != 1
707 || FIND_REG_INC_NOTE (trial, NULL_RTX))
708 return;
709 if (PREV_INSN (NEXT_INSN (trial)) == trial)
710 delete_related_insns (trial);
711 else
712 delete_from_delay_slot (trial);
715 #endif
717 delete_related_insns (insn);
720 /* Counters for delay-slot filling. */
722 #define NUM_REORG_FUNCTIONS 2
723 #define MAX_DELAY_HISTOGRAM 3
724 #define MAX_REORG_PASSES 2
726 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
728 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
730 static int reorg_pass_number;
732 static void
733 note_delay_statistics (int slots_filled, int index)
735 num_insns_needing_delays[index][reorg_pass_number]++;
736 if (slots_filled > MAX_DELAY_HISTOGRAM)
737 slots_filled = MAX_DELAY_HISTOGRAM;
738 num_filled_delays[index][slots_filled][reorg_pass_number]++;
741 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
743 /* Optimize the following cases:
745 1. When a conditional branch skips over only one instruction,
746 use an annulling branch and put that insn in the delay slot.
747 Use either a branch that annuls when the condition if true or
748 invert the test with a branch that annuls when the condition is
749 false. This saves insns, since otherwise we must copy an insn
750 from the L1 target.
752 (orig) (skip) (otherwise)
753 Bcc.n L1 Bcc',a L1 Bcc,a L1'
754 insn insn insn2
755 L1: L1: L1:
756 insn2 insn2 insn2
757 insn3 insn3 L1':
758 insn3
760 2. When a conditional branch skips over only one instruction,
761 and after that, it unconditionally branches somewhere else,
762 perform the similar optimization. This saves executing the
763 second branch in the case where the inverted condition is true.
765 Bcc.n L1 Bcc',a L2
766 insn insn
767 L1: L1:
768 Bra L2 Bra L2
770 INSN is a JUMP_INSN.
772 This should be expanded to skip over N insns, where N is the number
773 of delay slots required. */
775 static rtx
776 optimize_skip (rtx insn)
778 rtx trial = next_nonnote_insn (insn);
779 rtx next_trial = next_active_insn (trial);
780 rtx delay_list = 0;
781 int flags;
783 flags = get_jump_flags (insn, JUMP_LABEL (insn));
785 if (trial == 0
786 || !NONJUMP_INSN_P (trial)
787 || GET_CODE (PATTERN (trial)) == SEQUENCE
788 || recog_memoized (trial) < 0
789 || (! eligible_for_annul_false (insn, 0, trial, flags)
790 && ! eligible_for_annul_true (insn, 0, trial, flags))
791 || can_throw_internal (trial))
792 return 0;
794 /* There are two cases where we are just executing one insn (we assume
795 here that a branch requires only one insn; this should be generalized
796 at some point): Where the branch goes around a single insn or where
797 we have one insn followed by a branch to the same label we branch to.
798 In both of these cases, inverting the jump and annulling the delay
799 slot give the same effect in fewer insns. */
800 if (next_trial == next_active_insn (JUMP_LABEL (insn))
801 || (next_trial != 0
802 && simplejump_or_return_p (next_trial)
803 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
805 if (eligible_for_annul_false (insn, 0, trial, flags))
807 if (invert_jump (insn, JUMP_LABEL (insn), 1))
808 INSN_FROM_TARGET_P (trial) = 1;
809 else if (! eligible_for_annul_true (insn, 0, trial, flags))
810 return 0;
813 delay_list = add_to_delay_list (trial, NULL_RTX);
814 next_trial = next_active_insn (trial);
815 update_block (trial, trial);
816 delete_related_insns (trial);
818 /* Also, if we are targeting an unconditional
819 branch, thread our jump to the target of that branch. Don't
820 change this into a RETURN here, because it may not accept what
821 we have in the delay slot. We'll fix this up later. */
822 if (next_trial && simplejump_or_return_p (next_trial))
824 rtx target_label = JUMP_LABEL (next_trial);
825 if (ANY_RETURN_P (target_label))
826 target_label = find_end_label (target_label);
828 if (target_label)
830 /* Recompute the flags based on TARGET_LABEL since threading
831 the jump to TARGET_LABEL may change the direction of the
832 jump (which may change the circumstances in which the
833 delay slot is nullified). */
834 flags = get_jump_flags (insn, target_label);
835 if (eligible_for_annul_true (insn, 0, trial, flags))
836 reorg_redirect_jump (insn, target_label);
840 INSN_ANNULLED_BRANCH_P (insn) = 1;
843 return delay_list;
845 #endif
847 /* Encode and return branch direction and prediction information for
848 INSN assuming it will jump to LABEL.
850 Non conditional branches return no direction information and
851 are predicted as very likely taken. */
853 static int
854 get_jump_flags (rtx insn, rtx label)
856 int flags;
858 /* get_jump_flags can be passed any insn with delay slots, these may
859 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
860 direction information, and only if they are conditional jumps.
862 If LABEL is a return, then there is no way to determine the branch
863 direction. */
864 if (JUMP_P (insn)
865 && (condjump_p (insn) || condjump_in_parallel_p (insn))
866 && !ANY_RETURN_P (label)
867 && INSN_UID (insn) <= max_uid
868 && INSN_UID (label) <= max_uid)
869 flags
870 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
871 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
872 /* No valid direction information. */
873 else
874 flags = 0;
876 return flags;
879 /* Return truth value of the statement that this branch
880 is mostly taken. If we think that the branch is extremely likely
881 to be taken, we return 2. If the branch is slightly more likely to be
882 taken, return 1. If the branch is slightly less likely to be taken,
883 return 0 and if the branch is highly unlikely to be taken, return -1. */
885 static int
886 mostly_true_jump (rtx jump_insn)
888 /* If branch probabilities are available, then use that number since it
889 always gives a correct answer. */
890 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
891 if (note)
893 int prob = INTVAL (XEXP (note, 0));
895 if (prob >= REG_BR_PROB_BASE * 9 / 10)
896 return 2;
897 else if (prob >= REG_BR_PROB_BASE / 2)
898 return 1;
899 else if (prob >= REG_BR_PROB_BASE / 10)
900 return 0;
901 else
902 return -1;
905 /* If there is no note, assume branches are not taken.
906 This should be rare. */
907 return 0;
910 /* Return the condition under which INSN will branch to TARGET. If TARGET
911 is zero, return the condition under which INSN will return. If INSN is
912 an unconditional branch, return const_true_rtx. If INSN isn't a simple
913 type of jump, or it doesn't go to TARGET, return 0. */
915 static rtx
916 get_branch_condition (rtx insn, rtx target)
918 rtx pat = PATTERN (insn);
919 rtx src;
921 if (condjump_in_parallel_p (insn))
922 pat = XVECEXP (pat, 0, 0);
924 if (ANY_RETURN_P (pat) && pat == target)
925 return const_true_rtx;
927 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
928 return 0;
930 src = SET_SRC (pat);
931 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
932 return const_true_rtx;
934 else if (GET_CODE (src) == IF_THEN_ELSE
935 && XEXP (src, 2) == pc_rtx
936 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
937 && XEXP (XEXP (src, 1), 0) == target)
938 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
939 return XEXP (src, 0);
941 else if (GET_CODE (src) == IF_THEN_ELSE
942 && XEXP (src, 1) == pc_rtx
943 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
944 && XEXP (XEXP (src, 2), 0) == target)
945 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
947 enum rtx_code rev;
948 rev = reversed_comparison_code (XEXP (src, 0), insn);
949 if (rev != UNKNOWN)
950 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
951 XEXP (XEXP (src, 0), 0),
952 XEXP (XEXP (src, 0), 1));
955 return 0;
958 /* Return nonzero if CONDITION is more strict than the condition of
959 INSN, i.e., if INSN will always branch if CONDITION is true. */
961 static int
962 condition_dominates_p (rtx condition, rtx insn)
964 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
965 enum rtx_code code = GET_CODE (condition);
966 enum rtx_code other_code;
968 if (rtx_equal_p (condition, other_condition)
969 || other_condition == const_true_rtx)
970 return 1;
972 else if (condition == const_true_rtx || other_condition == 0)
973 return 0;
975 other_code = GET_CODE (other_condition);
976 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
977 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
978 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
979 return 0;
981 return comparison_dominates_p (code, other_code);
984 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
985 any insns already in the delay slot of JUMP. */
987 static int
988 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
990 int flags, i;
991 rtx pat = PATTERN (seq);
993 /* Make sure all the delay slots of this jump would still
994 be valid after threading the jump. If they are still
995 valid, then return nonzero. */
997 flags = get_jump_flags (jump, newlabel);
998 for (i = 1; i < XVECLEN (pat, 0); i++)
999 if (! (
1000 #ifdef ANNUL_IFFALSE_SLOTS
1001 (INSN_ANNULLED_BRANCH_P (jump)
1002 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1003 ? eligible_for_annul_false (jump, i - 1,
1004 XVECEXP (pat, 0, i), flags) :
1005 #endif
1006 #ifdef ANNUL_IFTRUE_SLOTS
1007 (INSN_ANNULLED_BRANCH_P (jump)
1008 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1009 ? eligible_for_annul_true (jump, i - 1,
1010 XVECEXP (pat, 0, i), flags) :
1011 #endif
1012 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
1013 break;
1015 return (i == XVECLEN (pat, 0));
1018 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1019 any insns we wish to place in the delay slot of JUMP. */
1021 static int
1022 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1024 int flags, i;
1025 rtx li;
1027 /* Make sure all the insns in DELAY_LIST would still be
1028 valid after threading the jump. If they are still
1029 valid, then return nonzero. */
1031 flags = get_jump_flags (jump, newlabel);
1032 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1033 if (! (
1034 #ifdef ANNUL_IFFALSE_SLOTS
1035 (INSN_ANNULLED_BRANCH_P (jump)
1036 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1037 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1038 #endif
1039 #ifdef ANNUL_IFTRUE_SLOTS
1040 (INSN_ANNULLED_BRANCH_P (jump)
1041 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1042 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1043 #endif
1044 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1045 break;
1047 return (li == NULL);
1050 /* DELAY_LIST is a list of insns that have already been placed into delay
1051 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1052 If not, return 0; otherwise return 1. */
1054 static int
1055 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1057 rtx temp;
1059 if (delay_list)
1061 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1063 rtx trial = XEXP (temp, 0);
1065 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1066 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1067 return 0;
1071 return 1;
1074 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1075 the condition tested by INSN is CONDITION and the resources shown in
1076 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1077 from SEQ's delay list, in addition to whatever insns it may execute
1078 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1079 needed while searching for delay slot insns. Return the concatenated
1080 delay list if possible, otherwise, return 0.
1082 SLOTS_TO_FILL is the total number of slots required by INSN, and
1083 PSLOTS_FILLED points to the number filled so far (also the number of
1084 insns in DELAY_LIST). It is updated with the number that have been
1085 filled from the SEQUENCE, if any.
1087 PANNUL_P points to a nonzero value if we already know that we need
1088 to annul INSN. If this routine determines that annulling is needed,
1089 it may set that value nonzero.
1091 PNEW_THREAD points to a location that is to receive the place at which
1092 execution should continue. */
1094 static rtx
1095 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1096 rtx delay_list, struct resources *sets,
1097 struct resources *needed,
1098 struct resources *other_needed,
1099 int slots_to_fill, int *pslots_filled,
1100 int *pannul_p, rtx *pnew_thread)
1102 rtx temp;
1103 int slots_remaining = slots_to_fill - *pslots_filled;
1104 int total_slots_filled = *pslots_filled;
1105 rtx new_delay_list = 0;
1106 int must_annul = *pannul_p;
1107 int used_annul = 0;
1108 int i;
1109 struct resources cc_set;
1111 /* We can't do anything if there are more delay slots in SEQ than we
1112 can handle, or if we don't know that it will be a taken branch.
1113 We know that it will be a taken branch if it is either an unconditional
1114 branch or a conditional branch with a stricter branch condition.
1116 Also, exit if the branch has more than one set, since then it is computing
1117 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1118 ??? It may be possible to move other sets into INSN in addition to
1119 moving the instructions in the delay slots.
1121 We can not steal the delay list if one of the instructions in the
1122 current delay_list modifies the condition codes and the jump in the
1123 sequence is a conditional jump. We can not do this because we can
1124 not change the direction of the jump because the condition codes
1125 will effect the direction of the jump in the sequence. */
1127 CLEAR_RESOURCE (&cc_set);
1128 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1130 rtx trial = XEXP (temp, 0);
1132 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1133 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1134 return delay_list;
1137 if (XVECLEN (seq, 0) - 1 > slots_remaining
1138 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1139 || ! single_set (XVECEXP (seq, 0, 0)))
1140 return delay_list;
1142 #ifdef MD_CAN_REDIRECT_BRANCH
1143 /* On some targets, branches with delay slots can have a limited
1144 displacement. Give the back end a chance to tell us we can't do
1145 this. */
1146 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1147 return delay_list;
1148 #endif
1150 for (i = 1; i < XVECLEN (seq, 0); i++)
1152 rtx trial = XVECEXP (seq, 0, i);
1153 int flags;
1155 if (insn_references_resource_p (trial, sets, false)
1156 || insn_sets_resource_p (trial, needed, false)
1157 || insn_sets_resource_p (trial, sets, false)
1158 #ifdef HAVE_cc0
1159 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1160 delay list. */
1161 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1162 #endif
1163 /* If TRIAL is from the fallthrough code of an annulled branch insn
1164 in SEQ, we cannot use it. */
1165 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1166 && ! INSN_FROM_TARGET_P (trial)))
1167 return delay_list;
1169 /* If this insn was already done (usually in a previous delay slot),
1170 pretend we put it in our delay slot. */
1171 if (redundant_insn (trial, insn, new_delay_list))
1172 continue;
1174 /* We will end up re-vectoring this branch, so compute flags
1175 based on jumping to the new label. */
1176 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1178 if (! must_annul
1179 && ((condition == const_true_rtx
1180 || (! insn_sets_resource_p (trial, other_needed, false)
1181 && ! may_trap_or_fault_p (PATTERN (trial)))))
1182 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1183 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1184 && (must_annul = 1,
1185 check_annul_list_true_false (0, delay_list)
1186 && check_annul_list_true_false (0, new_delay_list)
1187 && eligible_for_annul_false (insn, total_slots_filled,
1188 trial, flags)))
1190 if (must_annul)
1191 used_annul = 1;
1192 temp = copy_delay_slot_insn (trial);
1193 INSN_FROM_TARGET_P (temp) = 1;
1194 new_delay_list = add_to_delay_list (temp, new_delay_list);
1195 total_slots_filled++;
1197 if (--slots_remaining == 0)
1198 break;
1200 else
1201 return delay_list;
1204 /* Show the place to which we will be branching. */
1205 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1207 /* Add any new insns to the delay list and update the count of the
1208 number of slots filled. */
1209 *pslots_filled = total_slots_filled;
1210 if (used_annul)
1211 *pannul_p = 1;
1213 if (delay_list == 0)
1214 return new_delay_list;
1216 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1217 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1219 return delay_list;
1222 /* Similar to steal_delay_list_from_target except that SEQ is on the
1223 fallthrough path of INSN. Here we only do something if the delay insn
1224 of SEQ is an unconditional branch. In that case we steal its delay slot
1225 for INSN since unconditional branches are much easier to fill. */
1227 static rtx
1228 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1229 rtx delay_list, struct resources *sets,
1230 struct resources *needed,
1231 struct resources *other_needed,
1232 int slots_to_fill, int *pslots_filled,
1233 int *pannul_p)
1235 int i;
1236 int flags;
1237 int must_annul = *pannul_p;
1238 int used_annul = 0;
1240 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1242 /* We can't do anything if SEQ's delay insn isn't an
1243 unconditional branch. */
1245 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1246 return delay_list;
1248 for (i = 1; i < XVECLEN (seq, 0); i++)
1250 rtx trial = XVECEXP (seq, 0, i);
1252 /* If TRIAL sets CC0, stealing it will move it too far from the use
1253 of CC0. */
1254 if (insn_references_resource_p (trial, sets, false)
1255 || insn_sets_resource_p (trial, needed, false)
1256 || insn_sets_resource_p (trial, sets, false)
1257 #ifdef HAVE_cc0
1258 || sets_cc0_p (PATTERN (trial))
1259 #endif
1262 break;
1264 /* If this insn was already done, we don't need it. */
1265 if (redundant_insn (trial, insn, delay_list))
1267 delete_from_delay_slot (trial);
1268 continue;
1271 if (! must_annul
1272 && ((condition == const_true_rtx
1273 || (! insn_sets_resource_p (trial, other_needed, false)
1274 && ! may_trap_or_fault_p (PATTERN (trial)))))
1275 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1276 : (must_annul || delay_list == NULL) && (must_annul = 1,
1277 check_annul_list_true_false (1, delay_list)
1278 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1280 if (must_annul)
1281 used_annul = 1;
1282 delete_from_delay_slot (trial);
1283 delay_list = add_to_delay_list (trial, delay_list);
1285 if (++(*pslots_filled) == slots_to_fill)
1286 break;
1288 else
1289 break;
1292 if (used_annul)
1293 *pannul_p = 1;
1294 return delay_list;
1297 /* Try merging insns starting at THREAD which match exactly the insns in
1298 INSN's delay list.
1300 If all insns were matched and the insn was previously annulling, the
1301 annul bit will be cleared.
1303 For each insn that is merged, if the branch is or will be non-annulling,
1304 we delete the merged insn. */
1306 static void
1307 try_merge_delay_insns (rtx insn, rtx thread)
1309 rtx trial, next_trial;
1310 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1311 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1312 int slot_number = 1;
1313 int num_slots = XVECLEN (PATTERN (insn), 0);
1314 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1315 struct resources set, needed;
1316 rtx merged_insns = 0;
1317 int i;
1318 int flags;
1320 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1322 CLEAR_RESOURCE (&needed);
1323 CLEAR_RESOURCE (&set);
1325 /* If this is not an annulling branch, take into account anything needed in
1326 INSN's delay slot. This prevents two increments from being incorrectly
1327 folded into one. If we are annulling, this would be the correct
1328 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1329 will essentially disable this optimization. This method is somewhat of
1330 a kludge, but I don't see a better way.) */
1331 if (! annul_p)
1332 for (i = 1 ; i < num_slots; i++)
1333 if (XVECEXP (PATTERN (insn), 0, i))
1334 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1335 true);
1337 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1339 rtx pat = PATTERN (trial);
1340 rtx oldtrial = trial;
1342 next_trial = next_nonnote_insn (trial);
1344 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1345 if (NONJUMP_INSN_P (trial)
1346 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1347 continue;
1349 if (GET_CODE (next_to_match) == GET_CODE (trial)
1350 #ifdef HAVE_cc0
1351 /* We can't share an insn that sets cc0. */
1352 && ! sets_cc0_p (pat)
1353 #endif
1354 && ! insn_references_resource_p (trial, &set, true)
1355 && ! insn_sets_resource_p (trial, &set, true)
1356 && ! insn_sets_resource_p (trial, &needed, true)
1357 && (trial = try_split (pat, trial, 0)) != 0
1358 /* Update next_trial, in case try_split succeeded. */
1359 && (next_trial = next_nonnote_insn (trial))
1360 /* Likewise THREAD. */
1361 && (thread = oldtrial == thread ? trial : thread)
1362 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1363 /* Have to test this condition if annul condition is different
1364 from (and less restrictive than) non-annulling one. */
1365 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1368 if (! annul_p)
1370 update_block (trial, thread);
1371 if (trial == thread)
1372 thread = next_active_insn (thread);
1374 delete_related_insns (trial);
1375 INSN_FROM_TARGET_P (next_to_match) = 0;
1377 else
1378 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1380 if (++slot_number == num_slots)
1381 break;
1383 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1386 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1387 mark_referenced_resources (trial, &needed, true);
1390 /* See if we stopped on a filled insn. If we did, try to see if its
1391 delay slots match. */
1392 if (slot_number != num_slots
1393 && trial && NONJUMP_INSN_P (trial)
1394 && GET_CODE (PATTERN (trial)) == SEQUENCE
1395 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1396 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1398 rtx pat = PATTERN (trial);
1399 rtx filled_insn = XVECEXP (pat, 0, 0);
1401 /* Account for resources set/needed by the filled insn. */
1402 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1403 mark_referenced_resources (filled_insn, &needed, true);
1405 for (i = 1; i < XVECLEN (pat, 0); i++)
1407 rtx dtrial = XVECEXP (pat, 0, i);
1409 if (! insn_references_resource_p (dtrial, &set, true)
1410 && ! insn_sets_resource_p (dtrial, &set, true)
1411 && ! insn_sets_resource_p (dtrial, &needed, true)
1412 #ifdef HAVE_cc0
1413 && ! sets_cc0_p (PATTERN (dtrial))
1414 #endif
1415 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1416 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1418 if (! annul_p)
1420 rtx new_rtx;
1422 update_block (dtrial, thread);
1423 new_rtx = delete_from_delay_slot (dtrial);
1424 if (INSN_DELETED_P (thread))
1425 thread = new_rtx;
1426 INSN_FROM_TARGET_P (next_to_match) = 0;
1428 else
1429 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1430 merged_insns);
1432 if (++slot_number == num_slots)
1433 break;
1435 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1437 else
1439 /* Keep track of the set/referenced resources for the delay
1440 slots of any trial insns we encounter. */
1441 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1442 mark_referenced_resources (dtrial, &needed, true);
1447 /* If all insns in the delay slot have been matched and we were previously
1448 annulling the branch, we need not any more. In that case delete all the
1449 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1450 the delay list so that we know that it isn't only being used at the
1451 target. */
1452 if (slot_number == num_slots && annul_p)
1454 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1456 if (GET_MODE (merged_insns) == SImode)
1458 rtx new_rtx;
1460 update_block (XEXP (merged_insns, 0), thread);
1461 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1462 if (INSN_DELETED_P (thread))
1463 thread = new_rtx;
1465 else
1467 update_block (XEXP (merged_insns, 0), thread);
1468 delete_related_insns (XEXP (merged_insns, 0));
1472 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1474 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1475 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1479 /* See if INSN is redundant with an insn in front of TARGET. Often this
1480 is called when INSN is a candidate for a delay slot of TARGET.
1481 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1482 of INSN. Often INSN will be redundant with an insn in a delay slot of
1483 some previous insn. This happens when we have a series of branches to the
1484 same label; in that case the first insn at the target might want to go
1485 into each of the delay slots.
1487 If we are not careful, this routine can take up a significant fraction
1488 of the total compilation time (4%), but only wins rarely. Hence we
1489 speed this routine up by making two passes. The first pass goes back
1490 until it hits a label and sees if it finds an insn with an identical
1491 pattern. Only in this (relatively rare) event does it check for
1492 data conflicts.
1494 We do not split insns we encounter. This could cause us not to find a
1495 redundant insn, but the cost of splitting seems greater than the possible
1496 gain in rare cases. */
1498 static rtx
1499 redundant_insn (rtx insn, rtx target, rtx delay_list)
1501 rtx target_main = target;
1502 rtx ipat = PATTERN (insn);
1503 rtx trial, pat;
1504 struct resources needed, set;
1505 int i;
1506 unsigned insns_to_search;
1508 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1509 are allowed to not actually assign to such a register. */
1510 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1511 return 0;
1513 /* Scan backwards looking for a match. */
1514 for (trial = PREV_INSN (target),
1515 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1516 trial && insns_to_search > 0;
1517 trial = PREV_INSN (trial))
1519 if (LABEL_P (trial))
1520 return 0;
1522 if (!INSN_P (trial))
1523 continue;
1524 --insns_to_search;
1526 pat = PATTERN (trial);
1527 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1528 continue;
1530 if (GET_CODE (pat) == SEQUENCE)
1532 /* Stop for a CALL and its delay slots because it is difficult to
1533 track its resource needs correctly. */
1534 if (CALL_P (XVECEXP (pat, 0, 0)))
1535 return 0;
1537 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1538 slots because it is difficult to track its resource needs
1539 correctly. */
1541 #ifdef INSN_SETS_ARE_DELAYED
1542 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1543 return 0;
1544 #endif
1546 #ifdef INSN_REFERENCES_ARE_DELAYED
1547 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1548 return 0;
1549 #endif
1551 /* See if any of the insns in the delay slot match, updating
1552 resource requirements as we go. */
1553 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1554 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1555 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1556 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1557 break;
1559 /* If found a match, exit this loop early. */
1560 if (i > 0)
1561 break;
1564 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1565 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1566 break;
1569 /* If we didn't find an insn that matches, return 0. */
1570 if (trial == 0)
1571 return 0;
1573 /* See what resources this insn sets and needs. If they overlap, or
1574 if this insn references CC0, it can't be redundant. */
1576 CLEAR_RESOURCE (&needed);
1577 CLEAR_RESOURCE (&set);
1578 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1579 mark_referenced_resources (insn, &needed, true);
1581 /* If TARGET is a SEQUENCE, get the main insn. */
1582 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1583 target_main = XVECEXP (PATTERN (target), 0, 0);
1585 if (resource_conflicts_p (&needed, &set)
1586 #ifdef HAVE_cc0
1587 || reg_mentioned_p (cc0_rtx, ipat)
1588 #endif
1589 /* The insn requiring the delay may not set anything needed or set by
1590 INSN. */
1591 || insn_sets_resource_p (target_main, &needed, true)
1592 || insn_sets_resource_p (target_main, &set, true))
1593 return 0;
1595 /* Insns we pass may not set either NEEDED or SET, so merge them for
1596 simpler tests. */
1597 needed.memory |= set.memory;
1598 needed.unch_memory |= set.unch_memory;
1599 IOR_HARD_REG_SET (needed.regs, set.regs);
1601 /* This insn isn't redundant if it conflicts with an insn that either is
1602 or will be in a delay slot of TARGET. */
1604 while (delay_list)
1606 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1607 return 0;
1608 delay_list = XEXP (delay_list, 1);
1611 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1612 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1613 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1614 true))
1615 return 0;
1617 /* Scan backwards until we reach a label or an insn that uses something
1618 INSN sets or sets something insn uses or sets. */
1620 for (trial = PREV_INSN (target),
1621 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1622 trial && !LABEL_P (trial) && insns_to_search > 0;
1623 trial = PREV_INSN (trial))
1625 if (!INSN_P (trial))
1626 continue;
1627 --insns_to_search;
1629 pat = PATTERN (trial);
1630 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1631 continue;
1633 if (GET_CODE (pat) == SEQUENCE)
1635 bool annul_p = false;
1636 rtx control = XVECEXP (pat, 0, 0);
1638 /* If this is a CALL_INSN and its delay slots, it is hard to track
1639 the resource needs properly, so give up. */
1640 if (CALL_P (control))
1641 return 0;
1643 /* If this is an INSN or JUMP_INSN with delayed effects, it
1644 is hard to track the resource needs properly, so give up. */
1646 #ifdef INSN_SETS_ARE_DELAYED
1647 if (INSN_SETS_ARE_DELAYED (control))
1648 return 0;
1649 #endif
1651 #ifdef INSN_REFERENCES_ARE_DELAYED
1652 if (INSN_REFERENCES_ARE_DELAYED (control))
1653 return 0;
1654 #endif
1656 if (JUMP_P (control))
1657 annul_p = INSN_ANNULLED_BRANCH_P (control);
1659 /* See if any of the insns in the delay slot match, updating
1660 resource requirements as we go. */
1661 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1663 rtx candidate = XVECEXP (pat, 0, i);
1665 /* If an insn will be annulled if the branch is false, it isn't
1666 considered as a possible duplicate insn. */
1667 if (rtx_equal_p (PATTERN (candidate), ipat)
1668 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1670 /* Show that this insn will be used in the sequel. */
1671 INSN_FROM_TARGET_P (candidate) = 0;
1672 return candidate;
1675 /* Unless this is an annulled insn from the target of a branch,
1676 we must stop if it sets anything needed or set by INSN. */
1677 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1678 && insn_sets_resource_p (candidate, &needed, true))
1679 return 0;
1682 /* If the insn requiring the delay slot conflicts with INSN, we
1683 must stop. */
1684 if (insn_sets_resource_p (control, &needed, true))
1685 return 0;
1687 else
1689 /* See if TRIAL is the same as INSN. */
1690 pat = PATTERN (trial);
1691 if (rtx_equal_p (pat, ipat))
1692 return trial;
1694 /* Can't go any further if TRIAL conflicts with INSN. */
1695 if (insn_sets_resource_p (trial, &needed, true))
1696 return 0;
1700 return 0;
1703 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1704 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1705 is nonzero, we are allowed to fall into this thread; otherwise, we are
1706 not.
1708 If LABEL is used more than one or we pass a label other than LABEL before
1709 finding an active insn, we do not own this thread. */
1711 static int
1712 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1714 rtx active_insn;
1715 rtx insn;
1717 /* We don't own the function end. */
1718 if (thread == 0 || ANY_RETURN_P (thread))
1719 return 0;
1721 /* Get the first active insn, or THREAD, if it is an active insn. */
1722 active_insn = next_active_insn (PREV_INSN (thread));
1724 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1725 if (LABEL_P (insn)
1726 && (insn != label || LABEL_NUSES (insn) != 1))
1727 return 0;
1729 if (allow_fallthrough)
1730 return 1;
1732 /* Ensure that we reach a BARRIER before any insn or label. */
1733 for (insn = prev_nonnote_insn (thread);
1734 insn == 0 || !BARRIER_P (insn);
1735 insn = prev_nonnote_insn (insn))
1736 if (insn == 0
1737 || LABEL_P (insn)
1738 || (NONJUMP_INSN_P (insn)
1739 && GET_CODE (PATTERN (insn)) != USE
1740 && GET_CODE (PATTERN (insn)) != CLOBBER))
1741 return 0;
1743 return 1;
1746 /* Called when INSN is being moved from a location near the target of a jump.
1747 We leave a marker of the form (use (INSN)) immediately in front
1748 of WHERE for mark_target_live_regs. These markers will be deleted when
1749 reorg finishes.
1751 We used to try to update the live status of registers if WHERE is at
1752 the start of a basic block, but that can't work since we may remove a
1753 BARRIER in relax_delay_slots. */
1755 static void
1756 update_block (rtx insn, rtx where)
1758 /* Ignore if this was in a delay slot and it came from the target of
1759 a branch. */
1760 if (INSN_FROM_TARGET_P (insn))
1761 return;
1763 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1765 /* INSN might be making a value live in a block where it didn't use to
1766 be. So recompute liveness information for this block. */
1768 incr_ticks_for_insn (insn);
1771 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1772 the basic block containing the jump. */
1774 static int
1775 reorg_redirect_jump (rtx jump, rtx nlabel)
1777 incr_ticks_for_insn (jump);
1778 return redirect_jump (jump, nlabel, 1);
1781 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1782 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1783 that reference values used in INSN. If we find one, then we move the
1784 REG_DEAD note to INSN.
1786 This is needed to handle the case where a later insn (after INSN) has a
1787 REG_DEAD note for a register used by INSN, and this later insn subsequently
1788 gets moved before a CODE_LABEL because it is a redundant insn. In this
1789 case, mark_target_live_regs may be confused into thinking the register
1790 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1792 static void
1793 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1795 rtx p, link, next;
1797 for (p = next_nonnote_insn (insn); p != delayed_insn;
1798 p = next_nonnote_insn (p))
1799 for (link = REG_NOTES (p); link; link = next)
1801 next = XEXP (link, 1);
1803 if (REG_NOTE_KIND (link) != REG_DEAD
1804 || !REG_P (XEXP (link, 0)))
1805 continue;
1807 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1809 /* Move the REG_DEAD note from P to INSN. */
1810 remove_note (p, link);
1811 XEXP (link, 1) = REG_NOTES (insn);
1812 REG_NOTES (insn) = link;
1817 /* Called when an insn redundant with start_insn is deleted. If there
1818 is a REG_DEAD note for the target of start_insn between start_insn
1819 and stop_insn, then the REG_DEAD note needs to be deleted since the
1820 value no longer dies there.
1822 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1823 confused into thinking the register is dead. */
1825 static void
1826 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1828 rtx p, link, next;
1830 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1831 p = next_nonnote_insn (p))
1832 for (link = REG_NOTES (p); link; link = next)
1834 next = XEXP (link, 1);
1836 if (REG_NOTE_KIND (link) != REG_DEAD
1837 || !REG_P (XEXP (link, 0)))
1838 continue;
1840 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1842 remove_note (p, link);
1843 return;
1848 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1850 This handles the case of udivmodXi4 instructions which optimize their
1851 output depending on whether any REG_UNUSED notes are present.
1852 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1853 does. */
1855 static void
1856 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1858 rtx link, next;
1860 for (link = REG_NOTES (insn); link; link = next)
1862 next = XEXP (link, 1);
1864 if (REG_NOTE_KIND (link) != REG_UNUSED
1865 || !REG_P (XEXP (link, 0)))
1866 continue;
1868 if (! find_regno_note (redundant_insn, REG_UNUSED,
1869 REGNO (XEXP (link, 0))))
1870 remove_note (insn, link);
1874 /* Return the label before INSN, or put a new label there. */
1876 static rtx
1877 get_label_before (rtx insn)
1879 rtx label;
1881 /* Find an existing label at this point
1882 or make a new one if there is none. */
1883 label = prev_nonnote_insn (insn);
1885 if (label == 0 || !LABEL_P (label))
1887 rtx prev = PREV_INSN (insn);
1889 label = gen_label_rtx ();
1890 emit_label_after (label, prev);
1891 LABEL_NUSES (label) = 0;
1893 return label;
1896 /* Scan a function looking for insns that need a delay slot and find insns to
1897 put into the delay slot.
1899 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1900 as calls). We do these first since we don't want jump insns (that are
1901 easier to fill) to get the only insns that could be used for non-jump insns.
1902 When it is zero, only try to fill JUMP_INSNs.
1904 When slots are filled in this manner, the insns (including the
1905 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1906 it is possible to tell whether a delay slot has really been filled
1907 or not. `final' knows how to deal with this, by communicating
1908 through FINAL_SEQUENCE. */
1910 static void
1911 fill_simple_delay_slots (int non_jumps_p)
1913 rtx insn, pat, trial, next_trial;
1914 int i;
1915 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1916 struct resources needed, set;
1917 int slots_to_fill, slots_filled;
1918 rtx delay_list;
1920 for (i = 0; i < num_unfilled_slots; i++)
1922 int flags;
1923 /* Get the next insn to fill. If it has already had any slots assigned,
1924 we can't do anything with it. Maybe we'll improve this later. */
1926 insn = unfilled_slots_base[i];
1927 if (insn == 0
1928 || INSN_DELETED_P (insn)
1929 || (NONJUMP_INSN_P (insn)
1930 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1931 || (JUMP_P (insn) && non_jumps_p)
1932 || (!JUMP_P (insn) && ! non_jumps_p))
1933 continue;
1935 /* It may have been that this insn used to need delay slots, but
1936 now doesn't; ignore in that case. This can happen, for example,
1937 on the HP PA RISC, where the number of delay slots depends on
1938 what insns are nearby. */
1939 slots_to_fill = num_delay_slots (insn);
1941 /* Some machine description have defined instructions to have
1942 delay slots only in certain circumstances which may depend on
1943 nearby insns (which change due to reorg's actions).
1945 For example, the PA port normally has delay slots for unconditional
1946 jumps.
1948 However, the PA port claims such jumps do not have a delay slot
1949 if they are immediate successors of certain CALL_INSNs. This
1950 allows the port to favor filling the delay slot of the call with
1951 the unconditional jump. */
1952 if (slots_to_fill == 0)
1953 continue;
1955 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1956 says how many. After initialization, first try optimizing
1958 call _foo call _foo
1959 nop add %o7,.-L1,%o7
1960 b,a L1
1963 If this case applies, the delay slot of the call is filled with
1964 the unconditional jump. This is done first to avoid having the
1965 delay slot of the call filled in the backward scan. Also, since
1966 the unconditional jump is likely to also have a delay slot, that
1967 insn must exist when it is subsequently scanned.
1969 This is tried on each insn with delay slots as some machines
1970 have insns which perform calls, but are not represented as
1971 CALL_INSNs. */
1973 slots_filled = 0;
1974 delay_list = 0;
1976 if (JUMP_P (insn))
1977 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1978 else
1979 flags = get_jump_flags (insn, NULL_RTX);
1981 if ((trial = next_active_insn (insn))
1982 && JUMP_P (trial)
1983 && simplejump_p (trial)
1984 && eligible_for_delay (insn, slots_filled, trial, flags)
1985 && no_labels_between_p (insn, trial)
1986 && ! can_throw_internal (trial))
1988 rtx *tmp;
1989 slots_filled++;
1990 delay_list = add_to_delay_list (trial, delay_list);
1992 /* TRIAL may have had its delay slot filled, then unfilled. When
1993 the delay slot is unfilled, TRIAL is placed back on the unfilled
1994 slots obstack. Unfortunately, it is placed on the end of the
1995 obstack, not in its original location. Therefore, we must search
1996 from entry i + 1 to the end of the unfilled slots obstack to
1997 try and find TRIAL. */
1998 tmp = &unfilled_slots_base[i + 1];
1999 while (*tmp != trial && tmp != unfilled_slots_next)
2000 tmp++;
2002 /* Remove the unconditional jump from consideration for delay slot
2003 filling and unthread it. */
2004 if (*tmp == trial)
2005 *tmp = 0;
2007 rtx next = NEXT_INSN (trial);
2008 rtx prev = PREV_INSN (trial);
2009 if (prev)
2010 NEXT_INSN (prev) = next;
2011 if (next)
2012 PREV_INSN (next) = prev;
2016 /* Now, scan backwards from the insn to search for a potential
2017 delay-slot candidate. Stop searching when a label or jump is hit.
2019 For each candidate, if it is to go into the delay slot (moved
2020 forward in execution sequence), it must not need or set any resources
2021 that were set by later insns and must not set any resources that
2022 are needed for those insns.
2024 The delay slot insn itself sets resources unless it is a call
2025 (in which case the called routine, not the insn itself, is doing
2026 the setting). */
2028 if (slots_filled < slots_to_fill)
2030 CLEAR_RESOURCE (&needed);
2031 CLEAR_RESOURCE (&set);
2032 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2033 mark_referenced_resources (insn, &needed, false);
2035 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2036 trial = next_trial)
2038 next_trial = prev_nonnote_insn (trial);
2040 /* This must be an INSN or CALL_INSN. */
2041 pat = PATTERN (trial);
2043 /* Stand-alone USE and CLOBBER are just for flow. */
2044 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2045 continue;
2047 /* Check for resource conflict first, to avoid unnecessary
2048 splitting. */
2049 if (! insn_references_resource_p (trial, &set, true)
2050 && ! insn_sets_resource_p (trial, &set, true)
2051 && ! insn_sets_resource_p (trial, &needed, true)
2052 #ifdef HAVE_cc0
2053 /* Can't separate set of cc0 from its use. */
2054 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2055 #endif
2056 && ! can_throw_internal (trial))
2058 trial = try_split (pat, trial, 1);
2059 next_trial = prev_nonnote_insn (trial);
2060 if (eligible_for_delay (insn, slots_filled, trial, flags))
2062 /* In this case, we are searching backward, so if we
2063 find insns to put on the delay list, we want
2064 to put them at the head, rather than the
2065 tail, of the list. */
2067 update_reg_dead_notes (trial, insn);
2068 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2069 trial, delay_list);
2070 update_block (trial, trial);
2071 delete_related_insns (trial);
2072 if (slots_to_fill == ++slots_filled)
2073 break;
2074 continue;
2078 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2079 mark_referenced_resources (trial, &needed, true);
2083 /* If all needed slots haven't been filled, we come here. */
2085 /* Try to optimize case of jumping around a single insn. */
2086 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2087 if (slots_filled != slots_to_fill
2088 && delay_list == 0
2089 && JUMP_P (insn)
2090 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2091 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2093 delay_list = optimize_skip (insn);
2094 if (delay_list)
2095 slots_filled += 1;
2097 #endif
2099 /* Try to get insns from beyond the insn needing the delay slot.
2100 These insns can neither set or reference resources set in insns being
2101 skipped, cannot set resources in the insn being skipped, and, if this
2102 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2103 call might not return).
2105 There used to be code which continued past the target label if
2106 we saw all uses of the target label. This code did not work,
2107 because it failed to account for some instructions which were
2108 both annulled and marked as from the target. This can happen as a
2109 result of optimize_skip. Since this code was redundant with
2110 fill_eager_delay_slots anyways, it was just deleted. */
2112 if (slots_filled != slots_to_fill
2113 /* If this instruction could throw an exception which is
2114 caught in the same function, then it's not safe to fill
2115 the delay slot with an instruction from beyond this
2116 point. For example, consider:
2118 int i = 2;
2120 try {
2121 f();
2122 i = 3;
2123 } catch (...) {}
2125 return i;
2127 Even though `i' is a local variable, we must be sure not
2128 to put `i = 3' in the delay slot if `f' might throw an
2129 exception.
2131 Presumably, we should also check to see if we could get
2132 back to this function via `setjmp'. */
2133 && ! can_throw_internal (insn)
2134 && !JUMP_P (insn))
2136 int maybe_never = 0;
2137 rtx pat, trial_delay;
2139 CLEAR_RESOURCE (&needed);
2140 CLEAR_RESOURCE (&set);
2141 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2142 mark_referenced_resources (insn, &needed, true);
2144 if (CALL_P (insn))
2145 maybe_never = 1;
2147 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2148 trial = next_trial)
2150 next_trial = next_nonnote_insn (trial);
2152 /* This must be an INSN or CALL_INSN. */
2153 pat = PATTERN (trial);
2155 /* Stand-alone USE and CLOBBER are just for flow. */
2156 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2157 continue;
2159 /* If this already has filled delay slots, get the insn needing
2160 the delay slots. */
2161 if (GET_CODE (pat) == SEQUENCE)
2162 trial_delay = XVECEXP (pat, 0, 0);
2163 else
2164 trial_delay = trial;
2166 /* Stop our search when seeing a jump. */
2167 if (JUMP_P (trial_delay))
2168 break;
2170 /* See if we have a resource problem before we try to
2171 split. */
2172 if (GET_CODE (pat) != SEQUENCE
2173 && ! insn_references_resource_p (trial, &set, true)
2174 && ! insn_sets_resource_p (trial, &set, true)
2175 && ! insn_sets_resource_p (trial, &needed, true)
2176 #ifdef HAVE_cc0
2177 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2178 #endif
2179 && ! (maybe_never && may_trap_or_fault_p (pat))
2180 && (trial = try_split (pat, trial, 0))
2181 && eligible_for_delay (insn, slots_filled, trial, flags)
2182 && ! can_throw_internal(trial))
2184 next_trial = next_nonnote_insn (trial);
2185 delay_list = add_to_delay_list (trial, delay_list);
2187 #ifdef HAVE_cc0
2188 if (reg_mentioned_p (cc0_rtx, pat))
2189 link_cc0_insns (trial);
2190 #endif
2192 delete_related_insns (trial);
2193 if (slots_to_fill == ++slots_filled)
2194 break;
2195 continue;
2198 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2199 mark_referenced_resources (trial, &needed, true);
2201 /* Ensure we don't put insns between the setting of cc and the
2202 comparison by moving a setting of cc into an earlier delay
2203 slot since these insns could clobber the condition code. */
2204 set.cc = 1;
2206 /* If this is a call, we might not get here. */
2207 if (CALL_P (trial_delay))
2208 maybe_never = 1;
2211 /* If there are slots left to fill and our search was stopped by an
2212 unconditional branch, try the insn at the branch target. We can
2213 redirect the branch if it works.
2215 Don't do this if the insn at the branch target is a branch. */
2216 if (slots_to_fill != slots_filled
2217 && trial
2218 && jump_to_label_p (trial)
2219 && simplejump_p (trial)
2220 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2221 && ! (NONJUMP_INSN_P (next_trial)
2222 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2223 && !JUMP_P (next_trial)
2224 && ! insn_references_resource_p (next_trial, &set, true)
2225 && ! insn_sets_resource_p (next_trial, &set, true)
2226 && ! insn_sets_resource_p (next_trial, &needed, true)
2227 #ifdef HAVE_cc0
2228 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2229 #endif
2230 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2231 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2232 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2233 && ! can_throw_internal (trial))
2235 /* See comment in relax_delay_slots about necessity of using
2236 next_real_insn here. */
2237 rtx new_label = next_real_insn (next_trial);
2239 if (new_label != 0)
2240 new_label = get_label_before (new_label);
2241 else
2242 new_label = find_end_label (simple_return_rtx);
2244 if (new_label)
2246 delay_list
2247 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2248 delay_list);
2249 slots_filled++;
2250 reorg_redirect_jump (trial, new_label);
2255 /* If this is an unconditional jump, then try to get insns from the
2256 target of the jump. */
2257 if (JUMP_P (insn)
2258 && simplejump_p (insn)
2259 && slots_filled != slots_to_fill)
2260 delay_list
2261 = fill_slots_from_thread (insn, const_true_rtx,
2262 next_active_insn (JUMP_LABEL (insn)),
2263 NULL, 1, 1,
2264 own_thread_p (JUMP_LABEL (insn),
2265 JUMP_LABEL (insn), 0),
2266 slots_to_fill, &slots_filled,
2267 delay_list);
2269 if (delay_list)
2270 unfilled_slots_base[i]
2271 = emit_delay_sequence (insn, delay_list, slots_filled);
2273 if (slots_to_fill == slots_filled)
2274 unfilled_slots_base[i] = 0;
2276 note_delay_statistics (slots_filled, 0);
2280 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2281 return the ultimate label reached by any such chain of jumps.
2282 Return a suitable return rtx if the chain ultimately leads to a
2283 return instruction.
2284 If LABEL is not followed by a jump, return LABEL.
2285 If the chain loops or we can't find end, return LABEL,
2286 since that tells caller to avoid changing the insn.
2287 If the returned label is obtained by following a REG_CROSSING_JUMP
2288 jump, set *CROSSING to true, otherwise set it to false. */
2290 static rtx
2291 follow_jumps (rtx label, rtx jump, bool *crossing)
2293 rtx insn;
2294 rtx next;
2295 rtx value = label;
2296 int depth;
2298 *crossing = false;
2299 if (ANY_RETURN_P (label))
2300 return label;
2301 for (depth = 0;
2302 (depth < 10
2303 && (insn = next_active_insn (value)) != 0
2304 && JUMP_P (insn)
2305 && JUMP_LABEL (insn) != NULL_RTX
2306 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2307 || ANY_RETURN_P (PATTERN (insn)))
2308 && (next = NEXT_INSN (insn))
2309 && BARRIER_P (next));
2310 depth++)
2312 rtx this_label = JUMP_LABEL (insn);
2313 rtx tem;
2315 /* If we have found a cycle, make the insn jump to itself. */
2316 if (this_label == label)
2317 return label;
2318 if (ANY_RETURN_P (this_label))
2319 return this_label;
2320 tem = next_active_insn (this_label);
2321 if (tem && JUMP_TABLE_DATA_P (tem))
2322 break;
2324 if (!targetm.can_follow_jump (jump, insn))
2325 break;
2326 if (!*crossing)
2327 *crossing
2328 = find_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX) != NULL_RTX;
2329 value = this_label;
2331 if (depth == 10)
2332 return label;
2333 return value;
2336 /* Try to find insns to place in delay slots.
2338 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2339 or is an unconditional branch if CONDITION is const_true_rtx.
2340 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2342 THREAD is a flow-of-control, either the insns to be executed if the
2343 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2345 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2346 to see if any potential delay slot insns set things needed there.
2348 LIKELY is nonzero if it is extremely likely that the branch will be
2349 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2350 end of a loop back up to the top.
2352 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2353 thread. I.e., it is the fallthrough code of our jump or the target of the
2354 jump when we are the only jump going there.
2356 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2357 case, we can only take insns from the head of the thread for our delay
2358 slot. We then adjust the jump to point after the insns we have taken. */
2360 static rtx
2361 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2362 rtx opposite_thread, int likely, int thread_if_true,
2363 int own_thread, int slots_to_fill,
2364 int *pslots_filled, rtx delay_list)
2366 rtx new_thread;
2367 struct resources opposite_needed, set, needed;
2368 rtx trial;
2369 int lose = 0;
2370 int must_annul = 0;
2371 int flags;
2373 /* Validate our arguments. */
2374 gcc_assert(condition != const_true_rtx || thread_if_true);
2375 gcc_assert(own_thread || thread_if_true);
2377 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2379 /* If our thread is the end of subroutine, we can't get any delay
2380 insns from that. */
2381 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2382 return delay_list;
2384 /* If this is an unconditional branch, nothing is needed at the
2385 opposite thread. Otherwise, compute what is needed there. */
2386 if (condition == const_true_rtx)
2387 CLEAR_RESOURCE (&opposite_needed);
2388 else
2389 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2391 /* If the insn at THREAD can be split, do it here to avoid having to
2392 update THREAD and NEW_THREAD if it is done in the loop below. Also
2393 initialize NEW_THREAD. */
2395 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2397 /* Scan insns at THREAD. We are looking for an insn that can be removed
2398 from THREAD (it neither sets nor references resources that were set
2399 ahead of it and it doesn't set anything needs by the insns ahead of
2400 it) and that either can be placed in an annulling insn or aren't
2401 needed at OPPOSITE_THREAD. */
2403 CLEAR_RESOURCE (&needed);
2404 CLEAR_RESOURCE (&set);
2406 /* If we do not own this thread, we must stop as soon as we find
2407 something that we can't put in a delay slot, since all we can do
2408 is branch into THREAD at a later point. Therefore, labels stop
2409 the search if this is not the `true' thread. */
2411 for (trial = thread;
2412 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2413 trial = next_nonnote_insn (trial))
2415 rtx pat, old_trial;
2417 /* If we have passed a label, we no longer own this thread. */
2418 if (LABEL_P (trial))
2420 own_thread = 0;
2421 continue;
2424 pat = PATTERN (trial);
2425 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2426 continue;
2428 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2429 don't separate or copy insns that set and use CC0. */
2430 if (! insn_references_resource_p (trial, &set, true)
2431 && ! insn_sets_resource_p (trial, &set, true)
2432 && ! insn_sets_resource_p (trial, &needed, true)
2433 #ifdef HAVE_cc0
2434 && ! (reg_mentioned_p (cc0_rtx, pat)
2435 && (! own_thread || ! sets_cc0_p (pat)))
2436 #endif
2437 && ! can_throw_internal (trial))
2439 rtx prior_insn;
2441 /* If TRIAL is redundant with some insn before INSN, we don't
2442 actually need to add it to the delay list; we can merely pretend
2443 we did. */
2444 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2446 fix_reg_dead_note (prior_insn, insn);
2447 if (own_thread)
2449 update_block (trial, thread);
2450 if (trial == thread)
2452 thread = next_active_insn (thread);
2453 if (new_thread == trial)
2454 new_thread = thread;
2457 delete_related_insns (trial);
2459 else
2461 update_reg_unused_notes (prior_insn, trial);
2462 new_thread = next_active_insn (trial);
2465 continue;
2468 /* There are two ways we can win: If TRIAL doesn't set anything
2469 needed at the opposite thread and can't trap, or if it can
2470 go into an annulled delay slot. */
2471 if (!must_annul
2472 && (condition == const_true_rtx
2473 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2474 && ! may_trap_or_fault_p (pat)
2475 && ! RTX_FRAME_RELATED_P (trial))))
2477 old_trial = trial;
2478 trial = try_split (pat, trial, 0);
2479 if (new_thread == old_trial)
2480 new_thread = trial;
2481 if (thread == old_trial)
2482 thread = trial;
2483 pat = PATTERN (trial);
2484 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2485 goto winner;
2487 else if (0
2488 #ifdef ANNUL_IFTRUE_SLOTS
2489 || ! thread_if_true
2490 #endif
2491 #ifdef ANNUL_IFFALSE_SLOTS
2492 || thread_if_true
2493 #endif
2496 old_trial = trial;
2497 trial = try_split (pat, trial, 0);
2498 if (new_thread == old_trial)
2499 new_thread = trial;
2500 if (thread == old_trial)
2501 thread = trial;
2502 pat = PATTERN (trial);
2503 if ((must_annul || delay_list == NULL) && (thread_if_true
2504 ? check_annul_list_true_false (0, delay_list)
2505 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2506 : check_annul_list_true_false (1, delay_list)
2507 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2509 rtx temp;
2511 must_annul = 1;
2512 winner:
2514 #ifdef HAVE_cc0
2515 if (reg_mentioned_p (cc0_rtx, pat))
2516 link_cc0_insns (trial);
2517 #endif
2519 /* If we own this thread, delete the insn. If this is the
2520 destination of a branch, show that a basic block status
2521 may have been updated. In any case, mark the new
2522 starting point of this thread. */
2523 if (own_thread)
2525 rtx note;
2527 update_block (trial, thread);
2528 if (trial == thread)
2530 thread = next_active_insn (thread);
2531 if (new_thread == trial)
2532 new_thread = thread;
2535 /* We are moving this insn, not deleting it. We must
2536 temporarily increment the use count on any referenced
2537 label lest it be deleted by delete_related_insns. */
2538 for (note = REG_NOTES (trial);
2539 note != NULL_RTX;
2540 note = XEXP (note, 1))
2541 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2542 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2544 /* REG_LABEL_OPERAND could be
2545 NOTE_INSN_DELETED_LABEL too. */
2546 if (LABEL_P (XEXP (note, 0)))
2547 LABEL_NUSES (XEXP (note, 0))++;
2548 else
2549 gcc_assert (REG_NOTE_KIND (note)
2550 == REG_LABEL_OPERAND);
2552 if (jump_to_label_p (trial))
2553 LABEL_NUSES (JUMP_LABEL (trial))++;
2555 delete_related_insns (trial);
2557 for (note = REG_NOTES (trial);
2558 note != NULL_RTX;
2559 note = XEXP (note, 1))
2560 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2561 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2563 /* REG_LABEL_OPERAND could be
2564 NOTE_INSN_DELETED_LABEL too. */
2565 if (LABEL_P (XEXP (note, 0)))
2566 LABEL_NUSES (XEXP (note, 0))--;
2567 else
2568 gcc_assert (REG_NOTE_KIND (note)
2569 == REG_LABEL_OPERAND);
2571 if (jump_to_label_p (trial))
2572 LABEL_NUSES (JUMP_LABEL (trial))--;
2574 else
2575 new_thread = next_active_insn (trial);
2577 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2578 if (thread_if_true)
2579 INSN_FROM_TARGET_P (temp) = 1;
2581 delay_list = add_to_delay_list (temp, delay_list);
2583 if (slots_to_fill == ++(*pslots_filled))
2585 /* Even though we have filled all the slots, we
2586 may be branching to a location that has a
2587 redundant insn. Skip any if so. */
2588 while (new_thread && ! own_thread
2589 && ! insn_sets_resource_p (new_thread, &set, true)
2590 && ! insn_sets_resource_p (new_thread, &needed,
2591 true)
2592 && ! insn_references_resource_p (new_thread,
2593 &set, true)
2594 && (prior_insn
2595 = redundant_insn (new_thread, insn,
2596 delay_list)))
2598 /* We know we do not own the thread, so no need
2599 to call update_block and delete_insn. */
2600 fix_reg_dead_note (prior_insn, insn);
2601 update_reg_unused_notes (prior_insn, new_thread);
2602 new_thread = next_active_insn (new_thread);
2604 break;
2607 continue;
2612 /* This insn can't go into a delay slot. */
2613 lose = 1;
2614 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2615 mark_referenced_resources (trial, &needed, true);
2617 /* Ensure we don't put insns between the setting of cc and the comparison
2618 by moving a setting of cc into an earlier delay slot since these insns
2619 could clobber the condition code. */
2620 set.cc = 1;
2622 /* If this insn is a register-register copy and the next insn has
2623 a use of our destination, change it to use our source. That way,
2624 it will become a candidate for our delay slot the next time
2625 through this loop. This case occurs commonly in loops that
2626 scan a list.
2628 We could check for more complex cases than those tested below,
2629 but it doesn't seem worth it. It might also be a good idea to try
2630 to swap the two insns. That might do better.
2632 We can't do this if the next insn modifies our destination, because
2633 that would make the replacement into the insn invalid. We also can't
2634 do this if it modifies our source, because it might be an earlyclobber
2635 operand. This latter test also prevents updating the contents of
2636 a PRE_INC. We also can't do this if there's overlap of source and
2637 destination. Overlap may happen for larger-than-register-size modes. */
2639 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2640 && REG_P (SET_SRC (pat))
2641 && REG_P (SET_DEST (pat))
2642 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2644 rtx next = next_nonnote_insn (trial);
2646 if (next && NONJUMP_INSN_P (next)
2647 && GET_CODE (PATTERN (next)) != USE
2648 && ! reg_set_p (SET_DEST (pat), next)
2649 && ! reg_set_p (SET_SRC (pat), next)
2650 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2651 && ! modified_in_p (SET_DEST (pat), next))
2652 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2656 /* If we stopped on a branch insn that has delay slots, see if we can
2657 steal some of the insns in those slots. */
2658 if (trial && NONJUMP_INSN_P (trial)
2659 && GET_CODE (PATTERN (trial)) == SEQUENCE
2660 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2662 /* If this is the `true' thread, we will want to follow the jump,
2663 so we can only do this if we have taken everything up to here. */
2664 if (thread_if_true && trial == new_thread)
2666 delay_list
2667 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2668 delay_list, &set, &needed,
2669 &opposite_needed, slots_to_fill,
2670 pslots_filled, &must_annul,
2671 &new_thread);
2672 /* If we owned the thread and are told that it branched
2673 elsewhere, make sure we own the thread at the new location. */
2674 if (own_thread && trial != new_thread)
2675 own_thread = own_thread_p (new_thread, new_thread, 0);
2677 else if (! thread_if_true)
2678 delay_list
2679 = steal_delay_list_from_fallthrough (insn, condition,
2680 PATTERN (trial),
2681 delay_list, &set, &needed,
2682 &opposite_needed, slots_to_fill,
2683 pslots_filled, &must_annul);
2686 /* If we haven't found anything for this delay slot and it is very
2687 likely that the branch will be taken, see if the insn at our target
2688 increments or decrements a register with an increment that does not
2689 depend on the destination register. If so, try to place the opposite
2690 arithmetic insn after the jump insn and put the arithmetic insn in the
2691 delay slot. If we can't do this, return. */
2692 if (delay_list == 0 && likely
2693 && new_thread && !ANY_RETURN_P (new_thread)
2694 && NONJUMP_INSN_P (new_thread)
2695 && !RTX_FRAME_RELATED_P (new_thread)
2696 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2697 && asm_noperands (PATTERN (new_thread)) < 0)
2699 rtx pat = PATTERN (new_thread);
2700 rtx dest;
2701 rtx src;
2703 trial = new_thread;
2704 pat = PATTERN (trial);
2706 if (!NONJUMP_INSN_P (trial)
2707 || GET_CODE (pat) != SET
2708 || ! eligible_for_delay (insn, 0, trial, flags)
2709 || can_throw_internal (trial))
2710 return 0;
2712 dest = SET_DEST (pat), src = SET_SRC (pat);
2713 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2714 && rtx_equal_p (XEXP (src, 0), dest)
2715 && (!FLOAT_MODE_P (GET_MODE (src))
2716 || flag_unsafe_math_optimizations)
2717 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2718 && ! side_effects_p (pat))
2720 rtx other = XEXP (src, 1);
2721 rtx new_arith;
2722 rtx ninsn;
2724 /* If this is a constant adjustment, use the same code with
2725 the negated constant. Otherwise, reverse the sense of the
2726 arithmetic. */
2727 if (CONST_INT_P (other))
2728 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2729 negate_rtx (GET_MODE (src), other));
2730 else
2731 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2732 GET_MODE (src), dest, other);
2734 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2735 insn);
2737 if (recog_memoized (ninsn) < 0
2738 || (extract_insn (ninsn), ! constrain_operands (1)))
2740 delete_related_insns (ninsn);
2741 return 0;
2744 if (own_thread)
2746 update_block (trial, thread);
2747 if (trial == thread)
2749 thread = next_active_insn (thread);
2750 if (new_thread == trial)
2751 new_thread = thread;
2753 delete_related_insns (trial);
2755 else
2756 new_thread = next_active_insn (trial);
2758 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2759 if (thread_if_true)
2760 INSN_FROM_TARGET_P (ninsn) = 1;
2762 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2763 (*pslots_filled)++;
2767 if (delay_list && must_annul)
2768 INSN_ANNULLED_BRANCH_P (insn) = 1;
2770 /* If we are to branch into the middle of this thread, find an appropriate
2771 label or make a new one if none, and redirect INSN to it. If we hit the
2772 end of the function, use the end-of-function label. */
2773 if (new_thread != thread)
2775 rtx label;
2776 bool crossing = false;
2778 gcc_assert (thread_if_true);
2780 if (new_thread && simplejump_or_return_p (new_thread)
2781 && redirect_with_delay_list_safe_p (insn,
2782 JUMP_LABEL (new_thread),
2783 delay_list))
2784 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
2786 if (ANY_RETURN_P (new_thread))
2787 label = find_end_label (new_thread);
2788 else if (LABEL_P (new_thread))
2789 label = new_thread;
2790 else
2791 label = get_label_before (new_thread);
2793 if (label)
2795 reorg_redirect_jump (insn, label);
2796 if (crossing)
2797 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
2801 return delay_list;
2804 /* Make another attempt to find insns to place in delay slots.
2806 We previously looked for insns located in front of the delay insn
2807 and, for non-jump delay insns, located behind the delay insn.
2809 Here only try to schedule jump insns and try to move insns from either
2810 the target or the following insns into the delay slot. If annulling is
2811 supported, we will be likely to do this. Otherwise, we can do this only
2812 if safe. */
2814 static void
2815 fill_eager_delay_slots (void)
2817 rtx insn;
2818 int i;
2819 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2821 for (i = 0; i < num_unfilled_slots; i++)
2823 rtx condition;
2824 rtx target_label, insn_at_target, fallthrough_insn;
2825 rtx delay_list = 0;
2826 int own_target;
2827 int own_fallthrough;
2828 int prediction, slots_to_fill, slots_filled;
2830 insn = unfilled_slots_base[i];
2831 if (insn == 0
2832 || INSN_DELETED_P (insn)
2833 || !JUMP_P (insn)
2834 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2835 continue;
2837 slots_to_fill = num_delay_slots (insn);
2838 /* Some machine description have defined instructions to have
2839 delay slots only in certain circumstances which may depend on
2840 nearby insns (which change due to reorg's actions).
2842 For example, the PA port normally has delay slots for unconditional
2843 jumps.
2845 However, the PA port claims such jumps do not have a delay slot
2846 if they are immediate successors of certain CALL_INSNs. This
2847 allows the port to favor filling the delay slot of the call with
2848 the unconditional jump. */
2849 if (slots_to_fill == 0)
2850 continue;
2852 slots_filled = 0;
2853 target_label = JUMP_LABEL (insn);
2854 condition = get_branch_condition (insn, target_label);
2856 if (condition == 0)
2857 continue;
2859 /* Get the next active fallthrough and target insns and see if we own
2860 them. Then see whether the branch is likely true. We don't need
2861 to do a lot of this for unconditional branches. */
2863 insn_at_target = first_active_target_insn (target_label);
2864 own_target = own_thread_p (target_label, target_label, 0);
2866 if (condition == const_true_rtx)
2868 own_fallthrough = 0;
2869 fallthrough_insn = 0;
2870 prediction = 2;
2872 else
2874 fallthrough_insn = next_active_insn (insn);
2875 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2876 prediction = mostly_true_jump (insn);
2879 /* If this insn is expected to branch, first try to get insns from our
2880 target, then our fallthrough insns. If it is not expected to branch,
2881 try the other order. */
2883 if (prediction > 0)
2885 delay_list
2886 = fill_slots_from_thread (insn, condition, insn_at_target,
2887 fallthrough_insn, prediction == 2, 1,
2888 own_target,
2889 slots_to_fill, &slots_filled, delay_list);
2891 if (delay_list == 0 && own_fallthrough)
2893 /* Even though we didn't find anything for delay slots,
2894 we might have found a redundant insn which we deleted
2895 from the thread that was filled. So we have to recompute
2896 the next insn at the target. */
2897 target_label = JUMP_LABEL (insn);
2898 insn_at_target = first_active_target_insn (target_label);
2900 delay_list
2901 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2902 insn_at_target, 0, 0,
2903 own_fallthrough,
2904 slots_to_fill, &slots_filled,
2905 delay_list);
2908 else
2910 if (own_fallthrough)
2911 delay_list
2912 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2913 insn_at_target, 0, 0,
2914 own_fallthrough,
2915 slots_to_fill, &slots_filled,
2916 delay_list);
2918 if (delay_list == 0)
2919 delay_list
2920 = fill_slots_from_thread (insn, condition, insn_at_target,
2921 next_active_insn (insn), 0, 1,
2922 own_target,
2923 slots_to_fill, &slots_filled,
2924 delay_list);
2927 if (delay_list)
2928 unfilled_slots_base[i]
2929 = emit_delay_sequence (insn, delay_list, slots_filled);
2931 if (slots_to_fill == slots_filled)
2932 unfilled_slots_base[i] = 0;
2934 note_delay_statistics (slots_filled, 1);
2938 static void delete_computation (rtx insn);
2940 /* Recursively delete prior insns that compute the value (used only by INSN
2941 which the caller is deleting) stored in the register mentioned by NOTE
2942 which is a REG_DEAD note associated with INSN. */
2944 static void
2945 delete_prior_computation (rtx note, rtx insn)
2947 rtx our_prev;
2948 rtx reg = XEXP (note, 0);
2950 for (our_prev = prev_nonnote_insn (insn);
2951 our_prev && (NONJUMP_INSN_P (our_prev)
2952 || CALL_P (our_prev));
2953 our_prev = prev_nonnote_insn (our_prev))
2955 rtx pat = PATTERN (our_prev);
2957 /* If we reach a CALL which is not calling a const function
2958 or the callee pops the arguments, then give up. */
2959 if (CALL_P (our_prev)
2960 && (! RTL_CONST_CALL_P (our_prev)
2961 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2962 break;
2964 /* If we reach a SEQUENCE, it is too complex to try to
2965 do anything with it, so give up. We can be run during
2966 and after reorg, so SEQUENCE rtl can legitimately show
2967 up here. */
2968 if (GET_CODE (pat) == SEQUENCE)
2969 break;
2971 if (GET_CODE (pat) == USE
2972 && NONJUMP_INSN_P (XEXP (pat, 0)))
2973 /* reorg creates USEs that look like this. We leave them
2974 alone because reorg needs them for its own purposes. */
2975 break;
2977 if (reg_set_p (reg, pat))
2979 if (side_effects_p (pat) && !CALL_P (our_prev))
2980 break;
2982 if (GET_CODE (pat) == PARALLEL)
2984 /* If we find a SET of something else, we can't
2985 delete the insn. */
2987 int i;
2989 for (i = 0; i < XVECLEN (pat, 0); i++)
2991 rtx part = XVECEXP (pat, 0, i);
2993 if (GET_CODE (part) == SET
2994 && SET_DEST (part) != reg)
2995 break;
2998 if (i == XVECLEN (pat, 0))
2999 delete_computation (our_prev);
3001 else if (GET_CODE (pat) == SET
3002 && REG_P (SET_DEST (pat)))
3004 int dest_regno = REGNO (SET_DEST (pat));
3005 int dest_endregno = END_REGNO (SET_DEST (pat));
3006 int regno = REGNO (reg);
3007 int endregno = END_REGNO (reg);
3009 if (dest_regno >= regno
3010 && dest_endregno <= endregno)
3011 delete_computation (our_prev);
3013 /* We may have a multi-word hard register and some, but not
3014 all, of the words of the register are needed in subsequent
3015 insns. Write REG_UNUSED notes for those parts that were not
3016 needed. */
3017 else if (dest_regno <= regno
3018 && dest_endregno >= endregno)
3020 int i;
3022 add_reg_note (our_prev, REG_UNUSED, reg);
3024 for (i = dest_regno; i < dest_endregno; i++)
3025 if (! find_regno_note (our_prev, REG_UNUSED, i))
3026 break;
3028 if (i == dest_endregno)
3029 delete_computation (our_prev);
3033 break;
3036 /* If PAT references the register that dies here, it is an
3037 additional use. Hence any prior SET isn't dead. However, this
3038 insn becomes the new place for the REG_DEAD note. */
3039 if (reg_overlap_mentioned_p (reg, pat))
3041 XEXP (note, 1) = REG_NOTES (our_prev);
3042 REG_NOTES (our_prev) = note;
3043 break;
3048 /* Delete INSN and recursively delete insns that compute values used only
3049 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3051 Look at all our REG_DEAD notes. If a previous insn does nothing other
3052 than set a register that dies in this insn, we can delete that insn
3053 as well.
3055 On machines with CC0, if CC0 is used in this insn, we may be able to
3056 delete the insn that set it. */
3058 static void
3059 delete_computation (rtx insn)
3061 rtx note, next;
3063 #ifdef HAVE_cc0
3064 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3066 rtx prev = prev_nonnote_insn (insn);
3067 /* We assume that at this stage
3068 CC's are always set explicitly
3069 and always immediately before the jump that
3070 will use them. So if the previous insn
3071 exists to set the CC's, delete it
3072 (unless it performs auto-increments, etc.). */
3073 if (prev && NONJUMP_INSN_P (prev)
3074 && sets_cc0_p (PATTERN (prev)))
3076 if (sets_cc0_p (PATTERN (prev)) > 0
3077 && ! side_effects_p (PATTERN (prev)))
3078 delete_computation (prev);
3079 else
3080 /* Otherwise, show that cc0 won't be used. */
3081 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3084 #endif
3086 for (note = REG_NOTES (insn); note; note = next)
3088 next = XEXP (note, 1);
3090 if (REG_NOTE_KIND (note) != REG_DEAD
3091 /* Verify that the REG_NOTE is legitimate. */
3092 || !REG_P (XEXP (note, 0)))
3093 continue;
3095 delete_prior_computation (note, insn);
3098 delete_related_insns (insn);
3101 /* If all INSN does is set the pc, delete it,
3102 and delete the insn that set the condition codes for it
3103 if that's what the previous thing was. */
3105 static void
3106 delete_jump (rtx insn)
3108 rtx set = single_set (insn);
3110 if (set && GET_CODE (SET_DEST (set)) == PC)
3111 delete_computation (insn);
3114 static rtx
3115 label_before_next_insn (rtx x, rtx scan_limit)
3117 rtx insn = next_active_insn (x);
3118 while (insn)
3120 insn = PREV_INSN (insn);
3121 if (insn == scan_limit || insn == NULL_RTX)
3122 return NULL_RTX;
3123 if (LABEL_P (insn))
3124 break;
3126 return insn;
3130 /* Once we have tried two ways to fill a delay slot, make a pass over the
3131 code to try to improve the results and to do such things as more jump
3132 threading. */
3134 static void
3135 relax_delay_slots (rtx first)
3137 rtx insn, next, pat;
3138 rtx trial, delay_insn, target_label;
3140 /* Look at every JUMP_INSN and see if we can improve it. */
3141 for (insn = first; insn; insn = next)
3143 rtx other;
3144 bool crossing;
3146 next = next_active_insn (insn);
3148 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3149 the next insn, or jumps to a label that is not the last of a
3150 group of consecutive labels. */
3151 if (JUMP_P (insn)
3152 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3153 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3155 target_label
3156 = skip_consecutive_labels (follow_jumps (target_label, insn,
3157 &crossing));
3158 if (ANY_RETURN_P (target_label))
3159 target_label = find_end_label (target_label);
3161 if (target_label && next_active_insn (target_label) == next
3162 && ! condjump_in_parallel_p (insn))
3164 delete_jump (insn);
3165 continue;
3168 if (target_label && target_label != JUMP_LABEL (insn))
3170 reorg_redirect_jump (insn, target_label);
3171 if (crossing)
3172 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3175 /* See if this jump conditionally branches around an unconditional
3176 jump. If so, invert this jump and point it to the target of the
3177 second jump. */
3178 if (next && simplejump_or_return_p (next)
3179 && any_condjump_p (insn)
3180 && target_label
3181 && next_active_insn (target_label) == next_active_insn (next)
3182 && no_labels_between_p (insn, next))
3184 rtx label = JUMP_LABEL (next);
3186 /* Be careful how we do this to avoid deleting code or
3187 labels that are momentarily dead. See similar optimization
3188 in jump.c.
3190 We also need to ensure we properly handle the case when
3191 invert_jump fails. */
3193 ++LABEL_NUSES (target_label);
3194 if (!ANY_RETURN_P (label))
3195 ++LABEL_NUSES (label);
3197 if (invert_jump (insn, label, 1))
3199 delete_related_insns (next);
3200 next = insn;
3203 if (!ANY_RETURN_P (label))
3204 --LABEL_NUSES (label);
3206 if (--LABEL_NUSES (target_label) == 0)
3207 delete_related_insns (target_label);
3209 continue;
3213 /* If this is an unconditional jump and the previous insn is a
3214 conditional jump, try reversing the condition of the previous
3215 insn and swapping our targets. The next pass might be able to
3216 fill the slots.
3218 Don't do this if we expect the conditional branch to be true, because
3219 we would then be making the more common case longer. */
3221 if (simplejump_or_return_p (insn)
3222 && (other = prev_active_insn (insn)) != 0
3223 && any_condjump_p (other)
3224 && no_labels_between_p (other, insn)
3225 && 0 > mostly_true_jump (other))
3227 rtx other_target = JUMP_LABEL (other);
3228 target_label = JUMP_LABEL (insn);
3230 if (invert_jump (other, target_label, 0))
3231 reorg_redirect_jump (insn, other_target);
3234 /* Now look only at cases where we have a filled delay slot. */
3235 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3236 continue;
3238 pat = PATTERN (insn);
3239 delay_insn = XVECEXP (pat, 0, 0);
3241 /* See if the first insn in the delay slot is redundant with some
3242 previous insn. Remove it from the delay slot if so; then set up
3243 to reprocess this insn. */
3244 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3246 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3247 next = prev_active_insn (next);
3248 continue;
3251 /* See if we have a RETURN insn with a filled delay slot followed
3252 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3253 the first RETURN (but not its delay insn). This gives the same
3254 effect in fewer instructions.
3256 Only do so if optimizing for size since this results in slower, but
3257 smaller code. */
3258 if (optimize_function_for_size_p (cfun)
3259 && ANY_RETURN_P (PATTERN (delay_insn))
3260 && next
3261 && JUMP_P (next)
3262 && PATTERN (next) == PATTERN (delay_insn))
3264 rtx after;
3265 int i;
3267 /* Delete the RETURN and just execute the delay list insns.
3269 We do this by deleting the INSN containing the SEQUENCE, then
3270 re-emitting the insns separately, and then deleting the RETURN.
3271 This allows the count of the jump target to be properly
3272 decremented.
3274 Note that we need to change the INSN_UID of the re-emitted insns
3275 since it is used to hash the insns for mark_target_live_regs and
3276 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3278 Clear the from target bit, since these insns are no longer
3279 in delay slots. */
3280 for (i = 0; i < XVECLEN (pat, 0); i++)
3281 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3283 trial = PREV_INSN (insn);
3284 delete_related_insns (insn);
3285 gcc_assert (GET_CODE (pat) == SEQUENCE);
3286 add_insn_after (delay_insn, trial, NULL);
3287 after = delay_insn;
3288 for (i = 1; i < XVECLEN (pat, 0); i++)
3289 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3290 delete_scheduled_jump (delay_insn);
3291 continue;
3294 /* Now look only at the cases where we have a filled JUMP_INSN. */
3295 if (!JUMP_P (delay_insn)
3296 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3297 continue;
3299 target_label = JUMP_LABEL (delay_insn);
3300 if (target_label && ANY_RETURN_P (target_label))
3301 continue;
3303 /* If this jump goes to another unconditional jump, thread it, but
3304 don't convert a jump into a RETURN here. */
3305 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3306 &crossing));
3307 if (ANY_RETURN_P (trial))
3308 trial = find_end_label (trial);
3310 if (trial && trial != target_label
3311 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3313 reorg_redirect_jump (delay_insn, trial);
3314 target_label = trial;
3315 if (crossing)
3316 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3319 /* If the first insn at TARGET_LABEL is redundant with a previous
3320 insn, redirect the jump to the following insn and process again.
3321 We use next_real_insn instead of next_active_insn so we
3322 don't skip USE-markers, or we'll end up with incorrect
3323 liveness info. */
3324 trial = next_real_insn (target_label);
3325 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3326 && redundant_insn (trial, insn, 0)
3327 && ! can_throw_internal (trial))
3329 /* Figure out where to emit the special USE insn so we don't
3330 later incorrectly compute register live/death info. */
3331 rtx tmp = next_active_insn (trial);
3332 if (tmp == 0)
3333 tmp = find_end_label (simple_return_rtx);
3335 if (tmp)
3337 /* Insert the special USE insn and update dataflow info. */
3338 update_block (trial, tmp);
3340 /* Now emit a label before the special USE insn, and
3341 redirect our jump to the new label. */
3342 target_label = get_label_before (PREV_INSN (tmp));
3343 reorg_redirect_jump (delay_insn, target_label);
3344 next = insn;
3345 continue;
3349 /* Similarly, if it is an unconditional jump with one insn in its
3350 delay list and that insn is redundant, thread the jump. */
3351 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3352 && XVECLEN (PATTERN (trial), 0) == 2
3353 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3354 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3355 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3357 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3358 if (ANY_RETURN_P (target_label))
3359 target_label = find_end_label (target_label);
3361 if (target_label
3362 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3363 insn))
3365 reorg_redirect_jump (delay_insn, target_label);
3366 next = insn;
3367 continue;
3371 /* See if we have a simple (conditional) jump that is useless. */
3372 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3373 && ! condjump_in_parallel_p (delay_insn)
3374 && prev_active_insn (target_label) == insn
3375 && ! BARRIER_P (prev_nonnote_insn (target_label))
3376 #ifdef HAVE_cc0
3377 /* If the last insn in the delay slot sets CC0 for some insn,
3378 various code assumes that it is in a delay slot. We could
3379 put it back where it belonged and delete the register notes,
3380 but it doesn't seem worthwhile in this uncommon case. */
3381 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3382 REG_CC_USER, NULL_RTX)
3383 #endif
3386 rtx after;
3387 int i;
3389 /* All this insn does is execute its delay list and jump to the
3390 following insn. So delete the jump and just execute the delay
3391 list insns.
3393 We do this by deleting the INSN containing the SEQUENCE, then
3394 re-emitting the insns separately, and then deleting the jump.
3395 This allows the count of the jump target to be properly
3396 decremented.
3398 Note that we need to change the INSN_UID of the re-emitted insns
3399 since it is used to hash the insns for mark_target_live_regs and
3400 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3402 Clear the from target bit, since these insns are no longer
3403 in delay slots. */
3404 for (i = 0; i < XVECLEN (pat, 0); i++)
3405 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3407 trial = PREV_INSN (insn);
3408 delete_related_insns (insn);
3409 gcc_assert (GET_CODE (pat) == SEQUENCE);
3410 add_insn_after (delay_insn, trial, NULL);
3411 after = delay_insn;
3412 for (i = 1; i < XVECLEN (pat, 0); i++)
3413 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3414 delete_scheduled_jump (delay_insn);
3415 continue;
3418 /* See if this is an unconditional jump around a single insn which is
3419 identical to the one in its delay slot. In this case, we can just
3420 delete the branch and the insn in its delay slot. */
3421 if (next && NONJUMP_INSN_P (next)
3422 && label_before_next_insn (next, insn) == target_label
3423 && simplejump_p (insn)
3424 && XVECLEN (pat, 0) == 2
3425 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3427 delete_related_insns (insn);
3428 continue;
3431 /* See if this jump (with its delay slots) conditionally branches
3432 around an unconditional jump (without delay slots). If so, invert
3433 this jump and point it to the target of the second jump. We cannot
3434 do this for annulled jumps, though. Again, don't convert a jump to
3435 a RETURN here. */
3436 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3437 && any_condjump_p (delay_insn)
3438 && next && simplejump_or_return_p (next)
3439 && next_active_insn (target_label) == next_active_insn (next)
3440 && no_labels_between_p (insn, next))
3442 rtx label = JUMP_LABEL (next);
3443 rtx old_label = JUMP_LABEL (delay_insn);
3445 if (ANY_RETURN_P (label))
3446 label = find_end_label (label);
3448 /* find_end_label can generate a new label. Check this first. */
3449 if (label
3450 && no_labels_between_p (insn, next)
3451 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3453 /* Be careful how we do this to avoid deleting code or labels
3454 that are momentarily dead. See similar optimization in
3455 jump.c */
3456 if (old_label)
3457 ++LABEL_NUSES (old_label);
3459 if (invert_jump (delay_insn, label, 1))
3461 int i;
3463 /* Must update the INSN_FROM_TARGET_P bits now that
3464 the branch is reversed, so that mark_target_live_regs
3465 will handle the delay slot insn correctly. */
3466 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3468 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3469 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3472 delete_related_insns (next);
3473 next = insn;
3476 if (old_label && --LABEL_NUSES (old_label) == 0)
3477 delete_related_insns (old_label);
3478 continue;
3482 /* If we own the thread opposite the way this insn branches, see if we
3483 can merge its delay slots with following insns. */
3484 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3485 && own_thread_p (NEXT_INSN (insn), 0, 1))
3486 try_merge_delay_insns (insn, next);
3487 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3488 && own_thread_p (target_label, target_label, 0))
3489 try_merge_delay_insns (insn, next_active_insn (target_label));
3491 /* If we get here, we haven't deleted INSN. But we may have deleted
3492 NEXT, so recompute it. */
3493 next = next_active_insn (insn);
3498 /* Look for filled jumps to the end of function label. We can try to convert
3499 them into RETURN insns if the insns in the delay slot are valid for the
3500 RETURN as well. */
3502 static void
3503 make_return_insns (rtx first)
3505 rtx insn, jump_insn, pat;
3506 rtx real_return_label = function_return_label;
3507 rtx real_simple_return_label = function_simple_return_label;
3508 int slots, i;
3510 /* See if there is a RETURN insn in the function other than the one we
3511 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3512 into a RETURN to jump to it. */
3513 for (insn = first; insn; insn = NEXT_INSN (insn))
3514 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3516 rtx t = get_label_before (insn);
3517 if (PATTERN (insn) == ret_rtx)
3518 real_return_label = t;
3519 else
3520 real_simple_return_label = t;
3521 break;
3524 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3525 was equal to END_OF_FUNCTION_LABEL. */
3526 if (real_return_label)
3527 LABEL_NUSES (real_return_label)++;
3528 if (real_simple_return_label)
3529 LABEL_NUSES (real_simple_return_label)++;
3531 /* Clear the list of insns to fill so we can use it. */
3532 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3534 for (insn = first; insn; insn = NEXT_INSN (insn))
3536 int flags;
3537 rtx kind, real_label;
3539 /* Only look at filled JUMP_INSNs that go to the end of function
3540 label. */
3541 if (!NONJUMP_INSN_P (insn)
3542 || GET_CODE (PATTERN (insn)) != SEQUENCE
3543 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3544 continue;
3546 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3548 kind = ret_rtx;
3549 real_label = real_return_label;
3551 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3552 == function_simple_return_label)
3554 kind = simple_return_rtx;
3555 real_label = real_simple_return_label;
3557 else
3558 continue;
3560 pat = PATTERN (insn);
3561 jump_insn = XVECEXP (pat, 0, 0);
3563 /* If we can't make the jump into a RETURN, try to redirect it to the best
3564 RETURN and go on to the next insn. */
3565 if (!reorg_redirect_jump (jump_insn, kind))
3567 /* Make sure redirecting the jump will not invalidate the delay
3568 slot insns. */
3569 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3570 reorg_redirect_jump (jump_insn, real_label);
3571 continue;
3574 /* See if this RETURN can accept the insns current in its delay slot.
3575 It can if it has more or an equal number of slots and the contents
3576 of each is valid. */
3578 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3579 slots = num_delay_slots (jump_insn);
3580 if (slots >= XVECLEN (pat, 0) - 1)
3582 for (i = 1; i < XVECLEN (pat, 0); i++)
3583 if (! (
3584 #ifdef ANNUL_IFFALSE_SLOTS
3585 (INSN_ANNULLED_BRANCH_P (jump_insn)
3586 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3587 ? eligible_for_annul_false (jump_insn, i - 1,
3588 XVECEXP (pat, 0, i), flags) :
3589 #endif
3590 #ifdef ANNUL_IFTRUE_SLOTS
3591 (INSN_ANNULLED_BRANCH_P (jump_insn)
3592 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3593 ? eligible_for_annul_true (jump_insn, i - 1,
3594 XVECEXP (pat, 0, i), flags) :
3595 #endif
3596 eligible_for_delay (jump_insn, i - 1,
3597 XVECEXP (pat, 0, i), flags)))
3598 break;
3600 else
3601 i = 0;
3603 if (i == XVECLEN (pat, 0))
3604 continue;
3606 /* We have to do something with this insn. If it is an unconditional
3607 RETURN, delete the SEQUENCE and output the individual insns,
3608 followed by the RETURN. Then set things up so we try to find
3609 insns for its delay slots, if it needs some. */
3610 if (ANY_RETURN_P (PATTERN (jump_insn)))
3612 rtx prev = PREV_INSN (insn);
3614 delete_related_insns (insn);
3615 for (i = 1; i < XVECLEN (pat, 0); i++)
3616 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3618 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3619 emit_barrier_after (insn);
3621 if (slots)
3622 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3624 else
3625 /* It is probably more efficient to keep this with its current
3626 delay slot as a branch to a RETURN. */
3627 reorg_redirect_jump (jump_insn, real_label);
3630 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3631 new delay slots we have created. */
3632 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3633 delete_related_insns (real_return_label);
3634 if (real_simple_return_label != NULL_RTX
3635 && --LABEL_NUSES (real_simple_return_label) == 0)
3636 delete_related_insns (real_simple_return_label);
3638 fill_simple_delay_slots (1);
3639 fill_simple_delay_slots (0);
3642 /* Try to find insns to place in delay slots. */
3644 void
3645 dbr_schedule (rtx first)
3647 rtx insn, next, epilogue_insn = 0;
3648 int i;
3649 bool need_return_insns;
3651 /* If the current function has no insns other than the prologue and
3652 epilogue, then do not try to fill any delay slots. */
3653 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3654 return;
3656 /* Find the highest INSN_UID and allocate and initialize our map from
3657 INSN_UID's to position in code. */
3658 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3660 if (INSN_UID (insn) > max_uid)
3661 max_uid = INSN_UID (insn);
3662 if (NOTE_P (insn)
3663 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3664 epilogue_insn = insn;
3667 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3668 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3669 uid_to_ruid[INSN_UID (insn)] = i;
3671 /* Initialize the list of insns that need filling. */
3672 if (unfilled_firstobj == 0)
3674 gcc_obstack_init (&unfilled_slots_obstack);
3675 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3678 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3680 rtx target;
3682 /* Skip vector tables. We can't get attributes for them. */
3683 if (JUMP_TABLE_DATA_P (insn))
3684 continue;
3686 if (JUMP_P (insn))
3687 INSN_ANNULLED_BRANCH_P (insn) = 0;
3688 INSN_FROM_TARGET_P (insn) = 0;
3690 if (num_delay_slots (insn) > 0)
3691 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3693 /* Ensure all jumps go to the last of a set of consecutive labels. */
3694 if (JUMP_P (insn)
3695 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3696 && !ANY_RETURN_P (JUMP_LABEL (insn))
3697 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3698 != JUMP_LABEL (insn)))
3699 redirect_jump (insn, target, 1);
3702 init_resource_info (epilogue_insn);
3704 /* Show we haven't computed an end-of-function label yet. */
3705 function_return_label = function_simple_return_label = NULL_RTX;
3707 /* Initialize the statistics for this function. */
3708 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3709 memset (num_filled_delays, 0, sizeof num_filled_delays);
3711 /* Now do the delay slot filling. Try everything twice in case earlier
3712 changes make more slots fillable. */
3714 for (reorg_pass_number = 0;
3715 reorg_pass_number < MAX_REORG_PASSES;
3716 reorg_pass_number++)
3718 fill_simple_delay_slots (1);
3719 fill_simple_delay_slots (0);
3720 fill_eager_delay_slots ();
3721 relax_delay_slots (first);
3724 /* If we made an end of function label, indicate that it is now
3725 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3726 If it is now unused, delete it. */
3727 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3728 delete_related_insns (function_return_label);
3729 if (function_simple_return_label
3730 && --LABEL_NUSES (function_simple_return_label) == 0)
3731 delete_related_insns (function_simple_return_label);
3733 need_return_insns = false;
3734 #ifdef HAVE_return
3735 need_return_insns |= HAVE_return && function_return_label != 0;
3736 #endif
3737 #ifdef HAVE_simple_return
3738 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3739 #endif
3740 if (need_return_insns)
3741 make_return_insns (first);
3743 /* Delete any USE insns made by update_block; subsequent passes don't need
3744 them or know how to deal with them. */
3745 for (insn = first; insn; insn = next)
3747 next = NEXT_INSN (insn);
3749 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3750 && INSN_P (XEXP (PATTERN (insn), 0)))
3751 next = delete_related_insns (insn);
3754 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3756 /* It is not clear why the line below is needed, but it does seem to be. */
3757 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3759 if (dump_file)
3761 int i, j, need_comma;
3762 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3763 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3765 for (reorg_pass_number = 0;
3766 reorg_pass_number < MAX_REORG_PASSES;
3767 reorg_pass_number++)
3769 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3770 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3772 need_comma = 0;
3773 fprintf (dump_file, ";; Reorg function #%d\n", i);
3775 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3776 num_insns_needing_delays[i][reorg_pass_number]);
3778 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3779 if (num_filled_delays[i][j][reorg_pass_number])
3781 if (need_comma)
3782 fprintf (dump_file, ", ");
3783 need_comma = 1;
3784 fprintf (dump_file, "%d got %d delays",
3785 num_filled_delays[i][j][reorg_pass_number], j);
3787 fprintf (dump_file, "\n");
3790 memset (total_delay_slots, 0, sizeof total_delay_slots);
3791 memset (total_annul_slots, 0, sizeof total_annul_slots);
3792 for (insn = first; insn; insn = NEXT_INSN (insn))
3794 if (! INSN_DELETED_P (insn)
3795 && NONJUMP_INSN_P (insn)
3796 && GET_CODE (PATTERN (insn)) != USE
3797 && GET_CODE (PATTERN (insn)) != CLOBBER)
3799 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3801 rtx control;
3802 j = XVECLEN (PATTERN (insn), 0) - 1;
3803 if (j > MAX_DELAY_HISTOGRAM)
3804 j = MAX_DELAY_HISTOGRAM;
3805 control = XVECEXP (PATTERN (insn), 0, 0);
3806 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3807 total_annul_slots[j]++;
3808 else
3809 total_delay_slots[j]++;
3811 else if (num_delay_slots (insn) > 0)
3812 total_delay_slots[0]++;
3815 fprintf (dump_file, ";; Reorg totals: ");
3816 need_comma = 0;
3817 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3819 if (total_delay_slots[j])
3821 if (need_comma)
3822 fprintf (dump_file, ", ");
3823 need_comma = 1;
3824 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3827 fprintf (dump_file, "\n");
3828 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3829 fprintf (dump_file, ";; Reorg annuls: ");
3830 need_comma = 0;
3831 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3833 if (total_annul_slots[j])
3835 if (need_comma)
3836 fprintf (dump_file, ", ");
3837 need_comma = 1;
3838 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3841 fprintf (dump_file, "\n");
3842 #endif
3843 fprintf (dump_file, "\n");
3846 free_resource_info ();
3847 free (uid_to_ruid);
3848 crtl->dbr_scheduled_p = true;
3850 #endif /* DELAY_SLOTS */
3852 static bool
3853 gate_handle_delay_slots (void)
3855 #ifdef DELAY_SLOTS
3856 /* At -O0 dataflow info isn't updated after RA. */
3857 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3858 #else
3859 return 0;
3860 #endif
3863 /* Run delay slot optimization. */
3864 static unsigned int
3865 rest_of_handle_delay_slots (void)
3867 #ifdef DELAY_SLOTS
3868 dbr_schedule (get_insns ());
3869 #endif
3870 return 0;
3873 struct rtl_opt_pass pass_delay_slots =
3876 RTL_PASS,
3877 "dbr", /* name */
3878 OPTGROUP_NONE, /* optinfo_flags */
3879 gate_handle_delay_slots, /* gate */
3880 rest_of_handle_delay_slots, /* execute */
3881 NULL, /* sub */
3882 NULL, /* next */
3883 0, /* static_pass_number */
3884 TV_DBR_SCHED, /* tv_id */
3885 0, /* properties_required */
3886 0, /* properties_provided */
3887 0, /* properties_destroyed */
3888 0, /* todo_flags_start */
3889 TODO_ggc_collect /* todo_flags_finish */
3893 /* Machine dependent reorg pass. */
3894 static bool
3895 gate_handle_machine_reorg (void)
3897 return targetm.machine_dependent_reorg != 0;
3901 static unsigned int
3902 rest_of_handle_machine_reorg (void)
3904 targetm.machine_dependent_reorg ();
3905 return 0;
3908 struct rtl_opt_pass pass_machine_reorg =
3911 RTL_PASS,
3912 "mach", /* name */
3913 OPTGROUP_NONE, /* optinfo_flags */
3914 gate_handle_machine_reorg, /* gate */
3915 rest_of_handle_machine_reorg, /* execute */
3916 NULL, /* sub */
3917 NULL, /* next */
3918 0, /* static_pass_number */
3919 TV_MACH_DEP, /* tv_id */
3920 0, /* properties_required */
3921 0, /* properties_provided */
3922 0, /* properties_destroyed */
3923 0, /* todo_flags_start */
3924 TODO_ggc_collect /* todo_flags_finish */