* config/xtensa/xtensa.h (ASM_OUTPUT_POOL_PROLOGUE): Emit a
[official-gcc.git] / gcc / resource.c
blobf306abb304ef467d0430410eedcb7fb3a599f439
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
35 #include "params.h"
37 /* This structure is used to record liveness information at the targets or
38 fallthrough insns of branches. We will most likely need the information
39 at targets again, so save them in a hash table rather than recomputing them
40 each time. */
42 struct target_info
44 int uid; /* INSN_UID of target. */
45 struct target_info *next; /* Next info for same hash bucket. */
46 HARD_REG_SET live_regs; /* Registers live at target. */
47 int block; /* Basic block number containing target. */
48 int bb_tick; /* Generation count of basic block info. */
51 #define TARGET_HASH_PRIME 257
53 /* Indicates what resources are required at the beginning of the epilogue. */
54 static struct resources start_of_epilogue_needs;
56 /* Indicates what resources are required at function end. */
57 static struct resources end_of_function_needs;
59 /* Define the hash table itself. */
60 static struct target_info **target_hash_table = NULL;
62 /* For each basic block, we maintain a generation number of its basic
63 block info, which is updated each time we move an insn from the
64 target of a jump. This is the generation number indexed by block
65 number. */
67 static int *bb_ticks;
69 /* Marks registers possibly live at the current place being scanned by
70 mark_target_live_regs. Also used by update_live_status. */
72 static HARD_REG_SET current_live_regs;
74 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
75 Also only used by the next two functions. */
77 static HARD_REG_SET pending_dead_regs;
79 static void update_live_status PARAMS ((rtx, rtx, void *));
80 static int find_basic_block PARAMS ((rtx, int));
81 static rtx next_insn_no_annul PARAMS ((rtx));
82 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
83 rtx*, int, struct resources,
84 struct resources));
86 /* Utility function called from mark_target_live_regs via note_stores.
87 It deadens any CLOBBERed registers and livens any SET registers. */
89 static void
90 update_live_status (dest, x, data)
91 rtx dest;
92 rtx x;
93 void *data ATTRIBUTE_UNUSED;
95 int first_regno, last_regno;
96 int i;
98 if (GET_CODE (dest) != REG
99 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
100 return;
102 if (GET_CODE (dest) == SUBREG)
103 first_regno = subreg_regno (dest);
104 else
105 first_regno = REGNO (dest);
107 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
109 if (GET_CODE (x) == CLOBBER)
110 for (i = first_regno; i < last_regno; i++)
111 CLEAR_HARD_REG_BIT (current_live_regs, i);
112 else
113 for (i = first_regno; i < last_regno; i++)
115 SET_HARD_REG_BIT (current_live_regs, i);
116 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
120 /* Find the number of the basic block with correct live register
121 information that starts closest to INSN. Return -1 if we couldn't
122 find such a basic block or the beginning is more than
123 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
124 an unlimited search.
126 The delay slot filling code destroys the control-flow graph so,
127 instead of finding the basic block containing INSN, we search
128 backwards toward a BARRIER where the live register information is
129 correct. */
131 static int
132 find_basic_block (insn, search_limit)
133 rtx insn;
134 int search_limit;
136 int i;
138 /* Scan backwards to the previous BARRIER. Then see if we can find a
139 label that starts a basic block. Return the basic block number. */
140 for (insn = prev_nonnote_insn (insn);
141 insn && GET_CODE (insn) != BARRIER && search_limit != 0;
142 insn = prev_nonnote_insn (insn), --search_limit)
145 /* The closest BARRIER is too far away. */
146 if (search_limit == 0)
147 return -1;
149 /* The start of the function is basic block zero. */
150 else if (insn == 0)
151 return 0;
153 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
154 anything other than a CODE_LABEL or note, we can't find this code. */
155 for (insn = next_nonnote_insn (insn);
156 insn && GET_CODE (insn) == CODE_LABEL;
157 insn = next_nonnote_insn (insn))
159 for (i = 0; i < n_basic_blocks; i++)
160 if (insn == BLOCK_HEAD (i))
161 return i;
164 return -1;
167 /* Similar to next_insn, but ignores insns in the delay slots of
168 an annulled branch. */
170 static rtx
171 next_insn_no_annul (insn)
172 rtx insn;
174 if (insn)
176 /* If INSN is an annulled branch, skip any insns from the target
177 of the branch. */
178 if (INSN_ANNULLED_BRANCH_P (insn)
179 && NEXT_INSN (PREV_INSN (insn)) != insn)
180 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
181 insn = NEXT_INSN (insn);
183 insn = NEXT_INSN (insn);
184 if (insn && GET_CODE (insn) == INSN
185 && GET_CODE (PATTERN (insn)) == SEQUENCE)
186 insn = XVECEXP (PATTERN (insn), 0, 0);
189 return insn;
192 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
193 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
194 is TRUE, resources used by the called routine will be included for
195 CALL_INSNs. */
197 void
198 mark_referenced_resources (x, res, include_delayed_effects)
199 rtx x;
200 struct resources *res;
201 int include_delayed_effects;
203 enum rtx_code code = GET_CODE (x);
204 int i, j;
205 unsigned int r;
206 const char *format_ptr;
208 /* Handle leaf items for which we set resource flags. Also, special-case
209 CALL, SET and CLOBBER operators. */
210 switch (code)
212 case CONST:
213 case CONST_INT:
214 case CONST_DOUBLE:
215 case CONST_VECTOR:
216 case PC:
217 case SYMBOL_REF:
218 case LABEL_REF:
219 return;
221 case SUBREG:
222 if (GET_CODE (SUBREG_REG (x)) != REG)
223 mark_referenced_resources (SUBREG_REG (x), res, 0);
224 else
226 unsigned int regno = subreg_regno (x);
227 unsigned int last_regno
228 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
230 if (last_regno > FIRST_PSEUDO_REGISTER)
231 abort ();
232 for (r = regno; r < last_regno; r++)
233 SET_HARD_REG_BIT (res->regs, r);
235 return;
237 case REG:
239 unsigned int regno = REGNO (x);
240 unsigned int last_regno
241 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
243 if (last_regno > FIRST_PSEUDO_REGISTER)
244 abort ();
245 for (r = regno; r < last_regno; r++)
246 SET_HARD_REG_BIT (res->regs, r);
248 return;
250 case MEM:
251 /* If this memory shouldn't change, it really isn't referencing
252 memory. */
253 if (RTX_UNCHANGING_P (x))
254 res->unch_memory = 1;
255 else
256 res->memory = 1;
257 res->volatil |= MEM_VOLATILE_P (x);
259 /* Mark registers used to access memory. */
260 mark_referenced_resources (XEXP (x, 0), res, 0);
261 return;
263 case CC0:
264 res->cc = 1;
265 return;
267 case UNSPEC_VOLATILE:
268 case ASM_INPUT:
269 /* Traditional asm's are always volatile. */
270 res->volatil = 1;
271 return;
273 case TRAP_IF:
274 res->volatil = 1;
275 break;
277 case ASM_OPERANDS:
278 res->volatil |= MEM_VOLATILE_P (x);
280 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
281 We can not just fall through here since then we would be confused
282 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
283 traditional asms unlike their normal usage. */
285 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
286 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
287 return;
289 case CALL:
290 /* The first operand will be a (MEM (xxx)) but doesn't really reference
291 memory. The second operand may be referenced, though. */
292 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
293 mark_referenced_resources (XEXP (x, 1), res, 0);
294 return;
296 case SET:
297 /* Usually, the first operand of SET is set, not referenced. But
298 registers used to access memory are referenced. SET_DEST is
299 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
301 mark_referenced_resources (SET_SRC (x), res, 0);
303 x = SET_DEST (x);
304 if (GET_CODE (x) == SIGN_EXTRACT
305 || GET_CODE (x) == ZERO_EXTRACT
306 || GET_CODE (x) == STRICT_LOW_PART)
307 mark_referenced_resources (x, res, 0);
308 else if (GET_CODE (x) == SUBREG)
309 x = SUBREG_REG (x);
310 if (GET_CODE (x) == MEM)
311 mark_referenced_resources (XEXP (x, 0), res, 0);
312 return;
314 case CLOBBER:
315 return;
317 case CALL_INSN:
318 if (include_delayed_effects)
320 /* A CALL references memory, the frame pointer if it exists, the
321 stack pointer, any global registers and any registers given in
322 USE insns immediately in front of the CALL.
324 However, we may have moved some of the parameter loading insns
325 into the delay slot of this CALL. If so, the USE's for them
326 don't count and should be skipped. */
327 rtx insn = PREV_INSN (x);
328 rtx sequence = 0;
329 int seq_size = 0;
330 int i;
332 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
333 if (NEXT_INSN (insn) != x)
335 sequence = PATTERN (NEXT_INSN (insn));
336 seq_size = XVECLEN (sequence, 0);
337 if (GET_CODE (sequence) != SEQUENCE)
338 abort ();
341 res->memory = 1;
342 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
343 if (frame_pointer_needed)
345 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
346 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
347 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
348 #endif
351 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
352 if (global_regs[i])
353 SET_HARD_REG_BIT (res->regs, i);
355 /* Check for a REG_SETJMP. If it exists, then we must
356 assume that this call can need any register.
358 This is done to be more conservative about how we handle setjmp.
359 We assume that they both use and set all registers. Using all
360 registers ensures that a register will not be considered dead
361 just because it crosses a setjmp call. A register should be
362 considered dead only if the setjmp call returns non-zero. */
363 if (find_reg_note (x, REG_SETJMP, NULL))
364 SET_HARD_REG_SET (res->regs);
367 rtx link;
369 for (link = CALL_INSN_FUNCTION_USAGE (x);
370 link;
371 link = XEXP (link, 1))
372 if (GET_CODE (XEXP (link, 0)) == USE)
374 for (i = 1; i < seq_size; i++)
376 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
377 if (GET_CODE (slot_pat) == SET
378 && rtx_equal_p (SET_DEST (slot_pat),
379 XEXP (XEXP (link, 0), 0)))
380 break;
382 if (i >= seq_size)
383 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
384 res, 0);
389 /* ... fall through to other INSN processing ... */
391 case INSN:
392 case JUMP_INSN:
394 #ifdef INSN_REFERENCES_ARE_DELAYED
395 if (! include_delayed_effects
396 && INSN_REFERENCES_ARE_DELAYED (x))
397 return;
398 #endif
400 /* No special processing, just speed up. */
401 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
402 return;
404 default:
405 break;
408 /* Process each sub-expression and flag what it needs. */
409 format_ptr = GET_RTX_FORMAT (code);
410 for (i = 0; i < GET_RTX_LENGTH (code); i++)
411 switch (*format_ptr++)
413 case 'e':
414 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
415 break;
417 case 'E':
418 for (j = 0; j < XVECLEN (x, i); j++)
419 mark_referenced_resources (XVECEXP (x, i, j), res,
420 include_delayed_effects);
421 break;
425 /* A subroutine of mark_target_live_regs. Search forward from TARGET
426 looking for registers that are set before they are used. These are dead.
427 Stop after passing a few conditional jumps, and/or a small
428 number of unconditional branches. */
430 static rtx
431 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
432 rtx target;
433 struct resources *res;
434 rtx *jump_target;
435 int jump_count;
436 struct resources set, needed;
438 HARD_REG_SET scratch;
439 rtx insn, next;
440 rtx jump_insn = 0;
441 int i;
443 for (insn = target; insn; insn = next)
445 rtx this_jump_insn = insn;
447 next = NEXT_INSN (insn);
449 /* If this instruction can throw an exception, then we don't
450 know where we might end up next. That means that we have to
451 assume that whatever we have already marked as live really is
452 live. */
453 if (can_throw_internal (insn))
454 break;
456 switch (GET_CODE (insn))
458 case CODE_LABEL:
459 /* After a label, any pending dead registers that weren't yet
460 used can be made dead. */
461 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
462 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
463 CLEAR_HARD_REG_SET (pending_dead_regs);
465 continue;
467 case BARRIER:
468 case NOTE:
469 continue;
471 case INSN:
472 if (GET_CODE (PATTERN (insn)) == USE)
474 /* If INSN is a USE made by update_block, we care about the
475 underlying insn. Any registers set by the underlying insn
476 are live since the insn is being done somewhere else. */
477 if (INSN_P (XEXP (PATTERN (insn), 0)))
478 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
479 MARK_SRC_DEST_CALL);
481 /* All other USE insns are to be ignored. */
482 continue;
484 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
485 continue;
486 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
488 /* An unconditional jump can be used to fill the delay slot
489 of a call, so search for a JUMP_INSN in any position. */
490 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
492 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
493 if (GET_CODE (this_jump_insn) == JUMP_INSN)
494 break;
498 default:
499 break;
502 if (GET_CODE (this_jump_insn) == JUMP_INSN)
504 if (jump_count++ < 10)
506 if (any_uncondjump_p (this_jump_insn)
507 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
509 next = JUMP_LABEL (this_jump_insn);
510 if (jump_insn == 0)
512 jump_insn = insn;
513 if (jump_target)
514 *jump_target = JUMP_LABEL (this_jump_insn);
517 else if (any_condjump_p (this_jump_insn))
519 struct resources target_set, target_res;
520 struct resources fallthrough_res;
522 /* We can handle conditional branches here by following
523 both paths, and then IOR the results of the two paths
524 together, which will give us registers that are dead
525 on both paths. Since this is expensive, we give it
526 a much higher cost than unconditional branches. The
527 cost was chosen so that we will follow at most 1
528 conditional branch. */
530 jump_count += 4;
531 if (jump_count >= 10)
532 break;
534 mark_referenced_resources (insn, &needed, 1);
536 /* For an annulled branch, mark_set_resources ignores slots
537 filled by instructions from the target. This is correct
538 if the branch is not taken. Since we are following both
539 paths from the branch, we must also compute correct info
540 if the branch is taken. We do this by inverting all of
541 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
542 and then inverting the INSN_FROM_TARGET_P bits again. */
544 if (GET_CODE (PATTERN (insn)) == SEQUENCE
545 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
547 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
548 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
549 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
551 target_set = set;
552 mark_set_resources (insn, &target_set, 0,
553 MARK_SRC_DEST_CALL);
555 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
556 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
557 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
559 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
561 else
563 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
564 target_set = set;
567 target_res = *res;
568 COPY_HARD_REG_SET (scratch, target_set.regs);
569 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
570 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
572 fallthrough_res = *res;
573 COPY_HARD_REG_SET (scratch, set.regs);
574 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
575 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
577 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
578 &target_res, 0, jump_count,
579 target_set, needed);
580 find_dead_or_set_registers (next,
581 &fallthrough_res, 0, jump_count,
582 set, needed);
583 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
584 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
585 break;
587 else
588 break;
590 else
592 /* Don't try this optimization if we expired our jump count
593 above, since that would mean there may be an infinite loop
594 in the function being compiled. */
595 jump_insn = 0;
596 break;
600 mark_referenced_resources (insn, &needed, 1);
601 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
603 COPY_HARD_REG_SET (scratch, set.regs);
604 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
605 AND_COMPL_HARD_REG_SET (res->regs, scratch);
608 return jump_insn;
611 /* Given X, a part of an insn, and a pointer to a `struct resource',
612 RES, indicate which resources are modified by the insn. If
613 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
614 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
616 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
617 objects are being referenced instead of set.
619 We never mark the insn as modifying the condition code unless it explicitly
620 SETs CC0 even though this is not totally correct. The reason for this is
621 that we require a SET of CC0 to immediately precede the reference to CC0.
622 So if some other insn sets CC0 as a side-effect, we know it cannot affect
623 our computation and thus may be placed in a delay slot. */
625 void
626 mark_set_resources (x, res, in_dest, mark_type)
627 rtx x;
628 struct resources *res;
629 int in_dest;
630 enum mark_resource_type mark_type;
632 enum rtx_code code;
633 int i, j;
634 unsigned int r;
635 const char *format_ptr;
637 restart:
639 code = GET_CODE (x);
641 switch (code)
643 case NOTE:
644 case BARRIER:
645 case CODE_LABEL:
646 case USE:
647 case CONST_INT:
648 case CONST_DOUBLE:
649 case CONST_VECTOR:
650 case LABEL_REF:
651 case SYMBOL_REF:
652 case CONST:
653 case PC:
654 /* These don't set any resources. */
655 return;
657 case CC0:
658 if (in_dest)
659 res->cc = 1;
660 return;
662 case CALL_INSN:
663 /* Called routine modifies the condition code, memory, any registers
664 that aren't saved across calls, global registers and anything
665 explicitly CLOBBERed immediately after the CALL_INSN. */
667 if (mark_type == MARK_SRC_DEST_CALL)
669 rtx link;
671 res->cc = res->memory = 1;
672 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
673 if (call_used_regs[r] || global_regs[r])
674 SET_HARD_REG_BIT (res->regs, r);
676 for (link = CALL_INSN_FUNCTION_USAGE (x);
677 link; link = XEXP (link, 1))
678 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
679 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
680 MARK_SRC_DEST);
682 /* Check for a REG_SETJMP. If it exists, then we must
683 assume that this call can clobber any register. */
684 if (find_reg_note (x, REG_SETJMP, NULL))
685 SET_HARD_REG_SET (res->regs);
688 /* ... and also what its RTL says it modifies, if anything. */
690 case JUMP_INSN:
691 case INSN:
693 /* An insn consisting of just a CLOBBER (or USE) is just for flow
694 and doesn't actually do anything, so we ignore it. */
696 #ifdef INSN_SETS_ARE_DELAYED
697 if (mark_type != MARK_SRC_DEST_CALL
698 && INSN_SETS_ARE_DELAYED (x))
699 return;
700 #endif
702 x = PATTERN (x);
703 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
704 goto restart;
705 return;
707 case SET:
708 /* If the source of a SET is a CALL, this is actually done by
709 the called routine. So only include it if we are to include the
710 effects of the calling routine. */
712 mark_set_resources (SET_DEST (x), res,
713 (mark_type == MARK_SRC_DEST_CALL
714 || GET_CODE (SET_SRC (x)) != CALL),
715 mark_type);
717 if (mark_type != MARK_DEST)
718 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
719 return;
721 case CLOBBER:
722 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
723 return;
725 case SEQUENCE:
726 for (i = 0; i < XVECLEN (x, 0); i++)
727 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
728 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
729 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
730 return;
732 case POST_INC:
733 case PRE_INC:
734 case POST_DEC:
735 case PRE_DEC:
736 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
737 return;
739 case PRE_MODIFY:
740 case POST_MODIFY:
741 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
742 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
743 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
744 return;
746 case SIGN_EXTRACT:
747 case ZERO_EXTRACT:
748 if (! (mark_type == MARK_DEST && in_dest))
750 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
751 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
752 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
754 return;
756 case MEM:
757 if (in_dest)
759 res->memory = 1;
760 res->unch_memory |= RTX_UNCHANGING_P (x);
761 res->volatil |= MEM_VOLATILE_P (x);
764 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
765 return;
767 case SUBREG:
768 if (in_dest)
770 if (GET_CODE (SUBREG_REG (x)) != REG)
771 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
772 else
774 unsigned int regno = subreg_regno (x);
775 unsigned int last_regno
776 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
778 if (last_regno > FIRST_PSEUDO_REGISTER)
779 abort ();
780 for (r = regno; r < last_regno; r++)
781 SET_HARD_REG_BIT (res->regs, r);
784 return;
786 case REG:
787 if (in_dest)
789 unsigned int regno = REGNO (x);
790 unsigned int last_regno
791 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
793 if (last_regno > FIRST_PSEUDO_REGISTER)
794 abort ();
795 for (r = regno; r < last_regno; r++)
796 SET_HARD_REG_BIT (res->regs, r);
798 return;
800 case STRICT_LOW_PART:
801 if (! (mark_type == MARK_DEST && in_dest))
803 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
804 return;
807 case UNSPEC_VOLATILE:
808 case ASM_INPUT:
809 /* Traditional asm's are always volatile. */
810 res->volatil = 1;
811 return;
813 case TRAP_IF:
814 res->volatil = 1;
815 break;
817 case ASM_OPERANDS:
818 res->volatil |= MEM_VOLATILE_P (x);
820 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
821 We can not just fall through here since then we would be confused
822 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
823 traditional asms unlike their normal usage. */
825 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
826 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
827 MARK_SRC_DEST);
828 return;
830 default:
831 break;
834 /* Process each sub-expression and flag what it needs. */
835 format_ptr = GET_RTX_FORMAT (code);
836 for (i = 0; i < GET_RTX_LENGTH (code); i++)
837 switch (*format_ptr++)
839 case 'e':
840 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
841 break;
843 case 'E':
844 for (j = 0; j < XVECLEN (x, i); j++)
845 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
846 break;
850 /* Set the resources that are live at TARGET.
852 If TARGET is zero, we refer to the end of the current function and can
853 return our precomputed value.
855 Otherwise, we try to find out what is live by consulting the basic block
856 information. This is tricky, because we must consider the actions of
857 reload and jump optimization, which occur after the basic block information
858 has been computed.
860 Accordingly, we proceed as follows::
862 We find the previous BARRIER and look at all immediately following labels
863 (with no intervening active insns) to see if any of them start a basic
864 block. If we hit the start of the function first, we use block 0.
866 Once we have found a basic block and a corresponding first insns, we can
867 accurately compute the live status from basic_block_live_regs and
868 reg_renumber. (By starting at a label following a BARRIER, we are immune
869 to actions taken by reload and jump.) Then we scan all insns between
870 that point and our target. For each CLOBBER (or for call-clobbered regs
871 when we pass a CALL_INSN), mark the appropriate registers are dead. For
872 a SET, mark them as live.
874 We have to be careful when using REG_DEAD notes because they are not
875 updated by such things as find_equiv_reg. So keep track of registers
876 marked as dead that haven't been assigned to, and mark them dead at the
877 next CODE_LABEL since reload and jump won't propagate values across labels.
879 If we cannot find the start of a basic block (should be a very rare
880 case, if it can happen at all), mark everything as potentially live.
882 Next, scan forward from TARGET looking for things set or clobbered
883 before they are used. These are not live.
885 Because we can be called many times on the same target, save our results
886 in a hash table indexed by INSN_UID. This is only done if the function
887 init_resource_info () was invoked before we are called. */
889 void
890 mark_target_live_regs (insns, target, res)
891 rtx insns;
892 rtx target;
893 struct resources *res;
895 int b = -1;
896 unsigned int i;
897 struct target_info *tinfo = NULL;
898 rtx insn;
899 rtx jump_insn = 0;
900 rtx jump_target;
901 HARD_REG_SET scratch;
902 struct resources set, needed;
904 /* Handle end of function. */
905 if (target == 0)
907 *res = end_of_function_needs;
908 return;
911 /* We have to assume memory is needed, but the CC isn't. */
912 res->memory = 1;
913 res->volatil = res->unch_memory = 0;
914 res->cc = 0;
916 /* See if we have computed this value already. */
917 if (target_hash_table != NULL)
919 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
920 tinfo; tinfo = tinfo->next)
921 if (tinfo->uid == INSN_UID (target))
922 break;
924 /* Start by getting the basic block number. If we have saved
925 information, we can get it from there unless the insn at the
926 start of the basic block has been deleted. */
927 if (tinfo && tinfo->block != -1
928 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
929 b = tinfo->block;
932 if (b == -1)
933 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
935 if (target_hash_table != NULL)
937 if (tinfo)
939 /* If the information is up-to-date, use it. Otherwise, we will
940 update it below. */
941 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
943 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
944 return;
947 else
949 /* Allocate a place to put our results and chain it into the
950 hash table. */
951 tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
952 tinfo->uid = INSN_UID (target);
953 tinfo->block = b;
954 tinfo->next
955 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
956 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
960 CLEAR_HARD_REG_SET (pending_dead_regs);
962 /* If we found a basic block, get the live registers from it and update
963 them with anything set or killed between its start and the insn before
964 TARGET. Otherwise, we must assume everything is live. */
965 if (b != -1)
967 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
968 unsigned int j;
969 unsigned int regno;
970 rtx start_insn, stop_insn;
972 /* Compute hard regs live at start of block -- this is the real hard regs
973 marked live, plus live pseudo regs that have been renumbered to
974 hard regs. */
976 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
978 EXECUTE_IF_SET_IN_REG_SET
979 (regs_live, FIRST_PSEUDO_REGISTER, i,
981 if (reg_renumber[i] >= 0)
983 regno = reg_renumber[i];
984 for (j = regno;
985 j < regno + HARD_REGNO_NREGS (regno,
986 PSEUDO_REGNO_MODE (i));
987 j++)
988 SET_HARD_REG_BIT (current_live_regs, j);
992 /* Get starting and ending insn, handling the case where each might
993 be a SEQUENCE. */
994 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
995 stop_insn = target;
997 if (GET_CODE (start_insn) == INSN
998 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
999 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
1001 if (GET_CODE (stop_insn) == INSN
1002 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
1003 stop_insn = next_insn (PREV_INSN (stop_insn));
1005 for (insn = start_insn; insn != stop_insn;
1006 insn = next_insn_no_annul (insn))
1008 rtx link;
1009 rtx real_insn = insn;
1011 /* If this insn is from the target of a branch, it isn't going to
1012 be used in the sequel. If it is used in both cases, this
1013 test will not be true. */
1014 if (INSN_FROM_TARGET_P (insn))
1015 continue;
1017 /* If this insn is a USE made by update_block, we care about the
1018 underlying insn. */
1019 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
1020 && INSN_P (XEXP (PATTERN (insn), 0)))
1021 real_insn = XEXP (PATTERN (insn), 0);
1023 if (GET_CODE (real_insn) == CALL_INSN)
1025 /* CALL clobbers all call-used regs that aren't fixed except
1026 sp, ap, and fp. Do this before setting the result of the
1027 call live. */
1028 AND_COMPL_HARD_REG_SET (current_live_regs,
1029 regs_invalidated_by_call);
1031 /* A CALL_INSN sets any global register live, since it may
1032 have been modified by the call. */
1033 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1034 if (global_regs[i])
1035 SET_HARD_REG_BIT (current_live_regs, i);
1038 /* Mark anything killed in an insn to be deadened at the next
1039 label. Ignore USE insns; the only REG_DEAD notes will be for
1040 parameters. But they might be early. A CALL_INSN will usually
1041 clobber registers used for parameters. It isn't worth bothering
1042 with the unlikely case when it won't. */
1043 if ((GET_CODE (real_insn) == INSN
1044 && GET_CODE (PATTERN (real_insn)) != USE
1045 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1046 || GET_CODE (real_insn) == JUMP_INSN
1047 || GET_CODE (real_insn) == CALL_INSN)
1049 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1050 if (REG_NOTE_KIND (link) == REG_DEAD
1051 && GET_CODE (XEXP (link, 0)) == REG
1052 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1054 unsigned int first_regno = REGNO (XEXP (link, 0));
1055 unsigned int last_regno
1056 = (first_regno
1057 + HARD_REGNO_NREGS (first_regno,
1058 GET_MODE (XEXP (link, 0))));
1060 for (i = first_regno; i < last_regno; i++)
1061 SET_HARD_REG_BIT (pending_dead_regs, i);
1064 note_stores (PATTERN (real_insn), update_live_status, NULL);
1066 /* If any registers were unused after this insn, kill them.
1067 These notes will always be accurate. */
1068 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1069 if (REG_NOTE_KIND (link) == REG_UNUSED
1070 && GET_CODE (XEXP (link, 0)) == REG
1071 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1073 unsigned int first_regno = REGNO (XEXP (link, 0));
1074 unsigned int last_regno
1075 = (first_regno
1076 + HARD_REGNO_NREGS (first_regno,
1077 GET_MODE (XEXP (link, 0))));
1079 for (i = first_regno; i < last_regno; i++)
1080 CLEAR_HARD_REG_BIT (current_live_regs, i);
1084 else if (GET_CODE (real_insn) == CODE_LABEL)
1086 /* A label clobbers the pending dead registers since neither
1087 reload nor jump will propagate a value across a label. */
1088 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1089 CLEAR_HARD_REG_SET (pending_dead_regs);
1092 /* The beginning of the epilogue corresponds to the end of the
1093 RTL chain when there are no epilogue insns. Certain resources
1094 are implicitly required at that point. */
1095 else if (GET_CODE (real_insn) == NOTE
1096 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1097 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1100 COPY_HARD_REG_SET (res->regs, current_live_regs);
1101 if (tinfo != NULL)
1103 tinfo->block = b;
1104 tinfo->bb_tick = bb_ticks[b];
1107 else
1108 /* We didn't find the start of a basic block. Assume everything
1109 in use. This should happen only extremely rarely. */
1110 SET_HARD_REG_SET (res->regs);
1112 CLEAR_RESOURCE (&set);
1113 CLEAR_RESOURCE (&needed);
1115 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1116 set, needed);
1118 /* If we hit an unconditional branch, we have another way of finding out
1119 what is live: we can see what is live at the branch target and include
1120 anything used but not set before the branch. We add the live
1121 resources found using the test below to those found until now. */
1123 if (jump_insn)
1125 struct resources new_resources;
1126 rtx stop_insn = next_active_insn (jump_insn);
1128 mark_target_live_regs (insns, next_active_insn (jump_target),
1129 &new_resources);
1130 CLEAR_RESOURCE (&set);
1131 CLEAR_RESOURCE (&needed);
1133 /* Include JUMP_INSN in the needed registers. */
1134 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1136 mark_referenced_resources (insn, &needed, 1);
1138 COPY_HARD_REG_SET (scratch, needed.regs);
1139 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1140 IOR_HARD_REG_SET (new_resources.regs, scratch);
1142 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1145 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1148 if (tinfo != NULL)
1150 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1154 /* Initialize the resources required by mark_target_live_regs ().
1155 This should be invoked before the first call to mark_target_live_regs. */
1157 void
1158 init_resource_info (epilogue_insn)
1159 rtx epilogue_insn;
1161 int i;
1163 /* Indicate what resources are required to be valid at the end of the current
1164 function. The condition code never is and memory always is. If the
1165 frame pointer is needed, it is and so is the stack pointer unless
1166 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1167 stack pointer is. Registers used to return the function value are
1168 needed. Registers holding global variables are needed. */
1170 end_of_function_needs.cc = 0;
1171 end_of_function_needs.memory = 1;
1172 end_of_function_needs.unch_memory = 0;
1173 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1175 if (frame_pointer_needed)
1177 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1178 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1179 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1180 #endif
1181 #ifdef EXIT_IGNORE_STACK
1182 if (! EXIT_IGNORE_STACK
1183 || current_function_sp_is_unchanging)
1184 #endif
1185 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1187 else
1188 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1190 if (current_function_return_rtx != 0)
1191 mark_referenced_resources (current_function_return_rtx,
1192 &end_of_function_needs, 1);
1194 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1195 if (global_regs[i]
1196 #ifdef EPILOGUE_USES
1197 || EPILOGUE_USES (i)
1198 #endif
1200 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1202 /* The registers required to be live at the end of the function are
1203 represented in the flow information as being dead just prior to
1204 reaching the end of the function. For example, the return of a value
1205 might be represented by a USE of the return register immediately
1206 followed by an unconditional jump to the return label where the
1207 return label is the end of the RTL chain. The end of the RTL chain
1208 is then taken to mean that the return register is live.
1210 This sequence is no longer maintained when epilogue instructions are
1211 added to the RTL chain. To reconstruct the original meaning, the
1212 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1213 point where these registers become live (start_of_epilogue_needs).
1214 If epilogue instructions are present, the registers set by those
1215 instructions won't have been processed by flow. Thus, those
1216 registers are additionally required at the end of the RTL chain
1217 (end_of_function_needs). */
1219 start_of_epilogue_needs = end_of_function_needs;
1221 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1222 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1223 MARK_SRC_DEST_CALL);
1225 /* Allocate and initialize the tables used by mark_target_live_regs. */
1226 target_hash_table = (struct target_info **)
1227 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1228 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1231 /* Free up the resources allcated to mark_target_live_regs (). This
1232 should be invoked after the last call to mark_target_live_regs (). */
1234 void
1235 free_resource_info ()
1237 if (target_hash_table != NULL)
1239 int i;
1241 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1243 struct target_info *ti = target_hash_table[i];
1245 while (ti)
1247 struct target_info *next = ti->next;
1248 free (ti);
1249 ti = next;
1253 free (target_hash_table);
1254 target_hash_table = NULL;
1257 if (bb_ticks != NULL)
1259 free (bb_ticks);
1260 bb_ticks = NULL;
1264 /* Clear any hashed information that we have stored for INSN. */
1266 void
1267 clear_hashed_info_for_insn (insn)
1268 rtx insn;
1270 struct target_info *tinfo;
1272 if (target_hash_table != NULL)
1274 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1275 tinfo; tinfo = tinfo->next)
1276 if (tinfo->uid == INSN_UID (insn))
1277 break;
1279 if (tinfo)
1280 tinfo->block = -1;
1284 /* Increment the tick count for the basic block that contains INSN. */
1286 void
1287 incr_ticks_for_insn (insn)
1288 rtx insn;
1290 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1292 if (b != -1)
1293 bb_ticks[b]++;
1296 /* Add TRIAL to the set of resources used at the end of the current
1297 function. */
1298 void
1299 mark_end_of_function_resources (trial, include_delayed_effects)
1300 rtx trial;
1301 int include_delayed_effects;
1303 mark_referenced_resources (trial, &end_of_function_needs,
1304 include_delayed_effects);