1 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
3 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
5 * config/rs6000/rs6000-c.c: Likewise.
6 * config/rs6000/rs6000-call.c: Likewise.
7 * gcc/config/rs6000/rs6000.c: Likewise.
9 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
11 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
12 (RTEMS_ENDFILE_SPEC): Likewise.
13 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
14 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
15 (LIB_SPECS): Support -nodefaultlibs option.
16 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
17 (RTEMS_ENDFILE_SPEC): Likewise.
18 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
19 (RTEMS_ENDFILE_SPEC): Likewise.
20 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
21 (RTEMS_ENDFILE_SPEC): Likewise.
23 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
25 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
26 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
28 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
30 * config/pru/pru.h: Mark R3.w0 as caller saved.
32 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
34 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
35 and gen_doloop_begin_internal.
36 (pru_reorg_loop): Use gen_pruloop with mode.
37 * config/pru/pru.md: Use new @insn syntax.
39 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
41 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
43 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
45 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
46 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
47 (addqi3_cconly_overflow): Ditto.
48 (umulv<mode>4): Ditto.
49 (<s>mul<mode>3_highpart): Ditto.
50 (tls_global_dynamic_32): Ditto.
51 (tls_local_dynamic_base_32): Ditto.
58 (*adddi_4): Remove "m" constraint from scratch operand.
59 (*add<mode>_4): Ditto.
61 2020-05-05 Jakub Jelinek <jakub@redhat.com>
63 PR rtl-optimization/94516
64 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
65 with sp = reg, add REG_EQUAL note with sp + const.
66 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
67 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
68 postreload sp = sp + const to sp = reg optimization if needed and
70 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
71 reg = sp insn with sp + const REG_EQUAL note. Adjust
72 try_apply_stack_adjustment caller, call
73 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
74 (combine_stack_adjustments): Allocate and free LIVE bitmap,
75 adjust combine_stack_adjustments_for_block caller.
77 2020-05-05 Martin Liska <mliska@suse.cz>
80 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
83 2020-05-05 Martin Liska <mliska@suse.cz>
85 * opt-functions.awk (opt_args_non_empty): New function.
86 * opt-read.awk: Use the function for various option arguments.
88 2020-05-05 Martin Liska <mliska@suse.cz>
91 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
92 report warning when the jobserver is not detected.
94 2020-05-05 Martin Liska <mliska@suse.cz>
97 * gcov.c (main): Print total lines summary at the end.
98 (generate_results): Expect file_name always being non-null.
99 Print newline after intermediate file is printed in order to align with
100 what we do for normal files.
102 2020-05-05 Martin Liska <mliska@suse.cz>
104 * dumpfile.c (dump_switch_p): Change return type
105 and print option suggestion.
106 * dumpfile.h: Change return type.
107 * opts-global.c (handle_common_deferred_options):
108 Move error into dump_switch_p function.
110 2020-05-05 Martin Liska <mliska@suse.cz>
113 * alloc-pool.h: Use const for some arguments.
114 * bitmap.h: Likewise.
115 * mem-stats.h: Likewise.
116 * sese.h (get_entry_bb): Likewise.
117 (get_exit_bb): Likewise.
119 2020-05-05 Richard Biener <rguenther@suse.de>
121 * tree-vect-slp.c (struct vdhs_data): New.
122 (vect_detect_hybrid_slp): New walker.
123 (vect_detect_hybrid_slp): Rewrite.
125 2020-05-05 Richard Biener <rguenther@suse.de>
128 * tree-ssa-structalias.c (ipa_pta_execute): Use
129 varpool_node::externally_visible_p ().
130 (refered_from_nonlocal_var): Likewise.
132 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
134 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
135 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
136 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
138 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
140 * gimplify.c (gimplify_init_constructor): Do not put the constructor
141 into static memory if it is not complete.
143 2020-05-05 Richard Biener <rguenther@suse.de>
145 PR tree-optimization/94949
146 * tree-ssa-loop-im.c (execute_sm): Check whether we use
147 the multithreaded model or always compute the stored value
148 before eliding a load.
150 2020-05-05 Alex Coplan <alex.coplan@arm.com>
152 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
154 2020-05-05 Jakub Jelinek <jakub@redhat.com>
156 PR tree-optimization/94800
157 * match.pd (X + (X << C) to X * (1 + (1 << C)),
158 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
162 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
164 PR tree-optimization/94914
165 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
168 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
170 * config/i386/i386.md (*testqi_ext_3): Use
171 int_nonimmediate_operand instead of manual mode checks.
172 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
173 Use int_nonimmediate_operand predicate. Rewrite
174 define_insn_and_split pattern to a combine pass splitter.
176 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
178 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
179 * configure: Regenerate.
181 2020-05-05 Jakub Jelinek <jakub@redhat.com>
184 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
185 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
186 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
187 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
189 2020-05-04 Clement Chigot <clement.chigot@atos.net>
190 David Edelsohn <dje.gcc@gmail.com>
192 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
193 for fmodl, frexpl, ldexpl and modfl builtins.
195 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
198 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
199 chosen lhs is different from the gcall lhs.
200 (expand_mask_load_optab_fn): Likewise.
201 (expand_gather_load_optab_fn): Likewise.
203 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
206 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
207 (EQ compare->LTU compare splitter): New splitter.
208 (NE compare->NEG splitter): Ditto.
210 2020-05-04 Marek Polacek <polacek@redhat.com>
213 2020-04-30 Marek Polacek <polacek@redhat.com>
216 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
217 (check_aligned_type): Check if TYPE_USER_ALIGN match.
219 2020-05-04 Richard Biener <rguenther@suse.de>
221 PR tree-optimization/93891
222 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
223 the original reference tree for assessing access alignment.
225 2020-05-04 Richard Biener <rguenther@suse.de>
227 PR tree-optimization/39612
228 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
229 (set_ref_loaded_in_loop): New.
230 (mark_ref_loaded): Likewise.
231 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
232 (execute_sm): Avoid issueing a load when it was not there.
233 (execute_sm_if_changed): Avoid issueing warnings for the
236 2020-05-04 Martin Jambor <mjambor@suse.cz>
239 * tree-inline.c (tree_function_versioning): Leave any type conversion
240 of replacements to setup_one_parameter and its friend
243 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
246 * config/i386/predicates.md (shr_comparison_operator): New predicate.
247 * config/i386/i386.md (compare->shr splitter): New splitters.
249 2020-05-04 Jakub Jelinek <jakub@redhat.com>
251 PR tree-optimization/94718
252 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
254 PR tree-optimization/94718
255 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
256 replace two nop conversions on bit_{and,ior,xor} argument
257 and result with just one conversion on the result or another argument.
259 PR tree-optimization/94718
260 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
261 -> (X ^ Y) & C eqne 0 optimization to ...
262 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
264 * opts.c (get_option_html_page): Instead of hardcoding a list of
265 options common between C/C++ and Fortran only use gfortran/
266 documentation for warnings that have CL_Fortran set but not
269 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
271 * config/i386/i386-expand.c (ix86_expand_int_movcc):
272 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
273 (emit_memmov): Ditto.
274 (emit_memset): Ditto.
275 (ix86_expand_strlensi_unroll_1): Ditto.
276 (release_scratch_register_on_entry): Ditto.
277 (gen_frame_set): Ditto.
278 (ix86_emit_restore_reg_using_pop): Ditto.
279 (ix86_emit_outlined_ms2sysv_restore): Ditto.
280 (ix86_expand_epilogue): Ditto.
281 (ix86_expand_split_stack_prologue): Ditto.
282 * config/i386/i386.md (push immediate splitter): Ditto.
286 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
289 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
292 2020-05-02 Jakub Jelinek <jakub@redhat.com>
294 * config/tilegx/tilegx.md
295 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
296 rather than just <n>.
298 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
301 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
302 and crtl->patch_area_entry.
303 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
304 * opts.c (common_handle_option): Limit
305 function_entry_patch_area_size and function_entry_patch_area_start
306 to USHRT_MAX. Fix a typo in error message.
307 * varasm.c (assemble_start_function): Use crtl->patch_area_size
308 and crtl->patch_area_entry.
309 * doc/invoke.texi: Document the maximum value for
310 -fpatchable-function-entry.
312 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
314 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
315 Override SUBTARGET_SHADOW_OFFSET macro.
317 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
319 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
320 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
321 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
322 * config/i386/freebsd.h: Likewise.
323 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
324 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
326 2020-04-30 Alexandre Oliva <oliva@adacore.com>
328 * doc/sourcebuild.texi (Effective-Target Keywords): Document
329 the newly-introduced fileio effective target.
331 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
333 PR rtl-optimization/94740
334 * cse.c (cse_process_notes_1): Replace with...
335 (cse_process_note_1): ...this new function, acting as a
336 simplify_replace_fn_rtx callback to process_note. Handle only
337 REGs and MEMs directly. Validate the MEM if cse_process_note
339 (cse_process_notes): Replace with...
340 (cse_process_note): ...this new function.
341 (cse_extended_basic_block): Update accordingly, iterating over
342 the register notes and passing individual notes to cse_process_note.
344 2020-04-30 Carl Love <cel@us.ibm.com>
346 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
348 2020-04-30 Martin Jambor <mjambor@suse.cz>
351 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
352 saved by the inliner and thunks which had their call inlined.
353 * ipa-inline-transform.c (save_inline_function_body): Fill in
354 former_clone_of of new body holders.
356 2020-04-30 Jakub Jelinek <jakub@redhat.com>
358 * BASE-VER: Set to 11.0.0.
360 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
362 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
364 2020-04-30 Marek Polacek <polacek@redhat.com>
367 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
368 (check_aligned_type): Check if TYPE_USER_ALIGN match.
370 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
372 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
373 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
374 * doc/invoke.texi (moutline-atomics): Document as on by default.
376 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
379 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
380 the check for NOTE_INSN_DELETED_LABEL.
382 2020-04-30 Jakub Jelinek <jakub@redhat.com>
384 * configure.ac (--with-documentation-root-url,
385 --with-changes-root-url): Diagnose URL not ending with /,
386 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
387 * opts.h (get_changes_url): Remove.
388 * opts.c (get_changes_url): Remove.
389 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
390 or -DCHANGES_ROOT_URL.
391 * doc/install.texi (--with-documentation-root-url,
392 --with-changes-root-url): Document.
393 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
394 get_changes_url and free, change url variable type to const char * and
395 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
396 * config/s390/s390.c (s390_function_arg_vector,
397 s390_function_arg_float): Likewise.
398 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
400 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
402 * config.in: Regenerate.
403 * configure: Regenerate.
405 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
408 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
410 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
412 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
413 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
415 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
417 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
418 Change constraint for vlrl/vstrl to jb4.
420 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
422 * var-tracking.c (vt_initialize): Move variables pre and post
423 into inner block and initialize both in order to fix warning
424 about uninitialized use. Remove unnecessary checks for
425 frame_pointer_needed.
427 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
429 * toplev.c (output_stack_usage_1): Ensure that first
430 argument to fprintf is not null.
432 2020-04-29 Jakub Jelinek <jakub@redhat.com>
434 * configure.ac (-with-changes-root-url): New configure option,
435 defaulting to https://gcc.gnu.org/.
436 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
438 * pretty-print.c (get_end_url_string): New function.
439 (pp_format): Handle %{ and %} for URLs.
440 (pp_begin_url): Use pp_string instead of pp_printf.
441 (pp_end_url): Use get_end_url_string.
442 * opts.h (get_changes_url): Declare.
443 * opts.c (get_changes_url): New function.
444 * config/rs6000/rs6000-call.c: Include opts.h.
445 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
446 of just in GCC 10.1 in diagnostics and add URL.
447 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
448 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
450 * config/s390/s390.c (s390_function_arg_vector,
451 s390_function_arg_float): Likewise.
452 * configure: Regenerated.
455 * config/s390/s390.c (s390_function_arg_vector,
456 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
457 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
458 passed to the function rather than the type of the single element.
459 Rename cxx17_empty_base_seen variable to empty_base_seen, change
460 type to int, and adjust diagnostics depending on if the field
461 has [[no_unique_attribute]] or not.
464 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
465 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
466 used in casts into parens.
467 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
468 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
469 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
470 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
471 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
472 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
473 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
474 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
475 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
476 _mm256_mask_cmp_epu8_mask): Likewise.
477 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
478 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
479 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
480 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
483 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
484 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
485 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
486 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
487 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
488 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
489 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
490 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
491 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
492 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
493 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
494 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
495 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
497 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
498 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
499 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
500 as mask vector containing -1.0 or -1.0f elts, but instead vector
501 with all bits set using _mm*_cmpeq_p? with zero operands.
502 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
503 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
504 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
505 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
506 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
507 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
508 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
509 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
510 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
511 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
512 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
513 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
514 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
515 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
516 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
517 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
518 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
520 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
521 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
522 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
523 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
524 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
525 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
526 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
527 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
528 _mm512_mask_prefetch_i64scatter_ps): Likewise.
529 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
530 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
531 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
532 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
533 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
534 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
535 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
536 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
537 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
538 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
539 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
540 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
541 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
542 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
543 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
544 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
545 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
546 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
547 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
548 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
549 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
550 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
551 _mm_mask_i64scatter_epi64): Likewise.
553 2020-04-29 Jeff Law <law@redhat.com>
555 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
556 division instructions are 4 bytes long.
558 2020-04-29 Jakub Jelinek <jakub@redhat.com>
561 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
562 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
563 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
564 take address of TARGET_EXPR of fenv_var with void_node initializer.
567 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
569 PR tree-optimization/94774
570 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
573 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
575 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
576 * calls.c (cxx17_empty_base_field_p): New function. Check
577 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
580 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
583 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
584 Allow -fcf-protection with -mindirect-branch=thunk-extern and
585 -mfunction-return=thunk-extern.
586 * doc/invoke.texi: Update notes for -fcf-protection=branch with
587 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
589 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
591 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
593 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
595 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
596 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
597 fenv_var and new_fenv_var.
599 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
601 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
602 effective-target keyword.
603 (arm_arch_v8a_hard_multilib): Likewise.
604 (arm_arch_v8a_hard): Document new dg-add-options keyword.
605 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
606 code is deprecated and has not been updated to handle
607 DECL_FIELD_ABI_IGNORED.
608 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
609 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
610 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
611 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
612 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
613 something actually is a HFA or HVA. Record whether we see a
614 [[no_unique_address]] field that previous GCCs would not have
616 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
617 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
618 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
620 (arm_needs_doubleword_align): Add a comment explaining why we
621 consider even zero-sized fields.
623 2020-04-29 Richard Biener <rguenther@suse.de>
624 Li Zekun <lizekun1@huawei.com>
627 * tree.c (component_ref_size): Guard against error_mark_node
628 DECL_INITIAL as it happens with LTO.
630 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
632 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
633 comment explaining why we consider even zero-sized fields.
634 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
635 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
636 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
637 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
638 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
639 something actually is a HFA or HVA. Record whether we see a
640 [[no_unique_address]] field that previous GCCs would not have
642 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
643 whether diagnostics should be suppressed. Update the calls to
644 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
645 [[no_unique_address]] case.
646 (aarch64_return_in_msb): Update call accordingly, never silencing
648 (aarch64_function_value): Likewise.
649 (aarch64_return_in_memory_1): Likewise.
650 (aarch64_init_cumulative_args): Likewise.
651 (aarch64_gimplify_va_arg_expr): Likewise.
652 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
653 use it to decide whether arch64_vfp_is_call_or_return_candidate
655 (aarch64_pass_by_reference): Update calls accordingly.
656 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
657 to decide whether arch64_vfp_is_call_or_return_candidate should be
660 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
663 * config/aarch64/aarch64-builtins.c
664 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
665 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
668 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
670 * configure.ac <$enable_offload_targets>: Do parsing as done
672 * configure: Regenerate.
674 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
675 * configure: Regenerate.
678 * rtlanal.c (set_noop_p): Handle non-constant selectors.
681 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
683 (TARGET_EXCEPT_UNWIND_INFO): Define.
685 2020-04-29 Jakub Jelinek <jakub@redhat.com>
688 * config/gcn/gcn.md (*mov<mode>_insn): Use
689 'reg_overlap_mentioned_p' to check for overlap.
692 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
693 instead of cxx17_empty_base_field_p.
696 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
697 DECL_FIELD_ABI_IGNORED.
698 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
699 * calls.h (cxx17_empty_base_field_p): Change into a temporary
700 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
702 * calls.c (cxx17_empty_base_field_p): Remove.
703 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
704 DECL_FIELD_ABI_IGNORED.
705 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
706 * lto-streamer-out.c (hash_tree): Likewise.
707 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
708 cxx17_empty_base_seen to empty_base_seen, change type to int *,
709 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
710 cxx17_empty_base_field_p, if "no_unique_address" attribute is
711 present, propagate that to the caller too.
712 (rs6000_discover_homogeneous_aggregate): Adjust
713 rs6000_aggregate_candidate caller, emit different diagnostics
714 when c++17 empty base fields are present and when empty
715 [[no_unique_address]] fields are present.
716 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
717 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
720 2020-04-29 Richard Biener <rguenther@suse.de>
722 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
723 Just check whether the stmt stores.
725 2020-04-28 Alexandre Oliva <oliva@adacore.com>
728 * gcc/config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
729 output operand in emulation. Don't overwrite pseudos.
731 2020-04-28 Jeff Law <law@redhat.com>
733 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
734 multiply patterns are 4 bytes long.
736 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
738 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
739 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
741 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
742 Jakub Jelinek <jakub@redhat.com>
745 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
746 base class artificial fields.
747 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
748 decision is different after this fix.
750 2020-04-28 David Malcolm <dmalcolm@redhat.com>
756 * doc/invoke.texi (Static Analyzer Options): Remove
757 -Wanalyzer-use-of-uninitialized-value.
758 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
760 2020-04-28 Jakub Jelinek <jakub@redhat.com>
762 PR tree-optimization/94809
763 * tree.c (build_call_expr_internal_loc_array): Call
764 process_call_operands.
766 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
768 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
769 * config/aarch64/aarch64-tune.md: Regenerate.
770 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
771 (thunderx3t110_regmove_cost): Likewise.
772 (thunderx3t110_vector_cost): Likewise.
773 (thunderx3t110_prefetch_tune): Likewise.
774 (thunderx3t110_tunings): Likewise.
775 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
777 * config/aarch64/thunderx3t110.md: New file.
778 * config/aarch64/aarch64.md: Include thunderx3t110.md.
779 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
781 2020-04-28 Jakub Jelinek <jakub@redhat.com>
784 * config/s390/s390.c (s390_function_arg_vector,
785 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
787 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
789 PR tree-optimization/94727
790 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
791 operands are invariant booleans, use the mask type associated with the
792 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
793 (vectorizable_condition): Pass vectype unconditionally to
796 2020-04-27 Jakub Jelinek <jakub@redhat.com>
799 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
800 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
801 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
803 2020-04-27 David Malcolm <dmalcolm@redhat.com>
806 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
807 default value, so that it can by supplied by get_option_html_page.
808 * configure: Regenerate.
809 * opts.c: Include "selftest.h".
810 (get_option_html_page): New function.
811 (get_option_url): Use it. Reformat to place comments next to the
812 expressions they refer to.
813 (selftest::test_get_option_html_page): New.
814 (selftest::opts_c_tests): New.
815 * selftest-run-tests.c (selftest::run_tests): Call
816 selftest::opts_c_tests.
817 * selftest.h (selftest::opts_c_tests): New decl.
819 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
821 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
822 UINTVAL to CONST_INTs.
824 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
826 * config/arm/constraints.md (e): Remove constraint.
827 (Te): Define constraint.
828 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
829 operand 0 from "e" to "Te".
830 (vaddvaq_<supf><mode>): Likewise.
831 (vaddvq_p_<supf><mode>): Likewise.
832 (vmladavq_<supf><mode>): Likewise.
833 (vmladavxq_s<mode>): Likewise.
834 (vmlsdavq_s<mode>): Likewise.
835 (vmlsdavxq_s<mode>): Likewise.
836 (vaddvaq_p_<supf><mode>): Likewise.
837 (vmladavaq_<supf><mode>): Likewise.
838 (vmladavq_p_<supf><mode>): Likewise.
839 (vmladavxq_p_s<mode>): Likewise.
840 (vmlsdavq_p_s<mode>): Likewise.
841 (vmlsdavxq_p_s<mode>): Likewise.
842 (vmlsdavaxq_s<mode>): Likewise.
843 (vmlsdavaq_s<mode>): Likewise.
844 (vmladavaxq_s<mode>): Likewise.
845 (vmladavaq_p_<supf><mode>): Likewise.
846 (vmladavaxq_p_s<mode>): Likewise.
847 (vmlsdavaq_p_s<mode>): Likewise.
848 (vmlsdavaxq_p_s<mode>): Likewise.
850 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
852 * config/arm/arm.c (output_move_neon): Only get the first operand if
855 2020-04-27 Felix Yang <felix.yang@huawei.com>
857 PR tree-optimization/94784
858 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
859 assert around so that it checks that the two vectors have equal
860 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
861 types is a useless_type_conversion_p.
863 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
866 * dwarf2cfi.c (struct GTY): Add ra_mangled.
867 (cfi_row_equal_p): Check ra_mangled.
868 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
869 this only handles the sparc logic now.
870 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
871 the aarch64 specific logic.
872 (dwarf2out_frame_debug): Update to use the new subroutines.
873 (change_cfi_row): Check ra_mangled.
875 2020-04-27 Jakub Jelinek <jakub@redhat.com>
878 * config/s390/s390.c (s390_function_arg_vector,
879 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
881 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
883 * common/config/rs6000/rs6000-common.c
884 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
886 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
889 2020-04-27 Martin Liska <mliska@suse.cz>
892 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
893 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
895 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
898 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
900 (rs6000_emit_prologue_components):
901 Check with frame_pointer_needed_indeed.
902 (rs6000_emit_epilogue_components): Likewise.
903 (rs6000_emit_prologue): Likewise.
904 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
906 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
908 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
909 stack frame when debugging and flag_compare_debug is enabled.
911 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
913 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
914 enable PC-relative addressing for -mcpu=future.
915 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
916 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
917 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
918 suppress PC-relative addressing.
919 (rs6000_option_override_internal): Split up error messages
920 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
923 2020-04-25 Jakub Jelinek <jakub@redhat.com>
924 Richard Biener <rguenther@suse.de>
926 PR tree-optimization/94734
927 PR tree-optimization/89430
928 * tree-ssa-phiopt.c: Include tree-eh.h.
929 (cond_store_replacement): Return false if an automatic variable
930 access could trap. If -fstore-data-races, don't return false
931 just because an automatic variable is addressable.
933 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
935 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
937 (add<mode>_sext_dup2_exec): Likewise.
939 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
942 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
943 endian byteshift_val calculation.
945 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
947 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
949 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
951 * config/aarch64/arm_sve.h: Add a comment.
953 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
955 PR rtl-optimization/94708
956 * combine.c (simplify_if_then_else): Add check for
957 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
959 2020-04-23 Martin Sebor <msebor@redhat.com>
962 * common.opt (-Wno-frame-larger-than): New option.
963 (-Wno-larger-than, -Wno-stack-usage): Same.
965 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
967 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
969 (mov<mode>_exec): Likewise.
970 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
971 (<convop><mode><vndi>2_exec): Likewise.
973 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
975 PR tree-optimization/94717
976 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
977 of the stores doesn't have the same landing pad number as the first.
978 (coalesce_immediate_stores): Do not try to coalesce the store using
979 bswap if it doesn't have the same landing pad number as the first.
981 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
983 * gcc/doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
984 Replace outdated link to ELFv2 ABI.
986 2020-04-23 Jakub Jelinek <jakub@redhat.com>
989 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
993 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
994 temporarily with non-final second operand and updating it later,
995 push COMPOUND_EXPRs into a vector and process it in reverse,
996 creating COMPOUND_EXPRs with the final operands.
998 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
1001 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
1002 bti c and bti j handling.
1004 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
1005 Thomas Schwinge <thomas@codesourcery.com>
1009 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
1010 t_async and the wait arguments.
1012 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
1014 PR tree-optimization/94727
1015 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
1016 comparing invariant scalar booleans.
1018 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
1019 Jakub Jelinek <jakub@redhat.com>
1022 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
1023 empty base class artificial fields.
1024 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
1025 different after this fix.
1027 2020-04-23 Jakub Jelinek <jakub@redhat.com>
1030 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
1031 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
1032 if the same type has been diagnosed most recently already.
1034 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1036 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
1038 (__arm_vbicq_n_s16): Likewise.
1039 (__arm_vbicq_n_u32): Likewise.
1040 (__arm_vbicq_n_s32): Likewise.
1041 (__arm_vbicq): Likewise.
1042 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
1043 (__arm_vbicq_n_s32): Likewise.
1044 (__arm_vbicq_n_u16): Likewise.
1045 (__arm_vbicq_n_u32): Likewise.
1046 (__arm_vdupq_m_n_s8): Likewise.
1047 (__arm_vdupq_m_n_s16): Likewise.
1048 (__arm_vdupq_m_n_s32): Likewise.
1049 (__arm_vdupq_m_n_u8): Likewise.
1050 (__arm_vdupq_m_n_u16): Likewise.
1051 (__arm_vdupq_m_n_u32): Likewise.
1052 (__arm_vdupq_m_n_f16): Likewise.
1053 (__arm_vdupq_m_n_f32): Likewise.
1054 (__arm_vldrhq_gather_offset_s16): Likewise.
1055 (__arm_vldrhq_gather_offset_s32): Likewise.
1056 (__arm_vldrhq_gather_offset_u16): Likewise.
1057 (__arm_vldrhq_gather_offset_u32): Likewise.
1058 (__arm_vldrhq_gather_offset_f16): Likewise.
1059 (__arm_vldrhq_gather_offset_z_s16): Likewise.
1060 (__arm_vldrhq_gather_offset_z_s32): Likewise.
1061 (__arm_vldrhq_gather_offset_z_u16): Likewise.
1062 (__arm_vldrhq_gather_offset_z_u32): Likewise.
1063 (__arm_vldrhq_gather_offset_z_f16): Likewise.
1064 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
1065 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
1066 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
1067 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
1068 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
1069 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
1070 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
1071 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
1072 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
1073 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
1074 (__arm_vldrwq_gather_offset_s32): Likewise.
1075 (__arm_vldrwq_gather_offset_u32): Likewise.
1076 (__arm_vldrwq_gather_offset_f32): Likewise.
1077 (__arm_vldrwq_gather_offset_z_s32): Likewise.
1078 (__arm_vldrwq_gather_offset_z_u32): Likewise.
1079 (__arm_vldrwq_gather_offset_z_f32): Likewise.
1080 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
1081 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
1082 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
1083 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
1084 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
1085 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
1086 (__arm_vdwdupq_x_n_u8): Likewise.
1087 (__arm_vdwdupq_x_n_u16): Likewise.
1088 (__arm_vdwdupq_x_n_u32): Likewise.
1089 (__arm_viwdupq_x_n_u8): Likewise.
1090 (__arm_viwdupq_x_n_u16): Likewise.
1091 (__arm_viwdupq_x_n_u32): Likewise.
1092 (__arm_vidupq_x_n_u8): Likewise.
1093 (__arm_vddupq_x_n_u8): Likewise.
1094 (__arm_vidupq_x_n_u16): Likewise.
1095 (__arm_vddupq_x_n_u16): Likewise.
1096 (__arm_vidupq_x_n_u32): Likewise.
1097 (__arm_vddupq_x_n_u32): Likewise.
1098 (__arm_vldrdq_gather_offset_s64): Likewise.
1099 (__arm_vldrdq_gather_offset_u64): Likewise.
1100 (__arm_vldrdq_gather_offset_z_s64): Likewise.
1101 (__arm_vldrdq_gather_offset_z_u64): Likewise.
1102 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
1103 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
1104 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
1105 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
1106 (__arm_vidupq_m_n_u8): Likewise.
1107 (__arm_vidupq_m_n_u16): Likewise.
1108 (__arm_vidupq_m_n_u32): Likewise.
1109 (__arm_vddupq_m_n_u8): Likewise.
1110 (__arm_vddupq_m_n_u16): Likewise.
1111 (__arm_vddupq_m_n_u32): Likewise.
1112 (__arm_vidupq_n_u16): Likewise.
1113 (__arm_vidupq_n_u32): Likewise.
1114 (__arm_vidupq_n_u8): Likewise.
1115 (__arm_vddupq_n_u16): Likewise.
1116 (__arm_vddupq_n_u32): Likewise.
1117 (__arm_vddupq_n_u8): Likewise.
1119 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
1121 * doc/install.texi (D-Specific Options): Document
1122 --enable-libphobos-checking and --with-libphobos-druntime-only.
1124 2020-04-23 Jakub Jelinek <jakub@redhat.com>
1127 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
1128 cxx17_empty_base_seen argument. Pass it to recursive calls.
1129 Ignore cxx17_empty_base_field_p fields after setting
1130 *cxx17_empty_base_seen to true.
1131 (rs6000_discover_homogeneous_aggregate): Adjust
1132 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
1133 aggregates with C++17 empty base fields.
1136 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1137 if last_decl is error_mark_node or has such a TREE_TYPE.
1140 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
1141 if last_decl is error_mark_node or has such a TREE_TYPE.
1143 2020-04-22 Felix Yang <felix.yang@huawei.com>
1146 * config/aarch64/aarch64.h (TARGET_SVE):
1147 Add && !TARGET_GENERAL_REGS_ONLY.
1148 (TARGET_SVE2): Add && TARGET_SVE.
1149 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
1150 TARGET_SVE2_SM4): Add && TARGET_SVE2.
1151 * config/aarch64/aarch64-sve-builtins.h
1152 (sve_switcher::m_old_general_regs_only): New member.
1153 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
1155 (reported_missing_registers_p): New variable.
1156 (check_required_extensions): Call check_required_registers before
1157 return if all required extenstions are present.
1158 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
1159 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
1160 global_options.x_target_flags.
1161 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
1162 global_options.x_target_flags if m_old_general_regs_only is true.
1164 2020-04-22 Zackery Spytz <zspytz@gmail.com>
1166 * doc/extend.exi: Add "free" to list of other builtin functions
1169 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
1172 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
1174 (store_quadpti): Ditto.
1175 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
1176 plq will be used and doesn't need it.
1177 (atomic_store<mode>): Ditto, for pstq.
1179 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
1181 * doc/invoke.texi: Update flags turned on by -O3.
1183 2020-04-22 Jakub Jelinek <jakub@redhat.com>
1186 * config/ia64/ia64.c (hfa_element_mode): Ignore
1187 cxx17_empty_base_field_p fields.
1190 * calls.h (cxx17_empty_base_field_p): Declare.
1191 * calls.c (cxx17_empty_base_field_p): Define.
1193 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
1195 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
1197 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1198 Andre Vieira <andre.simoesdiasvieira@arm.com>
1199 Mihail Ionescu <mihail.ionescu@arm.com>
1201 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
1202 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
1203 (ALL_QUIRKS): Add quirk_no_asmcpu.
1204 (cortex-m55): Define new cpu.
1205 * config/arm/arm-tables.opt: Regenerate.
1206 * config/arm/arm-tune.md: Likewise.
1207 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
1209 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
1211 PR tree-optimization/94700
1212 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
1213 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
1214 of similarly-structured but distinct vector types.
1216 2020-04-21 Martin Sebor <msebor@redhat.com>
1219 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
1220 the computation of the lower bound of the source access size.
1221 (builtin_access::generic_overlap): Remove a hack for setting ranges
1224 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
1226 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
1227 (ASM_WEAKEN_DECL): New define.
1228 (HAVE_GAS_WEAKREF): Undefine.
1230 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
1232 PR tree-optimization/94683
1233 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
1234 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
1235 but distinct vector types.
1237 2020-04-21 Jakub Jelinek <jakub@redhat.com>
1240 * stor-layout.c (place_field, finalize_record_size): Don't emit
1241 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
1242 * ubsan.c (ubsan_get_type_descriptor_type,
1243 ubsan_get_source_location_type, ubsan_create_data): Set
1245 * asan.c (asan_global_struct): Likewise.
1247 2020-04-21 Duan bo <duanbo3@huawei.com>
1250 * config/aarch64/aarch64.c: Add an error message for option conflict.
1251 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
1252 incompatible with -fpic, -fPIC and -mabi=ilp32.
1254 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
1257 * omp-low.c (new_omp_context): Remove assignments to
1258 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
1260 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
1262 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
1263 ("popcountv2di2_vx"): Use simplify_gen_subreg.
1265 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
1268 * config/s390/s390-builtin-types.def: Add 3 new function modes.
1269 * config/s390/s390-builtins.def: Add mode dependent low-level
1270 builtin and map the overloaded builtins to these.
1271 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
1272 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
1274 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
1276 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
1277 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
1278 estimated VF and is no worse at double the estimated VF.
1280 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
1283 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
1284 order of arguments to rtx_vector_builder.
1285 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
1286 When extending the trailing constants to a full vector, replace any
1287 variables with zeros.
1289 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
1292 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
1295 2020-04-20 Martin Liska <mliska@suse.cz>
1297 * symtab.c (symtab_node::dump_references): Add space after
1299 (symtab_node::dump_referring): Likewise.
1301 2020-04-18 Jeff Law <law@redhat.com>
1304 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
1307 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
1309 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
1310 attributes): Document d_runtime_has_std_library.
1312 2020-04-17 Jeff Law <law@redhat.com>
1314 PR rtl-optimization/90275
1315 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
1316 when the destination has a REG_UNUSED note.
1318 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
1321 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
1324 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
1326 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
1327 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
1328 cost of load and store insns if one loop iteration has enough scalar
1329 elements to use an Advanced SIMD LDP or STP.
1330 (aarch64_add_stmt_cost): Update call accordingly.
1332 2020-04-17 Jakub Jelinek <jakub@redhat.com>
1333 Jeff Law <law@redhat.com>
1336 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
1337 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
1338 or pos + len >= 32, or pos + len is equal to operands[2] precision
1339 and operands[2] is not a register operand. During splitting perform
1340 SImode AND if operands[0] doesn't have CCZmode and pos + len is
1341 equal to mode precision.
1343 2020-04-17 Richard Biener <rguenther@suse.de>
1346 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
1348 * dwarf2out.c (dw_val_equal_p): Fix pasto in
1349 dw_val_class_vms_delta comparison.
1350 * optabs.c (expand_binop_directly): Fix pasto in commutation
1352 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
1355 2020-04-17 Jakub Jelinek <jakub@redhat.com>
1357 PR rtl-optimization/94618
1358 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
1359 insn is the BB_END of its block, but also when it is only followed
1360 by DEBUG_INSNs in its block.
1362 PR tree-optimization/94621
1363 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
1364 Move id->adjust_array_error_bounds check first in the condition.
1366 2020-04-17 Martin Liska <mliska@suse.cz>
1367 Jonathan Yong <10walls@gmail.com>
1369 PR gcov-profile/94570
1370 * coverage.c (coverage_init): Use separator properly.
1372 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
1374 PR rtl-optimization/93974
1375 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
1376 (rs6000_cannot_substitute_mem_equiv_p): New function.
1378 2020-04-16 Martin Jambor <mjambor@suse.cz>
1381 * ipa-inline.h (ipa_saved_clone_sources): Declare.
1382 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
1383 (save_inline_function_body): Link the new body holder with the
1385 * cgraph.c: Include ipa-inline.h.
1386 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
1387 the statement in ipa_saved_clone_sources.
1388 * cgraphunit.c: Include ipa-inline.h.
1389 (expand_all_functions): Free ipa_saved_clone_sources.
1391 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
1394 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
1395 the VNx16BI lowpart of the recursively-generated constant.
1397 2020-04-16 Martin Liska <mliska@suse.cz>
1398 Jakub Jelinek <jakub@redhat.com>
1401 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
1402 DECL_IS_REPLACEABLE_OPERATOR during cloning.
1403 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
1404 (propagate_necessity): Check operator names.
1406 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
1408 PR rtl-optimization/94605
1409 * early-remat.c (early_remat::process_block): Handle insns that
1410 set multiple candidate registers.
1411 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
1413 PR gcov-profile/93401
1414 * common.opt (profile-prefix-path): New option.
1415 * coverae.c: Include diagnostics.h.
1416 (coverage_init): Strip profile prefix path.
1417 * doc/invoke.texi (-fprofile-prefix-path): Document.
1419 2020-04-16 Richard Biener <rguenther@suse.de>
1422 * expr.c (emit_move_multi_word): Do not generate code when
1423 the destination part is undefined_operand_subword_p.
1424 * lower-subreg.c (resolve_clobber): Look through a paradoxica
1427 2020-04-16 Martin Jambor <mjambor@suse.cz>
1429 PR tree-optimization/94598
1430 * tree-sra.c (verify_sra_access_forest): Fix verification of total
1431 scalarization accesses under access to one-element arrays.
1433 2020-04-16 Jakub Jelinek <jakub@redhat.com>
1436 * function.c (assign_parm_find_data_types): Add workaround for
1437 BROKEN_VALUE_INITIALIZATION compilers.
1439 2020-04-16 Richard Biener <rguenther@suse.de>
1441 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
1444 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
1447 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
1448 Require OPTION_MASK_ISA_SSE2.
1450 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
1453 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
1454 Don't construct a dump_context temporary to call static method.
1456 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
1458 * config/aarch64/falkor-tag-collision-avoidance.c
1459 (valid_src_p): Check for aarch64_address_info type before
1460 accessing base field.
1462 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
1464 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
1465 (V_sz_elem2): Remove unused mode attribute.
1467 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
1469 * config/arm/arm.md (arm_movdi): Disallow for MVE.
1471 2020-04-15 Richard Biener <rguenther@suse.de>
1474 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
1475 alias_sets_conflict_p for pointers.
1477 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
1480 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
1481 (extendhisi2_internal): Add %v1 before the load instructions.
1483 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
1486 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
1487 use PC-relative addressing for TLS references.
1489 2020-04-14 Martin Jambor <mjambor@suse.cz>
1492 * ipa-sra.c: Include internal-fn.h.
1493 (enum isra_scan_context): Update comment.
1494 (scan_function): Treat calls to internal_functions like loads or stores.
1496 2020-04-14 Yang Yang <yangyang305@huawei.com>
1498 PR tree-optimization/94574
1499 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
1500 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
1502 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
1505 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
1507 2020-04-13 Martin Sebor <msebor@redhat.com>
1509 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
1510 -Wformat-truncation. Move -Wzero-length-bounds last.
1511 (-Wrestrict): Document positive form of option enabled by -Wall.
1513 2020-04-13 Zachary Spytz <zspytz@gmail.com>
1515 * doc/extend.texi: Add realloc to list of built-in functions
1516 are recognized by the compiler.
1518 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
1521 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
1522 pointer in word_mode for eh_return epilogues.
1524 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1526 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
1527 memory references in %B, %C and %D operand selectors when the inner
1528 operand is a post increment address.
1530 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1532 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
1533 reference by 4 bytes, and %D memory reference by 6 bytes.
1535 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
1538 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
1539 condition for V4SI, V8HI and V16QI modes.
1541 2020-04-11 Jakub Jelinek <jakub@redhat.com>
1545 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
1548 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
1552 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
1553 "#pragma omp declare target" has also been applied.
1555 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1557 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
1558 when to emit the epilogue_helper insn.
1559 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
1562 2020-04-09 Jakub Jelinek <jakub@redhat.com>
1565 * cselib.h (cselib_record_sp_cfa_base_equiv,
1566 cselib_sp_derived_value_p): Declare.
1567 * cselib.c (cselib_record_sp_cfa_base_equiv,
1568 cselib_sp_derived_value_p): New functions.
1569 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
1570 cselib_sp_derived_value_p values.
1571 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
1572 start of extended basic blocks other than the first one
1573 for !frame_pointer_needed functions.
1575 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1577 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
1578 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
1579 (aarch64_sve2048_hw): Document.
1580 * config/aarch64/aarch64-protos.h
1581 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
1582 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
1583 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
1584 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
1586 (find_type_suffix_for_scalar_type): Use it instead of comparing
1588 (function_resolver::infer_vector_or_tuple_type): Likewise.
1589 (function_resolver::require_vector_type): Likewise.
1590 (handle_arm_sve_vector_bits_attribute): New function.
1591 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
1592 (aarch64_attribute_table): Add arm_sve_vector_bits.
1593 (aarch64_return_in_memory_1):
1594 (pure_scalable_type_info::piece::get_rtx): New function.
1595 (pure_scalable_type_info::num_zr): Likewise.
1596 (pure_scalable_type_info::num_pr): Likewise.
1597 (pure_scalable_type_info::get_rtx): Likewise.
1598 (pure_scalable_type_info::analyze): Likewise.
1599 (pure_scalable_type_info::analyze_registers): Likewise.
1600 (pure_scalable_type_info::analyze_array): Likewise.
1601 (pure_scalable_type_info::analyze_record): Likewise.
1602 (pure_scalable_type_info::add_piece): Likewise.
1603 (aarch64_some_values_include_pst_objects_p): Likewise.
1604 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
1605 to analyze whether the type is returned in SVE registers.
1606 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
1607 is passed in SVE registers.
1608 (aarch64_pass_by_reference_1): New function, extracted from...
1609 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
1610 to analyze whether the type is a pure scalable type and, if so,
1611 whether it should be passed by reference.
1612 (aarch64_return_in_msb): Return false for pure scalable types.
1613 (aarch64_function_value_1): Fold back into...
1614 (aarch64_function_value): ...this function. Use
1615 pure_scalable_type_info to analyze whether the type is a pure
1616 scalable type and, if so, which registers it should use. Handle
1617 types that include pure scalable types but are not themselves
1618 pure scalable types.
1619 (aarch64_return_in_memory_1): New function, split out from...
1620 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
1621 to analyze whether the type is a pure scalable type and, if so,
1622 whether it should be returned by reference.
1623 (aarch64_layout_arg): Remove orig_mode argument. Use
1624 pure_scalable_type_info to analyze whether the type is a pure
1625 scalable type and, if so, which registers it should use. Handle
1626 types that include pure scalable types but are not themselves
1627 pure scalable types.
1628 (aarch64_function_arg): Update call accordingly.
1629 (aarch64_function_arg_advance): Likewise.
1630 (aarch64_pad_reg_upward): On big-endian targets, return false for
1631 pure scalable types that are smaller than 16 bytes.
1632 (aarch64_member_type_forces_blk): New function.
1633 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
1634 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
1635 correspond to built-in SVE types. Do not rely on a vector mode
1636 if the type includes an pure scalable type. When returning true,
1637 assert that the mode is not an SVE mode.
1638 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
1639 built-in types here. When returning true, assert that the type
1640 does not have an SVE mode.
1641 (aarch64_can_change_mode_class): Don't allow anything to change
1642 between a predicate mode and a non-predicate mode. Also don't
1643 allow changes between SVE vector modes and other modes that
1644 might be bigger than 128 bits.
1645 (aarch64_invalid_binary_op): Reject binary operations that mix
1646 SVE and GNU vector types.
1647 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
1649 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1651 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
1652 "SVE sizeless type".
1653 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
1654 (sizeless_type_p): New functions.
1655 (register_builtin_types): Apply make_type_sizeless to the type.
1656 (register_tuple_type): Likewise.
1657 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
1659 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
1661 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
1664 2020-04-09 Martin Jambor <mjambor@suse.cz>
1665 Richard Biener <rguenther@suse.de>
1667 PR tree-optimization/94482
1668 * tree-sra.c (create_access_replacement): Dump new replacement with
1670 (sra_modify_expr): Fix handling of cases when the original EXPR writes
1671 to only part of the replacement.
1672 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
1673 the first operand of combinations into REAL/IMAGPART_EXPR and
1676 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
1678 * doc/sourcebuild.texi (check-function-bodies): Treat the third
1679 parameter as a list of option regexps and require each regexp
1682 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
1685 * config/aarch64/falkor-tag-collision-avoidance.c
1686 (valid_src_p): Fix missing rtx type check.
1688 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
1689 Richard Biener <rguenther@suse.de>
1691 PR tree-optimization/93674
1692 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
1693 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
1694 or non-mode precision type, add candidate in unsigned type with the
1697 2020-04-08 Clement Chigot <clement.chigot@atos.net>
1699 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
1700 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
1701 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
1703 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1706 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
1708 * reload1.c (eliminate_regs_1): Avoid creating
1709 (plus (reg) (const_int 0)) in DEBUG_INSNs.
1711 PR tree-optimization/94524
1712 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
1713 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
1714 op1 rather than op1 itself at the end. Punt for signed modulo by
1715 most negative constant.
1716 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
1717 modulo by most negative constant.
1719 2020-04-08 Richard Biener <rguenther@suse.de>
1721 PR rtl-optimization/93946
1722 * cse.c (cse_insn): Record the tabled expression in
1723 src_related. Verify a redundant store removal is valid.
1725 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
1728 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
1729 ENDBR at function entry if function will be called indirectly.
1731 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1734 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
1737 2020-04-08 Martin Liska <mliska@suse.cz>
1740 * gimple.c (gimple_call_operator_delete_p): Rename to...
1741 (gimple_call_replaceable_operator_delete_p): ... this.
1742 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1743 * gimple.h (gimple_call_operator_delete_p): Rename to ...
1744 (gimple_call_replaceable_operator_delete_p): ... this.
1745 * tree-core.h (tree_function_decl): Add replaceable_operator
1747 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
1748 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
1749 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
1750 (eliminate_unnecessary_stmts): Likewise.
1751 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
1752 Pack DECL_IS_REPLACEABLE_OPERATOR.
1753 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
1754 Unpack the field here.
1755 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
1756 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
1757 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
1758 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
1759 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
1760 replaceable operator flags.
1762 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
1763 Matthew Malcomson <matthew.malcomson@arm.com>
1765 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
1766 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
1767 (CX_TERNARY_QUALIFIERS): Likewise.
1768 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
1769 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
1770 (arm_init_acle_builtins): Initialize CDE builtins.
1771 (arm_expand_acle_builtin): Check CDE constant operands.
1772 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
1773 of CDE constant operand.
1774 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
1776 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
1777 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
1778 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
1779 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
1780 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
1781 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
1782 * config/arm/arm_cde_builtins.def: New file.
1783 * config/arm/iterators.md (V_reg): New attribute of SI.
1784 * config/arm/predicates.md (const_int_coproc_operand): New.
1785 (const_int_vcde1_operand, const_int_vcde2_operand): New.
1786 (const_int_vcde3_operand): New.
1787 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
1788 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
1789 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
1790 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
1792 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
1794 * config.gcc: Add arm_cde.h.
1795 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
1796 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
1797 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
1798 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
1799 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
1800 * config/arm/arm.h (TARGET_CDE): New macro.
1801 * config/arm/arm_cde.h: New file.
1802 * doc/invoke.texi: Document CDE options +cdecp[0-7].
1803 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
1805 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
1807 2020-04-08 Jakub Jelinek <jakub@redhat.com>
1809 PR rtl-optimization/94516
1810 * postreload.c: Include rtl-iter.h.
1811 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
1812 looking for all MEMs with RTX_AUTOINC operand.
1813 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
1815 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
1817 * omp-grid.c (grid_eliminate_combined_simd_part): Use
1818 OMP_CLAUSE_CODE to access the omp clause code.
1820 2020-04-07 Jeff Law <law@redhat.com>
1822 PR rtl-optimization/92264
1823 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
1824 the destination is the stack pointer.
1826 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1828 PR rtl-optimization/94291
1829 PR rtl-optimization/84169
1830 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
1831 must be a REG or SUBREG of REG; if it is not one of these, don't
1834 2020-04-07 Richard Biener <rguenther@suse.de>
1837 * gimplify.c (gimplify_addr_expr): Also consider generated
1840 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1842 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
1844 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1846 * config/arm/arm_mve.h: Cast some pointers to expected types.
1848 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1850 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
1851 same with '__arm_' prefix.
1853 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1855 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
1857 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1859 * config/arm/arm.c (arm_mve_immediate_check): Removed.
1860 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
1861 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
1862 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
1863 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
1864 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
1865 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
1867 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1869 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
1871 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1873 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
1874 * config/arm/mve/md: Fix v[id]wdup patterns.
1876 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1878 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
1879 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
1881 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1883 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
1884 and remove const_ptr enums.
1886 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
1888 * config/arm/arm_mve.h (vsubq_n): Merge with...
1890 (vmulq_n): Merge with...
1892 (__ARM_mve_typeid): Simplify scalar and constant detection.
1894 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1897 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
1898 for inter-lane permutation for 64-byte modes.
1901 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
1902 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
1903 Assume it is a REG after that instead of testing it and doing FAIL
1904 otherwise. Formatting fix.
1906 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
1908 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
1910 2020-04-07 Jakub Jelinek <jakub@redhat.com>
1913 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
1914 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
1916 2020-04-06 Jakub Jelinek <jakub@redhat.com>
1918 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
1919 + const0_rtx return the SP_DERIVED_VALUE_P.
1921 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
1923 PR rtl-optimization/92989
1924 * lra-lives.c (process_bb_lives): Do not treat eh_return data
1925 registers as being live at the beginning of the EH receiver.
1927 2020-04-05 Zachary Spytz <zspytz@gmail.com>
1929 * extend.texi: Add free to list of ISO C90 functions that
1930 are recognized by the compiler.
1932 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
1934 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
1937 * config/microblaze/microblaze.md (trap): Update output pattern.
1939 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
1940 Jakub Jelinek <jakub@redhat.com>
1943 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
1944 arrays, pointer-to-members, function types and qualifiers when
1945 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
1946 to emit type again on definition.
1948 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
1951 * ipa-fnsummary.c (vrp_will_run_p): New function.
1952 (fre_will_run_p): New function.
1953 (evaluate_properties_for_edge): Use it.
1954 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
1955 !optimize_debug to optimize_debug.
1957 2020-04-04 Jakub Jelinek <jakub@redhat.com>
1959 PR rtl-optimization/94468
1960 * cselib.c (references_value_p): Formatting fix.
1961 (cselib_useless_value_p): New function.
1962 (discard_useless_locs, discard_useless_values,
1963 cselib_invalidate_regno_val, cselib_invalidate_mem,
1964 cselib_record_set): Use it instead of
1965 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
1968 * tree-iterator.h (expr_single): Declare.
1969 * tree-iterator.c (expr_single): New function.
1970 * tree.h (protected_set_expr_location_if_unset): Declare.
1971 * tree.c (protected_set_expr_location): Use expr_single.
1972 (protected_set_expr_location_if_unset): New function.
1974 2020-04-03 Jeff Law <law@redhat.com>
1976 PR rtl-optimization/92264
1977 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
1978 reloading of auto-increment addressing modes.
1980 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
1983 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
1986 2020-04-03 Jeff Law <law@redhat.com>
1988 PR rtl-optimization/92264
1989 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
1990 post-increment addressing of source operands as well as residuals
1991 when computing any adjustments to the input pointer.
1993 2020-04-03 Jakub Jelinek <jakub@redhat.com>
1996 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
1997 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
1998 second half of first lane from first lane of second operand and
1999 first half of second lane from second lane of first operand.
2001 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
2003 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
2005 2020-04-03 Tamar Christina <tamar.christina@arm.com>
2008 * common/config/aarch64/aarch64-common.c
2009 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
2011 2020-04-03 Richard Biener <rguenther@suse.de>
2014 * tree.c (array_ref_low_bound): Deal with released SSA names
2017 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
2019 * config/gcn/gcn.c (print_operand): Handle unordered comparison
2021 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
2022 comparison operators.
2024 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
2026 PR tree-optimization/94443
2027 * tree-vect-loop.c (vectorizable_live_operation): Use
2028 gsi_insert_seq_before to replace gsi_insert_before.
2030 2020-04-03 Martin Liska <mliska@suse.cz>
2033 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
2034 Compare type attributes for gimple_call_fntypes.
2036 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
2038 * alias.c (get_alias_set): Fix comment typos.
2040 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
2043 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
2044 attribute checking used by TYPE.
2046 2020-04-02 Martin Jambor <mjambor@suse.cz>
2049 * ipa-sra.c (struct caller_issues): New fields candidate and
2050 call_from_outside_comdat.
2051 (check_for_caller_issues): Check for calls from outsied of
2052 candidate's same_comdat_group.
2053 (check_all_callers_for_issues): Set up issues.candidate, check result
2055 (mark_callers_calls_comdat_local): New function.
2056 (process_isra_node_results): Set calls_comdat_local of callers if
2059 2020-04-02 Richard Biener <rguenther@suse.de>
2062 * common.opt (ffinite-loops): Initialize to zero.
2063 * opts.c (default_options_table): Remove OPT_ffinite_loops
2065 * cfgloop.h (loop::finite_p): New member.
2066 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
2067 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
2069 * lto-streamer-in.c (input_cfg): Stream finite_p.
2070 * lto-streamer-out.c (output_cfg): Likewise.
2071 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
2072 from flag_finite_loops at CFG build time.
2073 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
2074 finite_p flag instead of flag_finite_loops.
2075 * doc/invoke.texi (ffinite-loops): Adjust documentation of
2078 2020-04-02 Richard Biener <rguenther@suse.de>
2081 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
2082 DW_TAG_imported_unit.
2084 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
2086 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
2087 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
2090 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
2092 PR tree-optimization/94401
2093 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
2094 access type when loading halves of vector to avoid peeling for gaps.
2096 2020-04-02 Jakub Jelinek <jakub@redhat.com>
2098 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
2099 between a string literal and MIPS_SYSVERSION_SPEC macro.
2101 2020-04-02 Martin Jambor <mjambor@suse.cz>
2103 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
2105 2020-04-02 Jakub Jelinek <jakub@redhat.com>
2107 PR rtl-optimization/92264
2108 * params.opt (-param=max-find-base-term-values=): Decrease default
2111 PR rtl-optimization/92264
2112 * rtl.h (struct rtx_def): Mention that call bit is used as
2113 SP_DERIVED_VALUE_P in cselib.c.
2114 * cselib.c (SP_DERIVED_VALUE_P): Define.
2115 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
2116 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
2117 val_rtx and sp based expression where offsets cancel each other.
2118 (preserve_constants_and_equivs): Formatting fix.
2119 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
2120 locs list for cfa_base_preserved_val if needed. Formatting fix.
2121 (autoinc_split): If the to be returned value is a REG, MEM or
2122 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
2123 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
2124 (rtx_equal_for_cselib_1): Call autoinc_split even if both
2125 expressions are PLUS in Pmode with CONST_INT second operands.
2126 Handle SP_DERIVED_VALUE_P cases.
2127 (cselib_hash_plus_const_int): New function.
2128 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
2129 second operand, as well as for PRE_DEC etc. that ought to be
2130 hashed the same way.
2131 (cselib_subst_to_values): Substitute PLUS with Pmode and
2132 CONST_INT operand if the first operand is a VALUE which has
2133 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
2134 SP_DERIVED_VALUE_P + adjusted offset.
2135 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
2136 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
2137 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
2138 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
2139 on the sp value before calling cselib_add_permanent_equiv on the
2141 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
2142 in the insn without REG_INC note.
2143 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
2144 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
2147 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
2148 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
2150 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2153 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
2154 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
2155 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
2156 intrinsic defintion by adding a new builtin call to writeback into base
2158 (__arm_vldrdq_gather_base_wb_u64): Likewise.
2159 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
2160 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
2161 (__arm_vldrwq_gather_base_wb_s32): Likewise.
2162 (__arm_vldrwq_gather_base_wb_u32): Likewise.
2163 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
2164 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
2165 (__arm_vldrwq_gather_base_wb_f32): Likewise.
2166 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
2167 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
2168 builtin's qualifier.
2169 (vldrdq_gather_base_wb_z_u): Likewise.
2170 (vldrwq_gather_base_wb_u): Likewise.
2171 (vldrdq_gather_base_wb_u): Likewise.
2172 (vldrwq_gather_base_wb_z_s): Likewise.
2173 (vldrwq_gather_base_wb_z_f): Likewise.
2174 (vldrdq_gather_base_wb_z_s): Likewise.
2175 (vldrwq_gather_base_wb_s): Likewise.
2176 (vldrwq_gather_base_wb_f): Likewise.
2177 (vldrdq_gather_base_wb_s): Likewise.
2178 (vldrwq_gather_base_nowb_z_u): Define builtin.
2179 (vldrdq_gather_base_nowb_z_u): Likewise.
2180 (vldrwq_gather_base_nowb_u): Likewise.
2181 (vldrdq_gather_base_nowb_u): Likewise.
2182 (vldrwq_gather_base_nowb_z_s): Likewise.
2183 (vldrwq_gather_base_nowb_z_f): Likewise.
2184 (vldrdq_gather_base_nowb_z_s): Likewise.
2185 (vldrwq_gather_base_nowb_s): Likewise.
2186 (vldrwq_gather_base_nowb_f): Likewise.
2187 (vldrdq_gather_base_nowb_s): Likewise.
2188 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
2190 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
2191 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
2192 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
2193 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
2194 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
2195 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
2196 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
2197 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
2198 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
2199 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
2200 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
2202 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
2204 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
2205 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
2206 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
2207 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
2208 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
2209 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
2210 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
2211 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
2212 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
2214 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
2215 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
2216 Remove constraints from expander.
2217 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
2218 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
2219 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
2220 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
2221 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
2222 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
2224 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
2226 PR rtl-optimization/94123
2227 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
2228 flag_split_wide_types_early.
2230 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
2232 * doc/extend.texi (Common Function Attributes): Fix typo.
2234 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
2237 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
2240 2020-04-01 Zackery Spytz <zspytz@gmail.com>
2242 * doc/extend.texi: Fix a typo in the documentation of the
2243 copy function attribute.
2245 2020-04-01 Jakub Jelinek <jakub@redhat.com>
2248 * tree-object-size.c (pass_object_sizes::execute): Don't call
2249 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
2250 call replace_call_with_value.
2252 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
2254 PR tree-optimization/94043
2255 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
2256 phi for vec_lhs and use it for lane extraction.
2258 2020-03-31 Felix Yang <felix.yang@huawei.com>
2260 PR tree-optimization/94398
2261 * tree-vect-stmts.c (vectorizable_store): Instead of calling
2262 vect_supportable_dr_alignment, set alignment_support_scheme to
2263 dr_unaligned_supported for gather-scatter accesses.
2264 (vectorizable_load): Likewise.
2266 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
2268 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
2270 (vnsi, VnSI, vndi, VnDI): New mode attributes.
2271 (mov<mode>): Use <VnDI> in place of V64DI.
2272 (mov<mode>_exec): Likewise.
2273 (mov<mode>_sgprbase): Likewise.
2274 (reload_out<mode>): Likewise.
2275 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
2276 (gather_load<mode>v64si): Rename to ...
2277 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
2278 and <VnDI> in place of V64DI.
2279 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
2280 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
2281 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
2282 (scatter_store<mode>v64si): Rename to ...
2283 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2284 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
2285 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
2286 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
2287 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
2288 (ds_bpermute<mode>): Use <VnSI>.
2289 (addv64si3_vcc<exec_vcc>): Rename to ...
2290 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2291 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
2292 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
2293 (addcv64si3<exec_vcc>): Rename to ...
2294 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
2295 (subv64si3_vcc<exec_vcc>): Rename to ...
2296 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
2297 (subcv64si3<exec_vcc>): Rename to ...
2298 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
2299 (addv64di3): Rename to ...
2300 (add<mode>3): ... this, and use V_DI.
2301 (addv64di3_exec): Rename to ...
2302 (add<mode>3_exec): ... this, and use V_DI.
2303 (subv64di3): Rename to ...
2304 (sub<mode>3): ... this, and use V_DI.
2305 (subv64di3_exec): Rename to ...
2306 (sub<mode>3_exec): ... this, and use V_DI.
2307 (addv64di3_zext): Rename to ...
2308 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
2309 (addv64di3_zext_exec): Rename to ...
2310 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2311 (addv64di3_zext_dup): Rename to ...
2312 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
2313 (addv64di3_zext_dup_exec): Rename to ...
2314 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
2315 (addv64di3_zext_dup2): Rename to ...
2316 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2317 (addv64di3_zext_dup2_exec): Rename to ...
2318 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2319 (addv64di3_sext_dup2): Rename to ...
2320 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
2321 (addv64di3_sext_dup2_exec): Rename to ...
2322 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
2323 (<su>mulv64si3_highpart<exec>): Rename to ...
2324 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
2325 (mulv64di3): Rename to ...
2326 (mul<mode>3): ... this, and use V_DI and <VnSI>.
2327 (mulv64di3_exec): Rename to ...
2328 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
2329 (mulv64di3_zext): Rename to ...
2330 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
2331 (mulv64di3_zext_exec): Rename to ...
2332 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
2333 (mulv64di3_zext_dup2): Rename to ...
2334 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
2335 (mulv64di3_zext_dup2_exec): Rename to ...
2336 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
2337 (<expander>v64di3): Rename to ...
2338 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
2339 (<expander>v64di3_exec): Rename to ...
2340 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
2341 (<expander>v64si3<exec>): Rename to ...
2342 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2343 (v<expander>v64si3<exec>): Rename to ...
2344 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
2345 (<expander>v64si3<exec>): Rename to ...
2346 (<expander><vnsi>3<exec>): ... this, and use V_SI.
2347 (subv64df3<exec>): Rename to ...
2348 (sub<mode>3<exec>): ... this, and use V_DF.
2349 (truncv64di<mode>2): Rename to ...
2350 (trunc<vndi><mode>2): ... this, and use <VnDI>.
2351 (truncv64di<mode>2_exec): Rename to ...
2352 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
2353 (<convop><mode>v64di2): Rename to ...
2354 (<convop><mode><vndi>2): ... this, and use <VnDI>.
2355 (<convop><mode>v64di2_exec): Rename to ...
2356 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
2357 (vec_cmp<u>v64qidi): Rename to ...
2358 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
2359 (vec_cmp<u>v64qidi_exec): Rename to ...
2360 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
2361 (vcond_mask_<mode>di): Use <VnDI>.
2362 (maskload<mode>di): Likewise.
2363 (maskstore<mode>di): Likewise.
2364 (mask_gather_load<mode>v64si): Rename to ...
2365 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2366 (mask_scatter_store<mode>v64si): Rename to ...
2367 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
2368 (*<reduc_op>_dpp_shr_v64di): Rename to ...
2369 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2370 (*plus_carry_in_dpp_shr_v64si): Rename to ...
2371 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
2372 (*plus_carry_dpp_shr_v64di): Rename to ...
2373 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
2374 (vec_seriesv64si): Rename to ...
2375 (vec_series<mode>): ... this, and use V_SI.
2376 (vec_seriesv64di): Rename to ...
2377 (vec_series<mode>): ... this, and use V_DI.
2379 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
2381 * config/arc/arc.c (arc_print_operand): Use
2382 HOST_WIDE_INT_PRINT_DEC macro.
2384 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
2386 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
2388 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2390 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
2392 (__arm_vbicq): Likewise.
2394 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
2396 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
2398 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2400 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
2401 common section of both MVE Integer and MVE Floating Point.
2403 (vaddlvq_p): Likewise.
2404 (vaddvaq): Likewise.
2405 (vaddvq_p): Likewise.
2406 (vcmpcsq): Likewise.
2407 (vmlsdavxq): Likewise.
2408 (vmlsdavq): Likewise.
2409 (vmladavxq): Likewise.
2410 (vmladavq): Likewise.
2412 (vminavq): Likewise.
2414 (vmaxavq): Likewise.
2415 (vmlaldavq): Likewise.
2416 (vcmphiq): Likewise.
2417 (vaddlvaq): Likewise.
2418 (vrmlaldavhq): Likewise.
2419 (vrmlaldavhxq): Likewise.
2420 (vrmlsldavhq): Likewise.
2421 (vrmlsldavhxq): Likewise.
2422 (vmlsldavxq): Likewise.
2423 (vmlsldavq): Likewise.
2425 (vrmlaldavhaq): Likewise.
2426 (vcmpgeq_m_n): Likewise.
2427 (vmlsdavxq_p): Likewise.
2428 (vmlsdavq_p): Likewise.
2429 (vmlsdavaxq): Likewise.
2430 (vmlsdavaq): Likewise.
2431 (vaddvaq_p): Likewise.
2432 (vcmpcsq_m_n): Likewise.
2433 (vcmpcsq_m): Likewise.
2434 (vmladavxq_p): Likewise.
2435 (vmladavq_p): Likewise.
2436 (vmladavaxq): Likewise.
2437 (vmladavaq): Likewise.
2438 (vminvq_p): Likewise.
2439 (vminavq_p): Likewise.
2440 (vmaxvq_p): Likewise.
2441 (vmaxavq_p): Likewise.
2442 (vcmphiq_m): Likewise.
2443 (vaddlvaq_p): Likewise.
2444 (vmlaldavaq): Likewise.
2445 (vmlaldavaxq): Likewise.
2446 (vmlaldavq_p): Likewise.
2447 (vmlaldavxq_p): Likewise.
2448 (vmlsldavaq): Likewise.
2449 (vmlsldavaxq): Likewise.
2450 (vmlsldavq_p): Likewise.
2451 (vmlsldavxq_p): Likewise.
2452 (vrmlaldavhaxq): Likewise.
2453 (vrmlaldavhq_p): Likewise.
2454 (vrmlaldavhxq_p): Likewise.
2455 (vrmlsldavhaq): Likewise.
2456 (vrmlsldavhaxq): Likewise.
2457 (vrmlsldavhq_p): Likewise.
2458 (vrmlsldavhxq_p): Likewise.
2459 (vabavq_p): Likewise.
2460 (vmladavaq_p): Likewise.
2461 (vstrbq_scatter_offset): Likewise.
2462 (vstrbq_p): Likewise.
2463 (vstrbq_scatter_offset_p): Likewise.
2464 (vstrdq_scatter_base_p): Likewise.
2465 (vstrdq_scatter_base): Likewise.
2466 (vstrdq_scatter_offset_p): Likewise.
2467 (vstrdq_scatter_offset): Likewise.
2468 (vstrdq_scatter_shifted_offset_p): Likewise.
2469 (vstrdq_scatter_shifted_offset): Likewise.
2470 (vmaxq_x): Likewise.
2471 (vminq_x): Likewise.
2472 (vmovlbq_x): Likewise.
2473 (vmovltq_x): Likewise.
2474 (vmulhq_x): Likewise.
2475 (vmullbq_int_x): Likewise.
2476 (vmullbq_poly_x): Likewise.
2477 (vmulltq_int_x): Likewise.
2478 (vmulltq_poly_x): Likewise.
2481 2020-03-31 Jakub Jelinek <jakub@redhat.com>
2484 * config/aarch64/constraints.md (Uph): New constraint.
2485 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
2486 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
2489 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
2490 Jakub Jelinek <jakub@redhat.com>
2493 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
2494 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
2496 2020-03-31 Jakub Jelinek <jakub@redhat.com>
2498 PR tree-optimization/94403
2499 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
2500 ENUMERAL_TYPE lhs_type.
2502 PR rtl-optimization/94344
2503 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
2504 conversions, either on both operands of |^+ or just one. Handle
2505 also extra same precision conversion on RSHIFT_EXPR first operand
2506 provided RSHIFT_EXPR is performed in unsigned type.
2508 2020-03-30 David Malcolm <dmalcolm@redhat.com>
2510 * lra.c (finish_insn_code_data_once): Set the array elements
2511 to NULL after freeing them.
2513 2020-03-30 Andreas Schwab <schwab@suse.de>
2515 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
2518 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2520 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
2521 to skip defining builtins based on builtin_mask.
2523 2020-03-30 Jakub Jelinek <jakub@redhat.com>
2526 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
2527 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
2528 operand is a register. Don't enable masked variants for V*[QH]Imode.
2531 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
2532 <store_mask_constraint> instead of m in output operand constraint.
2533 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
2536 2020-03-30 Alan Modra <amodra@gmail.com>
2538 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
2539 (rs6000_indirect_call_template_1): Adjust to suit.
2540 * config/rs6000/rs6000.md (call_local): Merge call_local32,
2541 call_local64, and call_local_aix.
2542 (call_value_local): Simlarly.
2543 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
2544 and disable pattern when CALL_LONG.
2545 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
2546 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
2547 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
2549 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
2552 * doc/invoke.texi: Update -falign-functions, -falign-loops and
2553 -falign-jumps documentation.
2555 2020-03-29 Martin Liska <mliska@suse.cz>
2558 * cgraphunit.c (process_function_and_variable_attributes): Remove
2559 double 'attribute' words.
2561 2020-03-29 John David Anglin <dave.anglin@bell.net>
2563 * gcc/config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
2566 2020-03-28 Jakub Jelinek <jakub@redhat.com>
2569 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
2570 to true after setting size to integer_one_node.
2572 PR tree-optimization/94329
2573 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
2574 on the last stmt in a bb, make sure gsi_prev isn't done immediately
2577 2020-03-27 Alan Modra <amodra@gmail.com>
2580 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
2581 for PLT16_LO and PLT_PCREL.
2582 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
2583 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
2584 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
2586 2020-03-27 Martin Sebor <msebor@redhat.com>
2589 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
2591 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
2593 * config/gcn/gcn-valu.md:
2594 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
2595 (VEC_1REG_MODE): Delete.
2596 (VEC_1REG_ALT): Delete.
2597 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
2598 (VEC_1REG_INT_MODE): Delete.
2599 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
2600 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
2601 (VEC_2REG_MODE): Rename to V_2REG throughout.
2602 (VEC_REG_MODE): Rename to V_noHI throughout.
2603 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
2604 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
2605 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
2606 (VEC_INT_MODE): Delete.
2607 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
2608 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
2609 (FP_MODE): Delete and replace with FP throughout.
2610 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
2611 (VCMP_MODE): Rename to V_noQI throughout and move to top.
2612 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
2613 * config/gcn/gcn.md (FP): New mode iterator.
2614 (FP_1REG): New mode iterator.
2616 2020-03-27 David Malcolm <dmalcolm@redhat.com>
2618 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
2619 now emits two .dot files.
2620 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
2621 (graphviz_out::end_tr): Only close a TR, not a TD.
2622 (graphviz_out::begin_td): New.
2623 (graphviz_out::end_td): New.
2624 (graphviz_out::begin_trtd): New, replacing the old implementation
2625 of graphviz_out::begin_tr.
2626 (graphviz_out::end_tdtr): New, replacing the old implementation
2627 of graphviz_out::end_tr.
2628 * graphviz.h (graphviz_out::begin_td): New decl.
2629 (graphviz_out::end_td): New decl.
2630 (graphviz_out::begin_trtd): New decl.
2631 (graphviz_out::end_tdtr): New decl.
2633 2020-03-27 Richard Biener <rguenther@suse.de>
2636 * dwarf2out.c (should_emit_struct_debug): Return false for
2639 2020-03-27 Richard Biener <rguenther@suse.de>
2641 PR tree-optimization/94352
2642 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
2644 (ssa_propagation_engine::ssa_propagate): ... here after
2645 initializing curr_order.
2647 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
2649 PR tree-optimization/90332
2650 * tree-vect-stmts.c (vector_vector_composition_type): New function.
2651 (get_group_load_store_type): Adjust to call
2652 vector_vector_composition_type, extend it to construct with scalar
2654 (vectorizable_load): Likewise.
2656 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
2658 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
2659 (create_ddg_dep_no_link): Likewise.
2660 (add_cross_iteration_register_deps): Move debug instruction check.
2661 Other minor refactoring.
2662 (add_intra_loop_mem_dep): Do not check for debug instructions.
2663 (add_inter_loop_mem_dep): Likewise.
2664 (build_intra_loop_deps): Likewise.
2665 (create_ddg): Do not include debug insns into the graph.
2666 * ddg.h (struct ddg): Remove num_debug field.
2667 * modulo-sched.c (doloop_register_get): Adjust condition.
2668 (res_MII): Remove DDG num_debug field usage.
2669 (sms_schedule_by_order): Use assertion against debug insns.
2670 (ps_has_conflicts): Drop debug insn check.
2672 2020-03-26 Jakub Jelinek <jakub@redhat.com>
2675 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
2676 that contains exactly one non-DEBUG_BEGIN_STMT statement.
2679 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
2680 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
2681 a single non-debug stmt followed by one or more debug stmts.
2682 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
2683 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
2684 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
2685 gimple_seq_last to check if outer_stmt gbind could be reused and
2686 if yes and it is surrounded by any debug stmts, move them into the
2689 PR rtl-optimization/92264
2690 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
2691 for sp based values in !frame_pointer_needed
2692 && !ACCUMULATE_OUTGOING_ARGS functions.
2694 2020-03-26 Felix Yang <felix.yang@huawei.com>
2696 PR tree-optimization/94269
2697 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
2699 operation to single basic block.
2701 2020-03-25 Jeff Law <law@redhat.com>
2703 PR rtl-optimization/90275
2704 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
2707 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2710 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
2711 mode rather than VOIDmode.
2713 2020-03-25 Martin Sebor <msebor@redhat.com>
2716 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
2717 even for alloca calls resulting from system macro expansion.
2718 Include inlining context in all warnings.
2720 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
2723 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
2724 FPRs to change between SDmode and DDmode.
2726 2020-03-25 Martin Sebor <msebor@redhat.com>
2728 PR tree-optimization/94131
2729 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
2731 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
2732 types have constant sizes.
2734 2020-03-25 Martin Liska <mliska@suse.cz>
2737 * configure.ac: Report error only when --with-zstd
2739 * configure: Regenerate.
2741 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2744 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
2745 INSN_CODE (insn) to -1 when changing the pattern.
2747 2020-03-25 Martin Liska <mliska@suse.cz>
2751 * config/i386/i386-features.c (make_resolver_func): Drop
2752 public flag for resolver.
2753 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
2754 group for resolver and drop public flag if possible.
2755 * multiple_target.c (create_dispatcher_calls): Drop unique_name
2756 and resolution as we want to enable LTO privatization of the default
2759 2020-03-25 Martin Liska <mliska@suse.cz>
2762 * configure.ac: Respect --without-zstd and report
2763 error when we can't find header file with --with-zstd.
2764 * configure: Regenerate.
2766 2020-03-25 Jakub Jelinek <jakub@redhat.com>
2769 * varasm.c (output_constructor_array_range): If local->index
2770 RANGE_EXPR doesn't start at the current location in the constructor,
2771 skip needed number of bytes using assemble_zeros or assert we don't
2775 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
2776 counter instead of DECL_UID.
2778 PR tree-optimization/94300
2779 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
2780 is positive, make sure that off + size isn't larger than needed_len.
2782 2020-03-25 Richard Biener <rguenther@suse.de>
2783 Jakub Jelinek <jakub@redhat.com>
2786 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
2788 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
2790 * doc/sourcebuild.texi (ARM-specific attributes): Add
2792 (Features for dg-add-options): Add arm_fp_dp.
2794 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
2797 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
2799 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
2802 * omp-offload.c (omp_finish_file): Fix target-link handling if
2803 targetm_common.have_named_sections is false.
2805 2020-03-24 Jakub Jelinek <jakub@redhat.com>
2808 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
2812 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
2813 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
2814 If not after and at *incr_pos is a debug stmt, set stmt location to
2815 location of next non-debug stmt after it if any.
2818 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
2819 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
2820 worklist or set GF_PLF_2 just because it is used in a debug stmt in
2821 another bb. Formatting improvements.
2824 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
2825 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
2826 regardless of whether TREE_NO_WARNING is set on it or whether
2827 warn_unused_function is true or not.
2829 2020-03-23 Jeff Law <law@redhat.com>
2831 PR rtl-optimization/90275
2834 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
2835 (simplify_logical_relational_operation): Use it.
2837 2020-03-23 Jakub Jelinek <jakub@redhat.com>
2840 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
2841 ultimate rhs and if returned something different, reconstructing
2844 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
2846 * opts.c (print_filtered_help): Improve the help text for alias options.
2848 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2849 Andre Vieira <andre.simoesdiasvieira@arm.com>
2850 Mihail Ionescu <mihail.ionescu@arm.com>
2852 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
2853 (vshlcq_m_u8): Likewise.
2854 (vshlcq_m_s16): Likewise.
2855 (vshlcq_m_u16): Likewise.
2856 (vshlcq_m_s32): Likewise.
2857 (vshlcq_m_u32): Likewise.
2858 (__arm_vshlcq_m_s8): Define intrinsic.
2859 (__arm_vshlcq_m_u8): Likewise.
2860 (__arm_vshlcq_m_s16): Likewise.
2861 (__arm_vshlcq_m_u16): Likewise.
2862 (__arm_vshlcq_m_s32): Likewise.
2863 (__arm_vshlcq_m_u32): Likewise.
2864 (vshlcq_m): Define polymorphic variant.
2865 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
2866 Use builtin qualifier.
2867 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
2868 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
2869 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
2870 (mve_vshlcq_m_<supf><mode>): Likewise.
2872 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2874 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
2875 (UQSHL_QUALIFIERS): Likewise.
2876 (ASRL_QUALIFIERS): Likewise.
2877 (SQSHL_QUALIFIERS): Likewise.
2878 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
2880 (sqrshr): Define macro.
2881 (sqrshrl): Likewise.
2882 (sqrshrl_sat48): Likewise.
2888 (uqrshll): Likewise.
2889 (uqrshll_sat48): Likewise.
2896 (__arm_lsll): Define intrinsic.
2897 (__arm_asrl): Likewise.
2898 (__arm_uqrshll): Likewise.
2899 (__arm_uqrshll_sat48): Likewise.
2900 (__arm_sqrshrl): Likewise.
2901 (__arm_sqrshrl_sat48): Likewise.
2902 (__arm_uqshll): Likewise.
2903 (__arm_urshrl): Likewise.
2904 (__arm_srshrl): Likewise.
2905 (__arm_sqshll): Likewise.
2906 (__arm_uqrshl): Likewise.
2907 (__arm_sqrshr): Likewise.
2908 (__arm_uqshl): Likewise.
2909 (__arm_urshr): Likewise.
2910 (__arm_sqshl): Likewise.
2911 (__arm_srshr): Likewise.
2912 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
2914 (UQSHL_QUALIFIERS): Likewise.
2915 (ASRL_QUALIFIERS): Likewise.
2916 (SQSHL_QUALIFIERS): Likewise.
2917 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
2918 (mve_sqrshrl_sat<supf>_di): Likewise.
2919 (mve_uqrshl_si): Likewise.
2920 (mve_sqrshr_si): Likewise.
2921 (mve_uqshll_di): Likewise.
2922 (mve_urshrl_di): Likewise.
2923 (mve_uqshl_si): Likewise.
2924 (mve_urshr_si): Likewise.
2925 (mve_sqshl_si): Likewise.
2926 (mve_srshr_si): Likewise.
2927 (mve_srshrl_di): Likewise.
2928 (mve_sqshll_di): Likewise.
2930 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2931 Andre Vieira <andre.simoesdiasvieira@arm.com>
2932 Mihail Ionescu <mihail.ionescu@arm.com>
2934 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
2935 (vsetq_lane_f32): Likewise.
2936 (vsetq_lane_s16): Likewise.
2937 (vsetq_lane_s32): Likewise.
2938 (vsetq_lane_s8): Likewise.
2939 (vsetq_lane_s64): Likewise.
2940 (vsetq_lane_u8): Likewise.
2941 (vsetq_lane_u16): Likewise.
2942 (vsetq_lane_u32): Likewise.
2943 (vsetq_lane_u64): Likewise.
2944 (vgetq_lane_f16): Likewise.
2945 (vgetq_lane_f32): Likewise.
2946 (vgetq_lane_s16): Likewise.
2947 (vgetq_lane_s32): Likewise.
2948 (vgetq_lane_s8): Likewise.
2949 (vgetq_lane_s64): Likewise.
2950 (vgetq_lane_u8): Likewise.
2951 (vgetq_lane_u16): Likewise.
2952 (vgetq_lane_u32): Likewise.
2953 (vgetq_lane_u64): Likewise.
2954 (__ARM_NUM_LANES): Likewise.
2955 (__ARM_LANEQ): Likewise.
2956 (__ARM_CHECK_LANEQ): Likewise.
2957 (__arm_vsetq_lane_s16): Define intrinsic.
2958 (__arm_vsetq_lane_s32): Likewise.
2959 (__arm_vsetq_lane_s8): Likewise.
2960 (__arm_vsetq_lane_s64): Likewise.
2961 (__arm_vsetq_lane_u8): Likewise.
2962 (__arm_vsetq_lane_u16): Likewise.
2963 (__arm_vsetq_lane_u32): Likewise.
2964 (__arm_vsetq_lane_u64): Likewise.
2965 (__arm_vgetq_lane_s16): Likewise.
2966 (__arm_vgetq_lane_s32): Likewise.
2967 (__arm_vgetq_lane_s8): Likewise.
2968 (__arm_vgetq_lane_s64): Likewise.
2969 (__arm_vgetq_lane_u8): Likewise.
2970 (__arm_vgetq_lane_u16): Likewise.
2971 (__arm_vgetq_lane_u32): Likewise.
2972 (__arm_vgetq_lane_u64): Likewise.
2973 (__arm_vsetq_lane_f16): Likewise.
2974 (__arm_vsetq_lane_f32): Likewise.
2975 (__arm_vgetq_lane_f16): Likewise.
2976 (__arm_vgetq_lane_f32): Likewise.
2977 (vgetq_lane): Define polymorphic variant.
2978 (vsetq_lane): Likewise.
2979 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
2981 (mve_vec_extractv2didi): Likewise.
2982 (mve_vec_extract_sext_internal<mode>): Likewise.
2983 (mve_vec_extract_zext_internal<mode>): Likewise.
2984 (mve_vec_set<mode>_internal): Likewise.
2985 (mve_vec_setv2di_internal): Likewise.
2986 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
2988 (vec_extract<mode><V_elem_l>): Rename to
2989 "neon_vec_extract<mode><V_elem_l>".
2990 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
2991 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
2992 pattern common for MVE and NEON.
2993 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
2996 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
2998 * config/arm/mve.md (earlyclobber_32): New mode attribute.
2999 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
3000 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
3002 2020-03-23 Richard Biener <rguenther@suse.de>
3004 PR tree-optimization/94261
3005 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
3006 IL operand swapping code.
3007 (vect_slp_rearrange_stmts): Do not arrange isomorphic
3008 nodes that would need operation code adjustments.
3010 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
3012 * doc/install.texi (amdgcn-*-amdhsa): Renamed
3013 from amdgcn-unknown-amdhsa; change
3014 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
3016 2020-03-23 Richard Biener <rguenther@suse.de>
3019 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
3020 directly rather than also folding it via build_fold_addr_expr.
3022 2020-03-23 Richard Biener <rguenther@suse.de>
3024 PR tree-optimization/94266
3025 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
3026 addresses of TARGET_MEM_REFs.
3028 2020-03-23 Martin Liska <mliska@suse.cz>
3031 * symtab.c (symtab_node::clone_references): Save speculative_id
3032 as ref may be overwritten by create_reference.
3033 (symtab_node::clone_referring): Likewise.
3034 (symtab_node::clone_reference): Likewise.
3036 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
3038 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
3039 references to Darwin.
3040 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
3041 unconditionally and comment on why.
3043 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
3045 * config/darwin.c (darwin_mergeable_constant_section): Collect
3046 section anchor checks into the caller.
3047 (machopic_select_section): Collect section anchor checks into
3048 the determination of 'effective zero-size' objects. When the
3049 size is unknown, assume it is non-zero, and thus return the
3050 'generic' section for the DECL.
3052 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
3055 * gcc/config/darwin.opt: Amend options descriptions.
3057 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
3059 PR rtl-optimization/94052
3060 * lra-constraints.c (simplify_operand_subreg): Reload the inner
3061 register of a paradoxical subreg if simplify_subreg_regno fails
3062 to give a valid hard register for the outer mode.
3064 2020-03-20 Martin Jambor <mjambor@suse.cz>
3066 PR tree-optimization/93435
3067 * params.opt (sra-max-propagations): New parameter.
3068 * tree-sra.c (propagation_budget): New variable.
3069 (budget_for_propagation_access): New function.
3070 (propagate_subaccesses_from_rhs): Use it.
3071 (propagate_subaccesses_from_lhs): Likewise.
3072 (propagate_all_subaccesses): Set up and destroy propagation_budget.
3074 2020-03-20 Carl Love <cel@us.ibm.com>
3077 * gcc/config/rs6000/rs6000.c (rs6000_option_override_internal):
3078 Add check for TARGET_FPRND for Power 7 or newer.
3080 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
3083 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
3084 (cgraph_edge::redirect_callee): Move here; likewise.
3085 (cgraph_node::remove_callees): Update calls_comdat_local flag.
3086 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
3088 (cgraph_node::check_calls_comdat_local_p): New member function.
3089 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
3090 (cgraph_edge::redirect_callee): Move offline.
3091 * ipa-fnsummary.c (compute_fn_summary): Do not compute
3092 calls_comdat_local flag here.
3093 * ipa-inline-transform.c (inline_call): Fix updating of
3094 calls_comdat_local flag.
3095 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
3096 * symtab.c (symtab_node::add_to_same_comdat_group): Update
3097 calls_comdat_local flag.
3099 2020-03-20 Richard Biener <rguenther@suse.de>
3101 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
3102 from the possibly modified root.
3104 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3105 Andre Vieira <andre.simoesdiasvieira@arm.com>
3106 Mihail Ionescu <mihail.ionescu@arm.com>
3108 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
3109 (vst1q_p_s8): Likewise.
3110 (vst2q_s8): Likewise.
3111 (vst2q_u8): Likewise.
3112 (vld1q_z_u8): Likewise.
3113 (vld1q_z_s8): Likewise.
3114 (vld2q_s8): Likewise.
3115 (vld2q_u8): Likewise.
3116 (vld4q_s8): Likewise.
3117 (vld4q_u8): Likewise.
3118 (vst1q_p_u16): Likewise.
3119 (vst1q_p_s16): Likewise.
3120 (vst2q_s16): Likewise.
3121 (vst2q_u16): Likewise.
3122 (vld1q_z_u16): Likewise.
3123 (vld1q_z_s16): Likewise.
3124 (vld2q_s16): Likewise.
3125 (vld2q_u16): Likewise.
3126 (vld4q_s16): Likewise.
3127 (vld4q_u16): Likewise.
3128 (vst1q_p_u32): Likewise.
3129 (vst1q_p_s32): Likewise.
3130 (vst2q_s32): Likewise.
3131 (vst2q_u32): Likewise.
3132 (vld1q_z_u32): Likewise.
3133 (vld1q_z_s32): Likewise.
3134 (vld2q_s32): Likewise.
3135 (vld2q_u32): Likewise.
3136 (vld4q_s32): Likewise.
3137 (vld4q_u32): Likewise.
3138 (vld4q_f16): Likewise.
3139 (vld2q_f16): Likewise.
3140 (vld1q_z_f16): Likewise.
3141 (vst2q_f16): Likewise.
3142 (vst1q_p_f16): Likewise.
3143 (vld4q_f32): Likewise.
3144 (vld2q_f32): Likewise.
3145 (vld1q_z_f32): Likewise.
3146 (vst2q_f32): Likewise.
3147 (vst1q_p_f32): Likewise.
3148 (__arm_vst1q_p_u8): Define intrinsic.
3149 (__arm_vst1q_p_s8): Likewise.
3150 (__arm_vst2q_s8): Likewise.
3151 (__arm_vst2q_u8): Likewise.
3152 (__arm_vld1q_z_u8): Likewise.
3153 (__arm_vld1q_z_s8): Likewise.
3154 (__arm_vld2q_s8): Likewise.
3155 (__arm_vld2q_u8): Likewise.
3156 (__arm_vld4q_s8): Likewise.
3157 (__arm_vld4q_u8): Likewise.
3158 (__arm_vst1q_p_u16): Likewise.
3159 (__arm_vst1q_p_s16): Likewise.
3160 (__arm_vst2q_s16): Likewise.
3161 (__arm_vst2q_u16): Likewise.
3162 (__arm_vld1q_z_u16): Likewise.
3163 (__arm_vld1q_z_s16): Likewise.
3164 (__arm_vld2q_s16): Likewise.
3165 (__arm_vld2q_u16): Likewise.
3166 (__arm_vld4q_s16): Likewise.
3167 (__arm_vld4q_u16): Likewise.
3168 (__arm_vst1q_p_u32): Likewise.
3169 (__arm_vst1q_p_s32): Likewise.
3170 (__arm_vst2q_s32): Likewise.
3171 (__arm_vst2q_u32): Likewise.
3172 (__arm_vld1q_z_u32): Likewise.
3173 (__arm_vld1q_z_s32): Likewise.
3174 (__arm_vld2q_s32): Likewise.
3175 (__arm_vld2q_u32): Likewise.
3176 (__arm_vld4q_s32): Likewise.
3177 (__arm_vld4q_u32): Likewise.
3178 (__arm_vld4q_f16): Likewise.
3179 (__arm_vld2q_f16): Likewise.
3180 (__arm_vld1q_z_f16): Likewise.
3181 (__arm_vst2q_f16): Likewise.
3182 (__arm_vst1q_p_f16): Likewise.
3183 (__arm_vld4q_f32): Likewise.
3184 (__arm_vld2q_f32): Likewise.
3185 (__arm_vld1q_z_f32): Likewise.
3186 (__arm_vst2q_f32): Likewise.
3187 (__arm_vst1q_p_f32): Likewise.
3188 (vld1q_z): Define polymorphic variant.
3191 (vst1q_p): Likewise.
3193 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
3195 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
3196 (mve_vld2q<mode>): Likewise.
3197 (mve_vld4q<mode>): Likewise.
3199 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3200 Andre Vieira <andre.simoesdiasvieira@arm.com>
3201 Mihail Ionescu <mihail.ionescu@arm.com>
3203 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
3204 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
3205 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
3206 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
3207 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
3208 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
3209 * config/arm/arm_mve.h (vadciq_s32): Define macro.
3210 (vadciq_u32): Likewise.
3211 (vadciq_m_s32): Likewise.
3212 (vadciq_m_u32): Likewise.
3213 (vadcq_s32): Likewise.
3214 (vadcq_u32): Likewise.
3215 (vadcq_m_s32): Likewise.
3216 (vadcq_m_u32): Likewise.
3217 (vsbciq_s32): Likewise.
3218 (vsbciq_u32): Likewise.
3219 (vsbciq_m_s32): Likewise.
3220 (vsbciq_m_u32): Likewise.
3221 (vsbcq_s32): Likewise.
3222 (vsbcq_u32): Likewise.
3223 (vsbcq_m_s32): Likewise.
3224 (vsbcq_m_u32): Likewise.
3225 (__arm_vadciq_s32): Define intrinsic.
3226 (__arm_vadciq_u32): Likewise.
3227 (__arm_vadciq_m_s32): Likewise.
3228 (__arm_vadciq_m_u32): Likewise.
3229 (__arm_vadcq_s32): Likewise.
3230 (__arm_vadcq_u32): Likewise.
3231 (__arm_vadcq_m_s32): Likewise.
3232 (__arm_vadcq_m_u32): Likewise.
3233 (__arm_vsbciq_s32): Likewise.
3234 (__arm_vsbciq_u32): Likewise.
3235 (__arm_vsbciq_m_s32): Likewise.
3236 (__arm_vsbciq_m_u32): Likewise.
3237 (__arm_vsbcq_s32): Likewise.
3238 (__arm_vsbcq_u32): Likewise.
3239 (__arm_vsbcq_m_s32): Likewise.
3240 (__arm_vsbcq_m_u32): Likewise.
3241 (vadciq_m): Define polymorphic variant.
3243 (vadcq_m): Likewise.
3245 (vsbciq_m): Likewise.
3247 (vsbcq_m): Likewise.
3249 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
3251 (BINOP_UNONE_UNONE_UNONE): Likewise.
3252 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
3253 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
3254 * config/arm/mve.md (VADCIQ): Define iterator.
3255 (VADCIQ_M): Likewise.
3257 (VSBCQ_M): Likewise.
3259 (VSBCIQ_M): Likewise.
3261 (VADCQ_M): Likewise.
3262 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
3263 (mve_vadciq_<supf>v4si): Likewise.
3264 (mve_vadcq_m_<supf>v4si): Likewise.
3265 (mve_vadcq_<supf>v4si): Likewise.
3266 (mve_vsbciq_m_<supf>v4si): Likewise.
3267 (mve_vsbciq_<supf>v4si): Likewise.
3268 (mve_vsbcq_m_<supf>v4si): Likewise.
3269 (mve_vsbcq_<supf>v4si): Likewise.
3270 (get_fpscr_nzcvqc): Define isns.
3271 (set_fpscr_nzcvqc): Define isns.
3272 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
3273 (UNSPEC_SET_FPSCR_NZCVQC): Define.
3275 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3277 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
3278 (vddupq_x_n_u16): Likewise.
3279 (vddupq_x_n_u32): Likewise.
3280 (vddupq_x_wb_u8): Likewise.
3281 (vddupq_x_wb_u16): Likewise.
3282 (vddupq_x_wb_u32): Likewise.
3283 (vdwdupq_x_n_u8): Likewise.
3284 (vdwdupq_x_n_u16): Likewise.
3285 (vdwdupq_x_n_u32): Likewise.
3286 (vdwdupq_x_wb_u8): Likewise.
3287 (vdwdupq_x_wb_u16): Likewise.
3288 (vdwdupq_x_wb_u32): Likewise.
3289 (vidupq_x_n_u8): Likewise.
3290 (vidupq_x_n_u16): Likewise.
3291 (vidupq_x_n_u32): Likewise.
3292 (vidupq_x_wb_u8): Likewise.
3293 (vidupq_x_wb_u16): Likewise.
3294 (vidupq_x_wb_u32): Likewise.
3295 (viwdupq_x_n_u8): Likewise.
3296 (viwdupq_x_n_u16): Likewise.
3297 (viwdupq_x_n_u32): Likewise.
3298 (viwdupq_x_wb_u8): Likewise.
3299 (viwdupq_x_wb_u16): Likewise.
3300 (viwdupq_x_wb_u32): Likewise.
3301 (vdupq_x_n_s8): Likewise.
3302 (vdupq_x_n_s16): Likewise.
3303 (vdupq_x_n_s32): Likewise.
3304 (vdupq_x_n_u8): Likewise.
3305 (vdupq_x_n_u16): Likewise.
3306 (vdupq_x_n_u32): Likewise.
3307 (vminq_x_s8): Likewise.
3308 (vminq_x_s16): Likewise.
3309 (vminq_x_s32): Likewise.
3310 (vminq_x_u8): Likewise.
3311 (vminq_x_u16): Likewise.
3312 (vminq_x_u32): Likewise.
3313 (vmaxq_x_s8): Likewise.
3314 (vmaxq_x_s16): Likewise.
3315 (vmaxq_x_s32): Likewise.
3316 (vmaxq_x_u8): Likewise.
3317 (vmaxq_x_u16): Likewise.
3318 (vmaxq_x_u32): Likewise.
3319 (vabdq_x_s8): Likewise.
3320 (vabdq_x_s16): Likewise.
3321 (vabdq_x_s32): Likewise.
3322 (vabdq_x_u8): Likewise.
3323 (vabdq_x_u16): Likewise.
3324 (vabdq_x_u32): Likewise.
3325 (vabsq_x_s8): Likewise.
3326 (vabsq_x_s16): Likewise.
3327 (vabsq_x_s32): Likewise.
3328 (vaddq_x_s8): Likewise.
3329 (vaddq_x_s16): Likewise.
3330 (vaddq_x_s32): Likewise.
3331 (vaddq_x_n_s8): Likewise.
3332 (vaddq_x_n_s16): Likewise.
3333 (vaddq_x_n_s32): Likewise.
3334 (vaddq_x_u8): Likewise.
3335 (vaddq_x_u16): Likewise.
3336 (vaddq_x_u32): Likewise.
3337 (vaddq_x_n_u8): Likewise.
3338 (vaddq_x_n_u16): Likewise.
3339 (vaddq_x_n_u32): Likewise.
3340 (vclsq_x_s8): Likewise.
3341 (vclsq_x_s16): Likewise.
3342 (vclsq_x_s32): Likewise.
3343 (vclzq_x_s8): Likewise.
3344 (vclzq_x_s16): Likewise.
3345 (vclzq_x_s32): Likewise.
3346 (vclzq_x_u8): Likewise.
3347 (vclzq_x_u16): Likewise.
3348 (vclzq_x_u32): Likewise.
3349 (vnegq_x_s8): Likewise.
3350 (vnegq_x_s16): Likewise.
3351 (vnegq_x_s32): Likewise.
3352 (vmulhq_x_s8): Likewise.
3353 (vmulhq_x_s16): Likewise.
3354 (vmulhq_x_s32): Likewise.
3355 (vmulhq_x_u8): Likewise.
3356 (vmulhq_x_u16): Likewise.
3357 (vmulhq_x_u32): Likewise.
3358 (vmullbq_poly_x_p8): Likewise.
3359 (vmullbq_poly_x_p16): Likewise.
3360 (vmullbq_int_x_s8): Likewise.
3361 (vmullbq_int_x_s16): Likewise.
3362 (vmullbq_int_x_s32): Likewise.
3363 (vmullbq_int_x_u8): Likewise.
3364 (vmullbq_int_x_u16): Likewise.
3365 (vmullbq_int_x_u32): Likewise.
3366 (vmulltq_poly_x_p8): Likewise.
3367 (vmulltq_poly_x_p16): Likewise.
3368 (vmulltq_int_x_s8): Likewise.
3369 (vmulltq_int_x_s16): Likewise.
3370 (vmulltq_int_x_s32): Likewise.
3371 (vmulltq_int_x_u8): Likewise.
3372 (vmulltq_int_x_u16): Likewise.
3373 (vmulltq_int_x_u32): Likewise.
3374 (vmulq_x_s8): Likewise.
3375 (vmulq_x_s16): Likewise.
3376 (vmulq_x_s32): Likewise.
3377 (vmulq_x_n_s8): Likewise.
3378 (vmulq_x_n_s16): Likewise.
3379 (vmulq_x_n_s32): Likewise.
3380 (vmulq_x_u8): Likewise.
3381 (vmulq_x_u16): Likewise.
3382 (vmulq_x_u32): Likewise.
3383 (vmulq_x_n_u8): Likewise.
3384 (vmulq_x_n_u16): Likewise.
3385 (vmulq_x_n_u32): Likewise.
3386 (vsubq_x_s8): Likewise.
3387 (vsubq_x_s16): Likewise.
3388 (vsubq_x_s32): Likewise.
3389 (vsubq_x_n_s8): Likewise.
3390 (vsubq_x_n_s16): Likewise.
3391 (vsubq_x_n_s32): Likewise.
3392 (vsubq_x_u8): Likewise.
3393 (vsubq_x_u16): Likewise.
3394 (vsubq_x_u32): Likewise.
3395 (vsubq_x_n_u8): Likewise.
3396 (vsubq_x_n_u16): Likewise.
3397 (vsubq_x_n_u32): Likewise.
3398 (vcaddq_rot90_x_s8): Likewise.
3399 (vcaddq_rot90_x_s16): Likewise.
3400 (vcaddq_rot90_x_s32): Likewise.
3401 (vcaddq_rot90_x_u8): Likewise.
3402 (vcaddq_rot90_x_u16): Likewise.
3403 (vcaddq_rot90_x_u32): Likewise.
3404 (vcaddq_rot270_x_s8): Likewise.
3405 (vcaddq_rot270_x_s16): Likewise.
3406 (vcaddq_rot270_x_s32): Likewise.
3407 (vcaddq_rot270_x_u8): Likewise.
3408 (vcaddq_rot270_x_u16): Likewise.
3409 (vcaddq_rot270_x_u32): Likewise.
3410 (vhaddq_x_n_s8): Likewise.
3411 (vhaddq_x_n_s16): Likewise.
3412 (vhaddq_x_n_s32): Likewise.
3413 (vhaddq_x_n_u8): Likewise.
3414 (vhaddq_x_n_u16): Likewise.
3415 (vhaddq_x_n_u32): Likewise.
3416 (vhaddq_x_s8): Likewise.
3417 (vhaddq_x_s16): Likewise.
3418 (vhaddq_x_s32): Likewise.
3419 (vhaddq_x_u8): Likewise.
3420 (vhaddq_x_u16): Likewise.
3421 (vhaddq_x_u32): Likewise.
3422 (vhcaddq_rot90_x_s8): Likewise.
3423 (vhcaddq_rot90_x_s16): Likewise.
3424 (vhcaddq_rot90_x_s32): Likewise.
3425 (vhcaddq_rot270_x_s8): Likewise.
3426 (vhcaddq_rot270_x_s16): Likewise.
3427 (vhcaddq_rot270_x_s32): Likewise.
3428 (vhsubq_x_n_s8): Likewise.
3429 (vhsubq_x_n_s16): Likewise.
3430 (vhsubq_x_n_s32): Likewise.
3431 (vhsubq_x_n_u8): Likewise.
3432 (vhsubq_x_n_u16): Likewise.
3433 (vhsubq_x_n_u32): Likewise.
3434 (vhsubq_x_s8): Likewise.
3435 (vhsubq_x_s16): Likewise.
3436 (vhsubq_x_s32): Likewise.
3437 (vhsubq_x_u8): Likewise.
3438 (vhsubq_x_u16): Likewise.
3439 (vhsubq_x_u32): Likewise.
3440 (vrhaddq_x_s8): Likewise.
3441 (vrhaddq_x_s16): Likewise.
3442 (vrhaddq_x_s32): Likewise.
3443 (vrhaddq_x_u8): Likewise.
3444 (vrhaddq_x_u16): Likewise.
3445 (vrhaddq_x_u32): Likewise.
3446 (vrmulhq_x_s8): Likewise.
3447 (vrmulhq_x_s16): Likewise.
3448 (vrmulhq_x_s32): Likewise.
3449 (vrmulhq_x_u8): Likewise.
3450 (vrmulhq_x_u16): Likewise.
3451 (vrmulhq_x_u32): Likewise.
3452 (vandq_x_s8): Likewise.
3453 (vandq_x_s16): Likewise.
3454 (vandq_x_s32): Likewise.
3455 (vandq_x_u8): Likewise.
3456 (vandq_x_u16): Likewise.
3457 (vandq_x_u32): Likewise.
3458 (vbicq_x_s8): Likewise.
3459 (vbicq_x_s16): Likewise.
3460 (vbicq_x_s32): Likewise.
3461 (vbicq_x_u8): Likewise.
3462 (vbicq_x_u16): Likewise.
3463 (vbicq_x_u32): Likewise.
3464 (vbrsrq_x_n_s8): Likewise.
3465 (vbrsrq_x_n_s16): Likewise.
3466 (vbrsrq_x_n_s32): Likewise.
3467 (vbrsrq_x_n_u8): Likewise.
3468 (vbrsrq_x_n_u16): Likewise.
3469 (vbrsrq_x_n_u32): Likewise.
3470 (veorq_x_s8): Likewise.
3471 (veorq_x_s16): Likewise.
3472 (veorq_x_s32): Likewise.
3473 (veorq_x_u8): Likewise.
3474 (veorq_x_u16): Likewise.
3475 (veorq_x_u32): Likewise.
3476 (vmovlbq_x_s8): Likewise.
3477 (vmovlbq_x_s16): Likewise.
3478 (vmovlbq_x_u8): Likewise.
3479 (vmovlbq_x_u16): Likewise.
3480 (vmovltq_x_s8): Likewise.
3481 (vmovltq_x_s16): Likewise.
3482 (vmovltq_x_u8): Likewise.
3483 (vmovltq_x_u16): Likewise.
3484 (vmvnq_x_s8): Likewise.
3485 (vmvnq_x_s16): Likewise.
3486 (vmvnq_x_s32): Likewise.
3487 (vmvnq_x_u8): Likewise.
3488 (vmvnq_x_u16): Likewise.
3489 (vmvnq_x_u32): Likewise.
3490 (vmvnq_x_n_s16): Likewise.
3491 (vmvnq_x_n_s32): Likewise.
3492 (vmvnq_x_n_u16): Likewise.
3493 (vmvnq_x_n_u32): Likewise.
3494 (vornq_x_s8): Likewise.
3495 (vornq_x_s16): Likewise.
3496 (vornq_x_s32): Likewise.
3497 (vornq_x_u8): Likewise.
3498 (vornq_x_u16): Likewise.
3499 (vornq_x_u32): Likewise.
3500 (vorrq_x_s8): Likewise.
3501 (vorrq_x_s16): Likewise.
3502 (vorrq_x_s32): Likewise.
3503 (vorrq_x_u8): Likewise.
3504 (vorrq_x_u16): Likewise.
3505 (vorrq_x_u32): Likewise.
3506 (vrev16q_x_s8): Likewise.
3507 (vrev16q_x_u8): Likewise.
3508 (vrev32q_x_s8): Likewise.
3509 (vrev32q_x_s16): Likewise.
3510 (vrev32q_x_u8): Likewise.
3511 (vrev32q_x_u16): Likewise.
3512 (vrev64q_x_s8): Likewise.
3513 (vrev64q_x_s16): Likewise.
3514 (vrev64q_x_s32): Likewise.
3515 (vrev64q_x_u8): Likewise.
3516 (vrev64q_x_u16): Likewise.
3517 (vrev64q_x_u32): Likewise.
3518 (vrshlq_x_s8): Likewise.
3519 (vrshlq_x_s16): Likewise.
3520 (vrshlq_x_s32): Likewise.
3521 (vrshlq_x_u8): Likewise.
3522 (vrshlq_x_u16): Likewise.
3523 (vrshlq_x_u32): Likewise.
3524 (vshllbq_x_n_s8): Likewise.
3525 (vshllbq_x_n_s16): Likewise.
3526 (vshllbq_x_n_u8): Likewise.
3527 (vshllbq_x_n_u16): Likewise.
3528 (vshlltq_x_n_s8): Likewise.
3529 (vshlltq_x_n_s16): Likewise.
3530 (vshlltq_x_n_u8): Likewise.
3531 (vshlltq_x_n_u16): Likewise.
3532 (vshlq_x_s8): Likewise.
3533 (vshlq_x_s16): Likewise.
3534 (vshlq_x_s32): Likewise.
3535 (vshlq_x_u8): Likewise.
3536 (vshlq_x_u16): Likewise.
3537 (vshlq_x_u32): Likewise.
3538 (vshlq_x_n_s8): Likewise.
3539 (vshlq_x_n_s16): Likewise.
3540 (vshlq_x_n_s32): Likewise.
3541 (vshlq_x_n_u8): Likewise.
3542 (vshlq_x_n_u16): Likewise.
3543 (vshlq_x_n_u32): Likewise.
3544 (vrshrq_x_n_s8): Likewise.
3545 (vrshrq_x_n_s16): Likewise.
3546 (vrshrq_x_n_s32): Likewise.
3547 (vrshrq_x_n_u8): Likewise.
3548 (vrshrq_x_n_u16): Likewise.
3549 (vrshrq_x_n_u32): Likewise.
3550 (vshrq_x_n_s8): Likewise.
3551 (vshrq_x_n_s16): Likewise.
3552 (vshrq_x_n_s32): Likewise.
3553 (vshrq_x_n_u8): Likewise.
3554 (vshrq_x_n_u16): Likewise.
3555 (vshrq_x_n_u32): Likewise.
3556 (vdupq_x_n_f16): Likewise.
3557 (vdupq_x_n_f32): Likewise.
3558 (vminnmq_x_f16): Likewise.
3559 (vminnmq_x_f32): Likewise.
3560 (vmaxnmq_x_f16): Likewise.
3561 (vmaxnmq_x_f32): Likewise.
3562 (vabdq_x_f16): Likewise.
3563 (vabdq_x_f32): Likewise.
3564 (vabsq_x_f16): Likewise.
3565 (vabsq_x_f32): Likewise.
3566 (vaddq_x_f16): Likewise.
3567 (vaddq_x_f32): Likewise.
3568 (vaddq_x_n_f16): Likewise.
3569 (vaddq_x_n_f32): Likewise.
3570 (vnegq_x_f16): Likewise.
3571 (vnegq_x_f32): Likewise.
3572 (vmulq_x_f16): Likewise.
3573 (vmulq_x_f32): Likewise.
3574 (vmulq_x_n_f16): Likewise.
3575 (vmulq_x_n_f32): Likewise.
3576 (vsubq_x_f16): Likewise.
3577 (vsubq_x_f32): Likewise.
3578 (vsubq_x_n_f16): Likewise.
3579 (vsubq_x_n_f32): Likewise.
3580 (vcaddq_rot90_x_f16): Likewise.
3581 (vcaddq_rot90_x_f32): Likewise.
3582 (vcaddq_rot270_x_f16): Likewise.
3583 (vcaddq_rot270_x_f32): Likewise.
3584 (vcmulq_x_f16): Likewise.
3585 (vcmulq_x_f32): Likewise.
3586 (vcmulq_rot90_x_f16): Likewise.
3587 (vcmulq_rot90_x_f32): Likewise.
3588 (vcmulq_rot180_x_f16): Likewise.
3589 (vcmulq_rot180_x_f32): Likewise.
3590 (vcmulq_rot270_x_f16): Likewise.
3591 (vcmulq_rot270_x_f32): Likewise.
3592 (vcvtaq_x_s16_f16): Likewise.
3593 (vcvtaq_x_s32_f32): Likewise.
3594 (vcvtaq_x_u16_f16): Likewise.
3595 (vcvtaq_x_u32_f32): Likewise.
3596 (vcvtnq_x_s16_f16): Likewise.
3597 (vcvtnq_x_s32_f32): Likewise.
3598 (vcvtnq_x_u16_f16): Likewise.
3599 (vcvtnq_x_u32_f32): Likewise.
3600 (vcvtpq_x_s16_f16): Likewise.
3601 (vcvtpq_x_s32_f32): Likewise.
3602 (vcvtpq_x_u16_f16): Likewise.
3603 (vcvtpq_x_u32_f32): Likewise.
3604 (vcvtmq_x_s16_f16): Likewise.
3605 (vcvtmq_x_s32_f32): Likewise.
3606 (vcvtmq_x_u16_f16): Likewise.
3607 (vcvtmq_x_u32_f32): Likewise.
3608 (vcvtbq_x_f32_f16): Likewise.
3609 (vcvttq_x_f32_f16): Likewise.
3610 (vcvtq_x_f16_u16): Likewise.
3611 (vcvtq_x_f16_s16): Likewise.
3612 (vcvtq_x_f32_s32): Likewise.
3613 (vcvtq_x_f32_u32): Likewise.
3614 (vcvtq_x_n_f16_s16): Likewise.
3615 (vcvtq_x_n_f16_u16): Likewise.
3616 (vcvtq_x_n_f32_s32): Likewise.
3617 (vcvtq_x_n_f32_u32): Likewise.
3618 (vcvtq_x_s16_f16): Likewise.
3619 (vcvtq_x_s32_f32): Likewise.
3620 (vcvtq_x_u16_f16): Likewise.
3621 (vcvtq_x_u32_f32): Likewise.
3622 (vcvtq_x_n_s16_f16): Likewise.
3623 (vcvtq_x_n_s32_f32): Likewise.
3624 (vcvtq_x_n_u16_f16): Likewise.
3625 (vcvtq_x_n_u32_f32): Likewise.
3626 (vrndq_x_f16): Likewise.
3627 (vrndq_x_f32): Likewise.
3628 (vrndnq_x_f16): Likewise.
3629 (vrndnq_x_f32): Likewise.
3630 (vrndmq_x_f16): Likewise.
3631 (vrndmq_x_f32): Likewise.
3632 (vrndpq_x_f16): Likewise.
3633 (vrndpq_x_f32): Likewise.
3634 (vrndaq_x_f16): Likewise.
3635 (vrndaq_x_f32): Likewise.
3636 (vrndxq_x_f16): Likewise.
3637 (vrndxq_x_f32): Likewise.
3638 (vandq_x_f16): Likewise.
3639 (vandq_x_f32): Likewise.
3640 (vbicq_x_f16): Likewise.
3641 (vbicq_x_f32): Likewise.
3642 (vbrsrq_x_n_f16): Likewise.
3643 (vbrsrq_x_n_f32): Likewise.
3644 (veorq_x_f16): Likewise.
3645 (veorq_x_f32): Likewise.
3646 (vornq_x_f16): Likewise.
3647 (vornq_x_f32): Likewise.
3648 (vorrq_x_f16): Likewise.
3649 (vorrq_x_f32): Likewise.
3650 (vrev32q_x_f16): Likewise.
3651 (vrev64q_x_f16): Likewise.
3652 (vrev64q_x_f32): Likewise.
3653 (__arm_vddupq_x_n_u8): Define intrinsic.
3654 (__arm_vddupq_x_n_u16): Likewise.
3655 (__arm_vddupq_x_n_u32): Likewise.
3656 (__arm_vddupq_x_wb_u8): Likewise.
3657 (__arm_vddupq_x_wb_u16): Likewise.
3658 (__arm_vddupq_x_wb_u32): Likewise.
3659 (__arm_vdwdupq_x_n_u8): Likewise.
3660 (__arm_vdwdupq_x_n_u16): Likewise.
3661 (__arm_vdwdupq_x_n_u32): Likewise.
3662 (__arm_vdwdupq_x_wb_u8): Likewise.
3663 (__arm_vdwdupq_x_wb_u16): Likewise.
3664 (__arm_vdwdupq_x_wb_u32): Likewise.
3665 (__arm_vidupq_x_n_u8): Likewise.
3666 (__arm_vidupq_x_n_u16): Likewise.
3667 (__arm_vidupq_x_n_u32): Likewise.
3668 (__arm_vidupq_x_wb_u8): Likewise.
3669 (__arm_vidupq_x_wb_u16): Likewise.
3670 (__arm_vidupq_x_wb_u32): Likewise.
3671 (__arm_viwdupq_x_n_u8): Likewise.
3672 (__arm_viwdupq_x_n_u16): Likewise.
3673 (__arm_viwdupq_x_n_u32): Likewise.
3674 (__arm_viwdupq_x_wb_u8): Likewise.
3675 (__arm_viwdupq_x_wb_u16): Likewise.
3676 (__arm_viwdupq_x_wb_u32): Likewise.
3677 (__arm_vdupq_x_n_s8): Likewise.
3678 (__arm_vdupq_x_n_s16): Likewise.
3679 (__arm_vdupq_x_n_s32): Likewise.
3680 (__arm_vdupq_x_n_u8): Likewise.
3681 (__arm_vdupq_x_n_u16): Likewise.
3682 (__arm_vdupq_x_n_u32): Likewise.
3683 (__arm_vminq_x_s8): Likewise.
3684 (__arm_vminq_x_s16): Likewise.
3685 (__arm_vminq_x_s32): Likewise.
3686 (__arm_vminq_x_u8): Likewise.
3687 (__arm_vminq_x_u16): Likewise.
3688 (__arm_vminq_x_u32): Likewise.
3689 (__arm_vmaxq_x_s8): Likewise.
3690 (__arm_vmaxq_x_s16): Likewise.
3691 (__arm_vmaxq_x_s32): Likewise.
3692 (__arm_vmaxq_x_u8): Likewise.
3693 (__arm_vmaxq_x_u16): Likewise.
3694 (__arm_vmaxq_x_u32): Likewise.
3695 (__arm_vabdq_x_s8): Likewise.
3696 (__arm_vabdq_x_s16): Likewise.
3697 (__arm_vabdq_x_s32): Likewise.
3698 (__arm_vabdq_x_u8): Likewise.
3699 (__arm_vabdq_x_u16): Likewise.
3700 (__arm_vabdq_x_u32): Likewise.
3701 (__arm_vabsq_x_s8): Likewise.
3702 (__arm_vabsq_x_s16): Likewise.
3703 (__arm_vabsq_x_s32): Likewise.
3704 (__arm_vaddq_x_s8): Likewise.
3705 (__arm_vaddq_x_s16): Likewise.
3706 (__arm_vaddq_x_s32): Likewise.
3707 (__arm_vaddq_x_n_s8): Likewise.
3708 (__arm_vaddq_x_n_s16): Likewise.
3709 (__arm_vaddq_x_n_s32): Likewise.
3710 (__arm_vaddq_x_u8): Likewise.
3711 (__arm_vaddq_x_u16): Likewise.
3712 (__arm_vaddq_x_u32): Likewise.
3713 (__arm_vaddq_x_n_u8): Likewise.
3714 (__arm_vaddq_x_n_u16): Likewise.
3715 (__arm_vaddq_x_n_u32): Likewise.
3716 (__arm_vclsq_x_s8): Likewise.
3717 (__arm_vclsq_x_s16): Likewise.
3718 (__arm_vclsq_x_s32): Likewise.
3719 (__arm_vclzq_x_s8): Likewise.
3720 (__arm_vclzq_x_s16): Likewise.
3721 (__arm_vclzq_x_s32): Likewise.
3722 (__arm_vclzq_x_u8): Likewise.
3723 (__arm_vclzq_x_u16): Likewise.
3724 (__arm_vclzq_x_u32): Likewise.
3725 (__arm_vnegq_x_s8): Likewise.
3726 (__arm_vnegq_x_s16): Likewise.
3727 (__arm_vnegq_x_s32): Likewise.
3728 (__arm_vmulhq_x_s8): Likewise.
3729 (__arm_vmulhq_x_s16): Likewise.
3730 (__arm_vmulhq_x_s32): Likewise.
3731 (__arm_vmulhq_x_u8): Likewise.
3732 (__arm_vmulhq_x_u16): Likewise.
3733 (__arm_vmulhq_x_u32): Likewise.
3734 (__arm_vmullbq_poly_x_p8): Likewise.
3735 (__arm_vmullbq_poly_x_p16): Likewise.
3736 (__arm_vmullbq_int_x_s8): Likewise.
3737 (__arm_vmullbq_int_x_s16): Likewise.
3738 (__arm_vmullbq_int_x_s32): Likewise.
3739 (__arm_vmullbq_int_x_u8): Likewise.
3740 (__arm_vmullbq_int_x_u16): Likewise.
3741 (__arm_vmullbq_int_x_u32): Likewise.
3742 (__arm_vmulltq_poly_x_p8): Likewise.
3743 (__arm_vmulltq_poly_x_p16): Likewise.
3744 (__arm_vmulltq_int_x_s8): Likewise.
3745 (__arm_vmulltq_int_x_s16): Likewise.
3746 (__arm_vmulltq_int_x_s32): Likewise.
3747 (__arm_vmulltq_int_x_u8): Likewise.
3748 (__arm_vmulltq_int_x_u16): Likewise.
3749 (__arm_vmulltq_int_x_u32): Likewise.
3750 (__arm_vmulq_x_s8): Likewise.
3751 (__arm_vmulq_x_s16): Likewise.
3752 (__arm_vmulq_x_s32): Likewise.
3753 (__arm_vmulq_x_n_s8): Likewise.
3754 (__arm_vmulq_x_n_s16): Likewise.
3755 (__arm_vmulq_x_n_s32): Likewise.
3756 (__arm_vmulq_x_u8): Likewise.
3757 (__arm_vmulq_x_u16): Likewise.
3758 (__arm_vmulq_x_u32): Likewise.
3759 (__arm_vmulq_x_n_u8): Likewise.
3760 (__arm_vmulq_x_n_u16): Likewise.
3761 (__arm_vmulq_x_n_u32): Likewise.
3762 (__arm_vsubq_x_s8): Likewise.
3763 (__arm_vsubq_x_s16): Likewise.
3764 (__arm_vsubq_x_s32): Likewise.
3765 (__arm_vsubq_x_n_s8): Likewise.
3766 (__arm_vsubq_x_n_s16): Likewise.
3767 (__arm_vsubq_x_n_s32): Likewise.
3768 (__arm_vsubq_x_u8): Likewise.
3769 (__arm_vsubq_x_u16): Likewise.
3770 (__arm_vsubq_x_u32): Likewise.
3771 (__arm_vsubq_x_n_u8): Likewise.
3772 (__arm_vsubq_x_n_u16): Likewise.
3773 (__arm_vsubq_x_n_u32): Likewise.
3774 (__arm_vcaddq_rot90_x_s8): Likewise.
3775 (__arm_vcaddq_rot90_x_s16): Likewise.
3776 (__arm_vcaddq_rot90_x_s32): Likewise.
3777 (__arm_vcaddq_rot90_x_u8): Likewise.
3778 (__arm_vcaddq_rot90_x_u16): Likewise.
3779 (__arm_vcaddq_rot90_x_u32): Likewise.
3780 (__arm_vcaddq_rot270_x_s8): Likewise.
3781 (__arm_vcaddq_rot270_x_s16): Likewise.
3782 (__arm_vcaddq_rot270_x_s32): Likewise.
3783 (__arm_vcaddq_rot270_x_u8): Likewise.
3784 (__arm_vcaddq_rot270_x_u16): Likewise.
3785 (__arm_vcaddq_rot270_x_u32): Likewise.
3786 (__arm_vhaddq_x_n_s8): Likewise.
3787 (__arm_vhaddq_x_n_s16): Likewise.
3788 (__arm_vhaddq_x_n_s32): Likewise.
3789 (__arm_vhaddq_x_n_u8): Likewise.
3790 (__arm_vhaddq_x_n_u16): Likewise.
3791 (__arm_vhaddq_x_n_u32): Likewise.
3792 (__arm_vhaddq_x_s8): Likewise.
3793 (__arm_vhaddq_x_s16): Likewise.
3794 (__arm_vhaddq_x_s32): Likewise.
3795 (__arm_vhaddq_x_u8): Likewise.
3796 (__arm_vhaddq_x_u16): Likewise.
3797 (__arm_vhaddq_x_u32): Likewise.
3798 (__arm_vhcaddq_rot90_x_s8): Likewise.
3799 (__arm_vhcaddq_rot90_x_s16): Likewise.
3800 (__arm_vhcaddq_rot90_x_s32): Likewise.
3801 (__arm_vhcaddq_rot270_x_s8): Likewise.
3802 (__arm_vhcaddq_rot270_x_s16): Likewise.
3803 (__arm_vhcaddq_rot270_x_s32): Likewise.
3804 (__arm_vhsubq_x_n_s8): Likewise.
3805 (__arm_vhsubq_x_n_s16): Likewise.
3806 (__arm_vhsubq_x_n_s32): Likewise.
3807 (__arm_vhsubq_x_n_u8): Likewise.
3808 (__arm_vhsubq_x_n_u16): Likewise.
3809 (__arm_vhsubq_x_n_u32): Likewise.
3810 (__arm_vhsubq_x_s8): Likewise.
3811 (__arm_vhsubq_x_s16): Likewise.
3812 (__arm_vhsubq_x_s32): Likewise.
3813 (__arm_vhsubq_x_u8): Likewise.
3814 (__arm_vhsubq_x_u16): Likewise.
3815 (__arm_vhsubq_x_u32): Likewise.
3816 (__arm_vrhaddq_x_s8): Likewise.
3817 (__arm_vrhaddq_x_s16): Likewise.
3818 (__arm_vrhaddq_x_s32): Likewise.
3819 (__arm_vrhaddq_x_u8): Likewise.
3820 (__arm_vrhaddq_x_u16): Likewise.
3821 (__arm_vrhaddq_x_u32): Likewise.
3822 (__arm_vrmulhq_x_s8): Likewise.
3823 (__arm_vrmulhq_x_s16): Likewise.
3824 (__arm_vrmulhq_x_s32): Likewise.
3825 (__arm_vrmulhq_x_u8): Likewise.
3826 (__arm_vrmulhq_x_u16): Likewise.
3827 (__arm_vrmulhq_x_u32): Likewise.
3828 (__arm_vandq_x_s8): Likewise.
3829 (__arm_vandq_x_s16): Likewise.
3830 (__arm_vandq_x_s32): Likewise.
3831 (__arm_vandq_x_u8): Likewise.
3832 (__arm_vandq_x_u16): Likewise.
3833 (__arm_vandq_x_u32): Likewise.
3834 (__arm_vbicq_x_s8): Likewise.
3835 (__arm_vbicq_x_s16): Likewise.
3836 (__arm_vbicq_x_s32): Likewise.
3837 (__arm_vbicq_x_u8): Likewise.
3838 (__arm_vbicq_x_u16): Likewise.
3839 (__arm_vbicq_x_u32): Likewise.
3840 (__arm_vbrsrq_x_n_s8): Likewise.
3841 (__arm_vbrsrq_x_n_s16): Likewise.
3842 (__arm_vbrsrq_x_n_s32): Likewise.
3843 (__arm_vbrsrq_x_n_u8): Likewise.
3844 (__arm_vbrsrq_x_n_u16): Likewise.
3845 (__arm_vbrsrq_x_n_u32): Likewise.
3846 (__arm_veorq_x_s8): Likewise.
3847 (__arm_veorq_x_s16): Likewise.
3848 (__arm_veorq_x_s32): Likewise.
3849 (__arm_veorq_x_u8): Likewise.
3850 (__arm_veorq_x_u16): Likewise.
3851 (__arm_veorq_x_u32): Likewise.
3852 (__arm_vmovlbq_x_s8): Likewise.
3853 (__arm_vmovlbq_x_s16): Likewise.
3854 (__arm_vmovlbq_x_u8): Likewise.
3855 (__arm_vmovlbq_x_u16): Likewise.
3856 (__arm_vmovltq_x_s8): Likewise.
3857 (__arm_vmovltq_x_s16): Likewise.
3858 (__arm_vmovltq_x_u8): Likewise.
3859 (__arm_vmovltq_x_u16): Likewise.
3860 (__arm_vmvnq_x_s8): Likewise.
3861 (__arm_vmvnq_x_s16): Likewise.
3862 (__arm_vmvnq_x_s32): Likewise.
3863 (__arm_vmvnq_x_u8): Likewise.
3864 (__arm_vmvnq_x_u16): Likewise.
3865 (__arm_vmvnq_x_u32): Likewise.
3866 (__arm_vmvnq_x_n_s16): Likewise.
3867 (__arm_vmvnq_x_n_s32): Likewise.
3868 (__arm_vmvnq_x_n_u16): Likewise.
3869 (__arm_vmvnq_x_n_u32): Likewise.
3870 (__arm_vornq_x_s8): Likewise.
3871 (__arm_vornq_x_s16): Likewise.
3872 (__arm_vornq_x_s32): Likewise.
3873 (__arm_vornq_x_u8): Likewise.
3874 (__arm_vornq_x_u16): Likewise.
3875 (__arm_vornq_x_u32): Likewise.
3876 (__arm_vorrq_x_s8): Likewise.
3877 (__arm_vorrq_x_s16): Likewise.
3878 (__arm_vorrq_x_s32): Likewise.
3879 (__arm_vorrq_x_u8): Likewise.
3880 (__arm_vorrq_x_u16): Likewise.
3881 (__arm_vorrq_x_u32): Likewise.
3882 (__arm_vrev16q_x_s8): Likewise.
3883 (__arm_vrev16q_x_u8): Likewise.
3884 (__arm_vrev32q_x_s8): Likewise.
3885 (__arm_vrev32q_x_s16): Likewise.
3886 (__arm_vrev32q_x_u8): Likewise.
3887 (__arm_vrev32q_x_u16): Likewise.
3888 (__arm_vrev64q_x_s8): Likewise.
3889 (__arm_vrev64q_x_s16): Likewise.
3890 (__arm_vrev64q_x_s32): Likewise.
3891 (__arm_vrev64q_x_u8): Likewise.
3892 (__arm_vrev64q_x_u16): Likewise.
3893 (__arm_vrev64q_x_u32): Likewise.
3894 (__arm_vrshlq_x_s8): Likewise.
3895 (__arm_vrshlq_x_s16): Likewise.
3896 (__arm_vrshlq_x_s32): Likewise.
3897 (__arm_vrshlq_x_u8): Likewise.
3898 (__arm_vrshlq_x_u16): Likewise.
3899 (__arm_vrshlq_x_u32): Likewise.
3900 (__arm_vshllbq_x_n_s8): Likewise.
3901 (__arm_vshllbq_x_n_s16): Likewise.
3902 (__arm_vshllbq_x_n_u8): Likewise.
3903 (__arm_vshllbq_x_n_u16): Likewise.
3904 (__arm_vshlltq_x_n_s8): Likewise.
3905 (__arm_vshlltq_x_n_s16): Likewise.
3906 (__arm_vshlltq_x_n_u8): Likewise.
3907 (__arm_vshlltq_x_n_u16): Likewise.
3908 (__arm_vshlq_x_s8): Likewise.
3909 (__arm_vshlq_x_s16): Likewise.
3910 (__arm_vshlq_x_s32): Likewise.
3911 (__arm_vshlq_x_u8): Likewise.
3912 (__arm_vshlq_x_u16): Likewise.
3913 (__arm_vshlq_x_u32): Likewise.
3914 (__arm_vshlq_x_n_s8): Likewise.
3915 (__arm_vshlq_x_n_s16): Likewise.
3916 (__arm_vshlq_x_n_s32): Likewise.
3917 (__arm_vshlq_x_n_u8): Likewise.
3918 (__arm_vshlq_x_n_u16): Likewise.
3919 (__arm_vshlq_x_n_u32): Likewise.
3920 (__arm_vrshrq_x_n_s8): Likewise.
3921 (__arm_vrshrq_x_n_s16): Likewise.
3922 (__arm_vrshrq_x_n_s32): Likewise.
3923 (__arm_vrshrq_x_n_u8): Likewise.
3924 (__arm_vrshrq_x_n_u16): Likewise.
3925 (__arm_vrshrq_x_n_u32): Likewise.
3926 (__arm_vshrq_x_n_s8): Likewise.
3927 (__arm_vshrq_x_n_s16): Likewise.
3928 (__arm_vshrq_x_n_s32): Likewise.
3929 (__arm_vshrq_x_n_u8): Likewise.
3930 (__arm_vshrq_x_n_u16): Likewise.
3931 (__arm_vshrq_x_n_u32): Likewise.
3932 (__arm_vdupq_x_n_f16): Likewise.
3933 (__arm_vdupq_x_n_f32): Likewise.
3934 (__arm_vminnmq_x_f16): Likewise.
3935 (__arm_vminnmq_x_f32): Likewise.
3936 (__arm_vmaxnmq_x_f16): Likewise.
3937 (__arm_vmaxnmq_x_f32): Likewise.
3938 (__arm_vabdq_x_f16): Likewise.
3939 (__arm_vabdq_x_f32): Likewise.
3940 (__arm_vabsq_x_f16): Likewise.
3941 (__arm_vabsq_x_f32): Likewise.
3942 (__arm_vaddq_x_f16): Likewise.
3943 (__arm_vaddq_x_f32): Likewise.
3944 (__arm_vaddq_x_n_f16): Likewise.
3945 (__arm_vaddq_x_n_f32): Likewise.
3946 (__arm_vnegq_x_f16): Likewise.
3947 (__arm_vnegq_x_f32): Likewise.
3948 (__arm_vmulq_x_f16): Likewise.
3949 (__arm_vmulq_x_f32): Likewise.
3950 (__arm_vmulq_x_n_f16): Likewise.
3951 (__arm_vmulq_x_n_f32): Likewise.
3952 (__arm_vsubq_x_f16): Likewise.
3953 (__arm_vsubq_x_f32): Likewise.
3954 (__arm_vsubq_x_n_f16): Likewise.
3955 (__arm_vsubq_x_n_f32): Likewise.
3956 (__arm_vcaddq_rot90_x_f16): Likewise.
3957 (__arm_vcaddq_rot90_x_f32): Likewise.
3958 (__arm_vcaddq_rot270_x_f16): Likewise.
3959 (__arm_vcaddq_rot270_x_f32): Likewise.
3960 (__arm_vcmulq_x_f16): Likewise.
3961 (__arm_vcmulq_x_f32): Likewise.
3962 (__arm_vcmulq_rot90_x_f16): Likewise.
3963 (__arm_vcmulq_rot90_x_f32): Likewise.
3964 (__arm_vcmulq_rot180_x_f16): Likewise.
3965 (__arm_vcmulq_rot180_x_f32): Likewise.
3966 (__arm_vcmulq_rot270_x_f16): Likewise.
3967 (__arm_vcmulq_rot270_x_f32): Likewise.
3968 (__arm_vcvtaq_x_s16_f16): Likewise.
3969 (__arm_vcvtaq_x_s32_f32): Likewise.
3970 (__arm_vcvtaq_x_u16_f16): Likewise.
3971 (__arm_vcvtaq_x_u32_f32): Likewise.
3972 (__arm_vcvtnq_x_s16_f16): Likewise.
3973 (__arm_vcvtnq_x_s32_f32): Likewise.
3974 (__arm_vcvtnq_x_u16_f16): Likewise.
3975 (__arm_vcvtnq_x_u32_f32): Likewise.
3976 (__arm_vcvtpq_x_s16_f16): Likewise.
3977 (__arm_vcvtpq_x_s32_f32): Likewise.
3978 (__arm_vcvtpq_x_u16_f16): Likewise.
3979 (__arm_vcvtpq_x_u32_f32): Likewise.
3980 (__arm_vcvtmq_x_s16_f16): Likewise.
3981 (__arm_vcvtmq_x_s32_f32): Likewise.
3982 (__arm_vcvtmq_x_u16_f16): Likewise.
3983 (__arm_vcvtmq_x_u32_f32): Likewise.
3984 (__arm_vcvtbq_x_f32_f16): Likewise.
3985 (__arm_vcvttq_x_f32_f16): Likewise.
3986 (__arm_vcvtq_x_f16_u16): Likewise.
3987 (__arm_vcvtq_x_f16_s16): Likewise.
3988 (__arm_vcvtq_x_f32_s32): Likewise.
3989 (__arm_vcvtq_x_f32_u32): Likewise.
3990 (__arm_vcvtq_x_n_f16_s16): Likewise.
3991 (__arm_vcvtq_x_n_f16_u16): Likewise.
3992 (__arm_vcvtq_x_n_f32_s32): Likewise.
3993 (__arm_vcvtq_x_n_f32_u32): Likewise.
3994 (__arm_vcvtq_x_s16_f16): Likewise.
3995 (__arm_vcvtq_x_s32_f32): Likewise.
3996 (__arm_vcvtq_x_u16_f16): Likewise.
3997 (__arm_vcvtq_x_u32_f32): Likewise.
3998 (__arm_vcvtq_x_n_s16_f16): Likewise.
3999 (__arm_vcvtq_x_n_s32_f32): Likewise.
4000 (__arm_vcvtq_x_n_u16_f16): Likewise.
4001 (__arm_vcvtq_x_n_u32_f32): Likewise.
4002 (__arm_vrndq_x_f16): Likewise.
4003 (__arm_vrndq_x_f32): Likewise.
4004 (__arm_vrndnq_x_f16): Likewise.
4005 (__arm_vrndnq_x_f32): Likewise.
4006 (__arm_vrndmq_x_f16): Likewise.
4007 (__arm_vrndmq_x_f32): Likewise.
4008 (__arm_vrndpq_x_f16): Likewise.
4009 (__arm_vrndpq_x_f32): Likewise.
4010 (__arm_vrndaq_x_f16): Likewise.
4011 (__arm_vrndaq_x_f32): Likewise.
4012 (__arm_vrndxq_x_f16): Likewise.
4013 (__arm_vrndxq_x_f32): Likewise.
4014 (__arm_vandq_x_f16): Likewise.
4015 (__arm_vandq_x_f32): Likewise.
4016 (__arm_vbicq_x_f16): Likewise.
4017 (__arm_vbicq_x_f32): Likewise.
4018 (__arm_vbrsrq_x_n_f16): Likewise.
4019 (__arm_vbrsrq_x_n_f32): Likewise.
4020 (__arm_veorq_x_f16): Likewise.
4021 (__arm_veorq_x_f32): Likewise.
4022 (__arm_vornq_x_f16): Likewise.
4023 (__arm_vornq_x_f32): Likewise.
4024 (__arm_vorrq_x_f16): Likewise.
4025 (__arm_vorrq_x_f32): Likewise.
4026 (__arm_vrev32q_x_f16): Likewise.
4027 (__arm_vrev64q_x_f16): Likewise.
4028 (__arm_vrev64q_x_f32): Likewise.
4029 (vabdq_x): Define polymorphic variant.
4030 (vabsq_x): Likewise.
4031 (vaddq_x): Likewise.
4032 (vandq_x): Likewise.
4033 (vbicq_x): Likewise.
4034 (vbrsrq_x): Likewise.
4035 (vcaddq_rot270_x): Likewise.
4036 (vcaddq_rot90_x): Likewise.
4037 (vcmulq_rot180_x): Likewise.
4038 (vcmulq_rot270_x): Likewise.
4039 (vcmulq_x): Likewise.
4040 (vcvtq_x): Likewise.
4041 (vcvtq_x_n): Likewise.
4042 (vcvtnq_m): Likewise.
4043 (veorq_x): Likewise.
4044 (vmaxnmq_x): Likewise.
4045 (vminnmq_x): Likewise.
4046 (vmulq_x): Likewise.
4047 (vnegq_x): Likewise.
4048 (vornq_x): Likewise.
4049 (vorrq_x): Likewise.
4050 (vrev32q_x): Likewise.
4051 (vrev64q_x): Likewise.
4052 (vrndaq_x): Likewise.
4053 (vrndmq_x): Likewise.
4054 (vrndnq_x): Likewise.
4055 (vrndpq_x): Likewise.
4056 (vrndq_x): Likewise.
4057 (vrndxq_x): Likewise.
4058 (vsubq_x): Likewise.
4059 (vcmulq_rot90_x): Likewise.
4061 (vclsq_x): Likewise.
4062 (vclzq_x): Likewise.
4063 (vhaddq_x): Likewise.
4064 (vhcaddq_rot270_x): Likewise.
4065 (vhcaddq_rot90_x): Likewise.
4066 (vhsubq_x): Likewise.
4067 (vmaxq_x): Likewise.
4068 (vminq_x): Likewise.
4069 (vmovlbq_x): Likewise.
4070 (vmovltq_x): Likewise.
4071 (vmulhq_x): Likewise.
4072 (vmullbq_int_x): Likewise.
4073 (vmullbq_poly_x): Likewise.
4074 (vmulltq_int_x): Likewise.
4075 (vmulltq_poly_x): Likewise.
4076 (vmvnq_x): Likewise.
4077 (vrev16q_x): Likewise.
4078 (vrhaddq_x): Likewise.
4079 (vrmulhq_x): Likewise.
4080 (vrshlq_x): Likewise.
4081 (vrshrq_x): Likewise.
4082 (vshllbq_x): Likewise.
4083 (vshlltq_x): Likewise.
4084 (vshlq_x_n): Likewise.
4085 (vshlq_x): Likewise.
4086 (vdwdupq_x_u8): Likewise.
4087 (vdwdupq_x_u16): Likewise.
4088 (vdwdupq_x_u32): Likewise.
4089 (viwdupq_x_u8): Likewise.
4090 (viwdupq_x_u16): Likewise.
4091 (viwdupq_x_u32): Likewise.
4092 (vidupq_x_u8): Likewise.
4093 (vddupq_x_u8): Likewise.
4094 (vidupq_x_u16): Likewise.
4095 (vddupq_x_u16): Likewise.
4096 (vidupq_x_u32): Likewise.
4097 (vddupq_x_u32): Likewise.
4098 (vshrq_x): Likewise.
4100 2020-03-20 Richard Biener <rguenther@suse.de>
4102 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
4103 to vectorize for CTOR defs.
4105 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4106 Andre Vieira <andre.simoesdiasvieira@arm.com>
4107 Mihail Ionescu <mihail.ionescu@arm.com>
4109 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
4111 (LDRGBWBU_QUALIFIERS): Likewise.
4112 (LDRGBWBS_Z_QUALIFIERS): Likewise.
4113 (LDRGBWBU_Z_QUALIFIERS): Likewise.
4114 (STRSBWBS_QUALIFIERS): Likewise.
4115 (STRSBWBU_QUALIFIERS): Likewise.
4116 (STRSBWBS_P_QUALIFIERS): Likewise.
4117 (STRSBWBU_P_QUALIFIERS): Likewise.
4118 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
4119 (vldrdq_gather_base_wb_u64): Likewise.
4120 (vldrdq_gather_base_wb_z_s64): Likewise.
4121 (vldrdq_gather_base_wb_z_u64): Likewise.
4122 (vldrwq_gather_base_wb_f32): Likewise.
4123 (vldrwq_gather_base_wb_s32): Likewise.
4124 (vldrwq_gather_base_wb_u32): Likewise.
4125 (vldrwq_gather_base_wb_z_f32): Likewise.
4126 (vldrwq_gather_base_wb_z_s32): Likewise.
4127 (vldrwq_gather_base_wb_z_u32): Likewise.
4128 (vstrdq_scatter_base_wb_p_s64): Likewise.
4129 (vstrdq_scatter_base_wb_p_u64): Likewise.
4130 (vstrdq_scatter_base_wb_s64): Likewise.
4131 (vstrdq_scatter_base_wb_u64): Likewise.
4132 (vstrwq_scatter_base_wb_p_s32): Likewise.
4133 (vstrwq_scatter_base_wb_p_f32): Likewise.
4134 (vstrwq_scatter_base_wb_p_u32): Likewise.
4135 (vstrwq_scatter_base_wb_s32): Likewise.
4136 (vstrwq_scatter_base_wb_u32): Likewise.
4137 (vstrwq_scatter_base_wb_f32): Likewise.
4138 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
4139 (__arm_vldrdq_gather_base_wb_u64): Likewise.
4140 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4141 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4142 (__arm_vldrwq_gather_base_wb_s32): Likewise.
4143 (__arm_vldrwq_gather_base_wb_u32): Likewise.
4144 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4145 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4146 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
4147 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
4148 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
4149 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
4150 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
4151 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
4152 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
4153 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
4154 (__arm_vldrwq_gather_base_wb_f32): Likewise.
4155 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4156 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
4157 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
4158 (vstrwq_scatter_base_wb): Define polymorphic variant.
4159 (vstrwq_scatter_base_wb_p): Likewise.
4160 (vstrdq_scatter_base_wb_p): Likewise.
4161 (vstrdq_scatter_base_wb): Likewise.
4162 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
4164 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
4166 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
4167 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
4168 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
4169 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
4170 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
4171 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
4172 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
4173 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
4174 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
4175 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
4176 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
4177 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
4178 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
4179 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
4180 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
4181 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
4182 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
4183 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
4184 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
4185 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
4186 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
4187 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
4188 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
4189 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
4190 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
4191 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
4192 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
4193 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
4194 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
4196 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4197 Andre Vieira <andre.simoesdiasvieira@arm.com>
4198 Mihail Ionescu <mihail.ionescu@arm.com>
4200 * config/arm/arm-builtins.c
4201 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
4203 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
4204 (vddupq_m_n_u32): Likewise.
4205 (vddupq_m_n_u16): Likewise.
4206 (vddupq_m_wb_u8): Likewise.
4207 (vddupq_m_wb_u16): Likewise.
4208 (vddupq_m_wb_u32): Likewise.
4209 (vddupq_n_u8): Likewise.
4210 (vddupq_n_u32): Likewise.
4211 (vddupq_n_u16): Likewise.
4212 (vddupq_wb_u8): Likewise.
4213 (vddupq_wb_u16): Likewise.
4214 (vddupq_wb_u32): Likewise.
4215 (vdwdupq_m_n_u8): Likewise.
4216 (vdwdupq_m_n_u32): Likewise.
4217 (vdwdupq_m_n_u16): Likewise.
4218 (vdwdupq_m_wb_u8): Likewise.
4219 (vdwdupq_m_wb_u32): Likewise.
4220 (vdwdupq_m_wb_u16): Likewise.
4221 (vdwdupq_n_u8): Likewise.
4222 (vdwdupq_n_u32): Likewise.
4223 (vdwdupq_n_u16): Likewise.
4224 (vdwdupq_wb_u8): Likewise.
4225 (vdwdupq_wb_u32): Likewise.
4226 (vdwdupq_wb_u16): Likewise.
4227 (vidupq_m_n_u8): Likewise.
4228 (vidupq_m_n_u32): Likewise.
4229 (vidupq_m_n_u16): Likewise.
4230 (vidupq_m_wb_u8): Likewise.
4231 (vidupq_m_wb_u16): Likewise.
4232 (vidupq_m_wb_u32): Likewise.
4233 (vidupq_n_u8): Likewise.
4234 (vidupq_n_u32): Likewise.
4235 (vidupq_n_u16): Likewise.
4236 (vidupq_wb_u8): Likewise.
4237 (vidupq_wb_u16): Likewise.
4238 (vidupq_wb_u32): Likewise.
4239 (viwdupq_m_n_u8): Likewise.
4240 (viwdupq_m_n_u32): Likewise.
4241 (viwdupq_m_n_u16): Likewise.
4242 (viwdupq_m_wb_u8): Likewise.
4243 (viwdupq_m_wb_u32): Likewise.
4244 (viwdupq_m_wb_u16): Likewise.
4245 (viwdupq_n_u8): Likewise.
4246 (viwdupq_n_u32): Likewise.
4247 (viwdupq_n_u16): Likewise.
4248 (viwdupq_wb_u8): Likewise.
4249 (viwdupq_wb_u32): Likewise.
4250 (viwdupq_wb_u16): Likewise.
4251 (__arm_vddupq_m_n_u8): Define intrinsic.
4252 (__arm_vddupq_m_n_u32): Likewise.
4253 (__arm_vddupq_m_n_u16): Likewise.
4254 (__arm_vddupq_m_wb_u8): Likewise.
4255 (__arm_vddupq_m_wb_u16): Likewise.
4256 (__arm_vddupq_m_wb_u32): Likewise.
4257 (__arm_vddupq_n_u8): Likewise.
4258 (__arm_vddupq_n_u32): Likewise.
4259 (__arm_vddupq_n_u16): Likewise.
4260 (__arm_vdwdupq_m_n_u8): Likewise.
4261 (__arm_vdwdupq_m_n_u32): Likewise.
4262 (__arm_vdwdupq_m_n_u16): Likewise.
4263 (__arm_vdwdupq_m_wb_u8): Likewise.
4264 (__arm_vdwdupq_m_wb_u32): Likewise.
4265 (__arm_vdwdupq_m_wb_u16): Likewise.
4266 (__arm_vdwdupq_n_u8): Likewise.
4267 (__arm_vdwdupq_n_u32): Likewise.
4268 (__arm_vdwdupq_n_u16): Likewise.
4269 (__arm_vdwdupq_wb_u8): Likewise.
4270 (__arm_vdwdupq_wb_u32): Likewise.
4271 (__arm_vdwdupq_wb_u16): Likewise.
4272 (__arm_vidupq_m_n_u8): Likewise.
4273 (__arm_vidupq_m_n_u32): Likewise.
4274 (__arm_vidupq_m_n_u16): Likewise.
4275 (__arm_vidupq_n_u8): Likewise.
4276 (__arm_vidupq_m_wb_u8): Likewise.
4277 (__arm_vidupq_m_wb_u16): Likewise.
4278 (__arm_vidupq_m_wb_u32): Likewise.
4279 (__arm_vidupq_n_u32): Likewise.
4280 (__arm_vidupq_n_u16): Likewise.
4281 (__arm_vidupq_wb_u8): Likewise.
4282 (__arm_vidupq_wb_u16): Likewise.
4283 (__arm_vidupq_wb_u32): Likewise.
4284 (__arm_vddupq_wb_u8): Likewise.
4285 (__arm_vddupq_wb_u16): Likewise.
4286 (__arm_vddupq_wb_u32): Likewise.
4287 (__arm_viwdupq_m_n_u8): Likewise.
4288 (__arm_viwdupq_m_n_u32): Likewise.
4289 (__arm_viwdupq_m_n_u16): Likewise.
4290 (__arm_viwdupq_m_wb_u8): Likewise.
4291 (__arm_viwdupq_m_wb_u32): Likewise.
4292 (__arm_viwdupq_m_wb_u16): Likewise.
4293 (__arm_viwdupq_n_u8): Likewise.
4294 (__arm_viwdupq_n_u32): Likewise.
4295 (__arm_viwdupq_n_u16): Likewise.
4296 (__arm_viwdupq_wb_u8): Likewise.
4297 (__arm_viwdupq_wb_u32): Likewise.
4298 (__arm_viwdupq_wb_u16): Likewise.
4299 (vidupq_m): Define polymorphic variant.
4300 (vddupq_m): Likewise.
4301 (vidupq_u16): Likewise.
4302 (vidupq_u32): Likewise.
4303 (vidupq_u8): Likewise.
4304 (vddupq_u16): Likewise.
4305 (vddupq_u32): Likewise.
4306 (vddupq_u8): Likewise.
4307 (viwdupq_m): Likewise.
4308 (viwdupq_u16): Likewise.
4309 (viwdupq_u32): Likewise.
4310 (viwdupq_u8): Likewise.
4311 (vdwdupq_m): Likewise.
4312 (vdwdupq_u16): Likewise.
4313 (vdwdupq_u32): Likewise.
4314 (vdwdupq_u8): Likewise.
4315 * config/arm/arm_mve_builtins.def
4316 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
4318 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
4319 (mve_vidupq_u<mode>_insn): Likewise.
4320 (mve_vidupq_m_n_u<mode>): Likewise.
4321 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
4322 (mve_vddupq_n_u<mode>): Likewise.
4323 (mve_vddupq_u<mode>_insn): Likewise.
4324 (mve_vddupq_m_n_u<mode>): Likewise.
4325 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
4326 (mve_vdwdupq_n_u<mode>): Likewise.
4327 (mve_vdwdupq_wb_u<mode>): Likewise.
4328 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
4329 (mve_vdwdupq_m_n_u<mode>): Likewise.
4330 (mve_vdwdupq_m_wb_u<mode>): Likewise.
4331 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
4332 (mve_viwdupq_n_u<mode>): Likewise.
4333 (mve_viwdupq_wb_u<mode>): Likewise.
4334 (mve_viwdupq_wb_u<mode>_insn): Likewise.
4335 (mve_viwdupq_m_n_u<mode>): Likewise.
4336 (mve_viwdupq_m_wb_u<mode>): Likewise.
4337 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
4339 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4341 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
4342 (vreinterpretq_s16_s64): Likewise.
4343 (vreinterpretq_s16_s8): Likewise.
4344 (vreinterpretq_s16_u16): Likewise.
4345 (vreinterpretq_s16_u32): Likewise.
4346 (vreinterpretq_s16_u64): Likewise.
4347 (vreinterpretq_s16_u8): Likewise.
4348 (vreinterpretq_s32_s16): Likewise.
4349 (vreinterpretq_s32_s64): Likewise.
4350 (vreinterpretq_s32_s8): Likewise.
4351 (vreinterpretq_s32_u16): Likewise.
4352 (vreinterpretq_s32_u32): Likewise.
4353 (vreinterpretq_s32_u64): Likewise.
4354 (vreinterpretq_s32_u8): Likewise.
4355 (vreinterpretq_s64_s16): Likewise.
4356 (vreinterpretq_s64_s32): Likewise.
4357 (vreinterpretq_s64_s8): Likewise.
4358 (vreinterpretq_s64_u16): Likewise.
4359 (vreinterpretq_s64_u32): Likewise.
4360 (vreinterpretq_s64_u64): Likewise.
4361 (vreinterpretq_s64_u8): Likewise.
4362 (vreinterpretq_s8_s16): Likewise.
4363 (vreinterpretq_s8_s32): Likewise.
4364 (vreinterpretq_s8_s64): Likewise.
4365 (vreinterpretq_s8_u16): Likewise.
4366 (vreinterpretq_s8_u32): Likewise.
4367 (vreinterpretq_s8_u64): Likewise.
4368 (vreinterpretq_s8_u8): Likewise.
4369 (vreinterpretq_u16_s16): Likewise.
4370 (vreinterpretq_u16_s32): Likewise.
4371 (vreinterpretq_u16_s64): Likewise.
4372 (vreinterpretq_u16_s8): Likewise.
4373 (vreinterpretq_u16_u32): Likewise.
4374 (vreinterpretq_u16_u64): Likewise.
4375 (vreinterpretq_u16_u8): Likewise.
4376 (vreinterpretq_u32_s16): Likewise.
4377 (vreinterpretq_u32_s32): Likewise.
4378 (vreinterpretq_u32_s64): Likewise.
4379 (vreinterpretq_u32_s8): Likewise.
4380 (vreinterpretq_u32_u16): Likewise.
4381 (vreinterpretq_u32_u64): Likewise.
4382 (vreinterpretq_u32_u8): Likewise.
4383 (vreinterpretq_u64_s16): Likewise.
4384 (vreinterpretq_u64_s32): Likewise.
4385 (vreinterpretq_u64_s64): Likewise.
4386 (vreinterpretq_u64_s8): Likewise.
4387 (vreinterpretq_u64_u16): Likewise.
4388 (vreinterpretq_u64_u32): Likewise.
4389 (vreinterpretq_u64_u8): Likewise.
4390 (vreinterpretq_u8_s16): Likewise.
4391 (vreinterpretq_u8_s32): Likewise.
4392 (vreinterpretq_u8_s64): Likewise.
4393 (vreinterpretq_u8_s8): Likewise.
4394 (vreinterpretq_u8_u16): Likewise.
4395 (vreinterpretq_u8_u32): Likewise.
4396 (vreinterpretq_u8_u64): Likewise.
4397 (vreinterpretq_s32_f16): Likewise.
4398 (vreinterpretq_s32_f32): Likewise.
4399 (vreinterpretq_u16_f16): Likewise.
4400 (vreinterpretq_u16_f32): Likewise.
4401 (vreinterpretq_u32_f16): Likewise.
4402 (vreinterpretq_u32_f32): Likewise.
4403 (vreinterpretq_u64_f16): Likewise.
4404 (vreinterpretq_u64_f32): Likewise.
4405 (vreinterpretq_u8_f16): Likewise.
4406 (vreinterpretq_u8_f32): Likewise.
4407 (vreinterpretq_f16_f32): Likewise.
4408 (vreinterpretq_f16_s16): Likewise.
4409 (vreinterpretq_f16_s32): Likewise.
4410 (vreinterpretq_f16_s64): Likewise.
4411 (vreinterpretq_f16_s8): Likewise.
4412 (vreinterpretq_f16_u16): Likewise.
4413 (vreinterpretq_f16_u32): Likewise.
4414 (vreinterpretq_f16_u64): Likewise.
4415 (vreinterpretq_f16_u8): Likewise.
4416 (vreinterpretq_f32_f16): Likewise.
4417 (vreinterpretq_f32_s16): Likewise.
4418 (vreinterpretq_f32_s32): Likewise.
4419 (vreinterpretq_f32_s64): Likewise.
4420 (vreinterpretq_f32_s8): Likewise.
4421 (vreinterpretq_f32_u16): Likewise.
4422 (vreinterpretq_f32_u32): Likewise.
4423 (vreinterpretq_f32_u64): Likewise.
4424 (vreinterpretq_f32_u8): Likewise.
4425 (vreinterpretq_s16_f16): Likewise.
4426 (vreinterpretq_s16_f32): Likewise.
4427 (vreinterpretq_s64_f16): Likewise.
4428 (vreinterpretq_s64_f32): Likewise.
4429 (vreinterpretq_s8_f16): Likewise.
4430 (vreinterpretq_s8_f32): Likewise.
4431 (vuninitializedq_u8): Likewise.
4432 (vuninitializedq_u16): Likewise.
4433 (vuninitializedq_u32): Likewise.
4434 (vuninitializedq_u64): Likewise.
4435 (vuninitializedq_s8): Likewise.
4436 (vuninitializedq_s16): Likewise.
4437 (vuninitializedq_s32): Likewise.
4438 (vuninitializedq_s64): Likewise.
4439 (vuninitializedq_f16): Likewise.
4440 (vuninitializedq_f32): Likewise.
4441 (__arm_vuninitializedq_u8): Define intrinsic.
4442 (__arm_vuninitializedq_u16): Likewise.
4443 (__arm_vuninitializedq_u32): Likewise.
4444 (__arm_vuninitializedq_u64): Likewise.
4445 (__arm_vuninitializedq_s8): Likewise.
4446 (__arm_vuninitializedq_s16): Likewise.
4447 (__arm_vuninitializedq_s32): Likewise.
4448 (__arm_vuninitializedq_s64): Likewise.
4449 (__arm_vreinterpretq_s16_s32): Likewise.
4450 (__arm_vreinterpretq_s16_s64): Likewise.
4451 (__arm_vreinterpretq_s16_s8): Likewise.
4452 (__arm_vreinterpretq_s16_u16): Likewise.
4453 (__arm_vreinterpretq_s16_u32): Likewise.
4454 (__arm_vreinterpretq_s16_u64): Likewise.
4455 (__arm_vreinterpretq_s16_u8): Likewise.
4456 (__arm_vreinterpretq_s32_s16): Likewise.
4457 (__arm_vreinterpretq_s32_s64): Likewise.
4458 (__arm_vreinterpretq_s32_s8): Likewise.
4459 (__arm_vreinterpretq_s32_u16): Likewise.
4460 (__arm_vreinterpretq_s32_u32): Likewise.
4461 (__arm_vreinterpretq_s32_u64): Likewise.
4462 (__arm_vreinterpretq_s32_u8): Likewise.
4463 (__arm_vreinterpretq_s64_s16): Likewise.
4464 (__arm_vreinterpretq_s64_s32): Likewise.
4465 (__arm_vreinterpretq_s64_s8): Likewise.
4466 (__arm_vreinterpretq_s64_u16): Likewise.
4467 (__arm_vreinterpretq_s64_u32): Likewise.
4468 (__arm_vreinterpretq_s64_u64): Likewise.
4469 (__arm_vreinterpretq_s64_u8): Likewise.
4470 (__arm_vreinterpretq_s8_s16): Likewise.
4471 (__arm_vreinterpretq_s8_s32): Likewise.
4472 (__arm_vreinterpretq_s8_s64): Likewise.
4473 (__arm_vreinterpretq_s8_u16): Likewise.
4474 (__arm_vreinterpretq_s8_u32): Likewise.
4475 (__arm_vreinterpretq_s8_u64): Likewise.
4476 (__arm_vreinterpretq_s8_u8): Likewise.
4477 (__arm_vreinterpretq_u16_s16): Likewise.
4478 (__arm_vreinterpretq_u16_s32): Likewise.
4479 (__arm_vreinterpretq_u16_s64): Likewise.
4480 (__arm_vreinterpretq_u16_s8): Likewise.
4481 (__arm_vreinterpretq_u16_u32): Likewise.
4482 (__arm_vreinterpretq_u16_u64): Likewise.
4483 (__arm_vreinterpretq_u16_u8): Likewise.
4484 (__arm_vreinterpretq_u32_s16): Likewise.
4485 (__arm_vreinterpretq_u32_s32): Likewise.
4486 (__arm_vreinterpretq_u32_s64): Likewise.
4487 (__arm_vreinterpretq_u32_s8): Likewise.
4488 (__arm_vreinterpretq_u32_u16): Likewise.
4489 (__arm_vreinterpretq_u32_u64): Likewise.
4490 (__arm_vreinterpretq_u32_u8): Likewise.
4491 (__arm_vreinterpretq_u64_s16): Likewise.
4492 (__arm_vreinterpretq_u64_s32): Likewise.
4493 (__arm_vreinterpretq_u64_s64): Likewise.
4494 (__arm_vreinterpretq_u64_s8): Likewise.
4495 (__arm_vreinterpretq_u64_u16): Likewise.
4496 (__arm_vreinterpretq_u64_u32): Likewise.
4497 (__arm_vreinterpretq_u64_u8): Likewise.
4498 (__arm_vreinterpretq_u8_s16): Likewise.
4499 (__arm_vreinterpretq_u8_s32): Likewise.
4500 (__arm_vreinterpretq_u8_s64): Likewise.
4501 (__arm_vreinterpretq_u8_s8): Likewise.
4502 (__arm_vreinterpretq_u8_u16): Likewise.
4503 (__arm_vreinterpretq_u8_u32): Likewise.
4504 (__arm_vreinterpretq_u8_u64): Likewise.
4505 (__arm_vuninitializedq_f16): Likewise.
4506 (__arm_vuninitializedq_f32): Likewise.
4507 (__arm_vreinterpretq_s32_f16): Likewise.
4508 (__arm_vreinterpretq_s32_f32): Likewise.
4509 (__arm_vreinterpretq_s16_f16): Likewise.
4510 (__arm_vreinterpretq_s16_f32): Likewise.
4511 (__arm_vreinterpretq_s64_f16): Likewise.
4512 (__arm_vreinterpretq_s64_f32): Likewise.
4513 (__arm_vreinterpretq_s8_f16): Likewise.
4514 (__arm_vreinterpretq_s8_f32): Likewise.
4515 (__arm_vreinterpretq_u16_f16): Likewise.
4516 (__arm_vreinterpretq_u16_f32): Likewise.
4517 (__arm_vreinterpretq_u32_f16): Likewise.
4518 (__arm_vreinterpretq_u32_f32): Likewise.
4519 (__arm_vreinterpretq_u64_f16): Likewise.
4520 (__arm_vreinterpretq_u64_f32): Likewise.
4521 (__arm_vreinterpretq_u8_f16): Likewise.
4522 (__arm_vreinterpretq_u8_f32): Likewise.
4523 (__arm_vreinterpretq_f16_f32): Likewise.
4524 (__arm_vreinterpretq_f16_s16): Likewise.
4525 (__arm_vreinterpretq_f16_s32): Likewise.
4526 (__arm_vreinterpretq_f16_s64): Likewise.
4527 (__arm_vreinterpretq_f16_s8): Likewise.
4528 (__arm_vreinterpretq_f16_u16): Likewise.
4529 (__arm_vreinterpretq_f16_u32): Likewise.
4530 (__arm_vreinterpretq_f16_u64): Likewise.
4531 (__arm_vreinterpretq_f16_u8): Likewise.
4532 (__arm_vreinterpretq_f32_f16): Likewise.
4533 (__arm_vreinterpretq_f32_s16): Likewise.
4534 (__arm_vreinterpretq_f32_s32): Likewise.
4535 (__arm_vreinterpretq_f32_s64): Likewise.
4536 (__arm_vreinterpretq_f32_s8): Likewise.
4537 (__arm_vreinterpretq_f32_u16): Likewise.
4538 (__arm_vreinterpretq_f32_u32): Likewise.
4539 (__arm_vreinterpretq_f32_u64): Likewise.
4540 (__arm_vreinterpretq_f32_u8): Likewise.
4541 (vuninitializedq): Define polymorphic variant.
4542 (vreinterpretq_f16): Likewise.
4543 (vreinterpretq_f32): Likewise.
4544 (vreinterpretq_s16): Likewise.
4545 (vreinterpretq_s32): Likewise.
4546 (vreinterpretq_s64): Likewise.
4547 (vreinterpretq_s8): Likewise.
4548 (vreinterpretq_u16): Likewise.
4549 (vreinterpretq_u32): Likewise.
4550 (vreinterpretq_u64): Likewise.
4551 (vreinterpretq_u8): Likewise.
4553 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4554 Andre Vieira <andre.simoesdiasvieira@arm.com>
4555 Mihail Ionescu <mihail.ionescu@arm.com>
4557 * config/arm/arm_mve.h (vaddq_s8): Define macro.
4558 (vaddq_s16): Likewise.
4559 (vaddq_s32): Likewise.
4560 (vaddq_u8): Likewise.
4561 (vaddq_u16): Likewise.
4562 (vaddq_u32): Likewise.
4563 (vaddq_f16): Likewise.
4564 (vaddq_f32): Likewise.
4565 (__arm_vaddq_s8): Define intrinsic.
4566 (__arm_vaddq_s16): Likewise.
4567 (__arm_vaddq_s32): Likewise.
4568 (__arm_vaddq_u8): Likewise.
4569 (__arm_vaddq_u16): Likewise.
4570 (__arm_vaddq_u32): Likewise.
4571 (__arm_vaddq_f16): Likewise.
4572 (__arm_vaddq_f32): Likewise.
4573 (vaddq): Define polymorphic variant.
4574 * config/arm/iterators.md (VNIM): Define mode iterator for common types
4575 Neon, IWMMXT and MVE.
4576 (VNINOTM): Likewise.
4577 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
4578 (mve_vaddq_f<mode>): Define RTL pattern.
4579 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
4580 (addv8hf3_neon): Define RTL pattern.
4581 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
4583 (addv8hf3): Define standard RTL pattern for MVE and Neon.
4584 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
4586 2020-03-20 Martin Liska <mliska@suse.cz>
4589 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
4590 build_ref_for_offset function was used and it transforms off to bytes
4593 2020-03-20 Richard Biener <rguenther@suse.de>
4595 PR tree-optimization/94266
4596 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
4597 type of the underlying object to adjust for the containing
4600 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4602 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
4603 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
4604 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
4606 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4608 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
4610 2020-03-20 Jakub Jelinek <jakub@redhat.com>
4612 PR tree-optimization/94224
4613 * gimple-ssa-store-merging.c
4614 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
4615 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
4618 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
4620 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
4622 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
4625 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
4626 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
4628 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
4631 * cgraphunit.c (process_function_and_variable_attributes): warn
4632 for flatten attribute on alias.
4633 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
4635 2020-03-19 Martin Liska <mliska@suse.cz>
4637 * lto-section-in.c: Add ext_symtab.
4638 * lto-streamer-out.c (write_symbol_extension_info): New.
4639 (produce_symtab_extension): New.
4640 (produce_asm_for_decls): Stream also produce_symtab_extension.
4641 * lto-streamer.h (enum lto_section_type): New section.
4643 2020-03-19 Jakub Jelinek <jakub@redhat.com>
4645 PR tree-optimization/94211
4646 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
4647 instead of estimate_num_insns for bb_seq (middle_bb). Rename
4648 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
4651 2020-03-19 Richard Biener <rguenther@suse.de>
4654 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
4655 and build_ref_for_offset.
4657 2020-03-19 Richard Biener <rguenther@suse.de>
4660 * fold-const.c (fold_binary_loc): Avoid using
4661 build_fold_addr_expr when we really want an ADDR_EXPR.
4663 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
4665 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
4668 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
4670 PR rtl-optimization/90275
4671 * cse.c (cse_insn): Delete no-op register moves too.
4673 2020-03-18 Martin Sebor <msebor@redhat.com>
4676 * cgraphunit.c (process_function_and_variable_attributes): Also
4677 complain about weakref function definitions and drop all effects
4680 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4681 Mihail Ionescu <mihail.ionescu@arm.com>
4682 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4684 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
4685 (vstrdq_scatter_base_p_u64): Likewise.
4686 (vstrdq_scatter_base_s64): Likewise.
4687 (vstrdq_scatter_base_u64): Likewise.
4688 (vstrdq_scatter_offset_p_s64): Likewise.
4689 (vstrdq_scatter_offset_p_u64): Likewise.
4690 (vstrdq_scatter_offset_s64): Likewise.
4691 (vstrdq_scatter_offset_u64): Likewise.
4692 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
4693 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
4694 (vstrdq_scatter_shifted_offset_s64): Likewise.
4695 (vstrdq_scatter_shifted_offset_u64): Likewise.
4696 (vstrhq_scatter_offset_f16): Likewise.
4697 (vstrhq_scatter_offset_p_f16): Likewise.
4698 (vstrhq_scatter_shifted_offset_f16): Likewise.
4699 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
4700 (vstrwq_scatter_base_f32): Likewise.
4701 (vstrwq_scatter_base_p_f32): Likewise.
4702 (vstrwq_scatter_offset_f32): Likewise.
4703 (vstrwq_scatter_offset_p_f32): Likewise.
4704 (vstrwq_scatter_offset_p_s32): Likewise.
4705 (vstrwq_scatter_offset_p_u32): Likewise.
4706 (vstrwq_scatter_offset_s32): Likewise.
4707 (vstrwq_scatter_offset_u32): Likewise.
4708 (vstrwq_scatter_shifted_offset_f32): Likewise.
4709 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
4710 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
4711 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
4712 (vstrwq_scatter_shifted_offset_s32): Likewise.
4713 (vstrwq_scatter_shifted_offset_u32): Likewise.
4714 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
4715 (__arm_vstrdq_scatter_base_p_u64): Likewise.
4716 (__arm_vstrdq_scatter_base_s64): Likewise.
4717 (__arm_vstrdq_scatter_base_u64): Likewise.
4718 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
4719 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
4720 (__arm_vstrdq_scatter_offset_s64): Likewise.
4721 (__arm_vstrdq_scatter_offset_u64): Likewise.
4722 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
4723 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
4724 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
4725 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
4726 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
4727 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
4728 (__arm_vstrwq_scatter_offset_s32): Likewise.
4729 (__arm_vstrwq_scatter_offset_u32): Likewise.
4730 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
4731 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
4732 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
4733 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
4734 (__arm_vstrhq_scatter_offset_f16): Likewise.
4735 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
4736 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
4737 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
4738 (__arm_vstrwq_scatter_base_f32): Likewise.
4739 (__arm_vstrwq_scatter_base_p_f32): Likewise.
4740 (__arm_vstrwq_scatter_offset_f32): Likewise.
4741 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
4742 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
4743 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
4744 (vstrhq_scatter_offset): Define polymorphic variant.
4745 (vstrhq_scatter_offset_p): Likewise.
4746 (vstrhq_scatter_shifted_offset): Likewise.
4747 (vstrhq_scatter_shifted_offset_p): Likewise.
4748 (vstrwq_scatter_base): Likewise.
4749 (vstrwq_scatter_base_p): Likewise.
4750 (vstrwq_scatter_offset): Likewise.
4751 (vstrwq_scatter_offset_p): Likewise.
4752 (vstrwq_scatter_shifted_offset): Likewise.
4753 (vstrwq_scatter_shifted_offset_p): Likewise.
4754 (vstrdq_scatter_base_p): Likewise.
4755 (vstrdq_scatter_base): Likewise.
4756 (vstrdq_scatter_offset_p): Likewise.
4757 (vstrdq_scatter_offset): Likewise.
4758 (vstrdq_scatter_shifted_offset_p): Likewise.
4759 (vstrdq_scatter_shifted_offset): Likewise.
4760 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
4761 (STRSBS_P): Likewise.
4763 (STRSBU_P): Likewise.
4765 (STRSS_P): Likewise.
4767 (STRSU_P): Likewise.
4768 * config/arm/constraints.md (Ri): Define.
4769 * config/arm/mve.md (VSTRDSBQ): Define iterator.
4770 (VSTRDSOQ): Likewise.
4771 (VSTRDSSOQ): Likewise.
4772 (VSTRWSOQ): Likewise.
4773 (VSTRWSSOQ): Likewise.
4774 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
4775 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
4776 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
4777 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
4778 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
4779 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
4780 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
4781 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
4782 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
4783 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
4784 (mve_vstrwq_scatter_base_fv4sf): Likewise.
4785 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
4786 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
4787 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
4788 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
4789 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
4790 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
4791 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
4792 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
4793 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
4794 * config/arm/predicates.md (Ri): Define predicate to check immediate
4795 is the range +/-1016 and multiple of 8.
4797 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4798 Mihail Ionescu <mihail.ionescu@arm.com>
4799 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4801 * config/arm/arm_mve.h (vst1q_f32): Define macro.
4802 (vst1q_f16): Likewise.
4803 (vst1q_s8): Likewise.
4804 (vst1q_s32): Likewise.
4805 (vst1q_s16): Likewise.
4806 (vst1q_u8): Likewise.
4807 (vst1q_u32): Likewise.
4808 (vst1q_u16): Likewise.
4809 (vstrhq_f16): Likewise.
4810 (vstrhq_scatter_offset_s32): Likewise.
4811 (vstrhq_scatter_offset_s16): Likewise.
4812 (vstrhq_scatter_offset_u32): Likewise.
4813 (vstrhq_scatter_offset_u16): Likewise.
4814 (vstrhq_scatter_offset_p_s32): Likewise.
4815 (vstrhq_scatter_offset_p_s16): Likewise.
4816 (vstrhq_scatter_offset_p_u32): Likewise.
4817 (vstrhq_scatter_offset_p_u16): Likewise.
4818 (vstrhq_scatter_shifted_offset_s32): Likewise.
4819 (vstrhq_scatter_shifted_offset_s16): Likewise.
4820 (vstrhq_scatter_shifted_offset_u32): Likewise.
4821 (vstrhq_scatter_shifted_offset_u16): Likewise.
4822 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
4823 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
4824 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
4825 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
4826 (vstrhq_s32): Likewise.
4827 (vstrhq_s16): Likewise.
4828 (vstrhq_u32): Likewise.
4829 (vstrhq_u16): Likewise.
4830 (vstrhq_p_f16): Likewise.
4831 (vstrhq_p_s32): Likewise.
4832 (vstrhq_p_s16): Likewise.
4833 (vstrhq_p_u32): Likewise.
4834 (vstrhq_p_u16): Likewise.
4835 (vstrwq_f32): Likewise.
4836 (vstrwq_s32): Likewise.
4837 (vstrwq_u32): Likewise.
4838 (vstrwq_p_f32): Likewise.
4839 (vstrwq_p_s32): Likewise.
4840 (vstrwq_p_u32): Likewise.
4841 (__arm_vst1q_s8): Define intrinsic.
4842 (__arm_vst1q_s32): Likewise.
4843 (__arm_vst1q_s16): Likewise.
4844 (__arm_vst1q_u8): Likewise.
4845 (__arm_vst1q_u32): Likewise.
4846 (__arm_vst1q_u16): Likewise.
4847 (__arm_vstrhq_scatter_offset_s32): Likewise.
4848 (__arm_vstrhq_scatter_offset_s16): Likewise.
4849 (__arm_vstrhq_scatter_offset_u32): Likewise.
4850 (__arm_vstrhq_scatter_offset_u16): Likewise.
4851 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
4852 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
4853 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
4854 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
4855 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
4856 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
4857 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
4858 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
4859 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
4860 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
4861 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
4862 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
4863 (__arm_vstrhq_s32): Likewise.
4864 (__arm_vstrhq_s16): Likewise.
4865 (__arm_vstrhq_u32): Likewise.
4866 (__arm_vstrhq_u16): Likewise.
4867 (__arm_vstrhq_p_s32): Likewise.
4868 (__arm_vstrhq_p_s16): Likewise.
4869 (__arm_vstrhq_p_u32): Likewise.
4870 (__arm_vstrhq_p_u16): Likewise.
4871 (__arm_vstrwq_s32): Likewise.
4872 (__arm_vstrwq_u32): Likewise.
4873 (__arm_vstrwq_p_s32): Likewise.
4874 (__arm_vstrwq_p_u32): Likewise.
4875 (__arm_vstrwq_p_f32): Likewise.
4876 (__arm_vstrwq_f32): Likewise.
4877 (__arm_vst1q_f32): Likewise.
4878 (__arm_vst1q_f16): Likewise.
4879 (__arm_vstrhq_f16): Likewise.
4880 (__arm_vstrhq_p_f16): Likewise.
4881 (vst1q): Define polymorphic variant.
4883 (vstrhq_p): Likewise.
4884 (vstrhq_scatter_offset_p): Likewise.
4885 (vstrhq_scatter_offset): Likewise.
4886 (vstrhq_scatter_shifted_offset_p): Likewise.
4887 (vstrhq_scatter_shifted_offset): Likewise.
4888 (vstrwq_p): Likewise.
4890 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
4893 (STRSS_P): Likewise.
4895 (STRSU_P): Likewise.
4898 * config/arm/mve.md (VST1Q): Define iterator.
4899 (VSTRHSOQ): Likewise.
4900 (VSTRHSSOQ): Likewise.
4903 (mve_vstrhq_fv8hf): Define RTL pattern.
4904 (mve_vstrhq_p_fv8hf): Likewise.
4905 (mve_vstrhq_p_<supf><mode>): Likewise.
4906 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
4907 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
4908 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
4909 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
4910 (mve_vstrhq_<supf><mode>): Likewise.
4911 (mve_vstrwq_fv4sf): Likewise.
4912 (mve_vstrwq_p_fv4sf): Likewise.
4913 (mve_vstrwq_p_<supf>v4si): Likewise.
4914 (mve_vstrwq_<supf>v4si): Likewise.
4915 (mve_vst1q_f<mode>): Define expand.
4916 (mve_vst1q_<supf><mode>): Likewise.
4918 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
4919 Mihail Ionescu <mihail.ionescu@arm.com>
4920 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4922 * config/arm/arm_mve.h (vld1q_s8): Define macro.
4923 (vld1q_s32): Likewise.
4924 (vld1q_s16): Likewise.
4925 (vld1q_u8): Likewise.
4926 (vld1q_u32): Likewise.
4927 (vld1q_u16): Likewise.
4928 (vldrhq_gather_offset_s32): Likewise.
4929 (vldrhq_gather_offset_s16): Likewise.
4930 (vldrhq_gather_offset_u32): Likewise.
4931 (vldrhq_gather_offset_u16): Likewise.
4932 (vldrhq_gather_offset_z_s32): Likewise.
4933 (vldrhq_gather_offset_z_s16): Likewise.
4934 (vldrhq_gather_offset_z_u32): Likewise.
4935 (vldrhq_gather_offset_z_u16): Likewise.
4936 (vldrhq_gather_shifted_offset_s32): Likewise.
4937 (vldrhq_gather_shifted_offset_s16): Likewise.
4938 (vldrhq_gather_shifted_offset_u32): Likewise.
4939 (vldrhq_gather_shifted_offset_u16): Likewise.
4940 (vldrhq_gather_shifted_offset_z_s32): Likewise.
4941 (vldrhq_gather_shifted_offset_z_s16): Likewise.
4942 (vldrhq_gather_shifted_offset_z_u32): Likewise.
4943 (vldrhq_gather_shifted_offset_z_u16): Likewise.
4944 (vldrhq_s32): Likewise.
4945 (vldrhq_s16): Likewise.
4946 (vldrhq_u32): Likewise.
4947 (vldrhq_u16): Likewise.
4948 (vldrhq_z_s32): Likewise.
4949 (vldrhq_z_s16): Likewise.
4950 (vldrhq_z_u32): Likewise.
4951 (vldrhq_z_u16): Likewise.
4952 (vldrwq_s32): Likewise.
4953 (vldrwq_u32): Likewise.
4954 (vldrwq_z_s32): Likewise.
4955 (vldrwq_z_u32): Likewise.
4956 (vld1q_f32): Likewise.
4957 (vld1q_f16): Likewise.
4958 (vldrhq_f16): Likewise.
4959 (vldrhq_z_f16): Likewise.
4960 (vldrwq_f32): Likewise.
4961 (vldrwq_z_f32): Likewise.
4962 (__arm_vld1q_s8): Define intrinsic.
4963 (__arm_vld1q_s32): Likewise.
4964 (__arm_vld1q_s16): Likewise.
4965 (__arm_vld1q_u8): Likewise.
4966 (__arm_vld1q_u32): Likewise.
4967 (__arm_vld1q_u16): Likewise.
4968 (__arm_vldrhq_gather_offset_s32): Likewise.
4969 (__arm_vldrhq_gather_offset_s16): Likewise.
4970 (__arm_vldrhq_gather_offset_u32): Likewise.
4971 (__arm_vldrhq_gather_offset_u16): Likewise.
4972 (__arm_vldrhq_gather_offset_z_s32): Likewise.
4973 (__arm_vldrhq_gather_offset_z_s16): Likewise.
4974 (__arm_vldrhq_gather_offset_z_u32): Likewise.
4975 (__arm_vldrhq_gather_offset_z_u16): Likewise.
4976 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
4977 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
4978 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
4979 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
4980 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
4981 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
4982 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
4983 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
4984 (__arm_vldrhq_s32): Likewise.
4985 (__arm_vldrhq_s16): Likewise.
4986 (__arm_vldrhq_u32): Likewise.
4987 (__arm_vldrhq_u16): Likewise.
4988 (__arm_vldrhq_z_s32): Likewise.
4989 (__arm_vldrhq_z_s16): Likewise.
4990 (__arm_vldrhq_z_u32): Likewise.
4991 (__arm_vldrhq_z_u16): Likewise.
4992 (__arm_vldrwq_s32): Likewise.
4993 (__arm_vldrwq_u32): Likewise.
4994 (__arm_vldrwq_z_s32): Likewise.
4995 (__arm_vldrwq_z_u32): Likewise.
4996 (__arm_vld1q_f32): Likewise.
4997 (__arm_vld1q_f16): Likewise.
4998 (__arm_vldrwq_f32): Likewise.
4999 (__arm_vldrwq_z_f32): Likewise.
5000 (__arm_vldrhq_z_f16): Likewise.
5001 (__arm_vldrhq_f16): Likewise.
5002 (vld1q): Define polymorphic variant.
5003 (vldrhq_gather_offset): Likewise.
5004 (vldrhq_gather_offset_z): Likewise.
5005 (vldrhq_gather_shifted_offset): Likewise.
5006 (vldrhq_gather_shifted_offset_z): Likewise.
5007 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
5011 (LDRGU_Z): Likewise.
5013 (LDRGS_Z): Likewise.
5015 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
5016 (V_sz_elem1): Likewise.
5017 (VLD1Q): Define iterator.
5018 (VLDRHGOQ): Likewise.
5019 (VLDRHGSOQ): Likewise.
5022 (mve_vldrhq_fv8hf): Define RTL pattern.
5023 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
5024 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
5025 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
5026 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
5027 (mve_vldrhq_<supf><mode>): Likewise.
5028 (mve_vldrhq_z_fv8hf): Likewise.
5029 (mve_vldrhq_z_<supf><mode>): Likewise.
5030 (mve_vldrwq_fv4sf): Likewise.
5031 (mve_vldrwq_<supf>v4si): Likewise.
5032 (mve_vldrwq_z_fv4sf): Likewise.
5033 (mve_vldrwq_z_<supf>v4si): Likewise.
5034 (mve_vld1q_f<mode>): Define RTL expand pattern.
5035 (mve_vld1q_<supf><mode>): Likewise.
5037 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5038 Mihail Ionescu <mihail.ionescu@arm.com>
5039 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5041 * config/arm/arm_mve.h (vld1q_s8): Define macro.
5042 (vld1q_s32): Likewise.
5043 (vld1q_s16): Likewise.
5044 (vld1q_u8): Likewise.
5045 (vld1q_u32): Likewise.
5046 (vld1q_u16): Likewise.
5047 (vldrhq_gather_offset_s32): Likewise.
5048 (vldrhq_gather_offset_s16): Likewise.
5049 (vldrhq_gather_offset_u32): Likewise.
5050 (vldrhq_gather_offset_u16): Likewise.
5051 (vldrhq_gather_offset_z_s32): Likewise.
5052 (vldrhq_gather_offset_z_s16): Likewise.
5053 (vldrhq_gather_offset_z_u32): Likewise.
5054 (vldrhq_gather_offset_z_u16): Likewise.
5055 (vldrhq_gather_shifted_offset_s32): Likewise.
5056 (vldrhq_gather_shifted_offset_s16): Likewise.
5057 (vldrhq_gather_shifted_offset_u32): Likewise.
5058 (vldrhq_gather_shifted_offset_u16): Likewise.
5059 (vldrhq_gather_shifted_offset_z_s32): Likewise.
5060 (vldrhq_gather_shifted_offset_z_s16): Likewise.
5061 (vldrhq_gather_shifted_offset_z_u32): Likewise.
5062 (vldrhq_gather_shifted_offset_z_u16): Likewise.
5063 (vldrhq_s32): Likewise.
5064 (vldrhq_s16): Likewise.
5065 (vldrhq_u32): Likewise.
5066 (vldrhq_u16): Likewise.
5067 (vldrhq_z_s32): Likewise.
5068 (vldrhq_z_s16): Likewise.
5069 (vldrhq_z_u32): Likewise.
5070 (vldrhq_z_u16): Likewise.
5071 (vldrwq_s32): Likewise.
5072 (vldrwq_u32): Likewise.
5073 (vldrwq_z_s32): Likewise.
5074 (vldrwq_z_u32): Likewise.
5075 (vld1q_f32): Likewise.
5076 (vld1q_f16): Likewise.
5077 (vldrhq_f16): Likewise.
5078 (vldrhq_z_f16): Likewise.
5079 (vldrwq_f32): Likewise.
5080 (vldrwq_z_f32): Likewise.
5081 (__arm_vld1q_s8): Define intrinsic.
5082 (__arm_vld1q_s32): Likewise.
5083 (__arm_vld1q_s16): Likewise.
5084 (__arm_vld1q_u8): Likewise.
5085 (__arm_vld1q_u32): Likewise.
5086 (__arm_vld1q_u16): Likewise.
5087 (__arm_vldrhq_gather_offset_s32): Likewise.
5088 (__arm_vldrhq_gather_offset_s16): Likewise.
5089 (__arm_vldrhq_gather_offset_u32): Likewise.
5090 (__arm_vldrhq_gather_offset_u16): Likewise.
5091 (__arm_vldrhq_gather_offset_z_s32): Likewise.
5092 (__arm_vldrhq_gather_offset_z_s16): Likewise.
5093 (__arm_vldrhq_gather_offset_z_u32): Likewise.
5094 (__arm_vldrhq_gather_offset_z_u16): Likewise.
5095 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
5096 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
5097 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
5098 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
5099 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
5100 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
5101 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
5102 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
5103 (__arm_vldrhq_s32): Likewise.
5104 (__arm_vldrhq_s16): Likewise.
5105 (__arm_vldrhq_u32): Likewise.
5106 (__arm_vldrhq_u16): Likewise.
5107 (__arm_vldrhq_z_s32): Likewise.
5108 (__arm_vldrhq_z_s16): Likewise.
5109 (__arm_vldrhq_z_u32): Likewise.
5110 (__arm_vldrhq_z_u16): Likewise.
5111 (__arm_vldrwq_s32): Likewise.
5112 (__arm_vldrwq_u32): Likewise.
5113 (__arm_vldrwq_z_s32): Likewise.
5114 (__arm_vldrwq_z_u32): Likewise.
5115 (__arm_vld1q_f32): Likewise.
5116 (__arm_vld1q_f16): Likewise.
5117 (__arm_vldrwq_f32): Likewise.
5118 (__arm_vldrwq_z_f32): Likewise.
5119 (__arm_vldrhq_z_f16): Likewise.
5120 (__arm_vldrhq_f16): Likewise.
5121 (vld1q): Define polymorphic variant.
5122 (vldrhq_gather_offset): Likewise.
5123 (vldrhq_gather_offset_z): Likewise.
5124 (vldrhq_gather_shifted_offset): Likewise.
5125 (vldrhq_gather_shifted_offset_z): Likewise.
5126 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
5130 (LDRGU_Z): Likewise.
5132 (LDRGS_Z): Likewise.
5134 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
5135 (V_sz_elem1): Likewise.
5136 (VLD1Q): Define iterator.
5137 (VLDRHGOQ): Likewise.
5138 (VLDRHGSOQ): Likewise.
5141 (mve_vldrhq_fv8hf): Define RTL pattern.
5142 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
5143 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
5144 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
5145 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
5146 (mve_vldrhq_<supf><mode>): Likewise.
5147 (mve_vldrhq_z_fv8hf): Likewise.
5148 (mve_vldrhq_z_<supf><mode>): Likewise.
5149 (mve_vldrwq_fv4sf): Likewise.
5150 (mve_vldrwq_<supf>v4si): Likewise.
5151 (mve_vldrwq_z_fv4sf): Likewise.
5152 (mve_vldrwq_z_<supf>v4si): Likewise.
5153 (mve_vld1q_f<mode>): Define RTL expand pattern.
5154 (mve_vld1q_<supf><mode>): Likewise.
5156 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5157 Mihail Ionescu <mihail.ionescu@arm.com>
5158 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5160 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
5162 (LDRGBU_Z_QUALIFIERS): Likewise.
5163 (LDRGS_Z_QUALIFIERS): Likewise.
5164 (LDRGU_Z_QUALIFIERS): Likewise.
5165 (LDRS_Z_QUALIFIERS): Likewise.
5166 (LDRU_Z_QUALIFIERS): Likewise.
5167 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
5168 (vldrbq_gather_offset_z_u8): Likewise.
5169 (vldrbq_gather_offset_z_s32): Likewise.
5170 (vldrbq_gather_offset_z_u16): Likewise.
5171 (vldrbq_gather_offset_z_u32): Likewise.
5172 (vldrbq_gather_offset_z_s8): Likewise.
5173 (vldrbq_z_s16): Likewise.
5174 (vldrbq_z_u8): Likewise.
5175 (vldrbq_z_s8): Likewise.
5176 (vldrbq_z_s32): Likewise.
5177 (vldrbq_z_u16): Likewise.
5178 (vldrbq_z_u32): Likewise.
5179 (vldrwq_gather_base_z_u32): Likewise.
5180 (vldrwq_gather_base_z_s32): Likewise.
5181 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
5182 (__arm_vldrbq_gather_offset_z_s32): Likewise.
5183 (__arm_vldrbq_gather_offset_z_s16): Likewise.
5184 (__arm_vldrbq_gather_offset_z_u8): Likewise.
5185 (__arm_vldrbq_gather_offset_z_u32): Likewise.
5186 (__arm_vldrbq_gather_offset_z_u16): Likewise.
5187 (__arm_vldrbq_z_s8): Likewise.
5188 (__arm_vldrbq_z_s32): Likewise.
5189 (__arm_vldrbq_z_s16): Likewise.
5190 (__arm_vldrbq_z_u8): Likewise.
5191 (__arm_vldrbq_z_u32): Likewise.
5192 (__arm_vldrbq_z_u16): Likewise.
5193 (__arm_vldrwq_gather_base_z_s32): Likewise.
5194 (__arm_vldrwq_gather_base_z_u32): Likewise.
5195 (vldrbq_gather_offset_z): Define polymorphic variant.
5196 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
5198 (LDRGBU_Z_QUALIFIERS): Likewise.
5199 (LDRGS_Z_QUALIFIERS): Likewise.
5200 (LDRGU_Z_QUALIFIERS): Likewise.
5201 (LDRS_Z_QUALIFIERS): Likewise.
5202 (LDRU_Z_QUALIFIERS): Likewise.
5203 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
5205 (mve_vldrbq_z_<supf><mode>): Likewise.
5206 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
5208 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5209 Mihail Ionescu <mihail.ionescu@arm.com>
5210 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5212 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
5214 (STRU_P_QUALIFIERS): Likewise.
5215 (STRSU_P_QUALIFIERS): Likewise.
5216 (STRSS_P_QUALIFIERS): Likewise.
5217 (STRSBS_P_QUALIFIERS): Likewise.
5218 (STRSBU_P_QUALIFIERS): Likewise.
5219 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
5220 (vstrbq_p_s32): Likewise.
5221 (vstrbq_p_s16): Likewise.
5222 (vstrbq_p_u8): Likewise.
5223 (vstrbq_p_u32): Likewise.
5224 (vstrbq_p_u16): Likewise.
5225 (vstrbq_scatter_offset_p_s8): Likewise.
5226 (vstrbq_scatter_offset_p_s32): Likewise.
5227 (vstrbq_scatter_offset_p_s16): Likewise.
5228 (vstrbq_scatter_offset_p_u8): Likewise.
5229 (vstrbq_scatter_offset_p_u32): Likewise.
5230 (vstrbq_scatter_offset_p_u16): Likewise.
5231 (vstrwq_scatter_base_p_s32): Likewise.
5232 (vstrwq_scatter_base_p_u32): Likewise.
5233 (__arm_vstrbq_p_s8): Define intrinsic.
5234 (__arm_vstrbq_p_s32): Likewise.
5235 (__arm_vstrbq_p_s16): Likewise.
5236 (__arm_vstrbq_p_u8): Likewise.
5237 (__arm_vstrbq_p_u32): Likewise.
5238 (__arm_vstrbq_p_u16): Likewise.
5239 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
5240 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
5241 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
5242 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
5243 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
5244 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
5245 (__arm_vstrwq_scatter_base_p_s32): Likewise.
5246 (__arm_vstrwq_scatter_base_p_u32): Likewise.
5247 (vstrbq_p): Define polymorphic variant.
5248 (vstrbq_scatter_offset_p): Likewise.
5249 (vstrwq_scatter_base_p): Likewise.
5250 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
5252 (STRU_P_QUALIFIERS): Likewise.
5253 (STRSU_P_QUALIFIERS): Likewise.
5254 (STRSS_P_QUALIFIERS): Likewise.
5255 (STRSBS_P_QUALIFIERS): Likewise.
5256 (STRSBU_P_QUALIFIERS): Likewise.
5257 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
5259 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
5260 (mve_vstrbq_p_<supf><mode>): Likewise.
5262 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5263 Mihail Ionescu <mihail.ionescu@arm.com>
5264 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5266 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
5268 (LDRGS_QUALIFIERS): Likewise.
5269 (LDRS_QUALIFIERS): Likewise.
5270 (LDRU_QUALIFIERS): Likewise.
5271 (LDRGBS_QUALIFIERS): Likewise.
5272 (LDRGBU_QUALIFIERS): Likewise.
5273 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
5274 (vldrbq_gather_offset_s8): Likewise.
5275 (vldrbq_s8): Likewise.
5276 (vldrbq_u8): Likewise.
5277 (vldrbq_gather_offset_u16): Likewise.
5278 (vldrbq_gather_offset_s16): Likewise.
5279 (vldrbq_s16): Likewise.
5280 (vldrbq_u16): Likewise.
5281 (vldrbq_gather_offset_u32): Likewise.
5282 (vldrbq_gather_offset_s32): Likewise.
5283 (vldrbq_s32): Likewise.
5284 (vldrbq_u32): Likewise.
5285 (vldrwq_gather_base_s32): Likewise.
5286 (vldrwq_gather_base_u32): Likewise.
5287 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
5288 (__arm_vldrbq_gather_offset_s8): Likewise.
5289 (__arm_vldrbq_s8): Likewise.
5290 (__arm_vldrbq_u8): Likewise.
5291 (__arm_vldrbq_gather_offset_u16): Likewise.
5292 (__arm_vldrbq_gather_offset_s16): Likewise.
5293 (__arm_vldrbq_s16): Likewise.
5294 (__arm_vldrbq_u16): Likewise.
5295 (__arm_vldrbq_gather_offset_u32): Likewise.
5296 (__arm_vldrbq_gather_offset_s32): Likewise.
5297 (__arm_vldrbq_s32): Likewise.
5298 (__arm_vldrbq_u32): Likewise.
5299 (__arm_vldrwq_gather_base_s32): Likewise.
5300 (__arm_vldrwq_gather_base_u32): Likewise.
5301 (vldrbq_gather_offset): Define polymorphic variant.
5302 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
5304 (LDRGS_QUALIFIERS): Likewise.
5305 (LDRS_QUALIFIERS): Likewise.
5306 (LDRU_QUALIFIERS): Likewise.
5307 (LDRGBS_QUALIFIERS): Likewise.
5308 (LDRGBU_QUALIFIERS): Likewise.
5309 * config/arm/mve.md (VLDRBGOQ): Define iterator.
5311 (VLDRWGBQ): Likewise.
5312 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
5313 (mve_vldrbq_<supf><mode>): Likewise.
5314 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
5316 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5317 Mihail Ionescu <mihail.ionescu@arm.com>
5318 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5320 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
5321 (STRU_QUALIFIERS): Likewise.
5322 (STRSS_QUALIFIERS): Likewise.
5323 (STRSU_QUALIFIERS): Likewise.
5324 (STRSBS_QUALIFIERS): Likewise.
5325 (STRSBU_QUALIFIERS): Likewise.
5326 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
5327 (vstrbq_u8): Likewise.
5328 (vstrbq_u16): Likewise.
5329 (vstrbq_scatter_offset_s8): Likewise.
5330 (vstrbq_scatter_offset_u8): Likewise.
5331 (vstrbq_scatter_offset_u16): Likewise.
5332 (vstrbq_s16): Likewise.
5333 (vstrbq_u32): Likewise.
5334 (vstrbq_scatter_offset_s16): Likewise.
5335 (vstrbq_scatter_offset_u32): Likewise.
5336 (vstrbq_s32): Likewise.
5337 (vstrbq_scatter_offset_s32): Likewise.
5338 (vstrwq_scatter_base_s32): Likewise.
5339 (vstrwq_scatter_base_u32): Likewise.
5340 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
5341 (__arm_vstrbq_scatter_offset_s32): Likewise.
5342 (__arm_vstrbq_scatter_offset_s16): Likewise.
5343 (__arm_vstrbq_scatter_offset_u8): Likewise.
5344 (__arm_vstrbq_scatter_offset_u32): Likewise.
5345 (__arm_vstrbq_scatter_offset_u16): Likewise.
5346 (__arm_vstrbq_s8): Likewise.
5347 (__arm_vstrbq_s32): Likewise.
5348 (__arm_vstrbq_s16): Likewise.
5349 (__arm_vstrbq_u8): Likewise.
5350 (__arm_vstrbq_u32): Likewise.
5351 (__arm_vstrbq_u16): Likewise.
5352 (__arm_vstrwq_scatter_base_s32): Likewise.
5353 (__arm_vstrwq_scatter_base_u32): Likewise.
5354 (vstrbq): Define polymorphic variant.
5355 (vstrbq_scatter_offset): Likewise.
5356 (vstrwq_scatter_base): Likewise.
5357 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
5359 (STRU_QUALIFIERS): Likewise.
5360 (STRSS_QUALIFIERS): Likewise.
5361 (STRSU_QUALIFIERS): Likewise.
5362 (STRSBS_QUALIFIERS): Likewise.
5363 (STRSBU_QUALIFIERS): Likewise.
5364 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
5365 (VSTRWSBQ): Define iterators.
5366 (VSTRBSOQ): Likewise.
5368 (mve_vstrbq_<supf><mode>): Define RTL pattern.
5369 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
5370 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
5372 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5373 Mihail Ionescu <mihail.ionescu@arm.com>
5374 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5376 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
5377 (vabdq_m_f16): Likewise.
5378 (vaddq_m_f32): Likewise.
5379 (vaddq_m_f16): Likewise.
5380 (vaddq_m_n_f32): Likewise.
5381 (vaddq_m_n_f16): Likewise.
5382 (vandq_m_f32): Likewise.
5383 (vandq_m_f16): Likewise.
5384 (vbicq_m_f32): Likewise.
5385 (vbicq_m_f16): Likewise.
5386 (vbrsrq_m_n_f32): Likewise.
5387 (vbrsrq_m_n_f16): Likewise.
5388 (vcaddq_rot270_m_f32): Likewise.
5389 (vcaddq_rot270_m_f16): Likewise.
5390 (vcaddq_rot90_m_f32): Likewise.
5391 (vcaddq_rot90_m_f16): Likewise.
5392 (vcmlaq_m_f32): Likewise.
5393 (vcmlaq_m_f16): Likewise.
5394 (vcmlaq_rot180_m_f32): Likewise.
5395 (vcmlaq_rot180_m_f16): Likewise.
5396 (vcmlaq_rot270_m_f32): Likewise.
5397 (vcmlaq_rot270_m_f16): Likewise.
5398 (vcmlaq_rot90_m_f32): Likewise.
5399 (vcmlaq_rot90_m_f16): Likewise.
5400 (vcmulq_m_f32): Likewise.
5401 (vcmulq_m_f16): Likewise.
5402 (vcmulq_rot180_m_f32): Likewise.
5403 (vcmulq_rot180_m_f16): Likewise.
5404 (vcmulq_rot270_m_f32): Likewise.
5405 (vcmulq_rot270_m_f16): Likewise.
5406 (vcmulq_rot90_m_f32): Likewise.
5407 (vcmulq_rot90_m_f16): Likewise.
5408 (vcvtq_m_n_s32_f32): Likewise.
5409 (vcvtq_m_n_s16_f16): Likewise.
5410 (vcvtq_m_n_u32_f32): Likewise.
5411 (vcvtq_m_n_u16_f16): Likewise.
5412 (veorq_m_f32): Likewise.
5413 (veorq_m_f16): Likewise.
5414 (vfmaq_m_f32): Likewise.
5415 (vfmaq_m_f16): Likewise.
5416 (vfmaq_m_n_f32): Likewise.
5417 (vfmaq_m_n_f16): Likewise.
5418 (vfmasq_m_n_f32): Likewise.
5419 (vfmasq_m_n_f16): Likewise.
5420 (vfmsq_m_f32): Likewise.
5421 (vfmsq_m_f16): Likewise.
5422 (vmaxnmq_m_f32): Likewise.
5423 (vmaxnmq_m_f16): Likewise.
5424 (vminnmq_m_f32): Likewise.
5425 (vminnmq_m_f16): Likewise.
5426 (vmulq_m_f32): Likewise.
5427 (vmulq_m_f16): Likewise.
5428 (vmulq_m_n_f32): Likewise.
5429 (vmulq_m_n_f16): Likewise.
5430 (vornq_m_f32): Likewise.
5431 (vornq_m_f16): Likewise.
5432 (vorrq_m_f32): Likewise.
5433 (vorrq_m_f16): Likewise.
5434 (vsubq_m_f32): Likewise.
5435 (vsubq_m_f16): Likewise.
5436 (vsubq_m_n_f32): Likewise.
5437 (vsubq_m_n_f16): Likewise.
5438 (__attribute__): Likewise.
5439 (__arm_vabdq_m_f32): Likewise.
5440 (__arm_vabdq_m_f16): Likewise.
5441 (__arm_vaddq_m_f32): Likewise.
5442 (__arm_vaddq_m_f16): Likewise.
5443 (__arm_vaddq_m_n_f32): Likewise.
5444 (__arm_vaddq_m_n_f16): Likewise.
5445 (__arm_vandq_m_f32): Likewise.
5446 (__arm_vandq_m_f16): Likewise.
5447 (__arm_vbicq_m_f32): Likewise.
5448 (__arm_vbicq_m_f16): Likewise.
5449 (__arm_vbrsrq_m_n_f32): Likewise.
5450 (__arm_vbrsrq_m_n_f16): Likewise.
5451 (__arm_vcaddq_rot270_m_f32): Likewise.
5452 (__arm_vcaddq_rot270_m_f16): Likewise.
5453 (__arm_vcaddq_rot90_m_f32): Likewise.
5454 (__arm_vcaddq_rot90_m_f16): Likewise.
5455 (__arm_vcmlaq_m_f32): Likewise.
5456 (__arm_vcmlaq_m_f16): Likewise.
5457 (__arm_vcmlaq_rot180_m_f32): Likewise.
5458 (__arm_vcmlaq_rot180_m_f16): Likewise.
5459 (__arm_vcmlaq_rot270_m_f32): Likewise.
5460 (__arm_vcmlaq_rot270_m_f16): Likewise.
5461 (__arm_vcmlaq_rot90_m_f32): Likewise.
5462 (__arm_vcmlaq_rot90_m_f16): Likewise.
5463 (__arm_vcmulq_m_f32): Likewise.
5464 (__arm_vcmulq_m_f16): Likewise.
5465 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
5466 (__arm_vcmulq_rot180_m_f16): Likewise.
5467 (__arm_vcmulq_rot270_m_f32): Likewise.
5468 (__arm_vcmulq_rot270_m_f16): Likewise.
5469 (__arm_vcmulq_rot90_m_f32): Likewise.
5470 (__arm_vcmulq_rot90_m_f16): Likewise.
5471 (__arm_vcvtq_m_n_s32_f32): Likewise.
5472 (__arm_vcvtq_m_n_s16_f16): Likewise.
5473 (__arm_vcvtq_m_n_u32_f32): Likewise.
5474 (__arm_vcvtq_m_n_u16_f16): Likewise.
5475 (__arm_veorq_m_f32): Likewise.
5476 (__arm_veorq_m_f16): Likewise.
5477 (__arm_vfmaq_m_f32): Likewise.
5478 (__arm_vfmaq_m_f16): Likewise.
5479 (__arm_vfmaq_m_n_f32): Likewise.
5480 (__arm_vfmaq_m_n_f16): Likewise.
5481 (__arm_vfmasq_m_n_f32): Likewise.
5482 (__arm_vfmasq_m_n_f16): Likewise.
5483 (__arm_vfmsq_m_f32): Likewise.
5484 (__arm_vfmsq_m_f16): Likewise.
5485 (__arm_vmaxnmq_m_f32): Likewise.
5486 (__arm_vmaxnmq_m_f16): Likewise.
5487 (__arm_vminnmq_m_f32): Likewise.
5488 (__arm_vminnmq_m_f16): Likewise.
5489 (__arm_vmulq_m_f32): Likewise.
5490 (__arm_vmulq_m_f16): Likewise.
5491 (__arm_vmulq_m_n_f32): Likewise.
5492 (__arm_vmulq_m_n_f16): Likewise.
5493 (__arm_vornq_m_f32): Likewise.
5494 (__arm_vornq_m_f16): Likewise.
5495 (__arm_vorrq_m_f32): Likewise.
5496 (__arm_vorrq_m_f16): Likewise.
5497 (__arm_vsubq_m_f32): Likewise.
5498 (__arm_vsubq_m_f16): Likewise.
5499 (__arm_vsubq_m_n_f32): Likewise.
5500 (__arm_vsubq_m_n_f16): Likewise.
5501 (vabdq_m): Define polymorphic variant.
5502 (vaddq_m): Likewise.
5503 (vaddq_m_n): Likewise.
5504 (vandq_m): Likewise.
5505 (vbicq_m): Likewise.
5506 (vbrsrq_m_n): Likewise.
5507 (vcaddq_rot270_m): Likewise.
5508 (vcaddq_rot90_m): Likewise.
5509 (vcmlaq_m): Likewise.
5510 (vcmlaq_rot180_m): Likewise.
5511 (vcmlaq_rot270_m): Likewise.
5512 (vcmlaq_rot90_m): Likewise.
5513 (vcmulq_m): Likewise.
5514 (vcmulq_rot180_m): Likewise.
5515 (vcmulq_rot270_m): Likewise.
5516 (vcmulq_rot90_m): Likewise.
5517 (veorq_m): Likewise.
5518 (vfmaq_m): Likewise.
5519 (vfmaq_m_n): Likewise.
5520 (vfmasq_m_n): Likewise.
5521 (vfmsq_m): Likewise.
5522 (vmaxnmq_m): Likewise.
5523 (vminnmq_m): Likewise.
5524 (vmulq_m): Likewise.
5525 (vmulq_m_n): Likewise.
5526 (vornq_m): Likewise.
5527 (vsubq_m): Likewise.
5528 (vsubq_m_n): Likewise.
5529 (vorrq_m): Likewise.
5530 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5532 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5533 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5534 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
5535 (mve_vaddq_m_f<mode>): Likewise.
5536 (mve_vaddq_m_n_f<mode>): Likewise.
5537 (mve_vandq_m_f<mode>): Likewise.
5538 (mve_vbicq_m_f<mode>): Likewise.
5539 (mve_vbrsrq_m_n_f<mode>): Likewise.
5540 (mve_vcaddq_rot270_m_f<mode>): Likewise.
5541 (mve_vcaddq_rot90_m_f<mode>): Likewise.
5542 (mve_vcmlaq_m_f<mode>): Likewise.
5543 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
5544 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
5545 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
5546 (mve_vcmulq_m_f<mode>): Likewise.
5547 (mve_vcmulq_rot180_m_f<mode>): Likewise.
5548 (mve_vcmulq_rot270_m_f<mode>): Likewise.
5549 (mve_vcmulq_rot90_m_f<mode>): Likewise.
5550 (mve_veorq_m_f<mode>): Likewise.
5551 (mve_vfmaq_m_f<mode>): Likewise.
5552 (mve_vfmaq_m_n_f<mode>): Likewise.
5553 (mve_vfmasq_m_n_f<mode>): Likewise.
5554 (mve_vfmsq_m_f<mode>): Likewise.
5555 (mve_vmaxnmq_m_f<mode>): Likewise.
5556 (mve_vminnmq_m_f<mode>): Likewise.
5557 (mve_vmulq_m_f<mode>): Likewise.
5558 (mve_vmulq_m_n_f<mode>): Likewise.
5559 (mve_vornq_m_f<mode>): Likewise.
5560 (mve_vorrq_m_f<mode>): Likewise.
5561 (mve_vsubq_m_f<mode>): Likewise.
5562 (mve_vsubq_m_n_f<mode>): Likewise.
5564 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5565 Mihail Ionescu <mihail.ionescu@arm.com>
5566 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5568 * config/arm/arm-protos.h (arm_mve_immediate_check):
5569 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
5570 mode and interger value.
5571 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
5572 (vmlaldavaq_p_s16): Likewise.
5573 (vmlaldavaq_p_u32): Likewise.
5574 (vmlaldavaq_p_u16): Likewise.
5575 (vmlaldavaxq_p_s32): Likewise.
5576 (vmlaldavaxq_p_s16): Likewise.
5577 (vmlaldavaxq_p_u32): Likewise.
5578 (vmlaldavaxq_p_u16): Likewise.
5579 (vmlsldavaq_p_s32): Likewise.
5580 (vmlsldavaq_p_s16): Likewise.
5581 (vmlsldavaxq_p_s32): Likewise.
5582 (vmlsldavaxq_p_s16): Likewise.
5583 (vmullbq_poly_m_p8): Likewise.
5584 (vmullbq_poly_m_p16): Likewise.
5585 (vmulltq_poly_m_p8): Likewise.
5586 (vmulltq_poly_m_p16): Likewise.
5587 (vqdmullbq_m_n_s32): Likewise.
5588 (vqdmullbq_m_n_s16): Likewise.
5589 (vqdmullbq_m_s32): Likewise.
5590 (vqdmullbq_m_s16): Likewise.
5591 (vqdmulltq_m_n_s32): Likewise.
5592 (vqdmulltq_m_n_s16): Likewise.
5593 (vqdmulltq_m_s32): Likewise.
5594 (vqdmulltq_m_s16): Likewise.
5595 (vqrshrnbq_m_n_s32): Likewise.
5596 (vqrshrnbq_m_n_s16): Likewise.
5597 (vqrshrnbq_m_n_u32): Likewise.
5598 (vqrshrnbq_m_n_u16): Likewise.
5599 (vqrshrntq_m_n_s32): Likewise.
5600 (vqrshrntq_m_n_s16): Likewise.
5601 (vqrshrntq_m_n_u32): Likewise.
5602 (vqrshrntq_m_n_u16): Likewise.
5603 (vqrshrunbq_m_n_s32): Likewise.
5604 (vqrshrunbq_m_n_s16): Likewise.
5605 (vqrshruntq_m_n_s32): Likewise.
5606 (vqrshruntq_m_n_s16): Likewise.
5607 (vqshrnbq_m_n_s32): Likewise.
5608 (vqshrnbq_m_n_s16): Likewise.
5609 (vqshrnbq_m_n_u32): Likewise.
5610 (vqshrnbq_m_n_u16): Likewise.
5611 (vqshrntq_m_n_s32): Likewise.
5612 (vqshrntq_m_n_s16): Likewise.
5613 (vqshrntq_m_n_u32): Likewise.
5614 (vqshrntq_m_n_u16): Likewise.
5615 (vqshrunbq_m_n_s32): Likewise.
5616 (vqshrunbq_m_n_s16): Likewise.
5617 (vqshruntq_m_n_s32): Likewise.
5618 (vqshruntq_m_n_s16): Likewise.
5619 (vrmlaldavhaq_p_s32): Likewise.
5620 (vrmlaldavhaq_p_u32): Likewise.
5621 (vrmlaldavhaxq_p_s32): Likewise.
5622 (vrmlsldavhaq_p_s32): Likewise.
5623 (vrmlsldavhaxq_p_s32): Likewise.
5624 (vrshrnbq_m_n_s32): Likewise.
5625 (vrshrnbq_m_n_s16): Likewise.
5626 (vrshrnbq_m_n_u32): Likewise.
5627 (vrshrnbq_m_n_u16): Likewise.
5628 (vrshrntq_m_n_s32): Likewise.
5629 (vrshrntq_m_n_s16): Likewise.
5630 (vrshrntq_m_n_u32): Likewise.
5631 (vrshrntq_m_n_u16): Likewise.
5632 (vshllbq_m_n_s8): Likewise.
5633 (vshllbq_m_n_s16): Likewise.
5634 (vshllbq_m_n_u8): Likewise.
5635 (vshllbq_m_n_u16): Likewise.
5636 (vshlltq_m_n_s8): Likewise.
5637 (vshlltq_m_n_s16): Likewise.
5638 (vshlltq_m_n_u8): Likewise.
5639 (vshlltq_m_n_u16): Likewise.
5640 (vshrnbq_m_n_s32): Likewise.
5641 (vshrnbq_m_n_s16): Likewise.
5642 (vshrnbq_m_n_u32): Likewise.
5643 (vshrnbq_m_n_u16): Likewise.
5644 (vshrntq_m_n_s32): Likewise.
5645 (vshrntq_m_n_s16): Likewise.
5646 (vshrntq_m_n_u32): Likewise.
5647 (vshrntq_m_n_u16): Likewise.
5648 (__arm_vmlaldavaq_p_s32): Define intrinsic.
5649 (__arm_vmlaldavaq_p_s16): Likewise.
5650 (__arm_vmlaldavaq_p_u32): Likewise.
5651 (__arm_vmlaldavaq_p_u16): Likewise.
5652 (__arm_vmlaldavaxq_p_s32): Likewise.
5653 (__arm_vmlaldavaxq_p_s16): Likewise.
5654 (__arm_vmlaldavaxq_p_u32): Likewise.
5655 (__arm_vmlaldavaxq_p_u16): Likewise.
5656 (__arm_vmlsldavaq_p_s32): Likewise.
5657 (__arm_vmlsldavaq_p_s16): Likewise.
5658 (__arm_vmlsldavaxq_p_s32): Likewise.
5659 (__arm_vmlsldavaxq_p_s16): Likewise.
5660 (__arm_vmullbq_poly_m_p8): Likewise.
5661 (__arm_vmullbq_poly_m_p16): Likewise.
5662 (__arm_vmulltq_poly_m_p8): Likewise.
5663 (__arm_vmulltq_poly_m_p16): Likewise.
5664 (__arm_vqdmullbq_m_n_s32): Likewise.
5665 (__arm_vqdmullbq_m_n_s16): Likewise.
5666 (__arm_vqdmullbq_m_s32): Likewise.
5667 (__arm_vqdmullbq_m_s16): Likewise.
5668 (__arm_vqdmulltq_m_n_s32): Likewise.
5669 (__arm_vqdmulltq_m_n_s16): Likewise.
5670 (__arm_vqdmulltq_m_s32): Likewise.
5671 (__arm_vqdmulltq_m_s16): Likewise.
5672 (__arm_vqrshrnbq_m_n_s32): Likewise.
5673 (__arm_vqrshrnbq_m_n_s16): Likewise.
5674 (__arm_vqrshrnbq_m_n_u32): Likewise.
5675 (__arm_vqrshrnbq_m_n_u16): Likewise.
5676 (__arm_vqrshrntq_m_n_s32): Likewise.
5677 (__arm_vqrshrntq_m_n_s16): Likewise.
5678 (__arm_vqrshrntq_m_n_u32): Likewise.
5679 (__arm_vqrshrntq_m_n_u16): Likewise.
5680 (__arm_vqrshrunbq_m_n_s32): Likewise.
5681 (__arm_vqrshrunbq_m_n_s16): Likewise.
5682 (__arm_vqrshruntq_m_n_s32): Likewise.
5683 (__arm_vqrshruntq_m_n_s16): Likewise.
5684 (__arm_vqshrnbq_m_n_s32): Likewise.
5685 (__arm_vqshrnbq_m_n_s16): Likewise.
5686 (__arm_vqshrnbq_m_n_u32): Likewise.
5687 (__arm_vqshrnbq_m_n_u16): Likewise.
5688 (__arm_vqshrntq_m_n_s32): Likewise.
5689 (__arm_vqshrntq_m_n_s16): Likewise.
5690 (__arm_vqshrntq_m_n_u32): Likewise.
5691 (__arm_vqshrntq_m_n_u16): Likewise.
5692 (__arm_vqshrunbq_m_n_s32): Likewise.
5693 (__arm_vqshrunbq_m_n_s16): Likewise.
5694 (__arm_vqshruntq_m_n_s32): Likewise.
5695 (__arm_vqshruntq_m_n_s16): Likewise.
5696 (__arm_vrmlaldavhaq_p_s32): Likewise.
5697 (__arm_vrmlaldavhaq_p_u32): Likewise.
5698 (__arm_vrmlaldavhaxq_p_s32): Likewise.
5699 (__arm_vrmlsldavhaq_p_s32): Likewise.
5700 (__arm_vrmlsldavhaxq_p_s32): Likewise.
5701 (__arm_vrshrnbq_m_n_s32): Likewise.
5702 (__arm_vrshrnbq_m_n_s16): Likewise.
5703 (__arm_vrshrnbq_m_n_u32): Likewise.
5704 (__arm_vrshrnbq_m_n_u16): Likewise.
5705 (__arm_vrshrntq_m_n_s32): Likewise.
5706 (__arm_vrshrntq_m_n_s16): Likewise.
5707 (__arm_vrshrntq_m_n_u32): Likewise.
5708 (__arm_vrshrntq_m_n_u16): Likewise.
5709 (__arm_vshllbq_m_n_s8): Likewise.
5710 (__arm_vshllbq_m_n_s16): Likewise.
5711 (__arm_vshllbq_m_n_u8): Likewise.
5712 (__arm_vshllbq_m_n_u16): Likewise.
5713 (__arm_vshlltq_m_n_s8): Likewise.
5714 (__arm_vshlltq_m_n_s16): Likewise.
5715 (__arm_vshlltq_m_n_u8): Likewise.
5716 (__arm_vshlltq_m_n_u16): Likewise.
5717 (__arm_vshrnbq_m_n_s32): Likewise.
5718 (__arm_vshrnbq_m_n_s16): Likewise.
5719 (__arm_vshrnbq_m_n_u32): Likewise.
5720 (__arm_vshrnbq_m_n_u16): Likewise.
5721 (__arm_vshrntq_m_n_s32): Likewise.
5722 (__arm_vshrntq_m_n_s16): Likewise.
5723 (__arm_vshrntq_m_n_u32): Likewise.
5724 (__arm_vshrntq_m_n_u16): Likewise.
5725 (vmullbq_poly_m): Define polymorphic variant.
5726 (vmulltq_poly_m): Likewise.
5727 (vshllbq_m): Likewise.
5728 (vshrntq_m_n): Likewise.
5729 (vshrnbq_m_n): Likewise.
5730 (vshlltq_m_n): Likewise.
5731 (vshllbq_m_n): Likewise.
5732 (vrshrntq_m_n): Likewise.
5733 (vrshrnbq_m_n): Likewise.
5734 (vqshruntq_m_n): Likewise.
5735 (vqshrunbq_m_n): Likewise.
5736 (vqdmullbq_m_n): Likewise.
5737 (vqdmullbq_m): Likewise.
5738 (vqdmulltq_m_n): Likewise.
5739 (vqdmulltq_m): Likewise.
5740 (vqrshrnbq_m_n): Likewise.
5741 (vqrshrntq_m_n): Likewise.
5742 (vqrshrunbq_m_n): Likewise.
5743 (vqrshruntq_m_n): Likewise.
5744 (vqshrnbq_m_n): Likewise.
5745 (vqshrntq_m_n): Likewise.
5746 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
5748 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5749 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
5750 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
5751 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5752 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
5753 (VMLALDAVAXQ_P): Likewise.
5754 (VQRSHRNBQ_M_N): Likewise.
5755 (VQRSHRNTQ_M_N): Likewise.
5756 (VQSHRNBQ_M_N): Likewise.
5757 (VQSHRNTQ_M_N): Likewise.
5758 (VRSHRNBQ_M_N): Likewise.
5759 (VRSHRNTQ_M_N): Likewise.
5760 (VSHLLBQ_M_N): Likewise.
5761 (VSHLLTQ_M_N): Likewise.
5762 (VSHRNBQ_M_N): Likewise.
5763 (VSHRNTQ_M_N): Likewise.
5764 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
5765 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
5766 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
5767 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
5768 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
5769 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
5770 (mve_vrmlaldavhaq_p_sv4si): Likewise.
5771 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
5772 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
5773 (mve_vshllbq_m_n_<supf><mode>): Likewise.
5774 (mve_vshlltq_m_n_<supf><mode>): Likewise.
5775 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
5776 (mve_vshrntq_m_n_<supf><mode>): Likewise.
5777 (mve_vmlsldavaq_p_s<mode>): Likewise.
5778 (mve_vmlsldavaxq_p_s<mode>): Likewise.
5779 (mve_vmullbq_poly_m_p<mode>): Likewise.
5780 (mve_vmulltq_poly_m_p<mode>): Likewise.
5781 (mve_vqdmullbq_m_n_s<mode>): Likewise.
5782 (mve_vqdmullbq_m_s<mode>): Likewise.
5783 (mve_vqdmulltq_m_n_s<mode>): Likewise.
5784 (mve_vqdmulltq_m_s<mode>): Likewise.
5785 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
5786 (mve_vqrshruntq_m_n_s<mode>): Likewise.
5787 (mve_vqshrunbq_m_n_s<mode>): Likewise.
5788 (mve_vqshruntq_m_n_s<mode>): Likewise.
5789 (mve_vrmlaldavhaq_p_uv4si): Likewise.
5790 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
5791 (mve_vrmlsldavhaq_p_sv4si): Likewise.
5792 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
5794 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
5795 Mihail Ionescu <mihail.ionescu@arm.com>
5796 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5798 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
5799 (vabdq_m_s32): Likewise.
5800 (vabdq_m_s16): Likewise.
5801 (vabdq_m_u8): Likewise.
5802 (vabdq_m_u32): Likewise.
5803 (vabdq_m_u16): Likewise.
5804 (vaddq_m_n_s8): Likewise.
5805 (vaddq_m_n_s32): Likewise.
5806 (vaddq_m_n_s16): Likewise.
5807 (vaddq_m_n_u8): Likewise.
5808 (vaddq_m_n_u32): Likewise.
5809 (vaddq_m_n_u16): Likewise.
5810 (vaddq_m_s8): Likewise.
5811 (vaddq_m_s32): Likewise.
5812 (vaddq_m_s16): Likewise.
5813 (vaddq_m_u8): Likewise.
5814 (vaddq_m_u32): Likewise.
5815 (vaddq_m_u16): Likewise.
5816 (vandq_m_s8): Likewise.
5817 (vandq_m_s32): Likewise.
5818 (vandq_m_s16): Likewise.
5819 (vandq_m_u8): Likewise.
5820 (vandq_m_u32): Likewise.
5821 (vandq_m_u16): Likewise.
5822 (vbicq_m_s8): Likewise.
5823 (vbicq_m_s32): Likewise.
5824 (vbicq_m_s16): Likewise.
5825 (vbicq_m_u8): Likewise.
5826 (vbicq_m_u32): Likewise.
5827 (vbicq_m_u16): Likewise.
5828 (vbrsrq_m_n_s8): Likewise.
5829 (vbrsrq_m_n_s32): Likewise.
5830 (vbrsrq_m_n_s16): Likewise.
5831 (vbrsrq_m_n_u8): Likewise.
5832 (vbrsrq_m_n_u32): Likewise.
5833 (vbrsrq_m_n_u16): Likewise.
5834 (vcaddq_rot270_m_s8): Likewise.
5835 (vcaddq_rot270_m_s32): Likewise.
5836 (vcaddq_rot270_m_s16): Likewise.
5837 (vcaddq_rot270_m_u8): Likewise.
5838 (vcaddq_rot270_m_u32): Likewise.
5839 (vcaddq_rot270_m_u16): Likewise.
5840 (vcaddq_rot90_m_s8): Likewise.
5841 (vcaddq_rot90_m_s32): Likewise.
5842 (vcaddq_rot90_m_s16): Likewise.
5843 (vcaddq_rot90_m_u8): Likewise.
5844 (vcaddq_rot90_m_u32): Likewise.
5845 (vcaddq_rot90_m_u16): Likewise.
5846 (veorq_m_s8): Likewise.
5847 (veorq_m_s32): Likewise.
5848 (veorq_m_s16): Likewise.
5849 (veorq_m_u8): Likewise.
5850 (veorq_m_u32): Likewise.
5851 (veorq_m_u16): Likewise.
5852 (vhaddq_m_n_s8): Likewise.
5853 (vhaddq_m_n_s32): Likewise.
5854 (vhaddq_m_n_s16): Likewise.
5855 (vhaddq_m_n_u8): Likewise.
5856 (vhaddq_m_n_u32): Likewise.
5857 (vhaddq_m_n_u16): Likewise.
5858 (vhaddq_m_s8): Likewise.
5859 (vhaddq_m_s32): Likewise.
5860 (vhaddq_m_s16): Likewise.
5861 (vhaddq_m_u8): Likewise.
5862 (vhaddq_m_u32): Likewise.
5863 (vhaddq_m_u16): Likewise.
5864 (vhcaddq_rot270_m_s8): Likewise.
5865 (vhcaddq_rot270_m_s32): Likewise.
5866 (vhcaddq_rot270_m_s16): Likewise.
5867 (vhcaddq_rot90_m_s8): Likewise.
5868 (vhcaddq_rot90_m_s32): Likewise.
5869 (vhcaddq_rot90_m_s16): Likewise.
5870 (vhsubq_m_n_s8): Likewise.
5871 (vhsubq_m_n_s32): Likewise.
5872 (vhsubq_m_n_s16): Likewise.
5873 (vhsubq_m_n_u8): Likewise.
5874 (vhsubq_m_n_u32): Likewise.
5875 (vhsubq_m_n_u16): Likewise.
5876 (vhsubq_m_s8): Likewise.
5877 (vhsubq_m_s32): Likewise.
5878 (vhsubq_m_s16): Likewise.
5879 (vhsubq_m_u8): Likewise.
5880 (vhsubq_m_u32): Likewise.
5881 (vhsubq_m_u16): Likewise.
5882 (vmaxq_m_s8): Likewise.
5883 (vmaxq_m_s32): Likewise.
5884 (vmaxq_m_s16): Likewise.
5885 (vmaxq_m_u8): Likewise.
5886 (vmaxq_m_u32): Likewise.
5887 (vmaxq_m_u16): Likewise.
5888 (vminq_m_s8): Likewise.
5889 (vminq_m_s32): Likewise.
5890 (vminq_m_s16): Likewise.
5891 (vminq_m_u8): Likewise.
5892 (vminq_m_u32): Likewise.
5893 (vminq_m_u16): Likewise.
5894 (vmladavaq_p_s8): Likewise.
5895 (vmladavaq_p_s32): Likewise.
5896 (vmladavaq_p_s16): Likewise.
5897 (vmladavaq_p_u8): Likewise.
5898 (vmladavaq_p_u32): Likewise.
5899 (vmladavaq_p_u16): Likewise.
5900 (vmladavaxq_p_s8): Likewise.
5901 (vmladavaxq_p_s32): Likewise.
5902 (vmladavaxq_p_s16): Likewise.
5903 (vmlaq_m_n_s8): Likewise.
5904 (vmlaq_m_n_s32): Likewise.
5905 (vmlaq_m_n_s16): Likewise.
5906 (vmlaq_m_n_u8): Likewise.
5907 (vmlaq_m_n_u32): Likewise.
5908 (vmlaq_m_n_u16): Likewise.
5909 (vmlasq_m_n_s8): Likewise.
5910 (vmlasq_m_n_s32): Likewise.
5911 (vmlasq_m_n_s16): Likewise.
5912 (vmlasq_m_n_u8): Likewise.
5913 (vmlasq_m_n_u32): Likewise.
5914 (vmlasq_m_n_u16): Likewise.
5915 (vmlsdavaq_p_s8): Likewise.
5916 (vmlsdavaq_p_s32): Likewise.
5917 (vmlsdavaq_p_s16): Likewise.
5918 (vmlsdavaxq_p_s8): Likewise.
5919 (vmlsdavaxq_p_s32): Likewise.
5920 (vmlsdavaxq_p_s16): Likewise.
5921 (vmulhq_m_s8): Likewise.
5922 (vmulhq_m_s32): Likewise.
5923 (vmulhq_m_s16): Likewise.
5924 (vmulhq_m_u8): Likewise.
5925 (vmulhq_m_u32): Likewise.
5926 (vmulhq_m_u16): Likewise.
5927 (vmullbq_int_m_s8): Likewise.
5928 (vmullbq_int_m_s32): Likewise.
5929 (vmullbq_int_m_s16): Likewise.
5930 (vmullbq_int_m_u8): Likewise.
5931 (vmullbq_int_m_u32): Likewise.
5932 (vmullbq_int_m_u16): Likewise.
5933 (vmulltq_int_m_s8): Likewise.
5934 (vmulltq_int_m_s32): Likewise.
5935 (vmulltq_int_m_s16): Likewise.
5936 (vmulltq_int_m_u8): Likewise.
5937 (vmulltq_int_m_u32): Likewise.
5938 (vmulltq_int_m_u16): Likewise.
5939 (vmulq_m_n_s8): Likewise.
5940 (vmulq_m_n_s32): Likewise.
5941 (vmulq_m_n_s16): Likewise.
5942 (vmulq_m_n_u8): Likewise.
5943 (vmulq_m_n_u32): Likewise.
5944 (vmulq_m_n_u16): Likewise.
5945 (vmulq_m_s8): Likewise.
5946 (vmulq_m_s32): Likewise.
5947 (vmulq_m_s16): Likewise.
5948 (vmulq_m_u8): Likewise.
5949 (vmulq_m_u32): Likewise.
5950 (vmulq_m_u16): Likewise.
5951 (vornq_m_s8): Likewise.
5952 (vornq_m_s32): Likewise.
5953 (vornq_m_s16): Likewise.
5954 (vornq_m_u8): Likewise.
5955 (vornq_m_u32): Likewise.
5956 (vornq_m_u16): Likewise.
5957 (vorrq_m_s8): Likewise.
5958 (vorrq_m_s32): Likewise.
5959 (vorrq_m_s16): Likewise.
5960 (vorrq_m_u8): Likewise.
5961 (vorrq_m_u32): Likewise.
5962 (vorrq_m_u16): Likewise.
5963 (vqaddq_m_n_s8): Likewise.
5964 (vqaddq_m_n_s32): Likewise.
5965 (vqaddq_m_n_s16): Likewise.
5966 (vqaddq_m_n_u8): Likewise.
5967 (vqaddq_m_n_u32): Likewise.
5968 (vqaddq_m_n_u16): Likewise.
5969 (vqaddq_m_s8): Likewise.
5970 (vqaddq_m_s32): Likewise.
5971 (vqaddq_m_s16): Likewise.
5972 (vqaddq_m_u8): Likewise.
5973 (vqaddq_m_u32): Likewise.
5974 (vqaddq_m_u16): Likewise.
5975 (vqdmladhq_m_s8): Likewise.
5976 (vqdmladhq_m_s32): Likewise.
5977 (vqdmladhq_m_s16): Likewise.
5978 (vqdmladhxq_m_s8): Likewise.
5979 (vqdmladhxq_m_s32): Likewise.
5980 (vqdmladhxq_m_s16): Likewise.
5981 (vqdmlahq_m_n_s8): Likewise.
5982 (vqdmlahq_m_n_s32): Likewise.
5983 (vqdmlahq_m_n_s16): Likewise.
5984 (vqdmlahq_m_n_u8): Likewise.
5985 (vqdmlahq_m_n_u32): Likewise.
5986 (vqdmlahq_m_n_u16): Likewise.
5987 (vqdmlsdhq_m_s8): Likewise.
5988 (vqdmlsdhq_m_s32): Likewise.
5989 (vqdmlsdhq_m_s16): Likewise.
5990 (vqdmlsdhxq_m_s8): Likewise.
5991 (vqdmlsdhxq_m_s32): Likewise.
5992 (vqdmlsdhxq_m_s16): Likewise.
5993 (vqdmulhq_m_n_s8): Likewise.
5994 (vqdmulhq_m_n_s32): Likewise.
5995 (vqdmulhq_m_n_s16): Likewise.
5996 (vqdmulhq_m_s8): Likewise.
5997 (vqdmulhq_m_s32): Likewise.
5998 (vqdmulhq_m_s16): Likewise.
5999 (vqrdmladhq_m_s8): Likewise.
6000 (vqrdmladhq_m_s32): Likewise.
6001 (vqrdmladhq_m_s16): Likewise.
6002 (vqrdmladhxq_m_s8): Likewise.
6003 (vqrdmladhxq_m_s32): Likewise.
6004 (vqrdmladhxq_m_s16): Likewise.
6005 (vqrdmlahq_m_n_s8): Likewise.
6006 (vqrdmlahq_m_n_s32): Likewise.
6007 (vqrdmlahq_m_n_s16): Likewise.
6008 (vqrdmlahq_m_n_u8): Likewise.
6009 (vqrdmlahq_m_n_u32): Likewise.
6010 (vqrdmlahq_m_n_u16): Likewise.
6011 (vqrdmlashq_m_n_s8): Likewise.
6012 (vqrdmlashq_m_n_s32): Likewise.
6013 (vqrdmlashq_m_n_s16): Likewise.
6014 (vqrdmlashq_m_n_u8): Likewise.
6015 (vqrdmlashq_m_n_u32): Likewise.
6016 (vqrdmlashq_m_n_u16): Likewise.
6017 (vqrdmlsdhq_m_s8): Likewise.
6018 (vqrdmlsdhq_m_s32): Likewise.
6019 (vqrdmlsdhq_m_s16): Likewise.
6020 (vqrdmlsdhxq_m_s8): Likewise.
6021 (vqrdmlsdhxq_m_s32): Likewise.
6022 (vqrdmlsdhxq_m_s16): Likewise.
6023 (vqrdmulhq_m_n_s8): Likewise.
6024 (vqrdmulhq_m_n_s32): Likewise.
6025 (vqrdmulhq_m_n_s16): Likewise.
6026 (vqrdmulhq_m_s8): Likewise.
6027 (vqrdmulhq_m_s32): Likewise.
6028 (vqrdmulhq_m_s16): Likewise.
6029 (vqrshlq_m_s8): Likewise.
6030 (vqrshlq_m_s32): Likewise.
6031 (vqrshlq_m_s16): Likewise.
6032 (vqrshlq_m_u8): Likewise.
6033 (vqrshlq_m_u32): Likewise.
6034 (vqrshlq_m_u16): Likewise.
6035 (vqshlq_m_n_s8): Likewise.
6036 (vqshlq_m_n_s32): Likewise.
6037 (vqshlq_m_n_s16): Likewise.
6038 (vqshlq_m_n_u8): Likewise.
6039 (vqshlq_m_n_u32): Likewise.
6040 (vqshlq_m_n_u16): Likewise.
6041 (vqshlq_m_s8): Likewise.
6042 (vqshlq_m_s32): Likewise.
6043 (vqshlq_m_s16): Likewise.
6044 (vqshlq_m_u8): Likewise.
6045 (vqshlq_m_u32): Likewise.
6046 (vqshlq_m_u16): Likewise.
6047 (vqsubq_m_n_s8): Likewise.
6048 (vqsubq_m_n_s32): Likewise.
6049 (vqsubq_m_n_s16): Likewise.
6050 (vqsubq_m_n_u8): Likewise.
6051 (vqsubq_m_n_u32): Likewise.
6052 (vqsubq_m_n_u16): Likewise.
6053 (vqsubq_m_s8): Likewise.
6054 (vqsubq_m_s32): Likewise.
6055 (vqsubq_m_s16): Likewise.
6056 (vqsubq_m_u8): Likewise.
6057 (vqsubq_m_u32): Likewise.
6058 (vqsubq_m_u16): Likewise.
6059 (vrhaddq_m_s8): Likewise.
6060 (vrhaddq_m_s32): Likewise.
6061 (vrhaddq_m_s16): Likewise.
6062 (vrhaddq_m_u8): Likewise.
6063 (vrhaddq_m_u32): Likewise.
6064 (vrhaddq_m_u16): Likewise.
6065 (vrmulhq_m_s8): Likewise.
6066 (vrmulhq_m_s32): Likewise.
6067 (vrmulhq_m_s16): Likewise.
6068 (vrmulhq_m_u8): Likewise.
6069 (vrmulhq_m_u32): Likewise.
6070 (vrmulhq_m_u16): Likewise.
6071 (vrshlq_m_s8): Likewise.
6072 (vrshlq_m_s32): Likewise.
6073 (vrshlq_m_s16): Likewise.
6074 (vrshlq_m_u8): Likewise.
6075 (vrshlq_m_u32): Likewise.
6076 (vrshlq_m_u16): Likewise.
6077 (vrshrq_m_n_s8): Likewise.
6078 (vrshrq_m_n_s32): Likewise.
6079 (vrshrq_m_n_s16): Likewise.
6080 (vrshrq_m_n_u8): Likewise.
6081 (vrshrq_m_n_u32): Likewise.
6082 (vrshrq_m_n_u16): Likewise.
6083 (vshlq_m_n_s8): Likewise.
6084 (vshlq_m_n_s32): Likewise.
6085 (vshlq_m_n_s16): Likewise.
6086 (vshlq_m_n_u8): Likewise.
6087 (vshlq_m_n_u32): Likewise.
6088 (vshlq_m_n_u16): Likewise.
6089 (vshrq_m_n_s8): Likewise.
6090 (vshrq_m_n_s32): Likewise.
6091 (vshrq_m_n_s16): Likewise.
6092 (vshrq_m_n_u8): Likewise.
6093 (vshrq_m_n_u32): Likewise.
6094 (vshrq_m_n_u16): Likewise.
6095 (vsliq_m_n_s8): Likewise.
6096 (vsliq_m_n_s32): Likewise.
6097 (vsliq_m_n_s16): Likewise.
6098 (vsliq_m_n_u8): Likewise.
6099 (vsliq_m_n_u32): Likewise.
6100 (vsliq_m_n_u16): Likewise.
6101 (vsubq_m_n_s8): Likewise.
6102 (vsubq_m_n_s32): Likewise.
6103 (vsubq_m_n_s16): Likewise.
6104 (vsubq_m_n_u8): Likewise.
6105 (vsubq_m_n_u32): Likewise.
6106 (vsubq_m_n_u16): Likewise.
6107 (__arm_vabdq_m_s8): Define intrinsic.
6108 (__arm_vabdq_m_s32): Likewise.
6109 (__arm_vabdq_m_s16): Likewise.
6110 (__arm_vabdq_m_u8): Likewise.
6111 (__arm_vabdq_m_u32): Likewise.
6112 (__arm_vabdq_m_u16): Likewise.
6113 (__arm_vaddq_m_n_s8): Likewise.
6114 (__arm_vaddq_m_n_s32): Likewise.
6115 (__arm_vaddq_m_n_s16): Likewise.
6116 (__arm_vaddq_m_n_u8): Likewise.
6117 (__arm_vaddq_m_n_u32): Likewise.
6118 (__arm_vaddq_m_n_u16): Likewise.
6119 (__arm_vaddq_m_s8): Likewise.
6120 (__arm_vaddq_m_s32): Likewise.
6121 (__arm_vaddq_m_s16): Likewise.
6122 (__arm_vaddq_m_u8): Likewise.
6123 (__arm_vaddq_m_u32): Likewise.
6124 (__arm_vaddq_m_u16): Likewise.
6125 (__arm_vandq_m_s8): Likewise.
6126 (__arm_vandq_m_s32): Likewise.
6127 (__arm_vandq_m_s16): Likewise.
6128 (__arm_vandq_m_u8): Likewise.
6129 (__arm_vandq_m_u32): Likewise.
6130 (__arm_vandq_m_u16): Likewise.
6131 (__arm_vbicq_m_s8): Likewise.
6132 (__arm_vbicq_m_s32): Likewise.
6133 (__arm_vbicq_m_s16): Likewise.
6134 (__arm_vbicq_m_u8): Likewise.
6135 (__arm_vbicq_m_u32): Likewise.
6136 (__arm_vbicq_m_u16): Likewise.
6137 (__arm_vbrsrq_m_n_s8): Likewise.
6138 (__arm_vbrsrq_m_n_s32): Likewise.
6139 (__arm_vbrsrq_m_n_s16): Likewise.
6140 (__arm_vbrsrq_m_n_u8): Likewise.
6141 (__arm_vbrsrq_m_n_u32): Likewise.
6142 (__arm_vbrsrq_m_n_u16): Likewise.
6143 (__arm_vcaddq_rot270_m_s8): Likewise.
6144 (__arm_vcaddq_rot270_m_s32): Likewise.
6145 (__arm_vcaddq_rot270_m_s16): Likewise.
6146 (__arm_vcaddq_rot270_m_u8): Likewise.
6147 (__arm_vcaddq_rot270_m_u32): Likewise.
6148 (__arm_vcaddq_rot270_m_u16): Likewise.
6149 (__arm_vcaddq_rot90_m_s8): Likewise.
6150 (__arm_vcaddq_rot90_m_s32): Likewise.
6151 (__arm_vcaddq_rot90_m_s16): Likewise.
6152 (__arm_vcaddq_rot90_m_u8): Likewise.
6153 (__arm_vcaddq_rot90_m_u32): Likewise.
6154 (__arm_vcaddq_rot90_m_u16): Likewise.
6155 (__arm_veorq_m_s8): Likewise.
6156 (__arm_veorq_m_s32): Likewise.
6157 (__arm_veorq_m_s16): Likewise.
6158 (__arm_veorq_m_u8): Likewise.
6159 (__arm_veorq_m_u32): Likewise.
6160 (__arm_veorq_m_u16): Likewise.
6161 (__arm_vhaddq_m_n_s8): Likewise.
6162 (__arm_vhaddq_m_n_s32): Likewise.
6163 (__arm_vhaddq_m_n_s16): Likewise.
6164 (__arm_vhaddq_m_n_u8): Likewise.
6165 (__arm_vhaddq_m_n_u32): Likewise.
6166 (__arm_vhaddq_m_n_u16): Likewise.
6167 (__arm_vhaddq_m_s8): Likewise.
6168 (__arm_vhaddq_m_s32): Likewise.
6169 (__arm_vhaddq_m_s16): Likewise.
6170 (__arm_vhaddq_m_u8): Likewise.
6171 (__arm_vhaddq_m_u32): Likewise.
6172 (__arm_vhaddq_m_u16): Likewise.
6173 (__arm_vhcaddq_rot270_m_s8): Likewise.
6174 (__arm_vhcaddq_rot270_m_s32): Likewise.
6175 (__arm_vhcaddq_rot270_m_s16): Likewise.
6176 (__arm_vhcaddq_rot90_m_s8): Likewise.
6177 (__arm_vhcaddq_rot90_m_s32): Likewise.
6178 (__arm_vhcaddq_rot90_m_s16): Likewise.
6179 (__arm_vhsubq_m_n_s8): Likewise.
6180 (__arm_vhsubq_m_n_s32): Likewise.
6181 (__arm_vhsubq_m_n_s16): Likewise.
6182 (__arm_vhsubq_m_n_u8): Likewise.
6183 (__arm_vhsubq_m_n_u32): Likewise.
6184 (__arm_vhsubq_m_n_u16): Likewise.
6185 (__arm_vhsubq_m_s8): Likewise.
6186 (__arm_vhsubq_m_s32): Likewise.
6187 (__arm_vhsubq_m_s16): Likewise.
6188 (__arm_vhsubq_m_u8): Likewise.
6189 (__arm_vhsubq_m_u32): Likewise.
6190 (__arm_vhsubq_m_u16): Likewise.
6191 (__arm_vmaxq_m_s8): Likewise.
6192 (__arm_vmaxq_m_s32): Likewise.
6193 (__arm_vmaxq_m_s16): Likewise.
6194 (__arm_vmaxq_m_u8): Likewise.
6195 (__arm_vmaxq_m_u32): Likewise.
6196 (__arm_vmaxq_m_u16): Likewise.
6197 (__arm_vminq_m_s8): Likewise.
6198 (__arm_vminq_m_s32): Likewise.
6199 (__arm_vminq_m_s16): Likewise.
6200 (__arm_vminq_m_u8): Likewise.
6201 (__arm_vminq_m_u32): Likewise.
6202 (__arm_vminq_m_u16): Likewise.
6203 (__arm_vmladavaq_p_s8): Likewise.
6204 (__arm_vmladavaq_p_s32): Likewise.
6205 (__arm_vmladavaq_p_s16): Likewise.
6206 (__arm_vmladavaq_p_u8): Likewise.
6207 (__arm_vmladavaq_p_u32): Likewise.
6208 (__arm_vmladavaq_p_u16): Likewise.
6209 (__arm_vmladavaxq_p_s8): Likewise.
6210 (__arm_vmladavaxq_p_s32): Likewise.
6211 (__arm_vmladavaxq_p_s16): Likewise.
6212 (__arm_vmlaq_m_n_s8): Likewise.
6213 (__arm_vmlaq_m_n_s32): Likewise.
6214 (__arm_vmlaq_m_n_s16): Likewise.
6215 (__arm_vmlaq_m_n_u8): Likewise.
6216 (__arm_vmlaq_m_n_u32): Likewise.
6217 (__arm_vmlaq_m_n_u16): Likewise.
6218 (__arm_vmlasq_m_n_s8): Likewise.
6219 (__arm_vmlasq_m_n_s32): Likewise.
6220 (__arm_vmlasq_m_n_s16): Likewise.
6221 (__arm_vmlasq_m_n_u8): Likewise.
6222 (__arm_vmlasq_m_n_u32): Likewise.
6223 (__arm_vmlasq_m_n_u16): Likewise.
6224 (__arm_vmlsdavaq_p_s8): Likewise.
6225 (__arm_vmlsdavaq_p_s32): Likewise.
6226 (__arm_vmlsdavaq_p_s16): Likewise.
6227 (__arm_vmlsdavaxq_p_s8): Likewise.
6228 (__arm_vmlsdavaxq_p_s32): Likewise.
6229 (__arm_vmlsdavaxq_p_s16): Likewise.
6230 (__arm_vmulhq_m_s8): Likewise.
6231 (__arm_vmulhq_m_s32): Likewise.
6232 (__arm_vmulhq_m_s16): Likewise.
6233 (__arm_vmulhq_m_u8): Likewise.
6234 (__arm_vmulhq_m_u32): Likewise.
6235 (__arm_vmulhq_m_u16): Likewise.
6236 (__arm_vmullbq_int_m_s8): Likewise.
6237 (__arm_vmullbq_int_m_s32): Likewise.
6238 (__arm_vmullbq_int_m_s16): Likewise.
6239 (__arm_vmullbq_int_m_u8): Likewise.
6240 (__arm_vmullbq_int_m_u32): Likewise.
6241 (__arm_vmullbq_int_m_u16): Likewise.
6242 (__arm_vmulltq_int_m_s8): Likewise.
6243 (__arm_vmulltq_int_m_s32): Likewise.
6244 (__arm_vmulltq_int_m_s16): Likewise.
6245 (__arm_vmulltq_int_m_u8): Likewise.
6246 (__arm_vmulltq_int_m_u32): Likewise.
6247 (__arm_vmulltq_int_m_u16): Likewise.
6248 (__arm_vmulq_m_n_s8): Likewise.
6249 (__arm_vmulq_m_n_s32): Likewise.
6250 (__arm_vmulq_m_n_s16): Likewise.
6251 (__arm_vmulq_m_n_u8): Likewise.
6252 (__arm_vmulq_m_n_u32): Likewise.
6253 (__arm_vmulq_m_n_u16): Likewise.
6254 (__arm_vmulq_m_s8): Likewise.
6255 (__arm_vmulq_m_s32): Likewise.
6256 (__arm_vmulq_m_s16): Likewise.
6257 (__arm_vmulq_m_u8): Likewise.
6258 (__arm_vmulq_m_u32): Likewise.
6259 (__arm_vmulq_m_u16): Likewise.
6260 (__arm_vornq_m_s8): Likewise.
6261 (__arm_vornq_m_s32): Likewise.
6262 (__arm_vornq_m_s16): Likewise.
6263 (__arm_vornq_m_u8): Likewise.
6264 (__arm_vornq_m_u32): Likewise.
6265 (__arm_vornq_m_u16): Likewise.
6266 (__arm_vorrq_m_s8): Likewise.
6267 (__arm_vorrq_m_s32): Likewise.
6268 (__arm_vorrq_m_s16): Likewise.
6269 (__arm_vorrq_m_u8): Likewise.
6270 (__arm_vorrq_m_u32): Likewise.
6271 (__arm_vorrq_m_u16): Likewise.
6272 (__arm_vqaddq_m_n_s8): Likewise.
6273 (__arm_vqaddq_m_n_s32): Likewise.
6274 (__arm_vqaddq_m_n_s16): Likewise.
6275 (__arm_vqaddq_m_n_u8): Likewise.
6276 (__arm_vqaddq_m_n_u32): Likewise.
6277 (__arm_vqaddq_m_n_u16): Likewise.
6278 (__arm_vqaddq_m_s8): Likewise.
6279 (__arm_vqaddq_m_s32): Likewise.
6280 (__arm_vqaddq_m_s16): Likewise.
6281 (__arm_vqaddq_m_u8): Likewise.
6282 (__arm_vqaddq_m_u32): Likewise.
6283 (__arm_vqaddq_m_u16): Likewise.
6284 (__arm_vqdmladhq_m_s8): Likewise.
6285 (__arm_vqdmladhq_m_s32): Likewise.
6286 (__arm_vqdmladhq_m_s16): Likewise.
6287 (__arm_vqdmladhxq_m_s8): Likewise.
6288 (__arm_vqdmladhxq_m_s32): Likewise.
6289 (__arm_vqdmladhxq_m_s16): Likewise.
6290 (__arm_vqdmlahq_m_n_s8): Likewise.
6291 (__arm_vqdmlahq_m_n_s32): Likewise.
6292 (__arm_vqdmlahq_m_n_s16): Likewise.
6293 (__arm_vqdmlahq_m_n_u8): Likewise.
6294 (__arm_vqdmlahq_m_n_u32): Likewise.
6295 (__arm_vqdmlahq_m_n_u16): Likewise.
6296 (__arm_vqdmlsdhq_m_s8): Likewise.
6297 (__arm_vqdmlsdhq_m_s32): Likewise.
6298 (__arm_vqdmlsdhq_m_s16): Likewise.
6299 (__arm_vqdmlsdhxq_m_s8): Likewise.
6300 (__arm_vqdmlsdhxq_m_s32): Likewise.
6301 (__arm_vqdmlsdhxq_m_s16): Likewise.
6302 (__arm_vqdmulhq_m_n_s8): Likewise.
6303 (__arm_vqdmulhq_m_n_s32): Likewise.
6304 (__arm_vqdmulhq_m_n_s16): Likewise.
6305 (__arm_vqdmulhq_m_s8): Likewise.
6306 (__arm_vqdmulhq_m_s32): Likewise.
6307 (__arm_vqdmulhq_m_s16): Likewise.
6308 (__arm_vqrdmladhq_m_s8): Likewise.
6309 (__arm_vqrdmladhq_m_s32): Likewise.
6310 (__arm_vqrdmladhq_m_s16): Likewise.
6311 (__arm_vqrdmladhxq_m_s8): Likewise.
6312 (__arm_vqrdmladhxq_m_s32): Likewise.
6313 (__arm_vqrdmladhxq_m_s16): Likewise.
6314 (__arm_vqrdmlahq_m_n_s8): Likewise.
6315 (__arm_vqrdmlahq_m_n_s32): Likewise.
6316 (__arm_vqrdmlahq_m_n_s16): Likewise.
6317 (__arm_vqrdmlahq_m_n_u8): Likewise.
6318 (__arm_vqrdmlahq_m_n_u32): Likewise.
6319 (__arm_vqrdmlahq_m_n_u16): Likewise.
6320 (__arm_vqrdmlashq_m_n_s8): Likewise.
6321 (__arm_vqrdmlashq_m_n_s32): Likewise.
6322 (__arm_vqrdmlashq_m_n_s16): Likewise.
6323 (__arm_vqrdmlashq_m_n_u8): Likewise.
6324 (__arm_vqrdmlashq_m_n_u32): Likewise.
6325 (__arm_vqrdmlashq_m_n_u16): Likewise.
6326 (__arm_vqrdmlsdhq_m_s8): Likewise.
6327 (__arm_vqrdmlsdhq_m_s32): Likewise.
6328 (__arm_vqrdmlsdhq_m_s16): Likewise.
6329 (__arm_vqrdmlsdhxq_m_s8): Likewise.
6330 (__arm_vqrdmlsdhxq_m_s32): Likewise.
6331 (__arm_vqrdmlsdhxq_m_s16): Likewise.
6332 (__arm_vqrdmulhq_m_n_s8): Likewise.
6333 (__arm_vqrdmulhq_m_n_s32): Likewise.
6334 (__arm_vqrdmulhq_m_n_s16): Likewise.
6335 (__arm_vqrdmulhq_m_s8): Likewise.
6336 (__arm_vqrdmulhq_m_s32): Likewise.
6337 (__arm_vqrdmulhq_m_s16): Likewise.
6338 (__arm_vqrshlq_m_s8): Likewise.
6339 (__arm_vqrshlq_m_s32): Likewise.
6340 (__arm_vqrshlq_m_s16): Likewise.
6341 (__arm_vqrshlq_m_u8): Likewise.
6342 (__arm_vqrshlq_m_u32): Likewise.
6343 (__arm_vqrshlq_m_u16): Likewise.
6344 (__arm_vqshlq_m_n_s8): Likewise.
6345 (__arm_vqshlq_m_n_s32): Likewise.
6346 (__arm_vqshlq_m_n_s16): Likewise.
6347 (__arm_vqshlq_m_n_u8): Likewise.
6348 (__arm_vqshlq_m_n_u32): Likewise.
6349 (__arm_vqshlq_m_n_u16): Likewise.
6350 (__arm_vqshlq_m_s8): Likewise.
6351 (__arm_vqshlq_m_s32): Likewise.
6352 (__arm_vqshlq_m_s16): Likewise.
6353 (__arm_vqshlq_m_u8): Likewise.
6354 (__arm_vqshlq_m_u32): Likewise.
6355 (__arm_vqshlq_m_u16): Likewise.
6356 (__arm_vqsubq_m_n_s8): Likewise.
6357 (__arm_vqsubq_m_n_s32): Likewise.
6358 (__arm_vqsubq_m_n_s16): Likewise.
6359 (__arm_vqsubq_m_n_u8): Likewise.
6360 (__arm_vqsubq_m_n_u32): Likewise.
6361 (__arm_vqsubq_m_n_u16): Likewise.
6362 (__arm_vqsubq_m_s8): Likewise.
6363 (__arm_vqsubq_m_s32): Likewise.
6364 (__arm_vqsubq_m_s16): Likewise.
6365 (__arm_vqsubq_m_u8): Likewise.
6366 (__arm_vqsubq_m_u32): Likewise.
6367 (__arm_vqsubq_m_u16): Likewise.
6368 (__arm_vrhaddq_m_s8): Likewise.
6369 (__arm_vrhaddq_m_s32): Likewise.
6370 (__arm_vrhaddq_m_s16): Likewise.
6371 (__arm_vrhaddq_m_u8): Likewise.
6372 (__arm_vrhaddq_m_u32): Likewise.
6373 (__arm_vrhaddq_m_u16): Likewise.
6374 (__arm_vrmulhq_m_s8): Likewise.
6375 (__arm_vrmulhq_m_s32): Likewise.
6376 (__arm_vrmulhq_m_s16): Likewise.
6377 (__arm_vrmulhq_m_u8): Likewise.
6378 (__arm_vrmulhq_m_u32): Likewise.
6379 (__arm_vrmulhq_m_u16): Likewise.
6380 (__arm_vrshlq_m_s8): Likewise.
6381 (__arm_vrshlq_m_s32): Likewise.
6382 (__arm_vrshlq_m_s16): Likewise.
6383 (__arm_vrshlq_m_u8): Likewise.
6384 (__arm_vrshlq_m_u32): Likewise.
6385 (__arm_vrshlq_m_u16): Likewise.
6386 (__arm_vrshrq_m_n_s8): Likewise.
6387 (__arm_vrshrq_m_n_s32): Likewise.
6388 (__arm_vrshrq_m_n_s16): Likewise.
6389 (__arm_vrshrq_m_n_u8): Likewise.
6390 (__arm_vrshrq_m_n_u32): Likewise.
6391 (__arm_vrshrq_m_n_u16): Likewise.
6392 (__arm_vshlq_m_n_s8): Likewise.
6393 (__arm_vshlq_m_n_s32): Likewise.
6394 (__arm_vshlq_m_n_s16): Likewise.
6395 (__arm_vshlq_m_n_u8): Likewise.
6396 (__arm_vshlq_m_n_u32): Likewise.
6397 (__arm_vshlq_m_n_u16): Likewise.
6398 (__arm_vshrq_m_n_s8): Likewise.
6399 (__arm_vshrq_m_n_s32): Likewise.
6400 (__arm_vshrq_m_n_s16): Likewise.
6401 (__arm_vshrq_m_n_u8): Likewise.
6402 (__arm_vshrq_m_n_u32): Likewise.
6403 (__arm_vshrq_m_n_u16): Likewise.
6404 (__arm_vsliq_m_n_s8): Likewise.
6405 (__arm_vsliq_m_n_s32): Likewise.
6406 (__arm_vsliq_m_n_s16): Likewise.
6407 (__arm_vsliq_m_n_u8): Likewise.
6408 (__arm_vsliq_m_n_u32): Likewise.
6409 (__arm_vsliq_m_n_u16): Likewise.
6410 (__arm_vsubq_m_n_s8): Likewise.
6411 (__arm_vsubq_m_n_s32): Likewise.
6412 (__arm_vsubq_m_n_s16): Likewise.
6413 (__arm_vsubq_m_n_u8): Likewise.
6414 (__arm_vsubq_m_n_u32): Likewise.
6415 (__arm_vsubq_m_n_u16): Likewise.
6416 (vqdmladhq_m): Define polymorphic variant.
6417 (vqdmladhxq_m): Likewise.
6418 (vqdmlsdhq_m): Likewise.
6419 (vqdmlsdhxq_m): Likewise.
6420 (vabdq_m): Likewise.
6421 (vandq_m): Likewise.
6422 (vbicq_m): Likewise.
6423 (vbrsrq_m_n): Likewise.
6424 (vcaddq_rot270_m): Likewise.
6425 (vcaddq_rot90_m): Likewise.
6426 (veorq_m): Likewise.
6427 (vmaxq_m): Likewise.
6428 (vminq_m): Likewise.
6429 (vmladavaq_p): Likewise.
6430 (vmlaq_m_n): Likewise.
6431 (vmlasq_m_n): Likewise.
6432 (vmulhq_m): Likewise.
6433 (vmullbq_int_m): Likewise.
6434 (vmulltq_int_m): Likewise.
6435 (vornq_m): Likewise.
6436 (vorrq_m): Likewise.
6437 (vqdmlahq_m_n): Likewise.
6438 (vqrdmlahq_m_n): Likewise.
6439 (vqrdmlashq_m_n): Likewise.
6440 (vqrshlq_m): Likewise.
6441 (vqshlq_m_n): Likewise.
6442 (vqshlq_m): Likewise.
6443 (vrhaddq_m): Likewise.
6444 (vrmulhq_m): Likewise.
6445 (vrshlq_m): Likewise.
6446 (vrshrq_m_n): Likewise.
6447 (vshlq_m_n): Likewise.
6448 (vshrq_m_n): Likewise.
6449 (vsliq_m): Likewise.
6450 (vaddq_m_n): Likewise.
6451 (vaddq_m): Likewise.
6452 (vhaddq_m_n): Likewise.
6453 (vhaddq_m): Likewise.
6454 (vhcaddq_rot270_m): Likewise.
6455 (vhcaddq_rot90_m): Likewise.
6456 (vhsubq_m): Likewise.
6457 (vhsubq_m_n): Likewise.
6458 (vmulq_m_n): Likewise.
6459 (vmulq_m): Likewise.
6460 (vqaddq_m_n): Likewise.
6461 (vqaddq_m): Likewise.
6462 (vqdmulhq_m_n): Likewise.
6463 (vqdmulhq_m): Likewise.
6464 (vsubq_m_n): Likewise.
6465 (vsliq_m_n): Likewise.
6466 (vqsubq_m_n): Likewise.
6467 (vqsubq_m): Likewise.
6468 (vqrdmulhq_m): Likewise.
6469 (vqrdmulhq_m_n): Likewise.
6470 (vqrdmlsdhxq_m): Likewise.
6471 (vqrdmlsdhq_m): Likewise.
6472 (vqrdmladhq_m): Likewise.
6473 (vqrdmladhxq_m): Likewise.
6474 (vmlsdavaxq_p): Likewise.
6475 (vmlsdavaq_p): Likewise.
6476 (vmladavaxq_p): Likewise.
6477 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
6479 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
6480 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
6481 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
6482 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
6483 * config/arm/mve.md (VHSUBQ_M): Define iterators.
6484 (VSLIQ_M_N): Likewise.
6485 (VQRDMLAHQ_M_N): Likewise.
6486 (VRSHLQ_M): Likewise.
6487 (VMINQ_M): Likewise.
6488 (VMULLBQ_INT_M): Likewise.
6489 (VMULHQ_M): Likewise.
6490 (VMULQ_M): Likewise.
6491 (VHSUBQ_M_N): Likewise.
6492 (VHADDQ_M_N): Likewise.
6493 (VORRQ_M): Likewise.
6494 (VRMULHQ_M): Likewise.
6495 (VQADDQ_M): Likewise.
6496 (VRSHRQ_M_N): Likewise.
6497 (VQSUBQ_M_N): Likewise.
6498 (VADDQ_M): Likewise.
6499 (VORNQ_M): Likewise.
6500 (VQDMLAHQ_M_N): Likewise.
6501 (VRHADDQ_M): Likewise.
6502 (VQSHLQ_M): Likewise.
6503 (VANDQ_M): Likewise.
6504 (VBICQ_M): Likewise.
6505 (VSHLQ_M_N): Likewise.
6506 (VCADDQ_ROT270_M): Likewise.
6507 (VQRSHLQ_M): Likewise.
6508 (VQADDQ_M_N): Likewise.
6509 (VADDQ_M_N): Likewise.
6510 (VMAXQ_M): Likewise.
6511 (VQSUBQ_M): Likewise.
6512 (VMLASQ_M_N): Likewise.
6513 (VMLADAVAQ_P): Likewise.
6514 (VBRSRQ_M_N): Likewise.
6515 (VMULQ_M_N): Likewise.
6516 (VCADDQ_ROT90_M): Likewise.
6517 (VMULLTQ_INT_M): Likewise.
6518 (VEORQ_M): Likewise.
6519 (VSHRQ_M_N): Likewise.
6520 (VSUBQ_M_N): Likewise.
6521 (VHADDQ_M): Likewise.
6522 (VABDQ_M): Likewise.
6523 (VQRDMLASHQ_M_N): Likewise.
6524 (VMLAQ_M_N): Likewise.
6525 (VQSHLQ_M_N): Likewise.
6526 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
6527 (mve_vaddq_m_n_<supf><mode>): Likewise.
6528 (mve_vaddq_m_<supf><mode>): Likewise.
6529 (mve_vandq_m_<supf><mode>): Likewise.
6530 (mve_vbicq_m_<supf><mode>): Likewise.
6531 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
6532 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
6533 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
6534 (mve_veorq_m_<supf><mode>): Likewise.
6535 (mve_vhaddq_m_n_<supf><mode>): Likewise.
6536 (mve_vhaddq_m_<supf><mode>): Likewise.
6537 (mve_vhsubq_m_n_<supf><mode>): Likewise.
6538 (mve_vhsubq_m_<supf><mode>): Likewise.
6539 (mve_vmaxq_m_<supf><mode>): Likewise.
6540 (mve_vminq_m_<supf><mode>): Likewise.
6541 (mve_vmladavaq_p_<supf><mode>): Likewise.
6542 (mve_vmlaq_m_n_<supf><mode>): Likewise.
6543 (mve_vmlasq_m_n_<supf><mode>): Likewise.
6544 (mve_vmulhq_m_<supf><mode>): Likewise.
6545 (mve_vmullbq_int_m_<supf><mode>): Likewise.
6546 (mve_vmulltq_int_m_<supf><mode>): Likewise.
6547 (mve_vmulq_m_n_<supf><mode>): Likewise.
6548 (mve_vmulq_m_<supf><mode>): Likewise.
6549 (mve_vornq_m_<supf><mode>): Likewise.
6550 (mve_vorrq_m_<supf><mode>): Likewise.
6551 (mve_vqaddq_m_n_<supf><mode>): Likewise.
6552 (mve_vqaddq_m_<supf><mode>): Likewise.
6553 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
6554 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
6555 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
6556 (mve_vqrshlq_m_<supf><mode>): Likewise.
6557 (mve_vqshlq_m_n_<supf><mode>): Likewise.
6558 (mve_vqshlq_m_<supf><mode>): Likewise.
6559 (mve_vqsubq_m_n_<supf><mode>): Likewise.
6560 (mve_vqsubq_m_<supf><mode>): Likewise.
6561 (mve_vrhaddq_m_<supf><mode>): Likewise.
6562 (mve_vrmulhq_m_<supf><mode>): Likewise.
6563 (mve_vrshlq_m_<supf><mode>): Likewise.
6564 (mve_vrshrq_m_n_<supf><mode>): Likewise.
6565 (mve_vshlq_m_n_<supf><mode>): Likewise.
6566 (mve_vshrq_m_n_<supf><mode>): Likewise.
6567 (mve_vsliq_m_n_<supf><mode>): Likewise.
6568 (mve_vsubq_m_n_<supf><mode>): Likewise.
6569 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
6570 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
6571 (mve_vmladavaxq_p_s<mode>): Likewise.
6572 (mve_vmlsdavaq_p_s<mode>): Likewise.
6573 (mve_vmlsdavaxq_p_s<mode>): Likewise.
6574 (mve_vqdmladhq_m_s<mode>): Likewise.
6575 (mve_vqdmladhxq_m_s<mode>): Likewise.
6576 (mve_vqdmlsdhq_m_s<mode>): Likewise.
6577 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
6578 (mve_vqdmulhq_m_n_s<mode>): Likewise.
6579 (mve_vqdmulhq_m_s<mode>): Likewise.
6580 (mve_vqrdmladhq_m_s<mode>): Likewise.
6581 (mve_vqrdmladhxq_m_s<mode>): Likewise.
6582 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
6583 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
6584 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
6585 (mve_vqrdmulhq_m_s<mode>): Likewise.
6587 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6588 Mihail Ionescu <mihail.ionescu@arm.com>
6589 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6591 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
6592 Define builtin qualifier.
6593 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6594 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6595 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6596 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6597 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6598 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6599 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6600 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
6601 (vsubq_m_s8): Likewise.
6602 (vcvtq_m_n_f16_u16): Likewise.
6603 (vqshluq_m_n_s8): Likewise.
6604 (vabavq_p_s8): Likewise.
6605 (vsriq_m_n_u8): Likewise.
6606 (vshlq_m_u8): Likewise.
6607 (vsubq_m_u8): Likewise.
6608 (vabavq_p_u8): Likewise.
6609 (vshlq_m_s8): Likewise.
6610 (vcvtq_m_n_f16_s16): Likewise.
6611 (vsriq_m_n_s16): Likewise.
6612 (vsubq_m_s16): Likewise.
6613 (vcvtq_m_n_f32_u32): Likewise.
6614 (vqshluq_m_n_s16): Likewise.
6615 (vabavq_p_s16): Likewise.
6616 (vsriq_m_n_u16): Likewise.
6617 (vshlq_m_u16): Likewise.
6618 (vsubq_m_u16): Likewise.
6619 (vabavq_p_u16): Likewise.
6620 (vshlq_m_s16): Likewise.
6621 (vcvtq_m_n_f32_s32): Likewise.
6622 (vsriq_m_n_s32): Likewise.
6623 (vsubq_m_s32): Likewise.
6624 (vqshluq_m_n_s32): Likewise.
6625 (vabavq_p_s32): Likewise.
6626 (vsriq_m_n_u32): Likewise.
6627 (vshlq_m_u32): Likewise.
6628 (vsubq_m_u32): Likewise.
6629 (vabavq_p_u32): Likewise.
6630 (vshlq_m_s32): Likewise.
6631 (__arm_vsriq_m_n_s8): Define intrinsic.
6632 (__arm_vsubq_m_s8): Likewise.
6633 (__arm_vqshluq_m_n_s8): Likewise.
6634 (__arm_vabavq_p_s8): Likewise.
6635 (__arm_vsriq_m_n_u8): Likewise.
6636 (__arm_vshlq_m_u8): Likewise.
6637 (__arm_vsubq_m_u8): Likewise.
6638 (__arm_vabavq_p_u8): Likewise.
6639 (__arm_vshlq_m_s8): Likewise.
6640 (__arm_vsriq_m_n_s16): Likewise.
6641 (__arm_vsubq_m_s16): Likewise.
6642 (__arm_vqshluq_m_n_s16): Likewise.
6643 (__arm_vabavq_p_s16): Likewise.
6644 (__arm_vsriq_m_n_u16): Likewise.
6645 (__arm_vshlq_m_u16): Likewise.
6646 (__arm_vsubq_m_u16): Likewise.
6647 (__arm_vabavq_p_u16): Likewise.
6648 (__arm_vshlq_m_s16): Likewise.
6649 (__arm_vsriq_m_n_s32): Likewise.
6650 (__arm_vsubq_m_s32): Likewise.
6651 (__arm_vqshluq_m_n_s32): Likewise.
6652 (__arm_vabavq_p_s32): Likewise.
6653 (__arm_vsriq_m_n_u32): Likewise.
6654 (__arm_vshlq_m_u32): Likewise.
6655 (__arm_vsubq_m_u32): Likewise.
6656 (__arm_vabavq_p_u32): Likewise.
6657 (__arm_vshlq_m_s32): Likewise.
6658 (__arm_vcvtq_m_n_f16_u16): Likewise.
6659 (__arm_vcvtq_m_n_f16_s16): Likewise.
6660 (__arm_vcvtq_m_n_f32_u32): Likewise.
6661 (__arm_vcvtq_m_n_f32_s32): Likewise.
6662 (vcvtq_m_n): Define polymorphic variant.
6663 (vqshluq_m_n): Likewise.
6664 (vshlq_m): Likewise.
6665 (vsriq_m_n): Likewise.
6666 (vsubq_m): Likewise.
6667 (vabavq_p): Likewise.
6668 * config/arm/arm_mve_builtins.def
6669 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
6670 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
6671 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6672 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
6673 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
6674 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6675 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
6676 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
6677 * config/arm/mve.md (VABAVQ_P): Define iterator.
6678 (VSHLQ_M): Likewise.
6679 (VSRIQ_M_N): Likewise.
6680 (VSUBQ_M): Likewise.
6681 (VCVTQ_M_N_TO_F): Likewise.
6682 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
6683 (mve_vqshluq_m_n_s<mode>): Likewise.
6684 (mve_vshlq_m_<supf><mode>): Likewise.
6685 (mve_vsriq_m_n_<supf><mode>): Likewise.
6686 (mve_vsubq_m_<supf><mode>): Likewise.
6687 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
6689 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6690 Mihail Ionescu <mihail.ionescu@arm.com>
6691 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6693 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
6694 (vrmlsldavhaq_s32): Likewise.
6695 (vrmlsldavhaxq_s32): Likewise.
6696 (vaddlvaq_p_s32): Likewise.
6697 (vcvtbq_m_f16_f32): Likewise.
6698 (vcvtbq_m_f32_f16): Likewise.
6699 (vcvttq_m_f16_f32): Likewise.
6700 (vcvttq_m_f32_f16): Likewise.
6701 (vrev16q_m_s8): Likewise.
6702 (vrev32q_m_f16): Likewise.
6703 (vrmlaldavhq_p_s32): Likewise.
6704 (vrmlaldavhxq_p_s32): Likewise.
6705 (vrmlsldavhq_p_s32): Likewise.
6706 (vrmlsldavhxq_p_s32): Likewise.
6707 (vaddlvaq_p_u32): Likewise.
6708 (vrev16q_m_u8): Likewise.
6709 (vrmlaldavhq_p_u32): Likewise.
6710 (vmvnq_m_n_s16): Likewise.
6711 (vorrq_m_n_s16): Likewise.
6712 (vqrshrntq_n_s16): Likewise.
6713 (vqshrnbq_n_s16): Likewise.
6714 (vqshrntq_n_s16): Likewise.
6715 (vrshrnbq_n_s16): Likewise.
6716 (vrshrntq_n_s16): Likewise.
6717 (vshrnbq_n_s16): Likewise.
6718 (vshrntq_n_s16): Likewise.
6719 (vcmlaq_f16): Likewise.
6720 (vcmlaq_rot180_f16): Likewise.
6721 (vcmlaq_rot270_f16): Likewise.
6722 (vcmlaq_rot90_f16): Likewise.
6723 (vfmaq_f16): Likewise.
6724 (vfmaq_n_f16): Likewise.
6725 (vfmasq_n_f16): Likewise.
6726 (vfmsq_f16): Likewise.
6727 (vmlaldavaq_s16): Likewise.
6728 (vmlaldavaxq_s16): Likewise.
6729 (vmlsldavaq_s16): Likewise.
6730 (vmlsldavaxq_s16): Likewise.
6731 (vabsq_m_f16): Likewise.
6732 (vcvtmq_m_s16_f16): Likewise.
6733 (vcvtnq_m_s16_f16): Likewise.
6734 (vcvtpq_m_s16_f16): Likewise.
6735 (vcvtq_m_s16_f16): Likewise.
6736 (vdupq_m_n_f16): Likewise.
6737 (vmaxnmaq_m_f16): Likewise.
6738 (vmaxnmavq_p_f16): Likewise.
6739 (vmaxnmvq_p_f16): Likewise.
6740 (vminnmaq_m_f16): Likewise.
6741 (vminnmavq_p_f16): Likewise.
6742 (vminnmvq_p_f16): Likewise.
6743 (vmlaldavq_p_s16): Likewise.
6744 (vmlaldavxq_p_s16): Likewise.
6745 (vmlsldavq_p_s16): Likewise.
6746 (vmlsldavxq_p_s16): Likewise.
6747 (vmovlbq_m_s8): Likewise.
6748 (vmovltq_m_s8): Likewise.
6749 (vmovnbq_m_s16): Likewise.
6750 (vmovntq_m_s16): Likewise.
6751 (vnegq_m_f16): Likewise.
6752 (vpselq_f16): Likewise.
6753 (vqmovnbq_m_s16): Likewise.
6754 (vqmovntq_m_s16): Likewise.
6755 (vrev32q_m_s8): Likewise.
6756 (vrev64q_m_f16): Likewise.
6757 (vrndaq_m_f16): Likewise.
6758 (vrndmq_m_f16): Likewise.
6759 (vrndnq_m_f16): Likewise.
6760 (vrndpq_m_f16): Likewise.
6761 (vrndq_m_f16): Likewise.
6762 (vrndxq_m_f16): Likewise.
6763 (vcmpeqq_m_n_f16): Likewise.
6764 (vcmpgeq_m_f16): Likewise.
6765 (vcmpgeq_m_n_f16): Likewise.
6766 (vcmpgtq_m_f16): Likewise.
6767 (vcmpgtq_m_n_f16): Likewise.
6768 (vcmpleq_m_f16): Likewise.
6769 (vcmpleq_m_n_f16): Likewise.
6770 (vcmpltq_m_f16): Likewise.
6771 (vcmpltq_m_n_f16): Likewise.
6772 (vcmpneq_m_f16): Likewise.
6773 (vcmpneq_m_n_f16): Likewise.
6774 (vmvnq_m_n_u16): Likewise.
6775 (vorrq_m_n_u16): Likewise.
6776 (vqrshruntq_n_s16): Likewise.
6777 (vqshrunbq_n_s16): Likewise.
6778 (vqshruntq_n_s16): Likewise.
6779 (vcvtmq_m_u16_f16): Likewise.
6780 (vcvtnq_m_u16_f16): Likewise.
6781 (vcvtpq_m_u16_f16): Likewise.
6782 (vcvtq_m_u16_f16): Likewise.
6783 (vqmovunbq_m_s16): Likewise.
6784 (vqmovuntq_m_s16): Likewise.
6785 (vqrshrntq_n_u16): Likewise.
6786 (vqshrnbq_n_u16): Likewise.
6787 (vqshrntq_n_u16): Likewise.
6788 (vrshrnbq_n_u16): Likewise.
6789 (vrshrntq_n_u16): Likewise.
6790 (vshrnbq_n_u16): Likewise.
6791 (vshrntq_n_u16): Likewise.
6792 (vmlaldavaq_u16): Likewise.
6793 (vmlaldavaxq_u16): Likewise.
6794 (vmlaldavq_p_u16): Likewise.
6795 (vmlaldavxq_p_u16): Likewise.
6796 (vmovlbq_m_u8): Likewise.
6797 (vmovltq_m_u8): Likewise.
6798 (vmovnbq_m_u16): Likewise.
6799 (vmovntq_m_u16): Likewise.
6800 (vqmovnbq_m_u16): Likewise.
6801 (vqmovntq_m_u16): Likewise.
6802 (vrev32q_m_u8): Likewise.
6803 (vmvnq_m_n_s32): Likewise.
6804 (vorrq_m_n_s32): Likewise.
6805 (vqrshrntq_n_s32): Likewise.
6806 (vqshrnbq_n_s32): Likewise.
6807 (vqshrntq_n_s32): Likewise.
6808 (vrshrnbq_n_s32): Likewise.
6809 (vrshrntq_n_s32): Likewise.
6810 (vshrnbq_n_s32): Likewise.
6811 (vshrntq_n_s32): Likewise.
6812 (vcmlaq_f32): Likewise.
6813 (vcmlaq_rot180_f32): Likewise.
6814 (vcmlaq_rot270_f32): Likewise.
6815 (vcmlaq_rot90_f32): Likewise.
6816 (vfmaq_f32): Likewise.
6817 (vfmaq_n_f32): Likewise.
6818 (vfmasq_n_f32): Likewise.
6819 (vfmsq_f32): Likewise.
6820 (vmlaldavaq_s32): Likewise.
6821 (vmlaldavaxq_s32): Likewise.
6822 (vmlsldavaq_s32): Likewise.
6823 (vmlsldavaxq_s32): Likewise.
6824 (vabsq_m_f32): Likewise.
6825 (vcvtmq_m_s32_f32): Likewise.
6826 (vcvtnq_m_s32_f32): Likewise.
6827 (vcvtpq_m_s32_f32): Likewise.
6828 (vcvtq_m_s32_f32): Likewise.
6829 (vdupq_m_n_f32): Likewise.
6830 (vmaxnmaq_m_f32): Likewise.
6831 (vmaxnmavq_p_f32): Likewise.
6832 (vmaxnmvq_p_f32): Likewise.
6833 (vminnmaq_m_f32): Likewise.
6834 (vminnmavq_p_f32): Likewise.
6835 (vminnmvq_p_f32): Likewise.
6836 (vmlaldavq_p_s32): Likewise.
6837 (vmlaldavxq_p_s32): Likewise.
6838 (vmlsldavq_p_s32): Likewise.
6839 (vmlsldavxq_p_s32): Likewise.
6840 (vmovlbq_m_s16): Likewise.
6841 (vmovltq_m_s16): Likewise.
6842 (vmovnbq_m_s32): Likewise.
6843 (vmovntq_m_s32): Likewise.
6844 (vnegq_m_f32): Likewise.
6845 (vpselq_f32): Likewise.
6846 (vqmovnbq_m_s32): Likewise.
6847 (vqmovntq_m_s32): Likewise.
6848 (vrev32q_m_s16): Likewise.
6849 (vrev64q_m_f32): Likewise.
6850 (vrndaq_m_f32): Likewise.
6851 (vrndmq_m_f32): Likewise.
6852 (vrndnq_m_f32): Likewise.
6853 (vrndpq_m_f32): Likewise.
6854 (vrndq_m_f32): Likewise.
6855 (vrndxq_m_f32): Likewise.
6856 (vcmpeqq_m_n_f32): Likewise.
6857 (vcmpgeq_m_f32): Likewise.
6858 (vcmpgeq_m_n_f32): Likewise.
6859 (vcmpgtq_m_f32): Likewise.
6860 (vcmpgtq_m_n_f32): Likewise.
6861 (vcmpleq_m_f32): Likewise.
6862 (vcmpleq_m_n_f32): Likewise.
6863 (vcmpltq_m_f32): Likewise.
6864 (vcmpltq_m_n_f32): Likewise.
6865 (vcmpneq_m_f32): Likewise.
6866 (vcmpneq_m_n_f32): Likewise.
6867 (vmvnq_m_n_u32): Likewise.
6868 (vorrq_m_n_u32): Likewise.
6869 (vqrshruntq_n_s32): Likewise.
6870 (vqshrunbq_n_s32): Likewise.
6871 (vqshruntq_n_s32): Likewise.
6872 (vcvtmq_m_u32_f32): Likewise.
6873 (vcvtnq_m_u32_f32): Likewise.
6874 (vcvtpq_m_u32_f32): Likewise.
6875 (vcvtq_m_u32_f32): Likewise.
6876 (vqmovunbq_m_s32): Likewise.
6877 (vqmovuntq_m_s32): Likewise.
6878 (vqrshrntq_n_u32): Likewise.
6879 (vqshrnbq_n_u32): Likewise.
6880 (vqshrntq_n_u32): Likewise.
6881 (vrshrnbq_n_u32): Likewise.
6882 (vrshrntq_n_u32): Likewise.
6883 (vshrnbq_n_u32): Likewise.
6884 (vshrntq_n_u32): Likewise.
6885 (vmlaldavaq_u32): Likewise.
6886 (vmlaldavaxq_u32): Likewise.
6887 (vmlaldavq_p_u32): Likewise.
6888 (vmlaldavxq_p_u32): Likewise.
6889 (vmovlbq_m_u16): Likewise.
6890 (vmovltq_m_u16): Likewise.
6891 (vmovnbq_m_u32): Likewise.
6892 (vmovntq_m_u32): Likewise.
6893 (vqmovnbq_m_u32): Likewise.
6894 (vqmovntq_m_u32): Likewise.
6895 (vrev32q_m_u16): Likewise.
6896 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
6897 (__arm_vrmlsldavhaq_s32): Likewise.
6898 (__arm_vrmlsldavhaxq_s32): Likewise.
6899 (__arm_vaddlvaq_p_s32): Likewise.
6900 (__arm_vrev16q_m_s8): Likewise.
6901 (__arm_vrmlaldavhq_p_s32): Likewise.
6902 (__arm_vrmlaldavhxq_p_s32): Likewise.
6903 (__arm_vrmlsldavhq_p_s32): Likewise.
6904 (__arm_vrmlsldavhxq_p_s32): Likewise.
6905 (__arm_vaddlvaq_p_u32): Likewise.
6906 (__arm_vrev16q_m_u8): Likewise.
6907 (__arm_vrmlaldavhq_p_u32): Likewise.
6908 (__arm_vmvnq_m_n_s16): Likewise.
6909 (__arm_vorrq_m_n_s16): Likewise.
6910 (__arm_vqrshrntq_n_s16): Likewise.
6911 (__arm_vqshrnbq_n_s16): Likewise.
6912 (__arm_vqshrntq_n_s16): Likewise.
6913 (__arm_vrshrnbq_n_s16): Likewise.
6914 (__arm_vrshrntq_n_s16): Likewise.
6915 (__arm_vshrnbq_n_s16): Likewise.
6916 (__arm_vshrntq_n_s16): Likewise.
6917 (__arm_vmlaldavaq_s16): Likewise.
6918 (__arm_vmlaldavaxq_s16): Likewise.
6919 (__arm_vmlsldavaq_s16): Likewise.
6920 (__arm_vmlsldavaxq_s16): Likewise.
6921 (__arm_vmlaldavq_p_s16): Likewise.
6922 (__arm_vmlaldavxq_p_s16): Likewise.
6923 (__arm_vmlsldavq_p_s16): Likewise.
6924 (__arm_vmlsldavxq_p_s16): Likewise.
6925 (__arm_vmovlbq_m_s8): Likewise.
6926 (__arm_vmovltq_m_s8): Likewise.
6927 (__arm_vmovnbq_m_s16): Likewise.
6928 (__arm_vmovntq_m_s16): Likewise.
6929 (__arm_vqmovnbq_m_s16): Likewise.
6930 (__arm_vqmovntq_m_s16): Likewise.
6931 (__arm_vrev32q_m_s8): Likewise.
6932 (__arm_vmvnq_m_n_u16): Likewise.
6933 (__arm_vorrq_m_n_u16): Likewise.
6934 (__arm_vqrshruntq_n_s16): Likewise.
6935 (__arm_vqshrunbq_n_s16): Likewise.
6936 (__arm_vqshruntq_n_s16): Likewise.
6937 (__arm_vqmovunbq_m_s16): Likewise.
6938 (__arm_vqmovuntq_m_s16): Likewise.
6939 (__arm_vqrshrntq_n_u16): Likewise.
6940 (__arm_vqshrnbq_n_u16): Likewise.
6941 (__arm_vqshrntq_n_u16): Likewise.
6942 (__arm_vrshrnbq_n_u16): Likewise.
6943 (__arm_vrshrntq_n_u16): Likewise.
6944 (__arm_vshrnbq_n_u16): Likewise.
6945 (__arm_vshrntq_n_u16): Likewise.
6946 (__arm_vmlaldavaq_u16): Likewise.
6947 (__arm_vmlaldavaxq_u16): Likewise.
6948 (__arm_vmlaldavq_p_u16): Likewise.
6949 (__arm_vmlaldavxq_p_u16): Likewise.
6950 (__arm_vmovlbq_m_u8): Likewise.
6951 (__arm_vmovltq_m_u8): Likewise.
6952 (__arm_vmovnbq_m_u16): Likewise.
6953 (__arm_vmovntq_m_u16): Likewise.
6954 (__arm_vqmovnbq_m_u16): Likewise.
6955 (__arm_vqmovntq_m_u16): Likewise.
6956 (__arm_vrev32q_m_u8): Likewise.
6957 (__arm_vmvnq_m_n_s32): Likewise.
6958 (__arm_vorrq_m_n_s32): Likewise.
6959 (__arm_vqrshrntq_n_s32): Likewise.
6960 (__arm_vqshrnbq_n_s32): Likewise.
6961 (__arm_vqshrntq_n_s32): Likewise.
6962 (__arm_vrshrnbq_n_s32): Likewise.
6963 (__arm_vrshrntq_n_s32): Likewise.
6964 (__arm_vshrnbq_n_s32): Likewise.
6965 (__arm_vshrntq_n_s32): Likewise.
6966 (__arm_vmlaldavaq_s32): Likewise.
6967 (__arm_vmlaldavaxq_s32): Likewise.
6968 (__arm_vmlsldavaq_s32): Likewise.
6969 (__arm_vmlsldavaxq_s32): Likewise.
6970 (__arm_vmlaldavq_p_s32): Likewise.
6971 (__arm_vmlaldavxq_p_s32): Likewise.
6972 (__arm_vmlsldavq_p_s32): Likewise.
6973 (__arm_vmlsldavxq_p_s32): Likewise.
6974 (__arm_vmovlbq_m_s16): Likewise.
6975 (__arm_vmovltq_m_s16): Likewise.
6976 (__arm_vmovnbq_m_s32): Likewise.
6977 (__arm_vmovntq_m_s32): Likewise.
6978 (__arm_vqmovnbq_m_s32): Likewise.
6979 (__arm_vqmovntq_m_s32): Likewise.
6980 (__arm_vrev32q_m_s16): Likewise.
6981 (__arm_vmvnq_m_n_u32): Likewise.
6982 (__arm_vorrq_m_n_u32): Likewise.
6983 (__arm_vqrshruntq_n_s32): Likewise.
6984 (__arm_vqshrunbq_n_s32): Likewise.
6985 (__arm_vqshruntq_n_s32): Likewise.
6986 (__arm_vqmovunbq_m_s32): Likewise.
6987 (__arm_vqmovuntq_m_s32): Likewise.
6988 (__arm_vqrshrntq_n_u32): Likewise.
6989 (__arm_vqshrnbq_n_u32): Likewise.
6990 (__arm_vqshrntq_n_u32): Likewise.
6991 (__arm_vrshrnbq_n_u32): Likewise.
6992 (__arm_vrshrntq_n_u32): Likewise.
6993 (__arm_vshrnbq_n_u32): Likewise.
6994 (__arm_vshrntq_n_u32): Likewise.
6995 (__arm_vmlaldavaq_u32): Likewise.
6996 (__arm_vmlaldavaxq_u32): Likewise.
6997 (__arm_vmlaldavq_p_u32): Likewise.
6998 (__arm_vmlaldavxq_p_u32): Likewise.
6999 (__arm_vmovlbq_m_u16): Likewise.
7000 (__arm_vmovltq_m_u16): Likewise.
7001 (__arm_vmovnbq_m_u32): Likewise.
7002 (__arm_vmovntq_m_u32): Likewise.
7003 (__arm_vqmovnbq_m_u32): Likewise.
7004 (__arm_vqmovntq_m_u32): Likewise.
7005 (__arm_vrev32q_m_u16): Likewise.
7006 (__arm_vcvtbq_m_f16_f32): Likewise.
7007 (__arm_vcvtbq_m_f32_f16): Likewise.
7008 (__arm_vcvttq_m_f16_f32): Likewise.
7009 (__arm_vcvttq_m_f32_f16): Likewise.
7010 (__arm_vrev32q_m_f16): Likewise.
7011 (__arm_vcmlaq_f16): Likewise.
7012 (__arm_vcmlaq_rot180_f16): Likewise.
7013 (__arm_vcmlaq_rot270_f16): Likewise.
7014 (__arm_vcmlaq_rot90_f16): Likewise.
7015 (__arm_vfmaq_f16): Likewise.
7016 (__arm_vfmaq_n_f16): Likewise.
7017 (__arm_vfmasq_n_f16): Likewise.
7018 (__arm_vfmsq_f16): Likewise.
7019 (__arm_vabsq_m_f16): Likewise.
7020 (__arm_vcvtmq_m_s16_f16): Likewise.
7021 (__arm_vcvtnq_m_s16_f16): Likewise.
7022 (__arm_vcvtpq_m_s16_f16): Likewise.
7023 (__arm_vcvtq_m_s16_f16): Likewise.
7024 (__arm_vdupq_m_n_f16): Likewise.
7025 (__arm_vmaxnmaq_m_f16): Likewise.
7026 (__arm_vmaxnmavq_p_f16): Likewise.
7027 (__arm_vmaxnmvq_p_f16): Likewise.
7028 (__arm_vminnmaq_m_f16): Likewise.
7029 (__arm_vminnmavq_p_f16): Likewise.
7030 (__arm_vminnmvq_p_f16): Likewise.
7031 (__arm_vnegq_m_f16): Likewise.
7032 (__arm_vpselq_f16): Likewise.
7033 (__arm_vrev64q_m_f16): Likewise.
7034 (__arm_vrndaq_m_f16): Likewise.
7035 (__arm_vrndmq_m_f16): Likewise.
7036 (__arm_vrndnq_m_f16): Likewise.
7037 (__arm_vrndpq_m_f16): Likewise.
7038 (__arm_vrndq_m_f16): Likewise.
7039 (__arm_vrndxq_m_f16): Likewise.
7040 (__arm_vcmpeqq_m_n_f16): Likewise.
7041 (__arm_vcmpgeq_m_f16): Likewise.
7042 (__arm_vcmpgeq_m_n_f16): Likewise.
7043 (__arm_vcmpgtq_m_f16): Likewise.
7044 (__arm_vcmpgtq_m_n_f16): Likewise.
7045 (__arm_vcmpleq_m_f16): Likewise.
7046 (__arm_vcmpleq_m_n_f16): Likewise.
7047 (__arm_vcmpltq_m_f16): Likewise.
7048 (__arm_vcmpltq_m_n_f16): Likewise.
7049 (__arm_vcmpneq_m_f16): Likewise.
7050 (__arm_vcmpneq_m_n_f16): Likewise.
7051 (__arm_vcvtmq_m_u16_f16): Likewise.
7052 (__arm_vcvtnq_m_u16_f16): Likewise.
7053 (__arm_vcvtpq_m_u16_f16): Likewise.
7054 (__arm_vcvtq_m_u16_f16): Likewise.
7055 (__arm_vcmlaq_f32): Likewise.
7056 (__arm_vcmlaq_rot180_f32): Likewise.
7057 (__arm_vcmlaq_rot270_f32): Likewise.
7058 (__arm_vcmlaq_rot90_f32): Likewise.
7059 (__arm_vfmaq_f32): Likewise.
7060 (__arm_vfmaq_n_f32): Likewise.
7061 (__arm_vfmasq_n_f32): Likewise.
7062 (__arm_vfmsq_f32): Likewise.
7063 (__arm_vabsq_m_f32): Likewise.
7064 (__arm_vcvtmq_m_s32_f32): Likewise.
7065 (__arm_vcvtnq_m_s32_f32): Likewise.
7066 (__arm_vcvtpq_m_s32_f32): Likewise.
7067 (__arm_vcvtq_m_s32_f32): Likewise.
7068 (__arm_vdupq_m_n_f32): Likewise.
7069 (__arm_vmaxnmaq_m_f32): Likewise.
7070 (__arm_vmaxnmavq_p_f32): Likewise.
7071 (__arm_vmaxnmvq_p_f32): Likewise.
7072 (__arm_vminnmaq_m_f32): Likewise.
7073 (__arm_vminnmavq_p_f32): Likewise.
7074 (__arm_vminnmvq_p_f32): Likewise.
7075 (__arm_vnegq_m_f32): Likewise.
7076 (__arm_vpselq_f32): Likewise.
7077 (__arm_vrev64q_m_f32): Likewise.
7078 (__arm_vrndaq_m_f32): Likewise.
7079 (__arm_vrndmq_m_f32): Likewise.
7080 (__arm_vrndnq_m_f32): Likewise.
7081 (__arm_vrndpq_m_f32): Likewise.
7082 (__arm_vrndq_m_f32): Likewise.
7083 (__arm_vrndxq_m_f32): Likewise.
7084 (__arm_vcmpeqq_m_n_f32): Likewise.
7085 (__arm_vcmpgeq_m_f32): Likewise.
7086 (__arm_vcmpgeq_m_n_f32): Likewise.
7087 (__arm_vcmpgtq_m_f32): Likewise.
7088 (__arm_vcmpgtq_m_n_f32): Likewise.
7089 (__arm_vcmpleq_m_f32): Likewise.
7090 (__arm_vcmpleq_m_n_f32): Likewise.
7091 (__arm_vcmpltq_m_f32): Likewise.
7092 (__arm_vcmpltq_m_n_f32): Likewise.
7093 (__arm_vcmpneq_m_f32): Likewise.
7094 (__arm_vcmpneq_m_n_f32): Likewise.
7095 (__arm_vcvtmq_m_u32_f32): Likewise.
7096 (__arm_vcvtnq_m_u32_f32): Likewise.
7097 (__arm_vcvtpq_m_u32_f32): Likewise.
7098 (__arm_vcvtq_m_u32_f32): Likewise.
7099 (vcvtq_m): Define polymorphic variant.
7100 (vabsq_m): Likewise.
7102 (vcmlaq_rot180): Likewise.
7103 (vcmlaq_rot270): Likewise.
7104 (vcmlaq_rot90): Likewise.
7105 (vcmpeqq_m_n): Likewise.
7106 (vcmpgeq_m_n): Likewise.
7107 (vrndxq_m): Likewise.
7108 (vrndq_m): Likewise.
7109 (vrndpq_m): Likewise.
7110 (vcmpgtq_m_n): Likewise.
7111 (vcmpgtq_m): Likewise.
7112 (vcmpleq_m): Likewise.
7113 (vcmpleq_m_n): Likewise.
7114 (vcmpltq_m_n): Likewise.
7115 (vcmpltq_m): Likewise.
7116 (vcmpneq_m): Likewise.
7117 (vcmpneq_m_n): Likewise.
7118 (vcvtbq_m): Likewise.
7119 (vcvttq_m): Likewise.
7120 (vcvtmq_m): Likewise.
7121 (vcvtnq_m): Likewise.
7122 (vcvtpq_m): Likewise.
7123 (vdupq_m_n): Likewise.
7124 (vfmaq_n): Likewise.
7126 (vfmasq_n): Likewise.
7128 (vmaxnmaq_m): Likewise.
7129 (vmaxnmavq_m): Likewise.
7130 (vmaxnmvq_m): Likewise.
7131 (vmaxnmavq_p): Likewise.
7132 (vmaxnmvq_p): Likewise.
7133 (vminnmaq_m): Likewise.
7134 (vminnmavq_p): Likewise.
7135 (vminnmvq_p): Likewise.
7136 (vrndnq_m): Likewise.
7137 (vrndaq_m): Likewise.
7138 (vrndmq_m): Likewise.
7139 (vrev64q_m): Likewise.
7140 (vrev32q_m): Likewise.
7142 (vnegq_m): Likewise.
7143 (vcmpgeq_m): Likewise.
7144 (vshrntq_n): Likewise.
7145 (vrshrntq_n): Likewise.
7146 (vmovlbq_m): Likewise.
7147 (vmovnbq_m): Likewise.
7148 (vmovntq_m): Likewise.
7149 (vmvnq_m_n): Likewise.
7150 (vmvnq_m): Likewise.
7151 (vshrnbq_n): Likewise.
7152 (vrshrnbq_n): Likewise.
7153 (vqshruntq_n): Likewise.
7154 (vrev16q_m): Likewise.
7155 (vqshrunbq_n): Likewise.
7156 (vqshrntq_n): Likewise.
7157 (vqrshruntq_n): Likewise.
7158 (vqrshrntq_n): Likewise.
7159 (vqshrnbq_n): Likewise.
7160 (vqmovuntq_m): Likewise.
7161 (vqmovntq_m): Likewise.
7162 (vqmovnbq_m): Likewise.
7163 (vorrq_m_n): Likewise.
7164 (vmovltq_m): Likewise.
7165 (vqmovunbq_m): Likewise.
7166 (vaddlvaq_p): Likewise.
7167 (vmlaldavaq): Likewise.
7168 (vmlaldavaxq): Likewise.
7169 (vmlaldavq_p): Likewise.
7170 (vmlaldavxq_p): Likewise.
7171 (vmlsldavaq): Likewise.
7172 (vmlsldavaxq): Likewise.
7173 (vmlsldavq_p): Likewise.
7174 (vmlsldavxq_p): Likewise.
7175 (vrmlaldavhaxq): Likewise.
7176 (vrmlaldavhq_p): Likewise.
7177 (vrmlaldavhxq_p): Likewise.
7178 (vrmlsldavhaq): Likewise.
7179 (vrmlsldavhaxq): Likewise.
7180 (vrmlsldavhq_p): Likewise.
7181 (vrmlsldavhxq_p): Likewise.
7182 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
7184 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
7185 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7186 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7187 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7188 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
7189 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
7190 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7191 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7192 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7193 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
7194 (MVE_pred3): Likewise.
7195 (MVE_constraint1): Likewise.
7196 (MVE_pred1): Likewise.
7197 (VMLALDAVQ_P): Define iterator.
7198 (VQMOVNBQ_M): Likewise.
7199 (VMOVLTQ_M): Likewise.
7200 (VMOVNBQ_M): Likewise.
7201 (VRSHRNTQ_N): Likewise.
7202 (VORRQ_M_N): Likewise.
7203 (VREV32Q_M): Likewise.
7204 (VREV16Q_M): Likewise.
7205 (VQRSHRNTQ_N): Likewise.
7206 (VMOVNTQ_M): Likewise.
7207 (VMOVLBQ_M): Likewise.
7208 (VMLALDAVAQ): Likewise.
7209 (VQSHRNBQ_N): Likewise.
7210 (VSHRNBQ_N): Likewise.
7211 (VRSHRNBQ_N): Likewise.
7212 (VMLALDAVXQ_P): Likewise.
7213 (VQMOVNTQ_M): Likewise.
7214 (VMVNQ_M_N): Likewise.
7215 (VQSHRNTQ_N): Likewise.
7216 (VMLALDAVAXQ): Likewise.
7217 (VSHRNTQ_N): Likewise.
7218 (VCVTMQ_M): Likewise.
7219 (VCVTNQ_M): Likewise.
7220 (VCVTPQ_M): Likewise.
7221 (VCVTQ_M_N_FROM_F): Likewise.
7222 (VCVTQ_M_FROM_F): Likewise.
7223 (VRMLALDAVHQ_P): Likewise.
7224 (VADDLVAQ_P): Likewise.
7225 (mve_vrndq_m_f<mode>): Define RTL pattern.
7226 (mve_vabsq_m_f<mode>): Likewise.
7227 (mve_vaddlvaq_p_<supf>v4si): Likewise.
7228 (mve_vcmlaq_f<mode>): Likewise.
7229 (mve_vcmlaq_rot180_f<mode>): Likewise.
7230 (mve_vcmlaq_rot270_f<mode>): Likewise.
7231 (mve_vcmlaq_rot90_f<mode>): Likewise.
7232 (mve_vcmpeqq_m_n_f<mode>): Likewise.
7233 (mve_vcmpgeq_m_f<mode>): Likewise.
7234 (mve_vcmpgeq_m_n_f<mode>): Likewise.
7235 (mve_vcmpgtq_m_f<mode>): Likewise.
7236 (mve_vcmpgtq_m_n_f<mode>): Likewise.
7237 (mve_vcmpleq_m_f<mode>): Likewise.
7238 (mve_vcmpleq_m_n_f<mode>): Likewise.
7239 (mve_vcmpltq_m_f<mode>): Likewise.
7240 (mve_vcmpltq_m_n_f<mode>): Likewise.
7241 (mve_vcmpneq_m_f<mode>): Likewise.
7242 (mve_vcmpneq_m_n_f<mode>): Likewise.
7243 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
7244 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
7245 (mve_vcvttq_m_f16_f32v8hf): Likewise.
7246 (mve_vcvttq_m_f32_f16v4sf): Likewise.
7247 (mve_vdupq_m_n_f<mode>): Likewise.
7248 (mve_vfmaq_f<mode>): Likewise.
7249 (mve_vfmaq_n_f<mode>): Likewise.
7250 (mve_vfmasq_n_f<mode>): Likewise.
7251 (mve_vfmsq_f<mode>): Likewise.
7252 (mve_vmaxnmaq_m_f<mode>): Likewise.
7253 (mve_vmaxnmavq_p_f<mode>): Likewise.
7254 (mve_vmaxnmvq_p_f<mode>): Likewise.
7255 (mve_vminnmaq_m_f<mode>): Likewise.
7256 (mve_vminnmavq_p_f<mode>): Likewise.
7257 (mve_vminnmvq_p_f<mode>): Likewise.
7258 (mve_vmlaldavaq_<supf><mode>): Likewise.
7259 (mve_vmlaldavaxq_<supf><mode>): Likewise.
7260 (mve_vmlaldavq_p_<supf><mode>): Likewise.
7261 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
7262 (mve_vmlsldavaq_s<mode>): Likewise.
7263 (mve_vmlsldavaxq_s<mode>): Likewise.
7264 (mve_vmlsldavq_p_s<mode>): Likewise.
7265 (mve_vmlsldavxq_p_s<mode>): Likewise.
7266 (mve_vmovlbq_m_<supf><mode>): Likewise.
7267 (mve_vmovltq_m_<supf><mode>): Likewise.
7268 (mve_vmovnbq_m_<supf><mode>): Likewise.
7269 (mve_vmovntq_m_<supf><mode>): Likewise.
7270 (mve_vmvnq_m_n_<supf><mode>): Likewise.
7271 (mve_vnegq_m_f<mode>): Likewise.
7272 (mve_vorrq_m_n_<supf><mode>): Likewise.
7273 (mve_vpselq_f<mode>): Likewise.
7274 (mve_vqmovnbq_m_<supf><mode>): Likewise.
7275 (mve_vqmovntq_m_<supf><mode>): Likewise.
7276 (mve_vqmovunbq_m_s<mode>): Likewise.
7277 (mve_vqmovuntq_m_s<mode>): Likewise.
7278 (mve_vqrshrntq_n_<supf><mode>): Likewise.
7279 (mve_vqrshruntq_n_s<mode>): Likewise.
7280 (mve_vqshrnbq_n_<supf><mode>): Likewise.
7281 (mve_vqshrntq_n_<supf><mode>): Likewise.
7282 (mve_vqshrunbq_n_s<mode>): Likewise.
7283 (mve_vqshruntq_n_s<mode>): Likewise.
7284 (mve_vrev32q_m_fv8hf): Likewise.
7285 (mve_vrev32q_m_<supf><mode>): Likewise.
7286 (mve_vrev64q_m_f<mode>): Likewise.
7287 (mve_vrmlaldavhaxq_sv4si): Likewise.
7288 (mve_vrmlaldavhxq_p_sv4si): Likewise.
7289 (mve_vrmlsldavhaxq_sv4si): Likewise.
7290 (mve_vrmlsldavhq_p_sv4si): Likewise.
7291 (mve_vrmlsldavhxq_p_sv4si): Likewise.
7292 (mve_vrndaq_m_f<mode>): Likewise.
7293 (mve_vrndmq_m_f<mode>): Likewise.
7294 (mve_vrndnq_m_f<mode>): Likewise.
7295 (mve_vrndpq_m_f<mode>): Likewise.
7296 (mve_vrndxq_m_f<mode>): Likewise.
7297 (mve_vrshrnbq_n_<supf><mode>): Likewise.
7298 (mve_vrshrntq_n_<supf><mode>): Likewise.
7299 (mve_vshrnbq_n_<supf><mode>): Likewise.
7300 (mve_vshrntq_n_<supf><mode>): Likewise.
7301 (mve_vcvtmq_m_<supf><mode>): Likewise.
7302 (mve_vcvtpq_m_<supf><mode>): Likewise.
7303 (mve_vcvtnq_m_<supf><mode>): Likewise.
7304 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
7305 (mve_vrev16q_m_<supf>v16qi): Likewise.
7306 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
7307 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
7308 (mve_vrmlsldavhaq_sv4si): Likewise.
7310 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7311 Mihail Ionescu <mihail.ionescu@arm.com>
7312 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7314 * config/arm/arm_mve.h (vpselq_u8): Define macro.
7315 (vpselq_s8): Likewise.
7316 (vrev64q_m_u8): Likewise.
7317 (vqrdmlashq_n_u8): Likewise.
7318 (vqrdmlahq_n_u8): Likewise.
7319 (vqdmlahq_n_u8): Likewise.
7320 (vmvnq_m_u8): Likewise.
7321 (vmlasq_n_u8): Likewise.
7322 (vmlaq_n_u8): Likewise.
7323 (vmladavq_p_u8): Likewise.
7324 (vmladavaq_u8): Likewise.
7325 (vminvq_p_u8): Likewise.
7326 (vmaxvq_p_u8): Likewise.
7327 (vdupq_m_n_u8): Likewise.
7328 (vcmpneq_m_u8): Likewise.
7329 (vcmpneq_m_n_u8): Likewise.
7330 (vcmphiq_m_u8): Likewise.
7331 (vcmphiq_m_n_u8): Likewise.
7332 (vcmpeqq_m_u8): Likewise.
7333 (vcmpeqq_m_n_u8): Likewise.
7334 (vcmpcsq_m_u8): Likewise.
7335 (vcmpcsq_m_n_u8): Likewise.
7336 (vclzq_m_u8): Likewise.
7337 (vaddvaq_p_u8): Likewise.
7338 (vsriq_n_u8): Likewise.
7339 (vsliq_n_u8): Likewise.
7340 (vshlq_m_r_u8): Likewise.
7341 (vrshlq_m_n_u8): Likewise.
7342 (vqshlq_m_r_u8): Likewise.
7343 (vqrshlq_m_n_u8): Likewise.
7344 (vminavq_p_s8): Likewise.
7345 (vminaq_m_s8): Likewise.
7346 (vmaxavq_p_s8): Likewise.
7347 (vmaxaq_m_s8): Likewise.
7348 (vcmpneq_m_s8): Likewise.
7349 (vcmpneq_m_n_s8): Likewise.
7350 (vcmpltq_m_s8): Likewise.
7351 (vcmpltq_m_n_s8): Likewise.
7352 (vcmpleq_m_s8): Likewise.
7353 (vcmpleq_m_n_s8): Likewise.
7354 (vcmpgtq_m_s8): Likewise.
7355 (vcmpgtq_m_n_s8): Likewise.
7356 (vcmpgeq_m_s8): Likewise.
7357 (vcmpgeq_m_n_s8): Likewise.
7358 (vcmpeqq_m_s8): Likewise.
7359 (vcmpeqq_m_n_s8): Likewise.
7360 (vshlq_m_r_s8): Likewise.
7361 (vrshlq_m_n_s8): Likewise.
7362 (vrev64q_m_s8): Likewise.
7363 (vqshlq_m_r_s8): Likewise.
7364 (vqrshlq_m_n_s8): Likewise.
7365 (vqnegq_m_s8): Likewise.
7366 (vqabsq_m_s8): Likewise.
7367 (vnegq_m_s8): Likewise.
7368 (vmvnq_m_s8): Likewise.
7369 (vmlsdavxq_p_s8): Likewise.
7370 (vmlsdavq_p_s8): Likewise.
7371 (vmladavxq_p_s8): Likewise.
7372 (vmladavq_p_s8): Likewise.
7373 (vminvq_p_s8): Likewise.
7374 (vmaxvq_p_s8): Likewise.
7375 (vdupq_m_n_s8): Likewise.
7376 (vclzq_m_s8): Likewise.
7377 (vclsq_m_s8): Likewise.
7378 (vaddvaq_p_s8): Likewise.
7379 (vabsq_m_s8): Likewise.
7380 (vqrdmlsdhxq_s8): Likewise.
7381 (vqrdmlsdhq_s8): Likewise.
7382 (vqrdmlashq_n_s8): Likewise.
7383 (vqrdmlahq_n_s8): Likewise.
7384 (vqrdmladhxq_s8): Likewise.
7385 (vqrdmladhq_s8): Likewise.
7386 (vqdmlsdhxq_s8): Likewise.
7387 (vqdmlsdhq_s8): Likewise.
7388 (vqdmlahq_n_s8): Likewise.
7389 (vqdmladhxq_s8): Likewise.
7390 (vqdmladhq_s8): Likewise.
7391 (vmlsdavaxq_s8): Likewise.
7392 (vmlsdavaq_s8): Likewise.
7393 (vmlasq_n_s8): Likewise.
7394 (vmlaq_n_s8): Likewise.
7395 (vmladavaxq_s8): Likewise.
7396 (vmladavaq_s8): Likewise.
7397 (vsriq_n_s8): Likewise.
7398 (vsliq_n_s8): Likewise.
7399 (vpselq_u16): Likewise.
7400 (vpselq_s16): Likewise.
7401 (vrev64q_m_u16): Likewise.
7402 (vqrdmlashq_n_u16): Likewise.
7403 (vqrdmlahq_n_u16): Likewise.
7404 (vqdmlahq_n_u16): Likewise.
7405 (vmvnq_m_u16): Likewise.
7406 (vmlasq_n_u16): Likewise.
7407 (vmlaq_n_u16): Likewise.
7408 (vmladavq_p_u16): Likewise.
7409 (vmladavaq_u16): Likewise.
7410 (vminvq_p_u16): Likewise.
7411 (vmaxvq_p_u16): Likewise.
7412 (vdupq_m_n_u16): Likewise.
7413 (vcmpneq_m_u16): Likewise.
7414 (vcmpneq_m_n_u16): Likewise.
7415 (vcmphiq_m_u16): Likewise.
7416 (vcmphiq_m_n_u16): Likewise.
7417 (vcmpeqq_m_u16): Likewise.
7418 (vcmpeqq_m_n_u16): Likewise.
7419 (vcmpcsq_m_u16): Likewise.
7420 (vcmpcsq_m_n_u16): Likewise.
7421 (vclzq_m_u16): Likewise.
7422 (vaddvaq_p_u16): Likewise.
7423 (vsriq_n_u16): Likewise.
7424 (vsliq_n_u16): Likewise.
7425 (vshlq_m_r_u16): Likewise.
7426 (vrshlq_m_n_u16): Likewise.
7427 (vqshlq_m_r_u16): Likewise.
7428 (vqrshlq_m_n_u16): Likewise.
7429 (vminavq_p_s16): Likewise.
7430 (vminaq_m_s16): Likewise.
7431 (vmaxavq_p_s16): Likewise.
7432 (vmaxaq_m_s16): Likewise.
7433 (vcmpneq_m_s16): Likewise.
7434 (vcmpneq_m_n_s16): Likewise.
7435 (vcmpltq_m_s16): Likewise.
7436 (vcmpltq_m_n_s16): Likewise.
7437 (vcmpleq_m_s16): Likewise.
7438 (vcmpleq_m_n_s16): Likewise.
7439 (vcmpgtq_m_s16): Likewise.
7440 (vcmpgtq_m_n_s16): Likewise.
7441 (vcmpgeq_m_s16): Likewise.
7442 (vcmpgeq_m_n_s16): Likewise.
7443 (vcmpeqq_m_s16): Likewise.
7444 (vcmpeqq_m_n_s16): Likewise.
7445 (vshlq_m_r_s16): Likewise.
7446 (vrshlq_m_n_s16): Likewise.
7447 (vrev64q_m_s16): Likewise.
7448 (vqshlq_m_r_s16): Likewise.
7449 (vqrshlq_m_n_s16): Likewise.
7450 (vqnegq_m_s16): Likewise.
7451 (vqabsq_m_s16): Likewise.
7452 (vnegq_m_s16): Likewise.
7453 (vmvnq_m_s16): Likewise.
7454 (vmlsdavxq_p_s16): Likewise.
7455 (vmlsdavq_p_s16): Likewise.
7456 (vmladavxq_p_s16): Likewise.
7457 (vmladavq_p_s16): Likewise.
7458 (vminvq_p_s16): Likewise.
7459 (vmaxvq_p_s16): Likewise.
7460 (vdupq_m_n_s16): Likewise.
7461 (vclzq_m_s16): Likewise.
7462 (vclsq_m_s16): Likewise.
7463 (vaddvaq_p_s16): Likewise.
7464 (vabsq_m_s16): Likewise.
7465 (vqrdmlsdhxq_s16): Likewise.
7466 (vqrdmlsdhq_s16): Likewise.
7467 (vqrdmlashq_n_s16): Likewise.
7468 (vqrdmlahq_n_s16): Likewise.
7469 (vqrdmladhxq_s16): Likewise.
7470 (vqrdmladhq_s16): Likewise.
7471 (vqdmlsdhxq_s16): Likewise.
7472 (vqdmlsdhq_s16): Likewise.
7473 (vqdmlahq_n_s16): Likewise.
7474 (vqdmladhxq_s16): Likewise.
7475 (vqdmladhq_s16): Likewise.
7476 (vmlsdavaxq_s16): Likewise.
7477 (vmlsdavaq_s16): Likewise.
7478 (vmlasq_n_s16): Likewise.
7479 (vmlaq_n_s16): Likewise.
7480 (vmladavaxq_s16): Likewise.
7481 (vmladavaq_s16): Likewise.
7482 (vsriq_n_s16): Likewise.
7483 (vsliq_n_s16): Likewise.
7484 (vpselq_u32): Likewise.
7485 (vpselq_s32): Likewise.
7486 (vrev64q_m_u32): Likewise.
7487 (vqrdmlashq_n_u32): Likewise.
7488 (vqrdmlahq_n_u32): Likewise.
7489 (vqdmlahq_n_u32): Likewise.
7490 (vmvnq_m_u32): Likewise.
7491 (vmlasq_n_u32): Likewise.
7492 (vmlaq_n_u32): Likewise.
7493 (vmladavq_p_u32): Likewise.
7494 (vmladavaq_u32): Likewise.
7495 (vminvq_p_u32): Likewise.
7496 (vmaxvq_p_u32): Likewise.
7497 (vdupq_m_n_u32): Likewise.
7498 (vcmpneq_m_u32): Likewise.
7499 (vcmpneq_m_n_u32): Likewise.
7500 (vcmphiq_m_u32): Likewise.
7501 (vcmphiq_m_n_u32): Likewise.
7502 (vcmpeqq_m_u32): Likewise.
7503 (vcmpeqq_m_n_u32): Likewise.
7504 (vcmpcsq_m_u32): Likewise.
7505 (vcmpcsq_m_n_u32): Likewise.
7506 (vclzq_m_u32): Likewise.
7507 (vaddvaq_p_u32): Likewise.
7508 (vsriq_n_u32): Likewise.
7509 (vsliq_n_u32): Likewise.
7510 (vshlq_m_r_u32): Likewise.
7511 (vrshlq_m_n_u32): Likewise.
7512 (vqshlq_m_r_u32): Likewise.
7513 (vqrshlq_m_n_u32): Likewise.
7514 (vminavq_p_s32): Likewise.
7515 (vminaq_m_s32): Likewise.
7516 (vmaxavq_p_s32): Likewise.
7517 (vmaxaq_m_s32): Likewise.
7518 (vcmpneq_m_s32): Likewise.
7519 (vcmpneq_m_n_s32): Likewise.
7520 (vcmpltq_m_s32): Likewise.
7521 (vcmpltq_m_n_s32): Likewise.
7522 (vcmpleq_m_s32): Likewise.
7523 (vcmpleq_m_n_s32): Likewise.
7524 (vcmpgtq_m_s32): Likewise.
7525 (vcmpgtq_m_n_s32): Likewise.
7526 (vcmpgeq_m_s32): Likewise.
7527 (vcmpgeq_m_n_s32): Likewise.
7528 (vcmpeqq_m_s32): Likewise.
7529 (vcmpeqq_m_n_s32): Likewise.
7530 (vshlq_m_r_s32): Likewise.
7531 (vrshlq_m_n_s32): Likewise.
7532 (vrev64q_m_s32): Likewise.
7533 (vqshlq_m_r_s32): Likewise.
7534 (vqrshlq_m_n_s32): Likewise.
7535 (vqnegq_m_s32): Likewise.
7536 (vqabsq_m_s32): Likewise.
7537 (vnegq_m_s32): Likewise.
7538 (vmvnq_m_s32): Likewise.
7539 (vmlsdavxq_p_s32): Likewise.
7540 (vmlsdavq_p_s32): Likewise.
7541 (vmladavxq_p_s32): Likewise.
7542 (vmladavq_p_s32): Likewise.
7543 (vminvq_p_s32): Likewise.
7544 (vmaxvq_p_s32): Likewise.
7545 (vdupq_m_n_s32): Likewise.
7546 (vclzq_m_s32): Likewise.
7547 (vclsq_m_s32): Likewise.
7548 (vaddvaq_p_s32): Likewise.
7549 (vabsq_m_s32): Likewise.
7550 (vqrdmlsdhxq_s32): Likewise.
7551 (vqrdmlsdhq_s32): Likewise.
7552 (vqrdmlashq_n_s32): Likewise.
7553 (vqrdmlahq_n_s32): Likewise.
7554 (vqrdmladhxq_s32): Likewise.
7555 (vqrdmladhq_s32): Likewise.
7556 (vqdmlsdhxq_s32): Likewise.
7557 (vqdmlsdhq_s32): Likewise.
7558 (vqdmlahq_n_s32): Likewise.
7559 (vqdmladhxq_s32): Likewise.
7560 (vqdmladhq_s32): Likewise.
7561 (vmlsdavaxq_s32): Likewise.
7562 (vmlsdavaq_s32): Likewise.
7563 (vmlasq_n_s32): Likewise.
7564 (vmlaq_n_s32): Likewise.
7565 (vmladavaxq_s32): Likewise.
7566 (vmladavaq_s32): Likewise.
7567 (vsriq_n_s32): Likewise.
7568 (vsliq_n_s32): Likewise.
7569 (vpselq_u64): Likewise.
7570 (vpselq_s64): Likewise.
7571 (__arm_vpselq_u8): Define intrinsic.
7572 (__arm_vpselq_s8): Likewise.
7573 (__arm_vrev64q_m_u8): Likewise.
7574 (__arm_vqrdmlashq_n_u8): Likewise.
7575 (__arm_vqrdmlahq_n_u8): Likewise.
7576 (__arm_vqdmlahq_n_u8): Likewise.
7577 (__arm_vmvnq_m_u8): Likewise.
7578 (__arm_vmlasq_n_u8): Likewise.
7579 (__arm_vmlaq_n_u8): Likewise.
7580 (__arm_vmladavq_p_u8): Likewise.
7581 (__arm_vmladavaq_u8): Likewise.
7582 (__arm_vminvq_p_u8): Likewise.
7583 (__arm_vmaxvq_p_u8): Likewise.
7584 (__arm_vdupq_m_n_u8): Likewise.
7585 (__arm_vcmpneq_m_u8): Likewise.
7586 (__arm_vcmpneq_m_n_u8): Likewise.
7587 (__arm_vcmphiq_m_u8): Likewise.
7588 (__arm_vcmphiq_m_n_u8): Likewise.
7589 (__arm_vcmpeqq_m_u8): Likewise.
7590 (__arm_vcmpeqq_m_n_u8): Likewise.
7591 (__arm_vcmpcsq_m_u8): Likewise.
7592 (__arm_vcmpcsq_m_n_u8): Likewise.
7593 (__arm_vclzq_m_u8): Likewise.
7594 (__arm_vaddvaq_p_u8): Likewise.
7595 (__arm_vsriq_n_u8): Likewise.
7596 (__arm_vsliq_n_u8): Likewise.
7597 (__arm_vshlq_m_r_u8): Likewise.
7598 (__arm_vrshlq_m_n_u8): Likewise.
7599 (__arm_vqshlq_m_r_u8): Likewise.
7600 (__arm_vqrshlq_m_n_u8): Likewise.
7601 (__arm_vminavq_p_s8): Likewise.
7602 (__arm_vminaq_m_s8): Likewise.
7603 (__arm_vmaxavq_p_s8): Likewise.
7604 (__arm_vmaxaq_m_s8): Likewise.
7605 (__arm_vcmpneq_m_s8): Likewise.
7606 (__arm_vcmpneq_m_n_s8): Likewise.
7607 (__arm_vcmpltq_m_s8): Likewise.
7608 (__arm_vcmpltq_m_n_s8): Likewise.
7609 (__arm_vcmpleq_m_s8): Likewise.
7610 (__arm_vcmpleq_m_n_s8): Likewise.
7611 (__arm_vcmpgtq_m_s8): Likewise.
7612 (__arm_vcmpgtq_m_n_s8): Likewise.
7613 (__arm_vcmpgeq_m_s8): Likewise.
7614 (__arm_vcmpgeq_m_n_s8): Likewise.
7615 (__arm_vcmpeqq_m_s8): Likewise.
7616 (__arm_vcmpeqq_m_n_s8): Likewise.
7617 (__arm_vshlq_m_r_s8): Likewise.
7618 (__arm_vrshlq_m_n_s8): Likewise.
7619 (__arm_vrev64q_m_s8): Likewise.
7620 (__arm_vqshlq_m_r_s8): Likewise.
7621 (__arm_vqrshlq_m_n_s8): Likewise.
7622 (__arm_vqnegq_m_s8): Likewise.
7623 (__arm_vqabsq_m_s8): Likewise.
7624 (__arm_vnegq_m_s8): Likewise.
7625 (__arm_vmvnq_m_s8): Likewise.
7626 (__arm_vmlsdavxq_p_s8): Likewise.
7627 (__arm_vmlsdavq_p_s8): Likewise.
7628 (__arm_vmladavxq_p_s8): Likewise.
7629 (__arm_vmladavq_p_s8): Likewise.
7630 (__arm_vminvq_p_s8): Likewise.
7631 (__arm_vmaxvq_p_s8): Likewise.
7632 (__arm_vdupq_m_n_s8): Likewise.
7633 (__arm_vclzq_m_s8): Likewise.
7634 (__arm_vclsq_m_s8): Likewise.
7635 (__arm_vaddvaq_p_s8): Likewise.
7636 (__arm_vabsq_m_s8): Likewise.
7637 (__arm_vqrdmlsdhxq_s8): Likewise.
7638 (__arm_vqrdmlsdhq_s8): Likewise.
7639 (__arm_vqrdmlashq_n_s8): Likewise.
7640 (__arm_vqrdmlahq_n_s8): Likewise.
7641 (__arm_vqrdmladhxq_s8): Likewise.
7642 (__arm_vqrdmladhq_s8): Likewise.
7643 (__arm_vqdmlsdhxq_s8): Likewise.
7644 (__arm_vqdmlsdhq_s8): Likewise.
7645 (__arm_vqdmlahq_n_s8): Likewise.
7646 (__arm_vqdmladhxq_s8): Likewise.
7647 (__arm_vqdmladhq_s8): Likewise.
7648 (__arm_vmlsdavaxq_s8): Likewise.
7649 (__arm_vmlsdavaq_s8): Likewise.
7650 (__arm_vmlasq_n_s8): Likewise.
7651 (__arm_vmlaq_n_s8): Likewise.
7652 (__arm_vmladavaxq_s8): Likewise.
7653 (__arm_vmladavaq_s8): Likewise.
7654 (__arm_vsriq_n_s8): Likewise.
7655 (__arm_vsliq_n_s8): Likewise.
7656 (__arm_vpselq_u16): Likewise.
7657 (__arm_vpselq_s16): Likewise.
7658 (__arm_vrev64q_m_u16): Likewise.
7659 (__arm_vqrdmlashq_n_u16): Likewise.
7660 (__arm_vqrdmlahq_n_u16): Likewise.
7661 (__arm_vqdmlahq_n_u16): Likewise.
7662 (__arm_vmvnq_m_u16): Likewise.
7663 (__arm_vmlasq_n_u16): Likewise.
7664 (__arm_vmlaq_n_u16): Likewise.
7665 (__arm_vmladavq_p_u16): Likewise.
7666 (__arm_vmladavaq_u16): Likewise.
7667 (__arm_vminvq_p_u16): Likewise.
7668 (__arm_vmaxvq_p_u16): Likewise.
7669 (__arm_vdupq_m_n_u16): Likewise.
7670 (__arm_vcmpneq_m_u16): Likewise.
7671 (__arm_vcmpneq_m_n_u16): Likewise.
7672 (__arm_vcmphiq_m_u16): Likewise.
7673 (__arm_vcmphiq_m_n_u16): Likewise.
7674 (__arm_vcmpeqq_m_u16): Likewise.
7675 (__arm_vcmpeqq_m_n_u16): Likewise.
7676 (__arm_vcmpcsq_m_u16): Likewise.
7677 (__arm_vcmpcsq_m_n_u16): Likewise.
7678 (__arm_vclzq_m_u16): Likewise.
7679 (__arm_vaddvaq_p_u16): Likewise.
7680 (__arm_vsriq_n_u16): Likewise.
7681 (__arm_vsliq_n_u16): Likewise.
7682 (__arm_vshlq_m_r_u16): Likewise.
7683 (__arm_vrshlq_m_n_u16): Likewise.
7684 (__arm_vqshlq_m_r_u16): Likewise.
7685 (__arm_vqrshlq_m_n_u16): Likewise.
7686 (__arm_vminavq_p_s16): Likewise.
7687 (__arm_vminaq_m_s16): Likewise.
7688 (__arm_vmaxavq_p_s16): Likewise.
7689 (__arm_vmaxaq_m_s16): Likewise.
7690 (__arm_vcmpneq_m_s16): Likewise.
7691 (__arm_vcmpneq_m_n_s16): Likewise.
7692 (__arm_vcmpltq_m_s16): Likewise.
7693 (__arm_vcmpltq_m_n_s16): Likewise.
7694 (__arm_vcmpleq_m_s16): Likewise.
7695 (__arm_vcmpleq_m_n_s16): Likewise.
7696 (__arm_vcmpgtq_m_s16): Likewise.
7697 (__arm_vcmpgtq_m_n_s16): Likewise.
7698 (__arm_vcmpgeq_m_s16): Likewise.
7699 (__arm_vcmpgeq_m_n_s16): Likewise.
7700 (__arm_vcmpeqq_m_s16): Likewise.
7701 (__arm_vcmpeqq_m_n_s16): Likewise.
7702 (__arm_vshlq_m_r_s16): Likewise.
7703 (__arm_vrshlq_m_n_s16): Likewise.
7704 (__arm_vrev64q_m_s16): Likewise.
7705 (__arm_vqshlq_m_r_s16): Likewise.
7706 (__arm_vqrshlq_m_n_s16): Likewise.
7707 (__arm_vqnegq_m_s16): Likewise.
7708 (__arm_vqabsq_m_s16): Likewise.
7709 (__arm_vnegq_m_s16): Likewise.
7710 (__arm_vmvnq_m_s16): Likewise.
7711 (__arm_vmlsdavxq_p_s16): Likewise.
7712 (__arm_vmlsdavq_p_s16): Likewise.
7713 (__arm_vmladavxq_p_s16): Likewise.
7714 (__arm_vmladavq_p_s16): Likewise.
7715 (__arm_vminvq_p_s16): Likewise.
7716 (__arm_vmaxvq_p_s16): Likewise.
7717 (__arm_vdupq_m_n_s16): Likewise.
7718 (__arm_vclzq_m_s16): Likewise.
7719 (__arm_vclsq_m_s16): Likewise.
7720 (__arm_vaddvaq_p_s16): Likewise.
7721 (__arm_vabsq_m_s16): Likewise.
7722 (__arm_vqrdmlsdhxq_s16): Likewise.
7723 (__arm_vqrdmlsdhq_s16): Likewise.
7724 (__arm_vqrdmlashq_n_s16): Likewise.
7725 (__arm_vqrdmlahq_n_s16): Likewise.
7726 (__arm_vqrdmladhxq_s16): Likewise.
7727 (__arm_vqrdmladhq_s16): Likewise.
7728 (__arm_vqdmlsdhxq_s16): Likewise.
7729 (__arm_vqdmlsdhq_s16): Likewise.
7730 (__arm_vqdmlahq_n_s16): Likewise.
7731 (__arm_vqdmladhxq_s16): Likewise.
7732 (__arm_vqdmladhq_s16): Likewise.
7733 (__arm_vmlsdavaxq_s16): Likewise.
7734 (__arm_vmlsdavaq_s16): Likewise.
7735 (__arm_vmlasq_n_s16): Likewise.
7736 (__arm_vmlaq_n_s16): Likewise.
7737 (__arm_vmladavaxq_s16): Likewise.
7738 (__arm_vmladavaq_s16): Likewise.
7739 (__arm_vsriq_n_s16): Likewise.
7740 (__arm_vsliq_n_s16): Likewise.
7741 (__arm_vpselq_u32): Likewise.
7742 (__arm_vpselq_s32): Likewise.
7743 (__arm_vrev64q_m_u32): Likewise.
7744 (__arm_vqrdmlashq_n_u32): Likewise.
7745 (__arm_vqrdmlahq_n_u32): Likewise.
7746 (__arm_vqdmlahq_n_u32): Likewise.
7747 (__arm_vmvnq_m_u32): Likewise.
7748 (__arm_vmlasq_n_u32): Likewise.
7749 (__arm_vmlaq_n_u32): Likewise.
7750 (__arm_vmladavq_p_u32): Likewise.
7751 (__arm_vmladavaq_u32): Likewise.
7752 (__arm_vminvq_p_u32): Likewise.
7753 (__arm_vmaxvq_p_u32): Likewise.
7754 (__arm_vdupq_m_n_u32): Likewise.
7755 (__arm_vcmpneq_m_u32): Likewise.
7756 (__arm_vcmpneq_m_n_u32): Likewise.
7757 (__arm_vcmphiq_m_u32): Likewise.
7758 (__arm_vcmphiq_m_n_u32): Likewise.
7759 (__arm_vcmpeqq_m_u32): Likewise.
7760 (__arm_vcmpeqq_m_n_u32): Likewise.
7761 (__arm_vcmpcsq_m_u32): Likewise.
7762 (__arm_vcmpcsq_m_n_u32): Likewise.
7763 (__arm_vclzq_m_u32): Likewise.
7764 (__arm_vaddvaq_p_u32): Likewise.
7765 (__arm_vsriq_n_u32): Likewise.
7766 (__arm_vsliq_n_u32): Likewise.
7767 (__arm_vshlq_m_r_u32): Likewise.
7768 (__arm_vrshlq_m_n_u32): Likewise.
7769 (__arm_vqshlq_m_r_u32): Likewise.
7770 (__arm_vqrshlq_m_n_u32): Likewise.
7771 (__arm_vminavq_p_s32): Likewise.
7772 (__arm_vminaq_m_s32): Likewise.
7773 (__arm_vmaxavq_p_s32): Likewise.
7774 (__arm_vmaxaq_m_s32): Likewise.
7775 (__arm_vcmpneq_m_s32): Likewise.
7776 (__arm_vcmpneq_m_n_s32): Likewise.
7777 (__arm_vcmpltq_m_s32): Likewise.
7778 (__arm_vcmpltq_m_n_s32): Likewise.
7779 (__arm_vcmpleq_m_s32): Likewise.
7780 (__arm_vcmpleq_m_n_s32): Likewise.
7781 (__arm_vcmpgtq_m_s32): Likewise.
7782 (__arm_vcmpgtq_m_n_s32): Likewise.
7783 (__arm_vcmpgeq_m_s32): Likewise.
7784 (__arm_vcmpgeq_m_n_s32): Likewise.
7785 (__arm_vcmpeqq_m_s32): Likewise.
7786 (__arm_vcmpeqq_m_n_s32): Likewise.
7787 (__arm_vshlq_m_r_s32): Likewise.
7788 (__arm_vrshlq_m_n_s32): Likewise.
7789 (__arm_vrev64q_m_s32): Likewise.
7790 (__arm_vqshlq_m_r_s32): Likewise.
7791 (__arm_vqrshlq_m_n_s32): Likewise.
7792 (__arm_vqnegq_m_s32): Likewise.
7793 (__arm_vqabsq_m_s32): Likewise.
7794 (__arm_vnegq_m_s32): Likewise.
7795 (__arm_vmvnq_m_s32): Likewise.
7796 (__arm_vmlsdavxq_p_s32): Likewise.
7797 (__arm_vmlsdavq_p_s32): Likewise.
7798 (__arm_vmladavxq_p_s32): Likewise.
7799 (__arm_vmladavq_p_s32): Likewise.
7800 (__arm_vminvq_p_s32): Likewise.
7801 (__arm_vmaxvq_p_s32): Likewise.
7802 (__arm_vdupq_m_n_s32): Likewise.
7803 (__arm_vclzq_m_s32): Likewise.
7804 (__arm_vclsq_m_s32): Likewise.
7805 (__arm_vaddvaq_p_s32): Likewise.
7806 (__arm_vabsq_m_s32): Likewise.
7807 (__arm_vqrdmlsdhxq_s32): Likewise.
7808 (__arm_vqrdmlsdhq_s32): Likewise.
7809 (__arm_vqrdmlashq_n_s32): Likewise.
7810 (__arm_vqrdmlahq_n_s32): Likewise.
7811 (__arm_vqrdmladhxq_s32): Likewise.
7812 (__arm_vqrdmladhq_s32): Likewise.
7813 (__arm_vqdmlsdhxq_s32): Likewise.
7814 (__arm_vqdmlsdhq_s32): Likewise.
7815 (__arm_vqdmlahq_n_s32): Likewise.
7816 (__arm_vqdmladhxq_s32): Likewise.
7817 (__arm_vqdmladhq_s32): Likewise.
7818 (__arm_vmlsdavaxq_s32): Likewise.
7819 (__arm_vmlsdavaq_s32): Likewise.
7820 (__arm_vmlasq_n_s32): Likewise.
7821 (__arm_vmlaq_n_s32): Likewise.
7822 (__arm_vmladavaxq_s32): Likewise.
7823 (__arm_vmladavaq_s32): Likewise.
7824 (__arm_vsriq_n_s32): Likewise.
7825 (__arm_vsliq_n_s32): Likewise.
7826 (__arm_vpselq_u64): Likewise.
7827 (__arm_vpselq_s64): Likewise.
7828 (vcmpneq_m_n): Define polymorphic variant.
7829 (vcmpneq_m): Likewise.
7830 (vqrdmlsdhq): Likewise.
7831 (vqrdmlsdhxq): Likewise.
7832 (vqrshlq_m_n): Likewise.
7833 (vqshlq_m_r): Likewise.
7834 (vrev64q_m): Likewise.
7835 (vrshlq_m_n): Likewise.
7836 (vshlq_m_r): Likewise.
7837 (vsliq_n): Likewise.
7838 (vsriq_n): Likewise.
7839 (vqrdmlashq_n): Likewise.
7840 (vqrdmlahq): Likewise.
7841 (vqrdmladhxq): Likewise.
7842 (vqrdmladhq): Likewise.
7843 (vqnegq_m): Likewise.
7844 (vqdmlsdhxq): Likewise.
7845 (vabsq_m): Likewise.
7846 (vclsq_m): Likewise.
7847 (vclzq_m): Likewise.
7848 (vcmpgeq_m): Likewise.
7849 (vcmpgeq_m_n): Likewise.
7850 (vdupq_m_n): Likewise.
7851 (vmaxaq_m): Likewise.
7852 (vmlaq_n): Likewise.
7853 (vmlasq_n): Likewise.
7854 (vmvnq_m): Likewise.
7855 (vnegq_m): Likewise.
7857 (vqdmlahq_n): Likewise.
7858 (vqrdmlahq_n): Likewise.
7859 (vqdmlsdhq): Likewise.
7860 (vqdmladhq): Likewise.
7861 (vqabsq_m): Likewise.
7862 (vminaq_m): Likewise.
7863 (vrmlaldavhaq): Likewise.
7864 (vmlsdavxq_p): Likewise.
7865 (vmlsdavq_p): Likewise.
7866 (vmlsdavaxq): Likewise.
7867 (vmlsdavaq): Likewise.
7868 (vaddvaq_p): Likewise.
7869 (vcmpcsq_m_n): Likewise.
7870 (vcmpcsq_m): Likewise.
7871 (vcmpeqq_m_n): Likewise.
7872 (vcmpeqq_m): Likewise.
7873 (vmladavxq_p): Likewise.
7874 (vmladavq_p): Likewise.
7875 (vmladavaxq): Likewise.
7876 (vmladavaq): Likewise.
7877 (vminvq_p): Likewise.
7878 (vminavq_p): Likewise.
7879 (vmaxvq_p): Likewise.
7880 (vmaxavq_p): Likewise.
7881 (vcmpltq_m_n): Likewise.
7882 (vcmpltq_m): Likewise.
7883 (vcmpleq_m): Likewise.
7884 (vcmpleq_m_n): Likewise.
7885 (vcmphiq_m_n): Likewise.
7886 (vcmphiq_m): Likewise.
7887 (vcmpgtq_m_n): Likewise.
7888 (vcmpgtq_m): Likewise.
7889 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
7891 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
7892 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
7893 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
7894 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
7895 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
7896 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
7897 * config/arm/constraints.md (Rc): Define constraint to check constant is
7898 in the range of 0 to 15.
7899 (Re): Define constraint to check constant is in the range of 0 to 31.
7900 * config/arm/mve.md (VADDVAQ_P): Define iterator.
7901 (VCLZQ_M): Likewise.
7902 (VCMPEQQ_M_N): Likewise.
7903 (VCMPEQQ_M): Likewise.
7904 (VCMPNEQ_M_N): Likewise.
7905 (VCMPNEQ_M): Likewise.
7906 (VDUPQ_M_N): Likewise.
7907 (VMAXVQ_P): Likewise.
7908 (VMINVQ_P): Likewise.
7909 (VMLADAVAQ): Likewise.
7910 (VMLADAVQ_P): Likewise.
7911 (VMLAQ_N): Likewise.
7912 (VMLASQ_N): Likewise.
7913 (VMVNQ_M): Likewise.
7915 (VQDMLAHQ_N): Likewise.
7916 (VQRDMLAHQ_N): Likewise.
7917 (VQRDMLASHQ_N): Likewise.
7918 (VQRSHLQ_M_N): Likewise.
7919 (VQSHLQ_M_R): Likewise.
7920 (VREV64Q_M): Likewise.
7921 (VRSHLQ_M_N): Likewise.
7922 (VSHLQ_M_R): Likewise.
7923 (VSLIQ_N): Likewise.
7924 (VSRIQ_N): Likewise.
7925 (mve_vabsq_m_s<mode>): Define RTL pattern.
7926 (mve_vaddvaq_p_<supf><mode>): Likewise.
7927 (mve_vclsq_m_s<mode>): Likewise.
7928 (mve_vclzq_m_<supf><mode>): Likewise.
7929 (mve_vcmpcsq_m_n_u<mode>): Likewise.
7930 (mve_vcmpcsq_m_u<mode>): Likewise.
7931 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
7932 (mve_vcmpeqq_m_<supf><mode>): Likewise.
7933 (mve_vcmpgeq_m_n_s<mode>): Likewise.
7934 (mve_vcmpgeq_m_s<mode>): Likewise.
7935 (mve_vcmpgtq_m_n_s<mode>): Likewise.
7936 (mve_vcmpgtq_m_s<mode>): Likewise.
7937 (mve_vcmphiq_m_n_u<mode>): Likewise.
7938 (mve_vcmphiq_m_u<mode>): Likewise.
7939 (mve_vcmpleq_m_n_s<mode>): Likewise.
7940 (mve_vcmpleq_m_s<mode>): Likewise.
7941 (mve_vcmpltq_m_n_s<mode>): Likewise.
7942 (mve_vcmpltq_m_s<mode>): Likewise.
7943 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
7944 (mve_vcmpneq_m_<supf><mode>): Likewise.
7945 (mve_vdupq_m_n_<supf><mode>): Likewise.
7946 (mve_vmaxaq_m_s<mode>): Likewise.
7947 (mve_vmaxavq_p_s<mode>): Likewise.
7948 (mve_vmaxvq_p_<supf><mode>): Likewise.
7949 (mve_vminaq_m_s<mode>): Likewise.
7950 (mve_vminavq_p_s<mode>): Likewise.
7951 (mve_vminvq_p_<supf><mode>): Likewise.
7952 (mve_vmladavaq_<supf><mode>): Likewise.
7953 (mve_vmladavq_p_<supf><mode>): Likewise.
7954 (mve_vmladavxq_p_s<mode>): Likewise.
7955 (mve_vmlaq_n_<supf><mode>): Likewise.
7956 (mve_vmlasq_n_<supf><mode>): Likewise.
7957 (mve_vmlsdavq_p_s<mode>): Likewise.
7958 (mve_vmlsdavxq_p_s<mode>): Likewise.
7959 (mve_vmvnq_m_<supf><mode>): Likewise.
7960 (mve_vnegq_m_s<mode>): Likewise.
7961 (mve_vpselq_<supf><mode>): Likewise.
7962 (mve_vqabsq_m_s<mode>): Likewise.
7963 (mve_vqdmlahq_n_<supf><mode>): Likewise.
7964 (mve_vqnegq_m_s<mode>): Likewise.
7965 (mve_vqrdmladhq_s<mode>): Likewise.
7966 (mve_vqrdmladhxq_s<mode>): Likewise.
7967 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
7968 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
7969 (mve_vqrdmlsdhq_s<mode>): Likewise.
7970 (mve_vqrdmlsdhxq_s<mode>): Likewise.
7971 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
7972 (mve_vqshlq_m_r_<supf><mode>): Likewise.
7973 (mve_vrev64q_m_<supf><mode>): Likewise.
7974 (mve_vrshlq_m_n_<supf><mode>): Likewise.
7975 (mve_vshlq_m_r_<supf><mode>): Likewise.
7976 (mve_vsliq_n_<supf><mode>): Likewise.
7977 (mve_vsriq_n_<supf><mode>): Likewise.
7978 (mve_vqdmlsdhxq_s<mode>): Likewise.
7979 (mve_vqdmlsdhq_s<mode>): Likewise.
7980 (mve_vqdmladhxq_s<mode>): Likewise.
7981 (mve_vqdmladhq_s<mode>): Likewise.
7982 (mve_vmlsdavaxq_s<mode>): Likewise.
7983 (mve_vmlsdavaq_s<mode>): Likewise.
7984 (mve_vmladavaxq_s<mode>): Likewise.
7985 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
7986 matching constraint Rc.
7987 (mve_imm_31): Define predicate to check the matching constraint Re.
7989 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
7991 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
7992 (vec_cmp<mode>di_dup): Likewise.
7993 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
7995 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
7997 * config/gcn/gcn-valu.md (COND_MODE): Delete.
7998 (COND_INT_MODE): Delete.
7999 (cond_op): Add "mult".
8000 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
8001 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
8003 2020-03-18 Richard Biener <rguenther@suse.de>
8006 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
8007 partial int modes or not mode-precision integer types for
8010 2020-03-18 Jakub Jelinek <jakub@redhat.com>
8012 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
8014 * config/arc/arc.c (frame_stack_add): Likewise.
8015 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
8017 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
8018 * tree-ssa-strlen.h (handle_printf_call): Likewise.
8019 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
8020 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
8022 2020-03-18 Duan bo <duanbo3@huawei.com>
8025 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
8026 (@ldr_got_tiny_<mode>): New pattern.
8027 (ldr_got_tiny_sidi): Likewise.
8028 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
8029 them to handle SYMBOL_TINY_GOT for ILP32.
8031 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
8033 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
8034 call-preserved for SVE PCS functions.
8035 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
8036 Optimize the case in which there are no following vector save slots.
8038 2020-03-18 Richard Biener <rguenther@suse.de>
8041 * fold-const.c (build_fold_addr_expr): Convert address to
8043 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
8044 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
8045 to build the ADDR_EXPR which we don't really want to simplify.
8046 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
8047 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
8048 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
8049 (simplify_builtin_call): Strip useless type conversions.
8050 * tree-ssa-strlen.c (new_strinfo): Likewise.
8052 2020-03-17 Alexey Neyman <stilor@att.net>
8055 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
8056 the debug level is terse and the declaration is public. Do not
8058 (dwarf2out_decl): Same.
8059 (add_type_attribute): Return immediately if debug level is
8062 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
8064 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
8066 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8067 Mihail Ionescu <mihail.ionescu@arm.com>
8068 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8070 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
8071 Define qualifier for ternary operands.
8072 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
8073 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8074 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8075 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
8076 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8077 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8078 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8079 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
8080 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8081 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8082 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
8083 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8084 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
8085 * config/arm/arm_mve.h (vabavq_s8): Define macro.
8086 (vabavq_s16): Likewise.
8087 (vabavq_s32): Likewise.
8088 (vbicq_m_n_s16): Likewise.
8089 (vbicq_m_n_s32): Likewise.
8090 (vbicq_m_n_u16): Likewise.
8091 (vbicq_m_n_u32): Likewise.
8092 (vcmpeqq_m_f16): Likewise.
8093 (vcmpeqq_m_f32): Likewise.
8094 (vcvtaq_m_s16_f16): Likewise.
8095 (vcvtaq_m_u16_f16): Likewise.
8096 (vcvtaq_m_s32_f32): Likewise.
8097 (vcvtaq_m_u32_f32): Likewise.
8098 (vcvtq_m_f16_s16): Likewise.
8099 (vcvtq_m_f16_u16): Likewise.
8100 (vcvtq_m_f32_s32): Likewise.
8101 (vcvtq_m_f32_u32): Likewise.
8102 (vqrshrnbq_n_s16): Likewise.
8103 (vqrshrnbq_n_u16): Likewise.
8104 (vqrshrnbq_n_s32): Likewise.
8105 (vqrshrnbq_n_u32): Likewise.
8106 (vqrshrunbq_n_s16): Likewise.
8107 (vqrshrunbq_n_s32): Likewise.
8108 (vrmlaldavhaq_s32): Likewise.
8109 (vrmlaldavhaq_u32): Likewise.
8110 (vshlcq_s8): Likewise.
8111 (vshlcq_u8): Likewise.
8112 (vshlcq_s16): Likewise.
8113 (vshlcq_u16): Likewise.
8114 (vshlcq_s32): Likewise.
8115 (vshlcq_u32): Likewise.
8116 (vabavq_u8): Likewise.
8117 (vabavq_u16): Likewise.
8118 (vabavq_u32): Likewise.
8119 (__arm_vabavq_s8): Define intrinsic.
8120 (__arm_vabavq_s16): Likewise.
8121 (__arm_vabavq_s32): Likewise.
8122 (__arm_vabavq_u8): Likewise.
8123 (__arm_vabavq_u16): Likewise.
8124 (__arm_vabavq_u32): Likewise.
8125 (__arm_vbicq_m_n_s16): Likewise.
8126 (__arm_vbicq_m_n_s32): Likewise.
8127 (__arm_vbicq_m_n_u16): Likewise.
8128 (__arm_vbicq_m_n_u32): Likewise.
8129 (__arm_vqrshrnbq_n_s16): Likewise.
8130 (__arm_vqrshrnbq_n_u16): Likewise.
8131 (__arm_vqrshrnbq_n_s32): Likewise.
8132 (__arm_vqrshrnbq_n_u32): Likewise.
8133 (__arm_vqrshrunbq_n_s16): Likewise.
8134 (__arm_vqrshrunbq_n_s32): Likewise.
8135 (__arm_vrmlaldavhaq_s32): Likewise.
8136 (__arm_vrmlaldavhaq_u32): Likewise.
8137 (__arm_vshlcq_s8): Likewise.
8138 (__arm_vshlcq_u8): Likewise.
8139 (__arm_vshlcq_s16): Likewise.
8140 (__arm_vshlcq_u16): Likewise.
8141 (__arm_vshlcq_s32): Likewise.
8142 (__arm_vshlcq_u32): Likewise.
8143 (__arm_vcmpeqq_m_f16): Likewise.
8144 (__arm_vcmpeqq_m_f32): Likewise.
8145 (__arm_vcvtaq_m_s16_f16): Likewise.
8146 (__arm_vcvtaq_m_u16_f16): Likewise.
8147 (__arm_vcvtaq_m_s32_f32): Likewise.
8148 (__arm_vcvtaq_m_u32_f32): Likewise.
8149 (__arm_vcvtq_m_f16_s16): Likewise.
8150 (__arm_vcvtq_m_f16_u16): Likewise.
8151 (__arm_vcvtq_m_f32_s32): Likewise.
8152 (__arm_vcvtq_m_f32_u32): Likewise.
8153 (vcvtaq_m): Define polymorphic variant.
8154 (vcvtq_m): Likewise.
8157 (vbicq_m_n): Likewise.
8158 (vqrshrnbq_n): Likewise.
8159 (vqrshrunbq_n): Likewise.
8160 * config/arm/arm_mve_builtins.def
8161 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
8162 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
8163 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8164 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
8165 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
8166 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8167 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8168 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8169 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
8170 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8171 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8172 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
8173 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8174 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
8175 * config/arm/mve.md (VBICQ_M_N): Define iterator.
8176 (VCVTAQ_M): Likewise.
8177 (VCVTQ_M_TO_F): Likewise.
8178 (VQRSHRNBQ_N): Likewise.
8181 (VRMLALDAVHAQ): Likewise.
8182 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
8183 (mve_vcmpeqq_m_f<mode>): Likewise.
8184 (mve_vcvtaq_m_<supf><mode>): Likewise.
8185 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
8186 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
8187 (mve_vqrshrunbq_n_s<mode>): Likewise.
8188 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
8189 (mve_vabavq_<supf><mode>): Likewise.
8190 (mve_vshlcq_<supf><mode>): Likewise.
8191 (mve_vshlcq_<supf><mode>): Likewise.
8192 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
8193 (mve_vshlcq_carry_<supf><mode>): Likewise.
8195 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8196 Mihail Ionescu <mihail.ionescu@arm.com>
8197 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8199 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
8200 (vqmovnbq_u16): Likewise.
8201 (vmulltq_poly_p8): Likewise.
8202 (vmullbq_poly_p8): Likewise.
8203 (vmovntq_u16): Likewise.
8204 (vmovnbq_u16): Likewise.
8205 (vmlaldavxq_u16): Likewise.
8206 (vmlaldavq_u16): Likewise.
8207 (vqmovuntq_s16): Likewise.
8208 (vqmovunbq_s16): Likewise.
8209 (vshlltq_n_u8): Likewise.
8210 (vshllbq_n_u8): Likewise.
8211 (vorrq_n_u16): Likewise.
8212 (vbicq_n_u16): Likewise.
8213 (vcmpneq_n_f16): Likewise.
8214 (vcmpneq_f16): Likewise.
8215 (vcmpltq_n_f16): Likewise.
8216 (vcmpltq_f16): Likewise.
8217 (vcmpleq_n_f16): Likewise.
8218 (vcmpleq_f16): Likewise.
8219 (vcmpgtq_n_f16): Likewise.
8220 (vcmpgtq_f16): Likewise.
8221 (vcmpgeq_n_f16): Likewise.
8222 (vcmpgeq_f16): Likewise.
8223 (vcmpeqq_n_f16): Likewise.
8224 (vcmpeqq_f16): Likewise.
8225 (vsubq_f16): Likewise.
8226 (vqmovntq_s16): Likewise.
8227 (vqmovnbq_s16): Likewise.
8228 (vqdmulltq_s16): Likewise.
8229 (vqdmulltq_n_s16): Likewise.
8230 (vqdmullbq_s16): Likewise.
8231 (vqdmullbq_n_s16): Likewise.
8232 (vorrq_f16): Likewise.
8233 (vornq_f16): Likewise.
8234 (vmulq_n_f16): Likewise.
8235 (vmulq_f16): Likewise.
8236 (vmovntq_s16): Likewise.
8237 (vmovnbq_s16): Likewise.
8238 (vmlsldavxq_s16): Likewise.
8239 (vmlsldavq_s16): Likewise.
8240 (vmlaldavxq_s16): Likewise.
8241 (vmlaldavq_s16): Likewise.
8242 (vminnmvq_f16): Likewise.
8243 (vminnmq_f16): Likewise.
8244 (vminnmavq_f16): Likewise.
8245 (vminnmaq_f16): Likewise.
8246 (vmaxnmvq_f16): Likewise.
8247 (vmaxnmq_f16): Likewise.
8248 (vmaxnmavq_f16): Likewise.
8249 (vmaxnmaq_f16): Likewise.
8250 (veorq_f16): Likewise.
8251 (vcmulq_rot90_f16): Likewise.
8252 (vcmulq_rot270_f16): Likewise.
8253 (vcmulq_rot180_f16): Likewise.
8254 (vcmulq_f16): Likewise.
8255 (vcaddq_rot90_f16): Likewise.
8256 (vcaddq_rot270_f16): Likewise.
8257 (vbicq_f16): Likewise.
8258 (vandq_f16): Likewise.
8259 (vaddq_n_f16): Likewise.
8260 (vabdq_f16): Likewise.
8261 (vshlltq_n_s8): Likewise.
8262 (vshllbq_n_s8): Likewise.
8263 (vorrq_n_s16): Likewise.
8264 (vbicq_n_s16): Likewise.
8265 (vqmovntq_u32): Likewise.
8266 (vqmovnbq_u32): Likewise.
8267 (vmulltq_poly_p16): Likewise.
8268 (vmullbq_poly_p16): Likewise.
8269 (vmovntq_u32): Likewise.
8270 (vmovnbq_u32): Likewise.
8271 (vmlaldavxq_u32): Likewise.
8272 (vmlaldavq_u32): Likewise.
8273 (vqmovuntq_s32): Likewise.
8274 (vqmovunbq_s32): Likewise.
8275 (vshlltq_n_u16): Likewise.
8276 (vshllbq_n_u16): Likewise.
8277 (vorrq_n_u32): Likewise.
8278 (vbicq_n_u32): Likewise.
8279 (vcmpneq_n_f32): Likewise.
8280 (vcmpneq_f32): Likewise.
8281 (vcmpltq_n_f32): Likewise.
8282 (vcmpltq_f32): Likewise.
8283 (vcmpleq_n_f32): Likewise.
8284 (vcmpleq_f32): Likewise.
8285 (vcmpgtq_n_f32): Likewise.
8286 (vcmpgtq_f32): Likewise.
8287 (vcmpgeq_n_f32): Likewise.
8288 (vcmpgeq_f32): Likewise.
8289 (vcmpeqq_n_f32): Likewise.
8290 (vcmpeqq_f32): Likewise.
8291 (vsubq_f32): Likewise.
8292 (vqmovntq_s32): Likewise.
8293 (vqmovnbq_s32): Likewise.
8294 (vqdmulltq_s32): Likewise.
8295 (vqdmulltq_n_s32): Likewise.
8296 (vqdmullbq_s32): Likewise.
8297 (vqdmullbq_n_s32): Likewise.
8298 (vorrq_f32): Likewise.
8299 (vornq_f32): Likewise.
8300 (vmulq_n_f32): Likewise.
8301 (vmulq_f32): Likewise.
8302 (vmovntq_s32): Likewise.
8303 (vmovnbq_s32): Likewise.
8304 (vmlsldavxq_s32): Likewise.
8305 (vmlsldavq_s32): Likewise.
8306 (vmlaldavxq_s32): Likewise.
8307 (vmlaldavq_s32): Likewise.
8308 (vminnmvq_f32): Likewise.
8309 (vminnmq_f32): Likewise.
8310 (vminnmavq_f32): Likewise.
8311 (vminnmaq_f32): Likewise.
8312 (vmaxnmvq_f32): Likewise.
8313 (vmaxnmq_f32): Likewise.
8314 (vmaxnmavq_f32): Likewise.
8315 (vmaxnmaq_f32): Likewise.
8316 (veorq_f32): Likewise.
8317 (vcmulq_rot90_f32): Likewise.
8318 (vcmulq_rot270_f32): Likewise.
8319 (vcmulq_rot180_f32): Likewise.
8320 (vcmulq_f32): Likewise.
8321 (vcaddq_rot90_f32): Likewise.
8322 (vcaddq_rot270_f32): Likewise.
8323 (vbicq_f32): Likewise.
8324 (vandq_f32): Likewise.
8325 (vaddq_n_f32): Likewise.
8326 (vabdq_f32): Likewise.
8327 (vshlltq_n_s16): Likewise.
8328 (vshllbq_n_s16): Likewise.
8329 (vorrq_n_s32): Likewise.
8330 (vbicq_n_s32): Likewise.
8331 (vrmlaldavhq_u32): Likewise.
8332 (vctp8q_m): Likewise.
8333 (vctp64q_m): Likewise.
8334 (vctp32q_m): Likewise.
8335 (vctp16q_m): Likewise.
8336 (vaddlvaq_u32): Likewise.
8337 (vrmlsldavhxq_s32): Likewise.
8338 (vrmlsldavhq_s32): Likewise.
8339 (vrmlaldavhxq_s32): Likewise.
8340 (vrmlaldavhq_s32): Likewise.
8341 (vcvttq_f16_f32): Likewise.
8342 (vcvtbq_f16_f32): Likewise.
8343 (vaddlvaq_s32): Likewise.
8344 (__arm_vqmovntq_u16): Define intrinsic.
8345 (__arm_vqmovnbq_u16): Likewise.
8346 (__arm_vmulltq_poly_p8): Likewise.
8347 (__arm_vmullbq_poly_p8): Likewise.
8348 (__arm_vmovntq_u16): Likewise.
8349 (__arm_vmovnbq_u16): Likewise.
8350 (__arm_vmlaldavxq_u16): Likewise.
8351 (__arm_vmlaldavq_u16): Likewise.
8352 (__arm_vqmovuntq_s16): Likewise.
8353 (__arm_vqmovunbq_s16): Likewise.
8354 (__arm_vshlltq_n_u8): Likewise.
8355 (__arm_vshllbq_n_u8): Likewise.
8356 (__arm_vorrq_n_u16): Likewise.
8357 (__arm_vbicq_n_u16): Likewise.
8358 (__arm_vcmpneq_n_f16): Likewise.
8359 (__arm_vcmpneq_f16): Likewise.
8360 (__arm_vcmpltq_n_f16): Likewise.
8361 (__arm_vcmpltq_f16): Likewise.
8362 (__arm_vcmpleq_n_f16): Likewise.
8363 (__arm_vcmpleq_f16): Likewise.
8364 (__arm_vcmpgtq_n_f16): Likewise.
8365 (__arm_vcmpgtq_f16): Likewise.
8366 (__arm_vcmpgeq_n_f16): Likewise.
8367 (__arm_vcmpgeq_f16): Likewise.
8368 (__arm_vcmpeqq_n_f16): Likewise.
8369 (__arm_vcmpeqq_f16): Likewise.
8370 (__arm_vsubq_f16): Likewise.
8371 (__arm_vqmovntq_s16): Likewise.
8372 (__arm_vqmovnbq_s16): Likewise.
8373 (__arm_vqdmulltq_s16): Likewise.
8374 (__arm_vqdmulltq_n_s16): Likewise.
8375 (__arm_vqdmullbq_s16): Likewise.
8376 (__arm_vqdmullbq_n_s16): Likewise.
8377 (__arm_vorrq_f16): Likewise.
8378 (__arm_vornq_f16): Likewise.
8379 (__arm_vmulq_n_f16): Likewise.
8380 (__arm_vmulq_f16): Likewise.
8381 (__arm_vmovntq_s16): Likewise.
8382 (__arm_vmovnbq_s16): Likewise.
8383 (__arm_vmlsldavxq_s16): Likewise.
8384 (__arm_vmlsldavq_s16): Likewise.
8385 (__arm_vmlaldavxq_s16): Likewise.
8386 (__arm_vmlaldavq_s16): Likewise.
8387 (__arm_vminnmvq_f16): Likewise.
8388 (__arm_vminnmq_f16): Likewise.
8389 (__arm_vminnmavq_f16): Likewise.
8390 (__arm_vminnmaq_f16): Likewise.
8391 (__arm_vmaxnmvq_f16): Likewise.
8392 (__arm_vmaxnmq_f16): Likewise.
8393 (__arm_vmaxnmavq_f16): Likewise.
8394 (__arm_vmaxnmaq_f16): Likewise.
8395 (__arm_veorq_f16): Likewise.
8396 (__arm_vcmulq_rot90_f16): Likewise.
8397 (__arm_vcmulq_rot270_f16): Likewise.
8398 (__arm_vcmulq_rot180_f16): Likewise.
8399 (__arm_vcmulq_f16): Likewise.
8400 (__arm_vcaddq_rot90_f16): Likewise.
8401 (__arm_vcaddq_rot270_f16): Likewise.
8402 (__arm_vbicq_f16): Likewise.
8403 (__arm_vandq_f16): Likewise.
8404 (__arm_vaddq_n_f16): Likewise.
8405 (__arm_vabdq_f16): Likewise.
8406 (__arm_vshlltq_n_s8): Likewise.
8407 (__arm_vshllbq_n_s8): Likewise.
8408 (__arm_vorrq_n_s16): Likewise.
8409 (__arm_vbicq_n_s16): Likewise.
8410 (__arm_vqmovntq_u32): Likewise.
8411 (__arm_vqmovnbq_u32): Likewise.
8412 (__arm_vmulltq_poly_p16): Likewise.
8413 (__arm_vmullbq_poly_p16): Likewise.
8414 (__arm_vmovntq_u32): Likewise.
8415 (__arm_vmovnbq_u32): Likewise.
8416 (__arm_vmlaldavxq_u32): Likewise.
8417 (__arm_vmlaldavq_u32): Likewise.
8418 (__arm_vqmovuntq_s32): Likewise.
8419 (__arm_vqmovunbq_s32): Likewise.
8420 (__arm_vshlltq_n_u16): Likewise.
8421 (__arm_vshllbq_n_u16): Likewise.
8422 (__arm_vorrq_n_u32): Likewise.
8423 (__arm_vbicq_n_u32): Likewise.
8424 (__arm_vcmpneq_n_f32): Likewise.
8425 (__arm_vcmpneq_f32): Likewise.
8426 (__arm_vcmpltq_n_f32): Likewise.
8427 (__arm_vcmpltq_f32): Likewise.
8428 (__arm_vcmpleq_n_f32): Likewise.
8429 (__arm_vcmpleq_f32): Likewise.
8430 (__arm_vcmpgtq_n_f32): Likewise.
8431 (__arm_vcmpgtq_f32): Likewise.
8432 (__arm_vcmpgeq_n_f32): Likewise.
8433 (__arm_vcmpgeq_f32): Likewise.
8434 (__arm_vcmpeqq_n_f32): Likewise.
8435 (__arm_vcmpeqq_f32): Likewise.
8436 (__arm_vsubq_f32): Likewise.
8437 (__arm_vqmovntq_s32): Likewise.
8438 (__arm_vqmovnbq_s32): Likewise.
8439 (__arm_vqdmulltq_s32): Likewise.
8440 (__arm_vqdmulltq_n_s32): Likewise.
8441 (__arm_vqdmullbq_s32): Likewise.
8442 (__arm_vqdmullbq_n_s32): Likewise.
8443 (__arm_vorrq_f32): Likewise.
8444 (__arm_vornq_f32): Likewise.
8445 (__arm_vmulq_n_f32): Likewise.
8446 (__arm_vmulq_f32): Likewise.
8447 (__arm_vmovntq_s32): Likewise.
8448 (__arm_vmovnbq_s32): Likewise.
8449 (__arm_vmlsldavxq_s32): Likewise.
8450 (__arm_vmlsldavq_s32): Likewise.
8451 (__arm_vmlaldavxq_s32): Likewise.
8452 (__arm_vmlaldavq_s32): Likewise.
8453 (__arm_vminnmvq_f32): Likewise.
8454 (__arm_vminnmq_f32): Likewise.
8455 (__arm_vminnmavq_f32): Likewise.
8456 (__arm_vminnmaq_f32): Likewise.
8457 (__arm_vmaxnmvq_f32): Likewise.
8458 (__arm_vmaxnmq_f32): Likewise.
8459 (__arm_vmaxnmavq_f32): Likewise.
8460 (__arm_vmaxnmaq_f32): Likewise.
8461 (__arm_veorq_f32): Likewise.
8462 (__arm_vcmulq_rot90_f32): Likewise.
8463 (__arm_vcmulq_rot270_f32): Likewise.
8464 (__arm_vcmulq_rot180_f32): Likewise.
8465 (__arm_vcmulq_f32): Likewise.
8466 (__arm_vcaddq_rot90_f32): Likewise.
8467 (__arm_vcaddq_rot270_f32): Likewise.
8468 (__arm_vbicq_f32): Likewise.
8469 (__arm_vandq_f32): Likewise.
8470 (__arm_vaddq_n_f32): Likewise.
8471 (__arm_vabdq_f32): Likewise.
8472 (__arm_vshlltq_n_s16): Likewise.
8473 (__arm_vshllbq_n_s16): Likewise.
8474 (__arm_vorrq_n_s32): Likewise.
8475 (__arm_vbicq_n_s32): Likewise.
8476 (__arm_vrmlaldavhq_u32): Likewise.
8477 (__arm_vctp8q_m): Likewise.
8478 (__arm_vctp64q_m): Likewise.
8479 (__arm_vctp32q_m): Likewise.
8480 (__arm_vctp16q_m): Likewise.
8481 (__arm_vaddlvaq_u32): Likewise.
8482 (__arm_vrmlsldavhxq_s32): Likewise.
8483 (__arm_vrmlsldavhq_s32): Likewise.
8484 (__arm_vrmlaldavhxq_s32): Likewise.
8485 (__arm_vrmlaldavhq_s32): Likewise.
8486 (__arm_vcvttq_f16_f32): Likewise.
8487 (__arm_vcvtbq_f16_f32): Likewise.
8488 (__arm_vaddlvaq_s32): Likewise.
8489 (vst4q): Define polymorphic variant.
8496 (vrev64q): Likewise.
8498 (vdupq_n): Likewise.
8500 (vrev32q): Likewise.
8501 (vcvtbq_f32): Likewise.
8502 (vcvttq_f32): Likewise.
8504 (vsubq_n): Likewise.
8505 (vbrsrq_n): Likewise.
8506 (vcvtq_n): Likewise.
8510 (vaddq_n): Likewise.
8514 (vmulq_n): Likewise.
8516 (vcaddq_rot270): Likewise.
8517 (vcmpeqq_n): Likewise.
8518 (vcmpeqq): Likewise.
8519 (vcaddq_rot90): Likewise.
8520 (vcmpgeq_n): Likewise.
8521 (vcmpgeq): Likewise.
8522 (vcmpgtq_n): Likewise.
8523 (vcmpgtq): Likewise.
8524 (vcmpgtq): Likewise.
8525 (vcmpleq_n): Likewise.
8526 (vcmpleq_n): Likewise.
8527 (vcmpleq): Likewise.
8528 (vcmpleq): Likewise.
8529 (vcmpltq_n): Likewise.
8530 (vcmpltq_n): Likewise.
8531 (vcmpltq): Likewise.
8532 (vcmpltq): Likewise.
8533 (vcmpneq_n): Likewise.
8534 (vcmpneq_n): Likewise.
8535 (vcmpneq): Likewise.
8536 (vcmpneq): Likewise.
8539 (vcmulq_rot180): Likewise.
8540 (vcmulq_rot180): Likewise.
8541 (vcmulq_rot270): Likewise.
8542 (vcmulq_rot270): Likewise.
8543 (vcmulq_rot90): Likewise.
8544 (vcmulq_rot90): Likewise.
8547 (vmaxnmaq): Likewise.
8548 (vmaxnmaq): Likewise.
8549 (vmaxnmavq): Likewise.
8550 (vmaxnmavq): Likewise.
8551 (vmaxnmq): Likewise.
8552 (vmaxnmq): Likewise.
8553 (vmaxnmvq): Likewise.
8554 (vmaxnmvq): Likewise.
8555 (vminnmaq): Likewise.
8556 (vminnmaq): Likewise.
8557 (vminnmavq): Likewise.
8558 (vminnmavq): Likewise.
8559 (vminnmq): Likewise.
8560 (vminnmq): Likewise.
8561 (vminnmvq): Likewise.
8562 (vminnmvq): Likewise.
8563 (vbicq_n): Likewise.
8564 (vqmovntq): Likewise.
8565 (vqmovntq): Likewise.
8566 (vqmovnbq): Likewise.
8567 (vqmovnbq): Likewise.
8568 (vmulltq_poly): Likewise.
8569 (vmulltq_poly): Likewise.
8570 (vmullbq_poly): Likewise.
8571 (vmullbq_poly): Likewise.
8572 (vmovntq): Likewise.
8573 (vmovntq): Likewise.
8574 (vmovnbq): Likewise.
8575 (vmovnbq): Likewise.
8576 (vmlaldavxq): Likewise.
8577 (vmlaldavxq): Likewise.
8578 (vqmovuntq): Likewise.
8579 (vqmovuntq): Likewise.
8580 (vshlltq_n): Likewise.
8581 (vshlltq_n): Likewise.
8582 (vshllbq_n): Likewise.
8583 (vshllbq_n): Likewise.
8584 (vorrq_n): Likewise.
8585 (vorrq_n): Likewise.
8586 (vmlaldavq): Likewise.
8587 (vmlaldavq): Likewise.
8588 (vqmovunbq): Likewise.
8589 (vqmovunbq): Likewise.
8590 (vqdmulltq_n): Likewise.
8591 (vqdmulltq_n): Likewise.
8592 (vqdmulltq): Likewise.
8593 (vqdmulltq): Likewise.
8594 (vqdmullbq_n): Likewise.
8595 (vqdmullbq_n): Likewise.
8596 (vqdmullbq): Likewise.
8597 (vqdmullbq): Likewise.
8598 (vaddlvaq): Likewise.
8599 (vaddlvaq): Likewise.
8600 (vrmlaldavhq): Likewise.
8601 (vrmlaldavhq): Likewise.
8602 (vrmlaldavhxq): Likewise.
8603 (vrmlaldavhxq): Likewise.
8604 (vrmlsldavhq): Likewise.
8605 (vrmlsldavhq): Likewise.
8606 (vrmlsldavhxq): Likewise.
8607 (vrmlsldavhxq): Likewise.
8608 (vmlsldavxq): Likewise.
8609 (vmlsldavxq): Likewise.
8610 (vmlsldavq): Likewise.
8611 (vmlsldavq): Likewise.
8612 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
8613 (BINOP_NONE_NONE_NONE): Likewise.
8614 (BINOP_UNONE_NONE_NONE): Likewise.
8615 (BINOP_UNONE_UNONE_IMM): Likewise.
8616 (BINOP_UNONE_UNONE_NONE): Likewise.
8617 (BINOP_UNONE_UNONE_UNONE): Likewise.
8618 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
8619 (mve_vaddlvaq_<supf>v4si): Likewise.
8620 (mve_vaddq_n_f<mode>): Likewise.
8621 (mve_vandq_f<mode>): Likewise.
8622 (mve_vbicq_f<mode>): Likewise.
8623 (mve_vbicq_n_<supf><mode>): Likewise.
8624 (mve_vcaddq_rot270_f<mode>): Likewise.
8625 (mve_vcaddq_rot90_f<mode>): Likewise.
8626 (mve_vcmpeqq_f<mode>): Likewise.
8627 (mve_vcmpeqq_n_f<mode>): Likewise.
8628 (mve_vcmpgeq_f<mode>): Likewise.
8629 (mve_vcmpgeq_n_f<mode>): Likewise.
8630 (mve_vcmpgtq_f<mode>): Likewise.
8631 (mve_vcmpgtq_n_f<mode>): Likewise.
8632 (mve_vcmpleq_f<mode>): Likewise.
8633 (mve_vcmpleq_n_f<mode>): Likewise.
8634 (mve_vcmpltq_f<mode>): Likewise.
8635 (mve_vcmpltq_n_f<mode>): Likewise.
8636 (mve_vcmpneq_f<mode>): Likewise.
8637 (mve_vcmpneq_n_f<mode>): Likewise.
8638 (mve_vcmulq_f<mode>): Likewise.
8639 (mve_vcmulq_rot180_f<mode>): Likewise.
8640 (mve_vcmulq_rot270_f<mode>): Likewise.
8641 (mve_vcmulq_rot90_f<mode>): Likewise.
8642 (mve_vctp<mode1>q_mhi): Likewise.
8643 (mve_vcvtbq_f16_f32v8hf): Likewise.
8644 (mve_vcvttq_f16_f32v8hf): Likewise.
8645 (mve_veorq_f<mode>): Likewise.
8646 (mve_vmaxnmaq_f<mode>): Likewise.
8647 (mve_vmaxnmavq_f<mode>): Likewise.
8648 (mve_vmaxnmq_f<mode>): Likewise.
8649 (mve_vmaxnmvq_f<mode>): Likewise.
8650 (mve_vminnmaq_f<mode>): Likewise.
8651 (mve_vminnmavq_f<mode>): Likewise.
8652 (mve_vminnmq_f<mode>): Likewise.
8653 (mve_vminnmvq_f<mode>): Likewise.
8654 (mve_vmlaldavq_<supf><mode>): Likewise.
8655 (mve_vmlaldavxq_<supf><mode>): Likewise.
8656 (mve_vmlsldavq_s<mode>): Likewise.
8657 (mve_vmlsldavxq_s<mode>): Likewise.
8658 (mve_vmovnbq_<supf><mode>): Likewise.
8659 (mve_vmovntq_<supf><mode>): Likewise.
8660 (mve_vmulq_f<mode>): Likewise.
8661 (mve_vmulq_n_f<mode>): Likewise.
8662 (mve_vornq_f<mode>): Likewise.
8663 (mve_vorrq_f<mode>): Likewise.
8664 (mve_vorrq_n_<supf><mode>): Likewise.
8665 (mve_vqdmullbq_n_s<mode>): Likewise.
8666 (mve_vqdmullbq_s<mode>): Likewise.
8667 (mve_vqdmulltq_n_s<mode>): Likewise.
8668 (mve_vqdmulltq_s<mode>): Likewise.
8669 (mve_vqmovnbq_<supf><mode>): Likewise.
8670 (mve_vqmovntq_<supf><mode>): Likewise.
8671 (mve_vqmovunbq_s<mode>): Likewise.
8672 (mve_vqmovuntq_s<mode>): Likewise.
8673 (mve_vrmlaldavhxq_sv4si): Likewise.
8674 (mve_vrmlsldavhq_sv4si): Likewise.
8675 (mve_vrmlsldavhxq_sv4si): Likewise.
8676 (mve_vshllbq_n_<supf><mode>): Likewise.
8677 (mve_vshlltq_n_<supf><mode>): Likewise.
8678 (mve_vsubq_f<mode>): Likewise.
8679 (mve_vmulltq_poly_p<mode>): Likewise.
8680 (mve_vmullbq_poly_p<mode>): Likewise.
8681 (mve_vrmlaldavhq_<supf>v4si): Likewise.
8683 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8684 Mihail Ionescu <mihail.ionescu@arm.com>
8685 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8687 * config/arm/arm_mve.h (vsubq_u8): Define macro.
8688 (vsubq_n_u8): Likewise.
8689 (vrmulhq_u8): Likewise.
8690 (vrhaddq_u8): Likewise.
8691 (vqsubq_u8): Likewise.
8692 (vqsubq_n_u8): Likewise.
8693 (vqaddq_u8): Likewise.
8694 (vqaddq_n_u8): Likewise.
8695 (vorrq_u8): Likewise.
8696 (vornq_u8): Likewise.
8697 (vmulq_u8): Likewise.
8698 (vmulq_n_u8): Likewise.
8699 (vmulltq_int_u8): Likewise.
8700 (vmullbq_int_u8): Likewise.
8701 (vmulhq_u8): Likewise.
8702 (vmladavq_u8): Likewise.
8703 (vminvq_u8): Likewise.
8704 (vminq_u8): Likewise.
8705 (vmaxvq_u8): Likewise.
8706 (vmaxq_u8): Likewise.
8707 (vhsubq_u8): Likewise.
8708 (vhsubq_n_u8): Likewise.
8709 (vhaddq_u8): Likewise.
8710 (vhaddq_n_u8): Likewise.
8711 (veorq_u8): Likewise.
8712 (vcmpneq_n_u8): Likewise.
8713 (vcmphiq_u8): Likewise.
8714 (vcmphiq_n_u8): Likewise.
8715 (vcmpeqq_u8): Likewise.
8716 (vcmpeqq_n_u8): Likewise.
8717 (vcmpcsq_u8): Likewise.
8718 (vcmpcsq_n_u8): Likewise.
8719 (vcaddq_rot90_u8): Likewise.
8720 (vcaddq_rot270_u8): Likewise.
8721 (vbicq_u8): Likewise.
8722 (vandq_u8): Likewise.
8723 (vaddvq_p_u8): Likewise.
8724 (vaddvaq_u8): Likewise.
8725 (vaddq_n_u8): Likewise.
8726 (vabdq_u8): Likewise.
8727 (vshlq_r_u8): Likewise.
8728 (vrshlq_u8): Likewise.
8729 (vrshlq_n_u8): Likewise.
8730 (vqshlq_u8): Likewise.
8731 (vqshlq_r_u8): Likewise.
8732 (vqrshlq_u8): Likewise.
8733 (vqrshlq_n_u8): Likewise.
8734 (vminavq_s8): Likewise.
8735 (vminaq_s8): Likewise.
8736 (vmaxavq_s8): Likewise.
8737 (vmaxaq_s8): Likewise.
8738 (vbrsrq_n_u8): Likewise.
8739 (vshlq_n_u8): Likewise.
8740 (vrshrq_n_u8): Likewise.
8741 (vqshlq_n_u8): Likewise.
8742 (vcmpneq_n_s8): Likewise.
8743 (vcmpltq_s8): Likewise.
8744 (vcmpltq_n_s8): Likewise.
8745 (vcmpleq_s8): Likewise.
8746 (vcmpleq_n_s8): Likewise.
8747 (vcmpgtq_s8): Likewise.
8748 (vcmpgtq_n_s8): Likewise.
8749 (vcmpgeq_s8): Likewise.
8750 (vcmpgeq_n_s8): Likewise.
8751 (vcmpeqq_s8): Likewise.
8752 (vcmpeqq_n_s8): Likewise.
8753 (vqshluq_n_s8): Likewise.
8754 (vaddvq_p_s8): Likewise.
8755 (vsubq_s8): Likewise.
8756 (vsubq_n_s8): Likewise.
8757 (vshlq_r_s8): Likewise.
8758 (vrshlq_s8): Likewise.
8759 (vrshlq_n_s8): Likewise.
8760 (vrmulhq_s8): Likewise.
8761 (vrhaddq_s8): Likewise.
8762 (vqsubq_s8): Likewise.
8763 (vqsubq_n_s8): Likewise.
8764 (vqshlq_s8): Likewise.
8765 (vqshlq_r_s8): Likewise.
8766 (vqrshlq_s8): Likewise.
8767 (vqrshlq_n_s8): Likewise.
8768 (vqrdmulhq_s8): Likewise.
8769 (vqrdmulhq_n_s8): Likewise.
8770 (vqdmulhq_s8): Likewise.
8771 (vqdmulhq_n_s8): Likewise.
8772 (vqaddq_s8): Likewise.
8773 (vqaddq_n_s8): Likewise.
8774 (vorrq_s8): Likewise.
8775 (vornq_s8): Likewise.
8776 (vmulq_s8): Likewise.
8777 (vmulq_n_s8): Likewise.
8778 (vmulltq_int_s8): Likewise.
8779 (vmullbq_int_s8): Likewise.
8780 (vmulhq_s8): Likewise.
8781 (vmlsdavxq_s8): Likewise.
8782 (vmlsdavq_s8): Likewise.
8783 (vmladavxq_s8): Likewise.
8784 (vmladavq_s8): Likewise.
8785 (vminvq_s8): Likewise.
8786 (vminq_s8): Likewise.
8787 (vmaxvq_s8): Likewise.
8788 (vmaxq_s8): Likewise.
8789 (vhsubq_s8): Likewise.
8790 (vhsubq_n_s8): Likewise.
8791 (vhcaddq_rot90_s8): Likewise.
8792 (vhcaddq_rot270_s8): Likewise.
8793 (vhaddq_s8): Likewise.
8794 (vhaddq_n_s8): Likewise.
8795 (veorq_s8): Likewise.
8796 (vcaddq_rot90_s8): Likewise.
8797 (vcaddq_rot270_s8): Likewise.
8798 (vbrsrq_n_s8): Likewise.
8799 (vbicq_s8): Likewise.
8800 (vandq_s8): Likewise.
8801 (vaddvaq_s8): Likewise.
8802 (vaddq_n_s8): Likewise.
8803 (vabdq_s8): Likewise.
8804 (vshlq_n_s8): Likewise.
8805 (vrshrq_n_s8): Likewise.
8806 (vqshlq_n_s8): Likewise.
8807 (vsubq_u16): Likewise.
8808 (vsubq_n_u16): Likewise.
8809 (vrmulhq_u16): Likewise.
8810 (vrhaddq_u16): Likewise.
8811 (vqsubq_u16): Likewise.
8812 (vqsubq_n_u16): Likewise.
8813 (vqaddq_u16): Likewise.
8814 (vqaddq_n_u16): Likewise.
8815 (vorrq_u16): Likewise.
8816 (vornq_u16): Likewise.
8817 (vmulq_u16): Likewise.
8818 (vmulq_n_u16): Likewise.
8819 (vmulltq_int_u16): Likewise.
8820 (vmullbq_int_u16): Likewise.
8821 (vmulhq_u16): Likewise.
8822 (vmladavq_u16): Likewise.
8823 (vminvq_u16): Likewise.
8824 (vminq_u16): Likewise.
8825 (vmaxvq_u16): Likewise.
8826 (vmaxq_u16): Likewise.
8827 (vhsubq_u16): Likewise.
8828 (vhsubq_n_u16): Likewise.
8829 (vhaddq_u16): Likewise.
8830 (vhaddq_n_u16): Likewise.
8831 (veorq_u16): Likewise.
8832 (vcmpneq_n_u16): Likewise.
8833 (vcmphiq_u16): Likewise.
8834 (vcmphiq_n_u16): Likewise.
8835 (vcmpeqq_u16): Likewise.
8836 (vcmpeqq_n_u16): Likewise.
8837 (vcmpcsq_u16): Likewise.
8838 (vcmpcsq_n_u16): Likewise.
8839 (vcaddq_rot90_u16): Likewise.
8840 (vcaddq_rot270_u16): Likewise.
8841 (vbicq_u16): Likewise.
8842 (vandq_u16): Likewise.
8843 (vaddvq_p_u16): Likewise.
8844 (vaddvaq_u16): Likewise.
8845 (vaddq_n_u16): Likewise.
8846 (vabdq_u16): Likewise.
8847 (vshlq_r_u16): Likewise.
8848 (vrshlq_u16): Likewise.
8849 (vrshlq_n_u16): Likewise.
8850 (vqshlq_u16): Likewise.
8851 (vqshlq_r_u16): Likewise.
8852 (vqrshlq_u16): Likewise.
8853 (vqrshlq_n_u16): Likewise.
8854 (vminavq_s16): Likewise.
8855 (vminaq_s16): Likewise.
8856 (vmaxavq_s16): Likewise.
8857 (vmaxaq_s16): Likewise.
8858 (vbrsrq_n_u16): Likewise.
8859 (vshlq_n_u16): Likewise.
8860 (vrshrq_n_u16): Likewise.
8861 (vqshlq_n_u16): Likewise.
8862 (vcmpneq_n_s16): Likewise.
8863 (vcmpltq_s16): Likewise.
8864 (vcmpltq_n_s16): Likewise.
8865 (vcmpleq_s16): Likewise.
8866 (vcmpleq_n_s16): Likewise.
8867 (vcmpgtq_s16): Likewise.
8868 (vcmpgtq_n_s16): Likewise.
8869 (vcmpgeq_s16): Likewise.
8870 (vcmpgeq_n_s16): Likewise.
8871 (vcmpeqq_s16): Likewise.
8872 (vcmpeqq_n_s16): Likewise.
8873 (vqshluq_n_s16): Likewise.
8874 (vaddvq_p_s16): Likewise.
8875 (vsubq_s16): Likewise.
8876 (vsubq_n_s16): Likewise.
8877 (vshlq_r_s16): Likewise.
8878 (vrshlq_s16): Likewise.
8879 (vrshlq_n_s16): Likewise.
8880 (vrmulhq_s16): Likewise.
8881 (vrhaddq_s16): Likewise.
8882 (vqsubq_s16): Likewise.
8883 (vqsubq_n_s16): Likewise.
8884 (vqshlq_s16): Likewise.
8885 (vqshlq_r_s16): Likewise.
8886 (vqrshlq_s16): Likewise.
8887 (vqrshlq_n_s16): Likewise.
8888 (vqrdmulhq_s16): Likewise.
8889 (vqrdmulhq_n_s16): Likewise.
8890 (vqdmulhq_s16): Likewise.
8891 (vqdmulhq_n_s16): Likewise.
8892 (vqaddq_s16): Likewise.
8893 (vqaddq_n_s16): Likewise.
8894 (vorrq_s16): Likewise.
8895 (vornq_s16): Likewise.
8896 (vmulq_s16): Likewise.
8897 (vmulq_n_s16): Likewise.
8898 (vmulltq_int_s16): Likewise.
8899 (vmullbq_int_s16): Likewise.
8900 (vmulhq_s16): Likewise.
8901 (vmlsdavxq_s16): Likewise.
8902 (vmlsdavq_s16): Likewise.
8903 (vmladavxq_s16): Likewise.
8904 (vmladavq_s16): Likewise.
8905 (vminvq_s16): Likewise.
8906 (vminq_s16): Likewise.
8907 (vmaxvq_s16): Likewise.
8908 (vmaxq_s16): Likewise.
8909 (vhsubq_s16): Likewise.
8910 (vhsubq_n_s16): Likewise.
8911 (vhcaddq_rot90_s16): Likewise.
8912 (vhcaddq_rot270_s16): Likewise.
8913 (vhaddq_s16): Likewise.
8914 (vhaddq_n_s16): Likewise.
8915 (veorq_s16): Likewise.
8916 (vcaddq_rot90_s16): Likewise.
8917 (vcaddq_rot270_s16): Likewise.
8918 (vbrsrq_n_s16): Likewise.
8919 (vbicq_s16): Likewise.
8920 (vandq_s16): Likewise.
8921 (vaddvaq_s16): Likewise.
8922 (vaddq_n_s16): Likewise.
8923 (vabdq_s16): Likewise.
8924 (vshlq_n_s16): Likewise.
8925 (vrshrq_n_s16): Likewise.
8926 (vqshlq_n_s16): Likewise.
8927 (vsubq_u32): Likewise.
8928 (vsubq_n_u32): Likewise.
8929 (vrmulhq_u32): Likewise.
8930 (vrhaddq_u32): Likewise.
8931 (vqsubq_u32): Likewise.
8932 (vqsubq_n_u32): Likewise.
8933 (vqaddq_u32): Likewise.
8934 (vqaddq_n_u32): Likewise.
8935 (vorrq_u32): Likewise.
8936 (vornq_u32): Likewise.
8937 (vmulq_u32): Likewise.
8938 (vmulq_n_u32): Likewise.
8939 (vmulltq_int_u32): Likewise.
8940 (vmullbq_int_u32): Likewise.
8941 (vmulhq_u32): Likewise.
8942 (vmladavq_u32): Likewise.
8943 (vminvq_u32): Likewise.
8944 (vminq_u32): Likewise.
8945 (vmaxvq_u32): Likewise.
8946 (vmaxq_u32): Likewise.
8947 (vhsubq_u32): Likewise.
8948 (vhsubq_n_u32): Likewise.
8949 (vhaddq_u32): Likewise.
8950 (vhaddq_n_u32): Likewise.
8951 (veorq_u32): Likewise.
8952 (vcmpneq_n_u32): Likewise.
8953 (vcmphiq_u32): Likewise.
8954 (vcmphiq_n_u32): Likewise.
8955 (vcmpeqq_u32): Likewise.
8956 (vcmpeqq_n_u32): Likewise.
8957 (vcmpcsq_u32): Likewise.
8958 (vcmpcsq_n_u32): Likewise.
8959 (vcaddq_rot90_u32): Likewise.
8960 (vcaddq_rot270_u32): Likewise.
8961 (vbicq_u32): Likewise.
8962 (vandq_u32): Likewise.
8963 (vaddvq_p_u32): Likewise.
8964 (vaddvaq_u32): Likewise.
8965 (vaddq_n_u32): Likewise.
8966 (vabdq_u32): Likewise.
8967 (vshlq_r_u32): Likewise.
8968 (vrshlq_u32): Likewise.
8969 (vrshlq_n_u32): Likewise.
8970 (vqshlq_u32): Likewise.
8971 (vqshlq_r_u32): Likewise.
8972 (vqrshlq_u32): Likewise.
8973 (vqrshlq_n_u32): Likewise.
8974 (vminavq_s32): Likewise.
8975 (vminaq_s32): Likewise.
8976 (vmaxavq_s32): Likewise.
8977 (vmaxaq_s32): Likewise.
8978 (vbrsrq_n_u32): Likewise.
8979 (vshlq_n_u32): Likewise.
8980 (vrshrq_n_u32): Likewise.
8981 (vqshlq_n_u32): Likewise.
8982 (vcmpneq_n_s32): Likewise.
8983 (vcmpltq_s32): Likewise.
8984 (vcmpltq_n_s32): Likewise.
8985 (vcmpleq_s32): Likewise.
8986 (vcmpleq_n_s32): Likewise.
8987 (vcmpgtq_s32): Likewise.
8988 (vcmpgtq_n_s32): Likewise.
8989 (vcmpgeq_s32): Likewise.
8990 (vcmpgeq_n_s32): Likewise.
8991 (vcmpeqq_s32): Likewise.
8992 (vcmpeqq_n_s32): Likewise.
8993 (vqshluq_n_s32): Likewise.
8994 (vaddvq_p_s32): Likewise.
8995 (vsubq_s32): Likewise.
8996 (vsubq_n_s32): Likewise.
8997 (vshlq_r_s32): Likewise.
8998 (vrshlq_s32): Likewise.
8999 (vrshlq_n_s32): Likewise.
9000 (vrmulhq_s32): Likewise.
9001 (vrhaddq_s32): Likewise.
9002 (vqsubq_s32): Likewise.
9003 (vqsubq_n_s32): Likewise.
9004 (vqshlq_s32): Likewise.
9005 (vqshlq_r_s32): Likewise.
9006 (vqrshlq_s32): Likewise.
9007 (vqrshlq_n_s32): Likewise.
9008 (vqrdmulhq_s32): Likewise.
9009 (vqrdmulhq_n_s32): Likewise.
9010 (vqdmulhq_s32): Likewise.
9011 (vqdmulhq_n_s32): Likewise.
9012 (vqaddq_s32): Likewise.
9013 (vqaddq_n_s32): Likewise.
9014 (vorrq_s32): Likewise.
9015 (vornq_s32): Likewise.
9016 (vmulq_s32): Likewise.
9017 (vmulq_n_s32): Likewise.
9018 (vmulltq_int_s32): Likewise.
9019 (vmullbq_int_s32): Likewise.
9020 (vmulhq_s32): Likewise.
9021 (vmlsdavxq_s32): Likewise.
9022 (vmlsdavq_s32): Likewise.
9023 (vmladavxq_s32): Likewise.
9024 (vmladavq_s32): Likewise.
9025 (vminvq_s32): Likewise.
9026 (vminq_s32): Likewise.
9027 (vmaxvq_s32): Likewise.
9028 (vmaxq_s32): Likewise.
9029 (vhsubq_s32): Likewise.
9030 (vhsubq_n_s32): Likewise.
9031 (vhcaddq_rot90_s32): Likewise.
9032 (vhcaddq_rot270_s32): Likewise.
9033 (vhaddq_s32): Likewise.
9034 (vhaddq_n_s32): Likewise.
9035 (veorq_s32): Likewise.
9036 (vcaddq_rot90_s32): Likewise.
9037 (vcaddq_rot270_s32): Likewise.
9038 (vbrsrq_n_s32): Likewise.
9039 (vbicq_s32): Likewise.
9040 (vandq_s32): Likewise.
9041 (vaddvaq_s32): Likewise.
9042 (vaddq_n_s32): Likewise.
9043 (vabdq_s32): Likewise.
9044 (vshlq_n_s32): Likewise.
9045 (vrshrq_n_s32): Likewise.
9046 (vqshlq_n_s32): Likewise.
9047 (__arm_vsubq_u8): Define intrinsic.
9048 (__arm_vsubq_n_u8): Likewise.
9049 (__arm_vrmulhq_u8): Likewise.
9050 (__arm_vrhaddq_u8): Likewise.
9051 (__arm_vqsubq_u8): Likewise.
9052 (__arm_vqsubq_n_u8): Likewise.
9053 (__arm_vqaddq_u8): Likewise.
9054 (__arm_vqaddq_n_u8): Likewise.
9055 (__arm_vorrq_u8): Likewise.
9056 (__arm_vornq_u8): Likewise.
9057 (__arm_vmulq_u8): Likewise.
9058 (__arm_vmulq_n_u8): Likewise.
9059 (__arm_vmulltq_int_u8): Likewise.
9060 (__arm_vmullbq_int_u8): Likewise.
9061 (__arm_vmulhq_u8): Likewise.
9062 (__arm_vmladavq_u8): Likewise.
9063 (__arm_vminvq_u8): Likewise.
9064 (__arm_vminq_u8): Likewise.
9065 (__arm_vmaxvq_u8): Likewise.
9066 (__arm_vmaxq_u8): Likewise.
9067 (__arm_vhsubq_u8): Likewise.
9068 (__arm_vhsubq_n_u8): Likewise.
9069 (__arm_vhaddq_u8): Likewise.
9070 (__arm_vhaddq_n_u8): Likewise.
9071 (__arm_veorq_u8): Likewise.
9072 (__arm_vcmpneq_n_u8): Likewise.
9073 (__arm_vcmphiq_u8): Likewise.
9074 (__arm_vcmphiq_n_u8): Likewise.
9075 (__arm_vcmpeqq_u8): Likewise.
9076 (__arm_vcmpeqq_n_u8): Likewise.
9077 (__arm_vcmpcsq_u8): Likewise.
9078 (__arm_vcmpcsq_n_u8): Likewise.
9079 (__arm_vcaddq_rot90_u8): Likewise.
9080 (__arm_vcaddq_rot270_u8): Likewise.
9081 (__arm_vbicq_u8): Likewise.
9082 (__arm_vandq_u8): Likewise.
9083 (__arm_vaddvq_p_u8): Likewise.
9084 (__arm_vaddvaq_u8): Likewise.
9085 (__arm_vaddq_n_u8): Likewise.
9086 (__arm_vabdq_u8): Likewise.
9087 (__arm_vshlq_r_u8): Likewise.
9088 (__arm_vrshlq_u8): Likewise.
9089 (__arm_vrshlq_n_u8): Likewise.
9090 (__arm_vqshlq_u8): Likewise.
9091 (__arm_vqshlq_r_u8): Likewise.
9092 (__arm_vqrshlq_u8): Likewise.
9093 (__arm_vqrshlq_n_u8): Likewise.
9094 (__arm_vminavq_s8): Likewise.
9095 (__arm_vminaq_s8): Likewise.
9096 (__arm_vmaxavq_s8): Likewise.
9097 (__arm_vmaxaq_s8): Likewise.
9098 (__arm_vbrsrq_n_u8): Likewise.
9099 (__arm_vshlq_n_u8): Likewise.
9100 (__arm_vrshrq_n_u8): Likewise.
9101 (__arm_vqshlq_n_u8): Likewise.
9102 (__arm_vcmpneq_n_s8): Likewise.
9103 (__arm_vcmpltq_s8): Likewise.
9104 (__arm_vcmpltq_n_s8): Likewise.
9105 (__arm_vcmpleq_s8): Likewise.
9106 (__arm_vcmpleq_n_s8): Likewise.
9107 (__arm_vcmpgtq_s8): Likewise.
9108 (__arm_vcmpgtq_n_s8): Likewise.
9109 (__arm_vcmpgeq_s8): Likewise.
9110 (__arm_vcmpgeq_n_s8): Likewise.
9111 (__arm_vcmpeqq_s8): Likewise.
9112 (__arm_vcmpeqq_n_s8): Likewise.
9113 (__arm_vqshluq_n_s8): Likewise.
9114 (__arm_vaddvq_p_s8): Likewise.
9115 (__arm_vsubq_s8): Likewise.
9116 (__arm_vsubq_n_s8): Likewise.
9117 (__arm_vshlq_r_s8): Likewise.
9118 (__arm_vrshlq_s8): Likewise.
9119 (__arm_vrshlq_n_s8): Likewise.
9120 (__arm_vrmulhq_s8): Likewise.
9121 (__arm_vrhaddq_s8): Likewise.
9122 (__arm_vqsubq_s8): Likewise.
9123 (__arm_vqsubq_n_s8): Likewise.
9124 (__arm_vqshlq_s8): Likewise.
9125 (__arm_vqshlq_r_s8): Likewise.
9126 (__arm_vqrshlq_s8): Likewise.
9127 (__arm_vqrshlq_n_s8): Likewise.
9128 (__arm_vqrdmulhq_s8): Likewise.
9129 (__arm_vqrdmulhq_n_s8): Likewise.
9130 (__arm_vqdmulhq_s8): Likewise.
9131 (__arm_vqdmulhq_n_s8): Likewise.
9132 (__arm_vqaddq_s8): Likewise.
9133 (__arm_vqaddq_n_s8): Likewise.
9134 (__arm_vorrq_s8): Likewise.
9135 (__arm_vornq_s8): Likewise.
9136 (__arm_vmulq_s8): Likewise.
9137 (__arm_vmulq_n_s8): Likewise.
9138 (__arm_vmulltq_int_s8): Likewise.
9139 (__arm_vmullbq_int_s8): Likewise.
9140 (__arm_vmulhq_s8): Likewise.
9141 (__arm_vmlsdavxq_s8): Likewise.
9142 (__arm_vmlsdavq_s8): Likewise.
9143 (__arm_vmladavxq_s8): Likewise.
9144 (__arm_vmladavq_s8): Likewise.
9145 (__arm_vminvq_s8): Likewise.
9146 (__arm_vminq_s8): Likewise.
9147 (__arm_vmaxvq_s8): Likewise.
9148 (__arm_vmaxq_s8): Likewise.
9149 (__arm_vhsubq_s8): Likewise.
9150 (__arm_vhsubq_n_s8): Likewise.
9151 (__arm_vhcaddq_rot90_s8): Likewise.
9152 (__arm_vhcaddq_rot270_s8): Likewise.
9153 (__arm_vhaddq_s8): Likewise.
9154 (__arm_vhaddq_n_s8): Likewise.
9155 (__arm_veorq_s8): Likewise.
9156 (__arm_vcaddq_rot90_s8): Likewise.
9157 (__arm_vcaddq_rot270_s8): Likewise.
9158 (__arm_vbrsrq_n_s8): Likewise.
9159 (__arm_vbicq_s8): Likewise.
9160 (__arm_vandq_s8): Likewise.
9161 (__arm_vaddvaq_s8): Likewise.
9162 (__arm_vaddq_n_s8): Likewise.
9163 (__arm_vabdq_s8): Likewise.
9164 (__arm_vshlq_n_s8): Likewise.
9165 (__arm_vrshrq_n_s8): Likewise.
9166 (__arm_vqshlq_n_s8): Likewise.
9167 (__arm_vsubq_u16): Likewise.
9168 (__arm_vsubq_n_u16): Likewise.
9169 (__arm_vrmulhq_u16): Likewise.
9170 (__arm_vrhaddq_u16): Likewise.
9171 (__arm_vqsubq_u16): Likewise.
9172 (__arm_vqsubq_n_u16): Likewise.
9173 (__arm_vqaddq_u16): Likewise.
9174 (__arm_vqaddq_n_u16): Likewise.
9175 (__arm_vorrq_u16): Likewise.
9176 (__arm_vornq_u16): Likewise.
9177 (__arm_vmulq_u16): Likewise.
9178 (__arm_vmulq_n_u16): Likewise.
9179 (__arm_vmulltq_int_u16): Likewise.
9180 (__arm_vmullbq_int_u16): Likewise.
9181 (__arm_vmulhq_u16): Likewise.
9182 (__arm_vmladavq_u16): Likewise.
9183 (__arm_vminvq_u16): Likewise.
9184 (__arm_vminq_u16): Likewise.
9185 (__arm_vmaxvq_u16): Likewise.
9186 (__arm_vmaxq_u16): Likewise.
9187 (__arm_vhsubq_u16): Likewise.
9188 (__arm_vhsubq_n_u16): Likewise.
9189 (__arm_vhaddq_u16): Likewise.
9190 (__arm_vhaddq_n_u16): Likewise.
9191 (__arm_veorq_u16): Likewise.
9192 (__arm_vcmpneq_n_u16): Likewise.
9193 (__arm_vcmphiq_u16): Likewise.
9194 (__arm_vcmphiq_n_u16): Likewise.
9195 (__arm_vcmpeqq_u16): Likewise.
9196 (__arm_vcmpeqq_n_u16): Likewise.
9197 (__arm_vcmpcsq_u16): Likewise.
9198 (__arm_vcmpcsq_n_u16): Likewise.
9199 (__arm_vcaddq_rot90_u16): Likewise.
9200 (__arm_vcaddq_rot270_u16): Likewise.
9201 (__arm_vbicq_u16): Likewise.
9202 (__arm_vandq_u16): Likewise.
9203 (__arm_vaddvq_p_u16): Likewise.
9204 (__arm_vaddvaq_u16): Likewise.
9205 (__arm_vaddq_n_u16): Likewise.
9206 (__arm_vabdq_u16): Likewise.
9207 (__arm_vshlq_r_u16): Likewise.
9208 (__arm_vrshlq_u16): Likewise.
9209 (__arm_vrshlq_n_u16): Likewise.
9210 (__arm_vqshlq_u16): Likewise.
9211 (__arm_vqshlq_r_u16): Likewise.
9212 (__arm_vqrshlq_u16): Likewise.
9213 (__arm_vqrshlq_n_u16): Likewise.
9214 (__arm_vminavq_s16): Likewise.
9215 (__arm_vminaq_s16): Likewise.
9216 (__arm_vmaxavq_s16): Likewise.
9217 (__arm_vmaxaq_s16): Likewise.
9218 (__arm_vbrsrq_n_u16): Likewise.
9219 (__arm_vshlq_n_u16): Likewise.
9220 (__arm_vrshrq_n_u16): Likewise.
9221 (__arm_vqshlq_n_u16): Likewise.
9222 (__arm_vcmpneq_n_s16): Likewise.
9223 (__arm_vcmpltq_s16): Likewise.
9224 (__arm_vcmpltq_n_s16): Likewise.
9225 (__arm_vcmpleq_s16): Likewise.
9226 (__arm_vcmpleq_n_s16): Likewise.
9227 (__arm_vcmpgtq_s16): Likewise.
9228 (__arm_vcmpgtq_n_s16): Likewise.
9229 (__arm_vcmpgeq_s16): Likewise.
9230 (__arm_vcmpgeq_n_s16): Likewise.
9231 (__arm_vcmpeqq_s16): Likewise.
9232 (__arm_vcmpeqq_n_s16): Likewise.
9233 (__arm_vqshluq_n_s16): Likewise.
9234 (__arm_vaddvq_p_s16): Likewise.
9235 (__arm_vsubq_s16): Likewise.
9236 (__arm_vsubq_n_s16): Likewise.
9237 (__arm_vshlq_r_s16): Likewise.
9238 (__arm_vrshlq_s16): Likewise.
9239 (__arm_vrshlq_n_s16): Likewise.
9240 (__arm_vrmulhq_s16): Likewise.
9241 (__arm_vrhaddq_s16): Likewise.
9242 (__arm_vqsubq_s16): Likewise.
9243 (__arm_vqsubq_n_s16): Likewise.
9244 (__arm_vqshlq_s16): Likewise.
9245 (__arm_vqshlq_r_s16): Likewise.
9246 (__arm_vqrshlq_s16): Likewise.
9247 (__arm_vqrshlq_n_s16): Likewise.
9248 (__arm_vqrdmulhq_s16): Likewise.
9249 (__arm_vqrdmulhq_n_s16): Likewise.
9250 (__arm_vqdmulhq_s16): Likewise.
9251 (__arm_vqdmulhq_n_s16): Likewise.
9252 (__arm_vqaddq_s16): Likewise.
9253 (__arm_vqaddq_n_s16): Likewise.
9254 (__arm_vorrq_s16): Likewise.
9255 (__arm_vornq_s16): Likewise.
9256 (__arm_vmulq_s16): Likewise.
9257 (__arm_vmulq_n_s16): Likewise.
9258 (__arm_vmulltq_int_s16): Likewise.
9259 (__arm_vmullbq_int_s16): Likewise.
9260 (__arm_vmulhq_s16): Likewise.
9261 (__arm_vmlsdavxq_s16): Likewise.
9262 (__arm_vmlsdavq_s16): Likewise.
9263 (__arm_vmladavxq_s16): Likewise.
9264 (__arm_vmladavq_s16): Likewise.
9265 (__arm_vminvq_s16): Likewise.
9266 (__arm_vminq_s16): Likewise.
9267 (__arm_vmaxvq_s16): Likewise.
9268 (__arm_vmaxq_s16): Likewise.
9269 (__arm_vhsubq_s16): Likewise.
9270 (__arm_vhsubq_n_s16): Likewise.
9271 (__arm_vhcaddq_rot90_s16): Likewise.
9272 (__arm_vhcaddq_rot270_s16): Likewise.
9273 (__arm_vhaddq_s16): Likewise.
9274 (__arm_vhaddq_n_s16): Likewise.
9275 (__arm_veorq_s16): Likewise.
9276 (__arm_vcaddq_rot90_s16): Likewise.
9277 (__arm_vcaddq_rot270_s16): Likewise.
9278 (__arm_vbrsrq_n_s16): Likewise.
9279 (__arm_vbicq_s16): Likewise.
9280 (__arm_vandq_s16): Likewise.
9281 (__arm_vaddvaq_s16): Likewise.
9282 (__arm_vaddq_n_s16): Likewise.
9283 (__arm_vabdq_s16): Likewise.
9284 (__arm_vshlq_n_s16): Likewise.
9285 (__arm_vrshrq_n_s16): Likewise.
9286 (__arm_vqshlq_n_s16): Likewise.
9287 (__arm_vsubq_u32): Likewise.
9288 (__arm_vsubq_n_u32): Likewise.
9289 (__arm_vrmulhq_u32): Likewise.
9290 (__arm_vrhaddq_u32): Likewise.
9291 (__arm_vqsubq_u32): Likewise.
9292 (__arm_vqsubq_n_u32): Likewise.
9293 (__arm_vqaddq_u32): Likewise.
9294 (__arm_vqaddq_n_u32): Likewise.
9295 (__arm_vorrq_u32): Likewise.
9296 (__arm_vornq_u32): Likewise.
9297 (__arm_vmulq_u32): Likewise.
9298 (__arm_vmulq_n_u32): Likewise.
9299 (__arm_vmulltq_int_u32): Likewise.
9300 (__arm_vmullbq_int_u32): Likewise.
9301 (__arm_vmulhq_u32): Likewise.
9302 (__arm_vmladavq_u32): Likewise.
9303 (__arm_vminvq_u32): Likewise.
9304 (__arm_vminq_u32): Likewise.
9305 (__arm_vmaxvq_u32): Likewise.
9306 (__arm_vmaxq_u32): Likewise.
9307 (__arm_vhsubq_u32): Likewise.
9308 (__arm_vhsubq_n_u32): Likewise.
9309 (__arm_vhaddq_u32): Likewise.
9310 (__arm_vhaddq_n_u32): Likewise.
9311 (__arm_veorq_u32): Likewise.
9312 (__arm_vcmpneq_n_u32): Likewise.
9313 (__arm_vcmphiq_u32): Likewise.
9314 (__arm_vcmphiq_n_u32): Likewise.
9315 (__arm_vcmpeqq_u32): Likewise.
9316 (__arm_vcmpeqq_n_u32): Likewise.
9317 (__arm_vcmpcsq_u32): Likewise.
9318 (__arm_vcmpcsq_n_u32): Likewise.
9319 (__arm_vcaddq_rot90_u32): Likewise.
9320 (__arm_vcaddq_rot270_u32): Likewise.
9321 (__arm_vbicq_u32): Likewise.
9322 (__arm_vandq_u32): Likewise.
9323 (__arm_vaddvq_p_u32): Likewise.
9324 (__arm_vaddvaq_u32): Likewise.
9325 (__arm_vaddq_n_u32): Likewise.
9326 (__arm_vabdq_u32): Likewise.
9327 (__arm_vshlq_r_u32): Likewise.
9328 (__arm_vrshlq_u32): Likewise.
9329 (__arm_vrshlq_n_u32): Likewise.
9330 (__arm_vqshlq_u32): Likewise.
9331 (__arm_vqshlq_r_u32): Likewise.
9332 (__arm_vqrshlq_u32): Likewise.
9333 (__arm_vqrshlq_n_u32): Likewise.
9334 (__arm_vminavq_s32): Likewise.
9335 (__arm_vminaq_s32): Likewise.
9336 (__arm_vmaxavq_s32): Likewise.
9337 (__arm_vmaxaq_s32): Likewise.
9338 (__arm_vbrsrq_n_u32): Likewise.
9339 (__arm_vshlq_n_u32): Likewise.
9340 (__arm_vrshrq_n_u32): Likewise.
9341 (__arm_vqshlq_n_u32): Likewise.
9342 (__arm_vcmpneq_n_s32): Likewise.
9343 (__arm_vcmpltq_s32): Likewise.
9344 (__arm_vcmpltq_n_s32): Likewise.
9345 (__arm_vcmpleq_s32): Likewise.
9346 (__arm_vcmpleq_n_s32): Likewise.
9347 (__arm_vcmpgtq_s32): Likewise.
9348 (__arm_vcmpgtq_n_s32): Likewise.
9349 (__arm_vcmpgeq_s32): Likewise.
9350 (__arm_vcmpgeq_n_s32): Likewise.
9351 (__arm_vcmpeqq_s32): Likewise.
9352 (__arm_vcmpeqq_n_s32): Likewise.
9353 (__arm_vqshluq_n_s32): Likewise.
9354 (__arm_vaddvq_p_s32): Likewise.
9355 (__arm_vsubq_s32): Likewise.
9356 (__arm_vsubq_n_s32): Likewise.
9357 (__arm_vshlq_r_s32): Likewise.
9358 (__arm_vrshlq_s32): Likewise.
9359 (__arm_vrshlq_n_s32): Likewise.
9360 (__arm_vrmulhq_s32): Likewise.
9361 (__arm_vrhaddq_s32): Likewise.
9362 (__arm_vqsubq_s32): Likewise.
9363 (__arm_vqsubq_n_s32): Likewise.
9364 (__arm_vqshlq_s32): Likewise.
9365 (__arm_vqshlq_r_s32): Likewise.
9366 (__arm_vqrshlq_s32): Likewise.
9367 (__arm_vqrshlq_n_s32): Likewise.
9368 (__arm_vqrdmulhq_s32): Likewise.
9369 (__arm_vqrdmulhq_n_s32): Likewise.
9370 (__arm_vqdmulhq_s32): Likewise.
9371 (__arm_vqdmulhq_n_s32): Likewise.
9372 (__arm_vqaddq_s32): Likewise.
9373 (__arm_vqaddq_n_s32): Likewise.
9374 (__arm_vorrq_s32): Likewise.
9375 (__arm_vornq_s32): Likewise.
9376 (__arm_vmulq_s32): Likewise.
9377 (__arm_vmulq_n_s32): Likewise.
9378 (__arm_vmulltq_int_s32): Likewise.
9379 (__arm_vmullbq_int_s32): Likewise.
9380 (__arm_vmulhq_s32): Likewise.
9381 (__arm_vmlsdavxq_s32): Likewise.
9382 (__arm_vmlsdavq_s32): Likewise.
9383 (__arm_vmladavxq_s32): Likewise.
9384 (__arm_vmladavq_s32): Likewise.
9385 (__arm_vminvq_s32): Likewise.
9386 (__arm_vminq_s32): Likewise.
9387 (__arm_vmaxvq_s32): Likewise.
9388 (__arm_vmaxq_s32): Likewise.
9389 (__arm_vhsubq_s32): Likewise.
9390 (__arm_vhsubq_n_s32): Likewise.
9391 (__arm_vhcaddq_rot90_s32): Likewise.
9392 (__arm_vhcaddq_rot270_s32): Likewise.
9393 (__arm_vhaddq_s32): Likewise.
9394 (__arm_vhaddq_n_s32): Likewise.
9395 (__arm_veorq_s32): Likewise.
9396 (__arm_vcaddq_rot90_s32): Likewise.
9397 (__arm_vcaddq_rot270_s32): Likewise.
9398 (__arm_vbrsrq_n_s32): Likewise.
9399 (__arm_vbicq_s32): Likewise.
9400 (__arm_vandq_s32): Likewise.
9401 (__arm_vaddvaq_s32): Likewise.
9402 (__arm_vaddq_n_s32): Likewise.
9403 (__arm_vabdq_s32): Likewise.
9404 (__arm_vshlq_n_s32): Likewise.
9405 (__arm_vrshrq_n_s32): Likewise.
9406 (__arm_vqshlq_n_s32): Likewise.
9407 (vsubq): Define polymorphic variant.
9408 (vsubq_n): Likewise.
9409 (vshlq_r): Likewise.
9410 (vrshlq_n): Likewise.
9412 (vrmulhq): Likewise.
9413 (vrhaddq): Likewise.
9414 (vqsubq_n): Likewise.
9417 (vqshlq_r): Likewise.
9418 (vqshluq): Likewise.
9419 (vrshrq_n): Likewise.
9420 (vshlq_n): Likewise.
9421 (vqshluq_n): Likewise.
9422 (vqshlq_n): Likewise.
9423 (vqrshlq_n): Likewise.
9424 (vqrshlq): Likewise.
9425 (vqrdmulhq_n): Likewise.
9426 (vqrdmulhq): Likewise.
9427 (vqdmulhq_n): Likewise.
9428 (vqdmulhq): Likewise.
9429 (vqaddq_n): Likewise.
9431 (vorrq_n): Likewise.
9434 (vmulq_n): Likewise.
9436 (vmulltq_int): Likewise.
9437 (vmullbq_int): Likewise.
9443 (vhsubq_n): Likewise.
9445 (vhcaddq_rot90): Likewise.
9446 (vhcaddq_rot270): Likewise.
9447 (vhaddq_n): Likewise.
9450 (vcaddq_rot90): Likewise.
9451 (vcaddq_rot270): Likewise.
9452 (vbrsrq_n): Likewise.
9453 (vbicq_n): Likewise.
9456 (vaddq_n): Likewise.
9459 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
9460 (BINOP_NONE_NONE_NONE): Likewise.
9461 (BINOP_NONE_NONE_UNONE): Likewise.
9462 (BINOP_UNONE_NONE_IMM): Likewise.
9463 (BINOP_UNONE_NONE_NONE): Likewise.
9464 (BINOP_UNONE_UNONE_IMM): Likewise.
9465 (BINOP_UNONE_UNONE_NONE): Likewise.
9466 (BINOP_UNONE_UNONE_UNONE): Likewise.
9467 * config/arm/constraints.md (Ra): Define constraint to check constant is
9468 in the range of 0 to 7.
9469 (Rg): Define constriant to check the constant is one among 1, 2, 4
9471 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
9472 (mve_vaddq_n_<supf>): Likewise.
9473 (mve_vaddvaq_<supf>): Likewise.
9474 (mve_vaddvq_p_<supf>): Likewise.
9475 (mve_vandq_<supf>): Likewise.
9476 (mve_vbicq_<supf>): Likewise.
9477 (mve_vbrsrq_n_<supf>): Likewise.
9478 (mve_vcaddq_rot270_<supf>): Likewise.
9479 (mve_vcaddq_rot90_<supf>): Likewise.
9480 (mve_vcmpcsq_n_u): Likewise.
9481 (mve_vcmpcsq_u): Likewise.
9482 (mve_vcmpeqq_n_<supf>): Likewise.
9483 (mve_vcmpeqq_<supf>): Likewise.
9484 (mve_vcmpgeq_n_s): Likewise.
9485 (mve_vcmpgeq_s): Likewise.
9486 (mve_vcmpgtq_n_s): Likewise.
9487 (mve_vcmpgtq_s): Likewise.
9488 (mve_vcmphiq_n_u): Likewise.
9489 (mve_vcmphiq_u): Likewise.
9490 (mve_vcmpleq_n_s): Likewise.
9491 (mve_vcmpleq_s): Likewise.
9492 (mve_vcmpltq_n_s): Likewise.
9493 (mve_vcmpltq_s): Likewise.
9494 (mve_vcmpneq_n_<supf>): Likewise.
9495 (mve_vddupq_n_u): Likewise.
9496 (mve_veorq_<supf>): Likewise.
9497 (mve_vhaddq_n_<supf>): Likewise.
9498 (mve_vhaddq_<supf>): Likewise.
9499 (mve_vhcaddq_rot270_s): Likewise.
9500 (mve_vhcaddq_rot90_s): Likewise.
9501 (mve_vhsubq_n_<supf>): Likewise.
9502 (mve_vhsubq_<supf>): Likewise.
9503 (mve_vidupq_n_u): Likewise.
9504 (mve_vmaxaq_s): Likewise.
9505 (mve_vmaxavq_s): Likewise.
9506 (mve_vmaxq_<supf>): Likewise.
9507 (mve_vmaxvq_<supf>): Likewise.
9508 (mve_vminaq_s): Likewise.
9509 (mve_vminavq_s): Likewise.
9510 (mve_vminq_<supf>): Likewise.
9511 (mve_vminvq_<supf>): Likewise.
9512 (mve_vmladavq_<supf>): Likewise.
9513 (mve_vmladavxq_s): Likewise.
9514 (mve_vmlsdavq_s): Likewise.
9515 (mve_vmlsdavxq_s): Likewise.
9516 (mve_vmulhq_<supf>): Likewise.
9517 (mve_vmullbq_int_<supf>): Likewise.
9518 (mve_vmulltq_int_<supf>): Likewise.
9519 (mve_vmulq_n_<supf>): Likewise.
9520 (mve_vmulq_<supf>): Likewise.
9521 (mve_vornq_<supf>): Likewise.
9522 (mve_vorrq_<supf>): Likewise.
9523 (mve_vqaddq_n_<supf>): Likewise.
9524 (mve_vqaddq_<supf>): Likewise.
9525 (mve_vqdmulhq_n_s): Likewise.
9526 (mve_vqdmulhq_s): Likewise.
9527 (mve_vqrdmulhq_n_s): Likewise.
9528 (mve_vqrdmulhq_s): Likewise.
9529 (mve_vqrshlq_n_<supf>): Likewise.
9530 (mve_vqrshlq_<supf>): Likewise.
9531 (mve_vqshlq_n_<supf>): Likewise.
9532 (mve_vqshlq_r_<supf>): Likewise.
9533 (mve_vqshlq_<supf>): Likewise.
9534 (mve_vqshluq_n_s): Likewise.
9535 (mve_vqsubq_n_<supf>): Likewise.
9536 (mve_vqsubq_<supf>): Likewise.
9537 (mve_vrhaddq_<supf>): Likewise.
9538 (mve_vrmulhq_<supf>): Likewise.
9539 (mve_vrshlq_n_<supf>): Likewise.
9540 (mve_vrshlq_<supf>): Likewise.
9541 (mve_vrshrq_n_<supf>): Likewise.
9542 (mve_vshlq_n_<supf>): Likewise.
9543 (mve_vshlq_r_<supf>): Likewise.
9544 (mve_vsubq_n_<supf>): Likewise.
9545 (mve_vsubq_<supf>): Likewise.
9546 * config/arm/predicates.md (mve_imm_7): Define predicate to check
9547 the matching constraint Ra.
9548 (mve_imm_selective_upto_8): Define predicate to check the matching
9551 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9552 Mihail Ionescu <mihail.ionescu@arm.com>
9553 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9555 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
9556 qualifier for binary operands.
9557 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9558 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9559 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
9560 (vaddlvq_p_u32): Likewise.
9561 (vcmpneq_s8): Likewise.
9562 (vcmpneq_s16): Likewise.
9563 (vcmpneq_s32): Likewise.
9564 (vcmpneq_u8): Likewise.
9565 (vcmpneq_u16): Likewise.
9566 (vcmpneq_u32): Likewise.
9567 (vshlq_s8): Likewise.
9568 (vshlq_s16): Likewise.
9569 (vshlq_s32): Likewise.
9570 (vshlq_u8): Likewise.
9571 (vshlq_u16): Likewise.
9572 (vshlq_u32): Likewise.
9573 (__arm_vaddlvq_p_s32): Define intrinsic.
9574 (__arm_vaddlvq_p_u32): Likewise.
9575 (__arm_vcmpneq_s8): Likewise.
9576 (__arm_vcmpneq_s16): Likewise.
9577 (__arm_vcmpneq_s32): Likewise.
9578 (__arm_vcmpneq_u8): Likewise.
9579 (__arm_vcmpneq_u16): Likewise.
9580 (__arm_vcmpneq_u32): Likewise.
9581 (__arm_vshlq_s8): Likewise.
9582 (__arm_vshlq_s16): Likewise.
9583 (__arm_vshlq_s32): Likewise.
9584 (__arm_vshlq_u8): Likewise.
9585 (__arm_vshlq_u16): Likewise.
9586 (__arm_vshlq_u32): Likewise.
9587 (vaddlvq_p): Define polymorphic variant.
9588 (vcmpneq): Likewise.
9590 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
9592 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
9593 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
9594 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
9595 (mve_vcmpneq_<supf><mode>): Likewise.
9596 (mve_vshlq_<supf><mode>): Likewise.
9598 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9599 Mihail Ionescu <mihail.ionescu@arm.com>
9600 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9602 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
9603 qualifier for binary operands.
9604 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9605 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9606 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
9607 (vcvtq_n_s32_f32): Likewise.
9608 (vcvtq_n_u16_f16): Likewise.
9609 (vcvtq_n_u32_f32): Likewise.
9610 (vcreateq_u8): Likewise.
9611 (vcreateq_u16): Likewise.
9612 (vcreateq_u32): Likewise.
9613 (vcreateq_u64): Likewise.
9614 (vcreateq_s8): Likewise.
9615 (vcreateq_s16): Likewise.
9616 (vcreateq_s32): Likewise.
9617 (vcreateq_s64): Likewise.
9618 (vshrq_n_s8): Likewise.
9619 (vshrq_n_s16): Likewise.
9620 (vshrq_n_s32): Likewise.
9621 (vshrq_n_u8): Likewise.
9622 (vshrq_n_u16): Likewise.
9623 (vshrq_n_u32): Likewise.
9624 (__arm_vcreateq_u8): Define intrinsic.
9625 (__arm_vcreateq_u16): Likewise.
9626 (__arm_vcreateq_u32): Likewise.
9627 (__arm_vcreateq_u64): Likewise.
9628 (__arm_vcreateq_s8): Likewise.
9629 (__arm_vcreateq_s16): Likewise.
9630 (__arm_vcreateq_s32): Likewise.
9631 (__arm_vcreateq_s64): Likewise.
9632 (__arm_vshrq_n_s8): Likewise.
9633 (__arm_vshrq_n_s16): Likewise.
9634 (__arm_vshrq_n_s32): Likewise.
9635 (__arm_vshrq_n_u8): Likewise.
9636 (__arm_vshrq_n_u16): Likewise.
9637 (__arm_vshrq_n_u32): Likewise.
9638 (__arm_vcvtq_n_s16_f16): Likewise.
9639 (__arm_vcvtq_n_s32_f32): Likewise.
9640 (__arm_vcvtq_n_u16_f16): Likewise.
9641 (__arm_vcvtq_n_u32_f32): Likewise.
9642 (vshrq_n): Define polymorphic variant.
9643 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
9645 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
9646 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
9647 * config/arm/constraints.md (Rb): Define constraint to check constant is
9648 in the range of 1 to 8.
9649 (Rf): Define constraint to check constant is in the range of 1 to 32.
9650 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
9651 (mve_vshrq_n_<supf><mode>): Likewise.
9652 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
9653 * config/arm/predicates.md (mve_imm_8): Define predicate to check
9654 the matching constraint Rb.
9655 (mve_imm_32): Define predicate to check the matching constraint Rf.
9657 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9658 Mihail Ionescu <mihail.ionescu@arm.com>
9659 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9661 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
9662 qualifier for binary operands.
9663 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9664 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9665 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9666 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
9667 (vsubq_n_f32): Likewise.
9668 (vbrsrq_n_f16): Likewise.
9669 (vbrsrq_n_f32): Likewise.
9670 (vcvtq_n_f16_s16): Likewise.
9671 (vcvtq_n_f32_s32): Likewise.
9672 (vcvtq_n_f16_u16): Likewise.
9673 (vcvtq_n_f32_u32): Likewise.
9674 (vcreateq_f16): Likewise.
9675 (vcreateq_f32): Likewise.
9676 (__arm_vsubq_n_f16): Define intrinsic.
9677 (__arm_vsubq_n_f32): Likewise.
9678 (__arm_vbrsrq_n_f16): Likewise.
9679 (__arm_vbrsrq_n_f32): Likewise.
9680 (__arm_vcvtq_n_f16_s16): Likewise.
9681 (__arm_vcvtq_n_f32_s32): Likewise.
9682 (__arm_vcvtq_n_f16_u16): Likewise.
9683 (__arm_vcvtq_n_f32_u32): Likewise.
9684 (__arm_vcreateq_f16): Likewise.
9685 (__arm_vcreateq_f32): Likewise.
9686 (vsubq): Define polymorphic variant.
9688 (vcvtq_n): Likewise.
9689 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
9691 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
9692 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
9693 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
9694 * config/arm/constraints.md (Rd): Define constraint to check constant is
9695 in the range of 1 to 16.
9696 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
9697 mve_vbrsrq_n_f<mode>: Likewise.
9698 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
9699 mve_vcreateq_f<mode>: Likewise.
9700 * config/arm/predicates.md (mve_imm_16): Define predicate to check
9701 the matching constraint Rd.
9703 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9704 Mihail Ionescu <mihail.ionescu@arm.com>
9705 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9707 * config/arm/arm-builtins.c (hi_UP): Define mode.
9708 * config/arm/arm.h (IS_VPR_REGNUM): Move.
9709 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
9710 (APSRQ_REGNUM): Modify.
9711 (APSRGE_REGNUM): Modify.
9712 * config/arm/arm_mve.h (vctp16q): Define macro.
9713 (vctp32q): Likewise.
9714 (vctp64q): Likewise.
9717 (__arm_vctp16q): Define intrinsic.
9718 (__arm_vctp32q): Likewise.
9719 (__arm_vctp64q): Likewise.
9720 (__arm_vctp8q): Likewise.
9721 (__arm_vpnot): Likewise.
9722 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
9724 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
9725 (mve_vpnothi): Likewise.
9727 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9728 Mihail Ionescu <mihail.ionescu@arm.com>
9729 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9731 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
9732 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
9733 (vdupq_n_s16): Likewise.
9734 (vdupq_n_s32): Likewise.
9735 (vabsq_s8): Likewise.
9736 (vabsq_s16): Likewise.
9737 (vabsq_s32): Likewise.
9738 (vclsq_s8): Likewise.
9739 (vclsq_s16): Likewise.
9740 (vclsq_s32): Likewise.
9741 (vclzq_s8): Likewise.
9742 (vclzq_s16): Likewise.
9743 (vclzq_s32): Likewise.
9744 (vnegq_s8): Likewise.
9745 (vnegq_s16): Likewise.
9746 (vnegq_s32): Likewise.
9747 (vaddlvq_s32): Likewise.
9748 (vaddvq_s8): Likewise.
9749 (vaddvq_s16): Likewise.
9750 (vaddvq_s32): Likewise.
9751 (vmovlbq_s8): Likewise.
9752 (vmovlbq_s16): Likewise.
9753 (vmovltq_s8): Likewise.
9754 (vmovltq_s16): Likewise.
9755 (vmvnq_s8): Likewise.
9756 (vmvnq_s16): Likewise.
9757 (vmvnq_s32): Likewise.
9758 (vrev16q_s8): Likewise.
9759 (vrev32q_s8): Likewise.
9760 (vrev32q_s16): Likewise.
9761 (vqabsq_s8): Likewise.
9762 (vqabsq_s16): Likewise.
9763 (vqabsq_s32): Likewise.
9764 (vqnegq_s8): Likewise.
9765 (vqnegq_s16): Likewise.
9766 (vqnegq_s32): Likewise.
9767 (vcvtaq_s16_f16): Likewise.
9768 (vcvtaq_s32_f32): Likewise.
9769 (vcvtnq_s16_f16): Likewise.
9770 (vcvtnq_s32_f32): Likewise.
9771 (vcvtpq_s16_f16): Likewise.
9772 (vcvtpq_s32_f32): Likewise.
9773 (vcvtmq_s16_f16): Likewise.
9774 (vcvtmq_s32_f32): Likewise.
9775 (vmvnq_u8): Likewise.
9776 (vmvnq_u16): Likewise.
9777 (vmvnq_u32): Likewise.
9778 (vdupq_n_u8): Likewise.
9779 (vdupq_n_u16): Likewise.
9780 (vdupq_n_u32): Likewise.
9781 (vclzq_u8): Likewise.
9782 (vclzq_u16): Likewise.
9783 (vclzq_u32): Likewise.
9784 (vaddvq_u8): Likewise.
9785 (vaddvq_u16): Likewise.
9786 (vaddvq_u32): Likewise.
9787 (vrev32q_u8): Likewise.
9788 (vrev32q_u16): Likewise.
9789 (vmovltq_u8): Likewise.
9790 (vmovltq_u16): Likewise.
9791 (vmovlbq_u8): Likewise.
9792 (vmovlbq_u16): Likewise.
9793 (vrev16q_u8): Likewise.
9794 (vaddlvq_u32): Likewise.
9795 (vcvtpq_u16_f16): Likewise.
9796 (vcvtpq_u32_f32): Likewise.
9797 (vcvtnq_u16_f16): Likewise.
9798 (vcvtmq_u16_f16): Likewise.
9799 (vcvtmq_u32_f32): Likewise.
9800 (vcvtaq_u16_f16): Likewise.
9801 (vcvtaq_u32_f32): Likewise.
9802 (__arm_vdupq_n_s8): Define intrinsic.
9803 (__arm_vdupq_n_s16): Likewise.
9804 (__arm_vdupq_n_s32): Likewise.
9805 (__arm_vabsq_s8): Likewise.
9806 (__arm_vabsq_s16): Likewise.
9807 (__arm_vabsq_s32): Likewise.
9808 (__arm_vclsq_s8): Likewise.
9809 (__arm_vclsq_s16): Likewise.
9810 (__arm_vclsq_s32): Likewise.
9811 (__arm_vclzq_s8): Likewise.
9812 (__arm_vclzq_s16): Likewise.
9813 (__arm_vclzq_s32): Likewise.
9814 (__arm_vnegq_s8): Likewise.
9815 (__arm_vnegq_s16): Likewise.
9816 (__arm_vnegq_s32): Likewise.
9817 (__arm_vaddlvq_s32): Likewise.
9818 (__arm_vaddvq_s8): Likewise.
9819 (__arm_vaddvq_s16): Likewise.
9820 (__arm_vaddvq_s32): Likewise.
9821 (__arm_vmovlbq_s8): Likewise.
9822 (__arm_vmovlbq_s16): Likewise.
9823 (__arm_vmovltq_s8): Likewise.
9824 (__arm_vmovltq_s16): Likewise.
9825 (__arm_vmvnq_s8): Likewise.
9826 (__arm_vmvnq_s16): Likewise.
9827 (__arm_vmvnq_s32): Likewise.
9828 (__arm_vrev16q_s8): Likewise.
9829 (__arm_vrev32q_s8): Likewise.
9830 (__arm_vrev32q_s16): Likewise.
9831 (__arm_vqabsq_s8): Likewise.
9832 (__arm_vqabsq_s16): Likewise.
9833 (__arm_vqabsq_s32): Likewise.
9834 (__arm_vqnegq_s8): Likewise.
9835 (__arm_vqnegq_s16): Likewise.
9836 (__arm_vqnegq_s32): Likewise.
9837 (__arm_vmvnq_u8): Likewise.
9838 (__arm_vmvnq_u16): Likewise.
9839 (__arm_vmvnq_u32): Likewise.
9840 (__arm_vdupq_n_u8): Likewise.
9841 (__arm_vdupq_n_u16): Likewise.
9842 (__arm_vdupq_n_u32): Likewise.
9843 (__arm_vclzq_u8): Likewise.
9844 (__arm_vclzq_u16): Likewise.
9845 (__arm_vclzq_u32): Likewise.
9846 (__arm_vaddvq_u8): Likewise.
9847 (__arm_vaddvq_u16): Likewise.
9848 (__arm_vaddvq_u32): Likewise.
9849 (__arm_vrev32q_u8): Likewise.
9850 (__arm_vrev32q_u16): Likewise.
9851 (__arm_vmovltq_u8): Likewise.
9852 (__arm_vmovltq_u16): Likewise.
9853 (__arm_vmovlbq_u8): Likewise.
9854 (__arm_vmovlbq_u16): Likewise.
9855 (__arm_vrev16q_u8): Likewise.
9856 (__arm_vaddlvq_u32): Likewise.
9857 (__arm_vcvtpq_u16_f16): Likewise.
9858 (__arm_vcvtpq_u32_f32): Likewise.
9859 (__arm_vcvtnq_u16_f16): Likewise.
9860 (__arm_vcvtmq_u16_f16): Likewise.
9861 (__arm_vcvtmq_u32_f32): Likewise.
9862 (__arm_vcvtaq_u16_f16): Likewise.
9863 (__arm_vcvtaq_u32_f32): Likewise.
9864 (__arm_vcvtaq_s16_f16): Likewise.
9865 (__arm_vcvtaq_s32_f32): Likewise.
9866 (__arm_vcvtnq_s16_f16): Likewise.
9867 (__arm_vcvtnq_s32_f32): Likewise.
9868 (__arm_vcvtpq_s16_f16): Likewise.
9869 (__arm_vcvtpq_s32_f32): Likewise.
9870 (__arm_vcvtmq_s16_f16): Likewise.
9871 (__arm_vcvtmq_s32_f32): Likewise.
9872 (vdupq_n): Define polymorphic variant.
9877 (vaddlvq): Likewise.
9879 (vmovlbq): Likewise.
9880 (vmovltq): Likewise.
9882 (vrev16q): Likewise.
9883 (vrev32q): Likewise.
9886 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
9887 (UNOP_SNONE_NONE): Likewise.
9888 (UNOP_UNONE_UNONE): Likewise.
9889 (UNOP_UNONE_NONE): Likewise.
9890 * config/arm/constraints.md (e): Define new constriant to allow only
9892 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
9893 (mve_vnegq_s<mode>): Likewise.
9894 (mve_vmvnq_<supf><mode>): Likewise.
9895 (mve_vdupq_n_<supf><mode>): Likewise.
9896 (mve_vclzq_<supf><mode>): Likewise.
9897 (mve_vclsq_s<mode>): Likewise.
9898 (mve_vaddvq_<supf><mode>): Likewise.
9899 (mve_vabsq_s<mode>): Likewise.
9900 (mve_vrev32q_<supf><mode>): Likewise.
9901 (mve_vmovltq_<supf><mode>): Likewise.
9902 (mve_vmovlbq_<supf><mode>): Likewise.
9903 (mve_vcvtpq_<supf><mode>): Likewise.
9904 (mve_vcvtnq_<supf><mode>): Likewise.
9905 (mve_vcvtmq_<supf><mode>): Likewise.
9906 (mve_vcvtaq_<supf><mode>): Likewise.
9907 (mve_vrev16q_<supf>v16qi): Likewise.
9908 (mve_vaddlvq_<supf>v4si): Likewise.
9910 2020-03-17 Jakub Jelinek <jakub@redhat.com>
9912 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
9914 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
9916 * read-rtl-function.c (find_param_by_name,
9917 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
9919 * spellcheck.c (get_edit_distance_cutoff): Likewise.
9920 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
9921 * tree.def (SWITCH_EXPR): Likewise.
9922 * selftest.c (assert_str_contains): Likewise.
9923 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
9925 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
9926 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
9927 * langhooks.h (struct lang_hooks_for_decls): Likewise.
9928 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
9929 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
9931 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
9932 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
9933 * tree.c (component_ref_size): Likewise.
9934 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
9935 * gimple-ssa-sprintf.c (get_string_length, format_string,
9936 format_directive): Likewise.
9937 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
9938 * input.c (string_concat_db::get_string_concatenation,
9939 test_lexer_string_locations_ucn4): Likewise.
9940 * cfgexpand.c (pass_expand::execute): Likewise.
9941 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
9942 maybe_diag_overlap): Likewise.
9943 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
9944 * shrink-wrap.c (spread_components): Likewise.
9945 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
9947 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
9949 * dwarf2out.c (dwarf2out_early_finish): Likewise.
9950 * gimple-ssa-store-merging.c: Likewise.
9951 * ira-costs.c (record_operand_costs): Likewise.
9952 * tree-vect-loop.c (vectorizable_reduction): Likewise.
9953 * target.def (dispatch): Likewise.
9954 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
9955 in documentation text.
9956 * doc/tm.texi: Regenerated.
9957 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
9958 duplicated word issue in a comment.
9959 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
9960 * config/i386/i386-features.c (remove_partial_avx_dependency):
9962 * config/msp430/msp430.c (msp430_select_section): Likewise.
9963 * config/gcn/gcn-run.c (load_image): Likewise.
9964 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
9965 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
9966 * config/aarch64/falkor-tag-collision-avoidance.c
9967 (single_dest_per_chain): Likewise.
9968 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
9969 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
9970 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
9971 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
9973 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
9974 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
9975 * config/rs6000/rs6000-logue.c
9976 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
9977 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
9978 Fix various other issues in the comment.
9980 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
9982 * config/arm/t-rmprofile: create new multilib for
9983 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
9986 2020-03-17 Jakub Jelinek <jakub@redhat.com>
9988 PR tree-optimization/94015
9989 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
9990 function where EXP is address of the bytes being stored rather than
9991 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
9992 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
9993 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
9994 calling native_encode_expr if host or target doesn't have 8-bit
9995 chars. Formatting fixes.
9996 (count_nonzero_bytes_addr): New function.
9998 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9999 Mihail Ionescu <mihail.ionescu@arm.com>
10000 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10002 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
10003 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
10004 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
10005 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
10006 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
10007 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
10008 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
10009 (vmvnq_n_s32): Likewise.
10010 (vrev64q_s8): Likewise.
10011 (vrev64q_s16): Likewise.
10012 (vrev64q_s32): Likewise.
10013 (vcvtq_s16_f16): Likewise.
10014 (vcvtq_s32_f32): Likewise.
10015 (vrev64q_u8): Likewise.
10016 (vrev64q_u16): Likewise.
10017 (vrev64q_u32): Likewise.
10018 (vmvnq_n_u16): Likewise.
10019 (vmvnq_n_u32): Likewise.
10020 (vcvtq_u16_f16): Likewise.
10021 (vcvtq_u32_f32): Likewise.
10022 (__arm_vmvnq_n_s16): Define intrinsic.
10023 (__arm_vmvnq_n_s32): Likewise.
10024 (__arm_vrev64q_s8): Likewise.
10025 (__arm_vrev64q_s16): Likewise.
10026 (__arm_vrev64q_s32): Likewise.
10027 (__arm_vrev64q_u8): Likewise.
10028 (__arm_vrev64q_u16): Likewise.
10029 (__arm_vrev64q_u32): Likewise.
10030 (__arm_vmvnq_n_u16): Likewise.
10031 (__arm_vmvnq_n_u32): Likewise.
10032 (__arm_vcvtq_s16_f16): Likewise.
10033 (__arm_vcvtq_s32_f32): Likewise.
10034 (__arm_vcvtq_u16_f16): Likewise.
10035 (__arm_vcvtq_u32_f32): Likewise.
10036 (vrev64q): Define polymorphic variant.
10037 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
10038 (UNOP_SNONE_NONE): Likewise.
10039 (UNOP_SNONE_IMM): Likewise.
10040 (UNOP_UNONE_UNONE): Likewise.
10041 (UNOP_UNONE_NONE): Likewise.
10042 (UNOP_UNONE_IMM): Likewise.
10043 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
10044 (mve_vcvtq_from_f_<supf><mode>): Likewise.
10045 (mve_vmvnq_n_<supf><mode>): Likewise.
10047 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10048 Mihail Ionescu <mihail.ionescu@arm.com>
10049 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10051 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
10052 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
10053 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
10054 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
10055 (vrndxq_f32): Likewise.
10056 (vrndq_f16) Likewise.
10057 (vrndq_f32): Likewise.
10058 (vrndpq_f16): Likewise.
10059 (vrndpq_f32): Likewise.
10060 (vrndnq_f16): Likewise.
10061 (vrndnq_f32): Likewise.
10062 (vrndmq_f16): Likewise.
10063 (vrndmq_f32): Likewise.
10064 (vrndaq_f16): Likewise.
10065 (vrndaq_f32): Likewise.
10066 (vrev64q_f16): Likewise.
10067 (vrev64q_f32): Likewise.
10068 (vnegq_f16): Likewise.
10069 (vnegq_f32): Likewise.
10070 (vdupq_n_f16): Likewise.
10071 (vdupq_n_f32): Likewise.
10072 (vabsq_f16): Likewise.
10073 (vabsq_f32): Likewise.
10074 (vrev32q_f16): Likewise.
10075 (vcvttq_f32_f16): Likewise.
10076 (vcvtbq_f32_f16): Likewise.
10077 (vcvtq_f16_s16): Likewise.
10078 (vcvtq_f32_s32): Likewise.
10079 (vcvtq_f16_u16): Likewise.
10080 (vcvtq_f32_u32): Likewise.
10081 (__arm_vrndxq_f16): Define intrinsic.
10082 (__arm_vrndxq_f32): Likewise.
10083 (__arm_vrndq_f16): Likewise.
10084 (__arm_vrndq_f32): Likewise.
10085 (__arm_vrndpq_f16): Likewise.
10086 (__arm_vrndpq_f32): Likewise.
10087 (__arm_vrndnq_f16): Likewise.
10088 (__arm_vrndnq_f32): Likewise.
10089 (__arm_vrndmq_f16): Likewise.
10090 (__arm_vrndmq_f32): Likewise.
10091 (__arm_vrndaq_f16): Likewise.
10092 (__arm_vrndaq_f32): Likewise.
10093 (__arm_vrev64q_f16): Likewise.
10094 (__arm_vrev64q_f32): Likewise.
10095 (__arm_vnegq_f16): Likewise.
10096 (__arm_vnegq_f32): Likewise.
10097 (__arm_vdupq_n_f16): Likewise.
10098 (__arm_vdupq_n_f32): Likewise.
10099 (__arm_vabsq_f16): Likewise.
10100 (__arm_vabsq_f32): Likewise.
10101 (__arm_vrev32q_f16): Likewise.
10102 (__arm_vcvttq_f32_f16): Likewise.
10103 (__arm_vcvtbq_f32_f16): Likewise.
10104 (__arm_vcvtq_f16_s16): Likewise.
10105 (__arm_vcvtq_f32_s32): Likewise.
10106 (__arm_vcvtq_f16_u16): Likewise.
10107 (__arm_vcvtq_f32_u32): Likewise.
10108 (vrndxq): Define polymorphic variants.
10110 (vrndpq): Likewise.
10111 (vrndnq): Likewise.
10112 (vrndmq): Likewise.
10113 (vrndaq): Likewise.
10114 (vrev64q): Likewise.
10117 (vrev32q): Likewise.
10118 (vcvtbq_f32): Likewise.
10119 (vcvttq_f32): Likewise.
10121 * config/arm/arm_mve_builtins.def (VAR2): Define.
10123 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
10124 (mve_vrndq_f<mode>): Likewise.
10125 (mve_vrndpq_f<mode>): Likewise.
10126 (mve_vrndnq_f<mode>): Likewise.
10127 (mve_vrndmq_f<mode>): Likewise.
10128 (mve_vrndaq_f<mode>): Likewise.
10129 (mve_vrev64q_f<mode>): Likewise.
10130 (mve_vnegq_f<mode>): Likewise.
10131 (mve_vdupq_n_f<mode>): Likewise.
10132 (mve_vabsq_f<mode>): Likewise.
10133 (mve_vrev32q_fv8hf): Likewise.
10134 (mve_vcvttq_f32_f16v4sf): Likewise.
10135 (mve_vcvtbq_f32_f16v4sf): Likewise.
10136 (mve_vcvtq_to_f_<supf><mode>): Likewise.
10138 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10139 Mihail Ionescu <mihail.ionescu@arm.com>
10140 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10142 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
10144 (ARM_BUILTIN_MVE_PATTERN_START): Define.
10145 (arm_init_mve_builtins): Define function.
10146 (arm_init_builtins): Add TARGET_HAVE_MVE check.
10147 (arm_expand_builtin_1): Check the range of fcode.
10148 (arm_expand_mve_builtin): Define function to expand MVE builtins.
10149 (arm_expand_builtin): Check the range of fcode.
10150 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
10152 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
10153 (vst4q_s8): Define macro.
10154 (vst4q_s16): Likewise.
10155 (vst4q_s32): Likewise.
10156 (vst4q_u8): Likewise.
10157 (vst4q_u16): Likewise.
10158 (vst4q_u32): Likewise.
10159 (vst4q_f16): Likewise.
10160 (vst4q_f32): Likewise.
10161 (__arm_vst4q_s8): Define inline builtin.
10162 (__arm_vst4q_s16): Likewise.
10163 (__arm_vst4q_s32): Likewise.
10164 (__arm_vst4q_u8): Likewise.
10165 (__arm_vst4q_u16): Likewise.
10166 (__arm_vst4q_u32): Likewise.
10167 (__arm_vst4q_f16): Likewise.
10168 (__arm_vst4q_f32): Likewise.
10169 (__ARM_mve_typeid): Define macro with MVE types.
10170 (__ARM_mve_coerce): Define macro with _Generic feature.
10171 (vst4q): Define polymorphic variant for different vst4q builtins.
10172 * config/arm/arm_mve_builtins.def: New file.
10173 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
10175 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
10176 (unspec): Define unspec.
10177 (mve_vst4q<mode>): Define RTL pattern.
10178 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
10180 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
10182 (define_split): Allow OI mode split for MVE after reload.
10183 (define_split): Allow XI mode split for MVE after reload.
10184 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
10185 (arm-builtins.o): Likewise.
10187 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
10189 * c-typeck.c (process_init_element): Handle constructor_type with
10190 type size represented by POLY_INT_CST.
10192 2020-03-17 Jakub Jelinek <jakub@redhat.com>
10194 PR tree-optimization/94187
10195 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
10196 nchars - offset < nbytes.
10198 PR middle-end/94189
10199 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
10200 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
10201 for code-generation.
10203 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
10206 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
10207 after changing memory subreg.
10209 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10210 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10212 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
10213 emulator calls for dobule precision arithmetic operations for MVE.
10215 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10216 Mihail Ionescu <mihail.ionescu@arm.com>
10217 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10219 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
10220 feature bit is on and -mfpu=auto is passed as compiler option, do not
10221 generate error on not finding any matching fpu. Because in this case
10222 fpu is not required.
10223 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
10224 enabled for MVE and also for all VFP extensions.
10225 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
10227 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
10228 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
10229 along with feature bits mve_float.
10230 (mve): Modify add options in armv8.1-m.main arch for MVE.
10231 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
10233 * config/arm/arm.c (use_return_insn): Replace the
10234 check with TARGET_VFP_BASE.
10235 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
10237 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10238 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
10240 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
10241 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
10243 (arm_compute_frame_layout): Likewise.
10244 (arm_save_coproc_regs): Likewise.
10245 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
10247 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
10248 with equivalent macro TARGET_VFP_BASE.
10249 (arm_expand_epilogue_apcs_frame): Likewise.
10250 (arm_expand_epilogue): Likewise.
10251 (arm_conditional_register_usage): Likewise.
10252 (arm_declare_function_name): Add check to skip printing .fpu directive
10253 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
10255 * config/arm/arm.h (TARGET_VFP_BASE): Define.
10256 * config/arm/arm.md (arch): Add "mve" to arch.
10257 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
10258 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
10259 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
10260 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
10262 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
10263 to not allow for MVE.
10264 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
10266 (VUNSPEC_GET_FPSCR): Define.
10267 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
10268 instructions which move to general-purpose Register from Floating-point
10269 Special register and vice-versa.
10270 (thumb2_movhi_fp16): Likewise.
10271 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
10272 with MCR and MRC instructions which set and get Floating-point Status
10273 and Control Register (FPSCR).
10274 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
10276 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
10277 float move patterns in MVE.
10278 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
10279 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10280 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
10281 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
10282 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
10283 TARGET_VFP_BASE check.
10284 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
10285 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10287 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
10288 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
10292 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
10293 Mihail Ionescu <mihail.ionescu@arm.com>
10294 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10296 * config.gcc (arm_mve.h): Include mve intrinsics header file.
10297 * config/arm/aout.h (p0): Add new register name for MVE predicated
10299 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
10300 common to Neon and MVE.
10301 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
10302 (arm_init_simd_builtin_types): Disable poly types for MVE.
10303 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
10304 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
10305 ARM_BUILTIN_NEON_LANE_CHECK.
10306 (mve_dereference_pointer): Add function.
10307 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
10309 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
10310 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
10311 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
10312 with floating point enabled.
10313 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
10314 simd_immediate_valid_for_move.
10315 (simd_immediate_valid_for_move): Renamed from
10316 neon_immediate_valid_for_move function.
10317 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
10318 error if vfpv2 feature bit is disabled and mve feature bit is also
10319 disabled for HARD_FLOAT_ABI.
10320 (use_return_insn): Check to not push VFP regs for MVE.
10321 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
10323 (aapcs_vfp_allocate_return_reg): Likewise.
10324 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
10325 address operand for MVE.
10326 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
10327 (neon_valid_immediate): Rename to simd_valid_immediate.
10328 (simd_valid_immediate): Rename from neon_valid_immediate.
10329 (simd_valid_immediate): MVE check on size of vector is 128 bits.
10330 (neon_immediate_valid_for_move): Rename to
10331 simd_immediate_valid_for_move.
10332 (simd_immediate_valid_for_move): Rename from
10333 neon_immediate_valid_for_move.
10334 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
10336 (neon_make_constant): Modify call to neon_valid_immediate function.
10337 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
10339 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
10340 (arm_compute_frame_layout): Calculate space for saved VFP registers for
10342 (arm_save_coproc_regs): Save coproc registers for MVE.
10343 (arm_print_operand): Add case 'E' to print memory operands for MVE.
10344 (arm_print_operand_address): Check to print register number for MVE.
10345 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
10346 (arm_modes_tieable_p): Check to allow structure mode for MVE.
10347 (arm_regno_class): Add VPR_REGNUM check.
10348 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
10350 (arm_expand_epilogue): MVE check for enabling pop instructions in
10352 (arm_print_asm_arch_directives): Modify function to disable print of
10353 .arch_extension "mve" and "fp" for cases where MVE is enabled with
10355 (arm_vector_mode_supported_p): Check for modes available in MVE interger
10356 and MVE floating point.
10357 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
10359 (arm_conditional_register_usage): Enable usage of conditional regsiter
10361 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
10362 (arm_declare_function_name): Modify function to disable print of
10363 .arch_extension "mve" and "fp" for cases where MVE is enabled with
10365 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
10366 when target general registers are required.
10367 (TARGET_HAVE_MVE_FLOAT): Likewise.
10368 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
10370 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
10371 which indicate this is not available for across function calls.
10372 (FIRST_PSEUDO_REGISTER): Modify.
10373 (VALID_MVE_MODE): Define valid MVE mode.
10374 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
10375 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
10376 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
10377 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
10379 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
10380 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
10381 (enum reg_class): Add VPR_REG entry.
10382 (REG_CLASS_NAMES): Add VPR_REG entry.
10383 * config/arm/arm.md (VPR_REGNUM): Define.
10384 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
10385 "unconditional" instructions.
10386 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
10387 (movdf_soft_insn): Modify RTL to not allow for MVE.
10388 (vfp_pop_multiple_with_writeback): Enable for MVE.
10389 (include "mve.md"): Include mve.md file.
10390 * config/arm/arm_mve.h: Add MVE intrinsics head file.
10391 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
10392 for vector predicated operands.
10393 * config/arm/iterators.md (VNIM1): Define.
10394 (VNINOTM1): Define.
10395 (VHFBF_split): Define
10396 * config/arm/mve.md: New file.
10397 (mve_mov<mode>): Define RTL for move, store and load in MVE.
10398 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
10400 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
10401 simd_immediate_valid_for_move.
10402 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
10403 is common to MVE and NEON to vec-common.md file.
10404 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
10405 * config/arm/predicates.md (vpr_register_operand): Define.
10406 * config/arm/t-arm: Add mve.md file.
10407 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
10409 (mve_store): Add MVE instructions mve_store to attribute "type".
10410 (mve_load): Add MVE instructions mve_load to attribute "type".
10411 (is_mve_type): Define attribute.
10412 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
10413 standard move patterns in MVE along with NEON and IWMMXT with mode
10415 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
10416 and IWMMXT with mode iterator V8HF.
10417 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
10419 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
10420 simd_immediate_valid_for_move.
10423 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
10426 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
10427 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
10429 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
10431 2020-03-16 Jakub Jelinek <jakub@redhat.com>
10434 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
10437 PR tree-optimization/94166
10438 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
10439 as secondary comparison key.
10441 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
10443 PR tree-optimization/94125
10444 * tree-loop-distribution.c
10445 (loop_distribution::break_alias_scc_partitions): Update post order
10446 number for merged scc.
10448 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
10451 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
10453 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
10454 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
10455 and ext_sse_reg_operand check.
10457 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
10459 * common.opt: Avoid redundancy in the help text.
10460 * config/arc/arc.opt: Likewise.
10461 * config/cr16/cr16.opt: Likewise.
10463 2020-03-14 Jakub Jelinek <jakub@redhat.com>
10465 PR middle-end/93566
10466 * tree-nested.c (convert_nonlocal_omp_clauses,
10467 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
10468 with C/C++ array sections.
10470 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
10473 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
10474 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
10477 2020-03-14 Jakub Jelinek <jakub@redhat.com>
10479 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
10480 "a an" to "an" in a comment.
10481 * hsa-common.h (is_a_helper): Likewise.
10482 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
10483 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
10484 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
10486 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
10489 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
10490 64-bit value by 64 bits (UB).
10492 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
10494 PR rtl-optimization/92303
10495 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
10497 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
10499 PR rtl-optimization/94148
10500 PR rtl-optimization/94042
10501 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
10502 (df_worklist_propagate_forward): New parameter last_change_age, use
10503 that instead of bb->aux.
10504 (df_worklist_propagate_backward): Ditto.
10505 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
10507 2020-03-13 Richard Biener <rguenther@suse.de>
10509 PR tree-optimization/94163
10510 * tree-ssa-pre.c (create_expression_by_pieces): Check
10511 whether alignment would be zero.
10513 2020-03-13 Martin Liska <mliska@suse.cz>
10516 * lto-wrapper.c (run_gcc): Use concat for appending
10517 to collect_gcc_options.
10519 2020-03-13 Jakub Jelinek <jakub@redhat.com>
10522 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
10523 instead of GEN_INT.
10525 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
10528 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
10529 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
10530 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
10531 TARGET_AVX512VL and ext_sse_reg_operand check.
10533 2020-03-13 Bu Le <bule1@huawei.com>
10536 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
10537 (-param=aarch64-double-recp-precision=): New options.
10538 * doc/invoke.texi: Document them.
10539 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
10540 instead of hard-coding the choice of 1 for float and 2 for double.
10542 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
10544 PR rtl-optimization/94119
10545 * resource.h (clear_hashed_info_until_next_barrier): Declare.
10546 * resource.c (clear_hashed_info_until_next_barrier): New function.
10547 * reorg.c (add_to_delay_list): Fix formatting.
10548 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
10549 the next instruction after removing a BARRIER.
10551 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
10553 PR middle-end/92071
10554 * expmed.c (store_integral_bit_field): For fields larger than a word,
10555 call extract_bit_field on the value if the mode is BLKmode. Remove
10556 specific path for big-endian targets and tidy things up a little bit.
10558 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
10560 PR rtl-optimization/90275
10561 * cse.c (cse_insn): Delete no-op register moves too.
10563 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
10565 * config/rx/rx.md (CTRLREG_CPEN): Remove.
10566 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
10568 2020-03-12 Richard Biener <rguenther@suse.de>
10570 PR tree-optimization/94103
10571 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
10572 punning when the mode precision is not sufficient.
10574 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
10577 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
10578 MODE_V1DF and MODE_V2SF.
10579 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
10580 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
10583 2020-03-12 Jakub Jelinek <jakub@redhat.com>
10585 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
10586 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
10587 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
10588 * doc/tm.texi: Regenerated.
10590 PR tree-optimization/94130
10591 * tree-ssa-dse.c: Include gimplify.h.
10592 (increment_start_addr): If stmt has lhs, drop the lhs from call and
10593 set it after the call to the original value of the first argument.
10595 (decrement_count): Formatting fix.
10597 2020-03-11 Delia Burduv <delia.burduv@arm.com>
10599 * config/arm/arm-builtins.c
10600 (arm_init_simd_builtin_scalar_types): New.
10601 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
10602 (vld2q_bf16): Used new builtin type.
10603 (vld3_bf16): Used new builtin type.
10604 (vld3q_bf16): Used new builtin type.
10605 (vld4_bf16): Used new builtin type.
10606 (vld4q_bf16): Used new builtin type.
10607 (vld2_dup_bf16): Used new builtin type.
10608 (vld2q_dup_bf16): Used new builtin type.
10609 (vld3_dup_bf16): Used new builtin type.
10610 (vld3q_dup_bf16): Used new builtin type.
10611 (vld4_dup_bf16): Used new builtin type.
10612 (vld4q_dup_bf16): Used new builtin type.
10614 2020-03-11 Jakub Jelinek <jakub@redhat.com>
10617 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
10618 at the start to switch to data section. Don't print extra newline if
10619 .globl directive has not been emitted.
10621 2020-03-11 Richard Biener <rguenther@suse.de>
10623 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
10626 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
10628 PR middle-end/93961
10629 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
10630 whose type is a qualified union.
10632 2020-03-11 Jakub Jelinek <jakub@redhat.com>
10635 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
10636 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
10639 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
10641 (get_nth_most_common_value): Use abs_hwi instead of abs.
10643 PR middle-end/94111
10644 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
10645 is rvc_normal, otherwise use real_to_decimal to print the number to
10648 PR tree-optimization/94114
10649 * tree-loop-distribution.c (generate_memset_builtin): Call
10650 rewrite_to_non_trapping_overflow even on mem.
10651 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
10654 2020-03-10 Jeff Law <law@redhat.com>
10656 * config/bfin/bfin.md (movsi_insv): Add length attribute.
10658 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
10661 * gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
10662 NAN and SIGNED_ZEROR for smax/smin.
10664 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
10667 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
10668 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
10670 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
10672 * loop-iv.c (find_simple_exit): Make it static.
10673 * cfgloop.h: Remove the corresponding prototype.
10675 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
10677 * ddg.c (create_ddg): Fix intendation.
10678 (set_recurrence_length): Likewise.
10679 (create_ddg_all_sccs): Likewise.
10681 2020-03-10 Jakub Jelinek <jakub@redhat.com>
10684 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
10685 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
10688 2020-03-09 Jason Merrill <jason@redhat.com>
10690 * gdbinit.in (pgs): Fix typo in documentation.
10692 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
10696 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
10698 PR rtl-optimization/93564
10699 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
10700 do not honor reg alloc order.
10702 2020-03-09 Andrew Pinski <apinski@marvell.com>
10704 PR inline-asm/94095
10705 * doc/extend.texi (x86 Operand Modifiers): Fix column
10708 2020-03-09 Martin Liska <mliska@suse.cz>
10711 * config/rs6000/rs6000.c (rs6000_option_override_internal):
10712 Remove set of str_align_loops and str_align_jumps as these
10713 should be set in previous 2 conditions in the function.
10715 2020-03-09 Jakub Jelinek <jakub@redhat.com>
10717 PR rtl-optimization/94045
10718 * params.opt (-param=max-find-base-term-values=): New option.
10719 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
10720 in a single toplevel find_base_term call.
10722 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
10725 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
10726 * config/aarch64/aarch64-simd.md
10727 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
10728 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
10729 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
10730 * config/aarch64/arm_neon.h:
10731 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
10732 (vmlal_lane_u16): Likewise.
10733 (vmlal_lane_s32): Likewise.
10734 (vmlal_lane_u32): Likewise.
10735 (vmlal_laneq_s16): Likewise.
10736 (vmlal_laneq_u16): Likewise.
10737 (vmlal_laneq_s32): Likewise.
10738 (vmlal_laneq_u32): Likewise.
10739 (vmull_lane_s16): Likewise.
10740 (vmull_lane_u16): Likewise.
10741 (vmull_lane_s32): Likewise.
10742 (vmull_lane_u32): Likewise.
10743 (vmull_laneq_s16): Likewise.
10744 (vmull_laneq_u16): Likewise.
10745 (vmull_laneq_s32): Likewise.
10746 (vmull_laneq_u32): Likewise.
10747 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
10750 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
10752 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
10753 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
10754 (aarch64_mls_elt<mode>): Likewise.
10755 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
10756 (aarch64_fma4_elt<mode>): Likewise.
10757 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
10758 (aarch64_fma4_elt_to_64v2df): Likewise.
10759 (aarch64_fnma4_elt<mode>): Likewise.
10760 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
10761 (aarch64_fnma4_elt_to_64v2df): Likewise.
10763 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10765 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
10766 Specify movprfx attribute.
10767 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
10769 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
10772 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
10774 (TARGET_NO_FP_IN_TOC): Same.
10775 * config/rs6000/aix71.h: Same.
10776 * config/rs6000/aix72.h: Same.
10778 2020-03-06 Andrew Pinski <apinski@marvell.com>
10779 Jeff Law <law@redhat.com>
10781 PR rtl-optimization/93996
10782 * haifa-sched.c (remove_notes): Be more careful when adding
10785 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10787 * config/arm/arm_neon.h (vld2_bf16): New.
10793 (vld2_dup_bf16): New.
10794 (vld2q_dup_bf16): New.
10795 (vld3_dup_bf16): New.
10796 (vld3q_dup_bf16): New.
10797 (vld4_dup_bf16): New.
10798 (vld4q_dup_bf16): New.
10799 * config/arm/arm_neon_builtins.def
10800 (vld2): Changed to VAR13 and added v4bf, v8bf
10801 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
10802 (vld3): Changed to VAR13 and added v4bf, v8bf
10803 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
10804 (vld4): Changed to VAR13 and added v4bf, v8bf
10805 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
10806 * config/arm/iterators.md (VDXBF2): New iterator.
10807 *config/arm/neon.md (neon_vld2): Use new iterators.
10808 (neon_vld2_dup<mode): Use new iterators.
10809 (neon_vld3<mode>): Likewise.
10810 (neon_vld3qa<mode>): Likewise.
10811 (neon_vld3qb<mode>): Likewise.
10812 (neon_vld3_dup<mode>): Likewise.
10813 (neon_vld4<mode>): Likewise.
10814 (neon_vld4qa<mode>): Likewise.
10815 (neon_vld4qb<mode>): Likewise.
10816 (neon_vld4_dup<mode>): Likewise.
10817 (neon_vld2_dupv8bf): New.
10818 (neon_vld3_dupv8bf): Likewise.
10819 (neon_vld4_dupv8bf): Likewise.
10821 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10823 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
10824 (bfloat16x8x2_t): New typedef.
10825 (bfloat16x4x3_t): New typedef.
10826 (bfloat16x8x3_t): New typedef.
10827 (bfloat16x4x4_t): New typedef.
10828 (bfloat16x8x4_t): New typedef.
10835 * config/arm/arm-builtins.c (v2bf_UP): Define.
10837 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
10838 * config/arm/arm-modes.def (V2BF): New mode.
10839 * config/arm/arm-simd-builtin-types.def
10840 (Bfloat16x2_t): New entry.
10841 * config/arm/arm_neon_builtins.def
10842 (vst2): Changed to VAR13 and added v4bf, v8bf
10843 (vst3): Changed to VAR13 and added v4bf, v8bf
10844 (vst4): Changed to VAR13 and added v4bf, v8bf
10845 * config/arm/iterators.md (VDXBF): New iterator.
10846 (VQ2BF): New iterator.
10847 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
10848 (neon_vst2<mode>): Used new iterators.
10849 (neon_vst3<mode>): Used new iterators.
10850 (neon_vst3<mode>): Used new iterators.
10851 (neon_vst3qa<mode>): Used new iterators.
10852 (neon_vst3qb<mode>): Used new iterators.
10853 (neon_vst4<mode>): Used new iterators.
10854 (neon_vst4<mode>): Used new iterators.
10855 (neon_vst4qa<mode>): Used new iterators.
10856 (neon_vst4qb<mode>): Used new iterators.
10858 2020-03-06 Delia Burduv <delia.burduv@arm.com>
10860 * config/aarch64/aarch64-simd-builtins.def
10861 (bfcvtn): New built-in function.
10862 (bfcvtn_q): New built-in function.
10863 (bfcvtn2): New built-in function.
10864 (bfcvt): New built-in function.
10865 * config/aarch64/aarch64-simd.md
10866 (aarch64_bfcvtn<q><mode>): New pattern.
10867 (aarch64_bfcvtn2v8bf): New pattern.
10868 (aarch64_bfcvtbf): New pattern.
10869 * config/aarch64/arm_bf16.h (float32_t): New typedef.
10870 (vcvth_bf16_f32): New intrinsic.
10871 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
10872 (vcvtq_low_bf16_f32): New intrinsic.
10873 (vcvtq_high_bf16_f32): New intrinsic.
10874 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
10875 (UNSPEC_BFCVTN): New UNSPEC.
10876 (UNSPEC_BFCVTN2): New UNSPEC.
10877 (UNSPEC_BFCVT): New UNSPEC.
10878 * config/arm/types.md (bf_cvt): New type.
10880 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
10882 * config/s390/s390.md ("tabort"): Get rid of two consecutive
10883 blanks in format string.
10885 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
10889 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
10890 * config/i386/i386.c (ix86_get_ssemov): New function.
10891 (ix86_output_ssemov): Likewise.
10892 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
10893 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
10895 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
10896 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
10897 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
10898 (*movti_internal): Likewise.
10899 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
10901 2020-03-05 Jeff Law <law@redhat.com>
10903 PR tree-optimization/91890
10904 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
10905 Use gimple_or_expr_nonartificial_location.
10906 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
10907 Use gimple_or_expr_nonartificial_location.
10908 * gimple.c (gimple_or_expr_nonartificial_location): New function.
10909 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
10910 * tree-ssa-strlen.c (maybe_warn_overflow): Use
10911 gimple_or_expr_nonartificial_location.
10912 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
10913 (maybe_warn_pointless_strcmp): Likewise.
10915 2020-03-05 Jakub Jelinek <jakub@redhat.com>
10918 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
10919 SRC and MASK arguments to __m128 from __m128d.
10920 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
10922 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
10924 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
10925 argument to __m128i from __m128d.
10926 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
10928 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
10929 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
10932 2020-03-05 Delia Burduv <delia.burduv@arm.com>
10934 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
10935 (vbfmlalbq_f32): New.
10936 (vbfmlaltq_f32): New.
10937 (vbfmlalbq_lane_f32): New.
10938 (vbfmlaltq_lane_f32): New.
10939 (vbfmlalbq_laneq_f32): New.
10940 (vbfmlaltq_laneq_f32): New.
10941 * config/arm/arm_neon_builtins.def (vmmla): New.
10946 (vfmab_laneq): New.
10947 (vfmat_laneq): New.
10948 * config/arm/iterators.md (BF_MA): New int iterator.
10949 (bt): New int attribute.
10950 (VQXBF): Copy of VQX with V8BF.
10951 * config/arm/neon.md (neon_vmmlav8bf): New insn.
10952 (neon_vfma<bt>v8bf): New insn.
10953 (neon_vfma<bt>_lanev8bf): New insn.
10954 (neon_vfma<bt>_laneqv8bf): New expand.
10955 (neon_vget_high<mode>): Changed iterator to VQXBF.
10956 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
10957 (UNSPEC_BFMAB): New UNSPEC.
10958 (UNSPEC_BFMAT): New UNSPEC.
10960 2020-03-05 Jakub Jelinek <jakub@redhat.com>
10962 PR middle-end/93399
10963 * tree-pretty-print.h (pretty_print_string): Declare.
10964 * tree-pretty-print.c (pretty_print_string): Remove forward
10965 declaration, no longer static. Change nbytes parameter type
10966 from unsigned to size_t.
10967 * print-rtl.c (print_value) <case CONST_STRING>: Use
10968 pretty_print_string and for shrink way too long strings.
10970 2020-03-05 Richard Biener <rguenther@suse.de>
10971 Jakub Jelinek <jakub@redhat.com>
10973 PR tree-optimization/93582
10974 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
10975 last operand as signed when looking for memset offset. Formatting
10978 2020-03-04 Andrew Pinski <apinski@marvell.com>
10981 * value-prof.c (dump_histogram_value): Use std::abs.
10983 2020-03-04 Martin Sebor <msebor@redhat.com>
10985 PR tree-optimization/93986
10986 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
10987 operands to the same precision widest_int to avoid ICEs.
10989 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
10992 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
10993 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
10994 for OPTION_MASK_ALTIVEC.
10996 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
10998 * config.gcc: Include the glibc-stdint.h header for zTPF.
11000 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
11002 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
11003 direct FPR-GPR copies.
11004 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
11007 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
11009 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
11010 operands to the prologue_tpf expander.
11011 (s390_emit_epilogue): Likewise.
11012 (s390_option_override_internal): Do error checking and setup for
11014 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
11015 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
11016 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
11017 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
11018 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
11019 operands for the check flag and the branch target.
11020 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
11021 ("mtpf-trace-hook-prologue-target")
11022 ("mtpf-trace-hook-epilogue-check")
11023 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
11025 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
11026 options are for debugging purposes and will not be documented
11029 2020-03-04 Jakub Jelinek <jakub@redhat.com>
11032 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
11034 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
11035 argument. Change pd argument so that it can be modified. Turn
11036 constant non-CONSTRUCTOR store into non-constant if it is too large.
11037 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
11039 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
11042 2020-02-04 Richard Biener <rguenther@suse.de>
11044 PR tree-optimization/93964
11045 * graphite-isl-ast-to-gimple.c
11046 (gcc_expression_from_isl_ast_expr_id): Add intermediate
11047 conversion for pointer to integer converts.
11048 * graphite-scop-detection.c (assign_parameter_index_in_region):
11051 2020-03-04 Martin Liska <mliska@suse.cz>
11055 * doc/invoke.texi: Clarify --help=language and --help=common
11058 2020-03-04 Jakub Jelinek <jakub@redhat.com>
11060 PR tree-optimization/94001
11061 * tree-tailcall.c (process_assignment): Before comparing op1 to
11062 *ass_var, verify *ass_var is non-NULL.
11064 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
11067 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
11070 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
11072 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
11073 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
11074 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
11075 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
11076 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
11077 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
11078 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
11079 (V_bf_low, V_bf_cvt_m): New mode attributes.
11080 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
11081 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
11082 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
11083 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
11084 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
11086 2020-03-03 Jakub Jelinek <jakub@redhat.com>
11088 PR tree-optimization/93582
11089 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
11090 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
11091 members, initialize them in the constructor and if mask is non-NULL,
11092 artificially push_partial_def {} for the portions of the mask that
11094 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
11095 val and return (void *)-1. Formatting fix.
11096 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
11098 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
11099 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
11101 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
11103 (visit_stmt): Formatting fix.
11105 2020-03-03 Richard Biener <rguenther@suse.de>
11107 PR tree-optimization/93946
11108 * alias.h (refs_same_for_tbaa_p): Declare.
11109 * alias.c (refs_same_for_tbaa_p): New function.
11110 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
11112 * tree-ssa-scopedtables.h
11113 (avail_exprs_stack::lookup_avail_expr): Add output argument
11114 giving access to the hashtable entry.
11115 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
11117 * tree-ssa-dom.c: Include alias.h.
11118 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
11119 removing redundant store.
11120 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
11121 (ao_ref_init_from_vn_reference): Adjust prototype.
11122 (vn_reference_lookup_pieces): Likewise.
11123 (vn_reference_insert_pieces): Likewise.
11124 * tree-ssa-sccvn.c: Track base alias set in addition to alias
11126 (eliminate_dom_walker::eliminate_stmt): Also check base alias
11127 set when removing redundant stores.
11128 (visit_reference_op_store): Likewise.
11129 * dse.c (record_store): Adjust valdity check for redundant
11132 2020-03-03 Jakub Jelinek <jakub@redhat.com>
11135 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
11137 PR rtl-optimization/94002
11138 * explow.c (plus_constant): Punt if cst has VOIDmode and
11139 get_pool_mode is different from mode.
11141 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11143 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
11144 address has an offset which fits the scalling constraint for a
11145 load/store operation.
11146 (legitimate_scaled_address_p): Update use
11147 leigitimate_small_data_address_p.
11148 (arc_print_operand): Likewise.
11149 (arc_legitimate_address_p): Likewise.
11150 (legitimate_small_data_address_p): Likewise.
11152 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11154 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
11155 (fnmasf4_fpu): Likewise.
11157 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11159 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
11161 (subdi3): Likewise.
11162 (adddi3_i): Remove pattern.
11163 (subdi3_i): Likewise.
11165 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
11167 * config/arc/arc.md (eh_return): Add length info.
11169 2020-03-02 David Malcolm <dmalcolm@redhat.com>
11171 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
11173 2020-03-02 David Malcolm <dmalcolm@redhat.com>
11175 * doc/invoke.texi (Static Analyzer Options): Add
11176 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
11179 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
11182 * config/i386/i386.md (movstrict<mode>): Allow only
11183 registers with VALID_INT_MODE_P modes.
11185 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
11187 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
11188 (reduc_insn): Use 'U' and 'B' operand codes.
11189 (reduc_<reduc_op>_scal_<mode>): Allow all types.
11190 (reduc_<reduc_op>_scal_v64di): Delete.
11191 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
11192 (*plus_carry_dpp_shr_v64si): Change to ...
11193 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
11194 (mov_from_lane63_v64di): Change to ...
11195 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
11196 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
11197 Support UNSPEC_MOV_DPP_SHR output formats.
11198 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
11199 Add "use_extends" reductions.
11200 (print_operand_address): Add 'I' and 'U' codes.
11201 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
11203 2020-03-02 Martin Liska <mliska@suse.cz>
11205 * lto-wrapper.c: Fix typo in comment about
11206 C++ standard version.
11208 2020-03-01 Martin Sebor <msebor@redhat.com>
11211 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
11213 2020-03-01 Martin Sebor <msebor@redhat.com>
11215 PR middle-end/93829
11216 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
11217 of a pointer in the outermost ADDR_EXPRs.
11219 2020-02-28 Jeff Law <law@redhat.com>
11221 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
11222 * config/v850/v850.c (v850_asm_trampoline_template): Update
11225 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
11228 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
11231 2020-02-28 Martin Liska <mliska@suse.cz>
11234 * configure.ac: Improve detection of ld_date by requiring
11235 either two dashes or none.
11236 * configure: Regenerate.
11238 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
11240 PR rtl-optimization/93564
11241 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
11242 do not honor reg alloc order.
11244 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
11247 * config/aarch64/aarch64.c (aarch64_override_options): Fix
11248 misleading warning string.
11250 2020-02-27 Martin Sebor <msebor@redhat.com>
11252 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
11254 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
11257 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
11258 Split the insn into two parts. This insn only does variable
11259 extract from a register.
11260 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
11261 variable extract from memory.
11262 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
11263 only does variable extract from a register.
11264 (vsx_extract_v4sf_var_load): New insn, do variable extract from
11266 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
11267 into two parts. This insn only does variable extract from a
11269 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
11270 do variable extract from memory.
11272 2020-02-27 Martin Jambor <mjambor@suse.cz>
11273 Feng Xue <fxue@os.amperecomputing.com>
11276 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
11277 new function calls_same_node_or_its_all_contexts_clone_p.
11278 (cgraph_edge_brings_value_p): Use it.
11279 (cgraph_edge_brings_value_p): Likewise.
11280 (self_recursive_pass_through_p): Return false if caller is a clone.
11281 (self_recursive_agg_pass_through_p): Likewise.
11283 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
11285 PR middle-end/92152
11286 * alias.c (ends_tbaa_access_path_p): Break out from ...
11287 (component_uses_parent_alias_set_from): ... here.
11288 * alias.h (ends_tbaa_access_path_p): Declare.
11289 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
11290 handle trailing arrays past end of tbaa access path.
11291 (aliasing_component_refs_p): ... here; likewise.
11292 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
11293 path; disambiguate also past end of it.
11294 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
11297 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
11299 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
11300 beginning of the file.
11301 (vcreate_bf16, vcombine_bf16): New.
11302 (vdup_n_bf16, vdupq_n_bf16): New.
11303 (vdup_lane_bf16, vdup_laneq_bf16): New.
11304 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11305 (vduph_lane_bf16, vduph_laneq_bf16): New.
11306 (vset_lane_bf16, vsetq_lane_bf16): New.
11307 (vget_lane_bf16, vgetq_lane_bf16): New.
11308 (vget_high_bf16, vget_low_bf16): New.
11309 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11310 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11311 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11312 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11313 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11314 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11315 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11316 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11317 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11318 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11319 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
11320 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11321 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11322 (vreinterpretq_bf16_p128): New.
11323 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11324 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11325 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11326 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11327 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11328 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11329 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11330 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11331 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11332 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11333 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11334 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11335 (vreinterpretq_p128_bf16): New.
11336 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
11337 (V_elem): Likewise.
11338 (V_elem_l): Likewise.
11339 (VD_LANE): Likewise.
11341 (V_DOUBLE): Likewise.
11342 (VDQX): Add V4BF and V8BF.
11343 (V_two_elem, V_three_elem, V_four_elem): Likewise.
11345 (V_HALF): Likewise.
11346 (V_double_vector_mode): Likewise.
11347 (V_cmp_result): Likewise.
11348 (V_uf_sclr): Likewise.
11349 (V_sz_elem): Likewise.
11350 (Is_d_reg): Likewise.
11351 (V_mode_nunits): Likewise.
11352 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
11354 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
11356 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
11357 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
11358 (<expander><mode>3<exec>): Likewise.
11359 (<expander><mode>3): New.
11360 (v<expander><mode>3): New.
11361 (<expander><mode>3): New.
11362 (<expander><mode>3<exec>): Rename to ...
11363 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
11364 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
11366 2020-02-27 Alexandre Oliva <oliva@adacore.com>
11368 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
11371 2020-02-27 Richard Biener <rguenther@suse.de>
11373 PR tree-optimization/93508
11374 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
11375 non-_CHK variants. Valueize their length arguments.
11377 2020-02-27 Richard Biener <rguenther@suse.de>
11379 PR tree-optimization/93953
11380 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
11381 to the hash-map entry.
11383 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
11385 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
11387 2020-02-27 Mark Williams <mwilliams@fb.com>
11389 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
11390 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
11391 -ffile-prefix-map and -fmacro-prefix-map.
11392 * lto-streamer-out.c: Include file-prefix-map.h.
11393 (lto_output_location): Remap the file part of locations.
11395 2020-02-27 Jakub Jelinek <jakub@redhat.com>
11398 * gimplify.c (gimplify_init_constructor): Don't promote readonly
11399 DECL_REGISTER variables to TREE_STATIC.
11401 PR tree-optimization/93582
11402 PR tree-optimization/93945
11403 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
11404 non-zero INTEGER_CST second argument and ref->offset or ref->size
11405 not a multiple of BITS_PER_UNIT.
11407 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
11409 * doc/install.texi (Binaries): Update description of BullFreeware.
11411 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
11415 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
11416 C++ Language Options, Warning Options, and Static Analyzer
11417 Options lists. Document negative form of options enabled by
11418 default. Move some things around to more accurately sort
11419 warnings by category.
11420 (C++ Dialect Options, Warning Options, Static Analyzer
11421 Options): Document negative form of options when enabled by
11422 default. Move some things around to more accurately sort
11423 warnings by category. Add some missing index entries.
11424 Light copy-editing.
11426 2020-02-26 Carl Love <cel@us.ibm.com>
11429 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
11430 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
11431 for the vector unsigned short arguments. It is also listed as the
11432 name of the built-in for arguments vector unsigned short,
11433 vector unsigned int and vector unsigned long long built-ins. The
11434 name of the builtins for these arguments should be:
11435 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
11436 __builtin_crypto_vpmsumd respectively.
11438 2020-02-26 Richard Biener <rguenther@suse.de>
11440 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
11441 and load permutation.
11443 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
11445 PR middle-end/93843
11446 * optabs-tree.c (supportable_convert_operation): Reject types with
11449 2020-02-26 David Malcolm <dmalcolm@redhat.com>
11451 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
11453 2020-02-26 Jakub Jelinek <jakub@redhat.com>
11455 PR tree-optimization/93820
11456 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
11457 argument to ALL_INTEGER_CST_P boolean.
11458 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
11459 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
11460 adjacent INTEGER_CST store into merged_store->only_constants like
11463 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11466 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
11468 * cfghooks.c (verify_flow_info): Likewise.
11469 * predict.c (combine_predictions_for_bb): Likewise.
11470 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
11471 sucessor -> successor.
11472 (find_traces_1_round): Fix comment typo, destinarion -> destination.
11473 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
11475 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
11476 message typo, sucessors -> successors.
11478 2020-02-25 Martin Sebor <msebor@redhat.com>
11480 * doc/extend.texi (attribute access): Correct an example.
11482 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
11484 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
11486 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
11487 (VAR15, VAR16): New.
11488 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
11489 (VD): Enable for V4BF.
11491 (VQ): Enable for V8BF.
11493 (VQ_NO2E): Likewise.
11494 (VDBL, Vdbl): Add V4BF.
11495 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
11496 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
11497 (bfloat16x8x2_t): Likewise.
11498 (bfloat16x4x3_t): Likewise.
11499 (bfloat16x8x3_t): Likewise.
11500 (bfloat16x4x4_t): Likewise.
11501 (bfloat16x8x4_t): Likewise.
11502 (vcombine_bf16): New.
11503 (vld1_bf16, vld1_bf16_x2): New.
11504 (vld1_bf16_x3, vld1_bf16_x4): New.
11505 (vld1q_bf16, vld1q_bf16_x2): New.
11506 (vld1q_bf16_x3, vld1q_bf16_x4): New.
11507 (vld1_lane_bf16): New.
11508 (vld1q_lane_bf16): New.
11509 (vld1_dup_bf16): New.
11510 (vld1q_dup_bf16): New.
11513 (vld2_dup_bf16): New.
11514 (vld2q_dup_bf16): New.
11517 (vld3_dup_bf16): New.
11518 (vld3q_dup_bf16): New.
11521 (vld4_dup_bf16): New.
11522 (vld4q_dup_bf16): New.
11523 (vst1_bf16, vst1_bf16_x2): New.
11524 (vst1_bf16_x3, vst1_bf16_x4): New.
11525 (vst1q_bf16, vst1q_bf16_x2): New.
11526 (vst1q_bf16_x3, vst1q_bf16_x4): New.
11527 (vst1_lane_bf16): New.
11528 (vst1q_lane_bf16): New.
11536 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
11538 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
11539 (VALL_F16): Likewise.
11540 (VALLDI_F16): Likewise.
11542 (Vetype): Likewise.
11543 (vswap_width_name): Likewise.
11544 (VSWAP_WIDTH): Likewise.
11548 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
11549 (vget_lane_bf16, vgetq_lane_bf16): New.
11550 (vcreate_bf16): New.
11551 (vdup_n_bf16, vdupq_n_bf16): New.
11552 (vdup_lane_bf16, vdup_laneq_bf16): New.
11553 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
11554 (vduph_lane_bf16, vduph_laneq_bf16): New.
11555 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
11556 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
11557 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
11558 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
11559 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
11560 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
11561 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
11562 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
11563 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
11564 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
11565 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
11566 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
11567 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
11568 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
11569 (vreinterpretq_bf16_p128): New.
11570 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
11571 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
11572 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
11573 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
11574 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
11575 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
11576 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
11577 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
11578 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
11579 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
11580 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
11581 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
11582 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
11583 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
11584 (vreinterpretq_p128_bf16): New.
11586 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
11588 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
11589 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
11590 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
11591 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
11592 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
11593 * config/arm/iterators.md (VSF2BF): New attribute.
11594 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
11595 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
11596 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
11598 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
11600 * config/arm/arm.md (required_for_purecode): New attribute.
11601 (enabled): Handle required_for_purecode.
11602 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
11603 work with -mpure-code.
11605 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11607 PR rtl-optimization/93908
11608 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
11611 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
11613 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
11615 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
11617 * doc/install.texi (--enable-checking): Adjust wording.
11619 2020-02-25 Richard Biener <rguenther@suse.de>
11621 PR tree-optimization/93868
11622 * tree-vect-slp.c (slp_copy_subtree): New function.
11623 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
11624 re-arranging stmts in it.
11626 2020-02-25 Jakub Jelinek <jakub@redhat.com>
11628 PR middle-end/93874
11629 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
11630 dummy function and remove it at the end.
11632 PR translation/93864
11633 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
11634 paramter -> parameter.
11635 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
11636 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
11638 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
11640 * doc/install.texi (--enable-checking): Properly document current
11642 (--enable-stage1-checking): Minor clarification about bootstrap.
11644 2020-02-24 David Malcolm <dmalcolm@redhat.com>
11647 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
11648 -fanalyzer-checker=taint is also required.
11649 (-fanalyzer-checker=): Note that providing this option enables the
11650 given checker, and doing so may be required for checkers that are
11651 disabled by default.
11653 2020-02-24 David Malcolm <dmalcolm@redhat.com>
11655 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
11656 significant control flow events; add a "3" which shows all
11657 control flow events; the old "3" becomes "4".
11659 2020-02-24 Jakub Jelinek <jakub@redhat.com>
11661 PR tree-optimization/93582
11662 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
11663 pd.offset and pd.size to be counted in bits rather than bytes, add
11664 support for maxsizei that is not a multiple of BITS_PER_UNIT and
11665 handle bitfield stores and loads.
11666 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
11667 uncomparable quantities - bytes vs. bits. Allow push_partial_def
11668 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
11669 pd.offset/pd.size to be counted in bits rather than bytes.
11670 Formatting fix. Rename shadowed len variable to buflen.
11672 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
11673 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
11676 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
11677 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
11678 * opts-common.c (parse_options_from_collect_gcc_options): New function.
11679 (prepend_xassembler_to_collect_as_options): Likewise.
11680 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
11681 (prepend_xassembler_to_collect_as_options): Likewise.
11682 * lto-opts.c (lto_write_options): Stream assembler options
11683 in COLLECT_AS_OPTIONS.
11684 * lto-wrapper.c (xassembler_options_error): New static variable.
11685 (get_options_from_collect_gcc_options): Move parsing options code to
11686 parse_options_from_collect_gcc_options and call it.
11687 (merge_and_complain): Validate -Xassembler options.
11688 (append_compiler_options): Handle OPT_Xassembler.
11689 (run_gcc): Append command line -Xassembler options to
11690 collect_gcc_options.
11691 * doc/invoke.texi: Add documentation about using Xassembler
11694 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
11696 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
11698 (riscv_rtx_costs): Update cost model for LTGT.
11700 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
11702 PR rtl-optimization/93564
11703 * ira-color.c (struct update_cost_queue_elem): New member start.
11704 (queue_update_cost, get_next_update_cost): Add new arg start.
11705 (allocnos_conflict_p): New function.
11706 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
11707 Add checking conflicts with allocnos_conflict_p.
11708 (update_costs_from_prefs, restore_costs_from_copies): Adjust
11709 update_costs_from_allocno calls.
11710 (update_conflict_hard_regno_costs): Add checking conflicts with
11711 allocnos_conflict_p. Adjust calls of queue_update_cost and
11712 get_next_update_cost.
11713 (assign_hard_reg): Adjust calls of queue_update_cost. Add
11715 (bucket_allocno_compare_func): Restore previous version.
11717 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
11719 * gcc/config/pa/pa.c (pa_function_value): Fix check for word and
11720 double-word size when handling aggregate return values.
11721 * gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
11722 that homogeneous SFmode and DFmode aggregates are passed and returned
11723 in general registers.
11725 2020-02-21 Jakub Jelinek <jakub@redhat.com>
11727 PR translation/93759
11728 * opts.c (print_filtered_help): Translate help before appending
11729 messages to it rather than after that.
11731 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
11733 PR rtl-optimization/PR92989
11734 * lra-lives.c (process_bb_lives): Restore the original order
11735 of the bb liveness update. Call make_hard_regno_dead for each
11736 register clobbered at the start of an EH receiver.
11738 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
11741 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
11742 self-recursively generated.
11744 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
11747 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
11750 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
11752 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
11753 Document new target supports option.
11755 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
11757 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
11758 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
11759 * config/arm/iterators.md (MATMUL): New iterator.
11760 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
11761 (mmla_sfx): New attribute.
11762 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
11763 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
11764 (UNSPEC_MATMUL_US): New.
11766 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
11768 * config/arm/arm.md: Prevent scalar shifts from being used when big
11771 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
11772 Richard Biener <rguenther@suse.de>
11774 PR tree-optimization/93586
11775 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
11776 after mismatched array refs; do not sure type size information to
11777 recover from unmatched referneces with !flag_strict_aliasing_p.
11779 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11781 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
11782 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
11783 (scatter_store<mode>): Rename to ...
11784 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
11785 (scatter<mode>_exec): Delete. Move contents ...
11786 (mask_scatter_store<mode>): ... here, and rename that to ...
11787 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
11788 Remove mode conversion.
11789 (mask_gather_load<mode>): Rename to ...
11790 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
11791 Remove mode conversion.
11792 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
11794 2020-02-21 Martin Jambor <mjambor@suse.cz>
11796 PR tree-optimization/93845
11797 * tree-sra.c (verify_sra_access_forest): Only test access size of
11800 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11802 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
11803 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
11804 (addv64di3_exec): Likewise.
11805 (subv64di3): Likewise.
11806 (subv64di3_exec): Likewise.
11807 (addv64di3_zext): Likewise.
11808 (addv64di3_zext_exec): Likewise.
11809 (addv64di3_zext_dup): Likewise.
11810 (addv64di3_zext_dup_exec): Likewise.
11811 (addv64di3_zext_dup2): Likewise.
11812 (addv64di3_zext_dup2_exec): Likewise.
11813 (addv64di3_sext_dup2): Likewise.
11814 (addv64di3_sext_dup2_exec): Likewise.
11815 (<expander>v64di3): Likewise.
11816 (<expander>v64di3_exec): Likewise.
11817 (*<reduc_op>_dpp_shr_v64di): Likewise.
11818 (*plus_carry_dpp_shr_v64di): Likewise.
11819 * config/gcn/gcn.md (adddi3): Likewise.
11820 (addptrdi3): Likewise.
11821 (<expander>di3): Likewise.
11823 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
11825 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
11827 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11829 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
11830 support. Use aarch64_emit_mult instead of emitting multiplication
11831 instructions directly.
11832 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
11833 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
11835 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11837 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
11838 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
11839 instead of emitting multiplication instructions directly.
11840 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
11841 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
11842 (@aarch64_frecps<mode>): New expanders.
11844 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11846 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
11847 on and produce uint64_ts rather than ints.
11848 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
11849 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
11851 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11853 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
11854 an unused xmsk register when handling approximate rsqrt.
11856 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
11858 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
11859 flag_finite_math_only condition.
11861 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
11864 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
11865 to destination operand for shufps alternative.
11866 (*vec_extractv2si_1): Ditto.
11868 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
11871 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
11874 2020-02-20 Martin Liska <mliska@suse.cz>
11876 PR translation/93831
11877 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
11879 2020-02-20 Martin Liska <mliska@suse.cz>
11881 PR translation/93830
11882 * common/config/avr/avr-common.c: Remote trailing "|".
11884 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
11886 * collect2.c (maybe_run_lto_and_relink): Fix typo in
11889 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
11891 PR tree-optimization/93767
11892 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
11893 access-size bias from the offset calculations for negative strides.
11895 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
11897 * collect2.c (c_file, o_file): Make const again.
11898 (ldout,lderrout, dump_ld_file): Remove.
11899 (tool_cleanup): Avoid calling not signal-safe functions.
11900 (maybe_run_lto_and_relink): Avoid possible signal handler
11901 access to unintialzed memory (lto_o_files).
11902 (main): Avoid leaking temp files in $TMPDIR.
11903 Initialize c_file/o_file with concat, which avoids exposing
11904 uninitialized memory to signal handler, which calls unlink(!).
11905 Avoid calling maybe_unlink when the main function returns,
11906 since the atexit handler is already doing this.
11907 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
11909 2020-02-19 Martin Jambor <mjambor@suse.cz>
11911 PR tree-optimization/93776
11912 * tree-sra.c (create_access): Do not create zero size accesses.
11913 (get_access_for_expr): Do not search for zero sized accesses.
11915 2020-02-19 Martin Jambor <mjambor@suse.cz>
11917 PR tree-optimization/93667
11918 * tree-sra.c (scalarizable_type_p): Return false if record fields
11919 do not follow wach other.
11921 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
11923 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
11924 rather than fmv.x.s/fmv.s.x.
11926 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
11928 * config/aarch64/aarch64-simd-builtins.def
11929 (intrinsic_vec_smult_lo_): New.
11930 (intrinsic_vec_umult_lo_): Likewise.
11931 (vec_widen_smult_hi_): Likewise.
11932 (vec_widen_umult_hi_): Likewise.
11933 * config/aarch64/aarch64-simd.md
11934 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
11935 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
11936 (vmull_high_s16): Likewise.
11937 (vmull_high_s32): Likewise.
11938 (vmull_high_u8): Likewise.
11939 (vmull_high_u16): Likewise.
11940 (vmull_high_u32): Likewise.
11941 (vmull_s8): Likewise.
11942 (vmull_s16): Likewise.
11943 (vmull_s32): Likewise.
11944 (vmull_u8): Likewise.
11945 (vmull_u16): Likewise.
11946 (vmull_u32): Likewise.
11948 2020-02-18 Martin Liska <mliska@suse.cz>
11950 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
11951 bootstrap by missing removal of invalid sanity check.
11953 2020-02-18 Martin Liska <mliska@suse.cz>
11956 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
11957 Always compare LHS of gimple_assign.
11959 2020-02-18 Martin Liska <mliska@suse.cz>
11962 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
11963 and return type of functions.
11964 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
11965 Drop MALLOC attribute for void functions.
11966 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
11967 malloc_state for a new VOID clone.
11969 2020-02-18 Martin Liska <mliska@suse.cz>
11972 * common.opt: Add -fprofile-reproducibility.
11973 * doc/invoke.texi: Document it.
11974 * value-prof.c (dump_histogram_value):
11975 Document and support behavior for counters[0]
11976 being a negative value.
11977 (get_nth_most_common_value): Handle negative
11978 counters[0] in respect to flag_profile_reproducible.
11980 2020-02-18 Jakub Jelinek <jakub@redhat.com>
11983 * cgraph.c (verify_speculative_call): Use speculative_id instead of
11984 speculative_uid in messages. Remove trailing whitespace from error
11985 message. Use num_speculative_call_targets instead of
11986 num_speculative_targets in a message.
11987 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
11988 edge messages and stmt instead of cal_stmt in reference message.
11990 PR tree-optimization/93780
11991 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
11992 before calling build_vector_type.
11993 (execute_update_addresses_taken): Likewise.
11996 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
11997 typo, functoin -> function.
11998 * tree.c (free_lang_data_in_decl): Fix comment typo,
11999 functoin -> function.
12000 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
12002 2020-02-17 David Malcolm <dmalcolm@redhat.com>
12004 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
12006 (print_option_information): Don't call get_option_url if URLs
12009 2020-02-17 Alexandre Oliva <oliva@adacore.com>
12011 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
12012 handling of register_common-less targets.
12014 2020-02-17 Martin Liska <mliska@suse.cz>
12017 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
12019 2020-02-17 Martin Liska <mliska@suse.cz>
12021 PR translation/93755
12022 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12025 2020-02-17 Martin Liska <mliska@suse.cz>
12028 * config/rx/elf.opt: Fix typo.
12030 2020-02-17 Richard Biener <rguenther@suse.de>
12033 * opts-global.c (print_ignored_options): Use inform and
12036 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
12039 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
12041 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
12044 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
12045 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
12047 2020-02-15 Jason Merrill <jason@redhat.com>
12049 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
12051 2020-02-15 Jakub Jelinek <jakub@redhat.com>
12053 PR tree-optimization/93744
12054 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
12055 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
12056 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
12057 sure @2 in the first and @1 in the other patterns has no side-effects.
12059 2020-02-15 David Malcolm <dmalcolm@redhat.com>
12060 Bernd Edlinger <bernd.edlinger@hotmail.de>
12064 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
12065 * configure.ac (--with-diagnostics-urls): New configuration
12066 option, based on --with-diagnostics-color.
12067 (DIAGNOSTICS_URLS_DEFAULT): New define.
12068 * config.h: Regenerate.
12069 * configure: Regenerate.
12070 * diagnostic.c (diagnostic_urls_init): Handle -1 for
12071 DIAGNOSTICS_URLS_DEFAULT from configure-time
12072 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
12073 and TERM_URLS environment variable.
12074 * diagnostic-url.h (diagnostic_url_format): New enum type.
12075 (diagnostic_urls_enabled_p): rename to...
12076 (determine_url_format): ... this, and change return type.
12077 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
12078 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
12079 the linux console, and mingw.
12080 (diagnostic_urls_enabled_p): rename to...
12081 (determine_url_format): ... this, and adjust.
12082 * pretty-print.h (pretty_printer::show_urls): rename to...
12083 (pretty_printer::url_format): ... this, and change to enum.
12084 * pretty-print.c (pretty_printer::pretty_printer,
12085 pp_begin_url, pp_end_url, test_urls): Adjust.
12086 * doc/install.texi (--with-diagnostics-urls): Document the new
12087 configuration option.
12088 (--with-diagnostics-color): Document the existing interaction
12089 with GCC_COLORS better.
12090 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
12091 vindex reference. Update description of defaults based on the above.
12092 (-fdiagnostics-color): Update description of how -fdiagnostics-color
12093 interacts with GCC_COLORS.
12095 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
12098 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
12099 conjunction with TARGET_GNU_TLS in early return.
12101 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
12103 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
12104 the mode is not wider than UNITS_PER_WORD.
12106 2020-02-14 Martin Jambor <mjambor@suse.cz>
12108 PR tree-optimization/93516
12109 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
12110 access of the same type as the parent.
12111 (propagate_subaccesses_from_lhs): Likewise.
12113 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
12116 * config/i386/avx512vbmi2intrin.h
12117 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
12118 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
12119 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
12120 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
12121 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
12122 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
12123 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
12124 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
12125 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
12126 of lacking a closing parenthesis.
12127 * config/i386/avx512vbmi2vlintrin.h
12128 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
12129 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
12130 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
12131 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
12132 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
12133 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
12134 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
12135 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
12136 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
12137 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
12138 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
12139 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
12140 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
12141 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
12142 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
12143 _mm_shldi_epi32, _mm_mask_shldi_epi32,
12144 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
12145 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
12147 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
12150 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
12151 the target function entry.
12153 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12155 * common/config/arc/arc-common.c (arc_option_optimization_table):
12156 Disable if-conversion step when optimized for size.
12158 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12160 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
12161 R12-R15 are always in ARCOMPACT16_REGS register class.
12162 * config/arc/arc.opt (mq-class): Deprecate.
12163 * config/arc/constraint.md ("q"): Remove dependency on mq-class
12165 * doc/invoke.texi (mq-class): Update text.
12166 * common/config/arc/arc-common.c (arc_option_optimization_table):
12169 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12171 * config/arc/arc.c (arc_insn_cost): New function.
12172 (TARGET_INSN_COST): Define.
12173 * config/arc/arc.md (cost): New attribute.
12174 (add_n): Use arc_nonmemory_operand.
12175 (ashlsi3_insn): Likewise, also update constraints.
12176 (ashrsi3_insn): Likewise.
12177 (rotrsi3): Likewise.
12178 (add_shift): Likewise.
12179 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
12181 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
12183 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
12185 (umulsidi_600): Likewise.
12187 2020-02-13 Jakub Jelinek <jakub@redhat.com>
12190 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
12191 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
12192 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
12193 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
12194 pass __A to the builtin followed by __W instead of __A followed by
12196 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
12197 _mm512_mask_popcnt_epi64): Likewise.
12198 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
12199 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
12200 _mm256_mask_popcnt_epi64): Likewise.
12202 PR tree-optimization/93582
12203 * fold-const.h (shift_bytes_in_array_left,
12204 shift_bytes_in_array_right): Declare.
12205 * fold-const.c (shift_bytes_in_array_left,
12206 shift_bytes_in_array_right): New function, moved from
12207 gimple-ssa-store-merging.c, no longer static.
12208 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
12209 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
12210 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
12211 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
12212 shift_bytes_in_array.
12213 (verify_shift_bytes_in_array): Rename to ...
12214 (verify_shift_bytes_in_array_left): ... this. Use
12215 shift_bytes_in_array_left instead of shift_bytes_in_array.
12216 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
12217 instead of verify_shift_bytes_in_array.
12218 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
12219 / native_interpret_expr where the store covers all needed bits,
12220 punt on PDP-endian, otherwise allow all involved offsets and sizes
12221 not to be byte-aligned.
12224 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
12225 use const_0_to_255_operand predicate instead of immediate_operand.
12226 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
12227 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
12228 vgf2p8affineinvqb_<mode><mask_name>,
12229 vgf2p8affineqb_<mode><mask_name>): Drop mode from
12230 const_0_to_255_operand predicated operands.
12232 2020-02-12 Jeff Law <law@redhat.com>
12234 * config/h8300/h8300.md (comparison shortening peepholes): Use
12235 a mode iterator to merge the HImode and SImode peepholes.
12237 2020-02-12 Jakub Jelinek <jakub@redhat.com>
12239 PR middle-end/93663
12240 * real.c (is_even): Make static. Function comment fix.
12241 (is_halfway_below): Make static, don't assert R is not inf/nan,
12242 instead return false for those. Small formatting fixes.
12244 2020-02-12 Martin Sebor <msebor@redhat.com>
12246 PR middle-end/93646
12247 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
12248 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
12249 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
12250 (strlen_check_and_optimize_call): Adjust callee name.
12252 2020-02-12 Jeff Law <law@redhat.com>
12254 * config/h8300/h8300.md (comparison shortening peepholes): Drop
12255 (and (xor)) variant. Combine other two into single peephole.
12257 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
12259 PR rtl-optimization/93565
12260 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
12262 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
12264 * config/aarch64/aarch64-simd.md
12265 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
12266 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
12267 generating separate ADDV and zero_extend patterns.
12268 * config/aarch64/iterators.md (VDQV_E): New iterator.
12270 2020-02-12 Jeff Law <law@redhat.com>
12272 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
12273 expanders, splits, etc.
12274 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
12275 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
12276 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
12277 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
12278 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
12279 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
12280 function prototype.
12281 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
12283 2020-02-12 Jakub Jelinek <jakub@redhat.com>
12286 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
12287 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
12288 TARGET_AVX512DQ from condition.
12289 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
12290 instead of <mask_mode512bit_condition> in condition. If
12291 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
12293 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
12296 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
12299 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
12301 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
12303 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
12304 where strlen is more legible.
12305 (rs6000_builtin_vectorized_libmass): Ditto.
12306 (rs6000_print_options_internal): Ditto.
12308 2020-02-11 Martin Sebor <msebor@redhat.com>
12310 PR tree-optimization/93683
12311 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
12313 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
12315 * config/rs6000/predicates.md (cint34_operand): Rename the
12316 -mprefixed-addr option to be -mprefixed.
12317 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
12318 the -mprefixed-addr option to be -mprefixed.
12319 (OTHER_FUTURE_MASKS): Likewise.
12320 (POWERPC_MASKS): Likewise.
12321 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
12322 the -mprefixed-addr option to be -mprefixed. Change error
12323 messages to refer to -mprefixed.
12324 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
12326 (rs6000_legitimate_offset_address_p): Likewise.
12327 (rs6000_mode_dependent_address): Likewise.
12328 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
12329 "-mprefixed" for target attributes and pragmas.
12330 (address_to_insn_form): Rename the -mprefixed-addr option to be
12332 (rs6000_adjust_insn_length): Likewise.
12333 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
12334 -mprefixed-addr option to be -mprefixed.
12335 (ASM_OUTPUT_OPCODE): Likewise.
12336 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
12337 -mprefixed-addr option to be -mprefixed.
12338 * config/rs6000/rs6000.opt (-mprefixed): Rename the
12339 -mprefixed-addr option to be prefixed. Change the option from
12340 being undocumented to being documented.
12341 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
12342 -mprefixed option. Update the -mpcrel documentation to mention
12345 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
12347 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
12348 including FIRST_PSEUDO_REGISTER - 1.
12349 * ira-color.c (print_hard_reg_set): Ditto.
12351 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12353 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
12354 (USTERNOP_QUALIFIERS): New define.
12355 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
12356 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
12357 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
12358 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
12359 * config/arm/arm_neon.h (vusdot_s32): New.
12360 (vusdot_lane_s32): New.
12361 (vusdotq_lane_s32): New.
12362 (vsudot_lane_s32): New.
12363 (vsudotq_lane_s32): New.
12364 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
12365 * config/arm/iterators.md (DOTPROD_I8MM): New.
12366 (sup, opsuffix): Add <us/su>.
12367 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
12368 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
12370 2020-02-11 Richard Biener <rguenther@suse.de>
12372 PR tree-optimization/93661
12373 PR tree-optimization/93662
12374 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
12375 tree_to_poly_int64.
12376 * tree-sra.c (get_access_for_expr): Likewise.
12378 2020-02-10 Jakub Jelinek <jakub@redhat.com>
12381 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
12382 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
12383 Change condition from TARGET_AVX2 to TARGET_AVX.
12385 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
12388 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
12389 argument of strncmp.
12391 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
12393 Try to generate zero-based comparisons.
12394 * config/cris/cris.c (cris_reduce_compare): New function.
12395 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
12396 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
12397 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
12399 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
12402 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
12403 in Thumb state and also as a destination in Arm state. Add T16
12406 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
12408 * md.texi (Define Subst): Match closing paren in example.
12410 2020-02-10 Jakub Jelinek <jakub@redhat.com>
12414 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
12415 arguments of strncmp.
12417 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
12420 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
12421 but different source value.
12422 (adjust_callers_for_value_intersection): New function.
12423 (gather_edges_for_value): Adjust order of callers to let a
12424 non-self-recursive caller be the first element.
12425 (self_recursive_pass_through_p): Add a new parameter "simple", and
12426 check generalized self-recursive pass-through jump function.
12427 (self_recursive_agg_pass_through_p): Likewise.
12428 (find_more_scalar_values_for_callers_subset): Compute value from
12429 pass-through jump function for self-recursive.
12430 (intersect_with_plats): Cleanup previous implementation code for value
12431 itersection with self-recursive call edge.
12432 (intersect_with_agg_replacements): Likewise.
12433 (intersect_aggregates_with_edge): Deduce value from pass-through jump
12434 function for self-recursive call edge. Cleanup previous implementation
12435 code for value intersection with self-recursive call edge.
12436 (decide_whether_version_node): Remove dead callers and adjust order
12437 to let a non-self-recursive caller be the first element.
12439 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
12441 * recog.c: Move pass_split_before_sched2 code in front of
12442 pass_split_before_regstack.
12443 (pass_data_split_before_sched2): Rename pass to split3 from split4.
12444 (pass_data_split_before_regstack): Rename pass to split4 from split3.
12445 (rest_of_handle_split_before_sched2): Remove.
12446 (pass_split_before_sched2::execute): Unconditionally call
12448 (enable_split_before_sched2): New function.
12449 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
12450 (pass_split_before_regstack::gate): Ditto.
12451 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
12452 Update name check for renamed split4 pass.
12453 * config/sh/sh.c (register_sh_passes): Update pass insertion
12454 point for renamed split4 pass.
12456 2020-02-09 Jakub Jelinek <jakub@redhat.com>
12458 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
12459 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
12460 copying them around between host and target.
12462 2020-02-08 Andrew Pinski <apinski@marvell.com>
12465 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
12466 STRICT_ALIGNMENT also.
12468 2020-02-08 Jim Wilson <jimw@sifive.com>
12471 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
12473 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
12474 Jakub Jelinek <jakub@redhat.com>
12477 * config/i386/i386.h (CALL_USED_REGISTERS): Make
12478 xmm16-xmm31 call-used even in 64-bit ms-abi.
12480 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
12482 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
12483 (simd_ummla, simd_usmmla): Likewise.
12484 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
12485 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
12486 (vusmmlaq_s32): New.
12488 2020-02-07 Richard Biener <rguenther@suse.de>
12490 PR middle-end/93519
12491 * tree-inline.c (fold_marked_statements): Do a PRE walk,
12492 skipping unreachable regions.
12493 (optimize_inline_calls): Skip folding stmts when we didn't
12496 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
12499 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
12500 Don't return aggregates with only SFmode and DFmode in SSE
12502 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
12504 2020-02-07 Jakub Jelinek <jakub@redhat.com>
12507 * config/rs6000/rs6000-logue.c
12508 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
12509 if it fails, move rs into end_addr and retry. Add
12510 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
12511 the insn pattern doesn't describe well what exactly happens to
12515 * config/i386/predicates.md (avx_identity_operand): Remove.
12516 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
12517 (avx_<castmode><avxsizesuffix>_<castmode>,
12518 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
12519 a VEC_CONCAT of the operand and UNSPEC_CAST.
12520 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
12521 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
12525 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
12526 recog_data.insn if distance_non_agu_define changed it.
12528 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
12531 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
12532 we only had X-FORM (reg+reg) addressing for vectors. Also before
12533 ISA 3.0, we only had X-FORM addressing for scalars in the
12534 traditional Altivec registers.
12536 2020-02-06 <zhongyunde@huawei.com>
12537 Vladimir Makarov <vmakarov@redhat.com>
12539 PR rtl-optimization/93561
12540 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
12541 hard register range.
12543 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12545 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
12548 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
12550 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
12551 where the low and the high 32 bits are equal to each other specially,
12552 with an rldimi instruction.
12554 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
12556 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
12558 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
12560 * config/arm/arm-tables.opt: Regenerate.
12562 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12565 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
12566 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
12567 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
12569 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
12571 PR rtl-optimization/87763
12572 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
12574 2020-02-06 Delia Burduv <delia.burduv@arm.com>
12576 * config/aarch64/aarch64-simd-builtins.def
12577 (bfmlaq): New built-in function.
12578 (bfmlalb): New built-in function.
12579 (bfmlalt): New built-in function.
12580 (bfmlalb_lane): New built-in function.
12581 (bfmlalt_lane): New built-in function.
12582 * config/aarch64/aarch64-simd.md
12583 (aarch64_bfmmlaqv4sf): New pattern.
12584 (aarch64_bfmlal<bt>v4sf): New pattern.
12585 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
12586 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
12587 (vbfmlalbq_f32): New intrinsic.
12588 (vbfmlaltq_f32): New intrinsic.
12589 (vbfmlalbq_lane_f32): New intrinsic.
12590 (vbfmlaltq_lane_f32): New intrinsic.
12591 (vbfmlalbq_laneq_f32): New intrinsic.
12592 (vbfmlaltq_laneq_f32): New intrinsic.
12593 * config/aarch64/iterators.md (BF_MLA): New int iterator.
12594 (bt): New int attribute.
12596 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
12598 * config/i386/i386.md (*pushtf): Emit "#" instead of
12599 calling gcc_unreachable in insn output.
12602 (*pushsf_rex64): Ditto for alternatives other than 1.
12603 (*pushsf): Ditto for alternatives other than 1.
12605 2020-02-06 Martin Liska <mliska@suse.cz>
12607 PR gcov-profile/91971
12608 PR gcov-profile/93466
12609 * coverage.c (coverage_init): Revert mangling of
12610 path into filename. It can lead to huge filename length.
12611 Creation of subfolders seem more natural.
12613 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12616 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
12617 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
12618 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
12620 2020-02-06 Jakub Jelinek <jakub@redhat.com>
12623 * config/i386/predicates.md (avx_identity_operand): New predicate.
12624 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
12625 define_insn_and_split.
12628 * omp-low.c (use_pointer_for_field): For nested constructs, also
12629 look for map clauses on target construct.
12630 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
12631 taskreg_nesting_level.
12634 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
12635 shared clause, call omp_notice_variable on outer context if any.
12637 2020-02-05 Jason Merrill <jason@redhat.com>
12640 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
12641 non-zero address even if weak and not yet defined.
12643 2020-02-05 Martin Sebor <msebor@redhat.com>
12645 PR tree-optimization/92765
12646 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
12647 * tree-ssa-strlen.c (compute_string_length): Remove.
12648 (determine_min_objsize): Remove.
12649 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
12650 Avoid using type size as the upper bound on string length.
12651 (handle_builtin_string_cmp): Add an argument. Adjust.
12652 (strlen_check_and_optimize_call): Pass additional argument to
12653 handle_builtin_string_cmp.
12655 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
12657 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
12658 (*pushdi2_rex64 peephole2): Unconditionally split after
12659 epilogue_completed.
12660 (*ashl<mode>3_doubleword): Ditto.
12661 (*<shift_insn><mode>3_doubleword): Ditto.
12663 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
12666 * config/rs6000/rs6000.c (get_vector_offset): Fix
12668 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
12670 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
12672 2020-02-05 David Malcolm <dmalcolm@redhat.com>
12674 * doc/analyzer.texi
12675 (Special Functions for Debugging the Analyzer): Update description
12676 of __analyzer_dump_exploded_nodes.
12678 2020-02-05 Jakub Jelinek <jakub@redhat.com>
12681 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
12682 include sets and not clobbers in the vzeroupper pattern.
12683 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
12684 the parallel has 17 (64-bit) or 9 (32-bit) elts.
12685 (*avx_vzeroupper_1): New define_insn_and_split.
12688 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
12689 don't run when !optimize.
12690 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
12693 2020-02-05 Richard Biener <rguenther@suse.de>
12695 PR middle-end/90648
12696 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
12697 checks before matching calls.
12699 2020-02-05 Jakub Jelinek <jakub@redhat.com>
12701 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
12702 function comment typo.
12704 PR middle-end/93555
12705 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
12706 simd_clone_create failed when i == 0, adjust clone->nargs by
12709 2020-02-05 Martin Liska <mliska@suse.cz>
12712 * doc/invoke.texi: Document that one should
12713 not combine ASLR and -fpch.
12715 2020-02-04 Richard Biener <rguenther@suse.de>
12717 PR tree-optimization/93538
12718 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
12720 2020-02-04 Richard Biener <rguenther@suse.de>
12722 PR tree-optimization/91123
12723 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
12724 (vn_walk_cb_data::last_vuse): New member.
12725 (vn_walk_cb_data::saved_operands): Likewsie.
12726 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
12727 (vn_walk_cb_data::push_partial_def): Use finish.
12728 (vn_reference_lookup_2): Update last_vuse and use finish if
12729 we've saved operands.
12730 (vn_reference_lookup_3): Use finish and update calls to
12731 push_partial_defs everywhere. When translating through
12732 memcpy or aggregate copies save off operands and alias-set.
12733 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
12734 operation for redundant store removal.
12736 2020-02-04 Richard Biener <rguenther@suse.de>
12738 PR tree-optimization/92819
12739 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
12740 generating more stmts than before.
12742 2020-02-04 Martin Liska <mliska@suse.cz>
12744 * config/arm/arm.c (arm_gen_far_branch): Move the function
12745 outside of selftests.
12747 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12749 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
12750 function to adjust PC-relative vector addresses.
12751 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
12752 handle vectors with PC-relative addresses.
12754 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12756 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
12758 (hard_reg_and_mode_to_addr_mask): Delete.
12759 (rs6000_adjust_vec_address): If the original vector address
12760 was REG+REG or REG+OFFSET and the element is not zero, do the add
12761 of the elements in the original address before adding the offset
12762 for the vector element. Use address_to_insn_form to validate the
12763 address using the register being loaded, rather than guessing
12764 whether the address is a DS-FORM or DQ-FORM address.
12766 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12768 * config/rs6000/rs6000.c (get_vector_offset): New helper function
12769 to calculate the offset in memory from the start of a vector of a
12770 particular element. Add code to keep the element number in
12771 bounds if the element number is variable.
12772 (rs6000_adjust_vec_address): Move calculation of offset of the
12773 vector element to get_vector_offset.
12774 (rs6000_split_vec_extract_var): Do not do the initial AND of
12775 element here, move the code to get_vector_offset.
12777 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
12779 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
12782 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
12784 * config/rs6000/constraints.md: Improve documentation.
12786 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
12789 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
12790 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
12792 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
12794 * config.gcc: Remove "carrizo" support.
12795 * config/gcn/gcn-opts.h (processor_type): Likewise.
12796 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
12797 * config/gcn/gcn.opt (gpu_type): Likewise.
12798 * config/gcn/t-omp-device: Likewise.
12800 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
12803 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
12804 * config/arm/arm.c (arm_gen_far_branch): New function
12805 arm_gen_far_branch.
12806 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
12808 2020-02-03 Julian Brown <julian@codesourcery.com>
12809 Tobias Burnus <tobias@codesourcery.com>
12811 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
12813 2020-02-03 Jakub Jelinek <jakub@redhat.com>
12816 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
12817 valid RTL to sum up the lowest and second lowest bytes of the popcnt
12820 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
12822 PR rtl-optimization/91333
12823 * ira-color.c (struct allocno_color_data): Add member
12825 (init_allocno_threads): Set the member up.
12826 (bucket_allocno_compare_func): Add compare hard reg
12829 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
12831 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
12833 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12834 * config.in: Regenerated.
12835 * configure: Regenerated.
12836 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
12837 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
12838 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
12840 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
12842 * configure: Regenerate.
12844 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
12846 PR rtl-optimization/91333
12847 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
12848 reg preferences comparison up.
12850 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
12852 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
12853 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
12854 aarch64-sve-builtins-base.h.
12855 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
12856 aarch64-sve-builtins-base.cc.
12857 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
12858 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12859 (svcvtnt): Declare.
12860 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
12861 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12862 (svcvtnt): New functions.
12863 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
12864 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
12865 (svcvtnt): New functions.
12866 (svcvt): Add a form that converts f32 to bf16.
12867 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
12868 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
12870 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
12871 Treat B as bfloat16_t.
12872 (ternary_bfloat_lane_base): New class.
12873 (ternary_bfloat_def): Likewise.
12874 (ternary_bfloat): New shape.
12875 (ternary_bfloat_lane_def): New class.
12876 (ternary_bfloat_lane): New shape.
12877 (ternary_bfloat_lanex2_def): New class.
12878 (ternary_bfloat_lanex2): New shape.
12879 (ternary_bfloat_opt_n_def): New class.
12880 (ternary_bfloat_opt_n): New shape.
12881 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
12882 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
12883 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
12884 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
12885 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12886 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
12887 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
12888 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
12889 the pattern off the narrow mode instead of the wider one.
12890 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
12891 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
12892 (sve_fp_op): Handle them.
12893 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
12894 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
12896 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
12898 * config/aarch64/arm_sve.h: Include arm_bf16.h.
12899 * config/aarch64/aarch64-modes.def (BF): Move definition before
12900 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
12901 (SVE_MODES): Handle BF modes.
12902 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
12904 (aarch64_full_sve_mode): Likewise.
12905 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
12907 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
12908 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
12909 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
12910 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
12912 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
12914 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
12915 (TYPES_all_data): Add bf16.
12916 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
12917 (register_tuple_type): Increase buffer size.
12918 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
12919 (bf16): New type suffix.
12920 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
12921 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
12922 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
12923 Change type from all_data to all_arith.
12924 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
12925 (svminp): Likewise.
12927 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
12928 Matthew Malcomson <matthew.malcomson@arm.com>
12929 Richard Sandiford <richard.sandiford@arm.com>
12931 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
12932 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
12933 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
12934 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
12935 __ARM_FEATURE_MATMUL_FP64.
12936 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
12937 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
12938 be disabled at the same time.
12939 (f32mm): New extension.
12940 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
12941 (AARCH64_FL_F64MM): Bump to the next bit up.
12942 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
12943 (TARGET_SVE_F64MM): New macros.
12944 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
12945 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
12946 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
12947 (UNSPEC_ZIP2Q): New unspeccs.
12948 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
12949 (optab, sur, perm_insn): Handle the new unspecs.
12950 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
12951 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
12952 TARGET_SVE_F64MM instead of separate tests.
12953 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
12954 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
12955 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
12956 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
12957 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
12958 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
12959 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
12960 (TYPES_s_signed): New macro.
12961 (TYPES_s_integer): Use it.
12962 (TYPES_d_float): New macro.
12963 (TYPES_d_data): Use it.
12964 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
12965 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
12966 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
12967 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
12968 (svmmla): New shape.
12969 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
12970 template parameters.
12971 (ternary_resize2_lane_base): Likewise.
12972 (ternary_resize2_base): New class.
12973 (ternary_qq_lane_base): Likewise.
12974 (ternary_intq_uintq_lane_def): Likewise.
12975 (ternary_intq_uintq_lane): New shape.
12976 (ternary_intq_uintq_opt_n_def): New class
12977 (ternary_intq_uintq_opt_n): New shape.
12978 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
12979 (ternary_uintq_intq_def): New class.
12980 (ternary_uintq_intq): New shape.
12981 (ternary_uintq_intq_lane_def): New class.
12982 (ternary_uintq_intq_lane): New shape.
12983 (ternary_uintq_intq_opt_n_def): New class.
12984 (ternary_uintq_intq_opt_n): New shape.
12985 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
12986 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
12987 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
12988 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
12990 (svdotprod_lane_impl): ...this new class.
12991 (svmmla_impl, svusdot_impl): New classes.
12992 (svdot_lane): Update to use svdotprod_lane_impl.
12993 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
12994 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
12996 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
12997 function, with no types defined.
12998 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
12999 AARCH64_FL_I8MM functions.
13000 (svmmla): New AARCH64_FL_F32MM function.
13001 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
13002 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
13003 AARCH64_FL_F64MM function.
13004 (REQUIRED_EXTENSIONS):
13006 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
13008 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
13011 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
13013 * config/i386/i386.md (*movoi_internal_avx): Do not check for
13014 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
13015 (*movti_internal): Do not check for
13016 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
13017 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
13018 just after check for TARGET_AVX.
13019 (*movdf_internal): Ditto.
13020 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
13021 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
13022 * config/i386/sse.md (mov<mode>_internal): Only check
13023 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
13024 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
13025 (<sse>_andnot<mode>3<mask_name>): Move check for
13026 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
13027 (<code><mode>3<mask_name>): Ditto.
13028 (*andnot<mode>3): Ditto.
13029 (*andnottf3): Ditto.
13030 (*<code><mode>3): Ditto.
13031 (*<code>tf3): Ditto.
13032 (*andnot<VI:mode>3): Remove
13033 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
13034 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
13035 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
13036 (sse4_1_blendv<ssemodesuffix>): Ditto.
13037 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
13038 Explain that tune applies to 128bit instructions only.
13040 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
13042 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
13043 to definition of hsa_kernel_description. Parse assembly to find SGPR
13044 and VGPR count of kernel and store in hsa_kernel_description.
13046 2020-01-31 Tamar Christina <tamar.christina@arm.com>
13048 PR rtl-optimization/91838
13049 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
13050 to truncate if allowed or reject combination.
13052 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
13054 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
13055 (find_inv_vars_cb): Likewise.
13057 2020-01-31 David Malcolm <dmalcolm@redhat.com>
13059 * calls.c (special_function_p): Split out the check for DECL_NAME
13060 being non-NULL and fndecl being extern at file scope into a
13061 new maybe_special_function_p and call it. Drop check for fndecl
13062 being non-NULL that was after a usage of DECL_NAME (fndecl).
13063 * tree.h (maybe_special_function_p): New inline function.
13065 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
13067 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
13068 (mask_gather_load<mode>): ... here, and zero-initialize the
13070 (maskload<mode>di): Zero-initialize the destination.
13071 * config/gcn/gcn.c:
13073 2020-01-30 David Malcolm <dmalcolm@redhat.com>
13076 * doc/analyzer.texi (Limitations): Note that constraints on
13077 floating-point values are currently ignored.
13079 2020-01-30 Jakub Jelinek <jakub@redhat.com>
13082 * symtab.c (symtab_node::noninterposable_alias): If localalias
13083 already exists, but is not usable, append numbers after it until
13084 a unique name is found. Formatting fix.
13086 PR middle-end/93505
13087 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
13090 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
13092 * config/gcn/gcn.c (print_operand): Handle LTGT.
13093 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
13095 2020-01-30 Richard Biener <rguenther@suse.de>
13097 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
13098 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
13100 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
13102 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
13103 without a DECL in .data.rel.ro.local.
13105 2020-01-30 Jakub Jelinek <jakub@redhat.com>
13108 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
13112 * config/i386/sse.md
13113 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
13114 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
13115 any_extend code iterator instead of always zero_extend.
13116 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
13117 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
13118 Use any_extend code iterator instead of always zero_extend.
13119 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
13120 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
13121 Use any_extend code iterator instead of always zero_extend.
13122 (*sse2_pmovmskb_ext): New define_insn.
13123 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
13126 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
13127 (*popcountsi2_zext_falsedep): New define_insn.
13129 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13131 * config.in: Regenerated.
13132 * configure: Regenerated.
13134 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
13137 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
13138 LLVM's assembler changed the default in version 9.
13140 2020-01-24 Jeff Law <law@redhat.com>
13142 PR tree-optimization/89689
13143 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
13145 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
13149 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13151 PR rtl-optimization/87763
13152 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13153 simplification to handle subregs as well as bare regs.
13154 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13156 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
13159 * ira.c (ira): Revert use of simplified LRA algorithm.
13161 2020-01-29 Martin Jambor <mjambor@suse.cz>
13163 PR tree-optimization/92706
13164 * tree-sra.c (struct access): Fields first_link, last_link,
13165 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
13166 next_rhs_queued and grp_rhs_queued respectively, new fields
13167 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
13168 (struct assign_link): Field next renamed to next_rhs, new field
13169 next_lhs. Updated comment.
13170 (work_queue_head): Renamed to rhs_work_queue_head.
13171 (lhs_work_queue_head): New variable.
13172 (add_link_to_lhs): New function.
13173 (relink_to_new_repr): Also relink LHS lists.
13174 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
13175 (add_access_to_lhs_work_queue): New function.
13176 (pop_access_from_work_queue): Renamed to
13177 pop_access_from_rhs_work_queue.
13178 (pop_access_from_lhs_work_queue): New function.
13179 (build_accesses_from_assign): Also add links to LHS lists and to LHS
13181 (child_would_conflict_in_lacc): Renamed to
13182 child_would_conflict_in_acc. Adjusted parameter names.
13183 (create_artificial_child_access): New parameter set_grp_read, use it.
13184 (subtree_mark_written_and_enqueue): Renamed to
13185 subtree_mark_written_and_rhs_enqueue.
13186 (propagate_subaccesses_across_link): Renamed to
13187 propagate_subaccesses_from_rhs.
13188 (propagate_subaccesses_from_lhs): New function.
13189 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
13192 2020-01-29 Martin Jambor <mjambor@suse.cz>
13194 PR tree-optimization/92706
13195 * tree-sra.c (struct access): Adjust comment of
13196 grp_total_scalarization.
13197 (find_access_in_subtree): Look for single children spanning an entire
13199 (scalarizable_type_p): Allow register accesses, adjust callers.
13200 (completely_scalarize): Remove function.
13201 (scalarize_elem): Likewise.
13202 (create_total_scalarization_access): Likewise.
13203 (sort_and_splice_var_accesses): Do not track total scalarization
13205 (analyze_access_subtree): New parameter totally, adjust to new meaning
13206 of grp_total_scalarization.
13207 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
13208 (can_totally_scalarize_forest_p): New function.
13209 (create_total_scalarization_access): Likewise.
13210 (create_total_access_and_reshape): Likewise.
13211 (total_should_skip_creating_access): Likewise.
13212 (totally_scalarize_subtree): Likewise.
13213 (analyze_all_variable_accesses): Perform total scalarization after
13214 subaccess propagation using the new functions above.
13215 (initialize_constant_pool_replacements): Output initializers by
13216 traversing the access tree.
13218 2020-01-29 Martin Jambor <mjambor@suse.cz>
13220 * tree-sra.c (verify_sra_access_forest): New function.
13221 (verify_all_sra_access_forests): Likewise.
13222 (create_artificial_child_access): Set parent.
13223 (analyze_all_variable_accesses): Call the verifier.
13225 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13227 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
13228 if called on indirect edge.
13229 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
13230 speculative call if needed.
13232 2020-01-29 Richard Biener <rguenther@suse.de>
13234 PR tree-optimization/93428
13235 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
13236 permutation when the load node is created.
13237 (vect_analyze_slp_instance): Re-use it here.
13239 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13241 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
13243 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
13245 PR rtl-optimization/93272
13246 * ira-lives.c (process_out_of_region_eh_regs): New function.
13247 (process_bb_node_lives): Call it.
13249 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13251 * coverage.c (read_counts_file): Make error message lowercase.
13253 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13255 * profile-count.c (profile_quality_display_names): Fix ordering.
13257 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
13260 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
13261 hash only when edge is first within the sequence.
13262 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
13263 (symbol_table::create_edge): Do not set target_prob.
13264 (cgraph_edge::remove_caller): Watch for speculative calls when updating
13265 the call site hash.
13266 (cgraph_edge::make_speculative): Drop target_prob parameter.
13267 (cgraph_edge::speculative_call_info): Remove.
13268 (cgraph_edge::first_speculative_call_target): New member function.
13269 (update_call_stmt_hash_for_removing_direct_edge): New function.
13270 (cgraph_edge::resolve_speculation): Rewrite to new API.
13271 (cgraph_edge::speculative_call_for_target): New member function.
13272 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
13273 multiple speculation targets.
13274 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
13276 (verify_speculative_call): Verify that targets form an interval.
13277 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
13278 (cgraph_edge::first_speculative_call_target): New member function.
13279 (cgraph_edge::next_speculative_call_target): New member function.
13280 (cgraph_edge::speculative_call_target_ref): New member function.
13281 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
13282 (cgraph_edge): Remove target_prob.
13283 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
13284 Fix handling of speculative calls.
13285 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
13286 * ipa-fnsummary.c (analyze_function_body): Likewise.
13287 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
13288 * ipa-profile.c (dump_histogram): Fix formating.
13289 (ipa_profile_generate_summary): Watch for overflows.
13290 (ipa_profile): Do not require probablity to be 1/2; update to new API.
13291 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
13292 (update_indirect_edges_after_inlining): Update to new API.
13293 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
13295 * profile-count.h: (profile_probability::adjusted): New.
13296 * tree-inline.c (copy_bb): Update to new speculative call API; fix
13297 updating of profile.
13298 * value-prof.c (gimple_ic_transform): Rename to ...
13299 (dump_ic_profile): ... this one; update dumping.
13300 (stream_in_histogram_value): Fix formating.
13301 (gimple_value_profile_transformations): Update.
13303 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
13306 * config/i386/i386.md (*movoi_internal_avx): Remove
13307 TARGET_SSE_TYPELESS_STORES check.
13308 (*movti_internal): Prefer TARGET_AVX over
13309 TARGET_SSE_TYPELESS_STORES.
13310 (*movtf_internal): Likewise.
13311 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
13312 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
13313 from TARGET_SSE_TYPELESS_STORES.
13315 2020-01-28 David Malcolm <dmalcolm@redhat.com>
13317 * diagnostic-core.h (warning_at): Rename overload to...
13318 (warning_meta): ...this.
13319 (emit_diagnostic_valist): Delete decl of overload taking
13320 diagnostic_metadata.
13321 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
13322 (warning_at): Rename overload taking diagnostic_metadata to...
13323 (warning_meta): ...this.
13325 2020-01-28 Richard Biener <rguenther@suse.de>
13327 PR tree-optimization/93439
13328 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
13329 * tree-cfg.c (move_sese_region_to_fn): ... here.
13330 (verify_types_in_gimple_reference): Verify used cliques are
13333 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
13336 * config/i386/i386-options.c (set_ix86_tune_features): Add an
13337 argument of a pointer to struct gcc_options and pass it to
13338 parse_mtune_ctrl_str.
13339 (ix86_function_specific_restore): Pass opts to
13340 set_ix86_tune_features.
13341 (ix86_option_override_internal): Likewise.
13342 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
13343 gcc_options and use it for x_ix86_tune_ctrl_string.
13345 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13347 PR rtl-optimization/87763
13348 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
13349 simplification to handle subregs as well as bare regs.
13350 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
13352 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13354 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
13355 for reduction chains that (now) include a call.
13357 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13359 PR tree-optimization/92822
13360 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
13361 out the don't-care elements of a vector whose significant elements
13362 are duplicates, make the don't-care elements duplicates too.
13364 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
13366 PR tree-optimization/93434
13367 * tree-predcom.c (split_data_refs_to_components): Record which
13368 components have had aliasing loads removed. Prevent store-store
13369 commoning for all such components.
13371 2020-01-28 Jakub Jelinek <jakub@redhat.com>
13374 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
13375 -1 or is_vshift is true, use new_vector with number of elts npatterns
13376 rather than new_unary_operation.
13378 PR tree-optimization/93454
13379 * gimple-fold.c (fold_array_ctor_reference): Perform
13380 elt_size.to_uhwi () just once, instead of calling it in every
13381 iteration. Punt if that value is above size of the temporary
13382 buffer. Decrease third native_encode_expr argument when
13383 bufoff + elt_sz is above size of buf.
13385 2020-01-27 Joseph Myers <joseph@codesourcery.com>
13387 * config/mips/mips.c (mips_declare_object_name)
13388 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
13390 2020-01-27 Martin Liska <mliska@suse.cz>
13392 PR gcov-profile/93403
13393 * tree-profile.c (gimple_init_gcov_profiler): Generate
13394 both __gcov_indirect_call_profiler_v4 and
13395 __gcov_indirect_call_profiler_v4_atomic.
13397 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13400 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
13402 (@aarch64_split_simd_mov<mode>): Use it.
13403 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
13404 Leave the vec_extract patterns to handle 2-element vectors.
13405 (aarch64_simd_mov_from_<mode>high): Likewise.
13406 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
13407 (vec_extractv2dfv1df): Likewise.
13409 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13411 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
13412 jump conditions for *compare_condjump<GPI:mode>.
13414 2020-01-27 David Malcolm <dmalcolm@redhat.com>
13417 * digraph.cc (test_edge::test_edge): Specify template for base
13420 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13422 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
13424 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13426 * config/arc/arc-protos.h (gen_mlo): Remove.
13427 (gen_mhi): Likewise.
13428 * config/arc/arc.c (AUX_MULHI): Define.
13429 (arc_must_save_reister): Special handling for r58/59.
13430 (arc_compute_frame_size): Consider mlo/mhi registers.
13431 (arc_save_callee_saves): Emit fp/sp move only when emit_move
13433 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
13434 mlo/mhi name selection.
13435 (arc_restore_callee_saves): Don't early restore blink when ISR.
13436 (arc_expand_prologue): Add mlo/mhi saving.
13437 (arc_expand_epilogue): Add mlo/mhi restoring.
13440 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
13441 numbering when MUL64 option is used.
13442 (DWARF2_FRAME_REG_OUT): Define.
13443 * config/arc/arc.md (arc600_stall): New pattern.
13444 (VUNSPEC_ARC_ARC600_STALL): Define.
13445 (mulsi64): Use correct mlo/mhi registers.
13446 (mulsi_600): Clean it up.
13447 * config/arc/predicates.md (mlo_operand): Remove any dependency on
13449 (mhi_operand): Likewise.
13451 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
13452 Petro Karashchenko <petro.karashchenko@ring.com>
13454 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
13455 attributes if needed.
13456 (prepare_move_operands): Generate special unspec instruction for
13458 (arc_isuncached_mem_p): Propagate uncached attribute to each
13460 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
13461 (VUNSPEC_ARC_STDI): Likewise.
13462 (ALLI): New mode iterator.
13463 (mALLI): New mode attribute.
13464 (lddi): New instruction pattern.
13466 (stdidi_split): Split instruction for architectures which are not
13467 supporting ll64 option.
13468 (lddidi_split): Likewise.
13470 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13472 PR rtl-optimization/92989
13473 * lra-lives.c (process_bb_lives): Update the live-in set before
13474 processing additional clobbers.
13476 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13478 PR rtl-optimization/93170
13479 * cselib.c (cselib_invalidate_regno_val): New function, split out
13481 (cselib_invalidate_regno): ...here.
13482 (cselib_invalidated_by_call_p): New function.
13483 (cselib_process_insn): Iterate over all the hard-register entries in
13484 REG_VALUES and invalidate any that cross call-clobbered registers.
13486 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
13488 * dojump.c (split_comparison): Use HONOR_NANS rather than
13489 HONOR_SNANS when splitting LTGT.
13491 2020-01-27 Martin Liska <mliska@suse.cz>
13494 * opts.c (print_filtered_help): Exclude language-specific
13495 options from --help=common unless enabled in all FEs.
13497 2020-01-27 Martin Liska <mliska@suse.cz>
13499 * opts.c (print_help): Exclude params from
13500 all except --help=param.
13502 2020-01-27 Martin Liska <mliska@suse.cz>
13505 * config/i386/i386-features.c (make_resolver_func):
13506 Align the code with ppc64 target implementation.
13507 Do not generate a unique name for resolver function.
13509 2020-01-27 Richard Biener <rguenther@suse.de>
13511 PR tree-optimization/93397
13512 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
13513 converted reduction chain SLP graph adjustment.
13515 2020-01-26 Marek Polacek <polacek@redhat.com>
13518 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
13521 2020-01-26 Jason Merrill <jason@redhat.com>
13524 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
13527 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
13529 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
13530 (rx_setmem): Likewise.
13532 2020-01-26 Jakub Jelinek <jakub@redhat.com>
13535 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
13536 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
13537 drop <di> from constraint of last operand.
13540 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
13541 TARGET_AVX2 and V4DFmode not in the split condition, but in the
13542 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
13544 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
13547 * ipa-cp.c (get_info_about_necessary_edges): Remove value
13550 2020-01-24 Jeff Law <law@redhat.com>
13552 PR tree-optimization/92788
13553 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
13556 2020-01-24 Jakub Jelinek <jakub@redhat.com>
13559 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
13560 *avx_vperm_broadcast_<mode>,
13561 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
13562 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
13563 Move before avx2_perm<mode>/avx512f_perm<mode>.
13566 * simplify-rtx.c (simplify_const_unary_operation,
13567 simplify_const_binary_operation): Punt for mode precision above
13568 MAX_BITSIZE_MODE_ANY_INT.
13570 2020-01-24 Andrew Pinski <apinski@marvell.com>
13572 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
13573 alu.shift_reg to 0.
13575 2020-01-24 Jeff Law <law@redhat.com>
13578 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
13579 for REGs. Call output_operand_lossage to get more reasonable
13582 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
13584 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
13585 gcn_fp_compare_operator.
13586 (vec_cmpu<mode>di): Use gcn_compare_operator.
13587 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
13588 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
13589 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
13590 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
13591 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
13592 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
13593 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
13594 gcn_fp_compare_operator.
13595 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
13596 gcn_fp_compare_operator.
13597 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
13598 gcn_fp_compare_operator.
13599 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
13600 gcn_fp_compare_operator.
13602 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
13604 * doc/install.texi (Cross-Compiler-Specific Options): Document
13605 `--with-toolexeclibdir' option.
13607 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
13609 * target.def (flags_regnum): Also mention effect on delay slot filling.
13610 * doc/tm.texi: Regenerate.
13612 2020-01-23 Jeff Law <law@redhat.com>
13614 PR translation/90162
13615 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
13617 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
13620 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
13623 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13625 PR rtl-optimization/93402
13626 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
13629 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13631 * config.in: Regenerated.
13632 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
13633 for TARGET_LIBC_GNUSTACK.
13634 * configure: Regenerated.
13635 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
13636 found to be 2.31 or greater.
13638 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
13640 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
13642 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
13643 (mips_asm_file_end): New function. Delegate to
13644 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
13645 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
13647 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13650 * config/i386/i386-modes.def (POImode): New mode.
13651 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
13652 * config/i386/i386.md (DPWI): New mode attribute.
13653 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
13654 (QWI): Rename to...
13655 (QPWI): ... this. Use POI instead of OI for TImode.
13656 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
13657 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
13660 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13663 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
13665 (speculation_tracker_rev): New pattern.
13666 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
13667 Use speculation_tracker_rev to track the inverse condition.
13669 2020-01-23 Richard Biener <rguenther@suse.de>
13671 PR tree-optimization/93381
13672 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
13673 alias-set of the def as argument and record the first one.
13674 (vn_walk_cb_data::first_set): New member.
13675 (vn_reference_lookup_3): Pass the alias-set of the current def
13676 to push_partial_def. Fix alias-set used in the aggregate copy
13678 (vn_reference_lookup): Consistently set *last_vuse_ptr.
13679 * real.c (clear_significand_below): Fix out-of-bound access.
13681 2020-01-23 Jakub Jelinek <jakub@redhat.com>
13684 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
13685 New define_insn patterns.
13687 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13689 * doc/sourcebuild.texi (check-function-bodies): Add an
13690 optional target/xfail selector.
13692 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
13694 PR rtl-optimization/93124
13695 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
13696 bare USE and CLOBBER insns.
13698 2020-01-22 Andrew Pinski <apinski@marvell.com>
13700 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
13702 2020-01-22 David Malcolm <dmalcolm@redhat.com>
13705 * gdbinit.in (break-on-saved-diagnostic): Update for move of
13706 diagnostic_manager into "ana" namespace.
13707 * selftest-run-tests.c (selftest::run_tests): Update for move of
13708 selftest::run_analyzer_selftests to
13709 ana::selftest::run_analyzer_selftests.
13711 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
13713 * cfgexpand.c (union_stack_vars): Update the size.
13715 2020-01-22 Richard Biener <rguenther@suse.de>
13717 PR tree-optimization/93381
13718 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
13719 throughout, handle all conversions the same.
13721 2020-01-22 Jakub Jelinek <jakub@redhat.com>
13724 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
13725 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
13726 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
13727 Call force_reg on high_in2 unconditionally.
13729 2020-01-22 Martin Liska <mliska@suse.cz>
13731 PR tree-optimization/92924
13732 * profile.c (compute_value_histograms): Divide
13733 all counter values.
13735 2020-01-22 Jakub Jelinek <jakub@redhat.com>
13738 * output.h (assemble_name_resolve): Declare.
13739 * varasm.c (assemble_name_resolve): New function.
13740 (assemble_name): Use it.
13741 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
13743 2020-01-22 Joseph Myers <joseph@codesourcery.com>
13745 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
13746 update_web_docs_git instead of update_web_docs_svn.
13748 2020-01-21 Andrew Pinski <apinski@marvell.com>
13751 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
13752 as PTR mode. Have operand 1 as being modeless, it can be P mode.
13753 (*tlsgd_small_<mode>): Likewise.
13754 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
13755 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
13756 register. Convert that register back to dest using convert_mode.
13758 2020-01-21 Jim Wilson <jimw@sifive.com>
13760 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
13763 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
13764 Uros Bizjak <ubizjak@gmail.com>
13767 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
13769 (legitimize_tls_address): Do GNU2 TLS address computation in
13770 ptr_mode and zero-extend result to Pmode.
13771 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
13772 :P with :PTR and Pmode with ptr_mode.
13773 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
13774 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
13775 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
13777 2020-01-21 Jakub Jelinek <jakub@redhat.com>
13780 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
13781 the last two operands are CONST_INT_P before using them as such.
13783 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
13785 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
13786 to get the integer element types.
13788 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
13790 * config/aarch64/aarch64-sve-builtins.h
13791 (function_expander::convert_to_pmode): Declare.
13792 * config/aarch64/aarch64-sve-builtins.cc
13793 (function_expander::convert_to_pmode): New function.
13794 (function_expander::get_contiguous_base): Use it.
13795 (function_expander::prepare_gather_address_operands): Likewise.
13796 * config/aarch64/aarch64-sve-builtins-sve2.cc
13797 (svwhilerw_svwhilewr_impl::expand): Likewise.
13799 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
13802 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
13803 cfun->machine->label_is_assembled.
13804 (aarch64_print_patchable_function_entry): New.
13805 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
13806 * config/aarch64/aarch64.h (struct machine_function): New field,
13807 label_is_assembled.
13809 2020-01-21 David Malcolm <dmalcolm@redhat.com>
13812 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
13815 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13818 * cgraph.c (cgraph_edge::resolve_speculation,
13819 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
13820 call_stmt_site_hash.
13822 2020-01-21 Martin Liska <mliska@suse.cz>
13824 * config/rs6000/rs6000.c (common_mode_defined): Remove
13827 2020-01-21 Richard Biener <rguenther@suse.de>
13829 PR tree-optimization/92328
13830 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
13831 type when value-numbering same-sized store by inserting a
13833 (eliminate_dom_walker::eliminate_stmt): When eliminating
13834 a redundant store handle bit-reinterpretation of the same value.
13836 2020-01-21 Andrew Pinski <apinski@marvel.com>
13839 * tree-into-ssa.c (prepare_block_for_update_1): Split out
13841 (prepare_block_for_update): This. Use a worklist instead of
13844 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13846 * gcc/config/arm/arm.c (clear_operation_p):
13847 Initialise last_regno, skip first iteration
13848 based on the first_set value and use ints instead
13849 of the unnecessary HOST_WIDE_INTs.
13851 2020-01-21 Jakub Jelinek <jakub@redhat.com>
13854 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
13855 compare_mode other than SFmode or DFmode.
13857 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
13860 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
13861 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
13862 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
13864 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
13866 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
13868 2020-01-20 Andrew Pinski <apinski@marvell.com>
13870 PR middle-end/93242
13871 * targhooks.c (default_print_patchable_function_entry): Use
13872 output_asm_insn to emit the nop instruction.
13874 2020-01-20 Fangrui Song <maskray@google.com>
13876 PR middle-end/93194
13877 * targhooks.c (default_print_patchable_function_entry): Align to
13880 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
13883 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
13884 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
13885 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
13886 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
13887 (*tls_dynamic_gnu2_lea_64): Renamed to ...
13888 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
13889 Remove the {q} suffix from lea.
13890 (*tls_dynamic_gnu2_call_64): Renamed to ...
13891 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
13892 (*tls_dynamic_gnu2_combine_64): Renamed to ...
13893 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
13894 Pass Pmode to gen_tls_dynamic_gnu2_64.
13896 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
13898 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
13900 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
13902 * config/aarch64/aarch64-sve-builtins-base.cc
13903 (svld1ro_impl::memory_vector_mode): Remove parameter name.
13905 2020-01-20 Richard Biener <rguenther@suse.de>
13908 * dwarf2out.c (prune_unused_types): Unconditionally mark
13909 called function DIEs.
13911 2020-01-20 Martin Liska <mliska@suse.cz>
13913 PR tree-optimization/93199
13914 * tree-eh.c (struct leh_state): Add
13915 new field outer_non_cleanup.
13916 (cleanup_is_dead_in): Pass leh_state instead
13917 of eh_region. Add a checking that state->outer_non_cleanup
13918 points to outer non-clean up region.
13919 (lower_try_finally): Record outer_non_cleanup
13921 (lower_catch): Likewise.
13922 (lower_eh_filter): Likewise.
13923 (lower_eh_must_not_throw): Likewise.
13924 (lower_cleanup): Likewise.
13926 2020-01-20 Richard Biener <rguenther@suse.de>
13928 PR tree-optimization/93094
13929 * tree-vectorizer.h (vect_loop_versioning): Adjust.
13930 (vect_transform_loop): Likewise.
13931 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
13932 loop_vectorized_call to vect_transform_loop.
13933 * tree-vect-loop.c (vect_transform_loop): Pass down
13934 loop_vectorized_call to vect_loop_versioning.
13935 * tree-vect-loop-manip.c (vect_loop_versioning): Use
13936 the earlier discovered loop_vectorized_call.
13938 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
13940 * doc/contribute.texi: Update for SVN -> Git transition.
13941 * doc/install.texi: Likewise.
13943 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13946 * cgraph.c (cgraph_edge::make_speculative): Increase number of
13947 speculative targets.
13948 (verify_speculative_call): New function
13949 (cgraph_node::verify_node): Use it.
13950 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
13953 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
13956 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
13957 (cgraph_edge::make_direct): Remove all indirect targets.
13958 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
13959 (cgraph_node::verify_node): Verify that only one call_stmt or
13960 lto_stmt_uid is set.
13961 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
13963 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
13964 (lto_output_ref): Simplify streaming of stmt.
13965 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
13967 2020-01-18 Tamar Christina <tamar.christina@arm.com>
13969 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
13970 Mark parameter unused.
13972 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
13974 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
13976 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
13978 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
13980 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
13982 * Makefile.in: Add coroutine-passes.o.
13983 * builtin-types.def (BT_CONST_SIZE): New.
13984 (BT_FN_BOOL_PTR): New.
13985 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
13986 * builtins.def (DEF_COROUTINE_BUILTIN): New.
13987 * coroutine-builtins.def: New file.
13988 * coroutine-passes.cc: New file.
13989 * function.h (struct GTY function): Add a bit to indicate that the
13990 function is a coroutine component.
13991 * internal-fn.c (expand_CO_FRAME): New.
13992 (expand_CO_YIELD): New.
13993 (expand_CO_SUSPN): New.
13994 (expand_CO_ACTOR): New.
13995 * internal-fn.def (CO_ACTOR): New.
13999 * passes.def: Add pass_coroutine_lower_builtins,
14000 pass_coroutine_early_expand_ifns.
14001 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
14002 (make_pass_coroutine_early_expand_ifns): New.
14003 * doc/invoke.texi: Document the fcoroutines command line
14006 2020-01-18 Jakub Jelinek <jakub@redhat.com>
14008 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
14011 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
14012 after checking the argument is a REG. Don't use REGNO (reg)
14013 again to set last_regno, reuse regno variable instead.
14015 2020-01-17 David Malcolm <dmalcolm@redhat.com>
14017 * doc/analyzer.texi (Limitations): Add note about NaN.
14019 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14020 Sudakshina Das <sudi.das@arm.com>
14022 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
14023 and valid immediate.
14024 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
14025 (lshrdi3): Generate thumb2_lsrl for valid immediates.
14026 * config/arm/constraints.md (Pg): New.
14027 * config/arm/predicates.md (long_shift_imm): New.
14028 (arm_reg_or_long_shift_imm): Likewise.
14029 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
14030 (thumb2_lsll): Likewise.
14031 (thumb2_lsrl): New.
14033 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14034 Sudakshina Das <sudi.das@arm.com>
14036 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
14037 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
14038 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
14039 register pairs for doubleword quantities for ARMv8.1M-Mainline.
14040 * config/arm/thumb2.md (thumb2_asrl): New.
14041 (thumb2_lsll): Likewise.
14043 2020-01-17 Jakub Jelinek <jakub@redhat.com>
14045 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
14048 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
14050 * gdbinit.in (help-gcc-hooks): New command.
14051 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
14052 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
14055 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
14057 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
14058 correct target macro.
14060 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
14062 * config/aarch64/aarch64-protos.h
14063 (aarch64_sve_ld1ro_operand_p): New.
14064 * config/aarch64/aarch64-sve-builtins-base.cc
14065 (class load_replicate): New.
14066 (class svld1ro_impl): New.
14067 (class svld1rq_impl): Change to inherit from load_replicate.
14068 (svld1ro): New sve intrinsic function base.
14069 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
14070 New DEF_SVE_FUNCTION.
14071 * config/aarch64/aarch64-sve-builtins-base.h
14072 (svld1ro): New decl.
14073 * config/aarch64/aarch64-sve-builtins.cc
14074 (function_expander::add_mem_operand): Modify assert to allow
14076 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
14078 * config/aarch64/aarch64.c
14079 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
14080 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
14081 (aarch64_sve_ld1ro_operand_p): New.
14082 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
14083 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
14084 * config/aarch64/predicates.md
14085 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
14087 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
14089 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
14090 Introduce this ACLE specified predefined macro.
14091 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
14092 (fp): Disabling this disables f64mm.
14093 (simd): Disabling this disables f64mm.
14094 (fp16): Disabling this disables f64mm.
14095 (sve): Disabling this disables f64mm.
14096 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
14097 (AARCH64_ISA_F64MM): New.
14098 (TARGET_F64MM): New.
14099 * doc/invoke.texi (f64mm): Document new option.
14101 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
14103 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
14104 (neoversen1_tunings): Likewise.
14106 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
14109 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
14110 Add assert to ensure prolog has been emitted.
14111 (aarch64_split_atomic_op): Likewise.
14112 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
14113 Use epilogue_completed rather than reload_completed.
14114 (aarch64_atomic_exchange<mode>): Likewise.
14115 (aarch64_atomic_<atomic_optab><mode>): Likewise.
14116 (atomic_nand<mode>): Likewise.
14117 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
14118 (atomic_fetch_nand<mode>): Likewise.
14119 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
14120 (atomic_nand_fetch<mode>): Likewise.
14122 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
14125 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
14127 (REVERSE_CONDITION): Delete.
14128 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
14129 (CCFP_CCFPE): Likewise.
14130 (e): New mode attribute.
14131 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
14132 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
14133 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
14134 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
14135 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
14136 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
14137 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
14138 name of generator from gen_ccmpdi to gen_ccmpccdi.
14139 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
14140 the previous comparison but aren't able to, use the new ccmp_rev
14143 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
14145 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
14146 than testing directly for INTEGER_CST.
14147 (gimplify_target_expr, gimplify_omp_depend): Likewise.
14149 2020-01-17 Jakub Jelinek <jakub@redhat.com>
14151 PR tree-optimization/93292
14152 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
14153 get_vectype_for_scalar_type returns NULL.
14155 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
14157 * params.opt (-param=max-predicted-iterations): Increase range from 0.
14158 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
14160 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
14162 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
14164 * params.opt: (max-predicted-iterations): Set bounds.
14165 * predict.c (real_almost_one, real_br_prob_base,
14166 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
14167 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
14168 probabilities; do not truncate to reg_br_prob_bases.
14169 (estimate_loops_at_level): Pass max_cyclic_prob.
14170 (estimate_loops): Compute max_cyclic_prob.
14171 (estimate_bb_frequencies): Do not initialize real_*; update calculation
14173 * profile-count.c (profile_probability::to_sreal): New.
14174 * profile-count.h (class sreal): Move up in file.
14175 (profile_probability::to_sreal): Declare.
14177 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14180 (arm_invalid_conversion): New function for target hook.
14181 (arm_invalid_unary_op): New function for target hook.
14182 (arm_invalid_binary_op): New function for target hook.
14184 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14186 * config.gcc: Add arm_bf16.h.
14187 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
14188 (arm_simd_builtin_std_type): Add BFmode.
14189 (arm_init_simd_builtin_types): Define element types for vector types.
14190 (arm_init_bf16_types): New function.
14191 (arm_init_builtins): Add arm_init_bf16_types function call.
14192 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
14193 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
14194 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
14195 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
14196 (arm_vector_mode_supported_p): Add V4BF, V8BF.
14197 (arm_mangle_type): Add __bf16.
14198 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
14199 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
14200 arm_bf16_ptr_type_node.
14201 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
14202 define_split between ARM registers.
14203 * config/arm/arm_bf16.h: New file.
14204 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14205 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
14206 (VQXMOV): Add V8BF.
14207 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
14208 * config/arm/vfp.md: Add BFmode to movhf patterns.
14210 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
14211 Andre Vieira <andre.simoesdiasvieira@arm.com>
14213 * config/arm/arm-cpus.in (mve, mve_float): New features.
14214 (dsp, mve, mve.fp): New options.
14215 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
14216 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
14217 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
14219 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14220 Thomas Preud'homme <thomas.preudhomme@arm.com>
14222 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
14224 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
14225 error for using -mcmse when targeting Armv8.1-M Mainline.
14227 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14228 Thomas Preud'homme <thomas.preudhomme@arm.com>
14230 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
14231 address in r4 when targeting Armv8.1-M Mainline.
14232 (nonsecure_call_value_internal): Likewise.
14233 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
14234 a register match_operand again. Emit BLXNS when targeting
14235 Armv8.1-M Mainline.
14236 (nonsecure_call_value_reg_thumb2): Likewise.
14238 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14239 Thomas Preud'homme <thomas.preudhomme@arm.com>
14241 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
14242 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
14243 variable as true when floating-point ABI is not hard. Replace
14244 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
14245 Generate VLSTM and VLLDM instruction respectively before and
14246 after a function call to cmse_nonsecure_call function.
14247 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
14248 (VUNSPEC_VLLDM): Likewise.
14249 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
14250 (lazy_load_multiple_insn): Likewise.
14252 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14253 Thomas Preud'homme <thomas.preudhomme@arm.com>
14255 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
14256 (arm_emit_vfp_multi_reg_pop): Likewise.
14257 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
14258 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
14259 restore callee-saved VFP registers.
14261 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14262 Thomas Preud'homme <thomas.preudhomme@arm.com>
14264 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
14265 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
14266 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
14267 callee-saved GPRs as well as clear ip register before doing a nonsecure
14268 call then restore callee-saved GPRs after it when targeting
14269 Armv8.1-M Mainline.
14270 (arm_reorg): Adapt to function rename.
14272 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14273 Thomas Preud'homme <thomas.preudhomme@arm.com>
14275 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
14276 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
14277 clear_vfp_multiple pattern based on a new vfp parameter.
14278 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
14279 targeting Armv8.1-M Mainline.
14280 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
14281 unconditionally when targeting Armv8.1-M Mainline architecture. Check
14282 whether VFP registers are available before looking call_used_regs for a
14284 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
14285 of prototype of clear_operation_p.
14286 (clear_vfp_multiple_operation): New predicate.
14287 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
14288 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
14290 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14291 Thomas Preud'homme <thomas.preudhomme@arm.com>
14293 * config/arm/arm-protos.h (clear_operation_p): Declare.
14294 * config/arm/arm.c (clear_operation_p): New function.
14295 (cmse_clear_registers): Generate clear_multiple instruction pattern if
14296 targeting Armv8.1-M Mainline or successor.
14297 (output_return_instruction): Only output APSR register clearing if
14298 Armv8.1-M Mainline instructions not available.
14299 (thumb_exit): Likewise.
14300 * config/arm/predicates.md (clear_multiple_operation): New predicate.
14301 * config/arm/thumb2.md (clear_apsr): New define_insn.
14302 (clear_multiple): Likewise.
14303 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
14305 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14306 Thomas Preud'homme <thomas.preudhomme@arm.com>
14308 * config/arm/arm.c (fp_sysreg_names): Declare and define.
14309 (use_return_insn): Also return false for Armv8.1-M Mainline.
14310 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
14311 Mainline instructions are available.
14312 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
14313 when targeting Armv8.1-M Mainline Security Extensions.
14314 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
14315 Mainline entry function.
14316 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
14317 targeting Armv8.1-M Mainline or successor.
14318 (arm_expand_epilogue): Fix indentation of caller-saved register
14319 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
14321 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
14322 (FP_SYSREGS): Likewise.
14323 (enum vfp_sysregs_encoding): Define enum.
14324 (fp_sysreg_names): Declare.
14325 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
14326 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
14327 (pop_fpsysreg_insn): Likewise.
14329 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
14330 Thomas Preud'homme <thomas.preudhomme@arm.com>
14332 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
14333 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
14334 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
14335 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
14336 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
14337 (ARMv8_1m_main): New feature group.
14338 (armv8.1-m.main): New architecture.
14339 * config/arm/arm-tables.opt: Regenerate.
14340 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
14341 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
14342 (arm_options_perform_arch_sanity_checks): Error out when targeting
14343 Armv8.1-M Mainline Security Extensions.
14344 * config/arm/arm.h (arm_arch8_1m_main): Declare.
14346 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14348 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
14349 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
14350 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
14351 aarch64_bfdot_laneq): New.
14352 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
14353 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
14354 vbfdotq_laneq_f32): New.
14355 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
14356 VBFMLA_W, VBF): New.
14357 (isquadop): Add V4BF, V8BF.
14359 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14361 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
14362 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
14363 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
14364 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
14365 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
14366 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
14367 usdot_laneq, sudot_lane,sudot_laneq): New.
14368 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
14369 (aarch64_<sur>dot_lane): New.
14370 * config/aarch64/arm_neon.h (vusdot_s32): New.
14371 (vusdotq_s32): New.
14372 (vusdot_lane_s32): New.
14373 (vsudot_lane_s32): New.
14374 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
14375 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
14377 2020-01-16 Martin Liska <mliska@suse.cz>
14379 * value-prof.c (dump_histogram_value): Fix
14380 obvious spacing issue.
14382 2020-01-16 Andrew Pinski <apinski@marvell.com>
14384 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
14385 !storage_order_barrier_p.
14387 2020-01-16 Andrew Pinski <apinski@marvell.com>
14389 * sched-int.h (_dep): Add unused bit-field field for the padding.
14390 * sched-deps.c (init_dep_1): Init unused field.
14392 2020-01-16 Andrew Pinski <apinski@marvell.com>
14394 * optabs.h (create_expand_operand): Initialize target field also.
14396 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14398 PR tree-optimization/92429
14399 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
14400 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
14402 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
14405 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
14407 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
14408 aarch64_sve_int_mode to each mode.
14410 2020-01-15 David Malcolm <dmalcolm@redhat.com>
14412 * doc/analyzer.texi (Overview): Add note about
14413 -fdump-ipa-analyzer.
14415 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
14417 PR tree-optimization/93231
14418 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
14419 input_type is unsigned. Use tree_to_shwi for shift constant.
14420 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
14421 (simplify_count_trailing_zeroes): Add test to handle known non-zero
14422 inputs more efficiently.
14424 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
14426 * config/i386/i386.md (*movsf_internal): Do not require
14427 SSE2 ISA for alternatives 14 and 15.
14429 2020-01-15 Richard Biener <rguenther@suse.de>
14431 PR middle-end/93273
14432 * tree-eh.c (sink_clobbers): If we already visited the destination
14433 block do not defer insertion.
14434 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
14435 the purpose of defered insertion.
14437 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14439 * BASE-VER: Bump to 10.0.1.
14441 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
14443 PR tree-optimization/93247
14444 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
14445 type of the stmt that we're going to vectorize.
14447 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
14449 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
14450 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
14453 2020-01-15 Martin Liska <mliska@suse.cz>
14455 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
14456 2 calls of streamer_read_hwi in a function call.
14458 2020-01-15 Richard Biener <rguenther@suse.de>
14460 * alias.c (record_alias_subset): Avoid redundant work when
14461 subset is already recorded.
14463 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14465 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
14466 the analyzer options provide CWE identifiers.
14468 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14470 * tree-diagnostic-path.cc (path_summary::event_range::print):
14471 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
14472 using get_pure_location.
14474 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14476 PR tree-optimization/93262
14477 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
14478 perform head trimming only if the last argument is constant,
14479 either all ones, or larger or equal to head trim, in the latter
14480 case decrease the last argument by head_trim.
14482 PR tree-optimization/93249
14483 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
14484 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
14485 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
14486 perform head trim unless we can prove there are no '\0' chars
14487 from the source among the first head_trim chars.
14489 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14491 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
14493 2020-01-15 Jakub Jelinek <jakub@redhat.com>
14496 * config/i386/sse.md
14497 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
14498 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
14499 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
14500 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
14501 just a single alternative instead of two, make operands 1 and 2
14504 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
14507 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
14510 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14512 * Makefile.in (lang_opt_files): Add analyzer.opt.
14513 (ANALYZER_OBJS): New.
14514 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
14515 tristate.o and ANALYZER_OBJS.
14516 (TEXI_GCCINT_FILES): Add analyzer.texi.
14517 * common.opt (-fanalyzer): New driver option.
14518 * config.in: Regenerate.
14519 * configure: Regenerate.
14520 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
14521 (gccdepdir): Also create depdir for "analyzer" subdir.
14522 * digraph.cc: New file.
14523 * digraph.h: New file.
14524 * doc/analyzer.texi: New file.
14525 * doc/gccint.texi ("Static Analyzer") New menu item.
14526 (analyzer.texi): Include it.
14527 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
14528 ("Warning Options"): Add static analysis warnings to the list.
14529 (-Wno-analyzer-double-fclose): New option.
14530 (-Wno-analyzer-double-free): New option.
14531 (-Wno-analyzer-exposure-through-output-file): New option.
14532 (-Wno-analyzer-file-leak): New option.
14533 (-Wno-analyzer-free-of-non-heap): New option.
14534 (-Wno-analyzer-malloc-leak): New option.
14535 (-Wno-analyzer-possible-null-argument): New option.
14536 (-Wno-analyzer-possible-null-dereference): New option.
14537 (-Wno-analyzer-null-argument): New option.
14538 (-Wno-analyzer-null-dereference): New option.
14539 (-Wno-analyzer-stale-setjmp-buffer): New option.
14540 (-Wno-analyzer-tainted-array-index): New option.
14541 (-Wno-analyzer-use-after-free): New option.
14542 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
14543 (-Wno-analyzer-use-of-uninitialized-value): New option.
14544 (-Wanalyzer-too-complex): New option.
14545 (-fanalyzer-call-summaries): New warning.
14546 (-fanalyzer-checker=): New warning.
14547 (-fanalyzer-fine-grained): New warning.
14548 (-fno-analyzer-state-merge): New warning.
14549 (-fno-analyzer-state-purge): New warning.
14550 (-fanalyzer-transitivity): New warning.
14551 (-fanalyzer-verbose-edges): New warning.
14552 (-fanalyzer-verbose-state-changes): New warning.
14553 (-fanalyzer-verbosity=): New warning.
14554 (-fdump-analyzer): New warning.
14555 (-fdump-analyzer-callgraph): New warning.
14556 (-fdump-analyzer-exploded-graph): New warning.
14557 (-fdump-analyzer-exploded-nodes): New warning.
14558 (-fdump-analyzer-exploded-nodes-2): New warning.
14559 (-fdump-analyzer-exploded-nodes-3): New warning.
14560 (-fdump-analyzer-supergraph): New warning.
14561 * doc/sourcebuild.texi (dg-require-dot): New.
14562 (dg-check-dot): New.
14563 * gdbinit.in (break-on-saved-diagnostic): New command.
14564 * graphviz.cc: New file.
14565 * graphviz.h: New file.
14566 * ordered-hash-map-tests.cc: New file.
14567 * ordered-hash-map.h: New file.
14568 * passes.def (pass_analyzer): Add before
14569 pass_ipa_whole_program_visibility.
14570 * selftest-run-tests.c (selftest::run_tests): Call
14571 selftest::ordered_hash_map_tests_cc_tests.
14572 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
14574 * shortest-paths.h: New file.
14575 * timevar.def (TV_ANALYZER): New timevar.
14576 (TV_ANALYZER_SUPERGRAPH): Likewise.
14577 (TV_ANALYZER_STATE_PURGE): Likewise.
14578 (TV_ANALYZER_PLAN): Likewise.
14579 (TV_ANALYZER_SCC): Likewise.
14580 (TV_ANALYZER_WORKLIST): Likewise.
14581 (TV_ANALYZER_DUMP): Likewise.
14582 (TV_ANALYZER_DIAGNOSTICS): Likewise.
14583 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
14584 * tree-pass.h (make_pass_analyzer): New decl.
14585 * tristate.cc: New file.
14586 * tristate.h: New file.
14588 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
14591 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
14592 alternatives 9 and 10.
14594 2020-01-14 David Malcolm <dmalcolm@redhat.com>
14596 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
14597 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
14598 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
14599 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
14600 (selftest::hash_map_tests_c_tests): Call it.
14601 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
14602 New static constant, using the value of = H::empty_zero_p.
14603 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
14604 from default_hash_traits <Value>.
14605 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
14607 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
14608 * hash-table.h (hash_table::alloc_entries): Guard the loop of
14609 calls to mark_empty with !Descriptor::empty_zero_p.
14610 (hash_table::empty_slow): Conditionalize the memset call with a
14611 check that Descriptor::empty_zero_p; otherwise, loop through the
14612 entries calling mark_empty on them.
14613 * hash-traits.h (int_hash::empty_zero_p): New static constant.
14614 (pointer_hash::empty_zero_p): Likewise.
14615 (pair_hash::empty_zero_p): Likewise.
14616 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
14618 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
14619 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
14620 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
14621 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
14622 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
14623 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
14624 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
14625 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
14626 * tree-vectorizer.h
14627 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
14630 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
14632 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
14633 fix typo on return value.
14635 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
14638 * cgraph.c (symbol_table::create_edge): Init speculative_id and
14640 (cgraph_edge::make_speculative): Add param for setting speculative_id
14642 (cgraph_edge::speculative_call_info): Update comments and find reference
14643 by speculative_id for multiple indirect targets.
14644 (cgraph_edge::resolve_speculation): Decrease the speculations
14645 for indirect edge, drop it's speculative if not direct target
14646 left. Update comments.
14647 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
14648 (cgraph_node::dump): Print num_speculative_call_targets.
14649 (cgraph_node::verify_node): Don't report error if speculative
14650 edge not include statement.
14651 (cgraph_edge::num_speculative_call_targets_p): New function.
14652 * cgraph.h (int common_target_id): Remove.
14653 (int common_target_probability): Remove.
14654 (num_speculative_call_targets): New variable.
14655 (make_speculative): Add param for setting speculative_id.
14656 (cgraph_edge::num_speculative_call_targets_p): New declare.
14657 (target_prob): New variable.
14658 (speculative_id): New variable.
14659 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
14660 call summaries for multiple speculative call targets.
14661 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
14662 * ipa-profile.c (struct speculative_call_target): New struct.
14663 (class speculative_call_summary): New class.
14664 (class speculative_call_summaries): New class.
14665 (call_sums): New variable.
14666 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
14667 (ipa_profile_write_edge_summary): New function.
14668 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
14669 (ipa_profile_dump_all_summaries): New function.
14670 (ipa_profile_read_edge_summary): New function.
14671 (ipa_profile_read_summary_section): New function.
14672 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
14673 (ipa_profile): Generate num_speculative_call_targets from
14675 * ipa-ref.h (speculative_id): New variable.
14676 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
14677 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
14678 common_target_probability. Stream out speculative_id and
14679 num_speculative_call_targets.
14680 (input_edge): Likewise.
14681 * predict.c (dump_prediction): Remove edges count assert to be
14683 * symtab.c (symtab_node::create_reference): Init speculative_id.
14684 (symtab_node::clone_references): Clone speculative_id.
14685 (symtab_node::clone_referring): Clone speculative_id.
14686 (symtab_node::clone_reference): Clone speculative_id.
14687 (symtab_node::clear_stmts_in_references): Clear speculative_id.
14688 * tree-inline.c (copy_bb): Duplicate all the speculative edges
14689 if indirect call contains multiple speculative targets.
14690 * value-prof.h (check_ic_target): Remove.
14691 * value-prof.c (gimple_value_profile_transformations):
14692 Use void function gimple_ic_transform.
14693 * value-prof.c (gimple_ic_transform): Handle topn case.
14694 Fix comment typos. Change it to a void function.
14696 2020-01-13 Andrew Pinski <apinski@marvell.com>
14698 * config/aarch64/aarch64-cores.def (octeontx2): New define.
14699 (octeontx2t98): New define.
14700 (octeontx2t96): New define.
14701 (octeontx2t93): New define.
14702 (octeontx2f95): New define.
14703 (octeontx2f95n): New define.
14704 (octeontx2f95mm): New define.
14705 * config/aarch64/aarch64-tune.md: Regenerate.
14706 * doc/invoke.texi (-mcpu=): Document the new cpu types.
14708 2020-01-13 Jason Merrill <jason@redhat.com>
14710 PR c++/33799 - destroy return value if local cleanup throws.
14711 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
14713 2020-01-13 Martin Liska <mliska@suse.cz>
14715 * ipa-cp.c (get_max_overall_size): Use newly
14716 renamed param param_ipa_cp_unit_growth.
14717 * params.opt: Remove legacy param name.
14719 2020-01-13 Martin Sebor <msebor@redhat.com>
14721 PR tree-optimization/93213
14722 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
14723 stores to be eliminated.
14725 2020-01-13 Martin Liska <mliska@suse.cz>
14727 * opts.c (print_help): Do not print CL_PARAM
14728 and CL_WARNING for CL_OPTIMIZATION.
14730 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
14733 * doc/invoke.texi (Warning Options): Add caveat about some warnings
14734 depending on optimization settings.
14736 2020-01-13 Jakub Jelinek <jakub@redhat.com>
14738 PR tree-optimization/90838
14739 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14740 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
14741 argument rather than to initialize temporary for targets that
14742 don't use the mode argument at all. Initialize ctzval to avoid
14745 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
14747 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
14748 * tree-core.h: Document it.
14749 * gimplify.c (gimplify_omp_workshare): Set it.
14750 * omp-low.c (lower_omp_target): Use it.
14751 * tree-pretty-print.c (dump_omp_clause): Print it.
14753 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
14754 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
14756 2020-01-10 David Malcolm <dmalcolm@redhat.com>
14758 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
14759 * common.opt (fdiagnostics-path-format=): New option.
14760 (diagnostic_path_format): New enum.
14761 (fdiagnostics-show-path-depths): New option.
14762 * coretypes.h (diagnostic_event_id_t): New forward decl.
14763 * diagnostic-color.c (color_dict): Add "path".
14764 * diagnostic-event-id.h: New file.
14765 * diagnostic-format-json.cc (json_from_expanded_location): Make
14767 (json_end_diagnostic): Call context->make_json_for_path if it
14768 exists and the diagnostic has a path.
14769 (diagnostic_output_format_init): Clear context->print_path.
14770 * diagnostic-path.h: New file.
14771 * diagnostic-show-locus.c (colorizer::set_range): Special-case
14772 when printing a run of events in a diagnostic_path so that they
14773 all get the same color.
14774 (layout::m_diagnostic_path_p): New field.
14775 (layout::layout): Initialize it.
14776 (layout::print_any_labels): Don't colorize the label text for an
14777 event in a diagnostic_path.
14778 (gcc_rich_location::add_location_if_nearby): Add
14779 "restrict_to_current_line_spans" and "label" params. Pass the
14780 former to layout.maybe_add_location_range; pass the latter
14781 when calling add_range.
14782 * diagnostic.c: Include "diagnostic-path.h".
14783 (diagnostic_initialize): Initialize context->path_format and
14784 context->show_path_depths.
14785 (diagnostic_show_any_path): New function.
14786 (diagnostic_path::interprocedural_p): New function.
14787 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
14788 (simple_diagnostic_path::num_events): New function.
14789 (simple_diagnostic_path::get_event): New function.
14790 (simple_diagnostic_path::add_event): New function.
14791 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
14792 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
14793 (debug): New overload taking a diagnostic_path *.
14794 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
14795 * diagnostic.h (enum diagnostic_path_format): New enum.
14796 (json::value): New forward decl.
14797 (diagnostic_context::path_format): New field.
14798 (diagnostic_context::show_path_depths): New field.
14799 (diagnostic_context::print_path): New callback field.
14800 (diagnostic_context::make_json_for_path): New callback field.
14801 (diagnostic_show_any_path): New decl.
14802 (json_from_expanded_location): New decl.
14803 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
14804 (-fdiagnostics-show-path-depths): New option.
14805 (-fdiagnostics-color): Add "path" to description of default
14806 GCC_COLORS; describe it.
14807 (-fdiagnostics-format=json): Document how diagnostic paths are
14808 represented in the JSON output format.
14809 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
14810 Add optional params "restrict_to_current_line_spans" and "label".
14811 * opts.c (common_handle_option): Handle
14812 OPT_fdiagnostics_path_format_ and
14813 OPT_fdiagnostics_show_path_depths.
14814 * pretty-print.c: Include "diagnostic-event-id.h".
14815 (pp_format): Implement "%@" format code for printing
14816 diagnostic_event_id_t *.
14817 (selftest::test_pp_format): Add tests for "%@".
14818 * selftest-run-tests.c (selftest::run_tests): Call
14819 selftest::tree_diagnostic_path_cc_tests.
14820 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
14821 * toplev.c (general_init): Initialize global_dc->path_format and
14822 global_dc->show_path_depths.
14823 * tree-diagnostic-path.cc: New file.
14824 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
14825 non-static. Drop "diagnostic" param in favor of storing the
14826 original value of "where" and re-using it.
14827 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
14828 maybe_unwind_expanded_macro_loc.
14829 (tree_diagnostics_defaults): Initialize context->print_path and
14830 context->make_json_for_path.
14831 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
14833 (default_tree_make_json_for_path): New decl.
14834 (maybe_unwind_expanded_macro_loc): New decl.
14836 2020-01-10 Jakub Jelinek <jakub@redhat.com>
14838 PR tree-optimization/93210
14839 * fold-const.h (native_encode_initializer,
14840 can_native_interpret_type_p): Declare.
14841 * fold-const.c (native_encode_string): Fix up handling with off != -1,
14843 (native_encode_initializer): New function, moved from dwarf2out.c.
14844 Adjust to native_encode_expr compatible arguments, including dry-run
14845 and partial extraction modes. Don't handle STRING_CST.
14846 (can_native_interpret_type_p): No longer static.
14847 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
14848 offset / BITS_PER_UNIT fits into int and don't call it if
14849 can_native_interpret_type_p fails. If suboff is NULL and for
14850 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
14851 native_encode_initializer.
14852 (fold_const_aggregate_ref_1): Formatting fix.
14853 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
14854 (tree_add_const_value_attribute): Adjust caller.
14856 PR tree-optimization/90838
14857 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
14858 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
14859 CTZ_DEFINED_VALUE_AT_ZERO.
14861 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
14863 PR inline-asm/93027
14864 * lra-constraints.c (match_reload): Permit input operands have the
14865 same mode as output while other input operands have a different
14868 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
14870 PR tree-optimization/90838
14871 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
14872 (check_ctz_string): Likewise.
14873 (optimize_count_trailing_zeroes): Likewise.
14874 (simplify_count_trailing_zeroes): Likewise.
14875 (pass_forwprop::execute): Try ctz simplification.
14876 * match.pd: Add matching for ctz idioms.
14878 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14880 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
14882 (aarch64_invalid_unary_op): New function for target hook.
14883 (aarch64_invalid_binary_op): New function for target hook.
14885 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14887 * config.gcc: Add arm_bf16.h.
14888 * config/aarch64/aarch64-builtins.c
14889 (aarch64_simd_builtin_std_type): Add BFmode.
14890 (aarch64_init_simd_builtin_types): Define element types for vector
14892 (aarch64_init_bf16_types): New function.
14893 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
14894 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
14896 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
14897 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
14899 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
14900 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
14901 * config/aarch64/aarch64.c
14902 (aarch64_classify_vector_mode): Add support for BF types.
14903 (aarch64_gimplify_va_arg_expr): Add support for BF types.
14904 (aarch64_vq_mode): Add support for BF types.
14905 (aarch64_simd_container_mode): Add support for BF types.
14906 (aarch64_mangle_type): Add support for BF scalar type.
14907 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
14908 * config/aarch64/arm_bf16.h: New file.
14909 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
14910 * config/aarch64/iterators.md: Add BF types to mode attributes.
14911 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
14913 2020-01-10 Jason Merrill <jason@redhat.com>
14915 PR c++/93173 - incorrect tree sharing.
14916 * gimplify.c (copy_if_shared): No longer static.
14917 * gimplify.h: Declare it.
14919 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14921 * doc/invoke.texi (-msve-vector-bits=): Document that
14922 -msve-vector-bits=128 now generates VL-specific code for
14923 little-endian targets.
14924 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
14925 build_vector_type_for_mode to construct the data vector types.
14926 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
14927 VL-specific code for -msve-vector-bits=128 on little-endian targets.
14928 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
14929 for 128-bit vectors.
14931 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14933 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
14936 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14938 * config/aarch64/aarch64-builtins.c
14939 (aarch64_builtin_vectorized_function): Check for specific vector modes,
14940 rather than checking the number of elements and the element mode.
14942 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14944 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
14945 get_related_vectype_for_scalar_type rather than build_vector_type
14946 to create the index type for a conditional reduction.
14948 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
14950 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
14951 for any type of gather or scatter, including strided accesses.
14953 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
14955 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
14958 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
14960 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
14961 get_dr_vinfo_offset
14962 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
14963 parameter and its use to reset DR_OFFSET's.
14964 (vect_transform_loop): Remove orig_drs_init argument.
14965 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
14966 member of dr_vec_info rather than the offset of the associated
14967 data_reference's innermost_loop_behavior.
14968 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
14969 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
14970 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
14971 get_dr_vinfo_offset.
14972 (vectorizable_store): Likewise.
14973 (vectorizable_load): Likewise.
14975 2020-01-10 Richard Biener <rguenther@suse.de>
14977 * gimple-ssa-store-merging
14978 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
14980 2020-01-10 Martin Liska <mliska@suse.cz>
14983 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
14984 encapsulation that was there before r280040.
14986 2020-01-10 Richard Biener <rguenther@suse.de>
14988 PR middle-end/93199
14989 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
14990 sequences to avoid walking them again for secondary opportunities.
14991 (pass_lower_eh_dispatch::execute): Instead actually insert
14994 2020-01-10 Richard Biener <rguenther@suse.de>
14996 PR middle-end/93199
14997 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
14998 (cleanup_all_empty_eh): Walk landing pads in reverse order to
14999 avoid quadraticness.
15001 2020-01-10 Martin Jambor <mjambor@suse.cz>
15003 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
15004 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
15005 to get param_ipa_sra_max_replacements.
15006 (param_splitting_across_edge): Pass the caller to
15007 pull_accesses_from_callee.
15009 2020-01-10 Martin Jambor <mjambor@suse.cz>
15011 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
15012 * ipa-cp.c (max_new_size): Removed.
15013 (orig_overall_size): New variable.
15014 (get_max_overall_size): New function.
15015 (estimate_local_effects): Use it. Adjust dump.
15016 (decide_about_value): Likewise.
15017 (ipcp_propagate_stage): Do not calculate max_new_size, just store
15018 orig_overall_size. Adjust dump.
15019 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
15021 2020-01-10 Martin Jambor <mjambor@suse.cz>
15023 * params.opt (param_ipa_max_agg_items): Mark as Optimization
15024 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
15025 instead of param_ipa_max_agg_items.
15026 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
15027 optimization info for the callee.
15029 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
15031 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
15032 markers if debug_inline_points is false.
15034 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15036 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
15038 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
15039 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
15040 aarch64-sve-builtins-sve2.h.
15041 (aarch64-sve-builtins-sve2.o): New rule.
15042 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
15043 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
15044 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
15045 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
15046 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
15047 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
15049 * config/aarch64/aarch64-sve.md: Update comments with SVE2
15050 instructions that are handled here.
15051 (@cond_asrd<mode>): Generalize to...
15052 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
15053 (*cond_asrd<mode>_2): Generalize to...
15054 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
15055 (*cond_asrd<mode>_z): Generalize to...
15056 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
15057 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
15058 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
15059 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
15060 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
15062 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
15063 (@aarch64_scatter_stnt<mode>): Likewise.
15064 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
15065 (@aarch64_mul_lane_<mode>): Likewise.
15066 (@aarch64_sve_suqadd<mode>_const): Likewise.
15067 (*<sur>h<addsub><mode>): Generalize to...
15068 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
15070 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
15071 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
15072 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
15073 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
15074 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
15075 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
15076 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
15077 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
15078 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
15079 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
15080 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
15081 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
15082 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
15083 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
15084 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
15085 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
15086 (@aarch64_sve2_xar<mode>): Likewise.
15087 (@aarch64_sve2_bcax<mode>): Likewise.
15088 (*aarch64_sve2_eor3<mode>): Rename to...
15089 (@aarch64_sve2_eor3<mode>): ...this.
15090 (@aarch64_sve2_bsl<mode>): New expander.
15091 (@aarch64_sve2_nbsl<mode>): Likewise.
15092 (@aarch64_sve2_bsl1n<mode>): Likewise.
15093 (@aarch64_sve2_bsl2n<mode>): Likewise.
15094 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
15095 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
15096 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
15097 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
15098 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
15099 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
15100 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
15101 (<su>mull<bt><Vwide>): Generalize to...
15102 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
15104 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
15105 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
15106 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
15107 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15108 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
15109 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15110 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
15111 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15112 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
15113 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
15114 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
15115 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
15116 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
15117 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
15118 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
15119 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
15120 (<SHRNB:r>shrnb<mode>): Generalize to...
15121 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
15123 (<SHRNT:r>shrnt<mode>): Generalize to...
15124 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
15126 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
15127 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
15128 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
15129 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
15130 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
15131 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
15132 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
15133 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
15134 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
15135 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
15136 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
15137 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
15138 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
15139 (@aarch64_sve2_cvtnt<mode>): Likewise.
15140 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
15141 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
15142 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
15143 (@aarch64_sve2_cvtxnt<mode>): Likewise.
15144 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
15145 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
15146 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
15147 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
15148 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
15149 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
15150 (@aarch64_sve2_pmul<mode>): Likewise.
15151 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
15152 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
15153 (@aarch64_sve2_tbl2<mode>): Likewise.
15154 (@aarch64_sve2_tbx<mode>): Likewise.
15155 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
15156 (@aarch64_sve2_histcnt<mode>): Likewise.
15157 (@aarch64_sve2_histseg<mode>): Likewise.
15158 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
15159 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
15160 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
15161 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
15162 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
15163 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
15164 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
15165 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
15166 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
15167 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
15168 (SVE2_PMULL_PAIR_I): New mode iterators.
15169 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
15170 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
15171 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
15172 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
15173 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
15174 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
15175 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
15176 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
15177 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
15178 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
15179 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
15180 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
15181 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
15182 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
15183 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
15184 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
15185 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
15186 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
15187 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
15188 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
15189 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
15190 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
15191 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
15192 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
15193 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
15194 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
15195 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
15196 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
15197 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
15198 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
15199 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
15201 (VNARROW, Ventype): New mode attributes.
15202 (Vewtype): Handle VNx2DI. Fix typo in comment.
15203 (VDOUBLE): New mode attribute.
15204 (sve_lane_con): Handle VNx8HI.
15205 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
15206 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
15207 (sve_int_op, sve_int_op_rev): Handle the above codes.
15208 (sve_pred_int_rhs2_operand): Likewise.
15209 (MULLBT, SHRNB, SHRNT): Delete.
15210 (SVE_INT_SHIFT_IMM): New int iterator.
15211 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
15212 and UNSPEC_WHILEHS for TARGET_SVE2.
15213 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
15214 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
15215 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
15216 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
15217 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
15218 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
15219 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
15220 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
15221 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
15222 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
15223 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
15224 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
15225 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
15226 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
15227 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
15228 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
15229 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
15230 (optab): Handle the new unspecs.
15231 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
15233 (lr): Handle the new unspecs.
15235 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
15236 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
15237 (sve_int_qsub_op): New int attributes.
15238 (sve_fp_op, rot): Handle the new unspecs.
15239 * config/aarch64/aarch64-sve-builtins.h
15240 (function_resolver::require_matching_pointer_type): Declare.
15241 (function_resolver::resolve_unary): Add an optional boolean argument.
15242 (function_resolver::finish_opt_n_resolution): Add an optional
15243 type_suffix_index argument.
15244 (gimple_folder::redirect_call): Declare.
15245 (gimple_expander::prepare_gather_address_operands): Add an optional
15247 * config/aarch64/aarch64-sve-builtins.cc: Include
15248 aarch64-sve-builtins-sve2.h.
15249 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
15250 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
15251 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
15252 (TYPES_hsd_integer): Use TYPES_hsd_signed.
15253 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
15254 (TYPES_s_unsigned): Likewise.
15255 (TYPES_s_integer): Use TYPES_s_unsigned.
15256 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
15257 (TYPES_sd_integer): Use them.
15258 (TYPES_d_unsigned): New macro.
15259 (TYPES_d_integer): Use it.
15260 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
15261 (TYPES_cvt_narrow): Likewise.
15262 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
15263 (preds_mx): New variable.
15264 (function_builder::add_overloaded_function): Allow the new feature
15265 set to be more restrictive than the original one.
15266 (function_resolver::infer_pointer_type): Remove qualifiers from
15267 the pointer type before printing it.
15268 (function_resolver::require_matching_pointer_type): New function.
15269 (function_resolver::resolve_sv_displacement): Handle functions
15270 that don't support 32-bit vector indices or svint32_t vector offsets.
15271 (function_resolver::finish_opt_n_resolution): Take the inferred type
15272 as a separate argument.
15273 (function_resolver::resolve_unary): Optionally treat all forms in
15274 the same way as normal merging functions.
15275 (gimple_folder::redirect_call): New function.
15276 (function_expander::prepare_gather_address_operands): Add an argument
15277 that says whether scaled forms are available. If they aren't,
15278 handle scaling of vector indices and don't add the extension and
15280 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
15281 fall back to using cond_* instead.
15282 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
15283 Split out the member variables into...
15284 (rtx_code_function_base): ...this new base class.
15285 (rtx_code_function_rotated): Inherit rtx_code_function_base.
15286 (unspec_based_function): Split out the member variables into...
15287 (unspec_based_function_base): ...this new base class.
15288 (unspec_based_function_rotated): Inherit unspec_based_function_base.
15289 (unspec_based_function_exact_insn): New class.
15290 (unspec_based_add_function, unspec_based_add_lane_function)
15291 (unspec_based_lane_function, unspec_based_pred_function)
15292 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
15293 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
15294 (unspec_based_sub_function, unspec_based_sub_lane_function): New
15296 (unspec_based_fused_function): New class.
15297 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
15298 (unspec_based_fused_lane_function): New class.
15299 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
15301 (CODE_FOR_MODE1): New macro.
15302 (fixed_insn_function): New class.
15303 (while_comparison): Likewise.
15304 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
15305 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
15306 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
15307 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
15308 (load_gather_sv_restricted, shift_left_imm_long): Declare.
15309 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
15310 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
15311 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
15312 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
15313 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
15314 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
15315 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
15316 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
15317 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
15318 Also add an initial argument for unary_convert_narrowt, regardless
15319 of the predication type.
15320 (build_32_64): Allow loads and stores to specify MODE_none.
15321 (build_sv_index64, build_sv_uint_offset): New functions.
15322 (long_type_suffix): New function.
15323 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
15324 (binary_imm_long_base, load_gather_sv_base): Likewise.
15325 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
15326 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
15327 (unary_narrowb_base, unary_narrowt_base): Likewise.
15328 (binary_long_lane_def, binary_long_lane): New shape.
15329 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
15330 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
15331 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
15332 (binary_to_uint_def, binary_to_uint): Likewise.
15333 (binary_wide_def, binary_wide): Likewise.
15334 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
15335 (compare_def, compare): Likewise.
15336 (compare_ptr_def, compare_ptr): Likewise.
15337 (load_ext_gather_index_restricted_def,
15338 load_ext_gather_index_restricted): Likewise.
15339 (load_ext_gather_offset_restricted_def,
15340 load_ext_gather_offset_restricted): Likewise.
15341 (load_gather_sv_def): Inherit from load_gather_sv_base.
15342 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
15343 (shift_left_imm_def, shift_left_imm): Likewise.
15344 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
15345 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
15346 (store_scatter_index_restricted_def,
15347 store_scatter_index_restricted): Likewise.
15348 (store_scatter_offset_restricted_def,
15349 store_scatter_offset_restricted): Likewise.
15350 (tbl_tuple_def, tbl_tuple): Likewise.
15351 (ternary_long_lane_def, ternary_long_lane): Likewise.
15352 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
15353 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
15354 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
15355 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
15356 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
15357 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
15358 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
15359 (ternary_uint_def, ternary_uint): Likewise.
15360 (unary_convert): Fix typo in comment.
15361 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
15362 (unary_long_def, unary_long): Likewise.
15363 (unary_narrowb_def, unary_narrowb): Likewise.
15364 (unary_narrowt_def, unary_narrowt): Likewise.
15365 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
15366 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
15367 (unary_to_int_def, unary_to_int): Likewise.
15368 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
15369 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
15370 (svasrd_impl): Delete.
15371 (svcadd_impl::expand): Handle integer operations too.
15372 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
15373 new functions to derive the unspec numbers.
15374 (svmla_svmls_lane_impl): Replace with...
15375 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
15376 integer operations too.
15377 (svwhile_impl): Rename to...
15378 (svwhilelx_impl): ...this and inherit from while_comparison.
15379 (svasrd): Use unspec_based_function.
15380 (svmla_lane): Use svmla_lane_impl.
15381 (svmls_lane): Use svmls_lane_impl.
15382 (svrecpe, svrsqrte): Handle unsigned integer operations too.
15383 (svwhilele, svwhilelt): Use svwhilelx_impl.
15384 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
15385 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
15386 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
15387 * config/aarch64/aarch64-sve-builtins.def: Include
15388 aarch64-sve-builtins-sve2.def.
15390 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15392 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
15393 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
15394 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
15395 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
15396 immediates as well as vector ones.
15397 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
15398 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
15399 (aarch64_sve_qsub_immediate): Update calls accordingly.
15401 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15403 * config/aarch64/aarch64-sve2.md: Add banner comments.
15404 (<su>mulh<r>s<mode>3): Move further up file.
15405 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
15406 (*aarch64_sve2_sra<mode>): Move further down file.
15407 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
15409 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15411 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
15412 and UNSPEC_WHILEWR.
15413 (while_optab_cmp): Handle them.
15414 * config/aarch64/aarch64-sve.md
15415 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
15416 and add a "@" marker.
15417 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
15418 instead of gen_aarch64_sve2_while_ptest.
15419 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
15421 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15423 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
15424 (UNSPEC_WHILELE): ...this.
15425 (UNSPEC_WHILE_LO): Rename to...
15426 (UNSPEC_WHILELO): ...this.
15427 (UNSPEC_WHILE_LS): Rename to...
15428 (UNSPEC_WHILELS): ...this.
15429 (UNSPEC_WHILE_LT): Rename to...
15430 (UNSPEC_WHILELT): ...this.
15431 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
15432 (cmp_op, while_optab_cmp): Likewise.
15433 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
15434 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
15435 (svwhilelt): Likewise.
15437 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15439 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
15440 (unary_to_uint): Define.
15441 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
15442 (unary_count): Rename to...
15443 (unary_to_uint_def, unary_to_uint): ...this.
15444 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
15446 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15448 * config/aarch64/aarch64-sve-builtins-functions.h
15449 (code_for_mode_function): New class.
15450 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
15451 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
15452 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
15453 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
15454 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
15456 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15458 * config/aarch64/iterators.md (addsub): New code attribute.
15459 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
15461 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
15462 in the asm string and attributes. Fix indentation.
15463 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
15465 (@aarch64_sve_<optab><mode>): ...this.
15466 * config/aarch64/aarch64-sve-builtins.h
15467 (function_expander::expand_signed_unpred_op): Delete.
15468 * config/aarch64/aarch64-sve-builtins.cc
15469 (function_expander::expand_signed_unpred_op): Likewise.
15470 (function_expander::map_to_rtx_codes): If the optab isn't defined,
15471 try using code_for_aarch64_sve instead.
15472 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
15473 (svqsub_impl): Likewise.
15474 (svqadd, svqsub): Use rtx_code_function instead.
15476 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15478 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
15479 (HADDSUB, sur, addsub): Remove them.
15481 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15483 * tree-nrv.c (pass_return_slot::execute): Handle all internal
15484 functions the same way, rather than singling out those that
15485 aren't mapped directly to optabs.
15487 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
15489 * target.def (compatible_vector_types_p): New target hook.
15490 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
15491 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
15492 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
15493 * doc/tm.texi: Regenerate.
15494 * gimple-expr.c: Include target.h.
15495 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
15496 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
15498 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
15499 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
15500 Use the original predicate if it already has a suitable type.
15502 2020-01-09 Martin Jambor <mjambor@suse.cz>
15504 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
15505 resolve_speculation and redirect_call_stmt_to_callee static. Change
15506 return type of set_call_stmt to cgraph_edge *.
15507 * auto-profile.c (afdo_indirect_call): Adjust call to
15508 redirect_call_stmt_to_callee.
15509 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
15510 make the this pointer explicit, adjust self-recursive calls and the
15511 call top make_direct. Return the resulting edge.
15512 (cgraph_edge::remove): Make this pointer explicit.
15513 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
15514 (cgraph_edge::make_direct): Likewise, adjust call to
15515 resolve_speculation.
15516 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
15517 call to set_call_stmt.
15518 (cgraph_update_edges_for_call_stmt_node): Update call to
15519 set_call_stmt and remove.
15520 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15521 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
15522 (cgraph_node::create_edge_including_clones): Moved "first" definition
15523 of edge to the block where it was used. Adjusted calls to
15525 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
15526 cgraph_edge::remove.
15527 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
15528 make_direct and redirect_call_stmt_to_callee.
15529 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
15530 resolve_speculation and make_direct.
15531 * ipa-inline-transform.c (inline_transform): Adjust call to
15532 redirect_call_stmt_to_callee.
15533 (check_speculations_1):: Adjust call to resolve_speculation.
15534 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
15535 resolve-speculation.
15536 (inline_small_functions): Adjust call to resolve_speculation.
15537 (ipa_inline): Likewise.
15538 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
15540 * ipa-visibility.c (function_and_variable_visibility): Make iteration
15541 safe with regards to edge removal, adjust calls to
15542 redirect_call_stmt_to_callee.
15543 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
15544 and redirect_call_stmt_to_callee.
15545 * multiple_target.c (create_dispatcher_calls): Adjust call to
15546 redirect_call_stmt_to_callee
15547 (redirect_to_specific_clone): Likewise.
15548 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
15549 Adjust calls to cgraph_edge::remove.
15550 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
15551 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
15552 (expand_call_inline): Adjust call to cgraph_edge::remove.
15554 2020-01-09 Martin Liska <mliska@suse.cz>
15556 * params.opt: Set Optimization for
15557 param_max_speculative_devirt_maydefs.
15559 2020-01-09 Martin Sebor <msebor@redhat.com>
15561 PR middle-end/93200
15563 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
15565 2020-01-09 Martin Liska <mliska@suse.cz>
15567 * auto-profile.c (auto_profile): Use opt_for_fn
15569 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
15570 (propagate_vals_across_arith_jfunc): Likewise.
15571 (hint_time_bonus): Likewise.
15572 (incorporate_penalties): Likewise.
15573 (good_cloning_opportunity_p): Likewise.
15574 (perform_estimation_of_a_value): Likewise.
15575 (estimate_local_effects): Likewise.
15576 (ipcp_propagate_stage): Likewise.
15577 * ipa-fnsummary.c (decompose_param_expr): Likewise.
15578 (set_switch_stmt_execution_predicate): Likewise.
15579 (analyze_function_body): Likewise.
15580 * ipa-inline-analysis.c (offline_size): Likewise.
15581 * ipa-inline.c (early_inliner): Likewise.
15582 * ipa-prop.c (ipa_analyze_node): Likewise.
15583 (ipcp_transform_function): Likewise.
15584 * ipa-sra.c (process_scan_results): Likewise.
15585 (ipa_sra_summarize_function): Likewise.
15586 * params.opt: Rename ipcp-unit-growth to
15587 ipa-cp-unit-growth. Add Optimization for various
15588 IPA-related parameters.
15590 2020-01-09 Richard Biener <rguenther@suse.de>
15592 PR middle-end/93054
15593 * gimplify.c (gimplify_expr): Deal with NOP definitions.
15595 2020-01-09 Richard Biener <rguenther@suse.de>
15597 PR tree-optimization/93040
15598 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
15600 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
15602 * common/config/avr/avr-common.c (avr_option_optimization_table)
15603 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
15605 2020-01-09 Martin Liska <mliska@suse.cz>
15607 * cgraphclones.c (symbol_table::materialize_all_clones):
15608 Use cgraph_node::dump_name.
15610 2020-01-09 Jakub Jelinek <jakub@redhat.com>
15612 PR inline-asm/93202
15613 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
15614 output_operand_lossage instead of gcc_unreachable.
15615 * doc/md.texi (riscv f constraint): Fix typo.
15618 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
15619 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
15620 CONST_SCALAR_INT_P instead of CONST_INT_P.
15621 (*subv<mode>4_1): Rename to ...
15622 (subv<mode>4_1): ... this.
15623 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
15624 define_insn_and_split patterns.
15625 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
15628 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15630 * vec.c (class selftest::count_dtor): New class.
15631 (selftest::test_auto_delete_vec): New test.
15632 (selftest::vec_c_tests): Call it.
15633 * vec.h (class auto_delete_vec): New class template.
15634 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
15636 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15638 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
15640 2020-01-08 Jim Wilson <jimw@sifive.com>
15642 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
15643 use of TLS_MODEL_LOCAL_EXEC when not pic.
15645 2020-01-08 David Malcolm <dmalcolm@redhat.com>
15647 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
15650 2020-01-08 Jakub Jelinek <jakub@redhat.com>
15653 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
15654 *stack_protect_set_3 peephole2): Also check that the second
15655 insns source is general_operand.
15658 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
15659 predicate for output operand instead of register_operand.
15660 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
15661 memory destination and non-memory operands[2].
15663 2020-01-08 Martin Liska <mliska@suse.cz>
15665 * cgraph.c (cgraph_node::dump): Use ::dump_name or
15666 ::dump_asm_name instead of (::name or ::asm_name).
15667 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
15668 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
15669 (analyze_functions): Likewise.
15670 (expand_all_functions): Likewise.
15671 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
15672 (propagate_bits_across_jump_function): Likewise.
15673 (dump_profile_updates): Likewise.
15674 (ipcp_store_bits_results): Likewise.
15675 (ipcp_store_vr_results): Likewise.
15676 * ipa-devirt.c (dump_targets): Likewise.
15677 * ipa-fnsummary.c (analyze_function_body): Likewise.
15678 * ipa-hsa.c (check_warn_node_versionable): Likewise.
15679 (process_hsa_functions): Likewise.
15680 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
15681 (set_alias_uids): Likewise.
15682 * ipa-inline-transform.c (save_inline_function_body): Likewise.
15683 * ipa-inline.c (recursive_inlining): Likewise.
15684 (inline_to_all_callers_1): Likewise.
15685 (ipa_inline): Likewise.
15686 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
15687 (ipa_propagate_frequency): Likewise.
15688 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
15689 (remove_described_reference): Likewise.
15690 * ipa-pure-const.c (worse_state): Likewise.
15691 (check_retval_uses): Likewise.
15692 (analyze_function): Likewise.
15693 (propagate_pure_const): Likewise.
15694 (propagate_nothrow): Likewise.
15695 (dump_malloc_lattice): Likewise.
15696 (propagate_malloc): Likewise.
15697 (pass_local_pure_const::execute): Likewise.
15698 * ipa-visibility.c (optimize_weakref): Likewise.
15699 (function_and_variable_visibility): Likewise.
15700 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
15701 (ipa_discover_variable_flags): Likewise.
15702 * lto-streamer-out.c (output_function): Likewise.
15703 (output_constructor): Likewise.
15704 * tree-inline.c (copy_bb): Likewise.
15705 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
15706 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
15708 2020-01-08 Richard Biener <rguenther@suse.de>
15710 PR middle-end/93199
15711 * tree-eh.c (sink_clobbers): Update virtual operands for
15712 the first and last stmt only. Add a dry-run capability.
15713 (pass_lower_eh_dispatch::execute): Perform clobber sinking
15714 after CFG manipulations and in RPO order to catch all
15715 secondary opportunities reliably.
15717 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15720 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15722 2019-01-08 Richard Biener <rguenther@suse.de>
15724 PR middle-end/93199
15725 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
15726 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
15727 virtual operand, also updating SSA use.
15728 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
15729 Update stmt after resetting virtual operand.
15730 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
15731 * gimple-iterator.c (gsi_remove): When not removing the stmt
15732 permanently do not delink immediate uses or mark the stmt modified.
15734 2020-01-08 Martin Liska <mliska@suse.cz>
15736 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
15737 (ipa_call_context::estimate_size_and_time): Likewise.
15738 (inline_analyze_function): Likewise.
15740 2020-01-08 Martin Liska <mliska@suse.cz>
15742 * cgraph.c (cgraph_node::dump): Use systematically
15745 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15747 Add -nodevicespecs option for avr.
15750 * config/avr/avr.opt (-nodevicespecs): New driver option.
15751 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
15752 "-specs=device-specs/..." if that option is not set.
15753 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
15755 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
15757 Implement 64-bit double functions for avr.
15760 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
15761 --with-double-comparison.
15762 * doc/install.texi: Document them.
15763 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
15764 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
15765 <WITH_DOUBLE_COMPARISON>: New built-in defines.
15766 * doc/invoke.texi (AVR Built-in Macros): Document them.
15767 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
15768 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
15769 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
15771 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
15774 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
15775 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
15776 when only building rm-profile multilibs.
15778 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
15781 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
15782 lattice for a value to check.
15783 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
15784 finite propagation in self-recursive scc.
15786 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
15788 * ipa-inline.c (caller_growth_limits): Restore the AND.
15790 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
15792 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
15793 (VEC_ALLREG_ALT): New iterator.
15794 (VEC_ALLREG_INT_MODE): New iterator.
15795 (VCMP_MODE): New iterator.
15796 (VCMP_MODE_INT): New iterator.
15797 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
15798 (vec_cmp<u>v64qidi): New define_expand.
15799 (vec_cmp<mode>di_exec): Use VCMP_MODE.
15800 (vec_cmpu<mode>di_exec): New define_expand.
15801 (vec_cmp<u>v64qidi_exec): New define_expand.
15802 (vec_cmp<mode>di_dup): Use VCMP_MODE.
15803 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
15804 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
15805 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
15806 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
15807 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
15808 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
15809 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
15810 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
15811 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
15813 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
15814 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
15816 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
15818 * config/gcn/constraints.md (DA): Update description and match.
15820 (Db): New constraint.
15821 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
15823 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
15824 Implement 'Db' mixed immediate type.
15825 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
15826 (addcv64si3_dup<exec_vcc>): Delete.
15827 (subcv64si3<exec_vcc>): Rework constraints.
15828 (addv64di3): Rework constraints.
15829 (addv64di3_exec): Rework constraints.
15830 (subv64di3): Rework constraints.
15831 (addv64di3_dup): Delete.
15832 (addv64di3_dup_exec): Delete.
15833 (addv64di3_zext): Rework constraints.
15834 (addv64di3_zext_exec): Rework constraints.
15835 (addv64di3_zext_dup): Rework constraints.
15836 (addv64di3_zext_dup_exec): Rework constraints.
15837 (addv64di3_zext_dup2): Rework constraints.
15838 (addv64di3_zext_dup2_exec): Rework constraints.
15839 (addv64di3_sext_dup2): Rework constraints.
15840 (addv64di3_sext_dup2_exec): Rework constraints.
15842 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
15844 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
15845 existing target checks.
15847 2020-01-07 Richard Biener <rguenther@suse.de>
15849 * doc/install.texi: Bump minimal supported MPC version.
15851 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
15853 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
15854 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
15855 * langhooks.c: Include stor-layout.h.
15856 (lhd_simulate_enum_decl): New function.
15857 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
15858 handle_arm_sve_h for the LTO frontend.
15859 (register_vector_type): Cope with null returns from pushdecl.
15861 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
15863 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
15864 (aarch64_sve::nvectors_if_data_type): Replace with...
15865 (aarch64_sve::builtin_type_p): ...this.
15866 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
15867 (find_vector_type): Delete.
15868 (add_sve_type_attribute): New function.
15869 (lookup_sve_type_attribute): Likewise.
15870 (register_builtin_types): Add an "SVE type" attribute to each type.
15871 (register_tuple_type): Likewise.
15872 (svbool_type_p, nvectors_if_data_type): Delete.
15873 (mangle_builtin_type): Use lookup_sve_type_attribute.
15874 (builtin_type_p): Likewise. Add an overload that returns the
15875 number of constituent vector and predicate registers.
15876 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
15877 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
15878 instead of aarch64_sve_argument_p.
15879 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
15880 (aarch64_pass_by_reference): Likewise.
15881 (aarch64_function_value_1): Likewise.
15882 (aarch64_return_in_memory): Likewise.
15883 (aarch64_layout_arg): Likewise.
15885 2020-01-07 Jakub Jelinek <jakub@redhat.com>
15887 PR tree-optimization/93156
15888 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
15889 least significant bit is always clear.
15891 PR tree-optimization/93118
15892 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
15893 simplifier with two intermediate conversions.
15895 2020-01-07 Martin Liska <mliska@suse.cz>
15897 * params.opt: Add Optimization for various parameters.
15899 2020-01-07 Martin Liska <mliska@suse.cz>
15902 * doc/extend.texi: Explain cloning for target_clone
15905 2020-01-07 Martin Liska <mliska@suse.cz>
15907 PR tree-optimization/92860
15908 * common.opt: Make in Optimization option
15909 as it is affected by -O0, which is an Optimization
15911 * tree-inline.c (tree_inlinable_function_p):
15912 Use opt_for_fn for warn_inline.
15913 (expand_call_inline): Likewise.
15915 2020-01-07 Martin Liska <mliska@suse.cz>
15917 PR tree-optimization/92860
15918 * common.opt: Make flag_ree as optimization
15921 2020-01-07 Martin Liska <mliska@suse.cz>
15923 PR optimization/92860
15924 * params.opt: Mark param_min_crossjump_insns with Optimization
15927 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
15929 * ipa-inline-analysis.c (estimate_growth): Fix typo.
15930 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
15932 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
15934 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
15935 helper function to return the valid addressing formats for a given
15936 hard register and mode.
15937 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
15939 * config/rs6000/constraints.md (Q constraint): Update
15941 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
15944 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15945 Use 'Q' for doing vector extract from memory.
15946 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
15948 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
15949 doing vector extract from memory.
15950 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
15951 extract from memory.
15953 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
15954 for the offset being 34-bits when -mcpu=future is used.
15956 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
15958 * config/pa/pa.md: Revert change to use ordered_comparison_operator
15959 instead of cmpib_comparison_operator in cmpib patterns.
15960 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
15961 of cmpib_comparison_operator. Revise comment.
15963 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15965 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
15966 in an IFN_DIV_POW2 node to be equal.
15968 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15970 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
15971 (vect_check_scalar_mask): ...this.
15972 (vectorizable_store, vectorizable_load): Update call accordingly.
15973 (vectorizable_call): Use vect_check_scalar_mask to check the mask
15974 argument in calls to conditional internal functions.
15976 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
15978 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
15979 '0' matching inputs.
15980 (subv64di3_exec): Likewise.
15982 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
15984 * config/mips/mips.c (vr4130_align_insns): Fix typo.
15985 * doc/md.texi (movstr): Likewise.
15987 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
15989 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
15992 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
15994 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
15996 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
15997 to a temporary file and use move-if-change to update the real
15998 file where necessary.
16000 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
16002 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
16003 rather than Upa for CPY /M.
16005 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
16007 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
16010 2020-01-06 Martin Liska <mliska@suse.cz>
16012 PR tree-optimization/92860
16013 * params.opt: Mark param_max_combine_insns with Optimization
16016 2020-01-05 Jakub Jelinek <jakub@redhat.com>
16019 * config/i386/i386.md (SWIDWI): New mode iterator.
16020 (DWI, dwi): Add TImode variants.
16021 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
16022 <general_hilo_operand> instead of <general_operand>. Use
16023 CONST_SCALAR_INT_P instead of CONST_INT_P.
16024 (*addv<mode>4_1): Rename to ...
16025 (addv<mode>4_1): ... this.
16026 (QWI): New mode attribute.
16027 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
16028 define_insn_and_split patterns.
16029 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
16031 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
16032 <general_hilo_operand> instead of <general_operand>.
16033 (*addcarry<mode>_1): New define_insn.
16034 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
16036 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
16038 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
16039 Use "call" instead of "set".
16041 2020-01-03 Martin Jambor <mjambor@suse.cz>
16044 * ipa-cp.c (print_all_lattices): Skip functions without info.
16046 2020-01-03 Jakub Jelinek <jakub@redhat.com>
16049 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
16050 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
16051 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
16052 for 'e' simd clones.
16055 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
16057 (mprefer-vector-width=): Add Save.
16058 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
16059 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
16060 (ix86_debug_options, ix86_function_specific_print): Adjust
16061 ix86_target_string callers.
16062 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
16063 (ix86_valid_target_attribute_tree): Likewise.
16064 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
16065 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
16066 ix86_target_string caller.
16069 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
16070 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
16071 instead of gen_int_shift_amount + convert_modes.
16073 PR rtl-optimization/93088
16074 * loop-iv.c (find_single_def_src): Punt after looking through
16075 128 reg copies for regs with single definitions. Move definitions
16078 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
16080 * config/arm/arm-c.c (arm_cpu_builtins): Define
16081 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
16082 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
16083 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
16084 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
16085 * config/arm/arm-tables.opt: Regenerated.
16086 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
16087 arm_arch_i8mm and arm_arch_bf16 when enabled.
16088 * config/arm/arm.h (TARGET_I8MM): New macro.
16089 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
16090 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
16091 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
16092 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
16093 (v8_6_a_simd_variants): New.
16094 (v8_*_a_simd_variants): Add i8mm and bf16.
16095 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
16097 2020-01-02 Jakub Jelinek <jakub@redhat.com>
16100 * predict.c (compute_function_frequency): Don't call
16101 warn_function_cold on functions that already have cold attribute.
16103 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
16106 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
16107 COMDAT group function labels in .data.rel.ro.local section.
16108 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
16111 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
16112 comparison_operator in B and S integer comparisons. Likewise, use
16113 ordered_comparison_operator instead of cmpib_comparison_operator in
16115 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
16117 2020-01-01 Jakub Jelinek <jakub@redhat.com>
16119 Update copyright years.
16121 * gcc.c (process_command): Update copyright notice dates.
16122 * gcov-dump.c (print_version): Ditto.
16123 * gcov.c (print_version): Ditto.
16124 * gcov-tool.c (print_version): Ditto.
16125 * gengtype.c (create_file): Ditto.
16126 * doc/cpp.texi: Bump @copying's copyright year.
16127 * doc/cppinternals.texi: Ditto.
16128 * doc/gcc.texi: Ditto.
16129 * doc/gccint.texi: Ditto.
16130 * doc/gcov.texi: Ditto.
16131 * doc/install.texi: Ditto.
16132 * doc/invoke.texi: Ditto.
16134 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
16136 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
16139 2020-01-01 Jakub Jelinek <jakub@redhat.com>
16141 PR tree-optimization/93098
16142 * match.pd (popcount): For shift amounts, use integer_onep
16143 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
16144 tests. Make sure that precision is power of two larger than or equal
16145 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
16146 instead of ULL suffixed constants. Formatting fixes.
16148 Copyright (C) 2020 Free Software Foundation, Inc.
16150 Copying and distribution of this file, with or without modification,
16151 are permitted in any medium without royalty provided the copyright
16152 notice and this notice are preserved.