1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
27 #include "insn-config.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
37 #include "addresses.h"
42 #define MAX_MOVE_MAX MOVE_MAX
45 #ifndef MIN_UNITS_PER_WORD
46 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
49 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
51 /* Modes for each hard register that we can save. The smallest mode is wide
52 enough to save the entire contents of the register. When saving the
53 register because it is live we first try to save in multi-register modes.
54 If that is not possible the save is done one register at a time. */
56 static enum machine_mode
57 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
59 /* For each hard register, a place on the stack where it can be saved,
63 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
65 /* We will only make a register eligible for caller-save if it can be
66 saved in its widest mode with a simple SET insn as long as the memory
67 address is valid. We record the INSN_CODE is those insns here since
68 when we emit them, the addresses might not be valid, so they might not
72 cached_reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
74 cached_reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
76 /* Set of hard regs currently residing in save area (during insn scan). */
78 static HARD_REG_SET hard_regs_saved
;
80 /* Number of registers currently in hard_regs_saved. */
82 static int n_regs_saved
;
84 /* Computed by mark_referenced_regs, all regs referenced in a given
86 static HARD_REG_SET referenced_regs
;
89 static void mark_set_regs (rtx
, const_rtx
, void *);
90 static void mark_referenced_regs (rtx
);
91 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
93 static int insert_restore (struct insn_chain
*, int, int, int,
95 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
97 static void add_stored_regs (rtx
, const_rtx
, void *);
99 static GTY(()) rtx savepat
;
100 static GTY(()) rtx restpat
;
101 static GTY(()) rtx test_reg
;
102 static GTY(()) rtx test_mem
;
103 static GTY(()) rtx saveinsn
;
104 static GTY(()) rtx restinsn
;
106 /* Return the INSN_CODE used to save register REG in mode MODE. */
108 reg_save_code (int reg
, enum machine_mode mode
)
111 if (cached_reg_save_code
[reg
][mode
])
112 return cached_reg_save_code
[reg
][mode
];
113 if (!HARD_REGNO_MODE_OK (reg
, mode
))
115 cached_reg_save_code
[reg
][mode
] = -1;
116 cached_reg_restore_code
[reg
][mode
] = -1;
120 /* Update the register number and modes of the register
121 and memory operand. */
122 SET_REGNO (test_reg
, reg
);
123 PUT_MODE (test_reg
, mode
);
124 PUT_MODE (test_mem
, mode
);
126 /* Force re-recognition of the modified insns. */
127 INSN_CODE (saveinsn
) = -1;
128 INSN_CODE (restinsn
) = -1;
130 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
131 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
133 /* Now extract both insns and see if we can meet their
135 ok
= (cached_reg_save_code
[reg
][mode
] != -1
136 && cached_reg_restore_code
[reg
][mode
] != -1);
139 extract_insn (saveinsn
);
140 ok
= constrain_operands (1);
141 extract_insn (restinsn
);
142 ok
&= constrain_operands (1);
147 cached_reg_save_code
[reg
][mode
] = -1;
148 cached_reg_restore_code
[reg
][mode
] = -1;
150 gcc_assert (cached_reg_save_code
[reg
][mode
]);
151 return cached_reg_save_code
[reg
][mode
];
154 /* Return the INSN_CODE used to restore register REG in mode MODE. */
156 reg_restore_code (int reg
, enum machine_mode mode
)
158 if (cached_reg_restore_code
[reg
][mode
])
159 return cached_reg_restore_code
[reg
][mode
];
160 /* Populate our cache. */
161 reg_save_code (reg
, mode
);
162 return cached_reg_restore_code
[reg
][mode
];
165 /* Initialize for caller-save.
167 Look at all the hard registers that are used by a call and for which
168 regclass.c has not already excluded from being used across a call.
170 Ensure that we can find a mode to save the register and that there is a
171 simple insn to save and restore the register. This latter check avoids
172 problems that would occur if we tried to save the MQ register of some
173 machines directly into memory. */
176 init_caller_save (void)
183 /* First find all the registers that we need to deal with and all
184 the modes that they can have. If we can't find a mode to use,
185 we can't have the register live over calls. */
187 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
189 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
191 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
193 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
195 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
197 call_fixed_regs
[i
] = 1;
198 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
203 regno_save_mode
[i
][1] = VOIDmode
;
206 /* The following code tries to approximate the conditions under which
207 we can easily save and restore a register without scratch registers or
208 other complexities. It will usually work, except under conditions where
209 the validity of an insn operand is dependent on the address offset.
210 No such cases are currently known.
212 We first find a typical offset from some BASE_REG_CLASS register.
213 This address is chosen by finding the first register in the class
214 and by finding the smallest power of two that is a valid offset from
215 that register in every mode we will use to save registers. */
217 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
218 if (TEST_HARD_REG_BIT
220 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
223 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
225 addr_reg
= gen_rtx_REG (Pmode
, i
);
227 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
229 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
231 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
232 if (regno_save_mode
[i
][1] != VOIDmode
233 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
236 if (i
== FIRST_PSEUDO_REGISTER
)
240 /* If we didn't find a valid address, we must use register indirect. */
244 /* Next we try to form an insn to save and restore the register. We
245 see if such an insn is recognized and meets its constraints.
247 To avoid lots of unnecessary RTL allocation, we construct all the RTL
248 once, then modify the memory and register operands in-place. */
250 test_reg
= gen_rtx_REG (VOIDmode
, 0);
251 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
252 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
253 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
255 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0);
256 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0);
258 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
259 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
260 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
262 regno_save_mode
[i
][j
] = VOIDmode
;
265 call_fixed_regs
[i
] = 1;
266 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
271 /* Initialize save areas by showing that we haven't allocated any yet. */
274 init_save_areas (void)
278 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
279 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
280 regno_save_mem
[i
][j
] = 0;
283 /* Allocate save areas for any hard registers that might need saving.
284 We take a conservative approach here and look for call-clobbered hard
285 registers that are assigned to pseudos that cross calls. This may
286 overestimate slightly (especially if some of these registers are later
287 used as spill registers), but it should not be significant.
291 In the fallback case we should iterate backwards across all possible
292 modes for the save, choosing the largest available one instead of
293 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
295 We do not try to use "move multiple" instructions that exist
296 on some machines (such as the 68k moveml). It could be a win to try
297 and use them when possible. The hard part is doing it in a way that is
298 machine independent since they might be saving non-consecutive
299 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
302 setup_save_areas (void)
306 HARD_REG_SET hard_regs_used
;
308 /* Allocate space in the save area for the largest multi-register
309 pseudos first, then work backwards to single register
312 /* Find and record all call-used hard-registers in this function. */
313 CLEAR_HARD_REG_SET (hard_regs_used
);
314 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
315 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
317 unsigned int regno
= reg_renumber
[i
];
318 unsigned int endregno
319 = end_hard_regno (GET_MODE (regno_reg_rtx
[i
]), regno
);
321 for (r
= regno
; r
< endregno
; r
++)
322 if (call_used_regs
[r
])
323 SET_HARD_REG_BIT (hard_regs_used
, r
);
326 /* Now run through all the call-used hard-registers and allocate
327 space for them in the caller-save area. Try to allocate space
328 in a manner which allows multi-register saves/restores to be done. */
330 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
331 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
335 /* If no mode exists for this size, try another. Also break out
336 if we have already saved this hard register. */
337 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
340 /* See if any register in this group has been saved. */
341 for (k
= 0; k
< j
; k
++)
342 if (regno_save_mem
[i
+ k
][1])
350 for (k
= 0; k
< j
; k
++)
351 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
359 /* We have found an acceptable mode to store in. Since hard
360 register is always saved in the widest mode available,
361 the mode may be wider than necessary, it is OK to reduce
362 the alignment of spill space. We will verify that it is
363 equal to or greater than required when we restore and save
364 the hard register in insert_restore and insert_save. */
366 = assign_stack_local_1 (regno_save_mode
[i
][j
],
367 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
370 /* Setup single word save area just in case... */
371 for (k
= 0; k
< j
; k
++)
372 /* This should not depend on WORDS_BIG_ENDIAN.
373 The order of words in regs is the same as in memory. */
374 regno_save_mem
[i
+ k
][1]
375 = adjust_address_nv (regno_save_mem
[i
][j
],
376 regno_save_mode
[i
+ k
][1],
380 /* Now loop again and set the alias set of any save areas we made to
381 the alias set used to represent frame objects. */
382 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
383 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
384 if (regno_save_mem
[i
][j
] != 0)
385 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
388 /* Find the places where hard regs are live across calls and save them. */
391 save_call_clobbered_regs (void)
393 struct insn_chain
*chain
, *next
;
394 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
396 /* Computed in mark_set_regs, holds all registers set by the current
398 HARD_REG_SET this_insn_sets
;
400 CLEAR_HARD_REG_SET (hard_regs_saved
);
403 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
405 rtx insn
= chain
->insn
;
406 enum rtx_code code
= GET_CODE (insn
);
410 gcc_assert (!chain
->is_caller_save_insn
);
414 /* If some registers have been saved, see if INSN references
415 any of them. We must restore them before the insn if so. */
421 if (code
== JUMP_INSN
)
422 /* Restore all registers if this is a JUMP_INSN. */
423 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
426 CLEAR_HARD_REG_SET (referenced_regs
);
427 mark_referenced_regs (PATTERN (insn
));
428 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
431 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
432 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
433 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
436 if (code
== CALL_INSN
437 && ! SIBLING_CALL_P (insn
)
438 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
441 HARD_REG_SET hard_regs_to_save
;
442 reg_set_iterator rsi
;
444 /* Use the register life information in CHAIN to compute which
445 regs are live during the call. */
446 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
447 &chain
->live_throughout
);
448 /* Save hard registers always in the widest mode available. */
449 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
450 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
451 save_mode
[regno
] = regno_save_mode
[regno
][1];
453 save_mode
[regno
] = VOIDmode
;
455 /* Look through all live pseudos, mark their hard registers
456 and choose proper mode for saving. */
457 EXECUTE_IF_SET_IN_REG_SET
458 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
460 int r
= reg_renumber
[regno
];
462 enum machine_mode mode
;
465 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
466 mode
= HARD_REGNO_CALLER_SAVE_MODE
467 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
468 if (GET_MODE_BITSIZE (mode
)
469 > GET_MODE_BITSIZE (save_mode
[r
]))
472 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
475 /* Record all registers set in this call insn. These don't need
476 to be saved. N.B. the call insn might set a subreg of a
477 multi-hard-reg pseudo; then the pseudo is considered live
478 during the call, but the subreg that is set isn't. */
479 CLEAR_HARD_REG_SET (this_insn_sets
);
480 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
482 /* Compute which hard regs must be saved before this call. */
483 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
484 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
485 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
486 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
488 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
489 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
490 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
492 /* Must recompute n_regs_saved. */
494 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
495 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
500 if (chain
->next
== 0 || chain
->next
->block
> chain
->block
)
503 /* At the end of the basic block, we must restore any registers that
504 remain saved. If the last insn in the block is a JUMP_INSN, put
505 the restore before the insn, otherwise, put it after the insn. */
508 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
509 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
510 regno
+= insert_restore (chain
, JUMP_P (insn
),
511 regno
, MOVE_MAX_WORDS
, save_mode
);
516 /* Here from note_stores, or directly from save_call_clobbered_regs, when
517 an insn stores a value in a register.
518 Set the proper bit or bits in this_insn_sets. All pseudos that have
519 been assigned hard regs have had their register number changed already,
520 so we can ignore pseudos. */
522 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
524 int regno
, endregno
, i
;
525 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
527 if (GET_CODE (reg
) == SUBREG
)
529 rtx inner
= SUBREG_REG (reg
);
530 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
532 regno
= subreg_regno (reg
);
533 endregno
= regno
+ subreg_nregs (reg
);
536 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
539 endregno
= END_HARD_REGNO (reg
);
544 for (i
= regno
; i
< endregno
; i
++)
545 SET_HARD_REG_BIT (*this_insn_sets
, i
);
548 /* Here from note_stores when an insn stores a value in a register.
549 Set the proper bit or bits in the passed regset. All pseudos that have
550 been assigned hard regs have had their register number changed already,
551 so we can ignore pseudos. */
553 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
555 int regno
, endregno
, i
;
556 enum machine_mode mode
= GET_MODE (reg
);
559 if (GET_CODE (setter
) == CLOBBER
)
562 if (GET_CODE (reg
) == SUBREG
563 && REG_P (SUBREG_REG (reg
))
564 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
566 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
567 GET_MODE (SUBREG_REG (reg
)),
570 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
571 endregno
= regno
+ subreg_nregs (reg
);
575 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
578 regno
= REGNO (reg
) + offset
;
579 endregno
= end_hard_regno (mode
, regno
);
582 for (i
= regno
; i
< endregno
; i
++)
583 SET_REGNO_REG_SET ((regset
) data
, i
);
586 /* Walk X and record all referenced registers in REFERENCED_REGS. */
588 mark_referenced_regs (rtx x
)
590 enum rtx_code code
= GET_CODE (x
);
595 mark_referenced_regs (SET_SRC (x
));
596 if (code
== SET
|| code
== CLOBBER
)
600 if ((code
== REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
601 || code
== PC
|| code
== CC0
602 || (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
603 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
604 /* If we're setting only part of a multi-word register,
605 we shall mark it as referenced, because the words
606 that are not being set should be restored. */
607 && ((GET_MODE_SIZE (GET_MODE (x
))
608 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
609 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
610 <= UNITS_PER_WORD
))))
613 if (code
== MEM
|| code
== SUBREG
)
621 int regno
= REGNO (x
);
622 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
623 : reg_renumber
[regno
]);
626 add_to_hard_reg_set (&referenced_regs
, GET_MODE (x
), hardregno
);
627 /* If this is a pseudo that did not get a hard register, scan its
628 memory location, since it might involve the use of another
629 register, which might be saved. */
630 else if (reg_equiv_mem
[regno
] != 0)
631 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
632 else if (reg_equiv_address
[regno
] != 0)
633 mark_referenced_regs (reg_equiv_address
[regno
]);
637 fmt
= GET_RTX_FORMAT (code
);
638 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
641 mark_referenced_regs (XEXP (x
, i
));
642 else if (fmt
[i
] == 'E')
643 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
644 mark_referenced_regs (XVECEXP (x
, i
, j
));
648 /* Insert a sequence of insns to restore. Place these insns in front of
649 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
650 the maximum number of registers which should be restored during this call.
651 It should never be less than 1 since we only work with entire registers.
653 Note that we have verified in init_caller_save that we can do this
654 with a simple SET, so use it. Set INSN_CODE to what we save there
655 since the address might not be valid so the insn might not be recognized.
656 These insns will be reloaded and have register elimination done by
657 find_reload, so we need not worry about that here.
659 Return the extra number of registers saved. */
662 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
663 int maxrestore
, enum machine_mode
*save_mode
)
668 unsigned int numregs
= 0;
669 struct insn_chain
*new_chain
;
672 /* A common failure mode if register status is not correct in the
673 RTL is for this routine to be called with a REGNO we didn't
674 expect to save. That will cause us to write an insn with a (nil)
675 SET_DEST or SET_SRC. Instead of doing so and causing a crash
676 later, check for this common case here instead. This will remove
677 one step in debugging such problems. */
678 gcc_assert (regno_save_mem
[regno
][1]);
680 /* Get the pattern to emit and update our status.
682 See if we can restore `maxrestore' registers at once. Work
683 backwards to the single register case. */
684 for (i
= maxrestore
; i
> 0; i
--)
689 if (regno_save_mem
[regno
][i
] == 0)
692 for (j
= 0; j
< i
; j
++)
693 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
698 /* Must do this one restore at a time. */
706 mem
= regno_save_mem
[regno
][numregs
];
707 if (save_mode
[regno
] != VOIDmode
708 && save_mode
[regno
] != GET_MODE (mem
)
709 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
710 mem
= adjust_address (mem
, save_mode
[regno
], 0);
712 mem
= copy_rtx (mem
);
714 /* Verify that the alignment of spill space is equal to or greater
716 gcc_assert (GET_MODE_ALIGNMENT (GET_MODE (mem
)) <= MEM_ALIGN (mem
));
718 pat
= gen_rtx_SET (VOIDmode
,
719 gen_rtx_REG (GET_MODE (mem
),
721 code
= reg_restore_code (regno
, GET_MODE (mem
));
722 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
724 /* Clear status for all registers we restored. */
725 for (k
= 0; k
< i
; k
++)
727 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
728 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
732 /* Tell our callers how many extra registers we saved/restored. */
736 /* Like insert_restore above, but save registers instead. */
739 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
740 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
746 unsigned int numregs
= 0;
747 struct insn_chain
*new_chain
;
750 /* A common failure mode if register status is not correct in the
751 RTL is for this routine to be called with a REGNO we didn't
752 expect to save. That will cause us to write an insn with a (nil)
753 SET_DEST or SET_SRC. Instead of doing so and causing a crash
754 later, check for this common case here. This will remove one
755 step in debugging such problems. */
756 gcc_assert (regno_save_mem
[regno
][1]);
758 /* Get the pattern to emit and update our status.
760 See if we can save several registers with a single instruction.
761 Work backwards to the single register case. */
762 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
766 if (regno_save_mem
[regno
][i
] == 0)
769 for (j
= 0; j
< i
; j
++)
770 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
775 /* Must do this one save at a time. */
783 mem
= regno_save_mem
[regno
][numregs
];
784 if (save_mode
[regno
] != VOIDmode
785 && save_mode
[regno
] != GET_MODE (mem
)
786 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
787 mem
= adjust_address (mem
, save_mode
[regno
], 0);
789 mem
= copy_rtx (mem
);
791 /* Verify that the alignment of spill space is equal to or greater
793 gcc_assert (GET_MODE_ALIGNMENT (GET_MODE (mem
)) <= MEM_ALIGN (mem
));
795 pat
= gen_rtx_SET (VOIDmode
, mem
,
796 gen_rtx_REG (GET_MODE (mem
),
798 code
= reg_save_code (regno
, GET_MODE (mem
));
799 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
801 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
802 for (k
= 0; k
< numregs
; k
++)
804 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
805 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
809 /* Tell our callers how many extra registers we saved/restored. */
813 /* Emit a new caller-save insn and set the code. */
814 static struct insn_chain
*
815 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
817 rtx insn
= chain
->insn
;
818 struct insn_chain
*new_chain
;
821 /* If INSN references CC0, put our insns in front of the insn that sets
822 CC0. This is always safe, since the only way we could be passed an
823 insn that references CC0 is for a restore, and doing a restore earlier
824 isn't a problem. We do, however, assume here that CALL_INSNs don't
825 reference CC0. Guard against non-INSN's like CODE_LABEL. */
827 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
829 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
830 chain
= chain
->prev
, insn
= chain
->insn
;
833 new_chain
= new_insn_chain ();
838 new_chain
->prev
= chain
->prev
;
839 if (new_chain
->prev
!= 0)
840 new_chain
->prev
->next
= new_chain
;
842 reload_insn_chain
= new_chain
;
844 chain
->prev
= new_chain
;
845 new_chain
->next
= chain
;
846 new_chain
->insn
= emit_insn_before (pat
, insn
);
847 /* ??? It would be nice if we could exclude the already / still saved
848 registers from the live sets. */
849 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
850 /* Registers that die in CHAIN->INSN still live in the new insn. */
851 for (link
= REG_NOTES (chain
->insn
); link
; link
= XEXP (link
, 1))
853 if (REG_NOTE_KIND (link
) == REG_DEAD
)
855 rtx reg
= XEXP (link
, 0);
858 gcc_assert (REG_P (reg
));
860 if (regno
>= FIRST_PSEUDO_REGISTER
)
861 regno
= reg_renumber
[regno
];
864 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
866 SET_REGNO_REG_SET (&new_chain
->live_throughout
, regno
+ i
);
870 /* If CHAIN->INSN is a call, then the registers which contain
871 the arguments to the function are live in the new insn. */
872 if (CALL_P (chain
->insn
))
874 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
876 link
= XEXP (link
, 1))
878 rtx arg
= XEXP (link
, 0);
880 if (GET_CODE (arg
) == USE
)
882 rtx reg
= XEXP (arg
, 0);
886 int i
, regno
= REGNO (reg
);
888 /* Registers in CALL_INSN_FUNCTION_USAGE are always
890 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
892 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
894 SET_REGNO_REG_SET (&new_chain
->live_throughout
, regno
+ i
);
901 CLEAR_REG_SET (&new_chain
->dead_or_set
);
902 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
903 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
907 new_chain
->next
= chain
->next
;
908 if (new_chain
->next
!= 0)
909 new_chain
->next
->prev
= new_chain
;
910 chain
->next
= new_chain
;
911 new_chain
->prev
= chain
;
912 new_chain
->insn
= emit_insn_after (pat
, insn
);
913 /* ??? It would be nice if we could exclude the already / still saved
914 registers from the live sets, and observe REG_UNUSED notes. */
915 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
916 /* Registers that are set in CHAIN->INSN live in the new insn.
917 (Unless there is a REG_UNUSED note for them, but we don't
918 look for them here.) */
919 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
920 &new_chain
->live_throughout
);
921 CLEAR_REG_SET (&new_chain
->dead_or_set
);
922 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
923 BB_END (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
925 new_chain
->block
= chain
->block
;
926 new_chain
->is_caller_save_insn
= 1;
928 INSN_CODE (new_chain
->insn
) = code
;
931 #include "gt-caller-save.h"