1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
5 Hacked by Michael Tiemann (tiemann@cygnus.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 /* Instruction reorganization pass.
26 This pass runs after register allocation and final jump
27 optimization. It should be the last pass to run before peephole.
28 It serves primarily to fill delay slots of insns, typically branch
29 and call insns. Other insns typically involve more complicated
30 interactions of data dependencies and resource constraints, and
31 are better handled by scheduling before register allocation (by the
32 function `schedule_insns').
34 The Branch Penalty is the number of extra cycles that are needed to
35 execute a branch insn. On an ideal machine, branches take a single
36 cycle, and the Branch Penalty is 0. Several RISC machines approach
37 branch delays differently:
39 The MIPS has a single branch delay slot. Most insns
40 (except other branches) can be used to fill this slot. When the
41 slot is filled, two insns execute in two cycles, reducing the
42 branch penalty to zero.
44 The SPARC always has a branch delay slot, but its effects can be
45 annulled when the branch is not taken. This means that failing to
46 find other sources of insns, we can hoist an insn from the branch
47 target that would only be safe to execute knowing that the branch
50 The HP-PA always has a branch delay slot. For unconditional branches
51 its effects can be annulled when the branch is taken. The effects
52 of the delay slot in a conditional branch can be nullified for forward
53 taken branches, or for untaken backward branches. This means
54 we can hoist insns from the fall-through path for forward branches or
55 steal insns from the target of backward branches.
57 The TMS320C3x and C4x have three branch delay slots. When the three
58 slots are filled, the branch penalty is zero. Most insns can fill the
59 delay slots except jump insns.
61 Three techniques for filling delay slots have been implemented so far:
63 (1) `fill_simple_delay_slots' is the simplest, most efficient way
64 to fill delay slots. This pass first looks for insns which come
65 from before the branch and which are safe to execute after the
66 branch. Then it searches after the insn requiring delay slots or,
67 in the case of a branch, for insns that are after the point at
68 which the branch merges into the fallthrough code, if such a point
69 exists. When such insns are found, the branch penalty decreases
70 and no code expansion takes place.
72 (2) `fill_eager_delay_slots' is more complicated: it is used for
73 scheduling conditional jumps, or for scheduling jumps which cannot
74 be filled using (1). A machine need not have annulled jumps to use
75 this strategy, but it helps (by keeping more options open).
76 `fill_eager_delay_slots' tries to guess the direction the branch
77 will go; if it guesses right 100% of the time, it can reduce the
78 branch penalty as much as `fill_simple_delay_slots' does. If it
79 guesses wrong 100% of the time, it might as well schedule nops. When
80 `fill_eager_delay_slots' takes insns from the fall-through path of
81 the jump, usually there is no code expansion; when it takes insns
82 from the branch target, there is code expansion if it is not the
83 only way to reach that target.
85 (3) `relax_delay_slots' uses a set of rules to simplify code that
86 has been reorganized by (1) and (2). It finds cases where
87 conditional test can be eliminated, jumps can be threaded, extra
88 insns can be eliminated, etc. It is the job of (1) and (2) to do a
89 good job of scheduling locally; `relax_delay_slots' takes care of
90 making the various individual schedules work well together. It is
91 especially tuned to handle the control flow interactions of branch
92 insns. It does nothing for insns with delay slots that do not
95 On machines that use CC0, we are very conservative. We will not make
96 a copy of an insn involving CC0 since we want to maintain a 1-1
97 correspondence between the insn that sets and uses CC0. The insns are
98 allowed to be separated by placing an insn that sets CC0 (but not an insn
99 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
100 delay slot. In that case, we point each insn at the other with REG_CC_USER
101 and REG_CC_SETTER notes. Note that these restrictions affect very few
102 machines because most RISC machines with delay slots will not use CC0
103 (the RT is the only known exception at this point).
107 The Acorn Risc Machine can conditionally execute most insns, so
108 it is profitable to move single insns into a position to execute
109 based on the condition code of the previous insn.
111 The HP-PA can conditionally nullify insns, providing a similar
112 effect to the ARM, differing mostly in which insn is "in charge". */
116 #include "coretypes.h"
122 #include "function.h"
123 #include "insn-config.h"
124 #include "conditions.h"
125 #include "hard-reg-set.h"
126 #include "basic-block.h"
132 #include "insn-attr.h"
133 #include "resource.h"
138 #include "tree-pass.h"
142 #ifndef ANNUL_IFTRUE_SLOTS
143 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
145 #ifndef ANNUL_IFFALSE_SLOTS
146 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
149 /* Insns which have delay slots that have not yet been filled. */
151 static struct obstack unfilled_slots_obstack
;
152 static rtx
*unfilled_firstobj
;
154 /* Define macros to refer to the first and last slot containing unfilled
155 insns. These are used because the list may move and its address
156 should be recomputed at each use. */
158 #define unfilled_slots_base \
159 ((rtx *) obstack_base (&unfilled_slots_obstack))
161 #define unfilled_slots_next \
162 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
164 /* Points to the label before the end of the function. */
165 static rtx end_of_function_label
;
167 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
168 not always monotonically increase. */
169 static int *uid_to_ruid
;
171 /* Highest valid index in `uid_to_ruid'. */
174 static int stop_search_p (rtx
, int);
175 static int resource_conflicts_p (struct resources
*, struct resources
*);
176 static int insn_references_resource_p (rtx
, struct resources
*, int);
177 static int insn_sets_resource_p (rtx
, struct resources
*, int);
178 static rtx
find_end_label (void);
179 static rtx
emit_delay_sequence (rtx
, rtx
, int);
180 static rtx
add_to_delay_list (rtx
, rtx
);
181 static rtx
delete_from_delay_slot (rtx
);
182 static void delete_scheduled_jump (rtx
);
183 static void note_delay_statistics (int, int);
184 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
185 static rtx
optimize_skip (rtx
);
187 static int get_jump_flags (rtx
, rtx
);
188 static int rare_destination (rtx
);
189 static int mostly_true_jump (rtx
, rtx
);
190 static rtx
get_branch_condition (rtx
, rtx
);
191 static int condition_dominates_p (rtx
, rtx
);
192 static int redirect_with_delay_slots_safe_p (rtx
, rtx
, rtx
);
193 static int redirect_with_delay_list_safe_p (rtx
, rtx
, rtx
);
194 static int check_annul_list_true_false (int, rtx
);
195 static rtx
steal_delay_list_from_target (rtx
, rtx
, rtx
, rtx
,
199 int, int *, int *, rtx
*);
200 static rtx
steal_delay_list_from_fallthrough (rtx
, rtx
, rtx
, rtx
,
205 static void try_merge_delay_insns (rtx
, rtx
);
206 static rtx
redundant_insn (rtx
, rtx
, rtx
);
207 static int own_thread_p (rtx
, rtx
, int);
208 static void update_block (rtx
, rtx
);
209 static int reorg_redirect_jump (rtx
, rtx
);
210 static void update_reg_dead_notes (rtx
, rtx
);
211 static void fix_reg_dead_note (rtx
, rtx
);
212 static void update_reg_unused_notes (rtx
, rtx
);
213 static void fill_simple_delay_slots (int);
214 static rtx
fill_slots_from_thread (rtx
, rtx
, rtx
, rtx
, int, int, int, int,
216 static void fill_eager_delay_slots (void);
217 static void relax_delay_slots (rtx
);
219 static void make_return_insns (rtx
);
222 /* Return TRUE if this insn should stop the search for insn to fill delay
223 slots. LABELS_P indicates that labels should terminate the search.
224 In all cases, jumps terminate the search. */
227 stop_search_p (rtx insn
, int labels_p
)
232 /* If the insn can throw an exception that is caught within the function,
233 it may effectively perform a jump from the viewpoint of the function.
234 Therefore act like for a jump. */
235 if (can_throw_internal (insn
))
238 switch (GET_CODE (insn
))
252 /* OK unless it contains a delay slot or is an `asm' insn of some type.
253 We don't know anything about these. */
254 return (GET_CODE (PATTERN (insn
)) == SEQUENCE
255 || GET_CODE (PATTERN (insn
)) == ASM_INPUT
256 || asm_noperands (PATTERN (insn
)) >= 0);
263 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
264 resource set contains a volatile memory reference. Otherwise, return FALSE. */
267 resource_conflicts_p (struct resources
*res1
, struct resources
*res2
)
269 if ((res1
->cc
&& res2
->cc
) || (res1
->memory
&& res2
->memory
)
270 || (res1
->unch_memory
&& res2
->unch_memory
)
271 || res1
->volatil
|| res2
->volatil
)
275 return (res1
->regs
& res2
->regs
) != HARD_CONST (0);
280 for (i
= 0; i
< HARD_REG_SET_LONGS
; i
++)
281 if ((res1
->regs
[i
] & res2
->regs
[i
]) != 0)
288 /* Return TRUE if any resource marked in RES, a `struct resources', is
289 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
290 routine is using those resources.
292 We compute this by computing all the resources referenced by INSN and
293 seeing if this conflicts with RES. It might be faster to directly check
294 ourselves, and this is the way it used to work, but it means duplicating
295 a large block of complex code. */
298 insn_references_resource_p (rtx insn
, struct resources
*res
,
299 int include_delayed_effects
)
301 struct resources insn_res
;
303 CLEAR_RESOURCE (&insn_res
);
304 mark_referenced_resources (insn
, &insn_res
, include_delayed_effects
);
305 return resource_conflicts_p (&insn_res
, res
);
308 /* Return TRUE if INSN modifies resources that are marked in RES.
309 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
310 included. CC0 is only modified if it is explicitly set; see comments
311 in front of mark_set_resources for details. */
314 insn_sets_resource_p (rtx insn
, struct resources
*res
,
315 int include_delayed_effects
)
317 struct resources insn_sets
;
319 CLEAR_RESOURCE (&insn_sets
);
320 mark_set_resources (insn
, &insn_sets
, 0, include_delayed_effects
);
321 return resource_conflicts_p (&insn_sets
, res
);
324 /* Find a label at the end of the function or before a RETURN. If there
325 is none, try to make one. If that fails, returns 0.
327 The property of such a label is that it is placed just before the
328 epilogue or a bare RETURN insn, so that another bare RETURN can be
329 turned into a jump to the label unconditionally. In particular, the
330 label cannot be placed before a RETURN insn with a filled delay slot.
332 ??? There may be a problem with the current implementation. Suppose
333 we start with a bare RETURN insn and call find_end_label. It may set
334 end_of_function_label just before the RETURN. Suppose the machinery
335 is able to fill the delay slot of the RETURN insn afterwards. Then
336 end_of_function_label is no longer valid according to the property
337 described above and find_end_label will still return it unmodified.
338 Note that this is probably mitigated by the following observation:
339 once end_of_function_label is made, it is very likely the target of
340 a jump, so filling the delay slot of the RETURN will be much more
344 find_end_label (void)
348 /* If we found one previously, return it. */
349 if (end_of_function_label
)
350 return end_of_function_label
;
352 /* Otherwise, see if there is a label at the end of the function. If there
353 is, it must be that RETURN insns aren't needed, so that is our return
354 label and we don't have to do anything else. */
356 insn
= get_last_insn ();
358 || (NONJUMP_INSN_P (insn
)
359 && (GET_CODE (PATTERN (insn
)) == USE
360 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
361 insn
= PREV_INSN (insn
);
363 /* When a target threads its epilogue we might already have a
364 suitable return insn. If so put a label before it for the
365 end_of_function_label. */
367 && JUMP_P (PREV_INSN (insn
))
368 && GET_CODE (PATTERN (PREV_INSN (insn
))) == RETURN
)
370 rtx temp
= PREV_INSN (PREV_INSN (insn
));
371 end_of_function_label
= gen_label_rtx ();
372 LABEL_NUSES (end_of_function_label
) = 0;
374 /* Put the label before an USE insns that may precede the RETURN insn. */
375 while (GET_CODE (temp
) == USE
)
376 temp
= PREV_INSN (temp
);
378 emit_label_after (end_of_function_label
, temp
);
381 else if (LABEL_P (insn
))
382 end_of_function_label
= insn
;
385 end_of_function_label
= gen_label_rtx ();
386 LABEL_NUSES (end_of_function_label
) = 0;
387 /* If the basic block reorder pass moves the return insn to
388 some other place try to locate it again and put our
389 end_of_function_label there. */
390 while (insn
&& ! (JUMP_P (insn
)
391 && (GET_CODE (PATTERN (insn
)) == RETURN
)))
392 insn
= PREV_INSN (insn
);
395 insn
= PREV_INSN (insn
);
397 /* Put the label before an USE insns that may proceed the
399 while (GET_CODE (insn
) == USE
)
400 insn
= PREV_INSN (insn
);
402 emit_label_after (end_of_function_label
, insn
);
413 /* The RETURN insn has its delay slot filled so we cannot
414 emit the label just before it. Since we already have
415 an epilogue and cannot emit a new RETURN, we cannot
416 emit the label at all. */
417 end_of_function_label
= NULL_RTX
;
418 return end_of_function_label
;
420 #endif /* HAVE_epilogue */
422 /* Otherwise, make a new label and emit a RETURN and BARRIER,
424 emit_label (end_of_function_label
);
426 /* We don't bother trying to create a return insn if the
427 epilogue has filled delay-slots; we would have to try and
428 move the delay-slot fillers to the delay-slots for the new
429 return insn or in front of the new return insn. */
430 if (current_function_epilogue_delay_list
== NULL
433 /* The return we make may have delay slots too. */
434 rtx insn
= gen_return ();
435 insn
= emit_jump_insn (insn
);
437 if (num_delay_slots (insn
) > 0)
438 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
444 /* Show one additional use for this label so it won't go away until
446 ++LABEL_NUSES (end_of_function_label
);
448 return end_of_function_label
;
451 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
452 the pattern of INSN with the SEQUENCE.
454 Chain the insns so that NEXT_INSN of each insn in the sequence points to
455 the next and NEXT_INSN of the last insn in the sequence points to
456 the first insn after the sequence. Similarly for PREV_INSN. This makes
457 it easier to scan all insns.
459 Returns the SEQUENCE that replaces INSN. */
462 emit_delay_sequence (rtx insn
, rtx list
, int length
)
468 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
469 rtvec seqv
= rtvec_alloc (length
+ 1);
470 rtx seq
= gen_rtx_SEQUENCE (VOIDmode
, seqv
);
471 rtx seq_insn
= make_insn_raw (seq
);
472 rtx first
= get_insns ();
473 rtx last
= get_last_insn ();
475 /* Make a copy of the insn having delay slots. */
476 rtx delay_insn
= copy_rtx (insn
);
478 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
479 confuse further processing. Update LAST in case it was the last insn.
480 We will put the BARRIER back in later. */
481 if (NEXT_INSN (insn
) && BARRIER_P (NEXT_INSN (insn
)))
483 delete_related_insns (NEXT_INSN (insn
));
484 last
= get_last_insn ();
488 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
489 NEXT_INSN (seq_insn
) = NEXT_INSN (insn
);
490 PREV_INSN (seq_insn
) = PREV_INSN (insn
);
493 PREV_INSN (NEXT_INSN (seq_insn
)) = seq_insn
;
496 NEXT_INSN (PREV_INSN (seq_insn
)) = seq_insn
;
498 /* Note the calls to set_new_first_and_last_insn must occur after
499 SEQ_INSN has been completely spliced into the insn stream.
501 Otherwise CUR_INSN_UID will get set to an incorrect value because
502 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
504 set_new_first_and_last_insn (first
, seq_insn
);
507 set_new_first_and_last_insn (seq_insn
, last
);
509 /* Build our SEQUENCE and rebuild the insn chain. */
510 XVECEXP (seq
, 0, 0) = delay_insn
;
511 INSN_DELETED_P (delay_insn
) = 0;
512 PREV_INSN (delay_insn
) = PREV_INSN (seq_insn
);
514 for (li
= list
; li
; li
= XEXP (li
, 1), i
++)
516 rtx tem
= XEXP (li
, 0);
519 /* Show that this copy of the insn isn't deleted. */
520 INSN_DELETED_P (tem
) = 0;
522 XVECEXP (seq
, 0, i
) = tem
;
523 PREV_INSN (tem
) = XVECEXP (seq
, 0, i
- 1);
524 NEXT_INSN (XVECEXP (seq
, 0, i
- 1)) = tem
;
526 /* SPARC assembler, for instance, emit warning when debug info is output
527 into the delay slot. */
528 if (INSN_LOCATOR (tem
) && !INSN_LOCATOR (seq_insn
))
529 INSN_LOCATOR (seq_insn
) = INSN_LOCATOR (tem
);
530 INSN_LOCATOR (tem
) = 0;
532 for (note
= REG_NOTES (tem
); note
; note
= next
)
534 next
= XEXP (note
, 1);
535 switch (REG_NOTE_KIND (note
))
538 /* Remove any REG_DEAD notes because we can't rely on them now
539 that the insn has been moved. */
540 remove_note (tem
, note
);
544 /* Keep the label reference count up to date. */
545 if (LABEL_P (XEXP (note
, 0)))
546 LABEL_NUSES (XEXP (note
, 0)) ++;
555 NEXT_INSN (XVECEXP (seq
, 0, length
)) = NEXT_INSN (seq_insn
);
557 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
558 last insn in that SEQUENCE to point to us. Similarly for the first
559 insn in the following insn if it is a SEQUENCE. */
561 if (PREV_INSN (seq_insn
) && NONJUMP_INSN_P (PREV_INSN (seq_insn
))
562 && GET_CODE (PATTERN (PREV_INSN (seq_insn
))) == SEQUENCE
)
563 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn
)), 0,
564 XVECLEN (PATTERN (PREV_INSN (seq_insn
)), 0) - 1))
567 if (NEXT_INSN (seq_insn
) && NONJUMP_INSN_P (NEXT_INSN (seq_insn
))
568 && GET_CODE (PATTERN (NEXT_INSN (seq_insn
))) == SEQUENCE
)
569 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn
)), 0, 0)) = seq_insn
;
571 /* If there used to be a BARRIER, put it back. */
573 emit_barrier_after (seq_insn
);
575 gcc_assert (i
== length
+ 1);
580 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
581 be in the order in which the insns are to be executed. */
584 add_to_delay_list (rtx insn
, rtx delay_list
)
586 /* If we have an empty list, just make a new list element. If
587 INSN has its block number recorded, clear it since we may
588 be moving the insn to a new block. */
592 clear_hashed_info_for_insn (insn
);
593 return gen_rtx_INSN_LIST (VOIDmode
, insn
, NULL_RTX
);
596 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
598 XEXP (delay_list
, 1) = add_to_delay_list (insn
, XEXP (delay_list
, 1));
603 /* Delete INSN from the delay slot of the insn that it is in, which may
604 produce an insn with no delay slots. Return the new insn. */
607 delete_from_delay_slot (rtx insn
)
609 rtx trial
, seq_insn
, seq
, prev
;
614 /* We first must find the insn containing the SEQUENCE with INSN in its
615 delay slot. Do this by finding an insn, TRIAL, where
616 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
619 PREV_INSN (NEXT_INSN (trial
)) == trial
;
620 trial
= NEXT_INSN (trial
))
623 seq_insn
= PREV_INSN (NEXT_INSN (trial
));
624 seq
= PATTERN (seq_insn
);
626 if (NEXT_INSN (seq_insn
) && BARRIER_P (NEXT_INSN (seq_insn
)))
629 /* Create a delay list consisting of all the insns other than the one
630 we are deleting (unless we were the only one). */
631 if (XVECLEN (seq
, 0) > 2)
632 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
633 if (XVECEXP (seq
, 0, i
) != insn
)
634 delay_list
= add_to_delay_list (XVECEXP (seq
, 0, i
), delay_list
);
636 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
637 list, and rebuild the delay list if non-empty. */
638 prev
= PREV_INSN (seq_insn
);
639 trial
= XVECEXP (seq
, 0, 0);
640 delete_related_insns (seq_insn
);
641 add_insn_after (trial
, prev
);
643 /* If there was a barrier after the old SEQUENCE, remit it. */
645 emit_barrier_after (trial
);
647 /* If there are any delay insns, remit them. Otherwise clear the
650 trial
= emit_delay_sequence (trial
, delay_list
, XVECLEN (seq
, 0) - 2);
651 else if (INSN_P (trial
))
652 INSN_ANNULLED_BRANCH_P (trial
) = 0;
654 INSN_FROM_TARGET_P (insn
) = 0;
656 /* Show we need to fill this insn again. */
657 obstack_ptr_grow (&unfilled_slots_obstack
, trial
);
662 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
663 the insn that sets CC0 for it and delete it too. */
666 delete_scheduled_jump (rtx insn
)
668 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
669 delete the insn that sets the condition code, but it is hard to find it.
670 Since this case is rare anyway, don't bother trying; there would likely
671 be other insns that became dead anyway, which we wouldn't know to
675 if (reg_mentioned_p (cc0_rtx
, insn
))
677 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
679 /* If a reg-note was found, it points to an insn to set CC0. This
680 insn is in the delay list of some other insn. So delete it from
681 the delay list it was in. */
684 if (! FIND_REG_INC_NOTE (XEXP (note
, 0), NULL_RTX
)
685 && sets_cc0_p (PATTERN (XEXP (note
, 0))) == 1)
686 delete_from_delay_slot (XEXP (note
, 0));
690 /* The insn setting CC0 is our previous insn, but it may be in
691 a delay slot. It will be the last insn in the delay slot, if
693 rtx trial
= previous_insn (insn
);
695 trial
= prev_nonnote_insn (trial
);
696 if (sets_cc0_p (PATTERN (trial
)) != 1
697 || FIND_REG_INC_NOTE (trial
, NULL_RTX
))
699 if (PREV_INSN (NEXT_INSN (trial
)) == trial
)
700 delete_related_insns (trial
);
702 delete_from_delay_slot (trial
);
707 delete_related_insns (insn
);
710 /* Counters for delay-slot filling. */
712 #define NUM_REORG_FUNCTIONS 2
713 #define MAX_DELAY_HISTOGRAM 3
714 #define MAX_REORG_PASSES 2
716 static int num_insns_needing_delays
[NUM_REORG_FUNCTIONS
][MAX_REORG_PASSES
];
718 static int num_filled_delays
[NUM_REORG_FUNCTIONS
][MAX_DELAY_HISTOGRAM
+1][MAX_REORG_PASSES
];
720 static int reorg_pass_number
;
723 note_delay_statistics (int slots_filled
, int index
)
725 num_insns_needing_delays
[index
][reorg_pass_number
]++;
726 if (slots_filled
> MAX_DELAY_HISTOGRAM
)
727 slots_filled
= MAX_DELAY_HISTOGRAM
;
728 num_filled_delays
[index
][slots_filled
][reorg_pass_number
]++;
731 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
733 /* Optimize the following cases:
735 1. When a conditional branch skips over only one instruction,
736 use an annulling branch and put that insn in the delay slot.
737 Use either a branch that annuls when the condition if true or
738 invert the test with a branch that annuls when the condition is
739 false. This saves insns, since otherwise we must copy an insn
742 (orig) (skip) (otherwise)
743 Bcc.n L1 Bcc',a L1 Bcc,a L1'
750 2. When a conditional branch skips over only one instruction,
751 and after that, it unconditionally branches somewhere else,
752 perform the similar optimization. This saves executing the
753 second branch in the case where the inverted condition is true.
762 This should be expanded to skip over N insns, where N is the number
763 of delay slots required. */
766 optimize_skip (rtx insn
)
768 rtx trial
= next_nonnote_insn (insn
);
769 rtx next_trial
= next_active_insn (trial
);
773 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
776 || !NONJUMP_INSN_P (trial
)
777 || GET_CODE (PATTERN (trial
)) == SEQUENCE
778 || recog_memoized (trial
) < 0
779 || (! eligible_for_annul_false (insn
, 0, trial
, flags
)
780 && ! eligible_for_annul_true (insn
, 0, trial
, flags
))
781 || can_throw_internal (trial
))
784 /* There are two cases where we are just executing one insn (we assume
785 here that a branch requires only one insn; this should be generalized
786 at some point): Where the branch goes around a single insn or where
787 we have one insn followed by a branch to the same label we branch to.
788 In both of these cases, inverting the jump and annulling the delay
789 slot give the same effect in fewer insns. */
790 if ((next_trial
== next_active_insn (JUMP_LABEL (insn
))
791 && ! (next_trial
== 0 && current_function_epilogue_delay_list
!= 0))
793 && JUMP_P (next_trial
)
794 && JUMP_LABEL (insn
) == JUMP_LABEL (next_trial
)
795 && (simplejump_p (next_trial
)
796 || GET_CODE (PATTERN (next_trial
)) == RETURN
)))
798 if (eligible_for_annul_false (insn
, 0, trial
, flags
))
800 if (invert_jump (insn
, JUMP_LABEL (insn
), 1))
801 INSN_FROM_TARGET_P (trial
) = 1;
802 else if (! eligible_for_annul_true (insn
, 0, trial
, flags
))
806 delay_list
= add_to_delay_list (trial
, NULL_RTX
);
807 next_trial
= next_active_insn (trial
);
808 update_block (trial
, trial
);
809 delete_related_insns (trial
);
811 /* Also, if we are targeting an unconditional
812 branch, thread our jump to the target of that branch. Don't
813 change this into a RETURN here, because it may not accept what
814 we have in the delay slot. We'll fix this up later. */
815 if (next_trial
&& JUMP_P (next_trial
)
816 && (simplejump_p (next_trial
)
817 || GET_CODE (PATTERN (next_trial
)) == RETURN
))
819 rtx target_label
= JUMP_LABEL (next_trial
);
820 if (target_label
== 0)
821 target_label
= find_end_label ();
825 /* Recompute the flags based on TARGET_LABEL since threading
826 the jump to TARGET_LABEL may change the direction of the
827 jump (which may change the circumstances in which the
828 delay slot is nullified). */
829 flags
= get_jump_flags (insn
, target_label
);
830 if (eligible_for_annul_true (insn
, 0, trial
, flags
))
831 reorg_redirect_jump (insn
, target_label
);
835 INSN_ANNULLED_BRANCH_P (insn
) = 1;
842 /* Encode and return branch direction and prediction information for
843 INSN assuming it will jump to LABEL.
845 Non conditional branches return no direction information and
846 are predicted as very likely taken. */
849 get_jump_flags (rtx insn
, rtx label
)
853 /* get_jump_flags can be passed any insn with delay slots, these may
854 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
855 direction information, and only if they are conditional jumps.
857 If LABEL is zero, then there is no way to determine the branch
860 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
861 && INSN_UID (insn
) <= max_uid
863 && INSN_UID (label
) <= max_uid
)
865 = (uid_to_ruid
[INSN_UID (label
)] > uid_to_ruid
[INSN_UID (insn
)])
866 ? ATTR_FLAG_forward
: ATTR_FLAG_backward
;
867 /* No valid direction information. */
871 /* If insn is a conditional branch call mostly_true_jump to get
872 determine the branch prediction.
874 Non conditional branches are predicted as very likely taken. */
876 && (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
880 prediction
= mostly_true_jump (insn
, get_branch_condition (insn
, label
));
884 flags
|= (ATTR_FLAG_very_likely
| ATTR_FLAG_likely
);
887 flags
|= ATTR_FLAG_likely
;
890 flags
|= ATTR_FLAG_unlikely
;
893 flags
|= (ATTR_FLAG_very_unlikely
| ATTR_FLAG_unlikely
);
901 flags
|= (ATTR_FLAG_very_likely
| ATTR_FLAG_likely
);
906 /* Return 1 if INSN is a destination that will be branched to rarely (the
907 return point of a function); return 2 if DEST will be branched to very
908 rarely (a call to a function that doesn't return). Otherwise,
912 rare_destination (rtx insn
)
917 for (; insn
; insn
= next
)
919 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
920 insn
= XVECEXP (PATTERN (insn
), 0, 0);
922 next
= NEXT_INSN (insn
);
924 switch (GET_CODE (insn
))
929 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
930 don't scan past JUMP_INSNs, so any barrier we find here must
931 have been after a CALL_INSN and hence mean the call doesn't
935 if (GET_CODE (PATTERN (insn
)) == RETURN
)
937 else if (simplejump_p (insn
)
938 && jump_count
++ < 10)
939 next
= JUMP_LABEL (insn
);
948 /* If we got here it means we hit the end of the function. So this
949 is an unlikely destination. */
954 /* Return truth value of the statement that this branch
955 is mostly taken. If we think that the branch is extremely likely
956 to be taken, we return 2. If the branch is slightly more likely to be
957 taken, return 1. If the branch is slightly less likely to be taken,
958 return 0 and if the branch is highly unlikely to be taken, return -1.
960 CONDITION, if nonzero, is the condition that JUMP_INSN is testing. */
963 mostly_true_jump (rtx jump_insn
, rtx condition
)
965 rtx target_label
= JUMP_LABEL (jump_insn
);
967 int rare_dest
, rare_fallthrough
;
969 /* If branch probabilities are available, then use that number since it
970 always gives a correct answer. */
971 note
= find_reg_note (jump_insn
, REG_BR_PROB
, 0);
974 int prob
= INTVAL (XEXP (note
, 0));
976 if (prob
>= REG_BR_PROB_BASE
* 9 / 10)
978 else if (prob
>= REG_BR_PROB_BASE
/ 2)
980 else if (prob
>= REG_BR_PROB_BASE
/ 10)
986 /* Look at the relative rarities of the fallthrough and destination. If
987 they differ, we can predict the branch that way. */
988 rare_dest
= rare_destination (target_label
);
989 rare_fallthrough
= rare_destination (NEXT_INSN (jump_insn
));
991 switch (rare_fallthrough
- rare_dest
)
1005 /* If we couldn't figure out what this jump was, assume it won't be
1006 taken. This should be rare. */
1010 /* Predict backward branches usually take, forward branches usually not. If
1011 we don't know whether this is forward or backward, assume the branch
1012 will be taken, since most are. */
1013 return (target_label
== 0 || INSN_UID (jump_insn
) > max_uid
1014 || INSN_UID (target_label
) > max_uid
1015 || (uid_to_ruid
[INSN_UID (jump_insn
)]
1016 > uid_to_ruid
[INSN_UID (target_label
)]));
1019 /* Return the condition under which INSN will branch to TARGET. If TARGET
1020 is zero, return the condition under which INSN will return. If INSN is
1021 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1022 type of jump, or it doesn't go to TARGET, return 0. */
1025 get_branch_condition (rtx insn
, rtx target
)
1027 rtx pat
= PATTERN (insn
);
1030 if (condjump_in_parallel_p (insn
))
1031 pat
= XVECEXP (pat
, 0, 0);
1033 if (GET_CODE (pat
) == RETURN
)
1034 return target
== 0 ? const_true_rtx
: 0;
1036 else if (GET_CODE (pat
) != SET
|| SET_DEST (pat
) != pc_rtx
)
1039 src
= SET_SRC (pat
);
1040 if (GET_CODE (src
) == LABEL_REF
&& XEXP (src
, 0) == target
)
1041 return const_true_rtx
;
1043 else if (GET_CODE (src
) == IF_THEN_ELSE
1044 && ((target
== 0 && GET_CODE (XEXP (src
, 1)) == RETURN
)
1045 || (GET_CODE (XEXP (src
, 1)) == LABEL_REF
1046 && XEXP (XEXP (src
, 1), 0) == target
))
1047 && XEXP (src
, 2) == pc_rtx
)
1048 return XEXP (src
, 0);
1050 else if (GET_CODE (src
) == IF_THEN_ELSE
1051 && ((target
== 0 && GET_CODE (XEXP (src
, 2)) == RETURN
)
1052 || (GET_CODE (XEXP (src
, 2)) == LABEL_REF
1053 && XEXP (XEXP (src
, 2), 0) == target
))
1054 && XEXP (src
, 1) == pc_rtx
)
1057 rev
= reversed_comparison_code (XEXP (src
, 0), insn
);
1059 return gen_rtx_fmt_ee (rev
, GET_MODE (XEXP (src
, 0)),
1060 XEXP (XEXP (src
, 0), 0),
1061 XEXP (XEXP (src
, 0), 1));
1067 /* Return nonzero if CONDITION is more strict than the condition of
1068 INSN, i.e., if INSN will always branch if CONDITION is true. */
1071 condition_dominates_p (rtx condition
, rtx insn
)
1073 rtx other_condition
= get_branch_condition (insn
, JUMP_LABEL (insn
));
1074 enum rtx_code code
= GET_CODE (condition
);
1075 enum rtx_code other_code
;
1077 if (rtx_equal_p (condition
, other_condition
)
1078 || other_condition
== const_true_rtx
)
1081 else if (condition
== const_true_rtx
|| other_condition
== 0)
1084 other_code
= GET_CODE (other_condition
);
1085 if (GET_RTX_LENGTH (code
) != 2 || GET_RTX_LENGTH (other_code
) != 2
1086 || ! rtx_equal_p (XEXP (condition
, 0), XEXP (other_condition
, 0))
1087 || ! rtx_equal_p (XEXP (condition
, 1), XEXP (other_condition
, 1)))
1090 return comparison_dominates_p (code
, other_code
);
1093 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1094 any insns already in the delay slot of JUMP. */
1097 redirect_with_delay_slots_safe_p (rtx jump
, rtx newlabel
, rtx seq
)
1100 rtx pat
= PATTERN (seq
);
1102 /* Make sure all the delay slots of this jump would still
1103 be valid after threading the jump. If they are still
1104 valid, then return nonzero. */
1106 flags
= get_jump_flags (jump
, newlabel
);
1107 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
1109 #ifdef ANNUL_IFFALSE_SLOTS
1110 (INSN_ANNULLED_BRANCH_P (jump
)
1111 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
1112 ? eligible_for_annul_false (jump
, i
- 1,
1113 XVECEXP (pat
, 0, i
), flags
) :
1115 #ifdef ANNUL_IFTRUE_SLOTS
1116 (INSN_ANNULLED_BRANCH_P (jump
)
1117 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
1118 ? eligible_for_annul_true (jump
, i
- 1,
1119 XVECEXP (pat
, 0, i
), flags
) :
1121 eligible_for_delay (jump
, i
- 1, XVECEXP (pat
, 0, i
), flags
)))
1124 return (i
== XVECLEN (pat
, 0));
1127 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1128 any insns we wish to place in the delay slot of JUMP. */
1131 redirect_with_delay_list_safe_p (rtx jump
, rtx newlabel
, rtx delay_list
)
1136 /* Make sure all the insns in DELAY_LIST would still be
1137 valid after threading the jump. If they are still
1138 valid, then return nonzero. */
1140 flags
= get_jump_flags (jump
, newlabel
);
1141 for (li
= delay_list
, i
= 0; li
; li
= XEXP (li
, 1), i
++)
1143 #ifdef ANNUL_IFFALSE_SLOTS
1144 (INSN_ANNULLED_BRANCH_P (jump
)
1145 && INSN_FROM_TARGET_P (XEXP (li
, 0)))
1146 ? eligible_for_annul_false (jump
, i
, XEXP (li
, 0), flags
) :
1148 #ifdef ANNUL_IFTRUE_SLOTS
1149 (INSN_ANNULLED_BRANCH_P (jump
)
1150 && ! INSN_FROM_TARGET_P (XEXP (li
, 0)))
1151 ? eligible_for_annul_true (jump
, i
, XEXP (li
, 0), flags
) :
1153 eligible_for_delay (jump
, i
, XEXP (li
, 0), flags
)))
1156 return (li
== NULL
);
1159 /* DELAY_LIST is a list of insns that have already been placed into delay
1160 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1161 If not, return 0; otherwise return 1. */
1164 check_annul_list_true_false (int annul_true_p
, rtx delay_list
)
1170 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1172 rtx trial
= XEXP (temp
, 0);
1174 if ((annul_true_p
&& INSN_FROM_TARGET_P (trial
))
1175 || (!annul_true_p
&& !INSN_FROM_TARGET_P (trial
)))
1183 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1184 the condition tested by INSN is CONDITION and the resources shown in
1185 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1186 from SEQ's delay list, in addition to whatever insns it may execute
1187 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1188 needed while searching for delay slot insns. Return the concatenated
1189 delay list if possible, otherwise, return 0.
1191 SLOTS_TO_FILL is the total number of slots required by INSN, and
1192 PSLOTS_FILLED points to the number filled so far (also the number of
1193 insns in DELAY_LIST). It is updated with the number that have been
1194 filled from the SEQUENCE, if any.
1196 PANNUL_P points to a nonzero value if we already know that we need
1197 to annul INSN. If this routine determines that annulling is needed,
1198 it may set that value nonzero.
1200 PNEW_THREAD points to a location that is to receive the place at which
1201 execution should continue. */
1204 steal_delay_list_from_target (rtx insn
, rtx condition
, rtx seq
,
1205 rtx delay_list
, struct resources
*sets
,
1206 struct resources
*needed
,
1207 struct resources
*other_needed
,
1208 int slots_to_fill
, int *pslots_filled
,
1209 int *pannul_p
, rtx
*pnew_thread
)
1212 int slots_remaining
= slots_to_fill
- *pslots_filled
;
1213 int total_slots_filled
= *pslots_filled
;
1214 rtx new_delay_list
= 0;
1215 int must_annul
= *pannul_p
;
1218 struct resources cc_set
;
1220 /* We can't do anything if there are more delay slots in SEQ than we
1221 can handle, or if we don't know that it will be a taken branch.
1222 We know that it will be a taken branch if it is either an unconditional
1223 branch or a conditional branch with a stricter branch condition.
1225 Also, exit if the branch has more than one set, since then it is computing
1226 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1227 ??? It may be possible to move other sets into INSN in addition to
1228 moving the instructions in the delay slots.
1230 We can not steal the delay list if one of the instructions in the
1231 current delay_list modifies the condition codes and the jump in the
1232 sequence is a conditional jump. We can not do this because we can
1233 not change the direction of the jump because the condition codes
1234 will effect the direction of the jump in the sequence. */
1236 CLEAR_RESOURCE (&cc_set
);
1237 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1239 rtx trial
= XEXP (temp
, 0);
1241 mark_set_resources (trial
, &cc_set
, 0, MARK_SRC_DEST_CALL
);
1242 if (insn_references_resource_p (XVECEXP (seq
, 0, 0), &cc_set
, 0))
1246 if (XVECLEN (seq
, 0) - 1 > slots_remaining
1247 || ! condition_dominates_p (condition
, XVECEXP (seq
, 0, 0))
1248 || ! single_set (XVECEXP (seq
, 0, 0)))
1251 #ifdef MD_CAN_REDIRECT_BRANCH
1252 /* On some targets, branches with delay slots can have a limited
1253 displacement. Give the back end a chance to tell us we can't do
1255 if (! MD_CAN_REDIRECT_BRANCH (insn
, XVECEXP (seq
, 0, 0)))
1259 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1261 rtx trial
= XVECEXP (seq
, 0, i
);
1264 if (insn_references_resource_p (trial
, sets
, 0)
1265 || insn_sets_resource_p (trial
, needed
, 0)
1266 || insn_sets_resource_p (trial
, sets
, 0)
1268 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1270 || find_reg_note (trial
, REG_CC_USER
, NULL_RTX
)
1272 /* If TRIAL is from the fallthrough code of an annulled branch insn
1273 in SEQ, we cannot use it. */
1274 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq
, 0, 0))
1275 && ! INSN_FROM_TARGET_P (trial
)))
1278 /* If this insn was already done (usually in a previous delay slot),
1279 pretend we put it in our delay slot. */
1280 if (redundant_insn (trial
, insn
, new_delay_list
))
1283 /* We will end up re-vectoring this branch, so compute flags
1284 based on jumping to the new label. */
1285 flags
= get_jump_flags (insn
, JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1288 && ((condition
== const_true_rtx
1289 || (! insn_sets_resource_p (trial
, other_needed
, 0)
1290 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1291 ? eligible_for_delay (insn
, total_slots_filled
, trial
, flags
)
1292 : (must_annul
|| (delay_list
== NULL
&& new_delay_list
== NULL
))
1294 check_annul_list_true_false (0, delay_list
)
1295 && check_annul_list_true_false (0, new_delay_list
)
1296 && eligible_for_annul_false (insn
, total_slots_filled
,
1301 temp
= copy_rtx (trial
);
1302 INSN_FROM_TARGET_P (temp
) = 1;
1303 new_delay_list
= add_to_delay_list (temp
, new_delay_list
);
1304 total_slots_filled
++;
1306 if (--slots_remaining
== 0)
1313 /* Show the place to which we will be branching. */
1314 *pnew_thread
= next_active_insn (JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1316 /* Add any new insns to the delay list and update the count of the
1317 number of slots filled. */
1318 *pslots_filled
= total_slots_filled
;
1322 if (delay_list
== 0)
1323 return new_delay_list
;
1325 for (temp
= new_delay_list
; temp
; temp
= XEXP (temp
, 1))
1326 delay_list
= add_to_delay_list (XEXP (temp
, 0), delay_list
);
1331 /* Similar to steal_delay_list_from_target except that SEQ is on the
1332 fallthrough path of INSN. Here we only do something if the delay insn
1333 of SEQ is an unconditional branch. In that case we steal its delay slot
1334 for INSN since unconditional branches are much easier to fill. */
1337 steal_delay_list_from_fallthrough (rtx insn
, rtx condition
, rtx seq
,
1338 rtx delay_list
, struct resources
*sets
,
1339 struct resources
*needed
,
1340 struct resources
*other_needed
,
1341 int slots_to_fill
, int *pslots_filled
,
1346 int must_annul
= *pannul_p
;
1349 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1351 /* We can't do anything if SEQ's delay insn isn't an
1352 unconditional branch. */
1354 if (! simplejump_p (XVECEXP (seq
, 0, 0))
1355 && GET_CODE (PATTERN (XVECEXP (seq
, 0, 0))) != RETURN
)
1358 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1360 rtx trial
= XVECEXP (seq
, 0, i
);
1362 /* If TRIAL sets CC0, stealing it will move it too far from the use
1364 if (insn_references_resource_p (trial
, sets
, 0)
1365 || insn_sets_resource_p (trial
, needed
, 0)
1366 || insn_sets_resource_p (trial
, sets
, 0)
1368 || sets_cc0_p (PATTERN (trial
))
1374 /* If this insn was already done, we don't need it. */
1375 if (redundant_insn (trial
, insn
, delay_list
))
1377 delete_from_delay_slot (trial
);
1382 && ((condition
== const_true_rtx
1383 || (! insn_sets_resource_p (trial
, other_needed
, 0)
1384 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1385 ? eligible_for_delay (insn
, *pslots_filled
, trial
, flags
)
1386 : (must_annul
|| delay_list
== NULL
) && (must_annul
= 1,
1387 check_annul_list_true_false (1, delay_list
)
1388 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
1392 delete_from_delay_slot (trial
);
1393 delay_list
= add_to_delay_list (trial
, delay_list
);
1395 if (++(*pslots_filled
) == slots_to_fill
)
1407 /* Try merging insns starting at THREAD which match exactly the insns in
1410 If all insns were matched and the insn was previously annulling, the
1411 annul bit will be cleared.
1413 For each insn that is merged, if the branch is or will be non-annulling,
1414 we delete the merged insn. */
1417 try_merge_delay_insns (rtx insn
, rtx thread
)
1419 rtx trial
, next_trial
;
1420 rtx delay_insn
= XVECEXP (PATTERN (insn
), 0, 0);
1421 int annul_p
= INSN_ANNULLED_BRANCH_P (delay_insn
);
1422 int slot_number
= 1;
1423 int num_slots
= XVECLEN (PATTERN (insn
), 0);
1424 rtx next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1425 struct resources set
, needed
;
1426 rtx merged_insns
= 0;
1430 flags
= get_jump_flags (delay_insn
, JUMP_LABEL (delay_insn
));
1432 CLEAR_RESOURCE (&needed
);
1433 CLEAR_RESOURCE (&set
);
1435 /* If this is not an annulling branch, take into account anything needed in
1436 INSN's delay slot. This prevents two increments from being incorrectly
1437 folded into one. If we are annulling, this would be the correct
1438 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1439 will essentially disable this optimization. This method is somewhat of
1440 a kludge, but I don't see a better way.) */
1442 for (i
= 1 ; i
< num_slots
; i
++)
1443 if (XVECEXP (PATTERN (insn
), 0, i
))
1444 mark_referenced_resources (XVECEXP (PATTERN (insn
), 0, i
), &needed
, 1);
1446 for (trial
= thread
; !stop_search_p (trial
, 1); trial
= next_trial
)
1448 rtx pat
= PATTERN (trial
);
1449 rtx oldtrial
= trial
;
1451 next_trial
= next_nonnote_insn (trial
);
1453 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1454 if (NONJUMP_INSN_P (trial
)
1455 && (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
))
1458 if (GET_CODE (next_to_match
) == GET_CODE (trial
)
1460 /* We can't share an insn that sets cc0. */
1461 && ! sets_cc0_p (pat
)
1463 && ! insn_references_resource_p (trial
, &set
, 1)
1464 && ! insn_sets_resource_p (trial
, &set
, 1)
1465 && ! insn_sets_resource_p (trial
, &needed
, 1)
1466 && (trial
= try_split (pat
, trial
, 0)) != 0
1467 /* Update next_trial, in case try_split succeeded. */
1468 && (next_trial
= next_nonnote_insn (trial
))
1469 /* Likewise THREAD. */
1470 && (thread
= oldtrial
== thread
? trial
: thread
)
1471 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (trial
))
1472 /* Have to test this condition if annul condition is different
1473 from (and less restrictive than) non-annulling one. */
1474 && eligible_for_delay (delay_insn
, slot_number
- 1, trial
, flags
))
1479 update_block (trial
, thread
);
1480 if (trial
== thread
)
1481 thread
= next_active_insn (thread
);
1483 delete_related_insns (trial
);
1484 INSN_FROM_TARGET_P (next_to_match
) = 0;
1487 merged_insns
= gen_rtx_INSN_LIST (VOIDmode
, trial
, merged_insns
);
1489 if (++slot_number
== num_slots
)
1492 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1495 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
1496 mark_referenced_resources (trial
, &needed
, 1);
1499 /* See if we stopped on a filled insn. If we did, try to see if its
1500 delay slots match. */
1501 if (slot_number
!= num_slots
1502 && trial
&& NONJUMP_INSN_P (trial
)
1503 && GET_CODE (PATTERN (trial
)) == SEQUENCE
1504 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial
), 0, 0)))
1506 rtx pat
= PATTERN (trial
);
1507 rtx filled_insn
= XVECEXP (pat
, 0, 0);
1509 /* Account for resources set/needed by the filled insn. */
1510 mark_set_resources (filled_insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1511 mark_referenced_resources (filled_insn
, &needed
, 1);
1513 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
1515 rtx dtrial
= XVECEXP (pat
, 0, i
);
1517 if (! insn_references_resource_p (dtrial
, &set
, 1)
1518 && ! insn_sets_resource_p (dtrial
, &set
, 1)
1519 && ! insn_sets_resource_p (dtrial
, &needed
, 1)
1521 && ! sets_cc0_p (PATTERN (dtrial
))
1523 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (dtrial
))
1524 && eligible_for_delay (delay_insn
, slot_number
- 1, dtrial
, flags
))
1530 update_block (dtrial
, thread
);
1531 new = delete_from_delay_slot (dtrial
);
1532 if (INSN_DELETED_P (thread
))
1534 INSN_FROM_TARGET_P (next_to_match
) = 0;
1537 merged_insns
= gen_rtx_INSN_LIST (SImode
, dtrial
,
1540 if (++slot_number
== num_slots
)
1543 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1547 /* Keep track of the set/referenced resources for the delay
1548 slots of any trial insns we encounter. */
1549 mark_set_resources (dtrial
, &set
, 0, MARK_SRC_DEST_CALL
);
1550 mark_referenced_resources (dtrial
, &needed
, 1);
1555 /* If all insns in the delay slot have been matched and we were previously
1556 annulling the branch, we need not any more. In that case delete all the
1557 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1558 the delay list so that we know that it isn't only being used at the
1560 if (slot_number
== num_slots
&& annul_p
)
1562 for (; merged_insns
; merged_insns
= XEXP (merged_insns
, 1))
1564 if (GET_MODE (merged_insns
) == SImode
)
1568 update_block (XEXP (merged_insns
, 0), thread
);
1569 new = delete_from_delay_slot (XEXP (merged_insns
, 0));
1570 if (INSN_DELETED_P (thread
))
1575 update_block (XEXP (merged_insns
, 0), thread
);
1576 delete_related_insns (XEXP (merged_insns
, 0));
1580 INSN_ANNULLED_BRANCH_P (delay_insn
) = 0;
1582 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1583 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
)) = 0;
1587 /* See if INSN is redundant with an insn in front of TARGET. Often this
1588 is called when INSN is a candidate for a delay slot of TARGET.
1589 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1590 of INSN. Often INSN will be redundant with an insn in a delay slot of
1591 some previous insn. This happens when we have a series of branches to the
1592 same label; in that case the first insn at the target might want to go
1593 into each of the delay slots.
1595 If we are not careful, this routine can take up a significant fraction
1596 of the total compilation time (4%), but only wins rarely. Hence we
1597 speed this routine up by making two passes. The first pass goes back
1598 until it hits a label and sees if it finds an insn with an identical
1599 pattern. Only in this (relatively rare) event does it check for
1602 We do not split insns we encounter. This could cause us not to find a
1603 redundant insn, but the cost of splitting seems greater than the possible
1604 gain in rare cases. */
1607 redundant_insn (rtx insn
, rtx target
, rtx delay_list
)
1609 rtx target_main
= target
;
1610 rtx ipat
= PATTERN (insn
);
1612 struct resources needed
, set
;
1614 unsigned insns_to_search
;
1616 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1617 are allowed to not actually assign to such a register. */
1618 if (find_reg_note (insn
, REG_UNUSED
, NULL_RTX
) != 0)
1621 /* Scan backwards looking for a match. */
1622 for (trial
= PREV_INSN (target
),
1623 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1624 trial
&& insns_to_search
> 0;
1625 trial
= PREV_INSN (trial
), --insns_to_search
)
1627 if (LABEL_P (trial
))
1630 if (! INSN_P (trial
))
1633 pat
= PATTERN (trial
);
1634 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1637 if (GET_CODE (pat
) == SEQUENCE
)
1639 /* Stop for a CALL and its delay slots because it is difficult to
1640 track its resource needs correctly. */
1641 if (CALL_P (XVECEXP (pat
, 0, 0)))
1644 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1645 slots because it is difficult to track its resource needs
1648 #ifdef INSN_SETS_ARE_DELAYED
1649 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1653 #ifdef INSN_REFERENCES_ARE_DELAYED
1654 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1658 /* See if any of the insns in the delay slot match, updating
1659 resource requirements as we go. */
1660 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1661 if (GET_CODE (XVECEXP (pat
, 0, i
)) == GET_CODE (insn
)
1662 && rtx_equal_p (PATTERN (XVECEXP (pat
, 0, i
)), ipat
)
1663 && ! find_reg_note (XVECEXP (pat
, 0, i
), REG_UNUSED
, NULL_RTX
))
1666 /* If found a match, exit this loop early. */
1671 else if (GET_CODE (trial
) == GET_CODE (insn
) && rtx_equal_p (pat
, ipat
)
1672 && ! find_reg_note (trial
, REG_UNUSED
, NULL_RTX
))
1676 /* If we didn't find an insn that matches, return 0. */
1680 /* See what resources this insn sets and needs. If they overlap, or
1681 if this insn references CC0, it can't be redundant. */
1683 CLEAR_RESOURCE (&needed
);
1684 CLEAR_RESOURCE (&set
);
1685 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1686 mark_referenced_resources (insn
, &needed
, 1);
1688 /* If TARGET is a SEQUENCE, get the main insn. */
1689 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1690 target_main
= XVECEXP (PATTERN (target
), 0, 0);
1692 if (resource_conflicts_p (&needed
, &set
)
1694 || reg_mentioned_p (cc0_rtx
, ipat
)
1696 /* The insn requiring the delay may not set anything needed or set by
1698 || insn_sets_resource_p (target_main
, &needed
, 1)
1699 || insn_sets_resource_p (target_main
, &set
, 1))
1702 /* Insns we pass may not set either NEEDED or SET, so merge them for
1704 needed
.memory
|= set
.memory
;
1705 needed
.unch_memory
|= set
.unch_memory
;
1706 IOR_HARD_REG_SET (needed
.regs
, set
.regs
);
1708 /* This insn isn't redundant if it conflicts with an insn that either is
1709 or will be in a delay slot of TARGET. */
1713 if (insn_sets_resource_p (XEXP (delay_list
, 0), &needed
, 1))
1715 delay_list
= XEXP (delay_list
, 1);
1718 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1719 for (i
= 1; i
< XVECLEN (PATTERN (target
), 0); i
++)
1720 if (insn_sets_resource_p (XVECEXP (PATTERN (target
), 0, i
), &needed
, 1))
1723 /* Scan backwards until we reach a label or an insn that uses something
1724 INSN sets or sets something insn uses or sets. */
1726 for (trial
= PREV_INSN (target
),
1727 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1728 trial
&& !LABEL_P (trial
) && insns_to_search
> 0;
1729 trial
= PREV_INSN (trial
), --insns_to_search
)
1731 if (!INSN_P (trial
))
1734 pat
= PATTERN (trial
);
1735 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1738 if (GET_CODE (pat
) == SEQUENCE
)
1740 /* If this is a CALL_INSN and its delay slots, it is hard to track
1741 the resource needs properly, so give up. */
1742 if (CALL_P (XVECEXP (pat
, 0, 0)))
1745 /* If this is an INSN or JUMP_INSN with delayed effects, it
1746 is hard to track the resource needs properly, so give up. */
1748 #ifdef INSN_SETS_ARE_DELAYED
1749 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1753 #ifdef INSN_REFERENCES_ARE_DELAYED
1754 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1758 /* See if any of the insns in the delay slot match, updating
1759 resource requirements as we go. */
1760 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1762 rtx candidate
= XVECEXP (pat
, 0, i
);
1764 /* If an insn will be annulled if the branch is false, it isn't
1765 considered as a possible duplicate insn. */
1766 if (rtx_equal_p (PATTERN (candidate
), ipat
)
1767 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat
, 0, 0))
1768 && INSN_FROM_TARGET_P (candidate
)))
1770 /* Show that this insn will be used in the sequel. */
1771 INSN_FROM_TARGET_P (candidate
) = 0;
1775 /* Unless this is an annulled insn from the target of a branch,
1776 we must stop if it sets anything needed or set by INSN. */
1777 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat
, 0, 0))
1778 || ! INSN_FROM_TARGET_P (candidate
))
1779 && insn_sets_resource_p (candidate
, &needed
, 1))
1783 /* If the insn requiring the delay slot conflicts with INSN, we
1785 if (insn_sets_resource_p (XVECEXP (pat
, 0, 0), &needed
, 1))
1790 /* See if TRIAL is the same as INSN. */
1791 pat
= PATTERN (trial
);
1792 if (rtx_equal_p (pat
, ipat
))
1795 /* Can't go any further if TRIAL conflicts with INSN. */
1796 if (insn_sets_resource_p (trial
, &needed
, 1))
1804 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1805 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1806 is nonzero, we are allowed to fall into this thread; otherwise, we are
1809 If LABEL is used more than one or we pass a label other than LABEL before
1810 finding an active insn, we do not own this thread. */
1813 own_thread_p (rtx thread
, rtx label
, int allow_fallthrough
)
1818 /* We don't own the function end. */
1822 /* Get the first active insn, or THREAD, if it is an active insn. */
1823 active_insn
= next_active_insn (PREV_INSN (thread
));
1825 for (insn
= thread
; insn
!= active_insn
; insn
= NEXT_INSN (insn
))
1827 && (insn
!= label
|| LABEL_NUSES (insn
) != 1))
1830 if (allow_fallthrough
)
1833 /* Ensure that we reach a BARRIER before any insn or label. */
1834 for (insn
= prev_nonnote_insn (thread
);
1835 insn
== 0 || !BARRIER_P (insn
);
1836 insn
= prev_nonnote_insn (insn
))
1839 || (NONJUMP_INSN_P (insn
)
1840 && GET_CODE (PATTERN (insn
)) != USE
1841 && GET_CODE (PATTERN (insn
)) != CLOBBER
))
1847 /* Called when INSN is being moved from a location near the target of a jump.
1848 We leave a marker of the form (use (INSN)) immediately in front
1849 of WHERE for mark_target_live_regs. These markers will be deleted when
1852 We used to try to update the live status of registers if WHERE is at
1853 the start of a basic block, but that can't work since we may remove a
1854 BARRIER in relax_delay_slots. */
1857 update_block (rtx insn
, rtx where
)
1859 /* Ignore if this was in a delay slot and it came from the target of
1861 if (INSN_FROM_TARGET_P (insn
))
1864 emit_insn_before (gen_rtx_USE (VOIDmode
, insn
), where
);
1866 /* INSN might be making a value live in a block where it didn't use to
1867 be. So recompute liveness information for this block. */
1869 incr_ticks_for_insn (insn
);
1872 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1873 the basic block containing the jump. */
1876 reorg_redirect_jump (rtx jump
, rtx nlabel
)
1878 incr_ticks_for_insn (jump
);
1879 return redirect_jump (jump
, nlabel
, 1);
1882 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1883 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1884 that reference values used in INSN. If we find one, then we move the
1885 REG_DEAD note to INSN.
1887 This is needed to handle the case where a later insn (after INSN) has a
1888 REG_DEAD note for a register used by INSN, and this later insn subsequently
1889 gets moved before a CODE_LABEL because it is a redundant insn. In this
1890 case, mark_target_live_regs may be confused into thinking the register
1891 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1894 update_reg_dead_notes (rtx insn
, rtx delayed_insn
)
1898 for (p
= next_nonnote_insn (insn
); p
!= delayed_insn
;
1899 p
= next_nonnote_insn (p
))
1900 for (link
= REG_NOTES (p
); link
; link
= next
)
1902 next
= XEXP (link
, 1);
1904 if (REG_NOTE_KIND (link
) != REG_DEAD
1905 || !REG_P (XEXP (link
, 0)))
1908 if (reg_referenced_p (XEXP (link
, 0), PATTERN (insn
)))
1910 /* Move the REG_DEAD note from P to INSN. */
1911 remove_note (p
, link
);
1912 XEXP (link
, 1) = REG_NOTES (insn
);
1913 REG_NOTES (insn
) = link
;
1918 /* Called when an insn redundant with start_insn is deleted. If there
1919 is a REG_DEAD note for the target of start_insn between start_insn
1920 and stop_insn, then the REG_DEAD note needs to be deleted since the
1921 value no longer dies there.
1923 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1924 confused into thinking the register is dead. */
1927 fix_reg_dead_note (rtx start_insn
, rtx stop_insn
)
1931 for (p
= next_nonnote_insn (start_insn
); p
!= stop_insn
;
1932 p
= next_nonnote_insn (p
))
1933 for (link
= REG_NOTES (p
); link
; link
= next
)
1935 next
= XEXP (link
, 1);
1937 if (REG_NOTE_KIND (link
) != REG_DEAD
1938 || !REG_P (XEXP (link
, 0)))
1941 if (reg_set_p (XEXP (link
, 0), PATTERN (start_insn
)))
1943 remove_note (p
, link
);
1949 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1951 This handles the case of udivmodXi4 instructions which optimize their
1952 output depending on whether any REG_UNUSED notes are present.
1953 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1957 update_reg_unused_notes (rtx insn
, rtx redundant_insn
)
1961 for (link
= REG_NOTES (insn
); link
; link
= next
)
1963 next
= XEXP (link
, 1);
1965 if (REG_NOTE_KIND (link
) != REG_UNUSED
1966 || !REG_P (XEXP (link
, 0)))
1969 if (! find_regno_note (redundant_insn
, REG_UNUSED
,
1970 REGNO (XEXP (link
, 0))))
1971 remove_note (insn
, link
);
1975 /* Scan a function looking for insns that need a delay slot and find insns to
1976 put into the delay slot.
1978 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1979 as calls). We do these first since we don't want jump insns (that are
1980 easier to fill) to get the only insns that could be used for non-jump insns.
1981 When it is zero, only try to fill JUMP_INSNs.
1983 When slots are filled in this manner, the insns (including the
1984 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1985 it is possible to tell whether a delay slot has really been filled
1986 or not. `final' knows how to deal with this, by communicating
1987 through FINAL_SEQUENCE. */
1990 fill_simple_delay_slots (int non_jumps_p
)
1992 rtx insn
, pat
, trial
, next_trial
;
1994 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
1995 struct resources needed
, set
;
1996 int slots_to_fill
, slots_filled
;
1999 for (i
= 0; i
< num_unfilled_slots
; i
++)
2002 /* Get the next insn to fill. If it has already had any slots assigned,
2003 we can't do anything with it. Maybe we'll improve this later. */
2005 insn
= unfilled_slots_base
[i
];
2007 || INSN_DELETED_P (insn
)
2008 || (NONJUMP_INSN_P (insn
)
2009 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2010 || (JUMP_P (insn
) && non_jumps_p
)
2011 || (!JUMP_P (insn
) && ! non_jumps_p
))
2014 /* It may have been that this insn used to need delay slots, but
2015 now doesn't; ignore in that case. This can happen, for example,
2016 on the HP PA RISC, where the number of delay slots depends on
2017 what insns are nearby. */
2018 slots_to_fill
= num_delay_slots (insn
);
2020 /* Some machine description have defined instructions to have
2021 delay slots only in certain circumstances which may depend on
2022 nearby insns (which change due to reorg's actions).
2024 For example, the PA port normally has delay slots for unconditional
2027 However, the PA port claims such jumps do not have a delay slot
2028 if they are immediate successors of certain CALL_INSNs. This
2029 allows the port to favor filling the delay slot of the call with
2030 the unconditional jump. */
2031 if (slots_to_fill
== 0)
2034 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2035 says how many. After initialization, first try optimizing
2038 nop add %o7,.-L1,%o7
2042 If this case applies, the delay slot of the call is filled with
2043 the unconditional jump. This is done first to avoid having the
2044 delay slot of the call filled in the backward scan. Also, since
2045 the unconditional jump is likely to also have a delay slot, that
2046 insn must exist when it is subsequently scanned.
2048 This is tried on each insn with delay slots as some machines
2049 have insns which perform calls, but are not represented as
2056 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2058 flags
= get_jump_flags (insn
, NULL_RTX
);
2060 if ((trial
= next_active_insn (insn
))
2062 && simplejump_p (trial
)
2063 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2064 && no_labels_between_p (insn
, trial
)
2065 && ! can_throw_internal (trial
))
2069 delay_list
= add_to_delay_list (trial
, delay_list
);
2071 /* TRIAL may have had its delay slot filled, then unfilled. When
2072 the delay slot is unfilled, TRIAL is placed back on the unfilled
2073 slots obstack. Unfortunately, it is placed on the end of the
2074 obstack, not in its original location. Therefore, we must search
2075 from entry i + 1 to the end of the unfilled slots obstack to
2076 try and find TRIAL. */
2077 tmp
= &unfilled_slots_base
[i
+ 1];
2078 while (*tmp
!= trial
&& tmp
!= unfilled_slots_next
)
2081 /* Remove the unconditional jump from consideration for delay slot
2082 filling and unthread it. */
2086 rtx next
= NEXT_INSN (trial
);
2087 rtx prev
= PREV_INSN (trial
);
2089 NEXT_INSN (prev
) = next
;
2091 PREV_INSN (next
) = prev
;
2095 /* Now, scan backwards from the insn to search for a potential
2096 delay-slot candidate. Stop searching when a label or jump is hit.
2098 For each candidate, if it is to go into the delay slot (moved
2099 forward in execution sequence), it must not need or set any resources
2100 that were set by later insns and must not set any resources that
2101 are needed for those insns.
2103 The delay slot insn itself sets resources unless it is a call
2104 (in which case the called routine, not the insn itself, is doing
2107 if (slots_filled
< slots_to_fill
)
2109 CLEAR_RESOURCE (&needed
);
2110 CLEAR_RESOURCE (&set
);
2111 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST
);
2112 mark_referenced_resources (insn
, &needed
, 0);
2114 for (trial
= prev_nonnote_insn (insn
); ! stop_search_p (trial
, 1);
2117 next_trial
= prev_nonnote_insn (trial
);
2119 /* This must be an INSN or CALL_INSN. */
2120 pat
= PATTERN (trial
);
2122 /* USE and CLOBBER at this level was just for flow; ignore it. */
2123 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2126 /* Check for resource conflict first, to avoid unnecessary
2128 if (! insn_references_resource_p (trial
, &set
, 1)
2129 && ! insn_sets_resource_p (trial
, &set
, 1)
2130 && ! insn_sets_resource_p (trial
, &needed
, 1)
2132 /* Can't separate set of cc0 from its use. */
2133 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2135 && ! can_throw_internal (trial
))
2137 trial
= try_split (pat
, trial
, 1);
2138 next_trial
= prev_nonnote_insn (trial
);
2139 if (eligible_for_delay (insn
, slots_filled
, trial
, flags
))
2141 /* In this case, we are searching backward, so if we
2142 find insns to put on the delay list, we want
2143 to put them at the head, rather than the
2144 tail, of the list. */
2146 update_reg_dead_notes (trial
, insn
);
2147 delay_list
= gen_rtx_INSN_LIST (VOIDmode
,
2149 update_block (trial
, trial
);
2150 delete_related_insns (trial
);
2151 if (slots_to_fill
== ++slots_filled
)
2157 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2158 mark_referenced_resources (trial
, &needed
, 1);
2162 /* If all needed slots haven't been filled, we come here. */
2164 /* Try to optimize case of jumping around a single insn. */
2165 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2166 if (slots_filled
!= slots_to_fill
2169 && (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
2171 delay_list
= optimize_skip (insn
);
2177 /* Try to get insns from beyond the insn needing the delay slot.
2178 These insns can neither set or reference resources set in insns being
2179 skipped, cannot set resources in the insn being skipped, and, if this
2180 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2181 call might not return).
2183 There used to be code which continued past the target label if
2184 we saw all uses of the target label. This code did not work,
2185 because it failed to account for some instructions which were
2186 both annulled and marked as from the target. This can happen as a
2187 result of optimize_skip. Since this code was redundant with
2188 fill_eager_delay_slots anyways, it was just deleted. */
2190 if (slots_filled
!= slots_to_fill
2191 /* If this instruction could throw an exception which is
2192 caught in the same function, then it's not safe to fill
2193 the delay slot with an instruction from beyond this
2194 point. For example, consider:
2205 Even though `i' is a local variable, we must be sure not
2206 to put `i = 3' in the delay slot if `f' might throw an
2209 Presumably, we should also check to see if we could get
2210 back to this function via `setjmp'. */
2211 && ! can_throw_internal (insn
)
2213 || ((condjump_p (insn
) || condjump_in_parallel_p (insn
))
2214 && ! simplejump_p (insn
)
2215 && JUMP_LABEL (insn
) != 0)))
2217 /* Invariant: If insn is a JUMP_INSN, the insn's jump
2218 label. Otherwise, zero. */
2220 int maybe_never
= 0;
2221 rtx pat
, trial_delay
;
2223 CLEAR_RESOURCE (&needed
);
2224 CLEAR_RESOURCE (&set
);
2228 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
2229 mark_referenced_resources (insn
, &needed
, 1);
2234 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
2235 mark_referenced_resources (insn
, &needed
, 1);
2237 target
= JUMP_LABEL (insn
);
2241 for (trial
= next_nonnote_insn (insn
); trial
; trial
= next_trial
)
2243 next_trial
= next_nonnote_insn (trial
);
2246 || BARRIER_P (trial
))
2249 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2250 pat
= PATTERN (trial
);
2252 /* Stand-alone USE and CLOBBER are just for flow. */
2253 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2256 /* If this already has filled delay slots, get the insn needing
2258 if (GET_CODE (pat
) == SEQUENCE
)
2259 trial_delay
= XVECEXP (pat
, 0, 0);
2261 trial_delay
= trial
;
2263 /* Stop our search when seeing an unconditional jump. */
2264 if (JUMP_P (trial_delay
))
2267 /* See if we have a resource problem before we try to
2269 if (GET_CODE (pat
) != SEQUENCE
2270 && ! insn_references_resource_p (trial
, &set
, 1)
2271 && ! insn_sets_resource_p (trial
, &set
, 1)
2272 && ! insn_sets_resource_p (trial
, &needed
, 1)
2274 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2276 && ! (maybe_never
&& may_trap_or_fault_p (pat
))
2277 && (trial
= try_split (pat
, trial
, 0))
2278 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2279 && ! can_throw_internal(trial
))
2281 next_trial
= next_nonnote_insn (trial
);
2282 delay_list
= add_to_delay_list (trial
, delay_list
);
2285 if (reg_mentioned_p (cc0_rtx
, pat
))
2286 link_cc0_insns (trial
);
2289 delete_related_insns (trial
);
2290 if (slots_to_fill
== ++slots_filled
)
2295 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2296 mark_referenced_resources (trial
, &needed
, 1);
2298 /* Ensure we don't put insns between the setting of cc and the
2299 comparison by moving a setting of cc into an earlier delay
2300 slot since these insns could clobber the condition code. */
2303 /* If this is a call or jump, we might not get here. */
2304 if (CALL_P (trial_delay
)
2305 || JUMP_P (trial_delay
))
2309 /* If there are slots left to fill and our search was stopped by an
2310 unconditional branch, try the insn at the branch target. We can
2311 redirect the branch if it works.
2313 Don't do this if the insn at the branch target is a branch. */
2314 if (slots_to_fill
!= slots_filled
2317 && simplejump_p (trial
)
2318 && (target
== 0 || JUMP_LABEL (trial
) == target
)
2319 && (next_trial
= next_active_insn (JUMP_LABEL (trial
))) != 0
2320 && ! (NONJUMP_INSN_P (next_trial
)
2321 && GET_CODE (PATTERN (next_trial
)) == SEQUENCE
)
2322 && !JUMP_P (next_trial
)
2323 && ! insn_references_resource_p (next_trial
, &set
, 1)
2324 && ! insn_sets_resource_p (next_trial
, &set
, 1)
2325 && ! insn_sets_resource_p (next_trial
, &needed
, 1)
2327 && ! reg_mentioned_p (cc0_rtx
, PATTERN (next_trial
))
2329 && ! (maybe_never
&& may_trap_or_fault_p (PATTERN (next_trial
)))
2330 && (next_trial
= try_split (PATTERN (next_trial
), next_trial
, 0))
2331 && eligible_for_delay (insn
, slots_filled
, next_trial
, flags
)
2332 && ! can_throw_internal (trial
))
2334 /* See comment in relax_delay_slots about necessity of using
2335 next_real_insn here. */
2336 rtx new_label
= next_real_insn (next_trial
);
2339 new_label
= get_label_before (new_label
);
2341 new_label
= find_end_label ();
2346 = add_to_delay_list (copy_rtx (next_trial
), delay_list
);
2348 reorg_redirect_jump (trial
, new_label
);
2350 /* If we merged because we both jumped to the same place,
2351 redirect the original insn also. */
2353 reorg_redirect_jump (insn
, new_label
);
2358 /* If this is an unconditional jump, then try to get insns from the
2359 target of the jump. */
2361 && simplejump_p (insn
)
2362 && slots_filled
!= slots_to_fill
)
2364 = fill_slots_from_thread (insn
, const_true_rtx
,
2365 next_active_insn (JUMP_LABEL (insn
)),
2367 own_thread_p (JUMP_LABEL (insn
),
2368 JUMP_LABEL (insn
), 0),
2369 slots_to_fill
, &slots_filled
,
2373 unfilled_slots_base
[i
]
2374 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2376 if (slots_to_fill
== slots_filled
)
2377 unfilled_slots_base
[i
] = 0;
2379 note_delay_statistics (slots_filled
, 0);
2382 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2383 /* See if the epilogue needs any delay slots. Try to fill them if so.
2384 The only thing we can do is scan backwards from the end of the
2385 function. If we did this in a previous pass, it is incorrect to do it
2387 if (current_function_epilogue_delay_list
)
2390 slots_to_fill
= DELAY_SLOTS_FOR_EPILOGUE
;
2391 if (slots_to_fill
== 0)
2395 CLEAR_RESOURCE (&set
);
2397 /* The frame pointer and stack pointer are needed at the beginning of
2398 the epilogue, so instructions setting them can not be put in the
2399 epilogue delay slot. However, everything else needed at function
2400 end is safe, so we don't want to use end_of_function_needs here. */
2401 CLEAR_RESOURCE (&needed
);
2402 if (frame_pointer_needed
)
2404 SET_HARD_REG_BIT (needed
.regs
, FRAME_POINTER_REGNUM
);
2405 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2406 SET_HARD_REG_BIT (needed
.regs
, HARD_FRAME_POINTER_REGNUM
);
2408 if (! EXIT_IGNORE_STACK
2409 || current_function_sp_is_unchanging
)
2410 SET_HARD_REG_BIT (needed
.regs
, STACK_POINTER_REGNUM
);
2413 SET_HARD_REG_BIT (needed
.regs
, STACK_POINTER_REGNUM
);
2415 #ifdef EPILOGUE_USES
2416 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
2418 if (EPILOGUE_USES (i
))
2419 SET_HARD_REG_BIT (needed
.regs
, i
);
2423 for (trial
= get_last_insn (); ! stop_search_p (trial
, 1);
2424 trial
= PREV_INSN (trial
))
2428 pat
= PATTERN (trial
);
2429 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2432 if (! insn_references_resource_p (trial
, &set
, 1)
2433 && ! insn_sets_resource_p (trial
, &needed
, 1)
2434 && ! insn_sets_resource_p (trial
, &set
, 1)
2436 /* Don't want to mess with cc0 here. */
2437 && ! reg_mentioned_p (cc0_rtx
, pat
)
2439 && ! can_throw_internal (trial
))
2441 trial
= try_split (pat
, trial
, 1);
2442 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial
, slots_filled
))
2444 /* Here as well we are searching backward, so put the
2445 insns we find on the head of the list. */
2447 current_function_epilogue_delay_list
2448 = gen_rtx_INSN_LIST (VOIDmode
, trial
,
2449 current_function_epilogue_delay_list
);
2450 mark_end_of_function_resources (trial
, 1);
2451 update_block (trial
, trial
);
2452 delete_related_insns (trial
);
2454 /* Clear deleted bit so final.c will output the insn. */
2455 INSN_DELETED_P (trial
) = 0;
2457 if (slots_to_fill
== ++slots_filled
)
2463 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2464 mark_referenced_resources (trial
, &needed
, 1);
2467 note_delay_statistics (slots_filled
, 0);
2471 /* Try to find insns to place in delay slots.
2473 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2474 or is an unconditional branch if CONDITION is const_true_rtx.
2475 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2477 THREAD is a flow-of-control, either the insns to be executed if the
2478 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2480 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2481 to see if any potential delay slot insns set things needed there.
2483 LIKELY is nonzero if it is extremely likely that the branch will be
2484 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2485 end of a loop back up to the top.
2487 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2488 thread. I.e., it is the fallthrough code of our jump or the target of the
2489 jump when we are the only jump going there.
2491 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2492 case, we can only take insns from the head of the thread for our delay
2493 slot. We then adjust the jump to point after the insns we have taken. */
2496 fill_slots_from_thread (rtx insn
, rtx condition
, rtx thread
,
2497 rtx opposite_thread
, int likely
, int thread_if_true
,
2498 int own_thread
, int slots_to_fill
,
2499 int *pslots_filled
, rtx delay_list
)
2502 struct resources opposite_needed
, set
, needed
;
2508 /* Validate our arguments. */
2509 gcc_assert(condition
!= const_true_rtx
|| thread_if_true
);
2510 gcc_assert(own_thread
|| thread_if_true
);
2512 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2514 /* If our thread is the end of subroutine, we can't get any delay
2519 /* If this is an unconditional branch, nothing is needed at the
2520 opposite thread. Otherwise, compute what is needed there. */
2521 if (condition
== const_true_rtx
)
2522 CLEAR_RESOURCE (&opposite_needed
);
2524 mark_target_live_regs (get_insns (), opposite_thread
, &opposite_needed
);
2526 /* If the insn at THREAD can be split, do it here to avoid having to
2527 update THREAD and NEW_THREAD if it is done in the loop below. Also
2528 initialize NEW_THREAD. */
2530 new_thread
= thread
= try_split (PATTERN (thread
), thread
, 0);
2532 /* Scan insns at THREAD. We are looking for an insn that can be removed
2533 from THREAD (it neither sets nor references resources that were set
2534 ahead of it and it doesn't set anything needs by the insns ahead of
2535 it) and that either can be placed in an annulling insn or aren't
2536 needed at OPPOSITE_THREAD. */
2538 CLEAR_RESOURCE (&needed
);
2539 CLEAR_RESOURCE (&set
);
2541 /* If we do not own this thread, we must stop as soon as we find
2542 something that we can't put in a delay slot, since all we can do
2543 is branch into THREAD at a later point. Therefore, labels stop
2544 the search if this is not the `true' thread. */
2546 for (trial
= thread
;
2547 ! stop_search_p (trial
, ! thread_if_true
) && (! lose
|| own_thread
);
2548 trial
= next_nonnote_insn (trial
))
2552 /* If we have passed a label, we no longer own this thread. */
2553 if (LABEL_P (trial
))
2559 pat
= PATTERN (trial
);
2560 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2563 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2564 don't separate or copy insns that set and use CC0. */
2565 if (! insn_references_resource_p (trial
, &set
, 1)
2566 && ! insn_sets_resource_p (trial
, &set
, 1)
2567 && ! insn_sets_resource_p (trial
, &needed
, 1)
2569 && ! (reg_mentioned_p (cc0_rtx
, pat
)
2570 && (! own_thread
|| ! sets_cc0_p (pat
)))
2572 && ! can_throw_internal (trial
))
2576 /* If TRIAL is redundant with some insn before INSN, we don't
2577 actually need to add it to the delay list; we can merely pretend
2579 if ((prior_insn
= redundant_insn (trial
, insn
, delay_list
)))
2581 fix_reg_dead_note (prior_insn
, insn
);
2584 update_block (trial
, thread
);
2585 if (trial
== thread
)
2587 thread
= next_active_insn (thread
);
2588 if (new_thread
== trial
)
2589 new_thread
= thread
;
2592 delete_related_insns (trial
);
2596 update_reg_unused_notes (prior_insn
, trial
);
2597 new_thread
= next_active_insn (trial
);
2603 /* There are two ways we can win: If TRIAL doesn't set anything
2604 needed at the opposite thread and can't trap, or if it can
2605 go into an annulled delay slot. */
2607 && (condition
== const_true_rtx
2608 || (! insn_sets_resource_p (trial
, &opposite_needed
, 1)
2609 && ! may_trap_or_fault_p (pat
))))
2612 trial
= try_split (pat
, trial
, 0);
2613 if (new_thread
== old_trial
)
2615 if (thread
== old_trial
)
2617 pat
= PATTERN (trial
);
2618 if (eligible_for_delay (insn
, *pslots_filled
, trial
, flags
))
2622 #ifdef ANNUL_IFTRUE_SLOTS
2625 #ifdef ANNUL_IFFALSE_SLOTS
2631 trial
= try_split (pat
, trial
, 0);
2632 if (new_thread
== old_trial
)
2634 if (thread
== old_trial
)
2636 pat
= PATTERN (trial
);
2637 if ((must_annul
|| delay_list
== NULL
) && (thread_if_true
2638 ? check_annul_list_true_false (0, delay_list
)
2639 && eligible_for_annul_false (insn
, *pslots_filled
, trial
, flags
)
2640 : check_annul_list_true_false (1, delay_list
)
2641 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
2649 if (reg_mentioned_p (cc0_rtx
, pat
))
2650 link_cc0_insns (trial
);
2653 /* If we own this thread, delete the insn. If this is the
2654 destination of a branch, show that a basic block status
2655 may have been updated. In any case, mark the new
2656 starting point of this thread. */
2661 update_block (trial
, thread
);
2662 if (trial
== thread
)
2664 thread
= next_active_insn (thread
);
2665 if (new_thread
== trial
)
2666 new_thread
= thread
;
2669 /* We are moving this insn, not deleting it. We must
2670 temporarily increment the use count on any referenced
2671 label lest it be deleted by delete_related_insns. */
2672 note
= find_reg_note (trial
, REG_LABEL
, 0);
2673 /* REG_LABEL could be NOTE_INSN_DELETED_LABEL too. */
2674 if (note
&& LABEL_P (XEXP (note
, 0)))
2675 LABEL_NUSES (XEXP (note
, 0))++;
2677 delete_related_insns (trial
);
2679 if (note
&& LABEL_P (XEXP (note
, 0)))
2680 LABEL_NUSES (XEXP (note
, 0))--;
2683 new_thread
= next_active_insn (trial
);
2685 temp
= own_thread
? trial
: copy_rtx (trial
);
2687 INSN_FROM_TARGET_P (temp
) = 1;
2689 delay_list
= add_to_delay_list (temp
, delay_list
);
2691 if (slots_to_fill
== ++(*pslots_filled
))
2693 /* Even though we have filled all the slots, we
2694 may be branching to a location that has a
2695 redundant insn. Skip any if so. */
2696 while (new_thread
&& ! own_thread
2697 && ! insn_sets_resource_p (new_thread
, &set
, 1)
2698 && ! insn_sets_resource_p (new_thread
, &needed
, 1)
2699 && ! insn_references_resource_p (new_thread
,
2702 = redundant_insn (new_thread
, insn
,
2705 /* We know we do not own the thread, so no need
2706 to call update_block and delete_insn. */
2707 fix_reg_dead_note (prior_insn
, insn
);
2708 update_reg_unused_notes (prior_insn
, new_thread
);
2709 new_thread
= next_active_insn (new_thread
);
2719 /* This insn can't go into a delay slot. */
2721 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2722 mark_referenced_resources (trial
, &needed
, 1);
2724 /* Ensure we don't put insns between the setting of cc and the comparison
2725 by moving a setting of cc into an earlier delay slot since these insns
2726 could clobber the condition code. */
2729 /* If this insn is a register-register copy and the next insn has
2730 a use of our destination, change it to use our source. That way,
2731 it will become a candidate for our delay slot the next time
2732 through this loop. This case occurs commonly in loops that
2735 We could check for more complex cases than those tested below,
2736 but it doesn't seem worth it. It might also be a good idea to try
2737 to swap the two insns. That might do better.
2739 We can't do this if the next insn modifies our destination, because
2740 that would make the replacement into the insn invalid. We also can't
2741 do this if it modifies our source, because it might be an earlyclobber
2742 operand. This latter test also prevents updating the contents of
2743 a PRE_INC. We also can't do this if there's overlap of source and
2744 destination. Overlap may happen for larger-than-register-size modes. */
2746 if (NONJUMP_INSN_P (trial
) && GET_CODE (pat
) == SET
2747 && REG_P (SET_SRC (pat
))
2748 && REG_P (SET_DEST (pat
))
2749 && !reg_overlap_mentioned_p (SET_DEST (pat
), SET_SRC (pat
)))
2751 rtx next
= next_nonnote_insn (trial
);
2753 if (next
&& NONJUMP_INSN_P (next
)
2754 && GET_CODE (PATTERN (next
)) != USE
2755 && ! reg_set_p (SET_DEST (pat
), next
)
2756 && ! reg_set_p (SET_SRC (pat
), next
)
2757 && reg_referenced_p (SET_DEST (pat
), PATTERN (next
))
2758 && ! modified_in_p (SET_DEST (pat
), next
))
2759 validate_replace_rtx (SET_DEST (pat
), SET_SRC (pat
), next
);
2763 /* If we stopped on a branch insn that has delay slots, see if we can
2764 steal some of the insns in those slots. */
2765 if (trial
&& NONJUMP_INSN_P (trial
)
2766 && GET_CODE (PATTERN (trial
)) == SEQUENCE
2767 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0)))
2769 /* If this is the `true' thread, we will want to follow the jump,
2770 so we can only do this if we have taken everything up to here. */
2771 if (thread_if_true
&& trial
== new_thread
)
2774 = steal_delay_list_from_target (insn
, condition
, PATTERN (trial
),
2775 delay_list
, &set
, &needed
,
2776 &opposite_needed
, slots_to_fill
,
2777 pslots_filled
, &must_annul
,
2779 /* If we owned the thread and are told that it branched
2780 elsewhere, make sure we own the thread at the new location. */
2781 if (own_thread
&& trial
!= new_thread
)
2782 own_thread
= own_thread_p (new_thread
, new_thread
, 0);
2784 else if (! thread_if_true
)
2786 = steal_delay_list_from_fallthrough (insn
, condition
,
2788 delay_list
, &set
, &needed
,
2789 &opposite_needed
, slots_to_fill
,
2790 pslots_filled
, &must_annul
);
2793 /* If we haven't found anything for this delay slot and it is very
2794 likely that the branch will be taken, see if the insn at our target
2795 increments or decrements a register with an increment that does not
2796 depend on the destination register. If so, try to place the opposite
2797 arithmetic insn after the jump insn and put the arithmetic insn in the
2798 delay slot. If we can't do this, return. */
2799 if (delay_list
== 0 && likely
&& new_thread
2800 && NONJUMP_INSN_P (new_thread
)
2801 && GET_CODE (PATTERN (new_thread
)) != ASM_INPUT
2802 && asm_noperands (PATTERN (new_thread
)) < 0)
2804 rtx pat
= PATTERN (new_thread
);
2809 pat
= PATTERN (trial
);
2811 if (!NONJUMP_INSN_P (trial
)
2812 || GET_CODE (pat
) != SET
2813 || ! eligible_for_delay (insn
, 0, trial
, flags
)
2814 || can_throw_internal (trial
))
2817 dest
= SET_DEST (pat
), src
= SET_SRC (pat
);
2818 if ((GET_CODE (src
) == PLUS
|| GET_CODE (src
) == MINUS
)
2819 && rtx_equal_p (XEXP (src
, 0), dest
)
2820 && (!FLOAT_MODE_P (GET_MODE (src
))
2821 || flag_unsafe_math_optimizations
)
2822 && ! reg_overlap_mentioned_p (dest
, XEXP (src
, 1))
2823 && ! side_effects_p (pat
))
2825 rtx other
= XEXP (src
, 1);
2829 /* If this is a constant adjustment, use the same code with
2830 the negated constant. Otherwise, reverse the sense of the
2832 if (GET_CODE (other
) == CONST_INT
)
2833 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
), GET_MODE (src
), dest
,
2834 negate_rtx (GET_MODE (src
), other
));
2836 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
) == PLUS
? MINUS
: PLUS
,
2837 GET_MODE (src
), dest
, other
);
2839 ninsn
= emit_insn_after (gen_rtx_SET (VOIDmode
, dest
, new_arith
),
2842 if (recog_memoized (ninsn
) < 0
2843 || (extract_insn (ninsn
), ! constrain_operands (1)))
2845 delete_related_insns (ninsn
);
2851 update_block (trial
, thread
);
2852 if (trial
== thread
)
2854 thread
= next_active_insn (thread
);
2855 if (new_thread
== trial
)
2856 new_thread
= thread
;
2858 delete_related_insns (trial
);
2861 new_thread
= next_active_insn (trial
);
2863 ninsn
= own_thread
? trial
: copy_rtx (trial
);
2865 INSN_FROM_TARGET_P (ninsn
) = 1;
2867 delay_list
= add_to_delay_list (ninsn
, NULL_RTX
);
2872 if (delay_list
&& must_annul
)
2873 INSN_ANNULLED_BRANCH_P (insn
) = 1;
2875 /* If we are to branch into the middle of this thread, find an appropriate
2876 label or make a new one if none, and redirect INSN to it. If we hit the
2877 end of the function, use the end-of-function label. */
2878 if (new_thread
!= thread
)
2882 gcc_assert (thread_if_true
);
2884 if (new_thread
&& JUMP_P (new_thread
)
2885 && (simplejump_p (new_thread
)
2886 || GET_CODE (PATTERN (new_thread
)) == RETURN
)
2887 && redirect_with_delay_list_safe_p (insn
,
2888 JUMP_LABEL (new_thread
),
2890 new_thread
= follow_jumps (JUMP_LABEL (new_thread
));
2892 if (new_thread
== 0)
2893 label
= find_end_label ();
2894 else if (LABEL_P (new_thread
))
2897 label
= get_label_before (new_thread
);
2900 reorg_redirect_jump (insn
, label
);
2906 /* Make another attempt to find insns to place in delay slots.
2908 We previously looked for insns located in front of the delay insn
2909 and, for non-jump delay insns, located behind the delay insn.
2911 Here only try to schedule jump insns and try to move insns from either
2912 the target or the following insns into the delay slot. If annulling is
2913 supported, we will be likely to do this. Otherwise, we can do this only
2917 fill_eager_delay_slots (void)
2921 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
2923 for (i
= 0; i
< num_unfilled_slots
; i
++)
2926 rtx target_label
, insn_at_target
, fallthrough_insn
;
2929 int own_fallthrough
;
2930 int prediction
, slots_to_fill
, slots_filled
;
2932 insn
= unfilled_slots_base
[i
];
2934 || INSN_DELETED_P (insn
)
2936 || ! (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
2939 slots_to_fill
= num_delay_slots (insn
);
2940 /* Some machine description have defined instructions to have
2941 delay slots only in certain circumstances which may depend on
2942 nearby insns (which change due to reorg's actions).
2944 For example, the PA port normally has delay slots for unconditional
2947 However, the PA port claims such jumps do not have a delay slot
2948 if they are immediate successors of certain CALL_INSNs. This
2949 allows the port to favor filling the delay slot of the call with
2950 the unconditional jump. */
2951 if (slots_to_fill
== 0)
2955 target_label
= JUMP_LABEL (insn
);
2956 condition
= get_branch_condition (insn
, target_label
);
2961 /* Get the next active fallthrough and target insns and see if we own
2962 them. Then see whether the branch is likely true. We don't need
2963 to do a lot of this for unconditional branches. */
2965 insn_at_target
= next_active_insn (target_label
);
2966 own_target
= own_thread_p (target_label
, target_label
, 0);
2968 if (condition
== const_true_rtx
)
2970 own_fallthrough
= 0;
2971 fallthrough_insn
= 0;
2976 fallthrough_insn
= next_active_insn (insn
);
2977 own_fallthrough
= own_thread_p (NEXT_INSN (insn
), NULL_RTX
, 1);
2978 prediction
= mostly_true_jump (insn
, condition
);
2981 /* If this insn is expected to branch, first try to get insns from our
2982 target, then our fallthrough insns. If it is not expected to branch,
2983 try the other order. */
2988 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2989 fallthrough_insn
, prediction
== 2, 1,
2991 slots_to_fill
, &slots_filled
, delay_list
);
2993 if (delay_list
== 0 && own_fallthrough
)
2995 /* Even though we didn't find anything for delay slots,
2996 we might have found a redundant insn which we deleted
2997 from the thread that was filled. So we have to recompute
2998 the next insn at the target. */
2999 target_label
= JUMP_LABEL (insn
);
3000 insn_at_target
= next_active_insn (target_label
);
3003 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
3004 insn_at_target
, 0, 0,
3006 slots_to_fill
, &slots_filled
,
3012 if (own_fallthrough
)
3014 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
3015 insn_at_target
, 0, 0,
3017 slots_to_fill
, &slots_filled
,
3020 if (delay_list
== 0)
3022 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
3023 next_active_insn (insn
), 0, 1,
3025 slots_to_fill
, &slots_filled
,
3030 unfilled_slots_base
[i
]
3031 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
3033 if (slots_to_fill
== slots_filled
)
3034 unfilled_slots_base
[i
] = 0;
3036 note_delay_statistics (slots_filled
, 1);
3040 /* Once we have tried two ways to fill a delay slot, make a pass over the
3041 code to try to improve the results and to do such things as more jump
3045 relax_delay_slots (rtx first
)
3047 rtx insn
, next
, pat
;
3048 rtx trial
, delay_insn
, target_label
;
3050 /* Look at every JUMP_INSN and see if we can improve it. */
3051 for (insn
= first
; insn
; insn
= next
)
3055 next
= next_active_insn (insn
);
3057 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3058 the next insn, or jumps to a label that is not the last of a
3059 group of consecutive labels. */
3061 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3062 && (target_label
= JUMP_LABEL (insn
)) != 0)
3064 target_label
= skip_consecutive_labels (follow_jumps (target_label
));
3065 if (target_label
== 0)
3066 target_label
= find_end_label ();
3068 if (target_label
&& next_active_insn (target_label
) == next
3069 && ! condjump_in_parallel_p (insn
))
3075 if (target_label
&& target_label
!= JUMP_LABEL (insn
))
3076 reorg_redirect_jump (insn
, target_label
);
3078 /* See if this jump conditionally branches around an unconditional
3079 jump. If so, invert this jump and point it to the target of the
3081 if (next
&& JUMP_P (next
)
3082 && any_condjump_p (insn
)
3083 && (simplejump_p (next
) || GET_CODE (PATTERN (next
)) == RETURN
)
3085 && next_active_insn (target_label
) == next_active_insn (next
)
3086 && no_labels_between_p (insn
, next
))
3088 rtx label
= JUMP_LABEL (next
);
3090 /* Be careful how we do this to avoid deleting code or
3091 labels that are momentarily dead. See similar optimization
3094 We also need to ensure we properly handle the case when
3095 invert_jump fails. */
3097 ++LABEL_NUSES (target_label
);
3099 ++LABEL_NUSES (label
);
3101 if (invert_jump (insn
, label
, 1))
3103 delete_related_insns (next
);
3108 --LABEL_NUSES (label
);
3110 if (--LABEL_NUSES (target_label
) == 0)
3111 delete_related_insns (target_label
);
3117 /* If this is an unconditional jump and the previous insn is a
3118 conditional jump, try reversing the condition of the previous
3119 insn and swapping our targets. The next pass might be able to
3122 Don't do this if we expect the conditional branch to be true, because
3123 we would then be making the more common case longer. */
3126 && (simplejump_p (insn
) || GET_CODE (PATTERN (insn
)) == RETURN
)
3127 && (other
= prev_active_insn (insn
)) != 0
3128 && any_condjump_p (other
)
3129 && no_labels_between_p (other
, insn
)
3130 && 0 > mostly_true_jump (other
,
3131 get_branch_condition (other
,
3132 JUMP_LABEL (other
))))
3134 rtx other_target
= JUMP_LABEL (other
);
3135 target_label
= JUMP_LABEL (insn
);
3137 if (invert_jump (other
, target_label
, 0))
3138 reorg_redirect_jump (insn
, other_target
);
3141 /* Now look only at cases where we have filled a delay slot. */
3142 if (!NONJUMP_INSN_P (insn
)
3143 || GET_CODE (PATTERN (insn
)) != SEQUENCE
)
3146 pat
= PATTERN (insn
);
3147 delay_insn
= XVECEXP (pat
, 0, 0);
3149 /* See if the first insn in the delay slot is redundant with some
3150 previous insn. Remove it from the delay slot if so; then set up
3151 to reprocess this insn. */
3152 if (redundant_insn (XVECEXP (pat
, 0, 1), delay_insn
, 0))
3154 delete_from_delay_slot (XVECEXP (pat
, 0, 1));
3155 next
= prev_active_insn (next
);
3159 /* See if we have a RETURN insn with a filled delay slot followed
3160 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3161 the first RETURN (but not its delay insn). This gives the same
3162 effect in fewer instructions.
3164 Only do so if optimizing for size since this results in slower, but
3167 && GET_CODE (PATTERN (delay_insn
)) == RETURN
3170 && GET_CODE (PATTERN (next
)) == RETURN
)
3175 /* Delete the RETURN and just execute the delay list insns.
3177 We do this by deleting the INSN containing the SEQUENCE, then
3178 re-emitting the insns separately, and then deleting the RETURN.
3179 This allows the count of the jump target to be properly
3182 /* Clear the from target bit, since these insns are no longer
3184 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3185 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3187 trial
= PREV_INSN (insn
);
3188 delete_related_insns (insn
);
3189 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3191 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3193 rtx this_insn
= XVECEXP (pat
, 0, i
);
3194 add_insn_after (this_insn
, after
);
3197 delete_scheduled_jump (delay_insn
);
3201 /* Now look only at the cases where we have a filled JUMP_INSN. */
3202 if (!JUMP_P (XVECEXP (PATTERN (insn
), 0, 0))
3203 || ! (condjump_p (XVECEXP (PATTERN (insn
), 0, 0))
3204 || condjump_in_parallel_p (XVECEXP (PATTERN (insn
), 0, 0))))
3207 target_label
= JUMP_LABEL (delay_insn
);
3211 /* If this jump goes to another unconditional jump, thread it, but
3212 don't convert a jump into a RETURN here. */
3213 trial
= skip_consecutive_labels (follow_jumps (target_label
));
3215 trial
= find_end_label ();
3217 if (trial
&& trial
!= target_label
3218 && redirect_with_delay_slots_safe_p (delay_insn
, trial
, insn
))
3220 reorg_redirect_jump (delay_insn
, trial
);
3221 target_label
= trial
;
3224 /* If the first insn at TARGET_LABEL is redundant with a previous
3225 insn, redirect the jump to the following insn process again. */
3226 trial
= next_active_insn (target_label
);
3227 if (trial
&& GET_CODE (PATTERN (trial
)) != SEQUENCE
3228 && redundant_insn (trial
, insn
, 0)
3229 && ! can_throw_internal (trial
))
3231 /* Figure out where to emit the special USE insn so we don't
3232 later incorrectly compute register live/death info. */
3233 rtx tmp
= next_active_insn (trial
);
3235 tmp
= find_end_label ();
3239 /* Insert the special USE insn and update dataflow info. */
3240 update_block (trial
, tmp
);
3242 /* Now emit a label before the special USE insn, and
3243 redirect our jump to the new label. */
3244 target_label
= get_label_before (PREV_INSN (tmp
));
3245 reorg_redirect_jump (delay_insn
, target_label
);
3251 /* Similarly, if it is an unconditional jump with one insn in its
3252 delay list and that insn is redundant, thread the jump. */
3253 if (trial
&& GET_CODE (PATTERN (trial
)) == SEQUENCE
3254 && XVECLEN (PATTERN (trial
), 0) == 2
3255 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
3256 && (simplejump_p (XVECEXP (PATTERN (trial
), 0, 0))
3257 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial
), 0, 0))) == RETURN
)
3258 && redundant_insn (XVECEXP (PATTERN (trial
), 0, 1), insn
, 0))
3260 target_label
= JUMP_LABEL (XVECEXP (PATTERN (trial
), 0, 0));
3261 if (target_label
== 0)
3262 target_label
= find_end_label ();
3265 && redirect_with_delay_slots_safe_p (delay_insn
, target_label
,
3268 reorg_redirect_jump (delay_insn
, target_label
);
3275 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3276 && prev_active_insn (target_label
) == insn
3277 && ! condjump_in_parallel_p (delay_insn
)
3279 /* If the last insn in the delay slot sets CC0 for some insn,
3280 various code assumes that it is in a delay slot. We could
3281 put it back where it belonged and delete the register notes,
3282 but it doesn't seem worthwhile in this uncommon case. */
3283 && ! find_reg_note (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1),
3284 REG_CC_USER
, NULL_RTX
)
3291 /* All this insn does is execute its delay list and jump to the
3292 following insn. So delete the jump and just execute the delay
3295 We do this by deleting the INSN containing the SEQUENCE, then
3296 re-emitting the insns separately, and then deleting the jump.
3297 This allows the count of the jump target to be properly
3300 /* Clear the from target bit, since these insns are no longer
3302 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3303 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3305 trial
= PREV_INSN (insn
);
3306 delete_related_insns (insn
);
3307 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3309 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3311 rtx this_insn
= XVECEXP (pat
, 0, i
);
3312 add_insn_after (this_insn
, after
);
3315 delete_scheduled_jump (delay_insn
);
3319 /* See if this is an unconditional jump around a single insn which is
3320 identical to the one in its delay slot. In this case, we can just
3321 delete the branch and the insn in its delay slot. */
3322 if (next
&& NONJUMP_INSN_P (next
)
3323 && prev_label (next_active_insn (next
)) == target_label
3324 && simplejump_p (insn
)
3325 && XVECLEN (pat
, 0) == 2
3326 && rtx_equal_p (PATTERN (next
), PATTERN (XVECEXP (pat
, 0, 1))))
3328 delete_related_insns (insn
);
3332 /* See if this jump (with its delay slots) conditionally branches
3333 around an unconditional jump (without delay slots). If so, invert
3334 this jump and point it to the target of the second jump. We cannot
3335 do this for annulled jumps, though. Again, don't convert a jump to
3337 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3338 && any_condjump_p (delay_insn
)
3339 && next
&& JUMP_P (next
)
3340 && (simplejump_p (next
) || GET_CODE (PATTERN (next
)) == RETURN
)
3341 && next_active_insn (target_label
) == next_active_insn (next
)
3342 && no_labels_between_p (insn
, next
))
3344 rtx label
= JUMP_LABEL (next
);
3345 rtx old_label
= JUMP_LABEL (delay_insn
);
3348 label
= find_end_label ();
3350 /* find_end_label can generate a new label. Check this first. */
3352 && no_labels_between_p (insn
, next
)
3353 && redirect_with_delay_slots_safe_p (delay_insn
, label
, insn
))
3355 /* Be careful how we do this to avoid deleting code or labels
3356 that are momentarily dead. See similar optimization in
3359 ++LABEL_NUSES (old_label
);
3361 if (invert_jump (delay_insn
, label
, 1))
3365 /* Must update the INSN_FROM_TARGET_P bits now that
3366 the branch is reversed, so that mark_target_live_regs
3367 will handle the delay slot insn correctly. */
3368 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3370 rtx slot
= XVECEXP (PATTERN (insn
), 0, i
);
3371 INSN_FROM_TARGET_P (slot
) = ! INSN_FROM_TARGET_P (slot
);
3374 delete_related_insns (next
);
3378 if (old_label
&& --LABEL_NUSES (old_label
) == 0)
3379 delete_related_insns (old_label
);
3384 /* If we own the thread opposite the way this insn branches, see if we
3385 can merge its delay slots with following insns. */
3386 if (INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3387 && own_thread_p (NEXT_INSN (insn
), 0, 1))
3388 try_merge_delay_insns (insn
, next
);
3389 else if (! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3390 && own_thread_p (target_label
, target_label
, 0))
3391 try_merge_delay_insns (insn
, next_active_insn (target_label
));
3393 /* If we get here, we haven't deleted INSN. But we may have deleted
3394 NEXT, so recompute it. */
3395 next
= next_active_insn (insn
);
3401 /* Look for filled jumps to the end of function label. We can try to convert
3402 them into RETURN insns if the insns in the delay slot are valid for the
3406 make_return_insns (rtx first
)
3408 rtx insn
, jump_insn
, pat
;
3409 rtx real_return_label
= end_of_function_label
;
3412 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3413 /* If a previous pass filled delay slots in the epilogue, things get a
3414 bit more complicated, as those filler insns would generally (without
3415 data flow analysis) have to be executed after any existing branch
3416 delay slot filler insns. It is also unknown whether such a
3417 transformation would actually be profitable. Note that the existing
3418 code only cares for branches with (some) filled delay slots. */
3419 if (current_function_epilogue_delay_list
!= NULL
)
3423 /* See if there is a RETURN insn in the function other than the one we
3424 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3425 into a RETURN to jump to it. */
3426 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3427 if (JUMP_P (insn
) && GET_CODE (PATTERN (insn
)) == RETURN
)
3429 real_return_label
= get_label_before (insn
);
3433 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3434 was equal to END_OF_FUNCTION_LABEL. */
3435 LABEL_NUSES (real_return_label
)++;
3437 /* Clear the list of insns to fill so we can use it. */
3438 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3440 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3444 /* Only look at filled JUMP_INSNs that go to the end of function
3446 if (!NONJUMP_INSN_P (insn
)
3447 || GET_CODE (PATTERN (insn
)) != SEQUENCE
3448 || !JUMP_P (XVECEXP (PATTERN (insn
), 0, 0))
3449 || JUMP_LABEL (XVECEXP (PATTERN (insn
), 0, 0)) != end_of_function_label
)
3452 pat
= PATTERN (insn
);
3453 jump_insn
= XVECEXP (pat
, 0, 0);
3455 /* If we can't make the jump into a RETURN, try to redirect it to the best
3456 RETURN and go on to the next insn. */
3457 if (! reorg_redirect_jump (jump_insn
, NULL_RTX
))
3459 /* Make sure redirecting the jump will not invalidate the delay
3461 if (redirect_with_delay_slots_safe_p (jump_insn
,
3464 reorg_redirect_jump (jump_insn
, real_return_label
);
3468 /* See if this RETURN can accept the insns current in its delay slot.
3469 It can if it has more or an equal number of slots and the contents
3470 of each is valid. */
3472 flags
= get_jump_flags (jump_insn
, JUMP_LABEL (jump_insn
));
3473 slots
= num_delay_slots (jump_insn
);
3474 if (slots
>= XVECLEN (pat
, 0) - 1)
3476 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3478 #ifdef ANNUL_IFFALSE_SLOTS
3479 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3480 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3481 ? eligible_for_annul_false (jump_insn
, i
- 1,
3482 XVECEXP (pat
, 0, i
), flags
) :
3484 #ifdef ANNUL_IFTRUE_SLOTS
3485 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3486 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3487 ? eligible_for_annul_true (jump_insn
, i
- 1,
3488 XVECEXP (pat
, 0, i
), flags
) :
3490 eligible_for_delay (jump_insn
, i
- 1,
3491 XVECEXP (pat
, 0, i
), flags
)))
3497 if (i
== XVECLEN (pat
, 0))
3500 /* We have to do something with this insn. If it is an unconditional
3501 RETURN, delete the SEQUENCE and output the individual insns,
3502 followed by the RETURN. Then set things up so we try to find
3503 insns for its delay slots, if it needs some. */
3504 if (GET_CODE (PATTERN (jump_insn
)) == RETURN
)
3506 rtx prev
= PREV_INSN (insn
);
3508 delete_related_insns (insn
);
3509 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3510 prev
= emit_insn_after (PATTERN (XVECEXP (pat
, 0, i
)), prev
);
3512 insn
= emit_jump_insn_after (PATTERN (jump_insn
), prev
);
3513 emit_barrier_after (insn
);
3516 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3519 /* It is probably more efficient to keep this with its current
3520 delay slot as a branch to a RETURN. */
3521 reorg_redirect_jump (jump_insn
, real_return_label
);
3524 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3525 new delay slots we have created. */
3526 if (--LABEL_NUSES (real_return_label
) == 0)
3527 delete_related_insns (real_return_label
);
3529 fill_simple_delay_slots (1);
3530 fill_simple_delay_slots (0);
3534 /* Try to find insns to place in delay slots. */
3537 dbr_schedule (rtx first
)
3539 rtx insn
, next
, epilogue_insn
= 0;
3542 /* If the current function has no insns other than the prologue and
3543 epilogue, then do not try to fill any delay slots. */
3544 if (n_basic_blocks
== NUM_FIXED_BLOCKS
)
3547 /* Find the highest INSN_UID and allocate and initialize our map from
3548 INSN_UID's to position in code. */
3549 for (max_uid
= 0, insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3551 if (INSN_UID (insn
) > max_uid
)
3552 max_uid
= INSN_UID (insn
);
3554 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_EPILOGUE_BEG
)
3555 epilogue_insn
= insn
;
3558 uid_to_ruid
= xmalloc ((max_uid
+ 1) * sizeof (int));
3559 for (i
= 0, insn
= first
; insn
; i
++, insn
= NEXT_INSN (insn
))
3560 uid_to_ruid
[INSN_UID (insn
)] = i
;
3562 /* Initialize the list of insns that need filling. */
3563 if (unfilled_firstobj
== 0)
3565 gcc_obstack_init (&unfilled_slots_obstack
);
3566 unfilled_firstobj
= obstack_alloc (&unfilled_slots_obstack
, 0);
3569 for (insn
= next_active_insn (first
); insn
; insn
= next_active_insn (insn
))
3573 INSN_ANNULLED_BRANCH_P (insn
) = 0;
3574 INSN_FROM_TARGET_P (insn
) = 0;
3576 /* Skip vector tables. We can't get attributes for them. */
3578 && (GET_CODE (PATTERN (insn
)) == ADDR_VEC
3579 || GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
))
3582 if (num_delay_slots (insn
) > 0)
3583 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3585 /* Ensure all jumps go to the last of a set of consecutive labels. */
3587 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3588 && JUMP_LABEL (insn
) != 0
3589 && ((target
= skip_consecutive_labels (JUMP_LABEL (insn
)))
3590 != JUMP_LABEL (insn
)))
3591 redirect_jump (insn
, target
, 1);
3594 init_resource_info (epilogue_insn
);
3596 /* Show we haven't computed an end-of-function label yet. */
3597 end_of_function_label
= 0;
3599 /* Initialize the statistics for this function. */
3600 memset (num_insns_needing_delays
, 0, sizeof num_insns_needing_delays
);
3601 memset (num_filled_delays
, 0, sizeof num_filled_delays
);
3603 /* Now do the delay slot filling. Try everything twice in case earlier
3604 changes make more slots fillable. */
3606 for (reorg_pass_number
= 0;
3607 reorg_pass_number
< MAX_REORG_PASSES
;
3608 reorg_pass_number
++)
3610 fill_simple_delay_slots (1);
3611 fill_simple_delay_slots (0);
3612 fill_eager_delay_slots ();
3613 relax_delay_slots (first
);
3616 /* Delete any USE insns made by update_block; subsequent passes don't need
3617 them or know how to deal with them. */
3618 for (insn
= first
; insn
; insn
= next
)
3620 next
= NEXT_INSN (insn
);
3622 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == USE
3623 && INSN_P (XEXP (PATTERN (insn
), 0)))
3624 next
= delete_related_insns (insn
);
3627 /* If we made an end of function label, indicate that it is now
3628 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3629 If it is now unused, delete it. */
3630 if (end_of_function_label
&& --LABEL_NUSES (end_of_function_label
) == 0)
3631 delete_related_insns (end_of_function_label
);
3634 if (HAVE_return
&& end_of_function_label
!= 0)
3635 make_return_insns (first
);
3638 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3640 /* It is not clear why the line below is needed, but it does seem to be. */
3641 unfilled_firstobj
= obstack_alloc (&unfilled_slots_obstack
, 0);
3645 int i
, j
, need_comma
;
3646 int total_delay_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3647 int total_annul_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3649 for (reorg_pass_number
= 0;
3650 reorg_pass_number
< MAX_REORG_PASSES
;
3651 reorg_pass_number
++)
3653 fprintf (dump_file
, ";; Reorg pass #%d:\n", reorg_pass_number
+ 1);
3654 for (i
= 0; i
< NUM_REORG_FUNCTIONS
; i
++)
3657 fprintf (dump_file
, ";; Reorg function #%d\n", i
);
3659 fprintf (dump_file
, ";; %d insns needing delay slots\n;; ",
3660 num_insns_needing_delays
[i
][reorg_pass_number
]);
3662 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3663 if (num_filled_delays
[i
][j
][reorg_pass_number
])
3666 fprintf (dump_file
, ", ");
3668 fprintf (dump_file
, "%d got %d delays",
3669 num_filled_delays
[i
][j
][reorg_pass_number
], j
);
3671 fprintf (dump_file
, "\n");
3674 memset (total_delay_slots
, 0, sizeof total_delay_slots
);
3675 memset (total_annul_slots
, 0, sizeof total_annul_slots
);
3676 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3678 if (! INSN_DELETED_P (insn
)
3679 && NONJUMP_INSN_P (insn
)
3680 && GET_CODE (PATTERN (insn
)) != USE
3681 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3683 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3685 j
= XVECLEN (PATTERN (insn
), 0) - 1;
3686 if (j
> MAX_DELAY_HISTOGRAM
)
3687 j
= MAX_DELAY_HISTOGRAM
;
3688 if (INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (insn
), 0, 0)))
3689 total_annul_slots
[j
]++;
3691 total_delay_slots
[j
]++;
3693 else if (num_delay_slots (insn
) > 0)
3694 total_delay_slots
[0]++;
3697 fprintf (dump_file
, ";; Reorg totals: ");
3699 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3701 if (total_delay_slots
[j
])
3704 fprintf (dump_file
, ", ");
3706 fprintf (dump_file
, "%d got %d delays", total_delay_slots
[j
], j
);
3709 fprintf (dump_file
, "\n");
3710 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3711 fprintf (dump_file
, ";; Reorg annuls: ");
3713 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3715 if (total_annul_slots
[j
])
3718 fprintf (dump_file
, ", ");
3720 fprintf (dump_file
, "%d got %d delays", total_annul_slots
[j
], j
);
3723 fprintf (dump_file
, "\n");
3725 fprintf (dump_file
, "\n");
3728 /* For all JUMP insns, fill in branch prediction notes, so that during
3729 assembler output a target can set branch prediction bits in the code.
3730 We have to do this now, as up until this point the destinations of
3731 JUMPS can be moved around and changed, but past right here that cannot
3733 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3737 if (NONJUMP_INSN_P (insn
))
3739 rtx pat
= PATTERN (insn
);
3741 if (GET_CODE (pat
) == SEQUENCE
)
3742 insn
= XVECEXP (pat
, 0, 0);
3747 pred_flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
3748 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_BR_PRED
,
3749 GEN_INT (pred_flags
),
3752 free_resource_info ();
3754 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3755 /* SPARC assembler, for instance, emit warning when debug info is output
3756 into the delay slot. */
3760 for (link
= current_function_epilogue_delay_list
;
3762 link
= XEXP (link
, 1))
3763 INSN_LOCATOR (XEXP (link
, 0)) = 0;
3767 #endif /* DELAY_SLOTS */
3770 gate_handle_delay_slots (void)
3773 return flag_delayed_branch
;
3779 /* Run delay slot optimization. */
3781 rest_of_handle_delay_slots (void)
3784 dbr_schedule (get_insns ());
3789 struct tree_opt_pass pass_delay_slots
=
3792 gate_handle_delay_slots
, /* gate */
3793 rest_of_handle_delay_slots
, /* execute */
3796 0, /* static_pass_number */
3797 TV_DBR_SCHED
, /* tv_id */
3798 0, /* properties_required */
3799 0, /* properties_provided */
3800 0, /* properties_destroyed */
3801 0, /* todo_flags_start */
3803 TODO_ggc_collect
, /* todo_flags_finish */
3807 /* Machine dependent reorg pass. */
3809 gate_handle_machine_reorg (void)
3811 return targetm
.machine_dependent_reorg
!= 0;
3816 rest_of_handle_machine_reorg (void)
3818 targetm
.machine_dependent_reorg ();
3822 struct tree_opt_pass pass_machine_reorg
=
3825 gate_handle_machine_reorg
, /* gate */
3826 rest_of_handle_machine_reorg
, /* execute */
3829 0, /* static_pass_number */
3830 TV_MACH_DEP
, /* tv_id */
3831 0, /* properties_required */
3832 0, /* properties_provided */
3833 0, /* properties_destroyed */
3834 0, /* todo_flags_start */
3836 TODO_ggc_collect
, /* todo_flags_finish */