RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo
[official-gcc.git] / gcc / testsuite / gcc.dg / vect / costmodel / riscv / rvv / dynamic-lmul4-5.c
blob88f58446abaf69706c5e5db3a238fcc16642cbfe
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
4 #include <stdint-gcc.h>
6 void foo2 (int16_t *__restrict a,
7 int32_t *__restrict b,
8 int32_t *__restrict c,
9 int32_t *__restrict a2,
10 int32_t *__restrict b2,
11 int32_t *__restrict c2,
12 int32_t *__restrict a3,
13 int32_t *__restrict b3,
14 int32_t *__restrict c3,
15 int32_t *__restrict a4,
16 int32_t *__restrict b4,
17 int32_t *__restrict c4,
18 int16_t *__restrict a5,
19 int32_t *__restrict b5,
20 int32_t *__restrict c5,
21 int n)
23 for (int i = 0; i < n; i++){
24 a[i] = b[i] + c[i];
25 b5[i] = b[i] + c[i];
26 a2[i] = b2[i] + c2[i];
27 a3[i] = b3[i] + c3[i];
28 a4[i] = b4[i] + c4[i];
29 a5[i] = a[i] + a4[i];
30 a[i] = a5[i] + b5[i]+ a[i];
32 a[i] = a[i] + c[i];
33 b5[i] = a[i] + c[i];
34 a2[i] = a[i] + c2[i];
35 a3[i] = a[i] + c3[i];
36 a4[i] = a[i] + c4[i];
37 a5[i] = a[i] + a4[i];
38 a[i] = a[i] + b5[i]+ a[i];
42 /* { dg-final { scan-assembler {e16,m2} } } */
43 /* { dg-final { scan-assembler-not {csrr} } } */
44 /* { dg-final { scan-tree-dump-times "Preferring smaller LMUL loop because it has unexpected spills" 1 "vect" } } */