1 /* { dg-do run { target { { powerpc*-*-linux* && lp64 } && powerpc_altivec_ok } } } */
2 /* { dg-options "-O2 -fprofile -mprofile-kernel -maltivec -mabi=altivec -mno-pcrel" } */
8 /* Testcase to check for ABI compliance of parameter passing
9 for the PowerPC64 ABI. */
11 void __attribute__((no_instrument_function
))
12 sig_ill_handler (int sig
)
17 extern void abort (void);
21 unsigned long gprs
[8];
27 volatile reg_parms_t gparms
;
29 /* _mcount call is done on Linux ppc64 early in the prologue.
30 my_mcount will provide a entry point _mcount,
31 which will save all parameter registers to gparms.
32 Note that _mcount needs to restore lr to original value,
33 therefore use ctr to return.
36 extern void my_mcount (void) asm ("_mcount");
37 void __attribute__((no_instrument_function
, no_split_stack
))
40 asm volatile ("mflr 12\n\t"
43 "addis 12,2,gparms@got@ha\n\t"
44 "ld 12,gparms@got@l(12)\n\t"
93 /* Stackframe structure relevant for parameter passing. */
103 struct sf
*backchain
;
121 #ifdef __LITTLE_ENDIAN__
122 #define MAKE_SLOT(x, y) ((long)x | ((long)y << 32))
124 #define MAKE_SLOT(x, y) ((long)y | ((long)x << 32))
132 void __attribute__ ((noinline
))
133 fcvi (char *s
, vector
int v
, int i
)
135 reg_parms_t lparms
= gparms
;
137 if (s
!= (char *) lparms
.gprs
[0])
140 if (!vec_all_eq (v
, lparms
.vrs
[0]))
143 if ((long) i
!= lparms
.gprs
[4])
152 void __attribute__ ((noinline
))
153 fcvv (char *s
, vector
int v
, vector
int w
)
155 vector
int a
, c
= {6, 8, 10, 12};
156 reg_parms_t lparms
= gparms
;
158 if (s
!= (char *) lparms
.gprs
[0])
161 if (!vec_all_eq (v
, lparms
.vrs
[0]))
164 if (!vec_all_eq (w
, lparms
.vrs
[1]))
169 if (!vec_all_eq (a
, c
))
179 void __attribute__ ((noinline
))
180 fcivv (char *s
, int i
, vector
int v
, vector
int w
)
182 vector
int a
, c
= {6, 8, 10, 12};
183 reg_parms_t lparms
= gparms
;
185 if (s
!= (char *) lparms
.gprs
[0])
188 if ((long) i
!= lparms
.gprs
[1])
191 if (!vec_all_eq (v
, lparms
.vrs
[0]))
194 if (!vec_all_eq (w
, lparms
.vrs
[1]))
199 if (!vec_all_eq (a
, c
))
209 void __attribute__ ((noinline
))
212 vector
int a
, c
= {6, 8, 10, 12};
215 reg_parms_t lparms
= gparms
;
220 if (s
!= (char *) lparms
.gprs
[0])
223 v
= va_arg(arg
, vector
int);
224 w
= va_arg(arg
, vector
int);
227 if (!vec_all_eq (a
, c
))
230 /* Go back one frame. */
231 sp
= __builtin_frame_address(0);
234 if (sp
->slot
[2].l
!= MAKE_SLOT (1, 2)
235 || sp
->slot
[4].l
!= MAKE_SLOT (5, 6))
246 void __attribute__ ((noinline
))
247 fciievv (char *s
, int i
, int j
, ...)
249 vector
int a
, c
= {6, 8, 10, 12};
252 reg_parms_t lparms
= gparms
;
257 if (s
!= (char *) lparms
.gprs
[0])
260 if ((long) i
!= lparms
.gprs
[1])
263 if ((long) j
!= lparms
.gprs
[2])
266 v
= va_arg(arg
, vector
int);
267 w
= va_arg(arg
, vector
int);
270 if (!vec_all_eq (a
, c
))
273 sp
= __builtin_frame_address(0);
276 if (sp
->slot
[4].l
!= MAKE_SLOT (1, 2)
277 || sp
->slot
[6].l
!= MAKE_SLOT (5, 6))
281 void __attribute__ ((noinline
))
282 fcvevv (char *s
, vector
int x
, ...)
284 vector
int a
, c
= {7, 10, 13, 16};
287 reg_parms_t lparms
= gparms
;
292 v
= va_arg(arg
, vector
int);
293 w
= va_arg(arg
, vector
int);
298 if (!vec_all_eq (a
, c
))
301 sp
= __builtin_frame_address(0);
304 if (sp
->slot
[4].l
!= MAKE_SLOT (1, 2)
305 || sp
->slot
[6].l
!= MAKE_SLOT (5, 6))
309 int __attribute__((no_instrument_function
, noinline
))
313 vector
int v
= {1, 2, 3, 4};
314 vector
int w
= {5, 6, 7, 8};
320 fciievv (s
, 1, 2, v
, w
);
325 int __attribute__((no_instrument_function
))
328 /* Exit on systems without altivec. */
329 signal (SIGILL
, sig_ill_handler
);
330 /* Altivec instruction, 'vor %v0,%v0,%v0'. */
331 asm volatile (".long 0x10000484");
332 signal (SIGILL
, SIG_DFL
);
338 Function called with no prototype.
346 fnp_cvvvv (char *s
, vector
int v
, vector
int w
,
347 vector
int x
, vector
int y
)
349 vector
int a
, c
= {12, 16, 20, 24};
350 reg_parms_t lparms
= gparms
;
352 vector_int_t v0
, v1
, v2
, v3
;
354 if (s
!= (char *) lparms
.gprs
[0])
357 if (!vec_all_eq (v
, lparms
.vrs
[0]))
360 if (!vec_all_eq (w
, lparms
.vrs
[1]))
363 if (!vec_all_eq (x
, lparms
.vrs
[2]))
366 if (!vec_all_eq (y
, lparms
.vrs
[3]))
373 if (!vec_all_eq (a
, c
))
376 v0
.v
= lparms
.vrs
[0];
377 v1
.v
= lparms
.vrs
[1];
378 v2
.v
= lparms
.vrs
[2];
379 v3
.v
= lparms
.vrs
[3];
381 if (v0
.l
[0] != lparms
.gprs
[2])
384 if (v0
.l
[1] != lparms
.gprs
[3])
387 if (v1
.l
[0] != lparms
.gprs
[4])
390 if (v1
.l
[1] != lparms
.gprs
[5])
393 if (v2
.l
[0] != lparms
.gprs
[6])
396 if (v2
.l
[1] != lparms
.gprs
[7])
399 sp
= __builtin_frame_address(0);
402 if (sp
->slot
[8].l
!= v3
.l
[0])
405 if (sp
->slot
[9].l
!= v3
.l
[1])