gcc/testsuite/gcc.target/powerpc/p9-vec-length-full-7.c

   1 /* { dg-do compile { target { lp64 && powerpc_p9vector_ok } } } */
   2 /* { dg-options "-mdejagnu-cpu=power9 -O2 -ftree-vectorize -fno-vect-cost-model -fno-unroll-loops -ffast-math" } */
   3
   4 /* { dg-additional-options "--param=vect-partial-vector-usage=2" } */
   5
   6 /* Test for fully with length, the loop body uses vector access with length,
   7    there should not be any epilogues.  */
   8
   9 #include "p9-vec-length-7.h"
  10
  11 /* Each type has one stxvl excepting for int8 and uint8, that have two due to
  12    rtl pass bbro duplicating the block which has one stxvl.  */
  13 /* { dg-final { scan-assembler-times {\mstxvl\M} 12 } } */