1 ;; Predicate definitions for ATMEL AVR micro controllers.
2 ;; Copyright (C) 2006-2013 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Registers from r0 to r15.
21 (define_predicate "l_register_operand"
22 (and (match_code "reg")
23 (match_test "REGNO (op) <= 15")))
25 ;; Registers from r16 to r31.
26 (define_predicate "d_register_operand"
27 (and (match_code "reg")
28 (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
30 (define_predicate "even_register_operand"
31 (and (match_code "reg")
32 (and (match_test "REGNO (op) <= 31")
33 (match_test "(REGNO (op) & 1) == 0"))))
35 (define_predicate "odd_register_operand"
36 (and (match_code "reg")
37 (and (match_test "REGNO (op) <= 31")
38 (match_test "(REGNO (op) & 1) != 0"))))
41 (define_predicate "stack_register_operand"
42 (and (match_code "reg")
43 (match_test "REGNO (op) == REG_SP")))
45 ;; Return true if OP is a valid address for lower half of I/O space.
46 (define_predicate "low_io_address_operand"
47 (and (match_code "const_int")
48 (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
51 ;; Return true if OP is a valid address for high half of I/O space.
52 (define_predicate "high_io_address_operand"
53 (and (match_code "const_int")
54 (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
57 ;; Return true if OP is a valid address of I/O space.
58 (define_predicate "io_address_operand"
59 (and (match_code "const_int")
60 (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
61 0, 0x40 - GET_MODE_SIZE (mode))")))
63 ;; Return 1 if OP is a general operand not in flash memory
64 (define_predicate "nop_general_operand"
65 (and (match_operand 0 "general_operand")
66 (match_test "!avr_mem_flash_p (op)")))
68 ;; Return 1 if OP is an "ordinary" general operand, i.e. a general
69 ;; operand whose load is not handled by a libgcc call or ELPM.
70 (define_predicate "nox_general_operand"
71 (and (match_operand 0 "general_operand")
72 (not (match_test "avr_load_libgcc_p (op)"))
73 (not (match_test "avr_mem_memx_p (op)"))))
75 ;; Return 1 if OP is a memory operand in one of the __flash* address spaces
76 (define_predicate "flash_operand"
77 (and (match_operand 0 "memory_operand")
78 (match_test "Pmode == mode")
79 (ior (match_test "!MEM_P (op)")
80 (match_test "avr_mem_flash_p (op)"))))
82 ;; Return 1 if OP is the zero constant for MODE.
83 (define_predicate "const0_operand"
84 (and (match_code "const_int,const_fixed,const_double")
85 (match_test "op == CONST0_RTX (mode)")))
87 ;; Return 1 if OP is the one constant integer for MODE.
88 (define_predicate "const1_operand"
89 (and (match_code "const_int")
90 (match_test "op == CONST1_RTX (mode)")))
93 ;; Return 1 if OP is constant integer 0..7 for MODE.
94 (define_predicate "const_0_to_7_operand"
95 (and (match_code "const_int")
96 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
98 ;; Return 1 if OP is constant integer 2..7 for MODE.
99 (define_predicate "const_2_to_7_operand"
100 (and (match_code "const_int")
101 (match_test "IN_RANGE (INTVAL (op), 2, 7)")))
103 ;; Return 1 if OP is constant integer 1..6 for MODE.
104 (define_predicate "const_1_to_6_operand"
105 (and (match_code "const_int")
106 (match_test "IN_RANGE (INTVAL (op), 1, 6)")))
108 ;; Return 1 if OP is constant integer 2..6 for MODE.
109 (define_predicate "const_2_to_6_operand"
110 (and (match_code "const_int")
111 (match_test "IN_RANGE (INTVAL (op), 2, 6)")))
113 ;; Returns true if OP is either the constant zero or a register.
114 (define_predicate "reg_or_0_operand"
115 (ior (match_operand 0 "register_operand")
116 (match_operand 0 "const0_operand")))
118 ;; Returns 1 if OP is a SYMBOL_REF.
119 (define_predicate "symbol_ref_operand"
120 (match_code "symbol_ref"))
122 ;; Return true if OP is a text segment reference.
123 ;; This is needed for program memory address expressions.
124 (define_predicate "text_segment_operand"
125 (match_code "code_label,label_ref,symbol_ref,plus,const")
127 switch (GET_CODE (op))
134 return SYMBOL_REF_FUNCTION_P (op);
136 /* Assume canonical format of symbol + constant.
139 return text_segment_operand (XEXP (op, 0), VOIDmode);
145 ;; Return true if OP is a constant that contains only one 1 in its
146 ;; binary representation.
147 (define_predicate "single_one_operand"
148 (and (match_code "const_int")
149 (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
151 ;; Return true if OP is a constant that contains only one 0 in its
152 ;; binary representation.
153 (define_predicate "single_zero_operand"
154 (and (match_code "const_int")
155 (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
158 (define_predicate "avr_sp_immediate_operand"
159 (and (match_code "const_int")
160 (match_test "satisfies_constraint_Csp (op)")))
163 (define_predicate "eqne_operator"
164 (match_code "eq,ne"))
167 (define_predicate "gelt_operator"
168 (match_code "ge,lt"))
170 ;; True for GT, GTU, LE & LEU
171 (define_predicate "difficult_comparison_operator"
172 (match_code "gt,gtu,le,leu"))
174 ;; False for GT, GTU, LE & LEU
175 (define_predicate "simple_comparison_operator"
176 (and (match_operand 0 "comparison_operator")
177 (not (match_code "gt,gtu,le,leu"))))
179 ;; Return true if OP is a valid call operand.
180 (define_predicate "call_insn_operand"
181 (and (match_code "mem")
182 (ior (match_test "register_operand (XEXP (op, 0), mode)")
183 (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
185 ;; For some insns we must ensure that no hard register is inserted
186 ;; into their operands because the insns are split and the split
187 ;; involves hard registers. An example are divmod insn that are
188 ;; split to insns that represent implicit library calls.
190 ;; True for register that is pseudo register.
191 (define_predicate "pseudo_register_operand"
192 (and (match_operand 0 "register_operand")
193 (not (and (match_code "reg")
194 (match_test "HARD_REGISTER_P (op)")))))
196 ;; True for operand that is pseudo register or CONST_INT.
197 (define_predicate "pseudo_register_or_const_int_operand"
198 (ior (match_operand 0 "const_int_operand")
199 (match_operand 0 "pseudo_register_operand")))
201 ;; We keep combiner from inserting hard registers into the input of sign- and
202 ;; zero-extends. A hard register in the input operand is not wanted because
203 ;; 32-bit multiply patterns clobber some hard registers and extends with a
204 ;; hard register that overlaps these clobbers won't combine to a widening
205 ;; multiplication. There is no need for combine to propagate or insert
206 ;; hard registers, register allocation can do it just as well.
208 ;; True for operand that is pseudo register at combine time.
209 (define_predicate "combine_pseudo_register_operand"
210 (ior (match_operand 0 "pseudo_register_operand")
211 (and (match_operand 0 "register_operand")
212 (match_test "reload_completed || reload_in_progress"))))
214 ;; Return true if OP is a constant integer that is either
216 (define_predicate "const_8_16_24_operand"
217 (and (match_code "const_int")
218 (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)")))
220 ;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
221 (define_predicate "u8_operand"
222 (and (match_code "const_int")
223 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
225 ;; Signed CONST_INT that fits in 8 bits, i.e. -128..127.
226 (define_predicate "s8_operand"
227 (and (match_code "const_int")
228 (match_test "IN_RANGE (INTVAL (op), -128, 127)")))
230 ;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1.
231 (define_predicate "o8_operand"
232 (and (match_code "const_int")
233 (match_test "IN_RANGE (INTVAL (op), -256, -1)")))
235 ;; Signed CONST_INT that fits in 9 bits, i.e. -256..255.
236 (define_predicate "s9_operand"
237 (and (match_code "const_int")
238 (match_test "IN_RANGE (INTVAL (op), -256, 255)")))
240 (define_predicate "register_or_s9_operand"
241 (ior (match_operand 0 "register_operand")
242 (match_operand 0 "s9_operand")))
244 ;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536.
245 (define_predicate "u16_operand"
246 (and (match_code "const_int")
247 (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)")))
249 ;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767.
250 (define_predicate "s16_operand"
251 (and (match_code "const_int")
252 (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)")))
254 ;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1.
255 (define_predicate "o16_operand"
256 (and (match_code "const_int")
257 (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)")))
259 ;; Const int, fixed, or double operand
260 (define_predicate "const_operand"
261 (ior (match_code "const_fixed")
262 (match_code "const_double")
263 (match_operand 0 "const_int_operand")))
265 ;; Const int, const fixed, or const double operand
266 (define_predicate "nonmemory_or_const_operand"
267 (ior (match_code "const_fixed")
268 (match_code "const_double")
269 (match_operand 0 "nonmemory_operand")))
271 ;; Immediate, const fixed, or const double operand
272 (define_predicate "const_or_immediate_operand"
273 (ior (match_code "const_fixed")
274 (match_code "const_double")
275 (match_operand 0 "immediate_operand")))