gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998-2013 Free Software Foundation, Inc.
   4    Contributed by Denis Chertykov (chertykov@gmail.com)
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 3, or (at your option)
  11 any later version.
  12
  13 GCC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING3.  If not see
  20 <http://www.gnu.org/licenses/>.  */
  21
  22 typedef struct
  23 {
  24   /* Id of the address space as used in c_register_addr_space */
  25   unsigned char id;
  26
  27   /* Flavour of memory: 0 = RAM, 1 = Flash */
  28   int memory_class;
  29
  30   /* Width of pointer (in bytes) */
  31   int pointer_size;
  32
  33   /* Name of the address space as visible to the user */
  34   const char *name;
  35
  36   /* Segment (i.e. 64k memory chunk) number.  */
  37   int segment;
  38
  39   /* Section prefix, e.g. ".progmem1.data"  */
  40   const char *section_name;
  41 } avr_addrspace_t;
  42
  43 extern const avr_addrspace_t avr_addrspace[];
  44
  45 /* Known address spaces */
  46
  47 enum
  48   {
  49     ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
  50     ADDR_SPACE_FLASH,
  51     ADDR_SPACE_FLASH1,
  52     ADDR_SPACE_FLASH2,
  53     ADDR_SPACE_FLASH3,
  54     ADDR_SPACE_FLASH4,
  55     ADDR_SPACE_FLASH5,
  56     ADDR_SPACE_MEMX,
  57     /* Sentinel */
  58     ADDR_SPACE_COUNT
  59   };
  60
  61 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
  62
  63 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call)
  64 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
  65 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
  66 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
  67 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
  68 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
  69 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
  70 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
  71 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
  72 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
  73                         || avr_current_arch->have_rampd)
  74 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
  75
  76 /* Handling of 8-bit SP versus 16-bit SP is as follows:
  77
  78    -msp8 is used internally to select the right multilib for targets with
  79    8-bit SP.  -msp8 is set automatically by DRIVER_SELF_SPECS for devices
  80    with 8-bit SP or by multilib generation machinery.  If a frame pointer is
  81    needed and SP is only 8 bits wide, SP is zero-extended to get FP.
  82
  83    TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
  84    This option has no effect on multilib selection.  It serves to save some
  85    bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
  86
  87    These two properties are reflected by built-in macros __AVR_SP8__ resp.
  88    __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__.  During multilib generation
  89    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
  90
  91 #define AVR_HAVE_8BIT_SP                                                \
  92   (avr_current_device->short_sp || TARGET_TINY_STACK || avr_sp8)
  93
  94 #define AVR_HAVE_SPH (!avr_sp8)
  95
  96 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
  97 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
  98
  99 #define AVR_XMEGA (avr_current_arch->xmega_p)
 100
 101 #define BITS_BIG_ENDIAN 0
 102 #define BYTES_BIG_ENDIAN 0
 103 #define WORDS_BIG_ENDIAN 0
 104
 105 #ifdef IN_LIBGCC2
 106 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 107 #define UNITS_PER_WORD 4
 108 #else
 109 /* Width of a word, in units (bytes).  */
 110 #define UNITS_PER_WORD 1
 111 #endif
 112
 113 #define POINTER_SIZE 16
 114
 115
 116 /* Maximum sized of reasonable data type
 117    DImode or Dfmode ...  */
 118 #define MAX_FIXED_MODE_SIZE 32
 119
 120 #define PARM_BOUNDARY 8
 121
 122 #define FUNCTION_BOUNDARY 8
 123
 124 #define EMPTY_FIELD_BOUNDARY 8
 125
 126 /* No data type wants to be aligned rounder than this.  */
 127 #define BIGGEST_ALIGNMENT 8
 128
 129 #define TARGET_VTABLE_ENTRY_ALIGN 8
 130
 131 #define STRICT_ALIGNMENT 0
 132
 133 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 134 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 135 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 136 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 137 #define FLOAT_TYPE_SIZE 32
 138 #define DOUBLE_TYPE_SIZE 32
 139 #define LONG_DOUBLE_TYPE_SIZE 32
 140 #define LONG_LONG_ACCUM_TYPE_SIZE 64
 141
 142 #define DEFAULT_SIGNED_CHAR 1
 143
 144 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 145 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 146
 147 #define WCHAR_TYPE_SIZE 16
 148
 149 #define FIRST_PSEUDO_REGISTER 36
 150
 151 #define FIXED_REGISTERS {\
 152   1,1,/* r0 r1 */\
 153   0,0,/* r2 r3 */\
 154   0,0,/* r4 r5 */\
 155   0,0,/* r6 r7 */\
 156   0,0,/* r8 r9 */\
 157   0,0,/* r10 r11 */\
 158   0,0,/* r12 r13 */\
 159   0,0,/* r14 r15 */\
 160   0,0,/* r16 r17 */\
 161   0,0,/* r18 r19 */\
 162   0,0,/* r20 r21 */\
 163   0,0,/* r22 r23 */\
 164   0,0,/* r24 r25 */\
 165   0,0,/* r26 r27 */\
 166   0,0,/* r28 r29 */\
 167   0,0,/* r30 r31 */\
 168   1,1,/*  STACK */\
 169   1,1 /* arg pointer */  }
 170
 171 #define CALL_USED_REGISTERS {                   \
 172   1,1,/* r0 r1 */                               \
 173     0,0,/* r2 r3 */                             \
 174     0,0,/* r4 r5 */                             \
 175     0,0,/* r6 r7 */                             \
 176     0,0,/* r8 r9 */                             \
 177     0,0,/* r10 r11 */                           \
 178     0,0,/* r12 r13 */                           \
 179     0,0,/* r14 r15 */                           \
 180     0,0,/* r16 r17 */                           \
 181     1,1,/* r18 r19 */                           \
 182     1,1,/* r20 r21 */                           \
 183     1,1,/* r22 r23 */                           \
 184     1,1,/* r24 r25 */                           \
 185     1,1,/* r26 r27 */                           \
 186     0,0,/* r28 r29 */                           \
 187     1,1,/* r30 r31 */                           \
 188     1,1,/*  STACK */                            \
 189     1,1 /* arg pointer */  }
 190
 191 #define REG_ALLOC_ORDER {                       \
 192     24,25,                                      \
 193     18,19,                                      \
 194     20,21,                                      \
 195     22,23,                                      \
 196     30,31,                                      \
 197     26,27,                                      \
 198     28,29,                                      \
 199     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 200     0,1,                                        \
 201     32,33,34,35                                 \
 202     }
 203
 204 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
 205
 206
 207 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 208   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 209
 210 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 211
 212 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 213
 214 enum reg_class {
 215   NO_REGS,
 216   R0_REG,                       /* r0 */
 217   POINTER_X_REGS,               /* r26 - r27 */
 218   POINTER_Y_REGS,               /* r28 - r29 */
 219   POINTER_Z_REGS,               /* r30 - r31 */
 220   STACK_REG,                    /* STACK */
 221   BASE_POINTER_REGS,            /* r28 - r31 */
 222   POINTER_REGS,                 /* r26 - r31 */
 223   ADDW_REGS,                    /* r24 - r31 */
 224   SIMPLE_LD_REGS,               /* r16 - r23 */
 225   LD_REGS,                      /* r16 - r31 */
 226   NO_LD_REGS,                   /* r0 - r15 */
 227   GENERAL_REGS,                 /* r0 - r31 */
 228   ALL_REGS, LIM_REG_CLASSES
 229 };
 230
 231
 232 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 233
 234 #define REG_CLASS_NAMES {                                       \
 235                  "NO_REGS",                                     \
 236                    "R0_REG",    /* r0 */                        \
 237                    "POINTER_X_REGS", /* r26 - r27 */            \
 238                    "POINTER_Y_REGS", /* r28 - r29 */            \
 239                    "POINTER_Z_REGS", /* r30 - r31 */            \
 240                    "STACK_REG", /* STACK */                     \
 241                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 242                    "POINTER_REGS", /* r26 - r31 */              \
 243                    "ADDW_REGS", /* r24 - r31 */                 \
 244                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 245                    "LD_REGS",   /* r16 - r31 */                 \
 246                    "NO_LD_REGS", /* r0 - r15 */                 \
 247                    "GENERAL_REGS", /* r0 - r31 */               \
 248                    "ALL_REGS" }
 249
 250 #define REG_CLASS_CONTENTS {                                            \
 251   {0x00000000,0x00000000},      /* NO_REGS */                           \
 252   {0x00000001,0x00000000},      /* R0_REG */                            \
 253   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 254   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 255   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 256   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 257   {(3 << REG_Y) | (3 << REG_Z),                                         \
 258      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 259   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 260      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 261   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 262      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 263   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 264   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 265      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 266   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 267   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 268   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 269 }
 270
 271 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 272
 273 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 274   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 275
 276 #define INDEX_REG_CLASS NO_REGS
 277
 278 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 279   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 280
 281 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 282
 283 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)     \
 284   avr_hard_regno_call_part_clobbered (REGNO, MODE)
 285
 286 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 287
 288 #define STACK_PUSH_CODE POST_DEC
 289
 290 #define STACK_GROWS_DOWNWARD
 291
 292 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 293
 294 #define STACK_POINTER_OFFSET 1
 295
 296 #define FIRST_PARM_OFFSET(FUNDECL) 0
 297
 298 #define STACK_BOUNDARY 8
 299
 300 #define STACK_POINTER_REGNUM 32
 301
 302 #define FRAME_POINTER_REGNUM REG_Y
 303
 304 #define ARG_POINTER_REGNUM 34
 305
 306 #define STATIC_CHAIN_REGNUM 2
 307
 308 #define ELIMINABLE_REGS {                                       \
 309       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 310         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 311        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 312
 313 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 314   OFFSET = avr_initial_elimination_offset (FROM, TO)
 315
 316 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 317
 318 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 319    for POST_DEC targets (PR27386).  */
 320 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 321
 322 typedef struct avr_args
 323 {
 324   /* # Registers available for passing */
 325   int nregs;
 326
 327   /* Next available register number */
 328   int regno;
 329 } CUMULATIVE_ARGS;
 330
 331 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 332   avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 333
 334 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
 335
 336 #define DEFAULT_PCC_STRUCT_RETURN 0
 337
 338 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 339
 340 #define HAVE_POST_INCREMENT 1
 341 #define HAVE_PRE_DECREMENT 1
 342
 343 #define MAX_REGS_PER_ADDRESS 1
 344
 345 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 346   do {                                                                  \
 347     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 348                                                ADDR_TYPE (TYPE),        \
 349                                                IND_L, make_memloc);     \
 350     if (new_x)                                                          \
 351       {                                                                 \
 352         X = new_x;                                                      \
 353         goto WIN;                                                       \
 354       }                                                                 \
 355   } while (0)
 356
 357 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 358
 359 #define SLOW_BYTE_ACCESS 0
 360
 361 #define NO_FUNCTION_CSE
 362
 363 #define REGISTER_TARGET_PRAGMAS()                                       \
 364   do {                                                                  \
 365     avr_register_target_pragmas();                                      \
 366   } while (0)
 367
 368 #define TEXT_SECTION_ASM_OP "\t.text"
 369
 370 #define DATA_SECTION_ASM_OP "\t.data"
 371
 372 #define BSS_SECTION_ASM_OP "\t.section .bss"
 373
 374 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 375    There are no shared libraries on this target, and these sections are
 376    placed in the read-only program memory, so they are not writable.  */
 377
 378 #undef CTORS_SECTION_ASM_OP
 379 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 380
 381 #undef DTORS_SECTION_ASM_OP
 382 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 383
 384 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 385
 386 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 387
 388 #define SUPPORTS_INIT_PRIORITY 0
 389
 390 #define JUMP_TABLES_IN_TEXT_SECTION 0
 391
 392 #define ASM_COMMENT_START " ; "
 393
 394 #define ASM_APP_ON "/* #APP */\n"
 395
 396 #define ASM_APP_OFF "/* #NOAPP */\n"
 397
 398 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 399
 400 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 401   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 402
 403 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 404   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 405
 406 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 407   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 408
 409 /* Globalizing directive for a label.  */
 410 #define GLOBAL_ASM_OP ".global\t"
 411
 412 #define SUPPORTS_WEAK 1
 413
 414 #define HAS_INIT_SECTION 1
 415
 416 #define REGISTER_NAMES {                                \
 417   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 418     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 419     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 420     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 421     "__SP_L__","__SP_H__","argL","argH"}
 422
 423 #define FINAL_PRESCAN_INSN(insn, operand, nop)  \
 424   avr_final_prescan_insn (insn, operand,nop)
 425
 426 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 427 {                                               \
 428   gcc_assert (REGNO < 32);                      \
 429   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 430 }
 431
 432 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 433 {                                               \
 434   gcc_assert (REGNO < 32);                      \
 435   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 436 }
 437
 438 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)  \
 439   avr_output_addr_vec_elt (STREAM, VALUE)
 440
 441 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 442   do {                                                  \
 443     if ((POWER) > 0)                                    \
 444       fprintf (STREAM, "\t.p2align\t%d\n", POWER);      \
 445   } while (0)
 446
 447 #define CASE_VECTOR_MODE HImode
 448
 449 #undef WORD_REGISTER_OPERATIONS
 450
 451 #define MOVE_MAX 4
 452
 453 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 454
 455 #define Pmode HImode
 456
 457 #define FUNCTION_MODE HImode
 458
 459 #define DOLLARS_IN_IDENTIFIERS 0
 460
 461 #define TRAMPOLINE_SIZE 4
 462
 463 /* Store in cc_status the expressions
 464    that the condition codes will describe
 465    after execution of an instruction whose pattern is EXP.
 466    Do not alter them if the instruction would not alter the cc's.  */
 467
 468 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
 469
 470 /* The add insns don't set overflow in a usable way.  */
 471 #define CC_OVERFLOW_UNUSABLE 01000
 472 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 473    Z bit is all we need when doing unsigned comparisons on the result of
 474    these insns (since they're always with 0).  However, conditions.h has
 475    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 476    understandable.  */
 477 #define CC_NO_CARRY CC_NO_OVERFLOW
 478
 479
 480 /* Output assembler code to FILE to increment profiler label # LABELNO
 481    for profiling a function entry.  */
 482
 483 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 484   fprintf (FILE, "/* profiler %d */", (LABELNO))
 485
 486 #define ADJUST_INSN_LENGTH(INSN, LENGTH)                \
 487     (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
 488
 489 extern const char *avr_device_to_arch (int argc, const char **argv);
 490 extern const char *avr_device_to_data_start (int argc, const char **argv);
 491 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 492 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 493 extern const char *avr_device_to_sp8 (int argc, const char **argv);
 494
 495 #define EXTRA_SPEC_FUNCTIONS                            \
 496   { "device_to_arch", avr_device_to_arch },             \
 497   { "device_to_data_start", avr_device_to_data_start }, \
 498   { "device_to_startfile", avr_device_to_startfiles },  \
 499   { "device_to_devicelib", avr_device_to_devicelib },   \
 500   { "device_to_sp8", avr_device_to_sp8 },
 501
 502 #define DRIVER_SELF_SPECS " %:device_to_sp8(%{mmcu=*:%*}) "
 503 #define CPP_SPEC ""
 504
 505 #define CC1_SPEC ""
 506
 507 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 508     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 509     %{!fexceptions:-fno-exceptions}"
 510 /* A C string constant that tells the GCC driver program options to
 511    pass to `cc1plus'.  */
 512
 513 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 514 mmcu=*:-mmcu=%*} \
 515 %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
 516 -mno-skip-bug}}}}}"
 517
 518 #define LINK_SPEC "\
 519 %{mrelax:--relax\
 520          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 521                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 522                              %{mmcu=atmega32*|\
 523                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 524                              %{mmcu=atmega64*|\
 525                                mmcu=at90can64*|\
 526                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 527 %:device_to_arch(%{mmcu=*:%*})\
 528 %:device_to_data_start(%{mmcu=*:%*})"
 529
 530 #define LIB_SPEC \
 531   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 532
 533 #define LIBSTDCXX "gcc"
 534 /* No libstdc++ for now.  Empty string doesn't work.  */
 535
 536 #define LIBGCC_SPEC \
 537   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 538
 539 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 540
 541 #define ENDFILE_SPEC ""
 542
 543 /* This is the default without any -mmcu=* option (AT90S*).  */
 544 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 545
 546 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 547   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 548
 549 #define CR_TAB "\n\t"
 550
 551 #define DWARF2_ADDR_SIZE 4
 552
 553 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 554 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 555
 556 /* The caller's stack pointer value immediately before the call
 557    is one byte below the first argument.  */
 558 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 559
 560 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 561   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 562
 563 /* A C structure for machine-specific, per-function data.
 564    This is added to the cfun structure.  */
 565 struct GTY(()) machine_function
 566 {
 567   /* 'true' - if current function is a naked function.  */
 568   int is_naked;
 569
 570   /* 'true' - if current function is an interrupt function
 571      as specified by the "interrupt" attribute.  */
 572   int is_interrupt;
 573
 574   /* 'true' - if current function is a signal function
 575      as specified by the "signal" attribute.  */
 576   int is_signal;
 577
 578   /* 'true' - if current function is a 'task' function
 579      as specified by the "OS_task" attribute.  */
 580   int is_OS_task;
 581
 582   /* 'true' - if current function is a 'main' function
 583      as specified by the "OS_main" attribute.  */
 584   int is_OS_main;
 585
 586   /* Current function stack size.  */
 587   int stack_usage;
 588
 589   /* 'true' if a callee might be tail called */
 590   int sibcall_fails;
 591
 592   /* 'true' if the above is_foo predicates are sanity-checked to avoid
 593      multiple diagnose for the same function.  */
 594   int attributes_checked_p;
 595 };
 596
 597 /* AVR does not round pushes, but the existence of this macro is
 598    required in order for pushes to be generated.  */
 599 #define PUSH_ROUNDING(X)        (X)
 600
 601 /* Define prototype here to avoid build warning.  Some files using
 602    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 603    tm.h but not tm_p.h.  */
 604 extern int avr_accumulate_outgoing_args (void);
 605 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 606
 607 #define INIT_EXPANDERS avr_init_expanders()