1 /* Test forcing 128-bit logical types into GPR registers. */
5 #define FORCE_REG2(X,Y)
8 #if defined(USE_ALTIVEC)
10 #define PRINT_REG1 "# altivec reg %0"
11 #define PRINT_REG2 "# altivec reg %0, %1"
13 #elif defined(USE_FPR)
14 #define REG_CLASS "+d"
15 #define PRINT_REG1 "# fpr reg %0"
16 #define PRINT_REG2 "# fpr reg %0, %1"
18 #elif defined(USE_VSX)
19 #define REG_CLASS "+wa"
20 #define PRINT_REG1 "# vsx reg %x0"
21 #define PRINT_REG2 "# vsx reg %x0, %x1"
24 #define REG_CLASS "+r"
25 #define PRINT_REG1 "# gpr reg %0"
26 #define PRINT_REG2 "# gpr reg %0, %1"
29 #define FORCE_REG1(X) __asm__ (PRINT_REG1 : REG_CLASS (X))
30 #define FORCE_REG2(X,Y) __asm__ (PRINT_REG2 : REG_CLASS (X), REG_CLASS (Y))
87 c
= ~(a
& b
); /* NAND */
99 c
= ~(a
| b
); /* AND */
111 c
= ~(a
^ b
); /* EQV */
123 c
= (~a
) & b
; /* ANDC */
135 c
= (~a
) | b
; /* ORC */
147 c
= (~a
) ^ b
; /* EQV */
159 c
= a
& (~b
); /* ANDC */
171 c
= a
| (~b
); /* ORC */
183 c
= a
^ (~b
); /* AND */