PR middle-end/51472
[official-gcc.git] / gcc / cse.c
blobe624b2828bc54bfae72bdba15138c800ff6a6e7b
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "tm_p.h"
28 #include "hard-reg-set.h"
29 #include "regs.h"
30 #include "basic-block.h"
31 #include "flags.h"
32 #include "insn-config.h"
33 #include "recog.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "diagnostic-core.h"
37 #include "toplev.h"
38 #include "output.h"
39 #include "ggc.h"
40 #include "timevar.h"
41 #include "except.h"
42 #include "target.h"
43 #include "params.h"
44 #include "rtlhooks-def.h"
45 #include "tree-pass.h"
46 #include "df.h"
47 #include "dbgcnt.h"
49 /* The basic idea of common subexpression elimination is to go
50 through the code, keeping a record of expressions that would
51 have the same value at the current scan point, and replacing
52 expressions encountered with the cheapest equivalent expression.
54 It is too complicated to keep track of the different possibilities
55 when control paths merge in this code; so, at each label, we forget all
56 that is known and start fresh. This can be described as processing each
57 extended basic block separately. We have a separate pass to perform
58 global CSE.
60 Note CSE can turn a conditional or computed jump into a nop or
61 an unconditional jump. When this occurs we arrange to run the jump
62 optimizer after CSE to delete the unreachable code.
64 We use two data structures to record the equivalent expressions:
65 a hash table for most expressions, and a vector of "quantity
66 numbers" to record equivalent (pseudo) registers.
68 The use of the special data structure for registers is desirable
69 because it is faster. It is possible because registers references
70 contain a fairly small number, the register number, taken from
71 a contiguously allocated series, and two register references are
72 identical if they have the same number. General expressions
73 do not have any such thing, so the only way to retrieve the
74 information recorded on an expression other than a register
75 is to keep it in a hash table.
77 Registers and "quantity numbers":
79 At the start of each basic block, all of the (hardware and pseudo)
80 registers used in the function are given distinct quantity
81 numbers to indicate their contents. During scan, when the code
82 copies one register into another, we copy the quantity number.
83 When a register is loaded in any other way, we allocate a new
84 quantity number to describe the value generated by this operation.
85 `REG_QTY (N)' records what quantity register N is currently thought
86 of as containing.
88 All real quantity numbers are greater than or equal to zero.
89 If register N has not been assigned a quantity, `REG_QTY (N)' will
90 equal -N - 1, which is always negative.
92 Quantity numbers below zero do not exist and none of the `qty_table'
93 entries should be referenced with a negative index.
95 We also maintain a bidirectional chain of registers for each
96 quantity number. The `qty_table` members `first_reg' and `last_reg',
97 and `reg_eqv_table' members `next' and `prev' hold these chains.
99 The first register in a chain is the one whose lifespan is least local.
100 Among equals, it is the one that was seen first.
101 We replace any equivalent register with that one.
103 If two registers have the same quantity number, it must be true that
104 REG expressions with qty_table `mode' must be in the hash table for both
105 registers and must be in the same class.
107 The converse is not true. Since hard registers may be referenced in
108 any mode, two REG expressions might be equivalent in the hash table
109 but not have the same quantity number if the quantity number of one
110 of the registers is not the same mode as those expressions.
112 Constants and quantity numbers
114 When a quantity has a known constant value, that value is stored
115 in the appropriate qty_table `const_rtx'. This is in addition to
116 putting the constant in the hash table as is usual for non-regs.
118 Whether a reg or a constant is preferred is determined by the configuration
119 macro CONST_COSTS and will often depend on the constant value. In any
120 event, expressions containing constants can be simplified, by fold_rtx.
122 When a quantity has a known nearly constant value (such as an address
123 of a stack slot), that value is stored in the appropriate qty_table
124 `const_rtx'.
126 Integer constants don't have a machine mode. However, cse
127 determines the intended machine mode from the destination
128 of the instruction that moves the constant. The machine mode
129 is recorded in the hash table along with the actual RTL
130 constant expression so that different modes are kept separate.
132 Other expressions:
134 To record known equivalences among expressions in general
135 we use a hash table called `table'. It has a fixed number of buckets
136 that contain chains of `struct table_elt' elements for expressions.
137 These chains connect the elements whose expressions have the same
138 hash codes.
140 Other chains through the same elements connect the elements which
141 currently have equivalent values.
143 Register references in an expression are canonicalized before hashing
144 the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 The hash code of a register reference is computed using the quantity
146 number, not the register number.
148 When the value of an expression changes, it is necessary to remove from the
149 hash table not just that expression but all expressions whose values
150 could be different as a result.
152 1. If the value changing is in memory, except in special cases
153 ANYTHING referring to memory could be changed. That is because
154 nobody knows where a pointer does not point.
155 The function `invalidate_memory' removes what is necessary.
157 The special cases are when the address is constant or is
158 a constant plus a fixed register such as the frame pointer
159 or a static chain pointer. When such addresses are stored in,
160 we can tell exactly which other such addresses must be invalidated
161 due to overlap. `invalidate' does this.
162 All expressions that refer to non-constant
163 memory addresses are also invalidated. `invalidate_memory' does this.
165 2. If the value changing is a register, all expressions
166 containing references to that register, and only those,
167 must be removed.
169 Because searching the entire hash table for expressions that contain
170 a register is very slow, we try to figure out when it isn't necessary.
171 Precisely, this is necessary only when expressions have been
172 entered in the hash table using this register, and then the value has
173 changed, and then another expression wants to be added to refer to
174 the register's new value. This sequence of circumstances is rare
175 within any one basic block.
177 `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 cse_reg_info, are used to detect this case. REG_TICK (i) is
179 incremented whenever a value is stored in register i.
180 REG_IN_TABLE (i) holds -1 if no references to register i have been
181 entered in the table; otherwise, it contains the value REG_TICK (i)
182 had when the references were entered. If we want to enter a
183 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 remove old references. Until we want to enter a new entry, the
185 mere fact that the two vectors don't match makes the entries be
186 ignored if anyone tries to match them.
188 Registers themselves are entered in the hash table as well as in
189 the equivalent-register chains. However, `REG_TICK' and
190 `REG_IN_TABLE' do not apply to expressions which are simple
191 register references. These expressions are removed from the table
192 immediately when they become invalid, and this can be done even if
193 we do not immediately search for all the expressions that refer to
194 the register.
196 A CLOBBER rtx in an instruction invalidates its operand for further
197 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 invalidates everything that resides in memory.
200 Related expressions:
202 Constant expressions that differ only by an additive integer
203 are called related. When a constant expression is put in
204 the table, the related expression with no constant term
205 is also entered. These are made to point at each other
206 so that it is possible to find out if there exists any
207 register equivalent to an expression related to a given expression. */
209 /* Length of qty_table vector. We know in advance we will not need
210 a quantity number this big. */
212 static int max_qty;
214 /* Next quantity number to be allocated.
215 This is 1 + the largest number needed so far. */
217 static int next_qty;
219 /* Per-qty information tracking.
221 `first_reg' and `last_reg' track the head and tail of the
222 chain of registers which currently contain this quantity.
224 `mode' contains the machine mode of this quantity.
226 `const_rtx' holds the rtx of the constant value of this
227 quantity, if known. A summations of the frame/arg pointer
228 and a constant can also be entered here. When this holds
229 a known value, `const_insn' is the insn which stored the
230 constant value.
232 `comparison_{code,const,qty}' are used to track when a
233 comparison between a quantity and some constant or register has
234 been passed. In such a case, we know the results of the comparison
235 in case we see it again. These members record a comparison that
236 is known to be true. `comparison_code' holds the rtx code of such
237 a comparison, else it is set to UNKNOWN and the other two
238 comparison members are undefined. `comparison_const' holds
239 the constant being compared against, or zero if the comparison
240 is not against a constant. `comparison_qty' holds the quantity
241 being compared against when the result is known. If the comparison
242 is not with a register, `comparison_qty' is -1. */
244 struct qty_table_elem
246 rtx const_rtx;
247 rtx const_insn;
248 rtx comparison_const;
249 int comparison_qty;
250 unsigned int first_reg, last_reg;
251 /* The sizes of these fields should match the sizes of the
252 code and mode fields of struct rtx_def (see rtl.h). */
253 ENUM_BITFIELD(rtx_code) comparison_code : 16;
254 ENUM_BITFIELD(machine_mode) mode : 8;
257 /* The table of all qtys, indexed by qty number. */
258 static struct qty_table_elem *qty_table;
260 /* Structure used to pass arguments via for_each_rtx to function
261 cse_change_cc_mode. */
262 struct change_cc_mode_args
264 rtx insn;
265 rtx newreg;
268 #ifdef HAVE_cc0
269 /* For machines that have a CC0, we do not record its value in the hash
270 table since its use is guaranteed to be the insn immediately following
271 its definition and any other insn is presumed to invalidate it.
273 Instead, we store below the current and last value assigned to CC0.
274 If it should happen to be a constant, it is stored in preference
275 to the actual assigned value. In case it is a constant, we store
276 the mode in which the constant should be interpreted. */
278 static rtx this_insn_cc0, prev_insn_cc0;
279 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
280 #endif
282 /* Insn being scanned. */
284 static rtx this_insn;
285 static bool optimize_this_for_speed_p;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* The number of times the register has been altered in the current
313 basic block. */
314 int reg_tick;
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
319 invalid. */
320 int reg_in_table;
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
365 subexpression. */
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
402 chain is not useful.
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
409 a fixed address).
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
418 struct table_elt
420 rtx exp;
421 rtx canon_exp;
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
428 int cost;
429 int regcost;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
433 char in_memory;
434 char is_const;
435 char flag;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
441 #define HASH_SHIFT 5
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
448 #define HASH(X, M) \
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
479 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
481 /* Get the number of times this register has been updated in this
482 basic block. */
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
491 SUBREG). */
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
506 #define CHEAPER(X, Y) \
507 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
509 static struct table_elt *table[HASH_SIZE];
511 /* Chain of `struct table_elt's made so far for this function
512 but currently removed from the table. */
514 static struct table_elt *free_element_chain;
516 /* Set to the cost of a constant pool reference if one was found for a
517 symbolic constant. If this was found, it means we should try to
518 convert constants into constant pool entries if they don't fit in
519 the insn. */
521 static int constant_pool_entries_cost;
522 static int constant_pool_entries_regcost;
524 /* Trace a patch through the CFG. */
526 struct branch_path
528 /* The basic block for this path entry. */
529 basic_block bb;
532 /* This data describes a block that will be processed by
533 cse_extended_basic_block. */
535 struct cse_basic_block_data
537 /* Total number of SETs in block. */
538 int nsets;
539 /* Size of current branch path, if any. */
540 int path_size;
541 /* Current path, indicating which basic_blocks will be processed. */
542 struct branch_path *path;
546 /* Pointers to the live in/live out bitmaps for the boundaries of the
547 current EBB. */
548 static bitmap cse_ebb_live_in, cse_ebb_live_out;
550 /* A simple bitmap to track which basic blocks have been visited
551 already as part of an already processed extended basic block. */
552 static sbitmap cse_visited_basic_blocks;
554 static bool fixed_base_plus_p (rtx x);
555 static int notreg_cost (rtx, enum rtx_code, int);
556 static int approx_reg_cost_1 (rtx *, void *);
557 static int approx_reg_cost (rtx);
558 static int preferable (int, int, int, int);
559 static void new_basic_block (void);
560 static void make_new_qty (unsigned int, enum machine_mode);
561 static void make_regs_eqv (unsigned int, unsigned int);
562 static void delete_reg_equiv (unsigned int);
563 static int mention_regs (rtx);
564 static int insert_regs (rtx, struct table_elt *, int);
565 static void remove_from_table (struct table_elt *, unsigned);
566 static void remove_pseudo_from_table (rtx, unsigned);
567 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
568 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
569 static rtx lookup_as_function (rtx, enum rtx_code);
570 static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
571 enum machine_mode, int, int);
572 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
573 enum machine_mode);
574 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
575 static void invalidate (rtx, enum machine_mode);
576 static bool cse_rtx_varies_p (const_rtx, bool);
577 static void remove_invalid_refs (unsigned int);
578 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
579 enum machine_mode);
580 static void rehash_using_reg (rtx);
581 static void invalidate_memory (void);
582 static void invalidate_for_call (void);
583 static rtx use_related_value (rtx, struct table_elt *);
585 static inline unsigned canon_hash (rtx, enum machine_mode);
586 static inline unsigned safe_hash (rtx, enum machine_mode);
587 static inline unsigned hash_rtx_string (const char *);
589 static rtx canon_reg (rtx, rtx);
590 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
591 enum machine_mode *,
592 enum machine_mode *);
593 static rtx fold_rtx (rtx, rtx);
594 static rtx equiv_constant (rtx);
595 static void record_jump_equiv (rtx, bool);
596 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
597 int);
598 static void cse_insn (rtx);
599 static void cse_prescan_path (struct cse_basic_block_data *);
600 static void invalidate_from_clobbers (rtx);
601 static rtx cse_process_notes (rtx, rtx, bool *);
602 static void cse_extended_basic_block (struct cse_basic_block_data *);
603 static void count_reg_usage (rtx, int *, rtx, int);
604 static int check_for_label_ref (rtx *, void *);
605 extern void dump_class (struct table_elt*);
606 static void get_cse_reg_info_1 (unsigned int regno);
607 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
608 static int check_dependence (rtx *, void *);
610 static void flush_hash_table (void);
611 static bool insn_live_p (rtx, int *);
612 static bool set_live_p (rtx, rtx, int *);
613 static int cse_change_cc_mode (rtx *, void *);
614 static void cse_change_cc_mode_insn (rtx, rtx);
615 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
616 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
617 bool);
620 #undef RTL_HOOKS_GEN_LOWPART
621 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
623 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
625 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
626 virtual regs here because the simplify_*_operation routines are called
627 by integrate.c, which is called before virtual register instantiation. */
629 static bool
630 fixed_base_plus_p (rtx x)
632 switch (GET_CODE (x))
634 case REG:
635 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
636 return true;
637 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
638 return true;
639 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
640 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
641 return true;
642 return false;
644 case PLUS:
645 if (!CONST_INT_P (XEXP (x, 1)))
646 return false;
647 return fixed_base_plus_p (XEXP (x, 0));
649 default:
650 return false;
654 /* Dump the expressions in the equivalence class indicated by CLASSP.
655 This function is used only for debugging. */
656 void
657 dump_class (struct table_elt *classp)
659 struct table_elt *elt;
661 fprintf (stderr, "Equivalence chain for ");
662 print_rtl (stderr, classp->exp);
663 fprintf (stderr, ": \n");
665 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
667 print_rtl (stderr, elt->exp);
668 fprintf (stderr, "\n");
672 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
674 static int
675 approx_reg_cost_1 (rtx *xp, void *data)
677 rtx x = *xp;
678 int *cost_p = (int *) data;
680 if (x && REG_P (x))
682 unsigned int regno = REGNO (x);
684 if (! CHEAP_REGNO (regno))
686 if (regno < FIRST_PSEUDO_REGISTER)
688 if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
689 return 1;
690 *cost_p += 2;
692 else
693 *cost_p += 1;
697 return 0;
700 /* Return an estimate of the cost of the registers used in an rtx.
701 This is mostly the number of different REG expressions in the rtx;
702 however for some exceptions like fixed registers we use a cost of
703 0. If any other hard register reference occurs, return MAX_COST. */
705 static int
706 approx_reg_cost (rtx x)
708 int cost = 0;
710 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
711 return MAX_COST;
713 return cost;
716 /* Return a negative value if an rtx A, whose costs are given by COST_A
717 and REGCOST_A, is more desirable than an rtx B.
718 Return a positive value if A is less desirable, or 0 if the two are
719 equally good. */
720 static int
721 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
723 /* First, get rid of cases involving expressions that are entirely
724 unwanted. */
725 if (cost_a != cost_b)
727 if (cost_a == MAX_COST)
728 return 1;
729 if (cost_b == MAX_COST)
730 return -1;
733 /* Avoid extending lifetimes of hardregs. */
734 if (regcost_a != regcost_b)
736 if (regcost_a == MAX_COST)
737 return 1;
738 if (regcost_b == MAX_COST)
739 return -1;
742 /* Normal operation costs take precedence. */
743 if (cost_a != cost_b)
744 return cost_a - cost_b;
745 /* Only if these are identical consider effects on register pressure. */
746 if (regcost_a != regcost_b)
747 return regcost_a - regcost_b;
748 return 0;
751 /* Internal function, to compute cost when X is not a register; called
752 from COST macro to keep it simple. */
754 static int
755 notreg_cost (rtx x, enum rtx_code outer, int opno)
757 return ((GET_CODE (x) == SUBREG
758 && REG_P (SUBREG_REG (x))
759 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
760 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
761 && (GET_MODE_SIZE (GET_MODE (x))
762 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
763 && subreg_lowpart_p (x)
764 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
765 GET_MODE (SUBREG_REG (x))))
767 : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2);
771 /* Initialize CSE_REG_INFO_TABLE. */
773 static void
774 init_cse_reg_info (unsigned int nregs)
776 /* Do we need to grow the table? */
777 if (nregs > cse_reg_info_table_size)
779 unsigned int new_size;
781 if (cse_reg_info_table_size < 2048)
783 /* Compute a new size that is a power of 2 and no smaller
784 than the large of NREGS and 64. */
785 new_size = (cse_reg_info_table_size
786 ? cse_reg_info_table_size : 64);
788 while (new_size < nregs)
789 new_size *= 2;
791 else
793 /* If we need a big table, allocate just enough to hold
794 NREGS registers. */
795 new_size = nregs;
798 /* Reallocate the table with NEW_SIZE entries. */
799 free (cse_reg_info_table);
800 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
801 cse_reg_info_table_size = new_size;
802 cse_reg_info_table_first_uninitialized = 0;
805 /* Do we have all of the first NREGS entries initialized? */
806 if (cse_reg_info_table_first_uninitialized < nregs)
808 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
809 unsigned int i;
811 /* Put the old timestamp on newly allocated entries so that they
812 will all be considered out of date. We do not touch those
813 entries beyond the first NREGS entries to be nice to the
814 virtual memory. */
815 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
816 cse_reg_info_table[i].timestamp = old_timestamp;
818 cse_reg_info_table_first_uninitialized = nregs;
822 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
824 static void
825 get_cse_reg_info_1 (unsigned int regno)
827 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
828 entry will be considered to have been initialized. */
829 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
831 /* Initialize the rest of the entry. */
832 cse_reg_info_table[regno].reg_tick = 1;
833 cse_reg_info_table[regno].reg_in_table = -1;
834 cse_reg_info_table[regno].subreg_ticked = -1;
835 cse_reg_info_table[regno].reg_qty = -regno - 1;
838 /* Find a cse_reg_info entry for REGNO. */
840 static inline struct cse_reg_info *
841 get_cse_reg_info (unsigned int regno)
843 struct cse_reg_info *p = &cse_reg_info_table[regno];
845 /* If this entry has not been initialized, go ahead and initialize
846 it. */
847 if (p->timestamp != cse_reg_info_timestamp)
848 get_cse_reg_info_1 (regno);
850 return p;
853 /* Clear the hash table and initialize each register with its own quantity,
854 for a new basic block. */
856 static void
857 new_basic_block (void)
859 int i;
861 next_qty = 0;
863 /* Invalidate cse_reg_info_table. */
864 cse_reg_info_timestamp++;
866 /* Clear out hash table state for this pass. */
867 CLEAR_HARD_REG_SET (hard_regs_in_table);
869 /* The per-quantity values used to be initialized here, but it is
870 much faster to initialize each as it is made in `make_new_qty'. */
872 for (i = 0; i < HASH_SIZE; i++)
874 struct table_elt *first;
876 first = table[i];
877 if (first != NULL)
879 struct table_elt *last = first;
881 table[i] = NULL;
883 while (last->next_same_hash != NULL)
884 last = last->next_same_hash;
886 /* Now relink this hash entire chain into
887 the free element list. */
889 last->next_same_hash = free_element_chain;
890 free_element_chain = first;
894 #ifdef HAVE_cc0
895 prev_insn_cc0 = 0;
896 #endif
899 /* Say that register REG contains a quantity in mode MODE not in any
900 register before and initialize that quantity. */
902 static void
903 make_new_qty (unsigned int reg, enum machine_mode mode)
905 int q;
906 struct qty_table_elem *ent;
907 struct reg_eqv_elem *eqv;
909 gcc_assert (next_qty < max_qty);
911 q = REG_QTY (reg) = next_qty++;
912 ent = &qty_table[q];
913 ent->first_reg = reg;
914 ent->last_reg = reg;
915 ent->mode = mode;
916 ent->const_rtx = ent->const_insn = NULL_RTX;
917 ent->comparison_code = UNKNOWN;
919 eqv = &reg_eqv_table[reg];
920 eqv->next = eqv->prev = -1;
923 /* Make reg NEW equivalent to reg OLD.
924 OLD is not changing; NEW is. */
926 static void
927 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
929 unsigned int lastr, firstr;
930 int q = REG_QTY (old_reg);
931 struct qty_table_elem *ent;
933 ent = &qty_table[q];
935 /* Nothing should become eqv until it has a "non-invalid" qty number. */
936 gcc_assert (REGNO_QTY_VALID_P (old_reg));
938 REG_QTY (new_reg) = q;
939 firstr = ent->first_reg;
940 lastr = ent->last_reg;
942 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
943 hard regs. Among pseudos, if NEW will live longer than any other reg
944 of the same qty, and that is beyond the current basic block,
945 make it the new canonical replacement for this qty. */
946 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
947 /* Certain fixed registers might be of the class NO_REGS. This means
948 that not only can they not be allocated by the compiler, but
949 they cannot be used in substitutions or canonicalizations
950 either. */
951 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
952 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
953 || (new_reg >= FIRST_PSEUDO_REGISTER
954 && (firstr < FIRST_PSEUDO_REGISTER
955 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
956 && !bitmap_bit_p (cse_ebb_live_out, firstr))
957 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
958 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
960 reg_eqv_table[firstr].prev = new_reg;
961 reg_eqv_table[new_reg].next = firstr;
962 reg_eqv_table[new_reg].prev = -1;
963 ent->first_reg = new_reg;
965 else
967 /* If NEW is a hard reg (known to be non-fixed), insert at end.
968 Otherwise, insert before any non-fixed hard regs that are at the
969 end. Registers of class NO_REGS cannot be used as an
970 equivalent for anything. */
971 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
972 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
973 && new_reg >= FIRST_PSEUDO_REGISTER)
974 lastr = reg_eqv_table[lastr].prev;
975 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
976 if (reg_eqv_table[lastr].next >= 0)
977 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
978 else
979 qty_table[q].last_reg = new_reg;
980 reg_eqv_table[lastr].next = new_reg;
981 reg_eqv_table[new_reg].prev = lastr;
985 /* Remove REG from its equivalence class. */
987 static void
988 delete_reg_equiv (unsigned int reg)
990 struct qty_table_elem *ent;
991 int q = REG_QTY (reg);
992 int p, n;
994 /* If invalid, do nothing. */
995 if (! REGNO_QTY_VALID_P (reg))
996 return;
998 ent = &qty_table[q];
1000 p = reg_eqv_table[reg].prev;
1001 n = reg_eqv_table[reg].next;
1003 if (n != -1)
1004 reg_eqv_table[n].prev = p;
1005 else
1006 ent->last_reg = p;
1007 if (p != -1)
1008 reg_eqv_table[p].next = n;
1009 else
1010 ent->first_reg = n;
1012 REG_QTY (reg) = -reg - 1;
1015 /* Remove any invalid expressions from the hash table
1016 that refer to any of the registers contained in expression X.
1018 Make sure that newly inserted references to those registers
1019 as subexpressions will be considered valid.
1021 mention_regs is not called when a register itself
1022 is being stored in the table.
1024 Return 1 if we have done something that may have changed the hash code
1025 of X. */
1027 static int
1028 mention_regs (rtx x)
1030 enum rtx_code code;
1031 int i, j;
1032 const char *fmt;
1033 int changed = 0;
1035 if (x == 0)
1036 return 0;
1038 code = GET_CODE (x);
1039 if (code == REG)
1041 unsigned int regno = REGNO (x);
1042 unsigned int endregno = END_REGNO (x);
1043 unsigned int i;
1045 for (i = regno; i < endregno; i++)
1047 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1048 remove_invalid_refs (i);
1050 REG_IN_TABLE (i) = REG_TICK (i);
1051 SUBREG_TICKED (i) = -1;
1054 return 0;
1057 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1058 pseudo if they don't use overlapping words. We handle only pseudos
1059 here for simplicity. */
1060 if (code == SUBREG && REG_P (SUBREG_REG (x))
1061 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1063 unsigned int i = REGNO (SUBREG_REG (x));
1065 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1067 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1068 the last store to this register really stored into this
1069 subreg, then remove the memory of this subreg.
1070 Otherwise, remove any memory of the entire register and
1071 all its subregs from the table. */
1072 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1073 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1074 remove_invalid_refs (i);
1075 else
1076 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1079 REG_IN_TABLE (i) = REG_TICK (i);
1080 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1081 return 0;
1084 /* If X is a comparison or a COMPARE and either operand is a register
1085 that does not have a quantity, give it one. This is so that a later
1086 call to record_jump_equiv won't cause X to be assigned a different
1087 hash code and not found in the table after that call.
1089 It is not necessary to do this here, since rehash_using_reg can
1090 fix up the table later, but doing this here eliminates the need to
1091 call that expensive function in the most common case where the only
1092 use of the register is in the comparison. */
1094 if (code == COMPARE || COMPARISON_P (x))
1096 if (REG_P (XEXP (x, 0))
1097 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1098 if (insert_regs (XEXP (x, 0), NULL, 0))
1100 rehash_using_reg (XEXP (x, 0));
1101 changed = 1;
1104 if (REG_P (XEXP (x, 1))
1105 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1106 if (insert_regs (XEXP (x, 1), NULL, 0))
1108 rehash_using_reg (XEXP (x, 1));
1109 changed = 1;
1113 fmt = GET_RTX_FORMAT (code);
1114 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1115 if (fmt[i] == 'e')
1116 changed |= mention_regs (XEXP (x, i));
1117 else if (fmt[i] == 'E')
1118 for (j = 0; j < XVECLEN (x, i); j++)
1119 changed |= mention_regs (XVECEXP (x, i, j));
1121 return changed;
1124 /* Update the register quantities for inserting X into the hash table
1125 with a value equivalent to CLASSP.
1126 (If the class does not contain a REG, it is irrelevant.)
1127 If MODIFIED is nonzero, X is a destination; it is being modified.
1128 Note that delete_reg_equiv should be called on a register
1129 before insert_regs is done on that register with MODIFIED != 0.
1131 Nonzero value means that elements of reg_qty have changed
1132 so X's hash code may be different. */
1134 static int
1135 insert_regs (rtx x, struct table_elt *classp, int modified)
1137 if (REG_P (x))
1139 unsigned int regno = REGNO (x);
1140 int qty_valid;
1142 /* If REGNO is in the equivalence table already but is of the
1143 wrong mode for that equivalence, don't do anything here. */
1145 qty_valid = REGNO_QTY_VALID_P (regno);
1146 if (qty_valid)
1148 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1150 if (ent->mode != GET_MODE (x))
1151 return 0;
1154 if (modified || ! qty_valid)
1156 if (classp)
1157 for (classp = classp->first_same_value;
1158 classp != 0;
1159 classp = classp->next_same_value)
1160 if (REG_P (classp->exp)
1161 && GET_MODE (classp->exp) == GET_MODE (x))
1163 unsigned c_regno = REGNO (classp->exp);
1165 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1167 /* Suppose that 5 is hard reg and 100 and 101 are
1168 pseudos. Consider
1170 (set (reg:si 100) (reg:si 5))
1171 (set (reg:si 5) (reg:si 100))
1172 (set (reg:di 101) (reg:di 5))
1174 We would now set REG_QTY (101) = REG_QTY (5), but the
1175 entry for 5 is in SImode. When we use this later in
1176 copy propagation, we get the register in wrong mode. */
1177 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1178 continue;
1180 make_regs_eqv (regno, c_regno);
1181 return 1;
1184 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1185 than REG_IN_TABLE to find out if there was only a single preceding
1186 invalidation - for the SUBREG - or another one, which would be
1187 for the full register. However, if we find here that REG_TICK
1188 indicates that the register is invalid, it means that it has
1189 been invalidated in a separate operation. The SUBREG might be used
1190 now (then this is a recursive call), or we might use the full REG
1191 now and a SUBREG of it later. So bump up REG_TICK so that
1192 mention_regs will do the right thing. */
1193 if (! modified
1194 && REG_IN_TABLE (regno) >= 0
1195 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1196 REG_TICK (regno)++;
1197 make_new_qty (regno, GET_MODE (x));
1198 return 1;
1201 return 0;
1204 /* If X is a SUBREG, we will likely be inserting the inner register in the
1205 table. If that register doesn't have an assigned quantity number at
1206 this point but does later, the insertion that we will be doing now will
1207 not be accessible because its hash code will have changed. So assign
1208 a quantity number now. */
1210 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1211 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1213 insert_regs (SUBREG_REG (x), NULL, 0);
1214 mention_regs (x);
1215 return 1;
1217 else
1218 return mention_regs (x);
1222 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1223 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1224 CST is equal to an anchor. */
1226 static bool
1227 compute_const_anchors (rtx cst,
1228 HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1229 HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1231 HOST_WIDE_INT n = INTVAL (cst);
1233 *lower_base = n & ~(targetm.const_anchor - 1);
1234 if (*lower_base == n)
1235 return false;
1237 *upper_base =
1238 (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1);
1239 *upper_offs = n - *upper_base;
1240 *lower_offs = n - *lower_base;
1241 return true;
1244 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1246 static void
1247 insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1248 enum machine_mode mode)
1250 struct table_elt *elt;
1251 unsigned hash;
1252 rtx anchor_exp;
1253 rtx exp;
1255 anchor_exp = GEN_INT (anchor);
1256 hash = HASH (anchor_exp, mode);
1257 elt = lookup (anchor_exp, hash, mode);
1258 if (!elt)
1259 elt = insert (anchor_exp, NULL, hash, mode);
1261 exp = plus_constant (reg, offs);
1262 /* REG has just been inserted and the hash codes recomputed. */
1263 mention_regs (exp);
1264 hash = HASH (exp, mode);
1266 /* Use the cost of the register rather than the whole expression. When
1267 looking up constant anchors we will further offset the corresponding
1268 expression therefore it does not make sense to prefer REGs over
1269 reg-immediate additions. Prefer instead the oldest expression. Also
1270 don't prefer pseudos over hard regs so that we derive constants in
1271 argument registers from other argument registers rather than from the
1272 original pseudo that was used to synthesize the constant. */
1273 insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
1276 /* The constant CST is equivalent to the register REG. Create
1277 equivalences between the two anchors of CST and the corresponding
1278 register-offset expressions using REG. */
1280 static void
1281 insert_const_anchors (rtx reg, rtx cst, enum machine_mode mode)
1283 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1285 if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1286 &upper_base, &upper_offs))
1287 return;
1289 /* Ignore anchors of value 0. Constants accessible from zero are
1290 simple. */
1291 if (lower_base != 0)
1292 insert_const_anchor (lower_base, reg, -lower_offs, mode);
1294 if (upper_base != 0)
1295 insert_const_anchor (upper_base, reg, -upper_offs, mode);
1298 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1299 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1300 valid expression. Return the cheapest and oldest of such expressions. In
1301 *OLD, return how old the resulting expression is compared to the other
1302 equivalent expressions. */
1304 static rtx
1305 find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1306 unsigned *old)
1308 struct table_elt *elt;
1309 unsigned idx;
1310 struct table_elt *match_elt;
1311 rtx match;
1313 /* Find the cheapest and *oldest* expression to maximize the chance of
1314 reusing the same pseudo. */
1316 match_elt = NULL;
1317 match = NULL_RTX;
1318 for (elt = anchor_elt->first_same_value, idx = 0;
1319 elt;
1320 elt = elt->next_same_value, idx++)
1322 if (match_elt && CHEAPER (match_elt, elt))
1323 return match;
1325 if (REG_P (elt->exp)
1326 || (GET_CODE (elt->exp) == PLUS
1327 && REG_P (XEXP (elt->exp, 0))
1328 && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1330 rtx x;
1332 /* Ignore expressions that are no longer valid. */
1333 if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1334 continue;
1336 x = plus_constant (elt->exp, offs);
1337 if (REG_P (x)
1338 || (GET_CODE (x) == PLUS
1339 && IN_RANGE (INTVAL (XEXP (x, 1)),
1340 -targetm.const_anchor,
1341 targetm.const_anchor - 1)))
1343 match = x;
1344 match_elt = elt;
1345 *old = idx;
1350 return match;
1353 /* Try to express the constant SRC_CONST using a register+offset expression
1354 derived from a constant anchor. Return it if successful or NULL_RTX,
1355 otherwise. */
1357 static rtx
1358 try_const_anchors (rtx src_const, enum machine_mode mode)
1360 struct table_elt *lower_elt, *upper_elt;
1361 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1362 rtx lower_anchor_rtx, upper_anchor_rtx;
1363 rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1364 unsigned lower_old, upper_old;
1366 if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1367 &upper_base, &upper_offs))
1368 return NULL_RTX;
1370 lower_anchor_rtx = GEN_INT (lower_base);
1371 upper_anchor_rtx = GEN_INT (upper_base);
1372 lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1373 upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1375 if (lower_elt)
1376 lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1377 if (upper_elt)
1378 upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1380 if (!lower_exp)
1381 return upper_exp;
1382 if (!upper_exp)
1383 return lower_exp;
1385 /* Return the older expression. */
1386 return (upper_old > lower_old ? upper_exp : lower_exp);
1389 /* Look in or update the hash table. */
1391 /* Remove table element ELT from use in the table.
1392 HASH is its hash code, made using the HASH macro.
1393 It's an argument because often that is known in advance
1394 and we save much time not recomputing it. */
1396 static void
1397 remove_from_table (struct table_elt *elt, unsigned int hash)
1399 if (elt == 0)
1400 return;
1402 /* Mark this element as removed. See cse_insn. */
1403 elt->first_same_value = 0;
1405 /* Remove the table element from its equivalence class. */
1408 struct table_elt *prev = elt->prev_same_value;
1409 struct table_elt *next = elt->next_same_value;
1411 if (next)
1412 next->prev_same_value = prev;
1414 if (prev)
1415 prev->next_same_value = next;
1416 else
1418 struct table_elt *newfirst = next;
1419 while (next)
1421 next->first_same_value = newfirst;
1422 next = next->next_same_value;
1427 /* Remove the table element from its hash bucket. */
1430 struct table_elt *prev = elt->prev_same_hash;
1431 struct table_elt *next = elt->next_same_hash;
1433 if (next)
1434 next->prev_same_hash = prev;
1436 if (prev)
1437 prev->next_same_hash = next;
1438 else if (table[hash] == elt)
1439 table[hash] = next;
1440 else
1442 /* This entry is not in the proper hash bucket. This can happen
1443 when two classes were merged by `merge_equiv_classes'. Search
1444 for the hash bucket that it heads. This happens only very
1445 rarely, so the cost is acceptable. */
1446 for (hash = 0; hash < HASH_SIZE; hash++)
1447 if (table[hash] == elt)
1448 table[hash] = next;
1452 /* Remove the table element from its related-value circular chain. */
1454 if (elt->related_value != 0 && elt->related_value != elt)
1456 struct table_elt *p = elt->related_value;
1458 while (p->related_value != elt)
1459 p = p->related_value;
1460 p->related_value = elt->related_value;
1461 if (p->related_value == p)
1462 p->related_value = 0;
1465 /* Now add it to the free element chain. */
1466 elt->next_same_hash = free_element_chain;
1467 free_element_chain = elt;
1470 /* Same as above, but X is a pseudo-register. */
1472 static void
1473 remove_pseudo_from_table (rtx x, unsigned int hash)
1475 struct table_elt *elt;
1477 /* Because a pseudo-register can be referenced in more than one
1478 mode, we might have to remove more than one table entry. */
1479 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1480 remove_from_table (elt, hash);
1483 /* Look up X in the hash table and return its table element,
1484 or 0 if X is not in the table.
1486 MODE is the machine-mode of X, or if X is an integer constant
1487 with VOIDmode then MODE is the mode with which X will be used.
1489 Here we are satisfied to find an expression whose tree structure
1490 looks like X. */
1492 static struct table_elt *
1493 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1495 struct table_elt *p;
1497 for (p = table[hash]; p; p = p->next_same_hash)
1498 if (mode == p->mode && ((x == p->exp && REG_P (x))
1499 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1500 return p;
1502 return 0;
1505 /* Like `lookup' but don't care whether the table element uses invalid regs.
1506 Also ignore discrepancies in the machine mode of a register. */
1508 static struct table_elt *
1509 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1511 struct table_elt *p;
1513 if (REG_P (x))
1515 unsigned int regno = REGNO (x);
1517 /* Don't check the machine mode when comparing registers;
1518 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1519 for (p = table[hash]; p; p = p->next_same_hash)
1520 if (REG_P (p->exp)
1521 && REGNO (p->exp) == regno)
1522 return p;
1524 else
1526 for (p = table[hash]; p; p = p->next_same_hash)
1527 if (mode == p->mode
1528 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1529 return p;
1532 return 0;
1535 /* Look for an expression equivalent to X and with code CODE.
1536 If one is found, return that expression. */
1538 static rtx
1539 lookup_as_function (rtx x, enum rtx_code code)
1541 struct table_elt *p
1542 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1544 if (p == 0)
1545 return 0;
1547 for (p = p->first_same_value; p; p = p->next_same_value)
1548 if (GET_CODE (p->exp) == code
1549 /* Make sure this is a valid entry in the table. */
1550 && exp_equiv_p (p->exp, p->exp, 1, false))
1551 return p->exp;
1553 return 0;
1556 /* Insert X in the hash table, assuming HASH is its hash code and
1557 CLASSP is an element of the class it should go in (or 0 if a new
1558 class should be made). COST is the code of X and reg_cost is the
1559 cost of registers in X. It is inserted at the proper position to
1560 keep the class in the order cheapest first.
1562 MODE is the machine-mode of X, or if X is an integer constant
1563 with VOIDmode then MODE is the mode with which X will be used.
1565 For elements of equal cheapness, the most recent one
1566 goes in front, except that the first element in the list
1567 remains first unless a cheaper element is added. The order of
1568 pseudo-registers does not matter, as canon_reg will be called to
1569 find the cheapest when a register is retrieved from the table.
1571 The in_memory field in the hash table element is set to 0.
1572 The caller must set it nonzero if appropriate.
1574 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1575 and if insert_regs returns a nonzero value
1576 you must then recompute its hash code before calling here.
1578 If necessary, update table showing constant values of quantities. */
1580 static struct table_elt *
1581 insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1582 enum machine_mode mode, int cost, int reg_cost)
1584 struct table_elt *elt;
1586 /* If X is a register and we haven't made a quantity for it,
1587 something is wrong. */
1588 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1590 /* If X is a hard register, show it is being put in the table. */
1591 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1592 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1594 /* Put an element for X into the right hash bucket. */
1596 elt = free_element_chain;
1597 if (elt)
1598 free_element_chain = elt->next_same_hash;
1599 else
1600 elt = XNEW (struct table_elt);
1602 elt->exp = x;
1603 elt->canon_exp = NULL_RTX;
1604 elt->cost = cost;
1605 elt->regcost = reg_cost;
1606 elt->next_same_value = 0;
1607 elt->prev_same_value = 0;
1608 elt->next_same_hash = table[hash];
1609 elt->prev_same_hash = 0;
1610 elt->related_value = 0;
1611 elt->in_memory = 0;
1612 elt->mode = mode;
1613 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1615 if (table[hash])
1616 table[hash]->prev_same_hash = elt;
1617 table[hash] = elt;
1619 /* Put it into the proper value-class. */
1620 if (classp)
1622 classp = classp->first_same_value;
1623 if (CHEAPER (elt, classp))
1624 /* Insert at the head of the class. */
1626 struct table_elt *p;
1627 elt->next_same_value = classp;
1628 classp->prev_same_value = elt;
1629 elt->first_same_value = elt;
1631 for (p = classp; p; p = p->next_same_value)
1632 p->first_same_value = elt;
1634 else
1636 /* Insert not at head of the class. */
1637 /* Put it after the last element cheaper than X. */
1638 struct table_elt *p, *next;
1640 for (p = classp;
1641 (next = p->next_same_value) && CHEAPER (next, elt);
1642 p = next)
1645 /* Put it after P and before NEXT. */
1646 elt->next_same_value = next;
1647 if (next)
1648 next->prev_same_value = elt;
1650 elt->prev_same_value = p;
1651 p->next_same_value = elt;
1652 elt->first_same_value = classp;
1655 else
1656 elt->first_same_value = elt;
1658 /* If this is a constant being set equivalent to a register or a register
1659 being set equivalent to a constant, note the constant equivalence.
1661 If this is a constant, it cannot be equivalent to a different constant,
1662 and a constant is the only thing that can be cheaper than a register. So
1663 we know the register is the head of the class (before the constant was
1664 inserted).
1666 If this is a register that is not already known equivalent to a
1667 constant, we must check the entire class.
1669 If this is a register that is already known equivalent to an insn,
1670 update the qtys `const_insn' to show that `this_insn' is the latest
1671 insn making that quantity equivalent to the constant. */
1673 if (elt->is_const && classp && REG_P (classp->exp)
1674 && !REG_P (x))
1676 int exp_q = REG_QTY (REGNO (classp->exp));
1677 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1679 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1680 exp_ent->const_insn = this_insn;
1683 else if (REG_P (x)
1684 && classp
1685 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1686 && ! elt->is_const)
1688 struct table_elt *p;
1690 for (p = classp; p != 0; p = p->next_same_value)
1692 if (p->is_const && !REG_P (p->exp))
1694 int x_q = REG_QTY (REGNO (x));
1695 struct qty_table_elem *x_ent = &qty_table[x_q];
1697 x_ent->const_rtx
1698 = gen_lowpart (GET_MODE (x), p->exp);
1699 x_ent->const_insn = this_insn;
1700 break;
1705 else if (REG_P (x)
1706 && qty_table[REG_QTY (REGNO (x))].const_rtx
1707 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1708 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1710 /* If this is a constant with symbolic value,
1711 and it has a term with an explicit integer value,
1712 link it up with related expressions. */
1713 if (GET_CODE (x) == CONST)
1715 rtx subexp = get_related_value (x);
1716 unsigned subhash;
1717 struct table_elt *subelt, *subelt_prev;
1719 if (subexp != 0)
1721 /* Get the integer-free subexpression in the hash table. */
1722 subhash = SAFE_HASH (subexp, mode);
1723 subelt = lookup (subexp, subhash, mode);
1724 if (subelt == 0)
1725 subelt = insert (subexp, NULL, subhash, mode);
1726 /* Initialize SUBELT's circular chain if it has none. */
1727 if (subelt->related_value == 0)
1728 subelt->related_value = subelt;
1729 /* Find the element in the circular chain that precedes SUBELT. */
1730 subelt_prev = subelt;
1731 while (subelt_prev->related_value != subelt)
1732 subelt_prev = subelt_prev->related_value;
1733 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1734 This way the element that follows SUBELT is the oldest one. */
1735 elt->related_value = subelt_prev->related_value;
1736 subelt_prev->related_value = elt;
1740 return elt;
1743 /* Wrap insert_with_costs by passing the default costs. */
1745 static struct table_elt *
1746 insert (rtx x, struct table_elt *classp, unsigned int hash,
1747 enum machine_mode mode)
1749 return
1750 insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
1754 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1755 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1756 the two classes equivalent.
1758 CLASS1 will be the surviving class; CLASS2 should not be used after this
1759 call.
1761 Any invalid entries in CLASS2 will not be copied. */
1763 static void
1764 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1766 struct table_elt *elt, *next, *new_elt;
1768 /* Ensure we start with the head of the classes. */
1769 class1 = class1->first_same_value;
1770 class2 = class2->first_same_value;
1772 /* If they were already equal, forget it. */
1773 if (class1 == class2)
1774 return;
1776 for (elt = class2; elt; elt = next)
1778 unsigned int hash;
1779 rtx exp = elt->exp;
1780 enum machine_mode mode = elt->mode;
1782 next = elt->next_same_value;
1784 /* Remove old entry, make a new one in CLASS1's class.
1785 Don't do this for invalid entries as we cannot find their
1786 hash code (it also isn't necessary). */
1787 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1789 bool need_rehash = false;
1791 hash_arg_in_memory = 0;
1792 hash = HASH (exp, mode);
1794 if (REG_P (exp))
1796 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1797 delete_reg_equiv (REGNO (exp));
1800 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1801 remove_pseudo_from_table (exp, hash);
1802 else
1803 remove_from_table (elt, hash);
1805 if (insert_regs (exp, class1, 0) || need_rehash)
1807 rehash_using_reg (exp);
1808 hash = HASH (exp, mode);
1810 new_elt = insert (exp, class1, hash, mode);
1811 new_elt->in_memory = hash_arg_in_memory;
1816 /* Flush the entire hash table. */
1818 static void
1819 flush_hash_table (void)
1821 int i;
1822 struct table_elt *p;
1824 for (i = 0; i < HASH_SIZE; i++)
1825 for (p = table[i]; p; p = table[i])
1827 /* Note that invalidate can remove elements
1828 after P in the current hash chain. */
1829 if (REG_P (p->exp))
1830 invalidate (p->exp, VOIDmode);
1831 else
1832 remove_from_table (p, i);
1836 /* Function called for each rtx to check whether true dependence exist. */
1837 struct check_dependence_data
1839 enum machine_mode mode;
1840 rtx exp;
1841 rtx addr;
1844 static int
1845 check_dependence (rtx *x, void *data)
1847 struct check_dependence_data *d = (struct check_dependence_data *) data;
1848 if (*x && MEM_P (*x))
1849 return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RTX,
1850 cse_rtx_varies_p);
1851 else
1852 return 0;
1855 /* Remove from the hash table, or mark as invalid, all expressions whose
1856 values could be altered by storing in X. X is a register, a subreg, or
1857 a memory reference with nonvarying address (because, when a memory
1858 reference with a varying address is stored in, all memory references are
1859 removed by invalidate_memory so specific invalidation is superfluous).
1860 FULL_MODE, if not VOIDmode, indicates that this much should be
1861 invalidated instead of just the amount indicated by the mode of X. This
1862 is only used for bitfield stores into memory.
1864 A nonvarying address may be just a register or just a symbol reference,
1865 or it may be either of those plus a numeric offset. */
1867 static void
1868 invalidate (rtx x, enum machine_mode full_mode)
1870 int i;
1871 struct table_elt *p;
1872 rtx addr;
1874 switch (GET_CODE (x))
1876 case REG:
1878 /* If X is a register, dependencies on its contents are recorded
1879 through the qty number mechanism. Just change the qty number of
1880 the register, mark it as invalid for expressions that refer to it,
1881 and remove it itself. */
1882 unsigned int regno = REGNO (x);
1883 unsigned int hash = HASH (x, GET_MODE (x));
1885 /* Remove REGNO from any quantity list it might be on and indicate
1886 that its value might have changed. If it is a pseudo, remove its
1887 entry from the hash table.
1889 For a hard register, we do the first two actions above for any
1890 additional hard registers corresponding to X. Then, if any of these
1891 registers are in the table, we must remove any REG entries that
1892 overlap these registers. */
1894 delete_reg_equiv (regno);
1895 REG_TICK (regno)++;
1896 SUBREG_TICKED (regno) = -1;
1898 if (regno >= FIRST_PSEUDO_REGISTER)
1899 remove_pseudo_from_table (x, hash);
1900 else
1902 HOST_WIDE_INT in_table
1903 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1904 unsigned int endregno = END_HARD_REGNO (x);
1905 unsigned int tregno, tendregno, rn;
1906 struct table_elt *p, *next;
1908 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1910 for (rn = regno + 1; rn < endregno; rn++)
1912 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1913 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1914 delete_reg_equiv (rn);
1915 REG_TICK (rn)++;
1916 SUBREG_TICKED (rn) = -1;
1919 if (in_table)
1920 for (hash = 0; hash < HASH_SIZE; hash++)
1921 for (p = table[hash]; p; p = next)
1923 next = p->next_same_hash;
1925 if (!REG_P (p->exp)
1926 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1927 continue;
1929 tregno = REGNO (p->exp);
1930 tendregno = END_HARD_REGNO (p->exp);
1931 if (tendregno > regno && tregno < endregno)
1932 remove_from_table (p, hash);
1936 return;
1938 case SUBREG:
1939 invalidate (SUBREG_REG (x), VOIDmode);
1940 return;
1942 case PARALLEL:
1943 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1944 invalidate (XVECEXP (x, 0, i), VOIDmode);
1945 return;
1947 case EXPR_LIST:
1948 /* This is part of a disjoint return value; extract the location in
1949 question ignoring the offset. */
1950 invalidate (XEXP (x, 0), VOIDmode);
1951 return;
1953 case MEM:
1954 addr = canon_rtx (get_addr (XEXP (x, 0)));
1955 /* Calculate the canonical version of X here so that
1956 true_dependence doesn't generate new RTL for X on each call. */
1957 x = canon_rtx (x);
1959 /* Remove all hash table elements that refer to overlapping pieces of
1960 memory. */
1961 if (full_mode == VOIDmode)
1962 full_mode = GET_MODE (x);
1964 for (i = 0; i < HASH_SIZE; i++)
1966 struct table_elt *next;
1968 for (p = table[i]; p; p = next)
1970 next = p->next_same_hash;
1971 if (p->in_memory)
1973 struct check_dependence_data d;
1975 /* Just canonicalize the expression once;
1976 otherwise each time we call invalidate
1977 true_dependence will canonicalize the
1978 expression again. */
1979 if (!p->canon_exp)
1980 p->canon_exp = canon_rtx (p->exp);
1981 d.exp = x;
1982 d.addr = addr;
1983 d.mode = full_mode;
1984 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1985 remove_from_table (p, i);
1989 return;
1991 default:
1992 gcc_unreachable ();
1996 /* Remove all expressions that refer to register REGNO,
1997 since they are already invalid, and we are about to
1998 mark that register valid again and don't want the old
1999 expressions to reappear as valid. */
2001 static void
2002 remove_invalid_refs (unsigned int regno)
2004 unsigned int i;
2005 struct table_elt *p, *next;
2007 for (i = 0; i < HASH_SIZE; i++)
2008 for (p = table[i]; p; p = next)
2010 next = p->next_same_hash;
2011 if (!REG_P (p->exp)
2012 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2013 remove_from_table (p, i);
2017 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2018 and mode MODE. */
2019 static void
2020 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
2021 enum machine_mode mode)
2023 unsigned int i;
2024 struct table_elt *p, *next;
2025 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2027 for (i = 0; i < HASH_SIZE; i++)
2028 for (p = table[i]; p; p = next)
2030 rtx exp = p->exp;
2031 next = p->next_same_hash;
2033 if (!REG_P (exp)
2034 && (GET_CODE (exp) != SUBREG
2035 || !REG_P (SUBREG_REG (exp))
2036 || REGNO (SUBREG_REG (exp)) != regno
2037 || (((SUBREG_BYTE (exp)
2038 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2039 && SUBREG_BYTE (exp) <= end))
2040 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2041 remove_from_table (p, i);
2045 /* Recompute the hash codes of any valid entries in the hash table that
2046 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2048 This is called when we make a jump equivalence. */
2050 static void
2051 rehash_using_reg (rtx x)
2053 unsigned int i;
2054 struct table_elt *p, *next;
2055 unsigned hash;
2057 if (GET_CODE (x) == SUBREG)
2058 x = SUBREG_REG (x);
2060 /* If X is not a register or if the register is known not to be in any
2061 valid entries in the table, we have no work to do. */
2063 if (!REG_P (x)
2064 || REG_IN_TABLE (REGNO (x)) < 0
2065 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2066 return;
2068 /* Scan all hash chains looking for valid entries that mention X.
2069 If we find one and it is in the wrong hash chain, move it. */
2071 for (i = 0; i < HASH_SIZE; i++)
2072 for (p = table[i]; p; p = next)
2074 next = p->next_same_hash;
2075 if (reg_mentioned_p (x, p->exp)
2076 && exp_equiv_p (p->exp, p->exp, 1, false)
2077 && i != (hash = SAFE_HASH (p->exp, p->mode)))
2079 if (p->next_same_hash)
2080 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2082 if (p->prev_same_hash)
2083 p->prev_same_hash->next_same_hash = p->next_same_hash;
2084 else
2085 table[i] = p->next_same_hash;
2087 p->next_same_hash = table[hash];
2088 p->prev_same_hash = 0;
2089 if (table[hash])
2090 table[hash]->prev_same_hash = p;
2091 table[hash] = p;
2096 /* Remove from the hash table any expression that is a call-clobbered
2097 register. Also update their TICK values. */
2099 static void
2100 invalidate_for_call (void)
2102 unsigned int regno, endregno;
2103 unsigned int i;
2104 unsigned hash;
2105 struct table_elt *p, *next;
2106 int in_table = 0;
2108 /* Go through all the hard registers. For each that is clobbered in
2109 a CALL_INSN, remove the register from quantity chains and update
2110 reg_tick if defined. Also see if any of these registers is currently
2111 in the table. */
2113 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2114 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2116 delete_reg_equiv (regno);
2117 if (REG_TICK (regno) >= 0)
2119 REG_TICK (regno)++;
2120 SUBREG_TICKED (regno) = -1;
2123 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2126 /* In the case where we have no call-clobbered hard registers in the
2127 table, we are done. Otherwise, scan the table and remove any
2128 entry that overlaps a call-clobbered register. */
2130 if (in_table)
2131 for (hash = 0; hash < HASH_SIZE; hash++)
2132 for (p = table[hash]; p; p = next)
2134 next = p->next_same_hash;
2136 if (!REG_P (p->exp)
2137 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2138 continue;
2140 regno = REGNO (p->exp);
2141 endregno = END_HARD_REGNO (p->exp);
2143 for (i = regno; i < endregno; i++)
2144 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2146 remove_from_table (p, hash);
2147 break;
2152 /* Given an expression X of type CONST,
2153 and ELT which is its table entry (or 0 if it
2154 is not in the hash table),
2155 return an alternate expression for X as a register plus integer.
2156 If none can be found, return 0. */
2158 static rtx
2159 use_related_value (rtx x, struct table_elt *elt)
2161 struct table_elt *relt = 0;
2162 struct table_elt *p, *q;
2163 HOST_WIDE_INT offset;
2165 /* First, is there anything related known?
2166 If we have a table element, we can tell from that.
2167 Otherwise, must look it up. */
2169 if (elt != 0 && elt->related_value != 0)
2170 relt = elt;
2171 else if (elt == 0 && GET_CODE (x) == CONST)
2173 rtx subexp = get_related_value (x);
2174 if (subexp != 0)
2175 relt = lookup (subexp,
2176 SAFE_HASH (subexp, GET_MODE (subexp)),
2177 GET_MODE (subexp));
2180 if (relt == 0)
2181 return 0;
2183 /* Search all related table entries for one that has an
2184 equivalent register. */
2186 p = relt;
2187 while (1)
2189 /* This loop is strange in that it is executed in two different cases.
2190 The first is when X is already in the table. Then it is searching
2191 the RELATED_VALUE list of X's class (RELT). The second case is when
2192 X is not in the table. Then RELT points to a class for the related
2193 value.
2195 Ensure that, whatever case we are in, that we ignore classes that have
2196 the same value as X. */
2198 if (rtx_equal_p (x, p->exp))
2199 q = 0;
2200 else
2201 for (q = p->first_same_value; q; q = q->next_same_value)
2202 if (REG_P (q->exp))
2203 break;
2205 if (q)
2206 break;
2208 p = p->related_value;
2210 /* We went all the way around, so there is nothing to be found.
2211 Alternatively, perhaps RELT was in the table for some other reason
2212 and it has no related values recorded. */
2213 if (p == relt || p == 0)
2214 break;
2217 if (q == 0)
2218 return 0;
2220 offset = (get_integer_term (x) - get_integer_term (p->exp));
2221 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2222 return plus_constant (q->exp, offset);
2226 /* Hash a string. Just add its bytes up. */
2227 static inline unsigned
2228 hash_rtx_string (const char *ps)
2230 unsigned hash = 0;
2231 const unsigned char *p = (const unsigned char *) ps;
2233 if (p)
2234 while (*p)
2235 hash += *p++;
2237 return hash;
2240 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2241 When the callback returns true, we continue with the new rtx. */
2243 unsigned
2244 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2245 int *do_not_record_p, int *hash_arg_in_memory_p,
2246 bool have_reg_qty, hash_rtx_callback_function cb)
2248 int i, j;
2249 unsigned hash = 0;
2250 enum rtx_code code;
2251 const char *fmt;
2252 enum machine_mode newmode;
2253 rtx newx;
2255 /* Used to turn recursion into iteration. We can't rely on GCC's
2256 tail-recursion elimination since we need to keep accumulating values
2257 in HASH. */
2258 repeat:
2259 if (x == 0)
2260 return hash;
2262 /* Invoke the callback first. */
2263 if (cb != NULL
2264 && ((*cb) (x, mode, &newx, &newmode)))
2266 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2267 hash_arg_in_memory_p, have_reg_qty, cb);
2268 return hash;
2271 code = GET_CODE (x);
2272 switch (code)
2274 case REG:
2276 unsigned int regno = REGNO (x);
2278 if (do_not_record_p && !reload_completed)
2280 /* On some machines, we can't record any non-fixed hard register,
2281 because extending its life will cause reload problems. We
2282 consider ap, fp, sp, gp to be fixed for this purpose.
2284 We also consider CCmode registers to be fixed for this purpose;
2285 failure to do so leads to failure to simplify 0<100 type of
2286 conditionals.
2288 On all machines, we can't record any global registers.
2289 Nor should we record any register that is in a small
2290 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2291 bool record;
2293 if (regno >= FIRST_PSEUDO_REGISTER)
2294 record = true;
2295 else if (x == frame_pointer_rtx
2296 || x == hard_frame_pointer_rtx
2297 || x == arg_pointer_rtx
2298 || x == stack_pointer_rtx
2299 || x == pic_offset_table_rtx)
2300 record = true;
2301 else if (global_regs[regno])
2302 record = false;
2303 else if (fixed_regs[regno])
2304 record = true;
2305 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2306 record = true;
2307 else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2308 record = false;
2309 else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2310 record = false;
2311 else
2312 record = true;
2314 if (!record)
2316 *do_not_record_p = 1;
2317 return 0;
2321 hash += ((unsigned int) REG << 7);
2322 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2323 return hash;
2326 /* We handle SUBREG of a REG specially because the underlying
2327 reg changes its hash value with every value change; we don't
2328 want to have to forget unrelated subregs when one subreg changes. */
2329 case SUBREG:
2331 if (REG_P (SUBREG_REG (x)))
2333 hash += (((unsigned int) SUBREG << 7)
2334 + REGNO (SUBREG_REG (x))
2335 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2336 return hash;
2338 break;
2341 case CONST_INT:
2342 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2343 + (unsigned int) INTVAL (x));
2344 return hash;
2346 case CONST_DOUBLE:
2347 /* This is like the general case, except that it only counts
2348 the integers representing the constant. */
2349 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2350 if (GET_MODE (x) != VOIDmode)
2351 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2352 else
2353 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2354 + (unsigned int) CONST_DOUBLE_HIGH (x));
2355 return hash;
2357 case CONST_FIXED:
2358 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2359 hash += fixed_hash (CONST_FIXED_VALUE (x));
2360 return hash;
2362 case CONST_VECTOR:
2364 int units;
2365 rtx elt;
2367 units = CONST_VECTOR_NUNITS (x);
2369 for (i = 0; i < units; ++i)
2371 elt = CONST_VECTOR_ELT (x, i);
2372 hash += hash_rtx_cb (elt, GET_MODE (elt),
2373 do_not_record_p, hash_arg_in_memory_p,
2374 have_reg_qty, cb);
2377 return hash;
2380 /* Assume there is only one rtx object for any given label. */
2381 case LABEL_REF:
2382 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2383 differences and differences between each stage's debugging dumps. */
2384 hash += (((unsigned int) LABEL_REF << 7)
2385 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2386 return hash;
2388 case SYMBOL_REF:
2390 /* Don't hash on the symbol's address to avoid bootstrap differences.
2391 Different hash values may cause expressions to be recorded in
2392 different orders and thus different registers to be used in the
2393 final assembler. This also avoids differences in the dump files
2394 between various stages. */
2395 unsigned int h = 0;
2396 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2398 while (*p)
2399 h += (h << 7) + *p++; /* ??? revisit */
2401 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2402 return hash;
2405 case MEM:
2406 /* We don't record if marked volatile or if BLKmode since we don't
2407 know the size of the move. */
2408 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2410 *do_not_record_p = 1;
2411 return 0;
2413 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2414 *hash_arg_in_memory_p = 1;
2416 /* Now that we have already found this special case,
2417 might as well speed it up as much as possible. */
2418 hash += (unsigned) MEM;
2419 x = XEXP (x, 0);
2420 goto repeat;
2422 case USE:
2423 /* A USE that mentions non-volatile memory needs special
2424 handling since the MEM may be BLKmode which normally
2425 prevents an entry from being made. Pure calls are
2426 marked by a USE which mentions BLKmode memory.
2427 See calls.c:emit_call_1. */
2428 if (MEM_P (XEXP (x, 0))
2429 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2431 hash += (unsigned) USE;
2432 x = XEXP (x, 0);
2434 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2435 *hash_arg_in_memory_p = 1;
2437 /* Now that we have already found this special case,
2438 might as well speed it up as much as possible. */
2439 hash += (unsigned) MEM;
2440 x = XEXP (x, 0);
2441 goto repeat;
2443 break;
2445 case PRE_DEC:
2446 case PRE_INC:
2447 case POST_DEC:
2448 case POST_INC:
2449 case PRE_MODIFY:
2450 case POST_MODIFY:
2451 case PC:
2452 case CC0:
2453 case CALL:
2454 case UNSPEC_VOLATILE:
2455 if (do_not_record_p) {
2456 *do_not_record_p = 1;
2457 return 0;
2459 else
2460 return hash;
2461 break;
2463 case ASM_OPERANDS:
2464 if (do_not_record_p && MEM_VOLATILE_P (x))
2466 *do_not_record_p = 1;
2467 return 0;
2469 else
2471 /* We don't want to take the filename and line into account. */
2472 hash += (unsigned) code + (unsigned) GET_MODE (x)
2473 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2474 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2475 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2477 if (ASM_OPERANDS_INPUT_LENGTH (x))
2479 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2481 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2482 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2483 do_not_record_p, hash_arg_in_memory_p,
2484 have_reg_qty, cb)
2485 + hash_rtx_string
2486 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2489 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2490 x = ASM_OPERANDS_INPUT (x, 0);
2491 mode = GET_MODE (x);
2492 goto repeat;
2495 return hash;
2497 break;
2499 default:
2500 break;
2503 i = GET_RTX_LENGTH (code) - 1;
2504 hash += (unsigned) code + (unsigned) GET_MODE (x);
2505 fmt = GET_RTX_FORMAT (code);
2506 for (; i >= 0; i--)
2508 switch (fmt[i])
2510 case 'e':
2511 /* If we are about to do the last recursive call
2512 needed at this level, change it into iteration.
2513 This function is called enough to be worth it. */
2514 if (i == 0)
2516 x = XEXP (x, i);
2517 goto repeat;
2520 hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p,
2521 hash_arg_in_memory_p,
2522 have_reg_qty, cb);
2523 break;
2525 case 'E':
2526 for (j = 0; j < XVECLEN (x, i); j++)
2527 hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2528 hash_arg_in_memory_p,
2529 have_reg_qty, cb);
2530 break;
2532 case 's':
2533 hash += hash_rtx_string (XSTR (x, i));
2534 break;
2536 case 'i':
2537 hash += (unsigned int) XINT (x, i);
2538 break;
2540 case '0': case 't':
2541 /* Unused. */
2542 break;
2544 default:
2545 gcc_unreachable ();
2549 return hash;
2552 /* Hash an rtx. We are careful to make sure the value is never negative.
2553 Equivalent registers hash identically.
2554 MODE is used in hashing for CONST_INTs only;
2555 otherwise the mode of X is used.
2557 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2559 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2560 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2562 Note that cse_insn knows that the hash code of a MEM expression
2563 is just (int) MEM plus the hash code of the address. */
2565 unsigned
2566 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2567 int *hash_arg_in_memory_p, bool have_reg_qty)
2569 return hash_rtx_cb (x, mode, do_not_record_p,
2570 hash_arg_in_memory_p, have_reg_qty, NULL);
2573 /* Hash an rtx X for cse via hash_rtx.
2574 Stores 1 in do_not_record if any subexpression is volatile.
2575 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2576 does not have the RTX_UNCHANGING_P bit set. */
2578 static inline unsigned
2579 canon_hash (rtx x, enum machine_mode mode)
2581 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2584 /* Like canon_hash but with no side effects, i.e. do_not_record
2585 and hash_arg_in_memory are not changed. */
2587 static inline unsigned
2588 safe_hash (rtx x, enum machine_mode mode)
2590 int dummy_do_not_record;
2591 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2594 /* Return 1 iff X and Y would canonicalize into the same thing,
2595 without actually constructing the canonicalization of either one.
2596 If VALIDATE is nonzero,
2597 we assume X is an expression being processed from the rtl
2598 and Y was found in the hash table. We check register refs
2599 in Y for being marked as valid.
2601 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2604 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2606 int i, j;
2607 enum rtx_code code;
2608 const char *fmt;
2610 /* Note: it is incorrect to assume an expression is equivalent to itself
2611 if VALIDATE is nonzero. */
2612 if (x == y && !validate)
2613 return 1;
2615 if (x == 0 || y == 0)
2616 return x == y;
2618 code = GET_CODE (x);
2619 if (code != GET_CODE (y))
2620 return 0;
2622 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2623 if (GET_MODE (x) != GET_MODE (y))
2624 return 0;
2626 /* MEMs refering to different address space are not equivalent. */
2627 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2628 return 0;
2630 switch (code)
2632 case PC:
2633 case CC0:
2634 case CONST_INT:
2635 case CONST_DOUBLE:
2636 case CONST_FIXED:
2637 return x == y;
2639 case LABEL_REF:
2640 return XEXP (x, 0) == XEXP (y, 0);
2642 case SYMBOL_REF:
2643 return XSTR (x, 0) == XSTR (y, 0);
2645 case REG:
2646 if (for_gcse)
2647 return REGNO (x) == REGNO (y);
2648 else
2650 unsigned int regno = REGNO (y);
2651 unsigned int i;
2652 unsigned int endregno = END_REGNO (y);
2654 /* If the quantities are not the same, the expressions are not
2655 equivalent. If there are and we are not to validate, they
2656 are equivalent. Otherwise, ensure all regs are up-to-date. */
2658 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2659 return 0;
2661 if (! validate)
2662 return 1;
2664 for (i = regno; i < endregno; i++)
2665 if (REG_IN_TABLE (i) != REG_TICK (i))
2666 return 0;
2668 return 1;
2671 case MEM:
2672 if (for_gcse)
2674 /* A volatile mem should not be considered equivalent to any
2675 other. */
2676 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2677 return 0;
2679 /* Can't merge two expressions in different alias sets, since we
2680 can decide that the expression is transparent in a block when
2681 it isn't, due to it being set with the different alias set.
2683 Also, can't merge two expressions with different MEM_ATTRS.
2684 They could e.g. be two different entities allocated into the
2685 same space on the stack (see e.g. PR25130). In that case, the
2686 MEM addresses can be the same, even though the two MEMs are
2687 absolutely not equivalent.
2689 But because really all MEM attributes should be the same for
2690 equivalent MEMs, we just use the invariant that MEMs that have
2691 the same attributes share the same mem_attrs data structure. */
2692 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2693 return 0;
2695 break;
2697 /* For commutative operations, check both orders. */
2698 case PLUS:
2699 case MULT:
2700 case AND:
2701 case IOR:
2702 case XOR:
2703 case NE:
2704 case EQ:
2705 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2706 validate, for_gcse)
2707 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2708 validate, for_gcse))
2709 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2710 validate, for_gcse)
2711 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2712 validate, for_gcse)));
2714 case ASM_OPERANDS:
2715 /* We don't use the generic code below because we want to
2716 disregard filename and line numbers. */
2718 /* A volatile asm isn't equivalent to any other. */
2719 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2720 return 0;
2722 if (GET_MODE (x) != GET_MODE (y)
2723 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2724 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2725 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2726 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2727 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2728 return 0;
2730 if (ASM_OPERANDS_INPUT_LENGTH (x))
2732 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2733 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2734 ASM_OPERANDS_INPUT (y, i),
2735 validate, for_gcse)
2736 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2737 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2738 return 0;
2741 return 1;
2743 default:
2744 break;
2747 /* Compare the elements. If any pair of corresponding elements
2748 fail to match, return 0 for the whole thing. */
2750 fmt = GET_RTX_FORMAT (code);
2751 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2753 switch (fmt[i])
2755 case 'e':
2756 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2757 validate, for_gcse))
2758 return 0;
2759 break;
2761 case 'E':
2762 if (XVECLEN (x, i) != XVECLEN (y, i))
2763 return 0;
2764 for (j = 0; j < XVECLEN (x, i); j++)
2765 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2766 validate, for_gcse))
2767 return 0;
2768 break;
2770 case 's':
2771 if (strcmp (XSTR (x, i), XSTR (y, i)))
2772 return 0;
2773 break;
2775 case 'i':
2776 if (XINT (x, i) != XINT (y, i))
2777 return 0;
2778 break;
2780 case 'w':
2781 if (XWINT (x, i) != XWINT (y, i))
2782 return 0;
2783 break;
2785 case '0':
2786 case 't':
2787 break;
2789 default:
2790 gcc_unreachable ();
2794 return 1;
2797 /* Return 1 if X has a value that can vary even between two
2798 executions of the program. 0 means X can be compared reliably
2799 against certain constants or near-constants. */
2801 static bool
2802 cse_rtx_varies_p (const_rtx x, bool from_alias)
2804 /* We need not check for X and the equivalence class being of the same
2805 mode because if X is equivalent to a constant in some mode, it
2806 doesn't vary in any mode. */
2808 if (REG_P (x)
2809 && REGNO_QTY_VALID_P (REGNO (x)))
2811 int x_q = REG_QTY (REGNO (x));
2812 struct qty_table_elem *x_ent = &qty_table[x_q];
2814 if (GET_MODE (x) == x_ent->mode
2815 && x_ent->const_rtx != NULL_RTX)
2816 return 0;
2819 if (GET_CODE (x) == PLUS
2820 && CONST_INT_P (XEXP (x, 1))
2821 && REG_P (XEXP (x, 0))
2822 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2824 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2825 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2827 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2828 && x0_ent->const_rtx != NULL_RTX)
2829 return 0;
2832 /* This can happen as the result of virtual register instantiation, if
2833 the initial constant is too large to be a valid address. This gives
2834 us a three instruction sequence, load large offset into a register,
2835 load fp minus a constant into a register, then a MEM which is the
2836 sum of the two `constant' registers. */
2837 if (GET_CODE (x) == PLUS
2838 && REG_P (XEXP (x, 0))
2839 && REG_P (XEXP (x, 1))
2840 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2841 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2843 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2844 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2845 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2846 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2848 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2849 && x0_ent->const_rtx != NULL_RTX
2850 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2851 && x1_ent->const_rtx != NULL_RTX)
2852 return 0;
2855 return rtx_varies_p (x, from_alias);
2858 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2859 the result if necessary. INSN is as for canon_reg. */
2861 static void
2862 validate_canon_reg (rtx *xloc, rtx insn)
2864 if (*xloc)
2866 rtx new_rtx = canon_reg (*xloc, insn);
2868 /* If replacing pseudo with hard reg or vice versa, ensure the
2869 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2870 gcc_assert (insn && new_rtx);
2871 validate_change (insn, xloc, new_rtx, 1);
2875 /* Canonicalize an expression:
2876 replace each register reference inside it
2877 with the "oldest" equivalent register.
2879 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2880 after we make our substitution. The calls are made with IN_GROUP nonzero
2881 so apply_change_group must be called upon the outermost return from this
2882 function (unless INSN is zero). The result of apply_change_group can
2883 generally be discarded since the changes we are making are optional. */
2885 static rtx
2886 canon_reg (rtx x, rtx insn)
2888 int i;
2889 enum rtx_code code;
2890 const char *fmt;
2892 if (x == 0)
2893 return x;
2895 code = GET_CODE (x);
2896 switch (code)
2898 case PC:
2899 case CC0:
2900 case CONST:
2901 case CONST_INT:
2902 case CONST_DOUBLE:
2903 case CONST_FIXED:
2904 case CONST_VECTOR:
2905 case SYMBOL_REF:
2906 case LABEL_REF:
2907 case ADDR_VEC:
2908 case ADDR_DIFF_VEC:
2909 return x;
2911 case REG:
2913 int first;
2914 int q;
2915 struct qty_table_elem *ent;
2917 /* Never replace a hard reg, because hard regs can appear
2918 in more than one machine mode, and we must preserve the mode
2919 of each occurrence. Also, some hard regs appear in
2920 MEMs that are shared and mustn't be altered. Don't try to
2921 replace any reg that maps to a reg of class NO_REGS. */
2922 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2923 || ! REGNO_QTY_VALID_P (REGNO (x)))
2924 return x;
2926 q = REG_QTY (REGNO (x));
2927 ent = &qty_table[q];
2928 first = ent->first_reg;
2929 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2930 : REGNO_REG_CLASS (first) == NO_REGS ? x
2931 : gen_rtx_REG (ent->mode, first));
2934 default:
2935 break;
2938 fmt = GET_RTX_FORMAT (code);
2939 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2941 int j;
2943 if (fmt[i] == 'e')
2944 validate_canon_reg (&XEXP (x, i), insn);
2945 else if (fmt[i] == 'E')
2946 for (j = 0; j < XVECLEN (x, i); j++)
2947 validate_canon_reg (&XVECEXP (x, i, j), insn);
2950 return x;
2953 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2954 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2955 what values are being compared.
2957 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2958 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2959 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2960 compared to produce cc0.
2962 The return value is the comparison operator and is either the code of
2963 A or the code corresponding to the inverse of the comparison. */
2965 static enum rtx_code
2966 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2967 enum machine_mode *pmode1, enum machine_mode *pmode2)
2969 rtx arg1, arg2;
2971 arg1 = *parg1, arg2 = *parg2;
2973 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2975 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2977 /* Set nonzero when we find something of interest. */
2978 rtx x = 0;
2979 int reverse_code = 0;
2980 struct table_elt *p = 0;
2982 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2983 On machines with CC0, this is the only case that can occur, since
2984 fold_rtx will return the COMPARE or item being compared with zero
2985 when given CC0. */
2987 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2988 x = arg1;
2990 /* If ARG1 is a comparison operator and CODE is testing for
2991 STORE_FLAG_VALUE, get the inner arguments. */
2993 else if (COMPARISON_P (arg1))
2995 #ifdef FLOAT_STORE_FLAG_VALUE
2996 REAL_VALUE_TYPE fsfv;
2997 #endif
2999 if (code == NE
3000 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3001 && code == LT && STORE_FLAG_VALUE == -1)
3002 #ifdef FLOAT_STORE_FLAG_VALUE
3003 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3004 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3005 REAL_VALUE_NEGATIVE (fsfv)))
3006 #endif
3008 x = arg1;
3009 else if (code == EQ
3010 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3011 && code == GE && STORE_FLAG_VALUE == -1)
3012 #ifdef FLOAT_STORE_FLAG_VALUE
3013 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3014 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3015 REAL_VALUE_NEGATIVE (fsfv)))
3016 #endif
3018 x = arg1, reverse_code = 1;
3021 /* ??? We could also check for
3023 (ne (and (eq (...) (const_int 1))) (const_int 0))
3025 and related forms, but let's wait until we see them occurring. */
3027 if (x == 0)
3028 /* Look up ARG1 in the hash table and see if it has an equivalence
3029 that lets us see what is being compared. */
3030 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3031 if (p)
3033 p = p->first_same_value;
3035 /* If what we compare is already known to be constant, that is as
3036 good as it gets.
3037 We need to break the loop in this case, because otherwise we
3038 can have an infinite loop when looking at a reg that is known
3039 to be a constant which is the same as a comparison of a reg
3040 against zero which appears later in the insn stream, which in
3041 turn is constant and the same as the comparison of the first reg
3042 against zero... */
3043 if (p->is_const)
3044 break;
3047 for (; p; p = p->next_same_value)
3049 enum machine_mode inner_mode = GET_MODE (p->exp);
3050 #ifdef FLOAT_STORE_FLAG_VALUE
3051 REAL_VALUE_TYPE fsfv;
3052 #endif
3054 /* If the entry isn't valid, skip it. */
3055 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3056 continue;
3058 /* If it's the same comparison we're already looking at, skip it. */
3059 if (COMPARISON_P (p->exp)
3060 && XEXP (p->exp, 0) == arg1
3061 && XEXP (p->exp, 1) == arg2)
3062 continue;
3064 if (GET_CODE (p->exp) == COMPARE
3065 /* Another possibility is that this machine has a compare insn
3066 that includes the comparison code. In that case, ARG1 would
3067 be equivalent to a comparison operation that would set ARG1 to
3068 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3069 ORIG_CODE is the actual comparison being done; if it is an EQ,
3070 we must reverse ORIG_CODE. On machine with a negative value
3071 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3072 || ((code == NE
3073 || (code == LT
3074 && val_signbit_known_set_p (inner_mode,
3075 STORE_FLAG_VALUE))
3076 #ifdef FLOAT_STORE_FLAG_VALUE
3077 || (code == LT
3078 && SCALAR_FLOAT_MODE_P (inner_mode)
3079 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3080 REAL_VALUE_NEGATIVE (fsfv)))
3081 #endif
3083 && COMPARISON_P (p->exp)))
3085 x = p->exp;
3086 break;
3088 else if ((code == EQ
3089 || (code == GE
3090 && val_signbit_known_set_p (inner_mode,
3091 STORE_FLAG_VALUE))
3092 #ifdef FLOAT_STORE_FLAG_VALUE
3093 || (code == GE
3094 && SCALAR_FLOAT_MODE_P (inner_mode)
3095 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3096 REAL_VALUE_NEGATIVE (fsfv)))
3097 #endif
3099 && COMPARISON_P (p->exp))
3101 reverse_code = 1;
3102 x = p->exp;
3103 break;
3106 /* If this non-trapping address, e.g. fp + constant, the
3107 equivalent is a better operand since it may let us predict
3108 the value of the comparison. */
3109 else if (!rtx_addr_can_trap_p (p->exp))
3111 arg1 = p->exp;
3112 continue;
3116 /* If we didn't find a useful equivalence for ARG1, we are done.
3117 Otherwise, set up for the next iteration. */
3118 if (x == 0)
3119 break;
3121 /* If we need to reverse the comparison, make sure that that is
3122 possible -- we can't necessarily infer the value of GE from LT
3123 with floating-point operands. */
3124 if (reverse_code)
3126 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3127 if (reversed == UNKNOWN)
3128 break;
3129 else
3130 code = reversed;
3132 else if (COMPARISON_P (x))
3133 code = GET_CODE (x);
3134 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3137 /* Return our results. Return the modes from before fold_rtx
3138 because fold_rtx might produce const_int, and then it's too late. */
3139 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3140 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3142 return code;
3145 /* If X is a nontrivial arithmetic operation on an argument for which
3146 a constant value can be determined, return the result of operating
3147 on that value, as a constant. Otherwise, return X, possibly with
3148 one or more operands changed to a forward-propagated constant.
3150 If X is a register whose contents are known, we do NOT return
3151 those contents here; equiv_constant is called to perform that task.
3152 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3154 INSN is the insn that we may be modifying. If it is 0, make a copy
3155 of X before modifying it. */
3157 static rtx
3158 fold_rtx (rtx x, rtx insn)
3160 enum rtx_code code;
3161 enum machine_mode mode;
3162 const char *fmt;
3163 int i;
3164 rtx new_rtx = 0;
3165 int changed = 0;
3167 /* Operands of X. */
3168 rtx folded_arg0;
3169 rtx folded_arg1;
3171 /* Constant equivalents of first three operands of X;
3172 0 when no such equivalent is known. */
3173 rtx const_arg0;
3174 rtx const_arg1;
3175 rtx const_arg2;
3177 /* The mode of the first operand of X. We need this for sign and zero
3178 extends. */
3179 enum machine_mode mode_arg0;
3181 if (x == 0)
3182 return x;
3184 /* Try to perform some initial simplifications on X. */
3185 code = GET_CODE (x);
3186 switch (code)
3188 case MEM:
3189 case SUBREG:
3190 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3191 return new_rtx;
3192 return x;
3194 case CONST:
3195 case CONST_INT:
3196 case CONST_DOUBLE:
3197 case CONST_FIXED:
3198 case CONST_VECTOR:
3199 case SYMBOL_REF:
3200 case LABEL_REF:
3201 case REG:
3202 case PC:
3203 /* No use simplifying an EXPR_LIST
3204 since they are used only for lists of args
3205 in a function call's REG_EQUAL note. */
3206 case EXPR_LIST:
3207 return x;
3209 #ifdef HAVE_cc0
3210 case CC0:
3211 return prev_insn_cc0;
3212 #endif
3214 case ASM_OPERANDS:
3215 if (insn)
3217 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3218 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3219 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3221 return x;
3223 #ifdef NO_FUNCTION_CSE
3224 case CALL:
3225 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3226 return x;
3227 break;
3228 #endif
3230 /* Anything else goes through the loop below. */
3231 default:
3232 break;
3235 mode = GET_MODE (x);
3236 const_arg0 = 0;
3237 const_arg1 = 0;
3238 const_arg2 = 0;
3239 mode_arg0 = VOIDmode;
3241 /* Try folding our operands.
3242 Then see which ones have constant values known. */
3244 fmt = GET_RTX_FORMAT (code);
3245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3246 if (fmt[i] == 'e')
3248 rtx folded_arg = XEXP (x, i), const_arg;
3249 enum machine_mode mode_arg = GET_MODE (folded_arg);
3251 switch (GET_CODE (folded_arg))
3253 case MEM:
3254 case REG:
3255 case SUBREG:
3256 const_arg = equiv_constant (folded_arg);
3257 break;
3259 case CONST:
3260 case CONST_INT:
3261 case SYMBOL_REF:
3262 case LABEL_REF:
3263 case CONST_DOUBLE:
3264 case CONST_FIXED:
3265 case CONST_VECTOR:
3266 const_arg = folded_arg;
3267 break;
3269 #ifdef HAVE_cc0
3270 case CC0:
3271 folded_arg = prev_insn_cc0;
3272 mode_arg = prev_insn_cc0_mode;
3273 const_arg = equiv_constant (folded_arg);
3274 break;
3275 #endif
3277 default:
3278 folded_arg = fold_rtx (folded_arg, insn);
3279 const_arg = equiv_constant (folded_arg);
3280 break;
3283 /* For the first three operands, see if the operand
3284 is constant or equivalent to a constant. */
3285 switch (i)
3287 case 0:
3288 folded_arg0 = folded_arg;
3289 const_arg0 = const_arg;
3290 mode_arg0 = mode_arg;
3291 break;
3292 case 1:
3293 folded_arg1 = folded_arg;
3294 const_arg1 = const_arg;
3295 break;
3296 case 2:
3297 const_arg2 = const_arg;
3298 break;
3301 /* Pick the least expensive of the argument and an equivalent constant
3302 argument. */
3303 if (const_arg != 0
3304 && const_arg != folded_arg
3305 && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i)
3307 /* It's not safe to substitute the operand of a conversion
3308 operator with a constant, as the conversion's identity
3309 depends upon the mode of its operand. This optimization
3310 is handled by the call to simplify_unary_operation. */
3311 && (GET_RTX_CLASS (code) != RTX_UNARY
3312 || GET_MODE (const_arg) == mode_arg0
3313 || (code != ZERO_EXTEND
3314 && code != SIGN_EXTEND
3315 && code != TRUNCATE
3316 && code != FLOAT_TRUNCATE
3317 && code != FLOAT_EXTEND
3318 && code != FLOAT
3319 && code != FIX
3320 && code != UNSIGNED_FLOAT
3321 && code != UNSIGNED_FIX)))
3322 folded_arg = const_arg;
3324 if (folded_arg == XEXP (x, i))
3325 continue;
3327 if (insn == NULL_RTX && !changed)
3328 x = copy_rtx (x);
3329 changed = 1;
3330 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3333 if (changed)
3335 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3336 consistent with the order in X. */
3337 if (canonicalize_change_group (insn, x))
3339 rtx tem;
3340 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3341 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3344 apply_change_group ();
3347 /* If X is an arithmetic operation, see if we can simplify it. */
3349 switch (GET_RTX_CLASS (code))
3351 case RTX_UNARY:
3353 /* We can't simplify extension ops unless we know the
3354 original mode. */
3355 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3356 && mode_arg0 == VOIDmode)
3357 break;
3359 new_rtx = simplify_unary_operation (code, mode,
3360 const_arg0 ? const_arg0 : folded_arg0,
3361 mode_arg0);
3363 break;
3365 case RTX_COMPARE:
3366 case RTX_COMM_COMPARE:
3367 /* See what items are actually being compared and set FOLDED_ARG[01]
3368 to those values and CODE to the actual comparison code. If any are
3369 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3370 do anything if both operands are already known to be constant. */
3372 /* ??? Vector mode comparisons are not supported yet. */
3373 if (VECTOR_MODE_P (mode))
3374 break;
3376 if (const_arg0 == 0 || const_arg1 == 0)
3378 struct table_elt *p0, *p1;
3379 rtx true_rtx, false_rtx;
3380 enum machine_mode mode_arg1;
3382 if (SCALAR_FLOAT_MODE_P (mode))
3384 #ifdef FLOAT_STORE_FLAG_VALUE
3385 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3386 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3387 #else
3388 true_rtx = NULL_RTX;
3389 #endif
3390 false_rtx = CONST0_RTX (mode);
3392 else
3394 true_rtx = const_true_rtx;
3395 false_rtx = const0_rtx;
3398 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3399 &mode_arg0, &mode_arg1);
3401 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3402 what kinds of things are being compared, so we can't do
3403 anything with this comparison. */
3405 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3406 break;
3408 const_arg0 = equiv_constant (folded_arg0);
3409 const_arg1 = equiv_constant (folded_arg1);
3411 /* If we do not now have two constants being compared, see
3412 if we can nevertheless deduce some things about the
3413 comparison. */
3414 if (const_arg0 == 0 || const_arg1 == 0)
3416 if (const_arg1 != NULL)
3418 rtx cheapest_simplification;
3419 int cheapest_cost;
3420 rtx simp_result;
3421 struct table_elt *p;
3423 /* See if we can find an equivalent of folded_arg0
3424 that gets us a cheaper expression, possibly a
3425 constant through simplifications. */
3426 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3427 mode_arg0);
3429 if (p != NULL)
3431 cheapest_simplification = x;
3432 cheapest_cost = COST (x);
3434 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3436 int cost;
3438 /* If the entry isn't valid, skip it. */
3439 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3440 continue;
3442 /* Try to simplify using this equivalence. */
3443 simp_result
3444 = simplify_relational_operation (code, mode,
3445 mode_arg0,
3446 p->exp,
3447 const_arg1);
3449 if (simp_result == NULL)
3450 continue;
3452 cost = COST (simp_result);
3453 if (cost < cheapest_cost)
3455 cheapest_cost = cost;
3456 cheapest_simplification = simp_result;
3460 /* If we have a cheaper expression now, use that
3461 and try folding it further, from the top. */
3462 if (cheapest_simplification != x)
3463 return fold_rtx (copy_rtx (cheapest_simplification),
3464 insn);
3468 /* See if the two operands are the same. */
3470 if ((REG_P (folded_arg0)
3471 && REG_P (folded_arg1)
3472 && (REG_QTY (REGNO (folded_arg0))
3473 == REG_QTY (REGNO (folded_arg1))))
3474 || ((p0 = lookup (folded_arg0,
3475 SAFE_HASH (folded_arg0, mode_arg0),
3476 mode_arg0))
3477 && (p1 = lookup (folded_arg1,
3478 SAFE_HASH (folded_arg1, mode_arg0),
3479 mode_arg0))
3480 && p0->first_same_value == p1->first_same_value))
3481 folded_arg1 = folded_arg0;
3483 /* If FOLDED_ARG0 is a register, see if the comparison we are
3484 doing now is either the same as we did before or the reverse
3485 (we only check the reverse if not floating-point). */
3486 else if (REG_P (folded_arg0))
3488 int qty = REG_QTY (REGNO (folded_arg0));
3490 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3492 struct qty_table_elem *ent = &qty_table[qty];
3494 if ((comparison_dominates_p (ent->comparison_code, code)
3495 || (! FLOAT_MODE_P (mode_arg0)
3496 && comparison_dominates_p (ent->comparison_code,
3497 reverse_condition (code))))
3498 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3499 || (const_arg1
3500 && rtx_equal_p (ent->comparison_const,
3501 const_arg1))
3502 || (REG_P (folded_arg1)
3503 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3505 if (comparison_dominates_p (ent->comparison_code, code))
3507 if (true_rtx)
3508 return true_rtx;
3509 else
3510 break;
3512 else
3513 return false_rtx;
3520 /* If we are comparing against zero, see if the first operand is
3521 equivalent to an IOR with a constant. If so, we may be able to
3522 determine the result of this comparison. */
3523 if (const_arg1 == const0_rtx && !const_arg0)
3525 rtx y = lookup_as_function (folded_arg0, IOR);
3526 rtx inner_const;
3528 if (y != 0
3529 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3530 && CONST_INT_P (inner_const)
3531 && INTVAL (inner_const) != 0)
3532 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3536 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3537 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3538 new_rtx = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3540 break;
3542 case RTX_BIN_ARITH:
3543 case RTX_COMM_ARITH:
3544 switch (code)
3546 case PLUS:
3547 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3548 with that LABEL_REF as its second operand. If so, the result is
3549 the first operand of that MINUS. This handles switches with an
3550 ADDR_DIFF_VEC table. */
3551 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3553 rtx y
3554 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3555 : lookup_as_function (folded_arg0, MINUS);
3557 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3558 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3559 return XEXP (y, 0);
3561 /* Now try for a CONST of a MINUS like the above. */
3562 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3563 : lookup_as_function (folded_arg0, CONST))) != 0
3564 && GET_CODE (XEXP (y, 0)) == MINUS
3565 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3566 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3567 return XEXP (XEXP (y, 0), 0);
3570 /* Likewise if the operands are in the other order. */
3571 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3573 rtx y
3574 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3575 : lookup_as_function (folded_arg1, MINUS);
3577 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3578 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3579 return XEXP (y, 0);
3581 /* Now try for a CONST of a MINUS like the above. */
3582 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3583 : lookup_as_function (folded_arg1, CONST))) != 0
3584 && GET_CODE (XEXP (y, 0)) == MINUS
3585 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3586 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3587 return XEXP (XEXP (y, 0), 0);
3590 /* If second operand is a register equivalent to a negative
3591 CONST_INT, see if we can find a register equivalent to the
3592 positive constant. Make a MINUS if so. Don't do this for
3593 a non-negative constant since we might then alternate between
3594 choosing positive and negative constants. Having the positive
3595 constant previously-used is the more common case. Be sure
3596 the resulting constant is non-negative; if const_arg1 were
3597 the smallest negative number this would overflow: depending
3598 on the mode, this would either just be the same value (and
3599 hence not save anything) or be incorrect. */
3600 if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3601 && INTVAL (const_arg1) < 0
3602 /* This used to test
3604 -INTVAL (const_arg1) >= 0
3606 But The Sun V5.0 compilers mis-compiled that test. So
3607 instead we test for the problematic value in a more direct
3608 manner and hope the Sun compilers get it correct. */
3609 && INTVAL (const_arg1) !=
3610 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3611 && REG_P (folded_arg1))
3613 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3614 struct table_elt *p
3615 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3617 if (p)
3618 for (p = p->first_same_value; p; p = p->next_same_value)
3619 if (REG_P (p->exp))
3620 return simplify_gen_binary (MINUS, mode, folded_arg0,
3621 canon_reg (p->exp, NULL_RTX));
3623 goto from_plus;
3625 case MINUS:
3626 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3627 If so, produce (PLUS Z C2-C). */
3628 if (const_arg1 != 0 && CONST_INT_P (const_arg1))
3630 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3631 if (y && CONST_INT_P (XEXP (y, 1)))
3632 return fold_rtx (plus_constant (copy_rtx (y),
3633 -INTVAL (const_arg1)),
3634 NULL_RTX);
3637 /* Fall through. */
3639 from_plus:
3640 case SMIN: case SMAX: case UMIN: case UMAX:
3641 case IOR: case AND: case XOR:
3642 case MULT:
3643 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3644 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3645 is known to be of similar form, we may be able to replace the
3646 operation with a combined operation. This may eliminate the
3647 intermediate operation if every use is simplified in this way.
3648 Note that the similar optimization done by combine.c only works
3649 if the intermediate operation's result has only one reference. */
3651 if (REG_P (folded_arg0)
3652 && const_arg1 && CONST_INT_P (const_arg1))
3654 int is_shift
3655 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3656 rtx y, inner_const, new_const;
3657 rtx canon_const_arg1 = const_arg1;
3658 enum rtx_code associate_code;
3660 if (is_shift
3661 && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode)
3662 || INTVAL (const_arg1) < 0))
3664 if (SHIFT_COUNT_TRUNCATED)
3665 canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
3666 & (GET_MODE_BITSIZE (mode)
3667 - 1));
3668 else
3669 break;
3672 y = lookup_as_function (folded_arg0, code);
3673 if (y == 0)
3674 break;
3676 /* If we have compiled a statement like
3677 "if (x == (x & mask1))", and now are looking at
3678 "x & mask2", we will have a case where the first operand
3679 of Y is the same as our first operand. Unless we detect
3680 this case, an infinite loop will result. */
3681 if (XEXP (y, 0) == folded_arg0)
3682 break;
3684 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3685 if (!inner_const || !CONST_INT_P (inner_const))
3686 break;
3688 /* Don't associate these operations if they are a PLUS with the
3689 same constant and it is a power of two. These might be doable
3690 with a pre- or post-increment. Similarly for two subtracts of
3691 identical powers of two with post decrement. */
3693 if (code == PLUS && const_arg1 == inner_const
3694 && ((HAVE_PRE_INCREMENT
3695 && exact_log2 (INTVAL (const_arg1)) >= 0)
3696 || (HAVE_POST_INCREMENT
3697 && exact_log2 (INTVAL (const_arg1)) >= 0)
3698 || (HAVE_PRE_DECREMENT
3699 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3700 || (HAVE_POST_DECREMENT
3701 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3702 break;
3704 /* ??? Vector mode shifts by scalar
3705 shift operand are not supported yet. */
3706 if (is_shift && VECTOR_MODE_P (mode))
3707 break;
3709 if (is_shift
3710 && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode)
3711 || INTVAL (inner_const) < 0))
3713 if (SHIFT_COUNT_TRUNCATED)
3714 inner_const = GEN_INT (INTVAL (inner_const)
3715 & (GET_MODE_BITSIZE (mode) - 1));
3716 else
3717 break;
3720 /* Compute the code used to compose the constants. For example,
3721 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3723 associate_code = (is_shift || code == MINUS ? PLUS : code);
3725 new_const = simplify_binary_operation (associate_code, mode,
3726 canon_const_arg1,
3727 inner_const);
3729 if (new_const == 0)
3730 break;
3732 /* If we are associating shift operations, don't let this
3733 produce a shift of the size of the object or larger.
3734 This could occur when we follow a sign-extend by a right
3735 shift on a machine that does a sign-extend as a pair
3736 of shifts. */
3738 if (is_shift
3739 && CONST_INT_P (new_const)
3740 && INTVAL (new_const) >= GET_MODE_PRECISION (mode))
3742 /* As an exception, we can turn an ASHIFTRT of this
3743 form into a shift of the number of bits - 1. */
3744 if (code == ASHIFTRT)
3745 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3746 else if (!side_effects_p (XEXP (y, 0)))
3747 return CONST0_RTX (mode);
3748 else
3749 break;
3752 y = copy_rtx (XEXP (y, 0));
3754 /* If Y contains our first operand (the most common way this
3755 can happen is if Y is a MEM), we would do into an infinite
3756 loop if we tried to fold it. So don't in that case. */
3758 if (! reg_mentioned_p (folded_arg0, y))
3759 y = fold_rtx (y, insn);
3761 return simplify_gen_binary (code, mode, y, new_const);
3763 break;
3765 case DIV: case UDIV:
3766 /* ??? The associative optimization performed immediately above is
3767 also possible for DIV and UDIV using associate_code of MULT.
3768 However, we would need extra code to verify that the
3769 multiplication does not overflow, that is, there is no overflow
3770 in the calculation of new_const. */
3771 break;
3773 default:
3774 break;
3777 new_rtx = simplify_binary_operation (code, mode,
3778 const_arg0 ? const_arg0 : folded_arg0,
3779 const_arg1 ? const_arg1 : folded_arg1);
3780 break;
3782 case RTX_OBJ:
3783 /* (lo_sum (high X) X) is simply X. */
3784 if (code == LO_SUM && const_arg0 != 0
3785 && GET_CODE (const_arg0) == HIGH
3786 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3787 return const_arg1;
3788 break;
3790 case RTX_TERNARY:
3791 case RTX_BITFIELD_OPS:
3792 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3793 const_arg0 ? const_arg0 : folded_arg0,
3794 const_arg1 ? const_arg1 : folded_arg1,
3795 const_arg2 ? const_arg2 : XEXP (x, 2));
3796 break;
3798 default:
3799 break;
3802 return new_rtx ? new_rtx : x;
3805 /* Return a constant value currently equivalent to X.
3806 Return 0 if we don't know one. */
3808 static rtx
3809 equiv_constant (rtx x)
3811 if (REG_P (x)
3812 && REGNO_QTY_VALID_P (REGNO (x)))
3814 int x_q = REG_QTY (REGNO (x));
3815 struct qty_table_elem *x_ent = &qty_table[x_q];
3817 if (x_ent->const_rtx)
3818 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3821 if (x == 0 || CONSTANT_P (x))
3822 return x;
3824 if (GET_CODE (x) == SUBREG)
3826 enum machine_mode mode = GET_MODE (x);
3827 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3828 rtx new_rtx;
3830 /* See if we previously assigned a constant value to this SUBREG. */
3831 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3832 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3833 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3834 return new_rtx;
3836 /* If we didn't and if doing so makes sense, see if we previously
3837 assigned a constant value to the enclosing word mode SUBREG. */
3838 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3839 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3841 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3842 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3844 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3845 new_rtx = lookup_as_function (y, CONST_INT);
3846 if (new_rtx)
3847 return gen_lowpart (mode, new_rtx);
3851 /* Otherwise see if we already have a constant for the inner REG. */
3852 if (REG_P (SUBREG_REG (x))
3853 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3854 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3856 return 0;
3859 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3860 the hash table in case its value was seen before. */
3862 if (MEM_P (x))
3864 struct table_elt *elt;
3866 x = avoid_constant_pool_reference (x);
3867 if (CONSTANT_P (x))
3868 return x;
3870 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3871 if (elt == 0)
3872 return 0;
3874 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3875 if (elt->is_const && CONSTANT_P (elt->exp))
3876 return elt->exp;
3879 return 0;
3882 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3883 "taken" branch.
3885 In certain cases, this can cause us to add an equivalence. For example,
3886 if we are following the taken case of
3887 if (i == 2)
3888 we can add the fact that `i' and '2' are now equivalent.
3890 In any case, we can record that this comparison was passed. If the same
3891 comparison is seen later, we will know its value. */
3893 static void
3894 record_jump_equiv (rtx insn, bool taken)
3896 int cond_known_true;
3897 rtx op0, op1;
3898 rtx set;
3899 enum machine_mode mode, mode0, mode1;
3900 int reversed_nonequality = 0;
3901 enum rtx_code code;
3903 /* Ensure this is the right kind of insn. */
3904 gcc_assert (any_condjump_p (insn));
3906 set = pc_set (insn);
3908 /* See if this jump condition is known true or false. */
3909 if (taken)
3910 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3911 else
3912 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3914 /* Get the type of comparison being done and the operands being compared.
3915 If we had to reverse a non-equality condition, record that fact so we
3916 know that it isn't valid for floating-point. */
3917 code = GET_CODE (XEXP (SET_SRC (set), 0));
3918 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3919 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3921 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3922 if (! cond_known_true)
3924 code = reversed_comparison_code_parts (code, op0, op1, insn);
3926 /* Don't remember if we can't find the inverse. */
3927 if (code == UNKNOWN)
3928 return;
3931 /* The mode is the mode of the non-constant. */
3932 mode = mode0;
3933 if (mode1 != VOIDmode)
3934 mode = mode1;
3936 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3939 /* Yet another form of subreg creation. In this case, we want something in
3940 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3942 static rtx
3943 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3945 enum machine_mode op_mode = GET_MODE (op);
3946 if (op_mode == mode || op_mode == VOIDmode)
3947 return op;
3948 return lowpart_subreg (mode, op, op_mode);
3951 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3952 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3953 Make any useful entries we can with that information. Called from
3954 above function and called recursively. */
3956 static void
3957 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3958 rtx op1, int reversed_nonequality)
3960 unsigned op0_hash, op1_hash;
3961 int op0_in_memory, op1_in_memory;
3962 struct table_elt *op0_elt, *op1_elt;
3964 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3965 we know that they are also equal in the smaller mode (this is also
3966 true for all smaller modes whether or not there is a SUBREG, but
3967 is not worth testing for with no SUBREG). */
3969 /* Note that GET_MODE (op0) may not equal MODE. */
3970 if (code == EQ && paradoxical_subreg_p (op0))
3972 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3973 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3974 if (tem)
3975 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3976 reversed_nonequality);
3979 if (code == EQ && paradoxical_subreg_p (op1))
3981 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3982 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3983 if (tem)
3984 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3985 reversed_nonequality);
3988 /* Similarly, if this is an NE comparison, and either is a SUBREG
3989 making a smaller mode, we know the whole thing is also NE. */
3991 /* Note that GET_MODE (op0) may not equal MODE;
3992 if we test MODE instead, we can get an infinite recursion
3993 alternating between two modes each wider than MODE. */
3995 if (code == NE && GET_CODE (op0) == SUBREG
3996 && subreg_lowpart_p (op0)
3997 && (GET_MODE_SIZE (GET_MODE (op0))
3998 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4000 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4001 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4002 if (tem)
4003 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4004 reversed_nonequality);
4007 if (code == NE && GET_CODE (op1) == SUBREG
4008 && subreg_lowpart_p (op1)
4009 && (GET_MODE_SIZE (GET_MODE (op1))
4010 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4012 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4013 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4014 if (tem)
4015 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4016 reversed_nonequality);
4019 /* Hash both operands. */
4021 do_not_record = 0;
4022 hash_arg_in_memory = 0;
4023 op0_hash = HASH (op0, mode);
4024 op0_in_memory = hash_arg_in_memory;
4026 if (do_not_record)
4027 return;
4029 do_not_record = 0;
4030 hash_arg_in_memory = 0;
4031 op1_hash = HASH (op1, mode);
4032 op1_in_memory = hash_arg_in_memory;
4034 if (do_not_record)
4035 return;
4037 /* Look up both operands. */
4038 op0_elt = lookup (op0, op0_hash, mode);
4039 op1_elt = lookup (op1, op1_hash, mode);
4041 /* If both operands are already equivalent or if they are not in the
4042 table but are identical, do nothing. */
4043 if ((op0_elt != 0 && op1_elt != 0
4044 && op0_elt->first_same_value == op1_elt->first_same_value)
4045 || op0 == op1 || rtx_equal_p (op0, op1))
4046 return;
4048 /* If we aren't setting two things equal all we can do is save this
4049 comparison. Similarly if this is floating-point. In the latter
4050 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4051 If we record the equality, we might inadvertently delete code
4052 whose intent was to change -0 to +0. */
4054 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4056 struct qty_table_elem *ent;
4057 int qty;
4059 /* If we reversed a floating-point comparison, if OP0 is not a
4060 register, or if OP1 is neither a register or constant, we can't
4061 do anything. */
4063 if (!REG_P (op1))
4064 op1 = equiv_constant (op1);
4066 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4067 || !REG_P (op0) || op1 == 0)
4068 return;
4070 /* Put OP0 in the hash table if it isn't already. This gives it a
4071 new quantity number. */
4072 if (op0_elt == 0)
4074 if (insert_regs (op0, NULL, 0))
4076 rehash_using_reg (op0);
4077 op0_hash = HASH (op0, mode);
4079 /* If OP0 is contained in OP1, this changes its hash code
4080 as well. Faster to rehash than to check, except
4081 for the simple case of a constant. */
4082 if (! CONSTANT_P (op1))
4083 op1_hash = HASH (op1,mode);
4086 op0_elt = insert (op0, NULL, op0_hash, mode);
4087 op0_elt->in_memory = op0_in_memory;
4090 qty = REG_QTY (REGNO (op0));
4091 ent = &qty_table[qty];
4093 ent->comparison_code = code;
4094 if (REG_P (op1))
4096 /* Look it up again--in case op0 and op1 are the same. */
4097 op1_elt = lookup (op1, op1_hash, mode);
4099 /* Put OP1 in the hash table so it gets a new quantity number. */
4100 if (op1_elt == 0)
4102 if (insert_regs (op1, NULL, 0))
4104 rehash_using_reg (op1);
4105 op1_hash = HASH (op1, mode);
4108 op1_elt = insert (op1, NULL, op1_hash, mode);
4109 op1_elt->in_memory = op1_in_memory;
4112 ent->comparison_const = NULL_RTX;
4113 ent->comparison_qty = REG_QTY (REGNO (op1));
4115 else
4117 ent->comparison_const = op1;
4118 ent->comparison_qty = -1;
4121 return;
4124 /* If either side is still missing an equivalence, make it now,
4125 then merge the equivalences. */
4127 if (op0_elt == 0)
4129 if (insert_regs (op0, NULL, 0))
4131 rehash_using_reg (op0);
4132 op0_hash = HASH (op0, mode);
4135 op0_elt = insert (op0, NULL, op0_hash, mode);
4136 op0_elt->in_memory = op0_in_memory;
4139 if (op1_elt == 0)
4141 if (insert_regs (op1, NULL, 0))
4143 rehash_using_reg (op1);
4144 op1_hash = HASH (op1, mode);
4147 op1_elt = insert (op1, NULL, op1_hash, mode);
4148 op1_elt->in_memory = op1_in_memory;
4151 merge_equiv_classes (op0_elt, op1_elt);
4154 /* CSE processing for one instruction.
4155 First simplify sources and addresses of all assignments
4156 in the instruction, using previously-computed equivalents values.
4157 Then install the new sources and destinations in the table
4158 of available values. */
4160 /* Data on one SET contained in the instruction. */
4162 struct set
4164 /* The SET rtx itself. */
4165 rtx rtl;
4166 /* The SET_SRC of the rtx (the original value, if it is changing). */
4167 rtx src;
4168 /* The hash-table element for the SET_SRC of the SET. */
4169 struct table_elt *src_elt;
4170 /* Hash value for the SET_SRC. */
4171 unsigned src_hash;
4172 /* Hash value for the SET_DEST. */
4173 unsigned dest_hash;
4174 /* The SET_DEST, with SUBREG, etc., stripped. */
4175 rtx inner_dest;
4176 /* Nonzero if the SET_SRC is in memory. */
4177 char src_in_memory;
4178 /* Nonzero if the SET_SRC contains something
4179 whose value cannot be predicted and understood. */
4180 char src_volatile;
4181 /* Original machine mode, in case it becomes a CONST_INT.
4182 The size of this field should match the size of the mode
4183 field of struct rtx_def (see rtl.h). */
4184 ENUM_BITFIELD(machine_mode) mode : 8;
4185 /* A constant equivalent for SET_SRC, if any. */
4186 rtx src_const;
4187 /* Hash value of constant equivalent for SET_SRC. */
4188 unsigned src_const_hash;
4189 /* Table entry for constant equivalent for SET_SRC, if any. */
4190 struct table_elt *src_const_elt;
4191 /* Table entry for the destination address. */
4192 struct table_elt *dest_addr_elt;
4195 static void
4196 cse_insn (rtx insn)
4198 rtx x = PATTERN (insn);
4199 int i;
4200 rtx tem;
4201 int n_sets = 0;
4203 rtx src_eqv = 0;
4204 struct table_elt *src_eqv_elt = 0;
4205 int src_eqv_volatile = 0;
4206 int src_eqv_in_memory = 0;
4207 unsigned src_eqv_hash = 0;
4209 struct set *sets = (struct set *) 0;
4211 this_insn = insn;
4212 #ifdef HAVE_cc0
4213 /* Records what this insn does to set CC0. */
4214 this_insn_cc0 = 0;
4215 this_insn_cc0_mode = VOIDmode;
4216 #endif
4218 /* Find all the SETs and CLOBBERs in this instruction.
4219 Record all the SETs in the array `set' and count them.
4220 Also determine whether there is a CLOBBER that invalidates
4221 all memory references, or all references at varying addresses. */
4223 if (CALL_P (insn))
4225 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4227 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4228 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4229 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4233 if (GET_CODE (x) == SET)
4235 sets = XALLOCA (struct set);
4236 sets[0].rtl = x;
4238 /* Ignore SETs that are unconditional jumps.
4239 They never need cse processing, so this does not hurt.
4240 The reason is not efficiency but rather
4241 so that we can test at the end for instructions
4242 that have been simplified to unconditional jumps
4243 and not be misled by unchanged instructions
4244 that were unconditional jumps to begin with. */
4245 if (SET_DEST (x) == pc_rtx
4246 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4249 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4250 The hard function value register is used only once, to copy to
4251 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4252 Ensure we invalidate the destination register. On the 80386 no
4253 other code would invalidate it since it is a fixed_reg.
4254 We need not check the return of apply_change_group; see canon_reg. */
4256 else if (GET_CODE (SET_SRC (x)) == CALL)
4258 canon_reg (SET_SRC (x), insn);
4259 apply_change_group ();
4260 fold_rtx (SET_SRC (x), insn);
4261 invalidate (SET_DEST (x), VOIDmode);
4263 else
4264 n_sets = 1;
4266 else if (GET_CODE (x) == PARALLEL)
4268 int lim = XVECLEN (x, 0);
4270 sets = XALLOCAVEC (struct set, lim);
4272 /* Find all regs explicitly clobbered in this insn,
4273 and ensure they are not replaced with any other regs
4274 elsewhere in this insn.
4275 When a reg that is clobbered is also used for input,
4276 we should presume that that is for a reason,
4277 and we should not substitute some other register
4278 which is not supposed to be clobbered.
4279 Therefore, this loop cannot be merged into the one below
4280 because a CALL may precede a CLOBBER and refer to the
4281 value clobbered. We must not let a canonicalization do
4282 anything in that case. */
4283 for (i = 0; i < lim; i++)
4285 rtx y = XVECEXP (x, 0, i);
4286 if (GET_CODE (y) == CLOBBER)
4288 rtx clobbered = XEXP (y, 0);
4290 if (REG_P (clobbered)
4291 || GET_CODE (clobbered) == SUBREG)
4292 invalidate (clobbered, VOIDmode);
4293 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4294 || GET_CODE (clobbered) == ZERO_EXTRACT)
4295 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4299 for (i = 0; i < lim; i++)
4301 rtx y = XVECEXP (x, 0, i);
4302 if (GET_CODE (y) == SET)
4304 /* As above, we ignore unconditional jumps and call-insns and
4305 ignore the result of apply_change_group. */
4306 if (GET_CODE (SET_SRC (y)) == CALL)
4308 canon_reg (SET_SRC (y), insn);
4309 apply_change_group ();
4310 fold_rtx (SET_SRC (y), insn);
4311 invalidate (SET_DEST (y), VOIDmode);
4313 else if (SET_DEST (y) == pc_rtx
4314 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4316 else
4317 sets[n_sets++].rtl = y;
4319 else if (GET_CODE (y) == CLOBBER)
4321 /* If we clobber memory, canon the address.
4322 This does nothing when a register is clobbered
4323 because we have already invalidated the reg. */
4324 if (MEM_P (XEXP (y, 0)))
4325 canon_reg (XEXP (y, 0), insn);
4327 else if (GET_CODE (y) == USE
4328 && ! (REG_P (XEXP (y, 0))
4329 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4330 canon_reg (y, insn);
4331 else if (GET_CODE (y) == CALL)
4333 /* The result of apply_change_group can be ignored; see
4334 canon_reg. */
4335 canon_reg (y, insn);
4336 apply_change_group ();
4337 fold_rtx (y, insn);
4341 else if (GET_CODE (x) == CLOBBER)
4343 if (MEM_P (XEXP (x, 0)))
4344 canon_reg (XEXP (x, 0), insn);
4346 /* Canonicalize a USE of a pseudo register or memory location. */
4347 else if (GET_CODE (x) == USE
4348 && ! (REG_P (XEXP (x, 0))
4349 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4350 canon_reg (x, insn);
4351 else if (GET_CODE (x) == ASM_OPERANDS)
4353 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4355 rtx input = ASM_OPERANDS_INPUT (x, i);
4356 if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
4358 input = canon_reg (input, insn);
4359 validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4363 else if (GET_CODE (x) == CALL)
4365 /* The result of apply_change_group can be ignored; see canon_reg. */
4366 canon_reg (x, insn);
4367 apply_change_group ();
4368 fold_rtx (x, insn);
4370 else if (DEBUG_INSN_P (insn))
4371 canon_reg (PATTERN (insn), insn);
4373 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4374 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4375 is handled specially for this case, and if it isn't set, then there will
4376 be no equivalence for the destination. */
4377 if (n_sets == 1 && REG_NOTES (insn) != 0
4378 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4379 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4380 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4382 /* The result of apply_change_group can be ignored; see canon_reg. */
4383 canon_reg (XEXP (tem, 0), insn);
4384 apply_change_group ();
4385 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4386 XEXP (tem, 0) = copy_rtx (src_eqv);
4387 df_notes_rescan (insn);
4390 /* Canonicalize sources and addresses of destinations.
4391 We do this in a separate pass to avoid problems when a MATCH_DUP is
4392 present in the insn pattern. In that case, we want to ensure that
4393 we don't break the duplicate nature of the pattern. So we will replace
4394 both operands at the same time. Otherwise, we would fail to find an
4395 equivalent substitution in the loop calling validate_change below.
4397 We used to suppress canonicalization of DEST if it appears in SRC,
4398 but we don't do this any more. */
4400 for (i = 0; i < n_sets; i++)
4402 rtx dest = SET_DEST (sets[i].rtl);
4403 rtx src = SET_SRC (sets[i].rtl);
4404 rtx new_rtx = canon_reg (src, insn);
4406 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4408 if (GET_CODE (dest) == ZERO_EXTRACT)
4410 validate_change (insn, &XEXP (dest, 1),
4411 canon_reg (XEXP (dest, 1), insn), 1);
4412 validate_change (insn, &XEXP (dest, 2),
4413 canon_reg (XEXP (dest, 2), insn), 1);
4416 while (GET_CODE (dest) == SUBREG
4417 || GET_CODE (dest) == ZERO_EXTRACT
4418 || GET_CODE (dest) == STRICT_LOW_PART)
4419 dest = XEXP (dest, 0);
4421 if (MEM_P (dest))
4422 canon_reg (dest, insn);
4425 /* Now that we have done all the replacements, we can apply the change
4426 group and see if they all work. Note that this will cause some
4427 canonicalizations that would have worked individually not to be applied
4428 because some other canonicalization didn't work, but this should not
4429 occur often.
4431 The result of apply_change_group can be ignored; see canon_reg. */
4433 apply_change_group ();
4435 /* Set sets[i].src_elt to the class each source belongs to.
4436 Detect assignments from or to volatile things
4437 and set set[i] to zero so they will be ignored
4438 in the rest of this function.
4440 Nothing in this loop changes the hash table or the register chains. */
4442 for (i = 0; i < n_sets; i++)
4444 bool repeat = false;
4445 rtx src, dest;
4446 rtx src_folded;
4447 struct table_elt *elt = 0, *p;
4448 enum machine_mode mode;
4449 rtx src_eqv_here;
4450 rtx src_const = 0;
4451 rtx src_related = 0;
4452 bool src_related_is_const_anchor = false;
4453 struct table_elt *src_const_elt = 0;
4454 int src_cost = MAX_COST;
4455 int src_eqv_cost = MAX_COST;
4456 int src_folded_cost = MAX_COST;
4457 int src_related_cost = MAX_COST;
4458 int src_elt_cost = MAX_COST;
4459 int src_regcost = MAX_COST;
4460 int src_eqv_regcost = MAX_COST;
4461 int src_folded_regcost = MAX_COST;
4462 int src_related_regcost = MAX_COST;
4463 int src_elt_regcost = MAX_COST;
4464 /* Set nonzero if we need to call force_const_mem on with the
4465 contents of src_folded before using it. */
4466 int src_folded_force_flag = 0;
4468 dest = SET_DEST (sets[i].rtl);
4469 src = SET_SRC (sets[i].rtl);
4471 /* If SRC is a constant that has no machine mode,
4472 hash it with the destination's machine mode.
4473 This way we can keep different modes separate. */
4475 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4476 sets[i].mode = mode;
4478 if (src_eqv)
4480 enum machine_mode eqvmode = mode;
4481 if (GET_CODE (dest) == STRICT_LOW_PART)
4482 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4483 do_not_record = 0;
4484 hash_arg_in_memory = 0;
4485 src_eqv_hash = HASH (src_eqv, eqvmode);
4487 /* Find the equivalence class for the equivalent expression. */
4489 if (!do_not_record)
4490 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4492 src_eqv_volatile = do_not_record;
4493 src_eqv_in_memory = hash_arg_in_memory;
4496 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4497 value of the INNER register, not the destination. So it is not
4498 a valid substitution for the source. But save it for later. */
4499 if (GET_CODE (dest) == STRICT_LOW_PART)
4500 src_eqv_here = 0;
4501 else
4502 src_eqv_here = src_eqv;
4504 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4505 simplified result, which may not necessarily be valid. */
4506 src_folded = fold_rtx (src, insn);
4508 #if 0
4509 /* ??? This caused bad code to be generated for the m68k port with -O2.
4510 Suppose src is (CONST_INT -1), and that after truncation src_folded
4511 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4512 At the end we will add src and src_const to the same equivalence
4513 class. We now have 3 and -1 on the same equivalence class. This
4514 causes later instructions to be mis-optimized. */
4515 /* If storing a constant in a bitfield, pre-truncate the constant
4516 so we will be able to record it later. */
4517 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4519 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4521 if (CONST_INT_P (src)
4522 && CONST_INT_P (width)
4523 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4524 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4525 src_folded
4526 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4527 << INTVAL (width)) - 1));
4529 #endif
4531 /* Compute SRC's hash code, and also notice if it
4532 should not be recorded at all. In that case,
4533 prevent any further processing of this assignment. */
4534 do_not_record = 0;
4535 hash_arg_in_memory = 0;
4537 sets[i].src = src;
4538 sets[i].src_hash = HASH (src, mode);
4539 sets[i].src_volatile = do_not_record;
4540 sets[i].src_in_memory = hash_arg_in_memory;
4542 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4543 a pseudo, do not record SRC. Using SRC as a replacement for
4544 anything else will be incorrect in that situation. Note that
4545 this usually occurs only for stack slots, in which case all the
4546 RTL would be referring to SRC, so we don't lose any optimization
4547 opportunities by not having SRC in the hash table. */
4549 if (MEM_P (src)
4550 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4551 && REG_P (dest)
4552 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4553 sets[i].src_volatile = 1;
4555 #if 0
4556 /* It is no longer clear why we used to do this, but it doesn't
4557 appear to still be needed. So let's try without it since this
4558 code hurts cse'ing widened ops. */
4559 /* If source is a paradoxical subreg (such as QI treated as an SI),
4560 treat it as volatile. It may do the work of an SI in one context
4561 where the extra bits are not being used, but cannot replace an SI
4562 in general. */
4563 if (paradoxical_subreg_p (src))
4564 sets[i].src_volatile = 1;
4565 #endif
4567 /* Locate all possible equivalent forms for SRC. Try to replace
4568 SRC in the insn with each cheaper equivalent.
4570 We have the following types of equivalents: SRC itself, a folded
4571 version, a value given in a REG_EQUAL note, or a value related
4572 to a constant.
4574 Each of these equivalents may be part of an additional class
4575 of equivalents (if more than one is in the table, they must be in
4576 the same class; we check for this).
4578 If the source is volatile, we don't do any table lookups.
4580 We note any constant equivalent for possible later use in a
4581 REG_NOTE. */
4583 if (!sets[i].src_volatile)
4584 elt = lookup (src, sets[i].src_hash, mode);
4586 sets[i].src_elt = elt;
4588 if (elt && src_eqv_here && src_eqv_elt)
4590 if (elt->first_same_value != src_eqv_elt->first_same_value)
4592 /* The REG_EQUAL is indicating that two formerly distinct
4593 classes are now equivalent. So merge them. */
4594 merge_equiv_classes (elt, src_eqv_elt);
4595 src_eqv_hash = HASH (src_eqv, elt->mode);
4596 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4599 src_eqv_here = 0;
4602 else if (src_eqv_elt)
4603 elt = src_eqv_elt;
4605 /* Try to find a constant somewhere and record it in `src_const'.
4606 Record its table element, if any, in `src_const_elt'. Look in
4607 any known equivalences first. (If the constant is not in the
4608 table, also set `sets[i].src_const_hash'). */
4609 if (elt)
4610 for (p = elt->first_same_value; p; p = p->next_same_value)
4611 if (p->is_const)
4613 src_const = p->exp;
4614 src_const_elt = elt;
4615 break;
4618 if (src_const == 0
4619 && (CONSTANT_P (src_folded)
4620 /* Consider (minus (label_ref L1) (label_ref L2)) as
4621 "constant" here so we will record it. This allows us
4622 to fold switch statements when an ADDR_DIFF_VEC is used. */
4623 || (GET_CODE (src_folded) == MINUS
4624 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4625 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4626 src_const = src_folded, src_const_elt = elt;
4627 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4628 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4630 /* If we don't know if the constant is in the table, get its
4631 hash code and look it up. */
4632 if (src_const && src_const_elt == 0)
4634 sets[i].src_const_hash = HASH (src_const, mode);
4635 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4638 sets[i].src_const = src_const;
4639 sets[i].src_const_elt = src_const_elt;
4641 /* If the constant and our source are both in the table, mark them as
4642 equivalent. Otherwise, if a constant is in the table but the source
4643 isn't, set ELT to it. */
4644 if (src_const_elt && elt
4645 && src_const_elt->first_same_value != elt->first_same_value)
4646 merge_equiv_classes (elt, src_const_elt);
4647 else if (src_const_elt && elt == 0)
4648 elt = src_const_elt;
4650 /* See if there is a register linearly related to a constant
4651 equivalent of SRC. */
4652 if (src_const
4653 && (GET_CODE (src_const) == CONST
4654 || (src_const_elt && src_const_elt->related_value != 0)))
4656 src_related = use_related_value (src_const, src_const_elt);
4657 if (src_related)
4659 struct table_elt *src_related_elt
4660 = lookup (src_related, HASH (src_related, mode), mode);
4661 if (src_related_elt && elt)
4663 if (elt->first_same_value
4664 != src_related_elt->first_same_value)
4665 /* This can occur when we previously saw a CONST
4666 involving a SYMBOL_REF and then see the SYMBOL_REF
4667 twice. Merge the involved classes. */
4668 merge_equiv_classes (elt, src_related_elt);
4670 src_related = 0;
4671 src_related_elt = 0;
4673 else if (src_related_elt && elt == 0)
4674 elt = src_related_elt;
4678 /* See if we have a CONST_INT that is already in a register in a
4679 wider mode. */
4681 if (src_const && src_related == 0 && CONST_INT_P (src_const)
4682 && GET_MODE_CLASS (mode) == MODE_INT
4683 && GET_MODE_PRECISION (mode) < BITS_PER_WORD)
4685 enum machine_mode wider_mode;
4687 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4688 wider_mode != VOIDmode
4689 && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD
4690 && src_related == 0;
4691 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4693 struct table_elt *const_elt
4694 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4696 if (const_elt == 0)
4697 continue;
4699 for (const_elt = const_elt->first_same_value;
4700 const_elt; const_elt = const_elt->next_same_value)
4701 if (REG_P (const_elt->exp))
4703 src_related = gen_lowpart (mode, const_elt->exp);
4704 break;
4709 /* Another possibility is that we have an AND with a constant in
4710 a mode narrower than a word. If so, it might have been generated
4711 as part of an "if" which would narrow the AND. If we already
4712 have done the AND in a wider mode, we can use a SUBREG of that
4713 value. */
4715 if (flag_expensive_optimizations && ! src_related
4716 && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4717 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4719 enum machine_mode tmode;
4720 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4722 for (tmode = GET_MODE_WIDER_MODE (mode);
4723 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4724 tmode = GET_MODE_WIDER_MODE (tmode))
4726 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4727 struct table_elt *larger_elt;
4729 if (inner)
4731 PUT_MODE (new_and, tmode);
4732 XEXP (new_and, 0) = inner;
4733 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4734 if (larger_elt == 0)
4735 continue;
4737 for (larger_elt = larger_elt->first_same_value;
4738 larger_elt; larger_elt = larger_elt->next_same_value)
4739 if (REG_P (larger_elt->exp))
4741 src_related
4742 = gen_lowpart (mode, larger_elt->exp);
4743 break;
4746 if (src_related)
4747 break;
4752 #ifdef LOAD_EXTEND_OP
4753 /* See if a MEM has already been loaded with a widening operation;
4754 if it has, we can use a subreg of that. Many CISC machines
4755 also have such operations, but this is only likely to be
4756 beneficial on these machines. */
4758 if (flag_expensive_optimizations && src_related == 0
4759 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4760 && GET_MODE_CLASS (mode) == MODE_INT
4761 && MEM_P (src) && ! do_not_record
4762 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4764 struct rtx_def memory_extend_buf;
4765 rtx memory_extend_rtx = &memory_extend_buf;
4766 enum machine_mode tmode;
4768 /* Set what we are trying to extend and the operation it might
4769 have been extended with. */
4770 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4771 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4772 XEXP (memory_extend_rtx, 0) = src;
4774 for (tmode = GET_MODE_WIDER_MODE (mode);
4775 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4776 tmode = GET_MODE_WIDER_MODE (tmode))
4778 struct table_elt *larger_elt;
4780 PUT_MODE (memory_extend_rtx, tmode);
4781 larger_elt = lookup (memory_extend_rtx,
4782 HASH (memory_extend_rtx, tmode), tmode);
4783 if (larger_elt == 0)
4784 continue;
4786 for (larger_elt = larger_elt->first_same_value;
4787 larger_elt; larger_elt = larger_elt->next_same_value)
4788 if (REG_P (larger_elt->exp))
4790 src_related = gen_lowpart (mode, larger_elt->exp);
4791 break;
4794 if (src_related)
4795 break;
4798 #endif /* LOAD_EXTEND_OP */
4800 /* Try to express the constant using a register+offset expression
4801 derived from a constant anchor. */
4803 if (targetm.const_anchor
4804 && !src_related
4805 && src_const
4806 && GET_CODE (src_const) == CONST_INT)
4808 src_related = try_const_anchors (src_const, mode);
4809 src_related_is_const_anchor = src_related != NULL_RTX;
4813 if (src == src_folded)
4814 src_folded = 0;
4816 /* At this point, ELT, if nonzero, points to a class of expressions
4817 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4818 and SRC_RELATED, if nonzero, each contain additional equivalent
4819 expressions. Prune these latter expressions by deleting expressions
4820 already in the equivalence class.
4822 Check for an equivalent identical to the destination. If found,
4823 this is the preferred equivalent since it will likely lead to
4824 elimination of the insn. Indicate this by placing it in
4825 `src_related'. */
4827 if (elt)
4828 elt = elt->first_same_value;
4829 for (p = elt; p; p = p->next_same_value)
4831 enum rtx_code code = GET_CODE (p->exp);
4833 /* If the expression is not valid, ignore it. Then we do not
4834 have to check for validity below. In most cases, we can use
4835 `rtx_equal_p', since canonicalization has already been done. */
4836 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4837 continue;
4839 /* Also skip paradoxical subregs, unless that's what we're
4840 looking for. */
4841 if (paradoxical_subreg_p (p->exp)
4842 && ! (src != 0
4843 && GET_CODE (src) == SUBREG
4844 && GET_MODE (src) == GET_MODE (p->exp)
4845 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4846 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4847 continue;
4849 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4850 src = 0;
4851 else if (src_folded && GET_CODE (src_folded) == code
4852 && rtx_equal_p (src_folded, p->exp))
4853 src_folded = 0;
4854 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4855 && rtx_equal_p (src_eqv_here, p->exp))
4856 src_eqv_here = 0;
4857 else if (src_related && GET_CODE (src_related) == code
4858 && rtx_equal_p (src_related, p->exp))
4859 src_related = 0;
4861 /* This is the same as the destination of the insns, we want
4862 to prefer it. Copy it to src_related. The code below will
4863 then give it a negative cost. */
4864 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4865 src_related = dest;
4868 /* Find the cheapest valid equivalent, trying all the available
4869 possibilities. Prefer items not in the hash table to ones
4870 that are when they are equal cost. Note that we can never
4871 worsen an insn as the current contents will also succeed.
4872 If we find an equivalent identical to the destination, use it as best,
4873 since this insn will probably be eliminated in that case. */
4874 if (src)
4876 if (rtx_equal_p (src, dest))
4877 src_cost = src_regcost = -1;
4878 else
4880 src_cost = COST (src);
4881 src_regcost = approx_reg_cost (src);
4885 if (src_eqv_here)
4887 if (rtx_equal_p (src_eqv_here, dest))
4888 src_eqv_cost = src_eqv_regcost = -1;
4889 else
4891 src_eqv_cost = COST (src_eqv_here);
4892 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4896 if (src_folded)
4898 if (rtx_equal_p (src_folded, dest))
4899 src_folded_cost = src_folded_regcost = -1;
4900 else
4902 src_folded_cost = COST (src_folded);
4903 src_folded_regcost = approx_reg_cost (src_folded);
4907 if (src_related)
4909 if (rtx_equal_p (src_related, dest))
4910 src_related_cost = src_related_regcost = -1;
4911 else
4913 src_related_cost = COST (src_related);
4914 src_related_regcost = approx_reg_cost (src_related);
4916 /* If a const-anchor is used to synthesize a constant that
4917 normally requires multiple instructions then slightly prefer
4918 it over the original sequence. These instructions are likely
4919 to become redundant now. We can't compare against the cost
4920 of src_eqv_here because, on MIPS for example, multi-insn
4921 constants have zero cost; they are assumed to be hoisted from
4922 loops. */
4923 if (src_related_is_const_anchor
4924 && src_related_cost == src_cost
4925 && src_eqv_here)
4926 src_related_cost--;
4930 /* If this was an indirect jump insn, a known label will really be
4931 cheaper even though it looks more expensive. */
4932 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4933 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4935 /* Terminate loop when replacement made. This must terminate since
4936 the current contents will be tested and will always be valid. */
4937 while (1)
4939 rtx trial;
4941 /* Skip invalid entries. */
4942 while (elt && !REG_P (elt->exp)
4943 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4944 elt = elt->next_same_value;
4946 /* A paradoxical subreg would be bad here: it'll be the right
4947 size, but later may be adjusted so that the upper bits aren't
4948 what we want. So reject it. */
4949 if (elt != 0
4950 && paradoxical_subreg_p (elt->exp)
4951 /* It is okay, though, if the rtx we're trying to match
4952 will ignore any of the bits we can't predict. */
4953 && ! (src != 0
4954 && GET_CODE (src) == SUBREG
4955 && GET_MODE (src) == GET_MODE (elt->exp)
4956 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4957 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4959 elt = elt->next_same_value;
4960 continue;
4963 if (elt)
4965 src_elt_cost = elt->cost;
4966 src_elt_regcost = elt->regcost;
4969 /* Find cheapest and skip it for the next time. For items
4970 of equal cost, use this order:
4971 src_folded, src, src_eqv, src_related and hash table entry. */
4972 if (src_folded
4973 && preferable (src_folded_cost, src_folded_regcost,
4974 src_cost, src_regcost) <= 0
4975 && preferable (src_folded_cost, src_folded_regcost,
4976 src_eqv_cost, src_eqv_regcost) <= 0
4977 && preferable (src_folded_cost, src_folded_regcost,
4978 src_related_cost, src_related_regcost) <= 0
4979 && preferable (src_folded_cost, src_folded_regcost,
4980 src_elt_cost, src_elt_regcost) <= 0)
4982 trial = src_folded, src_folded_cost = MAX_COST;
4983 if (src_folded_force_flag)
4985 rtx forced = force_const_mem (mode, trial);
4986 if (forced)
4987 trial = forced;
4990 else if (src
4991 && preferable (src_cost, src_regcost,
4992 src_eqv_cost, src_eqv_regcost) <= 0
4993 && preferable (src_cost, src_regcost,
4994 src_related_cost, src_related_regcost) <= 0
4995 && preferable (src_cost, src_regcost,
4996 src_elt_cost, src_elt_regcost) <= 0)
4997 trial = src, src_cost = MAX_COST;
4998 else if (src_eqv_here
4999 && preferable (src_eqv_cost, src_eqv_regcost,
5000 src_related_cost, src_related_regcost) <= 0
5001 && preferable (src_eqv_cost, src_eqv_regcost,
5002 src_elt_cost, src_elt_regcost) <= 0)
5003 trial = src_eqv_here, src_eqv_cost = MAX_COST;
5004 else if (src_related
5005 && preferable (src_related_cost, src_related_regcost,
5006 src_elt_cost, src_elt_regcost) <= 0)
5007 trial = src_related, src_related_cost = MAX_COST;
5008 else
5010 trial = elt->exp;
5011 elt = elt->next_same_value;
5012 src_elt_cost = MAX_COST;
5015 /* Avoid creation of overlapping memory moves. */
5016 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
5018 rtx src, dest;
5020 /* BLKmode moves are not handled by cse anyway. */
5021 if (GET_MODE (trial) == BLKmode)
5022 break;
5024 src = canon_rtx (trial);
5025 dest = canon_rtx (SET_DEST (sets[i].rtl));
5027 if (!MEM_P (src) || !MEM_P (dest)
5028 || !nonoverlapping_memrefs_p (src, dest, false))
5029 break;
5032 /* Try to optimize
5033 (set (reg:M N) (const_int A))
5034 (set (reg:M2 O) (const_int B))
5035 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5036 (reg:M2 O)). */
5037 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5038 && CONST_INT_P (trial)
5039 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5040 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5041 && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5042 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl)))
5043 >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
5044 && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5045 + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5046 <= HOST_BITS_PER_WIDE_INT))
5048 rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5049 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5050 rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5051 unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5052 struct table_elt *dest_elt
5053 = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5054 rtx dest_cst = NULL;
5056 if (dest_elt)
5057 for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5058 if (p->is_const && CONST_INT_P (p->exp))
5060 dest_cst = p->exp;
5061 break;
5063 if (dest_cst)
5065 HOST_WIDE_INT val = INTVAL (dest_cst);
5066 HOST_WIDE_INT mask;
5067 unsigned int shift;
5068 if (BITS_BIG_ENDIAN)
5069 shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
5070 - INTVAL (pos) - INTVAL (width);
5071 else
5072 shift = INTVAL (pos);
5073 if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5074 mask = ~(HOST_WIDE_INT) 0;
5075 else
5076 mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
5077 val &= ~(mask << shift);
5078 val |= (INTVAL (trial) & mask) << shift;
5079 val = trunc_int_for_mode (val, GET_MODE (dest_reg));
5080 validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5081 dest_reg, 1);
5082 validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5083 GEN_INT (val), 1);
5084 if (apply_change_group ())
5086 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5087 if (note)
5089 remove_note (insn, note);
5090 df_notes_rescan (insn);
5092 src_eqv = NULL_RTX;
5093 src_eqv_elt = NULL;
5094 src_eqv_volatile = 0;
5095 src_eqv_in_memory = 0;
5096 src_eqv_hash = 0;
5097 repeat = true;
5098 break;
5103 /* We don't normally have an insn matching (set (pc) (pc)), so
5104 check for this separately here. We will delete such an
5105 insn below.
5107 For other cases such as a table jump or conditional jump
5108 where we know the ultimate target, go ahead and replace the
5109 operand. While that may not make a valid insn, we will
5110 reemit the jump below (and also insert any necessary
5111 barriers). */
5112 if (n_sets == 1 && dest == pc_rtx
5113 && (trial == pc_rtx
5114 || (GET_CODE (trial) == LABEL_REF
5115 && ! condjump_p (insn))))
5117 /* Don't substitute non-local labels, this confuses CFG. */
5118 if (GET_CODE (trial) == LABEL_REF
5119 && LABEL_REF_NONLOCAL_P (trial))
5120 continue;
5122 SET_SRC (sets[i].rtl) = trial;
5123 cse_jumps_altered = true;
5124 break;
5127 /* Reject certain invalid forms of CONST that we create. */
5128 else if (CONSTANT_P (trial)
5129 && GET_CODE (trial) == CONST
5130 /* Reject cases that will cause decode_rtx_const to
5131 die. On the alpha when simplifying a switch, we
5132 get (const (truncate (minus (label_ref)
5133 (label_ref)))). */
5134 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5135 /* Likewise on IA-64, except without the
5136 truncate. */
5137 || (GET_CODE (XEXP (trial, 0)) == MINUS
5138 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5139 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5140 /* Do nothing for this case. */
5143 /* Look for a substitution that makes a valid insn. */
5144 else if (validate_unshare_change
5145 (insn, &SET_SRC (sets[i].rtl), trial, 0))
5147 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5149 /* The result of apply_change_group can be ignored; see
5150 canon_reg. */
5152 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5153 apply_change_group ();
5155 break;
5158 /* If we previously found constant pool entries for
5159 constants and this is a constant, try making a
5160 pool entry. Put it in src_folded unless we already have done
5161 this since that is where it likely came from. */
5163 else if (constant_pool_entries_cost
5164 && CONSTANT_P (trial)
5165 && (src_folded == 0
5166 || (!MEM_P (src_folded)
5167 && ! src_folded_force_flag))
5168 && GET_MODE_CLASS (mode) != MODE_CC
5169 && mode != VOIDmode)
5171 src_folded_force_flag = 1;
5172 src_folded = trial;
5173 src_folded_cost = constant_pool_entries_cost;
5174 src_folded_regcost = constant_pool_entries_regcost;
5178 /* If we changed the insn too much, handle this set from scratch. */
5179 if (repeat)
5181 i--;
5182 continue;
5185 src = SET_SRC (sets[i].rtl);
5187 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5188 However, there is an important exception: If both are registers
5189 that are not the head of their equivalence class, replace SET_SRC
5190 with the head of the class. If we do not do this, we will have
5191 both registers live over a portion of the basic block. This way,
5192 their lifetimes will likely abut instead of overlapping. */
5193 if (REG_P (dest)
5194 && REGNO_QTY_VALID_P (REGNO (dest)))
5196 int dest_q = REG_QTY (REGNO (dest));
5197 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5199 if (dest_ent->mode == GET_MODE (dest)
5200 && dest_ent->first_reg != REGNO (dest)
5201 && REG_P (src) && REGNO (src) == REGNO (dest)
5202 /* Don't do this if the original insn had a hard reg as
5203 SET_SRC or SET_DEST. */
5204 && (!REG_P (sets[i].src)
5205 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5206 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5207 /* We can't call canon_reg here because it won't do anything if
5208 SRC is a hard register. */
5210 int src_q = REG_QTY (REGNO (src));
5211 struct qty_table_elem *src_ent = &qty_table[src_q];
5212 int first = src_ent->first_reg;
5213 rtx new_src
5214 = (first >= FIRST_PSEUDO_REGISTER
5215 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5217 /* We must use validate-change even for this, because this
5218 might be a special no-op instruction, suitable only to
5219 tag notes onto. */
5220 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5222 src = new_src;
5223 /* If we had a constant that is cheaper than what we are now
5224 setting SRC to, use that constant. We ignored it when we
5225 thought we could make this into a no-op. */
5226 if (src_const && COST (src_const) < COST (src)
5227 && validate_change (insn, &SET_SRC (sets[i].rtl),
5228 src_const, 0))
5229 src = src_const;
5234 /* If we made a change, recompute SRC values. */
5235 if (src != sets[i].src)
5237 do_not_record = 0;
5238 hash_arg_in_memory = 0;
5239 sets[i].src = src;
5240 sets[i].src_hash = HASH (src, mode);
5241 sets[i].src_volatile = do_not_record;
5242 sets[i].src_in_memory = hash_arg_in_memory;
5243 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5246 /* If this is a single SET, we are setting a register, and we have an
5247 equivalent constant, we want to add a REG_NOTE. We don't want
5248 to write a REG_EQUAL note for a constant pseudo since verifying that
5249 that pseudo hasn't been eliminated is a pain. Such a note also
5250 won't help anything.
5252 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5253 which can be created for a reference to a compile time computable
5254 entry in a jump table. */
5256 if (n_sets == 1 && src_const && REG_P (dest)
5257 && !REG_P (src_const)
5258 && ! (GET_CODE (src_const) == CONST
5259 && GET_CODE (XEXP (src_const, 0)) == MINUS
5260 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5261 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5263 /* We only want a REG_EQUAL note if src_const != src. */
5264 if (! rtx_equal_p (src, src_const))
5266 /* Make sure that the rtx is not shared. */
5267 src_const = copy_rtx (src_const);
5269 /* Record the actual constant value in a REG_EQUAL note,
5270 making a new one if one does not already exist. */
5271 set_unique_reg_note (insn, REG_EQUAL, src_const);
5272 df_notes_rescan (insn);
5276 /* Now deal with the destination. */
5277 do_not_record = 0;
5279 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5280 while (GET_CODE (dest) == SUBREG
5281 || GET_CODE (dest) == ZERO_EXTRACT
5282 || GET_CODE (dest) == STRICT_LOW_PART)
5283 dest = XEXP (dest, 0);
5285 sets[i].inner_dest = dest;
5287 if (MEM_P (dest))
5289 #ifdef PUSH_ROUNDING
5290 /* Stack pushes invalidate the stack pointer. */
5291 rtx addr = XEXP (dest, 0);
5292 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5293 && XEXP (addr, 0) == stack_pointer_rtx)
5294 invalidate (stack_pointer_rtx, VOIDmode);
5295 #endif
5296 dest = fold_rtx (dest, insn);
5299 /* Compute the hash code of the destination now,
5300 before the effects of this instruction are recorded,
5301 since the register values used in the address computation
5302 are those before this instruction. */
5303 sets[i].dest_hash = HASH (dest, mode);
5305 /* Don't enter a bit-field in the hash table
5306 because the value in it after the store
5307 may not equal what was stored, due to truncation. */
5309 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5311 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5313 if (src_const != 0 && CONST_INT_P (src_const)
5314 && CONST_INT_P (width)
5315 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5316 && ! (INTVAL (src_const)
5317 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5318 /* Exception: if the value is constant,
5319 and it won't be truncated, record it. */
5321 else
5323 /* This is chosen so that the destination will be invalidated
5324 but no new value will be recorded.
5325 We must invalidate because sometimes constant
5326 values can be recorded for bitfields. */
5327 sets[i].src_elt = 0;
5328 sets[i].src_volatile = 1;
5329 src_eqv = 0;
5330 src_eqv_elt = 0;
5334 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5335 the insn. */
5336 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5338 /* One less use of the label this insn used to jump to. */
5339 delete_insn_and_edges (insn);
5340 cse_jumps_altered = true;
5341 /* No more processing for this set. */
5342 sets[i].rtl = 0;
5345 /* If this SET is now setting PC to a label, we know it used to
5346 be a conditional or computed branch. */
5347 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5348 && !LABEL_REF_NONLOCAL_P (src))
5350 /* We reemit the jump in as many cases as possible just in
5351 case the form of an unconditional jump is significantly
5352 different than a computed jump or conditional jump.
5354 If this insn has multiple sets, then reemitting the
5355 jump is nontrivial. So instead we just force rerecognition
5356 and hope for the best. */
5357 if (n_sets == 1)
5359 rtx new_rtx, note;
5361 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5362 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5363 LABEL_NUSES (XEXP (src, 0))++;
5365 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5366 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5367 if (note)
5369 XEXP (note, 1) = NULL_RTX;
5370 REG_NOTES (new_rtx) = note;
5373 delete_insn_and_edges (insn);
5374 insn = new_rtx;
5376 else
5377 INSN_CODE (insn) = -1;
5379 /* Do not bother deleting any unreachable code, let jump do it. */
5380 cse_jumps_altered = true;
5381 sets[i].rtl = 0;
5384 /* If destination is volatile, invalidate it and then do no further
5385 processing for this assignment. */
5387 else if (do_not_record)
5389 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5390 invalidate (dest, VOIDmode);
5391 else if (MEM_P (dest))
5392 invalidate (dest, VOIDmode);
5393 else if (GET_CODE (dest) == STRICT_LOW_PART
5394 || GET_CODE (dest) == ZERO_EXTRACT)
5395 invalidate (XEXP (dest, 0), GET_MODE (dest));
5396 sets[i].rtl = 0;
5399 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5400 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5402 #ifdef HAVE_cc0
5403 /* If setting CC0, record what it was set to, or a constant, if it
5404 is equivalent to a constant. If it is being set to a floating-point
5405 value, make a COMPARE with the appropriate constant of 0. If we
5406 don't do this, later code can interpret this as a test against
5407 const0_rtx, which can cause problems if we try to put it into an
5408 insn as a floating-point operand. */
5409 if (dest == cc0_rtx)
5411 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5412 this_insn_cc0_mode = mode;
5413 if (FLOAT_MODE_P (mode))
5414 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5415 CONST0_RTX (mode));
5417 #endif
5420 /* Now enter all non-volatile source expressions in the hash table
5421 if they are not already present.
5422 Record their equivalence classes in src_elt.
5423 This way we can insert the corresponding destinations into
5424 the same classes even if the actual sources are no longer in them
5425 (having been invalidated). */
5427 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5428 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5430 struct table_elt *elt;
5431 struct table_elt *classp = sets[0].src_elt;
5432 rtx dest = SET_DEST (sets[0].rtl);
5433 enum machine_mode eqvmode = GET_MODE (dest);
5435 if (GET_CODE (dest) == STRICT_LOW_PART)
5437 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5438 classp = 0;
5440 if (insert_regs (src_eqv, classp, 0))
5442 rehash_using_reg (src_eqv);
5443 src_eqv_hash = HASH (src_eqv, eqvmode);
5445 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5446 elt->in_memory = src_eqv_in_memory;
5447 src_eqv_elt = elt;
5449 /* Check to see if src_eqv_elt is the same as a set source which
5450 does not yet have an elt, and if so set the elt of the set source
5451 to src_eqv_elt. */
5452 for (i = 0; i < n_sets; i++)
5453 if (sets[i].rtl && sets[i].src_elt == 0
5454 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5455 sets[i].src_elt = src_eqv_elt;
5458 for (i = 0; i < n_sets; i++)
5459 if (sets[i].rtl && ! sets[i].src_volatile
5460 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5462 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5464 /* REG_EQUAL in setting a STRICT_LOW_PART
5465 gives an equivalent for the entire destination register,
5466 not just for the subreg being stored in now.
5467 This is a more interesting equivalence, so we arrange later
5468 to treat the entire reg as the destination. */
5469 sets[i].src_elt = src_eqv_elt;
5470 sets[i].src_hash = src_eqv_hash;
5472 else
5474 /* Insert source and constant equivalent into hash table, if not
5475 already present. */
5476 struct table_elt *classp = src_eqv_elt;
5477 rtx src = sets[i].src;
5478 rtx dest = SET_DEST (sets[i].rtl);
5479 enum machine_mode mode
5480 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5482 /* It's possible that we have a source value known to be
5483 constant but don't have a REG_EQUAL note on the insn.
5484 Lack of a note will mean src_eqv_elt will be NULL. This
5485 can happen where we've generated a SUBREG to access a
5486 CONST_INT that is already in a register in a wider mode.
5487 Ensure that the source expression is put in the proper
5488 constant class. */
5489 if (!classp)
5490 classp = sets[i].src_const_elt;
5492 if (sets[i].src_elt == 0)
5494 struct table_elt *elt;
5496 /* Note that these insert_regs calls cannot remove
5497 any of the src_elt's, because they would have failed to
5498 match if not still valid. */
5499 if (insert_regs (src, classp, 0))
5501 rehash_using_reg (src);
5502 sets[i].src_hash = HASH (src, mode);
5504 elt = insert (src, classp, sets[i].src_hash, mode);
5505 elt->in_memory = sets[i].src_in_memory;
5506 sets[i].src_elt = classp = elt;
5508 if (sets[i].src_const && sets[i].src_const_elt == 0
5509 && src != sets[i].src_const
5510 && ! rtx_equal_p (sets[i].src_const, src))
5511 sets[i].src_elt = insert (sets[i].src_const, classp,
5512 sets[i].src_const_hash, mode);
5515 else if (sets[i].src_elt == 0)
5516 /* If we did not insert the source into the hash table (e.g., it was
5517 volatile), note the equivalence class for the REG_EQUAL value, if any,
5518 so that the destination goes into that class. */
5519 sets[i].src_elt = src_eqv_elt;
5521 /* Record destination addresses in the hash table. This allows us to
5522 check if they are invalidated by other sets. */
5523 for (i = 0; i < n_sets; i++)
5525 if (sets[i].rtl)
5527 rtx x = sets[i].inner_dest;
5528 struct table_elt *elt;
5529 enum machine_mode mode;
5530 unsigned hash;
5532 if (MEM_P (x))
5534 x = XEXP (x, 0);
5535 mode = GET_MODE (x);
5536 hash = HASH (x, mode);
5537 elt = lookup (x, hash, mode);
5538 if (!elt)
5540 if (insert_regs (x, NULL, 0))
5542 rtx dest = SET_DEST (sets[i].rtl);
5544 rehash_using_reg (x);
5545 hash = HASH (x, mode);
5546 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5548 elt = insert (x, NULL, hash, mode);
5551 sets[i].dest_addr_elt = elt;
5553 else
5554 sets[i].dest_addr_elt = NULL;
5558 invalidate_from_clobbers (x);
5560 /* Some registers are invalidated by subroutine calls. Memory is
5561 invalidated by non-constant calls. */
5563 if (CALL_P (insn))
5565 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5566 invalidate_memory ();
5567 invalidate_for_call ();
5570 /* Now invalidate everything set by this instruction.
5571 If a SUBREG or other funny destination is being set,
5572 sets[i].rtl is still nonzero, so here we invalidate the reg
5573 a part of which is being set. */
5575 for (i = 0; i < n_sets; i++)
5576 if (sets[i].rtl)
5578 /* We can't use the inner dest, because the mode associated with
5579 a ZERO_EXTRACT is significant. */
5580 rtx dest = SET_DEST (sets[i].rtl);
5582 /* Needed for registers to remove the register from its
5583 previous quantity's chain.
5584 Needed for memory if this is a nonvarying address, unless
5585 we have just done an invalidate_memory that covers even those. */
5586 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5587 invalidate (dest, VOIDmode);
5588 else if (MEM_P (dest))
5589 invalidate (dest, VOIDmode);
5590 else if (GET_CODE (dest) == STRICT_LOW_PART
5591 || GET_CODE (dest) == ZERO_EXTRACT)
5592 invalidate (XEXP (dest, 0), GET_MODE (dest));
5595 /* A volatile ASM invalidates everything. */
5596 if (NONJUMP_INSN_P (insn)
5597 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5598 && MEM_VOLATILE_P (PATTERN (insn)))
5599 flush_hash_table ();
5601 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5602 the regs restored by the longjmp come from a later time
5603 than the setjmp. */
5604 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5606 flush_hash_table ();
5607 goto done;
5610 /* Make sure registers mentioned in destinations
5611 are safe for use in an expression to be inserted.
5612 This removes from the hash table
5613 any invalid entry that refers to one of these registers.
5615 We don't care about the return value from mention_regs because
5616 we are going to hash the SET_DEST values unconditionally. */
5618 for (i = 0; i < n_sets; i++)
5620 if (sets[i].rtl)
5622 rtx x = SET_DEST (sets[i].rtl);
5624 if (!REG_P (x))
5625 mention_regs (x);
5626 else
5628 /* We used to rely on all references to a register becoming
5629 inaccessible when a register changes to a new quantity,
5630 since that changes the hash code. However, that is not
5631 safe, since after HASH_SIZE new quantities we get a
5632 hash 'collision' of a register with its own invalid
5633 entries. And since SUBREGs have been changed not to
5634 change their hash code with the hash code of the register,
5635 it wouldn't work any longer at all. So we have to check
5636 for any invalid references lying around now.
5637 This code is similar to the REG case in mention_regs,
5638 but it knows that reg_tick has been incremented, and
5639 it leaves reg_in_table as -1 . */
5640 unsigned int regno = REGNO (x);
5641 unsigned int endregno = END_REGNO (x);
5642 unsigned int i;
5644 for (i = regno; i < endregno; i++)
5646 if (REG_IN_TABLE (i) >= 0)
5648 remove_invalid_refs (i);
5649 REG_IN_TABLE (i) = -1;
5656 /* We may have just removed some of the src_elt's from the hash table.
5657 So replace each one with the current head of the same class.
5658 Also check if destination addresses have been removed. */
5660 for (i = 0; i < n_sets; i++)
5661 if (sets[i].rtl)
5663 if (sets[i].dest_addr_elt
5664 && sets[i].dest_addr_elt->first_same_value == 0)
5666 /* The elt was removed, which means this destination is not
5667 valid after this instruction. */
5668 sets[i].rtl = NULL_RTX;
5670 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5671 /* If elt was removed, find current head of same class,
5672 or 0 if nothing remains of that class. */
5674 struct table_elt *elt = sets[i].src_elt;
5676 while (elt && elt->prev_same_value)
5677 elt = elt->prev_same_value;
5679 while (elt && elt->first_same_value == 0)
5680 elt = elt->next_same_value;
5681 sets[i].src_elt = elt ? elt->first_same_value : 0;
5685 /* Now insert the destinations into their equivalence classes. */
5687 for (i = 0; i < n_sets; i++)
5688 if (sets[i].rtl)
5690 rtx dest = SET_DEST (sets[i].rtl);
5691 struct table_elt *elt;
5693 /* Don't record value if we are not supposed to risk allocating
5694 floating-point values in registers that might be wider than
5695 memory. */
5696 if ((flag_float_store
5697 && MEM_P (dest)
5698 && FLOAT_MODE_P (GET_MODE (dest)))
5699 /* Don't record BLKmode values, because we don't know the
5700 size of it, and can't be sure that other BLKmode values
5701 have the same or smaller size. */
5702 || GET_MODE (dest) == BLKmode
5703 /* If we didn't put a REG_EQUAL value or a source into the hash
5704 table, there is no point is recording DEST. */
5705 || sets[i].src_elt == 0
5706 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5707 or SIGN_EXTEND, don't record DEST since it can cause
5708 some tracking to be wrong.
5710 ??? Think about this more later. */
5711 || (paradoxical_subreg_p (dest)
5712 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5713 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5714 continue;
5716 /* STRICT_LOW_PART isn't part of the value BEING set,
5717 and neither is the SUBREG inside it.
5718 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5719 if (GET_CODE (dest) == STRICT_LOW_PART)
5720 dest = SUBREG_REG (XEXP (dest, 0));
5722 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5723 /* Registers must also be inserted into chains for quantities. */
5724 if (insert_regs (dest, sets[i].src_elt, 1))
5726 /* If `insert_regs' changes something, the hash code must be
5727 recalculated. */
5728 rehash_using_reg (dest);
5729 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5732 elt = insert (dest, sets[i].src_elt,
5733 sets[i].dest_hash, GET_MODE (dest));
5735 /* If this is a constant, insert the constant anchors with the
5736 equivalent register-offset expressions using register DEST. */
5737 if (targetm.const_anchor
5738 && REG_P (dest)
5739 && SCALAR_INT_MODE_P (GET_MODE (dest))
5740 && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5741 insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5743 elt->in_memory = (MEM_P (sets[i].inner_dest)
5744 && !MEM_READONLY_P (sets[i].inner_dest));
5746 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5747 narrower than M2, and both M1 and M2 are the same number of words,
5748 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5749 make that equivalence as well.
5751 However, BAR may have equivalences for which gen_lowpart
5752 will produce a simpler value than gen_lowpart applied to
5753 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5754 BAR's equivalences. If we don't get a simplified form, make
5755 the SUBREG. It will not be used in an equivalence, but will
5756 cause two similar assignments to be detected.
5758 Note the loop below will find SUBREG_REG (DEST) since we have
5759 already entered SRC and DEST of the SET in the table. */
5761 if (GET_CODE (dest) == SUBREG
5762 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5763 / UNITS_PER_WORD)
5764 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5765 && (GET_MODE_SIZE (GET_MODE (dest))
5766 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5767 && sets[i].src_elt != 0)
5769 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5770 struct table_elt *elt, *classp = 0;
5772 for (elt = sets[i].src_elt->first_same_value; elt;
5773 elt = elt->next_same_value)
5775 rtx new_src = 0;
5776 unsigned src_hash;
5777 struct table_elt *src_elt;
5778 int byte = 0;
5780 /* Ignore invalid entries. */
5781 if (!REG_P (elt->exp)
5782 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5783 continue;
5785 /* We may have already been playing subreg games. If the
5786 mode is already correct for the destination, use it. */
5787 if (GET_MODE (elt->exp) == new_mode)
5788 new_src = elt->exp;
5789 else
5791 /* Calculate big endian correction for the SUBREG_BYTE.
5792 We have already checked that M1 (GET_MODE (dest))
5793 is not narrower than M2 (new_mode). */
5794 if (BYTES_BIG_ENDIAN)
5795 byte = (GET_MODE_SIZE (GET_MODE (dest))
5796 - GET_MODE_SIZE (new_mode));
5798 new_src = simplify_gen_subreg (new_mode, elt->exp,
5799 GET_MODE (dest), byte);
5802 /* The call to simplify_gen_subreg fails if the value
5803 is VOIDmode, yet we can't do any simplification, e.g.
5804 for EXPR_LISTs denoting function call results.
5805 It is invalid to construct a SUBREG with a VOIDmode
5806 SUBREG_REG, hence a zero new_src means we can't do
5807 this substitution. */
5808 if (! new_src)
5809 continue;
5811 src_hash = HASH (new_src, new_mode);
5812 src_elt = lookup (new_src, src_hash, new_mode);
5814 /* Put the new source in the hash table is if isn't
5815 already. */
5816 if (src_elt == 0)
5818 if (insert_regs (new_src, classp, 0))
5820 rehash_using_reg (new_src);
5821 src_hash = HASH (new_src, new_mode);
5823 src_elt = insert (new_src, classp, src_hash, new_mode);
5824 src_elt->in_memory = elt->in_memory;
5826 else if (classp && classp != src_elt->first_same_value)
5827 /* Show that two things that we've seen before are
5828 actually the same. */
5829 merge_equiv_classes (src_elt, classp);
5831 classp = src_elt->first_same_value;
5832 /* Ignore invalid entries. */
5833 while (classp
5834 && !REG_P (classp->exp)
5835 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5836 classp = classp->next_same_value;
5841 /* Special handling for (set REG0 REG1) where REG0 is the
5842 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5843 be used in the sequel, so (if easily done) change this insn to
5844 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5845 that computed their value. Then REG1 will become a dead store
5846 and won't cloud the situation for later optimizations.
5848 Do not make this change if REG1 is a hard register, because it will
5849 then be used in the sequel and we may be changing a two-operand insn
5850 into a three-operand insn.
5852 Also do not do this if we are operating on a copy of INSN. */
5854 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5855 && NEXT_INSN (PREV_INSN (insn)) == insn
5856 && REG_P (SET_SRC (sets[0].rtl))
5857 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5858 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5860 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5861 struct qty_table_elem *src_ent = &qty_table[src_q];
5863 if (src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5865 /* Scan for the previous nonnote insn, but stop at a basic
5866 block boundary. */
5867 rtx prev = insn;
5868 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5871 prev = PREV_INSN (prev);
5873 while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
5875 /* Do not swap the registers around if the previous instruction
5876 attaches a REG_EQUIV note to REG1.
5878 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5879 from the pseudo that originally shadowed an incoming argument
5880 to another register. Some uses of REG_EQUIV might rely on it
5881 being attached to REG1 rather than REG2.
5883 This section previously turned the REG_EQUIV into a REG_EQUAL
5884 note. We cannot do that because REG_EQUIV may provide an
5885 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5886 if (NONJUMP_INSN_P (prev)
5887 && GET_CODE (PATTERN (prev)) == SET
5888 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5889 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5891 rtx dest = SET_DEST (sets[0].rtl);
5892 rtx src = SET_SRC (sets[0].rtl);
5893 rtx note;
5895 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5896 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5897 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5898 apply_change_group ();
5900 /* If INSN has a REG_EQUAL note, and this note mentions
5901 REG0, then we must delete it, because the value in
5902 REG0 has changed. If the note's value is REG1, we must
5903 also delete it because that is now this insn's dest. */
5904 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5905 if (note != 0
5906 && (reg_mentioned_p (dest, XEXP (note, 0))
5907 || rtx_equal_p (src, XEXP (note, 0))))
5908 remove_note (insn, note);
5913 done:;
5916 /* Remove from the hash table all expressions that reference memory. */
5918 static void
5919 invalidate_memory (void)
5921 int i;
5922 struct table_elt *p, *next;
5924 for (i = 0; i < HASH_SIZE; i++)
5925 for (p = table[i]; p; p = next)
5927 next = p->next_same_hash;
5928 if (p->in_memory)
5929 remove_from_table (p, i);
5933 /* Perform invalidation on the basis of everything about an insn
5934 except for invalidating the actual places that are SET in it.
5935 This includes the places CLOBBERed, and anything that might
5936 alias with something that is SET or CLOBBERed.
5938 X is the pattern of the insn. */
5940 static void
5941 invalidate_from_clobbers (rtx x)
5943 if (GET_CODE (x) == CLOBBER)
5945 rtx ref = XEXP (x, 0);
5946 if (ref)
5948 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5949 || MEM_P (ref))
5950 invalidate (ref, VOIDmode);
5951 else if (GET_CODE (ref) == STRICT_LOW_PART
5952 || GET_CODE (ref) == ZERO_EXTRACT)
5953 invalidate (XEXP (ref, 0), GET_MODE (ref));
5956 else if (GET_CODE (x) == PARALLEL)
5958 int i;
5959 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5961 rtx y = XVECEXP (x, 0, i);
5962 if (GET_CODE (y) == CLOBBER)
5964 rtx ref = XEXP (y, 0);
5965 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5966 || MEM_P (ref))
5967 invalidate (ref, VOIDmode);
5968 else if (GET_CODE (ref) == STRICT_LOW_PART
5969 || GET_CODE (ref) == ZERO_EXTRACT)
5970 invalidate (XEXP (ref, 0), GET_MODE (ref));
5976 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5977 and replace any registers in them with either an equivalent constant
5978 or the canonical form of the register. If we are inside an address,
5979 only do this if the address remains valid.
5981 OBJECT is 0 except when within a MEM in which case it is the MEM.
5983 Return the replacement for X. */
5985 static rtx
5986 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5988 enum rtx_code code = GET_CODE (x);
5989 const char *fmt = GET_RTX_FORMAT (code);
5990 int i;
5992 switch (code)
5994 case CONST_INT:
5995 case CONST:
5996 case SYMBOL_REF:
5997 case LABEL_REF:
5998 case CONST_DOUBLE:
5999 case CONST_FIXED:
6000 case CONST_VECTOR:
6001 case PC:
6002 case CC0:
6003 case LO_SUM:
6004 return x;
6006 case MEM:
6007 validate_change (x, &XEXP (x, 0),
6008 cse_process_notes (XEXP (x, 0), x, changed), 0);
6009 return x;
6011 case EXPR_LIST:
6012 case INSN_LIST:
6013 if (REG_NOTE_KIND (x) == REG_EQUAL)
6014 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
6015 if (XEXP (x, 1))
6016 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
6017 return x;
6019 case SIGN_EXTEND:
6020 case ZERO_EXTEND:
6021 case SUBREG:
6023 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6024 /* We don't substitute VOIDmode constants into these rtx,
6025 since they would impede folding. */
6026 if (GET_MODE (new_rtx) != VOIDmode)
6027 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6028 return x;
6031 case REG:
6032 i = REG_QTY (REGNO (x));
6034 /* Return a constant or a constant register. */
6035 if (REGNO_QTY_VALID_P (REGNO (x)))
6037 struct qty_table_elem *ent = &qty_table[i];
6039 if (ent->const_rtx != NULL_RTX
6040 && (CONSTANT_P (ent->const_rtx)
6041 || REG_P (ent->const_rtx)))
6043 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6044 if (new_rtx)
6045 return copy_rtx (new_rtx);
6049 /* Otherwise, canonicalize this register. */
6050 return canon_reg (x, NULL_RTX);
6052 default:
6053 break;
6056 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6057 if (fmt[i] == 'e')
6058 validate_change (object, &XEXP (x, i),
6059 cse_process_notes (XEXP (x, i), object, changed), 0);
6061 return x;
6064 static rtx
6065 cse_process_notes (rtx x, rtx object, bool *changed)
6067 rtx new_rtx = cse_process_notes_1 (x, object, changed);
6068 if (new_rtx != x)
6069 *changed = true;
6070 return new_rtx;
6074 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6076 DATA is a pointer to a struct cse_basic_block_data, that is used to
6077 describe the path.
6078 It is filled with a queue of basic blocks, starting with FIRST_BB
6079 and following a trace through the CFG.
6081 If all paths starting at FIRST_BB have been followed, or no new path
6082 starting at FIRST_BB can be constructed, this function returns FALSE.
6083 Otherwise, DATA->path is filled and the function returns TRUE indicating
6084 that a path to follow was found.
6086 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6087 block in the path will be FIRST_BB. */
6089 static bool
6090 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6091 int follow_jumps)
6093 basic_block bb;
6094 edge e;
6095 int path_size;
6097 SET_BIT (cse_visited_basic_blocks, first_bb->index);
6099 /* See if there is a previous path. */
6100 path_size = data->path_size;
6102 /* There is a previous path. Make sure it started with FIRST_BB. */
6103 if (path_size)
6104 gcc_assert (data->path[0].bb == first_bb);
6106 /* There was only one basic block in the last path. Clear the path and
6107 return, so that paths starting at another basic block can be tried. */
6108 if (path_size == 1)
6110 path_size = 0;
6111 goto done;
6114 /* If the path was empty from the beginning, construct a new path. */
6115 if (path_size == 0)
6116 data->path[path_size++].bb = first_bb;
6117 else
6119 /* Otherwise, path_size must be equal to or greater than 2, because
6120 a previous path exists that is at least two basic blocks long.
6122 Update the previous branch path, if any. If the last branch was
6123 previously along the branch edge, take the fallthrough edge now. */
6124 while (path_size >= 2)
6126 basic_block last_bb_in_path, previous_bb_in_path;
6127 edge e;
6129 --path_size;
6130 last_bb_in_path = data->path[path_size].bb;
6131 previous_bb_in_path = data->path[path_size - 1].bb;
6133 /* If we previously followed a path along the branch edge, try
6134 the fallthru edge now. */
6135 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6136 && any_condjump_p (BB_END (previous_bb_in_path))
6137 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6138 && e == BRANCH_EDGE (previous_bb_in_path))
6140 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6141 if (bb != EXIT_BLOCK_PTR
6142 && single_pred_p (bb)
6143 /* We used to assert here that we would only see blocks
6144 that we have not visited yet. But we may end up
6145 visiting basic blocks twice if the CFG has changed
6146 in this run of cse_main, because when the CFG changes
6147 the topological sort of the CFG also changes. A basic
6148 blocks that previously had more than two predecessors
6149 may now have a single predecessor, and become part of
6150 a path that starts at another basic block.
6152 We still want to visit each basic block only once, so
6153 halt the path here if we have already visited BB. */
6154 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
6156 SET_BIT (cse_visited_basic_blocks, bb->index);
6157 data->path[path_size++].bb = bb;
6158 break;
6162 data->path[path_size].bb = NULL;
6165 /* If only one block remains in the path, bail. */
6166 if (path_size == 1)
6168 path_size = 0;
6169 goto done;
6173 /* Extend the path if possible. */
6174 if (follow_jumps)
6176 bb = data->path[path_size - 1].bb;
6177 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
6179 if (single_succ_p (bb))
6180 e = single_succ_edge (bb);
6181 else if (EDGE_COUNT (bb->succs) == 2
6182 && any_condjump_p (BB_END (bb)))
6184 /* First try to follow the branch. If that doesn't lead
6185 to a useful path, follow the fallthru edge. */
6186 e = BRANCH_EDGE (bb);
6187 if (!single_pred_p (e->dest))
6188 e = FALLTHRU_EDGE (bb);
6190 else
6191 e = NULL;
6193 if (e
6194 && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6195 && e->dest != EXIT_BLOCK_PTR
6196 && single_pred_p (e->dest)
6197 /* Avoid visiting basic blocks twice. The large comment
6198 above explains why this can happen. */
6199 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
6201 basic_block bb2 = e->dest;
6202 SET_BIT (cse_visited_basic_blocks, bb2->index);
6203 data->path[path_size++].bb = bb2;
6204 bb = bb2;
6206 else
6207 bb = NULL;
6211 done:
6212 data->path_size = path_size;
6213 return path_size != 0;
6216 /* Dump the path in DATA to file F. NSETS is the number of sets
6217 in the path. */
6219 static void
6220 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6222 int path_entry;
6224 fprintf (f, ";; Following path with %d sets: ", nsets);
6225 for (path_entry = 0; path_entry < data->path_size; path_entry++)
6226 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6227 fputc ('\n', dump_file);
6228 fflush (f);
6232 /* Return true if BB has exception handling successor edges. */
6234 static bool
6235 have_eh_succ_edges (basic_block bb)
6237 edge e;
6238 edge_iterator ei;
6240 FOR_EACH_EDGE (e, ei, bb->succs)
6241 if (e->flags & EDGE_EH)
6242 return true;
6244 return false;
6248 /* Scan to the end of the path described by DATA. Return an estimate of
6249 the total number of SETs of all insns in the path. */
6251 static void
6252 cse_prescan_path (struct cse_basic_block_data *data)
6254 int nsets = 0;
6255 int path_size = data->path_size;
6256 int path_entry;
6258 /* Scan to end of each basic block in the path. */
6259 for (path_entry = 0; path_entry < path_size; path_entry++)
6261 basic_block bb;
6262 rtx insn;
6264 bb = data->path[path_entry].bb;
6266 FOR_BB_INSNS (bb, insn)
6268 if (!INSN_P (insn))
6269 continue;
6271 /* A PARALLEL can have lots of SETs in it,
6272 especially if it is really an ASM_OPERANDS. */
6273 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6274 nsets += XVECLEN (PATTERN (insn), 0);
6275 else
6276 nsets += 1;
6280 data->nsets = nsets;
6283 /* Process a single extended basic block described by EBB_DATA. */
6285 static void
6286 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6288 int path_size = ebb_data->path_size;
6289 int path_entry;
6290 int num_insns = 0;
6292 /* Allocate the space needed by qty_table. */
6293 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6295 new_basic_block ();
6296 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6297 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6298 for (path_entry = 0; path_entry < path_size; path_entry++)
6300 basic_block bb;
6301 rtx insn;
6303 bb = ebb_data->path[path_entry].bb;
6305 /* Invalidate recorded information for eh regs if there is an EH
6306 edge pointing to that bb. */
6307 if (bb_has_eh_pred (bb))
6309 df_ref *def_rec;
6311 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
6313 df_ref def = *def_rec;
6314 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6315 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6319 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6320 FOR_BB_INSNS (bb, insn)
6322 /* If we have processed 1,000 insns, flush the hash table to
6323 avoid extreme quadratic behavior. We must not include NOTEs
6324 in the count since there may be more of them when generating
6325 debugging information. If we clear the table at different
6326 times, code generated with -g -O might be different than code
6327 generated with -O but not -g.
6329 FIXME: This is a real kludge and needs to be done some other
6330 way. */
6331 if (NONDEBUG_INSN_P (insn)
6332 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6334 flush_hash_table ();
6335 num_insns = 0;
6338 if (INSN_P (insn))
6340 /* Process notes first so we have all notes in canonical forms
6341 when looking for duplicate operations. */
6342 if (REG_NOTES (insn))
6344 bool changed = false;
6345 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6346 NULL_RTX, &changed);
6347 if (changed)
6348 df_notes_rescan (insn);
6351 cse_insn (insn);
6353 /* If we haven't already found an insn where we added a LABEL_REF,
6354 check this one. */
6355 if (INSN_P (insn) && !recorded_label_ref
6356 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6357 (void *) insn))
6358 recorded_label_ref = true;
6360 #ifdef HAVE_cc0
6361 if (NONDEBUG_INSN_P (insn))
6363 /* If the previous insn sets CC0 and this insn no
6364 longer references CC0, delete the previous insn.
6365 Here we use fact that nothing expects CC0 to be
6366 valid over an insn, which is true until the final
6367 pass. */
6368 rtx prev_insn, tem;
6370 prev_insn = prev_nonnote_nondebug_insn (insn);
6371 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6372 && (tem = single_set (prev_insn)) != NULL_RTX
6373 && SET_DEST (tem) == cc0_rtx
6374 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6375 delete_insn (prev_insn);
6377 /* If this insn is not the last insn in the basic
6378 block, it will be PREV_INSN(insn) in the next
6379 iteration. If we recorded any CC0-related
6380 information for this insn, remember it. */
6381 if (insn != BB_END (bb))
6383 prev_insn_cc0 = this_insn_cc0;
6384 prev_insn_cc0_mode = this_insn_cc0_mode;
6387 #endif
6391 /* With non-call exceptions, we are not always able to update
6392 the CFG properly inside cse_insn. So clean up possibly
6393 redundant EH edges here. */
6394 if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6395 cse_cfg_altered |= purge_dead_edges (bb);
6397 /* If we changed a conditional jump, we may have terminated
6398 the path we are following. Check that by verifying that
6399 the edge we would take still exists. If the edge does
6400 not exist anymore, purge the remainder of the path.
6401 Note that this will cause us to return to the caller. */
6402 if (path_entry < path_size - 1)
6404 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6405 if (!find_edge (bb, next_bb))
6409 path_size--;
6411 /* If we truncate the path, we must also reset the
6412 visited bit on the remaining blocks in the path,
6413 or we will never visit them at all. */
6414 RESET_BIT (cse_visited_basic_blocks,
6415 ebb_data->path[path_size].bb->index);
6416 ebb_data->path[path_size].bb = NULL;
6418 while (path_size - 1 != path_entry);
6419 ebb_data->path_size = path_size;
6423 /* If this is a conditional jump insn, record any known
6424 equivalences due to the condition being tested. */
6425 insn = BB_END (bb);
6426 if (path_entry < path_size - 1
6427 && JUMP_P (insn)
6428 && single_set (insn)
6429 && any_condjump_p (insn))
6431 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6432 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6433 record_jump_equiv (insn, taken);
6436 #ifdef HAVE_cc0
6437 /* Clear the CC0-tracking related insns, they can't provide
6438 useful information across basic block boundaries. */
6439 prev_insn_cc0 = 0;
6440 #endif
6443 gcc_assert (next_qty <= max_qty);
6445 free (qty_table);
6449 /* Perform cse on the instructions of a function.
6450 F is the first instruction.
6451 NREGS is one plus the highest pseudo-reg number used in the instruction.
6453 Return 2 if jump optimizations should be redone due to simplifications
6454 in conditional jump instructions.
6455 Return 1 if the CFG should be cleaned up because it has been modified.
6456 Return 0 otherwise. */
6459 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6461 struct cse_basic_block_data ebb_data;
6462 basic_block bb;
6463 int *rc_order = XNEWVEC (int, last_basic_block);
6464 int i, n_blocks;
6466 df_set_flags (DF_LR_RUN_DCE);
6467 df_analyze ();
6468 df_set_flags (DF_DEFER_INSN_RESCAN);
6470 reg_scan (get_insns (), max_reg_num ());
6471 init_cse_reg_info (nregs);
6473 ebb_data.path = XNEWVEC (struct branch_path,
6474 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6476 cse_cfg_altered = false;
6477 cse_jumps_altered = false;
6478 recorded_label_ref = false;
6479 constant_pool_entries_cost = 0;
6480 constant_pool_entries_regcost = 0;
6481 ebb_data.path_size = 0;
6482 ebb_data.nsets = 0;
6483 rtl_hooks = cse_rtl_hooks;
6485 init_recog ();
6486 init_alias_analysis ();
6488 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6490 /* Set up the table of already visited basic blocks. */
6491 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6492 sbitmap_zero (cse_visited_basic_blocks);
6494 /* Loop over basic blocks in reverse completion order (RPO),
6495 excluding the ENTRY and EXIT blocks. */
6496 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6497 i = 0;
6498 while (i < n_blocks)
6500 /* Find the first block in the RPO queue that we have not yet
6501 processed before. */
6504 bb = BASIC_BLOCK (rc_order[i++]);
6506 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6507 && i < n_blocks);
6509 /* Find all paths starting with BB, and process them. */
6510 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6512 /* Pre-scan the path. */
6513 cse_prescan_path (&ebb_data);
6515 /* If this basic block has no sets, skip it. */
6516 if (ebb_data.nsets == 0)
6517 continue;
6519 /* Get a reasonable estimate for the maximum number of qty's
6520 needed for this path. For this, we take the number of sets
6521 and multiply that by MAX_RECOG_OPERANDS. */
6522 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6524 /* Dump the path we're about to process. */
6525 if (dump_file)
6526 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6528 cse_extended_basic_block (&ebb_data);
6532 /* Clean up. */
6533 end_alias_analysis ();
6534 free (reg_eqv_table);
6535 free (ebb_data.path);
6536 sbitmap_free (cse_visited_basic_blocks);
6537 free (rc_order);
6538 rtl_hooks = general_rtl_hooks;
6540 if (cse_jumps_altered || recorded_label_ref)
6541 return 2;
6542 else if (cse_cfg_altered)
6543 return 1;
6544 else
6545 return 0;
6548 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6549 which there isn't a REG_LABEL_OPERAND note.
6550 Return one if so. DATA is the insn. */
6552 static int
6553 check_for_label_ref (rtx *rtl, void *data)
6555 rtx insn = (rtx) data;
6557 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6558 note for it, we must rerun jump since it needs to place the note. If
6559 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6560 don't do this since no REG_LABEL_OPERAND will be added. */
6561 return (GET_CODE (*rtl) == LABEL_REF
6562 && ! LABEL_REF_NONLOCAL_P (*rtl)
6563 && (!JUMP_P (insn)
6564 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6565 && LABEL_P (XEXP (*rtl, 0))
6566 && INSN_UID (XEXP (*rtl, 0)) != 0
6567 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6570 /* Count the number of times registers are used (not set) in X.
6571 COUNTS is an array in which we accumulate the count, INCR is how much
6572 we count each register usage.
6574 Don't count a usage of DEST, which is the SET_DEST of a SET which
6575 contains X in its SET_SRC. This is because such a SET does not
6576 modify the liveness of DEST.
6577 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6578 We must then count uses of a SET_DEST regardless, because the insn can't be
6579 deleted here. */
6581 static void
6582 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6584 enum rtx_code code;
6585 rtx note;
6586 const char *fmt;
6587 int i, j;
6589 if (x == 0)
6590 return;
6592 switch (code = GET_CODE (x))
6594 case REG:
6595 if (x != dest)
6596 counts[REGNO (x)] += incr;
6597 return;
6599 case PC:
6600 case CC0:
6601 case CONST:
6602 case CONST_INT:
6603 case CONST_DOUBLE:
6604 case CONST_FIXED:
6605 case CONST_VECTOR:
6606 case SYMBOL_REF:
6607 case LABEL_REF:
6608 return;
6610 case CLOBBER:
6611 /* If we are clobbering a MEM, mark any registers inside the address
6612 as being used. */
6613 if (MEM_P (XEXP (x, 0)))
6614 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6615 return;
6617 case SET:
6618 /* Unless we are setting a REG, count everything in SET_DEST. */
6619 if (!REG_P (SET_DEST (x)))
6620 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6621 count_reg_usage (SET_SRC (x), counts,
6622 dest ? dest : SET_DEST (x),
6623 incr);
6624 return;
6626 case DEBUG_INSN:
6627 return;
6629 case CALL_INSN:
6630 case INSN:
6631 case JUMP_INSN:
6632 /* We expect dest to be NULL_RTX here. If the insn may trap,
6633 or if it cannot be deleted due to side-effects, mark this fact
6634 by setting DEST to pc_rtx. */
6635 if (insn_could_throw_p (x) || side_effects_p (PATTERN (x)))
6636 dest = pc_rtx;
6637 if (code == CALL_INSN)
6638 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6639 count_reg_usage (PATTERN (x), counts, dest, incr);
6641 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6642 use them. */
6644 note = find_reg_equal_equiv_note (x);
6645 if (note)
6647 rtx eqv = XEXP (note, 0);
6649 if (GET_CODE (eqv) == EXPR_LIST)
6650 /* This REG_EQUAL note describes the result of a function call.
6651 Process all the arguments. */
6654 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6655 eqv = XEXP (eqv, 1);
6657 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6658 else
6659 count_reg_usage (eqv, counts, dest, incr);
6661 return;
6663 case EXPR_LIST:
6664 if (REG_NOTE_KIND (x) == REG_EQUAL
6665 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6666 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6667 involving registers in the address. */
6668 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6669 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6671 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6672 return;
6674 case ASM_OPERANDS:
6675 /* Iterate over just the inputs, not the constraints as well. */
6676 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6677 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6678 return;
6680 case INSN_LIST:
6681 gcc_unreachable ();
6683 default:
6684 break;
6687 fmt = GET_RTX_FORMAT (code);
6688 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6690 if (fmt[i] == 'e')
6691 count_reg_usage (XEXP (x, i), counts, dest, incr);
6692 else if (fmt[i] == 'E')
6693 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6694 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6698 /* Return true if X is a dead register. */
6700 static inline int
6701 is_dead_reg (rtx x, int *counts)
6703 return (REG_P (x)
6704 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6705 && counts[REGNO (x)] == 0);
6708 /* Return true if set is live. */
6709 static bool
6710 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6711 int *counts)
6713 #ifdef HAVE_cc0
6714 rtx tem;
6715 #endif
6717 if (set_noop_p (set))
6720 #ifdef HAVE_cc0
6721 else if (GET_CODE (SET_DEST (set)) == CC0
6722 && !side_effects_p (SET_SRC (set))
6723 && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX
6724 || !INSN_P (tem)
6725 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6726 return false;
6727 #endif
6728 else if (!is_dead_reg (SET_DEST (set), counts)
6729 || side_effects_p (SET_SRC (set)))
6730 return true;
6731 return false;
6734 /* Return true if insn is live. */
6736 static bool
6737 insn_live_p (rtx insn, int *counts)
6739 int i;
6740 if (insn_could_throw_p (insn))
6741 return true;
6742 else if (GET_CODE (PATTERN (insn)) == SET)
6743 return set_live_p (PATTERN (insn), insn, counts);
6744 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6746 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6748 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6750 if (GET_CODE (elt) == SET)
6752 if (set_live_p (elt, insn, counts))
6753 return true;
6755 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6756 return true;
6758 return false;
6760 else if (DEBUG_INSN_P (insn))
6762 rtx next;
6764 for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
6765 if (NOTE_P (next))
6766 continue;
6767 else if (!DEBUG_INSN_P (next))
6768 return true;
6769 else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next))
6770 return false;
6772 return true;
6774 else
6775 return true;
6778 /* Count the number of stores into pseudo. Callback for note_stores. */
6780 static void
6781 count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6783 int *counts = (int *) data;
6784 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6785 counts[REGNO (x)]++;
6788 struct dead_debug_insn_data
6790 int *counts;
6791 rtx *replacements;
6792 bool seen_repl;
6795 /* Return if a DEBUG_INSN needs to be reset because some dead
6796 pseudo doesn't have a replacement. Callback for for_each_rtx. */
6798 static int
6799 is_dead_debug_insn (rtx *loc, void *data)
6801 rtx x = *loc;
6802 struct dead_debug_insn_data *ddid = (struct dead_debug_insn_data *) data;
6804 if (is_dead_reg (x, ddid->counts))
6806 if (ddid->replacements && ddid->replacements[REGNO (x)] != NULL_RTX)
6807 ddid->seen_repl = true;
6808 else
6809 return 1;
6811 return 0;
6814 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6815 Callback for simplify_replace_fn_rtx. */
6817 static rtx
6818 replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6820 rtx *replacements = (rtx *) data;
6822 if (REG_P (x)
6823 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6824 && replacements[REGNO (x)] != NULL_RTX)
6826 if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6827 return replacements[REGNO (x)];
6828 return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6829 GET_MODE (replacements[REGNO (x)]));
6831 return NULL_RTX;
6834 /* Scan all the insns and delete any that are dead; i.e., they store a register
6835 that is never used or they copy a register to itself.
6837 This is used to remove insns made obviously dead by cse, loop or other
6838 optimizations. It improves the heuristics in loop since it won't try to
6839 move dead invariants out of loops or make givs for dead quantities. The
6840 remaining passes of the compilation are also sped up. */
6843 delete_trivially_dead_insns (rtx insns, int nreg)
6845 int *counts;
6846 rtx insn, prev;
6847 rtx *replacements = NULL;
6848 int ndead = 0;
6850 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6851 /* First count the number of times each register is used. */
6852 if (MAY_HAVE_DEBUG_INSNS)
6854 counts = XCNEWVEC (int, nreg * 3);
6855 for (insn = insns; insn; insn = NEXT_INSN (insn))
6856 if (DEBUG_INSN_P (insn))
6857 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6858 NULL_RTX, 1);
6859 else if (INSN_P (insn))
6861 count_reg_usage (insn, counts, NULL_RTX, 1);
6862 note_stores (PATTERN (insn), count_stores, counts + nreg * 2);
6864 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6865 First one counts how many times each pseudo is used outside
6866 of debug insns, second counts how many times each pseudo is
6867 used in debug insns and third counts how many times a pseudo
6868 is stored. */
6870 else
6872 counts = XCNEWVEC (int, nreg);
6873 for (insn = insns; insn; insn = NEXT_INSN (insn))
6874 if (INSN_P (insn))
6875 count_reg_usage (insn, counts, NULL_RTX, 1);
6876 /* If no debug insns can be present, COUNTS is just an array
6877 which counts how many times each pseudo is used. */
6879 /* Go from the last insn to the first and delete insns that only set unused
6880 registers or copy a register to itself. As we delete an insn, remove
6881 usage counts for registers it uses.
6883 The first jump optimization pass may leave a real insn as the last
6884 insn in the function. We must not skip that insn or we may end
6885 up deleting code that is not really dead.
6887 If some otherwise unused register is only used in DEBUG_INSNs,
6888 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6889 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6890 has been created for the unused register, replace it with
6891 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6892 for (insn = get_last_insn (); insn; insn = prev)
6894 int live_insn = 0;
6896 prev = PREV_INSN (insn);
6897 if (!INSN_P (insn))
6898 continue;
6900 live_insn = insn_live_p (insn, counts);
6902 /* If this is a dead insn, delete it and show registers in it aren't
6903 being used. */
6905 if (! live_insn && dbg_cnt (delete_trivial_dead))
6907 if (DEBUG_INSN_P (insn))
6908 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6909 NULL_RTX, -1);
6910 else
6912 rtx set;
6913 if (MAY_HAVE_DEBUG_INSNS
6914 && (set = single_set (insn)) != NULL_RTX
6915 && is_dead_reg (SET_DEST (set), counts)
6916 /* Used at least once in some DEBUG_INSN. */
6917 && counts[REGNO (SET_DEST (set)) + nreg] > 0
6918 /* And set exactly once. */
6919 && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
6920 && !side_effects_p (SET_SRC (set))
6921 && asm_noperands (PATTERN (insn)) < 0)
6923 rtx dval, bind;
6925 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
6926 dval = make_debug_expr_from_rtl (SET_DEST (set));
6928 /* Emit a debug bind insn before the insn in which
6929 reg dies. */
6930 bind = gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
6931 DEBUG_EXPR_TREE_DECL (dval),
6932 SET_SRC (set),
6933 VAR_INIT_STATUS_INITIALIZED);
6934 count_reg_usage (bind, counts + nreg, NULL_RTX, 1);
6936 bind = emit_debug_insn_before (bind, insn);
6937 df_insn_rescan (bind);
6939 if (replacements == NULL)
6940 replacements = XCNEWVEC (rtx, nreg);
6941 replacements[REGNO (SET_DEST (set))] = dval;
6944 count_reg_usage (insn, counts, NULL_RTX, -1);
6945 ndead++;
6947 delete_insn_and_edges (insn);
6951 if (MAY_HAVE_DEBUG_INSNS)
6953 struct dead_debug_insn_data ddid;
6954 ddid.counts = counts;
6955 ddid.replacements = replacements;
6956 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
6957 if (DEBUG_INSN_P (insn))
6959 /* If this debug insn references a dead register that wasn't replaced
6960 with an DEBUG_EXPR, reset the DEBUG_INSN. */
6961 ddid.seen_repl = false;
6962 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
6963 is_dead_debug_insn, &ddid))
6965 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
6966 df_insn_rescan (insn);
6968 else if (ddid.seen_repl)
6970 INSN_VAR_LOCATION_LOC (insn)
6971 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
6972 NULL_RTX, replace_dead_reg,
6973 replacements);
6974 df_insn_rescan (insn);
6977 free (replacements);
6980 if (dump_file && ndead)
6981 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6982 ndead);
6983 /* Clean up. */
6984 free (counts);
6985 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6986 return ndead;
6989 /* This function is called via for_each_rtx. The argument, NEWREG, is
6990 a condition code register with the desired mode. If we are looking
6991 at the same register in a different mode, replace it with
6992 NEWREG. */
6994 static int
6995 cse_change_cc_mode (rtx *loc, void *data)
6997 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6999 if (*loc
7000 && REG_P (*loc)
7001 && REGNO (*loc) == REGNO (args->newreg)
7002 && GET_MODE (*loc) != GET_MODE (args->newreg))
7004 validate_change (args->insn, loc, args->newreg, 1);
7006 return -1;
7008 return 0;
7011 /* Change the mode of any reference to the register REGNO (NEWREG) to
7012 GET_MODE (NEWREG) in INSN. */
7014 static void
7015 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7017 struct change_cc_mode_args args;
7018 int success;
7020 if (!INSN_P (insn))
7021 return;
7023 args.insn = insn;
7024 args.newreg = newreg;
7026 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7027 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, &args);
7029 /* If the following assertion was triggered, there is most probably
7030 something wrong with the cc_modes_compatible back end function.
7031 CC modes only can be considered compatible if the insn - with the mode
7032 replaced by any of the compatible modes - can still be recognized. */
7033 success = apply_change_group ();
7034 gcc_assert (success);
7037 /* Change the mode of any reference to the register REGNO (NEWREG) to
7038 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7039 any instruction which modifies NEWREG. */
7041 static void
7042 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7044 rtx insn;
7046 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7048 if (! INSN_P (insn))
7049 continue;
7051 if (reg_set_p (newreg, insn))
7052 return;
7054 cse_change_cc_mode_insn (insn, newreg);
7058 /* BB is a basic block which finishes with CC_REG as a condition code
7059 register which is set to CC_SRC. Look through the successors of BB
7060 to find blocks which have a single predecessor (i.e., this one),
7061 and look through those blocks for an assignment to CC_REG which is
7062 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7063 permitted to change the mode of CC_SRC to a compatible mode. This
7064 returns VOIDmode if no equivalent assignments were found.
7065 Otherwise it returns the mode which CC_SRC should wind up with.
7066 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7067 but is passed unmodified down to recursive calls in order to prevent
7068 endless recursion.
7070 The main complexity in this function is handling the mode issues.
7071 We may have more than one duplicate which we can eliminate, and we
7072 try to find a mode which will work for multiple duplicates. */
7074 static enum machine_mode
7075 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7076 bool can_change_mode)
7078 bool found_equiv;
7079 enum machine_mode mode;
7080 unsigned int insn_count;
7081 edge e;
7082 rtx insns[2];
7083 enum machine_mode modes[2];
7084 rtx last_insns[2];
7085 unsigned int i;
7086 rtx newreg;
7087 edge_iterator ei;
7089 /* We expect to have two successors. Look at both before picking
7090 the final mode for the comparison. If we have more successors
7091 (i.e., some sort of table jump, although that seems unlikely),
7092 then we require all beyond the first two to use the same
7093 mode. */
7095 found_equiv = false;
7096 mode = GET_MODE (cc_src);
7097 insn_count = 0;
7098 FOR_EACH_EDGE (e, ei, bb->succs)
7100 rtx insn;
7101 rtx end;
7103 if (e->flags & EDGE_COMPLEX)
7104 continue;
7106 if (EDGE_COUNT (e->dest->preds) != 1
7107 || e->dest == EXIT_BLOCK_PTR
7108 /* Avoid endless recursion on unreachable blocks. */
7109 || e->dest == orig_bb)
7110 continue;
7112 end = NEXT_INSN (BB_END (e->dest));
7113 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7115 rtx set;
7117 if (! INSN_P (insn))
7118 continue;
7120 /* If CC_SRC is modified, we have to stop looking for
7121 something which uses it. */
7122 if (modified_in_p (cc_src, insn))
7123 break;
7125 /* Check whether INSN sets CC_REG to CC_SRC. */
7126 set = single_set (insn);
7127 if (set
7128 && REG_P (SET_DEST (set))
7129 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7131 bool found;
7132 enum machine_mode set_mode;
7133 enum machine_mode comp_mode;
7135 found = false;
7136 set_mode = GET_MODE (SET_SRC (set));
7137 comp_mode = set_mode;
7138 if (rtx_equal_p (cc_src, SET_SRC (set)))
7139 found = true;
7140 else if (GET_CODE (cc_src) == COMPARE
7141 && GET_CODE (SET_SRC (set)) == COMPARE
7142 && mode != set_mode
7143 && rtx_equal_p (XEXP (cc_src, 0),
7144 XEXP (SET_SRC (set), 0))
7145 && rtx_equal_p (XEXP (cc_src, 1),
7146 XEXP (SET_SRC (set), 1)))
7149 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7150 if (comp_mode != VOIDmode
7151 && (can_change_mode || comp_mode == mode))
7152 found = true;
7155 if (found)
7157 found_equiv = true;
7158 if (insn_count < ARRAY_SIZE (insns))
7160 insns[insn_count] = insn;
7161 modes[insn_count] = set_mode;
7162 last_insns[insn_count] = end;
7163 ++insn_count;
7165 if (mode != comp_mode)
7167 gcc_assert (can_change_mode);
7168 mode = comp_mode;
7170 /* The modified insn will be re-recognized later. */
7171 PUT_MODE (cc_src, mode);
7174 else
7176 if (set_mode != mode)
7178 /* We found a matching expression in the
7179 wrong mode, but we don't have room to
7180 store it in the array. Punt. This case
7181 should be rare. */
7182 break;
7184 /* INSN sets CC_REG to a value equal to CC_SRC
7185 with the right mode. We can simply delete
7186 it. */
7187 delete_insn (insn);
7190 /* We found an instruction to delete. Keep looking,
7191 in the hopes of finding a three-way jump. */
7192 continue;
7195 /* We found an instruction which sets the condition
7196 code, so don't look any farther. */
7197 break;
7200 /* If INSN sets CC_REG in some other way, don't look any
7201 farther. */
7202 if (reg_set_p (cc_reg, insn))
7203 break;
7206 /* If we fell off the bottom of the block, we can keep looking
7207 through successors. We pass CAN_CHANGE_MODE as false because
7208 we aren't prepared to handle compatibility between the
7209 further blocks and this block. */
7210 if (insn == end)
7212 enum machine_mode submode;
7214 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7215 if (submode != VOIDmode)
7217 gcc_assert (submode == mode);
7218 found_equiv = true;
7219 can_change_mode = false;
7224 if (! found_equiv)
7225 return VOIDmode;
7227 /* Now INSN_COUNT is the number of instructions we found which set
7228 CC_REG to a value equivalent to CC_SRC. The instructions are in
7229 INSNS. The modes used by those instructions are in MODES. */
7231 newreg = NULL_RTX;
7232 for (i = 0; i < insn_count; ++i)
7234 if (modes[i] != mode)
7236 /* We need to change the mode of CC_REG in INSNS[i] and
7237 subsequent instructions. */
7238 if (! newreg)
7240 if (GET_MODE (cc_reg) == mode)
7241 newreg = cc_reg;
7242 else
7243 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7245 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7246 newreg);
7249 delete_insn_and_edges (insns[i]);
7252 return mode;
7255 /* If we have a fixed condition code register (or two), walk through
7256 the instructions and try to eliminate duplicate assignments. */
7258 static void
7259 cse_condition_code_reg (void)
7261 unsigned int cc_regno_1;
7262 unsigned int cc_regno_2;
7263 rtx cc_reg_1;
7264 rtx cc_reg_2;
7265 basic_block bb;
7267 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7268 return;
7270 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7271 if (cc_regno_2 != INVALID_REGNUM)
7272 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7273 else
7274 cc_reg_2 = NULL_RTX;
7276 FOR_EACH_BB (bb)
7278 rtx last_insn;
7279 rtx cc_reg;
7280 rtx insn;
7281 rtx cc_src_insn;
7282 rtx cc_src;
7283 enum machine_mode mode;
7284 enum machine_mode orig_mode;
7286 /* Look for blocks which end with a conditional jump based on a
7287 condition code register. Then look for the instruction which
7288 sets the condition code register. Then look through the
7289 successor blocks for instructions which set the condition
7290 code register to the same value. There are other possible
7291 uses of the condition code register, but these are by far the
7292 most common and the ones which we are most likely to be able
7293 to optimize. */
7295 last_insn = BB_END (bb);
7296 if (!JUMP_P (last_insn))
7297 continue;
7299 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7300 cc_reg = cc_reg_1;
7301 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7302 cc_reg = cc_reg_2;
7303 else
7304 continue;
7306 cc_src_insn = NULL_RTX;
7307 cc_src = NULL_RTX;
7308 for (insn = PREV_INSN (last_insn);
7309 insn && insn != PREV_INSN (BB_HEAD (bb));
7310 insn = PREV_INSN (insn))
7312 rtx set;
7314 if (! INSN_P (insn))
7315 continue;
7316 set = single_set (insn);
7317 if (set
7318 && REG_P (SET_DEST (set))
7319 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7321 cc_src_insn = insn;
7322 cc_src = SET_SRC (set);
7323 break;
7325 else if (reg_set_p (cc_reg, insn))
7326 break;
7329 if (! cc_src_insn)
7330 continue;
7332 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7333 continue;
7335 /* Now CC_REG is a condition code register used for a
7336 conditional jump at the end of the block, and CC_SRC, in
7337 CC_SRC_INSN, is the value to which that condition code
7338 register is set, and CC_SRC is still meaningful at the end of
7339 the basic block. */
7341 orig_mode = GET_MODE (cc_src);
7342 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7343 if (mode != VOIDmode)
7345 gcc_assert (mode == GET_MODE (cc_src));
7346 if (mode != orig_mode)
7348 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7350 cse_change_cc_mode_insn (cc_src_insn, newreg);
7352 /* Do the same in the following insns that use the
7353 current value of CC_REG within BB. */
7354 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7355 NEXT_INSN (last_insn),
7356 newreg);
7363 /* Perform common subexpression elimination. Nonzero value from
7364 `cse_main' means that jumps were simplified and some code may now
7365 be unreachable, so do jump optimization again. */
7366 static bool
7367 gate_handle_cse (void)
7369 return optimize > 0;
7372 static unsigned int
7373 rest_of_handle_cse (void)
7375 int tem;
7377 if (dump_file)
7378 dump_flow_info (dump_file, dump_flags);
7380 tem = cse_main (get_insns (), max_reg_num ());
7382 /* If we are not running more CSE passes, then we are no longer
7383 expecting CSE to be run. But always rerun it in a cheap mode. */
7384 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7386 if (tem == 2)
7388 timevar_push (TV_JUMP);
7389 rebuild_jump_labels (get_insns ());
7390 cleanup_cfg (0);
7391 timevar_pop (TV_JUMP);
7393 else if (tem == 1 || optimize > 1)
7394 cleanup_cfg (0);
7396 return 0;
7399 struct rtl_opt_pass pass_cse =
7402 RTL_PASS,
7403 "cse1", /* name */
7404 gate_handle_cse, /* gate */
7405 rest_of_handle_cse, /* execute */
7406 NULL, /* sub */
7407 NULL, /* next */
7408 0, /* static_pass_number */
7409 TV_CSE, /* tv_id */
7410 0, /* properties_required */
7411 0, /* properties_provided */
7412 0, /* properties_destroyed */
7413 0, /* todo_flags_start */
7414 TODO_df_finish | TODO_verify_rtl_sharing |
7415 TODO_ggc_collect |
7416 TODO_verify_flow, /* todo_flags_finish */
7421 static bool
7422 gate_handle_cse2 (void)
7424 return optimize > 0 && flag_rerun_cse_after_loop;
7427 /* Run second CSE pass after loop optimizations. */
7428 static unsigned int
7429 rest_of_handle_cse2 (void)
7431 int tem;
7433 if (dump_file)
7434 dump_flow_info (dump_file, dump_flags);
7436 tem = cse_main (get_insns (), max_reg_num ());
7438 /* Run a pass to eliminate duplicated assignments to condition code
7439 registers. We have to run this after bypass_jumps, because it
7440 makes it harder for that pass to determine whether a jump can be
7441 bypassed safely. */
7442 cse_condition_code_reg ();
7444 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7446 if (tem == 2)
7448 timevar_push (TV_JUMP);
7449 rebuild_jump_labels (get_insns ());
7450 cleanup_cfg (0);
7451 timevar_pop (TV_JUMP);
7453 else if (tem == 1)
7454 cleanup_cfg (0);
7456 cse_not_expected = 1;
7457 return 0;
7461 struct rtl_opt_pass pass_cse2 =
7464 RTL_PASS,
7465 "cse2", /* name */
7466 gate_handle_cse2, /* gate */
7467 rest_of_handle_cse2, /* execute */
7468 NULL, /* sub */
7469 NULL, /* next */
7470 0, /* static_pass_number */
7471 TV_CSE2, /* tv_id */
7472 0, /* properties_required */
7473 0, /* properties_provided */
7474 0, /* properties_destroyed */
7475 0, /* todo_flags_start */
7476 TODO_df_finish | TODO_verify_rtl_sharing |
7477 TODO_ggc_collect |
7478 TODO_verify_flow /* todo_flags_finish */
7482 static bool
7483 gate_handle_cse_after_global_opts (void)
7485 return optimize > 0 && flag_rerun_cse_after_global_opts;
7488 /* Run second CSE pass after loop optimizations. */
7489 static unsigned int
7490 rest_of_handle_cse_after_global_opts (void)
7492 int save_cfj;
7493 int tem;
7495 /* We only want to do local CSE, so don't follow jumps. */
7496 save_cfj = flag_cse_follow_jumps;
7497 flag_cse_follow_jumps = 0;
7499 rebuild_jump_labels (get_insns ());
7500 tem = cse_main (get_insns (), max_reg_num ());
7501 purge_all_dead_edges ();
7502 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7504 cse_not_expected = !flag_rerun_cse_after_loop;
7506 /* If cse altered any jumps, rerun jump opts to clean things up. */
7507 if (tem == 2)
7509 timevar_push (TV_JUMP);
7510 rebuild_jump_labels (get_insns ());
7511 cleanup_cfg (0);
7512 timevar_pop (TV_JUMP);
7514 else if (tem == 1)
7515 cleanup_cfg (0);
7517 flag_cse_follow_jumps = save_cfj;
7518 return 0;
7521 struct rtl_opt_pass pass_cse_after_global_opts =
7524 RTL_PASS,
7525 "cse_local", /* name */
7526 gate_handle_cse_after_global_opts, /* gate */
7527 rest_of_handle_cse_after_global_opts, /* execute */
7528 NULL, /* sub */
7529 NULL, /* next */
7530 0, /* static_pass_number */
7531 TV_CSE, /* tv_id */
7532 0, /* properties_required */
7533 0, /* properties_provided */
7534 0, /* properties_destroyed */
7535 0, /* todo_flags_start */
7536 TODO_df_finish | TODO_verify_rtl_sharing |
7537 TODO_ggc_collect |
7538 TODO_verify_flow /* todo_flags_finish */